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-rw-r--r--arch/mips/include/asm/hazards.h7
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/mips/include/asm/hazards.h b/arch/mips/include/asm/hazards.h
index 4e332165d7b7..b4c20e4f87cd 100644
--- a/arch/mips/include/asm/hazards.h
+++ b/arch/mips/include/asm/hazards.h
@@ -87,7 +87,8 @@ do { \
87 : "=r" (tmp)); \ 87 : "=r" (tmp)); \
88} while (0) 88} while (0)
89 89
90#elif defined(CONFIG_CPU_MIPSR1) && !defined(CONFIG_MIPS_ALCHEMY) 90#elif (defined(CONFIG_CPU_MIPSR1) && !defined(CONFIG_MIPS_ALCHEMY)) || \
91 defined(CONFIG_CPU_BMIPS)
91 92
92/* 93/*
93 * These are slightly complicated by the fact that we guarantee R1 kernels to 94 * These are slightly complicated by the fact that we guarantee R1 kernels to
@@ -139,8 +140,8 @@ do { \
139} while (0) 140} while (0)
140 141
141#elif defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_CPU_CAVIUM_OCTEON) || \ 142#elif defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_CPU_CAVIUM_OCTEON) || \
142 defined(CONFIG_CPU_LOONGSON2) || defined(CONFIG_CPU_R10000) || \ 143 defined(CONFIG_CPU_LOONGSON2) || defined(CONFIG_CPU_R10000) || \
143 defined(CONFIG_CPU_R5500) 144 defined(CONFIG_CPU_R5500)
144 145
145/* 146/*
146 * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer. 147 * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer.