diff options
Diffstat (limited to 'arch/mips/include/asm/cpu.h')
| -rw-r--r-- | arch/mips/include/asm/cpu.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h index 554e2d29965d..52c4e914f95a 100644 --- a/arch/mips/include/asm/cpu.h +++ b/arch/mips/include/asm/cpu.h | |||
| @@ -320,7 +320,8 @@ enum cpu_type_enum { | |||
| 320 | #define MIPS_CPU_VINT 0x00080000 /* CPU supports MIPSR2 vectored interrupts */ | 320 | #define MIPS_CPU_VINT 0x00080000 /* CPU supports MIPSR2 vectored interrupts */ |
| 321 | #define MIPS_CPU_VEIC 0x00100000 /* CPU supports MIPSR2 external interrupt controller mode */ | 321 | #define MIPS_CPU_VEIC 0x00100000 /* CPU supports MIPSR2 external interrupt controller mode */ |
| 322 | #define MIPS_CPU_ULRI 0x00200000 /* CPU has ULRI feature */ | 322 | #define MIPS_CPU_ULRI 0x00200000 /* CPU has ULRI feature */ |
| 323 | #define MIPS_CPU_RIXI 0x00400000 /* CPU has TLB Read/eXec Inhibit */ | 323 | #define MIPS_CPU_PCI 0x00400000 /* CPU has Perf Ctr Int indicator */ |
| 324 | #define MIPS_CPU_RIXI 0x00800000 /* CPU has TLB Read/eXec Inhibit */ | ||
| 324 | 325 | ||
| 325 | /* | 326 | /* |
| 326 | * CPU ASE encodings | 327 | * CPU ASE encodings |
| @@ -331,6 +332,7 @@ enum cpu_type_enum { | |||
| 331 | #define MIPS_ASE_SMARTMIPS 0x00000008 /* SmartMIPS */ | 332 | #define MIPS_ASE_SMARTMIPS 0x00000008 /* SmartMIPS */ |
| 332 | #define MIPS_ASE_DSP 0x00000010 /* Signal Processing ASE */ | 333 | #define MIPS_ASE_DSP 0x00000010 /* Signal Processing ASE */ |
| 333 | #define MIPS_ASE_MIPSMT 0x00000020 /* CPU supports MIPS MT */ | 334 | #define MIPS_ASE_MIPSMT 0x00000020 /* CPU supports MIPS MT */ |
| 335 | #define MIPS_ASE_DSP2P 0x00000040 /* Signal Processing ASE Rev 2 */ | ||
| 334 | 336 | ||
| 335 | 337 | ||
| 336 | #endif /* _ASM_CPU_H */ | 338 | #endif /* _ASM_CPU_H */ |