5 files changed, 365 insertions, 77 deletions

diff --git a/arch/mips/bcm63xx/Makefile b/arch/mips/bcm63xx/Makefile
index 9bbb30a9dc20..ac2807397c1c 100644
--- a/arch/mips/bcm63xx/Makefile
+++ b/arch/mips/bcm63xx/Makefile
@@ -1,6 +1,7 @@
-obj-y           += clk.o cpu.o cs.o gpio.o irq.o prom.o setup.o timer.o \
-                   dev-dsp.o dev-enet.o dev-flash.o dev-pcmcia.o dev-rng.o \
-                   dev-spi.o dev-uart.o dev-wdt.o dev-usb-usbd.o
+obj-y           += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
+                   setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \
+                   dev-pcmcia.o dev-rng.o dev-spi.o dev-uart.o dev-wdt.o \
+                   dev-usb-usbd.o
 obj-$(CONFIG_EARLY_PRINTK)      += early_printk.o
 
 obj-y           += boards/
diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c b/arch/mips/bcm63xx/boards/board_bcm963xx.c
index 1cd4d73f23c7..73be9b349690 100644
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -18,6 +18,7 @@
 #include <bcm63xx_dev_uart.h>
 #include <bcm63xx_regs.h>
 #include <bcm63xx_io.h>
+#include <bcm63xx_nvram.h>
 #include <bcm63xx_dev_pci.h>
 #include <bcm63xx_dev_enet.h>
 #include <bcm63xx_dev_dsp.h>
@@ -29,8 +30,6 @@
 
 #define PFX     "board_bcm963xx: "
 
-static struct bcm963xx_nvram nvram;
-static unsigned int mac_addr_used;
 static struct board_info board;
 
 /*
@@ -716,50 +715,14 @@ const char *board_get_name(void)
 }
 
 /*
- * register & return a new board mac address
- */
-static int board_get_mac_address(u8 *mac)
-{
-        u8 *oui;
-        int count;
-
-        if (mac_addr_used >= nvram.mac_addr_count) {
-                printk(KERN_ERR PFX "not enough mac address\n");
-                return -ENODEV;
-        }
-
-        memcpy(mac, nvram.mac_addr_base, ETH_ALEN);
-        oui = mac + ETH_ALEN/2 - 1;
-        count = mac_addr_used;
-
-        while (count--) {
-                u8 *p = mac + ETH_ALEN - 1;
-
-                do {
-                        (*p)++;
-                        if (*p != 0)
-                                break;
-                        p--;
-                } while (p != oui);
-
-                if (p == oui) {
-                        printk(KERN_ERR PFX "unable to fetch mac address\n");
-                        return -ENODEV;
-                }
-        }
-
-        mac_addr_used++;
-        return 0;
-}
-
-/*
  * early init callback, read nvram data from flash and checksum it
  */
 void __init board_prom_init(void)
 {
-        unsigned int check_len, i;
-        u8 *boot_addr, *cfe, *p;
+        unsigned int i;
+        u8 *boot_addr, *cfe;
         char cfe_version[32];
+        char *board_name;
         u32 val;
 
         /* read base address of boot chip select (0)
@@ -782,27 +745,15 @@ void __init board_prom_init(void)
                 strcpy(cfe_version, "unknown");
         printk(KERN_INFO PFX "CFE version: %s\n", cfe_version);
 
-        /* extract nvram data */
-        memcpy(&nvram, boot_addr + BCM963XX_NVRAM_OFFSET, sizeof(nvram));
-
-        /* check checksum before using data */
-        if (nvram.version <= 4)
-                check_len = offsetof(struct bcm963xx_nvram, checksum_old);
-        else
-                check_len = sizeof(nvram);
-        val = 0;
-        p = (u8 *)&nvram;
-        while (check_len--)
-                val += *p;
-        if (val) {
+        if (bcm63xx_nvram_init(boot_addr + BCM963XX_NVRAM_OFFSET)) {
                 printk(KERN_ERR PFX "invalid nvram checksum\n");
                 return;
         }
 
+        board_name = bcm63xx_nvram_get_name();
         /* find board by name */
         for (i = 0; i < ARRAY_SIZE(bcm963xx_boards); i++) {
-                if (strncmp(nvram.name, bcm963xx_boards[i]->name,
-                            sizeof(nvram.name)))
+                if (strncmp(board_name, bcm963xx_boards[i]->name, 16))
                         continue;
                 /* copy, board desc array is marked initdata */
                 memcpy(&board, bcm963xx_boards[i], sizeof(board));
@@ -812,7 +763,7 @@ void __init board_prom_init(void)
         /* bail out if board is not found, will complain later */
         if (!board.name[0]) {
                 char name[17];
-                memcpy(name, nvram.name, 16);
+                memcpy(name, board_name, 16);
                 name[16] = 0;
                 printk(KERN_ERR PFX "unknown bcm963xx board: %s\n",
                        name);
@@ -890,11 +841,11 @@ int __init board_register_devices(void)
                 bcm63xx_pcmcia_register();
 
         if (board.has_enet0 &&
-            !board_get_mac_address(board.enet0.mac_addr))
+            !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr))
                 bcm63xx_enet_register(0, &board.enet0);
 
         if (board.has_enet1 &&
-            !board_get_mac_address(board.enet1.mac_addr))
+            !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr))
                 bcm63xx_enet_register(1, &board.enet1);
 
         if (board.has_usbd)
@@ -907,7 +858,7 @@ int __init board_register_devices(void)
          * do this after registering enet devices
          */
 #ifdef CONFIG_SSB_PCIHOST
-        if (!board_get_mac_address(bcm63xx_sprom.il0mac)) {
+        if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) {
                 memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
                 memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
                 if (ssb_arch_register_fallback_sprom(
diff --git a/arch/mips/bcm63xx/clk.c b/arch/mips/bcm63xx/clk.c
index dff79ab6005e..b9e948d59430 100644
--- a/arch/mips/bcm63xx/clk.c
+++ b/arch/mips/bcm63xx/clk.c
@@ -14,6 +14,7 @@
 #include <bcm63xx_cpu.h>
 #include <bcm63xx_io.h>
 #include <bcm63xx_regs.h>
+#include <bcm63xx_reset.h>
 #include <bcm63xx_clk.h>
 
 static DEFINE_MUTEX(clocks_mutex);
@@ -124,15 +125,10 @@ static void enetsw_set(struct clk *clk, int enable)
                         CKCTL_6368_SWPKT_USB_EN |
                         CKCTL_6368_SWPKT_SAR_EN, enable);
         if (enable) {
-                u32 val;
-
                 /* reset switch core afer clock change */
-                val = bcm_perf_readl(PERF_SOFTRESET_6368_REG);
-                val &= ~SOFTRESET_6368_ENETSW_MASK;
-                bcm_perf_writel(val, PERF_SOFTRESET_6368_REG);
+                bcm63xx_core_set_reset(BCM63XX_RESET_ENETSW, 1);
                 msleep(10);
-                val |= SOFTRESET_6368_ENETSW_MASK;
-                bcm_perf_writel(val, PERF_SOFTRESET_6368_REG);
+                bcm63xx_core_set_reset(BCM63XX_RESET_ENETSW, 0);
                 msleep(10);
         }
 }
@@ -222,15 +218,10 @@ static void xtm_set(struct clk *clk, int enable)
                         CKCTL_6368_SWPKT_SAR_EN, enable);
 
         if (enable) {
-                u32 val;
-
                 /* reset sar core afer clock change */
-                val = bcm_perf_readl(PERF_SOFTRESET_6368_REG);
-                val &= ~SOFTRESET_6368_SAR_MASK;
-                bcm_perf_writel(val, PERF_SOFTRESET_6368_REG);
+                bcm63xx_core_set_reset(BCM63XX_RESET_SAR, 1);
                 mdelay(1);
-                val |= SOFTRESET_6368_SAR_MASK;
-                bcm_perf_writel(val, PERF_SOFTRESET_6368_REG);
+                bcm63xx_core_set_reset(BCM63XX_RESET_SAR, 0);
                 mdelay(1);
         }
 }
@@ -253,6 +244,19 @@ static struct clk clk_ipsec = {
 };
 
 /*
+ * PCIe clock
+ */
+
+static void pcie_set(struct clk *clk, int enable)
+{
+        bcm_hwclock_set(CKCTL_6328_PCIE_EN, enable);
+}
+
+static struct clk clk_pcie = {
+        .set    = pcie_set,
+};
+
+/*
  * Internal peripheral clock
  */
 static struct clk clk_periph = {
@@ -313,6 +317,8 @@ struct clk *clk_get(struct device *dev, const char *id)
                 return &clk_pcm;
         if (BCMCPU_IS_6368() && !strcmp(id, "ipsec"))
                 return &clk_ipsec;
+        if (BCMCPU_IS_6328() && !strcmp(id, "pcie"))
+                return &clk_pcie;
         return ERR_PTR(-ENOENT);
 }
 
diff --git a/arch/mips/bcm63xx/nvram.c b/arch/mips/bcm63xx/nvram.c
new file mode 100644
index 000000000000..620611680839
--- /dev/null
+++ b/arch/mips/bcm63xx/nvram.c
@@ -0,0 +1,107 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
+ * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
+ * Copyright (C) 2012 Jonas Gorski <jonas.gorski@gmail.com>
+ */
+
+#define pr_fmt(fmt) "bcm63xx_nvram: " fmt
+
+#include <linux/init.h>
+#include <linux/crc32.h>
+#include <linux/export.h>
+#include <linux/kernel.h>
+#include <linux/if_ether.h>
+
+#include <bcm63xx_nvram.h>
+
+/*
+ * nvram structure
+ */
+struct bcm963xx_nvram {
+        u32     version;
+        u8      reserved1[256];
+        u8      name[16];
+        u32     main_tp_number;
+        u32     psi_size;
+        u32     mac_addr_count;
+        u8      mac_addr_base[ETH_ALEN];
+        u8      reserved2[2];
+        u32     checksum_old;
+        u8      reserved3[720];
+        u32     checksum_high;
+};
+
+static struct bcm963xx_nvram nvram;
+static int mac_addr_used;
+
+int __init bcm63xx_nvram_init(void *addr)
+{
+        unsigned int check_len;
+        u32 crc, expected_crc;
+
+        /* extract nvram data */
+        memcpy(&nvram, addr, sizeof(nvram));
+
+        /* check checksum before using data */
+        if (nvram.version <= 4) {
+                check_len = offsetof(struct bcm963xx_nvram, reserved3);
+                expected_crc = nvram.checksum_old;
+                nvram.checksum_old = 0;
+        } else {
+                check_len = sizeof(nvram);
+                expected_crc = nvram.checksum_high;
+                nvram.checksum_high = 0;
+        }
+
+        crc = crc32_le(~0, (u8 *)&nvram, check_len);
+
+        if (crc != expected_crc)
+                return -EINVAL;
+
+        return 0;
+}
+
+u8 *bcm63xx_nvram_get_name(void)
+{
+        return nvram.name;
+}
+EXPORT_SYMBOL(bcm63xx_nvram_get_name);
+
+int bcm63xx_nvram_get_mac_address(u8 *mac)
+{
+        u8 *oui;
+        int count;
+
+        if (mac_addr_used >= nvram.mac_addr_count) {
+                pr_err("not enough mac addresses\n");
+                return -ENODEV;
+        }
+
+        memcpy(mac, nvram.mac_addr_base, ETH_ALEN);
+        oui = mac + ETH_ALEN/2 - 1;
+        count = mac_addr_used;
+
+        while (count--) {
+                u8 *p = mac + ETH_ALEN - 1;
+
+                do {
+                        (*p)++;
+                        if (*p != 0)
+                                break;
+                        p--;
+                } while (p != oui);
+
+                if (p == oui) {
+                        pr_err("unable to fetch mac address\n");
+                        return -ENODEV;
+                }
+        }
+
+        mac_addr_used++;
+        return 0;
+}
+EXPORT_SYMBOL(bcm63xx_nvram_get_mac_address);
diff --git a/arch/mips/bcm63xx/reset.c b/arch/mips/bcm63xx/reset.c
new file mode 100644
index 000000000000..68a31bb90cbf
--- /dev/null
+++ b/arch/mips/bcm63xx/reset.c
@@ -0,0 +1,223 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2012 Jonas Gorski <jonas.gorski@gmail.com>
+ */
+
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <bcm63xx_cpu.h>
+#include <bcm63xx_io.h>
+#include <bcm63xx_regs.h>
+#include <bcm63xx_reset.h>
+
+#define __GEN_RESET_BITS_TABLE(__cpu)                                   \
+        [BCM63XX_RESET_SPI]             = BCM## __cpu ##_RESET_SPI,     \
+        [BCM63XX_RESET_ENET]            = BCM## __cpu ##_RESET_ENET,    \
+        [BCM63XX_RESET_USBH]            = BCM## __cpu ##_RESET_USBH,    \
+        [BCM63XX_RESET_USBD]            = BCM## __cpu ##_RESET_USBD,    \
+        [BCM63XX_RESET_DSL]             = BCM## __cpu ##_RESET_DSL,     \
+        [BCM63XX_RESET_SAR]             = BCM## __cpu ##_RESET_SAR,     \
+        [BCM63XX_RESET_EPHY]            = BCM## __cpu ##_RESET_EPHY,    \
+        [BCM63XX_RESET_ENETSW]          = BCM## __cpu ##_RESET_ENETSW,  \
+        [BCM63XX_RESET_PCM]             = BCM## __cpu ##_RESET_PCM,     \
+        [BCM63XX_RESET_MPI]             = BCM## __cpu ##_RESET_MPI,     \
+        [BCM63XX_RESET_PCIE]            = BCM## __cpu ##_RESET_PCIE,    \
+        [BCM63XX_RESET_PCIE_EXT]        = BCM## __cpu ##_RESET_PCIE_EXT,
+
+#define BCM6328_RESET_SPI       SOFTRESET_6328_SPI_MASK
+#define BCM6328_RESET_ENET      0
+#define BCM6328_RESET_USBH      SOFTRESET_6328_USBH_MASK
+#define BCM6328_RESET_USBD      SOFTRESET_6328_USBS_MASK
+#define BCM6328_RESET_DSL       0
+#define BCM6328_RESET_SAR       SOFTRESET_6328_SAR_MASK
+#define BCM6328_RESET_EPHY      SOFTRESET_6328_EPHY_MASK
+#define BCM6328_RESET_ENETSW    SOFTRESET_6328_ENETSW_MASK
+#define BCM6328_RESET_PCM       SOFTRESET_6328_PCM_MASK
+#define BCM6328_RESET_MPI       0
+#define BCM6328_RESET_PCIE      \
+                                (SOFTRESET_6328_PCIE_MASK |             \
+                                 SOFTRESET_6328_PCIE_CORE_MASK |        \
+                                 SOFTRESET_6328_PCIE_HARD_MASK)
+#define BCM6328_RESET_PCIE_EXT  SOFTRESET_6328_PCIE_EXT_MASK
+
+#define BCM6338_RESET_SPI       SOFTRESET_6338_SPI_MASK
+#define BCM6338_RESET_ENET      SOFTRESET_6338_ENET_MASK
+#define BCM6338_RESET_USBH      SOFTRESET_6338_USBH_MASK
+#define BCM6338_RESET_USBD      SOFTRESET_6338_USBS_MASK
+#define BCM6338_RESET_DSL       SOFTRESET_6338_ADSL_MASK
+#define BCM6338_RESET_SAR       SOFTRESET_6338_SAR_MASK
+#define BCM6338_RESET_EPHY      0
+#define BCM6338_RESET_ENETSW    0
+#define BCM6338_RESET_PCM       0
+#define BCM6338_RESET_MPI       0
+#define BCM6338_RESET_PCIE      0
+#define BCM6338_RESET_PCIE_EXT  0
+
+#define BCM6348_RESET_SPI       SOFTRESET_6348_SPI_MASK
+#define BCM6348_RESET_ENET      SOFTRESET_6348_ENET_MASK
+#define BCM6348_RESET_USBH      SOFTRESET_6348_USBH_MASK
+#define BCM6348_RESET_USBD      SOFTRESET_6348_USBS_MASK
+#define BCM6348_RESET_DSL       SOFTRESET_6348_ADSL_MASK
+#define BCM6348_RESET_SAR       SOFTRESET_6348_SAR_MASK
+#define BCM6348_RESET_EPHY      0
+#define BCM6348_RESET_ENETSW    0
+#define BCM6348_RESET_PCM       0
+#define BCM6348_RESET_MPI       0
+#define BCM6348_RESET_PCIE      0
+#define BCM6348_RESET_PCIE_EXT  0
+
+#define BCM6358_RESET_SPI       SOFTRESET_6358_SPI_MASK
+#define BCM6358_RESET_ENET      SOFTRESET_6358_ENET_MASK
+#define BCM6358_RESET_USBH      SOFTRESET_6358_USBH_MASK
+#define BCM6358_RESET_USBD      0
+#define BCM6358_RESET_DSL       SOFTRESET_6358_ADSL_MASK
+#define BCM6358_RESET_SAR       SOFTRESET_6358_SAR_MASK
+#define BCM6358_RESET_EPHY      SOFTRESET_6358_EPHY_MASK
+#define BCM6358_RESET_ENETSW    0
+#define BCM6358_RESET_PCM       SOFTRESET_6358_PCM_MASK
+#define BCM6358_RESET_MPI       SOFTRESET_6358_MPI_MASK
+#define BCM6358_RESET_PCIE      0
+#define BCM6358_RESET_PCIE_EXT  0
+
+#define BCM6368_RESET_SPI       SOFTRESET_6368_SPI_MASK
+#define BCM6368_RESET_ENET      0
+#define BCM6368_RESET_USBH      SOFTRESET_6368_USBH_MASK
+#define BCM6368_RESET_USBD      SOFTRESET_6368_USBS_MASK
+#define BCM6368_RESET_DSL       0
+#define BCM6368_RESET_SAR       SOFTRESET_6368_SAR_MASK
+#define BCM6368_RESET_EPHY      SOFTRESET_6368_EPHY_MASK
+#define BCM6368_RESET_ENETSW    0
+#define BCM6368_RESET_PCM       SOFTRESET_6368_PCM_MASK
+#define BCM6368_RESET_MPI       SOFTRESET_6368_MPI_MASK
+#define BCM6368_RESET_PCIE      0
+#define BCM6368_RESET_PCIE_EXT  0
+
+#ifdef BCMCPU_RUNTIME_DETECT
+
+/*
+ * core reset bits
+ */
+static const u32 bcm6328_reset_bits[] = {
+        __GEN_RESET_BITS_TABLE(6328)
+};
+
+static const u32 bcm6338_reset_bits[] = {
+        __GEN_RESET_BITS_TABLE(6338)
+};
+
+static const u32 bcm6348_reset_bits[] = {
+        __GEN_RESET_BITS_TABLE(6348)
+};
+
+static const u32 bcm6358_reset_bits[] = {
+        __GEN_RESET_BITS_TABLE(6358)
+};
+
+static const u32 bcm6368_reset_bits[] = {
+        __GEN_RESET_BITS_TABLE(6368)
+};
+
+const u32 *bcm63xx_reset_bits;
+static int reset_reg;
+
+static int __init bcm63xx_reset_bits_init(void)
+{
+        if (BCMCPU_IS_6328()) {
+                reset_reg = PERF_SOFTRESET_6328_REG;
+                bcm63xx_reset_bits = bcm6328_reset_bits;
+        } else if (BCMCPU_IS_6338()) {
+                reset_reg = PERF_SOFTRESET_REG;
+                bcm63xx_reset_bits = bcm6338_reset_bits;
+        } else if (BCMCPU_IS_6348()) {
+                reset_reg = PERF_SOFTRESET_REG;
+                bcm63xx_reset_bits = bcm6348_reset_bits;
+        } else if (BCMCPU_IS_6358()) {
+                reset_reg = PERF_SOFTRESET_6358_REG;
+                bcm63xx_reset_bits = bcm6358_reset_bits;
+        } else if (BCMCPU_IS_6368()) {
+                reset_reg = PERF_SOFTRESET_6368_REG;
+                bcm63xx_reset_bits = bcm6368_reset_bits;
+        }
+
+        return 0;
+}
+#else
+
+#ifdef CONFIG_BCM63XX_CPU_6328
+static const u32 bcm63xx_reset_bits[] = {
+        __GEN_RESET_BITS_TABLE(6328)
+};
+#define reset_reg PERF_SOFTRESET_6328_REG
+#endif
+
+#ifdef CONFIG_BCM63XX_CPU_6338
+static const u32 bcm63xx_reset_bits[] = {
+        __GEN_RESET_BITS_TABLE(6338)
+};
+#define reset_reg PERF_SOFTRESET_REG
+#endif
+
+#ifdef CONFIG_BCM63XX_CPU_6345
+static const u32 bcm63xx_reset_bits[] = { };
+#define reset_reg 0
+#endif
+
+#ifdef CONFIG_BCM63XX_CPU_6348
+static const u32 bcm63xx_reset_bits[] = {
+        __GEN_RESET_BITS_TABLE(6348)
+};
+#define reset_reg PERF_SOFTRESET_REG
+#endif
+
+#ifdef CONFIG_BCM63XX_CPU_6358
+static const u32 bcm63xx_reset_bits[] = {
+        __GEN_RESET_BITS_TABLE(6358)
+};
+#define reset_reg PERF_SOFTRESET_6358_REG
+#endif
+
+#ifdef CONFIG_BCM63XX_CPU_6368
+static const u32 bcm63xx_reset_bits[] = {
+        __GEN_RESET_BITS_TABLE(6368)
+};
+#define reset_reg PERF_SOFTRESET_6368_REG
+#endif
+
+static int __init bcm63xx_reset_bits_init(void) { return 0; }
+#endif
+
+static DEFINE_SPINLOCK(reset_mutex);
+
+static void __bcm63xx_core_set_reset(u32 mask, int enable)
+{
+        unsigned long flags;
+        u32 val;
+
+        if (!mask)
+                return;
+
+        spin_lock_irqsave(&reset_mutex, flags);
+        val = bcm_perf_readl(reset_reg);
+
+        if (enable)
+                val &= ~mask;
+        else
+                val |= mask;
+
+        bcm_perf_writel(val, reset_reg);
+        spin_unlock_irqrestore(&reset_mutex, flags);
+}
+
+void bcm63xx_core_set_reset(enum bcm63xx_core_reset core, int reset)
+{
+        __bcm63xx_core_set_reset(bcm63xx_reset_bits[core], reset);
+}
+EXPORT_SYMBOL(bcm63xx_core_set_reset);
+
+postcore_initcall(bcm63xx_reset_bits_init);