9 files changed, 283 insertions, 42 deletions

diff --git a/arch/mips/bcm47xx/Kconfig b/arch/mips/bcm47xx/Kconfig
new file mode 100644
index 000000000000..6210b8d84109
--- /dev/null
+++ b/arch/mips/bcm47xx/Kconfig
@@ -0,0 +1,31 @@
+if BCM47XX
+
+config BCM47XX_SSB
+        bool "SSB Support for Broadcom BCM47XX"
+        select SYS_HAS_CPU_MIPS32_R1
+        select SSB
+        select SSB_DRIVER_MIPS
+        select SSB_DRIVER_EXTIF
+        select SSB_EMBEDDED
+        select SSB_B43_PCI_BRIDGE if PCI
+        select SSB_PCICORE_HOSTMODE if PCI
+        default y
+        help
+         Add support for old Broadcom BCM47xx boards with Sonics Silicon Backplane support.
+
+         This will generate an image with support for SSB and MIPS32 R1 instruction set.
+
+config BCM47XX_BCMA
+        bool "BCMA Support for Broadcom BCM47XX"
+        select SYS_HAS_CPU_MIPS32_R2
+        select BCMA
+        select BCMA_HOST_SOC
+        select BCMA_DRIVER_MIPS
+        select BCMA_DRIVER_PCI_HOSTMODE if PCI
+        default y
+        help
+         Add support for new Broadcom BCM47xx boards with Broadcom specific Advanced Microcontroller Bus.
+
+         This will generate an image with support for BCMA and MIPS32 R2 instruction set.
+
+endif
diff --git a/arch/mips/bcm47xx/Makefile b/arch/mips/bcm47xx/Makefile
index 7465e8a72d9a..4add17349ff9 100644
--- a/arch/mips/bcm47xx/Makefile
+++ b/arch/mips/bcm47xx/Makefile
@@ -3,4 +3,5 @@
 # under Linux.
 #
 
-obj-y := gpio.o irq.o nvram.o prom.o serial.o setup.o time.o wgt634u.o
+obj-y                           += gpio.o irq.o nvram.o prom.o serial.o setup.o time.o
+obj-$(CONFIG_BCM47XX_SSB)       += wgt634u.o
diff --git a/arch/mips/bcm47xx/gpio.c b/arch/mips/bcm47xx/gpio.c
index e4a5ee9c9721..5ebdf62e96bb 100644
--- a/arch/mips/bcm47xx/gpio.c
+++ b/arch/mips/bcm47xx/gpio.c
@@ -6,6 +6,7 @@
  * Copyright (C) 2007 Aurelien Jarno <aurelien@aurel32.net>
  */
 
+#include <linux/export.h>
 #include <linux/ssb/ssb.h>
 #include <linux/ssb/ssb_driver_chipcommon.h>
 #include <linux/ssb/ssb_driver_extif.h>
@@ -20,42 +21,82 @@ static DECLARE_BITMAP(gpio_in_use, BCM47XX_EXTIF_GPIO_LINES);
 
 int gpio_request(unsigned gpio, const char *tag)
 {
-        if (ssb_chipco_available(&ssb_bcm47xx.chipco) &&
-            ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES))
-                return -EINVAL;
+        switch (bcm47xx_bus_type) {
+#ifdef CONFIG_BCM47XX_SSB
+        case BCM47XX_BUS_TYPE_SSB:
+                if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco) &&
+                    ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES))
+                        return -EINVAL;
 
-        if (ssb_extif_available(&ssb_bcm47xx.extif) &&
-            ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES))
-                return -EINVAL;
+                if (ssb_extif_available(&bcm47xx_bus.ssb.extif) &&
+                    ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES))
+                        return -EINVAL;
 
-        if (test_and_set_bit(gpio, gpio_in_use))
-                return -EBUSY;
+                if (test_and_set_bit(gpio, gpio_in_use))
+                        return -EBUSY;
 
-        return 0;
+                return 0;
+#endif
+#ifdef CONFIG_BCM47XX_BCMA
+        case BCM47XX_BUS_TYPE_BCMA:
+                if (gpio >= BCM47XX_CHIPCO_GPIO_LINES)
+                        return -EINVAL;
+
+                if (test_and_set_bit(gpio, gpio_in_use))
+                        return -EBUSY;
+
+                return 0;
+#endif
+        }
+        return -EINVAL;
 }
 EXPORT_SYMBOL(gpio_request);
 
 void gpio_free(unsigned gpio)
 {
-        if (ssb_chipco_available(&ssb_bcm47xx.chipco) &&
-            ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES))
-                return;
+        switch (bcm47xx_bus_type) {
+#ifdef CONFIG_BCM47XX_SSB
+        case BCM47XX_BUS_TYPE_SSB:
+                if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco) &&
+                    ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES))
+                        return;
+
+                if (ssb_extif_available(&bcm47xx_bus.ssb.extif) &&
+                    ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES))
+                        return;
 
-        if (ssb_extif_available(&ssb_bcm47xx.extif) &&
-            ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES))
+                clear_bit(gpio, gpio_in_use);
                 return;
+#endif
+#ifdef CONFIG_BCM47XX_BCMA
+        case BCM47XX_BUS_TYPE_BCMA:
+                if (gpio >= BCM47XX_CHIPCO_GPIO_LINES)
+                        return;
 
-        clear_bit(gpio, gpio_in_use);
+                clear_bit(gpio, gpio_in_use);
+                return;
+#endif
+        }
 }
 EXPORT_SYMBOL(gpio_free);
 
 int gpio_to_irq(unsigned gpio)
 {
-        if (ssb_chipco_available(&ssb_bcm47xx.chipco))
-                return ssb_mips_irq(ssb_bcm47xx.chipco.dev) + 2;
-        else if (ssb_extif_available(&ssb_bcm47xx.extif))
-                return ssb_mips_irq(ssb_bcm47xx.extif.dev) + 2;
-        else
-                return -EINVAL;
+        switch (bcm47xx_bus_type) {
+#ifdef CONFIG_BCM47XX_SSB
+        case BCM47XX_BUS_TYPE_SSB:
+                if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco))
+                        return ssb_mips_irq(bcm47xx_bus.ssb.chipco.dev) + 2;
+                else if (ssb_extif_available(&bcm47xx_bus.ssb.extif))
+                        return ssb_mips_irq(bcm47xx_bus.ssb.extif.dev) + 2;
+                else
+                        return -EINVAL;
+#endif
+#ifdef CONFIG_BCM47XX_BCMA
+        case BCM47XX_BUS_TYPE_BCMA:
+                return bcma_core_mips_irq(bcm47xx_bus.bcma.bus.drv_cc.core) + 2;
+#endif
+        }
+        return -EINVAL;
 }
 EXPORT_SYMBOL_GPL(gpio_to_irq);
diff --git a/arch/mips/bcm47xx/irq.c b/arch/mips/bcm47xx/irq.c
index 325757acd020..8cf3833b2d29 100644
--- a/arch/mips/bcm47xx/irq.c
+++ b/arch/mips/bcm47xx/irq.c
@@ -26,6 +26,7 @@
 #include <linux/interrupt.h>
 #include <linux/irq.h>
 #include <asm/irq_cpu.h>
+#include <bcm47xx.h>
 
 void plat_irq_dispatch(void)
 {
@@ -51,5 +52,16 @@ void plat_irq_dispatch(void)
 
 void __init arch_init_irq(void)
 {
+#ifdef CONFIG_BCM47XX_BCMA
+        if (bcm47xx_bus_type == BCM47XX_BUS_TYPE_BCMA) {
+                bcma_write32(bcm47xx_bus.bcma.bus.drv_mips.core,
+                             BCMA_MIPS_MIPS74K_INTMASK(5), 1 << 31);
+                /*
+                 * the kernel reads the timer irq from some register and thinks
+                 * it's #5, but we offset it by 2 and route to #7
+                 */
+                cp0_compare_irq = 7;
+        }
+#endif
         mips_cpu_irq_init();
 }
diff --git a/arch/mips/bcm47xx/nvram.c b/arch/mips/bcm47xx/nvram.c
index 54db815bc86c..a84e3bb7387f 100644
--- a/arch/mips/bcm47xx/nvram.c
+++ b/arch/mips/bcm47xx/nvram.c
@@ -26,14 +26,35 @@ static char nvram_buf[NVRAM_SPACE];
 /* Probe for NVRAM header */
 static void early_nvram_init(void)
 {
-        struct ssb_mipscore *mcore = &ssb_bcm47xx.mipscore;
+#ifdef CONFIG_BCM47XX_SSB
+        struct ssb_mipscore *mcore_ssb;
+#endif
+#ifdef CONFIG_BCM47XX_BCMA
+        struct bcma_drv_cc *bcma_cc;
+#endif
         struct nvram_header *header;
         int i;
-        u32 base, lim, off;
+        u32 base = 0;
+        u32 lim = 0;
+        u32 off;
         u32 *src, *dst;
 
-        base = mcore->flash_window;
-        lim = mcore->flash_window_size;
+        switch (bcm47xx_bus_type) {
+#ifdef CONFIG_BCM47XX_SSB
+        case BCM47XX_BUS_TYPE_SSB:
+                mcore_ssb = &bcm47xx_bus.ssb.mipscore;
+                base = mcore_ssb->flash_window;
+                lim = mcore_ssb->flash_window_size;
+                break;
+#endif
+#ifdef CONFIG_BCM47XX_BCMA
+        case BCM47XX_BUS_TYPE_BCMA:
+                bcma_cc = &bcm47xx_bus.bcma.bus.drv_cc;
+                base = bcma_cc->pflash.window;
+                lim = bcma_cc->pflash.window_size;
+                break;
+#endif
+        }
 
         off = FLASH_MIN;
         while (off <= lim) {
diff --git a/arch/mips/bcm47xx/serial.c b/arch/mips/bcm47xx/serial.c
index 59c11afdb2ab..57981e4fe2bc 100644
--- a/arch/mips/bcm47xx/serial.c
+++ b/arch/mips/bcm47xx/serial.c
@@ -23,10 +23,11 @@ static struct platform_device uart8250_device = {
         },
 };
 
-static int __init uart8250_init(void)
+#ifdef CONFIG_BCM47XX_SSB
+static int __init uart8250_init_ssb(void)
 {
         int i;
-        struct ssb_mipscore *mcore = &(ssb_bcm47xx.mipscore);
+        struct ssb_mipscore *mcore = &(bcm47xx_bus.ssb.mipscore);
 
         memset(&uart8250_data, 0,  sizeof(uart8250_data));
 
@@ -44,6 +45,47 @@ static int __init uart8250_init(void)
         }
         return platform_device_register(&uart8250_device);
 }
+#endif
+
+#ifdef CONFIG_BCM47XX_BCMA
+static int __init uart8250_init_bcma(void)
+{
+        int i;
+        struct bcma_drv_cc *cc = &(bcm47xx_bus.bcma.bus.drv_cc);
+
+        memset(&uart8250_data, 0,  sizeof(uart8250_data));
+
+        for (i = 0; i < cc->nr_serial_ports; i++) {
+                struct plat_serial8250_port *p = &(uart8250_data[i]);
+                struct bcma_serial_port *bcma_port;
+                bcma_port = &(cc->serial_ports[i]);
+
+                p->mapbase = (unsigned int) bcma_port->regs;
+                p->membase = (void *) bcma_port->regs;
+                p->irq = bcma_port->irq + 2;
+                p->uartclk = bcma_port->baud_base;
+                p->regshift = bcma_port->reg_shift;
+                p->iotype = UPIO_MEM;
+                p->flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ;
+        }
+        return platform_device_register(&uart8250_device);
+}
+#endif
+
+static int __init uart8250_init(void)
+{
+        switch (bcm47xx_bus_type) {
+#ifdef CONFIG_BCM47XX_SSB
+        case BCM47XX_BUS_TYPE_SSB:
+                return uart8250_init_ssb();
+#endif
+#ifdef CONFIG_BCM47XX_BCMA
+        case BCM47XX_BUS_TYPE_BCMA:
+                return uart8250_init_bcma();
+#endif
+        }
+        return -EINVAL;
+}
 
 module_init(uart8250_init);
 
diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c
index cfae81571ded..1cfdda03546a 100644
--- a/arch/mips/bcm47xx/setup.c
+++ b/arch/mips/bcm47xx/setup.c
@@ -26,24 +26,40 @@
  *  675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
+#include <linux/export.h>
 #include <linux/types.h>
 #include <linux/ssb/ssb.h>
 #include <linux/ssb/ssb_embedded.h>
+#include <linux/bcma/bcma_soc.h>
 #include <asm/bootinfo.h>
 #include <asm/reboot.h>
 #include <asm/time.h>
 #include <bcm47xx.h>
 #include <asm/mach-bcm47xx/nvram.h>
 
-struct ssb_bus ssb_bcm47xx;
-EXPORT_SYMBOL(ssb_bcm47xx);
+union bcm47xx_bus bcm47xx_bus;
+EXPORT_SYMBOL(bcm47xx_bus);
+
+enum bcm47xx_bus_type bcm47xx_bus_type;
+EXPORT_SYMBOL(bcm47xx_bus_type);
 
 static void bcm47xx_machine_restart(char *command)
 {
         printk(KERN_ALERT "Please stand by while rebooting the system...\n");
         local_irq_disable();
         /* Set the watchdog timer to reset immediately */
-        ssb_watchdog_timer_set(&ssb_bcm47xx, 1);
+        switch (bcm47xx_bus_type) {
+#ifdef CONFIG_BCM47XX_SSB
+        case BCM47XX_BUS_TYPE_SSB:
+                ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 1);
+                break;
+#endif
+#ifdef CONFIG_BCM47XX_BCMA
+        case BCM47XX_BUS_TYPE_BCMA:
+                bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 1);
+                break;
+#endif
+        }
         while (1)
                 cpu_relax();
 }
@@ -52,11 +68,23 @@ static void bcm47xx_machine_halt(void)
 {
         /* Disable interrupts and watchdog and spin forever */
         local_irq_disable();
-        ssb_watchdog_timer_set(&ssb_bcm47xx, 0);
+        switch (bcm47xx_bus_type) {
+#ifdef CONFIG_BCM47XX_SSB
+        case BCM47XX_BUS_TYPE_SSB:
+                ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0);
+                break;
+#endif
+#ifdef CONFIG_BCM47XX_BCMA
+        case BCM47XX_BUS_TYPE_BCMA:
+                bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 0);
+                break;
+#endif
+        }
         while (1)
                 cpu_relax();
 }
 
+#ifdef CONFIG_BCM47XX_SSB
 #define READ_FROM_NVRAM(_outvar, name, buf) \
         if (nvram_getprefix(prefix, name, buf, sizeof(buf)) >= 0)\
                 sprom->_outvar = simple_strtoul(buf, NULL, 0);
@@ -247,7 +275,7 @@ static int bcm47xx_get_invariants(struct ssb_bus *bus,
         return 0;
 }
 
-void __init plat_mem_setup(void)
+static void __init bcm47xx_register_ssb(void)
 {
         int err;
         char buf[100];
@@ -258,12 +286,12 @@ void __init plat_mem_setup(void)
                 printk(KERN_WARNING "bcm47xx: someone else already registered"
                         " a ssb SPROM callback handler (err %d)\n", err);
 
-        err = ssb_bus_ssbbus_register(&ssb_bcm47xx, SSB_ENUM_BASE,
+        err = ssb_bus_ssbbus_register(&(bcm47xx_bus.ssb), SSB_ENUM_BASE,
                                       bcm47xx_get_invariants);
         if (err)
                 panic("Failed to initialize SSB bus (err %d)\n", err);
 
-        mcore = &ssb_bcm47xx.mipscore;
+        mcore = &bcm47xx_bus.ssb.mipscore;
         if (nvram_getenv("kernel_args", buf, sizeof(buf)) >= 0) {
                 if (strstr(buf, "console=ttyS1")) {
                         struct ssb_serial_port port;
@@ -276,8 +304,57 @@ void __init plat_mem_setup(void)
                         memcpy(&mcore->serial_ports[1], &port, sizeof(port));
                 }
         }
+}
+#endif
+
+#ifdef CONFIG_BCM47XX_BCMA
+static void __init bcm47xx_register_bcma(void)
+{
+        int err;
+
+        err = bcma_host_soc_register(&bcm47xx_bus.bcma);
+        if (err)
+                panic("Failed to initialize BCMA bus (err %d)\n", err);
+}
+#endif
+
+void __init plat_mem_setup(void)
+{
+        struct cpuinfo_mips *c = &current_cpu_data;
+
+        if (c->cputype == CPU_74K) {
+                printk(KERN_INFO "bcm47xx: using bcma bus\n");
+#ifdef CONFIG_BCM47XX_BCMA
+                bcm47xx_bus_type = BCM47XX_BUS_TYPE_BCMA;
+                bcm47xx_register_bcma();
+#endif
+        } else {
+                printk(KERN_INFO "bcm47xx: using ssb bus\n");
+#ifdef CONFIG_BCM47XX_SSB
+                bcm47xx_bus_type = BCM47XX_BUS_TYPE_SSB;
+                bcm47xx_register_ssb();
+#endif
+        }
 
         _machine_restart = bcm47xx_machine_restart;
         _machine_halt = bcm47xx_machine_halt;
         pm_power_off = bcm47xx_machine_halt;
 }
+
+static int __init bcm47xx_register_bus_complete(void)
+{
+        switch (bcm47xx_bus_type) {
+#ifdef CONFIG_BCM47XX_SSB
+        case BCM47XX_BUS_TYPE_SSB:
+                /* Nothing to do */
+                break;
+#endif
+#ifdef CONFIG_BCM47XX_BCMA
+        case BCM47XX_BUS_TYPE_BCMA:
+                bcma_bus_register(&bcm47xx_bus.bcma.bus);
+                break;
+#endif
+        }
+        return 0;
+}
+device_initcall(bcm47xx_register_bus_complete);
diff --git a/arch/mips/bcm47xx/time.c b/arch/mips/bcm47xx/time.c
index 0c6f47b3fd94..536374dcba78 100644
--- a/arch/mips/bcm47xx/time.c
+++ b/arch/mips/bcm47xx/time.c
@@ -30,7 +30,7 @@
 
 void __init plat_time_init(void)
 {
-        unsigned long hz;
+        unsigned long hz = 0;
 
         /*
          * Use deterministic values for initial counter interrupt
@@ -39,7 +39,19 @@ void __init plat_time_init(void)
         write_c0_count(0);
         write_c0_compare(0xffff);
 
-        hz = ssb_cpu_clock(&ssb_bcm47xx.mipscore) / 2;
+        switch (bcm47xx_bus_type) {
+#ifdef CONFIG_BCM47XX_SSB
+        case BCM47XX_BUS_TYPE_SSB:
+                hz = ssb_cpu_clock(&bcm47xx_bus.ssb.mipscore) / 2;
+                break;
+#endif
+#ifdef CONFIG_BCM47XX_BCMA
+        case BCM47XX_BUS_TYPE_BCMA:
+                hz = bcma_cpu_clock(&bcm47xx_bus.bcma.bus.drv_mips) / 2;
+                break;
+#endif
+        }
+
         if (!hz)
                 hz = 100000000;
 
diff --git a/arch/mips/bcm47xx/wgt634u.c b/arch/mips/bcm47xx/wgt634u.c
index 74d06965326f..e9f9ec8d443b 100644
--- a/arch/mips/bcm47xx/wgt634u.c
+++ b/arch/mips/bcm47xx/wgt634u.c
@@ -108,7 +108,7 @@ static irqreturn_t gpio_interrupt(int irq, void *ignored)
 
         /* Interrupts are shared, check if the current one is
            a GPIO interrupt. */
-        if (!ssb_chipco_irq_status(&ssb_bcm47xx.chipco,
+        if (!ssb_chipco_irq_status(&bcm47xx_bus.ssb.chipco,
                                    SSB_CHIPCO_IRQ_GPIO))
                 return IRQ_NONE;
 
@@ -132,22 +132,26 @@ static int __init wgt634u_init(void)
          * machine. Use the MAC address as an heuristic. Netgear Inc. has
          * been allocated ranges 00:09:5b:xx:xx:xx and 00:0f:b5:xx:xx:xx.
          */
+        u8 *et0mac;
 
-        u8 *et0mac = ssb_bcm47xx.sprom.et0mac;
+        if (bcm47xx_bus_type != BCM47XX_BUS_TYPE_SSB)
+                return -ENODEV;
+
+        et0mac = bcm47xx_bus.ssb.sprom.et0mac;
 
         if (et0mac[0] == 0x00 &&
             ((et0mac[1] == 0x09 && et0mac[2] == 0x5b) ||
              (et0mac[1] == 0x0f && et0mac[2] == 0xb5))) {
-                struct ssb_mipscore *mcore = &ssb_bcm47xx.mipscore;
+                struct ssb_mipscore *mcore = &bcm47xx_bus.ssb.mipscore;
 
                 printk(KERN_INFO "WGT634U machine detected.\n");
 
                 if (!request_irq(gpio_to_irq(WGT634U_GPIO_RESET),
                                  gpio_interrupt, IRQF_SHARED,
-                                 "WGT634U GPIO", &ssb_bcm47xx.chipco)) {
+                                 "WGT634U GPIO", &bcm47xx_bus.ssb.chipco)) {
                         gpio_direction_input(WGT634U_GPIO_RESET);
                         gpio_intmask(WGT634U_GPIO_RESET, 1);
-                        ssb_chipco_irq_mask(&ssb_bcm47xx.chipco,
+                        ssb_chipco_irq_mask(&bcm47xx_bus.ssb.chipco,
                                             SSB_CHIPCO_IRQ_GPIO,
                                             SSB_CHIPCO_IRQ_GPIO);
                 }