diff options
Diffstat (limited to 'arch/mips/alchemy/devboards/pb1200/board_setup.c')
-rw-r--r-- | arch/mips/alchemy/devboards/pb1200/board_setup.c | 174 |
1 files changed, 0 insertions, 174 deletions
diff --git a/arch/mips/alchemy/devboards/pb1200/board_setup.c b/arch/mips/alchemy/devboards/pb1200/board_setup.c deleted file mode 100644 index 6d06b07c2381..000000000000 --- a/arch/mips/alchemy/devboards/pb1200/board_setup.c +++ /dev/null | |||
@@ -1,174 +0,0 @@ | |||
1 | /* | ||
2 | * | ||
3 | * BRIEF MODULE DESCRIPTION | ||
4 | * Alchemy Pb1200/Db1200 board setup. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | * | ||
11 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED | ||
12 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | ||
13 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN | ||
14 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | ||
15 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | ||
16 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF | ||
17 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | ||
18 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
19 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | ||
20 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
21 | * | ||
22 | * You should have received a copy of the GNU General Public License along | ||
23 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
24 | * 675 Mass Ave, Cambridge, MA 02139, USA. | ||
25 | */ | ||
26 | |||
27 | #include <linux/init.h> | ||
28 | #include <linux/interrupt.h> | ||
29 | #include <linux/sched.h> | ||
30 | |||
31 | #include <asm/mach-au1x00/au1000.h> | ||
32 | #include <asm/mach-db1x00/bcsr.h> | ||
33 | |||
34 | #ifdef CONFIG_MIPS_PB1200 | ||
35 | #include <asm/mach-pb1x00/pb1200.h> | ||
36 | #endif | ||
37 | |||
38 | #ifdef CONFIG_MIPS_DB1200 | ||
39 | #include <asm/mach-db1x00/db1200.h> | ||
40 | #define PB1200_INT_BEGIN DB1200_INT_BEGIN | ||
41 | #define PB1200_INT_END DB1200_INT_END | ||
42 | #endif | ||
43 | |||
44 | #include <prom.h> | ||
45 | |||
46 | const char *get_system_type(void) | ||
47 | { | ||
48 | return "Alchemy Pb1200"; | ||
49 | } | ||
50 | |||
51 | void __init board_setup(void) | ||
52 | { | ||
53 | printk(KERN_INFO "AMD Alchemy Pb1200 Board\n"); | ||
54 | bcsr_init(PB1200_BCSR_PHYS_ADDR, | ||
55 | PB1200_BCSR_PHYS_ADDR + PB1200_BCSR_HEXLED_OFS); | ||
56 | |||
57 | #if 0 | ||
58 | { | ||
59 | u32 pin_func; | ||
60 | |||
61 | /* | ||
62 | * Enable PSC1 SYNC for AC97. Normaly done in audio driver, | ||
63 | * but it is board specific code, so put it here. | ||
64 | */ | ||
65 | pin_func = au_readl(SYS_PINFUNC); | ||
66 | au_sync(); | ||
67 | pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1; | ||
68 | au_writel(pin_func, SYS_PINFUNC); | ||
69 | |||
70 | au_writel(0, (u32)bcsr | 0x10); /* turn off PCMCIA power */ | ||
71 | au_sync(); | ||
72 | } | ||
73 | #endif | ||
74 | |||
75 | #if defined(CONFIG_I2C_AU1550) | ||
76 | { | ||
77 | u32 freq0, clksrc; | ||
78 | u32 pin_func; | ||
79 | |||
80 | /* Select SMBus in CPLD */ | ||
81 | bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC0MUX, 0); | ||
82 | |||
83 | pin_func = au_readl(SYS_PINFUNC); | ||
84 | au_sync(); | ||
85 | pin_func &= ~(SYS_PINFUNC_P0A | SYS_PINFUNC_P0B); | ||
86 | /* Set GPIOs correctly */ | ||
87 | pin_func |= 2 << 17; | ||
88 | au_writel(pin_func, SYS_PINFUNC); | ||
89 | au_sync(); | ||
90 | |||
91 | /* The I2C driver depends on 50 MHz clock */ | ||
92 | freq0 = au_readl(SYS_FREQCTRL0); | ||
93 | au_sync(); | ||
94 | freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1); | ||
95 | freq0 |= 3 << SYS_FC_FRDIV1_BIT; | ||
96 | /* 396 MHz / (3 + 1) * 2 == 49.5 MHz */ | ||
97 | au_writel(freq0, SYS_FREQCTRL0); | ||
98 | au_sync(); | ||
99 | freq0 |= SYS_FC_FE1; | ||
100 | au_writel(freq0, SYS_FREQCTRL0); | ||
101 | au_sync(); | ||
102 | |||
103 | clksrc = au_readl(SYS_CLKSRC); | ||
104 | au_sync(); | ||
105 | clksrc &= ~(SYS_CS_CE0 | SYS_CS_DE0 | SYS_CS_ME0_MASK); | ||
106 | /* Bit 22 is EXTCLK0 for PSC0 */ | ||
107 | clksrc |= SYS_CS_MUX_FQ1 << SYS_CS_ME0_BIT; | ||
108 | au_writel(clksrc, SYS_CLKSRC); | ||
109 | au_sync(); | ||
110 | } | ||
111 | #endif | ||
112 | |||
113 | /* | ||
114 | * The Pb1200 development board uses external MUX for PSC0 to | ||
115 | * support SMB/SPI. bcsr_resets bit 12: 0=SMB 1=SPI | ||
116 | */ | ||
117 | #ifdef CONFIG_I2C_AU1550 | ||
118 | bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC0MUX, 0); | ||
119 | #endif | ||
120 | au_sync(); | ||
121 | } | ||
122 | |||
123 | static int __init pb1200_init_irq(void) | ||
124 | { | ||
125 | /* We have a problem with CPLD rev 3. */ | ||
126 | if (BCSR_WHOAMI_CPLD(bcsr_read(BCSR_WHOAMI)) <= 3) { | ||
127 | printk(KERN_ERR "WARNING!!!\n"); | ||
128 | printk(KERN_ERR "WARNING!!!\n"); | ||
129 | printk(KERN_ERR "WARNING!!!\n"); | ||
130 | printk(KERN_ERR "WARNING!!!\n"); | ||
131 | printk(KERN_ERR "WARNING!!!\n"); | ||
132 | printk(KERN_ERR "WARNING!!!\n"); | ||
133 | printk(KERN_ERR "Pb1200 must be at CPLD rev 4. Please have Pb1200\n"); | ||
134 | printk(KERN_ERR "updated to latest revision. This software will\n"); | ||
135 | printk(KERN_ERR "not work on anything less than CPLD rev 4.\n"); | ||
136 | printk(KERN_ERR "WARNING!!!\n"); | ||
137 | printk(KERN_ERR "WARNING!!!\n"); | ||
138 | printk(KERN_ERR "WARNING!!!\n"); | ||
139 | printk(KERN_ERR "WARNING!!!\n"); | ||
140 | printk(KERN_ERR "WARNING!!!\n"); | ||
141 | printk(KERN_ERR "WARNING!!!\n"); | ||
142 | panic("Game over. Your score is 0."); | ||
143 | } | ||
144 | |||
145 | irq_set_irq_type(AU1200_GPIO7_INT, IRQF_TRIGGER_LOW); | ||
146 | bcsr_init_irq(PB1200_INT_BEGIN, PB1200_INT_END, AU1200_GPIO7_INT); | ||
147 | |||
148 | return 0; | ||
149 | } | ||
150 | arch_initcall(pb1200_init_irq); | ||
151 | |||
152 | |||
153 | int board_au1200fb_panel(void) | ||
154 | { | ||
155 | return (bcsr_read(BCSR_SWITCHES) >> 8) & 0x0f; | ||
156 | } | ||
157 | |||
158 | int board_au1200fb_panel_init(void) | ||
159 | { | ||
160 | /* Apply power */ | ||
161 | bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | | ||
162 | BCSR_BOARD_LCDBL); | ||
163 | /* printk(KERN_DEBUG "board_au1200fb_panel_init()\n"); */ | ||
164 | return 0; | ||
165 | } | ||
166 | |||
167 | int board_au1200fb_panel_shutdown(void) | ||
168 | { | ||
169 | /* Remove power */ | ||
170 | bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | | ||
171 | BCSR_BOARD_LCDBL, 0); | ||
172 | /* printk(KERN_DEBUG "board_au1200fb_panel_shutdown()\n"); */ | ||
173 | return 0; | ||
174 | } | ||