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-rw-r--r--arch/m68k/include/asm/m527xsim.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/m68k/include/asm/m527xsim.h b/arch/m68k/include/asm/m527xsim.h
index 7399968b2efe..59bb776a5e3c 100644
--- a/arch/m68k/include/asm/m527xsim.h
+++ b/arch/m68k/include/asm/m527xsim.h
@@ -38,12 +38,27 @@
38#define MCFINT_UART1 14 /* Interrupt number for UART1 */ 38#define MCFINT_UART1 14 /* Interrupt number for UART1 */
39#define MCFINT_UART2 15 /* Interrupt number for UART2 */ 39#define MCFINT_UART2 15 /* Interrupt number for UART2 */
40#define MCFINT_QSPI 18 /* Interrupt number for QSPI */ 40#define MCFINT_QSPI 18 /* Interrupt number for QSPI */
41#define MCFINT_FECRX0 23 /* Interrupt number for FEC0 */
42#define MCFINT_FECTX0 27 /* Interrupt number for FEC0 */
43#define MCFINT_FECENTC0 29 /* Interrupt number for FEC0 */
41#define MCFINT_PIT1 36 /* Interrupt number for PIT1 */ 44#define MCFINT_PIT1 36 /* Interrupt number for PIT1 */
42 45
46#define MCFINT2_VECBASE 128 /* Vector base number 2 */
47#define MCFINT2_FECRX1 23 /* Interrupt number for FEC1 */
48#define MCFINT2_FECTX1 27 /* Interrupt number for FEC1 */
49#define MCFINT2_FECENTC1 29 /* Interrupt number for FEC1 */
50
43#define MCF_IRQ_UART0 (MCFINT_VECBASE + MCFINT_UART0) 51#define MCF_IRQ_UART0 (MCFINT_VECBASE + MCFINT_UART0)
44#define MCF_IRQ_UART1 (MCFINT_VECBASE + MCFINT_UART1) 52#define MCF_IRQ_UART1 (MCFINT_VECBASE + MCFINT_UART1)
45#define MCF_IRQ_UART2 (MCFINT_VECBASE + MCFINT_UART2) 53#define MCF_IRQ_UART2 (MCFINT_VECBASE + MCFINT_UART2)
46 54
55#define MCF_IRQ_FECRX0 (MCFINT_VECBASE + MCFINT_FECRX0)
56#define MCF_IRQ_FECTX0 (MCFINT_VECBASE + MCFINT_FECTX0)
57#define MCF_IRQ_FECENTC0 (MCFINT_VECBASE + MCFINT_FECENTC0)
58#define MCF_IRQ_FECRX1 (MCFINT2_VECBASE + MCFINT2_FECRX1)
59#define MCF_IRQ_FECTX1 (MCFINT2_VECBASE + MCFINT2_FECTX1)
60#define MCF_IRQ_FECENTC1 (MCFINT2_VECBASE + MCFINT2_FECENTC1)
61
47/* 62/*
48 * SDRAM configuration registers. 63 * SDRAM configuration registers.
49 */ 64 */