diff options
Diffstat (limited to 'arch/ia64/sn/pci/pcibr/pcibr_dma.c')
| -rw-r--r-- | arch/ia64/sn/pci/pcibr/pcibr_dma.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/ia64/sn/pci/pcibr/pcibr_dma.c b/arch/ia64/sn/pci/pcibr/pcibr_dma.c index c659ad5613a0..33def666a664 100644 --- a/arch/ia64/sn/pci/pcibr/pcibr_dma.c +++ b/arch/ia64/sn/pci/pcibr/pcibr_dma.c | |||
| @@ -227,7 +227,7 @@ pcibr_dma_unmap(struct pci_dev *hwdev, dma_addr_t dma_handle, int direction) | |||
| 227 | * after doing the read. For PIC this routine then forces a fake interrupt | 227 | * after doing the read. For PIC this routine then forces a fake interrupt |
| 228 | * on another line, which is logically associated with the slot that the PIO | 228 | * on another line, which is logically associated with the slot that the PIO |
| 229 | * is addressed to. It then spins while watching the memory location that | 229 | * is addressed to. It then spins while watching the memory location that |
| 230 | * the interrupt is targetted to. When the interrupt response arrives, we | 230 | * the interrupt is targeted to. When the interrupt response arrives, we |
| 231 | * are sure that the DMA has landed in memory and it is safe for the driver | 231 | * are sure that the DMA has landed in memory and it is safe for the driver |
| 232 | * to proceed. For TIOCP use the Device(x) Write Request Buffer Flush | 232 | * to proceed. For TIOCP use the Device(x) Write Request Buffer Flush |
| 233 | * Bridge register since it ensures the data has entered the coherence domain, | 233 | * Bridge register since it ensures the data has entered the coherence domain, |