1 files changed, 1 insertions, 17 deletions

diff --git a/arch/avr32/boards/favr-32/setup.c b/arch/avr32/boards/favr-32/setup.c
index ff8235a30ecd..006a04e8bef2 100644
--- a/arch/avr32/boards/favr-32/setup.c
+++ b/arch/avr32/boards/favr-32/setup.c
@@ -307,23 +307,7 @@ static int __init favr32_init(void)
          * Favr-32 uses 32-bit SDRAM interface. Reserve the SDRAM-specific
          * pins so that nobody messes with them.
          */
-        at32_reserve_pin(GPIO_PIN_PE(0));       /* DATA[16]     */
-        at32_reserve_pin(GPIO_PIN_PE(1));       /* DATA[17]     */
-        at32_reserve_pin(GPIO_PIN_PE(2));       /* DATA[18]     */
-        at32_reserve_pin(GPIO_PIN_PE(3));       /* DATA[19]     */
-        at32_reserve_pin(GPIO_PIN_PE(4));       /* DATA[20]     */
-        at32_reserve_pin(GPIO_PIN_PE(5));       /* DATA[21]     */
-        at32_reserve_pin(GPIO_PIN_PE(6));       /* DATA[22]     */
-        at32_reserve_pin(GPIO_PIN_PE(7));       /* DATA[23]     */
-        at32_reserve_pin(GPIO_PIN_PE(8));       /* DATA[24]     */
-        at32_reserve_pin(GPIO_PIN_PE(9));       /* DATA[25]     */
-        at32_reserve_pin(GPIO_PIN_PE(10));      /* DATA[26]     */
-        at32_reserve_pin(GPIO_PIN_PE(11));      /* DATA[27]     */
-        at32_reserve_pin(GPIO_PIN_PE(12));      /* DATA[28]     */
-        at32_reserve_pin(GPIO_PIN_PE(13));      /* DATA[29]     */
-        at32_reserve_pin(GPIO_PIN_PE(14));      /* DATA[30]     */
-        at32_reserve_pin(GPIO_PIN_PE(15));      /* DATA[31]     */
-        at32_reserve_pin(GPIO_PIN_PE(26));      /* SDCS         */
+        at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);
 
         at32_select_gpio(GPIO_PIN_PB(3), 0);    /* IRQ from ADS7843 */