diff options
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-imx/mach-kzm_arm11_01.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-imx/mach-mx31ads.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-imx/mach-mx31lite.c | 2 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/mx31.h | 6 |
4 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/mach-imx/mach-kzm_arm11_01.c b/arch/arm/mach-imx/mach-kzm_arm11_01.c index 5d08533ab2c7..4b9b7aae7a9b 100644 --- a/arch/arm/mach-imx/mach-kzm_arm11_01.c +++ b/arch/arm/mach-imx/mach-kzm_arm11_01.c | |||
@@ -259,13 +259,13 @@ static void __init kzm_board_init(void) | |||
259 | */ | 259 | */ |
260 | static struct map_desc kzm_io_desc[] __initdata = { | 260 | static struct map_desc kzm_io_desc[] __initdata = { |
261 | { | 261 | { |
262 | .virtual = MX31_CS4_BASE_ADDR_VIRT, | 262 | .virtual = (unsigned long)MX31_CS4_BASE_ADDR_VIRT, |
263 | .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR), | 263 | .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR), |
264 | .length = MX31_CS4_SIZE, | 264 | .length = MX31_CS4_SIZE, |
265 | .type = MT_DEVICE | 265 | .type = MT_DEVICE |
266 | }, | 266 | }, |
267 | { | 267 | { |
268 | .virtual = MX31_CS5_BASE_ADDR_VIRT, | 268 | .virtual = (unsigned long)MX31_CS5_BASE_ADDR_VIRT, |
269 | .pfn = __phys_to_pfn(MX31_CS5_BASE_ADDR), | 269 | .pfn = __phys_to_pfn(MX31_CS5_BASE_ADDR), |
270 | .length = MX31_CS5_SIZE, | 270 | .length = MX31_CS5_SIZE, |
271 | .type = MT_DEVICE | 271 | .type = MT_DEVICE |
diff --git a/arch/arm/mach-imx/mach-mx31ads.c b/arch/arm/mach-imx/mach-mx31ads.c index d37f4809c556..e774b07f48d3 100644 --- a/arch/arm/mach-imx/mach-mx31ads.c +++ b/arch/arm/mach-imx/mach-mx31ads.c | |||
@@ -540,7 +540,7 @@ static void __init mxc_init_audio(void) | |||
540 | */ | 540 | */ |
541 | static struct map_desc mx31ads_io_desc[] __initdata = { | 541 | static struct map_desc mx31ads_io_desc[] __initdata = { |
542 | { | 542 | { |
543 | .virtual = MX31_CS4_BASE_ADDR_VIRT, | 543 | .virtual = (unsigned long)MX31_CS4_BASE_ADDR_VIRT, |
544 | .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR), | 544 | .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR), |
545 | .length = CS4_CS8900_MMIO_START, | 545 | .length = CS4_CS8900_MMIO_START, |
546 | .type = MT_DEVICE | 546 | .type = MT_DEVICE |
diff --git a/arch/arm/mach-imx/mach-mx31lite.c b/arch/arm/mach-imx/mach-mx31lite.c index c8785b39eaed..ef57cff5abfb 100644 --- a/arch/arm/mach-imx/mach-mx31lite.c +++ b/arch/arm/mach-imx/mach-mx31lite.c | |||
@@ -207,7 +207,7 @@ static struct platform_device physmap_flash_device = { | |||
207 | */ | 207 | */ |
208 | static struct map_desc mx31lite_io_desc[] __initdata = { | 208 | static struct map_desc mx31lite_io_desc[] __initdata = { |
209 | { | 209 | { |
210 | .virtual = MX31_CS4_BASE_ADDR_VIRT, | 210 | .virtual = (unsigned long)MX31_CS4_BASE_ADDR_VIRT, |
211 | .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR), | 211 | .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR), |
212 | .length = MX31_CS4_SIZE, | 212 | .length = MX31_CS4_SIZE, |
213 | .type = MT_DEVICE | 213 | .type = MT_DEVICE |
diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h index dbced61d9fda..ee9b1f9215df 100644 --- a/arch/arm/plat-mxc/include/mach/mx31.h +++ b/arch/arm/plat-mxc/include/mach/mx31.h | |||
@@ -76,7 +76,7 @@ | |||
76 | #define MX31_RTIC_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0xec000) | 76 | #define MX31_RTIC_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0xec000) |
77 | 77 | ||
78 | #define MX31_ROMP_BASE_ADDR 0x60000000 | 78 | #define MX31_ROMP_BASE_ADDR 0x60000000 |
79 | #define MX31_ROMP_BASE_ADDR_VIRT 0xfc500000 | 79 | #define MX31_ROMP_BASE_ADDR_VIRT IOMEM(0xfc500000) |
80 | #define MX31_ROMP_SIZE SZ_1M | 80 | #define MX31_ROMP_SIZE SZ_1M |
81 | 81 | ||
82 | #define MX31_AVIC_BASE_ADDR 0x68000000 | 82 | #define MX31_AVIC_BASE_ADDR 0x68000000 |
@@ -92,11 +92,11 @@ | |||
92 | #define MX31_CS3_BASE_ADDR 0xb2000000 | 92 | #define MX31_CS3_BASE_ADDR 0xb2000000 |
93 | 93 | ||
94 | #define MX31_CS4_BASE_ADDR 0xb4000000 | 94 | #define MX31_CS4_BASE_ADDR 0xb4000000 |
95 | #define MX31_CS4_BASE_ADDR_VIRT 0xf6000000 | 95 | #define MX31_CS4_BASE_ADDR_VIRT IOMEM(0xf6000000) |
96 | #define MX31_CS4_SIZE SZ_32M | 96 | #define MX31_CS4_SIZE SZ_32M |
97 | 97 | ||
98 | #define MX31_CS5_BASE_ADDR 0xb6000000 | 98 | #define MX31_CS5_BASE_ADDR 0xb6000000 |
99 | #define MX31_CS5_BASE_ADDR_VIRT 0xf8000000 | 99 | #define MX31_CS5_BASE_ADDR_VIRT IOMEM(0xf8000000) |
100 | #define MX31_CS5_SIZE SZ_32M | 100 | #define MX31_CS5_SIZE SZ_32M |
101 | 101 | ||
102 | #define MX31_X_MEMC_BASE_ADDR 0xb8000000 | 102 | #define MX31_X_MEMC_BASE_ADDR 0xb8000000 |