diff options
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-lpc32xx/include/mach/gpio-lpc32xx.h | 50 | ||||
-rw-r--r-- | arch/arm/mach-lpc32xx/include/mach/gpio.h | 52 | ||||
-rw-r--r-- | arch/arm/mach-lpc32xx/phy3250.c | 1 |
3 files changed, 51 insertions, 52 deletions
diff --git a/arch/arm/mach-lpc32xx/include/mach/gpio-lpc32xx.h b/arch/arm/mach-lpc32xx/include/mach/gpio-lpc32xx.h new file mode 100644 index 000000000000..1816e22a3479 --- /dev/null +++ b/arch/arm/mach-lpc32xx/include/mach/gpio-lpc32xx.h | |||
@@ -0,0 +1,50 @@ | |||
1 | /* | ||
2 | * Author: Kevin Wells <kevin.wells@nxp.com> | ||
3 | * | ||
4 | * Copyright (C) 2010 NXP Semiconductors | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | */ | ||
16 | |||
17 | #ifndef __MACH_GPIO_LPC32XX_H | ||
18 | #define __MACH_GPIO_LPC32XX_H | ||
19 | |||
20 | /* | ||
21 | * Note! | ||
22 | * Muxed GP pins need to be setup to the GP state in the board level | ||
23 | * code prior to using this driver. | ||
24 | * GPI pins : 28xP3 group | ||
25 | * GPO pins : 24xP3 group | ||
26 | * GPIO pins: 8xP0 group, 24xP1 group, 13xP2 group, 6xP3 group | ||
27 | */ | ||
28 | |||
29 | #define LPC32XX_GPIO_P0_MAX 8 | ||
30 | #define LPC32XX_GPIO_P1_MAX 24 | ||
31 | #define LPC32XX_GPIO_P2_MAX 13 | ||
32 | #define LPC32XX_GPIO_P3_MAX 6 | ||
33 | #define LPC32XX_GPI_P3_MAX 28 | ||
34 | #define LPC32XX_GPO_P3_MAX 24 | ||
35 | |||
36 | #define LPC32XX_GPIO_P0_GRP 0 | ||
37 | #define LPC32XX_GPIO_P1_GRP (LPC32XX_GPIO_P0_GRP + LPC32XX_GPIO_P0_MAX) | ||
38 | #define LPC32XX_GPIO_P2_GRP (LPC32XX_GPIO_P1_GRP + LPC32XX_GPIO_P1_MAX) | ||
39 | #define LPC32XX_GPIO_P3_GRP (LPC32XX_GPIO_P2_GRP + LPC32XX_GPIO_P2_MAX) | ||
40 | #define LPC32XX_GPI_P3_GRP (LPC32XX_GPIO_P3_GRP + LPC32XX_GPIO_P3_MAX) | ||
41 | #define LPC32XX_GPO_P3_GRP (LPC32XX_GPI_P3_GRP + LPC32XX_GPI_P3_MAX) | ||
42 | |||
43 | /* | ||
44 | * A specific GPIO can be selected with this macro | ||
45 | * ie, GPIO_05 can be selected with LPC32XX_GPIO(LPC32XX_GPIO_P3_GRP, 5) | ||
46 | * See the LPC32x0 User's guide for GPIO group numbers | ||
47 | */ | ||
48 | #define LPC32XX_GPIO(x, y) ((x) + (y)) | ||
49 | |||
50 | #endif /* __MACH_GPIO_LPC32XX_H */ | ||
diff --git a/arch/arm/mach-lpc32xx/include/mach/gpio.h b/arch/arm/mach-lpc32xx/include/mach/gpio.h index 66d31f615eb9..e69de29bb2d1 100644 --- a/arch/arm/mach-lpc32xx/include/mach/gpio.h +++ b/arch/arm/mach-lpc32xx/include/mach/gpio.h | |||
@@ -1,52 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-lpc32xx/include/mach/gpio.h | ||
3 | * | ||
4 | * Author: Kevin Wells <kevin.wells@nxp.com> | ||
5 | * | ||
6 | * Copyright (C) 2010 NXP Semiconductors | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License, or | ||
11 | * (at your option) any later version. | ||
12 | * | ||
13 | * This program is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | */ | ||
18 | |||
19 | #ifndef __ASM_ARCH_GPIO_H | ||
20 | #define __ASM_ARCH_GPIO_H | ||
21 | |||
22 | /* | ||
23 | * Note! | ||
24 | * Muxed GP pins need to be setup to the GP state in the board level | ||
25 | * code prior to using this driver. | ||
26 | * GPI pins : 28xP3 group | ||
27 | * GPO pins : 24xP3 group | ||
28 | * GPIO pins: 8xP0 group, 24xP1 group, 13xP2 group, 6xP3 group | ||
29 | */ | ||
30 | |||
31 | #define LPC32XX_GPIO_P0_MAX 8 | ||
32 | #define LPC32XX_GPIO_P1_MAX 24 | ||
33 | #define LPC32XX_GPIO_P2_MAX 13 | ||
34 | #define LPC32XX_GPIO_P3_MAX 6 | ||
35 | #define LPC32XX_GPI_P3_MAX 28 | ||
36 | #define LPC32XX_GPO_P3_MAX 24 | ||
37 | |||
38 | #define LPC32XX_GPIO_P0_GRP 0 | ||
39 | #define LPC32XX_GPIO_P1_GRP (LPC32XX_GPIO_P0_GRP + LPC32XX_GPIO_P0_MAX) | ||
40 | #define LPC32XX_GPIO_P2_GRP (LPC32XX_GPIO_P1_GRP + LPC32XX_GPIO_P1_MAX) | ||
41 | #define LPC32XX_GPIO_P3_GRP (LPC32XX_GPIO_P2_GRP + LPC32XX_GPIO_P2_MAX) | ||
42 | #define LPC32XX_GPI_P3_GRP (LPC32XX_GPIO_P3_GRP + LPC32XX_GPIO_P3_MAX) | ||
43 | #define LPC32XX_GPO_P3_GRP (LPC32XX_GPI_P3_GRP + LPC32XX_GPI_P3_MAX) | ||
44 | |||
45 | /* | ||
46 | * A specific GPIO can be selected with this macro | ||
47 | * ie, GPIO_05 can be selected with LPC32XX_GPIO(LPC32XX_GPIO_P3_GRP, 5) | ||
48 | * See the LPC32x0 User's guide for GPIO group numbers | ||
49 | */ | ||
50 | #define LPC32XX_GPIO(x, y) ((x) + (y)) | ||
51 | |||
52 | #endif | ||
diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c index 7993b096778e..c3a22fd736aa 100644 --- a/arch/arm/mach-lpc32xx/phy3250.c +++ b/arch/arm/mach-lpc32xx/phy3250.c | |||
@@ -37,6 +37,7 @@ | |||
37 | 37 | ||
38 | #include <mach/hardware.h> | 38 | #include <mach/hardware.h> |
39 | #include <mach/platform.h> | 39 | #include <mach/platform.h> |
40 | #include <mach/gpio-lpc32xx.h> | ||
40 | #include "common.h" | 41 | #include "common.h" |
41 | 42 | ||
42 | /* | 43 | /* |