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-rw-r--r--arch/arm/plat-omap/include/mach/sdrc.h37
1 files changed, 22 insertions, 15 deletions
diff --git a/arch/arm/plat-omap/include/mach/sdrc.h b/arch/arm/plat-omap/include/mach/sdrc.h
index c905b5268e56..8e0740eb83fb 100644
--- a/arch/arm/plat-omap/include/mach/sdrc.h
+++ b/arch/arm/plat-omap/include/mach/sdrc.h
@@ -4,10 +4,12 @@
4/* 4/*
5 * OMAP2/3 SDRC/SMS register definitions 5 * OMAP2/3 SDRC/SMS register definitions
6 * 6 *
7 * Copyright (C) 2007 Texas Instruments, Inc. 7 * Copyright (C) 2007-2008 Texas Instruments, Inc.
8 * Copyright (C) 2007 Nokia Corporation 8 * Copyright (C) 2007-2008 Nokia Corporation
9 * 9 *
10 * Written by Paul Walmsley 10 * Tony Lindgren
11 * Paul Walmsley
12 * Richard Woodruff
11 * 13 *
12 * This program is free software; you can redistribute it and/or modify 14 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as 15 * it under the terms of the GNU General Public License version 2 as
@@ -64,18 +66,25 @@
64 * SMS register access 66 * SMS register access
65 */ 67 */
66 68
67 69#define OMAP242X_SMS_REGADDR(reg) \
68#define OMAP242X_SMS_REGADDR(reg) IO_ADDRESS(OMAP2420_SMS_BASE + reg) 70 (void __iomem *)IO_ADDRESS(OMAP2420_SMS_BASE + reg)
69#define OMAP243X_SMS_REGADDR(reg) IO_ADDRESS(OMAP243X_SMS_BASE + reg) 71#define OMAP243X_SMS_REGADDR(reg) \
70#define OMAP343X_SMS_REGADDR(reg) IO_ADDRESS(OMAP343X_SMS_BASE + reg) 72 (void __iomem *)IO_ADDRESS(OMAP243X_SMS_BASE + reg)
73#define OMAP343X_SMS_REGADDR(reg) \
74 (void __iomem *)IO_ADDRESS(OMAP343X_SMS_BASE + reg)
71 75
72/* SMS register offsets - read/write with sms_{read,write}_reg() */ 76/* SMS register offsets - read/write with sms_{read,write}_reg() */
73 77
74#define SMS_SYSCONFIG 0x010 78#define SMS_SYSCONFIG 0x010
75/* REVISIT: fill in other SMS registers here */ 79/* REVISIT: fill in other SMS registers here */
76 80
81
77#ifndef __ASSEMBLER__ 82#ifndef __ASSEMBLER__
78 83
84void __init omap2_sdrc_init(void);
85
86#ifdef CONFIG_ARCH_OMAP2
87
79struct memory_timings { 88struct memory_timings {
80 u32 m_type; /* ddr = 1, sdr = 0 */ 89 u32 m_type; /* ddr = 1, sdr = 0 */
81 u32 dll_mode; /* use lock mode = 1, unlock mode = 0 */ 90 u32 dll_mode; /* use lock mode = 1, unlock mode = 0 */
@@ -84,15 +93,13 @@ struct memory_timings {
84 u32 base_cs; /* base chip select to use for calculations */ 93 u32 base_cs; /* base chip select to use for calculations */
85}; 94};
86 95
87extern void omap2_init_memory_params(u32 force_lock_to_unlock_mode); 96extern void omap2xxx_sdrc_init_params(u32 force_lock_to_unlock_mode);
88extern u32 omap2_memory_get_slow_dll_ctrl(void);
89extern u32 omap2_memory_get_fast_dll_ctrl(void);
90extern u32 omap2_memory_get_type(void);
91u32 omap2_dll_force_needed(void);
92u32 omap2_reprogram_sdrc(u32 level, u32 force);
93void __init omap2_init_memory(void);
94 97
95#endif 98u32 omap2xxx_sdrc_dll_is_unlocked(void);
99u32 omap2xxx_sdrc_reprogram(u32 level, u32 force);
100
101#endif /* CONFIG_ARCH_OMAP2 */
96 102
103#endif /* __ASSEMBLER__ */
97 104
98#endif 105#endif