1 files changed, 3 insertions, 32 deletions
diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h
index 51f02a9d41a3..cf88b3593fba 100644
--- a/arch/arm/plat-mxc/include/mach/system.h
+++ b/arch/arm/plat-mxc/include/mach/system.h
@@ -17,41 +17,12 @@
 #ifndef __ASM_ARCH_MXC_SYSTEM_H__
 #define __ASM_ARCH_MXC_SYSTEM_H__
-#include <mach/hardware.h>
+extern void (*imx_idle)(void);
-#include <mach/common.h>
-extern void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode);
 static inline void arch_idle(void)
 {
-        /* fix i.MX31 errata TLSbo65953 and i.MX35 errata ENGcm09472 */
+        if (imx_idle != NULL)
-        if (cpu_is_mx31() || cpu_is_mx35()) {
+                (imx_idle)();
-                unsigned long reg = 0;
-                __asm__ __volatile__(
-                        /* disable I and D cache */
-                        "mrc p15, 0, %0, c1, c0, 0\n"
-                        "bic %0, %0, #0x00001000\n"
-                        "bic %0, %0, #0x00000004\n"
-                        "mcr p15, 0, %0, c1, c0, 0\n"
-                        /* invalidate I cache */
-                        "mov %0, #0\n"
-                        "mcr p15, 0, %0, c7, c5, 0\n"
-                        /* clear and invalidate D cache */
-                        "mov %0, #0\n"
-                        "mcr p15, 0, %0, c7, c14, 0\n"
-                        /* WFI */
-                        "mov %0, #0\n"
-                        "mcr p15, 0, %0, c7, c0, 4\n"
-                        "nop\n" "nop\n" "nop\n" "nop\n"
-                        "nop\n" "nop\n" "nop\n"
-                        /* enable I and D cache */
-                        "mrc p15, 0, %0, c1, c0, 0\n"
-                        "orr %0, %0, #0x00001000\n"
-                        "orr %0, %0, #0x00000004\n"
-                        "mcr p15, 0, %0, c1, c0, 0\n"
-                        : "=r" (reg));
-        } else if (cpu_is_mx51())
-                mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
        else
                cpu_do_idle();
 }

diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h index 51f02a9d41a3..cf88b3593fba 100644 --- a/arch/arm/plat-mxc/include/mach/system.h +++ b/arch/arm/plat-mxc/include/mach/system.h
@@ -17,41 +17,12 @@
17	#ifndef __ASM_ARCH_MXC_SYSTEM_H__	17	#ifndef __ASM_ARCH_MXC_SYSTEM_H__
18	#define __ASM_ARCH_MXC_SYSTEM_H__	18	#define __ASM_ARCH_MXC_SYSTEM_H__
19		19
20	#include <mach/hardware.h>	20	extern void (*imx_idle)(void);
21	#include <mach/common.h>
22
23	extern void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode);
24		21
25	static inline void arch_idle(void)	22	static inline void arch_idle(void)
26	{	23	{
27	/* fix i.MX31 errata TLSbo65953 and i.MX35 errata ENGcm09472 */	24	if (imx_idle != NULL)
28	if (cpu_is_mx31() \|\| cpu_is_mx35()) {	25	(imx_idle)();
29	unsigned long reg = 0;
30	__asm__ __volatile__(
31	/* disable I and D cache */
32	"mrc p15, 0, %0, c1, c0, 0\n"
33	"bic %0, %0, #0x00001000\n"
34	"bic %0, %0, #0x00000004\n"
35	"mcr p15, 0, %0, c1, c0, 0\n"
36	/* invalidate I cache */
37	"mov %0, #0\n"
38	"mcr p15, 0, %0, c7, c5, 0\n"
39	/* clear and invalidate D cache */
40	"mov %0, #0\n"
41	"mcr p15, 0, %0, c7, c14, 0\n"
42	/* WFI */
43	"mov %0, #0\n"
44	"mcr p15, 0, %0, c7, c0, 4\n"
45	"nop\n" "nop\n" "nop\n" "nop\n"
46	"nop\n" "nop\n" "nop\n"
47	/* enable I and D cache */
48	"mrc p15, 0, %0, c1, c0, 0\n"
49	"orr %0, %0, #0x00001000\n"
50	"orr %0, %0, #0x00000004\n"
51	"mcr p15, 0, %0, c1, c0, 0\n"
52	: "=r" (reg));
53	} else if (cpu_is_mx51())
54	mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF);
55	else	26	else
56	cpu_do_idle();	27	cpu_do_idle();
57	}	28	}