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-rw-r--r--arch/arm/mach-ux500/include/mach/debug-macro.S19
-rw-r--r--arch/arm/mach-ux500/include/mach/entry-macro.S5
-rw-r--r--arch/arm/mach-ux500/include/mach/hardware.h60
-rw-r--r--arch/arm/mach-ux500/include/mach/setup.h1
4 files changed, 19 insertions, 66 deletions
diff --git a/arch/arm/mach-ux500/include/mach/debug-macro.S b/arch/arm/mach-ux500/include/mach/debug-macro.S
index be7c0f14e310..700fb05ee815 100644
--- a/arch/arm/mach-ux500/include/mach/debug-macro.S
+++ b/arch/arm/mach-ux500/include/mach/debug-macro.S
@@ -14,7 +14,24 @@
14#error Invalid Ux500 debug UART 14#error Invalid Ux500 debug UART
15#endif 15#endif
16 16
17#define __UX500_UART(n) UX500_UART##n##_BASE 17/*
18 * DEBUG_LL only works if only one SOC is built in. We don't use #else below
19 * in order to get "__UX500_UART redefined" warnings if more than one SOC is
20 * built, so that there's some hint during the build that something is wrong.
21 */
22
23#ifdef CONFIG_UX500_SOC_DB5500
24#define __UX500_UART(n) U5500_UART##n##_BASE
25#endif
26
27#ifdef CONFIG_UX500_SOC_DB8500
28#define __UX500_UART(n) U8500_UART##n##_BASE
29#endif
30
31#ifndef __UX500_UART
32#error Unknown SOC
33#endif
34
18#define UX500_UART(n) __UX500_UART(n) 35#define UX500_UART(n) __UX500_UART(n)
19#define UART_BASE UX500_UART(CONFIG_UX500_DEBUG_UART) 36#define UART_BASE UX500_UART(CONFIG_UX500_DEBUG_UART)
20 37
diff --git a/arch/arm/mach-ux500/include/mach/entry-macro.S b/arch/arm/mach-ux500/include/mach/entry-macro.S
index a37f585a3ecb..071bba94f727 100644
--- a/arch/arm/mach-ux500/include/mach/entry-macro.S
+++ b/arch/arm/mach-ux500/include/mach/entry-macro.S
@@ -11,15 +11,10 @@
11 * warranty of any kind, whether express or implied. 11 * warranty of any kind, whether express or implied.
12 */ 12 */
13#include <mach/hardware.h> 13#include <mach/hardware.h>
14#define HAVE_GET_IRQNR_PREAMBLE
15#include <asm/hardware/entry-macro-gic.S> 14#include <asm/hardware/entry-macro-gic.S>
16 15
17 .macro disable_fiq 16 .macro disable_fiq
18 .endm 17 .endm
19 18
20 .macro get_irqnr_preamble, base, tmp
21 ldr \base, =IO_ADDRESS(UX500_GIC_CPU_BASE)
22 .endm
23
24 .macro arch_ret_to_user, tmp1, tmp2 19 .macro arch_ret_to_user, tmp1, tmp2
25 .endm 20 .endm
diff --git a/arch/arm/mach-ux500/include/mach/hardware.h b/arch/arm/mach-ux500/include/mach/hardware.h
index 6295cc581355..bced4a8e16ef 100644
--- a/arch/arm/mach-ux500/include/mach/hardware.h
+++ b/arch/arm/mach-ux500/include/mach/hardware.h
@@ -29,65 +29,6 @@
29#include <mach/db8500-regs.h> 29#include <mach/db8500-regs.h>
30#include <mach/db5500-regs.h> 30#include <mach/db5500-regs.h>
31 31
32#ifdef CONFIG_UX500_SOC_DB8500
33#define UX500(periph) U8500_##periph##_BASE
34#elif defined(CONFIG_UX500_SOC_DB5500)
35#define UX500(periph) U5500_##periph##_BASE
36#endif
37
38#define UX500_BACKUPRAM0_BASE UX500(BACKUPRAM0)
39#define UX500_BACKUPRAM1_BASE UX500(BACKUPRAM1)
40#define UX500_B2R2_BASE UX500(B2R2)
41
42#define UX500_CLKRST1_BASE UX500(CLKRST1)
43#define UX500_CLKRST2_BASE UX500(CLKRST2)
44#define UX500_CLKRST3_BASE UX500(CLKRST3)
45#define UX500_CLKRST5_BASE UX500(CLKRST5)
46#define UX500_CLKRST6_BASE UX500(CLKRST6)
47
48#define UX500_DMA_BASE UX500(DMA)
49#define UX500_FSMC_BASE UX500(FSMC)
50
51#define UX500_GIC_CPU_BASE UX500(GIC_CPU)
52#define UX500_GIC_DIST_BASE UX500(GIC_DIST)
53
54#define UX500_I2C1_BASE UX500(I2C1)
55#define UX500_I2C2_BASE UX500(I2C2)
56#define UX500_I2C3_BASE UX500(I2C3)
57
58#define UX500_L2CC_BASE UX500(L2CC)
59#define UX500_MCDE_BASE UX500(MCDE)
60#define UX500_MTU0_BASE UX500(MTU0)
61#define UX500_MTU1_BASE UX500(MTU1)
62#define UX500_PRCMU_BASE UX500(PRCMU)
63
64#define UX500_RNG_BASE UX500(RNG)
65#define UX500_RTC_BASE UX500(RTC)
66
67#define UX500_SCU_BASE UX500(SCU)
68
69#define UX500_SDI0_BASE UX500(SDI0)
70#define UX500_SDI1_BASE UX500(SDI1)
71#define UX500_SDI2_BASE UX500(SDI2)
72#define UX500_SDI3_BASE UX500(SDI3)
73#define UX500_SDI4_BASE UX500(SDI4)
74
75#define UX500_SPI0_BASE UX500(SPI0)
76#define UX500_SPI1_BASE UX500(SPI1)
77#define UX500_SPI2_BASE UX500(SPI2)
78#define UX500_SPI3_BASE UX500(SPI3)
79
80#define UX500_SIA_BASE UX500(SIA)
81#define UX500_SVA_BASE UX500(SVA)
82
83#define UX500_TWD_BASE UX500(TWD)
84
85#define UX500_UART0_BASE UX500(UART0)
86#define UX500_UART1_BASE UX500(UART1)
87#define UX500_UART2_BASE UX500(UART2)
88
89#define UX500_USBOTG_BASE UX500(USBOTG)
90
91/* ST-Ericsson modified pl022 id */ 32/* ST-Ericsson modified pl022 id */
92#define SSP_PER_ID 0x01080022 33#define SSP_PER_ID 0x01080022
93 34
@@ -143,6 +84,7 @@ static inline bool cpu_is_u5500(void)
143} 84}
144 85
145#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x) 86#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x)
87#define ux500_unknown_soc() BUG()
146 88
147#endif 89#endif
148 90
diff --git a/arch/arm/mach-ux500/include/mach/setup.h b/arch/arm/mach-ux500/include/mach/setup.h
index 469877e0de90..5d8423294d41 100644
--- a/arch/arm/mach-ux500/include/mach/setup.h
+++ b/arch/arm/mach-ux500/include/mach/setup.h
@@ -14,7 +14,6 @@
14#include <asm/mach/time.h> 14#include <asm/mach/time.h>
15#include <linux/init.h> 15#include <linux/init.h>
16 16
17extern void __init ux500_map_io(void);
18extern void __init u5500_map_io(void); 17extern void __init u5500_map_io(void);
19extern void __init u8500_map_io(void); 18extern void __init u8500_map_io(void);
20 19
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-07 13:37:17 -0500