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Diffstat (limited to 'arch/arm/mach-u300/core.c')
-rw-r--r--arch/arm/mach-u300/core.c21
1 files changed, 11 insertions, 10 deletions
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index 33339745d432..03acf1883ec7 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -30,6 +30,7 @@
30#include <linux/pinctrl/consumer.h> 30#include <linux/pinctrl/consumer.h>
31#include <linux/pinctrl/pinconf-generic.h> 31#include <linux/pinctrl/pinconf-generic.h>
32#include <linux/dma-mapping.h> 32#include <linux/dma-mapping.h>
33#include <linux/platform_data/clk-u300.h>
33 34
34#include <asm/types.h> 35#include <asm/types.h>
35#include <asm/setup.h> 36#include <asm/setup.h>
@@ -44,7 +45,6 @@
44#include <mach/dma_channels.h> 45#include <mach/dma_channels.h>
45#include <mach/gpio-u300.h> 46#include <mach/gpio-u300.h>
46 47
47#include "clock.h"
48#include "spi.h" 48#include "spi.h"
49#include "i2c.h" 49#include "i2c.h"
50#include "u300-gpio.h" 50#include "u300-gpio.h"
@@ -1658,12 +1658,20 @@ void __init u300_init_irq(void)
1658 int i; 1658 int i;
1659 1659
1660 /* initialize clocking early, we want to clock the INTCON */ 1660 /* initialize clocking early, we want to clock the INTCON */
1661 u300_clock_init(); 1661 u300_clk_init(U300_SYSCON_VBASE);
1662
1663 /* Bootstrap EMIF and SEMI clocks */
1664 clk = clk_get_sys("pl172", NULL);
1665 BUG_ON(IS_ERR(clk));
1666 clk_prepare_enable(clk);
1667 clk = clk_get_sys("semi", NULL);
1668 BUG_ON(IS_ERR(clk));
1669 clk_prepare_enable(clk);
1662 1670
1663 /* Clock the interrupt controller */ 1671 /* Clock the interrupt controller */
1664 clk = clk_get_sys("intcon", NULL); 1672 clk = clk_get_sys("intcon", NULL);
1665 BUG_ON(IS_ERR(clk)); 1673 BUG_ON(IS_ERR(clk));
1666 clk_enable(clk); 1674 clk_prepare_enable(clk);
1667 1675
1668 for (i = 0; i < U300_VIC_IRQS_END; i++) 1676 for (i = 0; i < U300_VIC_IRQS_END; i++)
1669 set_bit(i, (unsigned long *) &mask[0]); 1677 set_bit(i, (unsigned long *) &mask[0]);
@@ -1811,13 +1819,6 @@ void __init u300_init_devices(void)
1811 /* Check what platform we run and print some status information */ 1819 /* Check what platform we run and print some status information */
1812 u300_init_check_chip(); 1820 u300_init_check_chip();
1813 1821
1814 /* Set system to run at PLL208, max performance, a known state. */
1815 val = readw(U300_SYSCON_VBASE + U300_SYSCON_CCR);
1816 val &= ~U300_SYSCON_CCR_CLKING_PERFORMANCE_MASK;
1817 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR);
1818 /* Wait for the PLL208 to lock if not locked in yet */
1819 while (!(readw(U300_SYSCON_VBASE + U300_SYSCON_CSR) &
1820 U300_SYSCON_CSR_PLL208_LOCK_IND));
1821 /* Initialize SPI device with some board specifics */ 1822 /* Initialize SPI device with some board specifics */
1822 u300_spi_init(&pl022_device); 1823 u300_spi_init(&pl022_device);
1823 1824