diff options
Diffstat (limited to 'arch/arm/mach-tegra/tegra30_clocks_data.c')
-rw-r--r-- | arch/arm/mach-tegra/tegra30_clocks_data.c | 51 |
1 files changed, 49 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/tegra30_clocks_data.c b/arch/arm/mach-tegra/tegra30_clocks_data.c index 3d2e5532a9ea..6942c7add3bb 100644 --- a/arch/arm/mach-tegra/tegra30_clocks_data.c +++ b/arch/arm/mach-tegra/tegra30_clocks_data.c | |||
@@ -711,6 +711,50 @@ static struct clk tegra_clk_sclk = { | |||
711 | .num_parents = ARRAY_SIZE(mux_sclk), | 711 | .num_parents = ARRAY_SIZE(mux_sclk), |
712 | }; | 712 | }; |
713 | 713 | ||
714 | static const char *tegra_hclk_parent_names[] = { | ||
715 | "tegra_sclk", | ||
716 | }; | ||
717 | |||
718 | static struct clk *tegra_hclk_parents[] = { | ||
719 | &tegra_clk_sclk, | ||
720 | }; | ||
721 | |||
722 | static struct clk tegra_hclk; | ||
723 | static struct clk_tegra tegra_hclk_hw = { | ||
724 | .hw = { | ||
725 | .clk = &tegra_hclk, | ||
726 | }, | ||
727 | .flags = DIV_BUS, | ||
728 | .reg = 0x30, | ||
729 | .reg_shift = 4, | ||
730 | .max_rate = 378000000, | ||
731 | .min_rate = 12000000, | ||
732 | }; | ||
733 | DEFINE_CLK_TEGRA(hclk, 0, &tegra30_bus_ops, 0, tegra_hclk_parent_names, | ||
734 | tegra_hclk_parents, &tegra_clk_sclk); | ||
735 | |||
736 | static const char *tegra_pclk_parent_names[] = { | ||
737 | "tegra_hclk", | ||
738 | }; | ||
739 | |||
740 | static struct clk *tegra_pclk_parents[] = { | ||
741 | &tegra_hclk, | ||
742 | }; | ||
743 | |||
744 | static struct clk tegra_pclk; | ||
745 | static struct clk_tegra tegra_pclk_hw = { | ||
746 | .hw = { | ||
747 | .clk = &tegra_pclk, | ||
748 | }, | ||
749 | .flags = DIV_BUS, | ||
750 | .reg = 0x30, | ||
751 | .reg_shift = 0, | ||
752 | .max_rate = 167000000, | ||
753 | .min_rate = 12000000, | ||
754 | }; | ||
755 | DEFINE_CLK_TEGRA(pclk, 0, &tegra30_bus_ops, 0, tegra_pclk_parent_names, | ||
756 | tegra_pclk_parents, &tegra_hclk); | ||
757 | |||
714 | static const char *mux_blink[] = { | 758 | static const char *mux_blink[] = { |
715 | "clk_32k", | 759 | "clk_32k", |
716 | }; | 760 | }; |
@@ -1254,8 +1298,6 @@ struct clk_duplicate tegra_clk_duplicates[] = { | |||
1254 | CLK_DUPLICATE("usbd", "utmip-pad", NULL), | 1298 | CLK_DUPLICATE("usbd", "utmip-pad", NULL), |
1255 | CLK_DUPLICATE("usbd", "tegra-ehci.0", NULL), | 1299 | CLK_DUPLICATE("usbd", "tegra-ehci.0", NULL), |
1256 | CLK_DUPLICATE("usbd", "tegra-otg", NULL), | 1300 | CLK_DUPLICATE("usbd", "tegra-otg", NULL), |
1257 | CLK_DUPLICATE("hdmi", "tegradc.0", "hdmi"), | ||
1258 | CLK_DUPLICATE("hdmi", "tegradc.1", "hdmi"), | ||
1259 | CLK_DUPLICATE("dsib", "tegradc.0", "dsib"), | 1301 | CLK_DUPLICATE("dsib", "tegradc.0", "dsib"), |
1260 | CLK_DUPLICATE("dsia", "tegradc.1", "dsia"), | 1302 | CLK_DUPLICATE("dsia", "tegradc.1", "dsia"), |
1261 | CLK_DUPLICATE("bsev", "tegra-avp", "bsev"), | 1303 | CLK_DUPLICATE("bsev", "tegra-avp", "bsev"), |
@@ -1293,6 +1335,9 @@ struct clk_duplicate tegra_clk_duplicates[] = { | |||
1293 | CLK_DUPLICATE("pll_p_out3", "tegra-i2c.2", "fast-clk"), | 1335 | CLK_DUPLICATE("pll_p_out3", "tegra-i2c.2", "fast-clk"), |
1294 | CLK_DUPLICATE("pll_p_out3", "tegra-i2c.3", "fast-clk"), | 1336 | CLK_DUPLICATE("pll_p_out3", "tegra-i2c.3", "fast-clk"), |
1295 | CLK_DUPLICATE("pll_p_out3", "tegra-i2c.4", "fast-clk"), | 1337 | CLK_DUPLICATE("pll_p_out3", "tegra-i2c.4", "fast-clk"), |
1338 | CLK_DUPLICATE("pll_p", "tegradc.0", "parent"), | ||
1339 | CLK_DUPLICATE("pll_p", "tegradc.1", "parent"), | ||
1340 | CLK_DUPLICATE("pll_d2_out0", "hdmi", "parent"), | ||
1296 | }; | 1341 | }; |
1297 | 1342 | ||
1298 | struct clk *tegra_ptr_clks[] = { | 1343 | struct clk *tegra_ptr_clks[] = { |
@@ -1325,6 +1370,8 @@ struct clk *tegra_ptr_clks[] = { | |||
1325 | &tegra_cml1, | 1370 | &tegra_cml1, |
1326 | &tegra_pciex, | 1371 | &tegra_pciex, |
1327 | &tegra_clk_sclk, | 1372 | &tegra_clk_sclk, |
1373 | &tegra_hclk, | ||
1374 | &tegra_pclk, | ||
1328 | &tegra_clk_blink, | 1375 | &tegra_clk_blink, |
1329 | &tegra30_clk_twd, | 1376 | &tegra30_clk_twd, |
1330 | }; | 1377 | }; |