12 files changed, 86 insertions, 28 deletions

diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 2a1a898c7f90..d669e227e00c 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -11,7 +11,6 @@ config ARCH_OMAP2PLUS_TYPICAL
         select I2C_OMAP
         select MENELAUS if ARCH_OMAP2
         select NEON if ARCH_OMAP3 || ARCH_OMAP4 || SOC_OMAP5
-        select PINCTRL
         select PM_RUNTIME
         select REGULATOR
         select SERIAL_OMAP
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 388c431c745a..d41ab98890ff 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -24,6 +24,7 @@
 #include <linux/input.h>
 #include <linux/gpio_keys.h>
 #include <linux/opp.h>
+#include <linux/cpu.h>
 
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
@@ -444,27 +445,31 @@ static struct omap_board_mux board_mux[] __initdata = {
 };
 #endif
 
-static void __init beagle_opp_init(void)
+static int __init beagle_opp_init(void)
 {
         int r = 0;
 
-        /* Initialize the omap3 opp table */
-        if (omap3_opp_init()) {
+        if (!machine_is_omap3_beagle())
+                return 0;
+
+        /* Initialize the omap3 opp table if not already created. */
+        r = omap3_opp_init();
+        if (IS_ERR_VALUE(r) && (r != -EEXIST)) {
                 pr_err("%s: opp default init failed\n", __func__);
-                return;
+                return r;
         }
 
         /* Custom OPP enabled for all xM versions */
         if (cpu_is_omap3630()) {
                 struct device *mpu_dev, *iva_dev;
 
-                mpu_dev = omap_device_get_by_hwmod_name("mpu");
+                mpu_dev = get_cpu_device(0);
                 iva_dev = omap_device_get_by_hwmod_name("iva");
 
                 if (IS_ERR(mpu_dev) || IS_ERR(iva_dev)) {
                         pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n",
                                 __func__, mpu_dev, iva_dev);
-                        return;
+                        return -ENODEV;
                 }
                 /* Enable MPU 1GHz and lower opps */
                 r = opp_enable(mpu_dev, 800000000);
@@ -484,8 +489,9 @@ static void __init beagle_opp_init(void)
                         opp_disable(iva_dev, 660000000);
                 }
         }
-        return;
+        return 0;
 }
+device_initcall(beagle_opp_init);
 
 static void __init omap3_beagle_init(void)
 {
@@ -522,8 +528,6 @@ static void __init omap3_beagle_init(void)
         /* Ensure SDRC pins are mux'd for self-refresh */
         omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
         omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
-
-        beagle_opp_init();
 }
 
 MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")
diff --git a/arch/arm/mach-omap2/clock33xx_data.c b/arch/arm/mach-omap2/clock33xx_data.c
index 114ab4b8e0e3..1a45d6bd2539 100644
--- a/arch/arm/mach-omap2/clock33xx_data.c
+++ b/arch/arm/mach-omap2/clock33xx_data.c
@@ -1073,6 +1073,8 @@ static struct omap_clk am33xx_clks[] = {
         CLK(NULL,       "gfx_fck_div_ck",       &gfx_fck_div_ck,        CK_AM33XX),
         CLK(NULL,       "sysclkout_pre_ck",     &sysclkout_pre_ck,      CK_AM33XX),
         CLK(NULL,       "clkout2_ck",           &clkout2_ck,    CK_AM33XX),
+        CLK(NULL,       "timer_32k_ck",         &clkdiv32k_ick, CK_AM33XX),
+        CLK(NULL,       "timer_sys_ck",         &sys_clkin_ck,  CK_AM33XX),
 };
 
 int __init am33xx_clk_init(void)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index d661d138f270..6efc30c961a5 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -3294,7 +3294,7 @@ static struct omap_clk omap44xx_clks[] = {
         CLK(NULL,       "auxclk5_src_ck",               &auxclk5_src_ck,        CK_443X),
         CLK(NULL,       "auxclk5_ck",                   &auxclk5_ck,    CK_443X),
         CLK(NULL,       "auxclkreq5_ck",                &auxclkreq5_ck, CK_443X),
-        CLK(NULL,       "gpmc_ck",                      &dummy_ck,      CK_443X),
+        CLK("omap-gpmc",        "fck",                          &dummy_ck,      CK_443X),
         CLK("omap_i2c.1",       "ick",                          &dummy_ck,      CK_443X),
         CLK("omap_i2c.2",       "ick",                          &dummy_ck,      CK_443X),
         CLK("omap_i2c.3",       "ick",                          &dummy_ck,      CK_443X),
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index cbb879139c51..512e79a842cb 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -925,15 +925,18 @@ static int _clkdm_clk_hwmod_enable(struct clockdomain *clkdm)
         if (!clkdm || !arch_clkdm || !arch_clkdm->clkdm_clk_enable)
                 return -EINVAL;
 
+        spin_lock_irqsave(&clkdm->lock, flags);
+
         /*
          * For arch's with no autodeps, clkcm_clk_enable
          * should be called for every clock instance or hwmod that is
          * enabled, so the clkdm can be force woken up.
          */
-        if ((atomic_inc_return(&clkdm->usecount) > 1) && autodeps)
+        if ((atomic_inc_return(&clkdm->usecount) > 1) && autodeps) {
+                spin_unlock_irqrestore(&clkdm->lock, flags);
                 return 0;
+        }
 
-        spin_lock_irqsave(&clkdm->lock, flags);
         arch_clkdm->clkdm_clk_enable(clkdm);
         pwrdm_state_switch(clkdm->pwrdm.ptr);
         spin_unlock_irqrestore(&clkdm->lock, flags);
@@ -950,15 +953,19 @@ static int _clkdm_clk_hwmod_disable(struct clockdomain *clkdm)
         if (!clkdm || !arch_clkdm || !arch_clkdm->clkdm_clk_disable)
                 return -EINVAL;
 
+        spin_lock_irqsave(&clkdm->lock, flags);
+
         if (atomic_read(&clkdm->usecount) == 0) {
+                spin_unlock_irqrestore(&clkdm->lock, flags);
                 WARN_ON(1); /* underflow */
                 return -ERANGE;
         }
 
-        if (atomic_dec_return(&clkdm->usecount) > 0)
+        if (atomic_dec_return(&clkdm->usecount) > 0) {
+                spin_unlock_irqrestore(&clkdm->lock, flags);
                 return 0;
+        }
 
-        spin_lock_irqsave(&clkdm->lock, flags);
         arch_clkdm->clkdm_clk_disable(clkdm);
         pwrdm_state_switch(clkdm->pwrdm.ptr);
         spin_unlock_irqrestore(&clkdm->lock, flags);
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index c8c211731d26..cba60e05e32e 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -341,7 +341,7 @@ static void __init omap_init_dmic(void)
 
         oh = omap_hwmod_lookup("dmic");
         if (!oh) {
-                printk(KERN_ERR "Could not look up mcpdm hw_mod\n");
+                pr_err("Could not look up dmic hw_mod\n");
                 return;
         }
 
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 5ac5cf30406a..92b5718fa722 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -868,9 +868,9 @@ static void __devexit gpmc_mem_exit(void)
 
 }
 
-static void __devinit gpmc_mem_init(void)
+static int __devinit gpmc_mem_init(void)
 {
-        int cs;
+        int cs, rc;
         unsigned long boot_rom_space = 0;
 
         /* never allocate the first page, to facilitate bug detection;
@@ -890,13 +890,21 @@ static void __devinit gpmc_mem_init(void)
                 if (!gpmc_cs_mem_enabled(cs))
                         continue;
                 gpmc_cs_get_memconf(cs, &base, &size);
-                if (gpmc_cs_insert_mem(cs, base, size) < 0)
-                        BUG();
+                rc = gpmc_cs_insert_mem(cs, base, size);
+                if (IS_ERR_VALUE(rc)) {
+                        while (--cs >= 0)
+                                if (gpmc_cs_mem_enabled(cs))
+                                        gpmc_cs_delete_mem(cs);
+                        return rc;
+                }
         }
+
+        return 0;
 }
 
 static __devinit int gpmc_probe(struct platform_device *pdev)
 {
+        int rc;
         u32 l;
         struct resource *res;
 
@@ -936,7 +944,13 @@ static __devinit int gpmc_probe(struct platform_device *pdev)
         dev_info(gpmc_dev, "GPMC revision %d.%d\n", GPMC_REVISION_MAJOR(l),
                  GPMC_REVISION_MINOR(l));
 
-        gpmc_mem_init();
+        rc = gpmc_mem_init();
+        if (IS_ERR_VALUE(rc)) {
+                clk_disable_unprepare(gpmc_l3_clk);
+                clk_put(gpmc_l3_clk);
+                dev_err(gpmc_dev, "failed to reserve memory\n");
+                return rc;
+        }
 
         if (IS_ERR_VALUE(gpmc_setup_irq()))
                 dev_warn(gpmc_dev, "gpmc_setup_irq failed\n");
diff --git a/arch/arm/mach-omap2/mux34xx.c b/arch/arm/mach-omap2/mux34xx.c
index 17f80e4ab162..c47140bbbec4 100644
--- a/arch/arm/mach-omap2/mux34xx.c
+++ b/arch/arm/mach-omap2/mux34xx.c
@@ -614,16 +614,16 @@ static struct omap_mux __initdata omap3_muxmodes[] = {
                 "sys_off_mode", NULL, NULL, NULL,
                 "gpio_9", NULL, NULL, "safe_mode"),
         _OMAP3_MUXENTRY(UART1_CTS, 150,
-                "uart1_cts", NULL, NULL, NULL,
+                "uart1_cts", "ssi1_rdy_tx", NULL, NULL,
                 "gpio_150", "hsusb3_tll_clk", NULL, "safe_mode"),
         _OMAP3_MUXENTRY(UART1_RTS, 149,
-                "uart1_rts", NULL, NULL, NULL,
+                "uart1_rts", "ssi1_flag_tx", NULL, NULL,
                 "gpio_149", NULL, NULL, "safe_mode"),
         _OMAP3_MUXENTRY(UART1_RX, 151,
-                "uart1_rx", NULL, "mcbsp1_clkr", "mcspi4_clk",
+                "uart1_rx", "ss1_wake_tx", "mcbsp1_clkr", "mcspi4_clk",
                 "gpio_151", NULL, NULL, "safe_mode"),
         _OMAP3_MUXENTRY(UART1_TX, 148,
-                "uart1_tx", NULL, NULL, NULL,
+                "uart1_tx", "ssi1_dat_tx", NULL, NULL,
                 "gpio_148", NULL, NULL, "safe_mode"),
         _OMAP3_MUXENTRY(UART2_CTS, 144,
                 "uart2_cts", "mcbsp3_dx", "gpt9_pwm_evt", NULL,
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 686137d164da..67d66131cfa7 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -91,6 +91,7 @@ extern void omap3_save_scratchpad_contents(void);
 
 #define PM_RTA_ERRATUM_i608             (1 << 0)
 #define PM_SDRC_WAKEUP_ERRATUM_i583     (1 << 1)
+#define PM_PER_MEMORIES_ERRATUM_i582    (1 << 2)
 
 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
 extern u16 pm34xx_errata;
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index ba670db1fd37..3a904de4313e 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -652,14 +652,17 @@ static void __init pm_errata_configure(void)
                 /* Enable the l2 cache toggling in sleep logic */
                 enable_omap3630_toggle_l2_on_restore();
                 if (omap_rev() < OMAP3630_REV_ES1_2)
-                        pm34xx_errata |= PM_SDRC_WAKEUP_ERRATUM_i583;
+                        pm34xx_errata |= (PM_SDRC_WAKEUP_ERRATUM_i583 |
+                                          PM_PER_MEMORIES_ERRATUM_i582);
+        } else if (cpu_is_omap34xx()) {
+                pm34xx_errata |= PM_PER_MEMORIES_ERRATUM_i582;
         }
 }
 
 int __init omap3_pm_init(void)
 {
         struct power_state *pwrst, *tmp;
-        struct clockdomain *neon_clkdm, *mpu_clkdm;
+        struct clockdomain *neon_clkdm, *mpu_clkdm, *per_clkdm, *wkup_clkdm;
         int ret;
 
         if (!omap3_has_io_chain_ctrl())
@@ -711,6 +714,8 @@ int __init omap3_pm_init(void)
 
         neon_clkdm = clkdm_lookup("neon_clkdm");
         mpu_clkdm = clkdm_lookup("mpu_clkdm");
+        per_clkdm = clkdm_lookup("per_clkdm");
+        wkup_clkdm = clkdm_lookup("wkup_clkdm");
 
 #ifdef CONFIG_SUSPEND
         omap_pm_suspend = omap3_pm_suspend;
@@ -727,6 +732,27 @@ int __init omap3_pm_init(void)
         if (IS_PM34XX_ERRATUM(PM_RTA_ERRATUM_i608))
                 omap3630_ctrl_disable_rta();
 
+        /*
+         * The UART3/4 FIFO and the sidetone memory in McBSP2/3 are
+         * not correctly reset when the PER powerdomain comes back
+         * from OFF or OSWR when the CORE powerdomain is kept active.
+         * See OMAP36xx Erratum i582 "PER Domain reset issue after
+         * Domain-OFF/OSWR Wakeup".  This wakeup dependency is not a
+         * complete workaround.  The kernel must also prevent the PER
+         * powerdomain from going to OSWR/OFF while the CORE
+         * powerdomain is not going to OSWR/OFF.  And if PER last
+         * power state was off while CORE last power state was ON, the
+         * UART3/4 and McBSP2/3 SIDETONE devices need to run a
+         * self-test using their loopback tests; if that fails, those
+         * devices are unusable until the PER/CORE can complete a transition
+         * from ON to OSWR/OFF and then back to ON.
+         *
+         * XXX Technically this workaround is only needed if off-mode
+         * or OSWR is enabled.
+         */
+        if (IS_PM34XX_ERRATUM(PM_PER_MEMORIES_ERRATUM_i582))
+                clkdm_add_wkdep(per_clkdm, wkup_clkdm);
+
         clkdm_add_wkdep(neon_clkdm, mpu_clkdm);
         if (omap_type() != OMAP2_DEVICE_TYPE_GP) {
                 omap3_secure_ram_storage =
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 0405c8190803..a507cd6cf4f1 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -329,6 +329,11 @@ void __init omap_serial_init_port(struct omap_board_data *bdata,
 
         oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt);
 
+        if (console_uart_id == bdata->id) {
+                omap_device_enable(pdev);
+                pm_runtime_set_active(&pdev->dev);
+        }
+
         oh->dev_attr = uart;
 
         if (((cpu_is_omap34xx() || cpu_is_omap44xx()) && bdata->pads)
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 44f9aa7ec0c0..69e46631a7cd 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -467,7 +467,7 @@ OMAP_SYS_TIMER(3_am33xx)
 #ifdef CONFIG_ARCH_OMAP4
 #ifdef CONFIG_LOCAL_TIMERS
 static DEFINE_TWD_LOCAL_TIMER(twd_local_timer,
-                              OMAP44XX_LOCAL_TWD_BASE, 29 + OMAP_INTC_START);
+                              OMAP44XX_LOCAL_TWD_BASE, 29);
 #endif
 
 static void __init omap4_timer_init(void)