diff options
Diffstat (limited to 'arch/arm/mach-imx')
-rw-r--r-- | arch/arm/mach-imx/clk-imx25.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-imx/clk-imx35.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-imx/mach-armadillo5x0.c | 3 |
3 files changed, 7 insertions, 10 deletions
diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c index fdd8cc87c9fe..d20d4795f4ea 100644 --- a/arch/arm/mach-imx/clk-imx25.c +++ b/arch/arm/mach-imx/clk-imx25.c | |||
@@ -222,10 +222,8 @@ int __init mx25_clocks_init(void) | |||
222 | clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx-fb.0"); | 222 | clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx-fb.0"); |
223 | clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx-fb.0"); | 223 | clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx-fb.0"); |
224 | clk_register_clkdev(clk[wdt_ipg], NULL, "imx2-wdt.0"); | 224 | clk_register_clkdev(clk[wdt_ipg], NULL, "imx2-wdt.0"); |
225 | clk_register_clkdev(clk[ssi1_ipg_per], "per", "imx-ssi.0"); | 225 | clk_register_clkdev(clk[ssi1_ipg], NULL, "imx-ssi.0"); |
226 | clk_register_clkdev(clk[ssi1_ipg], "ipg", "imx-ssi.0"); | 226 | clk_register_clkdev(clk[ssi2_ipg], NULL, "imx-ssi.1"); |
227 | clk_register_clkdev(clk[ssi2_ipg_per], "per", "imx-ssi.1"); | ||
228 | clk_register_clkdev(clk[ssi2_ipg], "ipg", "imx-ssi.1"); | ||
229 | clk_register_clkdev(clk[esdhc1_ipg_per], "per", "sdhci-esdhc-imx25.0"); | 227 | clk_register_clkdev(clk[esdhc1_ipg_per], "per", "sdhci-esdhc-imx25.0"); |
230 | clk_register_clkdev(clk[esdhc1_ipg], "ipg", "sdhci-esdhc-imx25.0"); | 228 | clk_register_clkdev(clk[esdhc1_ipg], "ipg", "sdhci-esdhc-imx25.0"); |
231 | clk_register_clkdev(clk[esdhc1_ahb], "ahb", "sdhci-esdhc-imx25.0"); | 229 | clk_register_clkdev(clk[esdhc1_ahb], "ahb", "sdhci-esdhc-imx25.0"); |
@@ -243,6 +241,6 @@ int __init mx25_clocks_init(void) | |||
243 | clk_register_clkdev(clk[sdma_ahb], "ahb", "imx35-sdma"); | 241 | clk_register_clkdev(clk[sdma_ahb], "ahb", "imx35-sdma"); |
244 | clk_register_clkdev(clk[iim_ipg], "iim", NULL); | 242 | clk_register_clkdev(clk[iim_ipg], "iim", NULL); |
245 | 243 | ||
246 | mxc_timer_init(MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54); | 244 | mxc_timer_init(MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), MX25_INT_GPT1); |
247 | return 0; | 245 | return 0; |
248 | } | 246 | } |
diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c index c6422fb10bae..65fb8bcd86cb 100644 --- a/arch/arm/mach-imx/clk-imx35.c +++ b/arch/arm/mach-imx/clk-imx35.c | |||
@@ -230,10 +230,8 @@ int __init mx35_clocks_init() | |||
230 | clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb"); | 230 | clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb"); |
231 | clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1"); | 231 | clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1"); |
232 | clk_register_clkdev(clk[sdma_gate], NULL, "imx35-sdma"); | 232 | clk_register_clkdev(clk[sdma_gate], NULL, "imx35-sdma"); |
233 | clk_register_clkdev(clk[ipg], "ipg", "imx-ssi.0"); | 233 | clk_register_clkdev(clk[ssi1_gate], NULL, "imx-ssi.0"); |
234 | clk_register_clkdev(clk[ssi1_div_post], "per", "imx-ssi.0"); | 234 | clk_register_clkdev(clk[ssi2_gate], NULL, "imx-ssi.1"); |
235 | clk_register_clkdev(clk[ipg], "ipg", "imx-ssi.1"); | ||
236 | clk_register_clkdev(clk[ssi2_div_post], "per", "imx-ssi.1"); | ||
237 | /* i.mx35 has the i.mx21 type uart */ | 235 | /* i.mx35 has the i.mx21 type uart */ |
238 | clk_register_clkdev(clk[uart1_gate], "per", "imx21-uart.0"); | 236 | clk_register_clkdev(clk[uart1_gate], "per", "imx21-uart.0"); |
239 | clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.0"); | 237 | clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.0"); |
diff --git a/arch/arm/mach-imx/mach-armadillo5x0.c b/arch/arm/mach-imx/mach-armadillo5x0.c index 2c6ab3273f9e..5985ed1b8c98 100644 --- a/arch/arm/mach-imx/mach-armadillo5x0.c +++ b/arch/arm/mach-imx/mach-armadillo5x0.c | |||
@@ -526,7 +526,8 @@ static void __init armadillo5x0_init(void) | |||
526 | imx31_add_mxc_nand(&armadillo5x0_nand_board_info); | 526 | imx31_add_mxc_nand(&armadillo5x0_nand_board_info); |
527 | 527 | ||
528 | /* set NAND page size to 2k if not configured via boot mode pins */ | 528 | /* set NAND page size to 2k if not configured via boot mode pins */ |
529 | __raw_writel(__raw_readl(MXC_CCM_RCSR) | (1 << 30), MXC_CCM_RCSR); | 529 | __raw_writel(__raw_readl(mx3_ccm_base + MXC_CCM_RCSR) | |
530 | (1 << 30), mx3_ccm_base + MXC_CCM_RCSR); | ||
530 | 531 | ||
531 | /* RTC */ | 532 | /* RTC */ |
532 | /* Get RTC IRQ and register the chip */ | 533 | /* Get RTC IRQ and register the chip */ |