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Diffstat (limited to 'arch/arm/mach-imx/mm-imx1.c')
-rw-r--r--arch/arm/mach-imx/mm-imx1.c21
1 files changed, 17 insertions, 4 deletions
diff --git a/arch/arm/mach-imx/mm-imx1.c b/arch/arm/mach-imx/mm-imx1.c
index 729ae0915af8..2e482ba5a0e7 100644
--- a/arch/arm/mach-imx/mm-imx1.c
+++ b/arch/arm/mach-imx/mm-imx1.c
@@ -23,6 +23,9 @@
23 23
24#include <mach/common.h> 24#include <mach/common.h>
25#include <mach/hardware.h> 25#include <mach/hardware.h>
26#include <mach/gpio.h>
27#include <mach/irqs.h>
28#include <mach/iomux-v1.h>
26 29
27static struct map_desc imx_io_desc[] __initdata = { 30static struct map_desc imx_io_desc[] __initdata = {
28 imx_map_entry(MX1, IO, MT_DEVICE), 31 imx_map_entry(MX1, IO, MT_DEVICE),
@@ -30,16 +33,26 @@ static struct map_desc imx_io_desc[] __initdata = {
30 33
31void __init mx1_map_io(void) 34void __init mx1_map_io(void)
32{ 35{
36 iotable_init(imx_io_desc, ARRAY_SIZE(imx_io_desc));
37}
38
39void __init imx1_init_early(void)
40{
33 mxc_set_cpu_type(MXC_CPU_MX1); 41 mxc_set_cpu_type(MXC_CPU_MX1);
34 mxc_arch_reset_init(MX1_IO_ADDRESS(MX1_WDT_BASE_ADDR)); 42 mxc_arch_reset_init(MX1_IO_ADDRESS(MX1_WDT_BASE_ADDR));
35 43 imx_iomuxv1_init(MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR),
36 iotable_init(imx_io_desc, ARRAY_SIZE(imx_io_desc)); 44 MX1_NUM_GPIO_PORT);
37} 45}
38 46
39int imx1_register_gpios(void); 47static struct mxc_gpio_port imx1_gpio_ports[] = {
48 DEFINE_IMX_GPIO_PORT_IRQ(MX1, 0, 1, MX1_GPIO_INT_PORTA),
49 DEFINE_IMX_GPIO_PORT_IRQ(MX1, 1, 2, MX1_GPIO_INT_PORTB),
50 DEFINE_IMX_GPIO_PORT_IRQ(MX1, 2, 3, MX1_GPIO_INT_PORTC),
51 DEFINE_IMX_GPIO_PORT_IRQ(MX1, 3, 4, MX1_GPIO_INT_PORTD),
52};
40 53
41void __init mx1_init_irq(void) 54void __init mx1_init_irq(void)
42{ 55{
43 mxc_init_irq(MX1_IO_ADDRESS(MX1_AVIC_BASE_ADDR)); 56 mxc_init_irq(MX1_IO_ADDRESS(MX1_AVIC_BASE_ADDR));
44 imx1_register_gpios(); 57 mxc_gpio_init(imx1_gpio_ports, ARRAY_SIZE(imx1_gpio_ports));
45} 58}