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-rw-r--r--arch/arm/mach-davinci/dma.c69
-rw-r--r--arch/arm/mach-davinci/include/mach/debug-macro.S58
-rw-r--r--arch/arm/mach-davinci/include/mach/hardware.h2
-rw-r--r--arch/arm/mach-davinci/include/mach/serial.h10
-rw-r--r--arch/arm/mach-davinci/include/mach/uncompress.h30
5 files changed, 65 insertions, 104 deletions
diff --git a/arch/arm/mach-davinci/dma.c b/arch/arm/mach-davinci/dma.c
index 95ce019c9b98..a685e9706b7b 100644
--- a/arch/arm/mach-davinci/dma.c
+++ b/arch/arm/mach-davinci/dma.c
@@ -353,9 +353,10 @@ static int irq2ctlr(int irq)
353 *****************************************************************************/ 353 *****************************************************************************/
354static irqreturn_t dma_irq_handler(int irq, void *data) 354static irqreturn_t dma_irq_handler(int irq, void *data)
355{ 355{
356 int i;
357 int ctlr; 356 int ctlr;
358 unsigned int cnt = 0; 357 u32 sh_ier;
358 u32 sh_ipr;
359 u32 bank;
359 360
360 ctlr = irq2ctlr(irq); 361 ctlr = irq2ctlr(irq);
361 if (ctlr < 0) 362 if (ctlr < 0)
@@ -363,41 +364,39 @@ static irqreturn_t dma_irq_handler(int irq, void *data)
363 364
364 dev_dbg(data, "dma_irq_handler\n"); 365 dev_dbg(data, "dma_irq_handler\n");
365 366
366 if ((edma_shadow0_read_array(ctlr, SH_IPR, 0) == 0) && 367 sh_ipr = edma_shadow0_read_array(ctlr, SH_IPR, 0);
367 (edma_shadow0_read_array(ctlr, SH_IPR, 1) == 0)) 368 if (!sh_ipr) {
368 return IRQ_NONE; 369 sh_ipr = edma_shadow0_read_array(ctlr, SH_IPR, 1);
370 if (!sh_ipr)
371 return IRQ_NONE;
372 sh_ier = edma_shadow0_read_array(ctlr, SH_IER, 1);
373 bank = 1;
374 } else {
375 sh_ier = edma_shadow0_read_array(ctlr, SH_IER, 0);
376 bank = 0;
377 }
369 378
370 while (1) { 379 do {
371 int j; 380 u32 slot;
372 if (edma_shadow0_read_array(ctlr, SH_IPR, 0) & 381 u32 channel;
373 edma_shadow0_read_array(ctlr, SH_IER, 0)) 382
374 j = 0; 383 dev_dbg(data, "IPR%d %08x\n", bank, sh_ipr);
375 else if (edma_shadow0_read_array(ctlr, SH_IPR, 1) & 384
376 edma_shadow0_read_array(ctlr, SH_IER, 1)) 385 slot = __ffs(sh_ipr);
377 j = 1; 386 sh_ipr &= ~(BIT(slot));
378 else 387
379 break; 388 if (sh_ier & BIT(slot)) {
380 dev_dbg(data, "IPR%d %08x\n", j, 389 channel = (bank << 5) | slot;
381 edma_shadow0_read_array(ctlr, SH_IPR, j)); 390 /* Clear the corresponding IPR bits */
382 for (i = 0; i < 32; i++) { 391 edma_shadow0_write_array(ctlr, SH_ICR, bank,
383 int k = (j << 5) + i; 392 BIT(slot));
384 if ((edma_shadow0_read_array(ctlr, SH_IPR, j) & BIT(i)) 393 if (edma_cc[ctlr]->intr_data[channel].callback)
385 && (edma_shadow0_read_array(ctlr, 394 edma_cc[ctlr]->intr_data[channel].callback(
386 SH_IER, j) & BIT(i))) { 395 channel, DMA_COMPLETE,
387 /* Clear the corresponding IPR bits */ 396 edma_cc[ctlr]->intr_data[channel].data);
388 edma_shadow0_write_array(ctlr, SH_ICR, j,
389 BIT(i));
390 if (edma_cc[ctlr]->intr_data[k].callback)
391 edma_cc[ctlr]->intr_data[k].callback(
392 k, DMA_COMPLETE,
393 edma_cc[ctlr]->intr_data[k].
394 data);
395 }
396 } 397 }
397 cnt++; 398 } while (sh_ipr);
398 if (cnt > 10) 399
399 break;
400 }
401 edma_shadow0_write(ctlr, SH_IEVAL, 1); 400 edma_shadow0_write(ctlr, SH_IEVAL, 1);
402 return IRQ_HANDLED; 401 return IRQ_HANDLED;
403} 402}
diff --git a/arch/arm/mach-davinci/include/mach/debug-macro.S b/arch/arm/mach-davinci/include/mach/debug-macro.S
index cf94552d5274..34290d14754b 100644
--- a/arch/arm/mach-davinci/include/mach/debug-macro.S
+++ b/arch/arm/mach-davinci/include/mach/debug-macro.S
@@ -22,46 +22,28 @@
22 22
23#define UART_SHIFT 2 23#define UART_SHIFT 2
24 24
25 .pushsection .data 25#if defined(CONFIG_DEBUG_DAVINCI_DMx_UART0)
26davinci_uart_phys: .word 0 26#define UART_BASE DAVINCI_UART0_BASE
27davinci_uart_virt: .word 0 27#elif defined(CONFIG_DEBUG_DAVINCI_DA8XX_UART0)
28 .popsection 28#define UART_BASE DA8XX_UART0_BASE
29 29#elif defined(CONFIG_DEBUG_DAVINCI_DA8XX_UART1)
30 .macro addruart, rp, rv, tmp 30#define UART_BASE DA8XX_UART1_BASE
31 31#elif defined(CONFIG_DEBUG_DAVINCI_DA8XX_UART2)
32 /* Use davinci_uart_phys/virt if already configured */ 32#define UART_BASE DA8XX_UART2_BASE
3310: adr \rp, 99f @ get effective addr of 99f 33#elif defined(CONFIG_DEBUG_DAVINCI_TNETV107X_UART1)
34 ldr \rv, [\rp] @ get absolute addr of 99f 34#define UART_BASE TNETV107X_UART2_BASE
35 sub \rv, \rv, \rp @ offset between the two 35#define UART_VIRTBASE TNETV107X_UART2_VIRT
36 ldr \rp, [\rp, #4] @ abs addr of omap_uart_phys 36#else
37 sub \tmp, \rp, \rv @ make it effective 37#error "Select a specifc port for DEBUG_LL"
38 ldr \rp, [\tmp, #0] @ davinci_uart_phys 38#endif
39 ldr \rv, [\tmp, #4] @ davinci_uart_virt
40 cmp \rp, #0 @ is port configured?
41 cmpne \rv, #0
42 bne 100f @ already configured
43
44 /* Check the debug UART address set in uncompress.h */
45 and \rp, pc, #0xff000000
46 ldr \rv, =DAVINCI_UART_INFO_OFS
47 add \rp, \rp, \rv
48
49 /* Copy uart phys address from decompressor uart info */
50 ldr \rv, [\rp, #0]
51 str \rv, [\tmp, #0]
52
53 /* Copy uart virt address from decompressor uart info */
54 ldr \rv, [\rp, #4]
55 str \rv, [\tmp, #4]
56
57 b 10b
58 39
59 .align 40#ifndef UART_VIRTBASE
6099: .word . 41#define UART_VIRTBASE IO_ADDRESS(UART_BASE)
61 .word davinci_uart_phys 42#endif
62 .ltorg
63 43
64100: 44 .macro addruart, rp, rv, tmp
45 ldr \rp, =UART_BASE
46 ldr \rv, =UART_VIRTBASE
65 .endm 47 .endm
66 48
67 .macro senduart,rd,rx 49 .macro senduart,rd,rx
diff --git a/arch/arm/mach-davinci/include/mach/hardware.h b/arch/arm/mach-davinci/include/mach/hardware.h
index 2184691ebc2f..16bb42291d39 100644
--- a/arch/arm/mach-davinci/include/mach/hardware.h
+++ b/arch/arm/mach-davinci/include/mach/hardware.h
@@ -22,7 +22,7 @@
22/* 22/*
23 * I/O mapping 23 * I/O mapping
24 */ 24 */
25#define IO_PHYS 0x01c00000UL 25#define IO_PHYS UL(0x01c00000)
26#define IO_OFFSET 0xfd000000 /* Virtual IO = 0xfec00000 */ 26#define IO_OFFSET 0xfd000000 /* Virtual IO = 0xfec00000 */
27#define IO_SIZE 0x00400000 27#define IO_SIZE 0x00400000
28#define IO_VIRT (IO_PHYS + IO_OFFSET) 28#define IO_VIRT (IO_PHYS + IO_OFFSET)
diff --git a/arch/arm/mach-davinci/include/mach/serial.h b/arch/arm/mach-davinci/include/mach/serial.h
index e347d88fef91..46b3cd11c3c2 100644
--- a/arch/arm/mach-davinci/include/mach/serial.h
+++ b/arch/arm/mach-davinci/include/mach/serial.h
@@ -15,16 +15,6 @@
15 15
16#include <mach/hardware.h> 16#include <mach/hardware.h>
17 17
18/*
19 * Stolen area that contains debug uart physical and virtual addresses. These
20 * addresses are filled in by the uncompress.h code, and are used by the debug
21 * macros in debug-macro.S.
22 *
23 * This area sits just below the page tables (see arch/arm/kernel/head.S).
24 * We define it as a relative offset from start of usable RAM.
25 */
26#define DAVINCI_UART_INFO_OFS 0x3ff8
27
28#define DAVINCI_UART0_BASE (IO_PHYS + 0x20000) 18#define DAVINCI_UART0_BASE (IO_PHYS + 0x20000)
29#define DAVINCI_UART1_BASE (IO_PHYS + 0x20400) 19#define DAVINCI_UART1_BASE (IO_PHYS + 0x20400)
30#define DAVINCI_UART2_BASE (IO_PHYS + 0x20800) 20#define DAVINCI_UART2_BASE (IO_PHYS + 0x20800)
diff --git a/arch/arm/mach-davinci/include/mach/uncompress.h b/arch/arm/mach-davinci/include/mach/uncompress.h
index da2fb2c2155a..18cfd4977155 100644
--- a/arch/arm/mach-davinci/include/mach/uncompress.h
+++ b/arch/arm/mach-davinci/include/mach/uncompress.h
@@ -43,37 +43,27 @@ static inline void flush(void)
43 barrier(); 43 barrier();
44} 44}
45 45
46static inline void set_uart_info(u32 phys, void * __iomem virt) 46static inline void set_uart_info(u32 phys)
47{ 47{
48 /*
49 * Get address of some.bss variable and round it down
50 * a la CONFIG_AUTO_ZRELADDR.
51 */
52 u32 ram_start = (u32)&uart & 0xf8000000;
53 u32 *uart_info = (u32 *)(ram_start + DAVINCI_UART_INFO_OFS);
54
55 uart = (u32 *)phys; 48 uart = (u32 *)phys;
56 uart_info[0] = phys;
57 uart_info[1] = (u32)virt;
58} 49}
59 50
60#define _DEBUG_LL_ENTRY(machine, phys, virt) \ 51#define _DEBUG_LL_ENTRY(machine, phys) \
61 if (machine_is_##machine()) { \ 52 { \
62 set_uart_info(phys, virt); \ 53 if (machine_is_##machine()) { \
63 break; \ 54 set_uart_info(phys); \
55 break; \
56 } \
64 } 57 }
65 58
66#define DEBUG_LL_DAVINCI(machine, port) \ 59#define DEBUG_LL_DAVINCI(machine, port) \
67 _DEBUG_LL_ENTRY(machine, DAVINCI_UART##port##_BASE, \ 60 _DEBUG_LL_ENTRY(machine, DAVINCI_UART##port##_BASE)
68 IO_ADDRESS(DAVINCI_UART##port##_BASE))
69 61
70#define DEBUG_LL_DA8XX(machine, port) \ 62#define DEBUG_LL_DA8XX(machine, port) \
71 _DEBUG_LL_ENTRY(machine, DA8XX_UART##port##_BASE, \ 63 _DEBUG_LL_ENTRY(machine, DA8XX_UART##port##_BASE)
72 IO_ADDRESS(DA8XX_UART##port##_BASE))
73 64
74#define DEBUG_LL_TNETV107X(machine, port) \ 65#define DEBUG_LL_TNETV107X(machine, port) \
75 _DEBUG_LL_ENTRY(machine, TNETV107X_UART##port##_BASE, \ 66 _DEBUG_LL_ENTRY(machine, TNETV107X_UART##port##_BASE)
76 TNETV107X_UART##port##_VIRT)
77 67
78static inline void __arch_decomp_setup(unsigned long arch_id) 68static inline void __arch_decomp_setup(unsigned long arch_id)
79{ 69{
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-04 05:55:55 -0500