diff options
-rw-r--r-- | drivers/edac/cpc925_edac.c | 54 | ||||
-rw-r--r-- | drivers/edac/e752x_edac.c | 31 | ||||
-rw-r--r-- | drivers/edac/e7xxx_edac.c | 32 |
3 files changed, 60 insertions, 57 deletions
diff --git a/drivers/edac/cpc925_edac.c b/drivers/edac/cpc925_edac.c index 9488723f8138..3510aa446297 100644 --- a/drivers/edac/cpc925_edac.c +++ b/drivers/edac/cpc925_edac.c | |||
@@ -330,8 +330,9 @@ static void cpc925_init_csrows(struct mem_ctl_info *mci) | |||
330 | struct cpc925_mc_pdata *pdata = mci->pvt_info; | 330 | struct cpc925_mc_pdata *pdata = mci->pvt_info; |
331 | struct csrow_info *csrow; | 331 | struct csrow_info *csrow; |
332 | struct dimm_info *dimm; | 332 | struct dimm_info *dimm; |
333 | enum dev_type dtype; | ||
333 | int index, j; | 334 | int index, j; |
334 | u32 mbmr, mbbar, bba; | 335 | u32 mbmr, mbbar, bba, grain; |
335 | unsigned long row_size, nr_pages, last_nr_pages = 0; | 336 | unsigned long row_size, nr_pages, last_nr_pages = 0; |
336 | 337 | ||
337 | get_total_mem(pdata); | 338 | get_total_mem(pdata); |
@@ -355,37 +356,36 @@ static void cpc925_init_csrows(struct mem_ctl_info *mci) | |||
355 | csrow->last_page = csrow->first_page + nr_pages - 1; | 356 | csrow->last_page = csrow->first_page + nr_pages - 1; |
356 | last_nr_pages = csrow->last_page + 1; | 357 | last_nr_pages = csrow->last_page + 1; |
357 | 358 | ||
359 | switch (csrow->nr_channels) { | ||
360 | case 1: /* Single channel */ | ||
361 | grain = 32; /* four-beat burst of 32 bytes */ | ||
362 | break; | ||
363 | case 2: /* Dual channel */ | ||
364 | default: | ||
365 | grain = 64; /* four-beat burst of 64 bytes */ | ||
366 | break; | ||
367 | } | ||
368 | switch ((mbmr & MBMR_MODE_MASK) >> MBMR_MODE_SHIFT) { | ||
369 | case 6: /* 0110, no way to differentiate X8 VS X16 */ | ||
370 | case 5: /* 0101 */ | ||
371 | case 8: /* 1000 */ | ||
372 | dtype = DEV_X16; | ||
373 | break; | ||
374 | case 7: /* 0111 */ | ||
375 | case 9: /* 1001 */ | ||
376 | dtype = DEV_X8; | ||
377 | break; | ||
378 | default: | ||
379 | dtype = DEV_UNKNOWN; | ||
380 | break; | ||
381 | } | ||
358 | for (j = 0; j < csrow->nr_channels; j++) { | 382 | for (j = 0; j < csrow->nr_channels; j++) { |
359 | dimm = csrow->channels[j].dimm; | 383 | dimm = csrow->channels[j].dimm; |
360 | |||
361 | dimm->nr_pages = nr_pages / csrow->nr_channels; | 384 | dimm->nr_pages = nr_pages / csrow->nr_channels; |
362 | dimm->mtype = MEM_RDDR; | 385 | dimm->mtype = MEM_RDDR; |
363 | dimm->edac_mode = EDAC_SECDED; | 386 | dimm->edac_mode = EDAC_SECDED; |
364 | 387 | dimm->grain = grain; | |
365 | switch (csrow->nr_channels) { | 388 | dimm->dtype = dtype; |
366 | case 1: /* Single channel */ | ||
367 | dimm->grain = 32; /* four-beat burst of 32 bytes */ | ||
368 | break; | ||
369 | case 2: /* Dual channel */ | ||
370 | default: | ||
371 | dimm->grain = 64; /* four-beat burst of 64 bytes */ | ||
372 | break; | ||
373 | } | ||
374 | |||
375 | switch ((mbmr & MBMR_MODE_MASK) >> MBMR_MODE_SHIFT) { | ||
376 | case 6: /* 0110, no way to differentiate X8 VS X16 */ | ||
377 | case 5: /* 0101 */ | ||
378 | case 8: /* 1000 */ | ||
379 | dimm->dtype = DEV_X16; | ||
380 | break; | ||
381 | case 7: /* 0111 */ | ||
382 | case 9: /* 1001 */ | ||
383 | dimm->dtype = DEV_X8; | ||
384 | break; | ||
385 | default: | ||
386 | dimm->dtype = DEV_UNKNOWN; | ||
387 | break; | ||
388 | } | ||
389 | } | 389 | } |
390 | } | 390 | } |
391 | } | 391 | } |
diff --git a/drivers/edac/e752x_edac.c b/drivers/edac/e752x_edac.c index d75660634b43..d1142ed8bd88 100644 --- a/drivers/edac/e752x_edac.c +++ b/drivers/edac/e752x_edac.c | |||
@@ -1069,6 +1069,7 @@ static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, | |||
1069 | u16 ddrcsr) | 1069 | u16 ddrcsr) |
1070 | { | 1070 | { |
1071 | struct csrow_info *csrow; | 1071 | struct csrow_info *csrow; |
1072 | enum edac_type edac_mode; | ||
1072 | unsigned long last_cumul_size; | 1073 | unsigned long last_cumul_size; |
1073 | int index, mem_dev, drc_chan; | 1074 | int index, mem_dev, drc_chan; |
1074 | int drc_drbg; /* DRB granularity 0=64mb, 1=128mb */ | 1075 | int drc_drbg; /* DRB granularity 0=64mb, 1=128mb */ |
@@ -1111,6 +1112,20 @@ static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, | |||
1111 | nr_pages = cumul_size - last_cumul_size; | 1112 | nr_pages = cumul_size - last_cumul_size; |
1112 | last_cumul_size = cumul_size; | 1113 | last_cumul_size = cumul_size; |
1113 | 1114 | ||
1115 | /* | ||
1116 | * if single channel or x8 devices then SECDED | ||
1117 | * if dual channel and x4 then S4ECD4ED | ||
1118 | */ | ||
1119 | if (drc_ddim) { | ||
1120 | if (drc_chan && mem_dev) { | ||
1121 | edac_mode = EDAC_S4ECD4ED; | ||
1122 | mci->edac_cap |= EDAC_FLAG_S4ECD4ED; | ||
1123 | } else { | ||
1124 | edac_mode = EDAC_SECDED; | ||
1125 | mci->edac_cap |= EDAC_FLAG_SECDED; | ||
1126 | } | ||
1127 | } else | ||
1128 | edac_mode = EDAC_NONE; | ||
1114 | for (i = 0; i < csrow->nr_channels; i++) { | 1129 | for (i = 0; i < csrow->nr_channels; i++) { |
1115 | struct dimm_info *dimm = csrow->channels[i].dimm; | 1130 | struct dimm_info *dimm = csrow->channels[i].dimm; |
1116 | 1131 | ||
@@ -1119,21 +1134,7 @@ static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, | |||
1119 | dimm->grain = 1 << 12; /* 4KiB - resolution of CELOG */ | 1134 | dimm->grain = 1 << 12; /* 4KiB - resolution of CELOG */ |
1120 | dimm->mtype = MEM_RDDR; /* only one type supported */ | 1135 | dimm->mtype = MEM_RDDR; /* only one type supported */ |
1121 | dimm->dtype = mem_dev ? DEV_X4 : DEV_X8; | 1136 | dimm->dtype = mem_dev ? DEV_X4 : DEV_X8; |
1122 | 1137 | dimm->edac_mode = edac_mode; | |
1123 | /* | ||
1124 | * if single channel or x8 devices then SECDED | ||
1125 | * if dual channel and x4 then S4ECD4ED | ||
1126 | */ | ||
1127 | if (drc_ddim) { | ||
1128 | if (drc_chan && mem_dev) { | ||
1129 | dimm->edac_mode = EDAC_S4ECD4ED; | ||
1130 | mci->edac_cap |= EDAC_FLAG_S4ECD4ED; | ||
1131 | } else { | ||
1132 | dimm->edac_mode = EDAC_SECDED; | ||
1133 | mci->edac_cap |= EDAC_FLAG_SECDED; | ||
1134 | } | ||
1135 | } else | ||
1136 | dimm->edac_mode = EDAC_NONE; | ||
1137 | } | 1138 | } |
1138 | } | 1139 | } |
1139 | } | 1140 | } |
diff --git a/drivers/edac/e7xxx_edac.c b/drivers/edac/e7xxx_edac.c index b111266dadf3..bab31aab983d 100644 --- a/drivers/edac/e7xxx_edac.c +++ b/drivers/edac/e7xxx_edac.c | |||
@@ -362,6 +362,7 @@ static void e7xxx_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, | |||
362 | int drc_chan, drc_drbg, drc_ddim, mem_dev; | 362 | int drc_chan, drc_drbg, drc_ddim, mem_dev; |
363 | struct csrow_info *csrow; | 363 | struct csrow_info *csrow; |
364 | struct dimm_info *dimm; | 364 | struct dimm_info *dimm; |
365 | enum edac_type edac_mode; | ||
365 | 366 | ||
366 | pci_read_config_dword(pdev, E7XXX_DRA, &dra); | 367 | pci_read_config_dword(pdev, E7XXX_DRA, &dra); |
367 | drc_chan = dual_channel_active(drc, dev_idx); | 368 | drc_chan = dual_channel_active(drc, dev_idx); |
@@ -392,6 +393,21 @@ static void e7xxx_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, | |||
392 | nr_pages = cumul_size - last_cumul_size; | 393 | nr_pages = cumul_size - last_cumul_size; |
393 | last_cumul_size = cumul_size; | 394 | last_cumul_size = cumul_size; |
394 | 395 | ||
396 | /* | ||
397 | * if single channel or x8 devices then SECDED | ||
398 | * if dual channel and x4 then S4ECD4ED | ||
399 | */ | ||
400 | if (drc_ddim) { | ||
401 | if (drc_chan && mem_dev) { | ||
402 | edac_mode = EDAC_S4ECD4ED; | ||
403 | mci->edac_cap |= EDAC_FLAG_S4ECD4ED; | ||
404 | } else { | ||
405 | edac_mode = EDAC_SECDED; | ||
406 | mci->edac_cap |= EDAC_FLAG_SECDED; | ||
407 | } | ||
408 | } else | ||
409 | edac_mode = EDAC_NONE; | ||
410 | |||
395 | for (j = 0; j < drc_chan + 1; j++) { | 411 | for (j = 0; j < drc_chan + 1; j++) { |
396 | dimm = csrow->channels[j].dimm; | 412 | dimm = csrow->channels[j].dimm; |
397 | 413 | ||
@@ -399,21 +415,7 @@ static void e7xxx_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, | |||
399 | dimm->grain = 1 << 12; /* 4KiB - resolution of CELOG */ | 415 | dimm->grain = 1 << 12; /* 4KiB - resolution of CELOG */ |
400 | dimm->mtype = MEM_RDDR; /* only one type supported */ | 416 | dimm->mtype = MEM_RDDR; /* only one type supported */ |
401 | dimm->dtype = mem_dev ? DEV_X4 : DEV_X8; | 417 | dimm->dtype = mem_dev ? DEV_X4 : DEV_X8; |
402 | 418 | dimm->edac_mode = edac_mode; | |
403 | /* | ||
404 | * if single channel or x8 devices then SECDED | ||
405 | * if dual channel and x4 then S4ECD4ED | ||
406 | */ | ||
407 | if (drc_ddim) { | ||
408 | if (drc_chan && mem_dev) { | ||
409 | dimm->edac_mode = EDAC_S4ECD4ED; | ||
410 | mci->edac_cap |= EDAC_FLAG_S4ECD4ED; | ||
411 | } else { | ||
412 | dimm->edac_mode = EDAC_SECDED; | ||
413 | mci->edac_cap |= EDAC_FLAG_SECDED; | ||
414 | } | ||
415 | } else | ||
416 | dimm->edac_mode = EDAC_NONE; | ||
417 | } | 419 | } |
418 | } | 420 | } |
419 | } | 421 | } |