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-rw-r--r--Documentation/devicetree/bindings/arm/omap/timer.txt31
-rw-r--r--arch/arm/boot/dts/am33xx.dtsi54
-rw-r--r--arch/arm/boot/dts/omap2.dtsi85
-rw-r--r--arch/arm/boot/dts/omap2420.dtsi8
-rw-r--r--arch/arm/boot/dts/omap2430.dtsi8
-rw-r--r--arch/arm/boot/dts/omap3.dtsi95
-rw-r--r--arch/arm/boot/dts/omap4.dtsi86
7 files changed, 367 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/omap/timer.txt b/Documentation/devicetree/bindings/arm/omap/timer.txt
new file mode 100644
index 000000000000..8732d4d41f8b
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/omap/timer.txt
@@ -0,0 +1,31 @@
1OMAP Timer bindings
2
3Required properties:
4- compatible: Must be "ti,omap2-timer" for OMAP2+ controllers.
5- reg: Contains timer register address range (base address and
6 length).
7- interrupts: Contains the interrupt information for the timer. The
8 format is being dependent on which interrupt controller
9 the OMAP device uses.
10- ti,hwmods: Name of the hwmod associated to the timer, "timer<X>",
11 where <X> is the instance number of the timer from the
12 HW spec.
13
14Optional properties:
15- ti,timer-alwon: Indicates the timer is in an alway-on power domain.
16- ti,timer-dsp: Indicates the timer can interrupt the on-chip DSP in
17 addition to the ARM CPU.
18- ti,timer-pwm: Indicates the timer can generate a PWM output.
19- ti,timer-secure: Indicates the timer is reserved on a secure OMAP device
20 and therefore cannot be used by the kernel.
21
22Example:
23
24timer12: timer@48304000 {
25 compatible = "ti,omap2-timer";
26 reg = <0x48304000 0x400>;
27 interrupts = <95>;
28 ti,hwmods = "timer12"
29 ti,timer-alwon;
30 ti,timer-secure;
31};
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 470926946ed6..70d24b848c11 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -237,5 +237,59 @@
237 interrupts = <55>; 237 interrupts = <55>;
238 status = "disabled"; 238 status = "disabled";
239 }; 239 };
240
241 timer1: timer@44e31000 {
242 compatible = "ti,omap2-timer";
243 reg = <0x44e31000 0x400>;
244 interrupts = <67>;
245 ti,hwmods = "timer1";
246 ti,timer-alwon;
247 };
248
249 timer2: timer@48040000 {
250 compatible = "ti,omap2-timer";
251 reg = <0x48040000 0x400>;
252 interrupts = <68>;
253 ti,hwmods = "timer2";
254 };
255
256 timer3: timer@48042000 {
257 compatible = "ti,omap2-timer";
258 reg = <0x48042000 0x400>;
259 interrupts = <69>;
260 ti,hwmods = "timer3";
261 };
262
263 timer4: timer@48044000 {
264 compatible = "ti,omap2-timer";
265 reg = <0x48044000 0x400>;
266 interrupts = <92>;
267 ti,hwmods = "timer4";
268 ti,timer-pwm;
269 };
270
271 timer5: timer@48046000 {
272 compatible = "ti,omap2-timer";
273 reg = <0x48046000 0x400>;
274 interrupts = <93>;
275 ti,hwmods = "timer5";
276 ti,timer-pwm;
277 };
278
279 timer6: timer@48048000 {
280 compatible = "ti,omap2-timer";
281 reg = <0x48048000 0x400>;
282 interrupts = <94>;
283 ti,hwmods = "timer6";
284 ti,timer-pwm;
285 };
286
287 timer7: timer@4804a000 {
288 compatible = "ti,omap2-timer";
289 reg = <0x4804a000 0x400>;
290 interrupts = <95>;
291 ti,hwmods = "timer7";
292 ti,timer-pwm;
293 };
240 }; 294 };
241}; 295};
diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi
index f366482216c0..761c4b69b25b 100644
--- a/arch/arm/boot/dts/omap2.dtsi
+++ b/arch/arm/boot/dts/omap2.dtsi
@@ -66,5 +66,90 @@
66 ti,hwmods = "uart3"; 66 ti,hwmods = "uart3";
67 clock-frequency = <48000000>; 67 clock-frequency = <48000000>;
68 }; 68 };
69
70 timer2: timer@4802a000 {
71 compatible = "ti,omap2-timer";
72 reg = <0x4802a000 0x400>;
73 interrupts = <38>;
74 ti,hwmods = "timer2";
75 };
76
77 timer3: timer@48078000 {
78 compatible = "ti,omap2-timer";
79 reg = <0x48078000 0x400>;
80 interrupts = <39>;
81 ti,hwmods = "timer3";
82 };
83
84 timer4: timer@4807a000 {
85 compatible = "ti,omap2-timer";
86 reg = <0x4807a000 0x400>;
87 interrupts = <40>;
88 ti,hwmods = "timer4";
89 };
90
91 timer5: timer@4807c000 {
92 compatible = "ti,omap2-timer";
93 reg = <0x4807c000 0x400>;
94 interrupts = <41>;
95 ti,hwmods = "timer5";
96 ti,timer-dsp;
97 };
98
99 timer6: timer@4807e000 {
100 compatible = "ti,omap2-timer";
101 reg = <0x4807e000 0x400>;
102 interrupts = <42>;
103 ti,hwmods = "timer6";
104 ti,timer-dsp;
105 };
106
107 timer7: timer@48080000 {
108 compatible = "ti,omap2-timer";
109 reg = <0x48080000 0x400>;
110 interrupts = <43>;
111 ti,hwmods = "timer7";
112 ti,timer-dsp;
113 };
114
115 timer8: timer@48082000 {
116 compatible = "ti,omap2-timer";
117 reg = <0x48082000 0x400>;
118 interrupts = <44>;
119 ti,hwmods = "timer8";
120 ti,timer-dsp;
121 };
122
123 timer9: timer@48084000 {
124 compatible = "ti,omap2-timer";
125 reg = <0x48084000 0x400>;
126 interrupts = <45>;
127 ti,hwmods = "timer9";
128 ti,timer-pwm;
129 };
130
131 timer10: timer@48086000 {
132 compatible = "ti,omap2-timer";
133 reg = <0x48086000 0x400>;
134 interrupts = <46>;
135 ti,hwmods = "timer10";
136 ti,timer-pwm;
137 };
138
139 timer11: timer@48088000 {
140 compatible = "ti,omap2-timer";
141 reg = <0x48088000 0x400>;
142 interrupts = <47>;
143 ti,hwmods = "timer11";
144 ti,timer-pwm;
145 };
146
147 timer12: timer@4808a000 {
148 compatible = "ti,omap2-timer";
149 reg = <0x4808a000 0x400>;
150 interrupts = <48>;
151 ti,hwmods = "timer12";
152 ti,timer-pwm;
153 };
69 }; 154 };
70}; 155};
diff --git a/arch/arm/boot/dts/omap2420.dtsi b/arch/arm/boot/dts/omap2420.dtsi
index 4d5ce91416c3..af5ee262d0cf 100644
--- a/arch/arm/boot/dts/omap2420.dtsi
+++ b/arch/arm/boot/dts/omap2420.dtsi
@@ -42,5 +42,13 @@
42 interrupt-names = "tx", "rx"; 42 interrupt-names = "tx", "rx";
43 ti,hwmods = "mcbsp2"; 43 ti,hwmods = "mcbsp2";
44 }; 44 };
45
46 timer1: timer@48028000 {
47 compatible = "ti,omap2-timer";
48 reg = <0x48028000 0x400>;
49 interrupts = <37>;
50 ti,hwmods = "timer1";
51 ti,timer-alwon;
52 };
45 }; 53 };
46}; 54};
diff --git a/arch/arm/boot/dts/omap2430.dtsi b/arch/arm/boot/dts/omap2430.dtsi
index fa845324b642..688729840f14 100644
--- a/arch/arm/boot/dts/omap2430.dtsi
+++ b/arch/arm/boot/dts/omap2430.dtsi
@@ -83,5 +83,13 @@
83 ti,buffer-size = <128>; 83 ti,buffer-size = <128>;
84 ti,hwmods = "mcbsp5"; 84 ti,hwmods = "mcbsp5";
85 }; 85 };
86
87 timer1: timer@49018000 {
88 compatible = "ti,omap2-timer";
89 reg = <0x49018000 0x400>;
90 interrupts = <37>;
91 ti,hwmods = "timer1";
92 ti,timer-alwon;
93 };
86 }; 94 };
87}; 95};
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index fa155418eaad..af9b1822ff84 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -296,5 +296,100 @@
296 ti,buffer-size = <128>; 296 ti,buffer-size = <128>;
297 ti,hwmods = "mcbsp5"; 297 ti,hwmods = "mcbsp5";
298 }; 298 };
299
300 timer1: timer@48318000 {
301 compatible = "ti,omap2-timer";
302 reg = <0x48318000 0x400>;
303 interrupts = <37>;
304 ti,hwmods = "timer1";
305 ti,timer-alwon;
306 };
307
308 timer2: timer@49032000 {
309 compatible = "ti,omap2-timer";
310 reg = <0x49032000 0x400>;
311 interrupts = <38>;
312 ti,hwmods = "timer2";
313 };
314
315 timer3: timer@49034000 {
316 compatible = "ti,omap2-timer";
317 reg = <0x49034000 0x400>;
318 interrupts = <39>;
319 ti,hwmods = "timer3";
320 };
321
322 timer4: timer@49036000 {
323 compatible = "ti,omap2-timer";
324 reg = <0x49036000 0x400>;
325 interrupts = <40>;
326 ti,hwmods = "timer4";
327 };
328
329 timer5: timer@49038000 {
330 compatible = "ti,omap2-timer";
331 reg = <0x49038000 0x400>;
332 interrupts = <41>;
333 ti,hwmods = "timer5";
334 ti,timer-dsp;
335 };
336
337 timer6: timer@4903a000 {
338 compatible = "ti,omap2-timer";
339 reg = <0x4903a000 0x400>;
340 interrupts = <42>;
341 ti,hwmods = "timer6";
342 ti,timer-dsp;
343 };
344
345 timer7: timer@4903c000 {
346 compatible = "ti,omap2-timer";
347 reg = <0x4903c000 0x400>;
348 interrupts = <43>;
349 ti,hwmods = "timer7";
350 ti,timer-dsp;
351 };
352
353 timer8: timer@4903e000 {
354 compatible = "ti,omap2-timer";
355 reg = <0x4903e000 0x400>;
356 interrupts = <44>;
357 ti,hwmods = "timer8";
358 ti,timer-pwm;
359 ti,timer-dsp;
360 };
361
362 timer9: timer@49040000 {
363 compatible = "ti,omap2-timer";
364 reg = <0x49040000 0x400>;
365 interrupts = <45>;
366 ti,hwmods = "timer9";
367 ti,timer-pwm;
368 };
369
370 timer10: timer@48086000 {
371 compatible = "ti,omap2-timer";
372 reg = <0x48086000 0x400>;
373 interrupts = <46>;
374 ti,hwmods = "timer10";
375 ti,timer-pwm;
376 };
377
378 timer11: timer@48088000 {
379 compatible = "ti,omap2-timer";
380 reg = <0x48088000 0x400>;
381 interrupts = <47>;
382 ti,hwmods = "timer11";
383 ti,timer-pwm;
384 };
385
386 timer12: timer@48304000 {
387 compatible = "ti,omap2-timer";
388 reg = <0x48304000 0x400>;
389 interrupts = <95>;
390 ti,hwmods = "timer12";
391 ti,timer-alwon;
392 ti,timer-secure;
393 };
299 }; 394 };
300}; 395};
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 2ab6e68ccbf7..d3a82e0c3804 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -433,5 +433,91 @@
433 ranges; 433 ranges;
434 ti,hwmods = "ocp2scp_usb_phy"; 434 ti,hwmods = "ocp2scp_usb_phy";
435 }; 435 };
436
437 timer1: timer@4a318000 {
438 compatible = "ti,omap2-timer";
439 reg = <0x4a318000 0x80>;
440 interrupts = <0 37 0x4>;
441 ti,hwmods = "timer1";
442 ti,timer-alwon;
443 };
444
445 timer2: timer@48032000 {
446 compatible = "ti,omap2-timer";
447 reg = <0x48032000 0x80>;
448 interrupts = <0 38 0x4>;
449 ti,hwmods = "timer2";
450 };
451
452 timer3: timer@48034000 {
453 compatible = "ti,omap2-timer";
454 reg = <0x48034000 0x80>;
455 interrupts = <0 39 0x4>;
456 ti,hwmods = "timer3";
457 };
458
459 timer4: timer@48036000 {
460 compatible = "ti,omap2-timer";
461 reg = <0x48036000 0x80>;
462 interrupts = <0 40 0x4>;
463 ti,hwmods = "timer4";
464 };
465
466 timer5: timer@49038000 {
467 compatible = "ti,omap2-timer";
468 reg = <0x49038000 0x80>;
469 interrupts = <0 41 0x4>;
470 ti,hwmods = "timer5";
471 ti,timer-dsp;
472 };
473
474 timer6: timer@4903a000 {
475 compatible = "ti,omap2-timer";
476 reg = <0x4903a000 0x80>;
477 interrupts = <0 42 0x4>;
478 ti,hwmods = "timer6";
479 ti,timer-dsp;
480 };
481
482 timer7: timer@4903c000 {
483 compatible = "ti,omap2-timer";
484 reg = <0x4903c000 0x80>;
485 interrupts = <0 43 0x4>;
486 ti,hwmods = "timer7";
487 ti,timer-dsp;
488 };
489
490 timer8: timer@4903e000 {
491 compatible = "ti,omap2-timer";
492 reg = <0x4903e000 0x80>;
493 interrupts = <0 44 0x4>;
494 ti,hwmods = "timer8";
495 ti,timer-pwm;
496 ti,timer-dsp;
497 };
498
499 timer9: timer@4803e000 {
500 compatible = "ti,omap2-timer";
501 reg = <0x4803e000 0x80>;
502 interrupts = <0 45 0x4>;
503 ti,hwmods = "timer9";
504 ti,timer-pwm;
505 };
506
507 timer10: timer@48086000 {
508 compatible = "ti,omap2-timer";
509 reg = <0x48086000 0x80>;
510 interrupts = <0 46 0x4>;
511 ti,hwmods = "timer10";
512 ti,timer-pwm;
513 };
514
515 timer11: timer@48088000 {
516 compatible = "ti,omap2-timer";
517 reg = <0x48088000 0x80>;
518 interrupts = <0 47 0x4>;
519 ti,hwmods = "timer11";
520 ti,timer-pwm;
521 };
436 }; 522 };
437}; 523};