diff options
-rw-r--r-- | arch/x86/include/asm/inat.h | 32 | ||||
-rw-r--r-- | arch/x86/include/asm/insn.h | 43 | ||||
-rw-r--r-- | arch/x86/lib/inat.c | 12 | ||||
-rw-r--r-- | arch/x86/lib/insn.c | 52 | ||||
-rw-r--r-- | arch/x86/lib/x86-opcode-map.txt | 431 | ||||
-rw-r--r-- | arch/x86/tools/gen-insn-attr-x86.awk | 94 |
6 files changed, 431 insertions, 233 deletions
diff --git a/arch/x86/include/asm/inat.h b/arch/x86/include/asm/inat.h index c2487d2aca25..205b063e3e32 100644 --- a/arch/x86/include/asm/inat.h +++ b/arch/x86/include/asm/inat.h | |||
@@ -32,8 +32,8 @@ | |||
32 | 32 | ||
33 | /* Legacy last prefixes */ | 33 | /* Legacy last prefixes */ |
34 | #define INAT_PFX_OPNDSZ 1 /* 0x66 */ /* LPFX1 */ | 34 | #define INAT_PFX_OPNDSZ 1 /* 0x66 */ /* LPFX1 */ |
35 | #define INAT_PFX_REPNE 2 /* 0xF2 */ /* LPFX2 */ | 35 | #define INAT_PFX_REPE 2 /* 0xF3 */ /* LPFX2 */ |
36 | #define INAT_PFX_REPE 3 /* 0xF3 */ /* LPFX3 */ | 36 | #define INAT_PFX_REPNE 3 /* 0xF2 */ /* LPFX3 */ |
37 | /* Other Legacy prefixes */ | 37 | /* Other Legacy prefixes */ |
38 | #define INAT_PFX_LOCK 4 /* 0xF0 */ | 38 | #define INAT_PFX_LOCK 4 /* 0xF0 */ |
39 | #define INAT_PFX_CS 5 /* 0x2E */ | 39 | #define INAT_PFX_CS 5 /* 0x2E */ |
@@ -45,6 +45,9 @@ | |||
45 | #define INAT_PFX_ADDRSZ 11 /* 0x67 */ | 45 | #define INAT_PFX_ADDRSZ 11 /* 0x67 */ |
46 | /* x86-64 REX prefix */ | 46 | /* x86-64 REX prefix */ |
47 | #define INAT_PFX_REX 12 /* 0x4X */ | 47 | #define INAT_PFX_REX 12 /* 0x4X */ |
48 | /* AVX VEX prefixes */ | ||
49 | #define INAT_PFX_VEX2 13 /* 2-bytes VEX prefix */ | ||
50 | #define INAT_PFX_VEX3 14 /* 3-bytes VEX prefix */ | ||
48 | 51 | ||
49 | #define INAT_LSTPFX_MAX 3 | 52 | #define INAT_LSTPFX_MAX 3 |
50 | #define INAT_LGCPFX_MAX 11 | 53 | #define INAT_LGCPFX_MAX 11 |
@@ -84,6 +87,8 @@ | |||
84 | #define INAT_SCNDIMM (1 << (INAT_FLAG_OFFS + 2)) | 87 | #define INAT_SCNDIMM (1 << (INAT_FLAG_OFFS + 2)) |
85 | #define INAT_MOFFSET (1 << (INAT_FLAG_OFFS + 3)) | 88 | #define INAT_MOFFSET (1 << (INAT_FLAG_OFFS + 3)) |
86 | #define INAT_VARIANT (1 << (INAT_FLAG_OFFS + 4)) | 89 | #define INAT_VARIANT (1 << (INAT_FLAG_OFFS + 4)) |
90 | #define INAT_VEXOK (1 << (INAT_FLAG_OFFS + 5)) | ||
91 | #define INAT_VEXONLY (1 << (INAT_FLAG_OFFS + 6)) | ||
87 | /* Attribute making macros for attribute tables */ | 92 | /* Attribute making macros for attribute tables */ |
88 | #define INAT_MAKE_PREFIX(pfx) (pfx << INAT_PFX_OFFS) | 93 | #define INAT_MAKE_PREFIX(pfx) (pfx << INAT_PFX_OFFS) |
89 | #define INAT_MAKE_ESCAPE(esc) (esc << INAT_ESC_OFFS) | 94 | #define INAT_MAKE_ESCAPE(esc) (esc << INAT_ESC_OFFS) |
@@ -98,6 +103,9 @@ extern insn_attr_t inat_get_escape_attribute(insn_byte_t opcode, | |||
98 | extern insn_attr_t inat_get_group_attribute(insn_byte_t modrm, | 103 | extern insn_attr_t inat_get_group_attribute(insn_byte_t modrm, |
99 | insn_byte_t last_pfx, | 104 | insn_byte_t last_pfx, |
100 | insn_attr_t esc_attr); | 105 | insn_attr_t esc_attr); |
106 | extern insn_attr_t inat_get_avx_attribute(insn_byte_t opcode, | ||
107 | insn_byte_t vex_m, | ||
108 | insn_byte_t vex_pp); | ||
101 | 109 | ||
102 | /* Attribute checking functions */ | 110 | /* Attribute checking functions */ |
103 | static inline int inat_is_legacy_prefix(insn_attr_t attr) | 111 | static inline int inat_is_legacy_prefix(insn_attr_t attr) |
@@ -129,6 +137,17 @@ static inline int inat_last_prefix_id(insn_attr_t attr) | |||
129 | return attr & INAT_PFX_MASK; | 137 | return attr & INAT_PFX_MASK; |
130 | } | 138 | } |
131 | 139 | ||
140 | static inline int inat_is_vex_prefix(insn_attr_t attr) | ||
141 | { | ||
142 | attr &= INAT_PFX_MASK; | ||
143 | return attr == INAT_PFX_VEX2 || attr == INAT_PFX_VEX3; | ||
144 | } | ||
145 | |||
146 | static inline int inat_is_vex3_prefix(insn_attr_t attr) | ||
147 | { | ||
148 | return (attr & INAT_PFX_MASK) == INAT_PFX_VEX3; | ||
149 | } | ||
150 | |||
132 | static inline int inat_is_escape(insn_attr_t attr) | 151 | static inline int inat_is_escape(insn_attr_t attr) |
133 | { | 152 | { |
134 | return attr & INAT_ESC_MASK; | 153 | return attr & INAT_ESC_MASK; |
@@ -189,4 +208,13 @@ static inline int inat_has_variant(insn_attr_t attr) | |||
189 | return attr & INAT_VARIANT; | 208 | return attr & INAT_VARIANT; |
190 | } | 209 | } |
191 | 210 | ||
211 | static inline int inat_accept_vex(insn_attr_t attr) | ||
212 | { | ||
213 | return attr & INAT_VEXOK; | ||
214 | } | ||
215 | |||
216 | static inline int inat_must_vex(insn_attr_t attr) | ||
217 | { | ||
218 | return attr & INAT_VEXONLY; | ||
219 | } | ||
192 | #endif | 220 | #endif |
diff --git a/arch/x86/include/asm/insn.h b/arch/x86/include/asm/insn.h index 12b4e3751d3f..96c2e0ad04ca 100644 --- a/arch/x86/include/asm/insn.h +++ b/arch/x86/include/asm/insn.h | |||
@@ -39,6 +39,7 @@ struct insn { | |||
39 | * prefixes.bytes[3]: last prefix | 39 | * prefixes.bytes[3]: last prefix |
40 | */ | 40 | */ |
41 | struct insn_field rex_prefix; /* REX prefix */ | 41 | struct insn_field rex_prefix; /* REX prefix */ |
42 | struct insn_field vex_prefix; /* VEX prefix */ | ||
42 | struct insn_field opcode; /* | 43 | struct insn_field opcode; /* |
43 | * opcode.bytes[0]: opcode1 | 44 | * opcode.bytes[0]: opcode1 |
44 | * opcode.bytes[1]: opcode2 | 45 | * opcode.bytes[1]: opcode2 |
@@ -80,6 +81,19 @@ struct insn { | |||
80 | #define X86_REX_X(rex) ((rex) & 2) | 81 | #define X86_REX_X(rex) ((rex) & 2) |
81 | #define X86_REX_B(rex) ((rex) & 1) | 82 | #define X86_REX_B(rex) ((rex) & 1) |
82 | 83 | ||
84 | /* VEX bit flags */ | ||
85 | #define X86_VEX_W(vex) ((vex) & 0x80) /* VEX3 Byte2 */ | ||
86 | #define X86_VEX_R(vex) ((vex) & 0x80) /* VEX2/3 Byte1 */ | ||
87 | #define X86_VEX_X(vex) ((vex) & 0x40) /* VEX3 Byte1 */ | ||
88 | #define X86_VEX_B(vex) ((vex) & 0x20) /* VEX3 Byte1 */ | ||
89 | #define X86_VEX_L(vex) ((vex) & 0x04) /* VEX3 Byte2, VEX2 Byte1 */ | ||
90 | /* VEX bit fields */ | ||
91 | #define X86_VEX3_M(vex) ((vex) & 0x1f) /* VEX3 Byte1 */ | ||
92 | #define X86_VEX2_M 1 /* VEX2.M always 1 */ | ||
93 | #define X86_VEX_V(vex) (((vex) & 0x78) >> 3) /* VEX3 Byte2, VEX2 Byte1 */ | ||
94 | #define X86_VEX_P(vex) ((vex) & 0x03) /* VEX3 Byte2, VEX2 Byte1 */ | ||
95 | #define X86_VEX_M_MAX 0x1f /* VEX3.M Maximum value */ | ||
96 | |||
83 | /* The last prefix is needed for two-byte and three-byte opcodes */ | 97 | /* The last prefix is needed for two-byte and three-byte opcodes */ |
84 | static inline insn_byte_t insn_last_prefix(struct insn *insn) | 98 | static inline insn_byte_t insn_last_prefix(struct insn *insn) |
85 | { | 99 | { |
@@ -114,15 +128,42 @@ static inline void kernel_insn_init(struct insn *insn, const void *kaddr) | |||
114 | #endif | 128 | #endif |
115 | } | 129 | } |
116 | 130 | ||
131 | static inline int insn_is_avx(struct insn *insn) | ||
132 | { | ||
133 | if (!insn->prefixes.got) | ||
134 | insn_get_prefixes(insn); | ||
135 | return (insn->vex_prefix.value != 0); | ||
136 | } | ||
137 | |||
138 | static inline insn_byte_t insn_vex_m_bits(struct insn *insn) | ||
139 | { | ||
140 | if (insn->vex_prefix.nbytes == 2) /* 2 bytes VEX */ | ||
141 | return X86_VEX2_M; | ||
142 | else | ||
143 | return X86_VEX3_M(insn->vex_prefix.bytes[1]); | ||
144 | } | ||
145 | |||
146 | static inline insn_byte_t insn_vex_p_bits(struct insn *insn) | ||
147 | { | ||
148 | if (insn->vex_prefix.nbytes == 2) /* 2 bytes VEX */ | ||
149 | return X86_VEX_P(insn->vex_prefix.bytes[1]); | ||
150 | else | ||
151 | return X86_VEX_P(insn->vex_prefix.bytes[2]); | ||
152 | } | ||
153 | |||
117 | /* Offset of each field from kaddr */ | 154 | /* Offset of each field from kaddr */ |
118 | static inline int insn_offset_rex_prefix(struct insn *insn) | 155 | static inline int insn_offset_rex_prefix(struct insn *insn) |
119 | { | 156 | { |
120 | return insn->prefixes.nbytes; | 157 | return insn->prefixes.nbytes; |
121 | } | 158 | } |
122 | static inline int insn_offset_opcode(struct insn *insn) | 159 | static inline int insn_offset_vex_prefix(struct insn *insn) |
123 | { | 160 | { |
124 | return insn_offset_rex_prefix(insn) + insn->rex_prefix.nbytes; | 161 | return insn_offset_rex_prefix(insn) + insn->rex_prefix.nbytes; |
125 | } | 162 | } |
163 | static inline int insn_offset_opcode(struct insn *insn) | ||
164 | { | ||
165 | return insn_offset_vex_prefix(insn) + insn->vex_prefix.nbytes; | ||
166 | } | ||
126 | static inline int insn_offset_modrm(struct insn *insn) | 167 | static inline int insn_offset_modrm(struct insn *insn) |
127 | { | 168 | { |
128 | return insn_offset_opcode(insn) + insn->opcode.nbytes; | 169 | return insn_offset_opcode(insn) + insn->opcode.nbytes; |
diff --git a/arch/x86/lib/inat.c b/arch/x86/lib/inat.c index 3fb5998b823e..46fc4ee09fc4 100644 --- a/arch/x86/lib/inat.c +++ b/arch/x86/lib/inat.c | |||
@@ -76,3 +76,15 @@ insn_attr_t inat_get_group_attribute(insn_byte_t modrm, insn_byte_t last_pfx, | |||
76 | inat_group_common_attribute(grp_attr); | 76 | inat_group_common_attribute(grp_attr); |
77 | } | 77 | } |
78 | 78 | ||
79 | insn_attr_t inat_get_avx_attribute(insn_byte_t opcode, insn_byte_t vex_m, | ||
80 | insn_byte_t vex_p) | ||
81 | { | ||
82 | const insn_attr_t *table; | ||
83 | if (vex_m > X86_VEX_M_MAX || vex_p > INAT_LSTPFX_MAX) | ||
84 | return 0; | ||
85 | table = inat_avx_tables[vex_m][vex_p]; | ||
86 | if (!table) | ||
87 | return 0; | ||
88 | return table[opcode]; | ||
89 | } | ||
90 | |||
diff --git a/arch/x86/lib/insn.c b/arch/x86/lib/insn.c index 9f483179a8a6..9f33b984d0ef 100644 --- a/arch/x86/lib/insn.c +++ b/arch/x86/lib/insn.c | |||
@@ -28,6 +28,9 @@ | |||
28 | #define peek_next(t, insn) \ | 28 | #define peek_next(t, insn) \ |
29 | ({t r; r = *(t*)insn->next_byte; r; }) | 29 | ({t r; r = *(t*)insn->next_byte; r; }) |
30 | 30 | ||
31 | #define peek_nbyte_next(t, insn, n) \ | ||
32 | ({t r; r = *(t*)((insn)->next_byte + n); r; }) | ||
33 | |||
31 | /** | 34 | /** |
32 | * insn_init() - initialize struct insn | 35 | * insn_init() - initialize struct insn |
33 | * @insn: &struct insn to be initialized | 36 | * @insn: &struct insn to be initialized |
@@ -107,6 +110,7 @@ found: | |||
107 | insn->prefixes.bytes[3] = lb; | 110 | insn->prefixes.bytes[3] = lb; |
108 | } | 111 | } |
109 | 112 | ||
113 | /* Decode REX prefix */ | ||
110 | if (insn->x86_64) { | 114 | if (insn->x86_64) { |
111 | b = peek_next(insn_byte_t, insn); | 115 | b = peek_next(insn_byte_t, insn); |
112 | attr = inat_get_opcode_attribute(b); | 116 | attr = inat_get_opcode_attribute(b); |
@@ -120,6 +124,39 @@ found: | |||
120 | } | 124 | } |
121 | } | 125 | } |
122 | insn->rex_prefix.got = 1; | 126 | insn->rex_prefix.got = 1; |
127 | |||
128 | /* Decode VEX prefix */ | ||
129 | b = peek_next(insn_byte_t, insn); | ||
130 | attr = inat_get_opcode_attribute(b); | ||
131 | if (inat_is_vex_prefix(attr)) { | ||
132 | insn_byte_t b2 = peek_nbyte_next(insn_byte_t, insn, 1); | ||
133 | if (!insn->x86_64) { | ||
134 | /* | ||
135 | * In 32-bits mode, if the [7:6] bits (mod bits of | ||
136 | * ModRM) on the second byte are not 11b, it is | ||
137 | * LDS or LES. | ||
138 | */ | ||
139 | if (X86_MODRM_MOD(b2) != 3) | ||
140 | goto vex_end; | ||
141 | } | ||
142 | insn->vex_prefix.bytes[0] = b; | ||
143 | insn->vex_prefix.bytes[1] = b2; | ||
144 | if (inat_is_vex3_prefix(attr)) { | ||
145 | b2 = peek_nbyte_next(insn_byte_t, insn, 2); | ||
146 | insn->vex_prefix.bytes[2] = b2; | ||
147 | insn->vex_prefix.nbytes = 3; | ||
148 | insn->next_byte += 3; | ||
149 | if (insn->x86_64 && X86_VEX_W(b2)) | ||
150 | /* VEX.W overrides opnd_size */ | ||
151 | insn->opnd_bytes = 8; | ||
152 | } else { | ||
153 | insn->vex_prefix.nbytes = 2; | ||
154 | insn->next_byte += 2; | ||
155 | } | ||
156 | } | ||
157 | vex_end: | ||
158 | insn->vex_prefix.got = 1; | ||
159 | |||
123 | prefixes->got = 1; | 160 | prefixes->got = 1; |
124 | return; | 161 | return; |
125 | } | 162 | } |
@@ -147,6 +184,18 @@ void insn_get_opcode(struct insn *insn) | |||
147 | op = get_next(insn_byte_t, insn); | 184 | op = get_next(insn_byte_t, insn); |
148 | opcode->bytes[0] = op; | 185 | opcode->bytes[0] = op; |
149 | opcode->nbytes = 1; | 186 | opcode->nbytes = 1; |
187 | |||
188 | /* Check if there is VEX prefix or not */ | ||
189 | if (insn_is_avx(insn)) { | ||
190 | insn_byte_t m, p; | ||
191 | m = insn_vex_m_bits(insn); | ||
192 | p = insn_vex_p_bits(insn); | ||
193 | insn->attr = inat_get_avx_attribute(op, m, p); | ||
194 | if (!inat_accept_vex(insn->attr)) | ||
195 | insn->attr = 0; /* This instruction is bad */ | ||
196 | goto end; /* VEX has only 1 byte for opcode */ | ||
197 | } | ||
198 | |||
150 | insn->attr = inat_get_opcode_attribute(op); | 199 | insn->attr = inat_get_opcode_attribute(op); |
151 | while (inat_is_escape(insn->attr)) { | 200 | while (inat_is_escape(insn->attr)) { |
152 | /* Get escaped opcode */ | 201 | /* Get escaped opcode */ |
@@ -155,6 +204,9 @@ void insn_get_opcode(struct insn *insn) | |||
155 | pfx = insn_last_prefix(insn); | 204 | pfx = insn_last_prefix(insn); |
156 | insn->attr = inat_get_escape_attribute(op, pfx, insn->attr); | 205 | insn->attr = inat_get_escape_attribute(op, pfx, insn->attr); |
157 | } | 206 | } |
207 | if (inat_must_vex(insn->attr)) | ||
208 | insn->attr = 0; /* This instruction is bad */ | ||
209 | end: | ||
158 | opcode->got = 1; | 210 | opcode->got = 1; |
159 | } | 211 | } |
160 | 212 | ||
diff --git a/arch/x86/lib/x86-opcode-map.txt b/arch/x86/lib/x86-opcode-map.txt index 1f41246e6e3c..9887bfeeb2db 100644 --- a/arch/x86/lib/x86-opcode-map.txt +++ b/arch/x86/lib/x86-opcode-map.txt | |||
@@ -3,6 +3,7 @@ | |||
3 | #<Opcode maps> | 3 | #<Opcode maps> |
4 | # Table: table-name | 4 | # Table: table-name |
5 | # Referrer: escaped-name | 5 | # Referrer: escaped-name |
6 | # AVXcode: avx-code | ||
6 | # opcode: mnemonic|GrpXXX [operand1[,operand2...]] [(extra1)[,(extra2)...] [| 2nd-mnemonic ...] | 7 | # opcode: mnemonic|GrpXXX [operand1[,operand2...]] [(extra1)[,(extra2)...] [| 2nd-mnemonic ...] |
7 | # (or) | 8 | # (or) |
8 | # opcode: escape # escaped-name | 9 | # opcode: escape # escaped-name |
@@ -13,9 +14,16 @@ | |||
13 | # reg: mnemonic [operand1[,operand2...]] [(extra1)[,(extra2)...] [| 2nd-mnemonic ...] | 14 | # reg: mnemonic [operand1[,operand2...]] [(extra1)[,(extra2)...] [| 2nd-mnemonic ...] |
14 | # EndTable | 15 | # EndTable |
15 | # | 16 | # |
17 | # AVX Superscripts | ||
18 | # (VEX): this opcode can accept VEX prefix. | ||
19 | # (oVEX): this opcode requires VEX prefix. | ||
20 | # (o128): this opcode only supports 128bit VEX. | ||
21 | # (o256): this opcode only supports 256bit VEX. | ||
22 | # | ||
16 | 23 | ||
17 | Table: one byte opcode | 24 | Table: one byte opcode |
18 | Referrer: | 25 | Referrer: |
26 | AVXcode: | ||
19 | # 0x00 - 0x0f | 27 | # 0x00 - 0x0f |
20 | 00: ADD Eb,Gb | 28 | 00: ADD Eb,Gb |
21 | 01: ADD Ev,Gv | 29 | 01: ADD Ev,Gv |
@@ -225,8 +233,8 @@ c0: Grp2 Eb,Ib (1A) | |||
225 | c1: Grp2 Ev,Ib (1A) | 233 | c1: Grp2 Ev,Ib (1A) |
226 | c2: RETN Iw (f64) | 234 | c2: RETN Iw (f64) |
227 | c3: RETN | 235 | c3: RETN |
228 | c4: LES Gz,Mp (i64) | 236 | c4: LES Gz,Mp (i64) | 3bytes-VEX (Prefix) |
229 | c5: LDS Gz,Mp (i64) | 237 | c5: LDS Gz,Mp (i64) | 2bytes-VEX (Prefix) |
230 | c6: Grp11 Eb,Ib (1A) | 238 | c6: Grp11 Eb,Ib (1A) |
231 | c7: Grp11 Ev,Iz (1A) | 239 | c7: Grp11 Ev,Iz (1A) |
232 | c8: ENTER Iw,Ib | 240 | c8: ENTER Iw,Ib |
@@ -290,8 +298,9 @@ fe: Grp4 (1A) | |||
290 | ff: Grp5 (1A) | 298 | ff: Grp5 (1A) |
291 | EndTable | 299 | EndTable |
292 | 300 | ||
293 | Table: 2-byte opcode # First Byte is 0x0f | 301 | Table: 2-byte opcode (0x0f) |
294 | Referrer: 2-byte escape | 302 | Referrer: 2-byte escape |
303 | AVXcode: 1 | ||
295 | # 0x0f 0x00-0x0f | 304 | # 0x0f 0x00-0x0f |
296 | 00: Grp6 (1A) | 305 | 00: Grp6 (1A) |
297 | 01: Grp7 (1A) | 306 | 01: Grp7 (1A) |
@@ -311,14 +320,14 @@ Referrer: 2-byte escape | |||
311 | # 3DNow! uses the last imm byte as opcode extension. | 320 | # 3DNow! uses the last imm byte as opcode extension. |
312 | 0f: 3DNow! Pq,Qq,Ib | 321 | 0f: 3DNow! Pq,Qq,Ib |
313 | # 0x0f 0x10-0x1f | 322 | # 0x0f 0x10-0x1f |
314 | 10: movups Vps,Wps | movss Vss,Wss (F3) | movupd Vpd,Wpd (66) | movsd Vsd,Wsd (F2) | 323 | 10: movups Vps,Wps (VEX) | movss Vss,Wss (F3),(VEX),(o128) | movupd Vpd,Wpd (66),(VEX) | movsd Vsd,Wsd (F2),(VEX),(o128) |
315 | 11: movups Wps,Vps | movss Wss,Vss (F3) | movupd Wpd,Vpd (66) | movsd Wsd,Vsd (F2) | 324 | 11: movups Wps,Vps (VEX) | movss Wss,Vss (F3),(VEX),(o128) | movupd Wpd,Vpd (66),(VEX) | movsd Wsd,Vsd (F2),(VEX),(o128) |
316 | 12: movlps Vq,Mq | movlpd Vq,Mq (66) | movhlps Vq,Uq | movddup Vq,Wq (F2) | movsldup Vq,Wq (F3) | 325 | 12: movlps Vq,Mq (VEX),(o128) | movlpd Vq,Mq (66),(VEX),(o128) | movhlps Vq,Uq (VEX),(o128) | movddup Vq,Wq (F2),(VEX) | movsldup Vq,Wq (F3),(VEX) |
317 | 13: mpvlps Mq,Vq | movlpd Mq,Vq (66) | 326 | 13: mpvlps Mq,Vq (VEX),(o128) | movlpd Mq,Vq (66),(VEX),(o128) |
318 | 14: unpcklps Vps,Wq | unpcklpd Vpd,Wq (66) | 327 | 14: unpcklps Vps,Wq (VEX) | unpcklpd Vpd,Wq (66),(VEX) |
319 | 15: unpckhps Vps,Wq | unpckhpd Vpd,Wq (66) | 328 | 15: unpckhps Vps,Wq (VEX) | unpckhpd Vpd,Wq (66),(VEX) |
320 | 16: movhps Vq,Mq | movhpd Vq,Mq (66) | movlsps Vq,Uq | movshdup Vq,Wq (F3) | 329 | 16: movhps Vq,Mq (VEX),(o128) | movhpd Vq,Mq (66),(VEX),(o128) | movlsps Vq,Uq (VEX),(o128) | movshdup Vq,Wq (F3),(VEX) |
321 | 17: movhps Mq,Vq | movhpd Mq,Vq (66) | 330 | 17: movhps Mq,Vq (VEX),(o128) | movhpd Mq,Vq (66),(VEX),(o128) |
322 | 18: Grp16 (1A) | 331 | 18: Grp16 (1A) |
323 | 19: | 332 | 19: |
324 | 1a: | 333 | 1a: |
@@ -336,14 +345,14 @@ Referrer: 2-byte escape | |||
336 | 25: | 345 | 25: |
337 | 26: | 346 | 26: |
338 | 27: | 347 | 27: |
339 | 28: movaps Vps,Wps | movapd Vpd,Wpd (66) | 348 | 28: movaps Vps,Wps (VEX) | movapd Vpd,Wpd (66),(VEX) |
340 | 29: movaps Wps,Vps | movapd Wpd,Vpd (66) | 349 | 29: movaps Wps,Vps (VEX) | movapd Wpd,Vpd (66),(VEX) |
341 | 2a: cvtpi2ps Vps,Qpi | cvtsi2ss Vss,Ed/q (F3) | cvtpi2pd Vpd,Qpi (66) | cvtsi2sd Vsd,Ed/q (F2) | 350 | 2a: cvtpi2ps Vps,Qpi | cvtsi2ss Vss,Ed/q (F3),(VEX),(o128) | cvtpi2pd Vpd,Qpi (66) | cvtsi2sd Vsd,Ed/q (F2),(VEX),(o128) |
342 | 2b: movntps Mps,Vps | movntpd Mpd,Vpd (66) | 351 | 2b: movntps Mps,Vps (VEX) | movntpd Mpd,Vpd (66),(VEX) |
343 | 2c: cvttps2pi Ppi,Wps | cvttss2si Gd/q,Wss (F3) | cvttpd2pi Ppi,Wpd (66) | cvttsd2si Gd/q,Wsd (F2) | 352 | 2c: cvttps2pi Ppi,Wps | cvttss2si Gd/q,Wss (F3),(VEX),(o128) | cvttpd2pi Ppi,Wpd (66) | cvttsd2si Gd/q,Wsd (F2),(VEX),(o128) |
344 | 2d: cvtps2pi Ppi,Wps | cvtss2si Gd/q,Wss (F3) | cvtpd2pi Qpi,Wpd (66) | cvtsd2si Gd/q,Wsd (F2) | 353 | 2d: cvtps2pi Ppi,Wps | cvtss2si Gd/q,Wss (F3),(VEX),(o128) | cvtpd2pi Qpi,Wpd (66) | cvtsd2si Gd/q,Wsd (F2),(VEX),(o128) |
345 | 2e: ucomiss Vss,Wss | ucomisd Vsd,Wsd (66) | 354 | 2e: ucomiss Vss,Wss (VEX),(o128) | ucomisd Vsd,Wsd (66),(VEX),(o128) |
346 | 2f: comiss Vss,Wss | comisd Vsd,Wsd (66) | 355 | 2f: comiss Vss,Wss (VEX),(o128) | comisd Vsd,Wsd (66),(VEX),(o128) |
347 | # 0x0f 0x30-0x3f | 356 | # 0x0f 0x30-0x3f |
348 | 30: WRMSR | 357 | 30: WRMSR |
349 | 31: RDTSC | 358 | 31: RDTSC |
@@ -379,56 +388,56 @@ Referrer: 2-byte escape | |||
379 | 4e: CMOVLE/NG Gv,Ev | 388 | 4e: CMOVLE/NG Gv,Ev |
380 | 4f: CMOVNLE/G Gv,Ev | 389 | 4f: CMOVNLE/G Gv,Ev |
381 | # 0x0f 0x50-0x5f | 390 | # 0x0f 0x50-0x5f |
382 | 50: movmskps Gd/q,Ups | movmskpd Gd/q,Upd (66) | 391 | 50: movmskps Gd/q,Ups (VEX) | movmskpd Gd/q,Upd (66),(VEX) |
383 | 51: sqrtps Vps,Wps | sqrtss Vss,Wss (F3) | sqrtpd Vpd,Wpd (66) | sqrtsd Vsd,Wsd (F2) | 392 | 51: sqrtps Vps,Wps (VEX) | sqrtss Vss,Wss (F3),(VEX),(o128) | sqrtpd Vpd,Wpd (66),(VEX) | sqrtsd Vsd,Wsd (F2),(VEX),(o128) |
384 | 52: rsqrtps Vps,Wps | rsqrtss Vss,Wss (F3) | 393 | 52: rsqrtps Vps,Wps (VEX) | rsqrtss Vss,Wss (F3),(VEX),(o128) |
385 | 53: rcpps Vps,Wps | rcpss Vss,Wss (F3) | 394 | 53: rcpps Vps,Wps (VEX) | rcpss Vss,Wss (F3),(VEX),(o128) |
386 | 54: andps Vps,Wps | andpd Vpd,Wpd (66) | 395 | 54: andps Vps,Wps (VEX) | andpd Vpd,Wpd (66),(VEX) |
387 | 55: andnps Vps,Wps | andnpd Vpd,Wpd (66) | 396 | 55: andnps Vps,Wps (VEX) | andnpd Vpd,Wpd (66),(VEX) |
388 | 56: orps Vps,Wps | orpd Vpd,Wpd (66) | 397 | 56: orps Vps,Wps (VEX) | orpd Vpd,Wpd (66),(VEX) |
389 | 57: xorps Vps,Wps | xorpd Vpd,Wpd (66) | 398 | 57: xorps Vps,Wps (VEX) | xorpd Vpd,Wpd (66),(VEX) |
390 | 58: addps Vps,Wps | addss Vss,Wss (F3) | addpd Vpd,Wpd (66) | addsd Vsd,Wsd (F2) | 399 | 58: addps Vps,Wps (VEX) | addss Vss,Wss (F3),(VEX),(o128) | addpd Vpd,Wpd (66),(VEX) | addsd Vsd,Wsd (F2),(VEX),(o128) |
391 | 59: mulps Vps,Wps | mulss Vss,Wss (F3) | mulpd Vpd,Wpd (66) | mulsd Vsd,Wsd (F2) | 400 | 59: mulps Vps,Wps (VEX) | mulss Vss,Wss (F3),(VEX),(o128) | mulpd Vpd,Wpd (66),(VEX) | mulsd Vsd,Wsd (F2),(VEX),(o128) |
392 | 5a: cvtps2pd Vpd,Wps | cvtss2sd Vsd,Wss (F3) | cvtpd2ps Vps,Wpd (66) | cvtsd2ss Vsd,Wsd (F2) | 401 | 5a: cvtps2pd Vpd,Wps (VEX) | cvtss2sd Vsd,Wss (F3),(VEX),(o128) | cvtpd2ps Vps,Wpd (66),(VEX) | cvtsd2ss Vsd,Wsd (F2),(VEX),(o128) |
393 | 5b: cvtdq2ps Vps,Wdq | cvtps2dq Vdq,Wps (66) | cvttps2dq Vdq,Wps (F3) | 402 | 5b: cvtdq2ps Vps,Wdq (VEX) | cvtps2dq Vdq,Wps (66),(VEX) | cvttps2dq Vdq,Wps (F3),(VEX) |
394 | 5c: subps Vps,Wps | subss Vss,Wss (F3) | subpd Vpd,Wpd (66) | subsd Vsd,Wsd (F2) | 403 | 5c: subps Vps,Wps (VEX) | subss Vss,Wss (F3),(VEX),(o128) | subpd Vpd,Wpd (66),(VEX) | subsd Vsd,Wsd (F2),(VEX),(o128) |
395 | 5d: minps Vps,Wps | minss Vss,Wss (F3) | minpd Vpd,Wpd (66) | minsd Vsd,Wsd (F2) | 404 | 5d: minps Vps,Wps (VEX) | minss Vss,Wss (F3),(VEX),(o128) | minpd Vpd,Wpd (66),(VEX) | minsd Vsd,Wsd (F2),(VEX),(o128) |
396 | 5e: divps Vps,Wps | divss Vss,Wss (F3) | divpd Vpd,Wpd (66) | divsd Vsd,Wsd (F2) | 405 | 5e: divps Vps,Wps (VEX) | divss Vss,Wss (F3),(VEX),(o128) | divpd Vpd,Wpd (66),(VEX) | divsd Vsd,Wsd (F2),(VEX),(o128) |
397 | 5f: maxps Vps,Wps | maxss Vss,Wss (F3) | maxpd Vpd,Wpd (66) | maxsd Vsd,Wsd (F2) | 406 | 5f: maxps Vps,Wps (VEX) | maxss Vss,Wss (F3),(VEX),(o128) | maxpd Vpd,Wpd (66),(VEX) | maxsd Vsd,Wsd (F2),(VEX),(o128) |
398 | # 0x0f 0x60-0x6f | 407 | # 0x0f 0x60-0x6f |
399 | 60: punpcklbw Pq,Qd | punpcklbw Vdq,Wdq (66) | 408 | 60: punpcklbw Pq,Qd | punpcklbw Vdq,Wdq (66),(VEX),(o128) |
400 | 61: punpcklwd Pq,Qd | punpcklwd Vdq,Wdq (66) | 409 | 61: punpcklwd Pq,Qd | punpcklwd Vdq,Wdq (66),(VEX),(o128) |
401 | 62: punpckldq Pq,Qd | punpckldq Vdq,Wdq (66) | 410 | 62: punpckldq Pq,Qd | punpckldq Vdq,Wdq (66),(VEX),(o128) |
402 | 63: packsswb Pq,Qq | packsswb Vdq,Wdq (66) | 411 | 63: packsswb Pq,Qq | packsswb Vdq,Wdq (66),(VEX),(o128) |
403 | 64: pcmpgtb Pq,Qq | pcmpgtb Vdq,Wdq (66) | 412 | 64: pcmpgtb Pq,Qq | pcmpgtb Vdq,Wdq (66),(VEX),(o128) |
404 | 65: pcmpgtw Pq,Qq | pcmpgtw Vdq,Wdq (66) | 413 | 65: pcmpgtw Pq,Qq | pcmpgtw Vdq,Wdq (66),(VEX),(o128) |
405 | 66: pcmpgtd Pq,Qq | pcmpgtd Vdq,Wdq (66) | 414 | 66: pcmpgtd Pq,Qq | pcmpgtd Vdq,Wdq (66),(VEX),(o128) |
406 | 67: packuswb Pq,Qq | packuswb Vdq,Wdq (66) | 415 | 67: packuswb Pq,Qq | packuswb Vdq,Wdq (66),(VEX),(o128) |
407 | 68: punpckhbw Pq,Qd | punpckhbw Vdq,Wdq (66) | 416 | 68: punpckhbw Pq,Qd | punpckhbw Vdq,Wdq (66),(VEX),(o128) |
408 | 69: punpckhwd Pq,Qd | punpckhwd Vdq,Wdq (66) | 417 | 69: punpckhwd Pq,Qd | punpckhwd Vdq,Wdq (66),(VEX),(o128) |
409 | 6a: punpckhdq Pq,Qd | punpckhdq Vdq,Wdq (66) | 418 | 6a: punpckhdq Pq,Qd | punpckhdq Vdq,Wdq (66),(VEX),(o128) |
410 | 6b: packssdw Pq,Qd | packssdw Vdq,Wdq (66) | 419 | 6b: packssdw Pq,Qd | packssdw Vdq,Wdq (66),(VEX),(o128) |
411 | 6c: punpcklqdq Vdq,Wdq (66) | 420 | 6c: punpcklqdq Vdq,Wdq (66),(VEX),(o128) |
412 | 6d: punpckhqdq Vdq,Wdq (66) | 421 | 6d: punpckhqdq Vdq,Wdq (66),(VEX),(o128) |
413 | 6e: movd/q/ Pd,Ed/q | movd/q Vdq,Ed/q (66) | 422 | 6e: movd/q/ Pd,Ed/q | movd/q Vdq,Ed/q (66),(VEX),(o128) |
414 | 6f: movq Pq,Qq | movdqa Vdq,Wdq (66) | movdqu Vdq,Wdq (F3) | 423 | 6f: movq Pq,Qq | movdqa Vdq,Wdq (66),(VEX) | movdqu Vdq,Wdq (F3),(VEX) |
415 | # 0x0f 0x70-0x7f | 424 | # 0x0f 0x70-0x7f |
416 | 70: pshufw Pq,Qq,Ib | pshufd Vdq,Wdq,Ib (66) | pshufhw Vdq,Wdq,Ib (F3) | pshuflw VdqWdq,Ib (F2) | 425 | 70: pshufw Pq,Qq,Ib | pshufd Vdq,Wdq,Ib (66),(VEX),(o128) | pshufhw Vdq,Wdq,Ib (F3),(VEX),(o128) | pshuflw VdqWdq,Ib (F2),(VEX),(o128) |
417 | 71: Grp12 (1A) | 426 | 71: Grp12 (1A) |
418 | 72: Grp13 (1A) | 427 | 72: Grp13 (1A) |
419 | 73: Grp14 (1A) | 428 | 73: Grp14 (1A) |
420 | 74: pcmpeqb Pq,Qq | pcmpeqb Vdq,Wdq (66) | 429 | 74: pcmpeqb Pq,Qq | pcmpeqb Vdq,Wdq (66),(VEX),(o128) |
421 | 75: pcmpeqw Pq,Qq | pcmpeqw Vdq,Wdq (66) | 430 | 75: pcmpeqw Pq,Qq | pcmpeqw Vdq,Wdq (66),(VEX),(o128) |
422 | 76: pcmpeqd Pq,Qq | pcmpeqd Vdq,Wdq (66) | 431 | 76: pcmpeqd Pq,Qq | pcmpeqd Vdq,Wdq (66),(VEX),(o128) |
423 | 77: emms | 432 | 77: emms/vzeroupper/vzeroall (VEX) |
424 | 78: VMREAD Ed/q,Gd/q | 433 | 78: VMREAD Ed/q,Gd/q |
425 | 79: VMWRITE Gd/q,Ed/q | 434 | 79: VMWRITE Gd/q,Ed/q |
426 | 7a: | 435 | 7a: |
427 | 7b: | 436 | 7b: |
428 | 7c: haddps Vps,Wps (F2) | haddpd Vpd,Wpd (66) | 437 | 7c: haddps Vps,Wps (F2),(VEX) | haddpd Vpd,Wpd (66),(VEX) |
429 | 7d: hsubps Vps,Wps (F2) | hsubpd Vpd,Wpd (66) | 438 | 7d: hsubps Vps,Wps (F2),(VEX) | hsubpd Vpd,Wpd (66),(VEX) |
430 | 7e: movd/q Ed/q,Pd | movd/q Ed/q,Vdq (66) | movq Vq,Wq (F3) | 439 | 7e: movd/q Ed/q,Pd | movd/q Ed/q,Vdq (66),(VEX),(o128) | movq Vq,Wq (F3),(VEX),(o128) |
431 | 7f: movq Qq,Pq | movdqa Wdq,Vdq (66) | movdqu Wdq,Vdq (F3) | 440 | 7f: movq Qq,Pq | movdqa Wdq,Vdq (66),(VEX) | movdqu Wdq,Vdq (F3),(VEX) |
432 | # 0x0f 0x80-0x8f | 441 | # 0x0f 0x80-0x8f |
433 | 80: JO Jz (f64) | 442 | 80: JO Jz (f64) |
434 | 81: JNO Jz (f64) | 443 | 81: JNO Jz (f64) |
@@ -500,11 +509,11 @@ bf: MOVSX Gv,Ew | |||
500 | # 0x0f 0xc0-0xcf | 509 | # 0x0f 0xc0-0xcf |
501 | c0: XADD Eb,Gb | 510 | c0: XADD Eb,Gb |
502 | c1: XADD Ev,Gv | 511 | c1: XADD Ev,Gv |
503 | c2: cmpps Vps,Wps,Ib | cmpss Vss,Wss,Ib (F3) | cmppd Vpd,Wpd,Ib (66) | cmpsd Vsd,Wsd,Ib (F2) | 512 | c2: cmpps Vps,Wps,Ib (VEX) | cmpss Vss,Wss,Ib (F3),(VEX),(o128) | cmppd Vpd,Wpd,Ib (66),(VEX) | cmpsd Vsd,Wsd,Ib (F2),(VEX) |
504 | c3: movnti Md/q,Gd/q | 513 | c3: movnti Md/q,Gd/q |
505 | c4: pinsrw Pq,Rd/q/Mw,Ib | pinsrw Vdq,Rd/q/Mw,Ib (66) | 514 | c4: pinsrw Pq,Rd/q/Mw,Ib | pinsrw Vdq,Rd/q/Mw,Ib (66),(VEX),(o128) |
506 | c5: pextrw Gd,Nq,Ib | pextrw Gd,Udq,Ib (66) | 515 | c5: pextrw Gd,Nq,Ib | pextrw Gd,Udq,Ib (66),(VEX),(o128) |
507 | c6: shufps Vps,Wps,Ib | shufpd Vpd,Wpd,Ib (66) | 516 | c6: shufps Vps,Wps,Ib (VEX) | shufpd Vpd,Wpd,Ib (66),(VEX) |
508 | c7: Grp9 (1A) | 517 | c7: Grp9 (1A) |
509 | c8: BSWAP RAX/EAX/R8/R8D | 518 | c8: BSWAP RAX/EAX/R8/R8D |
510 | c9: BSWAP RCX/ECX/R9/R9D | 519 | c9: BSWAP RCX/ECX/R9/R9D |
@@ -515,77 +524,78 @@ cd: BSWAP RBP/EBP/R13/R13D | |||
515 | ce: BSWAP RSI/ESI/R14/R14D | 524 | ce: BSWAP RSI/ESI/R14/R14D |
516 | cf: BSWAP RDI/EDI/R15/R15D | 525 | cf: BSWAP RDI/EDI/R15/R15D |
517 | # 0x0f 0xd0-0xdf | 526 | # 0x0f 0xd0-0xdf |
518 | d0: addsubps Vps,Wps (F2) | addsubpd Vpd,Wpd (66) | 527 | d0: addsubps Vps,Wps (F2),(VEX) | addsubpd Vpd,Wpd (66),(VEX) |
519 | d1: psrlw Pq,Qq | psrlw Vdq,Wdq (66) | 528 | d1: psrlw Pq,Qq | psrlw Vdq,Wdq (66),(VEX),(o128) |
520 | d2: psrld Pq,Qq | psrld Vdq,Wdq (66) | 529 | d2: psrld Pq,Qq | psrld Vdq,Wdq (66),(VEX),(o128) |
521 | d3: psrlq Pq,Qq | psrlq Vdq,Wdq (66) | 530 | d3: psrlq Pq,Qq | psrlq Vdq,Wdq (66),(VEX),(o128) |
522 | d4: paddq Pq,Qq | paddq Vdq,Wdq (66) | 531 | d4: paddq Pq,Qq | paddq Vdq,Wdq (66),(VEX),(o128) |
523 | d5: pmullw Pq,Qq | pmullw Vdq,Wdq (66) | 532 | d5: pmullw Pq,Qq | pmullw Vdq,Wdq (66),(VEX),(o128) |
524 | d6: movq Wq,Vq (66) | movq2dq Vdq,Nq (F3) | movdq2q Pq,Uq (F2) | 533 | d6: movq Wq,Vq (66),(VEX),(o128) | movq2dq Vdq,Nq (F3) | movdq2q Pq,Uq (F2) |
525 | d7: pmovmskb Gd,Nq | pmovmskb Gd,Udq (66) | 534 | d7: pmovmskb Gd,Nq | pmovmskb Gd,Udq (66),(VEX),(o128) |
526 | d8: psubusb Pq,Qq | psubusb Vdq,Wdq (66) | 535 | d8: psubusb Pq,Qq | psubusb Vdq,Wdq (66),(VEX),(o128) |
527 | d9: psubusw Pq,Qq | psubusw Vdq,Wdq (66) | 536 | d9: psubusw Pq,Qq | psubusw Vdq,Wdq (66),(VEX),(o128) |
528 | da: pminub Pq,Qq | pminub Vdq,Wdq (66) | 537 | da: pminub Pq,Qq | pminub Vdq,Wdq (66),(VEX),(o128) |
529 | db: pand Pq,Qq | pand Vdq,Wdq (66) | 538 | db: pand Pq,Qq | pand Vdq,Wdq (66),(VEX),(o128) |
530 | dc: paddusb Pq,Qq | paddusb Vdq,Wdq (66) | 539 | dc: paddusb Pq,Qq | paddusb Vdq,Wdq (66),(VEX),(o128) |
531 | dd: paddusw Pq,Qq | paddusw Vdq,Wdq (66) | 540 | dd: paddusw Pq,Qq | paddusw Vdq,Wdq (66),(VEX),(o128) |
532 | de: pmaxub Pq,Qq | pmaxub Vdq,Wdq (66) | 541 | de: pmaxub Pq,Qq | pmaxub Vdq,Wdq (66),(VEX),(o128) |
533 | df: pandn Pq,Qq | pandn Vdq,Wdq (66) | 542 | df: pandn Pq,Qq | pandn Vdq,Wdq (66),(VEX),(o128) |
534 | # 0x0f 0xe0-0xef | 543 | # 0x0f 0xe0-0xef |
535 | e0: pavgb Pq,Qq | pavgb Vdq,Wdq (66) | 544 | e0: pavgb Pq,Qq | pavgb Vdq,Wdq (66),(VEX),(o128) |
536 | e1: psraw Pq,Qq | psraw Vdq,Wdq (66) | 545 | e1: psraw Pq,Qq | psraw Vdq,Wdq (66),(VEX),(o128) |
537 | e2: psrad Pq,Qq | psrad Vdq,Wdq (66) | 546 | e2: psrad Pq,Qq | psrad Vdq,Wdq (66),(VEX),(o128) |
538 | e3: pavgw Pq,Qq | pavgw Vdq,Wdq (66) | 547 | e3: pavgw Pq,Qq | pavgw Vdq,Wdq (66),(VEX),(o128) |
539 | e4: pmulhuw Pq,Qq | pmulhuw Vdq,Wdq (66) | 548 | e4: pmulhuw Pq,Qq | pmulhuw Vdq,Wdq (66),(VEX),(o128) |
540 | e5: pmulhw Pq,Qq | pmulhw Vdq,Wdq (66) | 549 | e5: pmulhw Pq,Qq | pmulhw Vdq,Wdq (66),(VEX),(o128) |
541 | e6: cvtpd2dq Vdq,Wpd (F2) | cvttpd2dq Vdq,Wpd (66) | cvtdq2pd Vpd,Wdq (F3) | 550 | e6: cvtpd2dq Vdq,Wpd (F2),(VEX) | cvttpd2dq Vdq,Wpd (66),(VEX) | cvtdq2pd Vpd,Wdq (F3),(VEX) |
542 | e7: movntq Mq,Pq | movntdq Mdq,Vdq (66) | 551 | e7: movntq Mq,Pq | movntdq Mdq,Vdq (66),(VEX) |
543 | e8: psubsb Pq,Qq | psubsb Vdq,Wdq (66) | 552 | e8: psubsb Pq,Qq | psubsb Vdq,Wdq (66),(VEX),(o128) |
544 | e9: psubsw Pq,Qq | psubsw Vdq,Wdq (66) | 553 | e9: psubsw Pq,Qq | psubsw Vdq,Wdq (66),(VEX),(o128) |
545 | ea: pminsw Pq,Qq | pminsw Vdq,Wdq (66) | 554 | ea: pminsw Pq,Qq | pminsw Vdq,Wdq (66),(VEX),(o128) |
546 | eb: por Pq,Qq | por Vdq,Wdq (66) | 555 | eb: por Pq,Qq | por Vdq,Wdq (66),(VEX),(o128) |
547 | ec: paddsb Pq,Qq | paddsb Vdq,Wdq (66) | 556 | ec: paddsb Pq,Qq | paddsb Vdq,Wdq (66),(VEX),(o128) |
548 | ed: paddsw Pq,Qq | paddsw Vdq,Wdq (66) | 557 | ed: paddsw Pq,Qq | paddsw Vdq,Wdq (66),(VEX),(o128) |
549 | ee: pmaxsw Pq,Qq | pmaxsw Vdq,Wdq (66) | 558 | ee: pmaxsw Pq,Qq | pmaxsw Vdq,Wdq (66),(VEX),(o128) |
550 | ef: pxor Pq,Qq | pxor Vdq,Wdq (66) | 559 | ef: pxor Pq,Qq | pxor Vdq,Wdq (66),(VEX),(o128) |
551 | # 0x0f 0xf0-0xff | 560 | # 0x0f 0xf0-0xff |
552 | f0: lddqu Vdq,Mdq (F2) | 561 | f0: lddqu Vdq,Mdq (F2),(VEX) |
553 | f1: psllw Pq,Qq | psllw Vdq,Wdq (66) | 562 | f1: psllw Pq,Qq | psllw Vdq,Wdq (66),(VEX),(o128) |
554 | f2: pslld Pq,Qq | pslld Vdq,Wdq (66) | 563 | f2: pslld Pq,Qq | pslld Vdq,Wdq (66),(VEX),(o128) |
555 | f3: psllq Pq,Qq | psllq Vdq,Wdq (66) | 564 | f3: psllq Pq,Qq | psllq Vdq,Wdq (66),(VEX),(o128) |
556 | f4: pmuludq Pq,Qq | pmuludq Vdq,Wdq (66) | 565 | f4: pmuludq Pq,Qq | pmuludq Vdq,Wdq (66),(VEX),(o128) |
557 | f5: pmaddwd Pq,Qq | pmaddwd Vdq,Wdq (66) | 566 | f5: pmaddwd Pq,Qq | pmaddwd Vdq,Wdq (66),(VEX),(o128) |
558 | f6: psadbw Pq,Qq | psadbw Vdq,Wdq (66) | 567 | f6: psadbw Pq,Qq | psadbw Vdq,Wdq (66),(VEX),(o128) |
559 | f7: maskmovq Pq,Nq | maskmovdqu Vdq,Udq (66) | 568 | f7: maskmovq Pq,Nq | maskmovdqu Vdq,Udq (66),(VEX),(o128) |
560 | f8: psubb Pq,Qq | psubb Vdq,Wdq (66) | 569 | f8: psubb Pq,Qq | psubb Vdq,Wdq (66),(VEX),(o128) |
561 | f9: psubw Pq,Qq | psubw Vdq,Wdq (66) | 570 | f9: psubw Pq,Qq | psubw Vdq,Wdq (66),(VEX),(o128) |
562 | fa: psubd Pq,Qq | psubd Vdq,Wdq (66) | 571 | fa: psubd Pq,Qq | psubd Vdq,Wdq (66),(VEX),(o128) |
563 | fb: psubq Pq,Qq | psubq Vdq,Wdq (66) | 572 | fb: psubq Pq,Qq | psubq Vdq,Wdq (66),(VEX),(o128) |
564 | fc: paddb Pq,Qq | paddb Vdq,Wdq (66) | 573 | fc: paddb Pq,Qq | paddb Vdq,Wdq (66),(VEX),(o128) |
565 | fd: paddw Pq,Qq | paddw Vdq,Wdq (66) | 574 | fd: paddw Pq,Qq | paddw Vdq,Wdq (66),(VEX),(o128) |
566 | fe: paddd Pq,Qq | paddd Vdq,Wdq (66) | 575 | fe: paddd Pq,Qq | paddd Vdq,Wdq (66),(VEX),(o128) |
567 | ff: | 576 | ff: |
568 | EndTable | 577 | EndTable |
569 | 578 | ||
570 | Table: 3-byte opcode 1 (0x0f 0x38) | 579 | Table: 3-byte opcode 1 (0x0f 0x38) |
571 | Referrer: 3-byte escape 1 | 580 | Referrer: 3-byte escape 1 |
581 | AVXcode: 2 | ||
572 | # 0x0f 0x38 0x00-0x0f | 582 | # 0x0f 0x38 0x00-0x0f |
573 | 00: pshufb Pq,Qq | pshufb Vdq,Wdq (66) | 583 | 00: pshufb Pq,Qq | pshufb Vdq,Wdq (66),(VEX),(o128) |
574 | 01: phaddw Pq,Qq | phaddw Vdq,Wdq (66) | 584 | 01: phaddw Pq,Qq | phaddw Vdq,Wdq (66),(VEX),(o128) |
575 | 02: phaddd Pq,Qq | phaddd Vdq,Wdq (66) | 585 | 02: phaddd Pq,Qq | phaddd Vdq,Wdq (66),(VEX),(o128) |
576 | 03: phaddsw Pq,Qq | phaddsw Vdq,Wdq (66) | 586 | 03: phaddsw Pq,Qq | phaddsw Vdq,Wdq (66),(VEX),(o128) |
577 | 04: pmaddubsw Pq,Qq | pmaddubsw Vdq,Wdq (66) | 587 | 04: pmaddubsw Pq,Qq | pmaddubsw Vdq,Wdq (66),(VEX),(o128) |
578 | 05: phsubw Pq,Qq | phsubw Vdq,Wdq (66) | 588 | 05: phsubw Pq,Qq | phsubw Vdq,Wdq (66),(VEX),(o128) |
579 | 06: phsubd Pq,Qq | phsubd Vdq,Wdq (66) | 589 | 06: phsubd Pq,Qq | phsubd Vdq,Wdq (66),(VEX),(o128) |
580 | 07: phsubsw Pq,Qq | phsubsw Vdq,Wdq (66) | 590 | 07: phsubsw Pq,Qq | phsubsw Vdq,Wdq (66),(VEX),(o128) |
581 | 08: psignb Pq,Qq | psignb Vdq,Wdq (66) | 591 | 08: psignb Pq,Qq | psignb Vdq,Wdq (66),(VEX),(o128) |
582 | 09: psignw Pq,Qq | psignw Vdq,Wdq (66) | 592 | 09: psignw Pq,Qq | psignw Vdq,Wdq (66),(VEX),(o128) |
583 | 0a: psignd Pq,Qq | psignd Vdq,Wdq (66) | 593 | 0a: psignd Pq,Qq | psignd Vdq,Wdq (66),(VEX),(o128) |
584 | 0b: pmulhrsw Pq,Qq | pmulhrsw Vdq,Wdq (66) | 594 | 0b: pmulhrsw Pq,Qq | pmulhrsw Vdq,Wdq (66),(VEX),(o128) |
585 | 0c: | 595 | 0c: Vpermilps /r (66),(oVEX) |
586 | 0d: | 596 | 0d: Vpermilpd /r (66),(oVEX) |
587 | 0e: | 597 | 0e: vtestps /r (66),(oVEX) |
588 | 0f: | 598 | 0f: vtestpd /r (66),(oVEX) |
589 | # 0x0f 0x38 0x10-0x1f | 599 | # 0x0f 0x38 0x10-0x1f |
590 | 10: pblendvb Vdq,Wdq (66) | 600 | 10: pblendvb Vdq,Wdq (66) |
591 | 11: | 601 | 11: |
@@ -594,90 +604,99 @@ Referrer: 3-byte escape 1 | |||
594 | 14: blendvps Vdq,Wdq (66) | 604 | 14: blendvps Vdq,Wdq (66) |
595 | 15: blendvpd Vdq,Wdq (66) | 605 | 15: blendvpd Vdq,Wdq (66) |
596 | 16: | 606 | 16: |
597 | 17: ptest Vdq,Wdq (66) | 607 | 17: ptest Vdq,Wdq (66),(VEX) |
598 | 18: | 608 | 18: vbroadcastss /r (66),(oVEX) |
599 | 19: | 609 | 19: vbroadcastsd /r (66),(oVEX),(o256) |
600 | 1a: | 610 | 1a: vbroadcastf128 /r (66),(oVEX),(o256) |
601 | 1b: | 611 | 1b: |
602 | 1c: pabsb Pq,Qq | pabsb Vdq,Wdq (66) | 612 | 1c: pabsb Pq,Qq | pabsb Vdq,Wdq (66),(VEX),(o128) |
603 | 1d: pabsw Pq,Qq | pabsw Vdq,Wdq (66) | 613 | 1d: pabsw Pq,Qq | pabsw Vdq,Wdq (66),(VEX),(o128) |
604 | 1e: pabsd Pq,Qq | pabsd Vdq,Wdq (66) | 614 | 1e: pabsd Pq,Qq | pabsd Vdq,Wdq (66),(VEX),(o128) |
605 | 1f: | 615 | 1f: |
606 | # 0x0f 0x38 0x20-0x2f | 616 | # 0x0f 0x38 0x20-0x2f |
607 | 20: pmovsxbw Vdq,Udq/Mq (66) | 617 | 20: pmovsxbw Vdq,Udq/Mq (66),(VEX),(o128) |
608 | 21: pmovsxbd Vdq,Udq/Md (66) | 618 | 21: pmovsxbd Vdq,Udq/Md (66),(VEX),(o128) |
609 | 22: pmovsxbq Vdq,Udq/Mw (66) | 619 | 22: pmovsxbq Vdq,Udq/Mw (66),(VEX),(o128) |
610 | 23: pmovsxwd Vdq,Udq/Mq (66) | 620 | 23: pmovsxwd Vdq,Udq/Mq (66),(VEX),(o128) |
611 | 24: pmovsxwq Vdq,Udq/Md (66) | 621 | 24: pmovsxwq Vdq,Udq/Md (66),(VEX),(o128) |
612 | 25: pmovsxdq Vdq,Udq/Mq (66) | 622 | 25: pmovsxdq Vdq,Udq/Mq (66),(VEX),(o128) |
613 | 26: | 623 | 26: |
614 | 27: | 624 | 27: |
615 | 28: pmuldq Vdq,Wdq (66) | 625 | 28: pmuldq Vdq,Wdq (66),(VEX),(o128) |
616 | 29: pcmpeqq Vdq,Wdq (66) | 626 | 29: pcmpeqq Vdq,Wdq (66),(VEX),(o128) |
617 | 2a: movntdqa Vdq,Mdq (66) | 627 | 2a: movntdqa Vdq,Mdq (66),(VEX),(o128) |
618 | 2b: packusdw Vdq,Wdq (66) | 628 | 2b: packusdw Vdq,Wdq (66),(VEX),(o128) |
619 | 2c: | 629 | 2c: vmaskmovps(ld) /r (66),(oVEX) |
620 | 2d: | 630 | 2d: vmaskmovpd(ld) /r (66),(oVEX) |
621 | 2e: | 631 | 2e: vmaskmovps(st) /r (66),(oVEX) |
622 | 2f: | 632 | 2f: vmaskmovpd(st) /r (66),(oVEX) |
623 | # 0x0f 0x38 0x30-0x3f | 633 | # 0x0f 0x38 0x30-0x3f |
624 | 30: pmovzxbw Vdq,Udq/Mq (66) | 634 | 30: pmovzxbw Vdq,Udq/Mq (66),(VEX),(o128) |
625 | 31: pmovzxbd Vdq,Udq/Md (66) | 635 | 31: pmovzxbd Vdq,Udq/Md (66),(VEX),(o128) |
626 | 32: pmovzxbq Vdq,Udq/Mw (66) | 636 | 32: pmovzxbq Vdq,Udq/Mw (66),(VEX),(o128) |
627 | 33: pmovzxwd Vdq,Udq/Mq (66) | 637 | 33: pmovzxwd Vdq,Udq/Mq (66),(VEX),(o128) |
628 | 34: pmovzxwq Vdq,Udq/Md (66) | 638 | 34: pmovzxwq Vdq,Udq/Md (66),(VEX),(o128) |
629 | 35: pmovzxdq Vdq,Udq/Mq (66) | 639 | 35: pmovzxdq Vdq,Udq/Mq (66),(VEX),(o128) |
630 | 36: | 640 | 36: |
631 | 37: pcmpgtq Vdq,Wdq (66) | 641 | 37: pcmpgtq Vdq,Wdq (66),(VEX),(o128) |
632 | 38: pminsb Vdq,Wdq (66) | 642 | 38: pminsb Vdq,Wdq (66),(VEX),(o128) |
633 | 39: pminsd Vdq,Wdq (66) | 643 | 39: pminsd Vdq,Wdq (66),(VEX),(o128) |
634 | 3a: pminuw Vdq,Wdq (66) | 644 | 3a: pminuw Vdq,Wdq (66),(VEX),(o128) |
635 | 3b: pminud Vdq,Wdq (66) | 645 | 3b: pminud Vdq,Wdq (66),(VEX),(o128) |
636 | 3c: pmaxsb Vdq,Wdq (66) | 646 | 3c: pmaxsb Vdq,Wdq (66),(VEX),(o128) |
637 | 3d: pmaxsd Vdq,Wdq (66) | 647 | 3d: pmaxsd Vdq,Wdq (66),(VEX),(o128) |
638 | 3e: pmaxuw Vdq,Wdq (66) | 648 | 3e: pmaxuw Vdq,Wdq (66),(VEX),(o128) |
639 | 3f: pmaxud Vdq,Wdq (66) | 649 | 3f: pmaxud Vdq,Wdq (66),(VEX),(o128) |
640 | # 0x0f 0x38 0x4f-0xff | 650 | # 0x0f 0x38 0x4f-0xff |
641 | 40: pmulld Vdq,Wdq (66) | 651 | 40: pmulld Vdq,Wdq (66),(VEX),(o128) |
642 | 41: phminposuw Vdq,Wdq (66) | 652 | 41: phminposuw Vdq,Wdq (66),(VEX),(o128) |
643 | 80: INVEPT Gd/q,Mdq (66) | 653 | 80: INVEPT Gd/q,Mdq (66) |
644 | 81: INVPID Gd/q,Mdq (66) | 654 | 81: INVPID Gd/q,Mdq (66) |
645 | db: aesimc Vdq,Wdq (66) | 655 | db: aesimc Vdq,Wdq (66),(VEX),(o128) |
646 | dc: aesenc Vdq,Wdq (66) | 656 | dc: aesenc Vdq,Wdq (66),(VEX),(o128) |
647 | dd: aesenclast Vdq,Wdq (66) | 657 | dd: aesenclast Vdq,Wdq (66),(VEX),(o128) |
648 | de: aesdec Vdq,Wdq (66) | 658 | de: aesdec Vdq,Wdq (66),(VEX),(o128) |
649 | df: aesdeclast Vdq,Wdq (66) | 659 | df: aesdeclast Vdq,Wdq (66),(VEX),(o128) |
650 | f0: MOVBE Gv,Mv | CRC32 Gd,Eb (F2) | 660 | f0: MOVBE Gv,Mv | CRC32 Gd,Eb (F2) |
651 | f1: MOVBE Mv,Gv | CRC32 Gd,Ev (F2) | 661 | f1: MOVBE Mv,Gv | CRC32 Gd,Ev (F2) |
652 | EndTable | 662 | EndTable |
653 | 663 | ||
654 | Table: 3-byte opcode 2 (0x0f 0x3a) | 664 | Table: 3-byte opcode 2 (0x0f 0x3a) |
655 | Referrer: 3-byte escape 2 | 665 | Referrer: 3-byte escape 2 |
666 | AVXcode: 3 | ||
656 | # 0x0f 0x3a 0x00-0xff | 667 | # 0x0f 0x3a 0x00-0xff |
657 | 08: roundps Vdq,Wdq,Ib (66) | 668 | 04: vpermilps /r,Ib (66),(oVEX) |
658 | 09: roundpd Vdq,Wdq,Ib (66) | 669 | 05: vpermilpd /r,Ib (66),(oVEX) |
659 | 0a: roundss Vss,Wss,Ib (66) | 670 | 06: vperm2f128 /r,Ib (66),(oVEX),(o256) |
660 | 0b: roundsd Vsd,Wsd,Ib (66) | 671 | 08: roundps Vdq,Wdq,Ib (66),(VEX) |
661 | 0c: blendps Vdq,Wdq,Ib (66) | 672 | 09: roundpd Vdq,Wdq,Ib (66),(VEX) |
662 | 0d: blendpd Vdq,Wdq,Ib (66) | 673 | 0a: roundss Vss,Wss,Ib (66),(VEX),(o128) |
663 | 0e: pblendw Vdq,Wdq,Ib (66) | 674 | 0b: roundsd Vsd,Wsd,Ib (66),(VEX),(o128) |
664 | 0f: palignr Pq,Qq,Ib | palignr Vdq,Wdq,Ib (66) | 675 | 0c: blendps Vdq,Wdq,Ib (66),(VEX) |
665 | 14: pextrb Rd/Mb,Vdq,Ib (66) | 676 | 0d: blendpd Vdq,Wdq,Ib (66),(VEX) |
666 | 15: pextrw Rd/Mw,Vdq,Ib (66) | 677 | 0e: pblendw Vdq,Wdq,Ib (66),(VEX),(o128) |
667 | 16: pextrd/pextrq Ed/q,Vdq,Ib (66) | 678 | 0f: palignr Pq,Qq,Ib | palignr Vdq,Wdq,Ib (66),(VEX),(o128) |
668 | 17: extractps Ed,Vdq,Ib (66) | 679 | 14: pextrb Rd/Mb,Vdq,Ib (66),(VEX),(o128) |
669 | 20: pinsrb Vdq,Rd/q/Mb,Ib (66) | 680 | 15: pextrw Rd/Mw,Vdq,Ib (66),(VEX),(o128) |
670 | 21: insertps Vdq,Udq/Md,Ib (66) | 681 | 16: pextrd/pextrq Ed/q,Vdq,Ib (66),(VEX),(o128) |
671 | 22: pinsrd/pinsrq Vdq,Ed/q,Ib (66) | 682 | 17: extractps Ed,Vdq,Ib (66),(VEX),(o128) |
672 | 40: dpps Vdq,Wdq,Ib (66) | 683 | 18: vinsertf128 /r,Ib (66),(oVEX),(o256) |
673 | 41: dppd Vdq,Wdq,Ib (66) | 684 | 19: vextractf128 /r,Ib (66),(oVEX),(o256) |
674 | 42: mpsadbw Vdq,Wdq,Ib (66) | 685 | 20: pinsrb Vdq,Rd/q/Mb,Ib (66),(VEX),(o128) |
675 | 44: pclmulq Vdq,Wdq,Ib (66) | 686 | 21: insertps Vdq,Udq/Md,Ib (66),(VEX),(o128) |
676 | 60: pcmpestrm Vdq,Wdq,Ib (66) | 687 | 22: pinsrd/pinsrq Vdq,Ed/q,Ib (66),(VEX),(o128) |
677 | 61: pcmpestri Vdq,Wdq,Ib (66) | 688 | 40: dpps Vdq,Wdq,Ib (66),(VEX) |
678 | 62: pcmpistrm Vdq,Wdq,Ib (66) | 689 | 41: dppd Vdq,Wdq,Ib (66),(VEX),(o128) |
679 | 63: pcmpistri Vdq,Wdq,Ib (66) | 690 | 42: mpsadbw Vdq,Wdq,Ib (66),(VEX),(o128) |
680 | df: aeskeygenassist Vdq,Wdq,Ib (66) | 691 | 44: pclmulq Vdq,Wdq,Ib (66),(VEX),(o128) |
692 | 4a: vblendvps /r,Ib (66),(oVEX) | ||
693 | 4b: vblendvpd /r,Ib (66),(oVEX) | ||
694 | 4c: vpblendvb /r,Ib (66),(oVEX),(o128) | ||
695 | 60: pcmpestrm Vdq,Wdq,Ib (66),(VEX),(o128) | ||
696 | 61: pcmpestri Vdq,Wdq,Ib (66),(VEX),(o128) | ||
697 | 62: pcmpistrm Vdq,Wdq,Ib (66),(VEX),(o128) | ||
698 | 63: pcmpistri Vdq,Wdq,Ib (66),(VEX),(o128) | ||
699 | df: aeskeygenassist Vdq,Wdq,Ib (66),(VEX),(o128) | ||
681 | EndTable | 700 | EndTable |
682 | 701 | ||
683 | GrpTable: Grp1 | 702 | GrpTable: Grp1 |
@@ -785,29 +804,29 @@ GrpTable: Grp11 | |||
785 | EndTable | 804 | EndTable |
786 | 805 | ||
787 | GrpTable: Grp12 | 806 | GrpTable: Grp12 |
788 | 2: psrlw Nq,Ib (11B) | psrlw Udq,Ib (66),(11B) | 807 | 2: psrlw Nq,Ib (11B) | psrlw Udq,Ib (66),(11B),(VEX),(o128) |
789 | 4: psraw Nq,Ib (11B) | psraw Udq,Ib (66),(11B) | 808 | 4: psraw Nq,Ib (11B) | psraw Udq,Ib (66),(11B),(VEX),(o128) |
790 | 6: psllw Nq,Ib (11B) | psllw Udq,Ib (66),(11B) | 809 | 6: psllw Nq,Ib (11B) | psllw Udq,Ib (66),(11B),(VEX),(o128) |
791 | EndTable | 810 | EndTable |
792 | 811 | ||
793 | GrpTable: Grp13 | 812 | GrpTable: Grp13 |
794 | 2: psrld Nq,Ib (11B) | psrld Udq,Ib (66),(11B) | 813 | 2: psrld Nq,Ib (11B) | psrld Udq,Ib (66),(11B),(VEX),(o128) |
795 | 4: psrad Nq,Ib (11B) | psrad Udq,Ib (66),(11B) | 814 | 4: psrad Nq,Ib (11B) | psrad Udq,Ib (66),(11B),(VEX),(o128) |
796 | 6: pslld Nq,Ib (11B) | pslld Udq,Ib (66),(11B) | 815 | 6: pslld Nq,Ib (11B) | pslld Udq,Ib (66),(11B),(VEX),(o128) |
797 | EndTable | 816 | EndTable |
798 | 817 | ||
799 | GrpTable: Grp14 | 818 | GrpTable: Grp14 |
800 | 2: psrlq Nq,Ib (11B) | psrlq Udq,Ib (66),(11B) | 819 | 2: psrlq Nq,Ib (11B) | psrlq Udq,Ib (66),(11B),(VEX),(o128) |
801 | 3: psrldq Udq,Ib (66),(11B) | 820 | 3: psrldq Udq,Ib (66),(11B),(VEX),(o128) |
802 | 6: psllq Nq,Ib (11B) | psllq Udq,Ib (66),(11B) | 821 | 6: psllq Nq,Ib (11B) | psllq Udq,Ib (66),(11B),(VEX),(o128) |
803 | 7: pslldq Udq,Ib (66),(11B) | 822 | 7: pslldq Udq,Ib (66),(11B),(VEX),(o128) |
804 | EndTable | 823 | EndTable |
805 | 824 | ||
806 | GrpTable: Grp15 | 825 | GrpTable: Grp15 |
807 | 0: fxsave | 826 | 0: fxsave |
808 | 1: fxstor | 827 | 1: fxstor |
809 | 2: ldmxcsr | 828 | 2: ldmxcsr (VEX) |
810 | 3: stmxcsr | 829 | 3: stmxcsr (VEX) |
811 | 4: XSAVE | 830 | 4: XSAVE |
812 | 5: XRSTOR | lfence (11B) | 831 | 5: XRSTOR | lfence (11B) |
813 | 6: mfence (11B) | 832 | 6: mfence (11B) |
diff --git a/arch/x86/tools/gen-insn-attr-x86.awk b/arch/x86/tools/gen-insn-attr-x86.awk index 7d5492951e22..e34e92a28eb6 100644 --- a/arch/x86/tools/gen-insn-attr-x86.awk +++ b/arch/x86/tools/gen-insn-attr-x86.awk | |||
@@ -13,6 +13,18 @@ function check_awk_implement() { | |||
13 | return "" | 13 | return "" |
14 | } | 14 | } |
15 | 15 | ||
16 | # Clear working vars | ||
17 | function clear_vars() { | ||
18 | delete table | ||
19 | delete lptable2 | ||
20 | delete lptable1 | ||
21 | delete lptable3 | ||
22 | eid = -1 # escape id | ||
23 | gid = -1 # group id | ||
24 | aid = -1 # AVX id | ||
25 | tname = "" | ||
26 | } | ||
27 | |||
16 | BEGIN { | 28 | BEGIN { |
17 | # Implementation error checking | 29 | # Implementation error checking |
18 | awkchecked = check_awk_implement() | 30 | awkchecked = check_awk_implement() |
@@ -24,11 +36,15 @@ BEGIN { | |||
24 | 36 | ||
25 | # Setup generating tables | 37 | # Setup generating tables |
26 | print "/* x86 opcode map generated from x86-opcode-map.txt */" | 38 | print "/* x86 opcode map generated from x86-opcode-map.txt */" |
27 | print "/* Do not change this code. */" | 39 | print "/* Do not change this code. */\n" |
28 | ggid = 1 | 40 | ggid = 1 |
29 | geid = 1 | 41 | geid = 1 |
42 | gaid = 0 | ||
43 | delete etable | ||
44 | delete gtable | ||
45 | delete atable | ||
30 | 46 | ||
31 | opnd_expr = "^[[:alpha:]]" | 47 | opnd_expr = "^[[:alpha:]/]" |
32 | ext_expr = "^\\(" | 48 | ext_expr = "^\\(" |
33 | sep_expr = "^\\|$" | 49 | sep_expr = "^\\|$" |
34 | group_expr = "^Grp[[:alnum:]]+" | 50 | group_expr = "^Grp[[:alnum:]]+" |
@@ -46,19 +62,19 @@ BEGIN { | |||
46 | imm_flag["Ob"] = "INAT_MOFFSET" | 62 | imm_flag["Ob"] = "INAT_MOFFSET" |
47 | imm_flag["Ov"] = "INAT_MOFFSET" | 63 | imm_flag["Ov"] = "INAT_MOFFSET" |
48 | 64 | ||
49 | modrm_expr = "^([CDEGMNPQRSUVW][[:lower:]]+|NTA|T[012])" | 65 | modrm_expr = "^([CDEGMNPQRSUVW/][[:lower:]]+|NTA|T[012])" |
50 | force64_expr = "\\([df]64\\)" | 66 | force64_expr = "\\([df]64\\)" |
51 | rex_expr = "^REX(\\.[XRWB]+)*" | 67 | rex_expr = "^REX(\\.[XRWB]+)*" |
52 | fpu_expr = "^ESC" # TODO | 68 | fpu_expr = "^ESC" # TODO |
53 | 69 | ||
54 | lprefix1_expr = "\\(66\\)" | 70 | lprefix1_expr = "\\(66\\)" |
55 | delete lptable1 | 71 | lprefix2_expr = "\\(F3\\)" |
56 | lprefix2_expr = "\\(F2\\)" | 72 | lprefix3_expr = "\\(F2\\)" |
57 | delete lptable2 | ||
58 | lprefix3_expr = "\\(F3\\)" | ||
59 | delete lptable3 | ||
60 | max_lprefix = 4 | 73 | max_lprefix = 4 |
61 | 74 | ||
75 | vexok_expr = "\\(VEX\\)" | ||
76 | vexonly_expr = "\\(oVEX\\)" | ||
77 | |||
62 | prefix_expr = "\\(Prefix\\)" | 78 | prefix_expr = "\\(Prefix\\)" |
63 | prefix_num["Operand-Size"] = "INAT_PFX_OPNDSZ" | 79 | prefix_num["Operand-Size"] = "INAT_PFX_OPNDSZ" |
64 | prefix_num["REPNE"] = "INAT_PFX_REPNE" | 80 | prefix_num["REPNE"] = "INAT_PFX_REPNE" |
@@ -71,12 +87,10 @@ BEGIN { | |||
71 | prefix_num["SEG=GS"] = "INAT_PFX_GS" | 87 | prefix_num["SEG=GS"] = "INAT_PFX_GS" |
72 | prefix_num["SEG=SS"] = "INAT_PFX_SS" | 88 | prefix_num["SEG=SS"] = "INAT_PFX_SS" |
73 | prefix_num["Address-Size"] = "INAT_PFX_ADDRSZ" | 89 | prefix_num["Address-Size"] = "INAT_PFX_ADDRSZ" |
90 | prefix_num["2bytes-VEX"] = "INAT_PFX_VEX2" | ||
91 | prefix_num["3bytes-VEX"] = "INAT_PFX_VEX3" | ||
74 | 92 | ||
75 | delete table | 93 | clear_vars() |
76 | delete etable | ||
77 | delete gtable | ||
78 | eid = -1 | ||
79 | gid = -1 | ||
80 | } | 94 | } |
81 | 95 | ||
82 | function semantic_error(msg) { | 96 | function semantic_error(msg) { |
@@ -97,14 +111,12 @@ function array_size(arr, i,c) { | |||
97 | 111 | ||
98 | /^Table:/ { | 112 | /^Table:/ { |
99 | print "/* " $0 " */" | 113 | print "/* " $0 " */" |
114 | if (tname != "") | ||
115 | semantic_error("Hit Table: before EndTable:."); | ||
100 | } | 116 | } |
101 | 117 | ||
102 | /^Referrer:/ { | 118 | /^Referrer:/ { |
103 | if (NF == 1) { | 119 | if (NF != 1) { |
104 | # primary opcode table | ||
105 | tname = "inat_primary_table" | ||
106 | eid = -1 | ||
107 | } else { | ||
108 | # escape opcode table | 120 | # escape opcode table |
109 | ref = "" | 121 | ref = "" |
110 | for (i = 2; i <= NF; i++) | 122 | for (i = 2; i <= NF; i++) |
@@ -114,6 +126,19 @@ function array_size(arr, i,c) { | |||
114 | } | 126 | } |
115 | } | 127 | } |
116 | 128 | ||
129 | /^AVXcode:/ { | ||
130 | if (NF != 1) { | ||
131 | # AVX/escape opcode table | ||
132 | aid = $2 | ||
133 | if (gaid <= aid) | ||
134 | gaid = aid + 1 | ||
135 | if (tname == "") # AVX only opcode table | ||
136 | tname = sprintf("inat_avx_table_%d", $2) | ||
137 | } | ||
138 | if (aid == -1 && eid == -1) # primary opcode table | ||
139 | tname = "inat_primary_table" | ||
140 | } | ||
141 | |||
117 | /^GrpTable:/ { | 142 | /^GrpTable:/ { |
118 | print "/* " $0 " */" | 143 | print "/* " $0 " */" |
119 | if (!($2 in group)) | 144 | if (!($2 in group)) |
@@ -162,30 +187,33 @@ function print_table(tbl,name,fmt,n) | |||
162 | print_table(table, tname "[INAT_OPCODE_TABLE_SIZE]", | 187 | print_table(table, tname "[INAT_OPCODE_TABLE_SIZE]", |
163 | "0x%02x", 256) | 188 | "0x%02x", 256) |
164 | etable[eid,0] = tname | 189 | etable[eid,0] = tname |
190 | if (aid >= 0) | ||
191 | atable[aid,0] = tname | ||
165 | } | 192 | } |
166 | if (array_size(lptable1) != 0) { | 193 | if (array_size(lptable1) != 0) { |
167 | print_table(lptable1,tname "_1[INAT_OPCODE_TABLE_SIZE]", | 194 | print_table(lptable1,tname "_1[INAT_OPCODE_TABLE_SIZE]", |
168 | "0x%02x", 256) | 195 | "0x%02x", 256) |
169 | etable[eid,1] = tname "_1" | 196 | etable[eid,1] = tname "_1" |
197 | if (aid >= 0) | ||
198 | atable[aid,1] = tname "_1" | ||
170 | } | 199 | } |
171 | if (array_size(lptable2) != 0) { | 200 | if (array_size(lptable2) != 0) { |
172 | print_table(lptable2,tname "_2[INAT_OPCODE_TABLE_SIZE]", | 201 | print_table(lptable2,tname "_2[INAT_OPCODE_TABLE_SIZE]", |
173 | "0x%02x", 256) | 202 | "0x%02x", 256) |
174 | etable[eid,2] = tname "_2" | 203 | etable[eid,2] = tname "_2" |
204 | if (aid >= 0) | ||
205 | atable[aid,2] = tname "_2" | ||
175 | } | 206 | } |
176 | if (array_size(lptable3) != 0) { | 207 | if (array_size(lptable3) != 0) { |
177 | print_table(lptable3,tname "_3[INAT_OPCODE_TABLE_SIZE]", | 208 | print_table(lptable3,tname "_3[INAT_OPCODE_TABLE_SIZE]", |
178 | "0x%02x", 256) | 209 | "0x%02x", 256) |
179 | etable[eid,3] = tname "_3" | 210 | etable[eid,3] = tname "_3" |
211 | if (aid >= 0) | ||
212 | atable[aid,3] = tname "_3" | ||
180 | } | 213 | } |
181 | } | 214 | } |
182 | print "" | 215 | print "" |
183 | delete table | 216 | clear_vars() |
184 | delete lptable1 | ||
185 | delete lptable2 | ||
186 | delete lptable3 | ||
187 | gid = -1 | ||
188 | eid = -1 | ||
189 | } | 217 | } |
190 | 218 | ||
191 | function add_flags(old,new) { | 219 | function add_flags(old,new) { |
@@ -284,6 +312,14 @@ function convert_operands(opnd, i,imm,mod) | |||
284 | if (match(opcode, fpu_expr)) | 312 | if (match(opcode, fpu_expr)) |
285 | flags = add_flags(flags, "INAT_MODRM") | 313 | flags = add_flags(flags, "INAT_MODRM") |
286 | 314 | ||
315 | # check VEX only code | ||
316 | if (match(ext, vexonly_expr)) | ||
317 | flags = add_flags(flags, "INAT_VEXOK | INAT_VEXONLY") | ||
318 | |||
319 | # check VEX only code | ||
320 | if (match(ext, vexok_expr)) | ||
321 | flags = add_flags(flags, "INAT_VEXOK") | ||
322 | |||
287 | # check prefixes | 323 | # check prefixes |
288 | if (match(ext, prefix_expr)) { | 324 | if (match(ext, prefix_expr)) { |
289 | if (!prefix_num[opcode]) | 325 | if (!prefix_num[opcode]) |
@@ -330,5 +366,15 @@ END { | |||
330 | for (j = 0; j < max_lprefix; j++) | 366 | for (j = 0; j < max_lprefix; j++) |
331 | if (gtable[i,j]) | 367 | if (gtable[i,j]) |
332 | print " ["i"]["j"] = "gtable[i,j]"," | 368 | print " ["i"]["j"] = "gtable[i,j]"," |
369 | print "};\n" | ||
370 | # print AVX opcode map's array | ||
371 | print "/* AVX opcode map array */" | ||
372 | print "const insn_attr_t const *inat_avx_tables[X86_VEX_M_MAX + 1]"\ | ||
373 | "[INAT_LSTPFX_MAX + 1] = {" | ||
374 | for (i = 0; i < gaid; i++) | ||
375 | for (j = 0; j < max_lprefix; j++) | ||
376 | if (atable[i,j]) | ||
377 | print " ["i"]["j"] = "atable[i,j]"," | ||
333 | print "};" | 378 | print "};" |
334 | } | 379 | } |
380 | |||