aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
Diffstat
-rw-r--r--drivers/net/wireless/ath/ath5k/ahb.c44
-rw-r--r--drivers/net/wireless/ath/ath5k/ani.c84
-rw-r--r--drivers/net/wireless/ath/ath5k/ath5k.h240
-rw-r--r--drivers/net/wireless/ath/ath5k/attach.c31
-rw-r--r--drivers/net/wireless/ath/ath5k/base.c1132
-rw-r--r--drivers/net/wireless/ath/ath5k/base.h196
-rw-r--r--drivers/net/wireless/ath/ath5k/debug.c218
-rw-r--r--drivers/net/wireless/ath/ath5k/debug.h21
-rw-r--r--drivers/net/wireless/ath/ath5k/desc.c10
-rw-r--r--drivers/net/wireless/ath/ath5k/dma.c12
-rw-r--r--drivers/net/wireless/ath/ath5k/eeprom.c4
-rw-r--r--drivers/net/wireless/ath/ath5k/initvals.c2
-rw-r--r--drivers/net/wireless/ath/ath5k/led.c68
-rw-r--r--drivers/net/wireless/ath/ath5k/mac80211-ops.c243
-rw-r--r--drivers/net/wireless/ath/ath5k/pci.c38
-rw-r--r--drivers/net/wireless/ath/ath5k/pcu.c24
-rw-r--r--drivers/net/wireless/ath/ath5k/phy.c32
-rw-r--r--drivers/net/wireless/ath/ath5k/qcu.c9
-rw-r--r--drivers/net/wireless/ath/ath5k/reset.c44
-rw-r--r--drivers/net/wireless/ath/ath5k/rfkill.c65
-rw-r--r--drivers/net/wireless/ath/ath5k/sysfs.c32
-rw-r--r--drivers/net/wireless/ath/ath5k/trace.h12
22 files changed, 1247 insertions, 1314 deletions
diff --git a/drivers/net/wireless/ath/ath5k/ahb.c b/drivers/net/wireless/ath/ath5k/ahb.c
index ba682a0b2dd8..9f69a4c9a3f3 100644
--- a/drivers/net/wireless/ath/ath5k/ahb.c
+++ b/drivers/net/wireless/ath/ath5k/ahb.c
@@ -35,8 +35,8 @@ static void ath5k_ahb_read_cachesize(struct ath_common *common, int *csz)
35static bool 35static bool
36ath5k_ahb_eeprom_read(struct ath_common *common, u32 off, u16 *data) 36ath5k_ahb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
37{ 37{
38 struct ath5k_softc *sc = common->priv; 38 struct ath5k_hw *ah = common->priv;
39 struct platform_device *pdev = to_platform_device(sc->dev); 39 struct platform_device *pdev = to_platform_device(ah->dev);
40 struct ar231x_board_config *bcfg = pdev->dev.platform_data; 40 struct ar231x_board_config *bcfg = pdev->dev.platform_data;
41 u16 *eeprom, *eeprom_end; 41 u16 *eeprom, *eeprom_end;
42 42
@@ -56,8 +56,7 @@ ath5k_ahb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
56 56
57int ath5k_hw_read_srev(struct ath5k_hw *ah) 57int ath5k_hw_read_srev(struct ath5k_hw *ah)
58{ 58{
59 struct ath5k_softc *sc = ah->ah_sc; 59 struct platform_device *pdev = to_platform_device(ah->dev);
60 struct platform_device *pdev = to_platform_device(sc->dev);
61 struct ar231x_board_config *bcfg = pdev->dev.platform_data; 60 struct ar231x_board_config *bcfg = pdev->dev.platform_data;
62 ah->ah_mac_srev = bcfg->devid; 61 ah->ah_mac_srev = bcfg->devid;
63 return 0; 62 return 0;
@@ -65,12 +64,11 @@ int ath5k_hw_read_srev(struct ath5k_hw *ah)
65 64
66static int ath5k_ahb_eeprom_read_mac(struct ath5k_hw *ah, u8 *mac) 65static int ath5k_ahb_eeprom_read_mac(struct ath5k_hw *ah, u8 *mac)
67{ 66{
68 struct ath5k_softc *sc = ah->ah_sc; 67 struct platform_device *pdev = to_platform_device(ah->dev);
69 struct platform_device *pdev = to_platform_device(sc->dev);
70 struct ar231x_board_config *bcfg = pdev->dev.platform_data; 68 struct ar231x_board_config *bcfg = pdev->dev.platform_data;
71 u8 *cfg_mac; 69 u8 *cfg_mac;
72 70
73 if (to_platform_device(sc->dev)->id == 0) 71 if (to_platform_device(ah->dev)->id == 0)
74 cfg_mac = bcfg->config->wlan0_mac; 72 cfg_mac = bcfg->config->wlan0_mac;
75 else 73 else
76 cfg_mac = bcfg->config->wlan1_mac; 74 cfg_mac = bcfg->config->wlan1_mac;
@@ -90,7 +88,7 @@ static const struct ath_bus_ops ath_ahb_bus_ops = {
90static int ath_ahb_probe(struct platform_device *pdev) 88static int ath_ahb_probe(struct platform_device *pdev)
91{ 89{
92 struct ar231x_board_config *bcfg = pdev->dev.platform_data; 90 struct ar231x_board_config *bcfg = pdev->dev.platform_data;
93 struct ath5k_softc *sc; 91 struct ath5k_hw *ah;
94 struct ieee80211_hw *hw; 92 struct ieee80211_hw *hw;
95 struct resource *res; 93 struct resource *res;
96 void __iomem *mem; 94 void __iomem *mem;
@@ -127,19 +125,19 @@ static int ath_ahb_probe(struct platform_device *pdev)
127 125
128 irq = res->start; 126 irq = res->start;
129 127
130 hw = ieee80211_alloc_hw(sizeof(struct ath5k_softc), &ath5k_hw_ops); 128 hw = ieee80211_alloc_hw(sizeof(struct ath5k_hw), &ath5k_hw_ops);
131 if (hw == NULL) { 129 if (hw == NULL) {
132 dev_err(&pdev->dev, "no memory for ieee80211_hw\n"); 130 dev_err(&pdev->dev, "no memory for ieee80211_hw\n");
133 ret = -ENOMEM; 131 ret = -ENOMEM;
134 goto err_out; 132 goto err_out;
135 } 133 }
136 134
137 sc = hw->priv; 135 ah = hw->priv;
138 sc->hw = hw; 136 ah->hw = hw;
139 sc->dev = &pdev->dev; 137 ah->dev = &pdev->dev;
140 sc->iobase = mem; 138 ah->iobase = mem;
141 sc->irq = irq; 139 ah->irq = irq;
142 sc->devid = bcfg->devid; 140 ah->devid = bcfg->devid;
143 141
144 if (bcfg->devid >= AR5K_SREV_AR2315_R6) { 142 if (bcfg->devid >= AR5K_SREV_AR2315_R6) {
145 /* Enable WMAC AHB arbitration */ 143 /* Enable WMAC AHB arbitration */
@@ -155,7 +153,7 @@ static int ath_ahb_probe(struct platform_device *pdev)
155 /* Enable WMAC DMA access (assuming 5312 or 231x*/ 153 /* Enable WMAC DMA access (assuming 5312 or 231x*/
156 /* TODO: check other platforms */ 154 /* TODO: check other platforms */
157 reg = __raw_readl((void __iomem *) AR5K_AR5312_ENABLE); 155 reg = __raw_readl((void __iomem *) AR5K_AR5312_ENABLE);
158 if (to_platform_device(sc->dev)->id == 0) 156 if (to_platform_device(ah->dev)->id == 0)
159 reg |= AR5K_AR5312_ENABLE_WLAN0; 157 reg |= AR5K_AR5312_ENABLE_WLAN0;
160 else 158 else
161 reg |= AR5K_AR5312_ENABLE_WLAN1; 159 reg |= AR5K_AR5312_ENABLE_WLAN1;
@@ -166,13 +164,13 @@ static int ath_ahb_probe(struct platform_device *pdev)
166 * used as pass-through. Disable 2 GHz support in the 164 * used as pass-through. Disable 2 GHz support in the
167 * driver for it 165 * driver for it
168 */ 166 */
169 if (to_platform_device(sc->dev)->id == 0 && 167 if (to_platform_device(ah->dev)->id == 0 &&
170 (bcfg->config->flags & (BD_WLAN0 | BD_WLAN1)) == 168 (bcfg->config->flags & (BD_WLAN0 | BD_WLAN1)) ==
171 (BD_WLAN1 | BD_WLAN0)) 169 (BD_WLAN1 | BD_WLAN0))
172 __set_bit(ATH_STAT_2G_DISABLED, sc->status); 170 __set_bit(ATH_STAT_2G_DISABLED, ah->status);
173 } 171 }
174 172
175 ret = ath5k_init_softc(sc, &ath_ahb_bus_ops); 173 ret = ath5k_init_softc(ah, &ath_ahb_bus_ops);
176 if (ret != 0) { 174 if (ret != 0) {
177 dev_err(&pdev->dev, "failed to attach device, err=%d\n", ret); 175 dev_err(&pdev->dev, "failed to attach device, err=%d\n", ret);
178 ret = -ENODEV; 176 ret = -ENODEV;
@@ -194,13 +192,13 @@ static int ath_ahb_remove(struct platform_device *pdev)
194{ 192{
195 struct ar231x_board_config *bcfg = pdev->dev.platform_data; 193 struct ar231x_board_config *bcfg = pdev->dev.platform_data;
196 struct ieee80211_hw *hw = platform_get_drvdata(pdev); 194 struct ieee80211_hw *hw = platform_get_drvdata(pdev);
197 struct ath5k_softc *sc; 195 struct ath5k_hw *ah;
198 u32 reg; 196 u32 reg;
199 197
200 if (!hw) 198 if (!hw)
201 return 0; 199 return 0;
202 200
203 sc = hw->priv; 201 ah = hw->priv;
204 202
205 if (bcfg->devid >= AR5K_SREV_AR2315_R6) { 203 if (bcfg->devid >= AR5K_SREV_AR2315_R6) {
206 /* Disable WMAC AHB arbitration */ 204 /* Disable WMAC AHB arbitration */
@@ -210,14 +208,14 @@ static int ath_ahb_remove(struct platform_device *pdev)
210 } else { 208 } else {
211 /*Stop DMA access */ 209 /*Stop DMA access */
212 reg = __raw_readl((void __iomem *) AR5K_AR5312_ENABLE); 210 reg = __raw_readl((void __iomem *) AR5K_AR5312_ENABLE);
213 if (to_platform_device(sc->dev)->id == 0) 211 if (to_platform_device(ah->dev)->id == 0)
214 reg &= ~AR5K_AR5312_ENABLE_WLAN0; 212 reg &= ~AR5K_AR5312_ENABLE_WLAN0;
215 else 213 else
216 reg &= ~AR5K_AR5312_ENABLE_WLAN1; 214 reg &= ~AR5K_AR5312_ENABLE_WLAN1;
217 __raw_writel(reg, (void __iomem *) AR5K_AR5312_ENABLE); 215 __raw_writel(reg, (void __iomem *) AR5K_AR5312_ENABLE);
218 } 216 }
219 217
220 ath5k_deinit_softc(sc); 218 ath5k_deinit_softc(ah);
221 platform_set_drvdata(pdev, NULL); 219 platform_set_drvdata(pdev, NULL);
222 ieee80211_free_hw(hw); 220 ieee80211_free_hw(hw);
223 221
diff --git a/drivers/net/wireless/ath/ath5k/ani.c b/drivers/net/wireless/ath/ath5k/ani.c
index 2f0b967a6d8e..603ae15f139b 100644
--- a/drivers/net/wireless/ath/ath5k/ani.c
+++ b/drivers/net/wireless/ath/ath5k/ani.c
@@ -74,7 +74,7 @@ ath5k_ani_set_noise_immunity_level(struct ath5k_hw *ah, int level)
74 static const s8 fr[] = { -78, -80 }; 74 static const s8 fr[] = { -78, -80 };
75#endif 75#endif
76 if (level < 0 || level >= ARRAY_SIZE(sz)) { 76 if (level < 0 || level >= ARRAY_SIZE(sz)) {
77 ATH5K_ERR(ah->ah_sc, "noise immunity level %d out of range", 77 ATH5K_ERR(ah, "noise immunity level %d out of range",
78 level); 78 level);
79 return; 79 return;
80 } 80 }
@@ -88,8 +88,8 @@ ath5k_ani_set_noise_immunity_level(struct ath5k_hw *ah, int level)
88 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_SIG, 88 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_SIG,
89 AR5K_PHY_SIG_FIRPWR, fr[level]); 89 AR5K_PHY_SIG_FIRPWR, fr[level]);
90 90
91 ah->ah_sc->ani_state.noise_imm_level = level; 91 ah->ani_state.noise_imm_level = level;
92 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "new level %d", level); 92 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "new level %d", level);
93} 93}
94 94
95 95
@@ -105,8 +105,8 @@ ath5k_ani_set_spur_immunity_level(struct ath5k_hw *ah, int level)
105 static const int val[] = { 2, 4, 6, 8, 10, 12, 14, 16 }; 105 static const int val[] = { 2, 4, 6, 8, 10, 12, 14, 16 };
106 106
107 if (level < 0 || level >= ARRAY_SIZE(val) || 107 if (level < 0 || level >= ARRAY_SIZE(val) ||
108 level > ah->ah_sc->ani_state.max_spur_level) { 108 level > ah->ani_state.max_spur_level) {
109 ATH5K_ERR(ah->ah_sc, "spur immunity level %d out of range", 109 ATH5K_ERR(ah, "spur immunity level %d out of range",
110 level); 110 level);
111 return; 111 return;
112 } 112 }
@@ -114,8 +114,8 @@ ath5k_ani_set_spur_immunity_level(struct ath5k_hw *ah, int level)
114 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_OFDM_SELFCORR, 114 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_OFDM_SELFCORR,
115 AR5K_PHY_OFDM_SELFCORR_CYPWR_THR1, val[level]); 115 AR5K_PHY_OFDM_SELFCORR_CYPWR_THR1, val[level]);
116 116
117 ah->ah_sc->ani_state.spur_level = level; 117 ah->ani_state.spur_level = level;
118 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "new level %d", level); 118 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "new level %d", level);
119} 119}
120 120
121 121
@@ -130,15 +130,15 @@ ath5k_ani_set_firstep_level(struct ath5k_hw *ah, int level)
130 static const int val[] = { 0, 4, 8 }; 130 static const int val[] = { 0, 4, 8 };
131 131
132 if (level < 0 || level >= ARRAY_SIZE(val)) { 132 if (level < 0 || level >= ARRAY_SIZE(val)) {
133 ATH5K_ERR(ah->ah_sc, "firstep level %d out of range", level); 133 ATH5K_ERR(ah, "firstep level %d out of range", level);
134 return; 134 return;
135 } 135 }
136 136
137 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_SIG, 137 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_SIG,
138 AR5K_PHY_SIG_FIRSTEP, val[level]); 138 AR5K_PHY_SIG_FIRSTEP, val[level]);
139 139
140 ah->ah_sc->ani_state.firstep_level = level; 140 ah->ani_state.firstep_level = level;
141 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "new level %d", level); 141 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "new level %d", level);
142} 142}
143 143
144 144
@@ -178,8 +178,8 @@ ath5k_ani_set_ofdm_weak_signal_detection(struct ath5k_hw *ah, bool on)
178 AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_WEAK_OFDM_LOW_THR, 178 AR5K_REG_DISABLE_BITS(ah, AR5K_PHY_WEAK_OFDM_LOW_THR,
179 AR5K_PHY_WEAK_OFDM_LOW_THR_SELFCOR_EN); 179 AR5K_PHY_WEAK_OFDM_LOW_THR_SELFCOR_EN);
180 180
181 ah->ah_sc->ani_state.ofdm_weak_sig = on; 181 ah->ani_state.ofdm_weak_sig = on;
182 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "turned %s", 182 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "turned %s",
183 on ? "on" : "off"); 183 on ? "on" : "off");
184} 184}
185 185
@@ -195,8 +195,8 @@ ath5k_ani_set_cck_weak_signal_detection(struct ath5k_hw *ah, bool on)
195 static const int val[] = { 8, 6 }; 195 static const int val[] = { 8, 6 };
196 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_CCK_CROSSCORR, 196 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_CCK_CROSSCORR,
197 AR5K_PHY_CCK_CROSSCORR_WEAK_SIG_THR, val[on]); 197 AR5K_PHY_CCK_CROSSCORR_WEAK_SIG_THR, val[on]);
198 ah->ah_sc->ani_state.cck_weak_sig = on; 198 ah->ani_state.cck_weak_sig = on;
199 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "turned %s", 199 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "turned %s",
200 on ? "on" : "off"); 200 on ? "on" : "off");
201} 201}
202 202
@@ -218,7 +218,7 @@ ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as,
218{ 218{
219 int rssi = ewma_read(&ah->ah_beacon_rssi_avg); 219 int rssi = ewma_read(&ah->ah_beacon_rssi_avg);
220 220
221 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "raise immunity (%s)", 221 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "raise immunity (%s)",
222 ofdm_trigger ? "ODFM" : "CCK"); 222 ofdm_trigger ? "ODFM" : "CCK");
223 223
224 /* first: raise noise immunity */ 224 /* first: raise noise immunity */
@@ -229,13 +229,13 @@ ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as,
229 229
230 /* only OFDM: raise spur immunity level */ 230 /* only OFDM: raise spur immunity level */
231 if (ofdm_trigger && 231 if (ofdm_trigger &&
232 as->spur_level < ah->ah_sc->ani_state.max_spur_level) { 232 as->spur_level < ah->ani_state.max_spur_level) {
233 ath5k_ani_set_spur_immunity_level(ah, as->spur_level + 1); 233 ath5k_ani_set_spur_immunity_level(ah, as->spur_level + 1);
234 return; 234 return;
235 } 235 }
236 236
237 /* AP mode */ 237 /* AP mode */
238 if (ah->ah_sc->opmode == NL80211_IFTYPE_AP) { 238 if (ah->opmode == NL80211_IFTYPE_AP) {
239 if (as->firstep_level < ATH5K_ANI_MAX_FIRSTEP_LVL) 239 if (as->firstep_level < ATH5K_ANI_MAX_FIRSTEP_LVL)
240 ath5k_ani_set_firstep_level(ah, as->firstep_level + 1); 240 ath5k_ani_set_firstep_level(ah, as->firstep_level + 1);
241 return; 241 return;
@@ -248,7 +248,7 @@ ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as,
248 * don't shut out a remote node by raising immunity too high. */ 248 * don't shut out a remote node by raising immunity too high. */
249 249
250 if (rssi > ATH5K_ANI_RSSI_THR_HIGH) { 250 if (rssi > ATH5K_ANI_RSSI_THR_HIGH) {
251 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, 251 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
252 "beacon RSSI high"); 252 "beacon RSSI high");
253 /* only OFDM: beacon RSSI is high, we can disable ODFM weak 253 /* only OFDM: beacon RSSI is high, we can disable ODFM weak
254 * signal detection */ 254 * signal detection */
@@ -265,7 +265,7 @@ ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as,
265 } else if (rssi > ATH5K_ANI_RSSI_THR_LOW) { 265 } else if (rssi > ATH5K_ANI_RSSI_THR_LOW) {
266 /* beacon RSSI in mid range, we need OFDM weak signal detect, 266 /* beacon RSSI in mid range, we need OFDM weak signal detect,
267 * but can raise firstep level */ 267 * but can raise firstep level */
268 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, 268 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
269 "beacon RSSI mid"); 269 "beacon RSSI mid");
270 if (ofdm_trigger && as->ofdm_weak_sig == false) 270 if (ofdm_trigger && as->ofdm_weak_sig == false)
271 ath5k_ani_set_ofdm_weak_signal_detection(ah, true); 271 ath5k_ani_set_ofdm_weak_signal_detection(ah, true);
@@ -275,7 +275,7 @@ ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as,
275 } else if (ah->ah_current_channel->band == IEEE80211_BAND_2GHZ) { 275 } else if (ah->ah_current_channel->band == IEEE80211_BAND_2GHZ) {
276 /* beacon RSSI is low. in B/G mode turn of OFDM weak signal 276 /* beacon RSSI is low. in B/G mode turn of OFDM weak signal
277 * detect and zero firstep level to maximize CCK sensitivity */ 277 * detect and zero firstep level to maximize CCK sensitivity */
278 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, 278 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
279 "beacon RSSI low, 2GHz"); 279 "beacon RSSI low, 2GHz");
280 if (ofdm_trigger && as->ofdm_weak_sig == true) 280 if (ofdm_trigger && as->ofdm_weak_sig == true)
281 ath5k_ani_set_ofdm_weak_signal_detection(ah, false); 281 ath5k_ani_set_ofdm_weak_signal_detection(ah, false);
@@ -303,9 +303,9 @@ ath5k_ani_lower_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as)
303{ 303{
304 int rssi = ewma_read(&ah->ah_beacon_rssi_avg); 304 int rssi = ewma_read(&ah->ah_beacon_rssi_avg);
305 305
306 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "lower immunity"); 306 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "lower immunity");
307 307
308 if (ah->ah_sc->opmode == NL80211_IFTYPE_AP) { 308 if (ah->opmode == NL80211_IFTYPE_AP) {
309 /* AP mode */ 309 /* AP mode */
310 if (as->firstep_level > 0) { 310 if (as->firstep_level > 0) {
311 ath5k_ani_set_firstep_level(ah, as->firstep_level - 1); 311 ath5k_ani_set_firstep_level(ah, as->firstep_level - 1);
@@ -464,7 +464,7 @@ ath5k_ani_period_restart(struct ath5k_hw *ah, struct ath5k_ani_state *as)
464void 464void
465ath5k_ani_calibration(struct ath5k_hw *ah) 465ath5k_ani_calibration(struct ath5k_hw *ah)
466{ 466{
467 struct ath5k_ani_state *as = &ah->ah_sc->ani_state; 467 struct ath5k_ani_state *as = &ah->ani_state;
468 int listen, ofdm_high, ofdm_low, cck_high, cck_low; 468 int listen, ofdm_high, ofdm_low, cck_high, cck_low;
469 469
470 /* get listen time since last call and add it to the counter because we 470 /* get listen time since last call and add it to the counter because we
@@ -483,9 +483,9 @@ ath5k_ani_calibration(struct ath5k_hw *ah)
483 ofdm_low = as->listen_time * ATH5K_ANI_OFDM_TRIG_LOW / 1000; 483 ofdm_low = as->listen_time * ATH5K_ANI_OFDM_TRIG_LOW / 1000;
484 cck_low = as->listen_time * ATH5K_ANI_CCK_TRIG_LOW / 1000; 484 cck_low = as->listen_time * ATH5K_ANI_CCK_TRIG_LOW / 1000;
485 485
486 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, 486 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
487 "listen %d (now %d)", as->listen_time, listen); 487 "listen %d (now %d)", as->listen_time, listen);
488 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, 488 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
489 "check high ofdm %d/%d cck %d/%d", 489 "check high ofdm %d/%d cck %d/%d",
490 as->ofdm_errors, ofdm_high, as->cck_errors, cck_high); 490 as->ofdm_errors, ofdm_high, as->cck_errors, cck_high);
491 491
@@ -498,7 +498,7 @@ ath5k_ani_calibration(struct ath5k_hw *ah)
498 } else if (as->listen_time > 5 * ATH5K_ANI_LISTEN_PERIOD) { 498 } else if (as->listen_time > 5 * ATH5K_ANI_LISTEN_PERIOD) {
499 /* If more than 5 (TODO: why 5?) periods have passed and we got 499 /* If more than 5 (TODO: why 5?) periods have passed and we got
500 * relatively little errors we can try to lower immunity */ 500 * relatively little errors we can try to lower immunity */
501 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, 501 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
502 "check low ofdm %d/%d cck %d/%d", 502 "check low ofdm %d/%d cck %d/%d",
503 as->ofdm_errors, ofdm_low, as->cck_errors, cck_low); 503 as->ofdm_errors, ofdm_low, as->cck_errors, cck_low);
504 504
@@ -525,7 +525,7 @@ ath5k_ani_calibration(struct ath5k_hw *ah)
525void 525void
526ath5k_ani_mib_intr(struct ath5k_hw *ah) 526ath5k_ani_mib_intr(struct ath5k_hw *ah)
527{ 527{
528 struct ath5k_ani_state *as = &ah->ah_sc->ani_state; 528 struct ath5k_ani_state *as = &ah->ani_state;
529 529
530 /* nothing to do here if HW does not have PHY error counters - they 530 /* nothing to do here if HW does not have PHY error counters - they
531 * can't be the reason for the MIB interrupt then */ 531 * can't be the reason for the MIB interrupt then */
@@ -536,7 +536,7 @@ ath5k_ani_mib_intr(struct ath5k_hw *ah)
536 ath5k_hw_reg_write(ah, 0, AR5K_OFDM_FIL_CNT); 536 ath5k_hw_reg_write(ah, 0, AR5K_OFDM_FIL_CNT);
537 ath5k_hw_reg_write(ah, 0, AR5K_CCK_FIL_CNT); 537 ath5k_hw_reg_write(ah, 0, AR5K_CCK_FIL_CNT);
538 538
539 if (ah->ah_sc->ani_state.ani_mode != ATH5K_ANI_MODE_AUTO) 539 if (ah->ani_state.ani_mode != ATH5K_ANI_MODE_AUTO)
540 return; 540 return;
541 541
542 /* If one of the errors triggered, we can get a superfluous second 542 /* If one of the errors triggered, we can get a superfluous second
@@ -547,7 +547,7 @@ ath5k_ani_mib_intr(struct ath5k_hw *ah)
547 547
548 if (as->ofdm_errors > ATH5K_ANI_OFDM_TRIG_HIGH || 548 if (as->ofdm_errors > ATH5K_ANI_OFDM_TRIG_HIGH ||
549 as->cck_errors > ATH5K_ANI_CCK_TRIG_HIGH) 549 as->cck_errors > ATH5K_ANI_CCK_TRIG_HIGH)
550 tasklet_schedule(&ah->ah_sc->ani_tasklet); 550 tasklet_schedule(&ah->ani_tasklet);
551} 551}
552 552
553 553
@@ -561,16 +561,16 @@ void
561ath5k_ani_phy_error_report(struct ath5k_hw *ah, 561ath5k_ani_phy_error_report(struct ath5k_hw *ah,
562 enum ath5k_phy_error_code phyerr) 562 enum ath5k_phy_error_code phyerr)
563{ 563{
564 struct ath5k_ani_state *as = &ah->ah_sc->ani_state; 564 struct ath5k_ani_state *as = &ah->ani_state;
565 565
566 if (phyerr == AR5K_RX_PHY_ERROR_OFDM_TIMING) { 566 if (phyerr == AR5K_RX_PHY_ERROR_OFDM_TIMING) {
567 as->ofdm_errors++; 567 as->ofdm_errors++;
568 if (as->ofdm_errors > ATH5K_ANI_OFDM_TRIG_HIGH) 568 if (as->ofdm_errors > ATH5K_ANI_OFDM_TRIG_HIGH)
569 tasklet_schedule(&ah->ah_sc->ani_tasklet); 569 tasklet_schedule(&ah->ani_tasklet);
570 } else if (phyerr == AR5K_RX_PHY_ERROR_CCK_TIMING) { 570 } else if (phyerr == AR5K_RX_PHY_ERROR_CCK_TIMING) {
571 as->cck_errors++; 571 as->cck_errors++;
572 if (as->cck_errors > ATH5K_ANI_CCK_TRIG_HIGH) 572 if (as->cck_errors > ATH5K_ANI_CCK_TRIG_HIGH)
573 tasklet_schedule(&ah->ah_sc->ani_tasklet); 573 tasklet_schedule(&ah->ani_tasklet);
574 } 574 }
575} 575}
576 576
@@ -631,24 +631,24 @@ ath5k_ani_init(struct ath5k_hw *ah, enum ath5k_ani_mode mode)
631 return; 631 return;
632 632
633 if (mode < ATH5K_ANI_MODE_OFF || mode > ATH5K_ANI_MODE_AUTO) { 633 if (mode < ATH5K_ANI_MODE_OFF || mode > ATH5K_ANI_MODE_AUTO) {
634 ATH5K_ERR(ah->ah_sc, "ANI mode %d out of range", mode); 634 ATH5K_ERR(ah, "ANI mode %d out of range", mode);
635 return; 635 return;
636 } 636 }
637 637
638 /* clear old state information */ 638 /* clear old state information */
639 memset(&ah->ah_sc->ani_state, 0, sizeof(ah->ah_sc->ani_state)); 639 memset(&ah->ani_state, 0, sizeof(ah->ani_state));
640 640
641 /* older hardware has more spur levels than newer */ 641 /* older hardware has more spur levels than newer */
642 if (ah->ah_mac_srev < AR5K_SREV_AR2414) 642 if (ah->ah_mac_srev < AR5K_SREV_AR2414)
643 ah->ah_sc->ani_state.max_spur_level = 7; 643 ah->ani_state.max_spur_level = 7;
644 else 644 else
645 ah->ah_sc->ani_state.max_spur_level = 2; 645 ah->ani_state.max_spur_level = 2;
646 646
647 /* initial values for our ani parameters */ 647 /* initial values for our ani parameters */
648 if (mode == ATH5K_ANI_MODE_OFF) { 648 if (mode == ATH5K_ANI_MODE_OFF) {
649 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "ANI off\n"); 649 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "ANI off\n");
650 } else if (mode == ATH5K_ANI_MODE_MANUAL_LOW) { 650 } else if (mode == ATH5K_ANI_MODE_MANUAL_LOW) {
651 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, 651 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
652 "ANI manual low -> high sensitivity\n"); 652 "ANI manual low -> high sensitivity\n");
653 ath5k_ani_set_noise_immunity_level(ah, 0); 653 ath5k_ani_set_noise_immunity_level(ah, 0);
654 ath5k_ani_set_spur_immunity_level(ah, 0); 654 ath5k_ani_set_spur_immunity_level(ah, 0);
@@ -656,17 +656,17 @@ ath5k_ani_init(struct ath5k_hw *ah, enum ath5k_ani_mode mode)
656 ath5k_ani_set_ofdm_weak_signal_detection(ah, true); 656 ath5k_ani_set_ofdm_weak_signal_detection(ah, true);
657 ath5k_ani_set_cck_weak_signal_detection(ah, true); 657 ath5k_ani_set_cck_weak_signal_detection(ah, true);
658 } else if (mode == ATH5K_ANI_MODE_MANUAL_HIGH) { 658 } else if (mode == ATH5K_ANI_MODE_MANUAL_HIGH) {
659 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, 659 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
660 "ANI manual high -> low sensitivity\n"); 660 "ANI manual high -> low sensitivity\n");
661 ath5k_ani_set_noise_immunity_level(ah, 661 ath5k_ani_set_noise_immunity_level(ah,
662 ATH5K_ANI_MAX_NOISE_IMM_LVL); 662 ATH5K_ANI_MAX_NOISE_IMM_LVL);
663 ath5k_ani_set_spur_immunity_level(ah, 663 ath5k_ani_set_spur_immunity_level(ah,
664 ah->ah_sc->ani_state.max_spur_level); 664 ah->ani_state.max_spur_level);
665 ath5k_ani_set_firstep_level(ah, ATH5K_ANI_MAX_FIRSTEP_LVL); 665 ath5k_ani_set_firstep_level(ah, ATH5K_ANI_MAX_FIRSTEP_LVL);
666 ath5k_ani_set_ofdm_weak_signal_detection(ah, false); 666 ath5k_ani_set_ofdm_weak_signal_detection(ah, false);
667 ath5k_ani_set_cck_weak_signal_detection(ah, false); 667 ath5k_ani_set_cck_weak_signal_detection(ah, false);
668 } else if (mode == ATH5K_ANI_MODE_AUTO) { 668 } else if (mode == ATH5K_ANI_MODE_AUTO) {
669 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "ANI auto\n"); 669 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI, "ANI auto\n");
670 ath5k_ani_set_noise_immunity_level(ah, 0); 670 ath5k_ani_set_noise_immunity_level(ah, 0);
671 ath5k_ani_set_spur_immunity_level(ah, 0); 671 ath5k_ani_set_spur_immunity_level(ah, 0);
672 ath5k_ani_set_firstep_level(ah, 0); 672 ath5k_ani_set_firstep_level(ah, 0);
@@ -692,7 +692,7 @@ ath5k_ani_init(struct ath5k_hw *ah, enum ath5k_ani_mode mode)
692 ~AR5K_RX_FILTER_PHYERR); 692 ~AR5K_RX_FILTER_PHYERR);
693 } 693 }
694 694
695 ah->ah_sc->ani_state.ani_mode = mode; 695 ah->ani_state.ani_mode = mode;
696} 696}
697 697
698 698
diff --git a/drivers/net/wireless/ath/ath5k/ath5k.h b/drivers/net/wireless/ath/ath5k/ath5k.h
index 8ff17941bb28..028958494976 100644
--- a/drivers/net/wireless/ath/ath5k/ath5k.h
+++ b/drivers/net/wireless/ath/ath5k/ath5k.h
@@ -24,8 +24,10 @@
24#define CHAN_DEBUG 0 24#define CHAN_DEBUG 0
25 25
26#include <linux/io.h> 26#include <linux/io.h>
27#include <linux/interrupt.h>
27#include <linux/types.h> 28#include <linux/types.h>
28#include <linux/average.h> 29#include <linux/average.h>
30#include <linux/leds.h>
29#include <net/mac80211.h> 31#include <net/mac80211.h>
30 32
31/* RX/TX descriptor hw structs 33/* RX/TX descriptor hw structs
@@ -36,7 +38,9 @@
36 * TODO: Make a more generic struct (eg. add more stuff to ath5k_capabilities) 38 * TODO: Make a more generic struct (eg. add more stuff to ath5k_capabilities)
37 * and clean up common bits, then introduce set/get functions in eeprom.c */ 39 * and clean up common bits, then introduce set/get functions in eeprom.c */
38#include "eeprom.h" 40#include "eeprom.h"
41#include "debug.h"
39#include "../ath.h" 42#include "../ath.h"
43#include "ani.h"
40 44
41/* PCI IDs */ 45/* PCI IDs */
42#define PCI_DEVICE_ID_ATHEROS_AR5210 0x0007 /* AR5210 */ 46#define PCI_DEVICE_ID_ATHEROS_AR5210 0x0007 /* AR5210 */
@@ -538,6 +542,27 @@ enum ath5k_tx_queue_id {
538#define AR5K_TXQ_FLAG_COMPRESSION_ENABLE 0x2000 /* Enable hw compression -not implemented-*/ 542#define AR5K_TXQ_FLAG_COMPRESSION_ENABLE 0x2000 /* Enable hw compression -not implemented-*/
539 543
540/* 544/*
545 * Data transmit queue state. One of these exists for each
546 * hardware transmit queue. Packets sent to us from above
547 * are assigned to queues based on their priority. Not all
548 * devices support a complete set of hardware transmit queues.
549 * For those devices the array sc_ac2q will map multiple
550 * priorities to fewer hardware queues (typically all to one
551 * hardware queue).
552 */
553struct ath5k_txq {
554 unsigned int qnum; /* hardware q number */
555 u32 *link; /* link ptr in last TX desc */
556 struct list_head q; /* transmit queue */
557 spinlock_t lock; /* lock on q and link */
558 bool setup;
559 int txq_len; /* number of queued buffers */
560 int txq_max; /* max allowed num of queued buffers */
561 bool txq_poll_mark;
562 unsigned int txq_stuck; /* informational counter */
563};
564
565/*
541 * A struct to hold tx queue's parameters 566 * A struct to hold tx queue's parameters
542 */ 567 */
543struct ath5k_txq_info { 568struct ath5k_txq_info {
@@ -1027,9 +1052,66 @@ struct ath5k_avg_val {
1027 int avg_weight; 1052 int avg_weight;
1028}; 1053};
1029 1054
1030/***************************************\ 1055#define ATH5K_LED_MAX_NAME_LEN 31
1031 HARDWARE ABSTRACTION LAYER STRUCTURE 1056
1032\***************************************/ 1057/*
1058 * State for LED triggers
1059 */
1060struct ath5k_led {
1061 char name[ATH5K_LED_MAX_NAME_LEN + 1]; /* name of the LED in sysfs */
1062 struct ath5k_hw *ah; /* driver state */
1063 struct led_classdev led_dev; /* led classdev */
1064};
1065
1066/* Rfkill */
1067struct ath5k_rfkill {
1068 /* GPIO PIN for rfkill */
1069 u16 gpio;
1070 /* polarity of rfkill GPIO PIN */
1071 bool polarity;
1072 /* RFKILL toggle tasklet */
1073 struct tasklet_struct toggleq;
1074};
1075
1076/* statistics */
1077struct ath5k_statistics {
1078 /* antenna use */
1079 unsigned int antenna_rx[5]; /* frames count per antenna RX */
1080 unsigned int antenna_tx[5]; /* frames count per antenna TX */
1081
1082 /* frame errors */
1083 unsigned int rx_all_count; /* all RX frames, including errors */
1084 unsigned int tx_all_count; /* all TX frames, including errors */
1085 unsigned int rx_bytes_count; /* all RX bytes, including errored pkts
1086 * and the MAC headers for each packet
1087 */
1088 unsigned int tx_bytes_count; /* all TX bytes, including errored pkts
1089 * and the MAC headers and padding for
1090 * each packet.
1091 */
1092 unsigned int rxerr_crc;
1093 unsigned int rxerr_phy;
1094 unsigned int rxerr_phy_code[32];
1095 unsigned int rxerr_fifo;
1096 unsigned int rxerr_decrypt;
1097 unsigned int rxerr_mic;
1098 unsigned int rxerr_proc;
1099 unsigned int rxerr_jumbo;
1100 unsigned int txerr_retry;
1101 unsigned int txerr_fifo;
1102 unsigned int txerr_filt;
1103
1104 /* MIB counters */
1105 unsigned int ack_fail;
1106 unsigned int rts_fail;
1107 unsigned int rts_ok;
1108 unsigned int fcs_error;
1109 unsigned int beacons;
1110
1111 unsigned int mib_intr;
1112 unsigned int rxorn_intr;
1113 unsigned int rxeol_intr;
1114};
1033 1115
1034/* 1116/*
1035 * Misc defines 1117 * Misc defines
@@ -1038,12 +1120,114 @@ struct ath5k_avg_val {
1038#define AR5K_MAX_GPIO 10 1120#define AR5K_MAX_GPIO 10
1039#define AR5K_MAX_RF_BANKS 8 1121#define AR5K_MAX_RF_BANKS 8
1040 1122
1041/* TODO: Clean up and merge with ath5k_softc */ 1123#if CHAN_DEBUG
1124#define ATH_CHAN_MAX (26 + 26 + 26 + 200 + 200)
1125#else
1126#define ATH_CHAN_MAX (14 + 14 + 14 + 252 + 20)
1127#endif
1128
1129#define ATH_RXBUF 40 /* number of RX buffers */
1130#define ATH_TXBUF 200 /* number of TX buffers */
1131#define ATH_BCBUF 4 /* number of beacon buffers */
1132#define ATH5K_TXQ_LEN_MAX (ATH_TXBUF / 4) /* bufs per queue */
1133#define ATH5K_TXQ_LEN_LOW (ATH5K_TXQ_LEN_MAX / 2) /* low mark */
1134
1135/* Driver state associated with an instance of a device */
1042struct ath5k_hw { 1136struct ath5k_hw {
1043 struct ath_common common; 1137 struct ath_common common;
1044 1138
1045 struct ath5k_softc *ah_sc; 1139 struct pci_dev *pdev;
1046 void __iomem *ah_iobase; 1140 struct device *dev; /* for dma mapping */
1141 int irq;
1142 u16 devid;
1143 void __iomem *iobase; /* address of the device */
1144 struct mutex lock; /* dev-level lock */
1145 struct ieee80211_hw *hw; /* IEEE 802.11 common */
1146 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
1147 struct ieee80211_channel channels[ATH_CHAN_MAX];
1148 struct ieee80211_rate rates[IEEE80211_NUM_BANDS][AR5K_MAX_RATES];
1149 s8 rate_idx[IEEE80211_NUM_BANDS][AR5K_MAX_RATES];
1150 enum nl80211_iftype opmode;
1151
1152#ifdef CONFIG_ATH5K_DEBUG
1153 struct ath5k_dbg_info debug; /* debug info */
1154#endif /* CONFIG_ATH5K_DEBUG */
1155
1156 struct ath5k_buf *bufptr; /* allocated buffer ptr */
1157 struct ath5k_desc *desc; /* TX/RX descriptors */
1158 dma_addr_t desc_daddr; /* DMA (physical) address */
1159 size_t desc_len; /* size of TX/RX descriptors */
1160
1161 DECLARE_BITMAP(status, 6);
1162#define ATH_STAT_INVALID 0 /* disable hardware accesses */
1163#define ATH_STAT_MRRETRY 1 /* multi-rate retry support */
1164#define ATH_STAT_PROMISC 2
1165#define ATH_STAT_LEDSOFT 3 /* enable LED gpio status */
1166#define ATH_STAT_STARTED 4 /* opened & irqs enabled */
1167#define ATH_STAT_2G_DISABLED 5 /* multiband radio without 2G */
1168
1169 unsigned int filter_flags; /* HW flags, AR5K_RX_FILTER_* */
1170 struct ieee80211_channel *curchan; /* current h/w channel */
1171
1172 u16 nvifs;
1173
1174 enum ath5k_int imask; /* interrupt mask copy */
1175
1176 spinlock_t irqlock;
1177 bool rx_pending; /* rx tasklet pending */
1178 bool tx_pending; /* tx tasklet pending */
1179
1180 u8 lladdr[ETH_ALEN];
1181 u8 bssidmask[ETH_ALEN];
1182
1183 unsigned int led_pin, /* GPIO pin for driving LED */
1184 led_on; /* pin setting for LED on */
1185
1186 struct work_struct reset_work; /* deferred chip reset */
1187
1188 unsigned int rxbufsize; /* rx size based on mtu */
1189 struct list_head rxbuf; /* receive buffer */
1190 spinlock_t rxbuflock;
1191 u32 *rxlink; /* link ptr in last RX desc */
1192 struct tasklet_struct rxtq; /* rx intr tasklet */
1193 struct ath5k_led rx_led; /* rx led */
1194
1195 struct list_head txbuf; /* transmit buffer */
1196 spinlock_t txbuflock;
1197 unsigned int txbuf_len; /* buf count in txbuf list */
1198 struct ath5k_txq txqs[AR5K_NUM_TX_QUEUES]; /* tx queues */
1199 struct tasklet_struct txtq; /* tx intr tasklet */
1200 struct ath5k_led tx_led; /* tx led */
1201
1202 struct ath5k_rfkill rf_kill;
1203
1204 struct tasklet_struct calib; /* calibration tasklet */
1205
1206 spinlock_t block; /* protects beacon */
1207 struct tasklet_struct beacontq; /* beacon intr tasklet */
1208 struct list_head bcbuf; /* beacon buffer */
1209 struct ieee80211_vif *bslot[ATH_BCBUF];
1210 u16 num_ap_vifs;
1211 u16 num_adhoc_vifs;
1212 unsigned int bhalq, /* SW q for outgoing beacons */
1213 bmisscount, /* missed beacon transmits */
1214 bintval, /* beacon interval in TU */
1215 bsent;
1216 unsigned int nexttbtt; /* next beacon time in TU */
1217 struct ath5k_txq *cabq; /* content after beacon */
1218
1219 int power_level; /* Requested tx power in dBm */
1220 bool assoc; /* associate state */
1221 bool enable_beacon; /* true if beacons are on */
1222
1223 struct ath5k_statistics stats;
1224
1225 struct ath5k_ani_state ani_state;
1226 struct tasklet_struct ani_tasklet; /* ANI calibration */
1227
1228 struct delayed_work tx_complete_work;
1229
1230 struct survey_info survey; /* collected survey info */
1047 1231
1048 enum ath5k_int ah_imr; 1232 enum ath5k_int ah_imr;
1049 1233
@@ -1172,43 +1356,43 @@ struct ath_bus_ops {
1172extern const struct ieee80211_ops ath5k_hw_ops; 1356extern const struct ieee80211_ops ath5k_hw_ops;
1173 1357
1174/* Initialization and detach functions */ 1358/* Initialization and detach functions */
1175int ath5k_init_softc(struct ath5k_softc *sc, const struct ath_bus_ops *bus_ops); 1359int ath5k_init_softc(struct ath5k_hw *ah, const struct ath_bus_ops *bus_ops);
1176void ath5k_deinit_softc(struct ath5k_softc *sc); 1360void ath5k_deinit_softc(struct ath5k_hw *ah);
1177int ath5k_hw_init(struct ath5k_softc *sc); 1361int ath5k_hw_init(struct ath5k_hw *ah);
1178void ath5k_hw_deinit(struct ath5k_hw *ah); 1362void ath5k_hw_deinit(struct ath5k_hw *ah);
1179 1363
1180int ath5k_sysfs_register(struct ath5k_softc *sc); 1364int ath5k_sysfs_register(struct ath5k_hw *ah);
1181void ath5k_sysfs_unregister(struct ath5k_softc *sc); 1365void ath5k_sysfs_unregister(struct ath5k_hw *ah);
1182 1366
1183/* base.c */ 1367/* base.c */
1184struct ath5k_buf; 1368struct ath5k_buf;
1185struct ath5k_txq; 1369struct ath5k_txq;
1186 1370
1187void ath5k_set_beacon_filter(struct ieee80211_hw *hw, bool enable); 1371void ath5k_set_beacon_filter(struct ieee80211_hw *hw, bool enable);
1188bool ath5k_any_vif_assoc(struct ath5k_softc *sc); 1372bool ath5k_any_vif_assoc(struct ath5k_hw *ah);
1189void ath5k_tx_queue(struct ieee80211_hw *hw, struct sk_buff *skb, 1373void ath5k_tx_queue(struct ieee80211_hw *hw, struct sk_buff *skb,
1190 struct ath5k_txq *txq); 1374 struct ath5k_txq *txq);
1191int ath5k_init_hw(struct ath5k_softc *sc); 1375int ath5k_init_hw(struct ath5k_hw *ah);
1192int ath5k_stop_hw(struct ath5k_softc *sc); 1376int ath5k_stop_hw(struct ath5k_hw *ah);
1193void ath5k_mode_setup(struct ath5k_softc *sc, struct ieee80211_vif *vif); 1377void ath5k_mode_setup(struct ath5k_hw *ah, struct ieee80211_vif *vif);
1194void ath5k_update_bssid_mask_and_opmode(struct ath5k_softc *sc, 1378void ath5k_update_bssid_mask_and_opmode(struct ath5k_hw *ah,
1195 struct ieee80211_vif *vif); 1379 struct ieee80211_vif *vif);
1196int ath5k_chan_set(struct ath5k_softc *sc, struct ieee80211_channel *chan); 1380int ath5k_chan_set(struct ath5k_hw *ah, struct ieee80211_channel *chan);
1197void ath5k_beacon_update_timers(struct ath5k_softc *sc, u64 bc_tsf); 1381void ath5k_beacon_update_timers(struct ath5k_hw *ah, u64 bc_tsf);
1198int ath5k_beacon_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif); 1382int ath5k_beacon_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif);
1199void ath5k_beacon_config(struct ath5k_softc *sc); 1383void ath5k_beacon_config(struct ath5k_hw *ah);
1200void ath5k_txbuf_free_skb(struct ath5k_softc *sc, struct ath5k_buf *bf); 1384void ath5k_txbuf_free_skb(struct ath5k_hw *ah, struct ath5k_buf *bf);
1201void ath5k_rxbuf_free_skb(struct ath5k_softc *sc, struct ath5k_buf *bf); 1385void ath5k_rxbuf_free_skb(struct ath5k_hw *ah, struct ath5k_buf *bf);
1202 1386
1203/*Chip id helper functions */ 1387/*Chip id helper functions */
1204const char *ath5k_chip_name(enum ath5k_srev_type type, u_int16_t val); 1388const char *ath5k_chip_name(enum ath5k_srev_type type, u_int16_t val);
1205int ath5k_hw_read_srev(struct ath5k_hw *ah); 1389int ath5k_hw_read_srev(struct ath5k_hw *ah);
1206 1390
1207/* LED functions */ 1391/* LED functions */
1208int ath5k_init_leds(struct ath5k_softc *sc); 1392int ath5k_init_leds(struct ath5k_hw *ah);
1209void ath5k_led_enable(struct ath5k_softc *sc); 1393void ath5k_led_enable(struct ath5k_hw *ah);
1210void ath5k_led_off(struct ath5k_softc *sc); 1394void ath5k_led_off(struct ath5k_hw *ah);
1211void ath5k_unregister_leds(struct ath5k_softc *sc); 1395void ath5k_unregister_leds(struct ath5k_hw *ah);
1212 1396
1213 1397
1214/* Reset Functions */ 1398/* Reset Functions */
@@ -1384,7 +1568,7 @@ static inline void __iomem *ath5k_ahb_reg(struct ath5k_hw *ah, u16 reg)
1384 (ah->ah_mac_srev >= AR5K_SREV_AR2315_R6))) 1568 (ah->ah_mac_srev >= AR5K_SREV_AR2315_R6)))
1385 return AR5K_AR2315_PCI_BASE + reg; 1569 return AR5K_AR2315_PCI_BASE + reg;
1386 1570
1387 return ah->ah_iobase + reg; 1571 return ah->iobase + reg;
1388} 1572}
1389 1573
1390static inline u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg) 1574static inline u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg)
@@ -1401,12 +1585,12 @@ static inline void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg)
1401 1585
1402static inline u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg) 1586static inline u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg)
1403{ 1587{
1404 return ioread32(ah->ah_iobase + reg); 1588 return ioread32(ah->iobase + reg);
1405} 1589}
1406 1590
1407static inline void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg) 1591static inline void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg)
1408{ 1592{
1409 iowrite32(val, ah->ah_iobase + reg); 1593 iowrite32(val, ah->iobase + reg);
1410} 1594}
1411 1595
1412#endif 1596#endif
diff --git a/drivers/net/wireless/ath/ath5k/attach.c b/drivers/net/wireless/ath/ath5k/attach.c
index 14dc52e4b50a..f8a6b380d96d 100644
--- a/drivers/net/wireless/ath/ath5k/attach.c
+++ b/drivers/net/wireless/ath/ath5k/attach.c
@@ -59,7 +59,7 @@ static int ath5k_hw_post(struct ath5k_hw *ah)
59 cur_val = ath5k_hw_reg_read(ah, cur_reg); 59 cur_val = ath5k_hw_reg_read(ah, cur_reg);
60 60
61 if (cur_val != var_pattern) { 61 if (cur_val != var_pattern) {
62 ATH5K_ERR(ah->ah_sc, "POST Failed !!!\n"); 62 ATH5K_ERR(ah, "POST Failed !!!\n");
63 return -EAGAIN; 63 return -EAGAIN;
64 } 64 }
65 65
@@ -74,7 +74,7 @@ static int ath5k_hw_post(struct ath5k_hw *ah)
74 cur_val = ath5k_hw_reg_read(ah, cur_reg); 74 cur_val = ath5k_hw_reg_read(ah, cur_reg);
75 75
76 if (cur_val != var_pattern) { 76 if (cur_val != var_pattern) {
77 ATH5K_ERR(ah->ah_sc, "POST Failed !!!\n"); 77 ATH5K_ERR(ah, "POST Failed !!!\n");
78 return -EAGAIN; 78 return -EAGAIN;
79 } 79 }
80 80
@@ -95,19 +95,18 @@ static int ath5k_hw_post(struct ath5k_hw *ah)
95/** 95/**
96 * ath5k_hw_init - Check if hw is supported and init the needed structs 96 * ath5k_hw_init - Check if hw is supported and init the needed structs
97 * 97 *
98 * @sc: The &struct ath5k_softc we got from the driver's init_softc function 98 * @ah: The &struct ath5k_hw we got from the driver's init_softc function
99 * 99 *
100 * Check if the device is supported, perform a POST and initialize the needed 100 * Check if the device is supported, perform a POST and initialize the needed
101 * structs. Returns -ENOMEM if we don't have memory for the needed structs, 101 * structs. Returns -ENOMEM if we don't have memory for the needed structs,
102 * -ENODEV if the device is not supported or prints an error msg if something 102 * -ENODEV if the device is not supported or prints an error msg if something
103 * else went wrong. 103 * else went wrong.
104 */ 104 */
105int ath5k_hw_init(struct ath5k_softc *sc) 105int ath5k_hw_init(struct ath5k_hw *ah)
106{ 106{
107 static const u8 zero_mac[ETH_ALEN] = { }; 107 static const u8 zero_mac[ETH_ALEN] = { };
108 struct ath5k_hw *ah = sc->ah;
109 struct ath_common *common = ath5k_hw_common(ah); 108 struct ath_common *common = ath5k_hw_common(ah);
110 struct pci_dev *pdev = sc->pdev; 109 struct pci_dev *pdev = ah->pdev;
111 struct ath5k_eeprom_info *ee; 110 struct ath5k_eeprom_info *ee;
112 int ret; 111 int ret;
113 u32 srev; 112 u32 srev;
@@ -123,8 +122,8 @@ int ath5k_hw_init(struct ath5k_softc *sc)
123 ah->ah_retry_long = AR5K_INIT_RETRY_LONG; 122 ah->ah_retry_long = AR5K_INIT_RETRY_LONG;
124 ah->ah_ant_mode = AR5K_ANTMODE_DEFAULT; 123 ah->ah_ant_mode = AR5K_ANTMODE_DEFAULT;
125 ah->ah_noise_floor = -95; /* until first NF calibration is run */ 124 ah->ah_noise_floor = -95; /* until first NF calibration is run */
126 sc->ani_state.ani_mode = ATH5K_ANI_MODE_AUTO; 125 ah->ani_state.ani_mode = ATH5K_ANI_MODE_AUTO;
127 ah->ah_current_channel = &sc->channels[0]; 126 ah->ah_current_channel = &ah->channels[0];
128 127
129 /* 128 /*
130 * Find the mac version 129 * Find the mac version
@@ -237,7 +236,7 @@ int ath5k_hw_init(struct ath5k_softc *sc)
237 ah->ah_single_chip = true; 236 ah->ah_single_chip = true;
238 ah->ah_radio_5ghz_revision = AR5K_SREV_RAD_2413; 237 ah->ah_radio_5ghz_revision = AR5K_SREV_RAD_2413;
239 } else { 238 } else {
240 ATH5K_ERR(sc, "Couldn't identify radio revision.\n"); 239 ATH5K_ERR(ah, "Couldn't identify radio revision.\n");
241 ret = -ENODEV; 240 ret = -ENODEV;
242 goto err; 241 goto err;
243 } 242 }
@@ -246,7 +245,7 @@ int ath5k_hw_init(struct ath5k_softc *sc)
246 245
247 /* Return on unsupported chips (unsupported eeprom etc) */ 246 /* Return on unsupported chips (unsupported eeprom etc) */
248 if ((srev >= AR5K_SREV_AR5416) && (srev < AR5K_SREV_AR2425)) { 247 if ((srev >= AR5K_SREV_AR5416) && (srev < AR5K_SREV_AR2425)) {
249 ATH5K_ERR(sc, "Device not yet supported.\n"); 248 ATH5K_ERR(ah, "Device not yet supported.\n");
250 ret = -ENODEV; 249 ret = -ENODEV;
251 goto err; 250 goto err;
252 } 251 }
@@ -268,7 +267,7 @@ int ath5k_hw_init(struct ath5k_softc *sc)
268 */ 267 */
269 ret = ath5k_eeprom_init(ah); 268 ret = ath5k_eeprom_init(ah);
270 if (ret) { 269 if (ret) {
271 ATH5K_ERR(sc, "unable to init EEPROM\n"); 270 ATH5K_ERR(ah, "unable to init EEPROM\n");
272 goto err; 271 goto err;
273 } 272 }
274 273
@@ -309,17 +308,17 @@ int ath5k_hw_init(struct ath5k_softc *sc)
309 /* Get misc capabilities */ 308 /* Get misc capabilities */
310 ret = ath5k_hw_set_capabilities(ah); 309 ret = ath5k_hw_set_capabilities(ah);
311 if (ret) { 310 if (ret) {
312 ATH5K_ERR(sc, "unable to get device capabilities\n"); 311 ATH5K_ERR(ah, "unable to get device capabilities\n");
313 goto err; 312 goto err;
314 } 313 }
315 314
316 if (test_bit(ATH_STAT_2G_DISABLED, sc->status)) { 315 if (test_bit(ATH_STAT_2G_DISABLED, ah->status)) {
317 __clear_bit(AR5K_MODE_11B, ah->ah_capabilities.cap_mode); 316 __clear_bit(AR5K_MODE_11B, ah->ah_capabilities.cap_mode);
318 __clear_bit(AR5K_MODE_11G, ah->ah_capabilities.cap_mode); 317 __clear_bit(AR5K_MODE_11G, ah->ah_capabilities.cap_mode);
319 } 318 }
320 319
321 /* Crypto settings */ 320 /* Crypto settings */
322 common->keymax = (sc->ah->ah_version == AR5K_AR5210 ? 321 common->keymax = (ah->ah_version == AR5K_AR5210 ?
323 AR5K_KEYTABLE_SIZE_5210 : AR5K_KEYTABLE_SIZE_5211); 322 AR5K_KEYTABLE_SIZE_5210 : AR5K_KEYTABLE_SIZE_5211);
324 323
325 if (srev >= AR5K_SREV_AR5212_V4 && 324 if (srev >= AR5K_SREV_AR5212_V4 &&
@@ -339,7 +338,7 @@ int ath5k_hw_init(struct ath5k_softc *sc)
339 /* Set BSSID to bcast address: ff:ff:ff:ff:ff:ff for now */ 338 /* Set BSSID to bcast address: ff:ff:ff:ff:ff:ff for now */
340 memcpy(common->curbssid, ath_bcast_mac, ETH_ALEN); 339 memcpy(common->curbssid, ath_bcast_mac, ETH_ALEN);
341 ath5k_hw_set_bssid(ah); 340 ath5k_hw_set_bssid(ah);
342 ath5k_hw_set_opmode(ah, sc->opmode); 341 ath5k_hw_set_opmode(ah, ah->opmode);
343 342
344 ath5k_hw_rfgain_opt_init(ah); 343 ath5k_hw_rfgain_opt_init(ah);
345 344
@@ -360,7 +359,7 @@ err:
360 */ 359 */
361void ath5k_hw_deinit(struct ath5k_hw *ah) 360void ath5k_hw_deinit(struct ath5k_hw *ah)
362{ 361{
363 __set_bit(ATH_STAT_INVALID, ah->ah_sc->status); 362 __set_bit(ATH_STAT_INVALID, ah->status);
364 363
365 if (ah->ah_rf_banks != NULL) 364 if (ah->ah_rf_banks != NULL)
366 kfree(ah->ah_rf_banks); 365 kfree(ah->ah_rf_banks);
diff --git a/drivers/net/wireless/ath/ath5k/base.c b/drivers/net/wireless/ath/ath5k/base.c
index 5f055d69b220..20e4ef4db3ea 100644
--- a/drivers/net/wireless/ath/ath5k/base.c
+++ b/drivers/net/wireless/ath/ath5k/base.c
@@ -85,7 +85,7 @@ MODULE_SUPPORTED_DEVICE("Atheros 5xxx WLAN cards");
85MODULE_LICENSE("Dual BSD/GPL"); 85MODULE_LICENSE("Dual BSD/GPL");
86 86
87static int ath5k_init(struct ieee80211_hw *hw); 87static int ath5k_init(struct ieee80211_hw *hw);
88static int ath5k_reset(struct ath5k_softc *sc, struct ieee80211_channel *chan, 88static int ath5k_reset(struct ath5k_hw *ah, struct ieee80211_channel *chan,
89 bool skip_pcu); 89 bool skip_pcu);
90 90
91/* Known SREVs */ 91/* Known SREVs */
@@ -237,8 +237,8 @@ static const struct ath_ops ath5k_common_ops = {
237static int ath5k_reg_notifier(struct wiphy *wiphy, struct regulatory_request *request) 237static int ath5k_reg_notifier(struct wiphy *wiphy, struct regulatory_request *request)
238{ 238{
239 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); 239 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
240 struct ath5k_softc *sc = hw->priv; 240 struct ath5k_hw *ah = hw->priv;
241 struct ath_regulatory *regulatory = ath5k_hw_regulatory(sc->ah); 241 struct ath_regulatory *regulatory = ath5k_hw_regulatory(ah);
242 242
243 return ath_reg_notifier_apply(wiphy, request, regulatory); 243 return ath_reg_notifier_apply(wiphy, request, regulatory);
244} 244}
@@ -288,7 +288,7 @@ ath5k_setup_channels(struct ath5k_hw *ah, struct ieee80211_channel *channels,
288 band = IEEE80211_BAND_2GHZ; 288 band = IEEE80211_BAND_2GHZ;
289 break; 289 break;
290 default: 290 default:
291 ATH5K_WARN(ah->ah_sc, "bad mode, not copying channels\n"); 291 ATH5K_WARN(ah, "bad mode, not copying channels\n");
292 return 0; 292 return 0;
293 } 293 }
294 294
@@ -326,51 +326,50 @@ ath5k_setup_channels(struct ath5k_hw *ah, struct ieee80211_channel *channels,
326} 326}
327 327
328static void 328static void
329ath5k_setup_rate_idx(struct ath5k_softc *sc, struct ieee80211_supported_band *b) 329ath5k_setup_rate_idx(struct ath5k_hw *ah, struct ieee80211_supported_band *b)
330{ 330{
331 u8 i; 331 u8 i;
332 332
333 for (i = 0; i < AR5K_MAX_RATES; i++) 333 for (i = 0; i < AR5K_MAX_RATES; i++)
334 sc->rate_idx[b->band][i] = -1; 334 ah->rate_idx[b->band][i] = -1;
335 335
336 for (i = 0; i < b->n_bitrates; i++) { 336 for (i = 0; i < b->n_bitrates; i++) {
337 sc->rate_idx[b->band][b->bitrates[i].hw_value] = i; 337 ah->rate_idx[b->band][b->bitrates[i].hw_value] = i;
338 if (b->bitrates[i].hw_value_short) 338 if (b->bitrates[i].hw_value_short)
339 sc->rate_idx[b->band][b->bitrates[i].hw_value_short] = i; 339 ah->rate_idx[b->band][b->bitrates[i].hw_value_short] = i;
340 } 340 }
341} 341}
342 342
343static int 343static int
344ath5k_setup_bands(struct ieee80211_hw *hw) 344ath5k_setup_bands(struct ieee80211_hw *hw)
345{ 345{
346 struct ath5k_softc *sc = hw->priv; 346 struct ath5k_hw *ah = hw->priv;
347 struct ath5k_hw *ah = sc->ah;
348 struct ieee80211_supported_band *sband; 347 struct ieee80211_supported_band *sband;
349 int max_c, count_c = 0; 348 int max_c, count_c = 0;
350 int i; 349 int i;
351 350
352 BUILD_BUG_ON(ARRAY_SIZE(sc->sbands) < IEEE80211_NUM_BANDS); 351 BUILD_BUG_ON(ARRAY_SIZE(ah->sbands) < IEEE80211_NUM_BANDS);
353 max_c = ARRAY_SIZE(sc->channels); 352 max_c = ARRAY_SIZE(ah->channels);
354 353
355 /* 2GHz band */ 354 /* 2GHz band */
356 sband = &sc->sbands[IEEE80211_BAND_2GHZ]; 355 sband = &ah->sbands[IEEE80211_BAND_2GHZ];
357 sband->band = IEEE80211_BAND_2GHZ; 356 sband->band = IEEE80211_BAND_2GHZ;
358 sband->bitrates = &sc->rates[IEEE80211_BAND_2GHZ][0]; 357 sband->bitrates = &ah->rates[IEEE80211_BAND_2GHZ][0];
359 358
360 if (test_bit(AR5K_MODE_11G, sc->ah->ah_capabilities.cap_mode)) { 359 if (test_bit(AR5K_MODE_11G, ah->ah_capabilities.cap_mode)) {
361 /* G mode */ 360 /* G mode */
362 memcpy(sband->bitrates, &ath5k_rates[0], 361 memcpy(sband->bitrates, &ath5k_rates[0],
363 sizeof(struct ieee80211_rate) * 12); 362 sizeof(struct ieee80211_rate) * 12);
364 sband->n_bitrates = 12; 363 sband->n_bitrates = 12;
365 364
366 sband->channels = sc->channels; 365 sband->channels = ah->channels;
367 sband->n_channels = ath5k_setup_channels(ah, sband->channels, 366 sband->n_channels = ath5k_setup_channels(ah, sband->channels,
368 AR5K_MODE_11G, max_c); 367 AR5K_MODE_11G, max_c);
369 368
370 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = sband; 369 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = sband;
371 count_c = sband->n_channels; 370 count_c = sband->n_channels;
372 max_c -= count_c; 371 max_c -= count_c;
373 } else if (test_bit(AR5K_MODE_11B, sc->ah->ah_capabilities.cap_mode)) { 372 } else if (test_bit(AR5K_MODE_11B, ah->ah_capabilities.cap_mode)) {
374 /* B mode */ 373 /* B mode */
375 memcpy(sband->bitrates, &ath5k_rates[0], 374 memcpy(sband->bitrates, &ath5k_rates[0],
376 sizeof(struct ieee80211_rate) * 4); 375 sizeof(struct ieee80211_rate) * 4);
@@ -389,7 +388,7 @@ ath5k_setup_bands(struct ieee80211_hw *hw)
389 } 388 }
390 } 389 }
391 390
392 sband->channels = sc->channels; 391 sband->channels = ah->channels;
393 sband->n_channels = ath5k_setup_channels(ah, sband->channels, 392 sband->n_channels = ath5k_setup_channels(ah, sband->channels,
394 AR5K_MODE_11B, max_c); 393 AR5K_MODE_11B, max_c);
395 394
@@ -397,27 +396,27 @@ ath5k_setup_bands(struct ieee80211_hw *hw)
397 count_c = sband->n_channels; 396 count_c = sband->n_channels;
398 max_c -= count_c; 397 max_c -= count_c;
399 } 398 }
400 ath5k_setup_rate_idx(sc, sband); 399 ath5k_setup_rate_idx(ah, sband);
401 400
402 /* 5GHz band, A mode */ 401 /* 5GHz band, A mode */
403 if (test_bit(AR5K_MODE_11A, sc->ah->ah_capabilities.cap_mode)) { 402 if (test_bit(AR5K_MODE_11A, ah->ah_capabilities.cap_mode)) {
404 sband = &sc->sbands[IEEE80211_BAND_5GHZ]; 403 sband = &ah->sbands[IEEE80211_BAND_5GHZ];
405 sband->band = IEEE80211_BAND_5GHZ; 404 sband->band = IEEE80211_BAND_5GHZ;
406 sband->bitrates = &sc->rates[IEEE80211_BAND_5GHZ][0]; 405 sband->bitrates = &ah->rates[IEEE80211_BAND_5GHZ][0];
407 406
408 memcpy(sband->bitrates, &ath5k_rates[4], 407 memcpy(sband->bitrates, &ath5k_rates[4],
409 sizeof(struct ieee80211_rate) * 8); 408 sizeof(struct ieee80211_rate) * 8);
410 sband->n_bitrates = 8; 409 sband->n_bitrates = 8;
411 410
412 sband->channels = &sc->channels[count_c]; 411 sband->channels = &ah->channels[count_c];
413 sband->n_channels = ath5k_setup_channels(ah, sband->channels, 412 sband->n_channels = ath5k_setup_channels(ah, sband->channels,
414 AR5K_MODE_11A, max_c); 413 AR5K_MODE_11A, max_c);
415 414
416 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = sband; 415 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = sband;
417 } 416 }
418 ath5k_setup_rate_idx(sc, sband); 417 ath5k_setup_rate_idx(ah, sband);
419 418
420 ath5k_debug_dump_bands(sc); 419 ath5k_debug_dump_bands(ah);
421 420
422 return 0; 421 return 0;
423} 422}
@@ -427,14 +426,14 @@ ath5k_setup_bands(struct ieee80211_hw *hw)
427 * To accomplish this we must first cleanup any pending DMA, 426 * To accomplish this we must first cleanup any pending DMA,
428 * then restart stuff after a la ath5k_init. 427 * then restart stuff after a la ath5k_init.
429 * 428 *
430 * Called with sc->lock. 429 * Called with ah->lock.
431 */ 430 */
432int 431int
433ath5k_chan_set(struct ath5k_softc *sc, struct ieee80211_channel *chan) 432ath5k_chan_set(struct ath5k_hw *ah, struct ieee80211_channel *chan)
434{ 433{
435 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, 434 ATH5K_DBG(ah, ATH5K_DEBUG_RESET,
436 "channel set, resetting (%u -> %u MHz)\n", 435 "channel set, resetting (%u -> %u MHz)\n",
437 sc->curchan->center_freq, chan->center_freq); 436 ah->curchan->center_freq, chan->center_freq);
438 437
439 /* 438 /*
440 * To switch channels clear any pending DMA operations; 439 * To switch channels clear any pending DMA operations;
@@ -442,7 +441,7 @@ ath5k_chan_set(struct ath5k_softc *sc, struct ieee80211_channel *chan)
442 * hardware at the new frequency, and then re-enable 441 * hardware at the new frequency, and then re-enable
443 * the relevant bits of the h/w. 442 * the relevant bits of the h/w.
444 */ 443 */
445 return ath5k_reset(sc, chan, true); 444 return ath5k_reset(ah, chan, true);
446} 445}
447 446
448void ath5k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif) 447void ath5k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
@@ -486,10 +485,10 @@ void ath5k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
486} 485}
487 486
488void 487void
489ath5k_update_bssid_mask_and_opmode(struct ath5k_softc *sc, 488ath5k_update_bssid_mask_and_opmode(struct ath5k_hw *ah,
490 struct ieee80211_vif *vif) 489 struct ieee80211_vif *vif)
491{ 490{
492 struct ath_common *common = ath5k_hw_common(sc->ah); 491 struct ath_common *common = ath5k_hw_common(ah);
493 struct ath5k_vif_iter_data iter_data; 492 struct ath5k_vif_iter_data iter_data;
494 u32 rfilt; 493 u32 rfilt;
495 494
@@ -508,24 +507,24 @@ ath5k_update_bssid_mask_and_opmode(struct ath5k_softc *sc,
508 ath5k_vif_iter(&iter_data, vif->addr, vif); 507 ath5k_vif_iter(&iter_data, vif->addr, vif);
509 508
510 /* Get list of all active MAC addresses */ 509 /* Get list of all active MAC addresses */
511 ieee80211_iterate_active_interfaces_atomic(sc->hw, ath5k_vif_iter, 510 ieee80211_iterate_active_interfaces_atomic(ah->hw, ath5k_vif_iter,
512 &iter_data); 511 &iter_data);
513 memcpy(sc->bssidmask, iter_data.mask, ETH_ALEN); 512 memcpy(ah->bssidmask, iter_data.mask, ETH_ALEN);
514 513
515 sc->opmode = iter_data.opmode; 514 ah->opmode = iter_data.opmode;
516 if (sc->opmode == NL80211_IFTYPE_UNSPECIFIED) 515 if (ah->opmode == NL80211_IFTYPE_UNSPECIFIED)
517 /* Nothing active, default to station mode */ 516 /* Nothing active, default to station mode */
518 sc->opmode = NL80211_IFTYPE_STATION; 517 ah->opmode = NL80211_IFTYPE_STATION;
519 518
520 ath5k_hw_set_opmode(sc->ah, sc->opmode); 519 ath5k_hw_set_opmode(ah, ah->opmode);
521 ATH5K_DBG(sc, ATH5K_DEBUG_MODE, "mode setup opmode %d (%s)\n", 520 ATH5K_DBG(ah, ATH5K_DEBUG_MODE, "mode setup opmode %d (%s)\n",
522 sc->opmode, ath_opmode_to_string(sc->opmode)); 521 ah->opmode, ath_opmode_to_string(ah->opmode));
523 522
524 if (iter_data.need_set_hw_addr && iter_data.found_active) 523 if (iter_data.need_set_hw_addr && iter_data.found_active)
525 ath5k_hw_set_lladdr(sc->ah, iter_data.active_mac); 524 ath5k_hw_set_lladdr(ah, iter_data.active_mac);
526 525
527 if (ath5k_hw_hasbssidmask(sc->ah)) 526 if (ath5k_hw_hasbssidmask(ah))
528 ath5k_hw_set_bssid_mask(sc->ah, sc->bssidmask); 527 ath5k_hw_set_bssid_mask(ah, ah->bssidmask);
529 528
530 /* Set up RX Filter */ 529 /* Set up RX Filter */
531 if (iter_data.n_stas > 1) { 530 if (iter_data.n_stas > 1) {
@@ -533,16 +532,16 @@ ath5k_update_bssid_mask_and_opmode(struct ath5k_softc *sc,
533 * different APs, ARPs are not received (most of the time?) 532 * different APs, ARPs are not received (most of the time?)
534 * Enabling PROMISC appears to fix that problem. 533 * Enabling PROMISC appears to fix that problem.
535 */ 534 */
536 sc->filter_flags |= AR5K_RX_FILTER_PROM; 535 ah->filter_flags |= AR5K_RX_FILTER_PROM;
537 } 536 }
538 537
539 rfilt = sc->filter_flags; 538 rfilt = ah->filter_flags;
540 ath5k_hw_set_rx_filter(sc->ah, rfilt); 539 ath5k_hw_set_rx_filter(ah, rfilt);
541 ATH5K_DBG(sc, ATH5K_DEBUG_MODE, "RX filter 0x%x\n", rfilt); 540 ATH5K_DBG(ah, ATH5K_DEBUG_MODE, "RX filter 0x%x\n", rfilt);
542} 541}
543 542
544static inline int 543static inline int
545ath5k_hw_to_driver_rix(struct ath5k_softc *sc, int hw_rix) 544ath5k_hw_to_driver_rix(struct ath5k_hw *ah, int hw_rix)
546{ 545{
547 int rix; 546 int rix;
548 547
@@ -551,7 +550,7 @@ ath5k_hw_to_driver_rix(struct ath5k_softc *sc, int hw_rix)
551 "hw_rix out of bounds: %x\n", hw_rix)) 550 "hw_rix out of bounds: %x\n", hw_rix))
552 return 0; 551 return 0;
553 552
554 rix = sc->rate_idx[sc->curchan->band][hw_rix]; 553 rix = ah->rate_idx[ah->curchan->band][hw_rix];
555 if (WARN(rix < 0, "invalid hw_rix: %x\n", hw_rix)) 554 if (WARN(rix < 0, "invalid hw_rix: %x\n", hw_rix))
556 rix = 0; 555 rix = 0;
557 556
@@ -563,9 +562,9 @@ ath5k_hw_to_driver_rix(struct ath5k_softc *sc, int hw_rix)
563\***************/ 562\***************/
564 563
565static 564static
566struct sk_buff *ath5k_rx_skb_alloc(struct ath5k_softc *sc, dma_addr_t *skb_addr) 565struct sk_buff *ath5k_rx_skb_alloc(struct ath5k_hw *ah, dma_addr_t *skb_addr)
567{ 566{
568 struct ath_common *common = ath5k_hw_common(sc->ah); 567 struct ath_common *common = ath5k_hw_common(ah);
569 struct sk_buff *skb; 568 struct sk_buff *skb;
570 569
571 /* 570 /*
@@ -577,17 +576,17 @@ struct sk_buff *ath5k_rx_skb_alloc(struct ath5k_softc *sc, dma_addr_t *skb_addr)
577 GFP_ATOMIC); 576 GFP_ATOMIC);
578 577
579 if (!skb) { 578 if (!skb) {
580 ATH5K_ERR(sc, "can't alloc skbuff of size %u\n", 579 ATH5K_ERR(ah, "can't alloc skbuff of size %u\n",
581 common->rx_bufsize); 580 common->rx_bufsize);
582 return NULL; 581 return NULL;
583 } 582 }
584 583
585 *skb_addr = dma_map_single(sc->dev, 584 *skb_addr = dma_map_single(ah->dev,
586 skb->data, common->rx_bufsize, 585 skb->data, common->rx_bufsize,
587 DMA_FROM_DEVICE); 586 DMA_FROM_DEVICE);
588 587
589 if (unlikely(dma_mapping_error(sc->dev, *skb_addr))) { 588 if (unlikely(dma_mapping_error(ah->dev, *skb_addr))) {
590 ATH5K_ERR(sc, "%s: DMA mapping failed\n", __func__); 589 ATH5K_ERR(ah, "%s: DMA mapping failed\n", __func__);
591 dev_kfree_skb(skb); 590 dev_kfree_skb(skb);
592 return NULL; 591 return NULL;
593 } 592 }
@@ -595,15 +594,14 @@ struct sk_buff *ath5k_rx_skb_alloc(struct ath5k_softc *sc, dma_addr_t *skb_addr)
595} 594}
596 595
597static int 596static int
598ath5k_rxbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf) 597ath5k_rxbuf_setup(struct ath5k_hw *ah, struct ath5k_buf *bf)
599{ 598{
600 struct ath5k_hw *ah = sc->ah;
601 struct sk_buff *skb = bf->skb; 599 struct sk_buff *skb = bf->skb;
602 struct ath5k_desc *ds; 600 struct ath5k_desc *ds;
603 int ret; 601 int ret;
604 602
605 if (!skb) { 603 if (!skb) {
606 skb = ath5k_rx_skb_alloc(sc, &bf->skbaddr); 604 skb = ath5k_rx_skb_alloc(ah, &bf->skbaddr);
607 if (!skb) 605 if (!skb)
608 return -ENOMEM; 606 return -ENOMEM;
609 bf->skb = skb; 607 bf->skb = skb;
@@ -629,13 +627,13 @@ ath5k_rxbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf)
629 ds->ds_data = bf->skbaddr; 627 ds->ds_data = bf->skbaddr;
630 ret = ath5k_hw_setup_rx_desc(ah, ds, ah->common.rx_bufsize, 0); 628 ret = ath5k_hw_setup_rx_desc(ah, ds, ah->common.rx_bufsize, 0);
631 if (ret) { 629 if (ret) {
632 ATH5K_ERR(sc, "%s: could not setup RX desc\n", __func__); 630 ATH5K_ERR(ah, "%s: could not setup RX desc\n", __func__);
633 return ret; 631 return ret;
634 } 632 }
635 633
636 if (sc->rxlink != NULL) 634 if (ah->rxlink != NULL)
637 *sc->rxlink = bf->daddr; 635 *ah->rxlink = bf->daddr;
638 sc->rxlink = &ds->ds_link; 636 ah->rxlink = &ds->ds_link;
639 return 0; 637 return 0;
640} 638}
641 639
@@ -663,10 +661,9 @@ static enum ath5k_pkt_type get_hw_packet_type(struct sk_buff *skb)
663} 661}
664 662
665static int 663static int
666ath5k_txbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf, 664ath5k_txbuf_setup(struct ath5k_hw *ah, struct ath5k_buf *bf,
667 struct ath5k_txq *txq, int padsize) 665 struct ath5k_txq *txq, int padsize)
668{ 666{
669 struct ath5k_hw *ah = sc->ah;
670 struct ath5k_desc *ds = bf->desc; 667 struct ath5k_desc *ds = bf->desc;
671 struct sk_buff *skb = bf->skb; 668 struct sk_buff *skb = bf->skb;
672 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 669 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
@@ -682,10 +679,10 @@ ath5k_txbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf,
682 flags = AR5K_TXDESC_INTREQ | AR5K_TXDESC_CLRDMASK; 679 flags = AR5K_TXDESC_INTREQ | AR5K_TXDESC_CLRDMASK;
683 680
684 /* XXX endianness */ 681 /* XXX endianness */
685 bf->skbaddr = dma_map_single(sc->dev, skb->data, skb->len, 682 bf->skbaddr = dma_map_single(ah->dev, skb->data, skb->len,
686 DMA_TO_DEVICE); 683 DMA_TO_DEVICE);
687 684
688 rate = ieee80211_get_tx_rate(sc->hw, info); 685 rate = ieee80211_get_tx_rate(ah->hw, info);
689 if (!rate) { 686 if (!rate) {
690 ret = -EINVAL; 687 ret = -EINVAL;
691 goto err_unmap; 688 goto err_unmap;
@@ -709,20 +706,20 @@ ath5k_txbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf,
709 } 706 }
710 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) { 707 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
711 flags |= AR5K_TXDESC_RTSENA; 708 flags |= AR5K_TXDESC_RTSENA;
712 cts_rate = ieee80211_get_rts_cts_rate(sc->hw, info)->hw_value; 709 cts_rate = ieee80211_get_rts_cts_rate(ah->hw, info)->hw_value;
713 duration = le16_to_cpu(ieee80211_rts_duration(sc->hw, 710 duration = le16_to_cpu(ieee80211_rts_duration(ah->hw,
714 info->control.vif, pktlen, info)); 711 info->control.vif, pktlen, info));
715 } 712 }
716 if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) { 713 if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
717 flags |= AR5K_TXDESC_CTSENA; 714 flags |= AR5K_TXDESC_CTSENA;
718 cts_rate = ieee80211_get_rts_cts_rate(sc->hw, info)->hw_value; 715 cts_rate = ieee80211_get_rts_cts_rate(ah->hw, info)->hw_value;
719 duration = le16_to_cpu(ieee80211_ctstoself_duration(sc->hw, 716 duration = le16_to_cpu(ieee80211_ctstoself_duration(ah->hw,
720 info->control.vif, pktlen, info)); 717 info->control.vif, pktlen, info));
721 } 718 }
722 ret = ah->ah_setup_tx_desc(ah, ds, pktlen, 719 ret = ah->ah_setup_tx_desc(ah, ds, pktlen,
723 ieee80211_get_hdrlen_from_skb(skb), padsize, 720 ieee80211_get_hdrlen_from_skb(skb), padsize,
724 get_hw_packet_type(skb), 721 get_hw_packet_type(skb),
725 (sc->power_level * 2), 722 (ah->power_level * 2),
726 hw_rate, 723 hw_rate,
727 info->control.rates[0].count, keyidx, ah->ah_tx_ant, flags, 724 info->control.rates[0].count, keyidx, ah->ah_tx_ant, flags,
728 cts_rate, duration); 725 cts_rate, duration);
@@ -732,7 +729,7 @@ ath5k_txbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf,
732 memset(mrr_rate, 0, sizeof(mrr_rate)); 729 memset(mrr_rate, 0, sizeof(mrr_rate));
733 memset(mrr_tries, 0, sizeof(mrr_tries)); 730 memset(mrr_tries, 0, sizeof(mrr_tries));
734 for (i = 0; i < 3; i++) { 731 for (i = 0; i < 3; i++) {
735 rate = ieee80211_get_alt_retry_rate(sc->hw, info, i); 732 rate = ieee80211_get_alt_retry_rate(ah->hw, info, i);
736 if (!rate) 733 if (!rate)
737 break; 734 break;
738 735
@@ -763,7 +760,7 @@ ath5k_txbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf,
763 760
764 return 0; 761 return 0;
765err_unmap: 762err_unmap:
766 dma_unmap_single(sc->dev, bf->skbaddr, skb->len, DMA_TO_DEVICE); 763 dma_unmap_single(ah->dev, bf->skbaddr, skb->len, DMA_TO_DEVICE);
767 return ret; 764 return ret;
768} 765}
769 766
@@ -772,7 +769,7 @@ err_unmap:
772\*******************/ 769\*******************/
773 770
774static int 771static int
775ath5k_desc_alloc(struct ath5k_softc *sc) 772ath5k_desc_alloc(struct ath5k_hw *ah)
776{ 773{
777 struct ath5k_desc *ds; 774 struct ath5k_desc *ds;
778 struct ath5k_buf *bf; 775 struct ath5k_buf *bf;
@@ -781,68 +778,68 @@ ath5k_desc_alloc(struct ath5k_softc *sc)
781 int ret; 778 int ret;
782 779
783 /* allocate descriptors */ 780 /* allocate descriptors */
784 sc->desc_len = sizeof(struct ath5k_desc) * 781 ah->desc_len = sizeof(struct ath5k_desc) *
785 (ATH_TXBUF + ATH_RXBUF + ATH_BCBUF + 1); 782 (ATH_TXBUF + ATH_RXBUF + ATH_BCBUF + 1);
786 783
787 sc->desc = dma_alloc_coherent(sc->dev, sc->desc_len, 784 ah->desc = dma_alloc_coherent(ah->dev, ah->desc_len,
788 &sc->desc_daddr, GFP_KERNEL); 785 &ah->desc_daddr, GFP_KERNEL);
789 if (sc->desc == NULL) { 786 if (ah->desc == NULL) {
790 ATH5K_ERR(sc, "can't allocate descriptors\n"); 787 ATH5K_ERR(ah, "can't allocate descriptors\n");
791 ret = -ENOMEM; 788 ret = -ENOMEM;
792 goto err; 789 goto err;
793 } 790 }
794 ds = sc->desc; 791 ds = ah->desc;
795 da = sc->desc_daddr; 792 da = ah->desc_daddr;
796 ATH5K_DBG(sc, ATH5K_DEBUG_ANY, "DMA map: %p (%zu) -> %llx\n", 793 ATH5K_DBG(ah, ATH5K_DEBUG_ANY, "DMA map: %p (%zu) -> %llx\n",
797 ds, sc->desc_len, (unsigned long long)sc->desc_daddr); 794 ds, ah->desc_len, (unsigned long long)ah->desc_daddr);
798 795
799 bf = kcalloc(1 + ATH_TXBUF + ATH_RXBUF + ATH_BCBUF, 796 bf = kcalloc(1 + ATH_TXBUF + ATH_RXBUF + ATH_BCBUF,
800 sizeof(struct ath5k_buf), GFP_KERNEL); 797 sizeof(struct ath5k_buf), GFP_KERNEL);
801 if (bf == NULL) { 798 if (bf == NULL) {
802 ATH5K_ERR(sc, "can't allocate bufptr\n"); 799 ATH5K_ERR(ah, "can't allocate bufptr\n");
803 ret = -ENOMEM; 800 ret = -ENOMEM;
804 goto err_free; 801 goto err_free;
805 } 802 }
806 sc->bufptr = bf; 803 ah->bufptr = bf;
807 804
808 INIT_LIST_HEAD(&sc->rxbuf); 805 INIT_LIST_HEAD(&ah->rxbuf);
809 for (i = 0; i < ATH_RXBUF; i++, bf++, ds++, da += sizeof(*ds)) { 806 for (i = 0; i < ATH_RXBUF; i++, bf++, ds++, da += sizeof(*ds)) {
810 bf->desc = ds; 807 bf->desc = ds;
811 bf->daddr = da; 808 bf->daddr = da;
812 list_add_tail(&bf->list, &sc->rxbuf); 809 list_add_tail(&bf->list, &ah->rxbuf);
813 } 810 }
814 811
815 INIT_LIST_HEAD(&sc->txbuf); 812 INIT_LIST_HEAD(&ah->txbuf);
816 sc->txbuf_len = ATH_TXBUF; 813 ah->txbuf_len = ATH_TXBUF;
817 for (i = 0; i < ATH_TXBUF; i++, bf++, ds++, da += sizeof(*ds)) { 814 for (i = 0; i < ATH_TXBUF; i++, bf++, ds++, da += sizeof(*ds)) {
818 bf->desc = ds; 815 bf->desc = ds;
819 bf->daddr = da; 816 bf->daddr = da;
820 list_add_tail(&bf->list, &sc->txbuf); 817 list_add_tail(&bf->list, &ah->txbuf);
821 } 818 }
822 819
823 /* beacon buffers */ 820 /* beacon buffers */
824 INIT_LIST_HEAD(&sc->bcbuf); 821 INIT_LIST_HEAD(&ah->bcbuf);
825 for (i = 0; i < ATH_BCBUF; i++, bf++, ds++, da += sizeof(*ds)) { 822 for (i = 0; i < ATH_BCBUF; i++, bf++, ds++, da += sizeof(*ds)) {
826 bf->desc = ds; 823 bf->desc = ds;
827 bf->daddr = da; 824 bf->daddr = da;
828 list_add_tail(&bf->list, &sc->bcbuf); 825 list_add_tail(&bf->list, &ah->bcbuf);
829 } 826 }
830 827
831 return 0; 828 return 0;
832err_free: 829err_free:
833 dma_free_coherent(sc->dev, sc->desc_len, sc->desc, sc->desc_daddr); 830 dma_free_coherent(ah->dev, ah->desc_len, ah->desc, ah->desc_daddr);
834err: 831err:
835 sc->desc = NULL; 832 ah->desc = NULL;
836 return ret; 833 return ret;
837} 834}
838 835
839void 836void
840ath5k_txbuf_free_skb(struct ath5k_softc *sc, struct ath5k_buf *bf) 837ath5k_txbuf_free_skb(struct ath5k_hw *ah, struct ath5k_buf *bf)
841{ 838{
842 BUG_ON(!bf); 839 BUG_ON(!bf);
843 if (!bf->skb) 840 if (!bf->skb)
844 return; 841 return;
845 dma_unmap_single(sc->dev, bf->skbaddr, bf->skb->len, 842 dma_unmap_single(ah->dev, bf->skbaddr, bf->skb->len,
846 DMA_TO_DEVICE); 843 DMA_TO_DEVICE);
847 dev_kfree_skb_any(bf->skb); 844 dev_kfree_skb_any(bf->skb);
848 bf->skb = NULL; 845 bf->skb = NULL;
@@ -851,15 +848,14 @@ ath5k_txbuf_free_skb(struct ath5k_softc *sc, struct ath5k_buf *bf)
851} 848}
852 849
853void 850void
854ath5k_rxbuf_free_skb(struct ath5k_softc *sc, struct ath5k_buf *bf) 851ath5k_rxbuf_free_skb(struct ath5k_hw *ah, struct ath5k_buf *bf)
855{ 852{
856 struct ath5k_hw *ah = sc->ah;
857 struct ath_common *common = ath5k_hw_common(ah); 853 struct ath_common *common = ath5k_hw_common(ah);
858 854
859 BUG_ON(!bf); 855 BUG_ON(!bf);
860 if (!bf->skb) 856 if (!bf->skb)
861 return; 857 return;
862 dma_unmap_single(sc->dev, bf->skbaddr, common->rx_bufsize, 858 dma_unmap_single(ah->dev, bf->skbaddr, common->rx_bufsize,
863 DMA_FROM_DEVICE); 859 DMA_FROM_DEVICE);
864 dev_kfree_skb_any(bf->skb); 860 dev_kfree_skb_any(bf->skb);
865 bf->skb = NULL; 861 bf->skb = NULL;
@@ -868,24 +864,24 @@ ath5k_rxbuf_free_skb(struct ath5k_softc *sc, struct ath5k_buf *bf)
868} 864}
869 865
870static void 866static void
871ath5k_desc_free(struct ath5k_softc *sc) 867ath5k_desc_free(struct ath5k_hw *ah)
872{ 868{
873 struct ath5k_buf *bf; 869 struct ath5k_buf *bf;
874 870
875 list_for_each_entry(bf, &sc->txbuf, list) 871 list_for_each_entry(bf, &ah->txbuf, list)
876 ath5k_txbuf_free_skb(sc, bf); 872 ath5k_txbuf_free_skb(ah, bf);
877 list_for_each_entry(bf, &sc->rxbuf, list) 873 list_for_each_entry(bf, &ah->rxbuf, list)
878 ath5k_rxbuf_free_skb(sc, bf); 874 ath5k_rxbuf_free_skb(ah, bf);
879 list_for_each_entry(bf, &sc->bcbuf, list) 875 list_for_each_entry(bf, &ah->bcbuf, list)
880 ath5k_txbuf_free_skb(sc, bf); 876 ath5k_txbuf_free_skb(ah, bf);
881 877
882 /* Free memory associated with all descriptors */ 878 /* Free memory associated with all descriptors */
883 dma_free_coherent(sc->dev, sc->desc_len, sc->desc, sc->desc_daddr); 879 dma_free_coherent(ah->dev, ah->desc_len, ah->desc, ah->desc_daddr);
884 sc->desc = NULL; 880 ah->desc = NULL;
885 sc->desc_daddr = 0; 881 ah->desc_daddr = 0;
886 882
887 kfree(sc->bufptr); 883 kfree(ah->bufptr);
888 sc->bufptr = NULL; 884 ah->bufptr = NULL;
889} 885}
890 886
891 887
@@ -894,10 +890,9 @@ ath5k_desc_free(struct ath5k_softc *sc)
894\**************/ 890\**************/
895 891
896static struct ath5k_txq * 892static struct ath5k_txq *
897ath5k_txq_setup(struct ath5k_softc *sc, 893ath5k_txq_setup(struct ath5k_hw *ah,
898 int qtype, int subtype) 894 int qtype, int subtype)
899{ 895{
900 struct ath5k_hw *ah = sc->ah;
901 struct ath5k_txq *txq; 896 struct ath5k_txq *txq;
902 struct ath5k_txq_info qi = { 897 struct ath5k_txq_info qi = {
903 .tqi_subtype = subtype, 898 .tqi_subtype = subtype,
@@ -931,13 +926,13 @@ ath5k_txq_setup(struct ath5k_softc *sc,
931 */ 926 */
932 return ERR_PTR(qnum); 927 return ERR_PTR(qnum);
933 } 928 }
934 if (qnum >= ARRAY_SIZE(sc->txqs)) { 929 if (qnum >= ARRAY_SIZE(ah->txqs)) {
935 ATH5K_ERR(sc, "hw qnum %u out of range, max %tu!\n", 930 ATH5K_ERR(ah, "hw qnum %u out of range, max %tu!\n",
936 qnum, ARRAY_SIZE(sc->txqs)); 931 qnum, ARRAY_SIZE(ah->txqs));
937 ath5k_hw_release_tx_queue(ah, qnum); 932 ath5k_hw_release_tx_queue(ah, qnum);
938 return ERR_PTR(-EINVAL); 933 return ERR_PTR(-EINVAL);
939 } 934 }
940 txq = &sc->txqs[qnum]; 935 txq = &ah->txqs[qnum];
941 if (!txq->setup) { 936 if (!txq->setup) {
942 txq->qnum = qnum; 937 txq->qnum = qnum;
943 txq->link = NULL; 938 txq->link = NULL;
@@ -949,7 +944,7 @@ ath5k_txq_setup(struct ath5k_softc *sc,
949 txq->txq_poll_mark = false; 944 txq->txq_poll_mark = false;
950 txq->txq_stuck = 0; 945 txq->txq_stuck = 0;
951 } 946 }
952 return &sc->txqs[qnum]; 947 return &ah->txqs[qnum];
953} 948}
954 949
955static int 950static int
@@ -969,18 +964,17 @@ ath5k_beaconq_setup(struct ath5k_hw *ah)
969} 964}
970 965
971static int 966static int
972ath5k_beaconq_config(struct ath5k_softc *sc) 967ath5k_beaconq_config(struct ath5k_hw *ah)
973{ 968{
974 struct ath5k_hw *ah = sc->ah;
975 struct ath5k_txq_info qi; 969 struct ath5k_txq_info qi;
976 int ret; 970 int ret;
977 971
978 ret = ath5k_hw_get_tx_queueprops(ah, sc->bhalq, &qi); 972 ret = ath5k_hw_get_tx_queueprops(ah, ah->bhalq, &qi);
979 if (ret) 973 if (ret)
980 goto err; 974 goto err;
981 975
982 if (sc->opmode == NL80211_IFTYPE_AP || 976 if (ah->opmode == NL80211_IFTYPE_AP ||
983 sc->opmode == NL80211_IFTYPE_MESH_POINT) { 977 ah->opmode == NL80211_IFTYPE_MESH_POINT) {
984 /* 978 /*
985 * Always burst out beacon and CAB traffic 979 * Always burst out beacon and CAB traffic
986 * (aifs = cwmin = cwmax = 0) 980 * (aifs = cwmin = cwmax = 0)
@@ -988,7 +982,7 @@ ath5k_beaconq_config(struct ath5k_softc *sc)
988 qi.tqi_aifs = 0; 982 qi.tqi_aifs = 0;
989 qi.tqi_cw_min = 0; 983 qi.tqi_cw_min = 0;
990 qi.tqi_cw_max = 0; 984 qi.tqi_cw_max = 0;
991 } else if (sc->opmode == NL80211_IFTYPE_ADHOC) { 985 } else if (ah->opmode == NL80211_IFTYPE_ADHOC) {
992 /* 986 /*
993 * Adhoc mode; backoff between 0 and (2 * cw_min). 987 * Adhoc mode; backoff between 0 and (2 * cw_min).
994 */ 988 */
@@ -997,17 +991,17 @@ ath5k_beaconq_config(struct ath5k_softc *sc)
997 qi.tqi_cw_max = 2 * AR5K_TUNE_CWMIN; 991 qi.tqi_cw_max = 2 * AR5K_TUNE_CWMIN;
998 } 992 }
999 993
1000 ATH5K_DBG(sc, ATH5K_DEBUG_BEACON, 994 ATH5K_DBG(ah, ATH5K_DEBUG_BEACON,
1001 "beacon queueprops tqi_aifs:%d tqi_cw_min:%d tqi_cw_max:%d\n", 995 "beacon queueprops tqi_aifs:%d tqi_cw_min:%d tqi_cw_max:%d\n",
1002 qi.tqi_aifs, qi.tqi_cw_min, qi.tqi_cw_max); 996 qi.tqi_aifs, qi.tqi_cw_min, qi.tqi_cw_max);
1003 997
1004 ret = ath5k_hw_set_tx_queueprops(ah, sc->bhalq, &qi); 998 ret = ath5k_hw_set_tx_queueprops(ah, ah->bhalq, &qi);
1005 if (ret) { 999 if (ret) {
1006 ATH5K_ERR(sc, "%s: unable to update parameters for beacon " 1000 ATH5K_ERR(ah, "%s: unable to update parameters for beacon "
1007 "hardware queue!\n", __func__); 1001 "hardware queue!\n", __func__);
1008 goto err; 1002 goto err;
1009 } 1003 }
1010 ret = ath5k_hw_reset_tx_queue(ah, sc->bhalq); /* push to h/w */ 1004 ret = ath5k_hw_reset_tx_queue(ah, ah->bhalq); /* push to h/w */
1011 if (ret) 1005 if (ret)
1012 goto err; 1006 goto err;
1013 1007
@@ -1016,7 +1010,7 @@ ath5k_beaconq_config(struct ath5k_softc *sc)
1016 if (ret) 1010 if (ret)
1017 goto err; 1011 goto err;
1018 1012
1019 qi.tqi_ready_time = (sc->bintval * 80) / 100; 1013 qi.tqi_ready_time = (ah->bintval * 80) / 100;
1020 ret = ath5k_hw_set_tx_queueprops(ah, AR5K_TX_QUEUE_ID_CAB, &qi); 1014 ret = ath5k_hw_set_tx_queueprops(ah, AR5K_TX_QUEUE_ID_CAB, &qi);
1021 if (ret) 1015 if (ret)
1022 goto err; 1016 goto err;
@@ -1029,7 +1023,7 @@ err:
1029/** 1023/**
1030 * ath5k_drain_tx_buffs - Empty tx buffers 1024 * ath5k_drain_tx_buffs - Empty tx buffers
1031 * 1025 *
1032 * @sc The &struct ath5k_softc 1026 * @ah The &struct ath5k_hw
1033 * 1027 *
1034 * Empty tx buffers from all queues in preparation 1028 * Empty tx buffers from all queues in preparation
1035 * of a reset or during shutdown. 1029 * of a reset or during shutdown.
@@ -1038,26 +1032,26 @@ err:
1038 * we do not need to block ath5k_tx_tasklet 1032 * we do not need to block ath5k_tx_tasklet
1039 */ 1033 */
1040static void 1034static void
1041ath5k_drain_tx_buffs(struct ath5k_softc *sc) 1035ath5k_drain_tx_buffs(struct ath5k_hw *ah)
1042{ 1036{
1043 struct ath5k_txq *txq; 1037 struct ath5k_txq *txq;
1044 struct ath5k_buf *bf, *bf0; 1038 struct ath5k_buf *bf, *bf0;
1045 int i; 1039 int i;
1046 1040
1047 for (i = 0; i < ARRAY_SIZE(sc->txqs); i++) { 1041 for (i = 0; i < ARRAY_SIZE(ah->txqs); i++) {
1048 if (sc->txqs[i].setup) { 1042 if (ah->txqs[i].setup) {
1049 txq = &sc->txqs[i]; 1043 txq = &ah->txqs[i];
1050 spin_lock_bh(&txq->lock); 1044 spin_lock_bh(&txq->lock);
1051 list_for_each_entry_safe(bf, bf0, &txq->q, list) { 1045 list_for_each_entry_safe(bf, bf0, &txq->q, list) {
1052 ath5k_debug_printtxbuf(sc, bf); 1046 ath5k_debug_printtxbuf(ah, bf);
1053 1047
1054 ath5k_txbuf_free_skb(sc, bf); 1048 ath5k_txbuf_free_skb(ah, bf);
1055 1049
1056 spin_lock_bh(&sc->txbuflock); 1050 spin_lock_bh(&ah->txbuflock);
1057 list_move_tail(&bf->list, &sc->txbuf); 1051 list_move_tail(&bf->list, &ah->txbuf);
1058 sc->txbuf_len++; 1052 ah->txbuf_len++;
1059 txq->txq_len--; 1053 txq->txq_len--;
1060 spin_unlock_bh(&sc->txbuflock); 1054 spin_unlock_bh(&ah->txbuflock);
1061 } 1055 }
1062 txq->link = NULL; 1056 txq->link = NULL;
1063 txq->txq_poll_mark = false; 1057 txq->txq_poll_mark = false;
@@ -1067,14 +1061,14 @@ ath5k_drain_tx_buffs(struct ath5k_softc *sc)
1067} 1061}
1068 1062
1069static void 1063static void
1070ath5k_txq_release(struct ath5k_softc *sc) 1064ath5k_txq_release(struct ath5k_hw *ah)
1071{ 1065{
1072 struct ath5k_txq *txq = sc->txqs; 1066 struct ath5k_txq *txq = ah->txqs;
1073 unsigned int i; 1067 unsigned int i;
1074 1068
1075 for (i = 0; i < ARRAY_SIZE(sc->txqs); i++, txq++) 1069 for (i = 0; i < ARRAY_SIZE(ah->txqs); i++, txq++)
1076 if (txq->setup) { 1070 if (txq->setup) {
1077 ath5k_hw_release_tx_queue(sc->ah, txq->qnum); 1071 ath5k_hw_release_tx_queue(ah, txq->qnum);
1078 txq->setup = false; 1072 txq->setup = false;
1079 } 1073 }
1080} 1074}
@@ -1088,33 +1082,32 @@ ath5k_txq_release(struct ath5k_softc *sc)
1088 * Enable the receive h/w following a reset. 1082 * Enable the receive h/w following a reset.
1089 */ 1083 */
1090static int 1084static int
1091ath5k_rx_start(struct ath5k_softc *sc) 1085ath5k_rx_start(struct ath5k_hw *ah)
1092{ 1086{
1093 struct ath5k_hw *ah = sc->ah;
1094 struct ath_common *common = ath5k_hw_common(ah); 1087 struct ath_common *common = ath5k_hw_common(ah);
1095 struct ath5k_buf *bf; 1088 struct ath5k_buf *bf;
1096 int ret; 1089 int ret;
1097 1090
1098 common->rx_bufsize = roundup(IEEE80211_MAX_FRAME_LEN, common->cachelsz); 1091 common->rx_bufsize = roundup(IEEE80211_MAX_FRAME_LEN, common->cachelsz);
1099 1092
1100 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "cachelsz %u rx_bufsize %u\n", 1093 ATH5K_DBG(ah, ATH5K_DEBUG_RESET, "cachelsz %u rx_bufsize %u\n",
1101 common->cachelsz, common->rx_bufsize); 1094 common->cachelsz, common->rx_bufsize);
1102 1095
1103 spin_lock_bh(&sc->rxbuflock); 1096 spin_lock_bh(&ah->rxbuflock);
1104 sc->rxlink = NULL; 1097 ah->rxlink = NULL;
1105 list_for_each_entry(bf, &sc->rxbuf, list) { 1098 list_for_each_entry(bf, &ah->rxbuf, list) {
1106 ret = ath5k_rxbuf_setup(sc, bf); 1099 ret = ath5k_rxbuf_setup(ah, bf);
1107 if (ret != 0) { 1100 if (ret != 0) {
1108 spin_unlock_bh(&sc->rxbuflock); 1101 spin_unlock_bh(&ah->rxbuflock);
1109 goto err; 1102 goto err;
1110 } 1103 }
1111 } 1104 }
1112 bf = list_first_entry(&sc->rxbuf, struct ath5k_buf, list); 1105 bf = list_first_entry(&ah->rxbuf, struct ath5k_buf, list);
1113 ath5k_hw_set_rxdp(ah, bf->daddr); 1106 ath5k_hw_set_rxdp(ah, bf->daddr);
1114 spin_unlock_bh(&sc->rxbuflock); 1107 spin_unlock_bh(&ah->rxbuflock);
1115 1108
1116 ath5k_hw_start_rx_dma(ah); /* enable recv descriptors */ 1109 ath5k_hw_start_rx_dma(ah); /* enable recv descriptors */
1117 ath5k_update_bssid_mask_and_opmode(sc, NULL); /* set filters, etc. */ 1110 ath5k_update_bssid_mask_and_opmode(ah, NULL); /* set filters, etc. */
1118 ath5k_hw_start_rx_pcu(ah); /* re-enable PCU/DMA engine */ 1111 ath5k_hw_start_rx_pcu(ah); /* re-enable PCU/DMA engine */
1119 1112
1120 return 0; 1113 return 0;
@@ -1130,21 +1123,19 @@ err:
1130 * does. 1123 * does.
1131 */ 1124 */
1132static void 1125static void
1133ath5k_rx_stop(struct ath5k_softc *sc) 1126ath5k_rx_stop(struct ath5k_hw *ah)
1134{ 1127{
1135 struct ath5k_hw *ah = sc->ah;
1136 1128
1137 ath5k_hw_set_rx_filter(ah, 0); /* clear recv filter */ 1129 ath5k_hw_set_rx_filter(ah, 0); /* clear recv filter */
1138 ath5k_hw_stop_rx_pcu(ah); /* disable PCU */ 1130 ath5k_hw_stop_rx_pcu(ah); /* disable PCU */
1139 1131
1140 ath5k_debug_printrxbuffs(sc, ah); 1132 ath5k_debug_printrxbuffs(ah);
1141} 1133}
1142 1134
1143static unsigned int 1135static unsigned int
1144ath5k_rx_decrypted(struct ath5k_softc *sc, struct sk_buff *skb, 1136ath5k_rx_decrypted(struct ath5k_hw *ah, struct sk_buff *skb,
1145 struct ath5k_rx_status *rs) 1137 struct ath5k_rx_status *rs)
1146{ 1138{
1147 struct ath5k_hw *ah = sc->ah;
1148 struct ath_common *common = ath5k_hw_common(ah); 1139 struct ath_common *common = ath5k_hw_common(ah);
1149 struct ieee80211_hdr *hdr = (void *)skb->data; 1140 struct ieee80211_hdr *hdr = (void *)skb->data;
1150 unsigned int keyix, hlen; 1141 unsigned int keyix, hlen;
@@ -1171,10 +1162,10 @@ ath5k_rx_decrypted(struct ath5k_softc *sc, struct sk_buff *skb,
1171 1162
1172 1163
1173static void 1164static void
1174ath5k_check_ibss_tsf(struct ath5k_softc *sc, struct sk_buff *skb, 1165ath5k_check_ibss_tsf(struct ath5k_hw *ah, struct sk_buff *skb,
1175 struct ieee80211_rx_status *rxs) 1166 struct ieee80211_rx_status *rxs)
1176{ 1167{
1177 struct ath_common *common = ath5k_hw_common(sc->ah); 1168 struct ath_common *common = ath5k_hw_common(ah);
1178 u64 tsf, bc_tstamp; 1169 u64 tsf, bc_tstamp;
1179 u32 hw_tu; 1170 u32 hw_tu;
1180 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data; 1171 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
@@ -1187,11 +1178,11 @@ ath5k_check_ibss_tsf(struct ath5k_softc *sc, struct sk_buff *skb,
1187 * have updated the local TSF. We have to work around various 1178 * have updated the local TSF. We have to work around various
1188 * hardware bugs, though... 1179 * hardware bugs, though...
1189 */ 1180 */
1190 tsf = ath5k_hw_get_tsf64(sc->ah); 1181 tsf = ath5k_hw_get_tsf64(ah);
1191 bc_tstamp = le64_to_cpu(mgmt->u.beacon.timestamp); 1182 bc_tstamp = le64_to_cpu(mgmt->u.beacon.timestamp);
1192 hw_tu = TSF_TO_TU(tsf); 1183 hw_tu = TSF_TO_TU(tsf);
1193 1184
1194 ATH5K_DBG_UNLIMIT(sc, ATH5K_DEBUG_BEACON, 1185 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON,
1195 "beacon %llx mactime %llx (diff %lld) tsf now %llx\n", 1186 "beacon %llx mactime %llx (diff %lld) tsf now %llx\n",
1196 (unsigned long long)bc_tstamp, 1187 (unsigned long long)bc_tstamp,
1197 (unsigned long long)rxs->mactime, 1188 (unsigned long long)rxs->mactime,
@@ -1210,7 +1201,7 @@ ath5k_check_ibss_tsf(struct ath5k_softc *sc, struct sk_buff *skb,
1210 * received, not like mac80211 which defines it at the start. 1201 * received, not like mac80211 which defines it at the start.
1211 */ 1202 */
1212 if (bc_tstamp > rxs->mactime) { 1203 if (bc_tstamp > rxs->mactime) {
1213 ATH5K_DBG_UNLIMIT(sc, ATH5K_DEBUG_BEACON, 1204 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON,
1214 "fixing mactime from %llx to %llx\n", 1205 "fixing mactime from %llx to %llx\n",
1215 (unsigned long long)rxs->mactime, 1206 (unsigned long long)rxs->mactime,
1216 (unsigned long long)tsf); 1207 (unsigned long long)tsf);
@@ -1223,25 +1214,24 @@ ath5k_check_ibss_tsf(struct ath5k_softc *sc, struct sk_buff *skb,
1223 * beacons. This also takes care of synchronizing beacon sending 1214 * beacons. This also takes care of synchronizing beacon sending
1224 * times with other stations. 1215 * times with other stations.
1225 */ 1216 */
1226 if (hw_tu >= sc->nexttbtt) 1217 if (hw_tu >= ah->nexttbtt)
1227 ath5k_beacon_update_timers(sc, bc_tstamp); 1218 ath5k_beacon_update_timers(ah, bc_tstamp);
1228 1219
1229 /* Check if the beacon timers are still correct, because a TSF 1220 /* Check if the beacon timers are still correct, because a TSF
1230 * update might have created a window between them - for a 1221 * update might have created a window between them - for a
1231 * longer description see the comment of this function: */ 1222 * longer description see the comment of this function: */
1232 if (!ath5k_hw_check_beacon_timers(sc->ah, sc->bintval)) { 1223 if (!ath5k_hw_check_beacon_timers(ah, ah->bintval)) {
1233 ath5k_beacon_update_timers(sc, bc_tstamp); 1224 ath5k_beacon_update_timers(ah, bc_tstamp);
1234 ATH5K_DBG_UNLIMIT(sc, ATH5K_DEBUG_BEACON, 1225 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON,
1235 "fixed beacon timers after beacon receive\n"); 1226 "fixed beacon timers after beacon receive\n");
1236 } 1227 }
1237 } 1228 }
1238} 1229}
1239 1230
1240static void 1231static void
1241ath5k_update_beacon_rssi(struct ath5k_softc *sc, struct sk_buff *skb, int rssi) 1232ath5k_update_beacon_rssi(struct ath5k_hw *ah, struct sk_buff *skb, int rssi)
1242{ 1233{
1243 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data; 1234 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
1244 struct ath5k_hw *ah = sc->ah;
1245 struct ath_common *common = ath5k_hw_common(ah); 1235 struct ath_common *common = ath5k_hw_common(ah);
1246 1236
1247 /* only beacons from our BSSID */ 1237 /* only beacons from our BSSID */
@@ -1323,7 +1313,7 @@ static int ath5k_remove_padding(struct sk_buff *skb)
1323} 1313}
1324 1314
1325static void 1315static void
1326ath5k_receive_frame(struct ath5k_softc *sc, struct sk_buff *skb, 1316ath5k_receive_frame(struct ath5k_hw *ah, struct sk_buff *skb,
1327 struct ath5k_rx_status *rs) 1317 struct ath5k_rx_status *rs)
1328{ 1318{
1329 struct ieee80211_rx_status *rxs; 1319 struct ieee80211_rx_status *rxs;
@@ -1356,37 +1346,37 @@ ath5k_receive_frame(struct ath5k_softc *sc, struct sk_buff *skb,
1356 * impossible to comply to that. This affects IBSS merge only 1346 * impossible to comply to that. This affects IBSS merge only
1357 * right now, so it's not too bad... 1347 * right now, so it's not too bad...
1358 */ 1348 */
1359 rxs->mactime = ath5k_extend_tsf(sc->ah, rs->rs_tstamp); 1349 rxs->mactime = ath5k_extend_tsf(ah, rs->rs_tstamp);
1360 rxs->flag |= RX_FLAG_MACTIME_MPDU; 1350 rxs->flag |= RX_FLAG_MACTIME_MPDU;
1361 1351
1362 rxs->freq = sc->curchan->center_freq; 1352 rxs->freq = ah->curchan->center_freq;
1363 rxs->band = sc->curchan->band; 1353 rxs->band = ah->curchan->band;
1364 1354
1365 rxs->signal = sc->ah->ah_noise_floor + rs->rs_rssi; 1355 rxs->signal = ah->ah_noise_floor + rs->rs_rssi;
1366 1356
1367 rxs->antenna = rs->rs_antenna; 1357 rxs->antenna = rs->rs_antenna;
1368 1358
1369 if (rs->rs_antenna > 0 && rs->rs_antenna < 5) 1359 if (rs->rs_antenna > 0 && rs->rs_antenna < 5)
1370 sc->stats.antenna_rx[rs->rs_antenna]++; 1360 ah->stats.antenna_rx[rs->rs_antenna]++;
1371 else 1361 else
1372 sc->stats.antenna_rx[0]++; /* invalid */ 1362 ah->stats.antenna_rx[0]++; /* invalid */
1373 1363
1374 rxs->rate_idx = ath5k_hw_to_driver_rix(sc, rs->rs_rate); 1364 rxs->rate_idx = ath5k_hw_to_driver_rix(ah, rs->rs_rate);
1375 rxs->flag |= ath5k_rx_decrypted(sc, skb, rs); 1365 rxs->flag |= ath5k_rx_decrypted(ah, skb, rs);
1376 1366
1377 if (rxs->rate_idx >= 0 && rs->rs_rate == 1367 if (rxs->rate_idx >= 0 && rs->rs_rate ==
1378 sc->sbands[sc->curchan->band].bitrates[rxs->rate_idx].hw_value_short) 1368 ah->sbands[ah->curchan->band].bitrates[rxs->rate_idx].hw_value_short)
1379 rxs->flag |= RX_FLAG_SHORTPRE; 1369 rxs->flag |= RX_FLAG_SHORTPRE;
1380 1370
1381 trace_ath5k_rx(sc, skb); 1371 trace_ath5k_rx(ah, skb);
1382 1372
1383 ath5k_update_beacon_rssi(sc, skb, rs->rs_rssi); 1373 ath5k_update_beacon_rssi(ah, skb, rs->rs_rssi);
1384 1374
1385 /* check beacons in IBSS mode */ 1375 /* check beacons in IBSS mode */
1386 if (sc->opmode == NL80211_IFTYPE_ADHOC) 1376 if (ah->opmode == NL80211_IFTYPE_ADHOC)
1387 ath5k_check_ibss_tsf(sc, skb, rxs); 1377 ath5k_check_ibss_tsf(ah, skb, rxs);
1388 1378
1389 ieee80211_rx(sc->hw, skb); 1379 ieee80211_rx(ah->hw, skb);
1390} 1380}
1391 1381
1392/** ath5k_frame_receive_ok() - Do we want to receive this frame or not? 1382/** ath5k_frame_receive_ok() - Do we want to receive this frame or not?
@@ -1395,20 +1385,20 @@ ath5k_receive_frame(struct ath5k_softc *sc, struct sk_buff *skb,
1395 * statistics. Return true if we want this frame, false if not. 1385 * statistics. Return true if we want this frame, false if not.
1396 */ 1386 */
1397static bool 1387static bool
1398ath5k_receive_frame_ok(struct ath5k_softc *sc, struct ath5k_rx_status *rs) 1388ath5k_receive_frame_ok(struct ath5k_hw *ah, struct ath5k_rx_status *rs)
1399{ 1389{
1400 sc->stats.rx_all_count++; 1390 ah->stats.rx_all_count++;
1401 sc->stats.rx_bytes_count += rs->rs_datalen; 1391 ah->stats.rx_bytes_count += rs->rs_datalen;
1402 1392
1403 if (unlikely(rs->rs_status)) { 1393 if (unlikely(rs->rs_status)) {
1404 if (rs->rs_status & AR5K_RXERR_CRC) 1394 if (rs->rs_status & AR5K_RXERR_CRC)
1405 sc->stats.rxerr_crc++; 1395 ah->stats.rxerr_crc++;
1406 if (rs->rs_status & AR5K_RXERR_FIFO) 1396 if (rs->rs_status & AR5K_RXERR_FIFO)
1407 sc->stats.rxerr_fifo++; 1397 ah->stats.rxerr_fifo++;
1408 if (rs->rs_status & AR5K_RXERR_PHY) { 1398 if (rs->rs_status & AR5K_RXERR_PHY) {
1409 sc->stats.rxerr_phy++; 1399 ah->stats.rxerr_phy++;
1410 if (rs->rs_phyerr > 0 && rs->rs_phyerr < 32) 1400 if (rs->rs_phyerr > 0 && rs->rs_phyerr < 32)
1411 sc->stats.rxerr_phy_code[rs->rs_phyerr]++; 1401 ah->stats.rxerr_phy_code[rs->rs_phyerr]++;
1412 return false; 1402 return false;
1413 } 1403 }
1414 if (rs->rs_status & AR5K_RXERR_DECRYPT) { 1404 if (rs->rs_status & AR5K_RXERR_DECRYPT) {
@@ -1422,13 +1412,13 @@ ath5k_receive_frame_ok(struct ath5k_softc *sc, struct ath5k_rx_status *rs)
1422 * 1412 *
1423 * XXX do key cache faulting 1413 * XXX do key cache faulting
1424 */ 1414 */
1425 sc->stats.rxerr_decrypt++; 1415 ah->stats.rxerr_decrypt++;
1426 if (rs->rs_keyix == AR5K_RXKEYIX_INVALID && 1416 if (rs->rs_keyix == AR5K_RXKEYIX_INVALID &&
1427 !(rs->rs_status & AR5K_RXERR_CRC)) 1417 !(rs->rs_status & AR5K_RXERR_CRC))
1428 return true; 1418 return true;
1429 } 1419 }
1430 if (rs->rs_status & AR5K_RXERR_MIC) { 1420 if (rs->rs_status & AR5K_RXERR_MIC) {
1431 sc->stats.rxerr_mic++; 1421 ah->stats.rxerr_mic++;
1432 return true; 1422 return true;
1433 } 1423 }
1434 1424
@@ -1438,26 +1428,26 @@ ath5k_receive_frame_ok(struct ath5k_softc *sc, struct ath5k_rx_status *rs)
1438 } 1428 }
1439 1429
1440 if (unlikely(rs->rs_more)) { 1430 if (unlikely(rs->rs_more)) {
1441 sc->stats.rxerr_jumbo++; 1431 ah->stats.rxerr_jumbo++;
1442 return false; 1432 return false;
1443 } 1433 }
1444 return true; 1434 return true;
1445} 1435}
1446 1436
1447static void 1437static void
1448ath5k_set_current_imask(struct ath5k_softc *sc) 1438ath5k_set_current_imask(struct ath5k_hw *ah)
1449{ 1439{
1450 enum ath5k_int imask; 1440 enum ath5k_int imask;
1451 unsigned long flags; 1441 unsigned long flags;
1452 1442
1453 spin_lock_irqsave(&sc->irqlock, flags); 1443 spin_lock_irqsave(&ah->irqlock, flags);
1454 imask = sc->imask; 1444 imask = ah->imask;
1455 if (sc->rx_pending) 1445 if (ah->rx_pending)
1456 imask &= ~AR5K_INT_RX_ALL; 1446 imask &= ~AR5K_INT_RX_ALL;
1457 if (sc->tx_pending) 1447 if (ah->tx_pending)
1458 imask &= ~AR5K_INT_TX_ALL; 1448 imask &= ~AR5K_INT_TX_ALL;
1459 ath5k_hw_set_imr(sc->ah, imask); 1449 ath5k_hw_set_imr(ah, imask);
1460 spin_unlock_irqrestore(&sc->irqlock, flags); 1450 spin_unlock_irqrestore(&ah->irqlock, flags);
1461} 1451}
1462 1452
1463static void 1453static void
@@ -1466,39 +1456,38 @@ ath5k_tasklet_rx(unsigned long data)
1466 struct ath5k_rx_status rs = {}; 1456 struct ath5k_rx_status rs = {};
1467 struct sk_buff *skb, *next_skb; 1457 struct sk_buff *skb, *next_skb;
1468 dma_addr_t next_skb_addr; 1458 dma_addr_t next_skb_addr;
1469 struct ath5k_softc *sc = (void *)data; 1459 struct ath5k_hw *ah = (void *)data;
1470 struct ath5k_hw *ah = sc->ah;
1471 struct ath_common *common = ath5k_hw_common(ah); 1460 struct ath_common *common = ath5k_hw_common(ah);
1472 struct ath5k_buf *bf; 1461 struct ath5k_buf *bf;
1473 struct ath5k_desc *ds; 1462 struct ath5k_desc *ds;
1474 int ret; 1463 int ret;
1475 1464
1476 spin_lock(&sc->rxbuflock); 1465 spin_lock(&ah->rxbuflock);
1477 if (list_empty(&sc->rxbuf)) { 1466 if (list_empty(&ah->rxbuf)) {
1478 ATH5K_WARN(sc, "empty rx buf pool\n"); 1467 ATH5K_WARN(ah, "empty rx buf pool\n");
1479 goto unlock; 1468 goto unlock;
1480 } 1469 }
1481 do { 1470 do {
1482 bf = list_first_entry(&sc->rxbuf, struct ath5k_buf, list); 1471 bf = list_first_entry(&ah->rxbuf, struct ath5k_buf, list);
1483 BUG_ON(bf->skb == NULL); 1472 BUG_ON(bf->skb == NULL);
1484 skb = bf->skb; 1473 skb = bf->skb;
1485 ds = bf->desc; 1474 ds = bf->desc;
1486 1475
1487 /* bail if HW is still using self-linked descriptor */ 1476 /* bail if HW is still using self-linked descriptor */
1488 if (ath5k_hw_get_rxdp(sc->ah) == bf->daddr) 1477 if (ath5k_hw_get_rxdp(ah) == bf->daddr)
1489 break; 1478 break;
1490 1479
1491 ret = sc->ah->ah_proc_rx_desc(sc->ah, ds, &rs); 1480 ret = ah->ah_proc_rx_desc(ah, ds, &rs);
1492 if (unlikely(ret == -EINPROGRESS)) 1481 if (unlikely(ret == -EINPROGRESS))
1493 break; 1482 break;
1494 else if (unlikely(ret)) { 1483 else if (unlikely(ret)) {
1495 ATH5K_ERR(sc, "error in processing rx descriptor\n"); 1484 ATH5K_ERR(ah, "error in processing rx descriptor\n");
1496 sc->stats.rxerr_proc++; 1485 ah->stats.rxerr_proc++;
1497 break; 1486 break;
1498 } 1487 }
1499 1488
1500 if (ath5k_receive_frame_ok(sc, &rs)) { 1489 if (ath5k_receive_frame_ok(ah, &rs)) {
1501 next_skb = ath5k_rx_skb_alloc(sc, &next_skb_addr); 1490 next_skb = ath5k_rx_skb_alloc(ah, &next_skb_addr);
1502 1491
1503 /* 1492 /*
1504 * If we can't replace bf->skb with a new skb under 1493 * If we can't replace bf->skb with a new skb under
@@ -1507,24 +1496,24 @@ ath5k_tasklet_rx(unsigned long data)
1507 if (!next_skb) 1496 if (!next_skb)
1508 goto next; 1497 goto next;
1509 1498
1510 dma_unmap_single(sc->dev, bf->skbaddr, 1499 dma_unmap_single(ah->dev, bf->skbaddr,
1511 common->rx_bufsize, 1500 common->rx_bufsize,
1512 DMA_FROM_DEVICE); 1501 DMA_FROM_DEVICE);
1513 1502
1514 skb_put(skb, rs.rs_datalen); 1503 skb_put(skb, rs.rs_datalen);
1515 1504
1516 ath5k_receive_frame(sc, skb, &rs); 1505 ath5k_receive_frame(ah, skb, &rs);
1517 1506
1518 bf->skb = next_skb; 1507 bf->skb = next_skb;
1519 bf->skbaddr = next_skb_addr; 1508 bf->skbaddr = next_skb_addr;
1520 } 1509 }
1521next: 1510next:
1522 list_move_tail(&bf->list, &sc->rxbuf); 1511 list_move_tail(&bf->list, &ah->rxbuf);
1523 } while (ath5k_rxbuf_setup(sc, bf) == 0); 1512 } while (ath5k_rxbuf_setup(ah, bf) == 0);
1524unlock: 1513unlock:
1525 spin_unlock(&sc->rxbuflock); 1514 spin_unlock(&ah->rxbuflock);
1526 sc->rx_pending = false; 1515 ah->rx_pending = false;
1527 ath5k_set_current_imask(sc); 1516 ath5k_set_current_imask(ah);
1528} 1517}
1529 1518
1530 1519
@@ -1536,12 +1525,12 @@ void
1536ath5k_tx_queue(struct ieee80211_hw *hw, struct sk_buff *skb, 1525ath5k_tx_queue(struct ieee80211_hw *hw, struct sk_buff *skb,
1537 struct ath5k_txq *txq) 1526 struct ath5k_txq *txq)
1538{ 1527{
1539 struct ath5k_softc *sc = hw->priv; 1528 struct ath5k_hw *ah = hw->priv;
1540 struct ath5k_buf *bf; 1529 struct ath5k_buf *bf;
1541 unsigned long flags; 1530 unsigned long flags;
1542 int padsize; 1531 int padsize;
1543 1532
1544 trace_ath5k_tx(sc, skb, txq); 1533 trace_ath5k_tx(ah, skb, txq);
1545 1534
1546 /* 1535 /*
1547 * The hardware expects the header padded to 4 byte boundaries. 1536 * The hardware expects the header padded to 4 byte boundaries.
@@ -1549,7 +1538,7 @@ ath5k_tx_queue(struct ieee80211_hw *hw, struct sk_buff *skb,
1549 */ 1538 */
1550 padsize = ath5k_add_padding(skb); 1539 padsize = ath5k_add_padding(skb);
1551 if (padsize < 0) { 1540 if (padsize < 0) {
1552 ATH5K_ERR(sc, "tx hdrlen not %%4: not enough" 1541 ATH5K_ERR(ah, "tx hdrlen not %%4: not enough"
1553 " headroom to pad"); 1542 " headroom to pad");
1554 goto drop_packet; 1543 goto drop_packet;
1555 } 1544 }
@@ -1558,28 +1547,28 @@ ath5k_tx_queue(struct ieee80211_hw *hw, struct sk_buff *skb,
1558 txq->qnum <= AR5K_TX_QUEUE_ID_DATA_MAX) 1547 txq->qnum <= AR5K_TX_QUEUE_ID_DATA_MAX)
1559 ieee80211_stop_queue(hw, txq->qnum); 1548 ieee80211_stop_queue(hw, txq->qnum);
1560 1549
1561 spin_lock_irqsave(&sc->txbuflock, flags); 1550 spin_lock_irqsave(&ah->txbuflock, flags);
1562 if (list_empty(&sc->txbuf)) { 1551 if (list_empty(&ah->txbuf)) {
1563 ATH5K_ERR(sc, "no further txbuf available, dropping packet\n"); 1552 ATH5K_ERR(ah, "no further txbuf available, dropping packet\n");
1564 spin_unlock_irqrestore(&sc->txbuflock, flags); 1553 spin_unlock_irqrestore(&ah->txbuflock, flags);
1565 ieee80211_stop_queues(hw); 1554 ieee80211_stop_queues(hw);
1566 goto drop_packet; 1555 goto drop_packet;
1567 } 1556 }
1568 bf = list_first_entry(&sc->txbuf, struct ath5k_buf, list); 1557 bf = list_first_entry(&ah->txbuf, struct ath5k_buf, list);
1569 list_del(&bf->list); 1558 list_del(&bf->list);
1570 sc->txbuf_len--; 1559 ah->txbuf_len--;
1571 if (list_empty(&sc->txbuf)) 1560 if (list_empty(&ah->txbuf))
1572 ieee80211_stop_queues(hw); 1561 ieee80211_stop_queues(hw);
1573 spin_unlock_irqrestore(&sc->txbuflock, flags); 1562 spin_unlock_irqrestore(&ah->txbuflock, flags);
1574 1563
1575 bf->skb = skb; 1564 bf->skb = skb;
1576 1565
1577 if (ath5k_txbuf_setup(sc, bf, txq, padsize)) { 1566 if (ath5k_txbuf_setup(ah, bf, txq, padsize)) {
1578 bf->skb = NULL; 1567 bf->skb = NULL;
1579 spin_lock_irqsave(&sc->txbuflock, flags); 1568 spin_lock_irqsave(&ah->txbuflock, flags);
1580 list_add_tail(&bf->list, &sc->txbuf); 1569 list_add_tail(&bf->list, &ah->txbuf);
1581 sc->txbuf_len++; 1570 ah->txbuf_len++;
1582 spin_unlock_irqrestore(&sc->txbuflock, flags); 1571 spin_unlock_irqrestore(&ah->txbuflock, flags);
1583 goto drop_packet; 1572 goto drop_packet;
1584 } 1573 }
1585 return; 1574 return;
@@ -1589,15 +1578,15 @@ drop_packet:
1589} 1578}
1590 1579
1591static void 1580static void
1592ath5k_tx_frame_completed(struct ath5k_softc *sc, struct sk_buff *skb, 1581ath5k_tx_frame_completed(struct ath5k_hw *ah, struct sk_buff *skb,
1593 struct ath5k_txq *txq, struct ath5k_tx_status *ts) 1582 struct ath5k_txq *txq, struct ath5k_tx_status *ts)
1594{ 1583{
1595 struct ieee80211_tx_info *info; 1584 struct ieee80211_tx_info *info;
1596 u8 tries[3]; 1585 u8 tries[3];
1597 int i; 1586 int i;
1598 1587
1599 sc->stats.tx_all_count++; 1588 ah->stats.tx_all_count++;
1600 sc->stats.tx_bytes_count += skb->len; 1589 ah->stats.tx_bytes_count += skb->len;
1601 info = IEEE80211_SKB_CB(skb); 1590 info = IEEE80211_SKB_CB(skb);
1602 1591
1603 tries[0] = info->status.rates[0].count; 1592 tries[0] = info->status.rates[0].count;
@@ -1617,15 +1606,15 @@ ath5k_tx_frame_completed(struct ath5k_softc *sc, struct sk_buff *skb,
1617 info->status.rates[ts->ts_final_idx + 1].idx = -1; 1606 info->status.rates[ts->ts_final_idx + 1].idx = -1;
1618 1607
1619 if (unlikely(ts->ts_status)) { 1608 if (unlikely(ts->ts_status)) {
1620 sc->stats.ack_fail++; 1609 ah->stats.ack_fail++;
1621 if (ts->ts_status & AR5K_TXERR_FILT) { 1610 if (ts->ts_status & AR5K_TXERR_FILT) {
1622 info->flags |= IEEE80211_TX_STAT_TX_FILTERED; 1611 info->flags |= IEEE80211_TX_STAT_TX_FILTERED;
1623 sc->stats.txerr_filt++; 1612 ah->stats.txerr_filt++;
1624 } 1613 }
1625 if (ts->ts_status & AR5K_TXERR_XRETRY) 1614 if (ts->ts_status & AR5K_TXERR_XRETRY)
1626 sc->stats.txerr_retry++; 1615 ah->stats.txerr_retry++;
1627 if (ts->ts_status & AR5K_TXERR_FIFO) 1616 if (ts->ts_status & AR5K_TXERR_FIFO)
1628 sc->stats.txerr_fifo++; 1617 ah->stats.txerr_fifo++;
1629 } else { 1618 } else {
1630 info->flags |= IEEE80211_TX_STAT_ACK; 1619 info->flags |= IEEE80211_TX_STAT_ACK;
1631 info->status.ack_signal = ts->ts_rssi; 1620 info->status.ack_signal = ts->ts_rssi;
@@ -1641,16 +1630,16 @@ ath5k_tx_frame_completed(struct ath5k_softc *sc, struct sk_buff *skb,
1641 ath5k_remove_padding(skb); 1630 ath5k_remove_padding(skb);
1642 1631
1643 if (ts->ts_antenna > 0 && ts->ts_antenna < 5) 1632 if (ts->ts_antenna > 0 && ts->ts_antenna < 5)
1644 sc->stats.antenna_tx[ts->ts_antenna]++; 1633 ah->stats.antenna_tx[ts->ts_antenna]++;
1645 else 1634 else
1646 sc->stats.antenna_tx[0]++; /* invalid */ 1635 ah->stats.antenna_tx[0]++; /* invalid */
1647 1636
1648 trace_ath5k_tx_complete(sc, skb, txq, ts); 1637 trace_ath5k_tx_complete(ah, skb, txq, ts);
1649 ieee80211_tx_status(sc->hw, skb); 1638 ieee80211_tx_status(ah->hw, skb);
1650} 1639}
1651 1640
1652static void 1641static void
1653ath5k_tx_processq(struct ath5k_softc *sc, struct ath5k_txq *txq) 1642ath5k_tx_processq(struct ath5k_hw *ah, struct ath5k_txq *txq)
1654{ 1643{
1655 struct ath5k_tx_status ts = {}; 1644 struct ath5k_tx_status ts = {};
1656 struct ath5k_buf *bf, *bf0; 1645 struct ath5k_buf *bf, *bf0;
@@ -1667,11 +1656,11 @@ ath5k_tx_processq(struct ath5k_softc *sc, struct ath5k_txq *txq)
1667 if (bf->skb != NULL) { 1656 if (bf->skb != NULL) {
1668 ds = bf->desc; 1657 ds = bf->desc;
1669 1658
1670 ret = sc->ah->ah_proc_tx_desc(sc->ah, ds, &ts); 1659 ret = ah->ah_proc_tx_desc(ah, ds, &ts);
1671 if (unlikely(ret == -EINPROGRESS)) 1660 if (unlikely(ret == -EINPROGRESS))
1672 break; 1661 break;
1673 else if (unlikely(ret)) { 1662 else if (unlikely(ret)) {
1674 ATH5K_ERR(sc, 1663 ATH5K_ERR(ah,
1675 "error %d while processing " 1664 "error %d while processing "
1676 "queue %u\n", ret, txq->qnum); 1665 "queue %u\n", ret, txq->qnum);
1677 break; 1666 break;
@@ -1680,9 +1669,9 @@ ath5k_tx_processq(struct ath5k_softc *sc, struct ath5k_txq *txq)
1680 skb = bf->skb; 1669 skb = bf->skb;
1681 bf->skb = NULL; 1670 bf->skb = NULL;
1682 1671
1683 dma_unmap_single(sc->dev, bf->skbaddr, skb->len, 1672 dma_unmap_single(ah->dev, bf->skbaddr, skb->len,
1684 DMA_TO_DEVICE); 1673 DMA_TO_DEVICE);
1685 ath5k_tx_frame_completed(sc, skb, txq, &ts); 1674 ath5k_tx_frame_completed(ah, skb, txq, &ts);
1686 } 1675 }
1687 1676
1688 /* 1677 /*
@@ -1691,31 +1680,31 @@ ath5k_tx_processq(struct ath5k_softc *sc, struct ath5k_txq *txq)
1691 * host memory and moved on. 1680 * host memory and moved on.
1692 * Always keep the last descriptor to avoid HW races... 1681 * Always keep the last descriptor to avoid HW races...
1693 */ 1682 */
1694 if (ath5k_hw_get_txdp(sc->ah, txq->qnum) != bf->daddr) { 1683 if (ath5k_hw_get_txdp(ah, txq->qnum) != bf->daddr) {
1695 spin_lock(&sc->txbuflock); 1684 spin_lock(&ah->txbuflock);
1696 list_move_tail(&bf->list, &sc->txbuf); 1685 list_move_tail(&bf->list, &ah->txbuf);
1697 sc->txbuf_len++; 1686 ah->txbuf_len++;
1698 txq->txq_len--; 1687 txq->txq_len--;
1699 spin_unlock(&sc->txbuflock); 1688 spin_unlock(&ah->txbuflock);
1700 } 1689 }
1701 } 1690 }
1702 spin_unlock(&txq->lock); 1691 spin_unlock(&txq->lock);
1703 if (txq->txq_len < ATH5K_TXQ_LEN_LOW && txq->qnum < 4) 1692 if (txq->txq_len < ATH5K_TXQ_LEN_LOW && txq->qnum < 4)
1704 ieee80211_wake_queue(sc->hw, txq->qnum); 1693 ieee80211_wake_queue(ah->hw, txq->qnum);
1705} 1694}
1706 1695
1707static void 1696static void
1708ath5k_tasklet_tx(unsigned long data) 1697ath5k_tasklet_tx(unsigned long data)
1709{ 1698{
1710 int i; 1699 int i;
1711 struct ath5k_softc *sc = (void *)data; 1700 struct ath5k_hw *ah = (void *)data;
1712 1701
1713 for (i = 0; i < AR5K_NUM_TX_QUEUES; i++) 1702 for (i = 0; i < AR5K_NUM_TX_QUEUES; i++)
1714 if (sc->txqs[i].setup && (sc->ah->ah_txq_isr & BIT(i))) 1703 if (ah->txqs[i].setup && (ah->ah_txq_isr & BIT(i)))
1715 ath5k_tx_processq(sc, &sc->txqs[i]); 1704 ath5k_tx_processq(ah, &ah->txqs[i]);
1716 1705
1717 sc->tx_pending = false; 1706 ah->tx_pending = false;
1718 ath5k_set_current_imask(sc); 1707 ath5k_set_current_imask(ah);
1719} 1708}
1720 1709
1721 1710
@@ -1727,25 +1716,24 @@ ath5k_tasklet_tx(unsigned long data)
1727 * Setup the beacon frame for transmit. 1716 * Setup the beacon frame for transmit.
1728 */ 1717 */
1729static int 1718static int
1730ath5k_beacon_setup(struct ath5k_softc *sc, struct ath5k_buf *bf) 1719ath5k_beacon_setup(struct ath5k_hw *ah, struct ath5k_buf *bf)
1731{ 1720{
1732 struct sk_buff *skb = bf->skb; 1721 struct sk_buff *skb = bf->skb;
1733 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 1722 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1734 struct ath5k_hw *ah = sc->ah;
1735 struct ath5k_desc *ds; 1723 struct ath5k_desc *ds;
1736 int ret = 0; 1724 int ret = 0;
1737 u8 antenna; 1725 u8 antenna;
1738 u32 flags; 1726 u32 flags;
1739 const int padsize = 0; 1727 const int padsize = 0;
1740 1728
1741 bf->skbaddr = dma_map_single(sc->dev, skb->data, skb->len, 1729 bf->skbaddr = dma_map_single(ah->dev, skb->data, skb->len,
1742 DMA_TO_DEVICE); 1730 DMA_TO_DEVICE);
1743 ATH5K_DBG(sc, ATH5K_DEBUG_BEACON, "skb %p [data %p len %u] " 1731 ATH5K_DBG(ah, ATH5K_DEBUG_BEACON, "skb %p [data %p len %u] "
1744 "skbaddr %llx\n", skb, skb->data, skb->len, 1732 "skbaddr %llx\n", skb, skb->data, skb->len,
1745 (unsigned long long)bf->skbaddr); 1733 (unsigned long long)bf->skbaddr);
1746 1734
1747 if (dma_mapping_error(sc->dev, bf->skbaddr)) { 1735 if (dma_mapping_error(ah->dev, bf->skbaddr)) {
1748 ATH5K_ERR(sc, "beacon DMA mapping failed\n"); 1736 ATH5K_ERR(ah, "beacon DMA mapping failed\n");
1749 return -EIO; 1737 return -EIO;
1750 } 1738 }
1751 1739
@@ -1753,7 +1741,7 @@ ath5k_beacon_setup(struct ath5k_softc *sc, struct ath5k_buf *bf)
1753 antenna = ah->ah_tx_ant; 1741 antenna = ah->ah_tx_ant;
1754 1742
1755 flags = AR5K_TXDESC_NOACK; 1743 flags = AR5K_TXDESC_NOACK;
1756 if (sc->opmode == NL80211_IFTYPE_ADHOC && ath5k_hw_hasveol(ah)) { 1744 if (ah->opmode == NL80211_IFTYPE_ADHOC && ath5k_hw_hasveol(ah)) {
1757 ds->ds_link = bf->daddr; /* self-linked */ 1745 ds->ds_link = bf->daddr; /* self-linked */
1758 flags |= AR5K_TXDESC_VEOL; 1746 flags |= AR5K_TXDESC_VEOL;
1759 } else 1747 } else
@@ -1778,7 +1766,7 @@ ath5k_beacon_setup(struct ath5k_softc *sc, struct ath5k_buf *bf)
1778 * on all of them. 1766 * on all of them.
1779 */ 1767 */
1780 if (ah->ah_ant_mode == AR5K_ANTMODE_SECTOR_AP) 1768 if (ah->ah_ant_mode == AR5K_ANTMODE_SECTOR_AP)
1781 antenna = sc->bsent & 4 ? 2 : 1; 1769 antenna = ah->bsent & 4 ? 2 : 1;
1782 1770
1783 1771
1784 /* FIXME: If we are in g mode and rate is a CCK rate 1772 /* FIXME: If we are in g mode and rate is a CCK rate
@@ -1787,8 +1775,8 @@ ath5k_beacon_setup(struct ath5k_softc *sc, struct ath5k_buf *bf)
1787 ds->ds_data = bf->skbaddr; 1775 ds->ds_data = bf->skbaddr;
1788 ret = ah->ah_setup_tx_desc(ah, ds, skb->len, 1776 ret = ah->ah_setup_tx_desc(ah, ds, skb->len,
1789 ieee80211_get_hdrlen_from_skb(skb), padsize, 1777 ieee80211_get_hdrlen_from_skb(skb), padsize,
1790 AR5K_PKT_TYPE_BEACON, (sc->power_level * 2), 1778 AR5K_PKT_TYPE_BEACON, (ah->power_level * 2),
1791 ieee80211_get_tx_rate(sc->hw, info)->hw_value, 1779 ieee80211_get_tx_rate(ah->hw, info)->hw_value,
1792 1, AR5K_TXKEYIX_INVALID, 1780 1, AR5K_TXKEYIX_INVALID,
1793 antenna, flags, 0, 0); 1781 antenna, flags, 0, 0);
1794 if (ret) 1782 if (ret)
@@ -1796,7 +1784,7 @@ ath5k_beacon_setup(struct ath5k_softc *sc, struct ath5k_buf *bf)
1796 1784
1797 return 0; 1785 return 0;
1798err_unmap: 1786err_unmap:
1799 dma_unmap_single(sc->dev, bf->skbaddr, skb->len, DMA_TO_DEVICE); 1787 dma_unmap_single(ah->dev, bf->skbaddr, skb->len, DMA_TO_DEVICE);
1800 return ret; 1788 return ret;
1801} 1789}
1802 1790
@@ -1811,7 +1799,7 @@ int
1811ath5k_beacon_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 1799ath5k_beacon_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1812{ 1800{
1813 int ret; 1801 int ret;
1814 struct ath5k_softc *sc = hw->priv; 1802 struct ath5k_hw *ah = hw->priv;
1815 struct ath5k_vif *avf = (void *)vif->drv_priv; 1803 struct ath5k_vif *avf = (void *)vif->drv_priv;
1816 struct sk_buff *skb; 1804 struct sk_buff *skb;
1817 1805
@@ -1827,9 +1815,9 @@ ath5k_beacon_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1827 goto out; 1815 goto out;
1828 } 1816 }
1829 1817
1830 ath5k_txbuf_free_skb(sc, avf->bbuf); 1818 ath5k_txbuf_free_skb(ah, avf->bbuf);
1831 avf->bbuf->skb = skb; 1819 avf->bbuf->skb = skb;
1832 ret = ath5k_beacon_setup(sc, avf->bbuf); 1820 ret = ath5k_beacon_setup(ah, avf->bbuf);
1833 if (ret) 1821 if (ret)
1834 avf->bbuf->skb = NULL; 1822 avf->bbuf->skb = NULL;
1835out: 1823out:
@@ -1845,15 +1833,14 @@ out:
1845 * or user context from ath5k_beacon_config. 1833 * or user context from ath5k_beacon_config.
1846 */ 1834 */
1847static void 1835static void
1848ath5k_beacon_send(struct ath5k_softc *sc) 1836ath5k_beacon_send(struct ath5k_hw *ah)
1849{ 1837{
1850 struct ath5k_hw *ah = sc->ah;
1851 struct ieee80211_vif *vif; 1838 struct ieee80211_vif *vif;
1852 struct ath5k_vif *avf; 1839 struct ath5k_vif *avf;
1853 struct ath5k_buf *bf; 1840 struct ath5k_buf *bf;
1854 struct sk_buff *skb; 1841 struct sk_buff *skb;
1855 1842
1856 ATH5K_DBG_UNLIMIT(sc, ATH5K_DEBUG_BEACON, "in beacon_send\n"); 1843 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON, "in beacon_send\n");
1857 1844
1858 /* 1845 /*
1859 * Check if the previous beacon has gone out. If 1846 * Check if the previous beacon has gone out. If
@@ -1862,47 +1849,47 @@ ath5k_beacon_send(struct ath5k_softc *sc)
1862 * indicate a problem and should not occur. If we 1849 * indicate a problem and should not occur. If we
1863 * miss too many consecutive beacons reset the device. 1850 * miss too many consecutive beacons reset the device.
1864 */ 1851 */
1865 if (unlikely(ath5k_hw_num_tx_pending(ah, sc->bhalq) != 0)) { 1852 if (unlikely(ath5k_hw_num_tx_pending(ah, ah->bhalq) != 0)) {
1866 sc->bmisscount++; 1853 ah->bmisscount++;
1867 ATH5K_DBG(sc, ATH5K_DEBUG_BEACON, 1854 ATH5K_DBG(ah, ATH5K_DEBUG_BEACON,
1868 "missed %u consecutive beacons\n", sc->bmisscount); 1855 "missed %u consecutive beacons\n", ah->bmisscount);
1869 if (sc->bmisscount > 10) { /* NB: 10 is a guess */ 1856 if (ah->bmisscount > 10) { /* NB: 10 is a guess */
1870 ATH5K_DBG(sc, ATH5K_DEBUG_BEACON, 1857 ATH5K_DBG(ah, ATH5K_DEBUG_BEACON,
1871 "stuck beacon time (%u missed)\n", 1858 "stuck beacon time (%u missed)\n",
1872 sc->bmisscount); 1859 ah->bmisscount);
1873 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, 1860 ATH5K_DBG(ah, ATH5K_DEBUG_RESET,
1874 "stuck beacon, resetting\n"); 1861 "stuck beacon, resetting\n");
1875 ieee80211_queue_work(sc->hw, &sc->reset_work); 1862 ieee80211_queue_work(ah->hw, &ah->reset_work);
1876 } 1863 }
1877 return; 1864 return;
1878 } 1865 }
1879 if (unlikely(sc->bmisscount != 0)) { 1866 if (unlikely(ah->bmisscount != 0)) {
1880 ATH5K_DBG(sc, ATH5K_DEBUG_BEACON, 1867 ATH5K_DBG(ah, ATH5K_DEBUG_BEACON,
1881 "resume beacon xmit after %u misses\n", 1868 "resume beacon xmit after %u misses\n",
1882 sc->bmisscount); 1869 ah->bmisscount);
1883 sc->bmisscount = 0; 1870 ah->bmisscount = 0;
1884 } 1871 }
1885 1872
1886 if ((sc->opmode == NL80211_IFTYPE_AP && sc->num_ap_vifs > 1) || 1873 if ((ah->opmode == NL80211_IFTYPE_AP && ah->num_ap_vifs > 1) ||
1887 sc->opmode == NL80211_IFTYPE_MESH_POINT) { 1874 ah->opmode == NL80211_IFTYPE_MESH_POINT) {
1888 u64 tsf = ath5k_hw_get_tsf64(ah); 1875 u64 tsf = ath5k_hw_get_tsf64(ah);
1889 u32 tsftu = TSF_TO_TU(tsf); 1876 u32 tsftu = TSF_TO_TU(tsf);
1890 int slot = ((tsftu % sc->bintval) * ATH_BCBUF) / sc->bintval; 1877 int slot = ((tsftu % ah->bintval) * ATH_BCBUF) / ah->bintval;
1891 vif = sc->bslot[(slot + 1) % ATH_BCBUF]; 1878 vif = ah->bslot[(slot + 1) % ATH_BCBUF];
1892 ATH5K_DBG(sc, ATH5K_DEBUG_BEACON, 1879 ATH5K_DBG(ah, ATH5K_DEBUG_BEACON,
1893 "tsf %llx tsftu %x intval %u slot %u vif %p\n", 1880 "tsf %llx tsftu %x intval %u slot %u vif %p\n",
1894 (unsigned long long)tsf, tsftu, sc->bintval, slot, vif); 1881 (unsigned long long)tsf, tsftu, ah->bintval, slot, vif);
1895 } else /* only one interface */ 1882 } else /* only one interface */
1896 vif = sc->bslot[0]; 1883 vif = ah->bslot[0];
1897 1884
1898 if (!vif) 1885 if (!vif)
1899 return; 1886 return;
1900 1887
1901 avf = (void *)vif->drv_priv; 1888 avf = (void *)vif->drv_priv;
1902 bf = avf->bbuf; 1889 bf = avf->bbuf;
1903 if (unlikely(bf->skb == NULL || sc->opmode == NL80211_IFTYPE_STATION || 1890 if (unlikely(bf->skb == NULL || ah->opmode == NL80211_IFTYPE_STATION ||
1904 sc->opmode == NL80211_IFTYPE_MONITOR)) { 1891 ah->opmode == NL80211_IFTYPE_MONITOR)) {
1905 ATH5K_WARN(sc, "bf=%p bf_skb=%p\n", bf, bf ? bf->skb : NULL); 1892 ATH5K_WARN(ah, "bf=%p bf_skb=%p\n", bf, bf ? bf->skb : NULL);
1906 return; 1893 return;
1907 } 1894 }
1908 1895
@@ -1911,40 +1898,40 @@ ath5k_beacon_send(struct ath5k_softc *sc)
1911 * This should never fail since we check above that no frames 1898 * This should never fail since we check above that no frames
1912 * are still pending on the queue. 1899 * are still pending on the queue.
1913 */ 1900 */
1914 if (unlikely(ath5k_hw_stop_beacon_queue(ah, sc->bhalq))) { 1901 if (unlikely(ath5k_hw_stop_beacon_queue(ah, ah->bhalq))) {
1915 ATH5K_WARN(sc, "beacon queue %u didn't start/stop ?\n", sc->bhalq); 1902 ATH5K_WARN(ah, "beacon queue %u didn't start/stop ?\n", ah->bhalq);
1916 /* NB: hw still stops DMA, so proceed */ 1903 /* NB: hw still stops DMA, so proceed */
1917 } 1904 }
1918 1905
1919 /* refresh the beacon for AP or MESH mode */ 1906 /* refresh the beacon for AP or MESH mode */
1920 if (sc->opmode == NL80211_IFTYPE_AP || 1907 if (ah->opmode == NL80211_IFTYPE_AP ||
1921 sc->opmode == NL80211_IFTYPE_MESH_POINT) 1908 ah->opmode == NL80211_IFTYPE_MESH_POINT)
1922 ath5k_beacon_update(sc->hw, vif); 1909 ath5k_beacon_update(ah->hw, vif);
1923 1910
1924 trace_ath5k_tx(sc, bf->skb, &sc->txqs[sc->bhalq]); 1911 trace_ath5k_tx(ah, bf->skb, &ah->txqs[ah->bhalq]);
1925 1912
1926 ath5k_hw_set_txdp(ah, sc->bhalq, bf->daddr); 1913 ath5k_hw_set_txdp(ah, ah->bhalq, bf->daddr);
1927 ath5k_hw_start_tx_dma(ah, sc->bhalq); 1914 ath5k_hw_start_tx_dma(ah, ah->bhalq);
1928 ATH5K_DBG(sc, ATH5K_DEBUG_BEACON, "TXDP[%u] = %llx (%p)\n", 1915 ATH5K_DBG(ah, ATH5K_DEBUG_BEACON, "TXDP[%u] = %llx (%p)\n",
1929 sc->bhalq, (unsigned long long)bf->daddr, bf->desc); 1916 ah->bhalq, (unsigned long long)bf->daddr, bf->desc);
1930 1917
1931 skb = ieee80211_get_buffered_bc(sc->hw, vif); 1918 skb = ieee80211_get_buffered_bc(ah->hw, vif);
1932 while (skb) { 1919 while (skb) {
1933 ath5k_tx_queue(sc->hw, skb, sc->cabq); 1920 ath5k_tx_queue(ah->hw, skb, ah->cabq);
1934 1921
1935 if (sc->cabq->txq_len >= sc->cabq->txq_max) 1922 if (ah->cabq->txq_len >= ah->cabq->txq_max)
1936 break; 1923 break;
1937 1924
1938 skb = ieee80211_get_buffered_bc(sc->hw, vif); 1925 skb = ieee80211_get_buffered_bc(ah->hw, vif);
1939 } 1926 }
1940 1927
1941 sc->bsent++; 1928 ah->bsent++;
1942} 1929}
1943 1930
1944/** 1931/**
1945 * ath5k_beacon_update_timers - update beacon timers 1932 * ath5k_beacon_update_timers - update beacon timers
1946 * 1933 *
1947 * @sc: struct ath5k_softc pointer we are operating on 1934 * @ah: struct ath5k_hw pointer we are operating on
1948 * @bc_tsf: the timestamp of the beacon. 0 to reset the TSF. -1 to perform a 1935 * @bc_tsf: the timestamp of the beacon. 0 to reset the TSF. -1 to perform a
1949 * beacon timer update based on the current HW TSF. 1936 * beacon timer update based on the current HW TSF.
1950 * 1937 *
@@ -1958,17 +1945,16 @@ ath5k_beacon_send(struct ath5k_softc *sc)
1958 * function to have it all together in one place. 1945 * function to have it all together in one place.
1959 */ 1946 */
1960void 1947void
1961ath5k_beacon_update_timers(struct ath5k_softc *sc, u64 bc_tsf) 1948ath5k_beacon_update_timers(struct ath5k_hw *ah, u64 bc_tsf)
1962{ 1949{
1963 struct ath5k_hw *ah = sc->ah;
1964 u32 nexttbtt, intval, hw_tu, bc_tu; 1950 u32 nexttbtt, intval, hw_tu, bc_tu;
1965 u64 hw_tsf; 1951 u64 hw_tsf;
1966 1952
1967 intval = sc->bintval & AR5K_BEACON_PERIOD; 1953 intval = ah->bintval & AR5K_BEACON_PERIOD;
1968 if (sc->opmode == NL80211_IFTYPE_AP && sc->num_ap_vifs > 1) { 1954 if (ah->opmode == NL80211_IFTYPE_AP && ah->num_ap_vifs > 1) {
1969 intval /= ATH_BCBUF; /* staggered multi-bss beacons */ 1955 intval /= ATH_BCBUF; /* staggered multi-bss beacons */
1970 if (intval < 15) 1956 if (intval < 15)
1971 ATH5K_WARN(sc, "intval %u is too low, min 15\n", 1957 ATH5K_WARN(ah, "intval %u is too low, min 15\n",
1972 intval); 1958 intval);
1973 } 1959 }
1974 if (WARN_ON(!intval)) 1960 if (WARN_ON(!intval))
@@ -2007,7 +1993,7 @@ ath5k_beacon_update_timers(struct ath5k_softc *sc, u64 bc_tsf)
2007 * automatically update the TSF and then we need to reconfigure 1993 * automatically update the TSF and then we need to reconfigure
2008 * the timers. 1994 * the timers.
2009 */ 1995 */
2010 ATH5K_DBG_UNLIMIT(sc, ATH5K_DEBUG_BEACON, 1996 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON,
2011 "need to wait for HW TSF sync\n"); 1997 "need to wait for HW TSF sync\n");
2012 return; 1998 return;
2013 } else { 1999 } else {
@@ -2022,7 +2008,7 @@ ath5k_beacon_update_timers(struct ath5k_softc *sc, u64 bc_tsf)
2022 } 2008 }
2023#undef FUDGE 2009#undef FUDGE
2024 2010
2025 sc->nexttbtt = nexttbtt; 2011 ah->nexttbtt = nexttbtt;
2026 2012
2027 intval |= AR5K_BEACON_ENA; 2013 intval |= AR5K_BEACON_ENA;
2028 ath5k_hw_init_beacon(ah, nexttbtt, intval); 2014 ath5k_hw_init_beacon(ah, nexttbtt, intval);
@@ -2032,20 +2018,20 @@ ath5k_beacon_update_timers(struct ath5k_softc *sc, u64 bc_tsf)
2032 * of this function 2018 * of this function
2033 */ 2019 */
2034 if (bc_tsf == -1) 2020 if (bc_tsf == -1)
2035 ATH5K_DBG_UNLIMIT(sc, ATH5K_DEBUG_BEACON, 2021 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON,
2036 "reconfigured timers based on HW TSF\n"); 2022 "reconfigured timers based on HW TSF\n");
2037 else if (bc_tsf == 0) 2023 else if (bc_tsf == 0)
2038 ATH5K_DBG_UNLIMIT(sc, ATH5K_DEBUG_BEACON, 2024 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON,
2039 "reset HW TSF and timers\n"); 2025 "reset HW TSF and timers\n");
2040 else 2026 else
2041 ATH5K_DBG_UNLIMIT(sc, ATH5K_DEBUG_BEACON, 2027 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON,
2042 "updated timers based on beacon TSF\n"); 2028 "updated timers based on beacon TSF\n");
2043 2029
2044 ATH5K_DBG_UNLIMIT(sc, ATH5K_DEBUG_BEACON, 2030 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON,
2045 "bc_tsf %llx hw_tsf %llx bc_tu %u hw_tu %u nexttbtt %u\n", 2031 "bc_tsf %llx hw_tsf %llx bc_tu %u hw_tu %u nexttbtt %u\n",
2046 (unsigned long long) bc_tsf, 2032 (unsigned long long) bc_tsf,
2047 (unsigned long long) hw_tsf, bc_tu, hw_tu, nexttbtt); 2033 (unsigned long long) hw_tsf, bc_tu, hw_tu, nexttbtt);
2048 ATH5K_DBG_UNLIMIT(sc, ATH5K_DEBUG_BEACON, "intval %u %s %s\n", 2034 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON, "intval %u %s %s\n",
2049 intval & AR5K_BEACON_PERIOD, 2035 intval & AR5K_BEACON_PERIOD,
2050 intval & AR5K_BEACON_ENA ? "AR5K_BEACON_ENA" : "", 2036 intval & AR5K_BEACON_ENA ? "AR5K_BEACON_ENA" : "",
2051 intval & AR5K_BEACON_RESET_TSF ? "AR5K_BEACON_RESET_TSF" : ""); 2037 intval & AR5K_BEACON_RESET_TSF ? "AR5K_BEACON_RESET_TSF" : "");
@@ -2054,22 +2040,21 @@ ath5k_beacon_update_timers(struct ath5k_softc *sc, u64 bc_tsf)
2054/** 2040/**
2055 * ath5k_beacon_config - Configure the beacon queues and interrupts 2041 * ath5k_beacon_config - Configure the beacon queues and interrupts
2056 * 2042 *
2057 * @sc: struct ath5k_softc pointer we are operating on 2043 * @ah: struct ath5k_hw pointer we are operating on
2058 * 2044 *
2059 * In IBSS mode we use a self-linked tx descriptor if possible. We enable SWBA 2045 * In IBSS mode we use a self-linked tx descriptor if possible. We enable SWBA
2060 * interrupts to detect TSF updates only. 2046 * interrupts to detect TSF updates only.
2061 */ 2047 */
2062void 2048void
2063ath5k_beacon_config(struct ath5k_softc *sc) 2049ath5k_beacon_config(struct ath5k_hw *ah)
2064{ 2050{
2065 struct ath5k_hw *ah = sc->ah;
2066 unsigned long flags; 2051 unsigned long flags;
2067 2052
2068 spin_lock_irqsave(&sc->block, flags); 2053 spin_lock_irqsave(&ah->block, flags);
2069 sc->bmisscount = 0; 2054 ah->bmisscount = 0;
2070 sc->imask &= ~(AR5K_INT_BMISS | AR5K_INT_SWBA); 2055 ah->imask &= ~(AR5K_INT_BMISS | AR5K_INT_SWBA);
2071 2056
2072 if (sc->enable_beacon) { 2057 if (ah->enable_beacon) {
2073 /* 2058 /*
2074 * In IBSS mode we use a self-linked tx descriptor and let the 2059 * In IBSS mode we use a self-linked tx descriptor and let the
2075 * hardware send the beacons automatically. We have to load it 2060 * hardware send the beacons automatically. We have to load it
@@ -2077,27 +2062,27 @@ ath5k_beacon_config(struct ath5k_softc *sc)
2077 * We use the SWBA interrupt only to keep track of the beacon 2062 * We use the SWBA interrupt only to keep track of the beacon
2078 * timers in order to detect automatic TSF updates. 2063 * timers in order to detect automatic TSF updates.
2079 */ 2064 */
2080 ath5k_beaconq_config(sc); 2065 ath5k_beaconq_config(ah);
2081 2066
2082 sc->imask |= AR5K_INT_SWBA; 2067 ah->imask |= AR5K_INT_SWBA;
2083 2068
2084 if (sc->opmode == NL80211_IFTYPE_ADHOC) { 2069 if (ah->opmode == NL80211_IFTYPE_ADHOC) {
2085 if (ath5k_hw_hasveol(ah)) 2070 if (ath5k_hw_hasveol(ah))
2086 ath5k_beacon_send(sc); 2071 ath5k_beacon_send(ah);
2087 } else 2072 } else
2088 ath5k_beacon_update_timers(sc, -1); 2073 ath5k_beacon_update_timers(ah, -1);
2089 } else { 2074 } else {
2090 ath5k_hw_stop_beacon_queue(sc->ah, sc->bhalq); 2075 ath5k_hw_stop_beacon_queue(ah, ah->bhalq);
2091 } 2076 }
2092 2077
2093 ath5k_hw_set_imr(ah, sc->imask); 2078 ath5k_hw_set_imr(ah, ah->imask);
2094 mmiowb(); 2079 mmiowb();
2095 spin_unlock_irqrestore(&sc->block, flags); 2080 spin_unlock_irqrestore(&ah->block, flags);
2096} 2081}
2097 2082
2098static void ath5k_tasklet_beacon(unsigned long data) 2083static void ath5k_tasklet_beacon(unsigned long data)
2099{ 2084{
2100 struct ath5k_softc *sc = (struct ath5k_softc *) data; 2085 struct ath5k_hw *ah = (struct ath5k_hw *) data;
2101 2086
2102 /* 2087 /*
2103 * Software beacon alert--time to send a beacon. 2088 * Software beacon alert--time to send a beacon.
@@ -2107,20 +2092,20 @@ static void ath5k_tasklet_beacon(unsigned long data)
2107 * transmission time) in order to detect whether 2092 * transmission time) in order to detect whether
2108 * automatic TSF updates happened. 2093 * automatic TSF updates happened.
2109 */ 2094 */
2110 if (sc->opmode == NL80211_IFTYPE_ADHOC) { 2095 if (ah->opmode == NL80211_IFTYPE_ADHOC) {
2111 /* XXX: only if VEOL supported */ 2096 /* XXX: only if VEOL supported */
2112 u64 tsf = ath5k_hw_get_tsf64(sc->ah); 2097 u64 tsf = ath5k_hw_get_tsf64(ah);
2113 sc->nexttbtt += sc->bintval; 2098 ah->nexttbtt += ah->bintval;
2114 ATH5K_DBG(sc, ATH5K_DEBUG_BEACON, 2099 ATH5K_DBG(ah, ATH5K_DEBUG_BEACON,
2115 "SWBA nexttbtt: %x hw_tu: %x " 2100 "SWBA nexttbtt: %x hw_tu: %x "
2116 "TSF: %llx\n", 2101 "TSF: %llx\n",
2117 sc->nexttbtt, 2102 ah->nexttbtt,
2118 TSF_TO_TU(tsf), 2103 TSF_TO_TU(tsf),
2119 (unsigned long long) tsf); 2104 (unsigned long long) tsf);
2120 } else { 2105 } else {
2121 spin_lock(&sc->block); 2106 spin_lock(&ah->block);
2122 ath5k_beacon_send(sc); 2107 ath5k_beacon_send(ah);
2123 spin_unlock(&sc->block); 2108 spin_unlock(&ah->block);
2124 } 2109 }
2125} 2110}
2126 2111
@@ -2137,12 +2122,12 @@ ath5k_intr_calibration_poll(struct ath5k_hw *ah)
2137 /* run ANI only when full calibration is not active */ 2122 /* run ANI only when full calibration is not active */
2138 ah->ah_cal_next_ani = jiffies + 2123 ah->ah_cal_next_ani = jiffies +
2139 msecs_to_jiffies(ATH5K_TUNE_CALIBRATION_INTERVAL_ANI); 2124 msecs_to_jiffies(ATH5K_TUNE_CALIBRATION_INTERVAL_ANI);
2140 tasklet_schedule(&ah->ah_sc->ani_tasklet); 2125 tasklet_schedule(&ah->ani_tasklet);
2141 2126
2142 } else if (time_is_before_eq_jiffies(ah->ah_cal_next_full)) { 2127 } else if (time_is_before_eq_jiffies(ah->ah_cal_next_full)) {
2143 ah->ah_cal_next_full = jiffies + 2128 ah->ah_cal_next_full = jiffies +
2144 msecs_to_jiffies(ATH5K_TUNE_CALIBRATION_INTERVAL_FULL); 2129 msecs_to_jiffies(ATH5K_TUNE_CALIBRATION_INTERVAL_FULL);
2145 tasklet_schedule(&ah->ah_sc->calib); 2130 tasklet_schedule(&ah->calib);
2146 } 2131 }
2147 /* we could use SWI to generate enough interrupts to meet our 2132 /* we could use SWI to generate enough interrupts to meet our
2148 * calibration interval requirements, if necessary: 2133 * calibration interval requirements, if necessary:
@@ -2150,44 +2135,43 @@ ath5k_intr_calibration_poll(struct ath5k_hw *ah)
2150} 2135}
2151 2136
2152static void 2137static void
2153ath5k_schedule_rx(struct ath5k_softc *sc) 2138ath5k_schedule_rx(struct ath5k_hw *ah)
2154{ 2139{
2155 sc->rx_pending = true; 2140 ah->rx_pending = true;
2156 tasklet_schedule(&sc->rxtq); 2141 tasklet_schedule(&ah->rxtq);
2157} 2142}
2158 2143
2159static void 2144static void
2160ath5k_schedule_tx(struct ath5k_softc *sc) 2145ath5k_schedule_tx(struct ath5k_hw *ah)
2161{ 2146{
2162 sc->tx_pending = true; 2147 ah->tx_pending = true;
2163 tasklet_schedule(&sc->txtq); 2148 tasklet_schedule(&ah->txtq);
2164} 2149}
2165 2150
2166static irqreturn_t 2151static irqreturn_t
2167ath5k_intr(int irq, void *dev_id) 2152ath5k_intr(int irq, void *dev_id)
2168{ 2153{
2169 struct ath5k_softc *sc = dev_id; 2154 struct ath5k_hw *ah = dev_id;
2170 struct ath5k_hw *ah = sc->ah;
2171 enum ath5k_int status; 2155 enum ath5k_int status;
2172 unsigned int counter = 1000; 2156 unsigned int counter = 1000;
2173 2157
2174 if (unlikely(test_bit(ATH_STAT_INVALID, sc->status) || 2158 if (unlikely(test_bit(ATH_STAT_INVALID, ah->status) ||
2175 ((ath5k_get_bus_type(ah) != ATH_AHB) && 2159 ((ath5k_get_bus_type(ah) != ATH_AHB) &&
2176 !ath5k_hw_is_intr_pending(ah)))) 2160 !ath5k_hw_is_intr_pending(ah))))
2177 return IRQ_NONE; 2161 return IRQ_NONE;
2178 2162
2179 do { 2163 do {
2180 ath5k_hw_get_isr(ah, &status); /* NB: clears IRQ too */ 2164 ath5k_hw_get_isr(ah, &status); /* NB: clears IRQ too */
2181 ATH5K_DBG(sc, ATH5K_DEBUG_INTR, "status 0x%x/0x%x\n", 2165 ATH5K_DBG(ah, ATH5K_DEBUG_INTR, "status 0x%x/0x%x\n",
2182 status, sc->imask); 2166 status, ah->imask);
2183 if (unlikely(status & AR5K_INT_FATAL)) { 2167 if (unlikely(status & AR5K_INT_FATAL)) {
2184 /* 2168 /*
2185 * Fatal errors are unrecoverable. 2169 * Fatal errors are unrecoverable.
2186 * Typically these are caused by DMA errors. 2170 * Typically these are caused by DMA errors.
2187 */ 2171 */
2188 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, 2172 ATH5K_DBG(ah, ATH5K_DEBUG_RESET,
2189 "fatal int, resetting\n"); 2173 "fatal int, resetting\n");
2190 ieee80211_queue_work(sc->hw, &sc->reset_work); 2174 ieee80211_queue_work(ah->hw, &ah->reset_work);
2191 } else if (unlikely(status & AR5K_INT_RXORN)) { 2175 } else if (unlikely(status & AR5K_INT_RXORN)) {
2192 /* 2176 /*
2193 * Receive buffers are full. Either the bus is busy or 2177 * Receive buffers are full. Either the bus is busy or
@@ -2198,16 +2182,16 @@ ath5k_intr(int irq, void *dev_id)
2198 * We don't know exactly which versions need a reset - 2182 * We don't know exactly which versions need a reset -
2199 * this guess is copied from the HAL. 2183 * this guess is copied from the HAL.
2200 */ 2184 */
2201 sc->stats.rxorn_intr++; 2185 ah->stats.rxorn_intr++;
2202 if (ah->ah_mac_srev < AR5K_SREV_AR5212) { 2186 if (ah->ah_mac_srev < AR5K_SREV_AR5212) {
2203 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, 2187 ATH5K_DBG(ah, ATH5K_DEBUG_RESET,
2204 "rx overrun, resetting\n"); 2188 "rx overrun, resetting\n");
2205 ieee80211_queue_work(sc->hw, &sc->reset_work); 2189 ieee80211_queue_work(ah->hw, &ah->reset_work);
2206 } else 2190 } else
2207 ath5k_schedule_rx(sc); 2191 ath5k_schedule_rx(ah);
2208 } else { 2192 } else {
2209 if (status & AR5K_INT_SWBA) 2193 if (status & AR5K_INT_SWBA)
2210 tasklet_hi_schedule(&sc->beacontq); 2194 tasklet_hi_schedule(&ah->beacontq);
2211 2195
2212 if (status & AR5K_INT_RXEOL) { 2196 if (status & AR5K_INT_RXEOL) {
2213 /* 2197 /*
@@ -2215,27 +2199,27 @@ ath5k_intr(int irq, void *dev_id)
2215 * RXE bit is written, but it doesn't work at 2199 * RXE bit is written, but it doesn't work at
2216 * least on older hardware revs. 2200 * least on older hardware revs.
2217 */ 2201 */
2218 sc->stats.rxeol_intr++; 2202 ah->stats.rxeol_intr++;
2219 } 2203 }
2220 if (status & AR5K_INT_TXURN) { 2204 if (status & AR5K_INT_TXURN) {
2221 /* bump tx trigger level */ 2205 /* bump tx trigger level */
2222 ath5k_hw_update_tx_triglevel(ah, true); 2206 ath5k_hw_update_tx_triglevel(ah, true);
2223 } 2207 }
2224 if (status & (AR5K_INT_RXOK | AR5K_INT_RXERR)) 2208 if (status & (AR5K_INT_RXOK | AR5K_INT_RXERR))
2225 ath5k_schedule_rx(sc); 2209 ath5k_schedule_rx(ah);
2226 if (status & (AR5K_INT_TXOK | AR5K_INT_TXDESC 2210 if (status & (AR5K_INT_TXOK | AR5K_INT_TXDESC
2227 | AR5K_INT_TXERR | AR5K_INT_TXEOL)) 2211 | AR5K_INT_TXERR | AR5K_INT_TXEOL))
2228 ath5k_schedule_tx(sc); 2212 ath5k_schedule_tx(ah);
2229 if (status & AR5K_INT_BMISS) { 2213 if (status & AR5K_INT_BMISS) {
2230 /* TODO */ 2214 /* TODO */
2231 } 2215 }
2232 if (status & AR5K_INT_MIB) { 2216 if (status & AR5K_INT_MIB) {
2233 sc->stats.mib_intr++; 2217 ah->stats.mib_intr++;
2234 ath5k_hw_update_mib_counters(ah); 2218 ath5k_hw_update_mib_counters(ah);
2235 ath5k_ani_mib_intr(ah); 2219 ath5k_ani_mib_intr(ah);
2236 } 2220 }
2237 if (status & AR5K_INT_GPIO) 2221 if (status & AR5K_INT_GPIO)
2238 tasklet_schedule(&sc->rf_kill.toggleq); 2222 tasklet_schedule(&ah->rf_kill.toggleq);
2239 2223
2240 } 2224 }
2241 2225
@@ -2244,11 +2228,11 @@ ath5k_intr(int irq, void *dev_id)
2244 2228
2245 } while (ath5k_hw_is_intr_pending(ah) && --counter > 0); 2229 } while (ath5k_hw_is_intr_pending(ah) && --counter > 0);
2246 2230
2247 if (sc->rx_pending || sc->tx_pending) 2231 if (ah->rx_pending || ah->tx_pending)
2248 ath5k_set_current_imask(sc); 2232 ath5k_set_current_imask(ah);
2249 2233
2250 if (unlikely(!counter)) 2234 if (unlikely(!counter))
2251 ATH5K_WARN(sc, "too many interrupts, giving up for now\n"); 2235 ATH5K_WARN(ah, "too many interrupts, giving up for now\n");
2252 2236
2253 ath5k_intr_calibration_poll(ah); 2237 ath5k_intr_calibration_poll(ah);
2254 2238
@@ -2262,28 +2246,27 @@ ath5k_intr(int irq, void *dev_id)
2262static void 2246static void
2263ath5k_tasklet_calibrate(unsigned long data) 2247ath5k_tasklet_calibrate(unsigned long data)
2264{ 2248{
2265 struct ath5k_softc *sc = (void *)data; 2249 struct ath5k_hw *ah = (void *)data;
2266 struct ath5k_hw *ah = sc->ah;
2267 2250
2268 /* Only full calibration for now */ 2251 /* Only full calibration for now */
2269 ah->ah_cal_mask |= AR5K_CALIBRATION_FULL; 2252 ah->ah_cal_mask |= AR5K_CALIBRATION_FULL;
2270 2253
2271 ATH5K_DBG(sc, ATH5K_DEBUG_CALIBRATE, "channel %u/%x\n", 2254 ATH5K_DBG(ah, ATH5K_DEBUG_CALIBRATE, "channel %u/%x\n",
2272 ieee80211_frequency_to_channel(sc->curchan->center_freq), 2255 ieee80211_frequency_to_channel(ah->curchan->center_freq),
2273 sc->curchan->hw_value); 2256 ah->curchan->hw_value);
2274 2257
2275 if (ath5k_hw_gainf_calibrate(ah) == AR5K_RFGAIN_NEED_CHANGE) { 2258 if (ath5k_hw_gainf_calibrate(ah) == AR5K_RFGAIN_NEED_CHANGE) {
2276 /* 2259 /*
2277 * Rfgain is out of bounds, reset the chip 2260 * Rfgain is out of bounds, reset the chip
2278 * to load new gain values. 2261 * to load new gain values.
2279 */ 2262 */
2280 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "calibration, resetting\n"); 2263 ATH5K_DBG(ah, ATH5K_DEBUG_RESET, "calibration, resetting\n");
2281 ieee80211_queue_work(sc->hw, &sc->reset_work); 2264 ieee80211_queue_work(ah->hw, &ah->reset_work);
2282 } 2265 }
2283 if (ath5k_hw_phy_calibrate(ah, sc->curchan)) 2266 if (ath5k_hw_phy_calibrate(ah, ah->curchan))
2284 ATH5K_ERR(sc, "calibration of channel %u failed\n", 2267 ATH5K_ERR(ah, "calibration of channel %u failed\n",
2285 ieee80211_frequency_to_channel( 2268 ieee80211_frequency_to_channel(
2286 sc->curchan->center_freq)); 2269 ah->curchan->center_freq));
2287 2270
2288 /* Noise floor calibration interrupts rx/tx path while I/Q calibration 2271 /* Noise floor calibration interrupts rx/tx path while I/Q calibration
2289 * doesn't. 2272 * doesn't.
@@ -2302,8 +2285,7 @@ ath5k_tasklet_calibrate(unsigned long data)
2302static void 2285static void
2303ath5k_tasklet_ani(unsigned long data) 2286ath5k_tasklet_ani(unsigned long data)
2304{ 2287{
2305 struct ath5k_softc *sc = (void *)data; 2288 struct ath5k_hw *ah = (void *)data;
2306 struct ath5k_hw *ah = sc->ah;
2307 2289
2308 ah->ah_cal_mask |= AR5K_CALIBRATION_ANI; 2290 ah->ah_cal_mask |= AR5K_CALIBRATION_ANI;
2309 ath5k_ani_calibration(ah); 2291 ath5k_ani_calibration(ah);
@@ -2314,21 +2296,21 @@ ath5k_tasklet_ani(unsigned long data)
2314static void 2296static void
2315ath5k_tx_complete_poll_work(struct work_struct *work) 2297ath5k_tx_complete_poll_work(struct work_struct *work)
2316{ 2298{
2317 struct ath5k_softc *sc = container_of(work, struct ath5k_softc, 2299 struct ath5k_hw *ah = container_of(work, struct ath5k_hw,
2318 tx_complete_work.work); 2300 tx_complete_work.work);
2319 struct ath5k_txq *txq; 2301 struct ath5k_txq *txq;
2320 int i; 2302 int i;
2321 bool needreset = false; 2303 bool needreset = false;
2322 2304
2323 mutex_lock(&sc->lock); 2305 mutex_lock(&ah->lock);
2324 2306
2325 for (i = 0; i < ARRAY_SIZE(sc->txqs); i++) { 2307 for (i = 0; i < ARRAY_SIZE(ah->txqs); i++) {
2326 if (sc->txqs[i].setup) { 2308 if (ah->txqs[i].setup) {
2327 txq = &sc->txqs[i]; 2309 txq = &ah->txqs[i];
2328 spin_lock_bh(&txq->lock); 2310 spin_lock_bh(&txq->lock);
2329 if (txq->txq_len > 1) { 2311 if (txq->txq_len > 1) {
2330 if (txq->txq_poll_mark) { 2312 if (txq->txq_poll_mark) {
2331 ATH5K_DBG(sc, ATH5K_DEBUG_XMIT, 2313 ATH5K_DBG(ah, ATH5K_DEBUG_XMIT,
2332 "TX queue stuck %d\n", 2314 "TX queue stuck %d\n",
2333 txq->qnum); 2315 txq->qnum);
2334 needreset = true; 2316 needreset = true;
@@ -2344,14 +2326,14 @@ ath5k_tx_complete_poll_work(struct work_struct *work)
2344 } 2326 }
2345 2327
2346 if (needreset) { 2328 if (needreset) {
2347 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, 2329 ATH5K_DBG(ah, ATH5K_DEBUG_RESET,
2348 "TX queues stuck, resetting\n"); 2330 "TX queues stuck, resetting\n");
2349 ath5k_reset(sc, NULL, true); 2331 ath5k_reset(ah, NULL, true);
2350 } 2332 }
2351 2333
2352 mutex_unlock(&sc->lock); 2334 mutex_unlock(&ah->lock);
2353 2335
2354 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 2336 ieee80211_queue_delayed_work(ah->hw, &ah->tx_complete_work,
2355 msecs_to_jiffies(ATH5K_TX_COMPLETE_POLL_INT)); 2337 msecs_to_jiffies(ATH5K_TX_COMPLETE_POLL_INT));
2356} 2338}
2357 2339
@@ -2361,15 +2343,15 @@ ath5k_tx_complete_poll_work(struct work_struct *work)
2361\*************************/ 2343\*************************/
2362 2344
2363int __devinit 2345int __devinit
2364ath5k_init_softc(struct ath5k_softc *sc, const struct ath_bus_ops *bus_ops) 2346ath5k_init_softc(struct ath5k_hw *ah, const struct ath_bus_ops *bus_ops)
2365{ 2347{
2366 struct ieee80211_hw *hw = sc->hw; 2348 struct ieee80211_hw *hw = ah->hw;
2367 struct ath_common *common; 2349 struct ath_common *common;
2368 int ret; 2350 int ret;
2369 int csz; 2351 int csz;
2370 2352
2371 /* Initialize driver private data */ 2353 /* Initialize driver private data */
2372 SET_IEEE80211_DEV(hw, sc->dev); 2354 SET_IEEE80211_DEV(hw, ah->dev);
2373 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS | 2355 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
2374 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | 2356 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
2375 IEEE80211_HW_SIGNAL_DBM | 2357 IEEE80211_HW_SIGNAL_DBM |
@@ -2392,39 +2374,29 @@ ath5k_init_softc(struct ath5k_softc *sc, const struct ath_bus_ops *bus_ops)
2392 * Mark the device as detached to avoid processing 2374 * Mark the device as detached to avoid processing
2393 * interrupts until setup is complete. 2375 * interrupts until setup is complete.
2394 */ 2376 */
2395 __set_bit(ATH_STAT_INVALID, sc->status); 2377 __set_bit(ATH_STAT_INVALID, ah->status);
2396 2378
2397 sc->opmode = NL80211_IFTYPE_STATION; 2379 ah->opmode = NL80211_IFTYPE_STATION;
2398 sc->bintval = 1000; 2380 ah->bintval = 1000;
2399 mutex_init(&sc->lock); 2381 mutex_init(&ah->lock);
2400 spin_lock_init(&sc->rxbuflock); 2382 spin_lock_init(&ah->rxbuflock);
2401 spin_lock_init(&sc->txbuflock); 2383 spin_lock_init(&ah->txbuflock);
2402 spin_lock_init(&sc->block); 2384 spin_lock_init(&ah->block);
2403 spin_lock_init(&sc->irqlock); 2385 spin_lock_init(&ah->irqlock);
2404 2386
2405 /* Setup interrupt handler */ 2387 /* Setup interrupt handler */
2406 ret = request_irq(sc->irq, ath5k_intr, IRQF_SHARED, "ath", sc); 2388 ret = request_irq(ah->irq, ath5k_intr, IRQF_SHARED, "ath", ah);
2407 if (ret) { 2389 if (ret) {
2408 ATH5K_ERR(sc, "request_irq failed\n"); 2390 ATH5K_ERR(ah, "request_irq failed\n");
2409 goto err; 2391 goto err;
2410 } 2392 }
2411 2393
2412 /* If we passed the test, malloc an ath5k_hw struct */ 2394 common = ath5k_hw_common(ah);
2413 sc->ah = kzalloc(sizeof(struct ath5k_hw), GFP_KERNEL);
2414 if (!sc->ah) {
2415 ret = -ENOMEM;
2416 ATH5K_ERR(sc, "out of memory\n");
2417 goto err_irq;
2418 }
2419
2420 sc->ah->ah_sc = sc;
2421 sc->ah->ah_iobase = sc->iobase;
2422 common = ath5k_hw_common(sc->ah);
2423 common->ops = &ath5k_common_ops; 2395 common->ops = &ath5k_common_ops;
2424 common->bus_ops = bus_ops; 2396 common->bus_ops = bus_ops;
2425 common->ah = sc->ah; 2397 common->ah = ah;
2426 common->hw = hw; 2398 common->hw = hw;
2427 common->priv = sc; 2399 common->priv = ah;
2428 common->clockrate = 40; 2400 common->clockrate = 40;
2429 2401
2430 /* 2402 /*
@@ -2437,12 +2409,12 @@ ath5k_init_softc(struct ath5k_softc *sc, const struct ath_bus_ops *bus_ops)
2437 spin_lock_init(&common->cc_lock); 2409 spin_lock_init(&common->cc_lock);
2438 2410
2439 /* Initialize device */ 2411 /* Initialize device */
2440 ret = ath5k_hw_init(sc); 2412 ret = ath5k_hw_init(ah);
2441 if (ret) 2413 if (ret)
2442 goto err_free_ah; 2414 goto err_irq;
2443 2415
2444 /* set up multi-rate retry capabilities */ 2416 /* set up multi-rate retry capabilities */
2445 if (sc->ah->ah_version == AR5K_AR5212) { 2417 if (ah->ah_version == AR5K_AR5212) {
2446 hw->max_rates = 4; 2418 hw->max_rates = 4;
2447 hw->max_rate_tries = max(AR5K_INIT_RETRY_SHORT, 2419 hw->max_rate_tries = max(AR5K_INIT_RETRY_SHORT,
2448 AR5K_INIT_RETRY_LONG); 2420 AR5K_INIT_RETRY_LONG);
@@ -2455,77 +2427,74 @@ ath5k_init_softc(struct ath5k_softc *sc, const struct ath_bus_ops *bus_ops)
2455 if (ret) 2427 if (ret)
2456 goto err_ah; 2428 goto err_ah;
2457 2429
2458 ATH5K_INFO(sc, "Atheros AR%s chip found (MAC: 0x%x, PHY: 0x%x)\n", 2430 ATH5K_INFO(ah, "Atheros AR%s chip found (MAC: 0x%x, PHY: 0x%x)\n",
2459 ath5k_chip_name(AR5K_VERSION_MAC, sc->ah->ah_mac_srev), 2431 ath5k_chip_name(AR5K_VERSION_MAC, ah->ah_mac_srev),
2460 sc->ah->ah_mac_srev, 2432 ah->ah_mac_srev,
2461 sc->ah->ah_phy_revision); 2433 ah->ah_phy_revision);
2462 2434
2463 if (!sc->ah->ah_single_chip) { 2435 if (!ah->ah_single_chip) {
2464 /* Single chip radio (!RF5111) */ 2436 /* Single chip radio (!RF5111) */
2465 if (sc->ah->ah_radio_5ghz_revision && 2437 if (ah->ah_radio_5ghz_revision &&
2466 !sc->ah->ah_radio_2ghz_revision) { 2438 !ah->ah_radio_2ghz_revision) {
2467 /* No 5GHz support -> report 2GHz radio */ 2439 /* No 5GHz support -> report 2GHz radio */
2468 if (!test_bit(AR5K_MODE_11A, 2440 if (!test_bit(AR5K_MODE_11A,
2469 sc->ah->ah_capabilities.cap_mode)) { 2441 ah->ah_capabilities.cap_mode)) {
2470 ATH5K_INFO(sc, "RF%s 2GHz radio found (0x%x)\n", 2442 ATH5K_INFO(ah, "RF%s 2GHz radio found (0x%x)\n",
2471 ath5k_chip_name(AR5K_VERSION_RAD, 2443 ath5k_chip_name(AR5K_VERSION_RAD,
2472 sc->ah->ah_radio_5ghz_revision), 2444 ah->ah_radio_5ghz_revision),
2473 sc->ah->ah_radio_5ghz_revision); 2445 ah->ah_radio_5ghz_revision);
2474 /* No 2GHz support (5110 and some 2446 /* No 2GHz support (5110 and some
2475 * 5GHz only cards) -> report 5GHz radio */ 2447 * 5GHz only cards) -> report 5GHz radio */
2476 } else if (!test_bit(AR5K_MODE_11B, 2448 } else if (!test_bit(AR5K_MODE_11B,
2477 sc->ah->ah_capabilities.cap_mode)) { 2449 ah->ah_capabilities.cap_mode)) {
2478 ATH5K_INFO(sc, "RF%s 5GHz radio found (0x%x)\n", 2450 ATH5K_INFO(ah, "RF%s 5GHz radio found (0x%x)\n",
2479 ath5k_chip_name(AR5K_VERSION_RAD, 2451 ath5k_chip_name(AR5K_VERSION_RAD,
2480 sc->ah->ah_radio_5ghz_revision), 2452 ah->ah_radio_5ghz_revision),
2481 sc->ah->ah_radio_5ghz_revision); 2453 ah->ah_radio_5ghz_revision);
2482 /* Multiband radio */ 2454 /* Multiband radio */
2483 } else { 2455 } else {
2484 ATH5K_INFO(sc, "RF%s multiband radio found" 2456 ATH5K_INFO(ah, "RF%s multiband radio found"
2485 " (0x%x)\n", 2457 " (0x%x)\n",
2486 ath5k_chip_name(AR5K_VERSION_RAD, 2458 ath5k_chip_name(AR5K_VERSION_RAD,
2487 sc->ah->ah_radio_5ghz_revision), 2459 ah->ah_radio_5ghz_revision),
2488 sc->ah->ah_radio_5ghz_revision); 2460 ah->ah_radio_5ghz_revision);
2489 } 2461 }
2490 } 2462 }
2491 /* Multi chip radio (RF5111 - RF2111) -> 2463 /* Multi chip radio (RF5111 - RF2111) ->
2492 * report both 2GHz/5GHz radios */ 2464 * report both 2GHz/5GHz radios */
2493 else if (sc->ah->ah_radio_5ghz_revision && 2465 else if (ah->ah_radio_5ghz_revision &&
2494 sc->ah->ah_radio_2ghz_revision) { 2466 ah->ah_radio_2ghz_revision) {
2495 ATH5K_INFO(sc, "RF%s 5GHz radio found (0x%x)\n", 2467 ATH5K_INFO(ah, "RF%s 5GHz radio found (0x%x)\n",
2496 ath5k_chip_name(AR5K_VERSION_RAD, 2468 ath5k_chip_name(AR5K_VERSION_RAD,
2497 sc->ah->ah_radio_5ghz_revision), 2469 ah->ah_radio_5ghz_revision),
2498 sc->ah->ah_radio_5ghz_revision); 2470 ah->ah_radio_5ghz_revision);
2499 ATH5K_INFO(sc, "RF%s 2GHz radio found (0x%x)\n", 2471 ATH5K_INFO(ah, "RF%s 2GHz radio found (0x%x)\n",
2500 ath5k_chip_name(AR5K_VERSION_RAD, 2472 ath5k_chip_name(AR5K_VERSION_RAD,
2501 sc->ah->ah_radio_2ghz_revision), 2473 ah->ah_radio_2ghz_revision),
2502 sc->ah->ah_radio_2ghz_revision); 2474 ah->ah_radio_2ghz_revision);
2503 } 2475 }
2504 } 2476 }
2505 2477
2506 ath5k_debug_init_device(sc); 2478 ath5k_debug_init_device(ah);
2507 2479
2508 /* ready to process interrupts */ 2480 /* ready to process interrupts */
2509 __clear_bit(ATH_STAT_INVALID, sc->status); 2481 __clear_bit(ATH_STAT_INVALID, ah->status);
2510 2482
2511 return 0; 2483 return 0;
2512err_ah: 2484err_ah:
2513 ath5k_hw_deinit(sc->ah); 2485 ath5k_hw_deinit(ah);
2514err_free_ah:
2515 kfree(sc->ah);
2516err_irq: 2486err_irq:
2517 free_irq(sc->irq, sc); 2487 free_irq(ah->irq, ah);
2518err: 2488err:
2519 return ret; 2489 return ret;
2520} 2490}
2521 2491
2522static int 2492static int
2523ath5k_stop_locked(struct ath5k_softc *sc) 2493ath5k_stop_locked(struct ath5k_hw *ah)
2524{ 2494{
2525 struct ath5k_hw *ah = sc->ah;
2526 2495
2527 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "invalid %u\n", 2496 ATH5K_DBG(ah, ATH5K_DEBUG_RESET, "invalid %u\n",
2528 test_bit(ATH_STAT_INVALID, sc->status)); 2497 test_bit(ATH_STAT_INVALID, ah->status));
2529 2498
2530 /* 2499 /*
2531 * Shutdown the hardware and driver: 2500 * Shutdown the hardware and driver:
@@ -2542,15 +2511,15 @@ ath5k_stop_locked(struct ath5k_softc *sc)
2542 * Note that some of this work is not possible if the 2511 * Note that some of this work is not possible if the
2543 * hardware is gone (invalid). 2512 * hardware is gone (invalid).
2544 */ 2513 */
2545 ieee80211_stop_queues(sc->hw); 2514 ieee80211_stop_queues(ah->hw);
2546 2515
2547 if (!test_bit(ATH_STAT_INVALID, sc->status)) { 2516 if (!test_bit(ATH_STAT_INVALID, ah->status)) {
2548 ath5k_led_off(sc); 2517 ath5k_led_off(ah);
2549 ath5k_hw_set_imr(ah, 0); 2518 ath5k_hw_set_imr(ah, 0);
2550 synchronize_irq(sc->irq); 2519 synchronize_irq(ah->irq);
2551 ath5k_rx_stop(sc); 2520 ath5k_rx_stop(ah);
2552 ath5k_hw_dma_stop(ah); 2521 ath5k_hw_dma_stop(ah);
2553 ath5k_drain_tx_buffs(sc); 2522 ath5k_drain_tx_buffs(ah);
2554 ath5k_hw_phy_disable(ah); 2523 ath5k_hw_phy_disable(ah);
2555 } 2524 }
2556 2525
@@ -2558,21 +2527,20 @@ ath5k_stop_locked(struct ath5k_softc *sc)
2558} 2527}
2559 2528
2560int 2529int
2561ath5k_init_hw(struct ath5k_softc *sc) 2530ath5k_init_hw(struct ath5k_hw *ah)
2562{ 2531{
2563 struct ath5k_hw *ah = sc->ah;
2564 struct ath_common *common = ath5k_hw_common(ah); 2532 struct ath_common *common = ath5k_hw_common(ah);
2565 int ret, i; 2533 int ret, i;
2566 2534
2567 mutex_lock(&sc->lock); 2535 mutex_lock(&ah->lock);
2568 2536
2569 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "mode %d\n", sc->opmode); 2537 ATH5K_DBG(ah, ATH5K_DEBUG_RESET, "mode %d\n", ah->opmode);
2570 2538
2571 /* 2539 /*
2572 * Stop anything previously setup. This is safe 2540 * Stop anything previously setup. This is safe
2573 * no matter this is the first time through or not. 2541 * no matter this is the first time through or not.
2574 */ 2542 */
2575 ath5k_stop_locked(sc); 2543 ath5k_stop_locked(ah);
2576 2544
2577 /* 2545 /*
2578 * The basic interface to setting the hardware in a good 2546 * The basic interface to setting the hardware in a good
@@ -2581,12 +2549,12 @@ ath5k_init_hw(struct ath5k_softc *sc)
2581 * be followed by initialization of the appropriate bits 2549 * be followed by initialization of the appropriate bits
2582 * and then setup of the interrupt mask. 2550 * and then setup of the interrupt mask.
2583 */ 2551 */
2584 sc->curchan = sc->hw->conf.channel; 2552 ah->curchan = ah->hw->conf.channel;
2585 sc->imask = AR5K_INT_RXOK | AR5K_INT_RXERR | AR5K_INT_RXEOL | 2553 ah->imask = AR5K_INT_RXOK | AR5K_INT_RXERR | AR5K_INT_RXEOL |
2586 AR5K_INT_RXORN | AR5K_INT_TXDESC | AR5K_INT_TXEOL | 2554 AR5K_INT_RXORN | AR5K_INT_TXDESC | AR5K_INT_TXEOL |
2587 AR5K_INT_FATAL | AR5K_INT_GLOBAL | AR5K_INT_MIB; 2555 AR5K_INT_FATAL | AR5K_INT_GLOBAL | AR5K_INT_MIB;
2588 2556
2589 ret = ath5k_reset(sc, NULL, false); 2557 ret = ath5k_reset(ah, NULL, false);
2590 if (ret) 2558 if (ret)
2591 goto done; 2559 goto done;
2592 2560
@@ -2603,29 +2571,29 @@ ath5k_init_hw(struct ath5k_softc *sc)
2603 * rate */ 2571 * rate */
2604 ah->ah_ack_bitrate_high = true; 2572 ah->ah_ack_bitrate_high = true;
2605 2573
2606 for (i = 0; i < ARRAY_SIZE(sc->bslot); i++) 2574 for (i = 0; i < ARRAY_SIZE(ah->bslot); i++)
2607 sc->bslot[i] = NULL; 2575 ah->bslot[i] = NULL;
2608 2576
2609 ret = 0; 2577 ret = 0;
2610done: 2578done:
2611 mmiowb(); 2579 mmiowb();
2612 mutex_unlock(&sc->lock); 2580 mutex_unlock(&ah->lock);
2613 2581
2614 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 2582 ieee80211_queue_delayed_work(ah->hw, &ah->tx_complete_work,
2615 msecs_to_jiffies(ATH5K_TX_COMPLETE_POLL_INT)); 2583 msecs_to_jiffies(ATH5K_TX_COMPLETE_POLL_INT));
2616 2584
2617 return ret; 2585 return ret;
2618} 2586}
2619 2587
2620static void ath5k_stop_tasklets(struct ath5k_softc *sc) 2588static void ath5k_stop_tasklets(struct ath5k_hw *ah)
2621{ 2589{
2622 sc->rx_pending = false; 2590 ah->rx_pending = false;
2623 sc->tx_pending = false; 2591 ah->tx_pending = false;
2624 tasklet_kill(&sc->rxtq); 2592 tasklet_kill(&ah->rxtq);
2625 tasklet_kill(&sc->txtq); 2593 tasklet_kill(&ah->txtq);
2626 tasklet_kill(&sc->calib); 2594 tasklet_kill(&ah->calib);
2627 tasklet_kill(&sc->beacontq); 2595 tasklet_kill(&ah->beacontq);
2628 tasklet_kill(&sc->ani_tasklet); 2596 tasklet_kill(&ah->ani_tasklet);
2629} 2597}
2630 2598
2631/* 2599/*
@@ -2635,13 +2603,13 @@ static void ath5k_stop_tasklets(struct ath5k_softc *sc)
2635 * stop is preempted). 2603 * stop is preempted).
2636 */ 2604 */
2637int 2605int
2638ath5k_stop_hw(struct ath5k_softc *sc) 2606ath5k_stop_hw(struct ath5k_hw *ah)
2639{ 2607{
2640 int ret; 2608 int ret;
2641 2609
2642 mutex_lock(&sc->lock); 2610 mutex_lock(&ah->lock);
2643 ret = ath5k_stop_locked(sc); 2611 ret = ath5k_stop_locked(ah);
2644 if (ret == 0 && !test_bit(ATH_STAT_INVALID, sc->status)) { 2612 if (ret == 0 && !test_bit(ATH_STAT_INVALID, ah->status)) {
2645 /* 2613 /*
2646 * Don't set the card in full sleep mode! 2614 * Don't set the card in full sleep mode!
2647 * 2615 *
@@ -2662,20 +2630,20 @@ ath5k_stop_hw(struct ath5k_softc *sc)
2662 * and Sam's HAL do anyway). Instead Perform a full reset 2630 * and Sam's HAL do anyway). Instead Perform a full reset
2663 * on the device (same as initial state after attach) and 2631 * on the device (same as initial state after attach) and
2664 * leave it idle (keep MAC/BB on warm reset) */ 2632 * leave it idle (keep MAC/BB on warm reset) */
2665 ret = ath5k_hw_on_hold(sc->ah); 2633 ret = ath5k_hw_on_hold(ah);
2666 2634
2667 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, 2635 ATH5K_DBG(ah, ATH5K_DEBUG_RESET,
2668 "putting device to sleep\n"); 2636 "putting device to sleep\n");
2669 } 2637 }
2670 2638
2671 mmiowb(); 2639 mmiowb();
2672 mutex_unlock(&sc->lock); 2640 mutex_unlock(&ah->lock);
2673 2641
2674 ath5k_stop_tasklets(sc); 2642 ath5k_stop_tasklets(ah);
2675 2643
2676 cancel_delayed_work_sync(&sc->tx_complete_work); 2644 cancel_delayed_work_sync(&ah->tx_complete_work);
2677 2645
2678 ath5k_rfkill_hw_stop(sc->ah); 2646 ath5k_rfkill_hw_stop(ah);
2679 2647
2680 return ret; 2648 return ret;
2681} 2649}
@@ -2684,47 +2652,46 @@ ath5k_stop_hw(struct ath5k_softc *sc)
2684 * Reset the hardware. If chan is not NULL, then also pause rx/tx 2652 * Reset the hardware. If chan is not NULL, then also pause rx/tx
2685 * and change to the given channel. 2653 * and change to the given channel.
2686 * 2654 *
2687 * This should be called with sc->lock. 2655 * This should be called with ah->lock.
2688 */ 2656 */
2689static int 2657static int
2690ath5k_reset(struct ath5k_softc *sc, struct ieee80211_channel *chan, 2658ath5k_reset(struct ath5k_hw *ah, struct ieee80211_channel *chan,
2691 bool skip_pcu) 2659 bool skip_pcu)
2692{ 2660{
2693 struct ath5k_hw *ah = sc->ah;
2694 struct ath_common *common = ath5k_hw_common(ah); 2661 struct ath_common *common = ath5k_hw_common(ah);
2695 int ret, ani_mode; 2662 int ret, ani_mode;
2696 bool fast; 2663 bool fast;
2697 2664
2698 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "resetting\n"); 2665 ATH5K_DBG(ah, ATH5K_DEBUG_RESET, "resetting\n");
2699 2666
2700 ath5k_hw_set_imr(ah, 0); 2667 ath5k_hw_set_imr(ah, 0);
2701 synchronize_irq(sc->irq); 2668 synchronize_irq(ah->irq);
2702 ath5k_stop_tasklets(sc); 2669 ath5k_stop_tasklets(ah);
2703 2670
2704 /* Save ani mode and disable ANI during 2671 /* Save ani mode and disable ANI during
2705 * reset. If we don't we might get false 2672 * reset. If we don't we might get false
2706 * PHY error interrupts. */ 2673 * PHY error interrupts. */
2707 ani_mode = ah->ah_sc->ani_state.ani_mode; 2674 ani_mode = ah->ani_state.ani_mode;
2708 ath5k_ani_init(ah, ATH5K_ANI_MODE_OFF); 2675 ath5k_ani_init(ah, ATH5K_ANI_MODE_OFF);
2709 2676
2710 /* We are going to empty hw queues 2677 /* We are going to empty hw queues
2711 * so we should also free any remaining 2678 * so we should also free any remaining
2712 * tx buffers */ 2679 * tx buffers */
2713 ath5k_drain_tx_buffs(sc); 2680 ath5k_drain_tx_buffs(ah);
2714 if (chan) 2681 if (chan)
2715 sc->curchan = chan; 2682 ah->curchan = chan;
2716 2683
2717 fast = ((chan != NULL) && modparam_fastchanswitch) ? 1 : 0; 2684 fast = ((chan != NULL) && modparam_fastchanswitch) ? 1 : 0;
2718 2685
2719 ret = ath5k_hw_reset(ah, sc->opmode, sc->curchan, fast, skip_pcu); 2686 ret = ath5k_hw_reset(ah, ah->opmode, ah->curchan, fast, skip_pcu);
2720 if (ret) { 2687 if (ret) {
2721 ATH5K_ERR(sc, "can't reset hardware (%d)\n", ret); 2688 ATH5K_ERR(ah, "can't reset hardware (%d)\n", ret);
2722 goto err; 2689 goto err;
2723 } 2690 }
2724 2691
2725 ret = ath5k_rx_start(sc); 2692 ret = ath5k_rx_start(ah);
2726 if (ret) { 2693 if (ret) {
2727 ATH5K_ERR(sc, "can't start recv logic\n"); 2694 ATH5K_ERR(ah, "can't start recv logic\n");
2728 goto err; 2695 goto err;
2729 } 2696 }
2730 2697
@@ -2736,7 +2703,7 @@ ath5k_reset(struct ath5k_softc *sc, struct ieee80211_channel *chan,
2736 ewma_init(&ah->ah_beacon_rssi_avg, 1024, 8); 2703 ewma_init(&ah->ah_beacon_rssi_avg, 1024, 8);
2737 2704
2738 /* clear survey data and cycle counters */ 2705 /* clear survey data and cycle counters */
2739 memset(&sc->survey, 0, sizeof(sc->survey)); 2706 memset(&ah->survey, 0, sizeof(ah->survey));
2740 spin_lock_bh(&common->cc_lock); 2707 spin_lock_bh(&common->cc_lock);
2741 ath_hw_cycle_counters_update(common); 2708 ath_hw_cycle_counters_update(common);
2742 memset(&common->cc_survey, 0, sizeof(common->cc_survey)); 2709 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
@@ -2752,12 +2719,12 @@ ath5k_reset(struct ath5k_softc *sc, struct ieee80211_channel *chan,
2752 * 2719 *
2753 * XXX needed? 2720 * XXX needed?
2754 */ 2721 */
2755/* ath5k_chan_change(sc, c); */ 2722/* ath5k_chan_change(ah, c); */
2756 2723
2757 ath5k_beacon_config(sc); 2724 ath5k_beacon_config(ah);
2758 /* intrs are enabled by ath5k_beacon_config */ 2725 /* intrs are enabled by ath5k_beacon_config */
2759 2726
2760 ieee80211_wake_queues(sc->hw); 2727 ieee80211_wake_queues(ah->hw);
2761 2728
2762 return 0; 2729 return 0;
2763err: 2730err:
@@ -2766,20 +2733,19 @@ err:
2766 2733
2767static void ath5k_reset_work(struct work_struct *work) 2734static void ath5k_reset_work(struct work_struct *work)
2768{ 2735{
2769 struct ath5k_softc *sc = container_of(work, struct ath5k_softc, 2736 struct ath5k_hw *ah = container_of(work, struct ath5k_hw,
2770 reset_work); 2737 reset_work);
2771 2738
2772 mutex_lock(&sc->lock); 2739 mutex_lock(&ah->lock);
2773 ath5k_reset(sc, NULL, true); 2740 ath5k_reset(ah, NULL, true);
2774 mutex_unlock(&sc->lock); 2741 mutex_unlock(&ah->lock);
2775} 2742}
2776 2743
2777static int __devinit 2744static int __devinit
2778ath5k_init(struct ieee80211_hw *hw) 2745ath5k_init(struct ieee80211_hw *hw)
2779{ 2746{
2780 2747
2781 struct ath5k_softc *sc = hw->priv; 2748 struct ath5k_hw *ah = hw->priv;
2782 struct ath5k_hw *ah = sc->ah;
2783 struct ath_regulatory *regulatory = ath5k_hw_regulatory(ah); 2749 struct ath_regulatory *regulatory = ath5k_hw_regulatory(ah);
2784 struct ath5k_txq *txq; 2750 struct ath5k_txq *txq;
2785 u8 mac[ETH_ALEN] = {}; 2751 u8 mac[ETH_ALEN] = {};
@@ -2798,7 +2764,7 @@ ath5k_init(struct ieee80211_hw *hw)
2798 if (ret < 0) 2764 if (ret < 0)
2799 goto err; 2765 goto err;
2800 if (ret > 0) 2766 if (ret > 0)
2801 __set_bit(ATH_STAT_MRRETRY, sc->status); 2767 __set_bit(ATH_STAT_MRRETRY, ah->status);
2802 2768
2803 /* 2769 /*
2804 * Collect the channel list. The 802.11 layer 2770 * Collect the channel list. The 802.11 layer
@@ -2808,16 +2774,16 @@ ath5k_init(struct ieee80211_hw *hw)
2808 */ 2774 */
2809 ret = ath5k_setup_bands(hw); 2775 ret = ath5k_setup_bands(hw);
2810 if (ret) { 2776 if (ret) {
2811 ATH5K_ERR(sc, "can't get channels\n"); 2777 ATH5K_ERR(ah, "can't get channels\n");
2812 goto err; 2778 goto err;
2813 } 2779 }
2814 2780
2815 /* 2781 /*
2816 * Allocate tx+rx descriptors and populate the lists. 2782 * Allocate tx+rx descriptors and populate the lists.
2817 */ 2783 */
2818 ret = ath5k_desc_alloc(sc); 2784 ret = ath5k_desc_alloc(ah);
2819 if (ret) { 2785 if (ret) {
2820 ATH5K_ERR(sc, "can't allocate descriptors\n"); 2786 ATH5K_ERR(ah, "can't allocate descriptors\n");
2821 goto err; 2787 goto err;
2822 } 2788 }
2823 2789
@@ -2829,14 +2795,14 @@ ath5k_init(struct ieee80211_hw *hw)
2829 */ 2795 */
2830 ret = ath5k_beaconq_setup(ah); 2796 ret = ath5k_beaconq_setup(ah);
2831 if (ret < 0) { 2797 if (ret < 0) {
2832 ATH5K_ERR(sc, "can't setup a beacon xmit queue\n"); 2798 ATH5K_ERR(ah, "can't setup a beacon xmit queue\n");
2833 goto err_desc; 2799 goto err_desc;
2834 } 2800 }
2835 sc->bhalq = ret; 2801 ah->bhalq = ret;
2836 sc->cabq = ath5k_txq_setup(sc, AR5K_TX_QUEUE_CAB, 0); 2802 ah->cabq = ath5k_txq_setup(ah, AR5K_TX_QUEUE_CAB, 0);
2837 if (IS_ERR(sc->cabq)) { 2803 if (IS_ERR(ah->cabq)) {
2838 ATH5K_ERR(sc, "can't setup cab queue\n"); 2804 ATH5K_ERR(ah, "can't setup cab queue\n");
2839 ret = PTR_ERR(sc->cabq); 2805 ret = PTR_ERR(ah->cabq);
2840 goto err_bhal; 2806 goto err_bhal;
2841 } 2807 }
2842 2808
@@ -2845,97 +2811,97 @@ ath5k_init(struct ieee80211_hw *hw)
2845 if (ah->ah_capabilities.cap_queues.q_tx_num >= 6) { 2811 if (ah->ah_capabilities.cap_queues.q_tx_num >= 6) {
2846 /* This order matches mac80211's queue priority, so we can 2812 /* This order matches mac80211's queue priority, so we can
2847 * directly use the mac80211 queue number without any mapping */ 2813 * directly use the mac80211 queue number without any mapping */
2848 txq = ath5k_txq_setup(sc, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_VO); 2814 txq = ath5k_txq_setup(ah, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_VO);
2849 if (IS_ERR(txq)) { 2815 if (IS_ERR(txq)) {
2850 ATH5K_ERR(sc, "can't setup xmit queue\n"); 2816 ATH5K_ERR(ah, "can't setup xmit queue\n");
2851 ret = PTR_ERR(txq); 2817 ret = PTR_ERR(txq);
2852 goto err_queues; 2818 goto err_queues;
2853 } 2819 }
2854 txq = ath5k_txq_setup(sc, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_VI); 2820 txq = ath5k_txq_setup(ah, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_VI);
2855 if (IS_ERR(txq)) { 2821 if (IS_ERR(txq)) {
2856 ATH5K_ERR(sc, "can't setup xmit queue\n"); 2822 ATH5K_ERR(ah, "can't setup xmit queue\n");
2857 ret = PTR_ERR(txq); 2823 ret = PTR_ERR(txq);
2858 goto err_queues; 2824 goto err_queues;
2859 } 2825 }
2860 txq = ath5k_txq_setup(sc, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_BE); 2826 txq = ath5k_txq_setup(ah, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_BE);
2861 if (IS_ERR(txq)) { 2827 if (IS_ERR(txq)) {
2862 ATH5K_ERR(sc, "can't setup xmit queue\n"); 2828 ATH5K_ERR(ah, "can't setup xmit queue\n");
2863 ret = PTR_ERR(txq); 2829 ret = PTR_ERR(txq);
2864 goto err_queues; 2830 goto err_queues;
2865 } 2831 }
2866 txq = ath5k_txq_setup(sc, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_BK); 2832 txq = ath5k_txq_setup(ah, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_BK);
2867 if (IS_ERR(txq)) { 2833 if (IS_ERR(txq)) {
2868 ATH5K_ERR(sc, "can't setup xmit queue\n"); 2834 ATH5K_ERR(ah, "can't setup xmit queue\n");
2869 ret = PTR_ERR(txq); 2835 ret = PTR_ERR(txq);
2870 goto err_queues; 2836 goto err_queues;
2871 } 2837 }
2872 hw->queues = 4; 2838 hw->queues = 4;
2873 } else { 2839 } else {
2874 /* older hardware (5210) can only support one data queue */ 2840 /* older hardware (5210) can only support one data queue */
2875 txq = ath5k_txq_setup(sc, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_BE); 2841 txq = ath5k_txq_setup(ah, AR5K_TX_QUEUE_DATA, AR5K_WME_AC_BE);
2876 if (IS_ERR(txq)) { 2842 if (IS_ERR(txq)) {
2877 ATH5K_ERR(sc, "can't setup xmit queue\n"); 2843 ATH5K_ERR(ah, "can't setup xmit queue\n");
2878 ret = PTR_ERR(txq); 2844 ret = PTR_ERR(txq);
2879 goto err_queues; 2845 goto err_queues;
2880 } 2846 }
2881 hw->queues = 1; 2847 hw->queues = 1;
2882 } 2848 }
2883 2849
2884 tasklet_init(&sc->rxtq, ath5k_tasklet_rx, (unsigned long)sc); 2850 tasklet_init(&ah->rxtq, ath5k_tasklet_rx, (unsigned long)ah);
2885 tasklet_init(&sc->txtq, ath5k_tasklet_tx, (unsigned long)sc); 2851 tasklet_init(&ah->txtq, ath5k_tasklet_tx, (unsigned long)ah);
2886 tasklet_init(&sc->calib, ath5k_tasklet_calibrate, (unsigned long)sc); 2852 tasklet_init(&ah->calib, ath5k_tasklet_calibrate, (unsigned long)ah);
2887 tasklet_init(&sc->beacontq, ath5k_tasklet_beacon, (unsigned long)sc); 2853 tasklet_init(&ah->beacontq, ath5k_tasklet_beacon, (unsigned long)ah);
2888 tasklet_init(&sc->ani_tasklet, ath5k_tasklet_ani, (unsigned long)sc); 2854 tasklet_init(&ah->ani_tasklet, ath5k_tasklet_ani, (unsigned long)ah);
2889 2855
2890 INIT_WORK(&sc->reset_work, ath5k_reset_work); 2856 INIT_WORK(&ah->reset_work, ath5k_reset_work);
2891 INIT_DELAYED_WORK(&sc->tx_complete_work, ath5k_tx_complete_poll_work); 2857 INIT_DELAYED_WORK(&ah->tx_complete_work, ath5k_tx_complete_poll_work);
2892 2858
2893 ret = ath5k_hw_common(ah)->bus_ops->eeprom_read_mac(ah, mac); 2859 ret = ath5k_hw_common(ah)->bus_ops->eeprom_read_mac(ah, mac);
2894 if (ret) { 2860 if (ret) {
2895 ATH5K_ERR(sc, "unable to read address from EEPROM\n"); 2861 ATH5K_ERR(ah, "unable to read address from EEPROM\n");
2896 goto err_queues; 2862 goto err_queues;
2897 } 2863 }
2898 2864
2899 SET_IEEE80211_PERM_ADDR(hw, mac); 2865 SET_IEEE80211_PERM_ADDR(hw, mac);
2900 memcpy(&sc->lladdr, mac, ETH_ALEN); 2866 memcpy(&ah->lladdr, mac, ETH_ALEN);
2901 /* All MAC address bits matter for ACKs */ 2867 /* All MAC address bits matter for ACKs */
2902 ath5k_update_bssid_mask_and_opmode(sc, NULL); 2868 ath5k_update_bssid_mask_and_opmode(ah, NULL);
2903 2869
2904 regulatory->current_rd = ah->ah_capabilities.cap_eeprom.ee_regdomain; 2870 regulatory->current_rd = ah->ah_capabilities.cap_eeprom.ee_regdomain;
2905 ret = ath_regd_init(regulatory, hw->wiphy, ath5k_reg_notifier); 2871 ret = ath_regd_init(regulatory, hw->wiphy, ath5k_reg_notifier);
2906 if (ret) { 2872 if (ret) {
2907 ATH5K_ERR(sc, "can't initialize regulatory system\n"); 2873 ATH5K_ERR(ah, "can't initialize regulatory system\n");
2908 goto err_queues; 2874 goto err_queues;
2909 } 2875 }
2910 2876
2911 ret = ieee80211_register_hw(hw); 2877 ret = ieee80211_register_hw(hw);
2912 if (ret) { 2878 if (ret) {
2913 ATH5K_ERR(sc, "can't register ieee80211 hw\n"); 2879 ATH5K_ERR(ah, "can't register ieee80211 hw\n");
2914 goto err_queues; 2880 goto err_queues;
2915 } 2881 }
2916 2882
2917 if (!ath_is_world_regd(regulatory)) 2883 if (!ath_is_world_regd(regulatory))
2918 regulatory_hint(hw->wiphy, regulatory->alpha2); 2884 regulatory_hint(hw->wiphy, regulatory->alpha2);
2919 2885
2920 ath5k_init_leds(sc); 2886 ath5k_init_leds(ah);
2921 2887
2922 ath5k_sysfs_register(sc); 2888 ath5k_sysfs_register(ah);
2923 2889
2924 return 0; 2890 return 0;
2925err_queues: 2891err_queues:
2926 ath5k_txq_release(sc); 2892 ath5k_txq_release(ah);
2927err_bhal: 2893err_bhal:
2928 ath5k_hw_release_tx_queue(ah, sc->bhalq); 2894 ath5k_hw_release_tx_queue(ah, ah->bhalq);
2929err_desc: 2895err_desc:
2930 ath5k_desc_free(sc); 2896 ath5k_desc_free(ah);
2931err: 2897err:
2932 return ret; 2898 return ret;
2933} 2899}
2934 2900
2935void 2901void
2936ath5k_deinit_softc(struct ath5k_softc *sc) 2902ath5k_deinit_softc(struct ath5k_hw *ah)
2937{ 2903{
2938 struct ieee80211_hw *hw = sc->hw; 2904 struct ieee80211_hw *hw = ah->hw;
2939 2905
2940 /* 2906 /*
2941 * NB: the order of these is important: 2907 * NB: the order of these is important:
@@ -2951,24 +2917,23 @@ ath5k_deinit_softc(struct ath5k_softc *sc)
2951 * Other than that, it's straightforward... 2917 * Other than that, it's straightforward...
2952 */ 2918 */
2953 ieee80211_unregister_hw(hw); 2919 ieee80211_unregister_hw(hw);
2954 ath5k_desc_free(sc); 2920 ath5k_desc_free(ah);
2955 ath5k_txq_release(sc); 2921 ath5k_txq_release(ah);
2956 ath5k_hw_release_tx_queue(sc->ah, sc->bhalq); 2922 ath5k_hw_release_tx_queue(ah, ah->bhalq);
2957 ath5k_unregister_leds(sc); 2923 ath5k_unregister_leds(ah);
2958 2924
2959 ath5k_sysfs_unregister(sc); 2925 ath5k_sysfs_unregister(ah);
2960 /* 2926 /*
2961 * NB: can't reclaim these until after ieee80211_ifdetach 2927 * NB: can't reclaim these until after ieee80211_ifdetach
2962 * returns because we'll get called back to reclaim node 2928 * returns because we'll get called back to reclaim node
2963 * state and potentially want to use them. 2929 * state and potentially want to use them.
2964 */ 2930 */
2965 ath5k_hw_deinit(sc->ah); 2931 ath5k_hw_deinit(ah);
2966 kfree(sc->ah); 2932 free_irq(ah->irq, ah);
2967 free_irq(sc->irq, sc);
2968} 2933}
2969 2934
2970bool 2935bool
2971ath5k_any_vif_assoc(struct ath5k_softc *sc) 2936ath5k_any_vif_assoc(struct ath5k_hw *ah)
2972{ 2937{
2973 struct ath5k_vif_iter_data iter_data; 2938 struct ath5k_vif_iter_data iter_data;
2974 iter_data.hw_macaddr = NULL; 2939 iter_data.hw_macaddr = NULL;
@@ -2976,7 +2941,7 @@ ath5k_any_vif_assoc(struct ath5k_softc *sc)
2976 iter_data.need_set_hw_addr = false; 2941 iter_data.need_set_hw_addr = false;
2977 iter_data.found_active = true; 2942 iter_data.found_active = true;
2978 2943
2979 ieee80211_iterate_active_interfaces_atomic(sc->hw, ath5k_vif_iter, 2944 ieee80211_iterate_active_interfaces_atomic(ah->hw, ath5k_vif_iter,
2980 &iter_data); 2945 &iter_data);
2981 return iter_data.any_assoc; 2946 return iter_data.any_assoc;
2982} 2947}
@@ -2984,8 +2949,7 @@ ath5k_any_vif_assoc(struct ath5k_softc *sc)
2984void 2949void
2985ath5k_set_beacon_filter(struct ieee80211_hw *hw, bool enable) 2950ath5k_set_beacon_filter(struct ieee80211_hw *hw, bool enable)
2986{ 2951{
2987 struct ath5k_softc *sc = hw->priv; 2952 struct ath5k_hw *ah = hw->priv;
2988 struct ath5k_hw *ah = sc->ah;
2989 u32 rfilt; 2953 u32 rfilt;
2990 rfilt = ath5k_hw_get_rx_filter(ah); 2954 rfilt = ath5k_hw_get_rx_filter(ah);
2991 if (enable) 2955 if (enable)
@@ -2993,5 +2957,5 @@ ath5k_set_beacon_filter(struct ieee80211_hw *hw, bool enable)
2993 else 2957 else
2994 rfilt &= ~AR5K_RX_FILTER_BEACON; 2958 rfilt &= ~AR5K_RX_FILTER_BEACON;
2995 ath5k_hw_set_rx_filter(ah, rfilt); 2959 ath5k_hw_set_rx_filter(ah, rfilt);
2996 sc->filter_flags = rfilt; 2960 ah->filter_flags = rfilt;
2997} 2961}
diff --git a/drivers/net/wireless/ath/ath5k/base.h b/drivers/net/wireless/ath/ath5k/base.h
index 0a98777b9373..aa8aafca906c 100644
--- a/drivers/net/wireless/ath/ath5k/base.h
+++ b/drivers/net/wireless/ath/ath5k/base.h
@@ -45,23 +45,13 @@
45#include <linux/list.h> 45#include <linux/list.h>
46#include <linux/wireless.h> 46#include <linux/wireless.h>
47#include <linux/if_ether.h> 47#include <linux/if_ether.h>
48#include <linux/leds.h>
49#include <linux/rfkill.h> 48#include <linux/rfkill.h>
50#include <linux/workqueue.h> 49#include <linux/workqueue.h>
51 50
52#include "ath5k.h" 51#include "ath5k.h"
53#include "debug.h"
54#include "ani.h"
55
56#include "../regd.h" 52#include "../regd.h"
57#include "../ath.h" 53#include "../ath.h"
58 54
59#define ATH_RXBUF 40 /* number of RX buffers */
60#define ATH_TXBUF 200 /* number of TX buffers */
61#define ATH_BCBUF 4 /* number of beacon buffers */
62#define ATH5K_TXQ_LEN_MAX (ATH_TXBUF / 4) /* bufs per queue */
63#define ATH5K_TXQ_LEN_LOW (ATH5K_TXQ_LEN_MAX / 2) /* low mark */
64
65struct ath5k_buf { 55struct ath5k_buf {
66 struct list_head list; 56 struct list_head list;
67 struct ath5k_desc *desc; /* virtual addr of desc */ 57 struct ath5k_desc *desc; /* virtual addr of desc */
@@ -70,94 +60,6 @@ struct ath5k_buf {
70 dma_addr_t skbaddr;/* physical addr of skb data */ 60 dma_addr_t skbaddr;/* physical addr of skb data */
71}; 61};
72 62
73/*
74 * Data transmit queue state. One of these exists for each
75 * hardware transmit queue. Packets sent to us from above
76 * are assigned to queues based on their priority. Not all
77 * devices support a complete set of hardware transmit queues.
78 * For those devices the array sc_ac2q will map multiple
79 * priorities to fewer hardware queues (typically all to one
80 * hardware queue).
81 */
82struct ath5k_txq {
83 unsigned int qnum; /* hardware q number */
84 u32 *link; /* link ptr in last TX desc */
85 struct list_head q; /* transmit queue */
86 spinlock_t lock; /* lock on q and link */
87 bool setup;
88 int txq_len; /* number of queued buffers */
89 int txq_max; /* max allowed num of queued buffers */
90 bool txq_poll_mark;
91 unsigned int txq_stuck; /* informational counter */
92};
93
94#define ATH5K_LED_MAX_NAME_LEN 31
95
96/*
97 * State for LED triggers
98 */
99struct ath5k_led {
100 char name[ATH5K_LED_MAX_NAME_LEN + 1]; /* name of the LED in sysfs */
101 struct ath5k_softc *sc; /* driver state */
102 struct led_classdev led_dev; /* led classdev */
103};
104
105/* Rfkill */
106struct ath5k_rfkill {
107 /* GPIO PIN for rfkill */
108 u16 gpio;
109 /* polarity of rfkill GPIO PIN */
110 bool polarity;
111 /* RFKILL toggle tasklet */
112 struct tasklet_struct toggleq;
113};
114
115/* statistics */
116struct ath5k_statistics {
117 /* antenna use */
118 unsigned int antenna_rx[5]; /* frames count per antenna RX */
119 unsigned int antenna_tx[5]; /* frames count per antenna TX */
120
121 /* frame errors */
122 unsigned int rx_all_count; /* all RX frames, including errors */
123 unsigned int tx_all_count; /* all TX frames, including errors */
124 unsigned int rx_bytes_count; /* all RX bytes, including errored pkts
125 * and the MAC headers for each packet
126 */
127 unsigned int tx_bytes_count; /* all TX bytes, including errored pkts
128 * and the MAC headers and padding for
129 * each packet.
130 */
131 unsigned int rxerr_crc;
132 unsigned int rxerr_phy;
133 unsigned int rxerr_phy_code[32];
134 unsigned int rxerr_fifo;
135 unsigned int rxerr_decrypt;
136 unsigned int rxerr_mic;
137 unsigned int rxerr_proc;
138 unsigned int rxerr_jumbo;
139 unsigned int txerr_retry;
140 unsigned int txerr_fifo;
141 unsigned int txerr_filt;
142
143 /* MIB counters */
144 unsigned int ack_fail;
145 unsigned int rts_fail;
146 unsigned int rts_ok;
147 unsigned int fcs_error;
148 unsigned int beacons;
149
150 unsigned int mib_intr;
151 unsigned int rxorn_intr;
152 unsigned int rxeol_intr;
153};
154
155#if CHAN_DEBUG
156#define ATH_CHAN_MAX (26 + 26 + 26 + 200 + 200)
157#else
158#define ATH_CHAN_MAX (14 + 14 + 14 + 252 + 20)
159#endif
160
161struct ath5k_vif { 63struct ath5k_vif {
162 bool assoc; /* are we associated or not */ 64 bool assoc; /* are we associated or not */
163 enum nl80211_iftype opmode; 65 enum nl80211_iftype opmode;
@@ -166,104 +68,6 @@ struct ath5k_vif {
166 u8 lladdr[ETH_ALEN]; 68 u8 lladdr[ETH_ALEN];
167}; 69};
168 70
169/* Software Carrier, keeps track of the driver state
170 * associated with an instance of a device */
171struct ath5k_softc {
172 struct pci_dev *pdev;
173 struct device *dev; /* for dma mapping */
174 int irq;
175 u16 devid;
176 void __iomem *iobase; /* address of the device */
177 struct mutex lock; /* dev-level lock */
178 struct ieee80211_hw *hw; /* IEEE 802.11 common */
179 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
180 struct ieee80211_channel channels[ATH_CHAN_MAX];
181 struct ieee80211_rate rates[IEEE80211_NUM_BANDS][AR5K_MAX_RATES];
182 s8 rate_idx[IEEE80211_NUM_BANDS][AR5K_MAX_RATES];
183 enum nl80211_iftype opmode;
184 struct ath5k_hw *ah; /* Atheros HW */
185
186#ifdef CONFIG_ATH5K_DEBUG
187 struct ath5k_dbg_info debug; /* debug info */
188#endif /* CONFIG_ATH5K_DEBUG */
189
190 struct ath5k_buf *bufptr; /* allocated buffer ptr */
191 struct ath5k_desc *desc; /* TX/RX descriptors */
192 dma_addr_t desc_daddr; /* DMA (physical) address */
193 size_t desc_len; /* size of TX/RX descriptors */
194
195 DECLARE_BITMAP(status, 6);
196#define ATH_STAT_INVALID 0 /* disable hardware accesses */
197#define ATH_STAT_MRRETRY 1 /* multi-rate retry support */
198#define ATH_STAT_PROMISC 2
199#define ATH_STAT_LEDSOFT 3 /* enable LED gpio status */
200#define ATH_STAT_STARTED 4 /* opened & irqs enabled */
201#define ATH_STAT_2G_DISABLED 5 /* multiband radio without 2G */
202
203 unsigned int filter_flags; /* HW flags, AR5K_RX_FILTER_* */
204 struct ieee80211_channel *curchan; /* current h/w channel */
205
206 u16 nvifs;
207
208 enum ath5k_int imask; /* interrupt mask copy */
209
210 spinlock_t irqlock;
211 bool rx_pending; /* rx tasklet pending */
212 bool tx_pending; /* tx tasklet pending */
213
214 u8 lladdr[ETH_ALEN];
215 u8 bssidmask[ETH_ALEN];
216
217 unsigned int led_pin, /* GPIO pin for driving LED */
218 led_on; /* pin setting for LED on */
219
220 struct work_struct reset_work; /* deferred chip reset */
221
222 unsigned int rxbufsize; /* rx size based on mtu */
223 struct list_head rxbuf; /* receive buffer */
224 spinlock_t rxbuflock;
225 u32 *rxlink; /* link ptr in last RX desc */
226 struct tasklet_struct rxtq; /* rx intr tasklet */
227 struct ath5k_led rx_led; /* rx led */
228
229 struct list_head txbuf; /* transmit buffer */
230 spinlock_t txbuflock;
231 unsigned int txbuf_len; /* buf count in txbuf list */
232 struct ath5k_txq txqs[AR5K_NUM_TX_QUEUES]; /* tx queues */
233 struct tasklet_struct txtq; /* tx intr tasklet */
234 struct ath5k_led tx_led; /* tx led */
235
236 struct ath5k_rfkill rf_kill;
237
238 struct tasklet_struct calib; /* calibration tasklet */
239
240 spinlock_t block; /* protects beacon */
241 struct tasklet_struct beacontq; /* beacon intr tasklet */
242 struct list_head bcbuf; /* beacon buffer */
243 struct ieee80211_vif *bslot[ATH_BCBUF];
244 u16 num_ap_vifs;
245 u16 num_adhoc_vifs;
246 unsigned int bhalq, /* SW q for outgoing beacons */
247 bmisscount, /* missed beacon transmits */
248 bintval, /* beacon interval in TU */
249 bsent;
250 unsigned int nexttbtt; /* next beacon time in TU */
251 struct ath5k_txq *cabq; /* content after beacon */
252
253 int power_level; /* Requested tx power in dBm */
254 bool assoc; /* associate state */
255 bool enable_beacon; /* true if beacons are on */
256
257 struct ath5k_statistics stats;
258
259 struct ath5k_ani_state ani_state;
260 struct tasklet_struct ani_tasklet; /* ANI calibration */
261
262 struct delayed_work tx_complete_work;
263
264 struct survey_info survey; /* collected survey info */
265};
266
267struct ath5k_vif_iter_data { 71struct ath5k_vif_iter_data {
268 const u8 *hw_macaddr; 72 const u8 *hw_macaddr;
269 u8 mask[ETH_ALEN]; 73 u8 mask[ETH_ALEN];
diff --git a/drivers/net/wireless/ath/ath5k/debug.c b/drivers/net/wireless/ath/ath5k/debug.c
index 4edca7072d53..ccca724de173 100644
--- a/drivers/net/wireless/ath/ath5k/debug.c
+++ b/drivers/net/wireless/ath/ath5k/debug.c
@@ -157,10 +157,10 @@ static void *reg_next(struct seq_file *seq, void *p, loff_t *pos)
157 157
158static int reg_show(struct seq_file *seq, void *p) 158static int reg_show(struct seq_file *seq, void *p)
159{ 159{
160 struct ath5k_softc *sc = seq->private; 160 struct ath5k_hw *ah = seq->private;
161 struct reg *r = p; 161 struct reg *r = p;
162 seq_printf(seq, "%-25s0x%08x\n", r->name, 162 seq_printf(seq, "%-25s0x%08x\n", r->name,
163 ath5k_hw_reg_read(sc->ah, r->addr)); 163 ath5k_hw_reg_read(ah, r->addr));
164 return 0; 164 return 0;
165} 165}
166 166
@@ -197,42 +197,41 @@ static const struct file_operations fops_registers = {
197static ssize_t read_file_beacon(struct file *file, char __user *user_buf, 197static ssize_t read_file_beacon(struct file *file, char __user *user_buf,
198 size_t count, loff_t *ppos) 198 size_t count, loff_t *ppos)
199{ 199{
200 struct ath5k_softc *sc = file->private_data; 200 struct ath5k_hw *ah = file->private_data;
201 struct ath5k_hw *ah = sc->ah;
202 char buf[500]; 201 char buf[500];
203 unsigned int len = 0; 202 unsigned int len = 0;
204 unsigned int v; 203 unsigned int v;
205 u64 tsf; 204 u64 tsf;
206 205
207 v = ath5k_hw_reg_read(sc->ah, AR5K_BEACON); 206 v = ath5k_hw_reg_read(ah, AR5K_BEACON);
208 len += snprintf(buf + len, sizeof(buf) - len, 207 len += snprintf(buf + len, sizeof(buf) - len,
209 "%-24s0x%08x\tintval: %d\tTIM: 0x%x\n", 208 "%-24s0x%08x\tintval: %d\tTIM: 0x%x\n",
210 "AR5K_BEACON", v, v & AR5K_BEACON_PERIOD, 209 "AR5K_BEACON", v, v & AR5K_BEACON_PERIOD,
211 (v & AR5K_BEACON_TIM) >> AR5K_BEACON_TIM_S); 210 (v & AR5K_BEACON_TIM) >> AR5K_BEACON_TIM_S);
212 211
213 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\n", 212 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\n",
214 "AR5K_LAST_TSTP", ath5k_hw_reg_read(sc->ah, AR5K_LAST_TSTP)); 213 "AR5K_LAST_TSTP", ath5k_hw_reg_read(ah, AR5K_LAST_TSTP));
215 214
216 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\n\n", 215 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\n\n",
217 "AR5K_BEACON_CNT", ath5k_hw_reg_read(sc->ah, AR5K_BEACON_CNT)); 216 "AR5K_BEACON_CNT", ath5k_hw_reg_read(ah, AR5K_BEACON_CNT));
218 217
219 v = ath5k_hw_reg_read(sc->ah, AR5K_TIMER0); 218 v = ath5k_hw_reg_read(ah, AR5K_TIMER0);
220 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n", 219 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n",
221 "AR5K_TIMER0 (TBTT)", v, v); 220 "AR5K_TIMER0 (TBTT)", v, v);
222 221
223 v = ath5k_hw_reg_read(sc->ah, AR5K_TIMER1); 222 v = ath5k_hw_reg_read(ah, AR5K_TIMER1);
224 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n", 223 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n",
225 "AR5K_TIMER1 (DMA)", v, v >> 3); 224 "AR5K_TIMER1 (DMA)", v, v >> 3);
226 225
227 v = ath5k_hw_reg_read(sc->ah, AR5K_TIMER2); 226 v = ath5k_hw_reg_read(ah, AR5K_TIMER2);
228 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n", 227 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n",
229 "AR5K_TIMER2 (SWBA)", v, v >> 3); 228 "AR5K_TIMER2 (SWBA)", v, v >> 3);
230 229
231 v = ath5k_hw_reg_read(sc->ah, AR5K_TIMER3); 230 v = ath5k_hw_reg_read(ah, AR5K_TIMER3);
232 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n", 231 len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n",
233 "AR5K_TIMER3 (ATIM)", v, v); 232 "AR5K_TIMER3 (ATIM)", v, v);
234 233
235 tsf = ath5k_hw_get_tsf64(sc->ah); 234 tsf = ath5k_hw_get_tsf64(ah);
236 len += snprintf(buf + len, sizeof(buf) - len, 235 len += snprintf(buf + len, sizeof(buf) - len,
237 "TSF\t\t0x%016llx\tTU: %08x\n", 236 "TSF\t\t0x%016llx\tTU: %08x\n",
238 (unsigned long long)tsf, TSF_TO_TU(tsf)); 237 (unsigned long long)tsf, TSF_TO_TU(tsf));
@@ -247,8 +246,7 @@ static ssize_t write_file_beacon(struct file *file,
247 const char __user *userbuf, 246 const char __user *userbuf,
248 size_t count, loff_t *ppos) 247 size_t count, loff_t *ppos)
249{ 248{
250 struct ath5k_softc *sc = file->private_data; 249 struct ath5k_hw *ah = file->private_data;
251 struct ath5k_hw *ah = sc->ah;
252 char buf[20]; 250 char buf[20];
253 251
254 if (copy_from_user(buf, userbuf, min(count, sizeof(buf)))) 252 if (copy_from_user(buf, userbuf, min(count, sizeof(buf))))
@@ -279,9 +277,9 @@ static ssize_t write_file_reset(struct file *file,
279 const char __user *userbuf, 277 const char __user *userbuf,
280 size_t count, loff_t *ppos) 278 size_t count, loff_t *ppos)
281{ 279{
282 struct ath5k_softc *sc = file->private_data; 280 struct ath5k_hw *ah = file->private_data;
283 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "debug file triggered reset\n"); 281 ATH5K_DBG(ah, ATH5K_DEBUG_RESET, "debug file triggered reset\n");
284 ieee80211_queue_work(sc->hw, &sc->reset_work); 282 ieee80211_queue_work(ah->hw, &ah->reset_work);
285 return count; 283 return count;
286} 284}
287 285
@@ -318,23 +316,23 @@ static const struct {
318static ssize_t read_file_debug(struct file *file, char __user *user_buf, 316static ssize_t read_file_debug(struct file *file, char __user *user_buf,
319 size_t count, loff_t *ppos) 317 size_t count, loff_t *ppos)
320{ 318{
321 struct ath5k_softc *sc = file->private_data; 319 struct ath5k_hw *ah = file->private_data;
322 char buf[700]; 320 char buf[700];
323 unsigned int len = 0; 321 unsigned int len = 0;
324 unsigned int i; 322 unsigned int i;
325 323
326 len += snprintf(buf + len, sizeof(buf) - len, 324 len += snprintf(buf + len, sizeof(buf) - len,
327 "DEBUG LEVEL: 0x%08x\n\n", sc->debug.level); 325 "DEBUG LEVEL: 0x%08x\n\n", ah->debug.level);
328 326
329 for (i = 0; i < ARRAY_SIZE(dbg_info) - 1; i++) { 327 for (i = 0; i < ARRAY_SIZE(dbg_info) - 1; i++) {
330 len += snprintf(buf + len, sizeof(buf) - len, 328 len += snprintf(buf + len, sizeof(buf) - len,
331 "%10s %c 0x%08x - %s\n", dbg_info[i].name, 329 "%10s %c 0x%08x - %s\n", dbg_info[i].name,
332 sc->debug.level & dbg_info[i].level ? '+' : ' ', 330 ah->debug.level & dbg_info[i].level ? '+' : ' ',
333 dbg_info[i].level, dbg_info[i].desc); 331 dbg_info[i].level, dbg_info[i].desc);
334 } 332 }
335 len += snprintf(buf + len, sizeof(buf) - len, 333 len += snprintf(buf + len, sizeof(buf) - len,
336 "%10s %c 0x%08x - %s\n", dbg_info[i].name, 334 "%10s %c 0x%08x - %s\n", dbg_info[i].name,
337 sc->debug.level == dbg_info[i].level ? '+' : ' ', 335 ah->debug.level == dbg_info[i].level ? '+' : ' ',
338 dbg_info[i].level, dbg_info[i].desc); 336 dbg_info[i].level, dbg_info[i].desc);
339 337
340 if (len > sizeof(buf)) 338 if (len > sizeof(buf))
@@ -347,7 +345,7 @@ static ssize_t write_file_debug(struct file *file,
347 const char __user *userbuf, 345 const char __user *userbuf,
348 size_t count, loff_t *ppos) 346 size_t count, loff_t *ppos)
349{ 347{
350 struct ath5k_softc *sc = file->private_data; 348 struct ath5k_hw *ah = file->private_data;
351 unsigned int i; 349 unsigned int i;
352 char buf[20]; 350 char buf[20];
353 351
@@ -357,7 +355,7 @@ static ssize_t write_file_debug(struct file *file,
357 for (i = 0; i < ARRAY_SIZE(dbg_info); i++) { 355 for (i = 0; i < ARRAY_SIZE(dbg_info); i++) {
358 if (strncmp(buf, dbg_info[i].name, 356 if (strncmp(buf, dbg_info[i].name,
359 strlen(dbg_info[i].name)) == 0) { 357 strlen(dbg_info[i].name)) == 0) {
360 sc->debug.level ^= dbg_info[i].level; /* toggle bit */ 358 ah->debug.level ^= dbg_info[i].level; /* toggle bit */
361 break; 359 break;
362 } 360 }
363 } 361 }
@@ -378,33 +376,33 @@ static const struct file_operations fops_debug = {
378static ssize_t read_file_antenna(struct file *file, char __user *user_buf, 376static ssize_t read_file_antenna(struct file *file, char __user *user_buf,
379 size_t count, loff_t *ppos) 377 size_t count, loff_t *ppos)
380{ 378{
381 struct ath5k_softc *sc = file->private_data; 379 struct ath5k_hw *ah = file->private_data;
382 char buf[700]; 380 char buf[700];
383 unsigned int len = 0; 381 unsigned int len = 0;
384 unsigned int i; 382 unsigned int i;
385 unsigned int v; 383 unsigned int v;
386 384
387 len += snprintf(buf + len, sizeof(buf) - len, "antenna mode\t%d\n", 385 len += snprintf(buf + len, sizeof(buf) - len, "antenna mode\t%d\n",
388 sc->ah->ah_ant_mode); 386 ah->ah_ant_mode);
389 len += snprintf(buf + len, sizeof(buf) - len, "default antenna\t%d\n", 387 len += snprintf(buf + len, sizeof(buf) - len, "default antenna\t%d\n",
390 sc->ah->ah_def_ant); 388 ah->ah_def_ant);
391 len += snprintf(buf + len, sizeof(buf) - len, "tx antenna\t%d\n", 389 len += snprintf(buf + len, sizeof(buf) - len, "tx antenna\t%d\n",
392 sc->ah->ah_tx_ant); 390 ah->ah_tx_ant);
393 391
394 len += snprintf(buf + len, sizeof(buf) - len, "\nANTENNA\t\tRX\tTX\n"); 392 len += snprintf(buf + len, sizeof(buf) - len, "\nANTENNA\t\tRX\tTX\n");
395 for (i = 1; i < ARRAY_SIZE(sc->stats.antenna_rx); i++) { 393 for (i = 1; i < ARRAY_SIZE(ah->stats.antenna_rx); i++) {
396 len += snprintf(buf + len, sizeof(buf) - len, 394 len += snprintf(buf + len, sizeof(buf) - len,
397 "[antenna %d]\t%d\t%d\n", 395 "[antenna %d]\t%d\t%d\n",
398 i, sc->stats.antenna_rx[i], sc->stats.antenna_tx[i]); 396 i, ah->stats.antenna_rx[i], ah->stats.antenna_tx[i]);
399 } 397 }
400 len += snprintf(buf + len, sizeof(buf) - len, "[invalid]\t%d\t%d\n", 398 len += snprintf(buf + len, sizeof(buf) - len, "[invalid]\t%d\t%d\n",
401 sc->stats.antenna_rx[0], sc->stats.antenna_tx[0]); 399 ah->stats.antenna_rx[0], ah->stats.antenna_tx[0]);
402 400
403 v = ath5k_hw_reg_read(sc->ah, AR5K_DEFAULT_ANTENNA); 401 v = ath5k_hw_reg_read(ah, AR5K_DEFAULT_ANTENNA);
404 len += snprintf(buf + len, sizeof(buf) - len, 402 len += snprintf(buf + len, sizeof(buf) - len,
405 "\nAR5K_DEFAULT_ANTENNA\t0x%08x\n", v); 403 "\nAR5K_DEFAULT_ANTENNA\t0x%08x\n", v);
406 404
407 v = ath5k_hw_reg_read(sc->ah, AR5K_STA_ID1); 405 v = ath5k_hw_reg_read(ah, AR5K_STA_ID1);
408 len += snprintf(buf + len, sizeof(buf) - len, 406 len += snprintf(buf + len, sizeof(buf) - len,
409 "AR5K_STA_ID1_DEFAULT_ANTENNA\t%d\n", 407 "AR5K_STA_ID1_DEFAULT_ANTENNA\t%d\n",
410 (v & AR5K_STA_ID1_DEFAULT_ANTENNA) != 0); 408 (v & AR5K_STA_ID1_DEFAULT_ANTENNA) != 0);
@@ -418,25 +416,25 @@ static ssize_t read_file_antenna(struct file *file, char __user *user_buf,
418 "AR5K_STA_ID1_SELFGEN_DEF_ANT\t%d\n", 416 "AR5K_STA_ID1_SELFGEN_DEF_ANT\t%d\n",
419 (v & AR5K_STA_ID1_SELFGEN_DEF_ANT) != 0); 417 (v & AR5K_STA_ID1_SELFGEN_DEF_ANT) != 0);
420 418
421 v = ath5k_hw_reg_read(sc->ah, AR5K_PHY_AGCCTL); 419 v = ath5k_hw_reg_read(ah, AR5K_PHY_AGCCTL);
422 len += snprintf(buf + len, sizeof(buf) - len, 420 len += snprintf(buf + len, sizeof(buf) - len,
423 "\nAR5K_PHY_AGCCTL_OFDM_DIV_DIS\t%d\n", 421 "\nAR5K_PHY_AGCCTL_OFDM_DIV_DIS\t%d\n",
424 (v & AR5K_PHY_AGCCTL_OFDM_DIV_DIS) != 0); 422 (v & AR5K_PHY_AGCCTL_OFDM_DIV_DIS) != 0);
425 423
426 v = ath5k_hw_reg_read(sc->ah, AR5K_PHY_RESTART); 424 v = ath5k_hw_reg_read(ah, AR5K_PHY_RESTART);
427 len += snprintf(buf + len, sizeof(buf) - len, 425 len += snprintf(buf + len, sizeof(buf) - len,
428 "AR5K_PHY_RESTART_DIV_GC\t\t%x\n", 426 "AR5K_PHY_RESTART_DIV_GC\t\t%x\n",
429 (v & AR5K_PHY_RESTART_DIV_GC) >> AR5K_PHY_RESTART_DIV_GC_S); 427 (v & AR5K_PHY_RESTART_DIV_GC) >> AR5K_PHY_RESTART_DIV_GC_S);
430 428
431 v = ath5k_hw_reg_read(sc->ah, AR5K_PHY_FAST_ANT_DIV); 429 v = ath5k_hw_reg_read(ah, AR5K_PHY_FAST_ANT_DIV);
432 len += snprintf(buf + len, sizeof(buf) - len, 430 len += snprintf(buf + len, sizeof(buf) - len,
433 "AR5K_PHY_FAST_ANT_DIV_EN\t%d\n", 431 "AR5K_PHY_FAST_ANT_DIV_EN\t%d\n",
434 (v & AR5K_PHY_FAST_ANT_DIV_EN) != 0); 432 (v & AR5K_PHY_FAST_ANT_DIV_EN) != 0);
435 433
436 v = ath5k_hw_reg_read(sc->ah, AR5K_PHY_ANT_SWITCH_TABLE_0); 434 v = ath5k_hw_reg_read(ah, AR5K_PHY_ANT_SWITCH_TABLE_0);
437 len += snprintf(buf + len, sizeof(buf) - len, 435 len += snprintf(buf + len, sizeof(buf) - len,
438 "\nAR5K_PHY_ANT_SWITCH_TABLE_0\t0x%08x\n", v); 436 "\nAR5K_PHY_ANT_SWITCH_TABLE_0\t0x%08x\n", v);
439 v = ath5k_hw_reg_read(sc->ah, AR5K_PHY_ANT_SWITCH_TABLE_1); 437 v = ath5k_hw_reg_read(ah, AR5K_PHY_ANT_SWITCH_TABLE_1);
440 len += snprintf(buf + len, sizeof(buf) - len, 438 len += snprintf(buf + len, sizeof(buf) - len,
441 "AR5K_PHY_ANT_SWITCH_TABLE_1\t0x%08x\n", v); 439 "AR5K_PHY_ANT_SWITCH_TABLE_1\t0x%08x\n", v);
442 440
@@ -450,7 +448,7 @@ static ssize_t write_file_antenna(struct file *file,
450 const char __user *userbuf, 448 const char __user *userbuf,
451 size_t count, loff_t *ppos) 449 size_t count, loff_t *ppos)
452{ 450{
453 struct ath5k_softc *sc = file->private_data; 451 struct ath5k_hw *ah = file->private_data;
454 unsigned int i; 452 unsigned int i;
455 char buf[20]; 453 char buf[20];
456 454
@@ -458,18 +456,18 @@ static ssize_t write_file_antenna(struct file *file,
458 return -EFAULT; 456 return -EFAULT;
459 457
460 if (strncmp(buf, "diversity", 9) == 0) { 458 if (strncmp(buf, "diversity", 9) == 0) {
461 ath5k_hw_set_antenna_mode(sc->ah, AR5K_ANTMODE_DEFAULT); 459 ath5k_hw_set_antenna_mode(ah, AR5K_ANTMODE_DEFAULT);
462 printk(KERN_INFO "ath5k debug: enable diversity\n"); 460 printk(KERN_INFO "ath5k debug: enable diversity\n");
463 } else if (strncmp(buf, "fixed-a", 7) == 0) { 461 } else if (strncmp(buf, "fixed-a", 7) == 0) {
464 ath5k_hw_set_antenna_mode(sc->ah, AR5K_ANTMODE_FIXED_A); 462 ath5k_hw_set_antenna_mode(ah, AR5K_ANTMODE_FIXED_A);
465 printk(KERN_INFO "ath5k debugfs: fixed antenna A\n"); 463 printk(KERN_INFO "ath5k debugfs: fixed antenna A\n");
466 } else if (strncmp(buf, "fixed-b", 7) == 0) { 464 } else if (strncmp(buf, "fixed-b", 7) == 0) {
467 ath5k_hw_set_antenna_mode(sc->ah, AR5K_ANTMODE_FIXED_B); 465 ath5k_hw_set_antenna_mode(ah, AR5K_ANTMODE_FIXED_B);
468 printk(KERN_INFO "ath5k debug: fixed antenna B\n"); 466 printk(KERN_INFO "ath5k debug: fixed antenna B\n");
469 } else if (strncmp(buf, "clear", 5) == 0) { 467 } else if (strncmp(buf, "clear", 5) == 0) {
470 for (i = 0; i < ARRAY_SIZE(sc->stats.antenna_rx); i++) { 468 for (i = 0; i < ARRAY_SIZE(ah->stats.antenna_rx); i++) {
471 sc->stats.antenna_rx[i] = 0; 469 ah->stats.antenna_rx[i] = 0;
472 sc->stats.antenna_tx[i] = 0; 470 ah->stats.antenna_tx[i] = 0;
473 } 471 }
474 printk(KERN_INFO "ath5k debug: cleared antenna stats\n"); 472 printk(KERN_INFO "ath5k debug: cleared antenna stats\n");
475 } 473 }
@@ -489,13 +487,13 @@ static const struct file_operations fops_antenna = {
489static ssize_t read_file_misc(struct file *file, char __user *user_buf, 487static ssize_t read_file_misc(struct file *file, char __user *user_buf,
490 size_t count, loff_t *ppos) 488 size_t count, loff_t *ppos)
491{ 489{
492 struct ath5k_softc *sc = file->private_data; 490 struct ath5k_hw *ah = file->private_data;
493 char buf[700]; 491 char buf[700];
494 unsigned int len = 0; 492 unsigned int len = 0;
495 u32 filt = ath5k_hw_get_rx_filter(sc->ah); 493 u32 filt = ath5k_hw_get_rx_filter(ah);
496 494
497 len += snprintf(buf + len, sizeof(buf) - len, "bssid-mask: %pM\n", 495 len += snprintf(buf + len, sizeof(buf) - len, "bssid-mask: %pM\n",
498 sc->bssidmask); 496 ah->bssidmask);
499 len += snprintf(buf + len, sizeof(buf) - len, "filter-flags: 0x%x ", 497 len += snprintf(buf + len, sizeof(buf) - len, "filter-flags: 0x%x ",
500 filt); 498 filt);
501 if (filt & AR5K_RX_FILTER_UCAST) 499 if (filt & AR5K_RX_FILTER_UCAST)
@@ -524,7 +522,7 @@ static ssize_t read_file_misc(struct file *file, char __user *user_buf,
524 len += snprintf(buf + len, sizeof(buf) - len, " RADARERR-5211"); 522 len += snprintf(buf + len, sizeof(buf) - len, " RADARERR-5211");
525 523
526 len += snprintf(buf + len, sizeof(buf) - len, "\nopmode: %s (%d)\n", 524 len += snprintf(buf + len, sizeof(buf) - len, "\nopmode: %s (%d)\n",
527 ath_opmode_to_string(sc->opmode), sc->opmode); 525 ath_opmode_to_string(ah->opmode), ah->opmode);
528 526
529 if (len > sizeof(buf)) 527 if (len > sizeof(buf))
530 len = sizeof(buf); 528 len = sizeof(buf);
@@ -544,8 +542,8 @@ static const struct file_operations fops_misc = {
544static ssize_t read_file_frameerrors(struct file *file, char __user *user_buf, 542static ssize_t read_file_frameerrors(struct file *file, char __user *user_buf,
545 size_t count, loff_t *ppos) 543 size_t count, loff_t *ppos)
546{ 544{
547 struct ath5k_softc *sc = file->private_data; 545 struct ath5k_hw *ah = file->private_data;
548 struct ath5k_statistics *st = &sc->stats; 546 struct ath5k_statistics *st = &ah->stats;
549 char buf[700]; 547 char buf[700];
550 unsigned int len = 0; 548 unsigned int len = 0;
551 int i; 549 int i;
@@ -621,8 +619,8 @@ static ssize_t write_file_frameerrors(struct file *file,
621 const char __user *userbuf, 619 const char __user *userbuf,
622 size_t count, loff_t *ppos) 620 size_t count, loff_t *ppos)
623{ 621{
624 struct ath5k_softc *sc = file->private_data; 622 struct ath5k_hw *ah = file->private_data;
625 struct ath5k_statistics *st = &sc->stats; 623 struct ath5k_statistics *st = &ah->stats;
626 char buf[20]; 624 char buf[20];
627 625
628 if (copy_from_user(buf, userbuf, min(count, sizeof(buf)))) 626 if (copy_from_user(buf, userbuf, min(count, sizeof(buf))))
@@ -660,16 +658,16 @@ static const struct file_operations fops_frameerrors = {
660static ssize_t read_file_ani(struct file *file, char __user *user_buf, 658static ssize_t read_file_ani(struct file *file, char __user *user_buf,
661 size_t count, loff_t *ppos) 659 size_t count, loff_t *ppos)
662{ 660{
663 struct ath5k_softc *sc = file->private_data; 661 struct ath5k_hw *ah = file->private_data;
664 struct ath5k_statistics *st = &sc->stats; 662 struct ath5k_statistics *st = &ah->stats;
665 struct ath5k_ani_state *as = &sc->ani_state; 663 struct ath5k_ani_state *as = &ah->ani_state;
666 664
667 char buf[700]; 665 char buf[700];
668 unsigned int len = 0; 666 unsigned int len = 0;
669 667
670 len += snprintf(buf + len, sizeof(buf) - len, 668 len += snprintf(buf + len, sizeof(buf) - len,
671 "HW has PHY error counters:\t%s\n", 669 "HW has PHY error counters:\t%s\n",
672 sc->ah->ah_capabilities.cap_has_phyerr_counters ? 670 ah->ah_capabilities.cap_has_phyerr_counters ?
673 "yes" : "no"); 671 "yes" : "no");
674 len += snprintf(buf + len, sizeof(buf) - len, 672 len += snprintf(buf + len, sizeof(buf) - len,
675 "HW max spur immunity level:\t%d\n", 673 "HW max spur immunity level:\t%d\n",
@@ -718,7 +716,7 @@ static ssize_t read_file_ani(struct file *file, char __user *user_buf,
718 st->mib_intr); 716 st->mib_intr);
719 len += snprintf(buf + len, sizeof(buf) - len, 717 len += snprintf(buf + len, sizeof(buf) - len,
720 "beacon RSSI average:\t%d\n", 718 "beacon RSSI average:\t%d\n",
721 (int)ewma_read(&sc->ah->ah_beacon_rssi_avg)); 719 (int)ewma_read(&ah->ah_beacon_rssi_avg));
722 720
723#define CC_PRINT(_struct, _field) \ 721#define CC_PRINT(_struct, _field) \
724 _struct._field, \ 722 _struct._field, \
@@ -750,14 +748,14 @@ static ssize_t read_file_ani(struct file *file, char __user *user_buf,
750 as->sum_cck_errors); 748 as->sum_cck_errors);
751 len += snprintf(buf + len, sizeof(buf) - len, 749 len += snprintf(buf + len, sizeof(buf) - len,
752 "AR5K_PHYERR_CNT1\t%x\t(=%d)\n", 750 "AR5K_PHYERR_CNT1\t%x\t(=%d)\n",
753 ath5k_hw_reg_read(sc->ah, AR5K_PHYERR_CNT1), 751 ath5k_hw_reg_read(ah, AR5K_PHYERR_CNT1),
754 ATH5K_ANI_OFDM_TRIG_HIGH - (ATH5K_PHYERR_CNT_MAX - 752 ATH5K_ANI_OFDM_TRIG_HIGH - (ATH5K_PHYERR_CNT_MAX -
755 ath5k_hw_reg_read(sc->ah, AR5K_PHYERR_CNT1))); 753 ath5k_hw_reg_read(ah, AR5K_PHYERR_CNT1)));
756 len += snprintf(buf + len, sizeof(buf) - len, 754 len += snprintf(buf + len, sizeof(buf) - len,
757 "AR5K_PHYERR_CNT2\t%x\t(=%d)\n", 755 "AR5K_PHYERR_CNT2\t%x\t(=%d)\n",
758 ath5k_hw_reg_read(sc->ah, AR5K_PHYERR_CNT2), 756 ath5k_hw_reg_read(ah, AR5K_PHYERR_CNT2),
759 ATH5K_ANI_CCK_TRIG_HIGH - (ATH5K_PHYERR_CNT_MAX - 757 ATH5K_ANI_CCK_TRIG_HIGH - (ATH5K_PHYERR_CNT_MAX -
760 ath5k_hw_reg_read(sc->ah, AR5K_PHYERR_CNT2))); 758 ath5k_hw_reg_read(ah, AR5K_PHYERR_CNT2)));
761 759
762 if (len > sizeof(buf)) 760 if (len > sizeof(buf))
763 len = sizeof(buf); 761 len = sizeof(buf);
@@ -769,42 +767,42 @@ static ssize_t write_file_ani(struct file *file,
769 const char __user *userbuf, 767 const char __user *userbuf,
770 size_t count, loff_t *ppos) 768 size_t count, loff_t *ppos)
771{ 769{
772 struct ath5k_softc *sc = file->private_data; 770 struct ath5k_hw *ah = file->private_data;
773 char buf[20]; 771 char buf[20];
774 772
775 if (copy_from_user(buf, userbuf, min(count, sizeof(buf)))) 773 if (copy_from_user(buf, userbuf, min(count, sizeof(buf))))
776 return -EFAULT; 774 return -EFAULT;
777 775
778 if (strncmp(buf, "sens-low", 8) == 0) { 776 if (strncmp(buf, "sens-low", 8) == 0) {
779 ath5k_ani_init(sc->ah, ATH5K_ANI_MODE_MANUAL_HIGH); 777 ath5k_ani_init(ah, ATH5K_ANI_MODE_MANUAL_HIGH);
780 } else if (strncmp(buf, "sens-high", 9) == 0) { 778 } else if (strncmp(buf, "sens-high", 9) == 0) {
781 ath5k_ani_init(sc->ah, ATH5K_ANI_MODE_MANUAL_LOW); 779 ath5k_ani_init(ah, ATH5K_ANI_MODE_MANUAL_LOW);
782 } else if (strncmp(buf, "ani-off", 7) == 0) { 780 } else if (strncmp(buf, "ani-off", 7) == 0) {
783 ath5k_ani_init(sc->ah, ATH5K_ANI_MODE_OFF); 781 ath5k_ani_init(ah, ATH5K_ANI_MODE_OFF);
784 } else if (strncmp(buf, "ani-on", 6) == 0) { 782 } else if (strncmp(buf, "ani-on", 6) == 0) {
785 ath5k_ani_init(sc->ah, ATH5K_ANI_MODE_AUTO); 783 ath5k_ani_init(ah, ATH5K_ANI_MODE_AUTO);
786 } else if (strncmp(buf, "noise-low", 9) == 0) { 784 } else if (strncmp(buf, "noise-low", 9) == 0) {
787 ath5k_ani_set_noise_immunity_level(sc->ah, 0); 785 ath5k_ani_set_noise_immunity_level(ah, 0);
788 } else if (strncmp(buf, "noise-high", 10) == 0) { 786 } else if (strncmp(buf, "noise-high", 10) == 0) {
789 ath5k_ani_set_noise_immunity_level(sc->ah, 787 ath5k_ani_set_noise_immunity_level(ah,
790 ATH5K_ANI_MAX_NOISE_IMM_LVL); 788 ATH5K_ANI_MAX_NOISE_IMM_LVL);
791 } else if (strncmp(buf, "spur-low", 8) == 0) { 789 } else if (strncmp(buf, "spur-low", 8) == 0) {
792 ath5k_ani_set_spur_immunity_level(sc->ah, 0); 790 ath5k_ani_set_spur_immunity_level(ah, 0);
793 } else if (strncmp(buf, "spur-high", 9) == 0) { 791 } else if (strncmp(buf, "spur-high", 9) == 0) {
794 ath5k_ani_set_spur_immunity_level(sc->ah, 792 ath5k_ani_set_spur_immunity_level(ah,
795 sc->ani_state.max_spur_level); 793 ah->ani_state.max_spur_level);
796 } else if (strncmp(buf, "fir-low", 7) == 0) { 794 } else if (strncmp(buf, "fir-low", 7) == 0) {
797 ath5k_ani_set_firstep_level(sc->ah, 0); 795 ath5k_ani_set_firstep_level(ah, 0);
798 } else if (strncmp(buf, "fir-high", 8) == 0) { 796 } else if (strncmp(buf, "fir-high", 8) == 0) {
799 ath5k_ani_set_firstep_level(sc->ah, ATH5K_ANI_MAX_FIRSTEP_LVL); 797 ath5k_ani_set_firstep_level(ah, ATH5K_ANI_MAX_FIRSTEP_LVL);
800 } else if (strncmp(buf, "ofdm-off", 8) == 0) { 798 } else if (strncmp(buf, "ofdm-off", 8) == 0) {
801 ath5k_ani_set_ofdm_weak_signal_detection(sc->ah, false); 799 ath5k_ani_set_ofdm_weak_signal_detection(ah, false);
802 } else if (strncmp(buf, "ofdm-on", 7) == 0) { 800 } else if (strncmp(buf, "ofdm-on", 7) == 0) {
803 ath5k_ani_set_ofdm_weak_signal_detection(sc->ah, true); 801 ath5k_ani_set_ofdm_weak_signal_detection(ah, true);
804 } else if (strncmp(buf, "cck-off", 7) == 0) { 802 } else if (strncmp(buf, "cck-off", 7) == 0) {
805 ath5k_ani_set_cck_weak_signal_detection(sc->ah, false); 803 ath5k_ani_set_cck_weak_signal_detection(ah, false);
806 } else if (strncmp(buf, "cck-on", 6) == 0) { 804 } else if (strncmp(buf, "cck-on", 6) == 0) {
807 ath5k_ani_set_cck_weak_signal_detection(sc->ah, true); 805 ath5k_ani_set_cck_weak_signal_detection(ah, true);
808 } 806 }
809 return count; 807 return count;
810} 808}
@@ -823,7 +821,7 @@ static const struct file_operations fops_ani = {
823static ssize_t read_file_queue(struct file *file, char __user *user_buf, 821static ssize_t read_file_queue(struct file *file, char __user *user_buf,
824 size_t count, loff_t *ppos) 822 size_t count, loff_t *ppos)
825{ 823{
826 struct ath5k_softc *sc = file->private_data; 824 struct ath5k_hw *ah = file->private_data;
827 char buf[700]; 825 char buf[700];
828 unsigned int len = 0; 826 unsigned int len = 0;
829 827
@@ -832,10 +830,10 @@ static ssize_t read_file_queue(struct file *file, char __user *user_buf,
832 int i, n; 830 int i, n;
833 831
834 len += snprintf(buf + len, sizeof(buf) - len, 832 len += snprintf(buf + len, sizeof(buf) - len,
835 "available txbuffers: %d\n", sc->txbuf_len); 833 "available txbuffers: %d\n", ah->txbuf_len);
836 834
837 for (i = 0; i < ARRAY_SIZE(sc->txqs); i++) { 835 for (i = 0; i < ARRAY_SIZE(ah->txqs); i++) {
838 txq = &sc->txqs[i]; 836 txq = &ah->txqs[i];
839 837
840 len += snprintf(buf + len, sizeof(buf) - len, 838 len += snprintf(buf + len, sizeof(buf) - len,
841 "%02d: %ssetup\n", i, txq->setup ? "" : "not "); 839 "%02d: %ssetup\n", i, txq->setup ? "" : "not ");
@@ -865,16 +863,16 @@ static ssize_t write_file_queue(struct file *file,
865 const char __user *userbuf, 863 const char __user *userbuf,
866 size_t count, loff_t *ppos) 864 size_t count, loff_t *ppos)
867{ 865{
868 struct ath5k_softc *sc = file->private_data; 866 struct ath5k_hw *ah = file->private_data;
869 char buf[20]; 867 char buf[20];
870 868
871 if (copy_from_user(buf, userbuf, min(count, sizeof(buf)))) 869 if (copy_from_user(buf, userbuf, min(count, sizeof(buf))))
872 return -EFAULT; 870 return -EFAULT;
873 871
874 if (strncmp(buf, "start", 5) == 0) 872 if (strncmp(buf, "start", 5) == 0)
875 ieee80211_wake_queues(sc->hw); 873 ieee80211_wake_queues(ah->hw);
876 else if (strncmp(buf, "stop", 4) == 0) 874 else if (strncmp(buf, "stop", 4) == 0)
877 ieee80211_stop_queues(sc->hw); 875 ieee80211_stop_queues(ah->hw);
878 876
879 return count; 877 return count;
880} 878}
@@ -890,57 +888,57 @@ static const struct file_operations fops_queue = {
890 888
891 889
892void 890void
893ath5k_debug_init_device(struct ath5k_softc *sc) 891ath5k_debug_init_device(struct ath5k_hw *ah)
894{ 892{
895 struct dentry *phydir; 893 struct dentry *phydir;
896 894
897 sc->debug.level = ath5k_debug; 895 ah->debug.level = ath5k_debug;
898 896
899 phydir = debugfs_create_dir("ath5k", sc->hw->wiphy->debugfsdir); 897 phydir = debugfs_create_dir("ath5k", ah->hw->wiphy->debugfsdir);
900 if (!phydir) 898 if (!phydir)
901 return; 899 return;
902 900
903 debugfs_create_file("debug", S_IWUSR | S_IRUSR, phydir, sc, 901 debugfs_create_file("debug", S_IWUSR | S_IRUSR, phydir, ah,
904 &fops_debug); 902 &fops_debug);
905 903
906 debugfs_create_file("registers", S_IRUSR, phydir, sc, &fops_registers); 904 debugfs_create_file("registers", S_IRUSR, phydir, ah, &fops_registers);
907 905
908 debugfs_create_file("beacon", S_IWUSR | S_IRUSR, phydir, sc, 906 debugfs_create_file("beacon", S_IWUSR | S_IRUSR, phydir, ah,
909 &fops_beacon); 907 &fops_beacon);
910 908
911 debugfs_create_file("reset", S_IWUSR, phydir, sc, &fops_reset); 909 debugfs_create_file("reset", S_IWUSR, phydir, ah, &fops_reset);
912 910
913 debugfs_create_file("antenna", S_IWUSR | S_IRUSR, phydir, sc, 911 debugfs_create_file("antenna", S_IWUSR | S_IRUSR, phydir, ah,
914 &fops_antenna); 912 &fops_antenna);
915 913
916 debugfs_create_file("misc", S_IRUSR, phydir, sc, &fops_misc); 914 debugfs_create_file("misc", S_IRUSR, phydir, ah, &fops_misc);
917 915
918 debugfs_create_file("frameerrors", S_IWUSR | S_IRUSR, phydir, sc, 916 debugfs_create_file("frameerrors", S_IWUSR | S_IRUSR, phydir, ah,
919 &fops_frameerrors); 917 &fops_frameerrors);
920 918
921 debugfs_create_file("ani", S_IWUSR | S_IRUSR, phydir, sc, &fops_ani); 919 debugfs_create_file("ani", S_IWUSR | S_IRUSR, phydir, ah, &fops_ani);
922 920
923 debugfs_create_file("queue", S_IWUSR | S_IRUSR, phydir, sc, 921 debugfs_create_file("queue", S_IWUSR | S_IRUSR, phydir, ah,
924 &fops_queue); 922 &fops_queue);
925 923
926 debugfs_create_bool("32khz_clock", S_IWUSR | S_IRUSR, phydir, 924 debugfs_create_bool("32khz_clock", S_IWUSR | S_IRUSR, phydir,
927 &sc->ah->ah_use_32khz_clock); 925 &ah->ah_use_32khz_clock);
928} 926}
929 927
930/* functions used in other places */ 928/* functions used in other places */
931 929
932void 930void
933ath5k_debug_dump_bands(struct ath5k_softc *sc) 931ath5k_debug_dump_bands(struct ath5k_hw *ah)
934{ 932{
935 unsigned int b, i; 933 unsigned int b, i;
936 934
937 if (likely(!(sc->debug.level & ATH5K_DEBUG_DUMPBANDS))) 935 if (likely(!(ah->debug.level & ATH5K_DEBUG_DUMPBANDS)))
938 return; 936 return;
939 937
940 BUG_ON(!sc->sbands); 938 BUG_ON(!ah->sbands);
941 939
942 for (b = 0; b < IEEE80211_NUM_BANDS; b++) { 940 for (b = 0; b < IEEE80211_NUM_BANDS; b++) {
943 struct ieee80211_supported_band *band = &sc->sbands[b]; 941 struct ieee80211_supported_band *band = &ah->sbands[b];
944 char bname[6]; 942 char bname[6];
945 switch (band->band) { 943 switch (band->band) {
946 case IEEE80211_BAND_2GHZ: 944 case IEEE80211_BAND_2GHZ:
@@ -990,41 +988,41 @@ ath5k_debug_printrxbuf(struct ath5k_buf *bf, int done,
990} 988}
991 989
992void 990void
993ath5k_debug_printrxbuffs(struct ath5k_softc *sc, struct ath5k_hw *ah) 991ath5k_debug_printrxbuffs(struct ath5k_hw *ah)
994{ 992{
995 struct ath5k_desc *ds; 993 struct ath5k_desc *ds;
996 struct ath5k_buf *bf; 994 struct ath5k_buf *bf;
997 struct ath5k_rx_status rs = {}; 995 struct ath5k_rx_status rs = {};
998 int status; 996 int status;
999 997
1000 if (likely(!(sc->debug.level & ATH5K_DEBUG_DESC))) 998 if (likely(!(ah->debug.level & ATH5K_DEBUG_DESC)))
1001 return; 999 return;
1002 1000
1003 printk(KERN_DEBUG "rxdp %x, rxlink %p\n", 1001 printk(KERN_DEBUG "rxdp %x, rxlink %p\n",
1004 ath5k_hw_get_rxdp(ah), sc->rxlink); 1002 ath5k_hw_get_rxdp(ah), ah->rxlink);
1005 1003
1006 spin_lock_bh(&sc->rxbuflock); 1004 spin_lock_bh(&ah->rxbuflock);
1007 list_for_each_entry(bf, &sc->rxbuf, list) { 1005 list_for_each_entry(bf, &ah->rxbuf, list) {
1008 ds = bf->desc; 1006 ds = bf->desc;
1009 status = ah->ah_proc_rx_desc(ah, ds, &rs); 1007 status = ah->ah_proc_rx_desc(ah, ds, &rs);
1010 if (!status) 1008 if (!status)
1011 ath5k_debug_printrxbuf(bf, status == 0, &rs); 1009 ath5k_debug_printrxbuf(bf, status == 0, &rs);
1012 } 1010 }
1013 spin_unlock_bh(&sc->rxbuflock); 1011 spin_unlock_bh(&ah->rxbuflock);
1014} 1012}
1015 1013
1016void 1014void
1017ath5k_debug_printtxbuf(struct ath5k_softc *sc, struct ath5k_buf *bf) 1015ath5k_debug_printtxbuf(struct ath5k_hw *ah, struct ath5k_buf *bf)
1018{ 1016{
1019 struct ath5k_desc *ds = bf->desc; 1017 struct ath5k_desc *ds = bf->desc;
1020 struct ath5k_hw_5212_tx_desc *td = &ds->ud.ds_tx5212; 1018 struct ath5k_hw_5212_tx_desc *td = &ds->ud.ds_tx5212;
1021 struct ath5k_tx_status ts = {}; 1019 struct ath5k_tx_status ts = {};
1022 int done; 1020 int done;
1023 1021
1024 if (likely(!(sc->debug.level & ATH5K_DEBUG_DESC))) 1022 if (likely(!(ah->debug.level & ATH5K_DEBUG_DESC)))
1025 return; 1023 return;
1026 1024
1027 done = sc->ah->ah_proc_tx_desc(sc->ah, bf->desc, &ts); 1025 done = ah->ah_proc_tx_desc(ah, bf->desc, &ts);
1028 1026
1029 printk(KERN_DEBUG "T (%p %llx) %08x %08x %08x %08x %08x %08x %08x " 1027 printk(KERN_DEBUG "T (%p %llx) %08x %08x %08x %08x %08x %08x %08x "
1030 "%08x %c\n", ds, (unsigned long long)bf->daddr, ds->ds_link, 1028 "%08x %c\n", ds, (unsigned long long)bf->daddr, ds->ds_link,
diff --git a/drivers/net/wireless/ath/ath5k/debug.h b/drivers/net/wireless/ath/ath5k/debug.h
index 193dd2d4ea3c..7f37df3125fd 100644
--- a/drivers/net/wireless/ath/ath5k/debug.h
+++ b/drivers/net/wireless/ath/ath5k/debug.h
@@ -61,7 +61,6 @@
61#ifndef _ATH5K_DEBUG_H 61#ifndef _ATH5K_DEBUG_H
62#define _ATH5K_DEBUG_H 62#define _ATH5K_DEBUG_H
63 63
64struct ath5k_softc;
65struct ath5k_hw; 64struct ath5k_hw;
66struct sk_buff; 65struct sk_buff;
67struct ath5k_buf; 66struct ath5k_buf;
@@ -127,39 +126,39 @@ enum ath5k_debug_level {
127 } while (0) 126 } while (0)
128 127
129void 128void
130ath5k_debug_init_device(struct ath5k_softc *sc); 129ath5k_debug_init_device(struct ath5k_hw *ah);
131 130
132void 131void
133ath5k_debug_printrxbuffs(struct ath5k_softc *sc, struct ath5k_hw *ah); 132ath5k_debug_printrxbuffs(struct ath5k_hw *ah);
134 133
135void 134void
136ath5k_debug_dump_bands(struct ath5k_softc *sc); 135ath5k_debug_dump_bands(struct ath5k_hw *ah);
137 136
138void 137void
139ath5k_debug_printtxbuf(struct ath5k_softc *sc, struct ath5k_buf *bf); 138ath5k_debug_printtxbuf(struct ath5k_hw *ah, struct ath5k_buf *bf);
140 139
141#else /* no debugging */ 140#else /* no debugging */
142 141
143#include <linux/compiler.h> 142#include <linux/compiler.h>
144 143
145static inline void __attribute__ ((format (printf, 3, 4))) 144static inline void __attribute__ ((format (printf, 3, 4)))
146ATH5K_DBG(struct ath5k_softc *sc, unsigned int m, const char *fmt, ...) {} 145ATH5K_DBG(struct ath5k_hw *ah, unsigned int m, const char *fmt, ...) {}
147 146
148static inline void __attribute__ ((format (printf, 3, 4))) 147static inline void __attribute__ ((format (printf, 3, 4)))
149ATH5K_DBG_UNLIMIT(struct ath5k_softc *sc, unsigned int m, const char *fmt, ...) 148ATH5K_DBG_UNLIMIT(struct ath5k_hw *ah, unsigned int m, const char *fmt, ...)
150{} 149{}
151 150
152static inline void 151static inline void
153ath5k_debug_init_device(struct ath5k_softc *sc) {} 152ath5k_debug_init_device(struct ath5k_hw *ah) {}
154 153
155static inline void 154static inline void
156ath5k_debug_printrxbuffs(struct ath5k_softc *sc, struct ath5k_hw *ah) {} 155ath5k_debug_printrxbuffs(struct ath5k_hw *ah) {}
157 156
158static inline void 157static inline void
159ath5k_debug_dump_bands(struct ath5k_softc *sc) {} 158ath5k_debug_dump_bands(struct ath5k_hw *ah) {}
160 159
161static inline void 160static inline void
162ath5k_debug_printtxbuf(struct ath5k_softc *sc, struct ath5k_buf *bf) {} 161ath5k_debug_printtxbuf(struct ath5k_hw *ah, struct ath5k_buf *bf) {}
163 162
164#endif /* ifdef CONFIG_ATH5K_DEBUG */ 163#endif /* ifdef CONFIG_ATH5K_DEBUG */
165 164
diff --git a/drivers/net/wireless/ath/ath5k/desc.c b/drivers/net/wireless/ath/ath5k/desc.c
index f82383b3ed30..846535f59efc 100644
--- a/drivers/net/wireless/ath/ath5k/desc.c
+++ b/drivers/net/wireless/ath/ath5k/desc.c
@@ -55,12 +55,12 @@ ath5k_hw_setup_2word_tx_desc(struct ath5k_hw *ah, struct ath5k_desc *desc,
55 * noise on the channel, so it is important to avoid this. 55 * noise on the channel, so it is important to avoid this.
56 */ 56 */
57 if (unlikely(tx_tries0 == 0)) { 57 if (unlikely(tx_tries0 == 0)) {
58 ATH5K_ERR(ah->ah_sc, "zero retries\n"); 58 ATH5K_ERR(ah, "zero retries\n");
59 WARN_ON(1); 59 WARN_ON(1);
60 return -EINVAL; 60 return -EINVAL;
61 } 61 }
62 if (unlikely(tx_rate0 == 0)) { 62 if (unlikely(tx_rate0 == 0)) {
63 ATH5K_ERR(ah->ah_sc, "zero rate\n"); 63 ATH5K_ERR(ah, "zero rate\n");
64 WARN_ON(1); 64 WARN_ON(1);
65 return -EINVAL; 65 return -EINVAL;
66 } 66 }
@@ -203,12 +203,12 @@ static int ath5k_hw_setup_4word_tx_desc(struct ath5k_hw *ah,
203 * noise on the channel, so it is important to avoid this. 203 * noise on the channel, so it is important to avoid this.
204 */ 204 */
205 if (unlikely(tx_tries0 == 0)) { 205 if (unlikely(tx_tries0 == 0)) {
206 ATH5K_ERR(ah->ah_sc, "zero retries\n"); 206 ATH5K_ERR(ah, "zero retries\n");
207 WARN_ON(1); 207 WARN_ON(1);
208 return -EINVAL; 208 return -EINVAL;
209 } 209 }
210 if (unlikely(tx_rate0 == 0)) { 210 if (unlikely(tx_rate0 == 0)) {
211 ATH5K_ERR(ah->ah_sc, "zero rate\n"); 211 ATH5K_ERR(ah, "zero rate\n");
212 WARN_ON(1); 212 WARN_ON(1);
213 return -EINVAL; 213 return -EINVAL;
214 } 214 }
@@ -316,7 +316,7 @@ ath5k_hw_setup_mrr_tx_desc(struct ath5k_hw *ah, struct ath5k_desc *desc,
316 if (unlikely((tx_rate1 == 0 && tx_tries1 != 0) || 316 if (unlikely((tx_rate1 == 0 && tx_tries1 != 0) ||
317 (tx_rate2 == 0 && tx_tries2 != 0) || 317 (tx_rate2 == 0 && tx_tries2 != 0) ||
318 (tx_rate3 == 0 && tx_tries3 != 0))) { 318 (tx_rate3 == 0 && tx_tries3 != 0))) {
319 ATH5K_ERR(ah->ah_sc, "zero rate\n"); 319 ATH5K_ERR(ah, "zero rate\n");
320 WARN_ON(1); 320 WARN_ON(1);
321 return -EINVAL; 321 return -EINVAL;
322 } 322 }
diff --git a/drivers/net/wireless/ath/ath5k/dma.c b/drivers/net/wireless/ath/ath5k/dma.c
index b788ecfbdaf6..0d5d4033f12a 100644
--- a/drivers/net/wireless/ath/ath5k/dma.c
+++ b/drivers/net/wireless/ath/ath5k/dma.c
@@ -73,7 +73,7 @@ static int ath5k_hw_stop_rx_dma(struct ath5k_hw *ah)
73 udelay(100); 73 udelay(100);
74 74
75 if (!i) 75 if (!i)
76 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_DMA, 76 ATH5K_DBG(ah, ATH5K_DEBUG_DMA,
77 "failed to stop RX DMA !\n"); 77 "failed to stop RX DMA !\n");
78 78
79 return i ? 0 : -EBUSY; 79 return i ? 0 : -EBUSY;
@@ -100,7 +100,7 @@ u32 ath5k_hw_get_rxdp(struct ath5k_hw *ah)
100int ath5k_hw_set_rxdp(struct ath5k_hw *ah, u32 phys_addr) 100int ath5k_hw_set_rxdp(struct ath5k_hw *ah, u32 phys_addr)
101{ 101{
102 if (ath5k_hw_reg_read(ah, AR5K_CR) & AR5K_CR_RXE) { 102 if (ath5k_hw_reg_read(ah, AR5K_CR) & AR5K_CR_RXE) {
103 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_DMA, 103 ATH5K_DBG(ah, ATH5K_DEBUG_DMA,
104 "tried to set RXDP while rx was active !\n"); 104 "tried to set RXDP while rx was active !\n");
105 return -EIO; 105 return -EIO;
106 } 106 }
@@ -243,7 +243,7 @@ static int ath5k_hw_stop_tx_dma(struct ath5k_hw *ah, unsigned int queue)
243 udelay(100); 243 udelay(100);
244 244
245 if (AR5K_REG_READ_Q(ah, AR5K_QCU_TXE, queue)) 245 if (AR5K_REG_READ_Q(ah, AR5K_QCU_TXE, queue))
246 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_DMA, 246 ATH5K_DBG(ah, ATH5K_DEBUG_DMA,
247 "queue %i didn't stop !\n", queue); 247 "queue %i didn't stop !\n", queue);
248 248
249 /* Check for pending frames */ 249 /* Check for pending frames */
@@ -295,7 +295,7 @@ static int ath5k_hw_stop_tx_dma(struct ath5k_hw *ah, unsigned int queue)
295 AR5K_DIAG_SW_CHANNEL_IDLE_HIGH); 295 AR5K_DIAG_SW_CHANNEL_IDLE_HIGH);
296 296
297 if (pending) 297 if (pending)
298 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_DMA, 298 ATH5K_DBG(ah, ATH5K_DEBUG_DMA,
299 "quiet mechanism didn't work q:%i !\n", 299 "quiet mechanism didn't work q:%i !\n",
300 queue); 300 queue);
301 } 301 }
@@ -309,7 +309,7 @@ static int ath5k_hw_stop_tx_dma(struct ath5k_hw *ah, unsigned int queue)
309 /* Clear register */ 309 /* Clear register */
310 ath5k_hw_reg_write(ah, 0, AR5K_QCU_TXD); 310 ath5k_hw_reg_write(ah, 0, AR5K_QCU_TXD);
311 if (pending) { 311 if (pending) {
312 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_DMA, 312 ATH5K_DBG(ah, ATH5K_DEBUG_DMA,
313 "tx dma didn't stop (q:%i, frm:%i) !\n", 313 "tx dma didn't stop (q:%i, frm:%i) !\n",
314 queue, pending); 314 queue, pending);
315 return -EBUSY; 315 return -EBUSY;
@@ -333,7 +333,7 @@ int ath5k_hw_stop_beacon_queue(struct ath5k_hw *ah, unsigned int queue)
333 int ret; 333 int ret;
334 ret = ath5k_hw_stop_tx_dma(ah, queue); 334 ret = ath5k_hw_stop_tx_dma(ah, queue);
335 if (ret) { 335 if (ret) {
336 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_DMA, 336 ATH5K_DBG(ah, ATH5K_DEBUG_DMA,
337 "beacon queue didn't stop !\n"); 337 "beacon queue didn't stop !\n");
338 return -EIO; 338 return -EIO;
339 } 339 }
diff --git a/drivers/net/wireless/ath/ath5k/eeprom.c b/drivers/net/wireless/ath/ath5k/eeprom.c
index d9e605e37007..9068b9165265 100644
--- a/drivers/net/wireless/ath/ath5k/eeprom.c
+++ b/drivers/net/wireless/ath/ath5k/eeprom.c
@@ -105,7 +105,7 @@ ath5k_eeprom_init_header(struct ath5k_hw *ah)
105 * big still, waiting on a better value. 105 * big still, waiting on a better value.
106 */ 106 */
107 if (eep_max > (3 * AR5K_EEPROM_INFO_MAX)) { 107 if (eep_max > (3 * AR5K_EEPROM_INFO_MAX)) {
108 ATH5K_ERR(ah->ah_sc, "Invalid max custom EEPROM size: " 108 ATH5K_ERR(ah, "Invalid max custom EEPROM size: "
109 "%d (0x%04x) max expected: %d (0x%04x)\n", 109 "%d (0x%04x) max expected: %d (0x%04x)\n",
110 eep_max, eep_max, 110 eep_max, eep_max,
111 3 * AR5K_EEPROM_INFO_MAX, 111 3 * AR5K_EEPROM_INFO_MAX,
@@ -119,7 +119,7 @@ ath5k_eeprom_init_header(struct ath5k_hw *ah)
119 cksum ^= val; 119 cksum ^= val;
120 } 120 }
121 if (cksum != AR5K_EEPROM_INFO_CKSUM) { 121 if (cksum != AR5K_EEPROM_INFO_CKSUM) {
122 ATH5K_ERR(ah->ah_sc, "Invalid EEPROM " 122 ATH5K_ERR(ah, "Invalid EEPROM "
123 "checksum: 0x%04x eep_max: 0x%04x (%s)\n", 123 "checksum: 0x%04x eep_max: 0x%04x (%s)\n",
124 cksum, eep_max, 124 cksum, eep_max,
125 eep_max == AR5K_EEPROM_INFO_MAX ? 125 eep_max == AR5K_EEPROM_INFO_MAX ?
diff --git a/drivers/net/wireless/ath/ath5k/initvals.c b/drivers/net/wireless/ath/ath5k/initvals.c
index 855d1af3e710..5ab607f40e0e 100644
--- a/drivers/net/wireless/ath/ath5k/initvals.c
+++ b/drivers/net/wireless/ath/ath5k/initvals.c
@@ -1542,7 +1542,7 @@ int ath5k_hw_write_initvals(struct ath5k_hw *ah, u8 mode, bool skip_pcu)
1542 1542
1543 /* AR5K_MODE_11B */ 1543 /* AR5K_MODE_11B */
1544 if (mode > 2) { 1544 if (mode > 2) {
1545 ATH5K_ERR(ah->ah_sc, 1545 ATH5K_ERR(ah,
1546 "unsupported channel mode: %d\n", mode); 1546 "unsupported channel mode: %d\n", mode);
1547 return -EINVAL; 1547 return -EINVAL;
1548 } 1548 }
diff --git a/drivers/net/wireless/ath/ath5k/led.c b/drivers/net/wireless/ath/ath5k/led.c
index 127bfbd35172..8c17a00f7dad 100644
--- a/drivers/net/wireless/ath/ath5k/led.c
+++ b/drivers/net/wireless/ath/ath5k/led.c
@@ -86,26 +86,26 @@ static DEFINE_PCI_DEVICE_TABLE(ath5k_led_devices) = {
86 { } 86 { }
87}; 87};
88 88
89void ath5k_led_enable(struct ath5k_softc *sc) 89void ath5k_led_enable(struct ath5k_hw *ah)
90{ 90{
91 if (test_bit(ATH_STAT_LEDSOFT, sc->status)) { 91 if (test_bit(ATH_STAT_LEDSOFT, ah->status)) {
92 ath5k_hw_set_gpio_output(sc->ah, sc->led_pin); 92 ath5k_hw_set_gpio_output(ah, ah->led_pin);
93 ath5k_led_off(sc); 93 ath5k_led_off(ah);
94 } 94 }
95} 95}
96 96
97static void ath5k_led_on(struct ath5k_softc *sc) 97static void ath5k_led_on(struct ath5k_hw *ah)
98{ 98{
99 if (!test_bit(ATH_STAT_LEDSOFT, sc->status)) 99 if (!test_bit(ATH_STAT_LEDSOFT, ah->status))
100 return; 100 return;
101 ath5k_hw_set_gpio(sc->ah, sc->led_pin, sc->led_on); 101 ath5k_hw_set_gpio(ah, ah->led_pin, ah->led_on);
102} 102}
103 103
104void ath5k_led_off(struct ath5k_softc *sc) 104void ath5k_led_off(struct ath5k_hw *ah)
105{ 105{
106 if (!test_bit(ATH_STAT_LEDSOFT, sc->status)) 106 if (!test_bit(ATH_STAT_LEDSOFT, ah->status))
107 return; 107 return;
108 ath5k_hw_set_gpio(sc->ah, sc->led_pin, !sc->led_on); 108 ath5k_hw_set_gpio(ah, ah->led_pin, !ah->led_on);
109} 109}
110 110
111static void 111static void
@@ -116,27 +116,27 @@ ath5k_led_brightness_set(struct led_classdev *led_dev,
116 led_dev); 116 led_dev);
117 117
118 if (brightness == LED_OFF) 118 if (brightness == LED_OFF)
119 ath5k_led_off(led->sc); 119 ath5k_led_off(led->ah);
120 else 120 else
121 ath5k_led_on(led->sc); 121 ath5k_led_on(led->ah);
122} 122}
123 123
124static int 124static int
125ath5k_register_led(struct ath5k_softc *sc, struct ath5k_led *led, 125ath5k_register_led(struct ath5k_hw *ah, struct ath5k_led *led,
126 const char *name, char *trigger) 126 const char *name, char *trigger)
127{ 127{
128 int err; 128 int err;
129 129
130 led->sc = sc; 130 led->ah = ah;
131 strncpy(led->name, name, sizeof(led->name)); 131 strncpy(led->name, name, sizeof(led->name));
132 led->led_dev.name = led->name; 132 led->led_dev.name = led->name;
133 led->led_dev.default_trigger = trigger; 133 led->led_dev.default_trigger = trigger;
134 led->led_dev.brightness_set = ath5k_led_brightness_set; 134 led->led_dev.brightness_set = ath5k_led_brightness_set;
135 135
136 err = led_classdev_register(sc->dev, &led->led_dev); 136 err = led_classdev_register(ah->dev, &led->led_dev);
137 if (err) { 137 if (err) {
138 ATH5K_WARN(sc, "could not register LED %s\n", name); 138 ATH5K_WARN(ah, "could not register LED %s\n", name);
139 led->sc = NULL; 139 led->ah = NULL;
140 } 140 }
141 return err; 141 return err;
142} 142}
@@ -144,30 +144,30 @@ ath5k_register_led(struct ath5k_softc *sc, struct ath5k_led *led,
144static void 144static void
145ath5k_unregister_led(struct ath5k_led *led) 145ath5k_unregister_led(struct ath5k_led *led)
146{ 146{
147 if (!led->sc) 147 if (!led->ah)
148 return; 148 return;
149 led_classdev_unregister(&led->led_dev); 149 led_classdev_unregister(&led->led_dev);
150 ath5k_led_off(led->sc); 150 ath5k_led_off(led->ah);
151 led->sc = NULL; 151 led->ah = NULL;
152} 152}
153 153
154void ath5k_unregister_leds(struct ath5k_softc *sc) 154void ath5k_unregister_leds(struct ath5k_hw *ah)
155{ 155{
156 ath5k_unregister_led(&sc->rx_led); 156 ath5k_unregister_led(&ah->rx_led);
157 ath5k_unregister_led(&sc->tx_led); 157 ath5k_unregister_led(&ah->tx_led);
158} 158}
159 159
160int __devinit ath5k_init_leds(struct ath5k_softc *sc) 160int __devinit ath5k_init_leds(struct ath5k_hw *ah)
161{ 161{
162 int ret = 0; 162 int ret = 0;
163 struct ieee80211_hw *hw = sc->hw; 163 struct ieee80211_hw *hw = ah->hw;
164#ifndef CONFIG_ATHEROS_AR231X 164#ifndef CONFIG_ATHEROS_AR231X
165 struct pci_dev *pdev = sc->pdev; 165 struct pci_dev *pdev = ah->pdev;
166#endif 166#endif
167 char name[ATH5K_LED_MAX_NAME_LEN + 1]; 167 char name[ATH5K_LED_MAX_NAME_LEN + 1];
168 const struct pci_device_id *match; 168 const struct pci_device_id *match;
169 169
170 if (!sc->pdev) 170 if (!ah->pdev)
171 return 0; 171 return 0;
172 172
173#ifdef CONFIG_ATHEROS_AR231X 173#ifdef CONFIG_ATHEROS_AR231X
@@ -176,24 +176,24 @@ int __devinit ath5k_init_leds(struct ath5k_softc *sc)
176 match = pci_match_id(&ath5k_led_devices[0], pdev); 176 match = pci_match_id(&ath5k_led_devices[0], pdev);
177#endif 177#endif
178 if (match) { 178 if (match) {
179 __set_bit(ATH_STAT_LEDSOFT, sc->status); 179 __set_bit(ATH_STAT_LEDSOFT, ah->status);
180 sc->led_pin = ATH_PIN(match->driver_data); 180 ah->led_pin = ATH_PIN(match->driver_data);
181 sc->led_on = ATH_POLARITY(match->driver_data); 181 ah->led_on = ATH_POLARITY(match->driver_data);
182 } 182 }
183 183
184 if (!test_bit(ATH_STAT_LEDSOFT, sc->status)) 184 if (!test_bit(ATH_STAT_LEDSOFT, ah->status))
185 goto out; 185 goto out;
186 186
187 ath5k_led_enable(sc); 187 ath5k_led_enable(ah);
188 188
189 snprintf(name, sizeof(name), "ath5k-%s::rx", wiphy_name(hw->wiphy)); 189 snprintf(name, sizeof(name), "ath5k-%s::rx", wiphy_name(hw->wiphy));
190 ret = ath5k_register_led(sc, &sc->rx_led, name, 190 ret = ath5k_register_led(ah, &ah->rx_led, name,
191 ieee80211_get_rx_led_name(hw)); 191 ieee80211_get_rx_led_name(hw));
192 if (ret) 192 if (ret)
193 goto out; 193 goto out;
194 194
195 snprintf(name, sizeof(name), "ath5k-%s::tx", wiphy_name(hw->wiphy)); 195 snprintf(name, sizeof(name), "ath5k-%s::tx", wiphy_name(hw->wiphy));
196 ret = ath5k_register_led(sc, &sc->tx_led, name, 196 ret = ath5k_register_led(ah, &ah->tx_led, name,
197 ieee80211_get_tx_led_name(hw)); 197 ieee80211_get_tx_led_name(hw));
198out: 198out:
199 return ret; 199 return ret;
diff --git a/drivers/net/wireless/ath/ath5k/mac80211-ops.c b/drivers/net/wireless/ath/ath5k/mac80211-ops.c
index 0d5ab3428be5..7aa2a6348f2f 100644
--- a/drivers/net/wireless/ath/ath5k/mac80211-ops.c
+++ b/drivers/net/wireless/ath/ath5k/mac80211-ops.c
@@ -53,15 +53,15 @@
53static void 53static void
54ath5k_tx(struct ieee80211_hw *hw, struct sk_buff *skb) 54ath5k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
55{ 55{
56 struct ath5k_softc *sc = hw->priv; 56 struct ath5k_hw *ah = hw->priv;
57 u16 qnum = skb_get_queue_mapping(skb); 57 u16 qnum = skb_get_queue_mapping(skb);
58 58
59 if (WARN_ON(qnum >= sc->ah->ah_capabilities.cap_queues.q_tx_num)) { 59 if (WARN_ON(qnum >= ah->ah_capabilities.cap_queues.q_tx_num)) {
60 dev_kfree_skb_any(skb); 60 dev_kfree_skb_any(skb);
61 return; 61 return;
62 } 62 }
63 63
64 ath5k_tx_queue(hw, skb, &sc->txqs[qnum]); 64 ath5k_tx_queue(hw, skb, &ah->txqs[qnum]);
65} 65}
66 66
67 67
@@ -82,15 +82,15 @@ ath5k_stop(struct ieee80211_hw *hw)
82static int 82static int
83ath5k_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 83ath5k_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
84{ 84{
85 struct ath5k_softc *sc = hw->priv; 85 struct ath5k_hw *ah = hw->priv;
86 int ret; 86 int ret;
87 struct ath5k_vif *avf = (void *)vif->drv_priv; 87 struct ath5k_vif *avf = (void *)vif->drv_priv;
88 88
89 mutex_lock(&sc->lock); 89 mutex_lock(&ah->lock);
90 90
91 if ((vif->type == NL80211_IFTYPE_AP || 91 if ((vif->type == NL80211_IFTYPE_AP ||
92 vif->type == NL80211_IFTYPE_ADHOC) 92 vif->type == NL80211_IFTYPE_ADHOC)
93 && (sc->num_ap_vifs + sc->num_adhoc_vifs) >= ATH_BCBUF) { 93 && (ah->num_ap_vifs + ah->num_adhoc_vifs) >= ATH_BCBUF) {
94 ret = -ELNRNG; 94 ret = -ELNRNG;
95 goto end; 95 goto end;
96 } 96 }
@@ -100,9 +100,9 @@ ath5k_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
100 * We would need to operate the HW in ad-hoc mode to allow TSF updates 100 * We would need to operate the HW in ad-hoc mode to allow TSF updates
101 * for the IBSS, but this breaks with additional AP or STA interfaces 101 * for the IBSS, but this breaks with additional AP or STA interfaces
102 * at the moment. */ 102 * at the moment. */
103 if (sc->num_adhoc_vifs || 103 if (ah->num_adhoc_vifs ||
104 (sc->nvifs && vif->type == NL80211_IFTYPE_ADHOC)) { 104 (ah->nvifs && vif->type == NL80211_IFTYPE_ADHOC)) {
105 ATH5K_ERR(sc, "Only one single ad-hoc interface is allowed.\n"); 105 ATH5K_ERR(ah, "Only one single ad-hoc interface is allowed.\n");
106 ret = -ELNRNG; 106 ret = -ELNRNG;
107 goto end; 107 goto end;
108 } 108 }
@@ -119,8 +119,8 @@ ath5k_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
119 goto end; 119 goto end;
120 } 120 }
121 121
122 sc->nvifs++; 122 ah->nvifs++;
123 ATH5K_DBG(sc, ATH5K_DEBUG_MODE, "add interface mode %d\n", avf->opmode); 123 ATH5K_DBG(ah, ATH5K_DEBUG_MODE, "add interface mode %d\n", avf->opmode);
124 124
125 /* Assign the vap/adhoc to a beacon xmit slot. */ 125 /* Assign the vap/adhoc to a beacon xmit slot. */
126 if ((avf->opmode == NL80211_IFTYPE_AP) || 126 if ((avf->opmode == NL80211_IFTYPE_AP) ||
@@ -128,38 +128,38 @@ ath5k_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
128 (avf->opmode == NL80211_IFTYPE_MESH_POINT)) { 128 (avf->opmode == NL80211_IFTYPE_MESH_POINT)) {
129 int slot; 129 int slot;
130 130
131 WARN_ON(list_empty(&sc->bcbuf)); 131 WARN_ON(list_empty(&ah->bcbuf));
132 avf->bbuf = list_first_entry(&sc->bcbuf, struct ath5k_buf, 132 avf->bbuf = list_first_entry(&ah->bcbuf, struct ath5k_buf,
133 list); 133 list);
134 list_del(&avf->bbuf->list); 134 list_del(&avf->bbuf->list);
135 135
136 avf->bslot = 0; 136 avf->bslot = 0;
137 for (slot = 0; slot < ATH_BCBUF; slot++) { 137 for (slot = 0; slot < ATH_BCBUF; slot++) {
138 if (!sc->bslot[slot]) { 138 if (!ah->bslot[slot]) {
139 avf->bslot = slot; 139 avf->bslot = slot;
140 break; 140 break;
141 } 141 }
142 } 142 }
143 BUG_ON(sc->bslot[avf->bslot] != NULL); 143 BUG_ON(ah->bslot[avf->bslot] != NULL);
144 sc->bslot[avf->bslot] = vif; 144 ah->bslot[avf->bslot] = vif;
145 if (avf->opmode == NL80211_IFTYPE_AP) 145 if (avf->opmode == NL80211_IFTYPE_AP)
146 sc->num_ap_vifs++; 146 ah->num_ap_vifs++;
147 else if (avf->opmode == NL80211_IFTYPE_ADHOC) 147 else if (avf->opmode == NL80211_IFTYPE_ADHOC)
148 sc->num_adhoc_vifs++; 148 ah->num_adhoc_vifs++;
149 } 149 }
150 150
151 /* Any MAC address is fine, all others are included through the 151 /* Any MAC address is fine, all others are included through the
152 * filter. 152 * filter.
153 */ 153 */
154 memcpy(&sc->lladdr, vif->addr, ETH_ALEN); 154 memcpy(&ah->lladdr, vif->addr, ETH_ALEN);
155 ath5k_hw_set_lladdr(sc->ah, vif->addr); 155 ath5k_hw_set_lladdr(ah, vif->addr);
156 156
157 memcpy(&avf->lladdr, vif->addr, ETH_ALEN); 157 memcpy(&avf->lladdr, vif->addr, ETH_ALEN);
158 158
159 ath5k_update_bssid_mask_and_opmode(sc, vif); 159 ath5k_update_bssid_mask_and_opmode(ah, vif);
160 ret = 0; 160 ret = 0;
161end: 161end:
162 mutex_unlock(&sc->lock); 162 mutex_unlock(&ah->lock);
163 return ret; 163 return ret;
164} 164}
165 165
@@ -168,31 +168,31 @@ static void
168ath5k_remove_interface(struct ieee80211_hw *hw, 168ath5k_remove_interface(struct ieee80211_hw *hw,
169 struct ieee80211_vif *vif) 169 struct ieee80211_vif *vif)
170{ 170{
171 struct ath5k_softc *sc = hw->priv; 171 struct ath5k_hw *ah = hw->priv;
172 struct ath5k_vif *avf = (void *)vif->drv_priv; 172 struct ath5k_vif *avf = (void *)vif->drv_priv;
173 unsigned int i; 173 unsigned int i;
174 174
175 mutex_lock(&sc->lock); 175 mutex_lock(&ah->lock);
176 sc->nvifs--; 176 ah->nvifs--;
177 177
178 if (avf->bbuf) { 178 if (avf->bbuf) {
179 ath5k_txbuf_free_skb(sc, avf->bbuf); 179 ath5k_txbuf_free_skb(ah, avf->bbuf);
180 list_add_tail(&avf->bbuf->list, &sc->bcbuf); 180 list_add_tail(&avf->bbuf->list, &ah->bcbuf);
181 for (i = 0; i < ATH_BCBUF; i++) { 181 for (i = 0; i < ATH_BCBUF; i++) {
182 if (sc->bslot[i] == vif) { 182 if (ah->bslot[i] == vif) {
183 sc->bslot[i] = NULL; 183 ah->bslot[i] = NULL;
184 break; 184 break;
185 } 185 }
186 } 186 }
187 avf->bbuf = NULL; 187 avf->bbuf = NULL;
188 } 188 }
189 if (avf->opmode == NL80211_IFTYPE_AP) 189 if (avf->opmode == NL80211_IFTYPE_AP)
190 sc->num_ap_vifs--; 190 ah->num_ap_vifs--;
191 else if (avf->opmode == NL80211_IFTYPE_ADHOC) 191 else if (avf->opmode == NL80211_IFTYPE_ADHOC)
192 sc->num_adhoc_vifs--; 192 ah->num_adhoc_vifs--;
193 193
194 ath5k_update_bssid_mask_and_opmode(sc, NULL); 194 ath5k_update_bssid_mask_and_opmode(ah, NULL);
195 mutex_unlock(&sc->lock); 195 mutex_unlock(&ah->lock);
196} 196}
197 197
198 198
@@ -202,23 +202,22 @@ ath5k_remove_interface(struct ieee80211_hw *hw,
202static int 202static int
203ath5k_config(struct ieee80211_hw *hw, u32 changed) 203ath5k_config(struct ieee80211_hw *hw, u32 changed)
204{ 204{
205 struct ath5k_softc *sc = hw->priv; 205 struct ath5k_hw *ah = hw->priv;
206 struct ath5k_hw *ah = sc->ah;
207 struct ieee80211_conf *conf = &hw->conf; 206 struct ieee80211_conf *conf = &hw->conf;
208 int ret = 0; 207 int ret = 0;
209 int i; 208 int i;
210 209
211 mutex_lock(&sc->lock); 210 mutex_lock(&ah->lock);
212 211
213 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) { 212 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
214 ret = ath5k_chan_set(sc, conf->channel); 213 ret = ath5k_chan_set(ah, conf->channel);
215 if (ret < 0) 214 if (ret < 0)
216 goto unlock; 215 goto unlock;
217 } 216 }
218 217
219 if ((changed & IEEE80211_CONF_CHANGE_POWER) && 218 if ((changed & IEEE80211_CONF_CHANGE_POWER) &&
220 (sc->power_level != conf->power_level)) { 219 (ah->power_level != conf->power_level)) {
221 sc->power_level = conf->power_level; 220 ah->power_level = conf->power_level;
222 221
223 /* Half dB steps */ 222 /* Half dB steps */
224 ath5k_hw_set_txpower_limit(ah, (conf->power_level * 2)); 223 ath5k_hw_set_txpower_limit(ah, (conf->power_level * 2));
@@ -252,7 +251,7 @@ ath5k_config(struct ieee80211_hw *hw, u32 changed)
252 ath5k_hw_set_antenna_mode(ah, ah->ah_ant_mode); 251 ath5k_hw_set_antenna_mode(ah, ah->ah_ant_mode);
253 252
254unlock: 253unlock:
255 mutex_unlock(&sc->lock); 254 mutex_unlock(&ah->lock);
256 return ret; 255 return ret;
257} 256}
258 257
@@ -262,12 +261,11 @@ ath5k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
262 struct ieee80211_bss_conf *bss_conf, u32 changes) 261 struct ieee80211_bss_conf *bss_conf, u32 changes)
263{ 262{
264 struct ath5k_vif *avf = (void *)vif->drv_priv; 263 struct ath5k_vif *avf = (void *)vif->drv_priv;
265 struct ath5k_softc *sc = hw->priv; 264 struct ath5k_hw *ah = hw->priv;
266 struct ath5k_hw *ah = sc->ah;
267 struct ath_common *common = ath5k_hw_common(ah); 265 struct ath_common *common = ath5k_hw_common(ah);
268 unsigned long flags; 266 unsigned long flags;
269 267
270 mutex_lock(&sc->lock); 268 mutex_lock(&ah->lock);
271 269
272 if (changes & BSS_CHANGED_BSSID) { 270 if (changes & BSS_CHANGED_BSSID) {
273 /* Cache for later use during resets */ 271 /* Cache for later use during resets */
@@ -278,7 +276,7 @@ ath5k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
278 } 276 }
279 277
280 if (changes & BSS_CHANGED_BEACON_INT) 278 if (changes & BSS_CHANGED_BEACON_INT)
281 sc->bintval = bss_conf->beacon_int; 279 ah->bintval = bss_conf->beacon_int;
282 280
283 if (changes & BSS_CHANGED_ERP_SLOT) { 281 if (changes & BSS_CHANGED_ERP_SLOT) {
284 int slot_time; 282 int slot_time;
@@ -292,16 +290,16 @@ ath5k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
292 if (changes & BSS_CHANGED_ASSOC) { 290 if (changes & BSS_CHANGED_ASSOC) {
293 avf->assoc = bss_conf->assoc; 291 avf->assoc = bss_conf->assoc;
294 if (bss_conf->assoc) 292 if (bss_conf->assoc)
295 sc->assoc = bss_conf->assoc; 293 ah->assoc = bss_conf->assoc;
296 else 294 else
297 sc->assoc = ath5k_any_vif_assoc(sc); 295 ah->assoc = ath5k_any_vif_assoc(ah);
298 296
299 if (sc->opmode == NL80211_IFTYPE_STATION) 297 if (ah->opmode == NL80211_IFTYPE_STATION)
300 ath5k_set_beacon_filter(hw, sc->assoc); 298 ath5k_set_beacon_filter(hw, ah->assoc);
301 ath5k_hw_set_ledstate(sc->ah, sc->assoc ? 299 ath5k_hw_set_ledstate(ah, ah->assoc ?
302 AR5K_LED_ASSOC : AR5K_LED_INIT); 300 AR5K_LED_ASSOC : AR5K_LED_INIT);
303 if (bss_conf->assoc) { 301 if (bss_conf->assoc) {
304 ATH5K_DBG(sc, ATH5K_DEBUG_ANY, 302 ATH5K_DBG(ah, ATH5K_DEBUG_ANY,
305 "Bss Info ASSOC %d, bssid: %pM\n", 303 "Bss Info ASSOC %d, bssid: %pM\n",
306 bss_conf->aid, common->curbssid); 304 bss_conf->aid, common->curbssid);
307 common->curaid = bss_conf->aid; 305 common->curaid = bss_conf->aid;
@@ -311,19 +309,19 @@ ath5k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
311 } 309 }
312 310
313 if (changes & BSS_CHANGED_BEACON) { 311 if (changes & BSS_CHANGED_BEACON) {
314 spin_lock_irqsave(&sc->block, flags); 312 spin_lock_irqsave(&ah->block, flags);
315 ath5k_beacon_update(hw, vif); 313 ath5k_beacon_update(hw, vif);
316 spin_unlock_irqrestore(&sc->block, flags); 314 spin_unlock_irqrestore(&ah->block, flags);
317 } 315 }
318 316
319 if (changes & BSS_CHANGED_BEACON_ENABLED) 317 if (changes & BSS_CHANGED_BEACON_ENABLED)
320 sc->enable_beacon = bss_conf->enable_beacon; 318 ah->enable_beacon = bss_conf->enable_beacon;
321 319
322 if (changes & (BSS_CHANGED_BEACON | BSS_CHANGED_BEACON_ENABLED | 320 if (changes & (BSS_CHANGED_BEACON | BSS_CHANGED_BEACON_ENABLED |
323 BSS_CHANGED_BEACON_INT)) 321 BSS_CHANGED_BEACON_INT))
324 ath5k_beacon_config(sc); 322 ath5k_beacon_config(ah);
325 323
326 mutex_unlock(&sc->lock); 324 mutex_unlock(&ah->lock);
327} 325}
328 326
329 327
@@ -384,12 +382,11 @@ ath5k_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
384 FIF_PLCPFAIL | FIF_CONTROL | FIF_OTHER_BSS | \ 382 FIF_PLCPFAIL | FIF_CONTROL | FIF_OTHER_BSS | \
385 FIF_BCN_PRBRESP_PROMISC) 383 FIF_BCN_PRBRESP_PROMISC)
386 384
387 struct ath5k_softc *sc = hw->priv; 385 struct ath5k_hw *ah = hw->priv;
388 struct ath5k_hw *ah = sc->ah;
389 u32 mfilt[2], rfilt; 386 u32 mfilt[2], rfilt;
390 struct ath5k_vif_iter_data iter_data; /* to count STA interfaces */ 387 struct ath5k_vif_iter_data iter_data; /* to count STA interfaces */
391 388
392 mutex_lock(&sc->lock); 389 mutex_lock(&ah->lock);
393 390
394 mfilt[0] = multicast; 391 mfilt[0] = multicast;
395 mfilt[1] = multicast >> 32; 392 mfilt[1] = multicast >> 32;
@@ -407,12 +404,12 @@ ath5k_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
407 404
408 if (changed_flags & (FIF_PROMISC_IN_BSS | FIF_OTHER_BSS)) { 405 if (changed_flags & (FIF_PROMISC_IN_BSS | FIF_OTHER_BSS)) {
409 if (*new_flags & FIF_PROMISC_IN_BSS) 406 if (*new_flags & FIF_PROMISC_IN_BSS)
410 __set_bit(ATH_STAT_PROMISC, sc->status); 407 __set_bit(ATH_STAT_PROMISC, ah->status);
411 else 408 else
412 __clear_bit(ATH_STAT_PROMISC, sc->status); 409 __clear_bit(ATH_STAT_PROMISC, ah->status);
413 } 410 }
414 411
415 if (test_bit(ATH_STAT_PROMISC, sc->status)) 412 if (test_bit(ATH_STAT_PROMISC, ah->status))
416 rfilt |= AR5K_RX_FILTER_PROM; 413 rfilt |= AR5K_RX_FILTER_PROM;
417 414
418 /* Note, AR5K_RX_FILTER_MCAST is already enabled */ 415 /* Note, AR5K_RX_FILTER_MCAST is already enabled */
@@ -427,7 +424,7 @@ ath5k_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
427 424
428 /* FIF_BCN_PRBRESP_PROMISC really means to enable beacons 425 /* FIF_BCN_PRBRESP_PROMISC really means to enable beacons
429 * and probes for any BSSID */ 426 * and probes for any BSSID */
430 if ((*new_flags & FIF_BCN_PRBRESP_PROMISC) || (sc->nvifs > 1)) 427 if ((*new_flags & FIF_BCN_PRBRESP_PROMISC) || (ah->nvifs > 1))
431 rfilt |= AR5K_RX_FILTER_BEACON; 428 rfilt |= AR5K_RX_FILTER_BEACON;
432 429
433 /* FIF_CONTROL doc says that if FIF_PROMISC_IN_BSS is not 430 /* FIF_CONTROL doc says that if FIF_PROMISC_IN_BSS is not
@@ -442,7 +439,7 @@ ath5k_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
442 439
443 /* XXX move these to mac80211, and add a beacon IFF flag to mac80211 */ 440 /* XXX move these to mac80211, and add a beacon IFF flag to mac80211 */
444 441
445 switch (sc->opmode) { 442 switch (ah->opmode) {
446 case NL80211_IFTYPE_MESH_POINT: 443 case NL80211_IFTYPE_MESH_POINT:
447 rfilt |= AR5K_RX_FILTER_CONTROL | 444 rfilt |= AR5K_RX_FILTER_CONTROL |
448 AR5K_RX_FILTER_BEACON | 445 AR5K_RX_FILTER_BEACON |
@@ -455,7 +452,7 @@ ath5k_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
455 AR5K_RX_FILTER_BEACON; 452 AR5K_RX_FILTER_BEACON;
456 break; 453 break;
457 case NL80211_IFTYPE_STATION: 454 case NL80211_IFTYPE_STATION:
458 if (sc->assoc) 455 if (ah->assoc)
459 rfilt |= AR5K_RX_FILTER_BEACON; 456 rfilt |= AR5K_RX_FILTER_BEACON;
460 default: 457 default:
461 break; 458 break;
@@ -464,7 +461,7 @@ ath5k_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
464 iter_data.hw_macaddr = NULL; 461 iter_data.hw_macaddr = NULL;
465 iter_data.n_stas = 0; 462 iter_data.n_stas = 0;
466 iter_data.need_set_hw_addr = false; 463 iter_data.need_set_hw_addr = false;
467 ieee80211_iterate_active_interfaces_atomic(sc->hw, ath5k_vif_iter, 464 ieee80211_iterate_active_interfaces_atomic(ah->hw, ath5k_vif_iter,
468 &iter_data); 465 &iter_data);
469 466
470 /* Set up RX Filter */ 467 /* Set up RX Filter */
@@ -483,9 +480,9 @@ ath5k_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
483 ath5k_hw_set_mcast_filter(ah, mfilt[0], mfilt[1]); 480 ath5k_hw_set_mcast_filter(ah, mfilt[0], mfilt[1]);
484 /* Set the cached hw filter flags, this will later actually 481 /* Set the cached hw filter flags, this will later actually
485 * be set in HW */ 482 * be set in HW */
486 sc->filter_flags = rfilt; 483 ah->filter_flags = rfilt;
487 484
488 mutex_unlock(&sc->lock); 485 mutex_unlock(&ah->lock);
489} 486}
490 487
491 488
@@ -494,8 +491,7 @@ ath5k_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
494 struct ieee80211_vif *vif, struct ieee80211_sta *sta, 491 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
495 struct ieee80211_key_conf *key) 492 struct ieee80211_key_conf *key)
496{ 493{
497 struct ath5k_softc *sc = hw->priv; 494 struct ath5k_hw *ah = hw->priv;
498 struct ath5k_hw *ah = sc->ah;
499 struct ath_common *common = ath5k_hw_common(ah); 495 struct ath_common *common = ath5k_hw_common(ah);
500 int ret = 0; 496 int ret = 0;
501 497
@@ -516,7 +512,7 @@ ath5k_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
516 return -EINVAL; 512 return -EINVAL;
517 } 513 }
518 514
519 mutex_lock(&sc->lock); 515 mutex_lock(&ah->lock);
520 516
521 switch (cmd) { 517 switch (cmd) {
522 case SET_KEY: 518 case SET_KEY:
@@ -540,7 +536,7 @@ ath5k_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
540 } 536 }
541 537
542 mmiowb(); 538 mmiowb();
543 mutex_unlock(&sc->lock); 539 mutex_unlock(&ah->lock);
544 return ret; 540 return ret;
545} 541}
546 542
@@ -548,17 +544,17 @@ ath5k_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
548static void 544static void
549ath5k_sw_scan_start(struct ieee80211_hw *hw) 545ath5k_sw_scan_start(struct ieee80211_hw *hw)
550{ 546{
551 struct ath5k_softc *sc = hw->priv; 547 struct ath5k_hw *ah = hw->priv;
552 if (!sc->assoc) 548 if (!ah->assoc)
553 ath5k_hw_set_ledstate(sc->ah, AR5K_LED_SCAN); 549 ath5k_hw_set_ledstate(ah, AR5K_LED_SCAN);
554} 550}
555 551
556 552
557static void 553static void
558ath5k_sw_scan_complete(struct ieee80211_hw *hw) 554ath5k_sw_scan_complete(struct ieee80211_hw *hw)
559{ 555{
560 struct ath5k_softc *sc = hw->priv; 556 struct ath5k_hw *ah = hw->priv;
561 ath5k_hw_set_ledstate(sc->ah, sc->assoc ? 557 ath5k_hw_set_ledstate(ah, ah->assoc ?
562 AR5K_LED_ASSOC : AR5K_LED_INIT); 558 AR5K_LED_ASSOC : AR5K_LED_INIT);
563} 559}
564 560
@@ -567,15 +563,15 @@ static int
567ath5k_get_stats(struct ieee80211_hw *hw, 563ath5k_get_stats(struct ieee80211_hw *hw,
568 struct ieee80211_low_level_stats *stats) 564 struct ieee80211_low_level_stats *stats)
569{ 565{
570 struct ath5k_softc *sc = hw->priv; 566 struct ath5k_hw *ah = hw->priv;
571 567
572 /* Force update */ 568 /* Force update */
573 ath5k_hw_update_mib_counters(sc->ah); 569 ath5k_hw_update_mib_counters(ah);
574 570
575 stats->dot11ACKFailureCount = sc->stats.ack_fail; 571 stats->dot11ACKFailureCount = ah->stats.ack_fail;
576 stats->dot11RTSFailureCount = sc->stats.rts_fail; 572 stats->dot11RTSFailureCount = ah->stats.rts_fail;
577 stats->dot11RTSSuccessCount = sc->stats.rts_ok; 573 stats->dot11RTSSuccessCount = ah->stats.rts_ok;
578 stats->dot11FCSErrorCount = sc->stats.fcs_error; 574 stats->dot11FCSErrorCount = ah->stats.fcs_error;
579 575
580 return 0; 576 return 0;
581} 577}
@@ -585,15 +581,14 @@ static int
585ath5k_conf_tx(struct ieee80211_hw *hw, u16 queue, 581ath5k_conf_tx(struct ieee80211_hw *hw, u16 queue,
586 const struct ieee80211_tx_queue_params *params) 582 const struct ieee80211_tx_queue_params *params)
587{ 583{
588 struct ath5k_softc *sc = hw->priv; 584 struct ath5k_hw *ah = hw->priv;
589 struct ath5k_hw *ah = sc->ah;
590 struct ath5k_txq_info qi; 585 struct ath5k_txq_info qi;
591 int ret = 0; 586 int ret = 0;
592 587
593 if (queue >= ah->ah_capabilities.cap_queues.q_tx_num) 588 if (queue >= ah->ah_capabilities.cap_queues.q_tx_num)
594 return 0; 589 return 0;
595 590
596 mutex_lock(&sc->lock); 591 mutex_lock(&ah->lock);
597 592
598 ath5k_hw_get_tx_queueprops(ah, queue, &qi); 593 ath5k_hw_get_tx_queueprops(ah, queue, &qi);
599 594
@@ -602,20 +597,20 @@ ath5k_conf_tx(struct ieee80211_hw *hw, u16 queue,
602 qi.tqi_cw_max = params->cw_max; 597 qi.tqi_cw_max = params->cw_max;
603 qi.tqi_burst_time = params->txop; 598 qi.tqi_burst_time = params->txop;
604 599
605 ATH5K_DBG(sc, ATH5K_DEBUG_ANY, 600 ATH5K_DBG(ah, ATH5K_DEBUG_ANY,
606 "Configure tx [queue %d], " 601 "Configure tx [queue %d], "
607 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n", 602 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
608 queue, params->aifs, params->cw_min, 603 queue, params->aifs, params->cw_min,
609 params->cw_max, params->txop); 604 params->cw_max, params->txop);
610 605
611 if (ath5k_hw_set_tx_queueprops(ah, queue, &qi)) { 606 if (ath5k_hw_set_tx_queueprops(ah, queue, &qi)) {
612 ATH5K_ERR(sc, 607 ATH5K_ERR(ah,
613 "Unable to update hardware queue %u!\n", queue); 608 "Unable to update hardware queue %u!\n", queue);
614 ret = -EIO; 609 ret = -EIO;
615 } else 610 } else
616 ath5k_hw_reset_tx_queue(ah, queue); 611 ath5k_hw_reset_tx_queue(ah, queue);
617 612
618 mutex_unlock(&sc->lock); 613 mutex_unlock(&ah->lock);
619 614
620 return ret; 615 return ret;
621} 616}
@@ -624,43 +619,43 @@ ath5k_conf_tx(struct ieee80211_hw *hw, u16 queue,
624static u64 619static u64
625ath5k_get_tsf(struct ieee80211_hw *hw) 620ath5k_get_tsf(struct ieee80211_hw *hw)
626{ 621{
627 struct ath5k_softc *sc = hw->priv; 622 struct ath5k_hw *ah = hw->priv;
628 623
629 return ath5k_hw_get_tsf64(sc->ah); 624 return ath5k_hw_get_tsf64(ah);
630} 625}
631 626
632 627
633static void 628static void
634ath5k_set_tsf(struct ieee80211_hw *hw, u64 tsf) 629ath5k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
635{ 630{
636 struct ath5k_softc *sc = hw->priv; 631 struct ath5k_hw *ah = hw->priv;
637 632
638 ath5k_hw_set_tsf64(sc->ah, tsf); 633 ath5k_hw_set_tsf64(ah, tsf);
639} 634}
640 635
641 636
642static void 637static void
643ath5k_reset_tsf(struct ieee80211_hw *hw) 638ath5k_reset_tsf(struct ieee80211_hw *hw)
644{ 639{
645 struct ath5k_softc *sc = hw->priv; 640 struct ath5k_hw *ah = hw->priv;
646 641
647 /* 642 /*
648 * in IBSS mode we need to update the beacon timers too. 643 * in IBSS mode we need to update the beacon timers too.
649 * this will also reset the TSF if we call it with 0 644 * this will also reset the TSF if we call it with 0
650 */ 645 */
651 if (sc->opmode == NL80211_IFTYPE_ADHOC) 646 if (ah->opmode == NL80211_IFTYPE_ADHOC)
652 ath5k_beacon_update_timers(sc, 0); 647 ath5k_beacon_update_timers(ah, 0);
653 else 648 else
654 ath5k_hw_reset_tsf(sc->ah); 649 ath5k_hw_reset_tsf(ah);
655} 650}
656 651
657 652
658static int 653static int
659ath5k_get_survey(struct ieee80211_hw *hw, int idx, struct survey_info *survey) 654ath5k_get_survey(struct ieee80211_hw *hw, int idx, struct survey_info *survey)
660{ 655{
661 struct ath5k_softc *sc = hw->priv; 656 struct ath5k_hw *ah = hw->priv;
662 struct ieee80211_conf *conf = &hw->conf; 657 struct ieee80211_conf *conf = &hw->conf;
663 struct ath_common *common = ath5k_hw_common(sc->ah); 658 struct ath_common *common = ath5k_hw_common(ah);
664 struct ath_cycle_counters *cc = &common->cc_survey; 659 struct ath_cycle_counters *cc = &common->cc_survey;
665 unsigned int div = common->clockrate * 1000; 660 unsigned int div = common->clockrate * 1000;
666 661
@@ -670,18 +665,18 @@ ath5k_get_survey(struct ieee80211_hw *hw, int idx, struct survey_info *survey)
670 spin_lock_bh(&common->cc_lock); 665 spin_lock_bh(&common->cc_lock);
671 ath_hw_cycle_counters_update(common); 666 ath_hw_cycle_counters_update(common);
672 if (cc->cycles > 0) { 667 if (cc->cycles > 0) {
673 sc->survey.channel_time += cc->cycles / div; 668 ah->survey.channel_time += cc->cycles / div;
674 sc->survey.channel_time_busy += cc->rx_busy / div; 669 ah->survey.channel_time_busy += cc->rx_busy / div;
675 sc->survey.channel_time_rx += cc->rx_frame / div; 670 ah->survey.channel_time_rx += cc->rx_frame / div;
676 sc->survey.channel_time_tx += cc->tx_frame / div; 671 ah->survey.channel_time_tx += cc->tx_frame / div;
677 } 672 }
678 memset(cc, 0, sizeof(*cc)); 673 memset(cc, 0, sizeof(*cc));
679 spin_unlock_bh(&common->cc_lock); 674 spin_unlock_bh(&common->cc_lock);
680 675
681 memcpy(survey, &sc->survey, sizeof(*survey)); 676 memcpy(survey, &ah->survey, sizeof(*survey));
682 677
683 survey->channel = conf->channel; 678 survey->channel = conf->channel;
684 survey->noise = sc->ah->ah_noise_floor; 679 survey->noise = ah->ah_noise_floor;
685 survey->filled = SURVEY_INFO_NOISE_DBM | 680 survey->filled = SURVEY_INFO_NOISE_DBM |
686 SURVEY_INFO_CHANNEL_TIME | 681 SURVEY_INFO_CHANNEL_TIME |
687 SURVEY_INFO_CHANNEL_TIME_BUSY | 682 SURVEY_INFO_CHANNEL_TIME_BUSY |
@@ -705,25 +700,25 @@ ath5k_get_survey(struct ieee80211_hw *hw, int idx, struct survey_info *survey)
705static void 700static void
706ath5k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class) 701ath5k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
707{ 702{
708 struct ath5k_softc *sc = hw->priv; 703 struct ath5k_hw *ah = hw->priv;
709 704
710 mutex_lock(&sc->lock); 705 mutex_lock(&ah->lock);
711 ath5k_hw_set_coverage_class(sc->ah, coverage_class); 706 ath5k_hw_set_coverage_class(ah, coverage_class);
712 mutex_unlock(&sc->lock); 707 mutex_unlock(&ah->lock);
713} 708}
714 709
715 710
716static int 711static int
717ath5k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant) 712ath5k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
718{ 713{
719 struct ath5k_softc *sc = hw->priv; 714 struct ath5k_hw *ah = hw->priv;
720 715
721 if (tx_ant == 1 && rx_ant == 1) 716 if (tx_ant == 1 && rx_ant == 1)
722 ath5k_hw_set_antenna_mode(sc->ah, AR5K_ANTMODE_FIXED_A); 717 ath5k_hw_set_antenna_mode(ah, AR5K_ANTMODE_FIXED_A);
723 else if (tx_ant == 2 && rx_ant == 2) 718 else if (tx_ant == 2 && rx_ant == 2)
724 ath5k_hw_set_antenna_mode(sc->ah, AR5K_ANTMODE_FIXED_B); 719 ath5k_hw_set_antenna_mode(ah, AR5K_ANTMODE_FIXED_B);
725 else if ((tx_ant & 3) == 3 && (rx_ant & 3) == 3) 720 else if ((tx_ant & 3) == 3 && (rx_ant & 3) == 3)
726 ath5k_hw_set_antenna_mode(sc->ah, AR5K_ANTMODE_DEFAULT); 721 ath5k_hw_set_antenna_mode(ah, AR5K_ANTMODE_DEFAULT);
727 else 722 else
728 return -EINVAL; 723 return -EINVAL;
729 return 0; 724 return 0;
@@ -733,9 +728,9 @@ ath5k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
733static int 728static int
734ath5k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant) 729ath5k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
735{ 730{
736 struct ath5k_softc *sc = hw->priv; 731 struct ath5k_hw *ah = hw->priv;
737 732
738 switch (sc->ah->ah_ant_mode) { 733 switch (ah->ah_ant_mode) {
739 case AR5K_ANTMODE_FIXED_A: 734 case AR5K_ANTMODE_FIXED_A:
740 *tx_ant = 1; *rx_ant = 1; break; 735 *tx_ant = 1; *rx_ant = 1; break;
741 case AR5K_ANTMODE_FIXED_B: 736 case AR5K_ANTMODE_FIXED_B:
@@ -750,9 +745,9 @@ ath5k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
750static void ath5k_get_ringparam(struct ieee80211_hw *hw, 745static void ath5k_get_ringparam(struct ieee80211_hw *hw,
751 u32 *tx, u32 *tx_max, u32 *rx, u32 *rx_max) 746 u32 *tx, u32 *tx_max, u32 *rx, u32 *rx_max)
752{ 747{
753 struct ath5k_softc *sc = hw->priv; 748 struct ath5k_hw *ah = hw->priv;
754 749
755 *tx = sc->txqs[AR5K_TX_QUEUE_ID_DATA_MIN].txq_max; 750 *tx = ah->txqs[AR5K_TX_QUEUE_ID_DATA_MIN].txq_max;
756 751
757 *tx_max = ATH5K_TXQ_LEN_MAX; 752 *tx_max = ATH5K_TXQ_LEN_MAX;
758 *rx = *rx_max = ATH_RXBUF; 753 *rx = *rx_max = ATH_RXBUF;
@@ -761,7 +756,7 @@ static void ath5k_get_ringparam(struct ieee80211_hw *hw,
761 756
762static int ath5k_set_ringparam(struct ieee80211_hw *hw, u32 tx, u32 rx) 757static int ath5k_set_ringparam(struct ieee80211_hw *hw, u32 tx, u32 rx)
763{ 758{
764 struct ath5k_softc *sc = hw->priv; 759 struct ath5k_hw *ah = hw->priv;
765 u16 qnum; 760 u16 qnum;
766 761
767 /* only support setting tx ring size for now */ 762 /* only support setting tx ring size for now */
@@ -772,16 +767,16 @@ static int ath5k_set_ringparam(struct ieee80211_hw *hw, u32 tx, u32 rx)
772 if (!tx || tx > ATH5K_TXQ_LEN_MAX) 767 if (!tx || tx > ATH5K_TXQ_LEN_MAX)
773 return -EINVAL; 768 return -EINVAL;
774 769
775 for (qnum = 0; qnum < ARRAY_SIZE(sc->txqs); qnum++) { 770 for (qnum = 0; qnum < ARRAY_SIZE(ah->txqs); qnum++) {
776 if (!sc->txqs[qnum].setup) 771 if (!ah->txqs[qnum].setup)
777 continue; 772 continue;
778 if (sc->txqs[qnum].qnum < AR5K_TX_QUEUE_ID_DATA_MIN || 773 if (ah->txqs[qnum].qnum < AR5K_TX_QUEUE_ID_DATA_MIN ||
779 sc->txqs[qnum].qnum > AR5K_TX_QUEUE_ID_DATA_MAX) 774 ah->txqs[qnum].qnum > AR5K_TX_QUEUE_ID_DATA_MAX)
780 continue; 775 continue;
781 776
782 sc->txqs[qnum].txq_max = tx; 777 ah->txqs[qnum].txq_max = tx;
783 if (sc->txqs[qnum].txq_len >= sc->txqs[qnum].txq_max) 778 if (ah->txqs[qnum].txq_len >= ah->txqs[qnum].txq_max)
784 ieee80211_stop_queue(hw, sc->txqs[qnum].qnum); 779 ieee80211_stop_queue(hw, ah->txqs[qnum].qnum);
785 } 780 }
786 781
787 return 0; 782 return 0;
diff --git a/drivers/net/wireless/ath/ath5k/pci.c b/drivers/net/wireless/ath/ath5k/pci.c
index aac5b7831948..eaf79b49341e 100644
--- a/drivers/net/wireless/ath/ath5k/pci.c
+++ b/drivers/net/wireless/ath/ath5k/pci.c
@@ -51,10 +51,10 @@ MODULE_DEVICE_TABLE(pci, ath5k_pci_id_table);
51/* return bus cachesize in 4B word units */ 51/* return bus cachesize in 4B word units */
52static void ath5k_pci_read_cachesize(struct ath_common *common, int *csz) 52static void ath5k_pci_read_cachesize(struct ath_common *common, int *csz)
53{ 53{
54 struct ath5k_softc *sc = (struct ath5k_softc *) common->priv; 54 struct ath5k_hw *ah = (struct ath5k_hw *) common->priv;
55 u8 u8tmp; 55 u8 u8tmp;
56 56
57 pci_read_config_byte(sc->pdev, PCI_CACHE_LINE_SIZE, &u8tmp); 57 pci_read_config_byte(ah->pdev, PCI_CACHE_LINE_SIZE, &u8tmp);
58 *csz = (int)u8tmp; 58 *csz = (int)u8tmp;
59 59
60 /* 60 /*
@@ -156,7 +156,7 @@ ath5k_pci_probe(struct pci_dev *pdev,
156 const struct pci_device_id *id) 156 const struct pci_device_id *id)
157{ 157{
158 void __iomem *mem; 158 void __iomem *mem;
159 struct ath5k_softc *sc; 159 struct ath5k_hw *ah;
160 struct ieee80211_hw *hw; 160 struct ieee80211_hw *hw;
161 int ret; 161 int ret;
162 u8 csz; 162 u8 csz;
@@ -243,7 +243,7 @@ ath5k_pci_probe(struct pci_dev *pdev,
243 * Allocate hw (mac80211 main struct) 243 * Allocate hw (mac80211 main struct)
244 * and hw->priv (driver private data) 244 * and hw->priv (driver private data)
245 */ 245 */
246 hw = ieee80211_alloc_hw(sizeof(*sc), &ath5k_hw_ops); 246 hw = ieee80211_alloc_hw(sizeof(*ah), &ath5k_hw_ops);
247 if (hw == NULL) { 247 if (hw == NULL) {
248 dev_err(&pdev->dev, "cannot allocate ieee80211_hw\n"); 248 dev_err(&pdev->dev, "cannot allocate ieee80211_hw\n");
249 ret = -ENOMEM; 249 ret = -ENOMEM;
@@ -252,16 +252,16 @@ ath5k_pci_probe(struct pci_dev *pdev,
252 252
253 dev_info(&pdev->dev, "registered as '%s'\n", wiphy_name(hw->wiphy)); 253 dev_info(&pdev->dev, "registered as '%s'\n", wiphy_name(hw->wiphy));
254 254
255 sc = hw->priv; 255 ah = hw->priv;
256 sc->hw = hw; 256 ah->hw = hw;
257 sc->pdev = pdev; 257 ah->pdev = pdev;
258 sc->dev = &pdev->dev; 258 ah->dev = &pdev->dev;
259 sc->irq = pdev->irq; 259 ah->irq = pdev->irq;
260 sc->devid = id->device; 260 ah->devid = id->device;
261 sc->iobase = mem; /* So we can unmap it on detach */ 261 ah->iobase = mem; /* So we can unmap it on detach */
262 262
263 /* Initialize */ 263 /* Initialize */
264 ret = ath5k_init_softc(sc, &ath_pci_bus_ops); 264 ret = ath5k_init_softc(ah, &ath_pci_bus_ops);
265 if (ret) 265 if (ret)
266 goto err_free; 266 goto err_free;
267 267
@@ -285,10 +285,10 @@ static void __devexit
285ath5k_pci_remove(struct pci_dev *pdev) 285ath5k_pci_remove(struct pci_dev *pdev)
286{ 286{
287 struct ieee80211_hw *hw = pci_get_drvdata(pdev); 287 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
288 struct ath5k_softc *sc = hw->priv; 288 struct ath5k_hw *ah = hw->priv;
289 289
290 ath5k_deinit_softc(sc); 290 ath5k_deinit_softc(ah);
291 pci_iounmap(pdev, sc->iobase); 291 pci_iounmap(pdev, ah->iobase);
292 pci_release_region(pdev, 0); 292 pci_release_region(pdev, 0);
293 pci_disable_device(pdev); 293 pci_disable_device(pdev);
294 ieee80211_free_hw(hw); 294 ieee80211_free_hw(hw);
@@ -299,9 +299,9 @@ static int ath5k_pci_suspend(struct device *dev)
299{ 299{
300 struct pci_dev *pdev = to_pci_dev(dev); 300 struct pci_dev *pdev = to_pci_dev(dev);
301 struct ieee80211_hw *hw = pci_get_drvdata(pdev); 301 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
302 struct ath5k_softc *sc = hw->priv; 302 struct ath5k_hw *ah = hw->priv;
303 303
304 ath5k_led_off(sc); 304 ath5k_led_off(ah);
305 return 0; 305 return 0;
306} 306}
307 307
@@ -309,7 +309,7 @@ static int ath5k_pci_resume(struct device *dev)
309{ 309{
310 struct pci_dev *pdev = to_pci_dev(dev); 310 struct pci_dev *pdev = to_pci_dev(dev);
311 struct ieee80211_hw *hw = pci_get_drvdata(pdev); 311 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
312 struct ath5k_softc *sc = hw->priv; 312 struct ath5k_hw *ah = hw->priv;
313 313
314 /* 314 /*
315 * Suspend/Resume resets the PCI configuration space, so we have to 315 * Suspend/Resume resets the PCI configuration space, so we have to
@@ -318,7 +318,7 @@ static int ath5k_pci_resume(struct device *dev)
318 */ 318 */
319 pci_write_config_byte(pdev, 0x41, 0); 319 pci_write_config_byte(pdev, 0x41, 0);
320 320
321 ath5k_led_enable(sc); 321 ath5k_led_enable(ah);
322 return 0; 322 return 0;
323} 323}
324 324
diff --git a/drivers/net/wireless/ath/ath5k/pcu.c b/drivers/net/wireless/ath/ath5k/pcu.c
index 618ee54d5fe5..067313845060 100644
--- a/drivers/net/wireless/ath/ath5k/pcu.c
+++ b/drivers/net/wireless/ath/ath5k/pcu.c
@@ -77,14 +77,13 @@ static const unsigned int ack_rates_high[] =
77int ath5k_hw_get_frame_duration(struct ath5k_hw *ah, 77int ath5k_hw_get_frame_duration(struct ath5k_hw *ah,
78 int len, struct ieee80211_rate *rate, bool shortpre) 78 int len, struct ieee80211_rate *rate, bool shortpre)
79{ 79{
80 struct ath5k_softc *sc = ah->ah_sc;
81 int sifs, preamble, plcp_bits, sym_time; 80 int sifs, preamble, plcp_bits, sym_time;
82 int bitrate, bits, symbols, symbol_bits; 81 int bitrate, bits, symbols, symbol_bits;
83 int dur; 82 int dur;
84 83
85 /* Fallback */ 84 /* Fallback */
86 if (!ah->ah_bwmode) { 85 if (!ah->ah_bwmode) {
87 __le16 raw_dur = ieee80211_generic_frame_duration(sc->hw, 86 __le16 raw_dur = ieee80211_generic_frame_duration(ah->hw,
88 NULL, len, rate); 87 NULL, len, rate);
89 88
90 /* subtract difference between long and short preamble */ 89 /* subtract difference between long and short preamble */
@@ -205,7 +204,7 @@ unsigned int ath5k_hw_get_default_sifs(struct ath5k_hw *ah)
205 */ 204 */
206void ath5k_hw_update_mib_counters(struct ath5k_hw *ah) 205void ath5k_hw_update_mib_counters(struct ath5k_hw *ah)
207{ 206{
208 struct ath5k_statistics *stats = &ah->ah_sc->stats; 207 struct ath5k_statistics *stats = &ah->stats;
209 208
210 /* Read-And-Clear */ 209 /* Read-And-Clear */
211 stats->ack_fail += ath5k_hw_reg_read(ah, AR5K_ACK_FAIL); 210 stats->ack_fail += ath5k_hw_reg_read(ah, AR5K_ACK_FAIL);
@@ -240,25 +239,24 @@ void ath5k_hw_update_mib_counters(struct ath5k_hw *ah)
240 */ 239 */
241static inline void ath5k_hw_write_rate_duration(struct ath5k_hw *ah) 240static inline void ath5k_hw_write_rate_duration(struct ath5k_hw *ah)
242{ 241{
243 struct ath5k_softc *sc = ah->ah_sc;
244 struct ieee80211_rate *rate; 242 struct ieee80211_rate *rate;
245 unsigned int i; 243 unsigned int i;
246 /* 802.11g covers both OFDM and CCK */ 244 /* 802.11g covers both OFDM and CCK */
247 u8 band = IEEE80211_BAND_2GHZ; 245 u8 band = IEEE80211_BAND_2GHZ;
248 246
249 /* Write rate duration table */ 247 /* Write rate duration table */
250 for (i = 0; i < sc->sbands[band].n_bitrates; i++) { 248 for (i = 0; i < ah->sbands[band].n_bitrates; i++) {
251 u32 reg; 249 u32 reg;
252 u16 tx_time; 250 u16 tx_time;
253 251
254 if (ah->ah_ack_bitrate_high) 252 if (ah->ah_ack_bitrate_high)
255 rate = &sc->sbands[band].bitrates[ack_rates_high[i]]; 253 rate = &ah->sbands[band].bitrates[ack_rates_high[i]];
256 /* CCK -> 1Mb */ 254 /* CCK -> 1Mb */
257 else if (i < 4) 255 else if (i < 4)
258 rate = &sc->sbands[band].bitrates[0]; 256 rate = &ah->sbands[band].bitrates[0];
259 /* OFDM -> 6Mb */ 257 /* OFDM -> 6Mb */
260 else 258 else
261 rate = &sc->sbands[band].bitrates[4]; 259 rate = &ah->sbands[band].bitrates[4];
262 260
263 /* Set ACK timeout */ 261 /* Set ACK timeout */
264 reg = AR5K_RATE_DUR(rate->hw_value); 262 reg = AR5K_RATE_DUR(rate->hw_value);
@@ -586,7 +584,7 @@ void ath5k_hw_init_beacon(struct ath5k_hw *ah, u32 next_beacon, u32 interval)
586 /* 584 /*
587 * Set the additional timers by mode 585 * Set the additional timers by mode
588 */ 586 */
589 switch (ah->ah_sc->opmode) { 587 switch (ah->opmode) {
590 case NL80211_IFTYPE_MONITOR: 588 case NL80211_IFTYPE_MONITOR:
591 case NL80211_IFTYPE_STATION: 589 case NL80211_IFTYPE_STATION:
592 /* In STA mode timer1 is used as next wakeup 590 /* In STA mode timer1 is used as next wakeup
@@ -623,8 +621,8 @@ void ath5k_hw_init_beacon(struct ath5k_hw *ah, u32 next_beacon, u32 interval)
623 * Set the beacon register and enable all timers. 621 * Set the beacon register and enable all timers.
624 */ 622 */
625 /* When in AP or Mesh Point mode zero timer0 to start TSF */ 623 /* When in AP or Mesh Point mode zero timer0 to start TSF */
626 if (ah->ah_sc->opmode == NL80211_IFTYPE_AP || 624 if (ah->opmode == NL80211_IFTYPE_AP ||
627 ah->ah_sc->opmode == NL80211_IFTYPE_MESH_POINT) 625 ah->opmode == NL80211_IFTYPE_MESH_POINT)
628 ath5k_hw_reg_write(ah, 0, AR5K_TIMER0); 626 ath5k_hw_reg_write(ah, 0, AR5K_TIMER0);
629 627
630 ath5k_hw_reg_write(ah, next_beacon, AR5K_TIMER0); 628 ath5k_hw_reg_write(ah, next_beacon, AR5K_TIMER0);
@@ -814,7 +812,7 @@ int ath5k_hw_set_opmode(struct ath5k_hw *ah, enum nl80211_iftype op_mode)
814 struct ath_common *common = ath5k_hw_common(ah); 812 struct ath_common *common = ath5k_hw_common(ah);
815 u32 pcu_reg, beacon_reg, low_id, high_id; 813 u32 pcu_reg, beacon_reg, low_id, high_id;
816 814
817 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_MODE, "mode %d\n", op_mode); 815 ATH5K_DBG(ah, ATH5K_DEBUG_MODE, "mode %d\n", op_mode);
818 816
819 /* Preserve rest settings */ 817 /* Preserve rest settings */
820 pcu_reg = ath5k_hw_reg_read(ah, AR5K_STA_ID1) & 0xffff0000; 818 pcu_reg = ath5k_hw_reg_read(ah, AR5K_STA_ID1) & 0xffff0000;
@@ -890,7 +888,7 @@ void ath5k_hw_pcu_init(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
890 * XXX: rethink this after new mode changes to 888 * XXX: rethink this after new mode changes to
891 * mac80211 are integrated */ 889 * mac80211 are integrated */
892 if (ah->ah_version == AR5K_AR5212 && 890 if (ah->ah_version == AR5K_AR5212 &&
893 ah->ah_sc->nvifs) 891 ah->nvifs)
894 ath5k_hw_write_rate_duration(ah); 892 ath5k_hw_write_rate_duration(ah);
895 893
896 /* Set RSSI/BRSSI thresholds 894 /* Set RSSI/BRSSI thresholds
diff --git a/drivers/net/wireless/ath/ath5k/phy.c b/drivers/net/wireless/ath/ath5k/phy.c
index dd2b417729ba..a0c66cfe862f 100644
--- a/drivers/net/wireless/ath/ath5k/phy.c
+++ b/drivers/net/wireless/ath/ath5k/phy.c
@@ -561,7 +561,7 @@ static s8 ath5k_hw_rf_gainf_adjust(struct ath5k_hw *ah)
561 } 561 }
562 562
563done: 563done:
564 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_CALIBRATE, 564 ATH5K_DBG(ah, ATH5K_DEBUG_CALIBRATE,
565 "ret %d, gain step %u, current gain %u, target gain %u\n", 565 "ret %d, gain step %u, current gain %u, target gain %u\n",
566 ret, ah->ah_gain.g_step_idx, ah->ah_gain.g_current, 566 ret, ah->ah_gain.g_step_idx, ah->ah_gain.g_current,
567 ah->ah_gain.g_target); 567 ah->ah_gain.g_target);
@@ -773,7 +773,7 @@ static int ath5k_hw_rfregs_init(struct ath5k_hw *ah,
773 ah->ah_rf_banks = kmalloc(sizeof(u32) * ah->ah_rf_banks_size, 773 ah->ah_rf_banks = kmalloc(sizeof(u32) * ah->ah_rf_banks_size,
774 GFP_KERNEL); 774 GFP_KERNEL);
775 if (ah->ah_rf_banks == NULL) { 775 if (ah->ah_rf_banks == NULL) {
776 ATH5K_ERR(ah->ah_sc, "out of memory\n"); 776 ATH5K_ERR(ah, "out of memory\n");
777 return -ENOMEM; 777 return -ENOMEM;
778 } 778 }
779 } 779 }
@@ -783,7 +783,7 @@ static int ath5k_hw_rfregs_init(struct ath5k_hw *ah,
783 783
784 for (i = 0; i < ah->ah_rf_banks_size; i++) { 784 for (i = 0; i < ah->ah_rf_banks_size; i++) {
785 if (ini_rfb[i].rfb_bank >= AR5K_MAX_RF_BANKS) { 785 if (ini_rfb[i].rfb_bank >= AR5K_MAX_RF_BANKS) {
786 ATH5K_ERR(ah->ah_sc, "invalid bank\n"); 786 ATH5K_ERR(ah, "invalid bank\n");
787 return -EINVAL; 787 return -EINVAL;
788 } 788 }
789 789
@@ -1268,7 +1268,7 @@ static int ath5k_hw_channel(struct ath5k_hw *ah,
1268 * (CHANNEL_2GHZ, or CHANNEL_5GHZ) so we inform ath5k_channel_ok() 1268 * (CHANNEL_2GHZ, or CHANNEL_5GHZ) so we inform ath5k_channel_ok()
1269 * of the band by that */ 1269 * of the band by that */
1270 if (!ath5k_channel_ok(ah, channel->center_freq, channel->hw_value)) { 1270 if (!ath5k_channel_ok(ah, channel->center_freq, channel->hw_value)) {
1271 ATH5K_ERR(ah->ah_sc, 1271 ATH5K_ERR(ah,
1272 "channel frequency (%u MHz) out of supported " 1272 "channel frequency (%u MHz) out of supported "
1273 "band range\n", 1273 "band range\n",
1274 channel->center_freq); 1274 channel->center_freq);
@@ -1356,7 +1356,7 @@ static s16 ath5k_hw_get_median_noise_floor(struct ath5k_hw *ah)
1356 } 1356 }
1357 } 1357 }
1358 for (i = 0; i < ATH5K_NF_CAL_HIST_MAX; i++) { 1358 for (i = 0; i < ATH5K_NF_CAL_HIST_MAX; i++) {
1359 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_CALIBRATE, 1359 ATH5K_DBG(ah, ATH5K_DEBUG_CALIBRATE,
1360 "cal %d:%d\n", i, sort[i]); 1360 "cal %d:%d\n", i, sort[i]);
1361 } 1361 }
1362 return sort[(ATH5K_NF_CAL_HIST_MAX - 1) / 2]; 1362 return sort[(ATH5K_NF_CAL_HIST_MAX - 1) / 2];
@@ -1382,7 +1382,7 @@ void ath5k_hw_update_noise_floor(struct ath5k_hw *ah)
1382 1382
1383 /* keep last value if calibration hasn't completed */ 1383 /* keep last value if calibration hasn't completed */
1384 if (ath5k_hw_reg_read(ah, AR5K_PHY_AGCCTL) & AR5K_PHY_AGCCTL_NF) { 1384 if (ath5k_hw_reg_read(ah, AR5K_PHY_AGCCTL) & AR5K_PHY_AGCCTL_NF) {
1385 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_CALIBRATE, 1385 ATH5K_DBG(ah, ATH5K_DEBUG_CALIBRATE,
1386 "NF did not complete in calibration window\n"); 1386 "NF did not complete in calibration window\n");
1387 1387
1388 return; 1388 return;
@@ -1395,7 +1395,7 @@ void ath5k_hw_update_noise_floor(struct ath5k_hw *ah)
1395 threshold = ee->ee_noise_floor_thr[ee_mode]; 1395 threshold = ee->ee_noise_floor_thr[ee_mode];
1396 1396
1397 if (nf > threshold) { 1397 if (nf > threshold) {
1398 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_CALIBRATE, 1398 ATH5K_DBG(ah, ATH5K_DEBUG_CALIBRATE,
1399 "noise floor failure detected; " 1399 "noise floor failure detected; "
1400 "read %d, threshold %d\n", 1400 "read %d, threshold %d\n",
1401 nf, threshold); 1401 nf, threshold);
@@ -1432,7 +1432,7 @@ void ath5k_hw_update_noise_floor(struct ath5k_hw *ah)
1432 1432
1433 ah->ah_noise_floor = nf; 1433 ah->ah_noise_floor = nf;
1434 1434
1435 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_CALIBRATE, 1435 ATH5K_DBG(ah, ATH5K_DEBUG_CALIBRATE,
1436 "noise floor calibrated: %d\n", nf); 1436 "noise floor calibrated: %d\n", nf);
1437} 1437}
1438 1438
@@ -1520,7 +1520,7 @@ static int ath5k_hw_rf5110_calibrate(struct ath5k_hw *ah,
1520 ath5k_hw_reg_write(ah, phy_sat, AR5K_PHY_ADCSAT); 1520 ath5k_hw_reg_write(ah, phy_sat, AR5K_PHY_ADCSAT);
1521 1521
1522 if (ret) { 1522 if (ret) {
1523 ATH5K_ERR(ah->ah_sc, "calibration timeout (%uMHz)\n", 1523 ATH5K_ERR(ah, "calibration timeout (%uMHz)\n",
1524 channel->center_freq); 1524 channel->center_freq);
1525 return ret; 1525 return ret;
1526 } 1526 }
@@ -1555,7 +1555,7 @@ ath5k_hw_rf511x_iq_calibrate(struct ath5k_hw *ah)
1555 iq_corr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_CORR); 1555 iq_corr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_CORR);
1556 i_pwr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_PWR_I); 1556 i_pwr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_PWR_I);
1557 q_pwr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_PWR_Q); 1557 q_pwr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_PWR_Q);
1558 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_CALIBRATE, 1558 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_CALIBRATE,
1559 "iq_corr:%x i_pwr:%x q_pwr:%x", iq_corr, i_pwr, q_pwr); 1559 "iq_corr:%x i_pwr:%x q_pwr:%x", iq_corr, i_pwr, q_pwr);
1560 if (i_pwr && q_pwr) 1560 if (i_pwr && q_pwr)
1561 break; 1561 break;
@@ -1581,7 +1581,7 @@ ath5k_hw_rf511x_iq_calibrate(struct ath5k_hw *ah)
1581 q_coff = (i_pwr / q_coffd) - 128; 1581 q_coff = (i_pwr / q_coffd) - 128;
1582 q_coff = clamp(q_coff, -16, 15); /* signed 5 bit */ 1582 q_coff = clamp(q_coff, -16, 15); /* signed 5 bit */
1583 1583
1584 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_CALIBRATE, 1584 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_CALIBRATE,
1585 "new I:%d Q:%d (i_coffd:%x q_coffd:%x)", 1585 "new I:%d Q:%d (i_coffd:%x q_coffd:%x)",
1586 i_coff, q_coff, i_coffd, q_coffd); 1586 i_coff, q_coff, i_coffd, q_coffd);
1587 1587
@@ -1966,7 +1966,7 @@ ath5k_hw_set_antenna_mode(struct ath5k_hw *ah, u8 ant_mode)
1966 1966
1967 ee_mode = ath5k_eeprom_mode_from_channel(channel); 1967 ee_mode = ath5k_eeprom_mode_from_channel(channel);
1968 if (ee_mode < 0) { 1968 if (ee_mode < 0) {
1969 ATH5K_ERR(ah->ah_sc, 1969 ATH5K_ERR(ah,
1970 "invalid channel: %d\n", channel->center_freq); 1970 "invalid channel: %d\n", channel->center_freq);
1971 return; 1971 return;
1972 } 1972 }
@@ -3122,13 +3122,13 @@ ath5k_hw_txpower(struct ath5k_hw *ah, struct ieee80211_channel *channel,
3122 int ret; 3122 int ret;
3123 3123
3124 if (txpower > AR5K_TUNE_MAX_TXPOWER) { 3124 if (txpower > AR5K_TUNE_MAX_TXPOWER) {
3125 ATH5K_ERR(ah->ah_sc, "invalid tx power: %u\n", txpower); 3125 ATH5K_ERR(ah, "invalid tx power: %u\n", txpower);
3126 return -EINVAL; 3126 return -EINVAL;
3127 } 3127 }
3128 3128
3129 ee_mode = ath5k_eeprom_mode_from_channel(channel); 3129 ee_mode = ath5k_eeprom_mode_from_channel(channel);
3130 if (ee_mode < 0) { 3130 if (ee_mode < 0) {
3131 ATH5K_ERR(ah->ah_sc, 3131 ATH5K_ERR(ah,
3132 "invalid channel: %d\n", channel->center_freq); 3132 "invalid channel: %d\n", channel->center_freq);
3133 return -EINVAL; 3133 return -EINVAL;
3134 } 3134 }
@@ -3229,7 +3229,7 @@ ath5k_hw_txpower(struct ath5k_hw *ah, struct ieee80211_channel *channel,
3229 3229
3230int ath5k_hw_set_txpower_limit(struct ath5k_hw *ah, u8 txpower) 3230int ath5k_hw_set_txpower_limit(struct ath5k_hw *ah, u8 txpower)
3231{ 3231{
3232 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_TXPOWER, 3232 ATH5K_DBG(ah, ATH5K_DEBUG_TXPOWER,
3233 "changing txpower to %d\n", txpower); 3233 "changing txpower to %d\n", txpower);
3234 3234
3235 return ath5k_hw_txpower(ah, ah->ah_current_channel, txpower); 3235 return ath5k_hw_txpower(ah, ah->ah_current_channel, txpower);
@@ -3440,7 +3440,7 @@ int ath5k_hw_phy_init(struct ath5k_hw *ah, struct ieee80211_channel *channel,
3440 * during ath5k_phy_calibrate) */ 3440 * during ath5k_phy_calibrate) */
3441 if (ath5k_hw_register_timeout(ah, AR5K_PHY_AGCCTL, 3441 if (ath5k_hw_register_timeout(ah, AR5K_PHY_AGCCTL,
3442 AR5K_PHY_AGCCTL_CAL, 0, false)) { 3442 AR5K_PHY_AGCCTL_CAL, 0, false)) {
3443 ATH5K_ERR(ah->ah_sc, "gain calibration timeout (%uMHz)\n", 3443 ATH5K_ERR(ah, "gain calibration timeout (%uMHz)\n",
3444 channel->center_freq); 3444 channel->center_freq);
3445 } 3445 }
3446 3446
diff --git a/drivers/net/wireless/ath/ath5k/qcu.c b/drivers/net/wireless/ath/ath5k/qcu.c
index b18c5021aac3..65f10398999e 100644
--- a/drivers/net/wireless/ath/ath5k/qcu.c
+++ b/drivers/net/wireless/ath/ath5k/qcu.c
@@ -187,7 +187,7 @@ int ath5k_hw_setup_tx_queue(struct ath5k_hw *ah, enum ath5k_tx_queue queue_type,
187 break; 187 break;
188 case AR5K_TX_QUEUE_XR_DATA: 188 case AR5K_TX_QUEUE_XR_DATA:
189 if (ah->ah_version != AR5K_AR5212) 189 if (ah->ah_version != AR5K_AR5212)
190 ATH5K_ERR(ah->ah_sc, 190 ATH5K_ERR(ah,
191 "XR data queues only supported in" 191 "XR data queues only supported in"
192 " 5212!\n"); 192 " 5212!\n");
193 queue = AR5K_TX_QUEUE_ID_XR_DATA; 193 queue = AR5K_TX_QUEUE_ID_XR_DATA;
@@ -510,7 +510,6 @@ int ath5k_hw_reset_tx_queue(struct ath5k_hw *ah, unsigned int queue)
510int ath5k_hw_set_ifs_intervals(struct ath5k_hw *ah, unsigned int slot_time) 510int ath5k_hw_set_ifs_intervals(struct ath5k_hw *ah, unsigned int slot_time)
511{ 511{
512 struct ieee80211_channel *channel = ah->ah_current_channel; 512 struct ieee80211_channel *channel = ah->ah_current_channel;
513 struct ath5k_softc *sc = ah->ah_sc;
514 struct ieee80211_rate *rate; 513 struct ieee80211_rate *rate;
515 u32 ack_tx_time, eifs, eifs_clock, sifs, sifs_clock; 514 u32 ack_tx_time, eifs, eifs_clock, sifs, sifs_clock;
516 u32 slot_time_clock = ath5k_hw_htoclock(ah, slot_time); 515 u32 slot_time_clock = ath5k_hw_htoclock(ah, slot_time);
@@ -546,9 +545,9 @@ int ath5k_hw_set_ifs_intervals(struct ath5k_hw *ah, unsigned int slot_time)
546 * Also we have different lowest rate for 802.11a 545 * Also we have different lowest rate for 802.11a
547 */ 546 */
548 if (channel->hw_value & CHANNEL_5GHZ) 547 if (channel->hw_value & CHANNEL_5GHZ)
549 rate = &sc->sbands[IEEE80211_BAND_5GHZ].bitrates[0]; 548 rate = &ah->sbands[IEEE80211_BAND_5GHZ].bitrates[0];
550 else 549 else
551 rate = &sc->sbands[IEEE80211_BAND_2GHZ].bitrates[0]; 550 rate = &ah->sbands[IEEE80211_BAND_2GHZ].bitrates[0];
552 551
553 ack_tx_time = ath5k_hw_get_frame_duration(ah, 10, rate, false); 552 ack_tx_time = ath5k_hw_get_frame_duration(ah, 10, rate, false);
554 553
@@ -622,7 +621,7 @@ int ath5k_hw_init_queues(struct ath5k_hw *ah)
622 for (i = 0; i < ah->ah_capabilities.cap_queues.q_tx_num; i++) { 621 for (i = 0; i < ah->ah_capabilities.cap_queues.q_tx_num; i++) {
623 ret = ath5k_hw_reset_tx_queue(ah, i); 622 ret = ath5k_hw_reset_tx_queue(ah, i);
624 if (ret) { 623 if (ret) {
625 ATH5K_ERR(ah->ah_sc, 624 ATH5K_ERR(ah,
626 "failed to reset TX queue #%d\n", i); 625 "failed to reset TX queue #%d\n", i);
627 return ret; 626 return ret;
628 } 627 }
diff --git a/drivers/net/wireless/ath/ath5k/reset.c b/drivers/net/wireless/ath/ath5k/reset.c
index 9f9c2ad3ca66..0686c5d8d56e 100644
--- a/drivers/net/wireless/ath/ath5k/reset.c
+++ b/drivers/net/wireless/ath/ath5k/reset.c
@@ -390,7 +390,7 @@ static int ath5k_hw_wisoc_reset(struct ath5k_hw *ah, u32 flags)
390 u32 val = 0; 390 u32 val = 0;
391 391
392 /* ah->ah_mac_srev is not available at this point yet */ 392 /* ah->ah_mac_srev is not available at this point yet */
393 if (ah->ah_sc->devid >= AR5K_SREV_AR2315_R6) { 393 if (ah->devid >= AR5K_SREV_AR2315_R6) {
394 reg = (u32 __iomem *) AR5K_AR2315_RESET; 394 reg = (u32 __iomem *) AR5K_AR2315_RESET;
395 if (mask & AR5K_RESET_CTL_PCU) 395 if (mask & AR5K_RESET_CTL_PCU)
396 val |= AR5K_AR2315_RESET_WMAC; 396 val |= AR5K_AR2315_RESET_WMAC;
@@ -398,7 +398,7 @@ static int ath5k_hw_wisoc_reset(struct ath5k_hw *ah, u32 flags)
398 val |= AR5K_AR2315_RESET_BB_WARM; 398 val |= AR5K_AR2315_RESET_BB_WARM;
399 } else { 399 } else {
400 reg = (u32 __iomem *) AR5K_AR5312_RESET; 400 reg = (u32 __iomem *) AR5K_AR5312_RESET;
401 if (to_platform_device(ah->ah_sc->dev)->id == 0) { 401 if (to_platform_device(ah->dev)->id == 0) {
402 if (mask & AR5K_RESET_CTL_PCU) 402 if (mask & AR5K_RESET_CTL_PCU)
403 val |= AR5K_AR5312_RESET_WMAC0; 403 val |= AR5K_AR5312_RESET_WMAC0;
404 if (mask & AR5K_RESET_CTL_BASEBAND) 404 if (mask & AR5K_RESET_CTL_BASEBAND)
@@ -530,7 +530,7 @@ commit:
530 */ 530 */
531int ath5k_hw_on_hold(struct ath5k_hw *ah) 531int ath5k_hw_on_hold(struct ath5k_hw *ah)
532{ 532{
533 struct pci_dev *pdev = ah->ah_sc->pdev; 533 struct pci_dev *pdev = ah->pdev;
534 u32 bus_flags; 534 u32 bus_flags;
535 int ret; 535 int ret;
536 536
@@ -540,7 +540,7 @@ int ath5k_hw_on_hold(struct ath5k_hw *ah)
540 /* Make sure device is awake */ 540 /* Make sure device is awake */
541 ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0); 541 ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0);
542 if (ret) { 542 if (ret) {
543 ATH5K_ERR(ah->ah_sc, "failed to wakeup the MAC Chip\n"); 543 ATH5K_ERR(ah, "failed to wakeup the MAC Chip\n");
544 return ret; 544 return ret;
545 } 545 }
546 546
@@ -565,14 +565,14 @@ int ath5k_hw_on_hold(struct ath5k_hw *ah)
565 } 565 }
566 566
567 if (ret) { 567 if (ret) {
568 ATH5K_ERR(ah->ah_sc, "failed to put device on warm reset\n"); 568 ATH5K_ERR(ah, "failed to put device on warm reset\n");
569 return -EIO; 569 return -EIO;
570 } 570 }
571 571
572 /* ...wakeup again!*/ 572 /* ...wakeup again!*/
573 ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0); 573 ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0);
574 if (ret) { 574 if (ret) {
575 ATH5K_ERR(ah->ah_sc, "failed to put device on hold\n"); 575 ATH5K_ERR(ah, "failed to put device on hold\n");
576 return ret; 576 return ret;
577 } 577 }
578 578
@@ -584,7 +584,7 @@ int ath5k_hw_on_hold(struct ath5k_hw *ah)
584 */ 584 */
585int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial) 585int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial)
586{ 586{
587 struct pci_dev *pdev = ah->ah_sc->pdev; 587 struct pci_dev *pdev = ah->pdev;
588 u32 turbo, mode, clock, bus_flags; 588 u32 turbo, mode, clock, bus_flags;
589 int ret; 589 int ret;
590 590
@@ -596,7 +596,7 @@ int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial)
596 /* Wakeup the device */ 596 /* Wakeup the device */
597 ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0); 597 ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0);
598 if (ret) { 598 if (ret) {
599 ATH5K_ERR(ah->ah_sc, "failed to wakeup the MAC Chip\n"); 599 ATH5K_ERR(ah, "failed to wakeup the MAC Chip\n");
600 return ret; 600 return ret;
601 } 601 }
602 } 602 }
@@ -626,14 +626,14 @@ int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial)
626 } 626 }
627 627
628 if (ret) { 628 if (ret) {
629 ATH5K_ERR(ah->ah_sc, "failed to reset the MAC Chip\n"); 629 ATH5K_ERR(ah, "failed to reset the MAC Chip\n");
630 return -EIO; 630 return -EIO;
631 } 631 }
632 632
633 /* ...wakeup again!...*/ 633 /* ...wakeup again!...*/
634 ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0); 634 ret = ath5k_hw_set_power(ah, AR5K_PM_AWAKE, true, 0);
635 if (ret) { 635 if (ret) {
636 ATH5K_ERR(ah->ah_sc, "failed to resume the MAC Chip\n"); 636 ATH5K_ERR(ah, "failed to resume the MAC Chip\n");
637 return ret; 637 return ret;
638 } 638 }
639 639
@@ -646,7 +646,7 @@ int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial)
646 ret = ath5k_hw_nic_reset(ah, 0); 646 ret = ath5k_hw_nic_reset(ah, 0);
647 647
648 if (ret) { 648 if (ret) {
649 ATH5K_ERR(ah->ah_sc, "failed to warm reset the MAC Chip\n"); 649 ATH5K_ERR(ah, "failed to warm reset the MAC Chip\n");
650 return -EIO; 650 return -EIO;
651 } 651 }
652 652
@@ -687,7 +687,7 @@ int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial)
687 else 687 else
688 mode |= AR5K_PHY_MODE_MOD_DYN; 688 mode |= AR5K_PHY_MODE_MOD_DYN;
689 } else { 689 } else {
690 ATH5K_ERR(ah->ah_sc, 690 ATH5K_ERR(ah,
691 "invalid radio modulation mode\n"); 691 "invalid radio modulation mode\n");
692 return -EINVAL; 692 return -EINVAL;
693 } 693 }
@@ -703,12 +703,12 @@ int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, int flags, bool initial)
703 if (flags & CHANNEL_OFDM) 703 if (flags & CHANNEL_OFDM)
704 mode |= AR5K_PHY_MODE_MOD_OFDM; 704 mode |= AR5K_PHY_MODE_MOD_OFDM;
705 else { 705 else {
706 ATH5K_ERR(ah->ah_sc, 706 ATH5K_ERR(ah,
707 "invalid radio modulation mode\n"); 707 "invalid radio modulation mode\n");
708 return -EINVAL; 708 return -EINVAL;
709 } 709 }
710 } else { 710 } else {
711 ATH5K_ERR(ah->ah_sc, "invalid radio frequency mode\n"); 711 ATH5K_ERR(ah, "invalid radio frequency mode\n");
712 return -EINVAL; 712 return -EINVAL;
713 } 713 }
714 714
@@ -1076,7 +1076,7 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
1076 /* RF Bus grant won't work if we have pending 1076 /* RF Bus grant won't work if we have pending
1077 * frames */ 1077 * frames */
1078 if (ret && fast) { 1078 if (ret && fast) {
1079 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_RESET, 1079 ATH5K_DBG(ah, ATH5K_DEBUG_RESET,
1080 "DMA didn't stop, falling back to normal reset\n"); 1080 "DMA didn't stop, falling back to normal reset\n");
1081 fast = 0; 1081 fast = 0;
1082 /* Non fatal, just continue with 1082 /* Non fatal, just continue with
@@ -1091,7 +1091,7 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
1091 case CHANNEL_G: 1091 case CHANNEL_G:
1092 1092
1093 if (ah->ah_version <= AR5K_AR5211) { 1093 if (ah->ah_version <= AR5K_AR5211) {
1094 ATH5K_ERR(ah->ah_sc, 1094 ATH5K_ERR(ah,
1095 "G mode not available on 5210/5211"); 1095 "G mode not available on 5210/5211");
1096 return -EINVAL; 1096 return -EINVAL;
1097 } 1097 }
@@ -1101,7 +1101,7 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
1101 case CHANNEL_B: 1101 case CHANNEL_B:
1102 1102
1103 if (ah->ah_version < AR5K_AR5211) { 1103 if (ah->ah_version < AR5K_AR5211) {
1104 ATH5K_ERR(ah->ah_sc, 1104 ATH5K_ERR(ah,
1105 "B mode not available on 5210"); 1105 "B mode not available on 5210");
1106 return -EINVAL; 1106 return -EINVAL;
1107 } 1107 }
@@ -1110,14 +1110,14 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
1110 break; 1110 break;
1111 case CHANNEL_XR: 1111 case CHANNEL_XR:
1112 if (ah->ah_version == AR5K_AR5211) { 1112 if (ah->ah_version == AR5K_AR5211) {
1113 ATH5K_ERR(ah->ah_sc, 1113 ATH5K_ERR(ah,
1114 "XR mode not available on 5211"); 1114 "XR mode not available on 5211");
1115 return -EINVAL; 1115 return -EINVAL;
1116 } 1116 }
1117 mode = AR5K_MODE_XR; 1117 mode = AR5K_MODE_XR;
1118 break; 1118 break;
1119 default: 1119 default:
1120 ATH5K_ERR(ah->ah_sc, 1120 ATH5K_ERR(ah,
1121 "invalid channel: %d\n", channel->center_freq); 1121 "invalid channel: %d\n", channel->center_freq);
1122 return -EINVAL; 1122 return -EINVAL;
1123 } 1123 }
@@ -1129,13 +1129,13 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
1129 if (fast) { 1129 if (fast) {
1130 ret = ath5k_hw_phy_init(ah, channel, mode, true); 1130 ret = ath5k_hw_phy_init(ah, channel, mode, true);
1131 if (ret) { 1131 if (ret) {
1132 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_RESET, 1132 ATH5K_DBG(ah, ATH5K_DEBUG_RESET,
1133 "fast chan change failed, falling back to normal reset\n"); 1133 "fast chan change failed, falling back to normal reset\n");
1134 /* Non fatal, can happen eg. 1134 /* Non fatal, can happen eg.
1135 * on mode change */ 1135 * on mode change */
1136 ret = 0; 1136 ret = 0;
1137 } else { 1137 } else {
1138 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_RESET, 1138 ATH5K_DBG(ah, ATH5K_DEBUG_RESET,
1139 "fast chan change successful\n"); 1139 "fast chan change successful\n");
1140 return 0; 1140 return 0;
1141 } 1141 }
@@ -1268,7 +1268,7 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
1268 */ 1268 */
1269 ret = ath5k_hw_phy_init(ah, channel, mode, false); 1269 ret = ath5k_hw_phy_init(ah, channel, mode, false);
1270 if (ret) { 1270 if (ret) {
1271 ATH5K_ERR(ah->ah_sc, 1271 ATH5K_ERR(ah,
1272 "failed to initialize PHY (%i) !\n", ret); 1272 "failed to initialize PHY (%i) !\n", ret);
1273 return ret; 1273 return ret;
1274 } 1274 }
diff --git a/drivers/net/wireless/ath/ath5k/rfkill.c b/drivers/net/wireless/ath/ath5k/rfkill.c
index 41a877b73fce..945fc9f21e76 100644
--- a/drivers/net/wireless/ath/ath5k/rfkill.c
+++ b/drivers/net/wireless/ath/ath5k/rfkill.c
@@ -36,86 +36,81 @@
36#include "base.h" 36#include "base.h"
37 37
38 38
39static inline void ath5k_rfkill_disable(struct ath5k_softc *sc) 39static inline void ath5k_rfkill_disable(struct ath5k_hw *ah)
40{ 40{
41 ATH5K_DBG(sc, ATH5K_DEBUG_ANY, "rfkill disable (gpio:%d polarity:%d)\n", 41 ATH5K_DBG(ah, ATH5K_DEBUG_ANY, "rfkill disable (gpio:%d polarity:%d)\n",
42 sc->rf_kill.gpio, sc->rf_kill.polarity); 42 ah->rf_kill.gpio, ah->rf_kill.polarity);
43 ath5k_hw_set_gpio_output(sc->ah, sc->rf_kill.gpio); 43 ath5k_hw_set_gpio_output(ah, ah->rf_kill.gpio);
44 ath5k_hw_set_gpio(sc->ah, sc->rf_kill.gpio, !sc->rf_kill.polarity); 44 ath5k_hw_set_gpio(ah, ah->rf_kill.gpio, !ah->rf_kill.polarity);
45} 45}
46 46
47 47
48static inline void ath5k_rfkill_enable(struct ath5k_softc *sc) 48static inline void ath5k_rfkill_enable(struct ath5k_hw *ah)
49{ 49{
50 ATH5K_DBG(sc, ATH5K_DEBUG_ANY, "rfkill enable (gpio:%d polarity:%d)\n", 50 ATH5K_DBG(ah, ATH5K_DEBUG_ANY, "rfkill enable (gpio:%d polarity:%d)\n",
51 sc->rf_kill.gpio, sc->rf_kill.polarity); 51 ah->rf_kill.gpio, ah->rf_kill.polarity);
52 ath5k_hw_set_gpio_output(sc->ah, sc->rf_kill.gpio); 52 ath5k_hw_set_gpio_output(ah, ah->rf_kill.gpio);
53 ath5k_hw_set_gpio(sc->ah, sc->rf_kill.gpio, sc->rf_kill.polarity); 53 ath5k_hw_set_gpio(ah, ah->rf_kill.gpio, ah->rf_kill.polarity);
54} 54}
55 55
56static inline void ath5k_rfkill_set_intr(struct ath5k_softc *sc, bool enable) 56static inline void ath5k_rfkill_set_intr(struct ath5k_hw *ah, bool enable)
57{ 57{
58 struct ath5k_hw *ah = sc->ah;
59 u32 curval; 58 u32 curval;
60 59
61 ath5k_hw_set_gpio_input(ah, sc->rf_kill.gpio); 60 ath5k_hw_set_gpio_input(ah, ah->rf_kill.gpio);
62 curval = ath5k_hw_get_gpio(ah, sc->rf_kill.gpio); 61 curval = ath5k_hw_get_gpio(ah, ah->rf_kill.gpio);
63 ath5k_hw_set_gpio_intr(ah, sc->rf_kill.gpio, enable ? 62 ath5k_hw_set_gpio_intr(ah, ah->rf_kill.gpio, enable ?
64 !!curval : !curval); 63 !!curval : !curval);
65} 64}
66 65
67static bool 66static bool
68ath5k_is_rfkill_set(struct ath5k_softc *sc) 67ath5k_is_rfkill_set(struct ath5k_hw *ah)
69{ 68{
70 /* configuring GPIO for input for some reason disables rfkill */ 69 /* configuring GPIO for input for some reason disables rfkill */
71 /*ath5k_hw_set_gpio_input(sc->ah, sc->rf_kill.gpio);*/ 70 /*ath5k_hw_set_gpio_input(ah, ah->rf_kill.gpio);*/
72 return ath5k_hw_get_gpio(sc->ah, sc->rf_kill.gpio) == 71 return ath5k_hw_get_gpio(ah, ah->rf_kill.gpio) ==
73 sc->rf_kill.polarity; 72 ah->rf_kill.polarity;
74} 73}
75 74
76static void 75static void
77ath5k_tasklet_rfkill_toggle(unsigned long data) 76ath5k_tasklet_rfkill_toggle(unsigned long data)
78{ 77{
79 struct ath5k_softc *sc = (void *)data; 78 struct ath5k_hw *ah = (void *)data;
80 bool blocked; 79 bool blocked;
81 80
82 blocked = ath5k_is_rfkill_set(sc); 81 blocked = ath5k_is_rfkill_set(ah);
83 wiphy_rfkill_set_hw_state(sc->hw->wiphy, blocked); 82 wiphy_rfkill_set_hw_state(ah->hw->wiphy, blocked);
84} 83}
85 84
86 85
87void 86void
88ath5k_rfkill_hw_start(struct ath5k_hw *ah) 87ath5k_rfkill_hw_start(struct ath5k_hw *ah)
89{ 88{
90 struct ath5k_softc *sc = ah->ah_sc;
91
92 /* read rfkill GPIO configuration from EEPROM header */ 89 /* read rfkill GPIO configuration from EEPROM header */
93 sc->rf_kill.gpio = ah->ah_capabilities.cap_eeprom.ee_rfkill_pin; 90 ah->rf_kill.gpio = ah->ah_capabilities.cap_eeprom.ee_rfkill_pin;
94 sc->rf_kill.polarity = ah->ah_capabilities.cap_eeprom.ee_rfkill_pol; 91 ah->rf_kill.polarity = ah->ah_capabilities.cap_eeprom.ee_rfkill_pol;
95 92
96 tasklet_init(&sc->rf_kill.toggleq, ath5k_tasklet_rfkill_toggle, 93 tasklet_init(&ah->rf_kill.toggleq, ath5k_tasklet_rfkill_toggle,
97 (unsigned long)sc); 94 (unsigned long)ah);
98 95
99 ath5k_rfkill_disable(sc); 96 ath5k_rfkill_disable(ah);
100 97
101 /* enable interrupt for rfkill switch */ 98 /* enable interrupt for rfkill switch */
102 if (AR5K_EEPROM_HDR_RFKILL(ah->ah_capabilities.cap_eeprom.ee_header)) 99 if (AR5K_EEPROM_HDR_RFKILL(ah->ah_capabilities.cap_eeprom.ee_header))
103 ath5k_rfkill_set_intr(sc, true); 100 ath5k_rfkill_set_intr(ah, true);
104} 101}
105 102
106 103
107void 104void
108ath5k_rfkill_hw_stop(struct ath5k_hw *ah) 105ath5k_rfkill_hw_stop(struct ath5k_hw *ah)
109{ 106{
110 struct ath5k_softc *sc = ah->ah_sc;
111
112 /* disable interrupt for rfkill switch */ 107 /* disable interrupt for rfkill switch */
113 if (AR5K_EEPROM_HDR_RFKILL(ah->ah_capabilities.cap_eeprom.ee_header)) 108 if (AR5K_EEPROM_HDR_RFKILL(ah->ah_capabilities.cap_eeprom.ee_header))
114 ath5k_rfkill_set_intr(sc, false); 109 ath5k_rfkill_set_intr(ah, false);
115 110
116 tasklet_kill(&sc->rf_kill.toggleq); 111 tasklet_kill(&ah->rf_kill.toggleq);
117 112
118 /* enable RFKILL when stopping HW so Wifi LED is turned off */ 113 /* enable RFKILL when stopping HW so Wifi LED is turned off */
119 ath5k_rfkill_enable(sc); 114 ath5k_rfkill_enable(ah);
120} 115}
121 116
diff --git a/drivers/net/wireless/ath/ath5k/sysfs.c b/drivers/net/wireless/ath/ath5k/sysfs.c
index d8ad0e45e1c4..0244a36ba958 100644
--- a/drivers/net/wireless/ath/ath5k/sysfs.c
+++ b/drivers/net/wireless/ath/ath5k/sysfs.c
@@ -11,7 +11,7 @@ static ssize_t ath5k_attr_show_##name(struct device *dev, \
11 char *buf) \ 11 char *buf) \
12{ \ 12{ \
13 struct ieee80211_hw *hw = dev_get_drvdata(dev); \ 13 struct ieee80211_hw *hw = dev_get_drvdata(dev); \
14 struct ath5k_softc *sc = hw->priv; \ 14 struct ath5k_hw *ah = hw->priv; \
15 return snprintf(buf, PAGE_SIZE, "%d\n", get); \ 15 return snprintf(buf, PAGE_SIZE, "%d\n", get); \
16} \ 16} \
17 \ 17 \
@@ -20,13 +20,13 @@ static ssize_t ath5k_attr_store_##name(struct device *dev, \
20 const char *buf, size_t count) \ 20 const char *buf, size_t count) \
21{ \ 21{ \
22 struct ieee80211_hw *hw = dev_get_drvdata(dev); \ 22 struct ieee80211_hw *hw = dev_get_drvdata(dev); \
23 struct ath5k_softc *sc = hw->priv; \ 23 struct ath5k_hw *ah = hw->priv; \
24 int val, ret; \ 24 int val, ret; \
25 \ 25 \
26 ret = kstrtoint(buf, 10, &val); \ 26 ret = kstrtoint(buf, 10, &val); \
27 if (ret < 0) \ 27 if (ret < 0) \
28 return ret; \ 28 return ret; \
29 set(sc->ah, val); \ 29 set(ah, val); \
30 return count; \ 30 return count; \
31} \ 31} \
32static DEVICE_ATTR(name, S_IRUGO | S_IWUSR, \ 32static DEVICE_ATTR(name, S_IRUGO | S_IWUSR, \
@@ -38,25 +38,25 @@ static ssize_t ath5k_attr_show_##name(struct device *dev, \
38 char *buf) \ 38 char *buf) \
39{ \ 39{ \
40 struct ieee80211_hw *hw = dev_get_drvdata(dev); \ 40 struct ieee80211_hw *hw = dev_get_drvdata(dev); \
41 struct ath5k_softc *sc = hw->priv; \ 41 struct ath5k_hw *ah = hw->priv; \
42 return snprintf(buf, PAGE_SIZE, "%d\n", get); \ 42 return snprintf(buf, PAGE_SIZE, "%d\n", get); \
43} \ 43} \
44static DEVICE_ATTR(name, S_IRUGO, ath5k_attr_show_##name, NULL) 44static DEVICE_ATTR(name, S_IRUGO, ath5k_attr_show_##name, NULL)
45 45
46/*** ANI ***/ 46/*** ANI ***/
47 47
48SIMPLE_SHOW_STORE(ani_mode, sc->ani_state.ani_mode, ath5k_ani_init); 48SIMPLE_SHOW_STORE(ani_mode, ah->ani_state.ani_mode, ath5k_ani_init);
49SIMPLE_SHOW_STORE(noise_immunity_level, sc->ani_state.noise_imm_level, 49SIMPLE_SHOW_STORE(noise_immunity_level, ah->ani_state.noise_imm_level,
50 ath5k_ani_set_noise_immunity_level); 50 ath5k_ani_set_noise_immunity_level);
51SIMPLE_SHOW_STORE(spur_level, sc->ani_state.spur_level, 51SIMPLE_SHOW_STORE(spur_level, ah->ani_state.spur_level,
52 ath5k_ani_set_spur_immunity_level); 52 ath5k_ani_set_spur_immunity_level);
53SIMPLE_SHOW_STORE(firstep_level, sc->ani_state.firstep_level, 53SIMPLE_SHOW_STORE(firstep_level, ah->ani_state.firstep_level,
54 ath5k_ani_set_firstep_level); 54 ath5k_ani_set_firstep_level);
55SIMPLE_SHOW_STORE(ofdm_weak_signal_detection, sc->ani_state.ofdm_weak_sig, 55SIMPLE_SHOW_STORE(ofdm_weak_signal_detection, ah->ani_state.ofdm_weak_sig,
56 ath5k_ani_set_ofdm_weak_signal_detection); 56 ath5k_ani_set_ofdm_weak_signal_detection);
57SIMPLE_SHOW_STORE(cck_weak_signal_detection, sc->ani_state.cck_weak_sig, 57SIMPLE_SHOW_STORE(cck_weak_signal_detection, ah->ani_state.cck_weak_sig,
58 ath5k_ani_set_cck_weak_signal_detection); 58 ath5k_ani_set_cck_weak_signal_detection);
59SIMPLE_SHOW(spur_level_max, sc->ani_state.max_spur_level); 59SIMPLE_SHOW(spur_level_max, ah->ani_state.max_spur_level);
60 60
61static ssize_t ath5k_attr_show_noise_immunity_level_max(struct device *dev, 61static ssize_t ath5k_attr_show_noise_immunity_level_max(struct device *dev,
62 struct device_attribute *attr, 62 struct device_attribute *attr,
@@ -98,14 +98,14 @@ static struct attribute_group ath5k_attribute_group_ani = {
98/*** register / unregister ***/ 98/*** register / unregister ***/
99 99
100int 100int
101ath5k_sysfs_register(struct ath5k_softc *sc) 101ath5k_sysfs_register(struct ath5k_hw *ah)
102{ 102{
103 struct device *dev = sc->dev; 103 struct device *dev = ah->dev;
104 int err; 104 int err;
105 105
106 err = sysfs_create_group(&dev->kobj, &ath5k_attribute_group_ani); 106 err = sysfs_create_group(&dev->kobj, &ath5k_attribute_group_ani);
107 if (err) { 107 if (err) {
108 ATH5K_ERR(sc, "failed to create sysfs group\n"); 108 ATH5K_ERR(ah, "failed to create sysfs group\n");
109 return err; 109 return err;
110 } 110 }
111 111
@@ -113,9 +113,9 @@ ath5k_sysfs_register(struct ath5k_softc *sc)
113} 113}
114 114
115void 115void
116ath5k_sysfs_unregister(struct ath5k_softc *sc) 116ath5k_sysfs_unregister(struct ath5k_hw *ah)
117{ 117{
118 struct device *dev = sc->dev; 118 struct device *dev = ah->dev;
119 119
120 sysfs_remove_group(&dev->kobj, &ath5k_attribute_group_ani); 120 sysfs_remove_group(&dev->kobj, &ath5k_attribute_group_ani);
121} 121}
diff --git a/drivers/net/wireless/ath/ath5k/trace.h b/drivers/net/wireless/ath/ath5k/trace.h
index 235e0768ce1d..c741c871f4e9 100644
--- a/drivers/net/wireless/ath/ath5k/trace.h
+++ b/drivers/net/wireless/ath/ath5k/trace.h
@@ -16,10 +16,10 @@ struct sk_buff;
16#define TRACE_SYSTEM ath5k 16#define TRACE_SYSTEM ath5k
17 17
18TRACE_EVENT(ath5k_rx, 18TRACE_EVENT(ath5k_rx,
19 TP_PROTO(struct ath5k_softc *priv, struct sk_buff *skb), 19 TP_PROTO(struct ath5k_hw *priv, struct sk_buff *skb),
20 TP_ARGS(priv, skb), 20 TP_ARGS(priv, skb),
21 TP_STRUCT__entry( 21 TP_STRUCT__entry(
22 __field(struct ath5k_softc *, priv) 22 __field(struct ath5k_hw *, priv)
23 __field(unsigned long, skbaddr) 23 __field(unsigned long, skbaddr)
24 __dynamic_array(u8, frame, skb->len) 24 __dynamic_array(u8, frame, skb->len)
25 ), 25 ),
@@ -34,13 +34,13 @@ TRACE_EVENT(ath5k_rx,
34); 34);
35 35
36TRACE_EVENT(ath5k_tx, 36TRACE_EVENT(ath5k_tx,
37 TP_PROTO(struct ath5k_softc *priv, struct sk_buff *skb, 37 TP_PROTO(struct ath5k_hw *priv, struct sk_buff *skb,
38 struct ath5k_txq *q), 38 struct ath5k_txq *q),
39 39
40 TP_ARGS(priv, skb, q), 40 TP_ARGS(priv, skb, q),
41 41
42 TP_STRUCT__entry( 42 TP_STRUCT__entry(
43 __field(struct ath5k_softc *, priv) 43 __field(struct ath5k_hw *, priv)
44 __field(unsigned long, skbaddr) 44 __field(unsigned long, skbaddr)
45 __field(u8, qnum) 45 __field(u8, qnum)
46 __dynamic_array(u8, frame, skb->len) 46 __dynamic_array(u8, frame, skb->len)
@@ -60,13 +60,13 @@ TRACE_EVENT(ath5k_tx,
60); 60);
61 61
62TRACE_EVENT(ath5k_tx_complete, 62TRACE_EVENT(ath5k_tx_complete,
63 TP_PROTO(struct ath5k_softc *priv, struct sk_buff *skb, 63 TP_PROTO(struct ath5k_hw *priv, struct sk_buff *skb,
64 struct ath5k_txq *q, struct ath5k_tx_status *ts), 64 struct ath5k_txq *q, struct ath5k_tx_status *ts),
65 65
66 TP_ARGS(priv, skb, q, ts), 66 TP_ARGS(priv, skb, q, ts),
67 67
68 TP_STRUCT__entry( 68 TP_STRUCT__entry(
69 __field(struct ath5k_softc *, priv) 69 __field(struct ath5k_hw *, priv)
70 __field(unsigned long, skbaddr) 70 __field(unsigned long, skbaddr)
71 __field(u8, qnum) 71 __field(u8, qnum)
72 __field(u8, ts_status) 72 __field(u8, ts_status)
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-23 15:28:19 -0400