diff options
-rw-r--r-- | arch/powerpc/boot/dts/p2041rdb.dts (renamed from arch/powerpc/boot/dts/p2040rdb.dts) | 13 | ||||
-rw-r--r-- | arch/powerpc/boot/dts/p2041si.dtsi (renamed from arch/powerpc/boot/dts/p2040si.dtsi) | 64 | ||||
-rw-r--r-- | arch/powerpc/configs/corenet32_smp_defconfig | 2 | ||||
-rw-r--r-- | arch/powerpc/platforms/85xx/Kconfig | 6 | ||||
-rw-r--r-- | arch/powerpc/platforms/85xx/Makefile | 2 | ||||
-rw-r--r-- | arch/powerpc/platforms/85xx/p2041_rdb.c (renamed from arch/powerpc/platforms/85xx/p2040_rdb.c) | 18 |
6 files changed, 50 insertions, 55 deletions
diff --git a/arch/powerpc/boot/dts/p2040rdb.dts b/arch/powerpc/boot/dts/p2041rdb.dts index 7d84e391c632..47bb461cf72a 100644 --- a/arch/powerpc/boot/dts/p2040rdb.dts +++ b/arch/powerpc/boot/dts/p2041rdb.dts | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * P2040RDB Device Tree Source | 2 | * P2041RDB Device Tree Source |
3 | * | 3 | * |
4 | * Copyright 2011 Freescale Semiconductor Inc. | 4 | * Copyright 2011 Freescale Semiconductor Inc. |
5 | * | 5 | * |
@@ -32,11 +32,11 @@ | |||
32 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | 32 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
33 | */ | 33 | */ |
34 | 34 | ||
35 | /include/ "p2040si.dtsi" | 35 | /include/ "p2041si.dtsi" |
36 | 36 | ||
37 | / { | 37 | / { |
38 | model = "fsl,P2040RDB"; | 38 | model = "fsl,P2041RDB"; |
39 | compatible = "fsl,P2040RDB"; | 39 | compatible = "fsl,P2041RDB"; |
40 | #address-cells = <2>; | 40 | #address-cells = <2>; |
41 | #size-cells = <2>; | 41 | #size-cells = <2>; |
42 | interrupt-parent = <&mpic>; | 42 | interrupt-parent = <&mpic>; |
@@ -97,13 +97,8 @@ | |||
97 | }; | 97 | }; |
98 | }; | 98 | }; |
99 | 99 | ||
100 | usb0: usb@210000 { | ||
101 | phy_type = "utmi"; | ||
102 | }; | ||
103 | |||
104 | usb1: usb@211000 { | 100 | usb1: usb@211000 { |
105 | dr_mode = "host"; | 101 | dr_mode = "host"; |
106 | phy_type = "utmi"; | ||
107 | }; | 102 | }; |
108 | }; | 103 | }; |
109 | 104 | ||
diff --git a/arch/powerpc/boot/dts/p2040si.dtsi b/arch/powerpc/boot/dts/p2041si.dtsi index 5fdbb24c0763..420cdb0f403d 100644 --- a/arch/powerpc/boot/dts/p2040si.dtsi +++ b/arch/powerpc/boot/dts/p2041si.dtsi | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * P2040 Silicon Device Tree Source | 2 | * P2041 Silicon Device Tree Source |
3 | * | 3 | * |
4 | * Copyright 2011 Freescale Semiconductor Inc. | 4 | * Copyright 2011 Freescale Semiconductor Inc. |
5 | * | 5 | * |
@@ -35,7 +35,7 @@ | |||
35 | /dts-v1/; | 35 | /dts-v1/; |
36 | 36 | ||
37 | / { | 37 | / { |
38 | compatible = "fsl,P2040"; | 38 | compatible = "fsl,P2041"; |
39 | #address-cells = <2>; | 39 | #address-cells = <2>; |
40 | #size-cells = <2>; | 40 | #size-cells = <2>; |
41 | interrupt-parent = <&mpic>; | 41 | interrupt-parent = <&mpic>; |
@@ -135,7 +135,7 @@ | |||
135 | }; | 135 | }; |
136 | 136 | ||
137 | cpc: l3-cache-controller@10000 { | 137 | cpc: l3-cache-controller@10000 { |
138 | compatible = "fsl,p2040-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache"; | 138 | compatible = "fsl,p2041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache"; |
139 | reg = <0x10000 0x1000>; | 139 | reg = <0x10000 0x1000>; |
140 | interrupts = <16 2 1 27>; | 140 | interrupts = <16 2 1 27>; |
141 | }; | 141 | }; |
@@ -226,7 +226,7 @@ | |||
226 | }; | 226 | }; |
227 | 227 | ||
228 | clockgen: global-utilities@e1000 { | 228 | clockgen: global-utilities@e1000 { |
229 | compatible = "fsl,p2040-clockgen", "fsl,qoriq-clockgen-1.0"; | 229 | compatible = "fsl,p2041-clockgen", "fsl,qoriq-clockgen-1.0"; |
230 | reg = <0xe1000 0x1000>; | 230 | reg = <0xe1000 0x1000>; |
231 | clock-frequency = <0>; | 231 | clock-frequency = <0>; |
232 | }; | 232 | }; |
@@ -238,45 +238,45 @@ | |||
238 | }; | 238 | }; |
239 | 239 | ||
240 | sfp: sfp@e8000 { | 240 | sfp: sfp@e8000 { |
241 | compatible = "fsl,p2040-sfp", "fsl,qoriq-sfp-1.0"; | 241 | compatible = "fsl,p2041-sfp", "fsl,qoriq-sfp-1.0"; |
242 | reg = <0xe8000 0x1000>; | 242 | reg = <0xe8000 0x1000>; |
243 | }; | 243 | }; |
244 | 244 | ||
245 | serdes: serdes@ea000 { | 245 | serdes: serdes@ea000 { |
246 | compatible = "fsl,p2040-serdes"; | 246 | compatible = "fsl,p2041-serdes"; |
247 | reg = <0xea000 0x1000>; | 247 | reg = <0xea000 0x1000>; |
248 | }; | 248 | }; |
249 | 249 | ||
250 | dma0: dma@100300 { | 250 | dma0: dma@100300 { |
251 | #address-cells = <1>; | 251 | #address-cells = <1>; |
252 | #size-cells = <1>; | 252 | #size-cells = <1>; |
253 | compatible = "fsl,p2040-dma", "fsl,eloplus-dma"; | 253 | compatible = "fsl,p2041-dma", "fsl,eloplus-dma"; |
254 | reg = <0x100300 0x4>; | 254 | reg = <0x100300 0x4>; |
255 | ranges = <0x0 0x100100 0x200>; | 255 | ranges = <0x0 0x100100 0x200>; |
256 | cell-index = <0>; | 256 | cell-index = <0>; |
257 | dma-channel@0 { | 257 | dma-channel@0 { |
258 | compatible = "fsl,p2040-dma-channel", | 258 | compatible = "fsl,p2041-dma-channel", |
259 | "fsl,eloplus-dma-channel"; | 259 | "fsl,eloplus-dma-channel"; |
260 | reg = <0x0 0x80>; | 260 | reg = <0x0 0x80>; |
261 | cell-index = <0>; | 261 | cell-index = <0>; |
262 | interrupts = <28 2 0 0>; | 262 | interrupts = <28 2 0 0>; |
263 | }; | 263 | }; |
264 | dma-channel@80 { | 264 | dma-channel@80 { |
265 | compatible = "fsl,p2040-dma-channel", | 265 | compatible = "fsl,p2041-dma-channel", |
266 | "fsl,eloplus-dma-channel"; | 266 | "fsl,eloplus-dma-channel"; |
267 | reg = <0x80 0x80>; | 267 | reg = <0x80 0x80>; |
268 | cell-index = <1>; | 268 | cell-index = <1>; |
269 | interrupts = <29 2 0 0>; | 269 | interrupts = <29 2 0 0>; |
270 | }; | 270 | }; |
271 | dma-channel@100 { | 271 | dma-channel@100 { |
272 | compatible = "fsl,p2040-dma-channel", | 272 | compatible = "fsl,p2041-dma-channel", |
273 | "fsl,eloplus-dma-channel"; | 273 | "fsl,eloplus-dma-channel"; |
274 | reg = <0x100 0x80>; | 274 | reg = <0x100 0x80>; |
275 | cell-index = <2>; | 275 | cell-index = <2>; |
276 | interrupts = <30 2 0 0>; | 276 | interrupts = <30 2 0 0>; |
277 | }; | 277 | }; |
278 | dma-channel@180 { | 278 | dma-channel@180 { |
279 | compatible = "fsl,p2040-dma-channel", | 279 | compatible = "fsl,p2041-dma-channel", |
280 | "fsl,eloplus-dma-channel"; | 280 | "fsl,eloplus-dma-channel"; |
281 | reg = <0x180 0x80>; | 281 | reg = <0x180 0x80>; |
282 | cell-index = <3>; | 282 | cell-index = <3>; |
@@ -287,33 +287,33 @@ | |||
287 | dma1: dma@101300 { | 287 | dma1: dma@101300 { |
288 | #address-cells = <1>; | 288 | #address-cells = <1>; |
289 | #size-cells = <1>; | 289 | #size-cells = <1>; |
290 | compatible = "fsl,p2040-dma", "fsl,eloplus-dma"; | 290 | compatible = "fsl,p2041-dma", "fsl,eloplus-dma"; |
291 | reg = <0x101300 0x4>; | 291 | reg = <0x101300 0x4>; |
292 | ranges = <0x0 0x101100 0x200>; | 292 | ranges = <0x0 0x101100 0x200>; |
293 | cell-index = <1>; | 293 | cell-index = <1>; |
294 | dma-channel@0 { | 294 | dma-channel@0 { |
295 | compatible = "fsl,p2040-dma-channel", | 295 | compatible = "fsl,p2041-dma-channel", |
296 | "fsl,eloplus-dma-channel"; | 296 | "fsl,eloplus-dma-channel"; |
297 | reg = <0x0 0x80>; | 297 | reg = <0x0 0x80>; |
298 | cell-index = <0>; | 298 | cell-index = <0>; |
299 | interrupts = <32 2 0 0>; | 299 | interrupts = <32 2 0 0>; |
300 | }; | 300 | }; |
301 | dma-channel@80 { | 301 | dma-channel@80 { |
302 | compatible = "fsl,p2040-dma-channel", | 302 | compatible = "fsl,p2041-dma-channel", |
303 | "fsl,eloplus-dma-channel"; | 303 | "fsl,eloplus-dma-channel"; |
304 | reg = <0x80 0x80>; | 304 | reg = <0x80 0x80>; |
305 | cell-index = <1>; | 305 | cell-index = <1>; |
306 | interrupts = <33 2 0 0>; | 306 | interrupts = <33 2 0 0>; |
307 | }; | 307 | }; |
308 | dma-channel@100 { | 308 | dma-channel@100 { |
309 | compatible = "fsl,p2040-dma-channel", | 309 | compatible = "fsl,p2041-dma-channel", |
310 | "fsl,eloplus-dma-channel"; | 310 | "fsl,eloplus-dma-channel"; |
311 | reg = <0x100 0x80>; | 311 | reg = <0x100 0x80>; |
312 | cell-index = <2>; | 312 | cell-index = <2>; |
313 | interrupts = <34 2 0 0>; | 313 | interrupts = <34 2 0 0>; |
314 | }; | 314 | }; |
315 | dma-channel@180 { | 315 | dma-channel@180 { |
316 | compatible = "fsl,p2040-dma-channel", | 316 | compatible = "fsl,p2041-dma-channel", |
317 | "fsl,eloplus-dma-channel"; | 317 | "fsl,eloplus-dma-channel"; |
318 | reg = <0x180 0x80>; | 318 | reg = <0x180 0x80>; |
319 | cell-index = <3>; | 319 | cell-index = <3>; |
@@ -324,22 +324,20 @@ | |||
324 | spi@110000 { | 324 | spi@110000 { |
325 | #address-cells = <1>; | 325 | #address-cells = <1>; |
326 | #size-cells = <0>; | 326 | #size-cells = <0>; |
327 | compatible = "fsl,p2040-espi", "fsl,mpc8536-espi"; | 327 | compatible = "fsl,p2041-espi", "fsl,mpc8536-espi"; |
328 | reg = <0x110000 0x1000>; | 328 | reg = <0x110000 0x1000>; |
329 | interrupts = <53 0x2 0 0>; | 329 | interrupts = <53 0x2 0 0>; |
330 | fsl,espi-num-chipselects = <4>; | 330 | fsl,espi-num-chipselects = <4>; |
331 | |||
332 | }; | 331 | }; |
333 | 332 | ||
334 | sdhc: sdhc@114000 { | 333 | sdhc: sdhc@114000 { |
335 | compatible = "fsl,p2040-esdhc", "fsl,esdhc"; | 334 | compatible = "fsl,p2041-esdhc", "fsl,esdhc"; |
336 | reg = <0x114000 0x1000>; | 335 | reg = <0x114000 0x1000>; |
337 | interrupts = <48 2 0 0>; | 336 | interrupts = <48 2 0 0>; |
338 | sdhci,auto-cmd12; | 337 | sdhci,auto-cmd12; |
339 | clock-frequency = <0>; | 338 | clock-frequency = <0>; |
340 | }; | 339 | }; |
341 | 340 | ||
342 | |||
343 | i2c@118000 { | 341 | i2c@118000 { |
344 | #address-cells = <1>; | 342 | #address-cells = <1>; |
345 | #size-cells = <0>; | 343 | #size-cells = <0>; |
@@ -417,7 +415,7 @@ | |||
417 | }; | 415 | }; |
418 | 416 | ||
419 | gpio0: gpio@130000 { | 417 | gpio0: gpio@130000 { |
420 | compatible = "fsl,p2040-gpio", "fsl,qoriq-gpio"; | 418 | compatible = "fsl,p2041-gpio", "fsl,qoriq-gpio"; |
421 | reg = <0x130000 0x1000>; | 419 | reg = <0x130000 0x1000>; |
422 | interrupts = <55 2 0 0>; | 420 | interrupts = <55 2 0 0>; |
423 | #gpio-cells = <2>; | 421 | #gpio-cells = <2>; |
@@ -425,32 +423,34 @@ | |||
425 | }; | 423 | }; |
426 | 424 | ||
427 | usb0: usb@210000 { | 425 | usb0: usb@210000 { |
428 | compatible = "fsl,p2040-usb2-mph", | 426 | compatible = "fsl,p2041-usb2-mph", |
429 | "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; | 427 | "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; |
430 | reg = <0x210000 0x1000>; | 428 | reg = <0x210000 0x1000>; |
431 | #address-cells = <1>; | 429 | #address-cells = <1>; |
432 | #size-cells = <0>; | 430 | #size-cells = <0>; |
433 | interrupts = <44 0x2 0 0>; | 431 | interrupts = <44 0x2 0 0>; |
432 | phy_type = "utmi"; | ||
434 | port0; | 433 | port0; |
435 | }; | 434 | }; |
436 | 435 | ||
437 | usb1: usb@211000 { | 436 | usb1: usb@211000 { |
438 | compatible = "fsl,p2040-usb2-dr", | 437 | compatible = "fsl,p2041-usb2-dr", |
439 | "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; | 438 | "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; |
440 | reg = <0x211000 0x1000>; | 439 | reg = <0x211000 0x1000>; |
441 | #address-cells = <1>; | 440 | #address-cells = <1>; |
442 | #size-cells = <0>; | 441 | #size-cells = <0>; |
443 | interrupts = <45 0x2 0 0>; | 442 | interrupts = <45 0x2 0 0>; |
443 | phy_type = "utmi"; | ||
444 | }; | 444 | }; |
445 | 445 | ||
446 | sata@220000 { | 446 | sata@220000 { |
447 | compatible = "fsl,p2040-sata", "fsl,pq-sata-v2"; | 447 | compatible = "fsl,p2041-sata", "fsl,pq-sata-v2"; |
448 | reg = <0x220000 0x1000>; | 448 | reg = <0x220000 0x1000>; |
449 | interrupts = <68 0x2 0 0>; | 449 | interrupts = <68 0x2 0 0>; |
450 | }; | 450 | }; |
451 | 451 | ||
452 | sata@221000 { | 452 | sata@221000 { |
453 | compatible = "fsl,p2040-sata", "fsl,pq-sata-v2"; | 453 | compatible = "fsl,p2041-sata", "fsl,pq-sata-v2"; |
454 | reg = <0x221000 0x1000>; | 454 | reg = <0x221000 0x1000>; |
455 | interrupts = <69 0x2 0 0>; | 455 | interrupts = <69 0x2 0 0>; |
456 | }; | 456 | }; |
@@ -534,19 +534,19 @@ | |||
534 | }; | 534 | }; |
535 | 535 | ||
536 | localbus@ffe124000 { | 536 | localbus@ffe124000 { |
537 | compatible = "fsl,p2040-elbc", "fsl,elbc", "simple-bus"; | 537 | compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus"; |
538 | interrupts = <25 2 0 0>; | 538 | interrupts = <25 2 0 0>; |
539 | #address-cells = <2>; | 539 | #address-cells = <2>; |
540 | #size-cells = <1>; | 540 | #size-cells = <1>; |
541 | }; | 541 | }; |
542 | 542 | ||
543 | pci0: pcie@ffe200000 { | 543 | pci0: pcie@ffe200000 { |
544 | compatible = "fsl,p2040-pcie", "fsl,qoriq-pcie-v2.2"; | 544 | compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2"; |
545 | device_type = "pci"; | 545 | device_type = "pci"; |
546 | #size-cells = <2>; | 546 | #size-cells = <2>; |
547 | #address-cells = <3>; | 547 | #address-cells = <3>; |
548 | bus-range = <0x0 0xff>; | 548 | bus-range = <0x0 0xff>; |
549 | clock-frequency = <0x1fca055>; | 549 | clock-frequency = <33333333>; |
550 | fsl,msi = <&msi0>; | 550 | fsl,msi = <&msi0>; |
551 | interrupts = <16 2 1 15>; | 551 | interrupts = <16 2 1 15>; |
552 | pcie@0 { | 552 | pcie@0 { |
@@ -568,12 +568,12 @@ | |||
568 | }; | 568 | }; |
569 | 569 | ||
570 | pci1: pcie@ffe201000 { | 570 | pci1: pcie@ffe201000 { |
571 | compatible = "fsl,p2040-pcie", "fsl,qoriq-pcie-v2.2"; | 571 | compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2"; |
572 | device_type = "pci"; | 572 | device_type = "pci"; |
573 | #size-cells = <2>; | 573 | #size-cells = <2>; |
574 | #address-cells = <3>; | 574 | #address-cells = <3>; |
575 | bus-range = <0 0xff>; | 575 | bus-range = <0 0xff>; |
576 | clock-frequency = <0x1fca055>; | 576 | clock-frequency = <33333333>; |
577 | fsl,msi = <&msi1>; | 577 | fsl,msi = <&msi1>; |
578 | interrupts = <16 2 1 14>; | 578 | interrupts = <16 2 1 14>; |
579 | pcie@0 { | 579 | pcie@0 { |
@@ -595,12 +595,12 @@ | |||
595 | }; | 595 | }; |
596 | 596 | ||
597 | pci2: pcie@ffe202000 { | 597 | pci2: pcie@ffe202000 { |
598 | compatible = "fsl,p2040-pcie", "fsl,qoriq-pcie-v2.2"; | 598 | compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2"; |
599 | device_type = "pci"; | 599 | device_type = "pci"; |
600 | #size-cells = <2>; | 600 | #size-cells = <2>; |
601 | #address-cells = <3>; | 601 | #address-cells = <3>; |
602 | bus-range = <0x0 0xff>; | 602 | bus-range = <0x0 0xff>; |
603 | clock-frequency = <0x1fca055>; | 603 | clock-frequency = <33333333>; |
604 | fsl,msi = <&msi2>; | 604 | fsl,msi = <&msi2>; |
605 | interrupts = <16 2 1 13>; | 605 | interrupts = <16 2 1 13>; |
606 | pcie@0 { | 606 | pcie@0 { |
diff --git a/arch/powerpc/configs/corenet32_smp_defconfig b/arch/powerpc/configs/corenet32_smp_defconfig index 4311d02a3bfd..49cfe85232f7 100644 --- a/arch/powerpc/configs/corenet32_smp_defconfig +++ b/arch/powerpc/configs/corenet32_smp_defconfig | |||
@@ -23,7 +23,7 @@ CONFIG_MODULE_UNLOAD=y | |||
23 | CONFIG_MODULE_FORCE_UNLOAD=y | 23 | CONFIG_MODULE_FORCE_UNLOAD=y |
24 | CONFIG_MODVERSIONS=y | 24 | CONFIG_MODVERSIONS=y |
25 | # CONFIG_BLK_DEV_BSG is not set | 25 | # CONFIG_BLK_DEV_BSG is not set |
26 | CONFIG_P2040_RDB=y | 26 | CONFIG_P2041_RDB=y |
27 | CONFIG_P3041_DS=y | 27 | CONFIG_P3041_DS=y |
28 | CONFIG_P4080_DS=y | 28 | CONFIG_P4080_DS=y |
29 | CONFIG_P5020_DS=y | 29 | CONFIG_P5020_DS=y |
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig index 1b393f40c639..1e66edb95d20 100644 --- a/arch/powerpc/platforms/85xx/Kconfig +++ b/arch/powerpc/platforms/85xx/Kconfig | |||
@@ -171,8 +171,8 @@ config SBC8560 | |||
171 | help | 171 | help |
172 | This option enables support for the Wind River SBC8560 board | 172 | This option enables support for the Wind River SBC8560 board |
173 | 173 | ||
174 | config P2040_RDB | 174 | config P2041_RDB |
175 | bool "Freescale P2040 RDB" | 175 | bool "Freescale P2041 RDB" |
176 | select DEFAULT_UIMAGE | 176 | select DEFAULT_UIMAGE |
177 | select PPC_E500MC | 177 | select PPC_E500MC |
178 | select PHYS_64BIT | 178 | select PHYS_64BIT |
@@ -182,7 +182,7 @@ config P2040_RDB | |||
182 | select HAS_RAPIDIO | 182 | select HAS_RAPIDIO |
183 | select PPC_EPAPR_HV_PIC | 183 | select PPC_EPAPR_HV_PIC |
184 | help | 184 | help |
185 | This option enables support for the P2040 RDB board | 185 | This option enables support for the P2041 RDB board |
186 | 186 | ||
187 | config P3041_DS | 187 | config P3041_DS |
188 | bool "Freescale P3041 DS" | 188 | bool "Freescale P3041 DS" |
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile index a971b32c5c0a..39e6c22f06fa 100644 --- a/arch/powerpc/platforms/85xx/Makefile +++ b/arch/powerpc/platforms/85xx/Makefile | |||
@@ -13,7 +13,7 @@ obj-$(CONFIG_MPC85xx_RDB) += mpc85xx_rdb.o | |||
13 | obj-$(CONFIG_P1010_RDB) += p1010rdb.o | 13 | obj-$(CONFIG_P1010_RDB) += p1010rdb.o |
14 | obj-$(CONFIG_P1022_DS) += p1022_ds.o | 14 | obj-$(CONFIG_P1022_DS) += p1022_ds.o |
15 | obj-$(CONFIG_P1023_RDS) += p1023_rds.o | 15 | obj-$(CONFIG_P1023_RDS) += p1023_rds.o |
16 | obj-$(CONFIG_P2040_RDB) += p2040_rdb.o corenet_ds.o | 16 | obj-$(CONFIG_P2041_RDB) += p2041_rdb.o corenet_ds.o |
17 | obj-$(CONFIG_P3041_DS) += p3041_ds.o corenet_ds.o | 17 | obj-$(CONFIG_P3041_DS) += p3041_ds.o corenet_ds.o |
18 | obj-$(CONFIG_P4080_DS) += p4080_ds.o corenet_ds.o | 18 | obj-$(CONFIG_P4080_DS) += p4080_ds.o corenet_ds.o |
19 | obj-$(CONFIG_P5020_DS) += p5020_ds.o corenet_ds.o | 19 | obj-$(CONFIG_P5020_DS) += p5020_ds.o corenet_ds.o |
diff --git a/arch/powerpc/platforms/85xx/p2040_rdb.c b/arch/powerpc/platforms/85xx/p2041_rdb.c index 32b56ac73dfb..eda6ed5683e1 100644 --- a/arch/powerpc/platforms/85xx/p2040_rdb.c +++ b/arch/powerpc/platforms/85xx/p2041_rdb.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * P2040 RDB Setup | 2 | * P2041 RDB Setup |
3 | * | 3 | * |
4 | * Copyright 2011 Freescale Semiconductor Inc. | 4 | * Copyright 2011 Freescale Semiconductor Inc. |
5 | * | 5 | * |
@@ -35,18 +35,18 @@ | |||
35 | /* | 35 | /* |
36 | * Called very early, device-tree isn't unflattened | 36 | * Called very early, device-tree isn't unflattened |
37 | */ | 37 | */ |
38 | static int __init p2040_rdb_probe(void) | 38 | static int __init p2041_rdb_probe(void) |
39 | { | 39 | { |
40 | unsigned long root = of_get_flat_dt_root(); | 40 | unsigned long root = of_get_flat_dt_root(); |
41 | #ifdef CONFIG_SMP | 41 | #ifdef CONFIG_SMP |
42 | extern struct smp_ops_t smp_85xx_ops; | 42 | extern struct smp_ops_t smp_85xx_ops; |
43 | #endif | 43 | #endif |
44 | 44 | ||
45 | if (of_flat_dt_is_compatible(root, "fsl,P2040RDB")) | 45 | if (of_flat_dt_is_compatible(root, "fsl,P2041RDB")) |
46 | return 1; | 46 | return 1; |
47 | 47 | ||
48 | /* Check if we're running under the Freescale hypervisor */ | 48 | /* Check if we're running under the Freescale hypervisor */ |
49 | if (of_flat_dt_is_compatible(root, "fsl,P2040RDB-hv")) { | 49 | if (of_flat_dt_is_compatible(root, "fsl,P2041RDB-hv")) { |
50 | ppc_md.init_IRQ = ehv_pic_init; | 50 | ppc_md.init_IRQ = ehv_pic_init; |
51 | ppc_md.get_irq = ehv_pic_get_irq; | 51 | ppc_md.get_irq = ehv_pic_get_irq; |
52 | ppc_md.restart = fsl_hv_restart; | 52 | ppc_md.restart = fsl_hv_restart; |
@@ -66,9 +66,9 @@ static int __init p2040_rdb_probe(void) | |||
66 | return 0; | 66 | return 0; |
67 | } | 67 | } |
68 | 68 | ||
69 | define_machine(p2040_rdb) { | 69 | define_machine(p2041_rdb) { |
70 | .name = "P2040 RDB", | 70 | .name = "P2041 RDB", |
71 | .probe = p2040_rdb_probe, | 71 | .probe = p2041_rdb_probe, |
72 | .setup_arch = corenet_ds_setup_arch, | 72 | .setup_arch = corenet_ds_setup_arch, |
73 | .init_IRQ = corenet_ds_pic_init, | 73 | .init_IRQ = corenet_ds_pic_init, |
74 | #ifdef CONFIG_PCI | 74 | #ifdef CONFIG_PCI |
@@ -81,8 +81,8 @@ define_machine(p2040_rdb) { | |||
81 | .power_save = e500_idle, | 81 | .power_save = e500_idle, |
82 | }; | 82 | }; |
83 | 83 | ||
84 | machine_device_initcall(p2040_rdb, corenet_ds_publish_devices); | 84 | machine_device_initcall(p2041_rdb, corenet_ds_publish_devices); |
85 | 85 | ||
86 | #ifdef CONFIG_SWIOTLB | 86 | #ifdef CONFIG_SWIOTLB |
87 | machine_arch_initcall(p2040_rdb, swiotlb_setup_bus_notifier); | 87 | machine_arch_initcall(p2041_rdb, swiotlb_setup_bus_notifier); |
88 | #endif | 88 | #endif |