2 files changed, 26 insertions, 0 deletions

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c
index 98c587321521..68936e6aa6ab 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -2003,6 +2003,24 @@ static void hdmiphy_conf_reset(struct hdmi_context *hdata)
         mdelay(10);
 }
 
+static void hdmiphy_poweron(struct hdmi_context *hdata)
+{
+        DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
+
+        if (hdata->type == HDMI_TYPE14)
+                hdmi_reg_writemask(hdata, HDMI_PHY_CON_0, 0,
+                        HDMI_PHY_POWER_OFF_EN);
+}
+
+static void hdmiphy_poweroff(struct hdmi_context *hdata)
+{
+        DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
+
+        if (hdata->type == HDMI_TYPE14)
+                hdmi_reg_writemask(hdata, HDMI_PHY_CON_0, ~0,
+                        HDMI_PHY_POWER_OFF_EN);
+}
+
 static void hdmiphy_conf_apply(struct hdmi_context *hdata)
 {
         const u8 *hdmiphy_data;
@@ -2175,6 +2193,8 @@ static void hdmi_poweron(struct hdmi_context *hdata)
         clk_enable(res->hdmiphy);
         clk_enable(res->hdmi);
         clk_enable(res->sclk_hdmi);
+
+        hdmiphy_poweron(hdata);
 }
 
 static void hdmi_poweroff(struct hdmi_context *hdata)
@@ -2193,6 +2213,7 @@ static void hdmi_poweroff(struct hdmi_context *hdata)
          * its reset state seems to meet the condition.
          */
         hdmiphy_conf_reset(hdata);
+        hdmiphy_poweroff(hdata);
 
         clk_disable(res->sclk_hdmi);
         clk_disable(res->hdmi);
diff --git a/drivers/gpu/drm/exynos/regs-hdmi.h b/drivers/gpu/drm/exynos/regs-hdmi.h
index 970cdb518eb1..ef1b3eb3ba6e 100644
--- a/drivers/gpu/drm/exynos/regs-hdmi.h
+++ b/drivers/gpu/drm/exynos/regs-hdmi.h
@@ -176,6 +176,11 @@
 #define HDMI_PHY_CMU                    HDMI_CTRL_BASE(0x007C)
 #define HDMI_CORE_RSTOUT                HDMI_CTRL_BASE(0x0080)
 
+/* PHY Control bit definition */
+
+/* HDMI_PHY_CON_0 */
+#define HDMI_PHY_POWER_OFF_EN           (1 << 0)
+
 /* Video related registers */
 #define HDMI_YMAX                       HDMI_CORE_BASE(0x0060)
 #define HDMI_YMIN                       HDMI_CORE_BASE(0x0064)