3 files changed, 45 insertions, 1 deletions

diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c
index 0133f5f09bd6..ca87f7afaf23 100644
--- a/drivers/gpu/drm/radeon/r600_cs.c
+++ b/drivers/gpu/drm/radeon/r600_cs.c
@@ -2079,6 +2079,48 @@ static int r600_packet3_check(struct radeon_cs_parser *p,
                         return -EINVAL;
                 }
                 break;
+        case PACKET3_STRMOUT_BASE_UPDATE:
+                if (p->family < CHIP_RV770) {
+                        DRM_ERROR("STRMOUT_BASE_UPDATE only supported on 7xx\n");
+                        return -EINVAL;
+                }
+                if (pkt->count != 1) {
+                        DRM_ERROR("bad STRMOUT_BASE_UPDATE packet count\n");
+                        return -EINVAL;
+                }
+                if (idx_value > 3) {
+                        DRM_ERROR("bad STRMOUT_BASE_UPDATE index\n");
+                        return -EINVAL;
+                }
+                {
+                        u64 offset;
+
+                        r = r600_cs_packet_next_reloc(p, &reloc);
+                        if (r) {
+                                DRM_ERROR("bad STRMOUT_BASE_UPDATE reloc\n");
+                                return -EINVAL;
+                        }
+
+                        if (reloc->robj != track->vgt_strmout_bo[idx_value]) {
+                                DRM_ERROR("bad STRMOUT_BASE_UPDATE, bo does not match\n");
+                                return -EINVAL;
+                        }
+
+                        offset = radeon_get_ib_value(p, idx+1) << 8;
+                        if (offset != track->vgt_strmout_bo_offset[idx_value]) {
+                                DRM_ERROR("bad STRMOUT_BASE_UPDATE, bo offset does not match: 0x%llx, 0x%x\n",
+                                          offset, track->vgt_strmout_bo_offset[idx_value]);
+                                return -EINVAL;
+                        }
+
+                        if ((offset + 4) > radeon_bo_size(reloc->robj)) {
+                                DRM_ERROR("bad STRMOUT_BASE_UPDATE bo too small: 0x%llx, 0x%lx\n",
+                                          offset + 4, radeon_bo_size(reloc->robj));
+                                return -EINVAL;
+                        }
+                        ib[idx+1] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff);
+                }
+                break;
         case PACKET3_SURFACE_BASE_UPDATE:
                 if (p->family >= CHIP_RV770 || p->family == CHIP_R600) {
                         DRM_ERROR("bad SURFACE_BASE_UPDATE\n");
diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h
index c6857e8d76f2..025fd5b6c08c 100644
--- a/drivers/gpu/drm/radeon/r600d.h
+++ b/drivers/gpu/drm/radeon/r600d.h
@@ -1164,6 +1164,7 @@
 #define PACKET3_SET_CTL_CONST                           0x6F
 #define         PACKET3_SET_CTL_CONST_OFFSET                    0x0003cff0
 #define         PACKET3_SET_CTL_CONST_END                       0x0003e200
+#define PACKET3_STRMOUT_BASE_UPDATE                     0x72 /* r7xx */
 #define PACKET3_SURFACE_BASE_UPDATE                     0x73
 
 
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
index 03e5f5df40f1..2c4d53fd20c5 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -58,9 +58,10 @@
  *   2.14.0 - add evergreen tiling informations
  *   2.15.0 - add max_pipes query
  *   2.16.0 - fix evergreen 2D tiled surface calculation
+ *   2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
  */
 #define KMS_DRIVER_MAJOR        2
-#define KMS_DRIVER_MINOR        16
+#define KMS_DRIVER_MINOR        17
 #define KMS_DRIVER_PATCHLEVEL   0
 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
 int radeon_driver_unload_kms(struct drm_device *dev);