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-rw-r--r--arch/arm/mach-omap2/cclock44xx_data.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/cclock44xx_data.c b/arch/arm/mach-omap2/cclock44xx_data.c
index 3d58f335f173..015bcdc34b4a 100644
--- a/arch/arm/mach-omap2/cclock44xx_data.c
+++ b/arch/arm/mach-omap2/cclock44xx_data.c
@@ -52,6 +52,13 @@
52 */ 52 */
53#define OMAP4_DPLL_ABE_DEFFREQ 98304000 53#define OMAP4_DPLL_ABE_DEFFREQ 98304000
54 54
55/*
56 * OMAP4 USB DPLL default frequency. In OMAP4430 TRM version V, section
57 * "3.6.3.9.5 DPLL_USB Preferred Settings" shows that the preferred
58 * locked frequency for the USB DPLL is 960MHz.
59 */
60#define OMAP4_DPLL_USB_DEFFREQ 960000000
61
55/* Root clocks */ 62/* Root clocks */
56 63
57DEFINE_CLK_FIXED_RATE(extalt_clkin_ck, CLK_IS_ROOT, 59000000, 0x0); 64DEFINE_CLK_FIXED_RATE(extalt_clkin_ck, CLK_IS_ROOT, 59000000, 0x0);
@@ -1705,5 +1712,13 @@ int __init omap4xxx_clk_init(void)
1705 if (rc) 1712 if (rc)
1706 pr_err("%s: failed to configure ABE DPLL!\n", __func__); 1713 pr_err("%s: failed to configure ABE DPLL!\n", __func__);
1707 1714
1715 /*
1716 * Lock USB DPLL on OMAP4 devices so that the L3INIT power
1717 * domain can transition to retention state when not in use.
1718 */
1719 rc = clk_set_rate(&dpll_usb_ck, OMAP4_DPLL_USB_DEFFREQ);
1720 if (rc)
1721 pr_err("%s: failed to configure USB DPLL!\n", __func__);
1722
1708 return 0; 1723 return 0;
1709} 1724}