diff options
565 files changed, 52933 insertions, 14903 deletions
diff --git a/Documentation/DocBook/.gitignore b/Documentation/DocBook/.gitignore index 679034cbd686..720f245ceb1f 100644 --- a/Documentation/DocBook/.gitignore +++ b/Documentation/DocBook/.gitignore | |||
| @@ -8,4 +8,7 @@ | |||
| 8 | *.dvi | 8 | *.dvi |
| 9 | *.log | 9 | *.log |
| 10 | *.out | 10 | *.out |
| 11 | media/ | 11 | *.png |
| 12 | *.gif | ||
| 13 | media-indices.tmpl | ||
| 14 | media-entities.tmpl | ||
diff --git a/Documentation/DocBook/Makefile b/Documentation/DocBook/Makefile index 3cebfa0d1611..66725a3d30dc 100644 --- a/Documentation/DocBook/Makefile +++ b/Documentation/DocBook/Makefile | |||
| @@ -14,7 +14,9 @@ DOCBOOKS := z8530book.xml mcabook.xml device-drivers.xml \ | |||
| 14 | genericirq.xml s390-drivers.xml uio-howto.xml scsi.xml \ | 14 | genericirq.xml s390-drivers.xml uio-howto.xml scsi.xml \ |
| 15 | 80211.xml debugobjects.xml sh.xml regulator.xml \ | 15 | 80211.xml debugobjects.xml sh.xml regulator.xml \ |
| 16 | alsa-driver-api.xml writing-an-alsa-driver.xml \ | 16 | alsa-driver-api.xml writing-an-alsa-driver.xml \ |
| 17 | tracepoint.xml media.xml drm.xml | 17 | tracepoint.xml drm.xml media_api.xml |
| 18 | |||
| 19 | include $(srctree)/Documentation/DocBook/media/Makefile | ||
| 18 | 20 | ||
| 19 | ### | 21 | ### |
| 20 | # The build process is as follows (targets): | 22 | # The build process is as follows (targets): |
| @@ -32,7 +34,7 @@ PS_METHOD = $(prefer-db2x) | |||
| 32 | 34 | ||
| 33 | ### | 35 | ### |
| 34 | # The targets that may be used. | 36 | # The targets that may be used. |
| 35 | PHONY += xmldocs sgmldocs psdocs pdfdocs htmldocs mandocs installmandocs cleandocs xmldoclinks | 37 | PHONY += xmldocs sgmldocs psdocs pdfdocs htmldocs mandocs installmandocs cleandocs |
| 36 | 38 | ||
| 37 | BOOKS := $(addprefix $(obj)/,$(DOCBOOKS)) | 39 | BOOKS := $(addprefix $(obj)/,$(DOCBOOKS)) |
| 38 | xmldocs: $(BOOKS) | 40 | xmldocs: $(BOOKS) |
| @@ -45,27 +47,14 @@ PDF := $(patsubst %.xml, %.pdf, $(BOOKS)) | |||
| 45 | pdfdocs: $(PDF) | 47 | pdfdocs: $(PDF) |
| 46 | 48 | ||
| 47 | HTML := $(sort $(patsubst %.xml, %.html, $(BOOKS))) | 49 | HTML := $(sort $(patsubst %.xml, %.html, $(BOOKS))) |
| 48 | htmldocs: $(HTML) xmldoclinks | 50 | htmldocs: $(HTML) |
| 49 | $(call build_main_index) | 51 | $(call build_main_index) |
| 50 | $(call build_images) | 52 | $(call build_images) |
| 53 | $(call install_media_images) | ||
| 51 | 54 | ||
| 52 | MAN := $(patsubst %.xml, %.9, $(BOOKS)) | 55 | MAN := $(patsubst %.xml, %.9, $(BOOKS)) |
| 53 | mandocs: $(MAN) | 56 | mandocs: $(MAN) |
| 54 | 57 | ||
| 55 | build_images = mkdir -p $(objtree)/Documentation/DocBook/media/ && \ | ||
| 56 | cp $(srctree)/Documentation/DocBook/dvb/*.png \ | ||
| 57 | $(srctree)/Documentation/DocBook/v4l/*.gif \ | ||
| 58 | $(objtree)/Documentation/DocBook/media/ | ||
| 59 | |||
| 60 | xmldoclinks: | ||
| 61 | ifneq ($(objtree),$(srctree)) | ||
| 62 | for dep in dvb media-entities.tmpl media-indices.tmpl v4l; do \ | ||
| 63 | rm -f $(objtree)/Documentation/DocBook/$$dep \ | ||
| 64 | && ln -s $(srctree)/Documentation/DocBook/$$dep $(objtree)/Documentation/DocBook/ \ | ||
| 65 | || exit; \ | ||
| 66 | done | ||
| 67 | endif | ||
| 68 | |||
| 69 | installmandocs: mandocs | 58 | installmandocs: mandocs |
| 70 | mkdir -p /usr/local/man/man9/ | 59 | mkdir -p /usr/local/man/man9/ |
| 71 | install Documentation/DocBook/man/*.9.gz /usr/local/man/man9/ | 60 | install Documentation/DocBook/man/*.9.gz /usr/local/man/man9/ |
| @@ -97,11 +86,11 @@ define rule_docproc | |||
| 97 | ) > $(dir $@).$(notdir $@).cmd | 86 | ) > $(dir $@).$(notdir $@).cmd |
| 98 | endef | 87 | endef |
| 99 | 88 | ||
| 100 | %.xml: %.tmpl xmldoclinks FORCE | 89 | %.xml: %.tmpl FORCE |
| 101 | $(call if_changed_rule,docproc) | 90 | $(call if_changed_rule,docproc) |
| 102 | 91 | ||
| 103 | ### | 92 | ### |
| 104 | #Read in all saved dependency files | 93 | #Read in all saved dependency files |
| 105 | cmd_files := $(wildcard $(foreach f,$(BOOKS),$(dir $(f)).$(notdir $(f)).cmd)) | 94 | cmd_files := $(wildcard $(foreach f,$(BOOKS),$(dir $(f)).$(notdir $(f)).cmd)) |
| 106 | 95 | ||
| 107 | ifneq ($(cmd_files),) | 96 | ifneq ($(cmd_files),) |
| @@ -150,7 +139,7 @@ quiet_cmd_db2pdf = PDF $@ | |||
| 150 | 139 | ||
| 151 | index = index.html | 140 | index = index.html |
| 152 | main_idx = Documentation/DocBook/$(index) | 141 | main_idx = Documentation/DocBook/$(index) |
| 153 | build_main_index = rm -rf $(main_idx) && \ | 142 | build_main_index = rm -rf $(main_idx); \ |
| 154 | echo '<h1>Linux Kernel HTML Documentation</h1>' >> $(main_idx) && \ | 143 | echo '<h1>Linux Kernel HTML Documentation</h1>' >> $(main_idx) && \ |
| 155 | echo '<h2>Kernel Version: $(KERNELVERSION)</h2>' >> $(main_idx) && \ | 144 | echo '<h2>Kernel Version: $(KERNELVERSION)</h2>' >> $(main_idx) && \ |
| 156 | cat $(HTML) >> $(main_idx) | 145 | cat $(HTML) >> $(main_idx) |
| @@ -242,7 +231,7 @@ clean-files := $(DOCBOOKS) \ | |||
| 242 | 231 | ||
| 243 | clean-dirs := $(patsubst %.xml,%,$(DOCBOOKS)) man | 232 | clean-dirs := $(patsubst %.xml,%,$(DOCBOOKS)) man |
| 244 | 233 | ||
| 245 | cleandocs: | 234 | cleandocs: cleanmediadocs |
| 246 | $(Q)rm -f $(call objectify, $(clean-files)) | 235 | $(Q)rm -f $(call objectify, $(clean-files)) |
| 247 | $(Q)rm -rf $(call objectify, $(clean-dirs)) | 236 | $(Q)rm -rf $(call objectify, $(clean-dirs)) |
| 248 | 237 | ||
diff --git a/Documentation/DocBook/dvb/dvbproperty.xml b/Documentation/DocBook/dvb/dvbproperty.xml deleted file mode 100644 index b5365f61d69b..000000000000 --- a/Documentation/DocBook/dvb/dvbproperty.xml +++ /dev/null | |||
| @@ -1,590 +0,0 @@ | |||
| 1 | <section id="FE_GET_SET_PROPERTY"> | ||
| 2 | <title>FE_GET_PROPERTY/FE_SET_PROPERTY</title> | ||
| 3 | |||
| 4 | <programlisting> | ||
| 5 | /* Reserved fields should be set to 0 */ | ||
| 6 | struct dtv_property { | ||
| 7 | __u32 cmd; | ||
| 8 | union { | ||
| 9 | __u32 data; | ||
| 10 | struct { | ||
| 11 | __u8 data[32]; | ||
| 12 | __u32 len; | ||
| 13 | __u32 reserved1[3]; | ||
| 14 | void *reserved2; | ||
| 15 | } buffer; | ||
| 16 | } u; | ||
| 17 | int result; | ||
| 18 | } __attribute__ ((packed)); | ||
| 19 | |||
| 20 | /* num of properties cannot exceed DTV_IOCTL_MAX_MSGS per ioctl */ | ||
| 21 | #define DTV_IOCTL_MAX_MSGS 64 | ||
| 22 | |||
| 23 | struct dtv_properties { | ||
| 24 | __u32 num; | ||
| 25 | struct dtv_property *props; | ||
| 26 | }; | ||
| 27 | </programlisting> | ||
| 28 | |||
| 29 | <section id="FE_GET_PROPERTY"> | ||
| 30 | <title>FE_GET_PROPERTY</title> | ||
| 31 | <para>DESCRIPTION | ||
| 32 | </para> | ||
| 33 | <informaltable><tgroup cols="1"><tbody><row><entry | ||
| 34 | align="char"> | ||
| 35 | <para>This ioctl call returns one or more frontend properties. This call only | ||
| 36 | requires read-only access to the device.</para> | ||
| 37 | </entry> | ||
| 38 | </row></tbody></tgroup></informaltable> | ||
| 39 | <para>SYNOPSIS | ||
| 40 | </para> | ||
| 41 | <informaltable><tgroup cols="1"><tbody><row><entry | ||
| 42 | align="char"> | ||
| 43 | <para>int ioctl(int fd, int request = <link linkend="FE_GET_PROPERTY">FE_GET_PROPERTY</link>, | ||
| 44 | dtv_properties ⋆props);</para> | ||
| 45 | </entry> | ||
| 46 | </row></tbody></tgroup></informaltable> | ||
| 47 | <para>PARAMETERS | ||
| 48 | </para> | ||
| 49 | <informaltable><tgroup cols="2"><tbody><row><entry align="char"> | ||
| 50 | <para>int fd</para> | ||
| 51 | </entry><entry | ||
| 52 | align="char"> | ||
| 53 | <para>File descriptor returned by a previous call to open().</para> | ||
| 54 | </entry> | ||
| 55 | </row><row><entry | ||
| 56 | align="char"> | ||
| 57 | <para>int num</para> | ||
| 58 | </entry><entry | ||
| 59 | align="char"> | ||
| 60 | <para>Equals <link linkend="FE_GET_PROPERTY">FE_GET_PROPERTY</link> for this command.</para> | ||
| 61 | </entry> | ||
| 62 | </row><row><entry | ||
| 63 | align="char"> | ||
| 64 | <para>struct dtv_property *props</para> | ||
| 65 | </entry><entry | ||
| 66 | align="char"> | ||
| 67 | <para>Points to the location where the front-end property commands are stored.</para> | ||
| 68 | </entry> | ||
| 69 | </row></tbody></tgroup></informaltable> | ||
| 70 | <para>ERRORS</para> | ||
| 71 | <informaltable><tgroup cols="2"><tbody><row> | ||
| 72 | <entry align="char"><para>EINVAL</para></entry> | ||
| 73 | <entry align="char"><para>Invalid parameter(s) received or number of parameters out of the range.</para></entry> | ||
| 74 | </row><row> | ||
| 75 | <entry align="char"><para>ENOMEM</para></entry> | ||
| 76 | <entry align="char"><para>Out of memory.</para></entry> | ||
| 77 | </row><row> | ||
| 78 | <entry align="char"><para>EFAULT</para></entry> | ||
| 79 | <entry align="char"><para>Failure while copying data from/to userspace.</para></entry> | ||
| 80 | </row><row> | ||
| 81 | <entry align="char"><para>EOPNOTSUPP</para></entry> | ||
| 82 | <entry align="char"><para>Property type not supported.</para></entry> | ||
| 83 | </row></tbody></tgroup></informaltable> | ||
| 84 | </section> | ||
| 85 | |||
| 86 | <section id="FE_SET_PROPERTY"> | ||
| 87 | <title>FE_SET_PROPERTY</title> | ||
| 88 | <para>DESCRIPTION | ||
| 89 | </para> | ||
| 90 | <informaltable><tgroup cols="1"><tbody><row><entry | ||
| 91 | align="char"> | ||
| 92 | <para>This ioctl call sets one or more frontend properties. This call only | ||
| 93 | requires read-only access to the device.</para> | ||
| 94 | </entry> | ||
| 95 | </row></tbody></tgroup></informaltable> | ||
| 96 | <para>SYNOPSIS | ||
| 97 | </para> | ||
| 98 | <informaltable><tgroup cols="1"><tbody><row><entry | ||
| 99 | align="char"> | ||
| 100 | <para>int ioctl(int fd, int request = <link linkend="FE_SET_PROPERTY">FE_SET_PROPERTY</link>, | ||
| 101 | dtv_properties ⋆props);</para> | ||
| 102 | </entry> | ||
| 103 | </row></tbody></tgroup></informaltable> | ||
| 104 | <para>PARAMETERS | ||
| 105 | </para> | ||
| 106 | <informaltable><tgroup cols="2"><tbody><row><entry align="char"> | ||
| 107 | <para>int fd</para> | ||
| 108 | </entry><entry | ||
| 109 | align="char"> | ||
| 110 | <para>File descriptor returned by a previous call to open().</para> | ||
| 111 | </entry> | ||
| 112 | </row><row><entry | ||
| 113 | align="char"> | ||
| 114 | <para>int num</para> | ||
| 115 | </entry><entry | ||
| 116 | align="char"> | ||
| 117 | <para>Equals <link linkend="FE_SET_PROPERTY">FE_SET_PROPERTY</link> for this command.</para> | ||
| 118 | </entry> | ||
| 119 | </row><row><entry | ||
| 120 | align="char"> | ||
| 121 | <para>struct dtv_property *props</para> | ||
| 122 | </entry><entry | ||
| 123 | align="char"> | ||
| 124 | <para>Points to the location where the front-end property commands are stored.</para> | ||
| 125 | </entry> | ||
| 126 | </row></tbody></tgroup></informaltable> | ||
| 127 | <para>ERRORS | ||
| 128 | </para> | ||
| 129 | <informaltable><tgroup cols="2"><tbody><row> | ||
| 130 | <entry align="char"><para>EINVAL</para></entry> | ||
| 131 | <entry align="char"><para>Invalid parameter(s) received or number of parameters out of the range.</para></entry> | ||
| 132 | </row><row> | ||
| 133 | <entry align="char"><para>ENOMEM</para></entry> | ||
| 134 | <entry align="char"><para>Out of memory.</para></entry> | ||
| 135 | </row><row> | ||
| 136 | <entry align="char"><para>EFAULT</para></entry> | ||
| 137 | <entry align="char"><para>Failure while copying data from/to userspace.</para></entry> | ||
| 138 | </row><row> | ||
| 139 | <entry align="char"><para>EOPNOTSUPP</para></entry> | ||
| 140 | <entry align="char"><para>Property type not supported.</para></entry> | ||
| 141 | </row></tbody></tgroup></informaltable> | ||
| 142 | </section> | ||
| 143 | |||
| 144 | <section> | ||
| 145 | <title>Property types</title> | ||
| 146 | <para> | ||
| 147 | On <link linkend="FE_GET_PROPERTY">FE_GET_PROPERTY</link>/<link linkend="FE_SET_PROPERTY">FE_SET_PROPERTY</link>, | ||
| 148 | the actual action is determined by the dtv_property cmd/data pairs. With one single ioctl, is possible to | ||
| 149 | get/set up to 64 properties. The actual meaning of each property is described on the next sections. | ||
| 150 | </para> | ||
| 151 | |||
| 152 | <para>The available frontend property types are:</para> | ||
| 153 | <programlisting> | ||
| 154 | #define DTV_UNDEFINED 0 | ||
| 155 | #define DTV_TUNE 1 | ||
| 156 | #define DTV_CLEAR 2 | ||
| 157 | #define DTV_FREQUENCY 3 | ||
| 158 | #define DTV_MODULATION 4 | ||
| 159 | #define DTV_BANDWIDTH_HZ 5 | ||
| 160 | #define DTV_INVERSION 6 | ||
| 161 | #define DTV_DISEQC_MASTER 7 | ||
| 162 | #define DTV_SYMBOL_RATE 8 | ||
| 163 | #define DTV_INNER_FEC 9 | ||
| 164 | #define DTV_VOLTAGE 10 | ||
| 165 | #define DTV_TONE 11 | ||
| 166 | #define DTV_PILOT 12 | ||
| 167 | #define DTV_ROLLOFF 13 | ||
| 168 | #define DTV_DISEQC_SLAVE_REPLY 14 | ||
| 169 | #define DTV_FE_CAPABILITY_COUNT 15 | ||
| 170 | #define DTV_FE_CAPABILITY 16 | ||
| 171 | #define DTV_DELIVERY_SYSTEM 17 | ||
| 172 | #define DTV_ISDBT_PARTIAL_RECEPTION 18 | ||
| 173 | #define DTV_ISDBT_SOUND_BROADCASTING 19 | ||
| 174 | #define DTV_ISDBT_SB_SUBCHANNEL_ID 20 | ||
| 175 | #define DTV_ISDBT_SB_SEGMENT_IDX 21 | ||
| 176 | #define DTV_ISDBT_SB_SEGMENT_COUNT 22 | ||
| 177 | #define DTV_ISDBT_LAYERA_FEC 23 | ||
| 178 | #define DTV_ISDBT_LAYERA_MODULATION 24 | ||
| 179 | #define DTV_ISDBT_LAYERA_SEGMENT_COUNT 25 | ||
| 180 | #define DTV_ISDBT_LAYERA_TIME_INTERLEAVING 26 | ||
| 181 | #define DTV_ISDBT_LAYERB_FEC 27 | ||
| 182 | #define DTV_ISDBT_LAYERB_MODULATION 28 | ||
| 183 | #define DTV_ISDBT_LAYERB_SEGMENT_COUNT 29 | ||
| 184 | #define DTV_ISDBT_LAYERB_TIME_INTERLEAVING 30 | ||
| 185 | #define DTV_ISDBT_LAYERC_FEC 31 | ||
| 186 | #define DTV_ISDBT_LAYERC_MODULATION 32 | ||
| 187 | #define DTV_ISDBT_LAYERC_SEGMENT_COUNT 33 | ||
| 188 | #define DTV_ISDBT_LAYERC_TIME_INTERLEAVING 34 | ||
| 189 | #define DTV_API_VERSION 35 | ||
| 190 | #define DTV_CODE_RATE_HP 36 | ||
| 191 | #define DTV_CODE_RATE_LP 37 | ||
| 192 | #define DTV_GUARD_INTERVAL 38 | ||
| 193 | #define DTV_TRANSMISSION_MODE 39 | ||
| 194 | #define DTV_HIERARCHY 40 | ||
| 195 | #define DTV_ISDBT_LAYER_ENABLED 41 | ||
| 196 | #define DTV_ISDBS_TS_ID 42 | ||
| 197 | </programlisting> | ||
| 198 | </section> | ||
| 199 | |||
| 200 | <section id="fe_property_common"> | ||
| 201 | <title>Parameters that are common to all Digital TV standards</title> | ||
| 202 | <section id="DTV_FREQUENCY"> | ||
| 203 | <title><constant>DTV_FREQUENCY</constant></title> | ||
| 204 | |||
| 205 | <para>Central frequency of the channel, in HZ.</para> | ||
| 206 | |||
| 207 | <para>Notes:</para> | ||
| 208 | <para>1)For ISDB-T, the channels are usually transmitted with an offset of 143kHz. | ||
| 209 | E.g. a valid frequncy could be 474143 kHz. The stepping is bound to the bandwidth of | ||
| 210 | the channel which is 6MHz.</para> | ||
| 211 | |||
| 212 | <para>2)As in ISDB-Tsb the channel consists of only one or three segments the | ||
| 213 | frequency step is 429kHz, 3*429 respectively. As for ISDB-T the | ||
| 214 | central frequency of the channel is expected.</para> | ||
| 215 | </section> | ||
| 216 | |||
| 217 | <section id="DTV_BANDWIDTH_HZ"> | ||
| 218 | <title><constant>DTV_BANDWIDTH_HZ</constant></title> | ||
| 219 | |||
| 220 | <para>Bandwidth for the channel, in HZ.</para> | ||
| 221 | |||
| 222 | <para>Possible values: | ||
| 223 | <constant>1712000</constant>, | ||
| 224 | <constant>5000000</constant>, | ||
| 225 | <constant>6000000</constant>, | ||
| 226 | <constant>7000000</constant>, | ||
| 227 | <constant>8000000</constant>, | ||
| 228 | <constant>10000000</constant>. | ||
| 229 | </para> | ||
| 230 | |||
| 231 | <para>Notes:</para> | ||
| 232 | |||
| 233 | <para>1) For ISDB-T it should be always 6000000Hz (6MHz)</para> | ||
| 234 | <para>2) For ISDB-Tsb it can vary depending on the number of connected segments</para> | ||
| 235 | <para>3) Bandwidth doesn't apply for DVB-C transmissions, as the bandwidth | ||
| 236 | for DVB-C depends on the symbol rate</para> | ||
| 237 | <para>4) Bandwidth in ISDB-T is fixed (6MHz) or can be easily derived from | ||
| 238 | other parameters (DTV_ISDBT_SB_SEGMENT_IDX, | ||
| 239 | DTV_ISDBT_SB_SEGMENT_COUNT).</para> | ||
| 240 | <para>5) DVB-T supports 6, 7 and 8MHz.</para> | ||
| 241 | <para>6) In addition, DVB-T2 supports 1.172, 5 and 10MHz.</para> | ||
| 242 | </section> | ||
| 243 | |||
| 244 | <section id="DTV_DELIVERY_SYSTEM"> | ||
| 245 | <title><constant>DTV_DELIVERY_SYSTEM</constant></title> | ||
| 246 | |||
| 247 | <para>Specifies the type of Delivery system</para> | ||
| 248 | |||
| 249 | <para>Possible values: </para> | ||
| 250 | <programlisting> | ||
| 251 | typedef enum fe_delivery_system { | ||
| 252 | SYS_UNDEFINED, | ||
| 253 | SYS_DVBC_ANNEX_AC, | ||
| 254 | SYS_DVBC_ANNEX_B, | ||
| 255 | SYS_DVBT, | ||
| 256 | SYS_DSS, | ||
| 257 | SYS_DVBS, | ||
| 258 | SYS_DVBS2, | ||
| 259 | SYS_DVBH, | ||
| 260 | SYS_ISDBT, | ||
| 261 | SYS_ISDBS, | ||
| 262 | SYS_ISDBC, | ||
| 263 | SYS_ATSC, | ||
| 264 | SYS_ATSCMH, | ||
| 265 | SYS_DMBTH, | ||
| 266 | SYS_CMMB, | ||
| 267 | SYS_DAB, | ||
| 268 | SYS_DVBT2, | ||
| 269 | } fe_delivery_system_t; | ||
| 270 | </programlisting> | ||
| 271 | |||
| 272 | </section> | ||
| 273 | |||
| 274 | <section id="DTV_TRANSMISSION_MODE"> | ||
| 275 | <title><constant>DTV_TRANSMISSION_MODE</constant></title> | ||
| 276 | |||
| 277 | <para>Specifies the number of carriers used by the standard</para> | ||
| 278 | |||
| 279 | <para>Possible values are:</para> | ||
| 280 | <programlisting> | ||
| 281 | typedef enum fe_transmit_mode { | ||
| 282 | TRANSMISSION_MODE_2K, | ||
| 283 | TRANSMISSION_MODE_8K, | ||
| 284 | TRANSMISSION_MODE_AUTO, | ||
| 285 | TRANSMISSION_MODE_4K, | ||
| 286 | TRANSMISSION_MODE_1K, | ||
| 287 | TRANSMISSION_MODE_16K, | ||
| 288 | TRANSMISSION_MODE_32K, | ||
| 289 | } fe_transmit_mode_t; | ||
| 290 | </programlisting> | ||
| 291 | |||
| 292 | <para>Notes:</para> | ||
| 293 | <para>1) ISDB-T supports three carrier/symbol-size: 8K, 4K, 2K. It is called | ||
| 294 | 'mode' in the standard: Mode 1 is 2K, mode 2 is 4K, mode 3 is 8K</para> | ||
| 295 | |||
| 296 | <para>2) If <constant>DTV_TRANSMISSION_MODE</constant> is set the <constant>TRANSMISSION_MODE_AUTO</constant> the | ||
| 297 | hardware will try to find the correct FFT-size (if capable) and will | ||
| 298 | use TMCC to fill in the missing parameters.</para> | ||
| 299 | <para>3) DVB-T specifies 2K and 8K as valid sizes.</para> | ||
| 300 | <para>4) DVB-T2 specifies 1K, 2K, 4K, 8K, 16K and 32K.</para> | ||
| 301 | </section> | ||
| 302 | |||
| 303 | <section id="DTV_GUARD_INTERVAL"> | ||
| 304 | <title><constant>DTV_GUARD_INTERVAL</constant></title> | ||
| 305 | |||
| 306 | <para>Possible values are:</para> | ||
| 307 | <programlisting> | ||
| 308 | typedef enum fe_guard_interval { | ||
| 309 | GUARD_INTERVAL_1_32, | ||
| 310 | GUARD_INTERVAL_1_16, | ||
| 311 | GUARD_INTERVAL_1_8, | ||
| 312 | GUARD_INTERVAL_1_4, | ||
| 313 | GUARD_INTERVAL_AUTO, | ||
| 314 | GUARD_INTERVAL_1_128, | ||
| 315 | GUARD_INTERVAL_19_128, | ||
| 316 | GUARD_INTERVAL_19_256, | ||
| 317 | } fe_guard_interval_t; | ||
| 318 | </programlisting> | ||
| 319 | |||
| 320 | <para>Notes:</para> | ||
| 321 | <para>1) If <constant>DTV_GUARD_INTERVAL</constant> is set the <constant>GUARD_INTERVAL_AUTO</constant> the hardware will | ||
| 322 | try to find the correct guard interval (if capable) and will use TMCC to fill | ||
| 323 | in the missing parameters.</para> | ||
| 324 | <para>2) Intervals 1/128, 19/128 and 19/256 are used only for DVB-T2 at present</para> | ||
| 325 | </section> | ||
| 326 | </section> | ||
| 327 | |||
| 328 | <section id="isdbt"> | ||
| 329 | <title>ISDB-T frontend</title> | ||
| 330 | <para>This section describes shortly what are the possible parameters in the Linux | ||
| 331 | DVB-API called "S2API" and now DVB API 5 in order to tune an ISDB-T/ISDB-Tsb | ||
| 332 | demodulator:</para> | ||
| 333 | |||
| 334 | <para>This ISDB-T/ISDB-Tsb API extension should reflect all information | ||
| 335 | needed to tune any ISDB-T/ISDB-Tsb hardware. Of course it is possible | ||
| 336 | that some very sophisticated devices won't need certain parameters to | ||
| 337 | tune.</para> | ||
| 338 | |||
| 339 | <para>The information given here should help application writers to know how | ||
| 340 | to handle ISDB-T and ISDB-Tsb hardware using the Linux DVB-API.</para> | ||
| 341 | |||
| 342 | <para>The details given here about ISDB-T and ISDB-Tsb are just enough to | ||
| 343 | basically show the dependencies between the needed parameter values, | ||
| 344 | but surely some information is left out. For more detailed information | ||
| 345 | see the following documents:</para> | ||
| 346 | |||
| 347 | <para>ARIB STD-B31 - "Transmission System for Digital Terrestrial | ||
| 348 | Television Broadcasting" and</para> | ||
| 349 | <para>ARIB TR-B14 - "Operational Guidelines for Digital Terrestrial | ||
| 350 | Television Broadcasting".</para> | ||
| 351 | |||
| 352 | <para>In order to read this document one has to have some knowledge the | ||
| 353 | channel structure in ISDB-T and ISDB-Tsb. I.e. it has to be known to | ||
| 354 | the reader that an ISDB-T channel consists of 13 segments, that it can | ||
| 355 | have up to 3 layer sharing those segments, and things like that.</para> | ||
| 356 | |||
| 357 | <para>Parameters used by ISDB-T and ISDB-Tsb.</para> | ||
| 358 | |||
| 359 | <section id="isdbt-new-parms"> | ||
| 360 | <title>ISDB-T only parameters</title> | ||
| 361 | |||
| 362 | <section id="isdbt-part-rec"> | ||
| 363 | <title><constant>DTV_ISDBT_PARTIAL_RECEPTION</constant></title> | ||
| 364 | |||
| 365 | <para><constant>If DTV_ISDBT_SOUND_BROADCASTING</constant> is '0' this bit-field represents whether | ||
| 366 | the channel is in partial reception mode or not.</para> | ||
| 367 | |||
| 368 | <para>If '1' <constant>DTV_ISDBT_LAYERA_*</constant> values are assigned to the center segment and | ||
| 369 | <constant>DTV_ISDBT_LAYERA_SEGMENT_COUNT</constant> has to be '1'.</para> | ||
| 370 | |||
| 371 | <para>If in addition <constant>DTV_ISDBT_SOUND_BROADCASTING</constant> is '1' | ||
| 372 | <constant>DTV_ISDBT_PARTIAL_RECEPTION</constant> represents whether this ISDB-Tsb channel | ||
| 373 | is consisting of one segment and layer or three segments and two layers.</para> | ||
| 374 | |||
| 375 | <para>Possible values: 0, 1, -1 (AUTO)</para> | ||
| 376 | </section> | ||
| 377 | |||
| 378 | <section id="isdbt-sound-bcast"> | ||
| 379 | <title><constant>DTV_ISDBT_SOUND_BROADCASTING</constant></title> | ||
| 380 | |||
| 381 | <para>This field represents whether the other DTV_ISDBT_*-parameters are | ||
| 382 | referring to an ISDB-T and an ISDB-Tsb channel. (See also | ||
| 383 | <constant>DTV_ISDBT_PARTIAL_RECEPTION</constant>).</para> | ||
| 384 | |||
| 385 | <para>Possible values: 0, 1, -1 (AUTO)</para> | ||
| 386 | </section> | ||
| 387 | |||
| 388 | <section id="isdbt-sb-ch-id"> | ||
| 389 | <title><constant>DTV_ISDBT_SB_SUBCHANNEL_ID</constant></title> | ||
| 390 | |||
| 391 | <para>This field only applies if <constant>DTV_ISDBT_SOUND_BROADCASTING</constant> is '1'.</para> | ||
| 392 | |||
| 393 | <para>(Note of the author: This might not be the correct description of the | ||
| 394 | <constant>SUBCHANNEL-ID</constant> in all details, but it is my understanding of the technical | ||
| 395 | background needed to program a device)</para> | ||
| 396 | |||
| 397 | <para>An ISDB-Tsb channel (1 or 3 segments) can be broadcasted alone or in a | ||
| 398 | set of connected ISDB-Tsb channels. In this set of channels every | ||
| 399 | channel can be received independently. The number of connected | ||
| 400 | ISDB-Tsb segment can vary, e.g. depending on the frequency spectrum | ||
| 401 | bandwidth available.</para> | ||
| 402 | |||
| 403 | <para>Example: Assume 8 ISDB-Tsb connected segments are broadcasted. The | ||
| 404 | broadcaster has several possibilities to put those channels in the | ||
| 405 | air: Assuming a normal 13-segment ISDB-T spectrum he can align the 8 | ||
| 406 | segments from position 1-8 to 5-13 or anything in between.</para> | ||
| 407 | |||
| 408 | <para>The underlying layer of segments are subchannels: each segment is | ||
| 409 | consisting of several subchannels with a predefined IDs. A sub-channel | ||
| 410 | is used to help the demodulator to synchronize on the channel.</para> | ||
| 411 | |||
| 412 | <para>An ISDB-T channel is always centered over all sub-channels. As for | ||
| 413 | the example above, in ISDB-Tsb it is no longer as simple as that.</para> | ||
| 414 | |||
| 415 | <para><constant>The DTV_ISDBT_SB_SUBCHANNEL_ID</constant> parameter is used to give the | ||
| 416 | sub-channel ID of the segment to be demodulated.</para> | ||
| 417 | |||
| 418 | <para>Possible values: 0 .. 41, -1 (AUTO)</para> | ||
| 419 | </section> | ||
| 420 | |||
| 421 | <section id="isdbt-sb-seg-idx"> | ||
| 422 | |||
| 423 | <title><constant>DTV_ISDBT_SB_SEGMENT_IDX</constant></title> | ||
| 424 | |||
| 425 | <para>This field only applies if <constant>DTV_ISDBT_SOUND_BROADCASTING</constant> is '1'.</para> | ||
| 426 | |||
| 427 | <para><constant>DTV_ISDBT_SB_SEGMENT_IDX</constant> gives the index of the segment to be | ||
| 428 | demodulated for an ISDB-Tsb channel where several of them are | ||
| 429 | transmitted in the connected manner.</para> | ||
| 430 | |||
| 431 | <para>Possible values: 0 .. <constant>DTV_ISDBT_SB_SEGMENT_COUNT</constant> - 1</para> | ||
| 432 | |||
| 433 | <para>Note: This value cannot be determined by an automatic channel search.</para> | ||
| 434 | </section> | ||
| 435 | |||
| 436 | <section id="isdbt-sb-seg-cnt"> | ||
| 437 | <title><constant>DTV_ISDBT_SB_SEGMENT_COUNT</constant></title> | ||
| 438 | |||
| 439 | <para>This field only applies if <constant>DTV_ISDBT_SOUND_BROADCASTING</constant> is '1'.</para> | ||
| 440 | |||
| 441 | <para><constant>DTV_ISDBT_SB_SEGMENT_COUNT</constant> gives the total count of connected ISDB-Tsb | ||
| 442 | channels.</para> | ||
| 443 | |||
| 444 | <para>Possible values: 1 .. 13</para> | ||
| 445 | |||
| 446 | <para>Note: This value cannot be determined by an automatic channel search.</para> | ||
| 447 | </section> | ||
| 448 | |||
| 449 | <section id="isdb-hierq-layers"> | ||
| 450 | <title>Hierarchical layers</title> | ||
| 451 | |||
| 452 | <para>ISDB-T channels can be coded hierarchically. As opposed to DVB-T in | ||
| 453 | ISDB-T hierarchical layers can be decoded simultaneously. For that | ||
| 454 | reason a ISDB-T demodulator has 3 viterbi and 3 reed-solomon-decoders.</para> | ||
| 455 | |||
| 456 | <para>ISDB-T has 3 hierarchical layers which each can use a part of the | ||
| 457 | available segments. The total number of segments over all layers has | ||
| 458 | to 13 in ISDB-T.</para> | ||
| 459 | |||
| 460 | <section id="isdbt-layer-ena"> | ||
| 461 | <title><constant>DTV_ISDBT_LAYER_ENABLED</constant></title> | ||
| 462 | |||
| 463 | <para>Hierarchical reception in ISDB-T is achieved by enabling or disabling | ||
| 464 | layers in the decoding process. Setting all bits of | ||
| 465 | <constant>DTV_ISDBT_LAYER_ENABLED</constant> to '1' forces all layers (if applicable) to be | ||
| 466 | demodulated. This is the default.</para> | ||
| 467 | |||
| 468 | <para>If the channel is in the partial reception mode | ||
| 469 | (<constant>DTV_ISDBT_PARTIAL_RECEPTION</constant> = 1) the central segment can be decoded | ||
| 470 | independently of the other 12 segments. In that mode layer A has to | ||
| 471 | have a <constant>SEGMENT_COUNT</constant> of 1.</para> | ||
| 472 | |||
| 473 | <para>In ISDB-Tsb only layer A is used, it can be 1 or 3 in ISDB-Tsb | ||
| 474 | according to <constant>DTV_ISDBT_PARTIAL_RECEPTION</constant>. <constant>SEGMENT_COUNT</constant> must be filled | ||
| 475 | accordingly.</para> | ||
| 476 | |||
| 477 | <para>Possible values: 0x1, 0x2, 0x4 (|-able)</para> | ||
| 478 | |||
| 479 | <para><constant>DTV_ISDBT_LAYER_ENABLED[0:0]</constant> - layer A</para> | ||
| 480 | <para><constant>DTV_ISDBT_LAYER_ENABLED[1:1]</constant> - layer B</para> | ||
| 481 | <para><constant>DTV_ISDBT_LAYER_ENABLED[2:2]</constant> - layer C</para> | ||
| 482 | <para><constant>DTV_ISDBT_LAYER_ENABLED[31:3]</constant> unused</para> | ||
| 483 | </section> | ||
| 484 | |||
| 485 | <section id="isdbt-layer-fec"> | ||
| 486 | <title><constant>DTV_ISDBT_LAYER*_FEC</constant></title> | ||
| 487 | |||
| 488 | <para>Possible values: <constant>FEC_AUTO</constant>, <constant>FEC_1_2</constant>, <constant>FEC_2_3</constant>, <constant>FEC_3_4</constant>, <constant>FEC_5_6</constant>, <constant>FEC_7_8</constant></para> | ||
| 489 | </section> | ||
| 490 | |||
| 491 | <section id="isdbt-layer-mod"> | ||
| 492 | <title><constant>DTV_ISDBT_LAYER*_MODULATION</constant></title> | ||
| 493 | |||
| 494 | <para>Possible values: <constant>QAM_AUTO</constant>, QP<constant>SK, QAM_16</constant>, <constant>QAM_64</constant>, <constant>DQPSK</constant></para> | ||
| 495 | |||
| 496 | <para>Note: If layer C is <constant>DQPSK</constant> layer B has to be <constant>DQPSK</constant>. If layer B is <constant>DQPSK</constant> | ||
| 497 | and <constant>DTV_ISDBT_PARTIAL_RECEPTION</constant>=0 layer has to be <constant>DQPSK</constant>.</para> | ||
| 498 | </section> | ||
| 499 | |||
| 500 | <section id="isdbt-layer-seg-cnt"> | ||
| 501 | <title><constant>DTV_ISDBT_LAYER*_SEGMENT_COUNT</constant></title> | ||
| 502 | |||
| 503 | <para>Possible values: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, -1 (AUTO)</para> | ||
| 504 | |||
| 505 | <para>Note: Truth table for <constant>DTV_ISDBT_SOUND_BROADCASTING</constant> and | ||
| 506 | <constant>DTV_ISDBT_PARTIAL_RECEPTION</constant> and <constant>LAYER</constant>*_SEGMENT_COUNT</para> | ||
| 507 | |||
| 508 | <informaltable id="isdbt-layer_seg-cnt-table"> | ||
| 509 | <tgroup cols="6"> | ||
| 510 | |||
| 511 | <tbody> | ||
| 512 | <row> | ||
| 513 | <entry>PR</entry> | ||
| 514 | <entry>SB</entry> | ||
| 515 | <entry>Layer A width</entry> | ||
| 516 | <entry>Layer B width</entry> | ||
| 517 | <entry>Layer C width</entry> | ||
| 518 | <entry>total width</entry> | ||
| 519 | </row> | ||
| 520 | |||
| 521 | <row> | ||
| 522 | <entry>0</entry> | ||
| 523 | <entry>0</entry> | ||
| 524 | <entry>1 .. 13</entry> | ||
| 525 | <entry>1 .. 13</entry> | ||
| 526 | <entry>1 .. 13</entry> | ||
| 527 | <entry>13</entry> | ||
| 528 | </row> | ||
| 529 | |||
| 530 | <row> | ||
| 531 | <entry>1</entry> | ||
| 532 | <entry>0</entry> | ||
| 533 | <entry>1</entry> | ||
| 534 | <entry>1 .. 13</entry> | ||
| 535 | <entry>1 .. 13</entry> | ||
| 536 | <entry>13</entry> | ||
| 537 | </row> | ||
| 538 | |||
| 539 | <row> | ||
| 540 | <entry>0</entry> | ||
| 541 | <entry>1</entry> | ||
| 542 | <entry>1</entry> | ||
| 543 | <entry>0</entry> | ||
| 544 | <entry>0</entry> | ||
| 545 | <entry>1</entry> | ||
| 546 | </row> | ||
| 547 | |||
| 548 | <row> | ||
| 549 | <entry>1</entry> | ||
| 550 | <entry>1</entry> | ||
| 551 | <entry>1</entry> | ||
| 552 | <entry>2</entry> | ||
| 553 | <entry>0</entry> | ||
| 554 | <entry>13</entry> | ||
| 555 | </row> | ||
| 556 | </tbody> | ||
| 557 | |||
| 558 | </tgroup> | ||
| 559 | </informaltable> | ||
| 560 | |||
| 561 | </section> | ||
| 562 | |||
| 563 | <section id="isdbt_layer_t_interl"> | ||
| 564 | <title><constant>DTV_ISDBT_LAYER*_TIME_INTERLEAVING</constant></title> | ||
| 565 | |||
| 566 | <para>Possible values: 0, 1, 2, 3, -1 (AUTO)</para> | ||
| 567 | |||
| 568 | <para>Note: The real inter-leaver depth-names depend on the mode (fft-size); the values | ||
| 569 | here are referring to what can be found in the TMCC-structure - | ||
| 570 | independent of the mode.</para> | ||
| 571 | </section> | ||
| 572 | </section> | ||
| 573 | </section> | ||
| 574 | <section id="dvbt2-params"> | ||
| 575 | <title>DVB-T2 parameters</title> | ||
| 576 | |||
| 577 | <para>This section covers parameters that apply only to the DVB-T2 delivery method. DVB-T2 | ||
| 578 | support is currently in the early stages development so expect this section to grow | ||
| 579 | and become more detailed with time.</para> | ||
| 580 | |||
| 581 | <section id="dvbt2-plp-id"> | ||
| 582 | <title><constant>DTV_DVBT2_PLP_ID</constant></title> | ||
| 583 | |||
| 584 | <para>DVB-T2 supports Physical Layer Pipes (PLP) to allow transmission of | ||
| 585 | many data types via a single multiplex. The API will soon support this | ||
| 586 | at which point this section will be expanded.</para> | ||
| 587 | </section> | ||
| 588 | </section> | ||
| 589 | </section> | ||
| 590 | </section> | ||
diff --git a/Documentation/DocBook/dvb/dvbstb.png b/Documentation/DocBook/dvb/dvbstb.png deleted file mode 100644 index 9b8f372e7afd..000000000000 --- a/Documentation/DocBook/dvb/dvbstb.png +++ /dev/null | |||
| Binary files differ | |||
diff --git a/Documentation/DocBook/dvb/frontend.h.xml b/Documentation/DocBook/dvb/frontend.h.xml deleted file mode 100644 index d792f789ad3b..000000000000 --- a/Documentation/DocBook/dvb/frontend.h.xml +++ /dev/null | |||
| @@ -1,428 +0,0 @@ | |||
| 1 | <programlisting> | ||
| 2 | /* | ||
| 3 | * frontend.h | ||
| 4 | * | ||
| 5 | * Copyright (C) 2000 Marcus Metzler <marcus@convergence.de> | ||
| 6 | * Ralph Metzler <ralph@convergence.de> | ||
| 7 | * Holger Waechtler <holger@convergence.de> | ||
| 8 | * Andre Draszik <ad@convergence.de> | ||
| 9 | * for convergence integrated media GmbH | ||
| 10 | * | ||
| 11 | * This program is free software; you can redistribute it and/or | ||
| 12 | * modify it under the terms of the GNU Lesser General Public License | ||
| 13 | * as published by the Free Software Foundation; either version 2.1 | ||
| 14 | * of the License, or (at your option) any later version. | ||
| 15 | * | ||
| 16 | * This program is distributed in the hope that it will be useful, | ||
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 19 | * GNU General Public License for more details. | ||
| 20 | * | ||
| 21 | * You should have received a copy of the GNU Lesser General Public License | ||
| 22 | * along with this program; if not, write to the Free Software | ||
| 23 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | ||
| 24 | * | ||
| 25 | */ | ||
| 26 | |||
| 27 | #ifndef _DVBFRONTEND_H_ | ||
| 28 | #define _DVBFRONTEND_H_ | ||
| 29 | |||
| 30 | #include <linux/types.h> | ||
| 31 | |||
| 32 | typedef enum fe_type { | ||
| 33 | FE_QPSK, | ||
| 34 | FE_QAM, | ||
| 35 | FE_OFDM, | ||
| 36 | FE_ATSC | ||
| 37 | } fe_type_t; | ||
| 38 | |||
| 39 | |||
| 40 | typedef enum fe_caps { | ||
| 41 | FE_IS_STUPID = 0, | ||
| 42 | FE_CAN_INVERSION_AUTO = 0x1, | ||
| 43 | FE_CAN_FEC_1_2 = 0x2, | ||
| 44 | FE_CAN_FEC_2_3 = 0x4, | ||
| 45 | FE_CAN_FEC_3_4 = 0x8, | ||
| 46 | FE_CAN_FEC_4_5 = 0x10, | ||
| 47 | FE_CAN_FEC_5_6 = 0x20, | ||
| 48 | FE_CAN_FEC_6_7 = 0x40, | ||
| 49 | FE_CAN_FEC_7_8 = 0x80, | ||
| 50 | FE_CAN_FEC_8_9 = 0x100, | ||
| 51 | FE_CAN_FEC_AUTO = 0x200, | ||
| 52 | FE_CAN_QPSK = 0x400, | ||
| 53 | FE_CAN_QAM_16 = 0x800, | ||
| 54 | FE_CAN_QAM_32 = 0x1000, | ||
| 55 | FE_CAN_QAM_64 = 0x2000, | ||
| 56 | FE_CAN_QAM_128 = 0x4000, | ||
| 57 | FE_CAN_QAM_256 = 0x8000, | ||
| 58 | FE_CAN_QAM_AUTO = 0x10000, | ||
| 59 | FE_CAN_TRANSMISSION_MODE_AUTO = 0x20000, | ||
| 60 | FE_CAN_BANDWIDTH_AUTO = 0x40000, | ||
| 61 | FE_CAN_GUARD_INTERVAL_AUTO = 0x80000, | ||
| 62 | FE_CAN_HIERARCHY_AUTO = 0x100000, | ||
| 63 | FE_CAN_8VSB = 0x200000, | ||
| 64 | FE_CAN_16VSB = 0x400000, | ||
| 65 | FE_HAS_EXTENDED_CAPS = 0x800000, /* We need more bitspace for newer APIs, indicate this. */ | ||
| 66 | FE_CAN_TURBO_FEC = 0x8000000, /* frontend supports "turbo fec modulation" */ | ||
| 67 | FE_CAN_2G_MODULATION = 0x10000000, /* frontend supports "2nd generation modulation" (DVB-S2) */ | ||
| 68 | FE_NEEDS_BENDING = 0x20000000, /* not supported anymore, don't use (frontend requires frequency bending) */ | ||
| 69 | FE_CAN_RECOVER = 0x40000000, /* frontend can recover from a cable unplug automatically */ | ||
| 70 | FE_CAN_MUTE_TS = 0x80000000 /* frontend can stop spurious TS data output */ | ||
| 71 | } fe_caps_t; | ||
| 72 | |||
| 73 | |||
| 74 | struct dvb_frontend_info { | ||
| 75 | char name[128]; | ||
| 76 | fe_type_t type; | ||
| 77 | __u32 frequency_min; | ||
| 78 | __u32 frequency_max; | ||
| 79 | __u32 frequency_stepsize; | ||
| 80 | __u32 frequency_tolerance; | ||
| 81 | __u32 symbol_rate_min; | ||
| 82 | __u32 symbol_rate_max; | ||
| 83 | __u32 symbol_rate_tolerance; /* ppm */ | ||
| 84 | __u32 notifier_delay; /* DEPRECATED */ | ||
| 85 | fe_caps_t caps; | ||
| 86 | }; | ||
| 87 | |||
| 88 | |||
| 89 | /** | ||
| 90 | * Check out the DiSEqC bus spec available on http://www.eutelsat.org/ for | ||
| 91 | * the meaning of this struct... | ||
| 92 | */ | ||
| 93 | struct dvb_diseqc_master_cmd { | ||
| 94 | __u8 msg [6]; /* { framing, address, command, data [3] } */ | ||
| 95 | __u8 msg_len; /* valid values are 3...6 */ | ||
| 96 | }; | ||
| 97 | |||
| 98 | |||
| 99 | struct dvb_diseqc_slave_reply { | ||
| 100 | __u8 msg [4]; /* { framing, data [3] } */ | ||
| 101 | __u8 msg_len; /* valid values are 0...4, 0 means no msg */ | ||
| 102 | int timeout; /* return from ioctl after timeout ms with */ | ||
| 103 | }; /* errorcode when no message was received */ | ||
| 104 | |||
| 105 | |||
| 106 | typedef enum fe_sec_voltage { | ||
| 107 | SEC_VOLTAGE_13, | ||
| 108 | SEC_VOLTAGE_18, | ||
| 109 | SEC_VOLTAGE_OFF | ||
| 110 | } fe_sec_voltage_t; | ||
| 111 | |||
| 112 | |||
| 113 | typedef enum fe_sec_tone_mode { | ||
| 114 | SEC_TONE_ON, | ||
| 115 | SEC_TONE_OFF | ||
| 116 | } fe_sec_tone_mode_t; | ||
| 117 | |||
| 118 | |||
| 119 | typedef enum fe_sec_mini_cmd { | ||
| 120 | SEC_MINI_A, | ||
| 121 | SEC_MINI_B | ||
| 122 | } fe_sec_mini_cmd_t; | ||
| 123 | |||
| 124 | |||
| 125 | typedef enum fe_status { | ||
| 126 | FE_HAS_SIGNAL = 0x01, /* found something above the noise level */ | ||
| 127 | FE_HAS_CARRIER = 0x02, /* found a DVB signal */ | ||
| 128 | FE_HAS_VITERBI = 0x04, /* FEC is stable */ | ||
| 129 | FE_HAS_SYNC = 0x08, /* found sync bytes */ | ||
| 130 | FE_HAS_LOCK = 0x10, /* everything's working... */ | ||
| 131 | FE_TIMEDOUT = 0x20, /* no lock within the last ~2 seconds */ | ||
| 132 | FE_REINIT = 0x40 /* frontend was reinitialized, */ | ||
| 133 | } fe_status_t; /* application is recommended to reset */ | ||
| 134 | /* DiSEqC, tone and parameters */ | ||
| 135 | |||
| 136 | typedef enum fe_spectral_inversion { | ||
| 137 | INVERSION_OFF, | ||
| 138 | INVERSION_ON, | ||
| 139 | INVERSION_AUTO | ||
| 140 | } fe_spectral_inversion_t; | ||
| 141 | |||
| 142 | |||
| 143 | typedef enum fe_code_rate { | ||
| 144 | FEC_NONE = 0, | ||
| 145 | FEC_1_2, | ||
| 146 | FEC_2_3, | ||
| 147 | FEC_3_4, | ||
| 148 | FEC_4_5, | ||
| 149 | FEC_5_6, | ||
| 150 | FEC_6_7, | ||
| 151 | FEC_7_8, | ||
| 152 | FEC_8_9, | ||
| 153 | FEC_AUTO, | ||
| 154 | FEC_3_5, | ||
| 155 | FEC_9_10, | ||
| 156 | } fe_code_rate_t; | ||
| 157 | |||
| 158 | |||
| 159 | typedef enum fe_modulation { | ||
| 160 | QPSK, | ||
| 161 | QAM_16, | ||
| 162 | QAM_32, | ||
| 163 | QAM_64, | ||
| 164 | QAM_128, | ||
| 165 | QAM_256, | ||
| 166 | QAM_AUTO, | ||
| 167 | VSB_8, | ||
| 168 | VSB_16, | ||
| 169 | PSK_8, | ||
| 170 | APSK_16, | ||
| 171 | APSK_32, | ||
| 172 | DQPSK, | ||
| 173 | } fe_modulation_t; | ||
| 174 | |||
| 175 | typedef enum fe_transmit_mode { | ||
| 176 | TRANSMISSION_MODE_2K, | ||
| 177 | TRANSMISSION_MODE_8K, | ||
| 178 | TRANSMISSION_MODE_AUTO, | ||
| 179 | TRANSMISSION_MODE_4K, | ||
| 180 | TRANSMISSION_MODE_1K, | ||
| 181 | TRANSMISSION_MODE_16K, | ||
| 182 | TRANSMISSION_MODE_32K, | ||
| 183 | } fe_transmit_mode_t; | ||
| 184 | |||
| 185 | typedef enum fe_bandwidth { | ||
| 186 | BANDWIDTH_8_MHZ, | ||
| 187 | BANDWIDTH_7_MHZ, | ||
| 188 | BANDWIDTH_6_MHZ, | ||
| 189 | BANDWIDTH_AUTO, | ||
| 190 | BANDWIDTH_5_MHZ, | ||
| 191 | BANDWIDTH_10_MHZ, | ||
| 192 | BANDWIDTH_1_712_MHZ, | ||
| 193 | } fe_bandwidth_t; | ||
| 194 | |||
| 195 | |||
| 196 | typedef enum fe_guard_interval { | ||
| 197 | GUARD_INTERVAL_1_32, | ||
| 198 | GUARD_INTERVAL_1_16, | ||
| 199 | GUARD_INTERVAL_1_8, | ||
| 200 | GUARD_INTERVAL_1_4, | ||
| 201 | GUARD_INTERVAL_AUTO, | ||
| 202 | GUARD_INTERVAL_1_128, | ||
| 203 | GUARD_INTERVAL_19_128, | ||
| 204 | GUARD_INTERVAL_19_256, | ||
| 205 | } fe_guard_interval_t; | ||
| 206 | |||
| 207 | |||
| 208 | typedef enum fe_hierarchy { | ||
| 209 | HIERARCHY_NONE, | ||
| 210 | HIERARCHY_1, | ||
| 211 | HIERARCHY_2, | ||
| 212 | HIERARCHY_4, | ||
| 213 | HIERARCHY_AUTO | ||
| 214 | } fe_hierarchy_t; | ||
| 215 | |||
| 216 | |||
| 217 | struct dvb_qpsk_parameters { | ||
| 218 | __u32 symbol_rate; /* symbol rate in Symbols per second */ | ||
| 219 | fe_code_rate_t fec_inner; /* forward error correction (see above) */ | ||
| 220 | }; | ||
| 221 | |||
| 222 | struct dvb_qam_parameters { | ||
| 223 | __u32 symbol_rate; /* symbol rate in Symbols per second */ | ||
| 224 | fe_code_rate_t fec_inner; /* forward error correction (see above) */ | ||
| 225 | fe_modulation_t modulation; /* modulation type (see above) */ | ||
| 226 | }; | ||
| 227 | |||
| 228 | struct dvb_vsb_parameters { | ||
| 229 | fe_modulation_t modulation; /* modulation type (see above) */ | ||
| 230 | }; | ||
| 231 | |||
| 232 | struct dvb_ofdm_parameters { | ||
| 233 | fe_bandwidth_t bandwidth; | ||
| 234 | fe_code_rate_t code_rate_HP; /* high priority stream code rate */ | ||
| 235 | fe_code_rate_t code_rate_LP; /* low priority stream code rate */ | ||
| 236 | fe_modulation_t constellation; /* modulation type (see above) */ | ||
| 237 | fe_transmit_mode_t transmission_mode; | ||
| 238 | fe_guard_interval_t guard_interval; | ||
| 239 | fe_hierarchy_t hierarchy_information; | ||
| 240 | }; | ||
| 241 | |||
| 242 | |||
| 243 | struct dvb_frontend_parameters { | ||
| 244 | __u32 frequency; /* (absolute) frequency in Hz for QAM/OFDM/ATSC */ | ||
| 245 | /* intermediate frequency in kHz for QPSK */ | ||
| 246 | fe_spectral_inversion_t inversion; | ||
| 247 | union { | ||
| 248 | struct dvb_qpsk_parameters qpsk; | ||
| 249 | struct dvb_qam_parameters qam; | ||
| 250 | struct dvb_ofdm_parameters ofdm; | ||
| 251 | struct dvb_vsb_parameters vsb; | ||
| 252 | } u; | ||
| 253 | }; | ||
| 254 | |||
| 255 | |||
| 256 | struct dvb_frontend_event { | ||
| 257 | fe_status_t status; | ||
| 258 | struct dvb_frontend_parameters parameters; | ||
| 259 | }; | ||
| 260 | |||
| 261 | /* S2API Commands */ | ||
| 262 | #define DTV_UNDEFINED 0 | ||
| 263 | #define DTV_TUNE 1 | ||
| 264 | #define DTV_CLEAR 2 | ||
| 265 | #define DTV_FREQUENCY 3 | ||
| 266 | #define DTV_MODULATION 4 | ||
| 267 | #define DTV_BANDWIDTH_HZ 5 | ||
| 268 | #define DTV_INVERSION 6 | ||
| 269 | #define DTV_DISEQC_MASTER 7 | ||
| 270 | #define DTV_SYMBOL_RATE 8 | ||
| 271 | #define DTV_INNER_FEC 9 | ||
| 272 | #define DTV_VOLTAGE 10 | ||
| 273 | #define DTV_TONE 11 | ||
| 274 | #define DTV_PILOT 12 | ||
| 275 | #define DTV_ROLLOFF 13 | ||
| 276 | #define DTV_DISEQC_SLAVE_REPLY 14 | ||
| 277 | |||
| 278 | /* Basic enumeration set for querying unlimited capabilities */ | ||
| 279 | #define DTV_FE_CAPABILITY_COUNT 15 | ||
| 280 | #define DTV_FE_CAPABILITY 16 | ||
| 281 | #define DTV_DELIVERY_SYSTEM 17 | ||
| 282 | |||
| 283 | /* ISDB-T and ISDB-Tsb */ | ||
| 284 | #define DTV_ISDBT_PARTIAL_RECEPTION 18 | ||
| 285 | #define DTV_ISDBT_SOUND_BROADCASTING 19 | ||
| 286 | |||
| 287 | #define DTV_ISDBT_SB_SUBCHANNEL_ID 20 | ||
| 288 | #define DTV_ISDBT_SB_SEGMENT_IDX 21 | ||
| 289 | #define DTV_ISDBT_SB_SEGMENT_COUNT 22 | ||
| 290 | |||
| 291 | #define DTV_ISDBT_LAYERA_FEC 23 | ||
| 292 | #define DTV_ISDBT_LAYERA_MODULATION 24 | ||
| 293 | #define DTV_ISDBT_LAYERA_SEGMENT_COUNT 25 | ||
| 294 | #define DTV_ISDBT_LAYERA_TIME_INTERLEAVING 26 | ||
| 295 | |||
| 296 | #define DTV_ISDBT_LAYERB_FEC 27 | ||
| 297 | #define DTV_ISDBT_LAYERB_MODULATION 28 | ||
| 298 | #define DTV_ISDBT_LAYERB_SEGMENT_COUNT 29 | ||
| 299 | #define DTV_ISDBT_LAYERB_TIME_INTERLEAVING 30 | ||
| 300 | |||
| 301 | #define DTV_ISDBT_LAYERC_FEC 31 | ||
| 302 | #define DTV_ISDBT_LAYERC_MODULATION 32 | ||
| 303 | #define DTV_ISDBT_LAYERC_SEGMENT_COUNT 33 | ||
| 304 | #define DTV_ISDBT_LAYERC_TIME_INTERLEAVING 34 | ||
| 305 | |||
| 306 | #define DTV_API_VERSION 35 | ||
| 307 | |||
| 308 | #define DTV_CODE_RATE_HP 36 | ||
| 309 | #define DTV_CODE_RATE_LP 37 | ||
| 310 | #define DTV_GUARD_INTERVAL 38 | ||
| 311 | #define DTV_TRANSMISSION_MODE 39 | ||
| 312 | #define DTV_HIERARCHY 40 | ||
| 313 | |||
| 314 | #define DTV_ISDBT_LAYER_ENABLED 41 | ||
| 315 | |||
| 316 | #define DTV_ISDBS_TS_ID 42 | ||
| 317 | |||
| 318 | #define DTV_DVBT2_PLP_ID 43 | ||
| 319 | |||
| 320 | #define DTV_MAX_COMMAND DTV_DVBT2_PLP_ID | ||
| 321 | |||
| 322 | typedef enum fe_pilot { | ||
| 323 | PILOT_ON, | ||
| 324 | PILOT_OFF, | ||
| 325 | PILOT_AUTO, | ||
| 326 | } fe_pilot_t; | ||
| 327 | |||
| 328 | typedef enum fe_rolloff { | ||
| 329 | ROLLOFF_35, /* Implied value in DVB-S, default for DVB-S2 */ | ||
| 330 | ROLLOFF_20, | ||
| 331 | ROLLOFF_25, | ||
| 332 | ROLLOFF_AUTO, | ||
| 333 | } fe_rolloff_t; | ||
| 334 | |||
| 335 | typedef enum fe_delivery_system { | ||
| 336 | SYS_UNDEFINED, | ||
| 337 | SYS_DVBC_ANNEX_AC, | ||
| 338 | SYS_DVBC_ANNEX_B, | ||
| 339 | SYS_DVBT, | ||
| 340 | SYS_DSS, | ||
| 341 | SYS_DVBS, | ||
| 342 | SYS_DVBS2, | ||
| 343 | SYS_DVBH, | ||
| 344 | SYS_ISDBT, | ||
| 345 | SYS_ISDBS, | ||
| 346 | SYS_ISDBC, | ||
| 347 | SYS_ATSC, | ||
| 348 | SYS_ATSCMH, | ||
| 349 | SYS_DMBTH, | ||
| 350 | SYS_CMMB, | ||
| 351 | SYS_DAB, | ||
| 352 | SYS_DVBT2, | ||
| 353 | } fe_delivery_system_t; | ||
| 354 | |||
| 355 | struct dtv_cmds_h { | ||
| 356 | char *name; /* A display name for debugging purposes */ | ||
| 357 | |||
| 358 | __u32 cmd; /* A unique ID */ | ||
| 359 | |||
| 360 | /* Flags */ | ||
| 361 | __u32 set:1; /* Either a set or get property */ | ||
| 362 | __u32 buffer:1; /* Does this property use the buffer? */ | ||
| 363 | __u32 reserved:30; /* Align */ | ||
| 364 | }; | ||
| 365 | |||
| 366 | struct dtv_property { | ||
| 367 | __u32 cmd; | ||
| 368 | __u32 reserved[3]; | ||
| 369 | union { | ||
| 370 | __u32 data; | ||
| 371 | struct { | ||
| 372 | __u8 data[32]; | ||
| 373 | __u32 len; | ||
| 374 | __u32 reserved1[3]; | ||
| 375 | void *reserved2; | ||
| 376 | } buffer; | ||
| 377 | } u; | ||
| 378 | int result; | ||
| 379 | } __attribute__ ((packed)); | ||
| 380 | |||
| 381 | /* num of properties cannot exceed DTV_IOCTL_MAX_MSGS per ioctl */ | ||
| 382 | #define DTV_IOCTL_MAX_MSGS 64 | ||
| 383 | |||
| 384 | struct dtv_properties { | ||
| 385 | __u32 num; | ||
| 386 | struct dtv_property *props; | ||
| 387 | }; | ||
| 388 | |||
| 389 | #define <link linkend="FE_GET_PROPERTY">FE_SET_PROPERTY</link> _IOW('o', 82, struct dtv_properties) | ||
| 390 | #define <link linkend="FE_GET_PROPERTY">FE_GET_PROPERTY</link> _IOR('o', 83, struct dtv_properties) | ||
| 391 | |||
| 392 | |||
| 393 | /** | ||
| 394 | * When set, this flag will disable any zigzagging or other "normal" tuning | ||
| 395 | * behaviour. Additionally, there will be no automatic monitoring of the lock | ||
| 396 | * status, and hence no frontend events will be generated. If a frontend device | ||
| 397 | * is closed, this flag will be automatically turned off when the device is | ||
| 398 | * reopened read-write. | ||
| 399 | */ | ||
| 400 | #define FE_TUNE_MODE_ONESHOT 0x01 | ||
| 401 | |||
| 402 | |||
| 403 | #define <link linkend="FE_GET_INFO">FE_GET_INFO</link> _IOR('o', 61, struct dvb_frontend_info) | ||
| 404 | |||
| 405 | #define <link linkend="FE_DISEQC_RESET_OVERLOAD">FE_DISEQC_RESET_OVERLOAD</link> _IO('o', 62) | ||
| 406 | #define <link linkend="FE_DISEQC_SEND_MASTER_CMD">FE_DISEQC_SEND_MASTER_CMD</link> _IOW('o', 63, struct dvb_diseqc_master_cmd) | ||
| 407 | #define <link linkend="FE_DISEQC_RECV_SLAVE_REPLY">FE_DISEQC_RECV_SLAVE_REPLY</link> _IOR('o', 64, struct dvb_diseqc_slave_reply) | ||
| 408 | #define <link linkend="FE_DISEQC_SEND_BURST">FE_DISEQC_SEND_BURST</link> _IO('o', 65) /* fe_sec_mini_cmd_t */ | ||
| 409 | |||
| 410 | #define <link linkend="FE_SET_TONE">FE_SET_TONE</link> _IO('o', 66) /* fe_sec_tone_mode_t */ | ||
| 411 | #define <link linkend="FE_SET_VOLTAGE">FE_SET_VOLTAGE</link> _IO('o', 67) /* fe_sec_voltage_t */ | ||
| 412 | #define <link linkend="FE_ENABLE_HIGH_LNB_VOLTAGE">FE_ENABLE_HIGH_LNB_VOLTAGE</link> _IO('o', 68) /* int */ | ||
| 413 | |||
| 414 | #define <link linkend="FE_READ_STATUS">FE_READ_STATUS</link> _IOR('o', 69, fe_status_t) | ||
| 415 | #define <link linkend="FE_READ_BER">FE_READ_BER</link> _IOR('o', 70, __u32) | ||
| 416 | #define <link linkend="FE_READ_SIGNAL_STRENGTH">FE_READ_SIGNAL_STRENGTH</link> _IOR('o', 71, __u16) | ||
| 417 | #define <link linkend="FE_READ_SNR">FE_READ_SNR</link> _IOR('o', 72, __u16) | ||
| 418 | #define <link linkend="FE_READ_UNCORRECTED_BLOCKS">FE_READ_UNCORRECTED_BLOCKS</link> _IOR('o', 73, __u32) | ||
| 419 | |||
| 420 | #define <link linkend="FE_SET_FRONTEND">FE_SET_FRONTEND</link> _IOW('o', 76, struct dvb_frontend_parameters) | ||
| 421 | #define <link linkend="FE_GET_FRONTEND">FE_GET_FRONTEND</link> _IOR('o', 77, struct dvb_frontend_parameters) | ||
| 422 | #define <link linkend="FE_SET_FRONTEND_TUNE_MODE">FE_SET_FRONTEND_TUNE_MODE</link> _IO('o', 81) /* unsigned int */ | ||
| 423 | #define <link linkend="FE_GET_EVENT">FE_GET_EVENT</link> _IOR('o', 78, struct dvb_frontend_event) | ||
| 424 | |||
| 425 | #define <link linkend="FE_DISHNETWORK_SEND_LEGACY_CMD">FE_DISHNETWORK_SEND_LEGACY_CMD</link> _IO('o', 80) /* unsigned int */ | ||
| 426 | |||
| 427 | #endif /*_DVBFRONTEND_H_*/ | ||
| 428 | </programlisting> | ||
diff --git a/Documentation/DocBook/media-entities.tmpl b/Documentation/DocBook/media-entities.tmpl deleted file mode 100644 index e5fe09430fd9..000000000000 --- a/Documentation/DocBook/media-entities.tmpl +++ /dev/null | |||
| @@ -1,464 +0,0 @@ | |||
| 1 | <!-- Generated file! Do not edit. --> | ||
| 2 | |||
| 3 | <!-- Functions --> | ||
| 4 | <!ENTITY func-close "<link linkend='func-close'><function>close()</function></link>"> | ||
| 5 | <!ENTITY func-ioctl "<link linkend='func-ioctl'><function>ioctl()</function></link>"> | ||
| 6 | <!ENTITY func-mmap "<link linkend='func-mmap'><function>mmap()</function></link>"> | ||
| 7 | <!ENTITY func-munmap "<link linkend='func-munmap'><function>munmap()</function></link>"> | ||
| 8 | <!ENTITY func-open "<link linkend='func-open'><function>open()</function></link>"> | ||
| 9 | <!ENTITY func-poll "<link linkend='func-poll'><function>poll()</function></link>"> | ||
| 10 | <!ENTITY func-read "<link linkend='func-read'><function>read()</function></link>"> | ||
| 11 | <!ENTITY func-select "<link linkend='func-select'><function>select()</function></link>"> | ||
| 12 | <!ENTITY func-write "<link linkend='func-write'><function>write()</function></link>"> | ||
| 13 | |||
| 14 | <!ENTITY media-func-close "<link linkend='media-func-close'><function>close()</function></link>"> | ||
| 15 | <!ENTITY media-func-ioctl "<link linkend='media-func-ioctl'><function>ioctl()</function></link>"> | ||
| 16 | <!ENTITY media-func-open "<link linkend='media-func-open'><function>open()</function></link>"> | ||
| 17 | |||
| 18 | <!-- Ioctls --> | ||
| 19 | <!ENTITY VIDIOC-CROPCAP "<link linkend='vidioc-cropcap'><constant>VIDIOC_CROPCAP</constant></link>"> | ||
| 20 | <!ENTITY VIDIOC-DBG-G-CHIP-IDENT "<link linkend='vidioc-dbg-g-chip-ident'><constant>VIDIOC_DBG_G_CHIP_IDENT</constant></link>"> | ||
| 21 | <!ENTITY VIDIOC-DBG-G-REGISTER "<link linkend='vidioc-dbg-g-register'><constant>VIDIOC_DBG_G_REGISTER</constant></link>"> | ||
| 22 | <!ENTITY VIDIOC-DBG-S-REGISTER "<link linkend='vidioc-dbg-g-register'><constant>VIDIOC_DBG_S_REGISTER</constant></link>"> | ||
| 23 | <!ENTITY VIDIOC-DQBUF "<link linkend='vidioc-qbuf'><constant>VIDIOC_DQBUF</constant></link>"> | ||
| 24 | <!ENTITY VIDIOC-DQEVENT "<link linkend='vidioc-dqevent'><constant>VIDIOC_DQEVENT</constant></link>"> | ||
| 25 | <!ENTITY VIDIOC-ENCODER-CMD "<link linkend='vidioc-encoder-cmd'><constant>VIDIOC_ENCODER_CMD</constant></link>"> | ||
| 26 | <!ENTITY VIDIOC-ENUMAUDIO "<link linkend='vidioc-enumaudio'><constant>VIDIOC_ENUMAUDIO</constant></link>"> | ||
| 27 | <!ENTITY VIDIOC-ENUMAUDOUT "<link linkend='vidioc-enumaudioout'><constant>VIDIOC_ENUMAUDOUT</constant></link>"> | ||
| 28 | <!ENTITY VIDIOC-ENUMINPUT "<link linkend='vidioc-enuminput'><constant>VIDIOC_ENUMINPUT</constant></link>"> | ||
| 29 | <!ENTITY VIDIOC-ENUMOUTPUT "<link linkend='vidioc-enumoutput'><constant>VIDIOC_ENUMOUTPUT</constant></link>"> | ||
| 30 | <!ENTITY VIDIOC-ENUMSTD "<link linkend='vidioc-enumstd'><constant>VIDIOC_ENUMSTD</constant></link>"> | ||
| 31 | <!ENTITY VIDIOC-ENUM-DV-PRESETS "<link linkend='vidioc-enum-dv-presets'><constant>VIDIOC_ENUM_DV_PRESETS</constant></link>"> | ||
| 32 | <!ENTITY VIDIOC-ENUM-FMT "<link linkend='vidioc-enum-fmt'><constant>VIDIOC_ENUM_FMT</constant></link>"> | ||
| 33 | <!ENTITY VIDIOC-ENUM-FRAMEINTERVALS "<link linkend='vidioc-enum-frameintervals'><constant>VIDIOC_ENUM_FRAMEINTERVALS</constant></link>"> | ||
| 34 | <!ENTITY VIDIOC-ENUM-FRAMESIZES "<link linkend='vidioc-enum-framesizes'><constant>VIDIOC_ENUM_FRAMESIZES</constant></link>"> | ||
| 35 | <!ENTITY VIDIOC-G-AUDIO "<link linkend='vidioc-g-audio'><constant>VIDIOC_G_AUDIO</constant></link>"> | ||
| 36 | <!ENTITY VIDIOC-G-AUDOUT "<link linkend='vidioc-g-audioout'><constant>VIDIOC_G_AUDOUT</constant></link>"> | ||
| 37 | <!ENTITY VIDIOC-G-CROP "<link linkend='vidioc-g-crop'><constant>VIDIOC_G_CROP</constant></link>"> | ||
| 38 | <!ENTITY VIDIOC-G-CTRL "<link linkend='vidioc-g-ctrl'><constant>VIDIOC_G_CTRL</constant></link>"> | ||
| 39 | <!ENTITY VIDIOC-G-DV-PRESET "<link linkend='vidioc-g-dv-preset'><constant>VIDIOC_G_DV_PRESET</constant></link>"> | ||
| 40 | <!ENTITY VIDIOC-G-DV-TIMINGS "<link linkend='vidioc-g-dv-timings'><constant>VIDIOC_G_DV_TIMINGS</constant></link>"> | ||
| 41 | <!ENTITY VIDIOC-G-ENC-INDEX "<link linkend='vidioc-g-enc-index'><constant>VIDIOC_G_ENC_INDEX</constant></link>"> | ||
| 42 | <!ENTITY VIDIOC-G-EXT-CTRLS "<link linkend='vidioc-g-ext-ctrls'><constant>VIDIOC_G_EXT_CTRLS</constant></link>"> | ||
| 43 | <!ENTITY VIDIOC-G-FBUF "<link linkend='vidioc-g-fbuf'><constant>VIDIOC_G_FBUF</constant></link>"> | ||
| 44 | <!ENTITY VIDIOC-G-FMT "<link linkend='vidioc-g-fmt'><constant>VIDIOC_G_FMT</constant></link>"> | ||
| 45 | <!ENTITY VIDIOC-G-FREQUENCY "<link linkend='vidioc-g-frequency'><constant>VIDIOC_G_FREQUENCY</constant></link>"> | ||
| 46 | <!ENTITY VIDIOC-G-INPUT "<link linkend='vidioc-g-input'><constant>VIDIOC_G_INPUT</constant></link>"> | ||
| 47 | <!ENTITY VIDIOC-G-JPEGCOMP "<link linkend='vidioc-g-jpegcomp'><constant>VIDIOC_G_JPEGCOMP</constant></link>"> | ||
| 48 | <!ENTITY VIDIOC-G-MPEGCOMP "<link linkend=''><constant>VIDIOC_G_MPEGCOMP</constant></link>"> | ||
| 49 | <!ENTITY VIDIOC-G-MODULATOR "<link linkend='vidioc-g-modulator'><constant>VIDIOC_G_MODULATOR</constant></link>"> | ||
| 50 | <!ENTITY VIDIOC-G-OUTPUT "<link linkend='vidioc-g-output'><constant>VIDIOC_G_OUTPUT</constant></link>"> | ||
| 51 | <!ENTITY VIDIOC-G-PARM "<link linkend='vidioc-g-parm'><constant>VIDIOC_G_PARM</constant></link>"> | ||
| 52 | <!ENTITY VIDIOC-G-PRIORITY "<link linkend='vidioc-g-priority'><constant>VIDIOC_G_PRIORITY</constant></link>"> | ||
| 53 | <!ENTITY VIDIOC-G-SLICED-VBI-CAP "<link linkend='vidioc-g-sliced-vbi-cap'><constant>VIDIOC_G_SLICED_VBI_CAP</constant></link>"> | ||
| 54 | <!ENTITY VIDIOC-G-STD "<link linkend='vidioc-g-std'><constant>VIDIOC_G_STD</constant></link>"> | ||
| 55 | <!ENTITY VIDIOC-G-TUNER "<link linkend='vidioc-g-tuner'><constant>VIDIOC_G_TUNER</constant></link>"> | ||
| 56 | <!ENTITY VIDIOC-LOG-STATUS "<link linkend='vidioc-log-status'><constant>VIDIOC_LOG_STATUS</constant></link>"> | ||
| 57 | <!ENTITY VIDIOC-OVERLAY "<link linkend='vidioc-overlay'><constant>VIDIOC_OVERLAY</constant></link>"> | ||
| 58 | <!ENTITY VIDIOC-QBUF "<link linkend='vidioc-qbuf'><constant>VIDIOC_QBUF</constant></link>"> | ||
| 59 | <!ENTITY VIDIOC-QUERYBUF "<link linkend='vidioc-querybuf'><constant>VIDIOC_QUERYBUF</constant></link>"> | ||
| 60 | <!ENTITY VIDIOC-QUERYCAP "<link linkend='vidioc-querycap'><constant>VIDIOC_QUERYCAP</constant></link>"> | ||
| 61 | <!ENTITY VIDIOC-QUERYCTRL "<link linkend='vidioc-queryctrl'><constant>VIDIOC_QUERYCTRL</constant></link>"> | ||
| 62 | <!ENTITY VIDIOC-QUERYMENU "<link linkend='vidioc-queryctrl'><constant>VIDIOC_QUERYMENU</constant></link>"> | ||
| 63 | <!ENTITY VIDIOC-QUERYSTD "<link linkend='vidioc-querystd'><constant>VIDIOC_QUERYSTD</constant></link>"> | ||
| 64 | <!ENTITY VIDIOC-QUERY-DV-PRESET "<link linkend='vidioc-query-dv-preset'><constant>VIDIOC_QUERY_DV_PRESET</constant></link>"> | ||
| 65 | <!ENTITY VIDIOC-REQBUFS "<link linkend='vidioc-reqbufs'><constant>VIDIOC_REQBUFS</constant></link>"> | ||
| 66 | <!ENTITY VIDIOC-STREAMOFF "<link linkend='vidioc-streamon'><constant>VIDIOC_STREAMOFF</constant></link>"> | ||
| 67 | <!ENTITY VIDIOC-STREAMON "<link linkend='vidioc-streamon'><constant>VIDIOC_STREAMON</constant></link>"> | ||
| 68 | <!ENTITY VIDIOC-SUBSCRIBE-EVENT "<link linkend='vidioc-subscribe-event'><constant>VIDIOC_SUBSCRIBE_EVENT</constant></link>"> | ||
| 69 | <!ENTITY VIDIOC-S-AUDIO "<link linkend='vidioc-g-audio'><constant>VIDIOC_S_AUDIO</constant></link>"> | ||
| 70 | <!ENTITY VIDIOC-S-AUDOUT "<link linkend='vidioc-g-audioout'><constant>VIDIOC_S_AUDOUT</constant></link>"> | ||
| 71 | <!ENTITY VIDIOC-S-CROP "<link linkend='vidioc-g-crop'><constant>VIDIOC_S_CROP</constant></link>"> | ||
| 72 | <!ENTITY VIDIOC-S-CTRL "<link linkend='vidioc-g-ctrl'><constant>VIDIOC_S_CTRL</constant></link>"> | ||
| 73 | <!ENTITY VIDIOC-S-DV-PRESET "<link linkend='vidioc-g-dv-preset'><constant>VIDIOC_S_DV_PRESET</constant></link>"> | ||
| 74 | <!ENTITY VIDIOC-S-DV-TIMINGS "<link linkend='vidioc-g-dv-timings'><constant>VIDIOC_S_DV_TIMINGS</constant></link>"> | ||
| 75 | <!ENTITY VIDIOC-S-EXT-CTRLS "<link linkend='vidioc-g-ext-ctrls'><constant>VIDIOC_S_EXT_CTRLS</constant></link>"> | ||
| 76 | <!ENTITY VIDIOC-S-FBUF "<link linkend='vidioc-g-fbuf'><constant>VIDIOC_S_FBUF</constant></link>"> | ||
| 77 | <!ENTITY VIDIOC-S-FMT "<link linkend='vidioc-g-fmt'><constant>VIDIOC_S_FMT</constant></link>"> | ||
| 78 | <!ENTITY VIDIOC-S-FREQUENCY "<link linkend='vidioc-g-frequency'><constant>VIDIOC_S_FREQUENCY</constant></link>"> | ||
| 79 | <!ENTITY VIDIOC-S-HW-FREQ-SEEK "<link linkend='vidioc-s-hw-freq-seek'><constant>VIDIOC_S_HW_FREQ_SEEK</constant></link>"> | ||
| 80 | <!ENTITY VIDIOC-S-INPUT "<link linkend='vidioc-g-input'><constant>VIDIOC_S_INPUT</constant></link>"> | ||
| 81 | <!ENTITY VIDIOC-S-JPEGCOMP "<link linkend='vidioc-g-jpegcomp'><constant>VIDIOC_S_JPEGCOMP</constant></link>"> | ||
| 82 | <!ENTITY VIDIOC-S-MPEGCOMP "<link linkend=''><constant>VIDIOC_S_MPEGCOMP</constant></link>"> | ||
| 83 | <!ENTITY VIDIOC-S-MODULATOR "<link linkend='vidioc-g-modulator'><constant>VIDIOC_S_MODULATOR</constant></link>"> | ||
| 84 | <!ENTITY VIDIOC-S-OUTPUT "<link linkend='vidioc-g-output'><constant>VIDIOC_S_OUTPUT</constant></link>"> | ||
| 85 | <!ENTITY VIDIOC-S-PARM "<link linkend='vidioc-g-parm'><constant>VIDIOC_S_PARM</constant></link>"> | ||
| 86 | <!ENTITY VIDIOC-S-PRIORITY "<link linkend='vidioc-g-priority'><constant>VIDIOC_S_PRIORITY</constant></link>"> | ||
| 87 | <!ENTITY VIDIOC-S-STD "<link linkend='vidioc-g-std'><constant>VIDIOC_S_STD</constant></link>"> | ||
| 88 | <!ENTITY VIDIOC-S-TUNER "<link linkend='vidioc-g-tuner'><constant>VIDIOC_S_TUNER</constant></link>"> | ||
| 89 | <!ENTITY VIDIOC-SUBDEV-ENUM-FRAME-SIZE "<link linkend='vidioc-subdev-enum-frame-size'><constant>VIDIOC_SUBDEV_ENUM_FRAME_SIZE</constant></link>"> | ||
| 90 | <!ENTITY VIDIOC-SUBDEV-ENUM-MBUS-CODE "<link linkend='vidioc-subdev-enum-mbus-code'><constant>VIDIOC_SUBDEV_ENUM_MBUS_CODE</constant></link>"> | ||
| 91 | <!ENTITY VIDIOC-SUBDEV-G-CROP "<link linkend='vidioc-subdev-g-crop'><constant>VIDIOC_SUBDEV_G_CROP</constant></link>"> | ||
| 92 | <!ENTITY VIDIOC-SUBDEV-G-FMT "<link linkend='vidioc-subdev-g-fmt'><constant>VIDIOC_SUBDEV_G_FMT</constant></link>"> | ||
| 93 | <!ENTITY VIDIOC-SUBDEV-G-FRAME-INTERVAL "<link linkend='vidioc-subdev-g-frame-interval'><constant>VIDIOC_SUBDEV_G_FRAME_INTERVAL</constant></link>"> | ||
| 94 | <!ENTITY VIDIOC-SUBDEV-S-CROP "<link linkend='vidioc-subdev-g-crop'><constant>VIDIOC_SUBDEV_S_CROP</constant></link>"> | ||
| 95 | <!ENTITY VIDIOC-SUBDEV-S-FMT "<link linkend='vidioc-subdev-g-fmt'><constant>VIDIOC_SUBDEV_S_FMT</constant></link>"> | ||
| 96 | <!ENTITY VIDIOC-SUBDEV-S-FRAME-INTERVAL "<link linkend='vidioc-subdev-g-frame-interval'><constant>VIDIOC_SUBDEV_S_FRAME_INTERVAL</constant></link>"> | ||
| 97 | <!ENTITY VIDIOC-TRY-ENCODER-CMD "<link linkend='vidioc-encoder-cmd'><constant>VIDIOC_TRY_ENCODER_CMD</constant></link>"> | ||
| 98 | <!ENTITY VIDIOC-TRY-EXT-CTRLS "<link linkend='vidioc-g-ext-ctrls'><constant>VIDIOC_TRY_EXT_CTRLS</constant></link>"> | ||
| 99 | <!ENTITY VIDIOC-TRY-FMT "<link linkend='vidioc-g-fmt'><constant>VIDIOC_TRY_FMT</constant></link>"> | ||
| 100 | <!ENTITY VIDIOC-UNSUBSCRIBE-EVENT "<link linkend='vidioc-subscribe-event'><constant>VIDIOC_UNSUBSCRIBE_EVENT</constant></link>"> | ||
| 101 | |||
| 102 | <!ENTITY MEDIA-IOC-DEVICE-INFO "<link linkend='media-ioc-device-info'><constant>MEDIA_IOC_DEVICE_INFO</constant></link>"> | ||
| 103 | <!ENTITY MEDIA-IOC-ENUM-ENTITIES "<link linkend='media-ioc-enum-entities'><constant>MEDIA_IOC_ENUM_ENTITIES</constant></link>"> | ||
| 104 | <!ENTITY MEDIA-IOC-ENUM-LINKS "<link linkend='media-ioc-enum-links'><constant>MEDIA_IOC_ENUM_LINKS</constant></link>"> | ||
| 105 | <!ENTITY MEDIA-IOC-SETUP-LINK "<link linkend='media-ioc-setup-link'><constant>MEDIA_IOC_SETUP_LINK</constant></link>"> | ||
| 106 | |||
| 107 | <!-- Types --> | ||
| 108 | <!ENTITY v4l2-std-id "<link linkend='v4l2-std-id'>v4l2_std_id</link>"> | ||
| 109 | |||
| 110 | <!-- Enums --> | ||
| 111 | <!ENTITY v4l2-buf-type "enum <link linkend='v4l2-buf-type'>v4l2_buf_type</link>"> | ||
| 112 | <!ENTITY v4l2-colorspace "enum <link linkend='v4l2-colorspace'>v4l2_colorspace</link>"> | ||
| 113 | <!ENTITY v4l2-ctrl-type "enum <link linkend='v4l2-ctrl-type'>v4l2_ctrl_type</link>"> | ||
| 114 | <!ENTITY v4l2-exposure-auto-type "enum <link linkend='v4l2-exposure-auto-type'>v4l2_exposure_auto_type</link>"> | ||
| 115 | <!ENTITY v4l2-field "enum <link linkend='v4l2-field'>v4l2_field</link>"> | ||
| 116 | <!ENTITY v4l2-frmivaltypes "enum <link linkend='v4l2-frmivaltypes'>v4l2_frmivaltypes</link>"> | ||
| 117 | <!ENTITY v4l2-frmsizetypes "enum <link linkend='v4l2-frmsizetypes'>v4l2_frmsizetypes</link>"> | ||
| 118 | <!ENTITY v4l2-mbus-pixelcode "enum <link linkend='v4l2-mbus-pixelcode'>v4l2_mbus_pixelcode</link>"> | ||
| 119 | <!ENTITY v4l2-memory "enum <link linkend='v4l2-memory'>v4l2_memory</link>"> | ||
| 120 | <!ENTITY v4l2-mpeg-audio-ac3-bitrate "enum <link linkend='v4l2-mpeg-audio-ac3-bitrate'>v4l2_mpeg_audio_ac3_bitrate</link>"> | ||
| 121 | <!ENTITY v4l2-mpeg-audio-crc "enum <link linkend='v4l2-mpeg-audio-crc'>v4l2_mpeg_audio_crc</link>"> | ||
| 122 | <!ENTITY v4l2-mpeg-audio-emphasis "enum <link linkend='v4l2-mpeg-audio-emphasis'>v4l2_mpeg_audio_emphasis</link>"> | ||
| 123 | <!ENTITY v4l2-mpeg-audio-encoding "enum <link linkend='v4l2-mpeg-audio-encoding'>v4l2_mpeg_audio_encoding</link>"> | ||
| 124 | <!ENTITY v4l2-mpeg-audio-l1-bitrate "enum <link linkend='v4l2-mpeg-audio-l1-bitrate'>v4l2_mpeg_audio_l1_bitrate</link>"> | ||
| 125 | <!ENTITY v4l2-mpeg-audio-l2-bitrate "enum <link linkend='v4l2-mpeg-audio-l2-bitrate'>v4l2_mpeg_audio_l2_bitrate</link>"> | ||
| 126 | <!ENTITY v4l2-mpeg-audio-l3-bitrate "enum <link linkend='v4l2-mpeg-audio-l3-bitrate'>v4l2_mpeg_audio_l3_bitrate</link>"> | ||
| 127 | <!ENTITY v4l2-mpeg-audio-mode "enum <link linkend='v4l2-mpeg-audio-mode'>v4l2_mpeg_audio_mode</link>"> | ||
| 128 | <!ENTITY v4l2-mpeg-audio-mode-extension "enum <link linkend='v4l2-mpeg-audio-mode-extension'>v4l2_mpeg_audio_mode_extension</link>"> | ||
| 129 | <!ENTITY v4l2-mpeg-audio-sampling-freq "enum <link linkend='v4l2-mpeg-audio-sampling-freq'>v4l2_mpeg_audio_sampling_freq</link>"> | ||
| 130 | <!ENTITY chroma-spatial-filter-type "enum <link linkend='chroma-spatial-filter-type'>v4l2_mpeg_cx2341x_video_chroma_spatial_filter_type</link>"> | ||
| 131 | <!ENTITY luma-spatial-filter-type "enum <link linkend='luma-spatial-filter-type'>v4l2_mpeg_cx2341x_video_luma_spatial_filter_type</link>"> | ||
| 132 | <!ENTITY v4l2-mpeg-cx2341x-video-median-filter-type "enum <link linkend='v4l2-mpeg-cx2341x-video-median-filter-type'>v4l2_mpeg_cx2341x_video_median_filter_type</link>"> | ||
| 133 | <!ENTITY v4l2-mpeg-cx2341x-video-spatial-filter-mode "enum <link linkend='v4l2-mpeg-cx2341x-video-spatial-filter-mode'>v4l2_mpeg_cx2341x_video_spatial_filter_mode</link>"> | ||
| 134 | <!ENTITY v4l2-mpeg-cx2341x-video-temporal-filter-mode "enum <link linkend='v4l2-mpeg-cx2341x-video-temporal-filter-mode'>v4l2_mpeg_cx2341x_video_temporal_filter_mode</link>"> | ||
| 135 | <!ENTITY v4l2-mpeg-stream-type "enum <link linkend='v4l2-mpeg-stream-type'>v4l2_mpeg_stream_type</link>"> | ||
| 136 | <!ENTITY v4l2-mpeg-stream-vbi-fmt "enum <link linkend='v4l2-mpeg-stream-vbi-fmt'>v4l2_mpeg_stream_vbi_fmt</link>"> | ||
| 137 | <!ENTITY v4l2-mpeg-video-aspect "enum <link linkend='v4l2-mpeg-video-aspect'>v4l2_mpeg_video_aspect</link>"> | ||
| 138 | <!ENTITY v4l2-mpeg-video-bitrate-mode "enum <link linkend='v4l2-mpeg-video-bitrate-mode'>v4l2_mpeg_video_bitrate_mode</link>"> | ||
| 139 | <!ENTITY v4l2-mpeg-video-encoding "enum <link linkend='v4l2-mpeg-video-encoding'>v4l2_mpeg_video_encoding</link>"> | ||
| 140 | <!ENTITY v4l2-power-line-frequency "enum <link linkend='v4l2-power-line-frequency'>v4l2_power_line_frequency</link>"> | ||
| 141 | <!ENTITY v4l2-priority "enum <link linkend='v4l2-priority'>v4l2_priority</link>"> | ||
| 142 | <!ENTITY v4l2-subdev-format-whence "enum <link linkend='v4l2-subdev-format-whence'>v4l2_subdev_format_whence</link>"> | ||
| 143 | <!ENTITY v4l2-tuner-type "enum <link linkend='v4l2-tuner-type'>v4l2_tuner_type</link>"> | ||
| 144 | <!ENTITY v4l2-preemphasis "enum <link linkend='v4l2-preemphasis'>v4l2_preemphasis</link>"> | ||
| 145 | |||
| 146 | <!-- Structures --> | ||
| 147 | <!ENTITY v4l2-audio "struct <link linkend='v4l2-audio'>v4l2_audio</link>"> | ||
| 148 | <!ENTITY v4l2-audioout "struct <link linkend='v4l2-audioout'>v4l2_audioout</link>"> | ||
| 149 | <!ENTITY v4l2-bt-timings "struct <link linkend='v4l2-bt-timings'>v4l2_bt_timings</link>"> | ||
| 150 | <!ENTITY v4l2-buffer "struct <link linkend='v4l2-buffer'>v4l2_buffer</link>"> | ||
| 151 | <!ENTITY v4l2-plane "struct <link linkend='v4l2-plane'>v4l2_plane</link>"> | ||
| 152 | <!ENTITY v4l2-capability "struct <link linkend='v4l2-capability'>v4l2_capability</link>"> | ||
| 153 | <!ENTITY v4l2-captureparm "struct <link linkend='v4l2-captureparm'>v4l2_captureparm</link>"> | ||
| 154 | <!ENTITY v4l2-clip "struct <link linkend='v4l2-clip'>v4l2_clip</link>"> | ||
| 155 | <!ENTITY v4l2-control "struct <link linkend='v4l2-control'>v4l2_control</link>"> | ||
| 156 | <!ENTITY v4l2-crop "struct <link linkend='v4l2-crop'>v4l2_crop</link>"> | ||
| 157 | <!ENTITY v4l2-cropcap "struct <link linkend='v4l2-cropcap'>v4l2_cropcap</link>"> | ||
| 158 | <!ENTITY v4l2-dbg-chip-ident "struct <link linkend='v4l2-dbg-chip-ident'>v4l2_dbg_chip_ident</link>"> | ||
| 159 | <!ENTITY v4l2-dbg-match "struct <link linkend='v4l2-dbg-match'>v4l2_dbg_match</link>"> | ||
| 160 | <!ENTITY v4l2-dbg-register "struct <link linkend='v4l2-dbg-register'>v4l2_dbg_register</link>"> | ||
| 161 | <!ENTITY v4l2-dv-enum-preset "struct <link linkend='v4l2-dv-enum-preset'>v4l2_dv_enum_preset</link>"> | ||
| 162 | <!ENTITY v4l2-dv-preset "struct <link linkend='v4l2-dv-preset'>v4l2_dv_preset</link>"> | ||
| 163 | <!ENTITY v4l2-dv-timings "struct <link linkend='v4l2-dv-timings'>v4l2_dv_timings</link>"> | ||
| 164 | <!ENTITY v4l2-enc-idx "struct <link linkend='v4l2-enc-idx'>v4l2_enc_idx</link>"> | ||
| 165 | <!ENTITY v4l2-enc-idx-entry "struct <link linkend='v4l2-enc-idx-entry'>v4l2_enc_idx_entry</link>"> | ||
| 166 | <!ENTITY v4l2-encoder-cmd "struct <link linkend='v4l2-encoder-cmd'>v4l2_encoder_cmd</link>"> | ||
| 167 | <!ENTITY v4l2-event "struct <link linkend='v4l2-event'>v4l2_event</link>"> | ||
| 168 | <!ENTITY v4l2-event-subscription "struct <link linkend='v4l2-event-subscription'>v4l2_event_subscription</link>"> | ||
| 169 | <!ENTITY v4l2-event-vsync "struct <link linkend='v4l2-event-vsync'>v4l2_event_vsync</link>"> | ||
| 170 | <!ENTITY v4l2-ext-control "struct <link linkend='v4l2-ext-control'>v4l2_ext_control</link>"> | ||
| 171 | <!ENTITY v4l2-ext-controls "struct <link linkend='v4l2-ext-controls'>v4l2_ext_controls</link>"> | ||
| 172 | <!ENTITY v4l2-fmtdesc "struct <link linkend='v4l2-fmtdesc'>v4l2_fmtdesc</link>"> | ||
| 173 | <!ENTITY v4l2-format "struct <link linkend='v4l2-format'>v4l2_format</link>"> | ||
| 174 | <!ENTITY v4l2-fract "struct <link linkend='v4l2-fract'>v4l2_fract</link>"> | ||
| 175 | <!ENTITY v4l2-framebuffer "struct <link linkend='v4l2-framebuffer'>v4l2_framebuffer</link>"> | ||
| 176 | <!ENTITY v4l2-frequency "struct <link linkend='v4l2-frequency'>v4l2_frequency</link>"> | ||
| 177 | <!ENTITY v4l2-frmival-stepwise "struct <link linkend='v4l2-frmival-stepwise'>v4l2_frmival_stepwise</link>"> | ||
| 178 | <!ENTITY v4l2-frmivalenum "struct <link linkend='v4l2-frmivalenum'>v4l2_frmivalenum</link>"> | ||
| 179 | <!ENTITY v4l2-frmsize-discrete "struct <link linkend='v4l2-frmsize-discrete'>v4l2_frmsize_discrete</link>"> | ||
| 180 | <!ENTITY v4l2-frmsize-stepwise "struct <link linkend='v4l2-frmsize-stepwise'>v4l2_frmsize_stepwise</link>"> | ||
| 181 | <!ENTITY v4l2-frmsizeenum "struct <link linkend='v4l2-frmsizeenum'>v4l2_frmsizeenum</link>"> | ||
| 182 | <!ENTITY v4l2-hw-freq-seek "struct <link linkend='v4l2-hw-freq-seek'>v4l2_hw_freq_seek</link>"> | ||
| 183 | <!ENTITY v4l2-input "struct <link linkend='v4l2-input'>v4l2_input</link>"> | ||
| 184 | <!ENTITY v4l2-jpegcompression "struct <link linkend='v4l2-jpegcompression'>v4l2_jpegcompression</link>"> | ||
| 185 | <!ENTITY v4l2-mbus-framefmt "struct <link linkend='v4l2-mbus-framefmt'>v4l2_mbus_framefmt</link>"> | ||
| 186 | <!ENTITY v4l2-modulator "struct <link linkend='v4l2-modulator'>v4l2_modulator</link>"> | ||
| 187 | <!ENTITY v4l2-mpeg-vbi-fmt-ivtv "struct <link linkend='v4l2-mpeg-vbi-fmt-ivtv'>v4l2_mpeg_vbi_fmt_ivtv</link>"> | ||
| 188 | <!ENTITY v4l2-output "struct <link linkend='v4l2-output'>v4l2_output</link>"> | ||
| 189 | <!ENTITY v4l2-outputparm "struct <link linkend='v4l2-outputparm'>v4l2_outputparm</link>"> | ||
| 190 | <!ENTITY v4l2-pix-format "struct <link linkend='v4l2-pix-format'>v4l2_pix_format</link>"> | ||
| 191 | <!ENTITY v4l2-pix-format-mplane "struct <link linkend='v4l2-pix-format-mplane'>v4l2_pix_format_mplane</link>"> | ||
| 192 | <!ENTITY v4l2-plane-pix-format "struct <link linkend='v4l2-plane-pix-format'>v4l2_plane_pix_format</link>"> | ||
| 193 | <!ENTITY v4l2-queryctrl "struct <link linkend='v4l2-queryctrl'>v4l2_queryctrl</link>"> | ||
| 194 | <!ENTITY v4l2-querymenu "struct <link linkend='v4l2-querymenu'>v4l2_querymenu</link>"> | ||
| 195 | <!ENTITY v4l2-rect "struct <link linkend='v4l2-rect'>v4l2_rect</link>"> | ||
| 196 | <!ENTITY v4l2-requestbuffers "struct <link linkend='v4l2-requestbuffers'>v4l2_requestbuffers</link>"> | ||
| 197 | <!ENTITY v4l2-sliced-vbi-cap "struct <link linkend='v4l2-sliced-vbi-cap'>v4l2_sliced_vbi_cap</link>"> | ||
| 198 | <!ENTITY v4l2-sliced-vbi-data "struct <link linkend='v4l2-sliced-vbi-data'>v4l2_sliced_vbi_data</link>"> | ||
| 199 | <!ENTITY v4l2-sliced-vbi-format "struct <link linkend='v4l2-sliced-vbi-format'>v4l2_sliced_vbi_format</link>"> | ||
| 200 | <!ENTITY v4l2-subdev-frame-interval "struct <link linkend='v4l2-subdev-frame-interval'>v4l2_subdev_frame_interval</link>"> | ||
| 201 | <!ENTITY v4l2-subdev-frame-interval-enum "struct <link linkend='v4l2-subdev-frame-interval-enum'>v4l2_subdev_frame_interval_enum</link>"> | ||
| 202 | <!ENTITY v4l2-subdev-frame-size-enum "struct <link linkend='v4l2-subdev-frame-size-enum'>v4l2_subdev_frame_size_enum</link>"> | ||
| 203 | <!ENTITY v4l2-subdev-crop "struct <link linkend='v4l2-subdev-crop'>v4l2_subdev_crop</link>"> | ||
| 204 | <!ENTITY v4l2-subdev-format "struct <link linkend='v4l2-subdev-format'>v4l2_subdev_format</link>"> | ||
| 205 | <!ENTITY v4l2-subdev-mbus-code-enum "struct <link linkend='v4l2-subdev-mbus-code-enum'>v4l2_subdev_mbus_code_enum</link>"> | ||
| 206 | <!ENTITY v4l2-standard "struct <link linkend='v4l2-standard'>v4l2_standard</link>"> | ||
| 207 | <!ENTITY v4l2-streamparm "struct <link linkend='v4l2-streamparm'>v4l2_streamparm</link>"> | ||
| 208 | <!ENTITY v4l2-timecode "struct <link linkend='v4l2-timecode'>v4l2_timecode</link>"> | ||
| 209 | <!ENTITY v4l2-tuner "struct <link linkend='v4l2-tuner'>v4l2_tuner</link>"> | ||
| 210 | <!ENTITY v4l2-vbi-format "struct <link linkend='v4l2-vbi-format'>v4l2_vbi_format</link>"> | ||
| 211 | <!ENTITY v4l2-window "struct <link linkend='v4l2-window'>v4l2_window</link>"> | ||
| 212 | |||
| 213 | <!ENTITY media-device-info "struct <link linkend='media-device-info'>media_device_info</link>"> | ||
| 214 | <!ENTITY media-entity-desc "struct <link linkend='media-entity-desc'>media_entity_desc</link>"> | ||
| 215 | <!ENTITY media-links-enum "struct <link linkend='media-links-enum'>media_links_enum</link>"> | ||
| 216 | <!ENTITY media-pad-desc "struct <link linkend='media-pad-desc'>media_pad_desc</link>"> | ||
| 217 | <!ENTITY media-link-desc "struct <link linkend='media-link-desc'>media_link_desc</link>"> | ||
| 218 | |||
| 219 | <!-- Error Codes --> | ||
| 220 | <!ENTITY EACCES "<errorcode>EACCES</errorcode> error code"> | ||
| 221 | <!ENTITY EAGAIN "<errorcode>EAGAIN</errorcode> error code"> | ||
| 222 | <!ENTITY EBADF "<errorcode>EBADF</errorcode> error code"> | ||
| 223 | <!ENTITY EBUSY "<errorcode>EBUSY</errorcode> error code"> | ||
| 224 | <!ENTITY EFAULT "<errorcode>EFAULT</errorcode> error code"> | ||
| 225 | <!ENTITY EIO "<errorcode>EIO</errorcode> error code"> | ||
| 226 | <!ENTITY EINTR "<errorcode>EINTR</errorcode> error code"> | ||
| 227 | <!ENTITY EINVAL "<errorcode>EINVAL</errorcode> error code"> | ||
| 228 | <!ENTITY ENFILE "<errorcode>ENFILE</errorcode> error code"> | ||
| 229 | <!ENTITY ENOMEM "<errorcode>ENOMEM</errorcode> error code"> | ||
| 230 | <!ENTITY ENOSPC "<errorcode>ENOSPC</errorcode> error code"> | ||
| 231 | <!ENTITY ENOTTY "<errorcode>ENOTTY</errorcode> error code"> | ||
| 232 | <!ENTITY ENXIO "<errorcode>ENXIO</errorcode> error code"> | ||
| 233 | <!ENTITY EMFILE "<errorcode>EMFILE</errorcode> error code"> | ||
| 234 | <!ENTITY EPERM "<errorcode>EPERM</errorcode> error code"> | ||
| 235 | <!ENTITY EPIPE "<errorcode>EPIPE</errorcode> error code"> | ||
| 236 | <!ENTITY ERANGE "<errorcode>ERANGE</errorcode> error code"> | ||
| 237 | |||
| 238 | <!-- Subsections --> | ||
| 239 | <!ENTITY sub-biblio SYSTEM "v4l/biblio.xml"> | ||
| 240 | <!ENTITY sub-common SYSTEM "v4l/common.xml"> | ||
| 241 | <!ENTITY sub-planar-apis SYSTEM "v4l/planar-apis.xml"> | ||
| 242 | <!ENTITY sub-compat SYSTEM "v4l/compat.xml"> | ||
| 243 | <!ENTITY sub-controls SYSTEM "v4l/controls.xml"> | ||
| 244 | <!ENTITY sub-dev-capture SYSTEM "v4l/dev-capture.xml"> | ||
| 245 | <!ENTITY sub-dev-codec SYSTEM "v4l/dev-codec.xml"> | ||
| 246 | <!ENTITY sub-dev-event SYSTEM "v4l/dev-event.xml"> | ||
| 247 | <!ENTITY sub-dev-effect SYSTEM "v4l/dev-effect.xml"> | ||
| 248 | <!ENTITY sub-dev-osd SYSTEM "v4l/dev-osd.xml"> | ||
| 249 | <!ENTITY sub-dev-output SYSTEM "v4l/dev-output.xml"> | ||
| 250 | <!ENTITY sub-dev-overlay SYSTEM "v4l/dev-overlay.xml"> | ||
| 251 | <!ENTITY sub-dev-radio SYSTEM "v4l/dev-radio.xml"> | ||
| 252 | <!ENTITY sub-dev-raw-vbi SYSTEM "v4l/dev-raw-vbi.xml"> | ||
| 253 | <!ENTITY sub-dev-rds SYSTEM "v4l/dev-rds.xml"> | ||
| 254 | <!ENTITY sub-dev-sliced-vbi SYSTEM "v4l/dev-sliced-vbi.xml"> | ||
| 255 | <!ENTITY sub-dev-subdev SYSTEM "v4l/dev-subdev.xml"> | ||
| 256 | <!ENTITY sub-dev-teletext SYSTEM "v4l/dev-teletext.xml"> | ||
| 257 | <!ENTITY sub-driver SYSTEM "v4l/driver.xml"> | ||
| 258 | <!ENTITY sub-libv4l SYSTEM "v4l/libv4l.xml"> | ||
| 259 | <!ENTITY sub-lirc_device_interface SYSTEM "v4l/lirc_device_interface.xml"> | ||
| 260 | <!ENTITY sub-remote_controllers SYSTEM "v4l/remote_controllers.xml"> | ||
| 261 | <!ENTITY sub-fdl-appendix SYSTEM "v4l/fdl-appendix.xml"> | ||
| 262 | <!ENTITY sub-close SYSTEM "v4l/func-close.xml"> | ||
| 263 | <!ENTITY sub-ioctl SYSTEM "v4l/func-ioctl.xml"> | ||
| 264 | <!ENTITY sub-mmap SYSTEM "v4l/func-mmap.xml"> | ||
| 265 | <!ENTITY sub-munmap SYSTEM "v4l/func-munmap.xml"> | ||
| 266 | <!ENTITY sub-open SYSTEM "v4l/func-open.xml"> | ||
| 267 | <!ENTITY sub-poll SYSTEM "v4l/func-poll.xml"> | ||
| 268 | <!ENTITY sub-read SYSTEM "v4l/func-read.xml"> | ||
| 269 | <!ENTITY sub-select SYSTEM "v4l/func-select.xml"> | ||
| 270 | <!ENTITY sub-write SYSTEM "v4l/func-write.xml"> | ||
| 271 | <!ENTITY sub-io SYSTEM "v4l/io.xml"> | ||
| 272 | <!ENTITY sub-grey SYSTEM "v4l/pixfmt-grey.xml"> | ||
| 273 | <!ENTITY sub-m420 SYSTEM "v4l/pixfmt-m420.xml"> | ||
| 274 | <!ENTITY sub-nv12 SYSTEM "v4l/pixfmt-nv12.xml"> | ||
| 275 | <!ENTITY sub-nv12m SYSTEM "v4l/pixfmt-nv12m.xml"> | ||
| 276 | <!ENTITY sub-nv12mt SYSTEM "v4l/pixfmt-nv12mt.xml"> | ||
| 277 | <!ENTITY sub-nv16 SYSTEM "v4l/pixfmt-nv16.xml"> | ||
| 278 | <!ENTITY sub-packed-rgb SYSTEM "v4l/pixfmt-packed-rgb.xml"> | ||
| 279 | <!ENTITY sub-packed-yuv SYSTEM "v4l/pixfmt-packed-yuv.xml"> | ||
| 280 | <!ENTITY sub-sbggr16 SYSTEM "v4l/pixfmt-sbggr16.xml"> | ||
| 281 | <!ENTITY sub-sbggr8 SYSTEM "v4l/pixfmt-sbggr8.xml"> | ||
| 282 | <!ENTITY sub-sgbrg8 SYSTEM "v4l/pixfmt-sgbrg8.xml"> | ||
| 283 | <!ENTITY sub-sgrbg8 SYSTEM "v4l/pixfmt-sgrbg8.xml"> | ||
| 284 | <!ENTITY sub-uyvy SYSTEM "v4l/pixfmt-uyvy.xml"> | ||
| 285 | <!ENTITY sub-vyuy SYSTEM "v4l/pixfmt-vyuy.xml"> | ||
| 286 | <!ENTITY sub-y16 SYSTEM "v4l/pixfmt-y16.xml"> | ||
| 287 | <!ENTITY sub-y41p SYSTEM "v4l/pixfmt-y41p.xml"> | ||
| 288 | <!ENTITY sub-yuv410 SYSTEM "v4l/pixfmt-yuv410.xml"> | ||
| 289 | <!ENTITY sub-yuv411p SYSTEM "v4l/pixfmt-yuv411p.xml"> | ||
| 290 | <!ENTITY sub-yuv420 SYSTEM "v4l/pixfmt-yuv420.xml"> | ||
| 291 | <!ENTITY sub-yuv420m SYSTEM "v4l/pixfmt-yuv420m.xml"> | ||
| 292 | <!ENTITY sub-yuv422p SYSTEM "v4l/pixfmt-yuv422p.xml"> | ||
| 293 | <!ENTITY sub-yuyv SYSTEM "v4l/pixfmt-yuyv.xml"> | ||
| 294 | <!ENTITY sub-yvyu SYSTEM "v4l/pixfmt-yvyu.xml"> | ||
| 295 | <!ENTITY sub-srggb10 SYSTEM "v4l/pixfmt-srggb10.xml"> | ||
| 296 | <!ENTITY sub-srggb12 SYSTEM "v4l/pixfmt-srggb12.xml"> | ||
| 297 | <!ENTITY sub-srggb8 SYSTEM "v4l/pixfmt-srggb8.xml"> | ||
| 298 | <!ENTITY sub-y10 SYSTEM "v4l/pixfmt-y10.xml"> | ||
| 299 | <!ENTITY sub-y12 SYSTEM "v4l/pixfmt-y12.xml"> | ||
| 300 | <!ENTITY sub-y10b SYSTEM "v4l/pixfmt-y10b.xml"> | ||
| 301 | <!ENTITY sub-pixfmt SYSTEM "v4l/pixfmt.xml"> | ||
| 302 | <!ENTITY sub-cropcap SYSTEM "v4l/vidioc-cropcap.xml"> | ||
| 303 | <!ENTITY sub-dbg-g-register SYSTEM "v4l/vidioc-dbg-g-register.xml"> | ||
| 304 | <!ENTITY sub-encoder-cmd SYSTEM "v4l/vidioc-encoder-cmd.xml"> | ||
| 305 | <!ENTITY sub-enum-fmt SYSTEM "v4l/vidioc-enum-fmt.xml"> | ||
| 306 | <!ENTITY sub-enum-frameintervals SYSTEM "v4l/vidioc-enum-frameintervals.xml"> | ||
| 307 | <!ENTITY sub-enum-framesizes SYSTEM "v4l/vidioc-enum-framesizes.xml"> | ||
| 308 | <!ENTITY sub-enumaudio SYSTEM "v4l/vidioc-enumaudio.xml"> | ||
| 309 | <!ENTITY sub-enumaudioout SYSTEM "v4l/vidioc-enumaudioout.xml"> | ||
| 310 | <!ENTITY sub-enuminput SYSTEM "v4l/vidioc-enuminput.xml"> | ||
| 311 | <!ENTITY sub-enumoutput SYSTEM "v4l/vidioc-enumoutput.xml"> | ||
| 312 | <!ENTITY sub-enum-dv-presets SYSTEM "v4l/vidioc-enum-dv-presets.xml"> | ||
| 313 | <!ENTITY sub-g-dv-preset SYSTEM "v4l/vidioc-g-dv-preset.xml"> | ||
| 314 | <!ENTITY sub-query-dv-preset SYSTEM "v4l/vidioc-query-dv-preset.xml"> | ||
| 315 | <!ENTITY sub-g-dv-timings SYSTEM "v4l/vidioc-g-dv-timings.xml"> | ||
| 316 | <!ENTITY sub-enumstd SYSTEM "v4l/vidioc-enumstd.xml"> | ||
| 317 | <!ENTITY sub-g-audio SYSTEM "v4l/vidioc-g-audio.xml"> | ||
| 318 | <!ENTITY sub-g-audioout SYSTEM "v4l/vidioc-g-audioout.xml"> | ||
| 319 | <!ENTITY sub-dbg-g-chip-ident SYSTEM "v4l/vidioc-dbg-g-chip-ident.xml"> | ||
| 320 | <!ENTITY sub-g-crop SYSTEM "v4l/vidioc-g-crop.xml"> | ||
| 321 | <!ENTITY sub-g-ctrl SYSTEM "v4l/vidioc-g-ctrl.xml"> | ||
| 322 | <!ENTITY sub-g-enc-index SYSTEM "v4l/vidioc-g-enc-index.xml"> | ||
| 323 | <!ENTITY sub-g-ext-ctrls SYSTEM "v4l/vidioc-g-ext-ctrls.xml"> | ||
| 324 | <!ENTITY sub-g-fbuf SYSTEM "v4l/vidioc-g-fbuf.xml"> | ||
| 325 | <!ENTITY sub-g-fmt SYSTEM "v4l/vidioc-g-fmt.xml"> | ||
| 326 | <!ENTITY sub-g-frequency SYSTEM "v4l/vidioc-g-frequency.xml"> | ||
| 327 | <!ENTITY sub-g-input SYSTEM "v4l/vidioc-g-input.xml"> | ||
| 328 | <!ENTITY sub-g-jpegcomp SYSTEM "v4l/vidioc-g-jpegcomp.xml"> | ||
| 329 | <!ENTITY sub-g-modulator SYSTEM "v4l/vidioc-g-modulator.xml"> | ||
| 330 | <!ENTITY sub-g-output SYSTEM "v4l/vidioc-g-output.xml"> | ||
| 331 | <!ENTITY sub-g-parm SYSTEM "v4l/vidioc-g-parm.xml"> | ||
| 332 | <!ENTITY sub-g-priority SYSTEM "v4l/vidioc-g-priority.xml"> | ||
| 333 | <!ENTITY sub-g-sliced-vbi-cap SYSTEM "v4l/vidioc-g-sliced-vbi-cap.xml"> | ||
| 334 | <!ENTITY sub-g-std SYSTEM "v4l/vidioc-g-std.xml"> | ||
| 335 | <!ENTITY sub-g-tuner SYSTEM "v4l/vidioc-g-tuner.xml"> | ||
| 336 | <!ENTITY sub-log-status SYSTEM "v4l/vidioc-log-status.xml"> | ||
| 337 | <!ENTITY sub-overlay SYSTEM "v4l/vidioc-overlay.xml"> | ||
| 338 | <!ENTITY sub-qbuf SYSTEM "v4l/vidioc-qbuf.xml"> | ||
| 339 | <!ENTITY sub-querybuf SYSTEM "v4l/vidioc-querybuf.xml"> | ||
| 340 | <!ENTITY sub-querycap SYSTEM "v4l/vidioc-querycap.xml"> | ||
| 341 | <!ENTITY sub-queryctrl SYSTEM "v4l/vidioc-queryctrl.xml"> | ||
| 342 | <!ENTITY sub-querystd SYSTEM "v4l/vidioc-querystd.xml"> | ||
| 343 | <!ENTITY sub-reqbufs SYSTEM "v4l/vidioc-reqbufs.xml"> | ||
| 344 | <!ENTITY sub-s-hw-freq-seek SYSTEM "v4l/vidioc-s-hw-freq-seek.xml"> | ||
| 345 | <!ENTITY sub-streamon SYSTEM "v4l/vidioc-streamon.xml"> | ||
| 346 | <!ENTITY sub-subdev-enum-frame-interval SYSTEM "v4l/vidioc-subdev-enum-frame-interval.xml"> | ||
| 347 | <!ENTITY sub-subdev-enum-frame-size SYSTEM "v4l/vidioc-subdev-enum-frame-size.xml"> | ||
| 348 | <!ENTITY sub-subdev-enum-mbus-code SYSTEM "v4l/vidioc-subdev-enum-mbus-code.xml"> | ||
| 349 | <!ENTITY sub-subdev-formats SYSTEM "v4l/subdev-formats.xml"> | ||
| 350 | <!ENTITY sub-subdev-g-crop SYSTEM "v4l/vidioc-subdev-g-crop.xml"> | ||
| 351 | <!ENTITY sub-subdev-g-fmt SYSTEM "v4l/vidioc-subdev-g-fmt.xml"> | ||
| 352 | <!ENTITY sub-subdev-g-frame-interval SYSTEM "v4l/vidioc-subdev-g-frame-interval.xml"> | ||
| 353 | <!ENTITY sub-capture-c SYSTEM "v4l/capture.c.xml"> | ||
| 354 | <!ENTITY sub-keytable-c SYSTEM "v4l/keytable.c.xml"> | ||
| 355 | <!ENTITY sub-v4l2grab-c SYSTEM "v4l/v4l2grab.c.xml"> | ||
| 356 | <!ENTITY sub-videodev2-h SYSTEM "v4l/videodev2.h.xml"> | ||
| 357 | <!ENTITY sub-v4l2 SYSTEM "v4l/v4l2.xml"> | ||
| 358 | <!ENTITY sub-dqevent SYSTEM "v4l/vidioc-dqevent.xml"> | ||
| 359 | <!ENTITY sub-subscribe-event SYSTEM "v4l/vidioc-subscribe-event.xml"> | ||
| 360 | <!ENTITY sub-intro SYSTEM "dvb/intro.xml"> | ||
| 361 | <!ENTITY sub-frontend SYSTEM "dvb/frontend.xml"> | ||
| 362 | <!ENTITY sub-dvbproperty SYSTEM "dvb/dvbproperty.xml"> | ||
| 363 | <!ENTITY sub-demux SYSTEM "dvb/demux.xml"> | ||
| 364 | <!ENTITY sub-video SYSTEM "dvb/video.xml"> | ||
| 365 | <!ENTITY sub-audio SYSTEM "dvb/audio.xml"> | ||
| 366 | <!ENTITY sub-ca SYSTEM "dvb/ca.xml"> | ||
| 367 | <!ENTITY sub-net SYSTEM "dvb/net.xml"> | ||
| 368 | <!ENTITY sub-kdapi SYSTEM "dvb/kdapi.xml"> | ||
| 369 | <!ENTITY sub-examples SYSTEM "dvb/examples.xml"> | ||
| 370 | <!ENTITY sub-frontend-h SYSTEM "dvb/frontend.h.xml"> | ||
| 371 | <!ENTITY sub-dvbapi SYSTEM "dvb/dvbapi.xml"> | ||
| 372 | <!ENTITY sub-media SYSTEM "media.xml"> | ||
| 373 | <!ENTITY sub-media-entities SYSTEM "media-entities.tmpl"> | ||
| 374 | <!ENTITY sub-media-indices SYSTEM "media-indices.tmpl"> | ||
| 375 | |||
| 376 | <!ENTITY sub-media-controller SYSTEM "v4l/media-controller.xml"> | ||
| 377 | <!ENTITY sub-media-func-open SYSTEM "v4l/media-func-open.xml"> | ||
| 378 | <!ENTITY sub-media-func-close SYSTEM "v4l/media-func-close.xml"> | ||
| 379 | <!ENTITY sub-media-func-ioctl SYSTEM "v4l/media-func-ioctl.xml"> | ||
| 380 | <!ENTITY sub-media-ioc-device-info SYSTEM "v4l/media-ioc-device-info.xml"> | ||
| 381 | <!ENTITY sub-media-ioc-enum-entities SYSTEM "v4l/media-ioc-enum-entities.xml"> | ||
| 382 | <!ENTITY sub-media-ioc-enum-links SYSTEM "v4l/media-ioc-enum-links.xml"> | ||
| 383 | <!ENTITY sub-media-ioc-setup-link SYSTEM "v4l/media-ioc-setup-link.xml"> | ||
| 384 | |||
| 385 | <!-- Function Reference --> | ||
| 386 | <!ENTITY close SYSTEM "v4l/func-close.xml"> | ||
| 387 | <!ENTITY ioctl SYSTEM "v4l/func-ioctl.xml"> | ||
| 388 | <!ENTITY mmap SYSTEM "v4l/func-mmap.xml"> | ||
| 389 | <!ENTITY munmap SYSTEM "v4l/func-munmap.xml"> | ||
| 390 | <!ENTITY open SYSTEM "v4l/func-open.xml"> | ||
| 391 | <!ENTITY poll SYSTEM "v4l/func-poll.xml"> | ||
| 392 | <!ENTITY read SYSTEM "v4l/func-read.xml"> | ||
| 393 | <!ENTITY select SYSTEM "v4l/func-select.xml"> | ||
| 394 | <!ENTITY write SYSTEM "v4l/func-write.xml"> | ||
| 395 | <!ENTITY grey SYSTEM "v4l/pixfmt-grey.xml"> | ||
| 396 | <!ENTITY nv12 SYSTEM "v4l/pixfmt-nv12.xml"> | ||
| 397 | <!ENTITY nv12m SYSTEM "v4l/pixfmt-nv12m.xml"> | ||
| 398 | <!ENTITY nv16 SYSTEM "v4l/pixfmt-nv16.xml"> | ||
| 399 | <!ENTITY packed-rgb SYSTEM "v4l/pixfmt-packed-rgb.xml"> | ||
| 400 | <!ENTITY packed-yuv SYSTEM "v4l/pixfmt-packed-yuv.xml"> | ||
| 401 | <!ENTITY sbggr16 SYSTEM "v4l/pixfmt-sbggr16.xml"> | ||
| 402 | <!ENTITY sbggr8 SYSTEM "v4l/pixfmt-sbggr8.xml"> | ||
| 403 | <!ENTITY sgbrg8 SYSTEM "v4l/pixfmt-sgbrg8.xml"> | ||
| 404 | <!ENTITY sgrbg8 SYSTEM "v4l/pixfmt-sgrbg8.xml"> | ||
| 405 | <!ENTITY uyvy SYSTEM "v4l/pixfmt-uyvy.xml"> | ||
| 406 | <!ENTITY vyuy SYSTEM "v4l/pixfmt-vyuy.xml"> | ||
| 407 | <!ENTITY y16 SYSTEM "v4l/pixfmt-y16.xml"> | ||
| 408 | <!ENTITY y41p SYSTEM "v4l/pixfmt-y41p.xml"> | ||
| 409 | <!ENTITY yuv410 SYSTEM "v4l/pixfmt-yuv410.xml"> | ||
| 410 | <!ENTITY yuv411p SYSTEM "v4l/pixfmt-yuv411p.xml"> | ||
| 411 | <!ENTITY yuv420 SYSTEM "v4l/pixfmt-yuv420.xml"> | ||
| 412 | <!ENTITY yuv420m SYSTEM "v4l/pixfmt-yuv420m.xml"> | ||
| 413 | <!ENTITY yuv422p SYSTEM "v4l/pixfmt-yuv422p.xml"> | ||
| 414 | <!ENTITY yuyv SYSTEM "v4l/pixfmt-yuyv.xml"> | ||
| 415 | <!ENTITY yvyu SYSTEM "v4l/pixfmt-yvyu.xml"> | ||
| 416 | <!ENTITY srggb10 SYSTEM "v4l/pixfmt-srggb10.xml"> | ||
| 417 | <!ENTITY srggb8 SYSTEM "v4l/pixfmt-srggb8.xml"> | ||
| 418 | <!ENTITY y10 SYSTEM "v4l/pixfmt-y10.xml"> | ||
| 419 | <!ENTITY cropcap SYSTEM "v4l/vidioc-cropcap.xml"> | ||
| 420 | <!ENTITY dbg-g-register SYSTEM "v4l/vidioc-dbg-g-register.xml"> | ||
| 421 | <!ENTITY encoder-cmd SYSTEM "v4l/vidioc-encoder-cmd.xml"> | ||
| 422 | <!ENTITY enum-fmt SYSTEM "v4l/vidioc-enum-fmt.xml"> | ||
| 423 | <!ENTITY enum-frameintervals SYSTEM "v4l/vidioc-enum-frameintervals.xml"> | ||
| 424 | <!ENTITY enum-framesizes SYSTEM "v4l/vidioc-enum-framesizes.xml"> | ||
| 425 | <!ENTITY enumaudio SYSTEM "v4l/vidioc-enumaudio.xml"> | ||
| 426 | <!ENTITY enumaudioout SYSTEM "v4l/vidioc-enumaudioout.xml"> | ||
| 427 | <!ENTITY enuminput SYSTEM "v4l/vidioc-enuminput.xml"> | ||
| 428 | <!ENTITY enumoutput SYSTEM "v4l/vidioc-enumoutput.xml"> | ||
| 429 | <!ENTITY enum-dv-presets SYSTEM "v4l/vidioc-enum-dv-presets.xml"> | ||
| 430 | <!ENTITY g-dv-preset SYSTEM "v4l/vidioc-g-dv-preset.xml"> | ||
| 431 | <!ENTITY query-dv-preset SYSTEM "v4l/vidioc-query-dv-preset.xml"> | ||
| 432 | <!ENTITY g-dv-timings SYSTEM "v4l/vidioc-g-dv-timings.xml"> | ||
| 433 | <!ENTITY enumstd SYSTEM "v4l/vidioc-enumstd.xml"> | ||
| 434 | <!ENTITY g-audio SYSTEM "v4l/vidioc-g-audio.xml"> | ||
| 435 | <!ENTITY g-audioout SYSTEM "v4l/vidioc-g-audioout.xml"> | ||
| 436 | <!ENTITY dbg-g-chip-ident SYSTEM "v4l/vidioc-dbg-g-chip-ident.xml"> | ||
| 437 | <!ENTITY g-crop SYSTEM "v4l/vidioc-g-crop.xml"> | ||
| 438 | <!ENTITY g-ctrl SYSTEM "v4l/vidioc-g-ctrl.xml"> | ||
| 439 | <!ENTITY g-enc-index SYSTEM "v4l/vidioc-g-enc-index.xml"> | ||
| 440 | <!ENTITY g-ext-ctrls SYSTEM "v4l/vidioc-g-ext-ctrls.xml"> | ||
| 441 | <!ENTITY g-fbuf SYSTEM "v4l/vidioc-g-fbuf.xml"> | ||
| 442 | <!ENTITY g-fmt SYSTEM "v4l/vidioc-g-fmt.xml"> | ||
| 443 | <!ENTITY g-frequency SYSTEM "v4l/vidioc-g-frequency.xml"> | ||
| 444 | <!ENTITY g-input SYSTEM "v4l/vidioc-g-input.xml"> | ||
| 445 | <!ENTITY g-jpegcomp SYSTEM "v4l/vidioc-g-jpegcomp.xml"> | ||
| 446 | <!ENTITY g-modulator SYSTEM "v4l/vidioc-g-modulator.xml"> | ||
| 447 | <!ENTITY g-output SYSTEM "v4l/vidioc-g-output.xml"> | ||
| 448 | <!ENTITY g-parm SYSTEM "v4l/vidioc-g-parm.xml"> | ||
| 449 | <!ENTITY g-priority SYSTEM "v4l/vidioc-g-priority.xml"> | ||
| 450 | <!ENTITY g-sliced-vbi-cap SYSTEM "v4l/vidioc-g-sliced-vbi-cap.xml"> | ||
| 451 | <!ENTITY g-std SYSTEM "v4l/vidioc-g-std.xml"> | ||
| 452 | <!ENTITY g-tuner SYSTEM "v4l/vidioc-g-tuner.xml"> | ||
| 453 | <!ENTITY log-status SYSTEM "v4l/vidioc-log-status.xml"> | ||
| 454 | <!ENTITY overlay SYSTEM "v4l/vidioc-overlay.xml"> | ||
| 455 | <!ENTITY qbuf SYSTEM "v4l/vidioc-qbuf.xml"> | ||
| 456 | <!ENTITY querybuf SYSTEM "v4l/vidioc-querybuf.xml"> | ||
| 457 | <!ENTITY querycap SYSTEM "v4l/vidioc-querycap.xml"> | ||
| 458 | <!ENTITY queryctrl SYSTEM "v4l/vidioc-queryctrl.xml"> | ||
| 459 | <!ENTITY querystd SYSTEM "v4l/vidioc-querystd.xml"> | ||
| 460 | <!ENTITY reqbufs SYSTEM "v4l/vidioc-reqbufs.xml"> | ||
| 461 | <!ENTITY s-hw-freq-seek SYSTEM "v4l/vidioc-s-hw-freq-seek.xml"> | ||
| 462 | <!ENTITY streamon SYSTEM "v4l/vidioc-streamon.xml"> | ||
| 463 | <!ENTITY dqevent SYSTEM "v4l/vidioc-dqevent.xml"> | ||
| 464 | <!ENTITY subscribe_event SYSTEM "v4l/vidioc-subscribe-event.xml"> | ||
diff --git a/Documentation/DocBook/media-indices.tmpl b/Documentation/DocBook/media-indices.tmpl deleted file mode 100644 index 78d6031de001..000000000000 --- a/Documentation/DocBook/media-indices.tmpl +++ /dev/null | |||
| @@ -1,89 +0,0 @@ | |||
| 1 | <!-- Generated file! Do not edit. --> | ||
| 2 | |||
| 3 | <index><title>List of Types</title> | ||
| 4 | <indexentry><primaryie><link linkend='v4l2-std-id'>v4l2_std_id</link></primaryie></indexentry> | ||
| 5 | <indexentry><primaryie>enum <link linkend='v4l2-buf-type'>v4l2_buf_type</link></primaryie></indexentry> | ||
| 6 | <indexentry><primaryie>enum <link linkend='v4l2-colorspace'>v4l2_colorspace</link></primaryie></indexentry> | ||
| 7 | <indexentry><primaryie>enum <link linkend='v4l2-ctrl-type'>v4l2_ctrl_type</link></primaryie></indexentry> | ||
| 8 | <indexentry><primaryie>enum <link linkend='v4l2-exposure-auto-type'>v4l2_exposure_auto_type</link></primaryie></indexentry> | ||
| 9 | <indexentry><primaryie>enum <link linkend='v4l2-field'>v4l2_field</link></primaryie></indexentry> | ||
| 10 | <indexentry><primaryie>enum <link linkend='v4l2-frmivaltypes'>v4l2_frmivaltypes</link></primaryie></indexentry> | ||
| 11 | <indexentry><primaryie>enum <link linkend='v4l2-frmsizetypes'>v4l2_frmsizetypes</link></primaryie></indexentry> | ||
| 12 | <indexentry><primaryie>enum <link linkend='v4l2-memory'>v4l2_memory</link></primaryie></indexentry> | ||
| 13 | <indexentry><primaryie>enum <link linkend='v4l2-mpeg-audio-ac3-bitrate'>v4l2_mpeg_audio_ac3_bitrate</link></primaryie></indexentry> | ||
| 14 | <indexentry><primaryie>enum <link linkend='v4l2-mpeg-audio-crc'>v4l2_mpeg_audio_crc</link></primaryie></indexentry> | ||
| 15 | <indexentry><primaryie>enum <link linkend='v4l2-mpeg-audio-emphasis'>v4l2_mpeg_audio_emphasis</link></primaryie></indexentry> | ||
| 16 | <indexentry><primaryie>enum <link linkend='v4l2-mpeg-audio-encoding'>v4l2_mpeg_audio_encoding</link></primaryie></indexentry> | ||
| 17 | <indexentry><primaryie>enum <link linkend='v4l2-mpeg-audio-l1-bitrate'>v4l2_mpeg_audio_l1_bitrate</link></primaryie></indexentry> | ||
| 18 | <indexentry><primaryie>enum <link linkend='v4l2-mpeg-audio-l2-bitrate'>v4l2_mpeg_audio_l2_bitrate</link></primaryie></indexentry> | ||
| 19 | <indexentry><primaryie>enum <link linkend='v4l2-mpeg-audio-l3-bitrate'>v4l2_mpeg_audio_l3_bitrate</link></primaryie></indexentry> | ||
| 20 | <indexentry><primaryie>enum <link linkend='v4l2-mpeg-audio-mode'>v4l2_mpeg_audio_mode</link></primaryie></indexentry> | ||
| 21 | <indexentry><primaryie>enum <link linkend='v4l2-mpeg-audio-mode-extension'>v4l2_mpeg_audio_mode_extension</link></primaryie></indexentry> | ||
| 22 | <indexentry><primaryie>enum <link linkend='v4l2-mpeg-audio-sampling-freq'>v4l2_mpeg_audio_sampling_freq</link></primaryie></indexentry> | ||
| 23 | <indexentry><primaryie>enum <link linkend='chroma-spatial-filter-type'>v4l2_mpeg_cx2341x_video_chroma_spatial_filter_type</link></primaryie></indexentry> | ||
| 24 | <indexentry><primaryie>enum <link linkend='luma-spatial-filter-type'>v4l2_mpeg_cx2341x_video_luma_spatial_filter_type</link></primaryie></indexentry> | ||
| 25 | <indexentry><primaryie>enum <link linkend='v4l2-mpeg-cx2341x-video-median-filter-type'>v4l2_mpeg_cx2341x_video_median_filter_type</link></primaryie></indexentry> | ||
| 26 | <indexentry><primaryie>enum <link linkend='v4l2-mpeg-cx2341x-video-spatial-filter-mode'>v4l2_mpeg_cx2341x_video_spatial_filter_mode</link></primaryie></indexentry> | ||
| 27 | <indexentry><primaryie>enum <link linkend='v4l2-mpeg-cx2341x-video-temporal-filter-mode'>v4l2_mpeg_cx2341x_video_temporal_filter_mode</link></primaryie></indexentry> | ||
| 28 | <indexentry><primaryie>enum <link linkend='v4l2-mpeg-stream-type'>v4l2_mpeg_stream_type</link></primaryie></indexentry> | ||
| 29 | <indexentry><primaryie>enum <link linkend='v4l2-mpeg-stream-vbi-fmt'>v4l2_mpeg_stream_vbi_fmt</link></primaryie></indexentry> | ||
| 30 | <indexentry><primaryie>enum <link linkend='v4l2-mpeg-video-aspect'>v4l2_mpeg_video_aspect</link></primaryie></indexentry> | ||
| 31 | <indexentry><primaryie>enum <link linkend='v4l2-mpeg-video-bitrate-mode'>v4l2_mpeg_video_bitrate_mode</link></primaryie></indexentry> | ||
| 32 | <indexentry><primaryie>enum <link linkend='v4l2-mpeg-video-encoding'>v4l2_mpeg_video_encoding</link></primaryie></indexentry> | ||
| 33 | <indexentry><primaryie>enum <link linkend='v4l2-power-line-frequency'>v4l2_power_line_frequency</link></primaryie></indexentry> | ||
| 34 | <indexentry><primaryie>enum <link linkend='v4l2-priority'>v4l2_priority</link></primaryie></indexentry> | ||
| 35 | <indexentry><primaryie>enum <link linkend='v4l2-tuner-type'>v4l2_tuner_type</link></primaryie></indexentry> | ||
| 36 | <indexentry><primaryie>enum <link linkend='v4l2-preemphasis'>v4l2_preemphasis</link></primaryie></indexentry> | ||
| 37 | <indexentry><primaryie>struct <link linkend='v4l2-audio'>v4l2_audio</link></primaryie></indexentry> | ||
| 38 | <indexentry><primaryie>struct <link linkend='v4l2-audioout'>v4l2_audioout</link></primaryie></indexentry> | ||
| 39 | <indexentry><primaryie>struct <link linkend='v4l2-bt-timings'>v4l2_bt_timings</link></primaryie></indexentry> | ||
| 40 | <indexentry><primaryie>struct <link linkend='v4l2-buffer'>v4l2_buffer</link></primaryie></indexentry> | ||
| 41 | <indexentry><primaryie>struct <link linkend='v4l2-capability'>v4l2_capability</link></primaryie></indexentry> | ||
| 42 | <indexentry><primaryie>struct <link linkend='v4l2-captureparm'>v4l2_captureparm</link></primaryie></indexentry> | ||
| 43 | <indexentry><primaryie>struct <link linkend='v4l2-clip'>v4l2_clip</link></primaryie></indexentry> | ||
| 44 | <indexentry><primaryie>struct <link linkend='v4l2-control'>v4l2_control</link></primaryie></indexentry> | ||
| 45 | <indexentry><primaryie>struct <link linkend='v4l2-crop'>v4l2_crop</link></primaryie></indexentry> | ||
| 46 | <indexentry><primaryie>struct <link linkend='v4l2-cropcap'>v4l2_cropcap</link></primaryie></indexentry> | ||
| 47 | <indexentry><primaryie>struct <link linkend='v4l2-dbg-chip-ident'>v4l2_dbg_chip_ident</link></primaryie></indexentry> | ||
| 48 | <indexentry><primaryie>struct <link linkend='v4l2-dbg-match'>v4l2_dbg_match</link></primaryie></indexentry> | ||
| 49 | <indexentry><primaryie>struct <link linkend='v4l2-dbg-register'>v4l2_dbg_register</link></primaryie></indexentry> | ||
| 50 | <indexentry><primaryie>struct <link linkend='v4l2-dv-enum-preset'>v4l2_dv_enum_preset</link></primaryie></indexentry> | ||
| 51 | <indexentry><primaryie>struct <link linkend='v4l2-dv-preset'>v4l2_dv_preset</link></primaryie></indexentry> | ||
| 52 | <indexentry><primaryie>struct <link linkend='v4l2-dv-timings'>v4l2_dv_timings</link></primaryie></indexentry> | ||
| 53 | <indexentry><primaryie>struct <link linkend='v4l2-enc-idx'>v4l2_enc_idx</link></primaryie></indexentry> | ||
| 54 | <indexentry><primaryie>struct <link linkend='v4l2-enc-idx-entry'>v4l2_enc_idx_entry</link></primaryie></indexentry> | ||
| 55 | <indexentry><primaryie>struct <link linkend='v4l2-encoder-cmd'>v4l2_encoder_cmd</link></primaryie></indexentry> | ||
| 56 | <indexentry><primaryie>struct <link linkend='v4l2-ext-control'>v4l2_ext_control</link></primaryie></indexentry> | ||
| 57 | <indexentry><primaryie>struct <link linkend='v4l2-ext-controls'>v4l2_ext_controls</link></primaryie></indexentry> | ||
| 58 | <indexentry><primaryie>struct <link linkend='v4l2-fmtdesc'>v4l2_fmtdesc</link></primaryie></indexentry> | ||
| 59 | <indexentry><primaryie>struct <link linkend='v4l2-format'>v4l2_format</link></primaryie></indexentry> | ||
| 60 | <indexentry><primaryie>struct <link linkend='v4l2-fract'>v4l2_fract</link></primaryie></indexentry> | ||
| 61 | <indexentry><primaryie>struct <link linkend='v4l2-framebuffer'>v4l2_framebuffer</link></primaryie></indexentry> | ||
| 62 | <indexentry><primaryie>struct <link linkend='v4l2-frequency'>v4l2_frequency</link></primaryie></indexentry> | ||
| 63 | <indexentry><primaryie>struct <link linkend='v4l2-frmival-stepwise'>v4l2_frmival_stepwise</link></primaryie></indexentry> | ||
| 64 | <indexentry><primaryie>struct <link linkend='v4l2-frmivalenum'>v4l2_frmivalenum</link></primaryie></indexentry> | ||
| 65 | <indexentry><primaryie>struct <link linkend='v4l2-frmsize-discrete'>v4l2_frmsize_discrete</link></primaryie></indexentry> | ||
| 66 | <indexentry><primaryie>struct <link linkend='v4l2-frmsize-stepwise'>v4l2_frmsize_stepwise</link></primaryie></indexentry> | ||
| 67 | <indexentry><primaryie>struct <link linkend='v4l2-frmsizeenum'>v4l2_frmsizeenum</link></primaryie></indexentry> | ||
| 68 | <indexentry><primaryie>struct <link linkend='v4l2-hw-freq-seek'>v4l2_hw_freq_seek</link></primaryie></indexentry> | ||
| 69 | <indexentry><primaryie>struct <link linkend='v4l2-input'>v4l2_input</link></primaryie></indexentry> | ||
| 70 | <indexentry><primaryie>struct <link linkend='v4l2-jpegcompression'>v4l2_jpegcompression</link></primaryie></indexentry> | ||
| 71 | <indexentry><primaryie>struct <link linkend='v4l2-modulator'>v4l2_modulator</link></primaryie></indexentry> | ||
| 72 | <indexentry><primaryie>struct <link linkend='v4l2-mpeg-vbi-fmt-ivtv'>v4l2_mpeg_vbi_fmt_ivtv</link></primaryie></indexentry> | ||
| 73 | <indexentry><primaryie>struct <link linkend='v4l2-output'>v4l2_output</link></primaryie></indexentry> | ||
| 74 | <indexentry><primaryie>struct <link linkend='v4l2-outputparm'>v4l2_outputparm</link></primaryie></indexentry> | ||
| 75 | <indexentry><primaryie>struct <link linkend='v4l2-pix-format'>v4l2_pix_format</link></primaryie></indexentry> | ||
| 76 | <indexentry><primaryie>struct <link linkend='v4l2-queryctrl'>v4l2_queryctrl</link></primaryie></indexentry> | ||
| 77 | <indexentry><primaryie>struct <link linkend='v4l2-querymenu'>v4l2_querymenu</link></primaryie></indexentry> | ||
| 78 | <indexentry><primaryie>struct <link linkend='v4l2-rect'>v4l2_rect</link></primaryie></indexentry> | ||
| 79 | <indexentry><primaryie>struct <link linkend='v4l2-requestbuffers'>v4l2_requestbuffers</link></primaryie></indexentry> | ||
| 80 | <indexentry><primaryie>struct <link linkend='v4l2-sliced-vbi-cap'>v4l2_sliced_vbi_cap</link></primaryie></indexentry> | ||
| 81 | <indexentry><primaryie>struct <link linkend='v4l2-sliced-vbi-data'>v4l2_sliced_vbi_data</link></primaryie></indexentry> | ||
| 82 | <indexentry><primaryie>struct <link linkend='v4l2-sliced-vbi-format'>v4l2_sliced_vbi_format</link></primaryie></indexentry> | ||
| 83 | <indexentry><primaryie>struct <link linkend='v4l2-standard'>v4l2_standard</link></primaryie></indexentry> | ||
| 84 | <indexentry><primaryie>struct <link linkend='v4l2-streamparm'>v4l2_streamparm</link></primaryie></indexentry> | ||
| 85 | <indexentry><primaryie>struct <link linkend='v4l2-timecode'>v4l2_timecode</link></primaryie></indexentry> | ||
| 86 | <indexentry><primaryie>struct <link linkend='v4l2-tuner'>v4l2_tuner</link></primaryie></indexentry> | ||
| 87 | <indexentry><primaryie>struct <link linkend='v4l2-vbi-format'>v4l2_vbi_format</link></primaryie></indexentry> | ||
| 88 | <indexentry><primaryie>struct <link linkend='v4l2-window'>v4l2_window</link></primaryie></indexentry> | ||
| 89 | </index> | ||
diff --git a/Documentation/DocBook/media/Makefile b/Documentation/DocBook/media/Makefile new file mode 100644 index 000000000000..6628b4b9cac4 --- /dev/null +++ b/Documentation/DocBook/media/Makefile | |||
| @@ -0,0 +1,386 @@ | |||
| 1 | ### | ||
| 2 | # Media build rules - Auto-generates media contents/indexes and *.h xml's | ||
| 3 | # | ||
| 4 | |||
| 5 | SHELL=/bin/bash | ||
| 6 | |||
| 7 | MEDIA_OBJ_DIR=$(objtree)/Documentation/DocBook/ | ||
| 8 | MEDIA_SRC_DIR=$(srctree)/Documentation/DocBook/media | ||
| 9 | |||
| 10 | MEDIA_TEMP = media-entities.tmpl \ | ||
| 11 | media-indices.tmpl \ | ||
| 12 | videodev2.h.xml \ | ||
| 13 | v4l2.xml \ | ||
| 14 | audio.h.xml \ | ||
| 15 | ca.h.xml \ | ||
| 16 | dmx.h.xml \ | ||
| 17 | frontend.h.xml \ | ||
| 18 | net.h.xml \ | ||
| 19 | video.h.xml \ | ||
| 20 | |||
| 21 | IMGFILES := $(patsubst %.b64,%, $(notdir $(shell ls $(MEDIA_SRC_DIR)/*.b64))) | ||
| 22 | OBJIMGFILES := $(addprefix $(MEDIA_OBJ_DIR)/, $(IMGFILES)) | ||
| 23 | GENFILES := $(addprefix $(MEDIA_OBJ_DIR)/, $(MEDIA_TEMP)) | ||
| 24 | |||
| 25 | PHONY += cleanmediadocs | ||
| 26 | |||
| 27 | cleanmediadocs: | ||
| 28 | -@rm `find $(MEDIA_OBJ_DIR) -type l` $(GENFILES) $(OBJIMGFILES) 2>/dev/null | ||
| 29 | |||
| 30 | $(obj)/media_api.xml: $(GENFILES) FORCE | ||
| 31 | |||
| 32 | #$(MEDIA_OBJ_DIR)/media_api.html: $(MEDIA_OBJ_DIR)/media_api.xml | ||
| 33 | #$(MEDIA_OBJ_DIR)/media_api.pdf: $(MEDIA_OBJ_DIR)/media_api.xml | ||
| 34 | #$(MEDIA_OBJ_DIR)/media_api.ps: $(MEDIA_OBJ_DIR)/media_api.xml | ||
| 35 | |||
| 36 | V4L_SGMLS = \ | ||
| 37 | $(shell ls $(MEDIA_SRC_DIR)/v4l/*.xml|perl -ne 'print "$$1 " if (m,.*/(.*)\n,)') \ | ||
| 38 | capture.c.xml \ | ||
| 39 | keytable.c.xml \ | ||
| 40 | v4l2grab.c.xml | ||
| 41 | |||
| 42 | DVB_SGMLS = \ | ||
| 43 | $(shell ls $(MEDIA_SRC_DIR)/dvb/*.xml|perl -ne 'print "$$1 " if (m,.*/(.*)\n,)') | ||
| 44 | |||
| 45 | MEDIA_SGMLS = $(addprefix ./,$(V4L_SGMLS)) $(addprefix ./,$(DVB_SGMLS)) $(addprefix ./,$(MEDIA_TEMP)) | ||
| 46 | |||
| 47 | FUNCS = \ | ||
| 48 | close \ | ||
| 49 | ioctl \ | ||
| 50 | mmap \ | ||
| 51 | munmap \ | ||
| 52 | open \ | ||
| 53 | poll \ | ||
| 54 | read \ | ||
| 55 | select \ | ||
| 56 | write \ | ||
| 57 | |||
| 58 | IOCTLS = \ | ||
| 59 | $(shell perl -ne 'print "$$1 " if /\#define\s+([^\s]+)\s+_IO/' $(srctree)/include/linux/videodev2.h) \ | ||
| 60 | $(shell perl -ne 'print "$$1 " if /\#define\s+([^\s]+)\s+_IO/' $(srctree)/include/linux/dvb/audio.h) \ | ||
| 61 | $(shell perl -ne 'print "$$1 " if /\#define\s+([^\s]+)\s+_IO/' $(srctree)/include/linux/dvb/ca.h) \ | ||
| 62 | $(shell perl -ne 'print "$$1 " if /\#define\s+([^\s]+)\s+_IO/' $(srctree)/include/linux/dvb/dmx.h) \ | ||
| 63 | $(shell perl -ne 'print "$$1 " if /\#define\s+([^\s]+)\s+_IO/' $(srctree)/include/linux/dvb/frontend.h) \ | ||
| 64 | $(shell perl -ne 'print "$$1 " if /\#define\s+([A-Z][^\s]+)\s+_IO/' $(srctree)/include/linux/dvb/net.h) \ | ||
| 65 | $(shell perl -ne 'print "$$1 " if /\#define\s+([^\s]+)\s+_IO/' $(srctree)/include/linux/dvb/video.h) \ | ||
| 66 | $(shell perl -ne 'print "$$1 " if /\#define\s+([^\s]+)\s+_IO/' $(srctree)/include/linux/media.h) \ | ||
| 67 | $(shell perl -ne 'print "$$1 " if /\#define\s+([^\s]+)\s+_IO/' $(srctree)/include/linux/v4l2-subdev.h) \ | ||
| 68 | VIDIOC_SUBDEV_G_FRAME_INTERVAL \ | ||
| 69 | VIDIOC_SUBDEV_S_FRAME_INTERVAL \ | ||
| 70 | VIDIOC_SUBDEV_ENUM_MBUS_CODE \ | ||
| 71 | VIDIOC_SUBDEV_ENUM_FRAME_SIZE \ | ||
| 72 | VIDIOC_SUBDEV_ENUM_FRAME_INTERVAL \ | ||
| 73 | |||
| 74 | TYPES = \ | ||
| 75 | $(shell perl -ne 'print "$$1 " if /^typedef\s+[^\s]+\s+([^\s]+)\;/' $(srctree)/include/linux/videodev2.h) \ | ||
| 76 | $(shell perl -ne 'print "$$1 " if /^}\s+([a-z0-9_]+_t)/' $(srctree)/include/linux/dvb/frontend.h) | ||
| 77 | |||
| 78 | ENUMS = \ | ||
| 79 | $(shell perl -ne 'print "$$1 " if /^enum\s+([^\s]+)\s+/' $(srctree)/include/linux/videodev2.h) \ | ||
| 80 | $(shell perl -ne 'print "$$1 " if /^enum\s+([^\s]+)\s+/' $(srctree)/include/linux/dvb/audio.h) \ | ||
| 81 | $(shell perl -ne 'print "$$1 " if /^enum\s+([^\s]+)\s+/' $(srctree)/include/linux/dvb/ca.h) \ | ||
| 82 | $(shell perl -ne 'print "$$1 " if /^enum\s+([^\s]+)\s+/' $(srctree)/include/linux/dvb/dmx.h) \ | ||
| 83 | $(shell perl -ne 'print "$$1 " if /^enum\s+([^\s]+)\s+/' $(srctree)/include/linux/dvb/frontend.h) \ | ||
| 84 | $(shell perl -ne 'print "$$1 " if /^enum\s+([^\s]+)\s+/' $(srctree)/include/linux/dvb/net.h) \ | ||
| 85 | $(shell perl -ne 'print "$$1 " if /^enum\s+([^\s]+)\s+/' $(srctree)/include/linux/dvb/video.h) \ | ||
| 86 | $(shell perl -ne 'print "$$1 " if /^enum\s+([^\s]+)\s+/' $(srctree)/include/linux/media.h) \ | ||
| 87 | $(shell perl -ne 'print "$$1 " if /^enum\s+([^\s]+)\s+/' $(srctree)/include/linux/v4l2-mediabus.h) \ | ||
| 88 | $(shell perl -ne 'print "$$1 " if /^enum\s+([^\s]+)\s+/' $(srctree)/include/linux/v4l2-subdev.h) | ||
| 89 | |||
| 90 | STRUCTS = \ | ||
| 91 | $(shell perl -ne 'print "$$1 " if /^struct\s+([^\s]+)\s+/' $(srctree)/include/linux/videodev2.h) \ | ||
| 92 | $(shell perl -ne 'print "$$1 " if (/^struct\s+([^\s\{]+)\s*/)' $(srctree)/include/linux/dvb/audio.h) \ | ||
| 93 | $(shell perl -ne 'print "$$1 " if (/^struct\s+([^\s]+)\s+/)' $(srctree)/include/linux/dvb/ca.h) \ | ||
| 94 | $(shell perl -ne 'print "$$1 " if (/^struct\s+([^\s]+)\s+/)' $(srctree)/include/linux/dvb/dmx.h) \ | ||
| 95 | $(shell perl -ne 'print "$$1 " if (!/dtv\_cmds\_h/ && /^struct\s+([^\s]+)\s+/)' $(srctree)/include/linux/dvb/frontend.h) \ | ||
| 96 | $(shell perl -ne 'print "$$1 " if (/^struct\s+([A-Z][^\s]+)\s+/)' $(srctree)/include/linux/dvb/net.h) \ | ||
| 97 | $(shell perl -ne 'print "$$1 " if (/^struct\s+([^\s]+)\s+/)' $(srctree)/include/linux/dvb/video.h) \ | ||
| 98 | $(shell perl -ne 'print "$$1 " if /^struct\s+([^\s]+)\s+/' $(srctree)/include/linux/media.h) \ | ||
| 99 | $(shell perl -ne 'print "$$1 " if /^struct\s+([^\s]+)\s+/' $(srctree)/include/linux/v4l2-subdev.h) \ | ||
| 100 | $(shell perl -ne 'print "$$1 " if /^struct\s+([^\s]+)\s+/' $(srctree)/include/linux/v4l2-mediabus.h) | ||
| 101 | |||
| 102 | ERRORS = \ | ||
| 103 | E2BIG \ | ||
| 104 | EACCES \ | ||
| 105 | EAGAIN \ | ||
| 106 | EBADF \ | ||
| 107 | EBADFD \ | ||
| 108 | EBADR \ | ||
| 109 | EBADRQC \ | ||
| 110 | EBUSY \ | ||
| 111 | ECHILD \ | ||
| 112 | ECONNRESET \ | ||
| 113 | EDEADLK \ | ||
| 114 | EDOM \ | ||
| 115 | EEXIST \ | ||
| 116 | EFAULT \ | ||
| 117 | EFBIG \ | ||
| 118 | EILSEQ \ | ||
| 119 | EINIT \ | ||
| 120 | EINPROGRESS \ | ||
| 121 | EINTR \ | ||
| 122 | EINVAL \ | ||
| 123 | EIO \ | ||
| 124 | EMFILE \ | ||
| 125 | ENFILE \ | ||
| 126 | ENOBUFS \ | ||
| 127 | ENODATA \ | ||
| 128 | ENODEV \ | ||
| 129 | ENOENT \ | ||
| 130 | ENOIOCTLCMD \ | ||
| 131 | ENOMEM \ | ||
| 132 | ENOSPC \ | ||
| 133 | ENOSR \ | ||
| 134 | ENOSYS \ | ||
| 135 | ENOTSUP \ | ||
| 136 | ENOTSUPP \ | ||
| 137 | ENOTTY \ | ||
| 138 | ENXIO \ | ||
| 139 | EOPNOTSUPP \ | ||
| 140 | EOVERFLOW \ | ||
| 141 | EPERM \ | ||
| 142 | EPIPE \ | ||
| 143 | EPROTO \ | ||
| 144 | ERANGE \ | ||
| 145 | EREMOTE \ | ||
| 146 | EREMOTEIO \ | ||
| 147 | ERESTART \ | ||
| 148 | ERESTARTSYS \ | ||
| 149 | ESHUTDOWN \ | ||
| 150 | ESPIPE \ | ||
| 151 | ETIME \ | ||
| 152 | ETIMEDOUT \ | ||
| 153 | EUSERS \ | ||
| 154 | EWOULDBLOCK \ | ||
| 155 | EXDEV \ | ||
| 156 | |||
| 157 | ESCAPE = \ | ||
| 158 | -e "s/&/\\&/g" \ | ||
| 159 | -e "s/</\\</g" \ | ||
| 160 | -e "s/>/\\>/g" | ||
| 161 | |||
| 162 | FILENAME = \ | ||
| 163 | -e s,"^[^\/]*/",, \ | ||
| 164 | -e s/"\\.xml"// \ | ||
| 165 | -e s/"\\.tmpl"// \ | ||
| 166 | -e s/\\\./-/g \ | ||
| 167 | -e s/"^func-"// \ | ||
| 168 | -e s/"^pixfmt-"// \ | ||
| 169 | -e s/"^vidioc-"// | ||
| 170 | |||
| 171 | # Generate references to these structs in videodev2.h.xml. | ||
| 172 | DOCUMENTED = \ | ||
| 173 | -e "s/\(enum *\)v4l2_mpeg_cx2341x_video_\([a-z]*_spatial_filter_type\)/\1<link linkend=\"\2\">v4l2_mpeg_cx2341x_video_\2<\/link>/g" \ | ||
| 174 | -e "s/\(\(enum\|struct\) *\)\(v4l2_[a-zA-Z0-9_]*\)/\1<link linkend=\"\3\">\3<\/link>/g" \ | ||
| 175 | -e "s/\(V4L2_PIX_FMT_[A-Z0-9_]\+\) /<link linkend=\"\1\">\1<\/link> /g" \ | ||
| 176 | -e ":a;s/\(linkend=\".*\)_\(.*\">\)/\1-\2/;ta" \ | ||
| 177 | -e "s/v4l2\-mpeg\-vbi\-ITV0/v4l2-mpeg-vbi-itv0-1/g" | ||
| 178 | |||
| 179 | DVB_DOCUMENTED = \ | ||
| 180 | -e "s/\(linkend\=\"\)FE_SET_PROPERTY/\1FE_GET_PROPERTY/g" \ | ||
| 181 | -e "s,\(struct\s\+\)\([a-z0-9_]\+\)\(\s\+{\),\1\<link linkend=\"\2\">\2\<\/link\>\3,g" \ | ||
| 182 | -e "s,\(}\s\+\)\([a-z0-9_]\+_t\+\),\1\<link linkend=\"\2\">\2\<\/link\>,g" \ | ||
| 183 | -e "s,\(define\s\+\)\(DTV_[A-Z0-9_]\+\)\(\s\+[0-9]\+\),\1\<link linkend=\"\2\">\2\<\/link\>\3,g" \ | ||
| 184 | -e "s,<link\s\+linkend=\".*\">\(DTV_IOCTL_MAX_MSGS\|dtv_cmds_h\|__.*_old\)<\/link>,\1,g" \ | ||
| 185 | -e ":a;s/\(linkend=\".*\)_\(.*\">\)/\1-\2/;ta" \ | ||
| 186 | -e "s,\(audio-mixer\|audio-karaoke\|audio-status\|ca-slot-info\|ca-descr-info\|ca-caps\|ca-msg\|ca-descr\|ca-pid\|dmx-filter\|dmx-caps\|video-system\|video-highlight\|video-spu\|video-spu-palette\|video-navi-pack\)-t,\1,g" \ | ||
| 187 | -e "s,DTV-ISDBT-LAYER[A-C],DTV-ISDBT-LAYER,g" \ | ||
| 188 | -e "s,\(define\s\+\)\([A-Z0-9_]\+\)\(\s\+_IO\),\1\<link linkend=\"\2\">\2\<\/link\>\3,g" \ | ||
| 189 | -e "s,<link\s\+linkend=\".*\">\(__.*_OLD\)<\/link>,\1,g" \ | ||
| 190 | |||
| 191 | # | ||
| 192 | # Media targets and dependencies | ||
| 193 | # | ||
| 194 | |||
| 195 | install_media_images = \ | ||
| 196 | $(Q)cp $(OBJIMGFILES) $(MEDIA_OBJ_DIR)/media_api | ||
| 197 | |||
| 198 | $(MEDIA_OBJ_DIR)/%: $(MEDIA_SRC_DIR)/%.b64 | ||
| 199 | $(Q)base64 -d $< >$@ | ||
| 200 | |||
| 201 | $(MEDIA_OBJ_DIR)/v4l2.xml: $(OBJIMGFILES) | ||
| 202 | @$($(quiet)gen_xml) | ||
| 203 | @(ln -sf $(MEDIA_SRC_DIR)/v4l/*xml $(MEDIA_OBJ_DIR)/) | ||
| 204 | @(ln -sf $(MEDIA_SRC_DIR)/dvb/*xml $(MEDIA_OBJ_DIR)/) | ||
| 205 | |||
| 206 | $(MEDIA_OBJ_DIR)/videodev2.h.xml: $(srctree)/include/linux/videodev2.h $(MEDIA_OBJ_DIR)/v4l2.xml | ||
| 207 | @$($(quiet)gen_xml) | ||
| 208 | @( \ | ||
| 209 | echo "<programlisting>") > $@ | ||
| 210 | @( \ | ||
| 211 | expand --tabs=8 < $< | \ | ||
| 212 | sed $(ESCAPE) $(DOCUMENTED) | \ | ||
| 213 | sed 's/i\.e\./&ie;/') >> $@ | ||
| 214 | @( \ | ||
| 215 | echo "</programlisting>") >> $@ | ||
| 216 | |||
| 217 | $(MEDIA_OBJ_DIR)/audio.h.xml: $(srctree)/include/linux/dvb/audio.h $(MEDIA_OBJ_DIR)/v4l2.xml | ||
| 218 | @$($(quiet)gen_xml) | ||
| 219 | @( \ | ||
| 220 | echo "<programlisting>") > $@ | ||
| 221 | @( \ | ||
| 222 | expand --tabs=8 < $< | \ | ||
| 223 | sed $(ESCAPE) $(DVB_DOCUMENTED) | \ | ||
| 224 | sed 's/i\.e\./&ie;/') >> $@ | ||
| 225 | @( \ | ||
| 226 | echo "</programlisting>") >> $@ | ||
| 227 | |||
| 228 | $(MEDIA_OBJ_DIR)/ca.h.xml: $(srctree)/include/linux/dvb/ca.h $(MEDIA_OBJ_DIR)/v4l2.xml | ||
| 229 | @$($(quiet)gen_xml) | ||
| 230 | @( \ | ||
| 231 | echo "<programlisting>") > $@ | ||
| 232 | @( \ | ||
| 233 | expand --tabs=8 < $< | \ | ||
| 234 | sed $(ESCAPE) $(DVB_DOCUMENTED) | \ | ||
| 235 | sed 's/i\.e\./&ie;/') >> $@ | ||
| 236 | @( \ | ||
| 237 | echo "</programlisting>") >> $@ | ||
| 238 | |||
| 239 | $(MEDIA_OBJ_DIR)/dmx.h.xml: $(srctree)/include/linux/dvb/dmx.h $(MEDIA_OBJ_DIR)/v4l2.xml | ||
| 240 | @$($(quiet)gen_xml) | ||
| 241 | @( \ | ||
| 242 | echo "<programlisting>") > $@ | ||
| 243 | @( \ | ||
| 244 | expand --tabs=8 < $< | \ | ||
| 245 | sed $(ESCAPE) $(DVB_DOCUMENTED) | \ | ||
| 246 | sed 's/i\.e\./&ie;/') >> $@ | ||
| 247 | @( \ | ||
| 248 | echo "</programlisting>") >> $@ | ||
| 249 | |||
| 250 | $(MEDIA_OBJ_DIR)/frontend.h.xml: $(srctree)/include/linux/dvb/frontend.h $(MEDIA_OBJ_DIR)/v4l2.xml | ||
| 251 | @$($(quiet)gen_xml) | ||
| 252 | @( \ | ||
| 253 | echo "<programlisting>") > $@ | ||
| 254 | @( \ | ||
| 255 | expand --tabs=8 < $< | \ | ||
| 256 | sed $(ESCAPE) $(DVB_DOCUMENTED) | \ | ||
| 257 | sed 's/i\.e\./&ie;/') >> $@ | ||
| 258 | @( \ | ||
| 259 | echo "</programlisting>") >> $@ | ||
| 260 | |||
| 261 | $(MEDIA_OBJ_DIR)/net.h.xml: $(srctree)/include/linux/dvb/net.h $(MEDIA_OBJ_DIR)/v4l2.xml | ||
| 262 | @$($(quiet)gen_xml) | ||
| 263 | @( \ | ||
| 264 | echo "<programlisting>") > $@ | ||
| 265 | @( \ | ||
| 266 | expand --tabs=8 < $< | \ | ||
| 267 | sed $(ESCAPE) $(DVB_DOCUMENTED) | \ | ||
| 268 | sed 's/i\.e\./&ie;/') >> $@ | ||
| 269 | @( \ | ||
| 270 | echo "</programlisting>") >> $@ | ||
| 271 | |||
| 272 | $(MEDIA_OBJ_DIR)/video.h.xml: $(srctree)/include/linux/dvb/video.h $(MEDIA_OBJ_DIR)/v4l2.xml | ||
| 273 | @$($(quiet)gen_xml) | ||
| 274 | @( \ | ||
| 275 | echo "<programlisting>") > $@ | ||
| 276 | @( \ | ||
| 277 | expand --tabs=8 < $< | \ | ||
| 278 | sed $(ESCAPE) $(DVB_DOCUMENTED) | \ | ||
| 279 | sed 's/i\.e\./&ie;/') >> $@ | ||
| 280 | @( \ | ||
| 281 | echo "</programlisting>") >> $@ | ||
| 282 | |||
| 283 | $(MEDIA_OBJ_DIR)/media-entities.tmpl: $(MEDIA_OBJ_DIR)/v4l2.xml | ||
| 284 | @$($(quiet)gen_xml) | ||
| 285 | @( \ | ||
| 286 | echo "<!-- Generated file! Do not edit. -->") >$@ | ||
| 287 | @( \ | ||
| 288 | echo -e "\n<!-- Functions -->") >>$@ | ||
| 289 | @( \ | ||
| 290 | for ident in $(FUNCS) ; do \ | ||
| 291 | entity=`echo $$ident | tr _ -` ; \ | ||
| 292 | echo "<!ENTITY func-$$entity \"<link" \ | ||
| 293 | "linkend='func-$$entity'><function>$$ident()</function></link>\">" \ | ||
| 294 | >>$@ ; \ | ||
| 295 | done) | ||
| 296 | @( \ | ||
| 297 | echo -e "\n<!-- Ioctls -->") >>$@ | ||
| 298 | @( \ | ||
| 299 | for ident in $(IOCTLS) ; do \ | ||
| 300 | entity=`echo $$ident | tr _ -` ; \ | ||
| 301 | id=`grep "<refname>$$ident" $(MEDIA_OBJ_DIR)/vidioc-*.xml | sed -r s,"^.*/(.*).xml.*","\1",` ; \ | ||
| 302 | echo "<!ENTITY $$entity \"<link" \ | ||
| 303 | "linkend='$$id'><constant>$$ident</constant></link>\">" \ | ||
| 304 | >>$@ ; \ | ||
| 305 | done) | ||
| 306 | @( \ | ||
| 307 | echo -e "\n<!-- Types -->") >>$@ | ||
| 308 | @( \ | ||
| 309 | for ident in $(TYPES) ; do \ | ||
| 310 | entity=`echo $$ident | tr _ -` ; \ | ||
| 311 | echo "<!ENTITY $$entity \"<link" \ | ||
| 312 | "linkend='$$entity'>$$ident</link>\">" >>$@ ; \ | ||
| 313 | done) | ||
| 314 | @( \ | ||
| 315 | echo -e "\n<!-- Enums -->") >>$@ | ||
| 316 | @( \ | ||
| 317 | for ident in $(ENUMS) ; do \ | ||
| 318 | entity=`echo $$ident | sed -e "s/v4l2_mpeg_cx2341x_video_\([a-z]*_spatial_filter_type\)/\1/" | tr _ -` ; \ | ||
| 319 | echo "<!ENTITY $$entity \"enum <link" \ | ||
| 320 | "linkend='$$entity'>$$ident</link>\">" >>$@ ; \ | ||
| 321 | done) | ||
| 322 | @( \ | ||
| 323 | echo -e "\n<!-- Structures -->") >>$@ | ||
| 324 | @( \ | ||
| 325 | for ident in $(STRUCTS) ; do \ | ||
| 326 | entity=`echo $$ident | tr _ - | sed s/v4l2-mpeg-vbi-ITV0/v4l2-mpeg-vbi-itv0-1/g` ; \ | ||
| 327 | echo "<!ENTITY $$entity \"struct <link" \ | ||
| 328 | "linkend='$$entity'>$$ident</link>\">" >>$@ ; \ | ||
| 329 | done) | ||
| 330 | @( \ | ||
| 331 | echo -e "\n<!-- Error Codes -->") >>$@ | ||
| 332 | @( \ | ||
| 333 | for ident in $(ERRORS) ; do \ | ||
| 334 | echo "<!ENTITY $$ident \"<errorcode>$$ident</errorcode>" \ | ||
| 335 | "error code\">" >>$@ ; \ | ||
| 336 | done) | ||
| 337 | @( \ | ||
| 338 | echo -e "\n<!-- Subsections -->") >>$@ | ||
| 339 | @( \ | ||
| 340 | for file in $(MEDIA_SGMLS) ; do \ | ||
| 341 | entity=`echo "$$file" | sed $(FILENAME) -e s/"^([^-]*)"/sub\1/` ; \ | ||
| 342 | if ! echo "$$file" | \ | ||
| 343 | grep -q -E -e '^(func|vidioc|pixfmt)-' ; then \ | ||
| 344 | echo "<!ENTITY sub-$$entity SYSTEM \"$$file\">" >>$@ ; \ | ||
| 345 | fi ; \ | ||
| 346 | done) | ||
| 347 | @( \ | ||
| 348 | echo -e "\n<!-- Function Reference -->") >>$@ | ||
| 349 | @( \ | ||
| 350 | for file in $(MEDIA_SGMLS) ; do \ | ||
| 351 | if echo "$$file" | \ | ||
| 352 | grep -q -E -e '(func|vidioc|pixfmt)-' ; then \ | ||
| 353 | entity=`echo "$$file" |sed $(FILENAME)` ; \ | ||
| 354 | echo "<!ENTITY $$entity SYSTEM \"$$file\">" >>$@ ; \ | ||
| 355 | fi ; \ | ||
| 356 | done) | ||
| 357 | |||
| 358 | # Jade can auto-generate a list-of-tables, which includes all structs, | ||
| 359 | # but we only want data types, all types, and sorted please. | ||
| 360 | $(MEDIA_OBJ_DIR)/media-indices.tmpl: $(MEDIA_OBJ_DIR)/v4l2.xml | ||
| 361 | @$($(quiet)gen_xml) | ||
| 362 | @( \ | ||
| 363 | echo "<!-- Generated file! Do not edit. -->") >$@ | ||
| 364 | @( \ | ||
| 365 | echo -e "\n<index><title>List of Types</title>") >>$@ | ||
| 366 | @( \ | ||
| 367 | for ident in $(TYPES) ; do \ | ||
| 368 | id=`echo $$ident | tr _ -` ; \ | ||
| 369 | echo "<indexentry><primaryie><link" \ | ||
| 370 | "linkend='$$id'>$$ident</link></primaryie></indexentry>" >>$@ ; \ | ||
| 371 | done) | ||
| 372 | @( \ | ||
| 373 | for ident in $(ENUMS) ; do \ | ||
| 374 | id=`echo $$ident | sed -e "s/v4l2_mpeg_cx2341x_video_\([a-z]*_spatial_filter_type\)/\1/" | tr _ -`; \ | ||
| 375 | echo "<indexentry><primaryie>enum <link" \ | ||
| 376 | "linkend='$$id'>$$ident</link></primaryie></indexentry>" >>$@ ; \ | ||
| 377 | done) | ||
| 378 | @( \ | ||
| 379 | for ident in $(STRUCTS) ; do \ | ||
| 380 | id=`echo $$ident | tr _ - | sed s/v4l2-mpeg-vbi-ITV0/v4l2-mpeg-vbi-itv0-1/g` ; \ | ||
| 381 | echo "<indexentry><primaryie>struct <link" \ | ||
| 382 | "linkend='$$id'>$$ident</link></primaryie></indexentry>" >>$@ ; \ | ||
| 383 | done) | ||
| 384 | @( \ | ||
| 385 | echo "</index>") >>$@ | ||
| 386 | |||
diff --git a/Documentation/DocBook/media/bayer.png.b64 b/Documentation/DocBook/media/bayer.png.b64 new file mode 100644 index 000000000000..ccdf2bcda95c --- /dev/null +++ b/Documentation/DocBook/media/bayer.png.b64 | |||
| @@ -0,0 +1,171 @@ | |||
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diff --git a/Documentation/DocBook/dvb/.gitignore b/Documentation/DocBook/media/dvb/.gitignore index d7ec32eafac9..d7ec32eafac9 100644 --- a/Documentation/DocBook/dvb/.gitignore +++ b/Documentation/DocBook/media/dvb/.gitignore | |||
diff --git a/Documentation/DocBook/dvb/audio.xml b/Documentation/DocBook/media/dvb/audio.xml index eeb96b8a0864..d64386237207 100644 --- a/Documentation/DocBook/dvb/audio.xml +++ b/Documentation/DocBook/media/dvb/audio.xml | |||
| @@ -14,17 +14,17 @@ the omission of the audio and video device. | |||
| 14 | audio device. | 14 | audio device. |
| 15 | </para> | 15 | </para> |
| 16 | 16 | ||
| 17 | <section id="audio_stream_source_t"> | 17 | <section id="audio-stream-source-t"> |
| 18 | <title>audio_stream_source_t</title> | 18 | <title>audio_stream_source_t</title> |
| 19 | <para>The audio stream source is set through the AUDIO_SELECT_SOURCE call and can take | 19 | <para>The audio stream source is set through the AUDIO_SELECT_SOURCE call and can take |
| 20 | the following values, depending on whether we are replaying from an internal (demux) or | 20 | the following values, depending on whether we are replaying from an internal (demux) or |
| 21 | external (user write) source. | 21 | external (user write) source. |
| 22 | </para> | 22 | </para> |
| 23 | <programlisting> | 23 | <programlisting> |
| 24 | typedef enum { | 24 | typedef enum { |
| 25 | AUDIO_SOURCE_DEMUX, | 25 | AUDIO_SOURCE_DEMUX, |
| 26 | AUDIO_SOURCE_MEMORY | 26 | AUDIO_SOURCE_MEMORY |
| 27 | } audio_stream_source_t; | 27 | } audio_stream_source_t; |
| 28 | </programlisting> | 28 | </programlisting> |
| 29 | <para>AUDIO_SOURCE_DEMUX selects the demultiplexer (fed either by the frontend or the | 29 | <para>AUDIO_SOURCE_DEMUX selects the demultiplexer (fed either by the frontend or the |
| 30 | DVR device) as the source of the video stream. If AUDIO_SOURCE_MEMORY | 30 | DVR device) as the source of the video stream. If AUDIO_SOURCE_MEMORY |
| @@ -33,61 +33,64 @@ call. | |||
| 33 | </para> | 33 | </para> |
| 34 | 34 | ||
| 35 | </section> | 35 | </section> |
| 36 | <section id="audio_play_state_t"> | 36 | <section id="audio-play-state-t"> |
| 37 | <title>audio_play_state_t</title> | 37 | <title>audio_play_state_t</title> |
| 38 | <para>The following values can be returned by the AUDIO_GET_STATUS call representing the | 38 | <para>The following values can be returned by the AUDIO_GET_STATUS call representing the |
| 39 | state of audio playback. | 39 | state of audio playback. |
| 40 | </para> | 40 | </para> |
| 41 | <programlisting> | 41 | <programlisting> |
| 42 | typedef enum { | 42 | typedef enum { |
| 43 | AUDIO_STOPPED, | 43 | AUDIO_STOPPED, |
| 44 | AUDIO_PLAYING, | 44 | AUDIO_PLAYING, |
| 45 | AUDIO_PAUSED | 45 | AUDIO_PAUSED |
| 46 | } audio_play_state_t; | 46 | } audio_play_state_t; |
| 47 | </programlisting> | 47 | </programlisting> |
| 48 | 48 | ||
| 49 | </section> | 49 | </section> |
| 50 | <section id="audio_channel_select_t"> | 50 | <section id="audio-channel-select-t"> |
| 51 | <title>audio_channel_select_t</title> | 51 | <title>audio_channel_select_t</title> |
| 52 | <para>The audio channel selected via AUDIO_CHANNEL_SELECT is determined by the | 52 | <para>The audio channel selected via AUDIO_CHANNEL_SELECT is determined by the |
| 53 | following values. | 53 | following values. |
| 54 | </para> | 54 | </para> |
| 55 | <programlisting> | 55 | <programlisting> |
| 56 | typedef enum { | 56 | typedef enum { |
| 57 | AUDIO_STEREO, | 57 | AUDIO_STEREO, |
| 58 | AUDIO_MONO_LEFT, | 58 | AUDIO_MONO_LEFT, |
| 59 | AUDIO_MONO_RIGHT, | 59 | AUDIO_MONO_RIGHT, |
| 60 | } audio_channel_select_t; | 60 | AUDIO_MONO, |
| 61 | AUDIO_STEREO_SWAPPED | ||
| 62 | } audio_channel_select_t; | ||
| 61 | </programlisting> | 63 | </programlisting> |
| 62 | 64 | ||
| 63 | </section> | 65 | </section> |
| 64 | <section id="struct_audio_status"> | 66 | <section id="audio-status"> |
| 65 | <title>struct audio_status</title> | 67 | <title>struct audio_status</title> |
| 66 | <para>The AUDIO_GET_STATUS call returns the following structure informing about various | 68 | <para>The AUDIO_GET_STATUS call returns the following structure informing about various |
| 67 | states of the playback operation. | 69 | states of the playback operation. |
| 68 | </para> | 70 | </para> |
| 69 | <programlisting> | 71 | <programlisting> |
| 70 | typedef struct audio_status { | 72 | typedef struct audio_status { |
| 71 | boolean AV_sync_state; | 73 | boolean AV_sync_state; |
| 72 | boolean mute_state; | 74 | boolean mute_state; |
| 73 | audio_play_state_t play_state; | 75 | audio_play_state_t play_state; |
| 74 | audio_stream_source_t stream_source; | 76 | audio_stream_source_t stream_source; |
| 75 | audio_channel_select_t channel_select; | 77 | audio_channel_select_t channel_select; |
| 76 | boolean bypass_mode; | 78 | boolean bypass_mode; |
| 77 | } audio_status_t; | 79 | audio_mixer_t mixer_state; |
| 80 | } audio_status_t; | ||
| 78 | </programlisting> | 81 | </programlisting> |
| 79 | 82 | ||
| 80 | </section> | 83 | </section> |
| 81 | <section id="struct_audio_mixer"> | 84 | <section id="audio-mixer"> |
| 82 | <title>struct audio_mixer</title> | 85 | <title>struct audio_mixer</title> |
| 83 | <para>The following structure is used by the AUDIO_SET_MIXER call to set the audio | 86 | <para>The following structure is used by the AUDIO_SET_MIXER call to set the audio |
| 84 | volume. | 87 | volume. |
| 85 | </para> | 88 | </para> |
| 86 | <programlisting> | 89 | <programlisting> |
| 87 | typedef struct audio_mixer { | 90 | typedef struct audio_mixer { |
| 88 | unsigned int volume_left; | 91 | unsigned int volume_left; |
| 89 | unsigned int volume_right; | 92 | unsigned int volume_right; |
| 90 | } audio_mixer_t; | 93 | } audio_mixer_t; |
| 91 | </programlisting> | 94 | </programlisting> |
| 92 | 95 | ||
| 93 | </section> | 96 | </section> |
| @@ -109,17 +112,17 @@ bits set according to the hardwares capabilities. | |||
| 109 | </programlisting> | 112 | </programlisting> |
| 110 | 113 | ||
| 111 | </section> | 114 | </section> |
| 112 | <section id="struct_audio_karaoke"> | 115 | <section id="audio-karaoke"> |
| 113 | <title>struct audio_karaoke</title> | 116 | <title>struct audio_karaoke</title> |
| 114 | <para>The ioctl AUDIO_SET_KARAOKE uses the following format: | 117 | <para>The ioctl AUDIO_SET_KARAOKE uses the following format: |
| 115 | </para> | 118 | </para> |
| 116 | <programlisting> | 119 | <programlisting> |
| 117 | typedef | 120 | typedef |
| 118 | struct audio_karaoke{ | 121 | struct audio_karaoke { |
| 119 | int vocal1; | 122 | int vocal1; |
| 120 | int vocal2; | 123 | int vocal2; |
| 121 | int melody; | 124 | int melody; |
| 122 | } audio_karaoke_t; | 125 | } audio_karaoke_t; |
| 123 | </programlisting> | 126 | </programlisting> |
| 124 | <para>If Vocal1 or Vocal2 are non-zero, they get mixed into left and right t at 70% each. If both, | 127 | <para>If Vocal1 or Vocal2 are non-zero, they get mixed into left and right t at 70% each. If both, |
| 125 | Vocal1 and Vocal2 are non-zero, Vocal1 gets mixed into the left channel and Vocal2 into the | 128 | Vocal1 and Vocal2 are non-zero, Vocal1 gets mixed into the left channel and Vocal2 into the |
| @@ -128,7 +131,7 @@ and right. | |||
| 128 | </para> | 131 | </para> |
| 129 | 132 | ||
| 130 | </section> | 133 | </section> |
| 131 | <section id="audio_attributes"> | 134 | <section id="audio-attributes-t"> |
| 132 | <title>audio attributes</title> | 135 | <title>audio attributes</title> |
| 133 | <para>The following attributes can be set by a call to AUDIO_SET_ATTRIBUTES: | 136 | <para>The following attributes can be set by a call to AUDIO_SET_ATTRIBUTES: |
| 134 | </para> | 137 | </para> |
| @@ -217,8 +220,7 @@ and right. | |||
| 217 | <para>(blocking mode is the default)</para> | 220 | <para>(blocking mode is the default)</para> |
| 218 | </entry> | 221 | </entry> |
| 219 | </row></tbody></tgroup></informaltable> | 222 | </row></tbody></tgroup></informaltable> |
| 220 | <para>ERRORS | 223 | <para>RETURN VALUE</para> |
| 221 | </para> | ||
| 222 | <informaltable><tgroup cols="2"><tbody><row><entry | 224 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 223 | align="char"> | 225 | align="char"> |
| 224 | <para>ENODEV</para> | 226 | <para>ENODEV</para> |
| @@ -228,13 +230,6 @@ and right. | |||
| 228 | </entry> | 230 | </entry> |
| 229 | </row><row><entry | 231 | </row><row><entry |
| 230 | align="char"> | 232 | align="char"> |
| 231 | <para>EINTERNAL</para> | ||
| 232 | </entry><entry | ||
| 233 | align="char"> | ||
| 234 | <para>Internal error.</para> | ||
| 235 | </entry> | ||
| 236 | </row><row><entry | ||
| 237 | align="char"> | ||
| 238 | <para>EBUSY</para> | 233 | <para>EBUSY</para> |
| 239 | </entry><entry | 234 | </entry><entry |
| 240 | align="char"> | 235 | align="char"> |
| @@ -276,8 +271,7 @@ and right. | |||
| 276 | <para>File descriptor returned by a previous call to open().</para> | 271 | <para>File descriptor returned by a previous call to open().</para> |
| 277 | </entry> | 272 | </entry> |
| 278 | </row></tbody></tgroup></informaltable> | 273 | </row></tbody></tgroup></informaltable> |
| 279 | <para>ERRORS | 274 | <para>RETURN VALUE</para> |
| 280 | </para> | ||
| 281 | <informaltable><tgroup cols="2"><tbody><row><entry | 275 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 282 | align="char"> | 276 | align="char"> |
| 283 | <para>EBADF</para> | 277 | <para>EBADF</para> |
| @@ -332,8 +326,7 @@ and right. | |||
| 332 | <para>Size of buf.</para> | 326 | <para>Size of buf.</para> |
| 333 | </entry> | 327 | </entry> |
| 334 | </row></tbody></tgroup></informaltable> | 328 | </row></tbody></tgroup></informaltable> |
| 335 | <para>ERRORS | 329 | <para>RETURN VALUE</para> |
| 336 | </para> | ||
| 337 | <informaltable><tgroup cols="2"><tbody><row><entry | 330 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 338 | align="char"> | 331 | align="char"> |
| 339 | <para>EPERM</para> | 332 | <para>EPERM</para> |
| @@ -358,7 +351,7 @@ and right. | |||
| 358 | </entry> | 351 | </entry> |
| 359 | </row></tbody></tgroup></informaltable> | 352 | </row></tbody></tgroup></informaltable> |
| 360 | 353 | ||
| 361 | </section><section | 354 | </section><section id="AUDIO_STOP" |
| 362 | role="subsection"><title>AUDIO_STOP</title> | 355 | role="subsection"><title>AUDIO_STOP</title> |
| 363 | <para>DESCRIPTION | 356 | <para>DESCRIPTION |
| 364 | </para> | 357 | </para> |
| @@ -391,25 +384,9 @@ role="subsection"><title>AUDIO_STOP</title> | |||
| 391 | <para>Equals AUDIO_STOP for this command.</para> | 384 | <para>Equals AUDIO_STOP for this command.</para> |
| 392 | </entry> | 385 | </entry> |
| 393 | </row></tbody></tgroup></informaltable> | 386 | </row></tbody></tgroup></informaltable> |
| 394 | <para>ERRORS | 387 | &return-value-dvb; |
| 395 | </para> | ||
| 396 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 397 | align="char"> | ||
| 398 | <para>EBADF</para> | ||
| 399 | </entry><entry | ||
| 400 | align="char"> | ||
| 401 | <para>fd is not a valid open file descriptor</para> | ||
| 402 | </entry> | ||
| 403 | </row><row><entry | ||
| 404 | align="char"> | ||
| 405 | <para>EINTERNAL</para> | ||
| 406 | </entry><entry | ||
| 407 | align="char"> | ||
| 408 | <para>Internal error.</para> | ||
| 409 | </entry> | ||
| 410 | </row></tbody></tgroup></informaltable> | ||
| 411 | 388 | ||
| 412 | </section><section | 389 | </section><section id="AUDIO_PLAY" |
| 413 | role="subsection"><title>AUDIO_PLAY</title> | 390 | role="subsection"><title>AUDIO_PLAY</title> |
| 414 | <para>DESCRIPTION | 391 | <para>DESCRIPTION |
| 415 | </para> | 392 | </para> |
| @@ -443,25 +420,9 @@ role="subsection"><title>AUDIO_PLAY</title> | |||
| 443 | <para>Equals AUDIO_PLAY for this command.</para> | 420 | <para>Equals AUDIO_PLAY for this command.</para> |
| 444 | </entry> | 421 | </entry> |
| 445 | </row></tbody></tgroup></informaltable> | 422 | </row></tbody></tgroup></informaltable> |
| 446 | <para>ERRORS | 423 | &return-value-dvb; |
| 447 | </para> | ||
| 448 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 449 | align="char"> | ||
| 450 | <para>EBADF</para> | ||
| 451 | </entry><entry | ||
| 452 | align="char"> | ||
| 453 | <para>fd is not a valid open file descriptor</para> | ||
| 454 | </entry> | ||
| 455 | </row><row><entry | ||
| 456 | align="char"> | ||
| 457 | <para>EINTERNAL</para> | ||
| 458 | </entry><entry | ||
| 459 | align="char"> | ||
| 460 | <para>Internal error.</para> | ||
| 461 | </entry> | ||
| 462 | </row></tbody></tgroup></informaltable> | ||
| 463 | 424 | ||
| 464 | </section><section | 425 | </section><section id="AUDIO_PAUSE" |
| 465 | role="subsection"><title>AUDIO_PAUSE</title> | 426 | role="subsection"><title>AUDIO_PAUSE</title> |
| 466 | <para>DESCRIPTION | 427 | <para>DESCRIPTION |
| 467 | </para> | 428 | </para> |
| @@ -503,25 +464,49 @@ role="subsection"><title>AUDIO_PAUSE</title> | |||
| 503 | <para>Equals AUDIO_PAUSE for this command.</para> | 464 | <para>Equals AUDIO_PAUSE for this command.</para> |
| 504 | </entry> | 465 | </entry> |
| 505 | </row></tbody></tgroup></informaltable> | 466 | </row></tbody></tgroup></informaltable> |
| 506 | <para>ERRORS | 467 | &return-value-dvb; |
| 468 | |||
| 469 | </section><section id="AUDIO_CONTINUE" | ||
| 470 | role="subsection"><title>AUDIO_CONTINUE</title> | ||
| 471 | <para>DESCRIPTION | ||
| 472 | </para> | ||
| 473 | <informaltable><tgroup cols="1"><tbody><row><entry | ||
| 474 | align="char"> | ||
| 475 | <para>This ioctl restarts the decoding and playing process previously paused | ||
| 476 | with AUDIO_PAUSE command.</para> | ||
| 477 | </entry> | ||
| 478 | </row><row><entry | ||
| 479 | align="char"> | ||
| 480 | <para>It only works if the stream were previously stopped with AUDIO_PAUSE</para> | ||
| 481 | </entry> | ||
| 482 | </row></tbody></tgroup></informaltable> | ||
| 483 | <para>SYNOPSIS | ||
| 484 | </para> | ||
| 485 | <informaltable><tgroup cols="1"><tbody><row><entry | ||
| 486 | align="char"> | ||
| 487 | <para>int ioctl(int fd, int request = AUDIO_CONTINUE);</para> | ||
| 488 | </entry> | ||
| 489 | </row></tbody></tgroup></informaltable> | ||
| 490 | <para>PARAMETERS | ||
| 507 | </para> | 491 | </para> |
| 508 | <informaltable><tgroup cols="2"><tbody><row><entry | 492 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 509 | align="char"> | 493 | align="char"> |
| 510 | <para>EBADF</para> | 494 | <para>int fd</para> |
| 511 | </entry><entry | 495 | </entry><entry |
| 512 | align="char"> | 496 | align="char"> |
| 513 | <para>fd is not a valid open file descriptor.</para> | 497 | <para>File descriptor returned by a previous call to open().</para> |
| 514 | </entry> | 498 | </entry> |
| 515 | </row><row><entry | 499 | </row><row><entry |
| 516 | align="char"> | 500 | align="char"> |
| 517 | <para>EINTERNAL</para> | 501 | <para>int request</para> |
| 518 | </entry><entry | 502 | </entry><entry |
| 519 | align="char"> | 503 | align="char"> |
| 520 | <para>Internal error.</para> | 504 | <para>Equals AUDIO_CONTINUE for this command.</para> |
| 521 | </entry> | 505 | </entry> |
| 522 | </row></tbody></tgroup></informaltable> | 506 | </row></tbody></tgroup></informaltable> |
| 507 | &return-value-dvb; | ||
| 523 | 508 | ||
| 524 | </section><section | 509 | </section><section id="AUDIO_SELECT_SOURCE" |
| 525 | role="subsection"><title>AUDIO_SELECT_SOURCE</title> | 510 | role="subsection"><title>AUDIO_SELECT_SOURCE</title> |
| 526 | <para>DESCRIPTION | 511 | <para>DESCRIPTION |
| 527 | </para> | 512 | </para> |
| @@ -567,32 +552,9 @@ role="subsection"><title>AUDIO_SELECT_SOURCE</title> | |||
| 567 | stream.</para> | 552 | stream.</para> |
| 568 | </entry> | 553 | </entry> |
| 569 | </row></tbody></tgroup></informaltable> | 554 | </row></tbody></tgroup></informaltable> |
| 570 | <para>ERRORS | 555 | &return-value-dvb; |
| 571 | </para> | ||
| 572 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 573 | align="char"> | ||
| 574 | <para>EBADF</para> | ||
| 575 | </entry><entry | ||
| 576 | align="char"> | ||
| 577 | <para>fd is not a valid open file descriptor.</para> | ||
| 578 | </entry> | ||
| 579 | </row><row><entry | ||
| 580 | align="char"> | ||
| 581 | <para>EINTERNAL</para> | ||
| 582 | </entry><entry | ||
| 583 | align="char"> | ||
| 584 | <para>Internal error.</para> | ||
| 585 | </entry> | ||
| 586 | </row><row><entry | ||
| 587 | align="char"> | ||
| 588 | <para>EINVAL</para> | ||
| 589 | </entry><entry | ||
| 590 | align="char"> | ||
| 591 | <para>Illegal input parameter.</para> | ||
| 592 | </entry> | ||
| 593 | </row></tbody></tgroup></informaltable> | ||
| 594 | 556 | ||
| 595 | </section><section | 557 | </section><section id="AUDIO_SET_MUTE" |
| 596 | role="subsection"><title>AUDIO_SET_MUTE</title> | 558 | role="subsection"><title>AUDIO_SET_MUTE</title> |
| 597 | <para>DESCRIPTION | 559 | <para>DESCRIPTION |
| 598 | </para> | 560 | </para> |
| @@ -646,32 +608,9 @@ role="subsection"><title>AUDIO_SET_MUTE</title> | |||
| 646 | <para>FALSE Audio Un-mute</para> | 608 | <para>FALSE Audio Un-mute</para> |
| 647 | </entry> | 609 | </entry> |
| 648 | </row></tbody></tgroup></informaltable> | 610 | </row></tbody></tgroup></informaltable> |
| 649 | <para>ERRORS | 611 | &return-value-dvb; |
| 650 | </para> | ||
| 651 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 652 | align="char"> | ||
| 653 | <para>EBADF</para> | ||
| 654 | </entry><entry | ||
| 655 | align="char"> | ||
| 656 | <para>fd is not a valid open file descriptor.</para> | ||
| 657 | </entry> | ||
| 658 | </row><row><entry | ||
| 659 | align="char"> | ||
| 660 | <para>EINTERNAL</para> | ||
| 661 | </entry><entry | ||
| 662 | align="char"> | ||
| 663 | <para>Internal error.</para> | ||
| 664 | </entry> | ||
| 665 | </row><row><entry | ||
| 666 | align="char"> | ||
| 667 | <para>EINVAL</para> | ||
| 668 | </entry><entry | ||
| 669 | align="char"> | ||
| 670 | <para>Illegal input parameter.</para> | ||
| 671 | </entry> | ||
| 672 | </row></tbody></tgroup></informaltable> | ||
| 673 | 612 | ||
| 674 | </section><section | 613 | </section><section id="AUDIO_SET_AV_SYNC" |
| 675 | role="subsection"><title>AUDIO_SET_AV_SYNC</title> | 614 | role="subsection"><title>AUDIO_SET_AV_SYNC</title> |
| 676 | <para>DESCRIPTION | 615 | <para>DESCRIPTION |
| 677 | </para> | 616 | </para> |
| @@ -725,32 +664,9 @@ role="subsection"><title>AUDIO_SET_AV_SYNC</title> | |||
| 725 | <para>FALSE AV-sync OFF</para> | 664 | <para>FALSE AV-sync OFF</para> |
| 726 | </entry> | 665 | </entry> |
| 727 | </row></tbody></tgroup></informaltable> | 666 | </row></tbody></tgroup></informaltable> |
| 728 | <para>ERRORS | 667 | &return-value-dvb; |
| 729 | </para> | ||
| 730 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 731 | align="char"> | ||
| 732 | <para>EBADF</para> | ||
| 733 | </entry><entry | ||
| 734 | align="char"> | ||
| 735 | <para>fd is not a valid open file descriptor.</para> | ||
| 736 | </entry> | ||
| 737 | </row><row><entry | ||
| 738 | align="char"> | ||
| 739 | <para>EINTERNAL</para> | ||
| 740 | </entry><entry | ||
| 741 | align="char"> | ||
| 742 | <para>Internal error.</para> | ||
| 743 | </entry> | ||
| 744 | </row><row><entry | ||
| 745 | align="char"> | ||
| 746 | <para>EINVAL</para> | ||
| 747 | </entry><entry | ||
| 748 | align="char"> | ||
| 749 | <para>Illegal input parameter.</para> | ||
| 750 | </entry> | ||
| 751 | </row></tbody></tgroup></informaltable> | ||
| 752 | 668 | ||
| 753 | </section><section | 669 | </section><section id="AUDIO_SET_BYPASS_MODE" |
| 754 | role="subsection"><title>AUDIO_SET_BYPASS_MODE</title> | 670 | role="subsection"><title>AUDIO_SET_BYPASS_MODE</title> |
| 755 | <para>DESCRIPTION | 671 | <para>DESCRIPTION |
| 756 | </para> | 672 | </para> |
| @@ -808,32 +724,9 @@ role="subsection"><title>AUDIO_SET_BYPASS_MODE</title> | |||
| 808 | <para>FALSE Bypass is enabled</para> | 724 | <para>FALSE Bypass is enabled</para> |
| 809 | </entry> | 725 | </entry> |
| 810 | </row></tbody></tgroup></informaltable> | 726 | </row></tbody></tgroup></informaltable> |
| 811 | <para>ERRORS | 727 | &return-value-dvb; |
| 812 | </para> | ||
| 813 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 814 | align="char"> | ||
| 815 | <para>EBADF</para> | ||
| 816 | </entry><entry | ||
| 817 | align="char"> | ||
| 818 | <para>fd is not a valid open file descriptor.</para> | ||
| 819 | </entry> | ||
| 820 | </row><row><entry | ||
| 821 | align="char"> | ||
| 822 | <para>EINTERNAL</para> | ||
| 823 | </entry><entry | ||
| 824 | align="char"> | ||
| 825 | <para>Internal error.</para> | ||
| 826 | </entry> | ||
| 827 | </row><row><entry | ||
| 828 | align="char"> | ||
| 829 | <para>EINVAL</para> | ||
| 830 | </entry><entry | ||
| 831 | align="char"> | ||
| 832 | <para>Illegal input parameter.</para> | ||
| 833 | </entry> | ||
| 834 | </row></tbody></tgroup></informaltable> | ||
| 835 | 728 | ||
| 836 | </section><section | 729 | </section><section id="AUDIO_CHANNEL_SELECT" |
| 837 | role="subsection"><title>AUDIO_CHANNEL_SELECT</title> | 730 | role="subsection"><title>AUDIO_CHANNEL_SELECT</title> |
| 838 | <para>DESCRIPTION | 731 | <para>DESCRIPTION |
| 839 | </para> | 732 | </para> |
| @@ -877,32 +770,9 @@ role="subsection"><title>AUDIO_CHANNEL_SELECT</title> | |||
| 877 | stereo).</para> | 770 | stereo).</para> |
| 878 | </entry> | 771 | </entry> |
| 879 | </row></tbody></tgroup></informaltable> | 772 | </row></tbody></tgroup></informaltable> |
| 880 | <para>ERRORS | 773 | &return-value-dvb; |
| 881 | </para> | ||
| 882 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 883 | align="char"> | ||
| 884 | <para>EBADF</para> | ||
| 885 | </entry><entry | ||
| 886 | align="char"> | ||
| 887 | <para>fd is not a valid open file descriptor.</para> | ||
| 888 | </entry> | ||
| 889 | </row><row><entry | ||
| 890 | align="char"> | ||
| 891 | <para>EINTERNAL</para> | ||
| 892 | </entry><entry | ||
| 893 | align="char"> | ||
| 894 | <para>Internal error.</para> | ||
| 895 | </entry> | ||
| 896 | </row><row><entry | ||
| 897 | align="char"> | ||
| 898 | <para>EINVAL</para> | ||
| 899 | </entry><entry | ||
| 900 | align="char"> | ||
| 901 | <para>Illegal input parameter ch.</para> | ||
| 902 | </entry> | ||
| 903 | </row></tbody></tgroup></informaltable> | ||
| 904 | 774 | ||
| 905 | </section><section | 775 | </section><section id="AUDIO_GET_STATUS" |
| 906 | role="subsection"><title>AUDIO_GET_STATUS</title> | 776 | role="subsection"><title>AUDIO_GET_STATUS</title> |
| 907 | <para>DESCRIPTION | 777 | <para>DESCRIPTION |
| 908 | </para> | 778 | </para> |
| @@ -945,32 +815,9 @@ role="subsection"><title>AUDIO_GET_STATUS</title> | |||
| 945 | <para>Returns the current state of Audio Device.</para> | 815 | <para>Returns the current state of Audio Device.</para> |
| 946 | </entry> | 816 | </entry> |
| 947 | </row></tbody></tgroup></informaltable> | 817 | </row></tbody></tgroup></informaltable> |
| 948 | <para>ERRORS | 818 | &return-value-dvb; |
| 949 | </para> | ||
| 950 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 951 | align="char"> | ||
| 952 | <para>EBADF</para> | ||
| 953 | </entry><entry | ||
| 954 | align="char"> | ||
| 955 | <para>fd is not a valid open file descriptor.</para> | ||
| 956 | </entry> | ||
| 957 | </row><row><entry | ||
| 958 | align="char"> | ||
| 959 | <para>EINTERNAL</para> | ||
| 960 | </entry><entry | ||
| 961 | align="char"> | ||
| 962 | <para>Internal error.</para> | ||
| 963 | </entry> | ||
| 964 | </row><row><entry | ||
| 965 | align="char"> | ||
| 966 | <para>EFAULT</para> | ||
| 967 | </entry><entry | ||
| 968 | align="char"> | ||
| 969 | <para>status points to invalid address.</para> | ||
| 970 | </entry> | ||
| 971 | </row></tbody></tgroup></informaltable> | ||
| 972 | 819 | ||
| 973 | </section><section | 820 | </section><section id="AUDIO_GET_CAPABILITIES" |
| 974 | role="subsection"><title>AUDIO_GET_CAPABILITIES</title> | 821 | role="subsection"><title>AUDIO_GET_CAPABILITIES</title> |
| 975 | <para>DESCRIPTION | 822 | <para>DESCRIPTION |
| 976 | </para> | 823 | </para> |
| @@ -1013,32 +860,9 @@ role="subsection"><title>AUDIO_GET_CAPABILITIES</title> | |||
| 1013 | <para>Returns a bit array of supported sound formats.</para> | 860 | <para>Returns a bit array of supported sound formats.</para> |
| 1014 | </entry> | 861 | </entry> |
| 1015 | </row></tbody></tgroup></informaltable> | 862 | </row></tbody></tgroup></informaltable> |
| 1016 | <para>ERRORS | 863 | &return-value-dvb; |
| 1017 | </para> | ||
| 1018 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 1019 | align="char"> | ||
| 1020 | <para>EBADF</para> | ||
| 1021 | </entry><entry | ||
| 1022 | align="char"> | ||
| 1023 | <para>fd is not a valid open file descriptor.</para> | ||
| 1024 | </entry> | ||
| 1025 | </row><row><entry | ||
| 1026 | align="char"> | ||
| 1027 | <para>EINTERNAL</para> | ||
| 1028 | </entry><entry | ||
| 1029 | align="char"> | ||
| 1030 | <para>Internal error.</para> | ||
| 1031 | </entry> | ||
| 1032 | </row><row><entry | ||
| 1033 | align="char"> | ||
| 1034 | <para>EFAULT</para> | ||
| 1035 | </entry><entry | ||
| 1036 | align="char"> | ||
| 1037 | <para>cap points to an invalid address.</para> | ||
| 1038 | </entry> | ||
| 1039 | </row></tbody></tgroup></informaltable> | ||
| 1040 | 864 | ||
| 1041 | </section><section | 865 | </section><section id="AUDIO_CLEAR_BUFFER" |
| 1042 | role="subsection"><title>AUDIO_CLEAR_BUFFER</title> | 866 | role="subsection"><title>AUDIO_CLEAR_BUFFER</title> |
| 1043 | <para>DESCRIPTION | 867 | <para>DESCRIPTION |
| 1044 | </para> | 868 | </para> |
| @@ -1072,25 +896,9 @@ role="subsection"><title>AUDIO_CLEAR_BUFFER</title> | |||
| 1072 | <para>Equals AUDIO_CLEAR_BUFFER for this command.</para> | 896 | <para>Equals AUDIO_CLEAR_BUFFER for this command.</para> |
| 1073 | </entry> | 897 | </entry> |
| 1074 | </row></tbody></tgroup></informaltable> | 898 | </row></tbody></tgroup></informaltable> |
| 1075 | <para>ERRORS | 899 | &return-value-dvb; |
| 1076 | </para> | ||
| 1077 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 1078 | align="char"> | ||
| 1079 | <para>EBADF</para> | ||
| 1080 | </entry><entry | ||
| 1081 | align="char"> | ||
| 1082 | <para>fd is not a valid open file descriptor.</para> | ||
| 1083 | </entry> | ||
| 1084 | </row><row><entry | ||
| 1085 | align="char"> | ||
| 1086 | <para>EINTERNAL</para> | ||
| 1087 | </entry><entry | ||
| 1088 | align="char"> | ||
| 1089 | <para>Internal error.</para> | ||
| 1090 | </entry> | ||
| 1091 | </row></tbody></tgroup></informaltable> | ||
| 1092 | 900 | ||
| 1093 | </section><section | 901 | </section><section id="AUDIO_SET_ID" |
| 1094 | role="subsection"><title>AUDIO_SET_ID</title> | 902 | role="subsection"><title>AUDIO_SET_ID</title> |
| 1095 | <para>DESCRIPTION | 903 | <para>DESCRIPTION |
| 1096 | </para> | 904 | </para> |
| @@ -1136,32 +944,9 @@ role="subsection"><title>AUDIO_SET_ID</title> | |||
| 1136 | <para>audio sub-stream id</para> | 944 | <para>audio sub-stream id</para> |
| 1137 | </entry> | 945 | </entry> |
| 1138 | </row></tbody></tgroup></informaltable> | 946 | </row></tbody></tgroup></informaltable> |
| 1139 | <para>ERRORS | 947 | &return-value-dvb; |
| 1140 | </para> | ||
| 1141 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 1142 | align="char"> | ||
| 1143 | <para>EBADF</para> | ||
| 1144 | </entry><entry | ||
| 1145 | align="char"> | ||
| 1146 | <para>fd is not a valid open file descriptor.</para> | ||
| 1147 | </entry> | ||
| 1148 | </row><row><entry | ||
| 1149 | align="char"> | ||
| 1150 | <para>EINTERNAL</para> | ||
| 1151 | </entry><entry | ||
| 1152 | align="char"> | ||
| 1153 | <para>Internal error.</para> | ||
| 1154 | </entry> | ||
| 1155 | </row><row><entry | ||
| 1156 | align="char"> | ||
| 1157 | <para>EINVAL</para> | ||
| 1158 | </entry><entry | ||
| 1159 | align="char"> | ||
| 1160 | <para>Invalid sub-stream id.</para> | ||
| 1161 | </entry> | ||
| 1162 | </row></tbody></tgroup></informaltable> | ||
| 1163 | 948 | ||
| 1164 | </section><section | 949 | </section><section id="AUDIO_SET_MIXER" |
| 1165 | role="subsection"><title>AUDIO_SET_MIXER</title> | 950 | role="subsection"><title>AUDIO_SET_MIXER</title> |
| 1166 | <para>DESCRIPTION | 951 | <para>DESCRIPTION |
| 1167 | </para> | 952 | </para> |
| @@ -1202,32 +987,9 @@ role="subsection"><title>AUDIO_SET_MIXER</title> | |||
| 1202 | <para>mixer settings.</para> | 987 | <para>mixer settings.</para> |
| 1203 | </entry> | 988 | </entry> |
| 1204 | </row></tbody></tgroup></informaltable> | 989 | </row></tbody></tgroup></informaltable> |
| 1205 | <para>ERRORS | 990 | &return-value-dvb; |
| 1206 | </para> | ||
| 1207 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 1208 | align="char"> | ||
| 1209 | <para>EBADF</para> | ||
| 1210 | </entry><entry | ||
| 1211 | align="char"> | ||
| 1212 | <para>fd is not a valid open file descriptor.</para> | ||
| 1213 | </entry> | ||
| 1214 | </row><row><entry | ||
| 1215 | align="char"> | ||
| 1216 | <para>EINTERNAL</para> | ||
| 1217 | </entry><entry | ||
| 1218 | align="char"> | ||
| 1219 | <para>Internal error.</para> | ||
| 1220 | </entry> | ||
| 1221 | </row><row><entry | ||
| 1222 | align="char"> | ||
| 1223 | <para>EFAULT</para> | ||
| 1224 | </entry><entry | ||
| 1225 | align="char"> | ||
| 1226 | <para>mix points to an invalid address.</para> | ||
| 1227 | </entry> | ||
| 1228 | </row></tbody></tgroup></informaltable> | ||
| 1229 | 991 | ||
| 1230 | </section><section | 992 | </section><section id="AUDIO_SET_STREAMTYPE" |
| 1231 | role="subsection"><title>AUDIO_SET_STREAMTYPE</title> | 993 | role="subsection"><title>AUDIO_SET_STREAMTYPE</title> |
| 1232 | <para>DESCRIPTION | 994 | <para>DESCRIPTION |
| 1233 | </para> | 995 | </para> |
| @@ -1270,17 +1032,9 @@ role="subsection"><title>AUDIO_SET_STREAMTYPE</title> | |||
| 1270 | <para>stream type</para> | 1032 | <para>stream type</para> |
| 1271 | </entry> | 1033 | </entry> |
| 1272 | </row></tbody></tgroup></informaltable> | 1034 | </row></tbody></tgroup></informaltable> |
| 1273 | <para>ERRORS | 1035 | &return-value-dvb; |
| 1274 | </para> | ||
| 1275 | <informaltable><tgroup cols="2"><tbody><row><entry | 1036 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 1276 | align="char"> | 1037 | align="char"> |
| 1277 | <para>EBADF</para> | ||
| 1278 | </entry><entry | ||
| 1279 | align="char"> | ||
| 1280 | <para>fd is not a valid open file descriptor</para> | ||
| 1281 | </entry> | ||
| 1282 | </row><row><entry | ||
| 1283 | align="char"> | ||
| 1284 | <para>EINVAL</para> | 1038 | <para>EINVAL</para> |
| 1285 | </entry><entry | 1039 | </entry><entry |
| 1286 | align="char"> | 1040 | align="char"> |
| @@ -1288,7 +1042,7 @@ role="subsection"><title>AUDIO_SET_STREAMTYPE</title> | |||
| 1288 | </entry> | 1042 | </entry> |
| 1289 | </row></tbody></tgroup></informaltable> | 1043 | </row></tbody></tgroup></informaltable> |
| 1290 | 1044 | ||
| 1291 | </section><section | 1045 | </section><section id="AUDIO_SET_EXT_ID" |
| 1292 | role="subsection"><title>AUDIO_SET_EXT_ID</title> | 1046 | role="subsection"><title>AUDIO_SET_EXT_ID</title> |
| 1293 | <para>DESCRIPTION | 1047 | <para>DESCRIPTION |
| 1294 | </para> | 1048 | </para> |
| @@ -1330,17 +1084,9 @@ role="subsection"><title>AUDIO_SET_EXT_ID</title> | |||
| 1330 | <para>audio sub_stream_id</para> | 1084 | <para>audio sub_stream_id</para> |
| 1331 | </entry> | 1085 | </entry> |
| 1332 | </row></tbody></tgroup></informaltable> | 1086 | </row></tbody></tgroup></informaltable> |
| 1333 | <para>ERRORS | 1087 | &return-value-dvb; |
| 1334 | </para> | ||
| 1335 | <informaltable><tgroup cols="2"><tbody><row><entry | 1088 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 1336 | align="char"> | 1089 | align="char"> |
| 1337 | <para>EBADF</para> | ||
| 1338 | </entry><entry | ||
| 1339 | align="char"> | ||
| 1340 | <para>fd is not a valid open file descriptor</para> | ||
| 1341 | </entry> | ||
| 1342 | </row><row><entry | ||
| 1343 | align="char"> | ||
| 1344 | <para>EINVAL</para> | 1090 | <para>EINVAL</para> |
| 1345 | </entry><entry | 1091 | </entry><entry |
| 1346 | align="char"> | 1092 | align="char"> |
| @@ -1348,7 +1094,7 @@ role="subsection"><title>AUDIO_SET_EXT_ID</title> | |||
| 1348 | </entry> | 1094 | </entry> |
| 1349 | </row></tbody></tgroup></informaltable> | 1095 | </row></tbody></tgroup></informaltable> |
| 1350 | 1096 | ||
| 1351 | </section><section | 1097 | </section><section id="AUDIO_SET_ATTRIBUTES" |
| 1352 | role="subsection"><title>AUDIO_SET_ATTRIBUTES</title> | 1098 | role="subsection"><title>AUDIO_SET_ATTRIBUTES</title> |
| 1353 | <para>DESCRIPTION | 1099 | <para>DESCRIPTION |
| 1354 | </para> | 1100 | </para> |
| @@ -1391,17 +1137,9 @@ role="subsection"><title>AUDIO_SET_ATTRIBUTES</title> | |||
| 1391 | <para>audio attributes according to section ??</para> | 1137 | <para>audio attributes according to section ??</para> |
| 1392 | </entry> | 1138 | </entry> |
| 1393 | </row></tbody></tgroup></informaltable> | 1139 | </row></tbody></tgroup></informaltable> |
| 1394 | <para>ERRORS | 1140 | &return-value-dvb; |
| 1395 | </para> | ||
| 1396 | <informaltable><tgroup cols="2"><tbody><row><entry | 1141 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 1397 | align="char"> | 1142 | align="char"> |
| 1398 | <para>EBADF</para> | ||
| 1399 | </entry><entry | ||
| 1400 | align="char"> | ||
| 1401 | <para>fd is not a valid open file descriptor</para> | ||
| 1402 | </entry> | ||
| 1403 | </row><row><entry | ||
| 1404 | align="char"> | ||
| 1405 | <para>EINVAL</para> | 1143 | <para>EINVAL</para> |
| 1406 | </entry><entry | 1144 | </entry><entry |
| 1407 | align="char"> | 1145 | align="char"> |
| @@ -1409,7 +1147,7 @@ role="subsection"><title>AUDIO_SET_ATTRIBUTES</title> | |||
| 1409 | </entry> | 1147 | </entry> |
| 1410 | </row></tbody></tgroup></informaltable> | 1148 | </row></tbody></tgroup></informaltable> |
| 1411 | 1149 | ||
| 1412 | </section><section | 1150 | </section><section id="AUDIO_SET_KARAOKE" |
| 1413 | role="subsection"><title>AUDIO_SET_KARAOKE</title> | 1151 | role="subsection"><title>AUDIO_SET_KARAOKE</title> |
| 1414 | <para>DESCRIPTION | 1152 | <para>DESCRIPTION |
| 1415 | </para> | 1153 | </para> |
| @@ -1422,7 +1160,7 @@ role="subsection"><title>AUDIO_SET_KARAOKE</title> | |||
| 1422 | </para> | 1160 | </para> |
| 1423 | <informaltable><tgroup cols="1"><tbody><row><entry | 1161 | <informaltable><tgroup cols="1"><tbody><row><entry |
| 1424 | align="char"> | 1162 | align="char"> |
| 1425 | <para>int ioctl(fd, int request = AUDIO_SET_STREAMTYPE, | 1163 | <para>int ioctl(fd, int request = AUDIO_SET_KARAOKE, |
| 1426 | audio_karaoke_t ⋆karaoke);</para> | 1164 | audio_karaoke_t ⋆karaoke);</para> |
| 1427 | </entry> | 1165 | </entry> |
| 1428 | </row></tbody></tgroup></informaltable> | 1166 | </row></tbody></tgroup></informaltable> |
| @@ -1440,7 +1178,7 @@ role="subsection"><title>AUDIO_SET_KARAOKE</title> | |||
| 1440 | <para>int request</para> | 1178 | <para>int request</para> |
| 1441 | </entry><entry | 1179 | </entry><entry |
| 1442 | align="char"> | 1180 | align="char"> |
| 1443 | <para>Equals AUDIO_SET_STREAMTYPE for this | 1181 | <para>Equals AUDIO_SET_KARAOKE for this |
| 1444 | command.</para> | 1182 | command.</para> |
| 1445 | </entry> | 1183 | </entry> |
| 1446 | </row><row><entry | 1184 | </row><row><entry |
| @@ -1452,17 +1190,9 @@ role="subsection"><title>AUDIO_SET_KARAOKE</title> | |||
| 1452 | <para>karaoke settings according to section ??.</para> | 1190 | <para>karaoke settings according to section ??.</para> |
| 1453 | </entry> | 1191 | </entry> |
| 1454 | </row></tbody></tgroup></informaltable> | 1192 | </row></tbody></tgroup></informaltable> |
| 1455 | <para>ERRORS | 1193 | &return-value-dvb; |
| 1456 | </para> | ||
| 1457 | <informaltable><tgroup cols="2"><tbody><row><entry | 1194 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 1458 | align="char"> | 1195 | align="char"> |
| 1459 | <para>EBADF</para> | ||
| 1460 | </entry><entry | ||
| 1461 | align="char"> | ||
| 1462 | <para>fd is not a valid open file descriptor</para> | ||
| 1463 | </entry> | ||
| 1464 | </row><row><entry | ||
| 1465 | align="char"> | ||
| 1466 | <para>EINVAL</para> | 1196 | <para>EINVAL</para> |
| 1467 | </entry><entry | 1197 | </entry><entry |
| 1468 | align="char"> | 1198 | align="char"> |
diff --git a/Documentation/DocBook/dvb/ca.xml b/Documentation/DocBook/media/dvb/ca.xml index b1f1d2fad654..5c4adb44b1c1 100644 --- a/Documentation/DocBook/dvb/ca.xml +++ b/Documentation/DocBook/media/dvb/ca.xml | |||
| @@ -8,75 +8,85 @@ including <emphasis role="tt">linux/dvb/ca.h</emphasis> in your application. | |||
| 8 | <title>CA Data Types</title> | 8 | <title>CA Data Types</title> |
| 9 | 9 | ||
| 10 | 10 | ||
| 11 | <section id="ca_slot_info_t"> | 11 | <section id="ca-slot-info"> |
| 12 | <title>ca_slot_info_t</title> | 12 | <title>ca_slot_info_t</title> |
| 13 | <programlisting> | 13 | <programlisting> |
| 14 | /⋆ slot interface types and info ⋆/ | 14 | typedef struct ca_slot_info { |
| 15 | int num; /⋆ slot number ⋆/ | ||
| 15 | 16 | ||
| 16 | typedef struct ca_slot_info_s { | 17 | int type; /⋆ CA interface this slot supports ⋆/ |
| 17 | int num; /⋆ slot number ⋆/ | 18 | #define CA_CI 1 /⋆ CI high level interface ⋆/ |
| 19 | #define CA_CI_LINK 2 /⋆ CI link layer level interface ⋆/ | ||
| 20 | #define CA_CI_PHYS 4 /⋆ CI physical layer level interface ⋆/ | ||
| 21 | #define CA_DESCR 8 /⋆ built-in descrambler ⋆/ | ||
| 22 | #define CA_SC 128 /⋆ simple smart card interface ⋆/ | ||
| 18 | 23 | ||
| 19 | int type; /⋆ CA interface this slot supports ⋆/ | 24 | unsigned int flags; |
| 20 | #define CA_CI 1 /⋆ CI high level interface ⋆/ | 25 | #define CA_CI_MODULE_PRESENT 1 /⋆ module (or card) inserted ⋆/ |
| 21 | #define CA_CI_LINK 2 /⋆ CI link layer level interface ⋆/ | 26 | #define CA_CI_MODULE_READY 2 |
| 22 | #define CA_CI_PHYS 4 /⋆ CI physical layer level interface ⋆/ | 27 | } ca_slot_info_t; |
| 23 | #define CA_SC 128 /⋆ simple smart card interface ⋆/ | ||
| 24 | |||
| 25 | unsigned int flags; | ||
| 26 | #define CA_CI_MODULE_PRESENT 1 /⋆ module (or card) inserted ⋆/ | ||
| 27 | #define CA_CI_MODULE_READY 2 | ||
| 28 | } ca_slot_info_t; | ||
| 29 | </programlisting> | 28 | </programlisting> |
| 30 | 29 | ||
| 31 | </section> | 30 | </section> |
| 32 | <section id="ca_descr_info_t"> | 31 | <section id="ca-descr-info"> |
| 33 | <title>ca_descr_info_t</title> | 32 | <title>ca_descr_info_t</title> |
| 34 | <programlisting> | 33 | <programlisting> |
| 35 | typedef struct ca_descr_info_s { | 34 | typedef struct ca_descr_info { |
| 36 | unsigned int num; /⋆ number of available descramblers (keys) ⋆/ | 35 | unsigned int num; /⋆ number of available descramblers (keys) ⋆/ |
| 37 | unsigned int type; /⋆ type of supported scrambling system ⋆/ | 36 | unsigned int type; /⋆ type of supported scrambling system ⋆/ |
| 38 | #define CA_ECD 1 | 37 | #define CA_ECD 1 |
| 39 | #define CA_NDS 2 | 38 | #define CA_NDS 2 |
| 40 | #define CA_DSS 4 | 39 | #define CA_DSS 4 |
| 41 | } ca_descr_info_t; | 40 | } ca_descr_info_t; |
| 42 | </programlisting> | 41 | </programlisting> |
| 43 | 42 | ||
| 44 | </section> | 43 | </section> |
| 45 | <section id="ca_cap_t"> | 44 | <section id="ca-caps"> |
| 46 | <title>ca_cap_t</title> | 45 | <title>ca_caps_t</title> |
| 47 | <programlisting> | 46 | <programlisting> |
| 48 | typedef struct ca_cap_s { | 47 | typedef struct ca_caps { |
| 49 | unsigned int slot_num; /⋆ total number of CA card and module slots ⋆/ | 48 | unsigned int slot_num; /⋆ total number of CA card and module slots ⋆/ |
| 50 | unsigned int slot_type; /⋆ OR of all supported types ⋆/ | 49 | unsigned int slot_type; /⋆ OR of all supported types ⋆/ |
| 51 | unsigned int descr_num; /⋆ total number of descrambler slots (keys) ⋆/ | 50 | unsigned int descr_num; /⋆ total number of descrambler slots (keys) ⋆/ |
| 52 | unsigned int descr_type;/⋆ OR of all supported types ⋆/ | 51 | unsigned int descr_type;/⋆ OR of all supported types ⋆/ |
| 53 | } ca_cap_t; | 52 | } ca_cap_t; |
| 54 | </programlisting> | 53 | </programlisting> |
| 55 | 54 | ||
| 56 | </section> | 55 | </section> |
| 57 | <section id="ca_msg_t"> | 56 | <section id="ca-msg"> |
| 58 | <title>ca_msg_t</title> | 57 | <title>ca_msg_t</title> |
| 59 | <programlisting> | 58 | <programlisting> |
| 60 | /⋆ a message to/from a CI-CAM ⋆/ | 59 | /⋆ a message to/from a CI-CAM ⋆/ |
| 61 | typedef struct ca_msg_s { | 60 | typedef struct ca_msg { |
| 62 | unsigned int index; | 61 | unsigned int index; |
| 63 | unsigned int type; | 62 | unsigned int type; |
| 64 | unsigned int length; | 63 | unsigned int length; |
| 65 | unsigned char msg[256]; | 64 | unsigned char msg[256]; |
| 66 | } ca_msg_t; | 65 | } ca_msg_t; |
| 67 | </programlisting> | 66 | </programlisting> |
| 68 | 67 | ||
| 69 | </section> | 68 | </section> |
| 70 | <section id="ca_descr_t"> | 69 | <section id="ca-descr"> |
| 71 | <title>ca_descr_t</title> | 70 | <title>ca_descr_t</title> |
| 72 | <programlisting> | 71 | <programlisting> |
| 73 | typedef struct ca_descr_s { | 72 | typedef struct ca_descr { |
| 74 | unsigned int index; | 73 | unsigned int index; |
| 75 | unsigned int parity; | 74 | unsigned int parity; |
| 76 | unsigned char cw[8]; | 75 | unsigned char cw[8]; |
| 77 | } ca_descr_t; | 76 | } ca_descr_t; |
| 78 | </programlisting> | 77 | </programlisting> |
| 79 | </section></section> | 78 | </section> |
| 79 | |||
| 80 | <section id="ca-pid"> | ||
| 81 | <title>ca-pid</title> | ||
| 82 | <programlisting> | ||
| 83 | typedef struct ca_pid { | ||
| 84 | unsigned int pid; | ||
| 85 | int index; /⋆ -1 == disable⋆/ | ||
| 86 | } ca_pid_t; | ||
| 87 | </programlisting> | ||
| 88 | </section></section> | ||
| 89 | |||
| 80 | <section id="ca_function_calls"> | 90 | <section id="ca_function_calls"> |
| 81 | <title>CA Function Calls</title> | 91 | <title>CA Function Calls</title> |
| 82 | 92 | ||
| @@ -148,8 +158,7 @@ including <emphasis role="tt">linux/dvb/ca.h</emphasis> in your application. | |||
| 148 | <para>(blocking mode is the default)</para> | 158 | <para>(blocking mode is the default)</para> |
| 149 | </entry> | 159 | </entry> |
| 150 | </row></tbody></tgroup></informaltable> | 160 | </row></tbody></tgroup></informaltable> |
| 151 | <para>ERRORS | 161 | <para>RETURN VALUE</para> |
| 152 | </para> | ||
| 153 | <informaltable><tgroup cols="2"><tbody><row><entry | 162 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 154 | align="char"> | 163 | align="char"> |
| 155 | <para>ENODEV</para> | 164 | <para>ENODEV</para> |
| @@ -207,8 +216,7 @@ including <emphasis role="tt">linux/dvb/ca.h</emphasis> in your application. | |||
| 207 | <para>File descriptor returned by a previous call to open().</para> | 216 | <para>File descriptor returned by a previous call to open().</para> |
| 208 | </entry> | 217 | </entry> |
| 209 | </row></tbody></tgroup></informaltable> | 218 | </row></tbody></tgroup></informaltable> |
| 210 | <para>ERRORS | 219 | <para>RETURN VALUE</para> |
| 211 | </para> | ||
| 212 | <informaltable><tgroup cols="2"><tbody><row><entry | 220 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 213 | align="char"> | 221 | align="char"> |
| 214 | <para>EBADF</para> | 222 | <para>EBADF</para> |
diff --git a/Documentation/DocBook/dvb/demux.xml b/Documentation/DocBook/media/dvb/demux.xml index 1b8c4e9835b9..37c17908aa40 100644 --- a/Documentation/DocBook/dvb/demux.xml +++ b/Documentation/DocBook/media/dvb/demux.xml | |||
| @@ -7,15 +7,19 @@ accessed by including <emphasis role="tt">linux/dvb/dmx.h</emphasis> in your app | |||
| 7 | <section id="dmx_types"> | 7 | <section id="dmx_types"> |
| 8 | <title>Demux Data Types</title> | 8 | <title>Demux Data Types</title> |
| 9 | 9 | ||
| 10 | <section id="dmx_output_t"> | 10 | <section id="dmx-output-t"> |
| 11 | <title>dmx_output_t</title> | 11 | <title>dmx_output_t</title> |
| 12 | <programlisting> | 12 | <programlisting> |
| 13 | typedef enum | 13 | typedef enum |
| 14 | { | 14 | { |
| 15 | DMX_OUT_DECODER, | 15 | DMX_OUT_DECODER, /⋆ Streaming directly to decoder. ⋆/ |
| 16 | DMX_OUT_TAP, | 16 | DMX_OUT_TAP, /⋆ Output going to a memory buffer ⋆/ |
| 17 | DMX_OUT_TS_TAP | 17 | /⋆ (to be retrieved via the read command).⋆/ |
| 18 | } dmx_output_t; | 18 | DMX_OUT_TS_TAP, /⋆ Output multiplexed into a new TS ⋆/ |
| 19 | /⋆ (to be retrieved by reading from the ⋆/ | ||
| 20 | /⋆ logical DVR device). ⋆/ | ||
| 21 | DMX_OUT_TSDEMUX_TAP /⋆ Like TS_TAP but retrieved from the DMX device ⋆/ | ||
| 22 | } dmx_output_t; | ||
| 19 | </programlisting> | 23 | </programlisting> |
| 20 | <para><emphasis role="tt">DMX_OUT_TAP</emphasis> delivers the stream output to the demux device on which the ioctl is | 24 | <para><emphasis role="tt">DMX_OUT_TAP</emphasis> delivers the stream output to the demux device on which the ioctl is |
| 21 | called. | 25 | called. |
| @@ -26,96 +30,95 @@ specified. | |||
| 26 | </para> | 30 | </para> |
| 27 | </section> | 31 | </section> |
| 28 | 32 | ||
| 29 | <section id="dmx_input_t"> | 33 | <section id="dmx-input-t"> |
| 30 | <title>dmx_input_t</title> | 34 | <title>dmx_input_t</title> |
| 31 | <programlisting> | 35 | <programlisting> |
| 32 | typedef enum | 36 | typedef enum |
| 33 | { | 37 | { |
| 34 | DMX_IN_FRONTEND, | 38 | DMX_IN_FRONTEND, /⋆ Input from a front-end device. ⋆/ |
| 35 | DMX_IN_DVR | 39 | DMX_IN_DVR /⋆ Input from the logical DVR device. ⋆/ |
| 36 | } dmx_input_t; | 40 | } dmx_input_t; |
| 37 | </programlisting> | 41 | </programlisting> |
| 38 | </section> | 42 | </section> |
| 39 | 43 | ||
| 40 | <section id="dmx_pes_type_t"> | 44 | <section id="dmx-pes-type-t"> |
| 41 | <title>dmx_pes_type_t</title> | 45 | <title>dmx_pes_type_t</title> |
| 42 | <programlisting> | 46 | <programlisting> |
| 43 | typedef enum | 47 | typedef enum |
| 44 | { | 48 | { |
| 45 | DMX_PES_AUDIO, | 49 | DMX_PES_AUDIO0, |
| 46 | DMX_PES_VIDEO, | 50 | DMX_PES_VIDEO0, |
| 47 | DMX_PES_TELETEXT, | 51 | DMX_PES_TELETEXT0, |
| 48 | DMX_PES_SUBTITLE, | 52 | DMX_PES_SUBTITLE0, |
| 49 | DMX_PES_PCR, | 53 | DMX_PES_PCR0, |
| 50 | DMX_PES_OTHER | ||
| 51 | } dmx_pes_type_t; | ||
| 52 | </programlisting> | ||
| 53 | </section> | ||
| 54 | 54 | ||
| 55 | <section id="dmx_event_t"> | 55 | DMX_PES_AUDIO1, |
| 56 | <title>dmx_event_t</title> | 56 | DMX_PES_VIDEO1, |
| 57 | <programlisting> | 57 | DMX_PES_TELETEXT1, |
| 58 | typedef enum | 58 | DMX_PES_SUBTITLE1, |
| 59 | { | 59 | DMX_PES_PCR1, |
| 60 | DMX_SCRAMBLING_EV, | ||
| 61 | DMX_FRONTEND_EV | ||
| 62 | } dmx_event_t; | ||
| 63 | </programlisting> | ||
| 64 | </section> | ||
| 65 | 60 | ||
| 66 | <section id="dmx_scrambling_status_t"> | 61 | DMX_PES_AUDIO2, |
| 67 | <title>dmx_scrambling_status_t</title> | 62 | DMX_PES_VIDEO2, |
| 68 | <programlisting> | 63 | DMX_PES_TELETEXT2, |
| 69 | typedef enum | 64 | DMX_PES_SUBTITLE2, |
| 70 | { | 65 | DMX_PES_PCR2, |
| 71 | DMX_SCRAMBLING_OFF, | 66 | |
| 72 | DMX_SCRAMBLING_ON | 67 | DMX_PES_AUDIO3, |
| 73 | } dmx_scrambling_status_t; | 68 | DMX_PES_VIDEO3, |
| 69 | DMX_PES_TELETEXT3, | ||
| 70 | DMX_PES_SUBTITLE3, | ||
| 71 | DMX_PES_PCR3, | ||
| 72 | |||
| 73 | DMX_PES_OTHER | ||
| 74 | } dmx_pes_type_t; | ||
| 74 | </programlisting> | 75 | </programlisting> |
| 75 | </section> | 76 | </section> |
| 76 | 77 | ||
| 77 | <section id="dmx_filter"> | 78 | <section id="dmx-filter"> |
| 78 | <title>struct dmx_filter</title> | 79 | <title>struct dmx_filter</title> |
| 79 | <programlisting> | 80 | <programlisting> |
| 80 | typedef struct dmx_filter | 81 | typedef struct dmx_filter |
| 81 | { | 82 | { |
| 82 | uint8_t filter[DMX_FILTER_SIZE]; | 83 | __u8 filter[DMX_FILTER_SIZE]; |
| 83 | uint8_t mask[DMX_FILTER_SIZE]; | 84 | __u8 mask[DMX_FILTER_SIZE]; |
| 84 | } dmx_filter_t; | 85 | __u8 mode[DMX_FILTER_SIZE]; |
| 86 | } dmx_filter_t; | ||
| 85 | </programlisting> | 87 | </programlisting> |
| 86 | </section> | 88 | </section> |
| 87 | 89 | ||
| 88 | <section id="dmx_sct_filter_params"> | 90 | <section id="dmx-sct-filter-params"> |
| 89 | <title>struct dmx_sct_filter_params</title> | 91 | <title>struct dmx_sct_filter_params</title> |
| 90 | <programlisting> | 92 | <programlisting> |
| 91 | struct dmx_sct_filter_params | 93 | struct dmx_sct_filter_params |
| 92 | { | 94 | { |
| 93 | uint16_t pid; | 95 | __u16 pid; |
| 94 | dmx_filter_t filter; | 96 | dmx_filter_t filter; |
| 95 | uint32_t timeout; | 97 | __u32 timeout; |
| 96 | uint32_t flags; | 98 | __u32 flags; |
| 97 | #define DMX_CHECK_CRC 1 | 99 | #define DMX_CHECK_CRC 1 |
| 98 | #define DMX_ONESHOT 2 | 100 | #define DMX_ONESHOT 2 |
| 99 | #define DMX_IMMEDIATE_START 4 | 101 | #define DMX_IMMEDIATE_START 4 |
| 100 | }; | 102 | #define DMX_KERNEL_CLIENT 0x8000 |
| 103 | }; | ||
| 101 | </programlisting> | 104 | </programlisting> |
| 102 | </section> | 105 | </section> |
| 103 | 106 | ||
| 104 | <section id="dmx_pes_filter_params"> | 107 | <section id="dmx-pes-filter-params"> |
| 105 | <title>struct dmx_pes_filter_params</title> | 108 | <title>struct dmx_pes_filter_params</title> |
| 106 | <programlisting> | 109 | <programlisting> |
| 107 | struct dmx_pes_filter_params | 110 | struct dmx_pes_filter_params |
| 108 | { | 111 | { |
| 109 | uint16_t pid; | 112 | __u16 pid; |
| 110 | dmx_input_t input; | 113 | dmx_input_t input; |
| 111 | dmx_output_t output; | 114 | dmx_output_t output; |
| 112 | dmx_pes_type_t pes_type; | 115 | dmx_pes_type_t pes_type; |
| 113 | uint32_t flags; | 116 | __u32 flags; |
| 114 | }; | 117 | }; |
| 115 | </programlisting> | 118 | </programlisting> |
| 116 | </section> | 119 | </section> |
| 117 | 120 | ||
| 118 | <section id="dmx_event"> | 121 | <section id="dmx-event"> |
| 119 | <title>struct dmx_event</title> | 122 | <title>struct dmx_event</title> |
| 120 | <programlisting> | 123 | <programlisting> |
| 121 | struct dmx_event | 124 | struct dmx_event |
| @@ -130,19 +133,44 @@ specified. | |||
| 130 | </programlisting> | 133 | </programlisting> |
| 131 | </section> | 134 | </section> |
| 132 | 135 | ||
| 133 | <section id="dmx_stc"> | 136 | <section id="dmx-stc"> |
| 134 | <title>struct dmx_stc</title> | 137 | <title>struct dmx_stc</title> |
| 135 | <programlisting> | 138 | <programlisting> |
| 136 | struct dmx_stc { | 139 | struct dmx_stc { |
| 137 | unsigned int num; /⋆ input : which STC? 0..N ⋆/ | 140 | unsigned int num; /⋆ input : which STC? 0..N ⋆/ |
| 138 | unsigned int base; /⋆ output: divisor for stc to get 90 kHz clock ⋆/ | 141 | unsigned int base; /⋆ output: divisor for stc to get 90 kHz clock ⋆/ |
| 139 | uint64_t stc; /⋆ output: stc in 'base'⋆90 kHz units ⋆/ | 142 | __u64 stc; /⋆ output: stc in 'base'⋆90 kHz units ⋆/ |
| 140 | }; | 143 | }; |
| 141 | </programlisting> | 144 | </programlisting> |
| 142 | </section> | 145 | </section> |
| 143 | 146 | ||
| 147 | <section id="dmx-caps"> | ||
| 148 | <title>struct dmx_caps</title> | ||
| 149 | <programlisting> | ||
| 150 | typedef struct dmx_caps { | ||
| 151 | __u32 caps; | ||
| 152 | int num_decoders; | ||
| 153 | } dmx_caps_t; | ||
| 154 | </programlisting> | ||
| 155 | </section> | ||
| 156 | |||
| 157 | <section id="dmx-source-t"> | ||
| 158 | <title>enum dmx_source_t</title> | ||
| 159 | <programlisting> | ||
| 160 | typedef enum { | ||
| 161 | DMX_SOURCE_FRONT0 = 0, | ||
| 162 | DMX_SOURCE_FRONT1, | ||
| 163 | DMX_SOURCE_FRONT2, | ||
| 164 | DMX_SOURCE_FRONT3, | ||
| 165 | DMX_SOURCE_DVR0 = 16, | ||
| 166 | DMX_SOURCE_DVR1, | ||
| 167 | DMX_SOURCE_DVR2, | ||
| 168 | DMX_SOURCE_DVR3 | ||
| 169 | } dmx_source_t; | ||
| 170 | </programlisting> | ||
| 144 | </section> | 171 | </section> |
| 145 | 172 | ||
| 173 | </section> | ||
| 146 | <section id="dmx_fcalls"> | 174 | <section id="dmx_fcalls"> |
| 147 | <title>Demux Function Calls</title> | 175 | <title>Demux Function Calls</title> |
| 148 | 176 | ||
| @@ -211,8 +239,7 @@ specified. | |||
| 211 | <para>(blocking mode is the default)</para> | 239 | <para>(blocking mode is the default)</para> |
| 212 | </entry> | 240 | </entry> |
| 213 | </row></tbody></tgroup></informaltable> | 241 | </row></tbody></tgroup></informaltable> |
| 214 | <para>ERRORS | 242 | <para>RETURN VALUE</para> |
| 215 | </para> | ||
| 216 | <informaltable><tgroup cols="2"><tbody><row><entry | 243 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 217 | align="char"> | 244 | align="char"> |
| 218 | <para>ENODEV</para> | 245 | <para>ENODEV</para> |
| @@ -271,8 +298,7 @@ specified. | |||
| 271 | <para>File descriptor returned by a previous call to open().</para> | 298 | <para>File descriptor returned by a previous call to open().</para> |
| 272 | </entry> | 299 | </entry> |
| 273 | </row></tbody></tgroup></informaltable> | 300 | </row></tbody></tgroup></informaltable> |
| 274 | <para>ERRORS | 301 | <para>RETURN VALUE</para> |
| 275 | </para> | ||
| 276 | <informaltable><tgroup cols="2"><tbody><row><entry | 302 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 277 | align="char"> | 303 | align="char"> |
| 278 | <para>EBADF</para> | 304 | <para>EBADF</para> |
| @@ -353,8 +379,7 @@ specified. | |||
| 353 | <para>Size of buf.</para> | 379 | <para>Size of buf.</para> |
| 354 | </entry> | 380 | </entry> |
| 355 | </row></tbody></tgroup></informaltable> | 381 | </row></tbody></tgroup></informaltable> |
| 356 | <para>ERRORS | 382 | <para>RETURN VALUE</para> |
| 357 | </para> | ||
| 358 | <informaltable><tgroup cols="2"><tbody><row><entry | 383 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 359 | align="char"> | 384 | align="char"> |
| 360 | <para>EWOULDBLOCK</para> | 385 | <para>EWOULDBLOCK</para> |
| @@ -457,8 +482,7 @@ specified. | |||
| 457 | <para>Size of buf.</para> | 482 | <para>Size of buf.</para> |
| 458 | </entry> | 483 | </entry> |
| 459 | </row></tbody></tgroup></informaltable> | 484 | </row></tbody></tgroup></informaltable> |
| 460 | <para>ERRORS | 485 | <para>RETURN VALUE</para> |
| 461 | </para> | ||
| 462 | <informaltable><tgroup cols="2"><tbody><row><entry | 486 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 463 | align="char"> | 487 | align="char"> |
| 464 | <para>EWOULDBLOCK</para> | 488 | <para>EWOULDBLOCK</para> |
| @@ -491,7 +515,7 @@ specified. | |||
| 491 | </row></tbody></tgroup></informaltable> | 515 | </row></tbody></tgroup></informaltable> |
| 492 | </section> | 516 | </section> |
| 493 | 517 | ||
| 494 | <section id="dmx_start"> | 518 | <section id="DMX_START"> |
| 495 | <title>DMX_START</title> | 519 | <title>DMX_START</title> |
| 496 | <para>DESCRIPTION | 520 | <para>DESCRIPTION |
| 497 | </para> | 521 | </para> |
| @@ -525,17 +549,9 @@ specified. | |||
| 525 | <para>Equals DMX_START for this command.</para> | 549 | <para>Equals DMX_START for this command.</para> |
| 526 | </entry> | 550 | </entry> |
| 527 | </row></tbody></tgroup></informaltable> | 551 | </row></tbody></tgroup></informaltable> |
| 528 | <para>ERRORS | 552 | &return-value-dvb; |
| 529 | </para> | ||
| 530 | <informaltable><tgroup cols="2"><tbody><row><entry | 553 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 531 | align="char"> | 554 | align="char"> |
| 532 | <para>EBADF</para> | ||
| 533 | </entry><entry | ||
| 534 | align="char"> | ||
| 535 | <para>fd is not a valid file descriptor.</para> | ||
| 536 | </entry> | ||
| 537 | </row><row><entry | ||
| 538 | align="char"> | ||
| 539 | <para>EINVAL</para> | 555 | <para>EINVAL</para> |
| 540 | </entry><entry | 556 | </entry><entry |
| 541 | align="char"> | 557 | align="char"> |
| @@ -556,7 +572,7 @@ specified. | |||
| 556 | </row></tbody></tgroup></informaltable> | 572 | </row></tbody></tgroup></informaltable> |
| 557 | </section> | 573 | </section> |
| 558 | 574 | ||
| 559 | <section id="dmx_stop"> | 575 | <section id="DMX_STOP"> |
| 560 | <title>DMX_STOP</title> | 576 | <title>DMX_STOP</title> |
| 561 | <para>DESCRIPTION | 577 | <para>DESCRIPTION |
| 562 | </para> | 578 | </para> |
| @@ -591,19 +607,10 @@ specified. | |||
| 591 | <para>Equals DMX_STOP for this command.</para> | 607 | <para>Equals DMX_STOP for this command.</para> |
| 592 | </entry> | 608 | </entry> |
| 593 | </row></tbody></tgroup></informaltable> | 609 | </row></tbody></tgroup></informaltable> |
| 594 | <para>ERRORS | 610 | &return-value-dvb; |
| 595 | </para> | ||
| 596 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 597 | align="char"> | ||
| 598 | <para>EBADF</para> | ||
| 599 | </entry><entry | ||
| 600 | align="char"> | ||
| 601 | <para>fd is not a valid file descriptor.</para> | ||
| 602 | </entry> | ||
| 603 | </row></tbody></tgroup></informaltable> | ||
| 604 | </section> | 611 | </section> |
| 605 | 612 | ||
| 606 | <section id="dmx_set_filter"> | 613 | <section id="DMX_SET_FILTER"> |
| 607 | <title>DMX_SET_FILTER</title> | 614 | <title>DMX_SET_FILTER</title> |
| 608 | <para>DESCRIPTION | 615 | <para>DESCRIPTION |
| 609 | </para> | 616 | </para> |
| @@ -654,26 +661,10 @@ specified. | |||
| 654 | <para>Pointer to structure containing filter parameters.</para> | 661 | <para>Pointer to structure containing filter parameters.</para> |
| 655 | </entry> | 662 | </entry> |
| 656 | </row></tbody></tgroup></informaltable> | 663 | </row></tbody></tgroup></informaltable> |
| 657 | <para>ERRORS | 664 | &return-value-dvb; |
| 658 | </para> | ||
| 659 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 660 | align="char"> | ||
| 661 | <para>EBADF</para> | ||
| 662 | </entry><entry | ||
| 663 | align="char"> | ||
| 664 | <para>fd is not a valid file descriptor.</para> | ||
| 665 | </entry> | ||
| 666 | </row><row><entry | ||
| 667 | align="char"> | ||
| 668 | <para>EINVAL</para> | ||
| 669 | </entry><entry | ||
| 670 | align="char"> | ||
| 671 | <para>Invalid argument.</para> | ||
| 672 | </entry> | ||
| 673 | </row></tbody></tgroup></informaltable> | ||
| 674 | </section> | 665 | </section> |
| 675 | 666 | ||
| 676 | <section id="dmx_set_pes_filter"> | 667 | <section id="DMX_SET_PES_FILTER"> |
| 677 | <title>DMX_SET_PES_FILTER</title> | 668 | <title>DMX_SET_PES_FILTER</title> |
| 678 | <para>DESCRIPTION | 669 | <para>DESCRIPTION |
| 679 | </para> | 670 | </para> |
| @@ -727,24 +718,9 @@ specified. | |||
| 727 | <para>Pointer to structure containing filter parameters.</para> | 718 | <para>Pointer to structure containing filter parameters.</para> |
| 728 | </entry> | 719 | </entry> |
| 729 | </row></tbody></tgroup></informaltable> | 720 | </row></tbody></tgroup></informaltable> |
| 730 | <para>ERRORS | 721 | &return-value-dvb; |
| 731 | </para> | ||
| 732 | <informaltable><tgroup cols="2"><tbody><row><entry | 722 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 733 | align="char"> | 723 | align="char"> |
| 734 | <para>EBADF</para> | ||
| 735 | </entry><entry | ||
| 736 | align="char"> | ||
| 737 | <para>fd is not a valid file descriptor.</para> | ||
| 738 | </entry> | ||
| 739 | </row><row><entry | ||
| 740 | align="char"> | ||
| 741 | <para>EINVAL</para> | ||
| 742 | </entry><entry | ||
| 743 | align="char"> | ||
| 744 | <para>Invalid argument.</para> | ||
| 745 | </entry> | ||
| 746 | </row><row><entry | ||
| 747 | align="char"> | ||
| 748 | <para>EBUSY</para> | 724 | <para>EBUSY</para> |
| 749 | </entry><entry | 725 | </entry><entry |
| 750 | align="char"> | 726 | align="char"> |
| @@ -756,7 +732,7 @@ specified. | |||
| 756 | </row></tbody></tgroup></informaltable> | 732 | </row></tbody></tgroup></informaltable> |
| 757 | </section> | 733 | </section> |
| 758 | 734 | ||
| 759 | <section id="dms_set_buffer_size"> | 735 | <section id="DMX_SET_BUFFER_SIZE"> |
| 760 | <title>DMX_SET_BUFFER_SIZE</title> | 736 | <title>DMX_SET_BUFFER_SIZE</title> |
| 761 | <para>DESCRIPTION | 737 | <para>DESCRIPTION |
| 762 | </para> | 738 | </para> |
| @@ -799,27 +775,10 @@ specified. | |||
| 799 | <para>Size of circular buffer.</para> | 775 | <para>Size of circular buffer.</para> |
| 800 | </entry> | 776 | </entry> |
| 801 | </row></tbody></tgroup></informaltable> | 777 | </row></tbody></tgroup></informaltable> |
| 802 | <para>ERRORS | 778 | &return-value-dvb; |
| 803 | </para> | ||
| 804 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 805 | align="char"> | ||
| 806 | <para>EBADF</para> | ||
| 807 | </entry><entry | ||
| 808 | align="char"> | ||
| 809 | <para>fd is not a valid file descriptor.</para> | ||
| 810 | </entry> | ||
| 811 | </row><row><entry | ||
| 812 | align="char"> | ||
| 813 | <para>ENOMEM</para> | ||
| 814 | </entry><entry | ||
| 815 | align="char"> | ||
| 816 | <para>The driver was not able to allocate a buffer of the | ||
| 817 | requested size.</para> | ||
| 818 | </entry> | ||
| 819 | </row></tbody></tgroup></informaltable> | ||
| 820 | </section> | 779 | </section> |
| 821 | 780 | ||
| 822 | <section id="dmx_get_event"> | 781 | <section id="DMX_GET_EVENT"> |
| 823 | <title>DMX_GET_EVENT</title> | 782 | <title>DMX_GET_EVENT</title> |
| 824 | <para>DESCRIPTION | 783 | <para>DESCRIPTION |
| 825 | </para> | 784 | </para> |
| @@ -872,24 +831,9 @@ specified. | |||
| 872 | <para>Pointer to the location where the event is to be stored.</para> | 831 | <para>Pointer to the location where the event is to be stored.</para> |
| 873 | </entry> | 832 | </entry> |
| 874 | </row></tbody></tgroup></informaltable> | 833 | </row></tbody></tgroup></informaltable> |
| 875 | <para>ERRORS | 834 | &return-value-dvb; |
| 876 | </para> | ||
| 877 | <informaltable><tgroup cols="2"><tbody><row><entry | 835 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 878 | align="char"> | 836 | align="char"> |
| 879 | <para>EBADF</para> | ||
| 880 | </entry><entry | ||
| 881 | align="char"> | ||
| 882 | <para>fd is not a valid file descriptor.</para> | ||
| 883 | </entry> | ||
| 884 | </row><row><entry | ||
| 885 | align="char"> | ||
| 886 | <para>EFAULT</para> | ||
| 887 | </entry><entry | ||
| 888 | align="char"> | ||
| 889 | <para>ev points to an invalid address.</para> | ||
| 890 | </entry> | ||
| 891 | </row><row><entry | ||
| 892 | align="char"> | ||
| 893 | <para>EWOULDBLOCK</para> | 837 | <para>EWOULDBLOCK</para> |
| 894 | </entry><entry | 838 | </entry><entry |
| 895 | align="char"> | 839 | align="char"> |
| @@ -899,7 +843,7 @@ specified. | |||
| 899 | </row></tbody></tgroup></informaltable> | 843 | </row></tbody></tgroup></informaltable> |
| 900 | </section> | 844 | </section> |
| 901 | 845 | ||
| 902 | <section id="dmx_get_stc"> | 846 | <section id="DMX_GET_STC"> |
| 903 | <title>DMX_GET_STC</title> | 847 | <title>DMX_GET_STC</title> |
| 904 | <para>DESCRIPTION | 848 | <para>DESCRIPTION |
| 905 | </para> | 849 | </para> |
| @@ -946,24 +890,9 @@ specified. | |||
| 946 | <para>Pointer to the location where the stc is to be stored.</para> | 890 | <para>Pointer to the location where the stc is to be stored.</para> |
| 947 | </entry> | 891 | </entry> |
| 948 | </row></tbody></tgroup></informaltable> | 892 | </row></tbody></tgroup></informaltable> |
| 949 | <para>ERRORS | 893 | &return-value-dvb; |
| 950 | </para> | ||
| 951 | <informaltable><tgroup cols="2"><tbody><row><entry | 894 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 952 | align="char"> | 895 | align="char"> |
| 953 | <para>EBADF</para> | ||
| 954 | </entry><entry | ||
| 955 | align="char"> | ||
| 956 | <para>fd is not a valid file descriptor.</para> | ||
| 957 | </entry> | ||
| 958 | </row><row><entry | ||
| 959 | align="char"> | ||
| 960 | <para>EFAULT</para> | ||
| 961 | </entry><entry | ||
| 962 | align="char"> | ||
| 963 | <para>stc points to an invalid address.</para> | ||
| 964 | </entry> | ||
| 965 | </row><row><entry | ||
| 966 | align="char"> | ||
| 967 | <para>EINVAL</para> | 896 | <para>EINVAL</para> |
| 968 | </entry><entry | 897 | </entry><entry |
| 969 | align="char"> | 898 | align="char"> |
diff --git a/Documentation/DocBook/dvb/dvbapi.xml b/Documentation/DocBook/media/dvb/dvbapi.xml index 9fad86ce7f5e..2ab6ddcfc4e0 100644 --- a/Documentation/DocBook/dvb/dvbapi.xml +++ b/Documentation/DocBook/media/dvb/dvbapi.xml | |||
| @@ -114,8 +114,28 @@ Added ISDB-T test originally written by Patrick Boettcher | |||
| 114 | &sub-examples; | 114 | &sub-examples; |
| 115 | </chapter> | 115 | </chapter> |
| 116 | <!-- END OF CHAPTERS --> | 116 | <!-- END OF CHAPTERS --> |
| 117 | <appendix id="audio_h"> | ||
| 118 | <title>DVB Audio Header File</title> | ||
| 119 | &sub-audio-h; | ||
| 120 | </appendix> | ||
| 121 | <appendix id="ca_h"> | ||
| 122 | <title>DVB Conditional Access Header File</title> | ||
| 123 | &sub-ca-h; | ||
| 124 | </appendix> | ||
| 125 | <appendix id="dmx_h"> | ||
| 126 | <title>DVB Demux Header File</title> | ||
| 127 | &sub-dmx-h; | ||
| 128 | </appendix> | ||
| 117 | <appendix id="frontend_h"> | 129 | <appendix id="frontend_h"> |
| 118 | <title>DVB Frontend Header File</title> | 130 | <title>DVB Frontend Header File</title> |
| 119 | &sub-frontend-h; | 131 | &sub-frontend-h; |
| 120 | </appendix> | 132 | </appendix> |
| 133 | <appendix id="net_h"> | ||
| 134 | <title>DVB Network Header File</title> | ||
| 135 | &sub-net-h; | ||
| 136 | </appendix> | ||
| 137 | <appendix id="video_h"> | ||
| 138 | <title>DVB Video Header File</title> | ||
| 139 | &sub-video-h; | ||
| 140 | </appendix> | ||
| 121 | 141 | ||
diff --git a/Documentation/DocBook/media/dvb/dvbproperty.xml b/Documentation/DocBook/media/dvb/dvbproperty.xml new file mode 100644 index 000000000000..207e1a5bf8f0 --- /dev/null +++ b/Documentation/DocBook/media/dvb/dvbproperty.xml | |||
| @@ -0,0 +1,859 @@ | |||
| 1 | <section id="FE_GET_SET_PROPERTY"> | ||
| 2 | <title><constant>FE_GET_PROPERTY/FE_SET_PROPERTY</constant></title> | ||
| 3 | <para>This section describes the DVB version 5 extention of the DVB-API, also | ||
| 4 | called "S2API", as this API were added to provide support for DVB-S2. It was | ||
| 5 | designed to be able to replace the old frontend API. Yet, the DISEQC and | ||
| 6 | the capability ioctls weren't implemented yet via the new way.</para> | ||
| 7 | <para>The typical usage for the <constant>FE_GET_PROPERTY/FE_SET_PROPERTY</constant> | ||
| 8 | API is to replace the ioctl's were the <link linkend="dvb-frontend-parameters"> | ||
| 9 | struct <constant>dvb_frontend_parameters</constant></link> were used.</para> | ||
| 10 | <section id="dtv-property"> | ||
| 11 | <title>DTV property type</title> | ||
| 12 | <programlisting> | ||
| 13 | /* Reserved fields should be set to 0 */ | ||
| 14 | struct dtv_property { | ||
| 15 | __u32 cmd; | ||
| 16 | union { | ||
| 17 | __u32 data; | ||
| 18 | struct { | ||
| 19 | __u8 data[32]; | ||
| 20 | __u32 len; | ||
| 21 | __u32 reserved1[3]; | ||
| 22 | void *reserved2; | ||
| 23 | } buffer; | ||
| 24 | } u; | ||
| 25 | int result; | ||
| 26 | } __attribute__ ((packed)); | ||
| 27 | |||
| 28 | /* num of properties cannot exceed DTV_IOCTL_MAX_MSGS per ioctl */ | ||
| 29 | #define DTV_IOCTL_MAX_MSGS 64 | ||
| 30 | </programlisting> | ||
| 31 | </section> | ||
| 32 | <section id="dtv-properties"> | ||
| 33 | <title>DTV properties type</title> | ||
| 34 | <programlisting> | ||
| 35 | struct dtv_properties { | ||
| 36 | __u32 num; | ||
| 37 | struct dtv_property *props; | ||
| 38 | }; | ||
| 39 | </programlisting> | ||
| 40 | </section> | ||
| 41 | |||
| 42 | <section id="FE_GET_PROPERTY"> | ||
| 43 | <title>FE_GET_PROPERTY</title> | ||
| 44 | <para>DESCRIPTION | ||
| 45 | </para> | ||
| 46 | <informaltable><tgroup cols="1"><tbody><row><entry | ||
| 47 | align="char"> | ||
| 48 | <para>This ioctl call returns one or more frontend properties. This call only | ||
| 49 | requires read-only access to the device.</para> | ||
| 50 | </entry> | ||
| 51 | </row></tbody></tgroup></informaltable> | ||
| 52 | <para>SYNOPSIS | ||
| 53 | </para> | ||
| 54 | <informaltable><tgroup cols="1"><tbody><row><entry | ||
| 55 | align="char"> | ||
| 56 | <para>int ioctl(int fd, int request = <link linkend="FE_GET_PROPERTY">FE_GET_PROPERTY</link>, | ||
| 57 | dtv_properties ⋆props);</para> | ||
| 58 | </entry> | ||
| 59 | </row></tbody></tgroup></informaltable> | ||
| 60 | <para>PARAMETERS | ||
| 61 | </para> | ||
| 62 | <informaltable><tgroup cols="2"><tbody><row><entry align="char"> | ||
| 63 | <para>int fd</para> | ||
| 64 | </entry><entry | ||
| 65 | align="char"> | ||
| 66 | <para>File descriptor returned by a previous call to open().</para> | ||
| 67 | </entry> | ||
| 68 | </row><row><entry | ||
| 69 | align="char"> | ||
| 70 | <para>int num</para> | ||
| 71 | </entry><entry | ||
| 72 | align="char"> | ||
| 73 | <para>Equals <link linkend="FE_GET_PROPERTY">FE_GET_PROPERTY</link> for this command.</para> | ||
| 74 | </entry> | ||
| 75 | </row><row><entry | ||
| 76 | align="char"> | ||
| 77 | <para>struct dtv_property *props</para> | ||
| 78 | </entry><entry | ||
| 79 | align="char"> | ||
| 80 | <para>Points to the location where the front-end property commands are stored.</para> | ||
| 81 | </entry> | ||
| 82 | </row></tbody></tgroup></informaltable> | ||
| 83 | &return-value-dvb; | ||
| 84 | <informaltable><tgroup cols="2"><tbody><row> | ||
| 85 | <entry align="char"><para>EOPNOTSUPP</para></entry> | ||
| 86 | <entry align="char"><para>Property type not supported.</para></entry> | ||
| 87 | </row></tbody></tgroup></informaltable> | ||
| 88 | </section> | ||
| 89 | |||
| 90 | <section id="FE_SET_PROPERTY"> | ||
| 91 | <title>FE_SET_PROPERTY</title> | ||
| 92 | <para>DESCRIPTION | ||
| 93 | </para> | ||
| 94 | <informaltable><tgroup cols="1"><tbody><row><entry | ||
| 95 | align="char"> | ||
| 96 | <para>This ioctl call sets one or more frontend properties. This call only | ||
| 97 | requires read-only access to the device.</para> | ||
| 98 | </entry> | ||
| 99 | </row></tbody></tgroup></informaltable> | ||
| 100 | <para>SYNOPSIS | ||
| 101 | </para> | ||
| 102 | <informaltable><tgroup cols="1"><tbody><row><entry | ||
| 103 | align="char"> | ||
| 104 | <para>int ioctl(int fd, int request = <link linkend="FE_SET_PROPERTY">FE_SET_PROPERTY</link>, | ||
| 105 | dtv_properties ⋆props);</para> | ||
| 106 | </entry> | ||
| 107 | </row></tbody></tgroup></informaltable> | ||
| 108 | <para>PARAMETERS | ||
| 109 | </para> | ||
| 110 | <informaltable><tgroup cols="2"><tbody><row><entry align="char"> | ||
| 111 | <para>int fd</para> | ||
| 112 | </entry><entry | ||
| 113 | align="char"> | ||
| 114 | <para>File descriptor returned by a previous call to open().</para> | ||
| 115 | </entry> | ||
| 116 | </row><row><entry | ||
| 117 | align="char"> | ||
| 118 | <para>int num</para> | ||
| 119 | </entry><entry | ||
| 120 | align="char"> | ||
| 121 | <para>Equals <link linkend="FE_SET_PROPERTY">FE_SET_PROPERTY</link> for this command.</para> | ||
| 122 | </entry> | ||
| 123 | </row><row><entry | ||
| 124 | align="char"> | ||
| 125 | <para>struct dtv_property *props</para> | ||
| 126 | </entry><entry | ||
| 127 | align="char"> | ||
| 128 | <para>Points to the location where the front-end property commands are stored.</para> | ||
| 129 | </entry> | ||
| 130 | </row></tbody></tgroup></informaltable> | ||
| 131 | &return-value-dvb; | ||
| 132 | <informaltable><tgroup cols="2"><tbody><row> | ||
| 133 | <entry align="char"><para>EOPNOTSUPP</para></entry> | ||
| 134 | <entry align="char"><para>Property type not supported.</para></entry> | ||
| 135 | </row></tbody></tgroup></informaltable> | ||
| 136 | </section> | ||
| 137 | |||
| 138 | <section> | ||
| 139 | <title>Property types</title> | ||
| 140 | <para> | ||
| 141 | On <link linkend="FE_GET_PROPERTY">FE_GET_PROPERTY</link>/<link linkend="FE_SET_PROPERTY">FE_SET_PROPERTY</link>, | ||
| 142 | the actual action is determined by the dtv_property cmd/data pairs. With one single ioctl, is possible to | ||
| 143 | get/set up to 64 properties. The actual meaning of each property is described on the next sections. | ||
| 144 | </para> | ||
| 145 | |||
| 146 | <para>The available frontend property types are shown on the next section.</para> | ||
| 147 | </section> | ||
| 148 | |||
| 149 | <section id="fe_property_parameters"> | ||
| 150 | <title>Digital TV property parameters</title> | ||
| 151 | <section id="DTV-UNDEFINED"> | ||
| 152 | <title><constant>DTV_UNDEFINED</constant></title> | ||
| 153 | <para>Used internally. A GET/SET operation for it won't change or return anything.</para> | ||
| 154 | </section> | ||
| 155 | <section id="DTV-TUNE"> | ||
| 156 | <title><constant>DTV_TUNE</constant></title> | ||
| 157 | <para>Interpret the cache of data, build either a traditional frontend tunerequest so we can pass validation in the <constant>FE_SET_FRONTEND</constant> ioctl.</para> | ||
| 158 | </section> | ||
| 159 | <section id="DTV-CLEAR"> | ||
| 160 | <title><constant>DTV_CLEAR</constant></title> | ||
| 161 | <para>Reset a cache of data specific to the frontend here. This does not effect hardware.</para> | ||
| 162 | </section> | ||
| 163 | <section id="DTV-FREQUENCY"> | ||
| 164 | <title><constant>DTV_FREQUENCY</constant></title> | ||
| 165 | |||
| 166 | <para>Central frequency of the channel, in HZ.</para> | ||
| 167 | |||
| 168 | <para>Notes:</para> | ||
| 169 | <para>1)For ISDB-T, the channels are usually transmitted with an offset of 143kHz. | ||
| 170 | E.g. a valid frequncy could be 474143 kHz. The stepping is bound to the bandwidth of | ||
| 171 | the channel which is 6MHz.</para> | ||
| 172 | |||
| 173 | <para>2)As in ISDB-Tsb the channel consists of only one or three segments the | ||
| 174 | frequency step is 429kHz, 3*429 respectively. As for ISDB-T the | ||
| 175 | central frequency of the channel is expected.</para> | ||
| 176 | </section> | ||
| 177 | <section id="DTV-MODULATION"> | ||
| 178 | <title><constant>DTV_MODULATION</constant></title> | ||
| 179 | <para>Specifies the frontend modulation type for cable and satellite types. The modulation can be one of the types bellow:</para> | ||
| 180 | <programlisting> | ||
| 181 | typedef enum fe_modulation { | ||
| 182 | QPSK, | ||
| 183 | QAM_16, | ||
| 184 | QAM_32, | ||
| 185 | QAM_64, | ||
| 186 | QAM_128, | ||
| 187 | QAM_256, | ||
| 188 | QAM_AUTO, | ||
| 189 | VSB_8, | ||
| 190 | VSB_16, | ||
| 191 | PSK_8, | ||
| 192 | APSK_16, | ||
| 193 | APSK_32, | ||
| 194 | DQPSK, | ||
| 195 | } fe_modulation_t; | ||
| 196 | </programlisting> | ||
| 197 | </section> | ||
| 198 | <section id="DTV-BANDWIDTH-HZ"> | ||
| 199 | <title><constant>DTV_BANDWIDTH_HZ</constant></title> | ||
| 200 | |||
| 201 | <para>Bandwidth for the channel, in HZ.</para> | ||
| 202 | |||
| 203 | <para>Possible values: | ||
| 204 | <constant>1712000</constant>, | ||
| 205 | <constant>5000000</constant>, | ||
| 206 | <constant>6000000</constant>, | ||
| 207 | <constant>7000000</constant>, | ||
| 208 | <constant>8000000</constant>, | ||
| 209 | <constant>10000000</constant>. | ||
| 210 | </para> | ||
| 211 | |||
| 212 | <para>Notes:</para> | ||
| 213 | |||
| 214 | <para>1) For ISDB-T it should be always 6000000Hz (6MHz)</para> | ||
| 215 | <para>2) For ISDB-Tsb it can vary depending on the number of connected segments</para> | ||
| 216 | <para>3) Bandwidth doesn't apply for DVB-C transmissions, as the bandwidth | ||
| 217 | for DVB-C depends on the symbol rate</para> | ||
| 218 | <para>4) Bandwidth in ISDB-T is fixed (6MHz) or can be easily derived from | ||
| 219 | other parameters (DTV_ISDBT_SB_SEGMENT_IDX, | ||
| 220 | DTV_ISDBT_SB_SEGMENT_COUNT).</para> | ||
| 221 | <para>5) DVB-T supports 6, 7 and 8MHz.</para> | ||
| 222 | <para>6) In addition, DVB-T2 supports 1.172, 5 and 10MHz.</para> | ||
| 223 | </section> | ||
| 224 | <section id="DTV-INVERSION"> | ||
| 225 | <title><constant>DTV_INVERSION</constant></title> | ||
| 226 | <para>The Inversion field can take one of these values: | ||
| 227 | </para> | ||
| 228 | <programlisting> | ||
| 229 | typedef enum fe_spectral_inversion { | ||
| 230 | INVERSION_OFF, | ||
| 231 | INVERSION_ON, | ||
| 232 | INVERSION_AUTO | ||
| 233 | } fe_spectral_inversion_t; | ||
| 234 | </programlisting> | ||
| 235 | <para>It indicates if spectral inversion should be presumed or not. In the automatic setting | ||
| 236 | (<constant>INVERSION_AUTO</constant>) the hardware will try to figure out the correct setting by | ||
| 237 | itself. | ||
| 238 | </para> | ||
| 239 | </section> | ||
| 240 | <section id="DTV-DISEQC-MASTER"> | ||
| 241 | <title><constant>DTV_DISEQC_MASTER</constant></title> | ||
| 242 | <para>Currently not implemented.</para> | ||
| 243 | </section> | ||
| 244 | <section id="DTV-SYMBOL-RATE"> | ||
| 245 | <title><constant>DTV_SYMBOL_RATE</constant></title> | ||
| 246 | <para>Digital TV symbol rate, in bauds (symbols/second). Used on cable standards.</para> | ||
| 247 | </section> | ||
| 248 | <section id="DTV-INNER-FEC"> | ||
| 249 | <title><constant>DTV_INNER_FEC</constant></title> | ||
| 250 | <para>Used cable/satellite transmissions. The acceptable values are: | ||
| 251 | </para> | ||
| 252 | <programlisting> | ||
| 253 | typedef enum fe_code_rate { | ||
| 254 | FEC_NONE = 0, | ||
| 255 | FEC_1_2, | ||
| 256 | FEC_2_3, | ||
| 257 | FEC_3_4, | ||
| 258 | FEC_4_5, | ||
| 259 | FEC_5_6, | ||
| 260 | FEC_6_7, | ||
| 261 | FEC_7_8, | ||
| 262 | FEC_8_9, | ||
| 263 | FEC_AUTO, | ||
| 264 | FEC_3_5, | ||
| 265 | FEC_9_10, | ||
| 266 | } fe_code_rate_t; | ||
| 267 | </programlisting> | ||
| 268 | <para>which correspond to error correction rates of 1/2, 2/3, etc., | ||
| 269 | no error correction or auto detection.</para> | ||
| 270 | </section> | ||
| 271 | <section id="DTV-VOLTAGE"> | ||
| 272 | <title><constant>DTV_VOLTAGE</constant></title> | ||
| 273 | <para>The voltage is usually used with non-DiSEqC capable LNBs to switch | ||
| 274 | the polarzation (horizontal/vertical). When using DiSEqC epuipment this | ||
| 275 | voltage has to be switched consistently to the DiSEqC commands as | ||
| 276 | described in the DiSEqC spec.</para> | ||
| 277 | <programlisting> | ||
| 278 | typedef enum fe_sec_voltage { | ||
| 279 | SEC_VOLTAGE_13, | ||
| 280 | SEC_VOLTAGE_18 | ||
| 281 | } fe_sec_voltage_t; | ||
| 282 | </programlisting> | ||
| 283 | </section> | ||
| 284 | <section id="DTV-TONE"> | ||
| 285 | <title><constant>DTV_TONE</constant></title> | ||
| 286 | <para>Currently not used.</para> | ||
| 287 | </section> | ||
| 288 | <section id="DTV-PILOT"> | ||
| 289 | <title><constant>DTV_PILOT</constant></title> | ||
| 290 | <para>Sets DVB-S2 pilot</para> | ||
| 291 | <section id="fe-pilot-t"> | ||
| 292 | <title>fe_pilot type</title> | ||
| 293 | <programlisting> | ||
| 294 | typedef enum fe_pilot { | ||
| 295 | PILOT_ON, | ||
| 296 | PILOT_OFF, | ||
| 297 | PILOT_AUTO, | ||
| 298 | } fe_pilot_t; | ||
| 299 | </programlisting> | ||
| 300 | </section> | ||
| 301 | </section> | ||
| 302 | <section id="DTV-ROLLOFF"> | ||
| 303 | <title><constant>DTV_ROLLOFF</constant></title> | ||
| 304 | <para>Sets DVB-S2 rolloff</para> | ||
| 305 | |||
| 306 | <section id="fe-rolloff-t"> | ||
| 307 | <title>fe_rolloff type</title> | ||
| 308 | <programlisting> | ||
| 309 | typedef enum fe_rolloff { | ||
| 310 | ROLLOFF_35, /* Implied value in DVB-S, default for DVB-S2 */ | ||
| 311 | ROLLOFF_20, | ||
| 312 | ROLLOFF_25, | ||
| 313 | ROLLOFF_AUTO, | ||
| 314 | } fe_rolloff_t; | ||
| 315 | </programlisting> | ||
| 316 | </section> | ||
| 317 | </section> | ||
| 318 | <section id="DTV-DISEQC-SLAVE-REPLY"> | ||
| 319 | <title><constant>DTV_DISEQC_SLAVE_REPLY</constant></title> | ||
| 320 | <para>Currently not implemented.</para> | ||
| 321 | </section> | ||
| 322 | <section id="DTV-FE-CAPABILITY-COUNT"> | ||
| 323 | <title><constant>DTV_FE_CAPABILITY_COUNT</constant></title> | ||
| 324 | <para>Currently not implemented.</para> | ||
| 325 | </section> | ||
| 326 | <section id="DTV-FE-CAPABILITY"> | ||
| 327 | <title><constant>DTV_FE_CAPABILITY</constant></title> | ||
| 328 | <para>Currently not implemented.</para> | ||
| 329 | </section> | ||
| 330 | <section id="DTV-DELIVERY-SYSTEM"> | ||
| 331 | <title><constant>DTV_DELIVERY_SYSTEM</constant></title> | ||
| 332 | <para>Specifies the type of Delivery system</para> | ||
| 333 | <section id="fe-delivery-system-t"> | ||
| 334 | <title>fe_delivery_system type</title> | ||
| 335 | <para>Possible values: </para> | ||
| 336 | <programlisting> | ||
| 337 | typedef enum fe_delivery_system { | ||
| 338 | SYS_UNDEFINED, | ||
| 339 | SYS_DVBC_ANNEX_AC, | ||
| 340 | SYS_DVBC_ANNEX_B, | ||
| 341 | SYS_DVBT, | ||
| 342 | SYS_DSS, | ||
| 343 | SYS_DVBS, | ||
| 344 | SYS_DVBS2, | ||
| 345 | SYS_DVBH, | ||
| 346 | SYS_ISDBT, | ||
| 347 | SYS_ISDBS, | ||
| 348 | SYS_ISDBC, | ||
| 349 | SYS_ATSC, | ||
| 350 | SYS_ATSCMH, | ||
| 351 | SYS_DMBTH, | ||
| 352 | SYS_CMMB, | ||
| 353 | SYS_DAB, | ||
| 354 | SYS_DVBT2, | ||
| 355 | } fe_delivery_system_t; | ||
| 356 | </programlisting> | ||
| 357 | </section> | ||
| 358 | </section> | ||
| 359 | <section id="DTV-ISDBT-PARTIAL-RECEPTION"> | ||
| 360 | <title><constant>DTV_ISDBT_PARTIAL_RECEPTION</constant></title> | ||
| 361 | |||
| 362 | <para>If <constant>DTV_ISDBT_SOUND_BROADCASTING</constant> is '0' this bit-field represents whether | ||
| 363 | the channel is in partial reception mode or not.</para> | ||
| 364 | |||
| 365 | <para>If '1' <constant>DTV_ISDBT_LAYERA_*</constant> values are assigned to the center segment and | ||
| 366 | <constant>DTV_ISDBT_LAYERA_SEGMENT_COUNT</constant> has to be '1'.</para> | ||
| 367 | |||
| 368 | <para>If in addition <constant>DTV_ISDBT_SOUND_BROADCASTING</constant> is '1' | ||
| 369 | <constant>DTV_ISDBT_PARTIAL_RECEPTION</constant> represents whether this ISDB-Tsb channel | ||
| 370 | is consisting of one segment and layer or three segments and two layers.</para> | ||
| 371 | |||
| 372 | <para>Possible values: 0, 1, -1 (AUTO)</para> | ||
| 373 | </section> | ||
| 374 | <section id="DTV-ISDBT-SOUND-BROADCASTING"> | ||
| 375 | <title><constant>DTV_ISDBT_SOUND_BROADCASTING</constant></title> | ||
| 376 | |||
| 377 | <para>This field represents whether the other DTV_ISDBT_*-parameters are | ||
| 378 | referring to an ISDB-T and an ISDB-Tsb channel. (See also | ||
| 379 | <constant>DTV_ISDBT_PARTIAL_RECEPTION</constant>).</para> | ||
| 380 | |||
| 381 | <para>Possible values: 0, 1, -1 (AUTO)</para> | ||
| 382 | </section> | ||
| 383 | <section id="DTV-ISDBT-SB-SUBCHANNEL-ID"> | ||
| 384 | <title><constant>DTV_ISDBT_SB_SUBCHANNEL_ID</constant></title> | ||
| 385 | |||
| 386 | <para>This field only applies if <constant>DTV_ISDBT_SOUND_BROADCASTING</constant> is '1'.</para> | ||
| 387 | |||
| 388 | <para>(Note of the author: This might not be the correct description of the | ||
| 389 | <constant>SUBCHANNEL-ID</constant> in all details, but it is my understanding of the technical | ||
| 390 | background needed to program a device)</para> | ||
| 391 | |||
| 392 | <para>An ISDB-Tsb channel (1 or 3 segments) can be broadcasted alone or in a | ||
| 393 | set of connected ISDB-Tsb channels. In this set of channels every | ||
| 394 | channel can be received independently. The number of connected | ||
| 395 | ISDB-Tsb segment can vary, e.g. depending on the frequency spectrum | ||
| 396 | bandwidth available.</para> | ||
| 397 | |||
| 398 | <para>Example: Assume 8 ISDB-Tsb connected segments are broadcasted. The | ||
| 399 | broadcaster has several possibilities to put those channels in the | ||
| 400 | air: Assuming a normal 13-segment ISDB-T spectrum he can align the 8 | ||
| 401 | segments from position 1-8 to 5-13 or anything in between.</para> | ||
| 402 | |||
| 403 | <para>The underlying layer of segments are subchannels: each segment is | ||
| 404 | consisting of several subchannels with a predefined IDs. A sub-channel | ||
| 405 | is used to help the demodulator to synchronize on the channel.</para> | ||
| 406 | |||
| 407 | <para>An ISDB-T channel is always centered over all sub-channels. As for | ||
| 408 | the example above, in ISDB-Tsb it is no longer as simple as that.</para> | ||
| 409 | |||
| 410 | <para><constant>The DTV_ISDBT_SB_SUBCHANNEL_ID</constant> parameter is used to give the | ||
| 411 | sub-channel ID of the segment to be demodulated.</para> | ||
| 412 | |||
| 413 | <para>Possible values: 0 .. 41, -1 (AUTO)</para> | ||
| 414 | </section> | ||
| 415 | <section id="DTV-ISDBT-SB-SEGMENT-IDX"> | ||
| 416 | <title><constant>DTV_ISDBT_SB_SEGMENT_IDX</constant></title> | ||
| 417 | <para>This field only applies if <constant>DTV_ISDBT_SOUND_BROADCASTING</constant> is '1'.</para> | ||
| 418 | <para><constant>DTV_ISDBT_SB_SEGMENT_IDX</constant> gives the index of the segment to be | ||
| 419 | demodulated for an ISDB-Tsb channel where several of them are | ||
| 420 | transmitted in the connected manner.</para> | ||
| 421 | <para>Possible values: 0 .. <constant>DTV_ISDBT_SB_SEGMENT_COUNT</constant> - 1</para> | ||
| 422 | <para>Note: This value cannot be determined by an automatic channel search.</para> | ||
| 423 | </section> | ||
| 424 | <section id="DTV-ISDBT-SB-SEGMENT-COUNT"> | ||
| 425 | <title><constant>DTV_ISDBT_SB_SEGMENT_COUNT</constant></title> | ||
| 426 | <para>This field only applies if <constant>DTV_ISDBT_SOUND_BROADCASTING</constant> is '1'.</para> | ||
| 427 | <para><constant>DTV_ISDBT_SB_SEGMENT_COUNT</constant> gives the total count of connected ISDB-Tsb | ||
| 428 | channels.</para> | ||
| 429 | <para>Possible values: 1 .. 13</para> | ||
| 430 | <para>Note: This value cannot be determined by an automatic channel search.</para> | ||
| 431 | </section> | ||
| 432 | <section id="isdb-hierq-layers"> | ||
| 433 | <title><constant>DTV-ISDBT-LAYER*</constant> parameters</title> | ||
| 434 | <para>ISDB-T channels can be coded hierarchically. As opposed to DVB-T in | ||
| 435 | ISDB-T hierarchical layers can be decoded simultaneously. For that | ||
| 436 | reason a ISDB-T demodulator has 3 viterbi and 3 reed-solomon-decoders.</para> | ||
| 437 | <para>ISDB-T has 3 hierarchical layers which each can use a part of the | ||
| 438 | available segments. The total number of segments over all layers has | ||
| 439 | to 13 in ISDB-T.</para> | ||
| 440 | <para>There are 3 parameter sets, for Layers A, B and C.</para> | ||
| 441 | <section id="DTV-ISDBT-LAYER-ENABLED"> | ||
| 442 | <title><constant>DTV_ISDBT_LAYER_ENABLED</constant></title> | ||
| 443 | <para>Hierarchical reception in ISDB-T is achieved by enabling or disabling | ||
| 444 | layers in the decoding process. Setting all bits of | ||
| 445 | <constant>DTV_ISDBT_LAYER_ENABLED</constant> to '1' forces all layers (if applicable) to be | ||
| 446 | demodulated. This is the default.</para> | ||
| 447 | <para>If the channel is in the partial reception mode | ||
| 448 | (<constant>DTV_ISDBT_PARTIAL_RECEPTION</constant> = 1) the central segment can be decoded | ||
| 449 | independently of the other 12 segments. In that mode layer A has to | ||
| 450 | have a <constant>SEGMENT_COUNT</constant> of 1.</para> | ||
| 451 | <para>In ISDB-Tsb only layer A is used, it can be 1 or 3 in ISDB-Tsb | ||
| 452 | according to <constant>DTV_ISDBT_PARTIAL_RECEPTION</constant>. <constant>SEGMENT_COUNT</constant> must be filled | ||
| 453 | accordingly.</para> | ||
| 454 | <para>Possible values: 0x1, 0x2, 0x4 (|-able)</para> | ||
| 455 | <para><constant>DTV_ISDBT_LAYER_ENABLED[0:0]</constant> - layer A</para> | ||
| 456 | <para><constant>DTV_ISDBT_LAYER_ENABLED[1:1]</constant> - layer B</para> | ||
| 457 | <para><constant>DTV_ISDBT_LAYER_ENABLED[2:2]</constant> - layer C</para> | ||
| 458 | <para><constant>DTV_ISDBT_LAYER_ENABLED[31:3]</constant> unused</para> | ||
| 459 | </section> | ||
| 460 | <section id="DTV-ISDBT-LAYER-FEC"> | ||
| 461 | <title><constant>DTV_ISDBT_LAYER*_FEC</constant></title> | ||
| 462 | <para>Possible values: <constant>FEC_AUTO</constant>, <constant>FEC_1_2</constant>, <constant>FEC_2_3</constant>, <constant>FEC_3_4</constant>, <constant>FEC_5_6</constant>, <constant>FEC_7_8</constant></para> | ||
| 463 | </section> | ||
| 464 | <section id="DTV-ISDBT-LAYER-MODULATION"> | ||
| 465 | <title><constant>DTV_ISDBT_LAYER*_MODULATION</constant></title> | ||
| 466 | <para>Possible values: <constant>QAM_AUTO</constant>, QP<constant>SK, QAM_16</constant>, <constant>QAM_64</constant>, <constant>DQPSK</constant></para> | ||
| 467 | <para>Note: If layer C is <constant>DQPSK</constant> layer B has to be <constant>DQPSK</constant>. If layer B is <constant>DQPSK</constant> | ||
| 468 | and <constant>DTV_ISDBT_PARTIAL_RECEPTION</constant>=0 layer has to be <constant>DQPSK</constant>.</para> | ||
| 469 | </section> | ||
| 470 | <section id="DTV-ISDBT-LAYER-SEGMENT-COUNT"> | ||
| 471 | <title><constant>DTV_ISDBT_LAYER*_SEGMENT_COUNT</constant></title> | ||
| 472 | <para>Possible values: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, -1 (AUTO)</para> | ||
| 473 | <para>Note: Truth table for <constant>DTV_ISDBT_SOUND_BROADCASTING</constant> and | ||
| 474 | <constant>DTV_ISDBT_PARTIAL_RECEPTION</constant> and <constant>LAYER</constant>*_SEGMENT_COUNT</para> | ||
| 475 | <informaltable id="isdbt-layer_seg-cnt-table"> | ||
| 476 | <tgroup cols="6"> | ||
| 477 | <tbody> | ||
| 478 | <row> | ||
| 479 | <entry>PR</entry> | ||
| 480 | <entry>SB</entry> | ||
| 481 | <entry>Layer A width</entry> | ||
| 482 | <entry>Layer B width</entry> | ||
| 483 | <entry>Layer C width</entry> | ||
| 484 | <entry>total width</entry> | ||
| 485 | </row> | ||
| 486 | <row> | ||
| 487 | <entry>0</entry> | ||
| 488 | <entry>0</entry> | ||
| 489 | <entry>1 .. 13</entry> | ||
| 490 | <entry>1 .. 13</entry> | ||
| 491 | <entry>1 .. 13</entry> | ||
| 492 | <entry>13</entry> | ||
| 493 | </row> | ||
| 494 | <row> | ||
| 495 | <entry>1</entry> | ||
| 496 | <entry>0</entry> | ||
| 497 | <entry>1</entry> | ||
| 498 | <entry>1 .. 13</entry> | ||
| 499 | <entry>1 .. 13</entry> | ||
| 500 | <entry>13</entry> | ||
| 501 | </row> | ||
| 502 | <row> | ||
| 503 | <entry>0</entry> | ||
| 504 | <entry>1</entry> | ||
| 505 | <entry>1</entry> | ||
| 506 | <entry>0</entry> | ||
| 507 | <entry>0</entry> | ||
| 508 | <entry>1</entry> | ||
| 509 | </row> | ||
| 510 | <row> | ||
| 511 | <entry>1</entry> | ||
| 512 | <entry>1</entry> | ||
| 513 | <entry>1</entry> | ||
| 514 | <entry>2</entry> | ||
| 515 | <entry>0</entry> | ||
| 516 | <entry>13</entry> | ||
| 517 | </row> | ||
| 518 | </tbody> | ||
| 519 | </tgroup> | ||
| 520 | </informaltable> | ||
| 521 | </section> | ||
| 522 | <section id="DTV-ISDBT-LAYER-TIME-INTERLEAVING"> | ||
| 523 | <title><constant>DTV_ISDBT_LAYER*_TIME_INTERLEAVING</constant></title> | ||
| 524 | <para>Possible values: 0, 1, 2, 3, -1 (AUTO)</para> | ||
| 525 | <para>Note: The real inter-leaver depth-names depend on the mode (fft-size); the values | ||
| 526 | here are referring to what can be found in the TMCC-structure - | ||
| 527 | independent of the mode.</para> | ||
| 528 | </section> | ||
| 529 | </section> | ||
| 530 | <section id="DTV-API-VERSION"> | ||
| 531 | <title><constant>DTV_API_VERSION</constant></title> | ||
| 532 | <para>Returns the major/minor version of the DVB API</para> | ||
| 533 | </section> | ||
| 534 | <section id="DTV-CODE-RATE-HP"> | ||
| 535 | <title><constant>DTV_CODE_RATE_HP</constant></title> | ||
| 536 | <para>Used on terrestrial transmissions. The acceptable values are: | ||
| 537 | </para> | ||
| 538 | <programlisting> | ||
| 539 | typedef enum fe_code_rate { | ||
| 540 | FEC_NONE = 0, | ||
| 541 | FEC_1_2, | ||
| 542 | FEC_2_3, | ||
| 543 | FEC_3_4, | ||
| 544 | FEC_4_5, | ||
| 545 | FEC_5_6, | ||
| 546 | FEC_6_7, | ||
| 547 | FEC_7_8, | ||
| 548 | FEC_8_9, | ||
| 549 | FEC_AUTO, | ||
| 550 | FEC_3_5, | ||
| 551 | FEC_9_10, | ||
| 552 | } fe_code_rate_t; | ||
| 553 | </programlisting> | ||
| 554 | </section> | ||
| 555 | <section id="DTV-CODE-RATE-LP"> | ||
| 556 | <title><constant>DTV_CODE_RATE_LP</constant></title> | ||
| 557 | <para>Used on terrestrial transmissions. The acceptable values are: | ||
| 558 | </para> | ||
| 559 | <programlisting> | ||
| 560 | typedef enum fe_code_rate { | ||
| 561 | FEC_NONE = 0, | ||
| 562 | FEC_1_2, | ||
| 563 | FEC_2_3, | ||
| 564 | FEC_3_4, | ||
| 565 | FEC_4_5, | ||
| 566 | FEC_5_6, | ||
| 567 | FEC_6_7, | ||
| 568 | FEC_7_8, | ||
| 569 | FEC_8_9, | ||
| 570 | FEC_AUTO, | ||
| 571 | FEC_3_5, | ||
| 572 | FEC_9_10, | ||
| 573 | } fe_code_rate_t; | ||
| 574 | </programlisting> | ||
| 575 | </section> | ||
| 576 | <section id="DTV-GUARD-INTERVAL"> | ||
| 577 | <title><constant>DTV_GUARD_INTERVAL</constant></title> | ||
| 578 | |||
| 579 | <para>Possible values are:</para> | ||
| 580 | <programlisting> | ||
| 581 | typedef enum fe_guard_interval { | ||
| 582 | GUARD_INTERVAL_1_32, | ||
| 583 | GUARD_INTERVAL_1_16, | ||
| 584 | GUARD_INTERVAL_1_8, | ||
| 585 | GUARD_INTERVAL_1_4, | ||
| 586 | GUARD_INTERVAL_AUTO, | ||
| 587 | GUARD_INTERVAL_1_128, | ||
| 588 | GUARD_INTERVAL_19_128, | ||
| 589 | GUARD_INTERVAL_19_256, | ||
| 590 | } fe_guard_interval_t; | ||
| 591 | </programlisting> | ||
| 592 | |||
| 593 | <para>Notes:</para> | ||
| 594 | <para>1) If <constant>DTV_GUARD_INTERVAL</constant> is set the <constant>GUARD_INTERVAL_AUTO</constant> the hardware will | ||
| 595 | try to find the correct guard interval (if capable) and will use TMCC to fill | ||
| 596 | in the missing parameters.</para> | ||
| 597 | <para>2) Intervals 1/128, 19/128 and 19/256 are used only for DVB-T2 at present</para> | ||
| 598 | </section> | ||
| 599 | <section id="DTV-TRANSMISSION-MODE"> | ||
| 600 | <title><constant>DTV_TRANSMISSION_MODE</constant></title> | ||
| 601 | |||
| 602 | <para>Specifies the number of carriers used by the standard</para> | ||
| 603 | |||
| 604 | <para>Possible values are:</para> | ||
| 605 | <programlisting> | ||
| 606 | typedef enum fe_transmit_mode { | ||
| 607 | TRANSMISSION_MODE_2K, | ||
| 608 | TRANSMISSION_MODE_8K, | ||
| 609 | TRANSMISSION_MODE_AUTO, | ||
| 610 | TRANSMISSION_MODE_4K, | ||
| 611 | TRANSMISSION_MODE_1K, | ||
| 612 | TRANSMISSION_MODE_16K, | ||
| 613 | TRANSMISSION_MODE_32K, | ||
| 614 | } fe_transmit_mode_t; | ||
| 615 | </programlisting> | ||
| 616 | <para>Notes:</para> | ||
| 617 | <para>1) ISDB-T supports three carrier/symbol-size: 8K, 4K, 2K. It is called | ||
| 618 | 'mode' in the standard: Mode 1 is 2K, mode 2 is 4K, mode 3 is 8K</para> | ||
| 619 | |||
| 620 | <para>2) If <constant>DTV_TRANSMISSION_MODE</constant> is set the <constant>TRANSMISSION_MODE_AUTO</constant> the | ||
| 621 | hardware will try to find the correct FFT-size (if capable) and will | ||
| 622 | use TMCC to fill in the missing parameters.</para> | ||
| 623 | <para>3) DVB-T specifies 2K and 8K as valid sizes.</para> | ||
| 624 | <para>4) DVB-T2 specifies 1K, 2K, 4K, 8K, 16K and 32K.</para> | ||
| 625 | </section> | ||
| 626 | <section id="DTV-HIERARCHY"> | ||
| 627 | <title><constant>DTV_HIERARCHY</constant></title> | ||
| 628 | <para>Frontend hierarchy</para> | ||
| 629 | <programlisting> | ||
| 630 | typedef enum fe_hierarchy { | ||
| 631 | HIERARCHY_NONE, | ||
| 632 | HIERARCHY_1, | ||
| 633 | HIERARCHY_2, | ||
| 634 | HIERARCHY_4, | ||
| 635 | HIERARCHY_AUTO | ||
| 636 | } fe_hierarchy_t; | ||
| 637 | </programlisting> | ||
| 638 | </section> | ||
| 639 | <section id="DTV-ISDBS-TS-ID"> | ||
| 640 | <title><constant>DTV_ISDBS_TS_ID</constant></title> | ||
| 641 | <para>Currently unused.</para> | ||
| 642 | </section> | ||
| 643 | <section id="DTV-DVBT2-PLP-ID"> | ||
| 644 | <title><constant>DTV_DVBT2_PLP_ID</constant></title> | ||
| 645 | <para>DVB-T2 supports Physical Layer Pipes (PLP) to allow transmission of | ||
| 646 | many data types via a single multiplex. The API will soon support this | ||
| 647 | at which point this section will be expanded.</para> | ||
| 648 | </section> | ||
| 649 | </section> | ||
| 650 | <section id="frontend-property-terrestrial-systems"> | ||
| 651 | <title>Properties used on terrestrial delivery systems</title> | ||
| 652 | <section id="dvbt-params"> | ||
| 653 | <title>DVB-T delivery system</title> | ||
| 654 | <para>The following parameters are valid for DVB-T:</para> | ||
| 655 | <itemizedlist mark='opencircle'> | ||
| 656 | <listitem><para><link linkend="DTV-API-VERSION"><constant>DTV_API_VERSION</constant></link></para></listitem> | ||
| 657 | <listitem><para><link linkend="DTV-DELIVERY-SYSTEM"><constant>DTV_DELIVERY_SYSTEM</constant></link></para></listitem> | ||
| 658 | <listitem><para><link linkend="DTV-TUNE"><constant>DTV_TUNE</constant></link></para></listitem> | ||
| 659 | <listitem><para><link linkend="DTV-CLEAR"><constant>DTV_CLEAR</constant></link></para></listitem> | ||
| 660 | <listitem><para><link linkend="DTV-FREQUENCY"><constant>DTV_FREQUENCY</constant></link></para></listitem> | ||
| 661 | <listitem><para><link linkend="DTV-MODULATION"><constant>DTV_MODULATION</constant></link></para></listitem> | ||
| 662 | <listitem><para><link linkend="DTV-BANDWIDTH-HZ"><constant>DTV_BANDWIDTH_HZ</constant></link></para></listitem> | ||
| 663 | <listitem><para><link linkend="DTV-INVERSION"><constant>DTV_INVERSION</constant></link></para></listitem> | ||
| 664 | <listitem><para><link linkend="DTV-CODE-RATE-HP"><constant>DTV_CODE_RATE_HP</constant></link></para></listitem> | ||
| 665 | <listitem><para><link linkend="DTV-CODE-RATE-LP"><constant>DTV_CODE_RATE_LP</constant></link></para></listitem> | ||
| 666 | <listitem><para><link linkend="DTV-GUARD-INTERVAL"><constant>DTV_GUARD_INTERVAL</constant></link></para></listitem> | ||
| 667 | <listitem><para><link linkend="DTV-TRANSMISSION-MODE"><constant>DTV_TRANSMISSION_MODE</constant></link></para></listitem> | ||
| 668 | <listitem><para><link linkend="DTV-HIERARCHY"><constant>DTV_HIERARCHY</constant></link></para></listitem> | ||
| 669 | </itemizedlist> | ||
| 670 | </section> | ||
| 671 | <section id="dvbt2-params"> | ||
| 672 | <title>DVB-T2 delivery system</title> | ||
| 673 | <para>DVB-T2 support is currently in the early stages | ||
| 674 | of development, so expect that this section maygrow and become | ||
| 675 | more detailed with time.</para> | ||
| 676 | <para>The following parameters are valid for DVB-T2:</para> | ||
| 677 | <itemizedlist mark='opencircle'> | ||
| 678 | <listitem><para><link linkend="DTV-API-VERSION"><constant>DTV_API_VERSION</constant></link></para></listitem> | ||
| 679 | <listitem><para><link linkend="DTV-DELIVERY-SYSTEM"><constant>DTV_DELIVERY_SYSTEM</constant></link></para></listitem> | ||
| 680 | <listitem><para><link linkend="DTV-TUNE"><constant>DTV_TUNE</constant></link></para></listitem> | ||
| 681 | <listitem><para><link linkend="DTV-CLEAR"><constant>DTV_CLEAR</constant></link></para></listitem> | ||
| 682 | <listitem><para><link linkend="DTV-FREQUENCY"><constant>DTV_FREQUENCY</constant></link></para></listitem> | ||
| 683 | <listitem><para><link linkend="DTV-MODULATION"><constant>DTV_MODULATION</constant></link></para></listitem> | ||
| 684 | <listitem><para><link linkend="DTV-BANDWIDTH-HZ"><constant>DTV_BANDWIDTH_HZ</constant></link></para></listitem> | ||
| 685 | <listitem><para><link linkend="DTV-INVERSION"><constant>DTV_INVERSION</constant></link></para></listitem> | ||
| 686 | <listitem><para><link linkend="DTV-CODE-RATE-HP"><constant>DTV_CODE_RATE_HP</constant></link></para></listitem> | ||
| 687 | <listitem><para><link linkend="DTV-CODE-RATE-LP"><constant>DTV_CODE_RATE_LP</constant></link></para></listitem> | ||
| 688 | <listitem><para><link linkend="DTV-GUARD-INTERVAL"><constant>DTV_GUARD_INTERVAL</constant></link></para></listitem> | ||
| 689 | <listitem><para><link linkend="DTV-TRANSMISSION-MODE"><constant>DTV_TRANSMISSION_MODE</constant></link></para></listitem> | ||
| 690 | <listitem><para><link linkend="DTV-HIERARCHY"><constant>DTV_HIERARCHY</constant></link></para></listitem> | ||
| 691 | <listitem><para><link linkend="DTV-DVBT2-PLP-ID"><constant>DTV_DVBT2_PLP_ID</constant></link></para></listitem> | ||
| 692 | </itemizedlist> | ||
| 693 | </section> | ||
| 694 | <section id="isdbt"> | ||
| 695 | <title>ISDB-T delivery system</title> | ||
| 696 | <para>This ISDB-T/ISDB-Tsb API extension should reflect all information | ||
| 697 | needed to tune any ISDB-T/ISDB-Tsb hardware. Of course it is possible | ||
| 698 | that some very sophisticated devices won't need certain parameters to | ||
| 699 | tune.</para> | ||
| 700 | <para>The information given here should help application writers to know how | ||
| 701 | to handle ISDB-T and ISDB-Tsb hardware using the Linux DVB-API.</para> | ||
| 702 | <para>The details given here about ISDB-T and ISDB-Tsb are just enough to | ||
| 703 | basically show the dependencies between the needed parameter values, | ||
| 704 | but surely some information is left out. For more detailed information | ||
| 705 | see the following documents:</para> | ||
| 706 | <para>ARIB STD-B31 - "Transmission System for Digital Terrestrial | ||
| 707 | Television Broadcasting" and</para> | ||
| 708 | <para>ARIB TR-B14 - "Operational Guidelines for Digital Terrestrial | ||
| 709 | Television Broadcasting".</para> | ||
| 710 | <para>In order to understand the ISDB specific parameters, | ||
| 711 | one has to have some knowledge the channel structure in | ||
| 712 | ISDB-T and ISDB-Tsb. I.e. it has to be known to | ||
| 713 | the reader that an ISDB-T channel consists of 13 segments, | ||
| 714 | that it can have up to 3 layer sharing those segments, | ||
| 715 | and things like that.</para> | ||
| 716 | <para>The following parameters are valid for ISDB-T:</para> | ||
| 717 | <itemizedlist mark='opencircle'> | ||
| 718 | <listitem><para><link linkend="DTV-API-VERSION"><constant>DTV_API_VERSION</constant></link></para></listitem> | ||
| 719 | <listitem><para><link linkend="DTV-DELIVERY-SYSTEM"><constant>DTV_DELIVERY_SYSTEM</constant></link></para></listitem> | ||
| 720 | <listitem><para><link linkend="DTV-TUNE"><constant>DTV_TUNE</constant></link></para></listitem> | ||
| 721 | <listitem><para><link linkend="DTV-CLEAR"><constant>DTV_CLEAR</constant></link></para></listitem> | ||
| 722 | <listitem><para><link linkend="DTV-FREQUENCY"><constant>DTV_FREQUENCY</constant></link></para></listitem> | ||
| 723 | <listitem><para><link linkend="DTV-MODULATION"><constant>DTV_MODULATION</constant></link></para></listitem> | ||
| 724 | <listitem><para><link linkend="DTV-BANDWIDTH-HZ"><constant>DTV_BANDWIDTH_HZ</constant></link></para></listitem> | ||
| 725 | <listitem><para><link linkend="DTV-INVERSION"><constant>DTV_INVERSION</constant></link></para></listitem> | ||
| 726 | <listitem><para><link linkend="DTV-CODE-RATE-HP"><constant>DTV_CODE_RATE_HP</constant></link></para></listitem> | ||
| 727 | <listitem><para><link linkend="DTV-CODE-RATE-LP"><constant>DTV_CODE_RATE_LP</constant></link></para></listitem> | ||
| 728 | <listitem><para><link linkend="DTV-GUARD-INTERVAL"><constant>DTV_GUARD_INTERVAL</constant></link></para></listitem> | ||
| 729 | <listitem><para><link linkend="DTV-TRANSMISSION-MODE"><constant>DTV_TRANSMISSION_MODE</constant></link></para></listitem> | ||
| 730 | <listitem><para><link linkend="DTV-HIERARCHY"><constant>DTV_HIERARCHY</constant></link></para></listitem> | ||
| 731 | <listitem><para><link linkend="DTV-ISDBT-LAYER-ENABLED"><constant>DTV_ISDBT_LAYER_ENABLED</constant></link></para></listitem> | ||
| 732 | <listitem><para><link linkend="DTV-ISDBT-PARTIAL-RECEPTION"><constant>DTV_ISDBT_PARTIAL_RECEPTION</constant></link></para></listitem> | ||
| 733 | <listitem><para><link linkend="DTV-ISDBT-SOUND-BROADCASTING"><constant>DTV_ISDBT_SOUND_BROADCASTING</constant></link></para></listitem> | ||
| 734 | <listitem><para><link linkend="DTV-ISDBT-SB-SUBCHANNEL-ID"><constant>DTV_ISDBT_SB_SUBCHANNEL_ID</constant></link></para></listitem> | ||
| 735 | <listitem><para><link linkend="DTV-ISDBT-SB-SEGMENT-IDX"><constant>DTV_ISDBT_SB_SEGMENT_IDX</constant></link></para></listitem> | ||
| 736 | <listitem><para><link linkend="DTV-ISDBT-SB-SEGMENT-COUNT"><constant>DTV_ISDBT_SB_SEGMENT_COUNT</constant></link></para></listitem> | ||
| 737 | <listitem><para><link linkend="DTV-ISDBT-LAYER-FEC"><constant>DTV_ISDBT_LAYERA_FEC</constant></link></para></listitem> | ||
| 738 | <listitem><para><link linkend="DTV-ISDBT-LAYER-MODULATION"><constant>DTV_ISDBT_LAYERA_MODULATION</constant></link></para></listitem> | ||
| 739 | <listitem><para><link linkend="DTV-ISDBT-LAYER-SEGMENT-COUNT"><constant>DTV_ISDBT_LAYERA_SEGMENT_COUNT</constant></link></para></listitem> | ||
| 740 | <listitem><para><link linkend="DTV-ISDBT-LAYER-TIME-INTERLEAVING"><constant>DTV_ISDBT_LAYERA_TIME_INTERLEAVING</constant></link></para></listitem> | ||
| 741 | <listitem><para><link linkend="DTV-ISDBT-LAYER-FEC"><constant>DTV_ISDBT_LAYERB_FEC</constant></link></para></listitem> | ||
| 742 | <listitem><para><link linkend="DTV-ISDBT-LAYER-MODULATION"><constant>DTV_ISDBT_LAYERB_MODULATION</constant></link></para></listitem> | ||
| 743 | <listitem><para><link linkend="DTV-ISDBT-LAYER-SEGMENT-COUNT"><constant>DTV_ISDBT_LAYERB_SEGMENT_COUNT</constant></link></para></listitem> | ||
| 744 | <listitem><para><link linkend="DTV-ISDBT-LAYER-TIME-INTERLEAVING"><constant>DTV_ISDBT_LAYERB_TIME_INTERLEAVING</constant></link></para></listitem> | ||
| 745 | <listitem><para><link linkend="DTV-ISDBT-LAYER-FEC"><constant>DTV_ISDBT_LAYERC_FEC</constant></link></para></listitem> | ||
| 746 | <listitem><para><link linkend="DTV-ISDBT-LAYER-MODULATION"><constant>DTV_ISDBT_LAYERC_MODULATION</constant></link></para></listitem> | ||
| 747 | <listitem><para><link linkend="DTV-ISDBT-LAYER-SEGMENT-COUNT"><constant>DTV_ISDBT_LAYERC_SEGMENT_COUNT</constant></link></para></listitem> | ||
| 748 | <listitem><para><link linkend="DTV-ISDBT-LAYER-TIME-INTERLEAVING"><constant>DTV_ISDBT_LAYERC_TIME_INTERLEAVING</constant></link></para></listitem> | ||
| 749 | </itemizedlist> | ||
| 750 | </section> | ||
| 751 | <section id="atsc-params"> | ||
| 752 | <title>ATSC delivery system</title> | ||
| 753 | <para>The following parameters are valid for ATSC:</para> | ||
| 754 | <itemizedlist mark='opencircle'> | ||
| 755 | <listitem><para><link linkend="DTV-API-VERSION"><constant>DTV_API_VERSION</constant></link></para></listitem> | ||
| 756 | <listitem><para><link linkend="DTV-DELIVERY-SYSTEM"><constant>DTV_DELIVERY_SYSTEM</constant></link></para></listitem> | ||
| 757 | <listitem><para><link linkend="DTV-TUNE"><constant>DTV_TUNE</constant></link></para></listitem> | ||
| 758 | <listitem><para><link linkend="DTV-CLEAR"><constant>DTV_CLEAR</constant></link></para></listitem> | ||
| 759 | <listitem><para><link linkend="DTV-FREQUENCY"><constant>DTV_FREQUENCY</constant></link></para></listitem> | ||
| 760 | <listitem><para><link linkend="DTV-MODULATION"><constant>DTV_MODULATION</constant></link></para></listitem> | ||
| 761 | <listitem><para><link linkend="DTV-BANDWIDTH-HZ"><constant>DTV_BANDWIDTH_HZ</constant></link></para></listitem> | ||
| 762 | </itemizedlist> | ||
| 763 | </section> | ||
| 764 | </section> | ||
| 765 | <section id="frontend-property-cable-systems"> | ||
| 766 | <title>Properties used on cable delivery systems</title> | ||
| 767 | <section id="dvbc-params"> | ||
| 768 | <title>DVB-C delivery system</title> | ||
| 769 | <para>The DVB-C Annex-A/C is the widely used cable standard. Transmission uses QAM modulation.</para> | ||
| 770 | <para>The following parameters are valid for DVB-C Annex A/C:</para> | ||
| 771 | <itemizedlist mark='opencircle'> | ||
| 772 | <listitem><para><link linkend="DTV-API-VERSION"><constant>DTV_API_VERSION</constant></link></para></listitem> | ||
| 773 | <listitem><para><link linkend="DTV-DELIVERY-SYSTEM"><constant>DTV_DELIVERY_SYSTEM</constant></link></para></listitem> | ||
| 774 | <listitem><para><link linkend="DTV-TUNE"><constant>DTV_TUNE</constant></link></para></listitem> | ||
| 775 | <listitem><para><link linkend="DTV-CLEAR"><constant>DTV_CLEAR</constant></link></para></listitem> | ||
| 776 | <listitem><para><link linkend="DTV-FREQUENCY"><constant>DTV_FREQUENCY</constant></link></para></listitem> | ||
| 777 | <listitem><para><link linkend="DTV-MODULATION"><constant>DTV_MODULATION</constant></link></para></listitem> | ||
| 778 | <listitem><para><link linkend="DTV-INVERSION"><constant>DTV_INVERSION</constant></link></para></listitem> | ||
| 779 | <listitem><para><link linkend="DTV-SYMBOL-RATE"><constant>DTV_SYMBOL_RATE</constant></link></para></listitem> | ||
| 780 | <listitem><para><link linkend="DTV-INNER-FEC"><constant>DTV_INNER_FEC</constant></link></para></listitem> | ||
| 781 | </itemizedlist> | ||
| 782 | </section> | ||
| 783 | <section id="dvbc-annex-b-params"> | ||
| 784 | <title>DVB-C Annex B delivery system</title> | ||
| 785 | <para>The DVB-C Annex-B is only used on a few Countries like the United States.</para> | ||
| 786 | <para>The following parameters are valid for DVB-C Annex B:</para> | ||
| 787 | <itemizedlist mark='opencircle'> | ||
| 788 | <listitem><para><link linkend="DTV-API-VERSION"><constant>DTV_API_VERSION</constant></link></para></listitem> | ||
| 789 | <listitem><para><link linkend="DTV-DELIVERY-SYSTEM"><constant>DTV_DELIVERY_SYSTEM</constant></link></para></listitem> | ||
| 790 | <listitem><para><link linkend="DTV-TUNE"><constant>DTV_TUNE</constant></link></para></listitem> | ||
| 791 | <listitem><para><link linkend="DTV-CLEAR"><constant>DTV_CLEAR</constant></link></para></listitem> | ||
| 792 | <listitem><para><link linkend="DTV-FREQUENCY"><constant>DTV_FREQUENCY</constant></link></para></listitem> | ||
| 793 | <listitem><para><link linkend="DTV-MODULATION"><constant>DTV_MODULATION</constant></link></para></listitem> | ||
| 794 | <listitem><para><link linkend="DTV-INVERSION"><constant>DTV_INVERSION</constant></link></para></listitem> | ||
| 795 | </itemizedlist> | ||
| 796 | </section> | ||
| 797 | </section> | ||
| 798 | <section id="frontend-property-satellital-systems"> | ||
| 799 | <title>Properties used on satellital delivery systems</title> | ||
| 800 | <section id="dvbs-params"> | ||
| 801 | <title>DVB-S delivery system</title> | ||
| 802 | <para>The following parameters are valid for DVB-S:</para> | ||
| 803 | <itemizedlist mark='opencircle'> | ||
| 804 | <listitem><para><link linkend="DTV-API-VERSION"><constant>DTV_API_VERSION</constant></link></para></listitem> | ||
| 805 | <listitem><para><link linkend="DTV-DELIVERY-SYSTEM"><constant>DTV_DELIVERY_SYSTEM</constant></link></para></listitem> | ||
| 806 | <listitem><para><link linkend="DTV-TUNE"><constant>DTV_TUNE</constant></link></para></listitem> | ||
| 807 | <listitem><para><link linkend="DTV-CLEAR"><constant>DTV_CLEAR</constant></link></para></listitem> | ||
| 808 | <listitem><para><link linkend="DTV-FREQUENCY"><constant>DTV_FREQUENCY</constant></link></para></listitem> | ||
| 809 | <listitem><para><link linkend="DTV-INVERSION"><constant>DTV_INVERSION</constant></link></para></listitem> | ||
| 810 | <listitem><para><link linkend="DTV-SYMBOL-RATE"><constant>DTV_SYMBOL_RATE</constant></link></para></listitem> | ||
| 811 | <listitem><para><link linkend="DTV-INNER-FEC"><constant>DTV_INNER_FEC</constant></link></para></listitem> | ||
| 812 | </itemizedlist> | ||
| 813 | <para>Future implementations might add those two missing parameters:</para> | ||
| 814 | <itemizedlist mark='opencircle'> | ||
| 815 | <listitem><para><link linkend="DTV-DISEQC-MASTER"><constant>DTV_DISEQC_MASTER</constant></link></para></listitem> | ||
| 816 | <listitem><para><link linkend="DTV-DISEQC-SLAVE-REPLY"><constant>DTV_DISEQC_SLAVE_REPLY</constant></link></para></listitem> | ||
| 817 | </itemizedlist> | ||
| 818 | </section> | ||
| 819 | <section id="dvbs2-params"> | ||
| 820 | <title>DVB-S2 delivery system</title> | ||
| 821 | <para>The following parameters are valid for DVB-S2:</para> | ||
| 822 | <itemizedlist mark='opencircle'> | ||
| 823 | <listitem><para><link linkend="DTV-API-VERSION"><constant>DTV_API_VERSION</constant></link></para></listitem> | ||
| 824 | <listitem><para><link linkend="DTV-DELIVERY-SYSTEM"><constant>DTV_DELIVERY_SYSTEM</constant></link></para></listitem> | ||
| 825 | <listitem><para><link linkend="DTV-TUNE"><constant>DTV_TUNE</constant></link></para></listitem> | ||
| 826 | <listitem><para><link linkend="DTV-CLEAR"><constant>DTV_CLEAR</constant></link></para></listitem> | ||
| 827 | <listitem><para><link linkend="DTV-FREQUENCY"><constant>DTV_FREQUENCY</constant></link></para></listitem> | ||
| 828 | <listitem><para><link linkend="DTV-INVERSION"><constant>DTV_INVERSION</constant></link></para></listitem> | ||
| 829 | <listitem><para><link linkend="DTV-SYMBOL-RATE"><constant>DTV_SYMBOL_RATE</constant></link></para></listitem> | ||
| 830 | <listitem><para><link linkend="DTV-INNER-FEC"><constant>DTV_INNER_FEC</constant></link></para></listitem> | ||
| 831 | <listitem><para><link linkend="DTV-VOLTAGE"><constant>DTV_VOLTAGE</constant></link></para></listitem> | ||
| 832 | <listitem><para><link linkend="DTV-TONE"><constant>DTV_TONE</constant></link></para></listitem> | ||
| 833 | <listitem><para><link linkend="DTV-PILOT"><constant>DTV_PILOT</constant></link></para></listitem> | ||
| 834 | <listitem><para><link linkend="DTV-ROLLOFF"><constant>DTV_ROLLOFF</constant></link></para></listitem> | ||
| 835 | </itemizedlist> | ||
| 836 | <para>Future implementations might add those two missing parameters:</para> | ||
| 837 | <itemizedlist mark='opencircle'> | ||
| 838 | <listitem><para><link linkend="DTV-DISEQC-MASTER"><constant>DTV_DISEQC_MASTER</constant></link></para></listitem> | ||
| 839 | <listitem><para><link linkend="DTV-DISEQC-SLAVE-REPLY"><constant>DTV_DISEQC_SLAVE_REPLY</constant></link></para></listitem> | ||
| 840 | </itemizedlist> | ||
| 841 | </section> | ||
| 842 | <section id="isdbs-params"> | ||
| 843 | <title>ISDB-S delivery system</title> | ||
| 844 | <para>The following parameters are valid for ISDB-S:</para> | ||
| 845 | <itemizedlist mark='opencircle'> | ||
| 846 | <listitem><para><link linkend="DTV-API-VERSION"><constant>DTV_API_VERSION</constant></link></para></listitem> | ||
| 847 | <listitem><para><link linkend="DTV-DELIVERY-SYSTEM"><constant>DTV_DELIVERY_SYSTEM</constant></link></para></listitem> | ||
| 848 | <listitem><para><link linkend="DTV-TUNE"><constant>DTV_TUNE</constant></link></para></listitem> | ||
| 849 | <listitem><para><link linkend="DTV-CLEAR"><constant>DTV_CLEAR</constant></link></para></listitem> | ||
| 850 | <listitem><para><link linkend="DTV-FREQUENCY"><constant>DTV_FREQUENCY</constant></link></para></listitem> | ||
| 851 | <listitem><para><link linkend="DTV-INVERSION"><constant>DTV_INVERSION</constant></link></para></listitem> | ||
| 852 | <listitem><para><link linkend="DTV-SYMBOL-RATE"><constant>DTV_SYMBOL_RATE</constant></link></para></listitem> | ||
| 853 | <listitem><para><link linkend="DTV-INNER-FEC"><constant>DTV_INNER_FEC</constant></link></para></listitem> | ||
| 854 | <listitem><para><link linkend="DTV-VOLTAGE"><constant>DTV_VOLTAGE</constant></link></para></listitem> | ||
| 855 | <listitem><para><link linkend="DTV-ISDBS-TS-ID"><constant>DTV_ISDBS_TS_ID</constant></link></para></listitem> | ||
| 856 | </itemizedlist> | ||
| 857 | </section> | ||
| 858 | </section> | ||
| 859 | </section> | ||
diff --git a/Documentation/DocBook/dvb/dvbstb.pdf b/Documentation/DocBook/media/dvb/dvbstb.pdf index 0fa75d90c3eb..0fa75d90c3eb 100644 --- a/Documentation/DocBook/dvb/dvbstb.pdf +++ b/Documentation/DocBook/media/dvb/dvbstb.pdf | |||
| Binary files differ | |||
diff --git a/Documentation/DocBook/dvb/examples.xml b/Documentation/DocBook/media/dvb/examples.xml index f037e568eb6e..f037e568eb6e 100644 --- a/Documentation/DocBook/dvb/examples.xml +++ b/Documentation/DocBook/media/dvb/examples.xml | |||
diff --git a/Documentation/DocBook/dvb/frontend.xml b/Documentation/DocBook/media/dvb/frontend.xml index 60c6976fb311..61407eaba020 100644 --- a/Documentation/DocBook/dvb/frontend.xml +++ b/Documentation/DocBook/media/dvb/frontend.xml | |||
| @@ -20,22 +20,52 @@ cards, in which case there exists no frontend device.</para> | |||
| 20 | <section id="frontend_types"> | 20 | <section id="frontend_types"> |
| 21 | <title>Frontend Data Types</title> | 21 | <title>Frontend Data Types</title> |
| 22 | 22 | ||
| 23 | <section id="frontend_type"> | 23 | <section id="fe-type-t"> |
| 24 | <title>frontend type</title> | 24 | <title>Frontend type</title> |
| 25 | 25 | ||
| 26 | <para>For historical reasons frontend types are named after the type of modulation used in | 26 | <para>For historical reasons, frontend types are named by the type of modulation used in |
| 27 | transmission.</para> | 27 | transmission. The fontend types are given by fe_type_t type, defined as:</para> |
| 28 | <programlisting> | 28 | |
| 29 | typedef enum fe_type { | 29 | <table pgwide="1" frame="none" id="fe-type"> |
| 30 | FE_QPSK, /⋆ DVB-S ⋆/ | 30 | <title>Frontend types</title> |
| 31 | FE_QAM, /⋆ DVB-C ⋆/ | 31 | <tgroup cols="3"> |
| 32 | FE_OFDM /⋆ DVB-T ⋆/ | 32 | &cs-def; |
| 33 | } fe_type_t; | 33 | <thead> |
| 34 | </programlisting> | 34 | <row> |
| 35 | 35 | <entry>fe_type</entry> | |
| 36 | <entry>Description</entry> | ||
| 37 | <entry><link linkend="DTV-DELIVERY-SYSTEM">DTV_DELIVERY_SYSTEM</link> equivalent type</entry> | ||
| 38 | </row> | ||
| 39 | </thead> | ||
| 40 | <tbody valign="top"> | ||
| 41 | <row> | ||
| 42 | <entry id="FE_QPSK"><constant>FE_QPSK</constant></entry> | ||
| 43 | <entry>For DVB-S standard</entry> | ||
| 44 | <entry><constant>SYS_DVBS</constant></entry> | ||
| 45 | </row> | ||
| 46 | <row> | ||
| 47 | <entry id="FE_QAM"><constant>FE_QAM</constant></entry> | ||
| 48 | <entry>For DVB-C annex A/C standard</entry> | ||
| 49 | <entry><constant>SYS_DVBC_ANNEX_AC</constant></entry> | ||
| 50 | </row> | ||
| 51 | <row> | ||
| 52 | <entry id="FE_OFDM"><constant>FE_OFDM</constant></entry> | ||
| 53 | <entry>For DVB-T standard</entry> | ||
| 54 | <entry><constant>SYS_DVBT</constant></entry> | ||
| 55 | </row> | ||
| 56 | <row> | ||
| 57 | <entry id="FE_ATSC"><constant>FE_ATSC</constant></entry> | ||
| 58 | <entry>For ATSC standard (terrestrial) or for DVB-C Annex B (cable) used in US.</entry> | ||
| 59 | <entry><constant>SYS_ATSC</constant> (terrestrial) or <constant>SYS_DVBC_ANNEX_B</constant> (cable)</entry> | ||
| 60 | </row> | ||
| 61 | </tbody></tgroup></table> | ||
| 62 | |||
| 63 | <para>Newer formats like DVB-S2, ISDB-T, ISDB-S and DVB-T2 are not described at the above, as they're | ||
| 64 | supported via the new <link linkend="FE_GET_SET_PROPERTY">FE_GET_PROPERTY/FE_GET_SET_PROPERTY</link> ioctl's, using the <link linkend="DTV-DELIVERY-SYSTEM">DTV_DELIVERY_SYSTEM</link> parameter. | ||
| 65 | </para> | ||
| 36 | </section> | 66 | </section> |
| 37 | 67 | ||
| 38 | <section id="frontend_caps"> | 68 | <section id="fe-caps-t"> |
| 39 | <title>frontend capabilities</title> | 69 | <title>frontend capabilities</title> |
| 40 | 70 | ||
| 41 | <para>Capabilities describe what a frontend can do. Some capabilities can only be supported for | 71 | <para>Capabilities describe what a frontend can do. Some capabilities can only be supported for |
| @@ -76,7 +106,7 @@ a specific frontend type.</para> | |||
| 76 | </programlisting> | 106 | </programlisting> |
| 77 | </section> | 107 | </section> |
| 78 | 108 | ||
| 79 | <section id="frontend_info"> | 109 | <section id="dvb-frontend-info"> |
| 80 | <title>frontend information</title> | 110 | <title>frontend information</title> |
| 81 | 111 | ||
| 82 | <para>Information about the frontend ca be queried with | 112 | <para>Information about the frontend ca be queried with |
| @@ -99,7 +129,7 @@ a specific frontend type.</para> | |||
| 99 | </programlisting> | 129 | </programlisting> |
| 100 | </section> | 130 | </section> |
| 101 | 131 | ||
| 102 | <section id="frontend_diseqc"> | 132 | <section id="dvb-diseqc-master-cmd"> |
| 103 | <title>diseqc master command</title> | 133 | <title>diseqc master command</title> |
| 104 | 134 | ||
| 105 | <para>A message sent from the frontend to DiSEqC capable equipment.</para> | 135 | <para>A message sent from the frontend to DiSEqC capable equipment.</para> |
| @@ -110,7 +140,7 @@ a specific frontend type.</para> | |||
| 110 | }; | 140 | }; |
| 111 | </programlisting> | 141 | </programlisting> |
| 112 | </section> | 142 | </section> |
| 113 | <section role="subsection"> | 143 | <section role="subsection" id="dvb-diseqc-slave-reply"> |
| 114 | <title>diseqc slave reply</title> | 144 | <title>diseqc slave reply</title> |
| 115 | 145 | ||
| 116 | <para>A reply to the frontend from DiSEqC 2.0 capable equipment.</para> | 146 | <para>A reply to the frontend from DiSEqC 2.0 capable equipment.</para> |
| @@ -123,7 +153,7 @@ a specific frontend type.</para> | |||
| 123 | </programlisting> | 153 | </programlisting> |
| 124 | </section> | 154 | </section> |
| 125 | 155 | ||
| 126 | <section id="frontend_diseqc_slave_reply"> | 156 | <section id="fe-sec-voltage-t"> |
| 127 | <title>diseqc slave reply</title> | 157 | <title>diseqc slave reply</title> |
| 128 | <para>The voltage is usually used with non-DiSEqC capable LNBs to switch the polarzation | 158 | <para>The voltage is usually used with non-DiSEqC capable LNBs to switch the polarzation |
| 129 | (horizontal/vertical). When using DiSEqC epuipment this voltage has to be switched | 159 | (horizontal/vertical). When using DiSEqC epuipment this voltage has to be switched |
| @@ -136,7 +166,7 @@ consistently to the DiSEqC commands as described in the DiSEqC spec.</para> | |||
| 136 | </programlisting> | 166 | </programlisting> |
| 137 | </section> | 167 | </section> |
| 138 | 168 | ||
| 139 | <section id="frontend_sec_tone"> | 169 | <section id="fe-sec-tone-mode-t"> |
| 140 | <title>SEC continuous tone</title> | 170 | <title>SEC continuous tone</title> |
| 141 | 171 | ||
| 142 | <para>The continuous 22KHz tone is usually used with non-DiSEqC capable LNBs to switch the | 172 | <para>The continuous 22KHz tone is usually used with non-DiSEqC capable LNBs to switch the |
| @@ -151,7 +181,7 @@ spec.</para> | |||
| 151 | </programlisting> | 181 | </programlisting> |
| 152 | </section> | 182 | </section> |
| 153 | 183 | ||
| 154 | <section id="frontend_sec_burst"> | 184 | <section id="fe-sec-mini-cmd-t"> |
| 155 | <title>SEC tone burst</title> | 185 | <title>SEC tone burst</title> |
| 156 | 186 | ||
| 157 | <para>The 22KHz tone burst is usually used with non-DiSEqC capable switches to select | 187 | <para>The 22KHz tone burst is usually used with non-DiSEqC capable switches to select |
| @@ -168,7 +198,7 @@ spec.</para> | |||
| 168 | <para></para> | 198 | <para></para> |
| 169 | </section> | 199 | </section> |
| 170 | 200 | ||
| 171 | <section id="frontend_status"> | 201 | <section id="fe-status-t"> |
| 172 | <title>frontend status</title> | 202 | <title>frontend status</title> |
| 173 | <para>Several functions of the frontend device use the fe_status data type defined | 203 | <para>Several functions of the frontend device use the fe_status data type defined |
| 174 | by</para> | 204 | by</para> |
| @@ -188,31 +218,54 @@ by</para> | |||
| 188 | 218 | ||
| 189 | </section> | 219 | </section> |
| 190 | 220 | ||
| 191 | <section id="frontend_params"> | 221 | <section id="dvb-frontend-parameters"> |
| 192 | <title>frontend parameters</title> | 222 | <title>frontend parameters</title> |
| 193 | <para>The kind of parameters passed to the frontend device for tuning depend on | 223 | <para>The kind of parameters passed to the frontend device for tuning depend on |
| 194 | the kind of hardware you are using. All kinds of parameters are combined as an | 224 | the kind of hardware you are using.</para> |
| 195 | union in the FrontendParameters structure:</para> | 225 | <para>The struct <constant>dvb_frontend_parameters</constant> uses an |
| 226 | union with specific per-system parameters. However, as newer delivery systems | ||
| 227 | required more data, the structure size weren't enough to fit, and just | ||
| 228 | extending its size would break the existing applications. So, those parameters | ||
| 229 | were replaced by the usage of <link linkend="FE_GET_SET_PROPERTY"> | ||
| 230 | <constant>FE_GET_PROPERTY/FE_SET_PROPERTY</constant></link> ioctl's. The | ||
| 231 | new API is flexible enough to add new parameters to existing delivery systems, | ||
| 232 | and to add newer delivery systems.</para> | ||
| 233 | <para>So, newer applications should use <link linkend="FE_GET_SET_PROPERTY"> | ||
| 234 | <constant>FE_GET_PROPERTY/FE_SET_PROPERTY</constant></link> instead, in | ||
| 235 | order to be able to support the newer System Delivery like DVB-S2, DVB-T2, | ||
| 236 | DVB-C2, ISDB, etc.</para> | ||
| 237 | <para>All kinds of parameters are combined as an union in the FrontendParameters structure:</para> | ||
| 196 | <programlisting> | 238 | <programlisting> |
| 197 | struct dvb_frontend_parameters { | 239 | struct dvb_frontend_parameters { |
| 198 | uint32_t frequency; /⋆ (absolute) frequency in Hz for QAM/OFDM ⋆/ | 240 | uint32_t frequency; /⋆ (absolute) frequency in Hz for QAM/OFDM ⋆/ |
| 199 | /⋆ intermediate frequency in kHz for QPSK ⋆/ | 241 | /⋆ intermediate frequency in kHz for QPSK ⋆/ |
| 200 | fe_spectral_inversion_t inversion; | 242 | fe_spectral_inversion_t inversion; |
| 201 | union { | 243 | union { |
| 202 | struct dvb_qpsk_parameters qpsk; | 244 | struct dvb_qpsk_parameters qpsk; |
| 203 | struct dvb_qam_parameters qam; | 245 | struct dvb_qam_parameters qam; |
| 204 | struct dvb_ofdm_parameters ofdm; | 246 | struct dvb_ofdm_parameters ofdm; |
| 205 | } u; | 247 | struct dvb_vsb_parameters vsb; |
| 206 | }; | 248 | } u; |
| 249 | }; | ||
| 207 | </programlisting> | 250 | </programlisting> |
| 208 | <para>For satellite QPSK frontends you have to use the <constant>QPSKParameters</constant> member defined by</para> | 251 | <para>In the case of QPSK frontends the <constant>frequency</constant> field specifies the intermediate |
| 252 | frequency, i.e. the offset which is effectively added to the local oscillator frequency (LOF) of | ||
| 253 | the LNB. The intermediate frequency has to be specified in units of kHz. For QAM and | ||
| 254 | OFDM frontends the <constant>frequency</constant> specifies the absolute frequency and is given in Hz. | ||
| 255 | </para> | ||
| 256 | <section id="dvb-qpsk-parameters"> | ||
| 257 | <title>QPSK parameters</title> | ||
| 258 | <para>For satellite QPSK frontends you have to use the <constant>dvb_qpsk_parameters</constant> structure:</para> | ||
| 209 | <programlisting> | 259 | <programlisting> |
| 210 | struct dvb_qpsk_parameters { | 260 | struct dvb_qpsk_parameters { |
| 211 | uint32_t symbol_rate; /⋆ symbol rate in Symbols per second ⋆/ | 261 | uint32_t symbol_rate; /⋆ symbol rate in Symbols per second ⋆/ |
| 212 | fe_code_rate_t fec_inner; /⋆ forward error correction (see above) ⋆/ | 262 | fe_code_rate_t fec_inner; /⋆ forward error correction (see above) ⋆/ |
| 213 | }; | 263 | }; |
| 214 | </programlisting> | 264 | </programlisting> |
| 215 | <para>for cable QAM frontend you use the <constant>QAMParameters</constant> structure</para> | 265 | </section> |
| 266 | <section id="dvb-qam-parameters"> | ||
| 267 | <title>QAM parameters</title> | ||
| 268 | <para>for cable QAM frontend you use the <constant>dvb_qam_parameters</constant> structure:</para> | ||
| 216 | <programlisting> | 269 | <programlisting> |
| 217 | struct dvb_qam_parameters { | 270 | struct dvb_qam_parameters { |
| 218 | uint32_t symbol_rate; /⋆ symbol rate in Symbols per second ⋆/ | 271 | uint32_t symbol_rate; /⋆ symbol rate in Symbols per second ⋆/ |
| @@ -220,8 +273,19 @@ union in the FrontendParameters structure:</para> | |||
| 220 | fe_modulation_t modulation; /⋆ modulation type (see above) ⋆/ | 273 | fe_modulation_t modulation; /⋆ modulation type (see above) ⋆/ |
| 221 | }; | 274 | }; |
| 222 | </programlisting> | 275 | </programlisting> |
| 223 | <para>DVB-T frontends are supported by the <constant>OFDMParamters</constant> structure | 276 | </section> |
| 224 | </para> | 277 | <section id="dvb-vsb-parameters"> |
| 278 | <title>VSB parameters</title> | ||
| 279 | <para>ATSC frontends are supported by the <constant>dvb_vsb_parameters</constant> structure:</para> | ||
| 280 | <programlisting> | ||
| 281 | struct dvb_vsb_parameters { | ||
| 282 | fe_modulation_t modulation; /⋆ modulation type (see above) ⋆/ | ||
| 283 | }; | ||
| 284 | </programlisting> | ||
| 285 | </section> | ||
| 286 | <section id="dvb-ofdm-parameters"> | ||
| 287 | <title>OFDM parameters</title> | ||
| 288 | <para>DVB-T frontends are supported by the <constant>dvb_ofdm_parameters</constant> structure:</para> | ||
| 225 | <programlisting> | 289 | <programlisting> |
| 226 | struct dvb_ofdm_parameters { | 290 | struct dvb_ofdm_parameters { |
| 227 | fe_bandwidth_t bandwidth; | 291 | fe_bandwidth_t bandwidth; |
| @@ -233,86 +297,124 @@ union in the FrontendParameters structure:</para> | |||
| 233 | fe_hierarchy_t hierarchy_information; | 297 | fe_hierarchy_t hierarchy_information; |
| 234 | }; | 298 | }; |
| 235 | </programlisting> | 299 | </programlisting> |
| 236 | <para>In the case of QPSK frontends the <constant>Frequency</constant> field specifies the intermediate | 300 | </section> |
| 237 | frequency, i.e. the offset which is effectively added to the local oscillator frequency (LOF) of | 301 | <section id="fe-spectral-inversion-t"> |
| 238 | the LNB. The intermediate frequency has to be specified in units of kHz. For QAM and | 302 | <title>frontend spectral inversion</title> |
| 239 | OFDM frontends the Frequency specifies the absolute frequency and is given in | ||
| 240 | Hz. | ||
| 241 | </para> | ||
| 242 | <para>The Inversion field can take one of these values: | 303 | <para>The Inversion field can take one of these values: |
| 243 | </para> | 304 | </para> |
| 244 | <programlisting> | 305 | <programlisting> |
| 245 | typedef enum fe_spectral_inversion { | 306 | typedef enum fe_spectral_inversion { |
| 246 | INVERSION_OFF, | 307 | INVERSION_OFF, |
| 247 | INVERSION_ON, | 308 | INVERSION_ON, |
| 248 | INVERSION_AUTO | 309 | INVERSION_AUTO |
| 249 | } fe_spectral_inversion_t; | 310 | } fe_spectral_inversion_t; |
| 250 | </programlisting> | 311 | </programlisting> |
| 251 | <para>It indicates if spectral inversion should be presumed or not. In the automatic setting | 312 | <para>It indicates if spectral inversion should be presumed or not. In the automatic setting |
| 252 | (<constant>INVERSION_AUTO</constant>) the hardware will try to figure out the correct setting by | 313 | (<constant>INVERSION_AUTO</constant>) the hardware will try to figure out the correct setting by |
| 253 | itself. | 314 | itself. |
| 254 | </para> | 315 | </para> |
| 255 | <para>The possible values for the <constant>FEC_inner</constant> field are | 316 | </section> |
| 317 | <section id="fe-code-rate-t"> | ||
| 318 | <title>frontend code rate</title> | ||
| 319 | <para>The possible values for the <constant>fec_inner</constant> field used on | ||
| 320 | <link refend="dvb-qpsk-parameters"><constant>struct dvb_qpsk_parameters</constant></link> and | ||
| 321 | <link refend="dvb-qam-parameters"><constant>struct dvb_qam_parameters</constant></link> are: | ||
| 256 | </para> | 322 | </para> |
| 257 | <programlisting> | 323 | <programlisting> |
| 258 | typedef enum fe_code_rate { | 324 | typedef enum fe_code_rate { |
| 259 | FEC_NONE = 0, | 325 | FEC_NONE = 0, |
| 260 | FEC_1_2, | 326 | FEC_1_2, |
| 261 | FEC_2_3, | 327 | FEC_2_3, |
| 262 | FEC_3_4, | 328 | FEC_3_4, |
| 263 | FEC_4_5, | 329 | FEC_4_5, |
| 264 | FEC_5_6, | 330 | FEC_5_6, |
| 265 | FEC_6_7, | 331 | FEC_6_7, |
| 266 | FEC_7_8, | 332 | FEC_7_8, |
| 267 | FEC_8_9, | 333 | FEC_8_9, |
| 268 | FEC_AUTO | 334 | FEC_AUTO, |
| 269 | } fe_code_rate_t; | 335 | FEC_3_5, |
| 336 | FEC_9_10, | ||
| 337 | } fe_code_rate_t; | ||
| 270 | </programlisting> | 338 | </programlisting> |
| 271 | <para>which correspond to error correction rates of 1/2, 2/3, etc., no error correction or auto | 339 | <para>which correspond to error correction rates of 1/2, 2/3, etc., no error correction or auto |
| 272 | detection. | 340 | detection. |
| 273 | </para> | 341 | </para> |
| 274 | <para>For cable and terrestrial frontends (QAM and OFDM) one also has to specify the quadrature | 342 | </section> |
| 275 | modulation mode which can be one of the following: | 343 | <section id="fe-modulation-t"> |
| 344 | <title>frontend modulation type for QAM, OFDM and VSB</title> | ||
| 345 | <para>For cable and terrestrial frontends, e. g. for | ||
| 346 | <link refend="dvb-qam-parameters"><constant>struct dvb_qpsk_parameters</constant></link>, | ||
| 347 | <link refend="dvb-ofdm-parameters"><constant>struct dvb_qam_parameters</constant></link> and | ||
| 348 | <link refend="dvb-vsb-parameters"><constant>struct dvb_qam_parameters</constant></link>, | ||
| 349 | it needs to specify the quadrature modulation mode which can be one of the following: | ||
| 276 | </para> | 350 | </para> |
| 277 | <programlisting> | 351 | <programlisting> |
| 278 | typedef enum fe_modulation { | 352 | typedef enum fe_modulation { |
| 279 | QPSK, | 353 | QPSK, |
| 280 | QAM_16, | 354 | QAM_16, |
| 281 | QAM_32, | 355 | QAM_32, |
| 282 | QAM_64, | 356 | QAM_64, |
| 283 | QAM_128, | 357 | QAM_128, |
| 284 | QAM_256, | 358 | QAM_256, |
| 285 | QAM_AUTO | 359 | QAM_AUTO, |
| 360 | VSB_8, | ||
| 361 | VSB_16, | ||
| 362 | PSK_8, | ||
| 363 | APSK_16, | ||
| 364 | APSK_32, | ||
| 365 | DQPSK, | ||
| 286 | } fe_modulation_t; | 366 | } fe_modulation_t; |
| 287 | </programlisting> | 367 | </programlisting> |
| 368 | </section> | ||
| 288 | <para>Finally, there are several more parameters for OFDM: | 369 | <para>Finally, there are several more parameters for OFDM: |
| 289 | </para> | 370 | </para> |
| 371 | <section id="fe-transmit-mode-t"> | ||
| 372 | <title>Number of carriers per channel</title> | ||
| 290 | <programlisting> | 373 | <programlisting> |
| 291 | typedef enum fe_transmit_mode { | 374 | typedef enum fe_transmit_mode { |
| 292 | TRANSMISSION_MODE_2K, | 375 | TRANSMISSION_MODE_2K, |
| 293 | TRANSMISSION_MODE_8K, | 376 | TRANSMISSION_MODE_8K, |
| 294 | TRANSMISSION_MODE_AUTO | 377 | TRANSMISSION_MODE_AUTO, |
| 378 | TRANSMISSION_MODE_4K, | ||
| 379 | TRANSMISSION_MODE_1K, | ||
| 380 | TRANSMISSION_MODE_16K, | ||
| 381 | TRANSMISSION_MODE_32K, | ||
| 295 | } fe_transmit_mode_t; | 382 | } fe_transmit_mode_t; |
| 296 | </programlisting> | 383 | </programlisting> |
| 297 | <programlisting> | 384 | </section> |
| 298 | typedef enum fe_bandwidth { | 385 | <section id="fe-bandwidth-t"> |
| 299 | BANDWIDTH_8_MHZ, | 386 | <title>frontend bandwidth</title> |
| 300 | BANDWIDTH_7_MHZ, | 387 | <programlisting> |
| 301 | BANDWIDTH_6_MHZ, | 388 | typedef enum fe_bandwidth { |
| 302 | BANDWIDTH_AUTO | 389 | BANDWIDTH_8_MHZ, |
| 303 | } fe_bandwidth_t; | 390 | BANDWIDTH_7_MHZ, |
| 391 | BANDWIDTH_6_MHZ, | ||
| 392 | BANDWIDTH_AUTO, | ||
| 393 | BANDWIDTH_5_MHZ, | ||
| 394 | BANDWIDTH_10_MHZ, | ||
| 395 | BANDWIDTH_1_712_MHZ, | ||
| 396 | } fe_bandwidth_t; | ||
| 304 | </programlisting> | 397 | </programlisting> |
| 305 | <programlisting> | 398 | </section> |
| 306 | typedef enum fe_guard_interval { | 399 | <section id="fe-guard-interval-t"> |
| 307 | GUARD_INTERVAL_1_32, | 400 | <title>frontend guard inverval</title> |
| 308 | GUARD_INTERVAL_1_16, | 401 | <programlisting> |
| 309 | GUARD_INTERVAL_1_8, | 402 | typedef enum fe_guard_interval { |
| 310 | GUARD_INTERVAL_1_4, | 403 | GUARD_INTERVAL_1_32, |
| 311 | GUARD_INTERVAL_AUTO | 404 | GUARD_INTERVAL_1_16, |
| 312 | } fe_guard_interval_t; | 405 | GUARD_INTERVAL_1_8, |
| 406 | GUARD_INTERVAL_1_4, | ||
| 407 | GUARD_INTERVAL_AUTO, | ||
| 408 | GUARD_INTERVAL_1_128, | ||
| 409 | GUARD_INTERVAL_19_128, | ||
| 410 | GUARD_INTERVAL_19_256, | ||
| 411 | } fe_guard_interval_t; | ||
| 313 | </programlisting> | 412 | </programlisting> |
| 314 | <programlisting> | 413 | </section> |
| 315 | typedef enum fe_hierarchy { | 414 | <section id="fe-hierarchy-t"> |
| 415 | <title>frontend hierarchy</title> | ||
| 416 | <programlisting> | ||
| 417 | typedef enum fe_hierarchy { | ||
| 316 | HIERARCHY_NONE, | 418 | HIERARCHY_NONE, |
| 317 | HIERARCHY_1, | 419 | HIERARCHY_1, |
| 318 | HIERARCHY_2, | 420 | HIERARCHY_2, |
| @@ -320,10 +422,11 @@ modulation mode which can be one of the following: | |||
| 320 | HIERARCHY_AUTO | 422 | HIERARCHY_AUTO |
| 321 | } fe_hierarchy_t; | 423 | } fe_hierarchy_t; |
| 322 | </programlisting> | 424 | </programlisting> |
| 425 | </section> | ||
| 323 | 426 | ||
| 324 | </section> | 427 | </section> |
| 325 | 428 | ||
| 326 | <section id="frontend_events"> | 429 | <section id="dvb-frontend-event"> |
| 327 | <title>frontend events</title> | 430 | <title>frontend events</title> |
| 328 | <programlisting> | 431 | <programlisting> |
| 329 | struct dvb_frontend_event { | 432 | struct dvb_frontend_event { |
| @@ -412,8 +515,7 @@ modulation mode which can be one of the following: | |||
| 412 | <para>(blocking mode is the default)</para> | 515 | <para>(blocking mode is the default)</para> |
| 413 | </entry> | 516 | </entry> |
| 414 | </row></tbody></tgroup></informaltable> | 517 | </row></tbody></tgroup></informaltable> |
| 415 | <para>ERRORS | 518 | <para>RETURN VALUE</para> |
| 416 | </para> | ||
| 417 | <informaltable><tgroup cols="2"><tbody><row><entry | 519 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 418 | align="char"> | 520 | align="char"> |
| 419 | <para>ENODEV</para> | 521 | <para>ENODEV</para> |
| @@ -473,8 +575,7 @@ modulation mode which can be one of the following: | |||
| 473 | <para>File descriptor returned by a previous call to open().</para> | 575 | <para>File descriptor returned by a previous call to open().</para> |
| 474 | </entry> | 576 | </entry> |
| 475 | </row></tbody></tgroup></informaltable> | 577 | </row></tbody></tgroup></informaltable> |
| 476 | <para>ERRORS | 578 | <para>RETURN VALUE</para> |
| 477 | </para> | ||
| 478 | <informaltable><tgroup cols="2"><tbody><row><entry | 579 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 479 | align="char"> | 580 | align="char"> |
| 480 | <para>EBADF</para> | 581 | <para>EBADF</para> |
| @@ -530,8 +631,7 @@ modulation mode which can be one of the following: | |||
| 530 | to be stored.</para> | 631 | to be stored.</para> |
| 531 | </entry> | 632 | </entry> |
| 532 | </row></tbody></tgroup></informaltable> | 633 | </row></tbody></tgroup></informaltable> |
| 533 | <para>ERRORS | 634 | <para>RETURN VALUE</para> |
| 534 | </para> | ||
| 535 | <informaltable><tgroup cols="2"><tbody><row><entry | 635 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 536 | align="char"> | 636 | align="char"> |
| 537 | <para>EBADF</para> | 637 | <para>EBADF</para> |
| @@ -592,38 +692,8 @@ modulation mode which can be one of the following: | |||
| 592 | <para>The bit error rate is stored into *ber.</para> | 692 | <para>The bit error rate is stored into *ber.</para> |
| 593 | </entry> | 693 | </entry> |
| 594 | </row></tbody></tgroup></informaltable> | 694 | </row></tbody></tgroup></informaltable> |
| 595 | <para>ERRORS | 695 | |
| 596 | </para> | 696 | &return-value-dvb; |
| 597 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 598 | align="char"> | ||
| 599 | <para>EBADF</para> | ||
| 600 | </entry><entry | ||
| 601 | align="char"> | ||
| 602 | <para>fd is not a valid open file descriptor.</para> | ||
| 603 | </entry> | ||
| 604 | </row><row><entry | ||
| 605 | align="char"> | ||
| 606 | <para>EFAULT</para> | ||
| 607 | </entry><entry | ||
| 608 | align="char"> | ||
| 609 | <para>ber points to invalid address.</para> | ||
| 610 | </entry> | ||
| 611 | </row><row><entry | ||
| 612 | align="char"> | ||
| 613 | <para>ENOSIGNAL</para> | ||
| 614 | </entry><entry | ||
| 615 | align="char"> | ||
| 616 | <para>There is no signal, thus no meaningful bit error rate. Also | ||
| 617 | returned if the front-end is not turned on.</para> | ||
| 618 | </entry> | ||
| 619 | </row><row><entry | ||
| 620 | align="char"> | ||
| 621 | <para>ENOSYS</para> | ||
| 622 | </entry><entry | ||
| 623 | align="char"> | ||
| 624 | <para>Function not available for this device.</para> | ||
| 625 | </entry> | ||
| 626 | </row></tbody></tgroup></informaltable> | ||
| 627 | </section> | 697 | </section> |
| 628 | 698 | ||
| 629 | <section id="FE_READ_SNR"> | 699 | <section id="FE_READ_SNR"> |
| @@ -670,38 +740,7 @@ modulation mode which can be one of the following: | |||
| 670 | </entry> | 740 | </entry> |
| 671 | </row></tbody></tgroup></informaltable> | 741 | </row></tbody></tgroup></informaltable> |
| 672 | 742 | ||
| 673 | <para>ERRORS | 743 | &return-value-dvb; |
| 674 | </para> | ||
| 675 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 676 | align="char"> | ||
| 677 | <para>EBADF</para> | ||
| 678 | </entry><entry | ||
| 679 | align="char"> | ||
| 680 | <para>fd is not a valid open file descriptor.</para> | ||
| 681 | </entry> | ||
| 682 | </row><row><entry | ||
| 683 | align="char"> | ||
| 684 | <para>EFAULT</para> | ||
| 685 | </entry><entry | ||
| 686 | align="char"> | ||
| 687 | <para>snr points to invalid address.</para> | ||
| 688 | </entry> | ||
| 689 | </row><row><entry | ||
| 690 | align="char"> | ||
| 691 | <para>ENOSIGNAL</para> | ||
| 692 | </entry><entry | ||
| 693 | align="char"> | ||
| 694 | <para>There is no signal, thus no meaningful signal strength | ||
| 695 | value. Also returned if front-end is not turned on.</para> | ||
| 696 | </entry> | ||
| 697 | </row><row><entry | ||
| 698 | align="char"> | ||
| 699 | <para>ENOSYS</para> | ||
| 700 | </entry><entry | ||
| 701 | align="char"> | ||
| 702 | <para>Function not available for this device.</para> | ||
| 703 | </entry> | ||
| 704 | </row></tbody></tgroup></informaltable> | ||
| 705 | </section> | 744 | </section> |
| 706 | 745 | ||
| 707 | <section id="FE_READ_SIGNAL_STRENGTH"> | 746 | <section id="FE_READ_SIGNAL_STRENGTH"> |
| @@ -748,38 +787,8 @@ modulation mode which can be one of the following: | |||
| 748 | <para>The signal strength value is stored into *strength.</para> | 787 | <para>The signal strength value is stored into *strength.</para> |
| 749 | </entry> | 788 | </entry> |
| 750 | </row></tbody></tgroup></informaltable> | 789 | </row></tbody></tgroup></informaltable> |
| 751 | <para>ERRORS | 790 | |
| 752 | </para> | 791 | &return-value-dvb; |
| 753 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 754 | align="char"> | ||
| 755 | <para>EBADF</para> | ||
| 756 | </entry><entry | ||
| 757 | align="char"> | ||
| 758 | <para>fd is not a valid open file descriptor.</para> | ||
| 759 | </entry> | ||
| 760 | </row><row><entry | ||
| 761 | align="char"> | ||
| 762 | <para>EFAULT</para> | ||
| 763 | </entry><entry | ||
| 764 | align="char"> | ||
| 765 | <para>status points to invalid address.</para> | ||
| 766 | </entry> | ||
| 767 | </row><row><entry | ||
| 768 | align="char"> | ||
| 769 | <para>ENOSIGNAL</para> | ||
| 770 | </entry><entry | ||
| 771 | align="char"> | ||
| 772 | <para>There is no signal, thus no meaningful signal strength | ||
| 773 | value. Also returned if front-end is not turned on.</para> | ||
| 774 | </entry> | ||
| 775 | </row><row><entry | ||
| 776 | align="char"> | ||
| 777 | <para>ENOSYS</para> | ||
| 778 | </entry><entry | ||
| 779 | align="char"> | ||
| 780 | <para>Function not available for this device.</para> | ||
| 781 | </entry> | ||
| 782 | </row></tbody></tgroup></informaltable> | ||
| 783 | </section> | 792 | </section> |
| 784 | 793 | ||
| 785 | <section id="FE_READ_UNCORRECTED_BLOCKS"> | 794 | <section id="FE_READ_UNCORRECTED_BLOCKS"> |
| @@ -833,30 +842,8 @@ modulation mode which can be one of the following: | |||
| 833 | so far.</para> | 842 | so far.</para> |
| 834 | </entry> | 843 | </entry> |
| 835 | </row></tbody></tgroup></informaltable> | 844 | </row></tbody></tgroup></informaltable> |
| 836 | <para>ERRORS | 845 | |
| 837 | </para> | 846 | &return-value-dvb; |
| 838 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 839 | align="char"> | ||
| 840 | <para>EBADF</para> | ||
| 841 | </entry><entry | ||
| 842 | align="char"> | ||
| 843 | <para>fd is not a valid open file descriptor.</para> | ||
| 844 | </entry> | ||
| 845 | </row><row><entry | ||
| 846 | align="char"> | ||
| 847 | <para>EFAULT</para> | ||
| 848 | </entry><entry | ||
| 849 | align="char"> | ||
| 850 | <para>ublocks points to invalid address.</para> | ||
| 851 | </entry> | ||
| 852 | </row><row><entry | ||
| 853 | align="char"> | ||
| 854 | <para>ENOSYS</para> | ||
| 855 | </entry><entry | ||
| 856 | align="char"> | ||
| 857 | <para>Function not available for this device.</para> | ||
| 858 | </entry> | ||
| 859 | </row></tbody></tgroup></informaltable> | ||
| 860 | </section> | 847 | </section> |
| 861 | 848 | ||
| 862 | <section id="FE_SET_FRONTEND"> | 849 | <section id="FE_SET_FRONTEND"> |
| @@ -909,24 +896,10 @@ modulation mode which can be one of the following: | |||
| 909 | <para>Points to parameters for tuning operation.</para> | 896 | <para>Points to parameters for tuning operation.</para> |
| 910 | </entry> | 897 | </entry> |
| 911 | </row></tbody></tgroup></informaltable> | 898 | </row></tbody></tgroup></informaltable> |
| 912 | <para>ERRORS | 899 | |
| 913 | </para> | 900 | &return-value-dvb; |
| 914 | <informaltable><tgroup cols="2"><tbody><row><entry | 901 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 915 | align="char"> | 902 | align="char"> |
| 916 | <para>EBADF</para> | ||
| 917 | </entry><entry | ||
| 918 | align="char"> | ||
| 919 | <para>fd is not a valid open file descriptor.</para> | ||
| 920 | </entry> | ||
| 921 | </row><row><entry | ||
| 922 | align="char"> | ||
| 923 | <para>EFAULT</para> | ||
| 924 | </entry><entry | ||
| 925 | align="char"> | ||
| 926 | <para>p points to invalid address.</para> | ||
| 927 | </entry> | ||
| 928 | </row><row><entry | ||
| 929 | align="char"> | ||
| 930 | <para>EINVAL</para> | 903 | <para>EINVAL</para> |
| 931 | </entry><entry | 904 | </entry><entry |
| 932 | align="char"> | 905 | align="char"> |
| @@ -982,25 +955,9 @@ modulation mode which can be one of the following: | |||
| 982 | </entry> | 955 | </entry> |
| 983 | </row></tbody></tgroup></informaltable> | 956 | </row></tbody></tgroup></informaltable> |
| 984 | 957 | ||
| 985 | <para>ERRORS | 958 | &return-value-dvb; |
| 986 | </para> | ||
| 987 | |||
| 988 | <informaltable><tgroup cols="2"><tbody><row><entry | 959 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 989 | align="char"> | 960 | align="char"> |
| 990 | <para>EBADF</para> | ||
| 991 | </entry><entry | ||
| 992 | align="char"> | ||
| 993 | <para>fd is not a valid open file descriptor.</para> | ||
| 994 | </entry> | ||
| 995 | </row><row><entry | ||
| 996 | align="char"> | ||
| 997 | <para>EFAULT</para> | ||
| 998 | </entry><entry | ||
| 999 | align="char"> | ||
| 1000 | <para>p points to invalid address.</para> | ||
| 1001 | </entry> | ||
| 1002 | </row><row><entry | ||
| 1003 | align="char"> | ||
| 1004 | <para>EINVAL</para> | 961 | <para>EINVAL</para> |
| 1005 | </entry><entry | 962 | </entry><entry |
| 1006 | align="char"> | 963 | align="char"> |
| @@ -1084,24 +1041,9 @@ modulation mode which can be one of the following: | |||
| 1084 | </entry> | 1041 | </entry> |
| 1085 | </row></tbody></tgroup></informaltable> | 1042 | </row></tbody></tgroup></informaltable> |
| 1086 | 1043 | ||
| 1087 | <para>ERRORS | 1044 | &return-value-dvb; |
| 1088 | </para> | ||
| 1089 | <informaltable><tgroup cols="2"><tbody><row><entry | 1045 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 1090 | align="char"> | 1046 | align="char"> |
| 1091 | <para>EBADF</para> | ||
| 1092 | </entry><entry | ||
| 1093 | align="char"> | ||
| 1094 | <para>fd is not a valid open file descriptor.</para> | ||
| 1095 | </entry> | ||
| 1096 | </row><row><entry | ||
| 1097 | align="char"> | ||
| 1098 | <para>EFAULT</para> | ||
| 1099 | </entry><entry | ||
| 1100 | align="char"> | ||
| 1101 | <para>ev points to invalid address.</para> | ||
| 1102 | </entry> | ||
| 1103 | </row><row><entry | ||
| 1104 | align="char"> | ||
| 1105 | <para>EWOULDBLOCK</para> | 1047 | <para>EWOULDBLOCK</para> |
| 1106 | </entry><entry | 1048 | </entry><entry |
| 1107 | align="char"> | 1049 | align="char"> |
| @@ -1113,11 +1055,6 @@ modulation mode which can be one of the following: | |||
| 1113 | <para>EOVERFLOW</para> | 1055 | <para>EOVERFLOW</para> |
| 1114 | </entry><entry | 1056 | </entry><entry |
| 1115 | align="char"> | 1057 | align="char"> |
| 1116 | </entry> | ||
| 1117 | </row><row><entry | ||
| 1118 | align="char"> | ||
| 1119 | </entry><entry | ||
| 1120 | align="char"> | ||
| 1121 | <para>Overflow in event queue - one or more events were lost.</para> | 1058 | <para>Overflow in event queue - one or more events were lost.</para> |
| 1122 | </entry> | 1059 | </entry> |
| 1123 | </row></tbody></tgroup></informaltable> | 1060 | </row></tbody></tgroup></informaltable> |
| @@ -1170,23 +1107,7 @@ modulation mode which can be one of the following: | |||
| 1170 | to be stored.</para> | 1107 | to be stored.</para> |
| 1171 | </entry> | 1108 | </entry> |
| 1172 | </row></tbody></tgroup></informaltable> | 1109 | </row></tbody></tgroup></informaltable> |
| 1173 | <para>ERRORS | 1110 | &return-value-dvb; |
| 1174 | </para> | ||
| 1175 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 1176 | align="char"> | ||
| 1177 | <para>EBADF</para> | ||
| 1178 | </entry><entry | ||
| 1179 | align="char"> | ||
| 1180 | <para>fd is not a valid open file descriptor.</para> | ||
| 1181 | </entry> | ||
| 1182 | </row><row><entry | ||
| 1183 | align="char"> | ||
| 1184 | <para>EFAULT</para> | ||
| 1185 | </entry><entry | ||
| 1186 | align="char"> | ||
| 1187 | <para>info points to invalid address.</para> | ||
| 1188 | </entry> | ||
| 1189 | </row></tbody></tgroup></informaltable> | ||
| 1190 | </section> | 1111 | </section> |
| 1191 | 1112 | ||
| 1192 | <section id="FE_DISEQC_RESET_OVERLOAD"> | 1113 | <section id="FE_DISEQC_RESET_OVERLOAD"> |
| @@ -1229,30 +1150,7 @@ modulation mode which can be one of the following: | |||
| 1229 | </entry> | 1150 | </entry> |
| 1230 | </row></tbody></tgroup></informaltable> | 1151 | </row></tbody></tgroup></informaltable> |
| 1231 | 1152 | ||
| 1232 | <para>ERRORS | 1153 | &return-value-dvb; |
| 1233 | </para> | ||
| 1234 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 1235 | align="char"> | ||
| 1236 | <para>EBADF</para> | ||
| 1237 | </entry><entry | ||
| 1238 | align="char"> | ||
| 1239 | <para>fd is not a valid file descriptor.</para> | ||
| 1240 | </entry> | ||
| 1241 | </row><row><entry | ||
| 1242 | align="char"> | ||
| 1243 | <para>EPERM</para> | ||
| 1244 | </entry><entry | ||
| 1245 | align="char"> | ||
| 1246 | <para>Permission denied (needs read/write access).</para> | ||
| 1247 | </entry> | ||
| 1248 | </row><row><entry | ||
| 1249 | align="char"> | ||
| 1250 | <para>EINTERNAL</para> | ||
| 1251 | </entry><entry | ||
| 1252 | align="char"> | ||
| 1253 | <para>Internal error in the device driver.</para> | ||
| 1254 | </entry> | ||
| 1255 | </row></tbody></tgroup></informaltable> | ||
| 1256 | </section> | 1154 | </section> |
| 1257 | 1155 | ||
| 1258 | <section id="FE_DISEQC_SEND_MASTER_CMD"> | 1156 | <section id="FE_DISEQC_SEND_MASTER_CMD"> |
| @@ -1302,45 +1200,7 @@ modulation mode which can be one of the following: | |||
| 1302 | </entry> | 1200 | </entry> |
| 1303 | </row></tbody></tgroup></informaltable> | 1201 | </row></tbody></tgroup></informaltable> |
| 1304 | 1202 | ||
| 1305 | <para>ERRORS | 1203 | &return-value-dvb; |
| 1306 | </para> | ||
| 1307 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 1308 | align="char"> | ||
| 1309 | <para>EBADF</para> | ||
| 1310 | </entry><entry | ||
| 1311 | align="char"> | ||
| 1312 | <para>fd is not a valid file descriptor.</para> | ||
| 1313 | </entry> | ||
| 1314 | </row><row><entry | ||
| 1315 | align="char"> | ||
| 1316 | <para>EFAULT</para> | ||
| 1317 | </entry><entry | ||
| 1318 | align="char"> | ||
| 1319 | <para>Seq points to an invalid address.</para> | ||
| 1320 | </entry> | ||
| 1321 | </row><row><entry | ||
| 1322 | align="char"> | ||
| 1323 | <para>EINVAL</para> | ||
| 1324 | </entry><entry | ||
| 1325 | align="char"> | ||
| 1326 | <para>The data structure referred to by seq is invalid in some | ||
| 1327 | way.</para> | ||
| 1328 | </entry> | ||
| 1329 | </row><row><entry | ||
| 1330 | align="char"> | ||
| 1331 | <para>EPERM</para> | ||
| 1332 | </entry><entry | ||
| 1333 | align="char"> | ||
| 1334 | <para>Permission denied (needs read/write access).</para> | ||
| 1335 | </entry> | ||
| 1336 | </row><row><entry | ||
| 1337 | align="char"> | ||
| 1338 | <para>EINTERNAL</para> | ||
| 1339 | </entry><entry | ||
| 1340 | align="char"> | ||
| 1341 | <para>Internal error in the device driver.</para> | ||
| 1342 | </entry> | ||
| 1343 | </row></tbody></tgroup></informaltable> | ||
| 1344 | </section> | 1204 | </section> |
| 1345 | 1205 | ||
| 1346 | <section id="FE_DISEQC_RECV_SLAVE_REPLY"> | 1206 | <section id="FE_DISEQC_RECV_SLAVE_REPLY"> |
| @@ -1390,45 +1250,7 @@ modulation mode which can be one of the following: | |||
| 1390 | <para>Pointer to the command to be received.</para> | 1250 | <para>Pointer to the command to be received.</para> |
| 1391 | </entry> | 1251 | </entry> |
| 1392 | </row></tbody></tgroup></informaltable> | 1252 | </row></tbody></tgroup></informaltable> |
| 1393 | <para>ERRORS | 1253 | &return-value-dvb; |
| 1394 | </para> | ||
| 1395 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 1396 | align="char"> | ||
| 1397 | <para>EBADF</para> | ||
| 1398 | </entry><entry | ||
| 1399 | align="char"> | ||
| 1400 | <para>fd is not a valid file descriptor.</para> | ||
| 1401 | </entry> | ||
| 1402 | </row><row><entry | ||
| 1403 | align="char"> | ||
| 1404 | <para>EFAULT</para> | ||
| 1405 | </entry><entry | ||
| 1406 | align="char"> | ||
| 1407 | <para>Seq points to an invalid address.</para> | ||
| 1408 | </entry> | ||
| 1409 | </row><row><entry | ||
| 1410 | align="char"> | ||
| 1411 | <para>EINVAL</para> | ||
| 1412 | </entry><entry | ||
| 1413 | align="char"> | ||
| 1414 | <para>The data structure referred to by seq is invalid in some | ||
| 1415 | way.</para> | ||
| 1416 | </entry> | ||
| 1417 | </row><row><entry | ||
| 1418 | align="char"> | ||
| 1419 | <para>EPERM</para> | ||
| 1420 | </entry><entry | ||
| 1421 | align="char"> | ||
| 1422 | <para>Permission denied (needs read/write access).</para> | ||
| 1423 | </entry> | ||
| 1424 | </row><row><entry | ||
| 1425 | align="char"> | ||
| 1426 | <para>EINTERNAL</para> | ||
| 1427 | </entry><entry | ||
| 1428 | align="char"> | ||
| 1429 | <para>Internal error in the device driver.</para> | ||
| 1430 | </entry> | ||
| 1431 | </row></tbody></tgroup></informaltable> | ||
| 1432 | </section> | 1254 | </section> |
| 1433 | 1255 | ||
| 1434 | <section id="FE_DISEQC_SEND_BURST"> | 1256 | <section id="FE_DISEQC_SEND_BURST"> |
| @@ -1476,45 +1298,7 @@ modulation mode which can be one of the following: | |||
| 1476 | </entry> | 1298 | </entry> |
| 1477 | </row></tbody></tgroup></informaltable> | 1299 | </row></tbody></tgroup></informaltable> |
| 1478 | 1300 | ||
| 1479 | <para>ERRORS | 1301 | &return-value-dvb; |
| 1480 | </para> | ||
| 1481 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 1482 | align="char"> | ||
| 1483 | <para>EBADF</para> | ||
| 1484 | </entry><entry | ||
| 1485 | align="char"> | ||
| 1486 | <para>fd is not a valid file descriptor.</para> | ||
| 1487 | </entry> | ||
| 1488 | </row><row><entry | ||
| 1489 | align="char"> | ||
| 1490 | <para>EFAULT</para> | ||
| 1491 | </entry><entry | ||
| 1492 | align="char"> | ||
| 1493 | <para>Seq points to an invalid address.</para> | ||
| 1494 | </entry> | ||
| 1495 | </row><row><entry | ||
| 1496 | align="char"> | ||
| 1497 | <para>EINVAL</para> | ||
| 1498 | </entry><entry | ||
| 1499 | align="char"> | ||
| 1500 | <para>The data structure referred to by seq is invalid in some | ||
| 1501 | way.</para> | ||
| 1502 | </entry> | ||
| 1503 | </row><row><entry | ||
| 1504 | align="char"> | ||
| 1505 | <para>EPERM</para> | ||
| 1506 | </entry><entry | ||
| 1507 | align="char"> | ||
| 1508 | <para>Permission denied (needs read/write access).</para> | ||
| 1509 | </entry> | ||
| 1510 | </row><row><entry | ||
| 1511 | align="char"> | ||
| 1512 | <para>EINTERNAL</para> | ||
| 1513 | </entry><entry | ||
| 1514 | align="char"> | ||
| 1515 | <para>Internal error in the device driver.</para> | ||
| 1516 | </entry> | ||
| 1517 | </row></tbody></tgroup></informaltable> | ||
| 1518 | </section> | 1302 | </section> |
| 1519 | 1303 | ||
| 1520 | <section id="FE_SET_TONE"> | 1304 | <section id="FE_SET_TONE"> |
| @@ -1560,44 +1344,7 @@ modulation mode which can be one of the following: | |||
| 1560 | <para>The requested tone generation mode (on/off).</para> | 1344 | <para>The requested tone generation mode (on/off).</para> |
| 1561 | </entry> | 1345 | </entry> |
| 1562 | </row></tbody></tgroup></informaltable> | 1346 | </row></tbody></tgroup></informaltable> |
| 1563 | <para>ERRORS | 1347 | &return-value-dvb; |
| 1564 | </para> | ||
| 1565 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 1566 | align="char"> | ||
| 1567 | <para>ENODEV</para> | ||
| 1568 | </entry><entry | ||
| 1569 | align="char"> | ||
| 1570 | <para>Device driver not loaded/available.</para> | ||
| 1571 | </entry> | ||
| 1572 | </row><row><entry | ||
| 1573 | align="char"> | ||
| 1574 | <para>EBUSY</para> | ||
| 1575 | </entry><entry | ||
| 1576 | align="char"> | ||
| 1577 | <para>Device or resource busy.</para> | ||
| 1578 | </entry> | ||
| 1579 | </row><row><entry | ||
| 1580 | align="char"> | ||
| 1581 | <para>EINVAL</para> | ||
| 1582 | </entry><entry | ||
| 1583 | align="char"> | ||
| 1584 | <para>Invalid argument.</para> | ||
| 1585 | </entry> | ||
| 1586 | </row><row><entry | ||
| 1587 | align="char"> | ||
| 1588 | <para>EPERM</para> | ||
| 1589 | </entry><entry | ||
| 1590 | align="char"> | ||
| 1591 | <para>File not opened with read permissions.</para> | ||
| 1592 | </entry> | ||
| 1593 | </row><row><entry | ||
| 1594 | align="char"> | ||
| 1595 | <para>EINTERNAL</para> | ||
| 1596 | </entry><entry | ||
| 1597 | align="char"> | ||
| 1598 | <para>Internal error in the device driver.</para> | ||
| 1599 | </entry> | ||
| 1600 | </row></tbody></tgroup></informaltable> | ||
| 1601 | </section> | 1348 | </section> |
| 1602 | 1349 | ||
| 1603 | <section id="FE_SET_VOLTAGE"> | 1350 | <section id="FE_SET_VOLTAGE"> |
| @@ -1645,44 +1392,7 @@ modulation mode which can be one of the following: | |||
| 1645 | </entry> | 1392 | </entry> |
| 1646 | </row></tbody></tgroup></informaltable> | 1393 | </row></tbody></tgroup></informaltable> |
| 1647 | 1394 | ||
| 1648 | <para>ERRORS | 1395 | &return-value-dvb; |
| 1649 | </para> | ||
| 1650 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 1651 | align="char"> | ||
| 1652 | <para>ENODEV</para> | ||
| 1653 | </entry><entry | ||
| 1654 | align="char"> | ||
| 1655 | <para>Device driver not loaded/available.</para> | ||
| 1656 | </entry> | ||
| 1657 | </row><row><entry | ||
| 1658 | align="char"> | ||
| 1659 | <para>EBUSY</para> | ||
| 1660 | </entry><entry | ||
| 1661 | align="char"> | ||
| 1662 | <para>Device or resource busy.</para> | ||
| 1663 | </entry> | ||
| 1664 | </row><row><entry | ||
| 1665 | align="char"> | ||
| 1666 | <para>EINVAL</para> | ||
| 1667 | </entry><entry | ||
| 1668 | align="char"> | ||
| 1669 | <para>Invalid argument.</para> | ||
| 1670 | </entry> | ||
| 1671 | </row><row><entry | ||
| 1672 | align="char"> | ||
| 1673 | <para>EPERM</para> | ||
| 1674 | </entry><entry | ||
| 1675 | align="char"> | ||
| 1676 | <para>File not opened with read permissions.</para> | ||
| 1677 | </entry> | ||
| 1678 | </row><row><entry | ||
| 1679 | align="char"> | ||
| 1680 | <para>EINTERNAL</para> | ||
| 1681 | </entry><entry | ||
| 1682 | align="char"> | ||
| 1683 | <para>Internal error in the device driver.</para> | ||
| 1684 | </entry> | ||
| 1685 | </row></tbody></tgroup></informaltable> | ||
| 1686 | </section> | 1396 | </section> |
| 1687 | 1397 | ||
| 1688 | <section id="FE_ENABLE_HIGH_LNB_VOLTAGE"> | 1398 | <section id="FE_ENABLE_HIGH_LNB_VOLTAGE"> |
| @@ -1731,44 +1441,7 @@ modulation mode which can be one of the following: | |||
| 1731 | </entry> | 1441 | </entry> |
| 1732 | </row></tbody></tgroup></informaltable> | 1442 | </row></tbody></tgroup></informaltable> |
| 1733 | 1443 | ||
| 1734 | <para>ERRORS | 1444 | &return-value-dvb; |
| 1735 | </para> | ||
| 1736 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 1737 | align="char"> | ||
| 1738 | <para>ENODEV</para> | ||
| 1739 | </entry><entry | ||
| 1740 | align="char"> | ||
| 1741 | <para>Device driver not loaded/available.</para> | ||
| 1742 | </entry> | ||
| 1743 | </row><row><entry | ||
| 1744 | align="char"> | ||
| 1745 | <para>EBUSY</para> | ||
| 1746 | </entry><entry | ||
| 1747 | align="char"> | ||
| 1748 | <para>Device or resource busy.</para> | ||
| 1749 | </entry> | ||
| 1750 | </row><row><entry | ||
| 1751 | align="char"> | ||
| 1752 | <para>EINVAL</para> | ||
| 1753 | </entry><entry | ||
| 1754 | align="char"> | ||
| 1755 | <para>Invalid argument.</para> | ||
| 1756 | </entry> | ||
| 1757 | </row><row><entry | ||
| 1758 | align="char"> | ||
| 1759 | <para>EPERM</para> | ||
| 1760 | </entry><entry | ||
| 1761 | align="char"> | ||
| 1762 | <para>File not opened with read permissions.</para> | ||
| 1763 | </entry> | ||
| 1764 | </row><row><entry | ||
| 1765 | align="char"> | ||
| 1766 | <para>EINTERNAL</para> | ||
| 1767 | </entry><entry | ||
| 1768 | align="char"> | ||
| 1769 | <para>Internal error in the device driver.</para> | ||
| 1770 | </entry> | ||
| 1771 | </row></tbody></tgroup></informaltable> | ||
| 1772 | </section> | 1445 | </section> |
| 1773 | 1446 | ||
| 1774 | <section id="FE_SET_FRONTEND_TUNE_MODE"> | 1447 | <section id="FE_SET_FRONTEND_TUNE_MODE"> |
| @@ -1800,11 +1473,7 @@ FE_TUNE_MODE_ONESHOT When set, this flag will disable any zigzagging or other "n | |||
| 1800 | </entry> | 1473 | </entry> |
| 1801 | </row></tbody></tgroup></informaltable> | 1474 | </row></tbody></tgroup></informaltable> |
| 1802 | 1475 | ||
| 1803 | <para>ERRORS</para> | 1476 | &return-value-dvb; |
| 1804 | <informaltable><tgroup cols="2"><tbody><row> | ||
| 1805 | <entry align="char"><para>EINVAL</para></entry> | ||
| 1806 | <entry align="char"><para>Invalid argument.</para></entry> | ||
| 1807 | </row></tbody></tgroup></informaltable> | ||
| 1808 | </section> | 1477 | </section> |
| 1809 | 1478 | ||
| 1810 | <section id="FE_DISHNETWORK_SEND_LEGACY_CMD"> | 1479 | <section id="FE_DISHNETWORK_SEND_LEGACY_CMD"> |
| @@ -1838,12 +1507,7 @@ sends the specified raw cmd to the dish via DISEqC. | |||
| 1838 | </entry> | 1507 | </entry> |
| 1839 | </row></tbody></tgroup></informaltable> | 1508 | </row></tbody></tgroup></informaltable> |
| 1840 | 1509 | ||
| 1841 | <para>ERRORS</para> | 1510 | &return-value-dvb; |
| 1842 | <informaltable><tgroup cols="1"><tbody><row> | ||
| 1843 | <entry align="char"> | ||
| 1844 | <para>There are no errors in use for this call</para> | ||
| 1845 | </entry> | ||
| 1846 | </row></tbody></tgroup></informaltable> | ||
| 1847 | </section> | 1511 | </section> |
| 1848 | 1512 | ||
| 1849 | </section> | 1513 | </section> |
diff --git a/Documentation/DocBook/dvb/intro.xml b/Documentation/DocBook/media/dvb/intro.xml index 0dc83f672ea2..c75dc7cc3e9b 100644 --- a/Documentation/DocBook/dvb/intro.xml +++ b/Documentation/DocBook/media/dvb/intro.xml | |||
| @@ -154,6 +154,10 @@ are called:</para> | |||
| 154 | </listitem> | 154 | </listitem> |
| 155 | <listitem> | 155 | <listitem> |
| 156 | 156 | ||
| 157 | <para><emphasis role="tt">/dev/dvb/adapterN/dvrM</emphasis>,</para> | ||
| 158 | </listitem> | ||
| 159 | <listitem> | ||
| 160 | |||
| 157 | <para><emphasis role="tt">/dev/dvb/adapterN/caM</emphasis>,</para></listitem></itemizedlist> | 161 | <para><emphasis role="tt">/dev/dvb/adapterN/caM</emphasis>,</para></listitem></itemizedlist> |
| 158 | 162 | ||
| 159 | <para>where N enumerates the DVB PCI cards in a system starting | 163 | <para>where N enumerates the DVB PCI cards in a system starting |
| @@ -175,10 +179,27 @@ the devices are described in the following chapters.</para> | |||
| 175 | The DVB API include files should be included in application sources with | 179 | The DVB API include files should be included in application sources with |
| 176 | a partial path like:</para> | 180 | a partial path like:</para> |
| 177 | 181 | ||
| 178 | 182 | <programlisting> | |
| 183 | #include <linux/dvb/audio.h> | ||
| 184 | </programlisting> | ||
| 185 | <programlisting> | ||
| 186 | #include <linux/dvb/ca.h> | ||
| 187 | </programlisting> | ||
| 188 | <programlisting> | ||
| 189 | #include <linux/dvb/dmx.h> | ||
| 190 | </programlisting> | ||
| 179 | <programlisting> | 191 | <programlisting> |
| 180 | #include <linux/dvb/frontend.h> | 192 | #include <linux/dvb/frontend.h> |
| 181 | </programlisting> | 193 | </programlisting> |
| 194 | <programlisting> | ||
| 195 | #include <linux/dvb/net.h> | ||
| 196 | </programlisting> | ||
| 197 | <programlisting> | ||
| 198 | #include <linux/dvb/osd.h> | ||
| 199 | </programlisting> | ||
| 200 | <programlisting> | ||
| 201 | #include <linux/dvb/video.h> | ||
| 202 | </programlisting> | ||
| 182 | 203 | ||
| 183 | <para>To enable applications to support different API version, an | 204 | <para>To enable applications to support different API version, an |
| 184 | additional include file <emphasis | 205 | additional include file <emphasis |
diff --git a/Documentation/DocBook/dvb/kdapi.xml b/Documentation/DocBook/media/dvb/kdapi.xml index 6c67481eaa4b..6c67481eaa4b 100644 --- a/Documentation/DocBook/dvb/kdapi.xml +++ b/Documentation/DocBook/media/dvb/kdapi.xml | |||
diff --git a/Documentation/DocBook/dvb/net.xml b/Documentation/DocBook/media/dvb/net.xml index 94e388d94c0d..67d37e5ce597 100644 --- a/Documentation/DocBook/dvb/net.xml +++ b/Documentation/DocBook/media/dvb/net.xml | |||
| @@ -7,6 +7,23 @@ application. | |||
| 7 | </para> | 7 | </para> |
| 8 | <section id="dvb_net_types"> | 8 | <section id="dvb_net_types"> |
| 9 | <title>DVB Net Data Types</title> | 9 | <title>DVB Net Data Types</title> |
| 10 | |||
| 11 | <section id="dvb-net-if"> | ||
| 12 | <title>struct dvb_net_if</title> | ||
| 13 | <programlisting> | ||
| 14 | struct dvb_net_if { | ||
| 15 | __u16 pid; | ||
| 16 | __u16 if_num; | ||
| 17 | __u8 feedtype; | ||
| 18 | #define DVB_NET_FEEDTYPE_MPE 0 /⋆ multi protocol encapsulation ⋆/ | ||
| 19 | #define DVB_NET_FEEDTYPE_ULE 1 /⋆ ultra lightweight encapsulation ⋆/ | ||
| 20 | }; | ||
| 21 | </programlisting> | ||
| 22 | </section> | ||
| 23 | |||
| 24 | </section> | ||
| 25 | <section id="net_fcalls"> | ||
| 26 | <title>DVB net Function Calls</title> | ||
| 10 | <para>To be written… | 27 | <para>To be written… |
| 11 | </para> | 28 | </para> |
| 12 | </section> | 29 | </section> |
diff --git a/Documentation/DocBook/dvb/video.xml b/Documentation/DocBook/media/dvb/video.xml index 7bb287e67c8e..25fb823226b4 100644 --- a/Documentation/DocBook/dvb/video.xml +++ b/Documentation/DocBook/media/dvb/video.xml | |||
| @@ -18,15 +18,16 @@ supported on some MPEG decoders made for DVD playback. | |||
| 18 | <section id="video_types"> | 18 | <section id="video_types"> |
| 19 | <title>Video Data Types</title> | 19 | <title>Video Data Types</title> |
| 20 | 20 | ||
| 21 | <section id="video_format_t"> | 21 | <section id="video-format-t"> |
| 22 | <title>video_format_t</title> | 22 | <title>video_format_t</title> |
| 23 | <para>The <emphasis role="tt">video_format_t</emphasis> data type defined by | 23 | <para>The <emphasis role="tt">video_format_t</emphasis> data type defined by |
| 24 | </para> | 24 | </para> |
| 25 | <programlisting> | 25 | <programlisting> |
| 26 | typedef enum { | 26 | typedef enum { |
| 27 | VIDEO_FORMAT_4_3, | 27 | VIDEO_FORMAT_4_3, /⋆ Select 4:3 format ⋆/ |
| 28 | VIDEO_FORMAT_16_9 | 28 | VIDEO_FORMAT_16_9, /⋆ Select 16:9 format. ⋆/ |
| 29 | } video_format_t; | 29 | VIDEO_FORMAT_221_1 /⋆ 2.21:1 ⋆/ |
| 30 | } video_format_t; | ||
| 30 | </programlisting> | 31 | </programlisting> |
| 31 | <para>is used in the VIDEO_SET_FORMAT function (??) to tell the driver which aspect ratio | 32 | <para>is used in the VIDEO_SET_FORMAT function (??) to tell the driver which aspect ratio |
| 32 | the output hardware (e.g. TV) has. It is also used in the data structures video_status | 33 | the output hardware (e.g. TV) has. It is also used in the data structures video_status |
| @@ -36,34 +37,36 @@ stream. | |||
| 36 | </para> | 37 | </para> |
| 37 | </section> | 38 | </section> |
| 38 | 39 | ||
| 39 | <section id="video_display_format_t"> | 40 | <section id="video-displayformat-t"> |
| 40 | <title>video_display_format_t</title> | 41 | <title>video_displayformat_t</title> |
| 41 | <para>In case the display format of the video stream and of the display hardware differ the | 42 | <para>In case the display format of the video stream and of the display hardware differ the |
| 42 | application has to specify how to handle the cropping of the picture. This can be done using | 43 | application has to specify how to handle the cropping of the picture. This can be done using |
| 43 | the VIDEO_SET_DISPLAY_FORMAT call (??) which accepts | 44 | the VIDEO_SET_DISPLAY_FORMAT call (??) which accepts |
| 44 | </para> | 45 | </para> |
| 45 | <programlisting> | 46 | <programlisting> |
| 46 | typedef enum { | 47 | typedef enum { |
| 47 | VIDEO_PAN_SCAN, | 48 | VIDEO_PAN_SCAN, /⋆ use pan and scan format ⋆/ |
| 48 | VIDEO_LETTER_BOX, | 49 | VIDEO_LETTER_BOX, /⋆ use letterbox format ⋆/ |
| 49 | VIDEO_CENTER_CUT_OUT | 50 | VIDEO_CENTER_CUT_OUT /⋆ use center cut out format ⋆/ |
| 50 | } video_display_format_t; | 51 | } video_displayformat_t; |
| 51 | </programlisting> | 52 | </programlisting> |
| 52 | <para>as argument. | 53 | <para>as argument. |
| 53 | </para> | 54 | </para> |
| 54 | </section> | 55 | </section> |
| 55 | 56 | ||
| 56 | <section id="video_stream_source"> | 57 | <section id="video-stream-source-t"> |
| 57 | <title>video stream source</title> | 58 | <title>video stream source</title> |
| 58 | <para>The video stream source is set through the VIDEO_SELECT_SOURCE call and can take | 59 | <para>The video stream source is set through the VIDEO_SELECT_SOURCE call and can take |
| 59 | the following values, depending on whether we are replaying from an internal (demuxer) or | 60 | the following values, depending on whether we are replaying from an internal (demuxer) or |
| 60 | external (user write) source. | 61 | external (user write) source. |
| 61 | </para> | 62 | </para> |
| 62 | <programlisting> | 63 | <programlisting> |
| 63 | typedef enum { | 64 | typedef enum { |
| 64 | VIDEO_SOURCE_DEMUX, | 65 | VIDEO_SOURCE_DEMUX, /⋆ Select the demux as the main source ⋆/ |
| 65 | VIDEO_SOURCE_MEMORY | 66 | VIDEO_SOURCE_MEMORY /⋆ If this source is selected, the stream |
| 66 | } video_stream_source_t; | 67 | comes from the user through the write |
| 68 | system call ⋆/ | ||
| 69 | } video_stream_source_t; | ||
| 67 | </programlisting> | 70 | </programlisting> |
| 68 | <para>VIDEO_SOURCE_DEMUX selects the demultiplexer (fed either by the frontend or the | 71 | <para>VIDEO_SOURCE_DEMUX selects the demultiplexer (fed either by the frontend or the |
| 69 | DVR device) as the source of the video stream. If VIDEO_SOURCE_MEMORY | 72 | DVR device) as the source of the video stream. If VIDEO_SOURCE_MEMORY |
| @@ -72,49 +75,98 @@ call. | |||
| 72 | </para> | 75 | </para> |
| 73 | </section> | 76 | </section> |
| 74 | 77 | ||
| 75 | <section id="video_play_state"> | 78 | <section id="video-play-state-t"> |
| 76 | <title>video play state</title> | 79 | <title>video play state</title> |
| 77 | <para>The following values can be returned by the VIDEO_GET_STATUS call representing the | 80 | <para>The following values can be returned by the VIDEO_GET_STATUS call representing the |
| 78 | state of video playback. | 81 | state of video playback. |
| 79 | </para> | 82 | </para> |
| 80 | <programlisting> | 83 | <programlisting> |
| 81 | typedef enum { | 84 | typedef enum { |
| 82 | VIDEO_STOPPED, | 85 | VIDEO_STOPPED, /⋆ Video is stopped ⋆/ |
| 83 | VIDEO_PLAYING, | 86 | VIDEO_PLAYING, /⋆ Video is currently playing ⋆/ |
| 84 | VIDEO_FREEZED | 87 | VIDEO_FREEZED /⋆ Video is freezed ⋆/ |
| 85 | } video_play_state_t; | 88 | } video_play_state_t; |
| 86 | </programlisting> | 89 | </programlisting> |
| 87 | </section> | 90 | </section> |
| 88 | 91 | ||
| 89 | <section id="video_event"> | 92 | <section id="video-command"> |
| 93 | <para>The structure must be zeroed before use by the application | ||
| 94 | This ensures it can be extended safely in the future.</para> | ||
| 95 | <title>struct video-command</title> | ||
| 96 | <programlisting> | ||
| 97 | struct video_command { | ||
| 98 | __u32 cmd; | ||
| 99 | __u32 flags; | ||
| 100 | union { | ||
| 101 | struct { | ||
| 102 | __u64 pts; | ||
| 103 | } stop; | ||
| 104 | |||
| 105 | struct { | ||
| 106 | /⋆ 0 or 1000 specifies normal speed, | ||
| 107 | 1 specifies forward single stepping, | ||
| 108 | -1 specifies backward single stepping, | ||
| 109 | >>1: playback at speed/1000 of the normal speed, | ||
| 110 | <-1: reverse playback at (-speed/1000) of the normal speed. ⋆/ | ||
| 111 | __s32 speed; | ||
| 112 | __u32 format; | ||
| 113 | } play; | ||
| 114 | |||
| 115 | struct { | ||
| 116 | __u32 data[16]; | ||
| 117 | } raw; | ||
| 118 | }; | ||
| 119 | }; | ||
| 120 | </programlisting> | ||
| 121 | </section> | ||
| 122 | |||
| 123 | <section id="video-size-t"> | ||
| 124 | <title>struct video_size-t</title> | ||
| 125 | <programlisting> | ||
| 126 | typedef struct { | ||
| 127 | int w; | ||
| 128 | int h; | ||
| 129 | video_format_t aspect_ratio; | ||
| 130 | } video_size_t; | ||
| 131 | </programlisting> | ||
| 132 | </section> | ||
| 133 | |||
| 134 | |||
| 135 | <section id="video-event"> | ||
| 90 | <title>struct video_event</title> | 136 | <title>struct video_event</title> |
| 91 | <para>The following is the structure of a video event as it is returned by the VIDEO_GET_EVENT | 137 | <para>The following is the structure of a video event as it is returned by the VIDEO_GET_EVENT |
| 92 | call. | 138 | call. |
| 93 | </para> | 139 | </para> |
| 94 | <programlisting> | 140 | <programlisting> |
| 95 | struct video_event { | 141 | struct video_event { |
| 96 | int32_t type; | 142 | __s32 type; |
| 97 | time_t timestamp; | 143 | #define VIDEO_EVENT_SIZE_CHANGED 1 |
| 98 | union { | 144 | #define VIDEO_EVENT_FRAME_RATE_CHANGED 2 |
| 99 | video_format_t video_format; | 145 | #define VIDEO_EVENT_DECODER_STOPPED 3 |
| 100 | } u; | 146 | #define VIDEO_EVENT_VSYNC 4 |
| 101 | }; | 147 | __kernel_time_t timestamp; |
| 148 | union { | ||
| 149 | video_size_t size; | ||
| 150 | unsigned int frame_rate; /⋆ in frames per 1000sec ⋆/ | ||
| 151 | unsigned char vsync_field; /⋆ unknown/odd/even/progressive ⋆/ | ||
| 152 | } u; | ||
| 153 | }; | ||
| 102 | </programlisting> | 154 | </programlisting> |
| 103 | </section> | 155 | </section> |
| 104 | 156 | ||
| 105 | <section id="video_status"> | 157 | <section id="video-status"> |
| 106 | <title>struct video_status</title> | 158 | <title>struct video_status</title> |
| 107 | <para>The VIDEO_GET_STATUS call returns the following structure informing about various | 159 | <para>The VIDEO_GET_STATUS call returns the following structure informing about various |
| 108 | states of the playback operation. | 160 | states of the playback operation. |
| 109 | </para> | 161 | </para> |
| 110 | <programlisting> | 162 | <programlisting> |
| 111 | struct video_status { | 163 | struct video_status { |
| 112 | boolean video_blank; | 164 | int video_blank; /⋆ blank video on freeze? ⋆/ |
| 113 | video_play_state_t play_state; | 165 | video_play_state_t play_state; /⋆ current state of playback ⋆/ |
| 114 | video_stream_source_t stream_source; | 166 | video_stream_source_t stream_source; /⋆ current source (demux/memory) ⋆/ |
| 115 | video_format_t video_format; | 167 | video_format_t video_format; /⋆ current aspect ratio of stream ⋆/ |
| 116 | video_displayformat_t display_format; | 168 | video_displayformat_t display_format;/⋆ selected cropping mode ⋆/ |
| 117 | }; | 169 | }; |
| 118 | </programlisting> | 170 | </programlisting> |
| 119 | <para>If video_blank is set video will be blanked out if the channel is changed or if playback is | 171 | <para>If video_blank is set video will be blanked out if the channel is changed or if playback is |
| 120 | stopped. Otherwise, the last picture will be displayed. play_state indicates if the video is | 172 | stopped. Otherwise, the last picture will be displayed. play_state indicates if the video is |
| @@ -127,17 +179,17 @@ device. | |||
| 127 | </para> | 179 | </para> |
| 128 | </section> | 180 | </section> |
| 129 | 181 | ||
| 130 | <section id="video_still_picture"> | 182 | <section id="video-still-picture"> |
| 131 | <title>struct video_still_picture</title> | 183 | <title>struct video_still_picture</title> |
| 132 | <para>An I-frame displayed via the VIDEO_STILLPICTURE call is passed on within the | 184 | <para>An I-frame displayed via the VIDEO_STILLPICTURE call is passed on within the |
| 133 | following structure. | 185 | following structure. |
| 134 | </para> | 186 | </para> |
| 135 | <programlisting> | 187 | <programlisting> |
| 136 | /⋆ pointer to and size of a single iframe in memory ⋆/ | 188 | /⋆ pointer to and size of a single iframe in memory ⋆/ |
| 137 | struct video_still_picture { | 189 | struct video_still_picture { |
| 138 | char ⋆iFrame; | 190 | char ⋆iFrame; /⋆ pointer to a single iframe in memory ⋆/ |
| 139 | int32_t size; | 191 | int32_t size; |
| 140 | }; | 192 | }; |
| 141 | </programlisting> | 193 | </programlisting> |
| 142 | </section> | 194 | </section> |
| 143 | 195 | ||
| @@ -164,26 +216,26 @@ bits set according to the hardwares capabilities. | |||
| 164 | </programlisting> | 216 | </programlisting> |
| 165 | </section> | 217 | </section> |
| 166 | 218 | ||
| 167 | <section id="video_system"> | 219 | <section id="video-system"> |
| 168 | <title>video system</title> | 220 | <title>video system</title> |
| 169 | <para>A call to VIDEO_SET_SYSTEM sets the desired video system for TV output. The | 221 | <para>A call to VIDEO_SET_SYSTEM sets the desired video system for TV output. The |
| 170 | following system types can be set: | 222 | following system types can be set: |
| 171 | </para> | 223 | </para> |
| 172 | <programlisting> | 224 | <programlisting> |
| 173 | typedef enum { | 225 | typedef enum { |
| 174 | VIDEO_SYSTEM_PAL, | 226 | VIDEO_SYSTEM_PAL, |
| 175 | VIDEO_SYSTEM_NTSC, | 227 | VIDEO_SYSTEM_NTSC, |
| 176 | VIDEO_SYSTEM_PALN, | 228 | VIDEO_SYSTEM_PALN, |
| 177 | VIDEO_SYSTEM_PALNc, | 229 | VIDEO_SYSTEM_PALNc, |
| 178 | VIDEO_SYSTEM_PALM, | 230 | VIDEO_SYSTEM_PALM, |
| 179 | VIDEO_SYSTEM_NTSC60, | 231 | VIDEO_SYSTEM_NTSC60, |
| 180 | VIDEO_SYSTEM_PAL60, | 232 | VIDEO_SYSTEM_PAL60, |
| 181 | VIDEO_SYSTEM_PALM60 | 233 | VIDEO_SYSTEM_PALM60 |
| 182 | } video_system_t; | 234 | } video_system_t; |
| 183 | </programlisting> | 235 | </programlisting> |
| 184 | </section> | 236 | </section> |
| 185 | 237 | ||
| 186 | <section id="video_highlight"> | 238 | <section id="video-highlight"> |
| 187 | <title>struct video_highlight</title> | 239 | <title>struct video_highlight</title> |
| 188 | <para>Calling the ioctl VIDEO_SET_HIGHLIGHTS posts the SPU highlight information. The | 240 | <para>Calling the ioctl VIDEO_SET_HIGHLIGHTS posts the SPU highlight information. The |
| 189 | call expects the following format for that information: | 241 | call expects the following format for that information: |
| @@ -210,7 +262,7 @@ call expects the following format for that information: | |||
| 210 | </programlisting> | 262 | </programlisting> |
| 211 | 263 | ||
| 212 | </section> | 264 | </section> |
| 213 | <section id="video_spu"> | 265 | <section id="video-spu"> |
| 214 | <title>video SPU</title> | 266 | <title>video SPU</title> |
| 215 | <para>Calling VIDEO_SET_SPU deactivates or activates SPU decoding, according to the | 267 | <para>Calling VIDEO_SET_SPU deactivates or activates SPU decoding, according to the |
| 216 | following format: | 268 | following format: |
| @@ -224,7 +276,7 @@ following format: | |||
| 224 | </programlisting> | 276 | </programlisting> |
| 225 | 277 | ||
| 226 | </section> | 278 | </section> |
| 227 | <section id="video_spu_palette"> | 279 | <section id="video-spu-palette"> |
| 228 | <title>video SPU palette</title> | 280 | <title>video SPU palette</title> |
| 229 | <para>The following structure is used to set the SPU palette by calling VIDEO_SPU_PALETTE: | 281 | <para>The following structure is used to set the SPU palette by calling VIDEO_SPU_PALETTE: |
| 230 | </para> | 282 | </para> |
| @@ -237,7 +289,7 @@ following format: | |||
| 237 | </programlisting> | 289 | </programlisting> |
| 238 | 290 | ||
| 239 | </section> | 291 | </section> |
| 240 | <section id="video_navi_pack"> | 292 | <section id="video-navi-pack"> |
| 241 | <title>video NAVI pack</title> | 293 | <title>video NAVI pack</title> |
| 242 | <para>In order to get the navigational data the following structure has to be passed to the ioctl | 294 | <para>In order to get the navigational data the following structure has to be passed to the ioctl |
| 243 | VIDEO_GET_NAVI: | 295 | VIDEO_GET_NAVI: |
| @@ -252,7 +304,7 @@ VIDEO_GET_NAVI: | |||
| 252 | </section> | 304 | </section> |
| 253 | 305 | ||
| 254 | 306 | ||
| 255 | <section id="video_attributes"> | 307 | <section id="video-attributes-t"> |
| 256 | <title>video attributes</title> | 308 | <title>video attributes</title> |
| 257 | <para>The following attributes can be set by a call to VIDEO_SET_ATTRIBUTES: | 309 | <para>The following attributes can be set by a call to VIDEO_SET_ATTRIBUTES: |
| 258 | </para> | 310 | </para> |
| @@ -347,8 +399,7 @@ VIDEO_GET_NAVI: | |||
| 347 | <para>(blocking mode is the default)</para> | 399 | <para>(blocking mode is the default)</para> |
| 348 | </entry> | 400 | </entry> |
| 349 | </row></tbody></tgroup></informaltable> | 401 | </row></tbody></tgroup></informaltable> |
| 350 | <para>ERRORS | 402 | <para>RETURN VALUE</para> |
| 351 | </para> | ||
| 352 | <informaltable><tgroup cols="2"><tbody><row><entry | 403 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 353 | align="char"> | 404 | align="char"> |
| 354 | <para>ENODEV</para> | 405 | <para>ENODEV</para> |
| @@ -406,8 +457,7 @@ VIDEO_GET_NAVI: | |||
| 406 | <para>File descriptor returned by a previous call to open().</para> | 457 | <para>File descriptor returned by a previous call to open().</para> |
| 407 | </entry> | 458 | </entry> |
| 408 | </row></tbody></tgroup></informaltable> | 459 | </row></tbody></tgroup></informaltable> |
| 409 | <para>ERRORS | 460 | <para>RETURN VALUE</para> |
| 410 | </para> | ||
| 411 | <informaltable><tgroup cols="2"><tbody><row><entry | 461 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 412 | align="char"> | 462 | align="char"> |
| 413 | <para>EBADF</para> | 463 | <para>EBADF</para> |
| @@ -462,8 +512,7 @@ VIDEO_GET_NAVI: | |||
| 462 | <para>Size of buf.</para> | 512 | <para>Size of buf.</para> |
| 463 | </entry> | 513 | </entry> |
| 464 | </row></tbody></tgroup></informaltable> | 514 | </row></tbody></tgroup></informaltable> |
| 465 | <para>ERRORS | 515 | <para>RETURN VALUE</para> |
| 466 | </para> | ||
| 467 | <informaltable><tgroup cols="2"><tbody><row><entry | 516 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 468 | align="char"> | 517 | align="char"> |
| 469 | <para>EPERM</para> | 518 | <para>EPERM</para> |
| @@ -488,7 +537,7 @@ VIDEO_GET_NAVI: | |||
| 488 | </entry> | 537 | </entry> |
| 489 | </row></tbody></tgroup></informaltable> | 538 | </row></tbody></tgroup></informaltable> |
| 490 | 539 | ||
| 491 | </section><section | 540 | </section><section id="VIDEO_STOP" |
| 492 | role="subsection"><title>VIDEO_STOP</title> | 541 | role="subsection"><title>VIDEO_STOP</title> |
| 493 | <para>DESCRIPTION | 542 | <para>DESCRIPTION |
| 494 | </para> | 543 | </para> |
| @@ -543,26 +592,9 @@ role="subsection"><title>VIDEO_STOP</title> | |||
| 543 | <para>FALSE: Show last decoded frame.</para> | 592 | <para>FALSE: Show last decoded frame.</para> |
| 544 | </entry> | 593 | </entry> |
| 545 | </row></tbody></tgroup></informaltable> | 594 | </row></tbody></tgroup></informaltable> |
| 546 | <para>ERRORS | 595 | &return-value-dvb; |
| 547 | </para> | ||
| 548 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 549 | align="char"> | ||
| 550 | <para>EBADF</para> | ||
| 551 | </entry><entry | ||
| 552 | align="char"> | ||
| 553 | <para>fd is not a valid open file descriptor</para> | ||
| 554 | </entry> | ||
| 555 | </row><row><entry | ||
| 556 | align="char"> | ||
| 557 | <para>EINTERNAL</para> | ||
| 558 | </entry><entry | ||
| 559 | align="char"> | ||
| 560 | <para>Internal error, possibly in the communication with the | ||
| 561 | DVB subsystem.</para> | ||
| 562 | </entry> | ||
| 563 | </row></tbody></tgroup></informaltable> | ||
| 564 | 596 | ||
| 565 | </section><section | 597 | </section><section id="VIDEO_PLAY" |
| 566 | role="subsection"><title>VIDEO_PLAY</title> | 598 | role="subsection"><title>VIDEO_PLAY</title> |
| 567 | <para>DESCRIPTION | 599 | <para>DESCRIPTION |
| 568 | </para> | 600 | </para> |
| @@ -596,26 +628,9 @@ role="subsection"><title>VIDEO_PLAY</title> | |||
| 596 | <para>Equals VIDEO_PLAY for this command.</para> | 628 | <para>Equals VIDEO_PLAY for this command.</para> |
| 597 | </entry> | 629 | </entry> |
| 598 | </row></tbody></tgroup></informaltable> | 630 | </row></tbody></tgroup></informaltable> |
| 599 | <para>ERRORS | 631 | &return-value-dvb; |
| 600 | </para> | ||
| 601 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 602 | align="char"> | ||
| 603 | <para>EBADF</para> | ||
| 604 | </entry><entry | ||
| 605 | align="char"> | ||
| 606 | <para>fd is not a valid open file descriptor</para> | ||
| 607 | </entry> | ||
| 608 | </row><row><entry | ||
| 609 | align="char"> | ||
| 610 | <para>EINTERNAL</para> | ||
| 611 | </entry><entry | ||
| 612 | align="char"> | ||
| 613 | <para>Internal error, possibly in the communication with the | ||
| 614 | DVB subsystem.</para> | ||
| 615 | </entry> | ||
| 616 | </row></tbody></tgroup></informaltable> | ||
| 617 | 632 | ||
| 618 | </section><section | 633 | </section><section id="VIDEO_FREEZE" |
| 619 | role="subsection"><title>VIDEO_FREEZE</title> | 634 | role="subsection"><title>VIDEO_FREEZE</title> |
| 620 | <para>DESCRIPTION | 635 | <para>DESCRIPTION |
| 621 | </para> | 636 | </para> |
| @@ -653,26 +668,9 @@ role="subsection"><title>VIDEO_FREEZE</title> | |||
| 653 | <para>Equals VIDEO_FREEZE for this command.</para> | 668 | <para>Equals VIDEO_FREEZE for this command.</para> |
| 654 | </entry> | 669 | </entry> |
| 655 | </row></tbody></tgroup></informaltable> | 670 | </row></tbody></tgroup></informaltable> |
| 656 | <para>ERRORS | 671 | &return-value-dvb; |
| 657 | </para> | ||
| 658 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 659 | align="char"> | ||
| 660 | <para>EBADF</para> | ||
| 661 | </entry><entry | ||
| 662 | align="char"> | ||
| 663 | <para>fd is not a valid open file descriptor</para> | ||
| 664 | </entry> | ||
| 665 | </row><row><entry | ||
| 666 | align="char"> | ||
| 667 | <para>EINTERNAL</para> | ||
| 668 | </entry><entry | ||
| 669 | align="char"> | ||
| 670 | <para>Internal error, possibly in the communication with the | ||
| 671 | DVB subsystem.</para> | ||
| 672 | </entry> | ||
| 673 | </row></tbody></tgroup></informaltable> | ||
| 674 | 672 | ||
| 675 | </section><section | 673 | </section><section id="VIDEO_CONTINUE" |
| 676 | role="subsection"><title>VIDEO_CONTINUE</title> | 674 | role="subsection"><title>VIDEO_CONTINUE</title> |
| 677 | <para>DESCRIPTION | 675 | <para>DESCRIPTION |
| 678 | </para> | 676 | </para> |
| @@ -706,26 +704,9 @@ role="subsection"><title>VIDEO_CONTINUE</title> | |||
| 706 | <para>Equals VIDEO_CONTINUE for this command.</para> | 704 | <para>Equals VIDEO_CONTINUE for this command.</para> |
| 707 | </entry> | 705 | </entry> |
| 708 | </row></tbody></tgroup></informaltable> | 706 | </row></tbody></tgroup></informaltable> |
| 709 | <para>ERRORS | 707 | &return-value-dvb; |
| 710 | </para> | ||
| 711 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 712 | align="char"> | ||
| 713 | <para>EBADF</para> | ||
| 714 | </entry><entry | ||
| 715 | align="char"> | ||
| 716 | <para>fd is not a valid open file descriptor</para> | ||
| 717 | </entry> | ||
| 718 | </row><row><entry | ||
| 719 | align="char"> | ||
| 720 | <para>EINTERNAL</para> | ||
| 721 | </entry><entry | ||
| 722 | align="char"> | ||
| 723 | <para>Internal error, possibly in the communication with the | ||
| 724 | DVB subsystem.</para> | ||
| 725 | </entry> | ||
| 726 | </row></tbody></tgroup></informaltable> | ||
| 727 | 708 | ||
| 728 | </section><section | 709 | </section><section id="VIDEO_SELECT_SOURCE" |
| 729 | role="subsection"><title>VIDEO_SELECT_SOURCE</title> | 710 | role="subsection"><title>VIDEO_SELECT_SOURCE</title> |
| 730 | <para>DESCRIPTION | 711 | <para>DESCRIPTION |
| 731 | </para> | 712 | </para> |
| @@ -769,26 +750,9 @@ role="subsection"><title>VIDEO_SELECT_SOURCE</title> | |||
| 769 | <para>Indicates which source shall be used for the Video stream.</para> | 750 | <para>Indicates which source shall be used for the Video stream.</para> |
| 770 | </entry> | 751 | </entry> |
| 771 | </row></tbody></tgroup></informaltable> | 752 | </row></tbody></tgroup></informaltable> |
| 772 | <para>ERRORS | 753 | &return-value-dvb; |
| 773 | </para> | ||
| 774 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 775 | align="char"> | ||
| 776 | <para>EBADF</para> | ||
| 777 | </entry><entry | ||
| 778 | align="char"> | ||
| 779 | <para>fd is not a valid open file descriptor</para> | ||
| 780 | </entry> | ||
| 781 | </row><row><entry | ||
| 782 | align="char"> | ||
| 783 | <para>EINTERNAL</para> | ||
| 784 | </entry><entry | ||
| 785 | align="char"> | ||
| 786 | <para>Internal error, possibly in the communication with the | ||
| 787 | DVB subsystem.</para> | ||
| 788 | </entry> | ||
| 789 | </row></tbody></tgroup></informaltable> | ||
| 790 | 754 | ||
| 791 | </section><section | 755 | </section><section id="VIDEO_SET_BLANK" |
| 792 | role="subsection"><title>VIDEO_SET_BLANK</title> | 756 | role="subsection"><title>VIDEO_SET_BLANK</title> |
| 793 | <para>DESCRIPTION | 757 | <para>DESCRIPTION |
| 794 | </para> | 758 | </para> |
| @@ -835,33 +799,9 @@ role="subsection"><title>VIDEO_SET_BLANK</title> | |||
| 835 | <para>FALSE: Show last decoded frame.</para> | 799 | <para>FALSE: Show last decoded frame.</para> |
| 836 | </entry> | 800 | </entry> |
| 837 | </row></tbody></tgroup></informaltable> | 801 | </row></tbody></tgroup></informaltable> |
| 838 | <para>ERRORS | 802 | &return-value-dvb; |
| 839 | </para> | ||
| 840 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 841 | align="char"> | ||
| 842 | <para>EBADF</para> | ||
| 843 | </entry><entry | ||
| 844 | align="char"> | ||
| 845 | <para>fd is not a valid open file descriptor</para> | ||
| 846 | </entry> | ||
| 847 | </row><row><entry | ||
| 848 | align="char"> | ||
| 849 | <para>EINTERNAL</para> | ||
| 850 | </entry><entry | ||
| 851 | align="char"> | ||
| 852 | <para>Internal error, possibly in the communication with the | ||
| 853 | DVB subsystem.</para> | ||
| 854 | </entry> | ||
| 855 | </row><row><entry | ||
| 856 | align="char"> | ||
| 857 | <para>EINVAL</para> | ||
| 858 | </entry><entry | ||
| 859 | align="char"> | ||
| 860 | <para>Illegal input parameter</para> | ||
| 861 | </entry> | ||
| 862 | </row></tbody></tgroup></informaltable> | ||
| 863 | 803 | ||
| 864 | </section><section | 804 | </section><section id="VIDEO_GET_STATUS" |
| 865 | role="subsection"><title>VIDEO_GET_STATUS</title> | 805 | role="subsection"><title>VIDEO_GET_STATUS</title> |
| 866 | <para>DESCRIPTION | 806 | <para>DESCRIPTION |
| 867 | </para> | 807 | </para> |
| @@ -903,33 +843,9 @@ role="subsection"><title>VIDEO_GET_STATUS</title> | |||
| 903 | <para>Returns the current status of the Video Device.</para> | 843 | <para>Returns the current status of the Video Device.</para> |
| 904 | </entry> | 844 | </entry> |
| 905 | </row></tbody></tgroup></informaltable> | 845 | </row></tbody></tgroup></informaltable> |
| 906 | <para>ERRORS | 846 | &return-value-dvb; |
| 907 | </para> | ||
| 908 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 909 | align="char"> | ||
| 910 | <para>EBADF</para> | ||
| 911 | </entry><entry | ||
| 912 | align="char"> | ||
| 913 | <para>fd is not a valid open file descriptor</para> | ||
| 914 | </entry> | ||
| 915 | </row><row><entry | ||
| 916 | align="char"> | ||
| 917 | <para>EINTERNAL</para> | ||
| 918 | </entry><entry | ||
| 919 | align="char"> | ||
| 920 | <para>Internal error, possibly in the communication with the | ||
| 921 | DVB subsystem.</para> | ||
| 922 | </entry> | ||
| 923 | </row><row><entry | ||
| 924 | align="char"> | ||
| 925 | <para>EFAULT</para> | ||
| 926 | </entry><entry | ||
| 927 | align="char"> | ||
| 928 | <para>status points to invalid address</para> | ||
| 929 | </entry> | ||
| 930 | </row></tbody></tgroup></informaltable> | ||
| 931 | 847 | ||
| 932 | </section><section | 848 | </section><section id="VIDEO_GET_EVENT" |
| 933 | role="subsection"><title>VIDEO_GET_EVENT</title> | 849 | role="subsection"><title>VIDEO_GET_EVENT</title> |
| 934 | <para>DESCRIPTION | 850 | <para>DESCRIPTION |
| 935 | </para> | 851 | </para> |
| @@ -980,24 +896,9 @@ role="subsection"><title>VIDEO_GET_EVENT</title> | |||
| 980 | stored.</para> | 896 | stored.</para> |
| 981 | </entry> | 897 | </entry> |
| 982 | </row></tbody></tgroup></informaltable> | 898 | </row></tbody></tgroup></informaltable> |
| 983 | <para>ERRORS | 899 | &return-value-dvb; |
| 984 | </para> | ||
| 985 | <informaltable><tgroup cols="2"><tbody><row><entry | 900 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 986 | align="char"> | 901 | align="char"> |
| 987 | <para>EBADF</para> | ||
| 988 | </entry><entry | ||
| 989 | align="char"> | ||
| 990 | <para>fd is not a valid open file descriptor</para> | ||
| 991 | </entry> | ||
| 992 | </row><row><entry | ||
| 993 | align="char"> | ||
| 994 | <para>EFAULT</para> | ||
| 995 | </entry><entry | ||
| 996 | align="char"> | ||
| 997 | <para>ev points to invalid address</para> | ||
| 998 | </entry> | ||
| 999 | </row><row><entry | ||
| 1000 | align="char"> | ||
| 1001 | <para>EWOULDBLOCK</para> | 902 | <para>EWOULDBLOCK</para> |
| 1002 | </entry><entry | 903 | </entry><entry |
| 1003 | align="char"> | 904 | align="char"> |
| @@ -1009,16 +910,11 @@ role="subsection"><title>VIDEO_GET_EVENT</title> | |||
| 1009 | <para>EOVERFLOW</para> | 910 | <para>EOVERFLOW</para> |
| 1010 | </entry><entry | 911 | </entry><entry |
| 1011 | align="char"> | 912 | align="char"> |
| 1012 | </entry> | ||
| 1013 | </row><row><entry | ||
| 1014 | align="char"> | ||
| 1015 | </entry><entry | ||
| 1016 | align="char"> | ||
| 1017 | <para>Overflow in event queue - one or more events were lost.</para> | 913 | <para>Overflow in event queue - one or more events were lost.</para> |
| 1018 | </entry> | 914 | </entry> |
| 1019 | </row></tbody></tgroup></informaltable> | 915 | </row></tbody></tgroup></informaltable> |
| 1020 | 916 | ||
| 1021 | </section><section | 917 | </section><section id="VIDEO_SET_DISPLAY_FORMAT" |
| 1022 | role="subsection"><title>VIDEO_SET_DISPLAY_FORMAT</title> | 918 | role="subsection"><title>VIDEO_SET_DISPLAY_FORMAT</title> |
| 1023 | <para>DESCRIPTION | 919 | <para>DESCRIPTION |
| 1024 | </para> | 920 | </para> |
| @@ -1063,32 +959,9 @@ role="subsection"><title>VIDEO_SET_DISPLAY_FORMAT</title> | |||
| 1063 | <para>Selects the video format to be used.</para> | 959 | <para>Selects the video format to be used.</para> |
| 1064 | </entry> | 960 | </entry> |
| 1065 | </row></tbody></tgroup></informaltable> | 961 | </row></tbody></tgroup></informaltable> |
| 1066 | <para>ERRORS | 962 | &return-value-dvb; |
| 1067 | </para> | ||
| 1068 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 1069 | align="char"> | ||
| 1070 | <para>EBADF</para> | ||
| 1071 | </entry><entry | ||
| 1072 | align="char"> | ||
| 1073 | <para>fd is not a valid open file descriptor</para> | ||
| 1074 | </entry> | ||
| 1075 | </row><row><entry | ||
| 1076 | align="char"> | ||
| 1077 | <para>EINTERNAL</para> | ||
| 1078 | </entry><entry | ||
| 1079 | align="char"> | ||
| 1080 | <para>Internal error.</para> | ||
| 1081 | </entry> | ||
| 1082 | </row><row><entry | ||
| 1083 | align="char"> | ||
| 1084 | <para>EINVAL</para> | ||
| 1085 | </entry><entry | ||
| 1086 | align="char"> | ||
| 1087 | <para>Illegal parameter format.</para> | ||
| 1088 | </entry> | ||
| 1089 | </row></tbody></tgroup></informaltable> | ||
| 1090 | 963 | ||
| 1091 | </section><section | 964 | </section><section id="VIDEO_STILLPICTURE" |
| 1092 | role="subsection"><title>VIDEO_STILLPICTURE</title> | 965 | role="subsection"><title>VIDEO_STILLPICTURE</title> |
| 1093 | <para>DESCRIPTION | 966 | <para>DESCRIPTION |
| 1094 | </para> | 967 | </para> |
| @@ -1133,32 +1006,9 @@ role="subsection"><title>VIDEO_STILLPICTURE</title> | |||
| 1133 | <para>Pointer to a location where an I-frame and size is stored.</para> | 1006 | <para>Pointer to a location where an I-frame and size is stored.</para> |
| 1134 | </entry> | 1007 | </entry> |
| 1135 | </row></tbody></tgroup></informaltable> | 1008 | </row></tbody></tgroup></informaltable> |
| 1136 | <para>ERRORS | 1009 | &return-value-dvb; |
| 1137 | </para> | ||
| 1138 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 1139 | align="char"> | ||
| 1140 | <para>EBADF</para> | ||
| 1141 | </entry><entry | ||
| 1142 | align="char"> | ||
| 1143 | <para>fd is not a valid open file descriptor</para> | ||
| 1144 | </entry> | ||
| 1145 | </row><row><entry | ||
| 1146 | align="char"> | ||
| 1147 | <para>EINTERNAL</para> | ||
| 1148 | </entry><entry | ||
| 1149 | align="char"> | ||
| 1150 | <para>Internal error.</para> | ||
| 1151 | </entry> | ||
| 1152 | </row><row><entry | ||
| 1153 | align="char"> | ||
| 1154 | <para>EFAULT</para> | ||
| 1155 | </entry><entry | ||
| 1156 | align="char"> | ||
| 1157 | <para>sp points to an invalid iframe.</para> | ||
| 1158 | </entry> | ||
| 1159 | </row></tbody></tgroup></informaltable> | ||
| 1160 | 1010 | ||
| 1161 | </section><section | 1011 | </section><section id="VIDEO_FAST_FORWARD" |
| 1162 | role="subsection"><title>VIDEO_FAST_FORWARD</title> | 1012 | role="subsection"><title>VIDEO_FAST_FORWARD</title> |
| 1163 | <para>DESCRIPTION | 1013 | <para>DESCRIPTION |
| 1164 | </para> | 1014 | </para> |
| @@ -1200,39 +1050,17 @@ role="subsection"><title>VIDEO_FAST_FORWARD</title> | |||
| 1200 | <para>The number of frames to skip.</para> | 1050 | <para>The number of frames to skip.</para> |
| 1201 | </entry> | 1051 | </entry> |
| 1202 | </row></tbody></tgroup></informaltable> | 1052 | </row></tbody></tgroup></informaltable> |
| 1203 | <para>ERRORS | 1053 | &return-value-dvb; |
| 1204 | </para> | ||
| 1205 | <informaltable><tgroup cols="2"><tbody><row><entry | 1054 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 1206 | align="char"> | 1055 | align="char"> |
| 1207 | <para>EBADF</para> | ||
| 1208 | </entry><entry | ||
| 1209 | align="char"> | ||
| 1210 | <para>fd is not a valid open file descriptor</para> | ||
| 1211 | </entry> | ||
| 1212 | </row><row><entry | ||
| 1213 | align="char"> | ||
| 1214 | <para>EINTERNAL</para> | ||
| 1215 | </entry><entry | ||
| 1216 | align="char"> | ||
| 1217 | <para>Internal error.</para> | ||
| 1218 | </entry> | ||
| 1219 | </row><row><entry | ||
| 1220 | align="char"> | ||
| 1221 | <para>EPERM</para> | 1056 | <para>EPERM</para> |
| 1222 | </entry><entry | 1057 | </entry><entry |
| 1223 | align="char"> | 1058 | align="char"> |
| 1224 | <para>Mode VIDEO_SOURCE_MEMORY not selected.</para> | 1059 | <para>Mode VIDEO_SOURCE_MEMORY not selected.</para> |
| 1225 | </entry> | 1060 | </entry> |
| 1226 | </row><row><entry | ||
| 1227 | align="char"> | ||
| 1228 | <para>EINVAL</para> | ||
| 1229 | </entry><entry | ||
| 1230 | align="char"> | ||
| 1231 | <para>Illegal parameter format.</para> | ||
| 1232 | </entry> | ||
| 1233 | </row></tbody></tgroup></informaltable> | 1061 | </row></tbody></tgroup></informaltable> |
| 1234 | 1062 | ||
| 1235 | </section><section | 1063 | </section><section id="VIDEO_SLOWMOTION" |
| 1236 | role="subsection"><title>VIDEO_SLOWMOTION</title> | 1064 | role="subsection"><title>VIDEO_SLOWMOTION</title> |
| 1237 | <para>DESCRIPTION | 1065 | <para>DESCRIPTION |
| 1238 | </para> | 1066 | </para> |
| @@ -1274,39 +1102,17 @@ role="subsection"><title>VIDEO_SLOWMOTION</title> | |||
| 1274 | <para>The number of times to repeat each frame.</para> | 1102 | <para>The number of times to repeat each frame.</para> |
| 1275 | </entry> | 1103 | </entry> |
| 1276 | </row></tbody></tgroup></informaltable> | 1104 | </row></tbody></tgroup></informaltable> |
| 1277 | <para>ERRORS | 1105 | &return-value-dvb; |
| 1278 | </para> | ||
| 1279 | <informaltable><tgroup cols="2"><tbody><row><entry | 1106 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 1280 | align="char"> | 1107 | align="char"> |
| 1281 | <para>EBADF</para> | ||
| 1282 | </entry><entry | ||
| 1283 | align="char"> | ||
| 1284 | <para>fd is not a valid open file descriptor</para> | ||
| 1285 | </entry> | ||
| 1286 | </row><row><entry | ||
| 1287 | align="char"> | ||
| 1288 | <para>EINTERNAL</para> | ||
| 1289 | </entry><entry | ||
| 1290 | align="char"> | ||
| 1291 | <para>Internal error.</para> | ||
| 1292 | </entry> | ||
| 1293 | </row><row><entry | ||
| 1294 | align="char"> | ||
| 1295 | <para>EPERM</para> | 1108 | <para>EPERM</para> |
| 1296 | </entry><entry | 1109 | </entry><entry |
| 1297 | align="char"> | 1110 | align="char"> |
| 1298 | <para>Mode VIDEO_SOURCE_MEMORY not selected.</para> | 1111 | <para>Mode VIDEO_SOURCE_MEMORY not selected.</para> |
| 1299 | </entry> | 1112 | </entry> |
| 1300 | </row><row><entry | ||
| 1301 | align="char"> | ||
| 1302 | <para>EINVAL</para> | ||
| 1303 | </entry><entry | ||
| 1304 | align="char"> | ||
| 1305 | <para>Illegal parameter format.</para> | ||
| 1306 | </entry> | ||
| 1307 | </row></tbody></tgroup></informaltable> | 1113 | </row></tbody></tgroup></informaltable> |
| 1308 | 1114 | ||
| 1309 | </section><section | 1115 | </section><section id="VIDEO_GET_CAPABILITIES" |
| 1310 | role="subsection"><title>VIDEO_GET_CAPABILITIES</title> | 1116 | role="subsection"><title>VIDEO_GET_CAPABILITIES</title> |
| 1311 | <para>DESCRIPTION | 1117 | <para>DESCRIPTION |
| 1312 | </para> | 1118 | </para> |
| @@ -1350,25 +1156,9 @@ role="subsection"><title>VIDEO_GET_CAPABILITIES</title> | |||
| 1350 | information.</para> | 1156 | information.</para> |
| 1351 | </entry> | 1157 | </entry> |
| 1352 | </row></tbody></tgroup></informaltable> | 1158 | </row></tbody></tgroup></informaltable> |
| 1353 | <para>ERRORS | 1159 | &return-value-dvb; |
| 1354 | </para> | ||
| 1355 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 1356 | align="char"> | ||
| 1357 | <para>EBADF</para> | ||
| 1358 | </entry><entry | ||
| 1359 | align="char"> | ||
| 1360 | <para>fd is not a valid open file descriptor</para> | ||
| 1361 | </entry> | ||
| 1362 | </row><row><entry | ||
| 1363 | align="char"> | ||
| 1364 | <para>EFAULT</para> | ||
| 1365 | </entry><entry | ||
| 1366 | align="char"> | ||
| 1367 | <para>cap points to an invalid iframe.</para> | ||
| 1368 | </entry> | ||
| 1369 | </row></tbody></tgroup></informaltable> | ||
| 1370 | 1160 | ||
| 1371 | </section><section | 1161 | </section><section id="VIDEO_SET_ID" |
| 1372 | role="subsection"><title>VIDEO_SET_ID</title> | 1162 | role="subsection"><title>VIDEO_SET_ID</title> |
| 1373 | <para>DESCRIPTION | 1163 | <para>DESCRIPTION |
| 1374 | </para> | 1164 | </para> |
| @@ -1410,24 +1200,9 @@ role="subsection"><title>VIDEO_SET_ID</title> | |||
| 1410 | <para>video sub-stream id</para> | 1200 | <para>video sub-stream id</para> |
| 1411 | </entry> | 1201 | </entry> |
| 1412 | </row></tbody></tgroup></informaltable> | 1202 | </row></tbody></tgroup></informaltable> |
| 1413 | <para>ERRORS | 1203 | &return-value-dvb; |
| 1414 | </para> | ||
| 1415 | <informaltable><tgroup cols="2"><tbody><row><entry | 1204 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 1416 | align="char"> | 1205 | align="char"> |
| 1417 | <para>EBADF</para> | ||
| 1418 | </entry><entry | ||
| 1419 | align="char"> | ||
| 1420 | <para>fd is not a valid open file descriptor.</para> | ||
| 1421 | </entry> | ||
| 1422 | </row><row><entry | ||
| 1423 | align="char"> | ||
| 1424 | <para>EINTERNAL</para> | ||
| 1425 | </entry><entry | ||
| 1426 | align="char"> | ||
| 1427 | <para>Internal error.</para> | ||
| 1428 | </entry> | ||
| 1429 | </row><row><entry | ||
| 1430 | align="char"> | ||
| 1431 | <para>EINVAL</para> | 1206 | <para>EINVAL</para> |
| 1432 | </entry><entry | 1207 | </entry><entry |
| 1433 | align="char"> | 1208 | align="char"> |
| @@ -1435,7 +1210,7 @@ role="subsection"><title>VIDEO_SET_ID</title> | |||
| 1435 | </entry> | 1210 | </entry> |
| 1436 | </row></tbody></tgroup></informaltable> | 1211 | </row></tbody></tgroup></informaltable> |
| 1437 | 1212 | ||
| 1438 | </section><section | 1213 | </section><section id="VIDEO_CLEAR_BUFFER" |
| 1439 | role="subsection"><title>VIDEO_CLEAR_BUFFER</title> | 1214 | role="subsection"><title>VIDEO_CLEAR_BUFFER</title> |
| 1440 | <para>DESCRIPTION | 1215 | <para>DESCRIPTION |
| 1441 | </para> | 1216 | </para> |
| @@ -1468,18 +1243,9 @@ role="subsection"><title>VIDEO_CLEAR_BUFFER</title> | |||
| 1468 | <para>Equals VIDEO_CLEAR_BUFFER for this command.</para> | 1243 | <para>Equals VIDEO_CLEAR_BUFFER for this command.</para> |
| 1469 | </entry> | 1244 | </entry> |
| 1470 | </row></tbody></tgroup></informaltable> | 1245 | </row></tbody></tgroup></informaltable> |
| 1471 | <para>ERRORS | 1246 | &return-value-dvb; |
| 1472 | </para> | ||
| 1473 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 1474 | align="char"> | ||
| 1475 | <para>EBADF</para> | ||
| 1476 | </entry><entry | ||
| 1477 | align="char"> | ||
| 1478 | <para>fd is not a valid open file descriptor</para> | ||
| 1479 | </entry> | ||
| 1480 | </row></tbody></tgroup></informaltable> | ||
| 1481 | 1247 | ||
| 1482 | </section><section | 1248 | </section><section id="VIDEO_SET_STREAMTYPE" |
| 1483 | role="subsection"><title>VIDEO_SET_STREAMTYPE</title> | 1249 | role="subsection"><title>VIDEO_SET_STREAMTYPE</title> |
| 1484 | <para>DESCRIPTION | 1250 | <para>DESCRIPTION |
| 1485 | </para> | 1251 | </para> |
| @@ -1522,25 +1288,9 @@ role="subsection"><title>VIDEO_SET_STREAMTYPE</title> | |||
| 1522 | <para>stream type</para> | 1288 | <para>stream type</para> |
| 1523 | </entry> | 1289 | </entry> |
| 1524 | </row></tbody></tgroup></informaltable> | 1290 | </row></tbody></tgroup></informaltable> |
| 1525 | <para>ERRORS | 1291 | &return-value-dvb; |
| 1526 | </para> | ||
| 1527 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 1528 | align="char"> | ||
| 1529 | <para>EBADF</para> | ||
| 1530 | </entry><entry | ||
| 1531 | align="char"> | ||
| 1532 | <para>fd is not a valid open file descriptor</para> | ||
| 1533 | </entry> | ||
| 1534 | </row><row><entry | ||
| 1535 | align="char"> | ||
| 1536 | <para>EINVAL</para> | ||
| 1537 | </entry><entry | ||
| 1538 | align="char"> | ||
| 1539 | <para>type is not a valid or supported stream type.</para> | ||
| 1540 | </entry> | ||
| 1541 | </row></tbody></tgroup></informaltable> | ||
| 1542 | 1292 | ||
| 1543 | </section><section | 1293 | </section><section id="VIDEO_SET_FORMAT" |
| 1544 | role="subsection"><title>VIDEO_SET_FORMAT</title> | 1294 | role="subsection"><title>VIDEO_SET_FORMAT</title> |
| 1545 | <para>DESCRIPTION | 1295 | <para>DESCRIPTION |
| 1546 | </para> | 1296 | </para> |
| @@ -1583,17 +1333,9 @@ role="subsection"><title>VIDEO_SET_FORMAT</title> | |||
| 1583 | <para>video format of TV as defined in section ??.</para> | 1333 | <para>video format of TV as defined in section ??.</para> |
| 1584 | </entry> | 1334 | </entry> |
| 1585 | </row></tbody></tgroup></informaltable> | 1335 | </row></tbody></tgroup></informaltable> |
| 1586 | <para>ERRORS | 1336 | &return-value-dvb; |
| 1587 | </para> | ||
| 1588 | <informaltable><tgroup cols="2"><tbody><row><entry | 1337 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 1589 | align="char"> | 1338 | align="char"> |
| 1590 | <para>EBADF</para> | ||
| 1591 | </entry><entry | ||
| 1592 | align="char"> | ||
| 1593 | <para>fd is not a valid open file descriptor</para> | ||
| 1594 | </entry> | ||
| 1595 | </row><row><entry | ||
| 1596 | align="char"> | ||
| 1597 | <para>EINVAL</para> | 1339 | <para>EINVAL</para> |
| 1598 | </entry><entry | 1340 | </entry><entry |
| 1599 | align="char"> | 1341 | align="char"> |
| @@ -1601,7 +1343,7 @@ role="subsection"><title>VIDEO_SET_FORMAT</title> | |||
| 1601 | </entry> | 1343 | </entry> |
| 1602 | </row></tbody></tgroup></informaltable> | 1344 | </row></tbody></tgroup></informaltable> |
| 1603 | 1345 | ||
| 1604 | </section><section | 1346 | </section><section id="VIDEO_SET_SYSTEM" |
| 1605 | role="subsection"><title>VIDEO_SET_SYSTEM</title> | 1347 | role="subsection"><title>VIDEO_SET_SYSTEM</title> |
| 1606 | <para>DESCRIPTION | 1348 | <para>DESCRIPTION |
| 1607 | </para> | 1349 | </para> |
| @@ -1645,17 +1387,9 @@ role="subsection"><title>VIDEO_SET_SYSTEM</title> | |||
| 1645 | <para>video system of TV output.</para> | 1387 | <para>video system of TV output.</para> |
| 1646 | </entry> | 1388 | </entry> |
| 1647 | </row></tbody></tgroup></informaltable> | 1389 | </row></tbody></tgroup></informaltable> |
| 1648 | <para>ERRORS | 1390 | &return-value-dvb; |
| 1649 | </para> | ||
| 1650 | <informaltable><tgroup cols="2"><tbody><row><entry | 1391 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 1651 | align="char"> | 1392 | align="char"> |
| 1652 | <para>EBADF</para> | ||
| 1653 | </entry><entry | ||
| 1654 | align="char"> | ||
| 1655 | <para>fd is not a valid open file descriptor</para> | ||
| 1656 | </entry> | ||
| 1657 | </row><row><entry | ||
| 1658 | align="char"> | ||
| 1659 | <para>EINVAL</para> | 1393 | <para>EINVAL</para> |
| 1660 | </entry><entry | 1394 | </entry><entry |
| 1661 | align="char"> | 1395 | align="char"> |
| @@ -1663,7 +1397,7 @@ role="subsection"><title>VIDEO_SET_SYSTEM</title> | |||
| 1663 | </entry> | 1397 | </entry> |
| 1664 | </row></tbody></tgroup></informaltable> | 1398 | </row></tbody></tgroup></informaltable> |
| 1665 | 1399 | ||
| 1666 | </section><section | 1400 | </section><section id="VIDEO_SET_HIGHLIGHT" |
| 1667 | role="subsection"><title>VIDEO_SET_HIGHLIGHT</title> | 1401 | role="subsection"><title>VIDEO_SET_HIGHLIGHT</title> |
| 1668 | <para>DESCRIPTION | 1402 | <para>DESCRIPTION |
| 1669 | </para> | 1403 | </para> |
| @@ -1705,25 +1439,9 @@ role="subsection"><title>VIDEO_SET_HIGHLIGHT</title> | |||
| 1705 | <para>SPU Highlight information according to section ??.</para> | 1439 | <para>SPU Highlight information according to section ??.</para> |
| 1706 | </entry> | 1440 | </entry> |
| 1707 | </row></tbody></tgroup></informaltable> | 1441 | </row></tbody></tgroup></informaltable> |
| 1708 | <para>ERRORS | 1442 | &return-value-dvb; |
| 1709 | </para> | ||
| 1710 | <informaltable><tgroup cols="2"><tbody><row><entry | ||
| 1711 | align="char"> | ||
| 1712 | <para>EBADF</para> | ||
| 1713 | </entry><entry | ||
| 1714 | align="char"> | ||
| 1715 | <para>fd is not a valid open file descriptor.</para> | ||
| 1716 | </entry> | ||
| 1717 | </row><row><entry | ||
| 1718 | align="char"> | ||
| 1719 | <para>EINVAL</para> | ||
| 1720 | </entry><entry | ||
| 1721 | align="char"> | ||
| 1722 | <para>input is not a valid highlight setting.</para> | ||
| 1723 | </entry> | ||
| 1724 | </row></tbody></tgroup></informaltable> | ||
| 1725 | 1443 | ||
| 1726 | </section><section | 1444 | </section><section id="VIDEO_SET_SPU" |
| 1727 | role="subsection"><title>VIDEO_SET_SPU</title> | 1445 | role="subsection"><title>VIDEO_SET_SPU</title> |
| 1728 | <para>DESCRIPTION | 1446 | <para>DESCRIPTION |
| 1729 | </para> | 1447 | </para> |
| @@ -1766,17 +1484,9 @@ role="subsection"><title>VIDEO_SET_SPU</title> | |||
| 1766 | to section ??.</para> | 1484 | to section ??.</para> |
| 1767 | </entry> | 1485 | </entry> |
| 1768 | </row></tbody></tgroup></informaltable> | 1486 | </row></tbody></tgroup></informaltable> |
| 1769 | <para>ERRORS | 1487 | &return-value-dvb; |
| 1770 | </para> | ||
| 1771 | <informaltable><tgroup cols="2"><tbody><row><entry | 1488 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 1772 | align="char"> | 1489 | align="char"> |
| 1773 | <para>EBADF</para> | ||
| 1774 | </entry><entry | ||
| 1775 | align="char"> | ||
| 1776 | <para>fd is not a valid open file descriptor</para> | ||
| 1777 | </entry> | ||
| 1778 | </row><row><entry | ||
| 1779 | align="char"> | ||
| 1780 | <para>EINVAL</para> | 1490 | <para>EINVAL</para> |
| 1781 | </entry><entry | 1491 | </entry><entry |
| 1782 | align="char"> | 1492 | align="char"> |
| @@ -1785,7 +1495,7 @@ role="subsection"><title>VIDEO_SET_SPU</title> | |||
| 1785 | </entry> | 1495 | </entry> |
| 1786 | </row></tbody></tgroup></informaltable> | 1496 | </row></tbody></tgroup></informaltable> |
| 1787 | 1497 | ||
| 1788 | </section><section | 1498 | </section><section id="VIDEO_SET_SPU_PALETTE" |
| 1789 | role="subsection"><title>VIDEO_SET_SPU_PALETTE</title> | 1499 | role="subsection"><title>VIDEO_SET_SPU_PALETTE</title> |
| 1790 | <para>DESCRIPTION | 1500 | <para>DESCRIPTION |
| 1791 | </para> | 1501 | </para> |
| @@ -1827,17 +1537,9 @@ role="subsection"><title>VIDEO_SET_SPU_PALETTE</title> | |||
| 1827 | <para>SPU palette according to section ??.</para> | 1537 | <para>SPU palette according to section ??.</para> |
| 1828 | </entry> | 1538 | </entry> |
| 1829 | </row></tbody></tgroup></informaltable> | 1539 | </row></tbody></tgroup></informaltable> |
| 1830 | <para>ERRORS | 1540 | &return-value-dvb; |
| 1831 | </para> | ||
| 1832 | <informaltable><tgroup cols="2"><tbody><row><entry | 1541 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 1833 | align="char"> | 1542 | align="char"> |
| 1834 | <para>EBADF</para> | ||
| 1835 | </entry><entry | ||
| 1836 | align="char"> | ||
| 1837 | <para>fd is not a valid open file descriptor</para> | ||
| 1838 | </entry> | ||
| 1839 | </row><row><entry | ||
| 1840 | align="char"> | ||
| 1841 | <para>EINVAL</para> | 1543 | <para>EINVAL</para> |
| 1842 | </entry><entry | 1544 | </entry><entry |
| 1843 | align="char"> | 1545 | align="char"> |
| @@ -1845,7 +1547,7 @@ role="subsection"><title>VIDEO_SET_SPU_PALETTE</title> | |||
| 1845 | </entry> | 1547 | </entry> |
| 1846 | </row></tbody></tgroup></informaltable> | 1548 | </row></tbody></tgroup></informaltable> |
| 1847 | 1549 | ||
| 1848 | </section><section | 1550 | </section><section id="VIDEO_GET_NAVI" |
| 1849 | role="subsection"><title>VIDEO_GET_NAVI</title> | 1551 | role="subsection"><title>VIDEO_GET_NAVI</title> |
| 1850 | <para>DESCRIPTION | 1552 | <para>DESCRIPTION |
| 1851 | </para> | 1553 | </para> |
| @@ -1889,17 +1591,9 @@ role="subsection"><title>VIDEO_GET_NAVI</title> | |||
| 1889 | ??.</para> | 1591 | ??.</para> |
| 1890 | </entry> | 1592 | </entry> |
| 1891 | </row></tbody></tgroup></informaltable> | 1593 | </row></tbody></tgroup></informaltable> |
| 1892 | <para>ERRORS | 1594 | &return-value-dvb; |
| 1893 | </para> | ||
| 1894 | <informaltable><tgroup cols="2"><tbody><row><entry | 1595 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 1895 | align="char"> | 1596 | align="char"> |
| 1896 | <para>EBADF</para> | ||
| 1897 | </entry><entry | ||
| 1898 | align="char"> | ||
| 1899 | <para>fd is not a valid open file descriptor</para> | ||
| 1900 | </entry> | ||
| 1901 | </row><row><entry | ||
| 1902 | align="char"> | ||
| 1903 | <para>EFAULT</para> | 1597 | <para>EFAULT</para> |
| 1904 | </entry><entry | 1598 | </entry><entry |
| 1905 | align="char"> | 1599 | align="char"> |
| @@ -1907,7 +1601,7 @@ role="subsection"><title>VIDEO_GET_NAVI</title> | |||
| 1907 | </entry> | 1601 | </entry> |
| 1908 | </row></tbody></tgroup></informaltable> | 1602 | </row></tbody></tgroup></informaltable> |
| 1909 | 1603 | ||
| 1910 | </section><section | 1604 | </section><section id="VIDEO_SET_ATTRIBUTES" |
| 1911 | role="subsection"><title>VIDEO_SET_ATTRIBUTES</title> | 1605 | role="subsection"><title>VIDEO_SET_ATTRIBUTES</title> |
| 1912 | <para>DESCRIPTION | 1606 | <para>DESCRIPTION |
| 1913 | </para> | 1607 | </para> |
| @@ -1951,17 +1645,9 @@ role="subsection"><title>VIDEO_SET_ATTRIBUTES</title> | |||
| 1951 | <para>video attributes according to section ??.</para> | 1645 | <para>video attributes according to section ??.</para> |
| 1952 | </entry> | 1646 | </entry> |
| 1953 | </row></tbody></tgroup></informaltable> | 1647 | </row></tbody></tgroup></informaltable> |
| 1954 | <para>ERRORS | 1648 | &return-value-dvb; |
| 1955 | </para> | ||
| 1956 | <informaltable><tgroup cols="2"><tbody><row><entry | 1649 | <informaltable><tgroup cols="2"><tbody><row><entry |
| 1957 | align="char"> | 1650 | align="char"> |
| 1958 | <para>EBADF</para> | ||
| 1959 | </entry><entry | ||
| 1960 | align="char"> | ||
| 1961 | <para>fd is not a valid open file descriptor</para> | ||
| 1962 | </entry> | ||
| 1963 | </row><row><entry | ||
| 1964 | align="char"> | ||
| 1965 | <para>EINVAL</para> | 1651 | <para>EINVAL</para> |
| 1966 | </entry><entry | 1652 | </entry><entry |
| 1967 | align="char"> | 1653 | align="char"> |
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diff --git a/Documentation/DocBook/media/fieldseq_bt.gif.b64 b/Documentation/DocBook/media/fieldseq_bt.gif.b64 new file mode 100644 index 000000000000..b5b557b88158 --- /dev/null +++ b/Documentation/DocBook/media/fieldseq_bt.gif.b64 | |||
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diff --git a/Documentation/DocBook/media/nv12mt_example.gif.b64 b/Documentation/DocBook/media/nv12mt_example.gif.b64 new file mode 100644 index 000000000000..a512078c7f24 --- /dev/null +++ b/Documentation/DocBook/media/nv12mt_example.gif.b64 | |||
| @@ -0,0 +1,121 @@ | |||
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| 10 | 3fTe3vXj4vfo6L//v+/v7/nu7r///9//v/v09N//39////35+f//v///3/////////////////// | ||
| 11 | //////////////////////////////////////////////////////////////////////////// | ||
| 12 | //////////////////////////////////////////////////////////////////////////// | ||
| 13 | //////////////////////////////////////////////////////////////////////////// | ||
| 14 | /////////////////////////////////////////////////////yH+EUNyZWF0ZWQgd2l0aCBH | ||
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diff --git a/Documentation/DocBook/media/pipeline.png.b64 b/Documentation/DocBook/media/pipeline.png.b64 new file mode 100644 index 000000000000..97d9ac007473 --- /dev/null +++ b/Documentation/DocBook/media/pipeline.png.b64 | |||
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diff --git a/Documentation/DocBook/v4l/.gitignore b/Documentation/DocBook/media/v4l/.gitignore index d7ec32eafac9..d7ec32eafac9 100644 --- a/Documentation/DocBook/v4l/.gitignore +++ b/Documentation/DocBook/media/v4l/.gitignore | |||
diff --git a/Documentation/DocBook/v4l/biblio.xml b/Documentation/DocBook/media/v4l/biblio.xml index afc8a0dd2601..afc8a0dd2601 100644 --- a/Documentation/DocBook/v4l/biblio.xml +++ b/Documentation/DocBook/media/v4l/biblio.xml | |||
diff --git a/Documentation/DocBook/v4l/capture.c.xml b/Documentation/DocBook/media/v4l/capture.c.xml index 1c5c49a2de59..1c5c49a2de59 100644 --- a/Documentation/DocBook/v4l/capture.c.xml +++ b/Documentation/DocBook/media/v4l/capture.c.xml | |||
diff --git a/Documentation/DocBook/v4l/common.xml b/Documentation/DocBook/media/v4l/common.xml index 9028721438dc..a86f7a045529 100644 --- a/Documentation/DocBook/v4l/common.xml +++ b/Documentation/DocBook/media/v4l/common.xml | |||
| @@ -236,7 +236,15 @@ important parts of the API.</para> | |||
| 236 | <para>The &VIDIOC-QUERYCAP; ioctl is available to check if the kernel | 236 | <para>The &VIDIOC-QUERYCAP; ioctl is available to check if the kernel |
| 237 | device is compatible with this specification, and to query the <link | 237 | device is compatible with this specification, and to query the <link |
| 238 | linkend="devices">functions</link> and <link linkend="io">I/O | 238 | linkend="devices">functions</link> and <link linkend="io">I/O |
| 239 | methods</link> supported by the device. Other features can be queried | 239 | methods</link> supported by the device.</para> |
| 240 | |||
| 241 | <para>Starting with kernel version 3.1, VIDIOC-QUERYCAP will return the | ||
| 242 | V4L2 API version used by the driver, with generally matches the Kernel version. | ||
| 243 | There's no need of using &VIDIOC-QUERYCAP; to check if an specific ioctl is | ||
| 244 | supported, the V4L2 core now returns ENOIOCTLCMD if a driver doesn't provide | ||
| 245 | support for an ioctl.</para> | ||
| 246 | |||
| 247 | <para>Other features can be queried | ||
| 240 | by calling the respective ioctl, for example &VIDIOC-ENUMINPUT; | 248 | by calling the respective ioctl, for example &VIDIOC-ENUMINPUT; |
| 241 | to learn about the number, types and names of video connectors on the | 249 | to learn about the number, types and names of video connectors on the |
| 242 | device. Although abstraction is a major objective of this API, the | 250 | device. Although abstraction is a major objective of this API, the |
diff --git a/Documentation/DocBook/v4l/compat.xml b/Documentation/DocBook/media/v4l/compat.xml index 9f7cd4f25792..ce1004a7da52 100644 --- a/Documentation/DocBook/v4l/compat.xml +++ b/Documentation/DocBook/media/v4l/compat.xml | |||
| @@ -10,12 +10,10 @@ driver writers to port or update their code.</para> | |||
| 10 | <para>The Video For Linux API was first introduced in Linux 2.1 to | 10 | <para>The Video For Linux API was first introduced in Linux 2.1 to |
| 11 | unify and replace various TV and radio device related interfaces, | 11 | unify and replace various TV and radio device related interfaces, |
| 12 | developed independently by driver writers in prior years. Starting | 12 | developed independently by driver writers in prior years. Starting |
| 13 | with Linux 2.5 the much improved V4L2 API replaces the V4L API, | 13 | with Linux 2.5 the much improved V4L2 API replaces the V4L API. |
| 14 | although existing drivers will continue to support V4L applications in | 14 | The support for the old V4L calls were removed from Kernel, but the |
| 15 | the future, either directly or through the V4L2 compatibility layer in | 15 | library <xref linkend="libv4l" /> supports the conversion of a V4L |
| 16 | the <filename>videodev</filename> kernel module translating ioctls on | 16 | API system call into a V4L2 one.</para> |
| 17 | the fly. For a transition period not all drivers will support the V4L2 | ||
| 18 | API.</para> | ||
| 19 | 17 | ||
| 20 | <section> | 18 | <section> |
| 21 | <title>Opening and Closing Devices</title> | 19 | <title>Opening and Closing Devices</title> |
| @@ -84,12 +82,7 @@ not compatible with V4L or V4L2.</para> </footnote>, | |||
| 84 | device file. V4L2 drivers <emphasis>may</emphasis> support multiple | 82 | device file. V4L2 drivers <emphasis>may</emphasis> support multiple |
| 85 | opens, see <xref linkend="open" /> for details and consequences.</para> | 83 | opens, see <xref linkend="open" /> for details and consequences.</para> |
| 86 | 84 | ||
| 87 | <para>V4L drivers respond to V4L2 ioctls with an &EINVAL;. The | 85 | <para>V4L drivers respond to V4L2 ioctls with an &EINVAL;.</para> |
| 88 | compatibility layer in the V4L2 <filename>videodev</filename> module | ||
| 89 | can translate V4L ioctl requests to their V4L2 counterpart, however a | ||
| 90 | V4L2 driver usually needs more preparation to become fully V4L | ||
| 91 | compatible. This is covered in more detail in <xref | ||
| 92 | linkend="driver" />.</para> | ||
| 93 | </section> | 86 | </section> |
| 94 | 87 | ||
| 95 | <section> | 88 | <section> |
| @@ -2367,6 +2360,16 @@ that used it. It was originally scheduled for removal in 2.6.35. | |||
| 2367 | </listitem> | 2360 | </listitem> |
| 2368 | </orderedlist> | 2361 | </orderedlist> |
| 2369 | </section> | 2362 | </section> |
| 2363 | <section> | ||
| 2364 | <title>V4L2 in Linux 3.1</title> | ||
| 2365 | <orderedlist> | ||
| 2366 | <listitem> | ||
| 2367 | <para>VIDIOC_QUERYCAP now returns a per-subsystem version instead of a per-driver one.</para> | ||
| 2368 | <para>Standardize an error code for invalid ioctl.</para> | ||
| 2369 | <para>Added V4L2_CTRL_TYPE_BITMASK.</para> | ||
| 2370 | </listitem> | ||
| 2371 | </orderedlist> | ||
| 2372 | </section> | ||
| 2370 | 2373 | ||
| 2371 | <section id="other"> | 2374 | <section id="other"> |
| 2372 | <title>Relation of V4L2 to other Linux multimedia APIs</title> | 2375 | <title>Relation of V4L2 to other Linux multimedia APIs</title> |
| @@ -2472,6 +2475,9 @@ ioctls.</para> | |||
| 2472 | <listitem> | 2475 | <listitem> |
| 2473 | <para>&VIDIOC-DBG-G-CHIP-IDENT; ioctl.</para> | 2476 | <para>&VIDIOC-DBG-G-CHIP-IDENT; ioctl.</para> |
| 2474 | </listitem> | 2477 | </listitem> |
| 2478 | <listitem> | ||
| 2479 | <para>Flash API. <xref linkend="flash-controls" /></para> | ||
| 2480 | </listitem> | ||
| 2475 | </itemizedlist> | 2481 | </itemizedlist> |
| 2476 | </section> | 2482 | </section> |
| 2477 | 2483 | ||
diff --git a/Documentation/DocBook/v4l/controls.xml b/Documentation/DocBook/media/v4l/controls.xml index a920ee80f640..85164016ed26 100644 --- a/Documentation/DocBook/v4l/controls.xml +++ b/Documentation/DocBook/media/v4l/controls.xml | |||
| @@ -51,6 +51,10 @@ readability until any ioctl (querying the properties) is | |||
| 51 | called.</para> | 51 | called.</para> |
| 52 | </footnote></para> | 52 | </footnote></para> |
| 53 | 53 | ||
| 54 | <para> | ||
| 55 | All controls use machine endianness. | ||
| 56 | </para> | ||
| 57 | |||
| 54 | <table pgwide="1" frame="none" id="control-id"> | 58 | <table pgwide="1" frame="none" id="control-id"> |
| 55 | <title>Control IDs</title> | 59 | <title>Control IDs</title> |
| 56 | <tgroup cols="3"> | 60 | <tgroup cols="3"> |
| @@ -325,6 +329,22 @@ minimum value disables backlight compensation.</entry> | |||
| 325 | <constant>V4L2_CID_ILLUMINATORS_2</constant> + 1).</entry> | 329 | <constant>V4L2_CID_ILLUMINATORS_2</constant> + 1).</entry> |
| 326 | </row> | 330 | </row> |
| 327 | <row> | 331 | <row> |
| 332 | <entry><constant>V4L2_CID_MIN_BUFFERS_FOR_CAPTURE</constant></entry> | ||
| 333 | <entry>integer</entry> | ||
| 334 | <entry>This is a read-only control that can be read by the application | ||
| 335 | and used as a hint to determine the number of CAPTURE buffers to pass to REQBUFS. | ||
| 336 | The value is the minimum number of CAPTURE buffers that is necessary for hardware | ||
| 337 | to work.</entry> | ||
| 338 | </row> | ||
| 339 | <row> | ||
| 340 | <entry><constant>V4L2_CID_MIN_BUFFERS_FOR_OUTPUT</constant></entry> | ||
| 341 | <entry>integer</entry> | ||
| 342 | <entry>This is a read-only control that can be read by the application | ||
| 343 | and used as a hint to determine the number of OUTPUT buffers to pass to REQBUFS. | ||
| 344 | The value is the minimum number of OUTPUT buffers that is necessary for hardware | ||
| 345 | to work.</entry> | ||
| 346 | </row> | ||
| 347 | <row> | ||
| 328 | <entry><constant>V4L2_CID_PRIVATE_BASE</constant></entry> | 348 | <entry><constant>V4L2_CID_PRIVATE_BASE</constant></entry> |
| 329 | <entry></entry> | 349 | <entry></entry> |
| 330 | <entry>ID of the first custom (driver specific) control. | 350 | <entry>ID of the first custom (driver specific) control. |
| @@ -545,6 +565,10 @@ may not be supported (<constant>VIDIOC_QUERYMENU</constant> will | |||
| 545 | return an error). A good example is the list of supported MPEG audio | 565 | return an error). A good example is the list of supported MPEG audio |
| 546 | bitrates. Some drivers only support one or two bitrates, others | 566 | bitrates. Some drivers only support one or two bitrates, others |
| 547 | support a wider range.</para> | 567 | support a wider range.</para> |
| 568 | |||
| 569 | <para> | ||
| 570 | All controls use machine endianness. | ||
| 571 | </para> | ||
| 548 | </section> | 572 | </section> |
| 549 | 573 | ||
| 550 | <section> | 574 | <section> |
| @@ -670,7 +694,8 @@ caption of a Tab page in a GUI, for example.</entry> | |||
| 670 | </row><row><entry spanname="descr">The MPEG-1, -2 or -4 | 694 | </row><row><entry spanname="descr">The MPEG-1, -2 or -4 |
| 671 | output stream type. One cannot assume anything here. Each hardware | 695 | output stream type. One cannot assume anything here. Each hardware |
| 672 | MPEG encoder tends to support different subsets of the available MPEG | 696 | MPEG encoder tends to support different subsets of the available MPEG |
| 673 | stream types. The currently defined stream types are:</entry> | 697 | stream types. This control is specific to multiplexed MPEG streams. |
| 698 | The currently defined stream types are:</entry> | ||
| 674 | </row> | 699 | </row> |
| 675 | <row> | 700 | <row> |
| 676 | <entrytbl spanname="descr" cols="2"> | 701 | <entrytbl spanname="descr" cols="2"> |
| @@ -800,6 +825,7 @@ frequency. Possible values are:</entry> | |||
| 800 | <entry spanname="id"><constant>V4L2_CID_MPEG_AUDIO_ENCODING</constant> </entry> | 825 | <entry spanname="id"><constant>V4L2_CID_MPEG_AUDIO_ENCODING</constant> </entry> |
| 801 | <entry>enum v4l2_mpeg_audio_encoding</entry> | 826 | <entry>enum v4l2_mpeg_audio_encoding</entry> |
| 802 | </row><row><entry spanname="descr">MPEG Audio encoding. | 827 | </row><row><entry spanname="descr">MPEG Audio encoding. |
| 828 | This control is specific to multiplexed MPEG streams. | ||
| 803 | Possible values are:</entry> | 829 | Possible values are:</entry> |
| 804 | </row> | 830 | </row> |
| 805 | <row> | 831 | <row> |
| @@ -1250,7 +1276,8 @@ and reproducible audio bitstream. 0 = unmuted, 1 = muted.</entry> | |||
| 1250 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_ENCODING</constant> </entry> | 1276 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_ENCODING</constant> </entry> |
| 1251 | <entry>enum v4l2_mpeg_video_encoding</entry> | 1277 | <entry>enum v4l2_mpeg_video_encoding</entry> |
| 1252 | </row><row><entry spanname="descr">MPEG Video encoding | 1278 | </row><row><entry spanname="descr">MPEG Video encoding |
| 1253 | method. Possible values are:</entry> | 1279 | method. This control is specific to multiplexed MPEG streams. |
| 1280 | Possible values are:</entry> | ||
| 1254 | </row> | 1281 | </row> |
| 1255 | <row> | 1282 | <row> |
| 1256 | <entrytbl spanname="descr" cols="2"> | 1283 | <entrytbl spanname="descr" cols="2"> |
| @@ -1406,6 +1433,959 @@ of the video. The supplied 32-bit integer is interpreted as follows (bit | |||
| 1406 | </tbody> | 1433 | </tbody> |
| 1407 | </entrytbl> | 1434 | </entrytbl> |
| 1408 | </row> | 1435 | </row> |
| 1436 | |||
| 1437 | |||
| 1438 | <row><entry></entry></row> | ||
| 1439 | <row> | ||
| 1440 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE</constant> </entry> | ||
| 1441 | <entry>boolean</entry> | ||
| 1442 | </row> | ||
| 1443 | <row><entry spanname="descr">If enabled the decoder expects to receive a single slice per buffer, otherwise | ||
| 1444 | the decoder expects a single frame in per buffer. Applicable to the decoder, all codecs. | ||
| 1445 | </entry> | ||
| 1446 | </row> | ||
| 1447 | |||
| 1448 | <row><entry></entry></row> | ||
| 1449 | <row> | ||
| 1450 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_ENABLE</constant> </entry> | ||
| 1451 | <entry>boolean</entry> | ||
| 1452 | </row> | ||
| 1453 | <row><entry spanname="descr">Enable writing sample aspect ratio in the Video Usability Information. | ||
| 1454 | Applicable to the H264 encoder.</entry> | ||
| 1455 | </row> | ||
| 1456 | |||
| 1457 | <row><entry></entry></row> | ||
| 1458 | <row> | ||
| 1459 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_IDC</constant> </entry> | ||
| 1460 | <entry>enum v4l2_mpeg_video_h264_vui_sar_idc</entry> | ||
| 1461 | </row> | ||
| 1462 | <row><entry spanname="descr">VUI sample aspect ratio indicator for H.264 encoding. The value | ||
| 1463 | is defined in the table E-1 in the standard. Applicable to the H264 encoder.</entry> | ||
| 1464 | </row> | ||
| 1465 | <row> | ||
| 1466 | <entrytbl spanname="descr" cols="2"> | ||
| 1467 | <tbody valign="top"> | ||
| 1468 | |||
| 1469 | <row> | ||
| 1470 | <entry><constant>V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_UNSPECIFIED</constant> </entry> | ||
| 1471 | <entry>Unspecified</entry> | ||
| 1472 | </row> | ||
| 1473 | <row> | ||
| 1474 | <entry><constant>V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_1x1</constant> </entry> | ||
| 1475 | <entry>1x1</entry> | ||
| 1476 | </row> | ||
| 1477 | <row> | ||
| 1478 | <entry><constant>V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_12x11</constant> </entry> | ||
| 1479 | <entry>12x11</entry> | ||
| 1480 | </row> | ||
| 1481 | <row> | ||
| 1482 | <entry><constant>V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_10x11</constant> </entry> | ||
| 1483 | <entry>10x11</entry> | ||
| 1484 | </row> | ||
| 1485 | <row> | ||
| 1486 | <entry><constant>V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_16x11</constant> </entry> | ||
| 1487 | <entry>16x11</entry> | ||
| 1488 | </row> | ||
| 1489 | <row> | ||
| 1490 | <entry><constant>V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_40x33</constant> </entry> | ||
| 1491 | <entry>40x33</entry> | ||
| 1492 | </row> | ||
| 1493 | <row> | ||
| 1494 | <entry><constant>V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_24x11</constant> </entry> | ||
| 1495 | <entry>24x11</entry> | ||
| 1496 | </row> | ||
| 1497 | <row> | ||
| 1498 | <entry><constant>V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_20x11</constant> </entry> | ||
| 1499 | <entry>20x11</entry> | ||
| 1500 | </row> | ||
| 1501 | <row> | ||
| 1502 | <entry><constant>V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_32x11</constant> </entry> | ||
| 1503 | <entry>32x11</entry> | ||
| 1504 | </row> | ||
| 1505 | <row> | ||
| 1506 | <entry><constant>V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_80x33</constant> </entry> | ||
| 1507 | <entry>80x33</entry> | ||
| 1508 | </row> | ||
| 1509 | <row> | ||
| 1510 | <entry><constant>V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_18x11</constant> </entry> | ||
| 1511 | <entry>18x11</entry> | ||
| 1512 | </row> | ||
| 1513 | <row> | ||
| 1514 | <entry><constant>V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_15x11</constant> </entry> | ||
| 1515 | <entry>15x11</entry> | ||
| 1516 | </row> | ||
| 1517 | <row> | ||
| 1518 | <entry><constant>V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_64x33</constant> </entry> | ||
| 1519 | <entry>64x33</entry> | ||
| 1520 | </row> | ||
| 1521 | <row> | ||
| 1522 | <entry><constant>V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_160x99</constant> </entry> | ||
| 1523 | <entry>160x99</entry> | ||
| 1524 | </row> | ||
| 1525 | <row> | ||
| 1526 | <entry><constant>V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_4x3</constant> </entry> | ||
| 1527 | <entry>4x3</entry> | ||
| 1528 | </row> | ||
| 1529 | <row> | ||
| 1530 | <entry><constant>V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_3x2</constant> </entry> | ||
| 1531 | <entry>3x2</entry> | ||
| 1532 | </row> | ||
| 1533 | <row> | ||
| 1534 | <entry><constant>V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_2x1</constant> </entry> | ||
| 1535 | <entry>2x1</entry> | ||
| 1536 | </row> | ||
| 1537 | <row> | ||
| 1538 | <entry><constant>V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED</constant> </entry> | ||
| 1539 | <entry>Extended SAR</entry> | ||
| 1540 | </row> | ||
| 1541 | </tbody> | ||
| 1542 | </entrytbl> | ||
| 1543 | </row> | ||
| 1544 | |||
| 1545 | <row><entry></entry></row> | ||
| 1546 | <row> | ||
| 1547 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_WIDTH</constant> </entry> | ||
| 1548 | <entry>integer</entry> | ||
| 1549 | </row> | ||
| 1550 | <row><entry spanname="descr">Extended sample aspect ratio width for H.264 VUI encoding. | ||
| 1551 | Applicable to the H264 encoder.</entry> | ||
| 1552 | </row> | ||
| 1553 | |||
| 1554 | <row><entry></entry></row> | ||
| 1555 | <row> | ||
| 1556 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_HEIGHT</constant> </entry> | ||
| 1557 | <entry>integer</entry> | ||
| 1558 | </row> | ||
| 1559 | <row><entry spanname="descr">Extended sample aspect ratio height for H.264 VUI encoding. | ||
| 1560 | Applicable to the H264 encoder.</entry> | ||
| 1561 | </row> | ||
| 1562 | |||
| 1563 | <row><entry></entry></row> | ||
| 1564 | <row> | ||
| 1565 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_H264_LEVEL</constant> </entry> | ||
| 1566 | <entry>enum v4l2_mpeg_video_h264_level</entry> | ||
| 1567 | </row> | ||
| 1568 | <row><entry spanname="descr">The level information for the H264 video elementary stream. | ||
| 1569 | Applicable to the H264 encoder. | ||
| 1570 | Possible values are:</entry> | ||
| 1571 | </row> | ||
| 1572 | <row> | ||
| 1573 | <entrytbl spanname="descr" cols="2"> | ||
| 1574 | <tbody valign="top"> | ||
| 1575 | <row> | ||
| 1576 | <entry><constant>V4L2_MPEG_VIDEO_H264_LEVEL_1_0</constant> </entry> | ||
| 1577 | <entry>Level 1.0</entry> | ||
| 1578 | </row> | ||
| 1579 | <row> | ||
| 1580 | <entry><constant>V4L2_MPEG_VIDEO_H264_LEVEL_1B</constant> </entry> | ||
| 1581 | <entry>Level 1B</entry> | ||
| 1582 | </row> | ||
| 1583 | <row> | ||
| 1584 | <entry><constant>V4L2_MPEG_VIDEO_H264_LEVEL_1_1</constant> </entry> | ||
| 1585 | <entry>Level 1.1</entry> | ||
| 1586 | </row> | ||
| 1587 | <row> | ||
| 1588 | <entry><constant>V4L2_MPEG_VIDEO_H264_LEVEL_1_2</constant> </entry> | ||
| 1589 | <entry>Level 1.2</entry> | ||
| 1590 | </row> | ||
| 1591 | <row> | ||
| 1592 | <entry><constant>V4L2_MPEG_VIDEO_H264_LEVEL_1_3</constant> </entry> | ||
| 1593 | <entry>Level 1.3</entry> | ||
| 1594 | </row> | ||
| 1595 | <row> | ||
| 1596 | <entry><constant>V4L2_MPEG_VIDEO_H264_LEVEL_2_0</constant> </entry> | ||
| 1597 | <entry>Level 2.0</entry> | ||
| 1598 | </row> | ||
| 1599 | <row> | ||
| 1600 | <entry><constant>V4L2_MPEG_VIDEO_H264_LEVEL_2_1</constant> </entry> | ||
| 1601 | <entry>Level 2.1</entry> | ||
| 1602 | </row> | ||
| 1603 | <row> | ||
| 1604 | <entry><constant>V4L2_MPEG_VIDEO_H264_LEVEL_2_2</constant> </entry> | ||
| 1605 | <entry>Level 2.2</entry> | ||
| 1606 | </row> | ||
| 1607 | <row> | ||
| 1608 | <entry><constant>V4L2_MPEG_VIDEO_H264_LEVEL_3_0</constant> </entry> | ||
| 1609 | <entry>Level 3.0</entry> | ||
| 1610 | </row> | ||
| 1611 | <row> | ||
| 1612 | <entry><constant>V4L2_MPEG_VIDEO_H264_LEVEL_3_1</constant> </entry> | ||
| 1613 | <entry>Level 3.1</entry> | ||
| 1614 | </row> | ||
| 1615 | <row> | ||
| 1616 | <entry><constant>V4L2_MPEG_VIDEO_H264_LEVEL_3_2</constant> </entry> | ||
| 1617 | <entry>Level 3.2</entry> | ||
| 1618 | </row> | ||
| 1619 | <row> | ||
| 1620 | <entry><constant>V4L2_MPEG_VIDEO_H264_LEVEL_4_0</constant> </entry> | ||
| 1621 | <entry>Level 4.0</entry> | ||
| 1622 | </row> | ||
| 1623 | <row> | ||
| 1624 | <entry><constant>V4L2_MPEG_VIDEO_H264_LEVEL_4_1</constant> </entry> | ||
| 1625 | <entry>Level 4.1</entry> | ||
| 1626 | </row> | ||
| 1627 | <row> | ||
| 1628 | <entry><constant>V4L2_MPEG_VIDEO_H264_LEVEL_4_2</constant> </entry> | ||
| 1629 | <entry>Level 4.2</entry> | ||
| 1630 | </row> | ||
| 1631 | <row> | ||
| 1632 | <entry><constant>V4L2_MPEG_VIDEO_H264_LEVEL_5_0</constant> </entry> | ||
| 1633 | <entry>Level 5.0</entry> | ||
| 1634 | </row> | ||
| 1635 | <row> | ||
| 1636 | <entry><constant>V4L2_MPEG_VIDEO_H264_LEVEL_5_1</constant> </entry> | ||
| 1637 | <entry>Level 5.1</entry> | ||
| 1638 | </row> | ||
| 1639 | </tbody> | ||
| 1640 | </entrytbl> | ||
| 1641 | </row> | ||
| 1642 | |||
| 1643 | <row><entry></entry></row> | ||
| 1644 | <row> | ||
| 1645 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_MPEG4_LEVEL</constant> </entry> | ||
| 1646 | <entry>enum v4l2_mpeg_video_mpeg4_level</entry> | ||
| 1647 | </row> | ||
| 1648 | <row><entry spanname="descr">The level information for the MPEG4 elementary stream. | ||
| 1649 | Applicable to the MPEG4 encoder. | ||
| 1650 | Possible values are:</entry> | ||
| 1651 | </row> | ||
| 1652 | <row> | ||
| 1653 | <entrytbl spanname="descr" cols="2"> | ||
| 1654 | <tbody valign="top"> | ||
| 1655 | <row> | ||
| 1656 | <entry><constant>V4L2_MPEG_VIDEO_LEVEL_0</constant> </entry> | ||
| 1657 | <entry>Level 0</entry> | ||
| 1658 | </row> | ||
| 1659 | <row> | ||
| 1660 | <entry><constant>V4L2_MPEG_VIDEO_LEVEL_0B</constant> </entry> | ||
| 1661 | <entry>Level 0b</entry> | ||
| 1662 | </row> | ||
| 1663 | <row> | ||
| 1664 | <entry><constant>V4L2_MPEG_VIDEO_LEVEL_1</constant> </entry> | ||
| 1665 | <entry>Level 1</entry> | ||
| 1666 | </row> | ||
| 1667 | <row> | ||
| 1668 | <entry><constant>V4L2_MPEG_VIDEO_LEVEL_2</constant> </entry> | ||
| 1669 | <entry>Level 2</entry> | ||
| 1670 | </row> | ||
| 1671 | <row> | ||
| 1672 | <entry><constant>V4L2_MPEG_VIDEO_LEVEL_3</constant> </entry> | ||
| 1673 | <entry>Level 3</entry> | ||
| 1674 | </row> | ||
| 1675 | <row> | ||
| 1676 | <entry><constant>V4L2_MPEG_VIDEO_LEVEL_3B</constant> </entry> | ||
| 1677 | <entry>Level 3b</entry> | ||
| 1678 | </row> | ||
| 1679 | <row> | ||
| 1680 | <entry><constant>V4L2_MPEG_VIDEO_LEVEL_4</constant> </entry> | ||
| 1681 | <entry>Level 4</entry> | ||
| 1682 | </row> | ||
| 1683 | <row> | ||
| 1684 | <entry><constant>V4L2_MPEG_VIDEO_LEVEL_5</constant> </entry> | ||
| 1685 | <entry>Level 5</entry> | ||
| 1686 | </row> | ||
| 1687 | </tbody> | ||
| 1688 | </entrytbl> | ||
| 1689 | </row> | ||
| 1690 | |||
| 1691 | <row><entry></entry></row> | ||
| 1692 | <row> | ||
| 1693 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_H264_PROFILE</constant> </entry> | ||
| 1694 | <entry>enum v4l2_mpeg_h264_profile</entry> | ||
| 1695 | </row> | ||
| 1696 | <row><entry spanname="descr">The profile information for H264. | ||
| 1697 | Applicable to the H264 encoder. | ||
| 1698 | Possible values are:</entry> | ||
| 1699 | </row> | ||
| 1700 | <row> | ||
| 1701 | <entrytbl spanname="descr" cols="2"> | ||
| 1702 | <tbody valign="top"> | ||
| 1703 | <row> | ||
| 1704 | <entry><constant>V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE</constant> </entry> | ||
| 1705 | <entry>Baseline profile</entry> | ||
| 1706 | </row> | ||
| 1707 | <row> | ||
| 1708 | <entry><constant>V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE</constant> </entry> | ||
| 1709 | <entry>Constrained Baseline profile</entry> | ||
| 1710 | </row> | ||
| 1711 | <row> | ||
| 1712 | <entry><constant>V4L2_MPEG_VIDEO_H264_PROFILE_MAIN</constant> </entry> | ||
| 1713 | <entry>Main profile</entry> | ||
| 1714 | </row> | ||
| 1715 | <row> | ||
| 1716 | <entry><constant>V4L2_MPEG_VIDEO_H264_PROFILE_EXTENDED</constant> </entry> | ||
| 1717 | <entry>Extended profile</entry> | ||
| 1718 | </row> | ||
| 1719 | <row> | ||
| 1720 | <entry><constant>V4L2_MPEG_VIDEO_H264_PROFILE_HIGH</constant> </entry> | ||
| 1721 | <entry>High profile</entry> | ||
| 1722 | </row> | ||
| 1723 | <row> | ||
| 1724 | <entry><constant>V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10</constant> </entry> | ||
| 1725 | <entry>High 10 profile</entry> | ||
| 1726 | </row> | ||
| 1727 | <row> | ||
| 1728 | <entry><constant>V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_422</constant> </entry> | ||
| 1729 | <entry>High 422 profile</entry> | ||
| 1730 | </row> | ||
| 1731 | <row> | ||
| 1732 | <entry><constant>V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_444_PREDICTIVE</constant> </entry> | ||
| 1733 | <entry>High 444 Predictive profile</entry> | ||
| 1734 | </row> | ||
| 1735 | <row> | ||
| 1736 | <entry><constant>V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10_INTRA</constant> </entry> | ||
| 1737 | <entry>High 10 Intra profile</entry> | ||
| 1738 | </row> | ||
| 1739 | <row> | ||
| 1740 | <entry><constant>V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_422_INTRA</constant> </entry> | ||
| 1741 | <entry>High 422 Intra profile</entry> | ||
| 1742 | </row> | ||
| 1743 | <row> | ||
| 1744 | <entry><constant>V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_444_INTRA</constant> </entry> | ||
| 1745 | <entry>High 444 Intra profile</entry> | ||
| 1746 | </row> | ||
| 1747 | <row> | ||
| 1748 | <entry><constant>V4L2_MPEG_VIDEO_H264_PROFILE_CAVLC_444_INTRA</constant> </entry> | ||
| 1749 | <entry>CAVLC 444 Intra profile</entry> | ||
| 1750 | </row> | ||
| 1751 | <row> | ||
| 1752 | <entry><constant>V4L2_MPEG_VIDEO_H264_PROFILE_SCALABLE_BASELINE</constant> </entry> | ||
| 1753 | <entry>Scalable Baseline profile</entry> | ||
| 1754 | </row> | ||
| 1755 | <row> | ||
| 1756 | <entry><constant>V4L2_MPEG_VIDEO_H264_PROFILE_SCALABLE_HIGH</constant> </entry> | ||
| 1757 | <entry>Scalable High profile</entry> | ||
| 1758 | </row> | ||
| 1759 | <row> | ||
| 1760 | <entry><constant>V4L2_MPEG_VIDEO_H264_PROFILE_SCALABLE_HIGH_INTRA</constant> </entry> | ||
| 1761 | <entry>Scalable High Intra profile</entry> | ||
| 1762 | </row> | ||
| 1763 | <row> | ||
| 1764 | <entry><constant>V4L2_MPEG_VIDEO_H264_PROFILE_STEREO_HIGH</constant> </entry> | ||
| 1765 | <entry>Stereo High profile</entry> | ||
| 1766 | </row> | ||
| 1767 | <row> | ||
| 1768 | <entry><constant>V4L2_MPEG_VIDEO_H264_PROFILE_MULTIVIEW_HIGH</constant> </entry> | ||
| 1769 | <entry>Multiview High profile</entry> | ||
| 1770 | </row> | ||
| 1771 | |||
| 1772 | </tbody> | ||
| 1773 | </entrytbl> | ||
| 1774 | </row> | ||
| 1775 | |||
| 1776 | <row><entry></entry></row> | ||
| 1777 | <row> | ||
| 1778 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_MPEG4_PROFILE</constant> </entry> | ||
| 1779 | <entry>enum v4l2_mpeg_mpeg4_profile</entry> | ||
| 1780 | </row> | ||
| 1781 | <row><entry spanname="descr">The profile information for MPEG4. | ||
| 1782 | Applicable to the MPEG4 encoder. | ||
| 1783 | Possible values are:</entry> | ||
| 1784 | </row> | ||
| 1785 | <row> | ||
| 1786 | <entrytbl spanname="descr" cols="2"> | ||
| 1787 | <tbody valign="top"> | ||
| 1788 | <row> | ||
| 1789 | <entry><constant>V4L2_MPEG_VIDEO_PROFILE_SIMPLE</constant> </entry> | ||
| 1790 | <entry>Simple profile</entry> | ||
| 1791 | </row> | ||
| 1792 | <row> | ||
| 1793 | <entry><constant>V4L2_MPEG_VIDEO_PROFILE_ADVANCED_SIMPLE</constant> </entry> | ||
| 1794 | <entry>Advanced Simple profile</entry> | ||
| 1795 | </row> | ||
| 1796 | <row> | ||
| 1797 | <entry><constant>V4L2_MPEG_VIDEO_PROFILE_CORE</constant> </entry> | ||
| 1798 | <entry>Core profile</entry> | ||
| 1799 | </row> | ||
| 1800 | <row> | ||
| 1801 | <entry><constant>V4L2_MPEG_VIDEO_PROFILE_SIMPLE_SCALABLE</constant> </entry> | ||
| 1802 | <entry>Simple Scalable profile</entry> | ||
| 1803 | </row> | ||
| 1804 | <row> | ||
| 1805 | <entry><constant>V4L2_MPEG_VIDEO_PROFILE_ADVANCED_CODING_EFFICIENCY</constant> </entry> | ||
| 1806 | <entry></entry> | ||
| 1807 | </row> | ||
| 1808 | </tbody> | ||
| 1809 | </entrytbl> | ||
| 1810 | </row> | ||
| 1811 | |||
| 1812 | <row><entry></entry></row> | ||
| 1813 | <row> | ||
| 1814 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_MAX_REF_PIC</constant> </entry> | ||
| 1815 | <entry>integer</entry> | ||
| 1816 | </row> | ||
| 1817 | <row><entry spanname="descr">The maximum number of reference pictures used for encoding. | ||
| 1818 | Applicable to the encoder. | ||
| 1819 | </entry> | ||
| 1820 | </row> | ||
| 1821 | |||
| 1822 | <row><entry></entry></row> | ||
| 1823 | <row> | ||
| 1824 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE</constant> </entry> | ||
| 1825 | <entry>enum v4l2_mpeg_multi_slice_mode</entry> | ||
| 1826 | </row> | ||
| 1827 | <row><entry spanname="descr">Determines how the encoder should handle division of frame into slices. | ||
| 1828 | Applicable to the encoder. | ||
| 1829 | Possible values are:</entry> | ||
| 1830 | </row> | ||
| 1831 | <row> | ||
| 1832 | <entrytbl spanname="descr" cols="2"> | ||
| 1833 | <tbody valign="top"> | ||
| 1834 | <row> | ||
| 1835 | <entry><constant>V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE</constant> </entry> | ||
| 1836 | <entry>Single slice per frame.</entry> | ||
| 1837 | </row> | ||
| 1838 | <row> | ||
| 1839 | <entry><constant>V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB</constant> </entry> | ||
| 1840 | <entry>Multiple slices with set maximum number of macroblocks per slice.</entry> | ||
| 1841 | </row> | ||
| 1842 | <row> | ||
| 1843 | <entry><constant>V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES</constant> </entry> | ||
| 1844 | <entry>Multiple slice with set maximum size in bytes per slice.</entry> | ||
| 1845 | </row> | ||
| 1846 | </tbody> | ||
| 1847 | </entrytbl> | ||
| 1848 | </row> | ||
| 1849 | |||
| 1850 | <row><entry></entry></row> | ||
| 1851 | <row> | ||
| 1852 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB</constant> </entry> | ||
| 1853 | <entry>integer</entry> | ||
| 1854 | </row> | ||
| 1855 | <row><entry spanname="descr">The maximum number of macroblocks in a slice. Used when | ||
| 1856 | <constant>V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE</constant> is set to <constant>V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_MB</constant>. | ||
| 1857 | Applicable to the encoder.</entry> | ||
| 1858 | </row> | ||
| 1859 | |||
| 1860 | <row><entry></entry></row> | ||
| 1861 | <row> | ||
| 1862 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES</constant> </entry> | ||
| 1863 | <entry>integer</entry> | ||
| 1864 | </row> | ||
| 1865 | <row><entry spanname="descr">The maximum size of a slice in bytes. Used when | ||
| 1866 | <constant>V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE</constant> is set to <constant>V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_MAX_BYTES</constant>. | ||
| 1867 | Applicable to the encoder.</entry> | ||
| 1868 | </row> | ||
| 1869 | |||
| 1870 | <row><entry></entry></row> | ||
| 1871 | <row> | ||
| 1872 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE</constant> </entry> | ||
| 1873 | <entry>enum v4l2_mpeg_h264_loop_filter_mode</entry> | ||
| 1874 | </row> | ||
| 1875 | <row><entry spanname="descr">Loop filter mode for H264 encoder. | ||
| 1876 | Possible values are:</entry> | ||
| 1877 | </row> | ||
| 1878 | <row> | ||
| 1879 | <entrytbl spanname="descr" cols="2"> | ||
| 1880 | <tbody valign="top"> | ||
| 1881 | <row> | ||
| 1882 | <entry><constant>V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED</constant> </entry> | ||
| 1883 | <entry>Loop filter is enabled.</entry> | ||
| 1884 | </row> | ||
| 1885 | <row> | ||
| 1886 | <entry><constant>V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED</constant> </entry> | ||
| 1887 | <entry>Loop filter is disabled.</entry> | ||
| 1888 | </row> | ||
| 1889 | <row> | ||
| 1890 | <entry><constant>V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED_AT_SLICE_BOUNDARY</constant> </entry> | ||
| 1891 | <entry>Loop filter is disabled at the slice boundary.</entry> | ||
| 1892 | </row> | ||
| 1893 | </tbody> | ||
| 1894 | </entrytbl> | ||
| 1895 | </row> | ||
| 1896 | |||
| 1897 | <row><entry></entry></row> | ||
| 1898 | <row> | ||
| 1899 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA</constant> </entry> | ||
| 1900 | <entry>integer</entry> | ||
| 1901 | </row> | ||
| 1902 | <row><entry spanname="descr">Loop filter alpha coefficient, defined in the H264 standard. | ||
| 1903 | Applicable to the H264 encoder.</entry> | ||
| 1904 | </row> | ||
| 1905 | |||
| 1906 | <row><entry></entry></row> | ||
| 1907 | <row> | ||
| 1908 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA</constant> </entry> | ||
| 1909 | <entry>integer</entry> | ||
| 1910 | </row> | ||
| 1911 | <row><entry spanname="descr">Loop filter beta coefficient, defined in the H264 standard. | ||
| 1912 | Applicable to the H264 encoder.</entry> | ||
| 1913 | </row> | ||
| 1914 | |||
| 1915 | <row><entry></entry></row> | ||
| 1916 | <row> | ||
| 1917 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE</constant> </entry> | ||
| 1918 | <entry>enum v4l2_mpeg_h264_symbol_mode</entry> | ||
| 1919 | </row> | ||
| 1920 | <row><entry spanname="descr">Entropy coding mode for H264 - CABAC/CAVALC. | ||
| 1921 | Applicable to the H264 encoder. | ||
| 1922 | Possible values are:</entry> | ||
| 1923 | </row> | ||
| 1924 | <row> | ||
| 1925 | <entrytbl spanname="descr" cols="2"> | ||
| 1926 | <tbody valign="top"> | ||
| 1927 | <row> | ||
| 1928 | <entry><constant>V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC</constant> </entry> | ||
| 1929 | <entry>Use CAVLC entropy coding.</entry> | ||
| 1930 | </row> | ||
| 1931 | <row> | ||
| 1932 | <entry><constant>V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC</constant> </entry> | ||
| 1933 | <entry>Use CABAC entropy coding.</entry> | ||
| 1934 | </row> | ||
| 1935 | </tbody> | ||
| 1936 | </entrytbl> | ||
| 1937 | </row> | ||
| 1938 | |||
| 1939 | <row><entry></entry></row> | ||
| 1940 | <row> | ||
| 1941 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM</constant> </entry> | ||
| 1942 | <entry>boolean</entry> | ||
| 1943 | </row> | ||
| 1944 | <row><entry spanname="descr">Enable 8X8 transform for H264. Applicable to the H264 encoder.</entry> | ||
| 1945 | </row> | ||
| 1946 | |||
| 1947 | <row><entry></entry></row> | ||
| 1948 | <row> | ||
| 1949 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_CYCLIC_INTRA_REFRESH_MB</constant> </entry> | ||
| 1950 | <entry>integer</entry> | ||
| 1951 | </row> | ||
| 1952 | <row><entry spanname="descr">Cyclic intra macroblock refresh. This is the number of continuous macroblocks | ||
| 1953 | refreshed every frame. Each frame a succesive set of macroblocks is refreshed until the cycle completes and starts from the | ||
| 1954 | top of the frame. Applicable to H264, H263 and MPEG4 encoder.</entry> | ||
| 1955 | </row> | ||
| 1956 | |||
| 1957 | <row><entry></entry></row> | ||
| 1958 | <row> | ||
| 1959 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE</constant> </entry> | ||
| 1960 | <entry>boolean</entry> | ||
| 1961 | </row> | ||
| 1962 | <row><entry spanname="descr">Frame level rate control enable. | ||
| 1963 | If this control is disabled then the quantization parameter for each frame type is constant and set with appropriate controls | ||
| 1964 | (e.g. <constant>V4L2_CID_MPEG_VIDEO_H263_I_FRAME_QP</constant>). | ||
| 1965 | If frame rate control is enabled then quantization parameter is adjusted to meet the chosen bitrate. Minimum and maximum value | ||
| 1966 | for the quantization parameter can be set with appropriate controls (e.g. <constant>V4L2_CID_MPEG_VIDEO_H263_MIN_QP</constant>). | ||
| 1967 | Applicable to encoders.</entry> | ||
| 1968 | </row> | ||
| 1969 | |||
| 1970 | <row><entry></entry></row> | ||
| 1971 | <row> | ||
| 1972 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE</constant> </entry> | ||
| 1973 | <entry>boolean</entry> | ||
| 1974 | </row> | ||
| 1975 | <row><entry spanname="descr">Macroblock level rate control enable. | ||
| 1976 | Applicable to the MPEG4 and H264 encoders.</entry> | ||
| 1977 | </row> | ||
| 1978 | |||
| 1979 | <row><entry></entry></row> | ||
| 1980 | <row> | ||
| 1981 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_MPEG4_QPEL</constant> </entry> | ||
| 1982 | <entry>boolean</entry> | ||
| 1983 | </row> | ||
| 1984 | <row><entry spanname="descr">Quarter pixel motion estimation for MPEG4. Applicable to the MPEG4 encoder.</entry> | ||
| 1985 | </row> | ||
| 1986 | |||
| 1987 | <row><entry></entry></row> | ||
| 1988 | <row> | ||
| 1989 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_H263_I_FRAME_QP</constant> </entry> | ||
| 1990 | <entry>integer</entry> | ||
| 1991 | </row> | ||
| 1992 | <row><entry spanname="descr">Quantization parameter for an I frame for H263. Valid range: from 1 to 31.</entry> | ||
| 1993 | </row> | ||
| 1994 | |||
| 1995 | <row><entry></entry></row> | ||
| 1996 | <row> | ||
| 1997 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_H263_MIN_QP</constant> </entry> | ||
| 1998 | <entry>integer</entry> | ||
| 1999 | </row> | ||
| 2000 | <row><entry spanname="descr">Minimum quantization parameter for H263. Valid range: from 1 to 31.</entry> | ||
| 2001 | </row> | ||
| 2002 | |||
| 2003 | <row><entry></entry></row> | ||
| 2004 | <row> | ||
| 2005 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_H263_MAX_QP</constant> </entry> | ||
| 2006 | <entry>integer</entry> | ||
| 2007 | </row> | ||
| 2008 | <row><entry spanname="descr">Maximum quantization parameter for H263. Valid range: from 1 to 31.</entry> | ||
| 2009 | </row> | ||
| 2010 | |||
| 2011 | <row><entry></entry></row> | ||
| 2012 | <row> | ||
| 2013 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_H263_P_FRAME_QP</constant> </entry> | ||
| 2014 | <entry>integer</entry> | ||
| 2015 | </row> | ||
| 2016 | <row><entry spanname="descr">Quantization parameter for an P frame for H263. Valid range: from 1 to 31.</entry> | ||
| 2017 | </row> | ||
| 2018 | |||
| 2019 | <row><entry></entry></row> | ||
| 2020 | <row> | ||
| 2021 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_H263_B_FRAME_QP</constant> </entry> | ||
| 2022 | <entry>integer</entry> | ||
| 2023 | </row> | ||
| 2024 | <row><entry spanname="descr">Quantization parameter for an B frame for H263. Valid range: from 1 to 31.</entry> | ||
| 2025 | </row> | ||
| 2026 | |||
| 2027 | <row><entry></entry></row> | ||
| 2028 | <row> | ||
| 2029 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP</constant> </entry> | ||
| 2030 | <entry>integer</entry> | ||
| 2031 | </row> | ||
| 2032 | <row><entry spanname="descr">Quantization parameter for an I frame for H264. Valid range: from 0 to 51.</entry> | ||
| 2033 | </row> | ||
| 2034 | |||
| 2035 | <row><entry></entry></row> | ||
| 2036 | <row> | ||
| 2037 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_H264_MIN_QP</constant> </entry> | ||
| 2038 | <entry>integer</entry> | ||
| 2039 | </row> | ||
| 2040 | <row><entry spanname="descr">Minimum quantization parameter for H264. Valid range: from 0 to 51.</entry> | ||
| 2041 | </row> | ||
| 2042 | |||
| 2043 | <row><entry></entry></row> | ||
| 2044 | <row> | ||
| 2045 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_H264_MAX_QP</constant> </entry> | ||
| 2046 | <entry>integer</entry> | ||
| 2047 | </row> | ||
| 2048 | <row><entry spanname="descr">Maximum quantization parameter for H264. Valid range: from 0 to 51.</entry> | ||
| 2049 | </row> | ||
| 2050 | |||
| 2051 | <row><entry></entry></row> | ||
| 2052 | <row> | ||
| 2053 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP</constant> </entry> | ||
| 2054 | <entry>integer</entry> | ||
| 2055 | </row> | ||
| 2056 | <row><entry spanname="descr">Quantization parameter for an P frame for H264. Valid range: from 0 to 51.</entry> | ||
| 2057 | </row> | ||
| 2058 | |||
| 2059 | <row><entry></entry></row> | ||
| 2060 | <row> | ||
| 2061 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP</constant> </entry> | ||
| 2062 | <entry>integer</entry> | ||
| 2063 | </row> | ||
| 2064 | <row><entry spanname="descr">Quantization parameter for an B frame for H264. Valid range: from 0 to 51.</entry> | ||
| 2065 | </row> | ||
| 2066 | |||
| 2067 | <row><entry></entry></row> | ||
| 2068 | <row> | ||
| 2069 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP</constant> </entry> | ||
| 2070 | <entry>integer</entry> | ||
| 2071 | </row> | ||
| 2072 | <row><entry spanname="descr">Quantization parameter for an I frame for MPEG4. Valid range: from 1 to 31.</entry> | ||
| 2073 | </row> | ||
| 2074 | |||
| 2075 | <row><entry></entry></row> | ||
| 2076 | <row> | ||
| 2077 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_MPEG4_MIN_QP</constant> </entry> | ||
| 2078 | <entry>integer</entry> | ||
| 2079 | </row> | ||
| 2080 | <row><entry spanname="descr">Minimum quantization parameter for MPEG4. Valid range: from 1 to 31.</entry> | ||
| 2081 | </row> | ||
| 2082 | |||
| 2083 | <row><entry></entry></row> | ||
| 2084 | <row> | ||
| 2085 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_MPEG4_MAX_QP</constant> </entry> | ||
| 2086 | <entry>integer</entry> | ||
| 2087 | </row> | ||
| 2088 | <row><entry spanname="descr">Maximum quantization parameter for MPEG4. Valid range: from 1 to 31.</entry> | ||
| 2089 | </row> | ||
| 2090 | |||
| 2091 | <row><entry></entry></row> | ||
| 2092 | <row> | ||
| 2093 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP</constant> </entry> | ||
| 2094 | <entry>integer</entry> | ||
| 2095 | </row> | ||
| 2096 | <row><entry spanname="descr">Quantization parameter for an P frame for MPEG4. Valid range: from 1 to 31.</entry> | ||
| 2097 | </row> | ||
| 2098 | |||
| 2099 | <row><entry></entry></row> | ||
| 2100 | <row> | ||
| 2101 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_MPEG4_B_FRAME_QP</constant> </entry> | ||
| 2102 | <entry>integer</entry> | ||
| 2103 | </row> | ||
| 2104 | <row><entry spanname="descr">Quantization parameter for an B frame for MPEG4. Valid range: from 1 to 31.</entry> | ||
| 2105 | </row> | ||
| 2106 | |||
| 2107 | <row><entry></entry></row> | ||
| 2108 | <row> | ||
| 2109 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_VBV_SIZE</constant> </entry> | ||
| 2110 | <entry>integer</entry> | ||
| 2111 | </row> | ||
| 2112 | <row><entry spanname="descr">The Video Buffer Verifier size in kilobytes, it is used as a limitation of frame skip. | ||
| 2113 | The VBV is defined in the standard as a mean to verify that the produced stream will be succesfully decoded. | ||
| 2114 | The standard describes it as "Part of a hypothetical decoder that is conceptually connected to the | ||
| 2115 | output of the encoder. Its purpose is to provide a constraint on the variability of the data rate that an | ||
| 2116 | encoder or editing process may produce.". | ||
| 2117 | Applicable to the MPEG1, MPEG2, MPEG4 encoders.</entry> | ||
| 2118 | </row> | ||
| 2119 | |||
| 2120 | <row><entry></entry></row> | ||
| 2121 | <row> | ||
| 2122 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_H264_CPB_SIZE</constant> </entry> | ||
| 2123 | <entry>integer</entry> | ||
| 2124 | </row> | ||
| 2125 | <row><entry spanname="descr">The Coded Picture Buffer size in kilobytes, it is used as a limitation of frame skip. | ||
| 2126 | The CPB is defined in the H264 standard as a mean to verify that the produced stream will be succesfully decoded. | ||
| 2127 | Applicable to the H264 encoder.</entry> | ||
| 2128 | </row> | ||
| 2129 | |||
| 2130 | <row><entry></entry></row> | ||
| 2131 | <row> | ||
| 2132 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_H264_I_PERIOD</constant> </entry> | ||
| 2133 | <entry>integer</entry> | ||
| 2134 | </row> | ||
| 2135 | <row><entry spanname="descr">Period between I-frames in the open GOP for H264. In case of an open GOP | ||
| 2136 | this is the period between two I-frames. The period between IDR (Instantaneous Decoding Refresh) frames is taken from the GOP_SIZE control. | ||
| 2137 | An IDR frame, which stands for Instantaneous Decoding Refresh is an I-frame after which no prior frames are | ||
| 2138 | referenced. This means that a stream can be restarted from an IDR frame without the need to store or decode any | ||
| 2139 | previous frames. Applicable to the H264 encoder.</entry> | ||
| 2140 | </row> | ||
| 2141 | |||
| 2142 | <row><entry></entry></row> | ||
| 2143 | <row> | ||
| 2144 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_HEADER_MODE</constant> </entry> | ||
| 2145 | <entry>enum v4l2_mpeg_header_mode</entry> | ||
| 2146 | </row> | ||
| 2147 | <row><entry spanname="descr">Determines whether the header is returned as the first buffer or is | ||
| 2148 | it returned together with the first frame. Applicable to encoders. | ||
| 2149 | Possible values are:</entry> | ||
| 2150 | </row> | ||
| 2151 | <row> | ||
| 2152 | <entrytbl spanname="descr" cols="2"> | ||
| 2153 | <tbody valign="top"> | ||
| 2154 | <row> | ||
| 2155 | <entry><constant>V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE</constant> </entry> | ||
| 2156 | <entry>The stream header is returned separately in the first buffer.</entry> | ||
| 2157 | </row> | ||
| 2158 | <row> | ||
| 2159 | <entry><constant>V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME</constant> </entry> | ||
| 2160 | <entry>The stream header is returned together with the first encoded frame.</entry> | ||
| 2161 | </row> | ||
| 2162 | </tbody> | ||
| 2163 | </entrytbl> | ||
| 2164 | </row> | ||
| 2165 | <row><entry></entry></row> | ||
| 2166 | <row> | ||
| 2167 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_DECODER_MPEG4_DEBLOCK_FILTER</constant> </entry> | ||
| 2168 | <entry>boolean</entry> | ||
| 2169 | </row><row><entry spanname="descr">Enabled the deblocking post processing filter for MPEG4 decoder. | ||
| 2170 | Applicable to the MPEG4 decoder.</entry> | ||
| 2171 | </row> | ||
| 2172 | <row><entry></entry></row> | ||
| 2173 | <row> | ||
| 2174 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_MPEG4_VOP_TIME_RES</constant> </entry> | ||
| 2175 | <entry>integer</entry> | ||
| 2176 | </row><row><entry spanname="descr">vop_time_increment_resolution value for MPEG4. Applicable to the MPEG4 encoder.</entry> | ||
| 2177 | </row> | ||
| 2178 | <row><entry></entry></row> | ||
| 2179 | <row> | ||
| 2180 | <entry spanname="id"><constant>V4L2_CID_MPEG_VIDEO_MPEG4_VOP_TIME_INC</constant> </entry> | ||
| 2181 | <entry>integer</entry> | ||
| 2182 | </row><row><entry spanname="descr">vop_time_increment value for MPEG4. Applicable to the MPEG4 encoder.</entry> | ||
| 2183 | </row> | ||
| 2184 | |||
| 2185 | </tbody> | ||
| 2186 | </tgroup> | ||
| 2187 | </table> | ||
| 2188 | </section> | ||
| 2189 | |||
| 2190 | <section> | ||
| 2191 | <title>MFC 5.1 MPEG Controls</title> | ||
| 2192 | |||
| 2193 | <para>The following MPEG class controls deal with MPEG | ||
| 2194 | decoding and encoding settings that are specific to the Multi Format Codec 5.1 device present | ||
| 2195 | in the S5P family of SoCs by Samsung. | ||
| 2196 | </para> | ||
| 2197 | |||
| 2198 | <table pgwide="1" frame="none" id="mfc51-control-id"> | ||
| 2199 | <title>MFC 5.1 Control IDs</title> | ||
| 2200 | <tgroup cols="4"> | ||
| 2201 | <colspec colname="c1" colwidth="1*" /> | ||
| 2202 | <colspec colname="c2" colwidth="6*" /> | ||
| 2203 | <colspec colname="c3" colwidth="2*" /> | ||
| 2204 | <colspec colname="c4" colwidth="6*" /> | ||
| 2205 | <spanspec namest="c1" nameend="c2" spanname="id" /> | ||
| 2206 | <spanspec namest="c2" nameend="c4" spanname="descr" /> | ||
| 2207 | <thead> | ||
| 2208 | <row> | ||
| 2209 | <entry spanname="id" align="left">ID</entry> | ||
| 2210 | <entry align="left">Type</entry> | ||
| 2211 | </row><row><entry spanname="descr" align="left">Description</entry> | ||
| 2212 | </row> | ||
| 2213 | </thead> | ||
| 2214 | <tbody valign="top"> | ||
| 2215 | <row><entry></entry></row> | ||
| 2216 | <row> | ||
| 2217 | <entry spanname="id"><constant>V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY_ENABLE</constant> </entry> | ||
| 2218 | <entry>integer</entry> | ||
| 2219 | </row><row><entry spanname="descr">If the display delay is enabled then the decoder has to return a | ||
| 2220 | CAPTURE buffer after processing a certain number of OUTPUT buffers. If this number is low, then it may result in | ||
| 2221 | buffers not being dequeued in display order. In addition hardware may still use those buffers as reference, thus | ||
| 2222 | application should not write to those buffers. This feature can be used for example for generating thumbnails of videos. | ||
| 2223 | Applicable to the H264 decoder. | ||
| 2224 | </entry> | ||
| 2225 | </row> | ||
| 2226 | <row><entry></entry></row> | ||
| 2227 | <row> | ||
| 2228 | <entry spanname="id"><constant>V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY</constant> </entry> | ||
| 2229 | <entry>integer</entry> | ||
| 2230 | </row><row><entry spanname="descr">Display delay value for H264 decoder. | ||
| 2231 | The decoder is forced to return a decoded frame after the set 'display delay' number of frames. If this number is | ||
| 2232 | low it may result in frames returned out of dispaly order, in addition the hardware may still be using the returned buffer | ||
| 2233 | as a reference picture for subsequent frames. | ||
| 2234 | </entry> | ||
| 2235 | </row> | ||
| 2236 | <row><entry></entry></row> | ||
| 2237 | <row> | ||
| 2238 | <entry spanname="id"><constant>V4L2_CID_MPEG_MFC51_VIDEO_H264_NUM_REF_PIC_FOR_P</constant> </entry> | ||
| 2239 | <entry>integer</entry> | ||
| 2240 | </row><row><entry spanname="descr">The number of reference pictures used for encoding a P picture. | ||
| 2241 | Applicable to the H264 encoder.</entry> | ||
| 2242 | </row> | ||
| 2243 | <row><entry></entry></row> | ||
| 2244 | <row> | ||
| 2245 | <entry spanname="id"><constant>V4L2_CID_MPEG_MFC51_VIDEO_PADDING</constant> </entry> | ||
| 2246 | <entry>boolean</entry> | ||
| 2247 | </row><row><entry spanname="descr">Padding enable in the encoder - use a color instead of repeating border pixels. | ||
| 2248 | Applicable to encoders.</entry> | ||
| 2249 | </row> | ||
| 2250 | <row><entry></entry></row> | ||
| 2251 | <row> | ||
| 2252 | <entry spanname="id"><constant>V4L2_CID_MPEG_MFC51_VIDEO_PADDING_YUV</constant> </entry> | ||
| 2253 | <entry>integer</entry> | ||
| 2254 | </row><row><entry spanname="descr">Padding color in the encoder. Applicable to encoders. The supplied 32-bit integer is interpreted as follows (bit | ||
| 2255 | 0 = least significant bit):</entry> | ||
| 2256 | </row> | ||
| 2257 | <row> | ||
| 2258 | <entrytbl spanname="descr" cols="2"> | ||
| 2259 | <tbody valign="top"> | ||
| 2260 | <row> | ||
| 2261 | <entry>Bit 0:7</entry> | ||
| 2262 | <entry>V chrominance information</entry> | ||
| 2263 | </row> | ||
| 2264 | <row> | ||
| 2265 | <entry>Bit 8:15</entry> | ||
| 2266 | <entry>U chrominance information</entry> | ||
| 2267 | </row> | ||
| 2268 | <row> | ||
| 2269 | <entry>Bit 16:23</entry> | ||
| 2270 | <entry>Y luminance information</entry> | ||
| 2271 | </row> | ||
| 2272 | <row> | ||
| 2273 | <entry>Bit 24:31</entry> | ||
| 2274 | <entry>Must be zero.</entry> | ||
| 2275 | </row> | ||
| 2276 | </tbody> | ||
| 2277 | </entrytbl> | ||
| 2278 | </row> | ||
| 2279 | <row><entry></entry></row> | ||
| 2280 | <row> | ||
| 2281 | <entry spanname="id"><constant>V4L2_CID_MPEG_MFC51_VIDEO_RC_REACTION_COEFF</constant> </entry> | ||
| 2282 | <entry>integer</entry> | ||
| 2283 | </row><row><entry spanname="descr">Reaction coefficient for MFC rate control. Applicable to encoders. | ||
| 2284 | <para>Note 1: Valid only when the frame level RC is enabled.</para> | ||
| 2285 | <para>Note 2: For tight CBR, this field must be small (ex. 2 ~ 10). | ||
| 2286 | For VBR, this field must be large (ex. 100 ~ 1000).</para> | ||
| 2287 | <para>Note 3: It is not recommended to use the greater number than FRAME_RATE * (10^9 / BIT_RATE).</para> | ||
| 2288 | </entry> | ||
| 2289 | </row> | ||
| 2290 | <row><entry></entry></row> | ||
| 2291 | <row> | ||
| 2292 | <entry spanname="id"><constant>V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_DARK</constant> </entry> | ||
| 2293 | <entry>boolean</entry> | ||
| 2294 | </row><row><entry spanname="descr">Adaptive rate control for dark region. | ||
| 2295 | Valid only when H.264 and macroblock level RC is enabled (<constant>V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE</constant>). | ||
| 2296 | Applicable to the H264 encoder.</entry> | ||
| 2297 | </row> | ||
| 2298 | <row><entry></entry></row> | ||
| 2299 | <row> | ||
| 2300 | <entry spanname="id"><constant>V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_SMOOTH</constant> </entry> | ||
| 2301 | <entry>boolean</entry> | ||
| 2302 | </row><row><entry spanname="descr">Adaptive rate control for smooth region. | ||
| 2303 | Valid only when H.264 and macroblock level RC is enabled (<constant>V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE</constant>). | ||
| 2304 | Applicable to the H264 encoder.</entry> | ||
| 2305 | </row> | ||
| 2306 | <row><entry></entry></row> | ||
| 2307 | <row> | ||
| 2308 | <entry spanname="id"><constant>V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_STATIC</constant> </entry> | ||
| 2309 | <entry>boolean</entry> | ||
| 2310 | </row><row><entry spanname="descr">Adaptive rate control for static region. | ||
| 2311 | Valid only when H.264 and macroblock level RC is enabled (<constant>V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE</constant>). | ||
| 2312 | Applicable to the H264 encoder.</entry> | ||
| 2313 | </row> | ||
| 2314 | <row><entry></entry></row> | ||
| 2315 | <row> | ||
| 2316 | <entry spanname="id"><constant>V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_ACTIVITY</constant> </entry> | ||
| 2317 | <entry>boolean</entry> | ||
| 2318 | </row><row><entry spanname="descr">Adaptive rate control for activity region. | ||
| 2319 | Valid only when H.264 and macroblock level RC is enabled (<constant>V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE</constant>). | ||
| 2320 | Applicable to the H264 encoder.</entry> | ||
| 2321 | </row> | ||
| 2322 | <row><entry></entry></row> | ||
| 2323 | <row> | ||
| 2324 | <entry spanname="id"><constant>V4L2_CID_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE</constant> </entry> | ||
| 2325 | <entry>enum v4l2_mpeg_mfc51_frame_skip_mode</entry> | ||
| 2326 | </row> | ||
| 2327 | <row><entry spanname="descr"> | ||
| 2328 | Indicates in what conditions the encoder should skip frames. If encoding a frame would cause the encoded stream to be larger then | ||
| 2329 | a chosen data limit then the frame will be skipped. | ||
| 2330 | Possible values are:</entry> | ||
| 2331 | </row> | ||
| 2332 | <row> | ||
| 2333 | <entrytbl spanname="descr" cols="2"> | ||
| 2334 | <tbody valign="top"> | ||
| 2335 | <row> | ||
| 2336 | <entry><constant>V4L2_MPEG_MFC51_FRAME_SKIP_MODE_DISABLED</constant> </entry> | ||
| 2337 | <entry>Frame skip mode is disabled.</entry> | ||
| 2338 | </row> | ||
| 2339 | <row> | ||
| 2340 | <entry><constant>V4L2_MPEG_MFC51_FRAME_SKIP_MODE_LEVEL_LIMIT</constant> </entry> | ||
| 2341 | <entry>Frame skip mode enabled and buffer limit is set by the chosen level and is defined by the standard.</entry> | ||
| 2342 | </row> | ||
| 2343 | <row> | ||
| 2344 | <entry><constant>V4L2_MPEG_MFC51_FRAME_SKIP_MODE_BUF_LIMIT</constant> </entry> | ||
| 2345 | <entry>Frame skip mode enabled and buffer limit is set by the VBV (MPEG1/2/4) or CPB (H264) buffer size control.</entry> | ||
| 2346 | </row> | ||
| 2347 | </tbody> | ||
| 2348 | </entrytbl> | ||
| 2349 | </row> | ||
| 2350 | <row><entry></entry></row> | ||
| 2351 | <row> | ||
| 2352 | <entry spanname="id"><constant>V4L2_CID_MPEG_MFC51_VIDEO_RC_FIXED_TARGET_BIT</constant> </entry> | ||
| 2353 | <entry>integer</entry> | ||
| 2354 | </row><row><entry spanname="descr">Enable rate-control with fixed target bit. | ||
| 2355 | If this setting is enabled, then the rate control logic of the encoder will calculate the average bitrate | ||
| 2356 | for a GOP and keep it below or equal the set bitrate target. Otherwise the rate control logic calculates the | ||
| 2357 | overall average bitrate for the stream and keeps it below or equal to the set bitrate. In the first case | ||
| 2358 | the average bitrate for the whole stream will be smaller then the set bitrate. This is caused because the | ||
| 2359 | average is calculated for smaller number of frames, on the other hand enabling this setting will ensure that | ||
| 2360 | the stream will meet tight bandwidth contraints. Applicable to encoders. | ||
| 2361 | </entry> | ||
| 2362 | </row> | ||
| 2363 | <row><entry></entry></row> | ||
| 2364 | <row> | ||
| 2365 | <entry spanname="id"><constant>V4L2_CID_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE</constant> </entry> | ||
| 2366 | <entry>enum v4l2_mpeg_mfc51_force_frame_type</entry> | ||
| 2367 | </row> | ||
| 2368 | <row><entry spanname="descr">Force a frame type for the next queued buffer. Applicable to encoders. | ||
| 2369 | Possible values are:</entry> | ||
| 2370 | </row> | ||
| 2371 | <row> | ||
| 2372 | <entrytbl spanname="descr" cols="2"> | ||
| 2373 | <tbody valign="top"> | ||
| 2374 | <row> | ||
| 2375 | <entry><constant>V4L2_MPEG_MFC51_FORCE_FRAME_TYPE_DISABLED</constant> </entry> | ||
| 2376 | <entry>Forcing a specific frame type disabled.</entry> | ||
| 2377 | </row> | ||
| 2378 | <row> | ||
| 2379 | <entry><constant>V4L2_MPEG_MFC51_FORCE_FRAME_TYPE_I_FRAME</constant> </entry> | ||
| 2380 | <entry>Force an I-frame.</entry> | ||
| 2381 | </row> | ||
| 2382 | <row> | ||
| 2383 | <entry><constant>V4L2_MPEG_MFC51_FORCE_FRAME_TYPE_NOT_CODED</constant> </entry> | ||
| 2384 | <entry>Force a non-coded frame.</entry> | ||
| 2385 | </row> | ||
| 2386 | </tbody> | ||
| 2387 | </entrytbl> | ||
| 2388 | </row> | ||
| 1409 | </tbody> | 2389 | </tbody> |
| 1410 | </tgroup> | 2390 | </tgroup> |
| 1411 | </table> | 2391 | </table> |
| @@ -2092,6 +3072,289 @@ manually or automatically if set to zero. Unit, range and step are driver-specif | |||
| 2092 | <para>For more details about RDS specification, refer to | 3072 | <para>For more details about RDS specification, refer to |
| 2093 | <xref linkend="en50067" /> document, from CENELEC.</para> | 3073 | <xref linkend="en50067" /> document, from CENELEC.</para> |
| 2094 | </section> | 3074 | </section> |
| 3075 | |||
| 3076 | <section id="flash-controls"> | ||
| 3077 | <title>Flash Control Reference</title> | ||
| 3078 | |||
| 3079 | <note> | ||
| 3080 | <title>Experimental</title> | ||
| 3081 | |||
| 3082 | <para>This is an <link linkend="experimental">experimental</link> | ||
| 3083 | interface and may change in the future.</para> | ||
| 3084 | </note> | ||
| 3085 | |||
| 3086 | <para> | ||
| 3087 | The V4L2 flash controls are intended to provide generic access | ||
| 3088 | to flash controller devices. Flash controller devices are | ||
| 3089 | typically used in digital cameras. | ||
| 3090 | </para> | ||
| 3091 | |||
| 3092 | <para> | ||
| 3093 | The interface can support both LED and xenon flash devices. As | ||
| 3094 | of writing this, there is no xenon flash driver using this | ||
| 3095 | interface. | ||
| 3096 | </para> | ||
| 3097 | |||
| 3098 | <section id="flash-controls-use-cases"> | ||
| 3099 | <title>Supported use cases</title> | ||
| 3100 | |||
| 3101 | <section> | ||
| 3102 | <title>Unsynchronised LED flash (software strobe)</title> | ||
| 3103 | |||
| 3104 | <para> | ||
| 3105 | Unsynchronised LED flash is controlled directly by the | ||
| 3106 | host as the sensor. The flash must be enabled by the host | ||
| 3107 | before the exposure of the image starts and disabled once | ||
| 3108 | it ends. The host is fully responsible for the timing of | ||
| 3109 | the flash. | ||
| 3110 | </para> | ||
| 3111 | |||
| 3112 | <para>Example of such device: Nokia N900.</para> | ||
| 3113 | </section> | ||
| 3114 | |||
| 3115 | <section> | ||
| 3116 | <title>Synchronised LED flash (hardware strobe)</title> | ||
| 3117 | |||
| 3118 | <para> | ||
| 3119 | The synchronised LED flash is pre-programmed by the host | ||
| 3120 | (power and timeout) but controlled by the sensor through a | ||
| 3121 | strobe signal from the sensor to the flash. | ||
| 3122 | </para> | ||
| 3123 | |||
| 3124 | <para> | ||
| 3125 | The sensor controls the flash duration and timing. This | ||
| 3126 | information typically must be made available to the | ||
| 3127 | sensor. | ||
| 3128 | </para> | ||
| 3129 | |||
| 3130 | </section> | ||
| 3131 | |||
| 3132 | <section> | ||
| 3133 | <title>LED flash as torch</title> | ||
| 3134 | |||
| 3135 | <para> | ||
| 3136 | LED flash may be used as torch in conjunction with another | ||
| 3137 | use case involving camera or individually. | ||
| 3138 | </para> | ||
| 3139 | |||
| 3140 | </section> | ||
| 3141 | |||
| 3142 | </section> | ||
| 3143 | |||
| 3144 | <table pgwide="1" frame="none" id="flash-control-id"> | ||
| 3145 | <title>Flash Control IDs</title> | ||
| 3146 | |||
| 3147 | <tgroup cols="4"> | ||
| 3148 | <colspec colname="c1" colwidth="1*" /> | ||
| 3149 | <colspec colname="c2" colwidth="6*" /> | ||
| 3150 | <colspec colname="c3" colwidth="2*" /> | ||
| 3151 | <colspec colname="c4" colwidth="6*" /> | ||
| 3152 | <spanspec namest="c1" nameend="c2" spanname="id" /> | ||
| 3153 | <spanspec namest="c2" nameend="c4" spanname="descr" /> | ||
| 3154 | <thead> | ||
| 3155 | <row> | ||
| 3156 | <entry spanname="id" align="left">ID</entry> | ||
| 3157 | <entry align="left">Type</entry> | ||
| 3158 | </row><row rowsep="1"><entry spanname="descr" align="left">Description</entry> | ||
| 3159 | </row> | ||
| 3160 | </thead> | ||
| 3161 | <tbody valign="top"> | ||
| 3162 | <row><entry></entry></row> | ||
| 3163 | <row> | ||
| 3164 | <entry spanname="id"><constant>V4L2_CID_FLASH_CLASS</constant></entry> | ||
| 3165 | <entry>class</entry> | ||
| 3166 | </row> | ||
| 3167 | <row> | ||
| 3168 | <entry spanname="descr">The FLASH class descriptor.</entry> | ||
| 3169 | </row> | ||
| 3170 | <row> | ||
| 3171 | <entry spanname="id"><constant>V4L2_CID_FLASH_LED_MODE</constant></entry> | ||
| 3172 | <entry>menu</entry> | ||
| 3173 | </row> | ||
| 3174 | <row id="v4l2-flash-led-mode"> | ||
| 3175 | <entry spanname="descr">Defines the mode of the flash LED, | ||
| 3176 | the high-power white LED attached to the flash controller. | ||
| 3177 | Setting this control may not be possible in presence of | ||
| 3178 | some faults. See V4L2_CID_FLASH_FAULT.</entry> | ||
| 3179 | </row> | ||
| 3180 | <row> | ||
| 3181 | <entrytbl spanname="descr" cols="2"> | ||
| 3182 | <tbody valign="top"> | ||
| 3183 | <row> | ||
| 3184 | <entry><constant>V4L2_FLASH_LED_MODE_NONE</constant></entry> | ||
| 3185 | <entry>Off.</entry> | ||
| 3186 | </row> | ||
| 3187 | <row> | ||
| 3188 | <entry><constant>V4L2_FLASH_LED_MODE_FLASH</constant></entry> | ||
| 3189 | <entry>Flash mode.</entry> | ||
| 3190 | </row> | ||
| 3191 | <row> | ||
| 3192 | <entry><constant>V4L2_FLASH_LED_MODE_TORCH</constant></entry> | ||
| 3193 | <entry>Torch mode. See V4L2_CID_FLASH_TORCH_INTENSITY.</entry> | ||
| 3194 | </row> | ||
| 3195 | </tbody> | ||
| 3196 | </entrytbl> | ||
| 3197 | </row> | ||
| 3198 | <row> | ||
| 3199 | <entry spanname="id"><constant>V4L2_CID_FLASH_STROBE_SOURCE</constant></entry> | ||
| 3200 | <entry>menu</entry> | ||
| 3201 | </row> | ||
| 3202 | <row id="v4l2-flash-strobe-source"><entry | ||
| 3203 | spanname="descr">Defines the source of the flash LED | ||
| 3204 | strobe.</entry> | ||
| 3205 | </row> | ||
| 3206 | <row> | ||
| 3207 | <entrytbl spanname="descr" cols="2"> | ||
| 3208 | <tbody valign="top"> | ||
| 3209 | <row> | ||
| 3210 | <entry><constant>V4L2_FLASH_STROBE_SOURCE_SOFTWARE</constant></entry> | ||
| 3211 | <entry>The flash strobe is triggered by using | ||
| 3212 | the V4L2_CID_FLASH_STROBE control.</entry> | ||
| 3213 | </row> | ||
| 3214 | <row> | ||
| 3215 | <entry><constant>V4L2_FLASH_STROBE_SOURCE_EXTERNAL</constant></entry> | ||
| 3216 | <entry>The flash strobe is triggered by an | ||
| 3217 | external source. Typically this is a sensor, | ||
| 3218 | which makes it possible to synchronises the | ||
| 3219 | flash strobe start to exposure start.</entry> | ||
| 3220 | </row> | ||
| 3221 | </tbody> | ||
| 3222 | </entrytbl> | ||
| 3223 | </row> | ||
| 3224 | <row> | ||
| 3225 | <entry spanname="id"><constant>V4L2_CID_FLASH_STROBE</constant></entry> | ||
| 3226 | <entry>button</entry> | ||
| 3227 | </row> | ||
| 3228 | <row> | ||
| 3229 | <entry spanname="descr">Strobe flash. Valid when | ||
| 3230 | V4L2_CID_FLASH_LED_MODE is set to | ||
| 3231 | V4L2_FLASH_LED_MODE_FLASH and V4L2_CID_FLASH_STROBE_SOURCE | ||
| 3232 | is set to V4L2_FLASH_STROBE_SOURCE_SOFTWARE. Setting this | ||
| 3233 | control may not be possible in presence of some faults. | ||
| 3234 | See V4L2_CID_FLASH_FAULT.</entry> | ||
| 3235 | </row> | ||
| 3236 | <row> | ||
| 3237 | <entry spanname="id"><constant>V4L2_CID_FLASH_STROBE_STOP</constant></entry> | ||
| 3238 | <entry>button</entry> | ||
| 3239 | </row> | ||
| 3240 | <row><entry spanname="descr">Stop flash strobe immediately.</entry> | ||
| 3241 | </row> | ||
| 3242 | <row> | ||
| 3243 | <entry spanname="id"><constant>V4L2_CID_FLASH_STROBE_STATUS</constant></entry> | ||
| 3244 | <entry>boolean</entry> | ||
| 3245 | </row> | ||
| 3246 | <row> | ||
| 3247 | <entry spanname="descr">Strobe status: whether the flash | ||
| 3248 | is strobing at the moment or not. This is a read-only | ||
| 3249 | control.</entry> | ||
| 3250 | </row> | ||
| 3251 | <row> | ||
| 3252 | <entry spanname="id"><constant>V4L2_CID_FLASH_TIMEOUT</constant></entry> | ||
| 3253 | <entry>integer</entry> | ||
| 3254 | </row> | ||
| 3255 | <row> | ||
| 3256 | <entry spanname="descr">Hardware timeout for flash. The | ||
| 3257 | flash strobe is stopped after this period of time has | ||
| 3258 | passed from the start of the strobe.</entry> | ||
| 3259 | </row> | ||
| 3260 | <row> | ||
| 3261 | <entry spanname="id"><constant>V4L2_CID_FLASH_INTENSITY</constant></entry> | ||
| 3262 | <entry>integer</entry> | ||
| 3263 | </row> | ||
| 3264 | <row> | ||
| 3265 | <entry spanname="descr">Intensity of the flash strobe when | ||
| 3266 | the flash LED is in flash mode | ||
| 3267 | (V4L2_FLASH_LED_MODE_FLASH). The unit should be milliamps | ||
| 3268 | (mA) if possible.</entry> | ||
| 3269 | </row> | ||
| 3270 | <row> | ||
| 3271 | <entry spanname="id"><constant>V4L2_CID_FLASH_TORCH_INTENSITY</constant></entry> | ||
| 3272 | <entry>integer</entry> | ||
| 3273 | </row> | ||
| 3274 | <row> | ||
| 3275 | <entry spanname="descr">Intensity of the flash LED in | ||
| 3276 | torch mode (V4L2_FLASH_LED_MODE_TORCH). The unit should be | ||
| 3277 | milliamps (mA) if possible. Setting this control may not | ||
| 3278 | be possible in presence of some faults. See | ||
| 3279 | V4L2_CID_FLASH_FAULT.</entry> | ||
| 3280 | </row> | ||
| 3281 | <row> | ||
| 3282 | <entry spanname="id"><constant>V4L2_CID_FLASH_INDICATOR_INTENSITY</constant></entry> | ||
| 3283 | <entry>integer</entry> | ||
| 3284 | </row> | ||
| 3285 | <row> | ||
| 3286 | <entry spanname="descr">Intensity of the indicator LED. | ||
| 3287 | The indicator LED may be fully independent of the flash | ||
| 3288 | LED. The unit should be microamps (uA) if possible.</entry> | ||
| 3289 | </row> | ||
| 3290 | <row> | ||
| 3291 | <entry spanname="id"><constant>V4L2_CID_FLASH_FAULT</constant></entry> | ||
| 3292 | <entry>bitmask</entry> | ||
| 3293 | </row> | ||
| 3294 | <row> | ||
| 3295 | <entry spanname="descr">Faults related to the flash. The | ||
| 3296 | faults tell about specific problems in the flash chip | ||
| 3297 | itself or the LEDs attached to it. Faults may prevent | ||
| 3298 | further use of some of the flash controls. In particular, | ||
| 3299 | V4L2_CID_FLASH_LED_MODE is set to V4L2_FLASH_LED_MODE_NONE | ||
| 3300 | if the fault affects the flash LED. Exactly which faults | ||
| 3301 | have such an effect is chip dependent. Reading the faults | ||
| 3302 | resets the control and returns the chip to a usable state | ||
| 3303 | if possible.</entry> | ||
| 3304 | </row> | ||
| 3305 | <row> | ||
| 3306 | <entrytbl spanname="descr" cols="2"> | ||
| 3307 | <tbody valign="top"> | ||
| 3308 | <row> | ||
| 3309 | <entry><constant>V4L2_FLASH_FAULT_OVER_VOLTAGE</constant></entry> | ||
| 3310 | <entry>Flash controller voltage to the flash LED | ||
| 3311 | has exceeded the limit specific to the flash | ||
| 3312 | controller.</entry> | ||
| 3313 | </row> | ||
| 3314 | <row> | ||
| 3315 | <entry><constant>V4L2_FLASH_FAULT_TIMEOUT</constant></entry> | ||
| 3316 | <entry>The flash strobe was still on when | ||
| 3317 | the timeout set by the user --- | ||
| 3318 | V4L2_CID_FLASH_TIMEOUT control --- has expired. | ||
| 3319 | Not all flash controllers may set this in all | ||
| 3320 | such conditions.</entry> | ||
| 3321 | </row> | ||
| 3322 | <row> | ||
| 3323 | <entry><constant>V4L2_FLASH_FAULT_OVER_TEMPERATURE</constant></entry> | ||
| 3324 | <entry>The flash controller has overheated.</entry> | ||
| 3325 | </row> | ||
| 3326 | <row> | ||
| 3327 | <entry><constant>V4L2_FLASH_FAULT_SHORT_CIRCUIT</constant></entry> | ||
| 3328 | <entry>The short circuit protection of the flash | ||
| 3329 | controller has been triggered.</entry> | ||
| 3330 | </row> | ||
| 3331 | </tbody> | ||
| 3332 | </entrytbl> | ||
| 3333 | </row> | ||
| 3334 | <row> | ||
| 3335 | <entry spanname="id"><constant>V4L2_CID_FLASH_CHARGE</constant></entry> | ||
| 3336 | <entry>boolean</entry> | ||
| 3337 | </row> | ||
| 3338 | <row><entry spanname="descr">Enable or disable charging of the xenon | ||
| 3339 | flash capacitor.</entry> | ||
| 3340 | </row> | ||
| 3341 | <row> | ||
| 3342 | <entry spanname="id"><constant>V4L2_CID_FLASH_READY</constant></entry> | ||
| 3343 | <entry>boolean</entry> | ||
| 3344 | </row> | ||
| 3345 | <row> | ||
| 3346 | <entry spanname="descr">Is the flash ready to strobe? | ||
| 3347 | Xenon flashes require their capacitors charged before | ||
| 3348 | strobing. LED flashes often require a cooldown period | ||
| 3349 | after strobe during which another strobe will not be | ||
| 3350 | possible. This is a read-only control.</entry> | ||
| 3351 | </row> | ||
| 3352 | <row><entry></entry></row> | ||
| 3353 | </tbody> | ||
| 3354 | </tgroup> | ||
| 3355 | </table> | ||
| 3356 | |||
| 3357 | </section> | ||
| 2095 | </section> | 3358 | </section> |
| 2096 | 3359 | ||
| 2097 | <!-- | 3360 | <!-- |
diff --git a/Documentation/DocBook/v4l/crop.pdf b/Documentation/DocBook/media/v4l/crop.pdf index c9fb81cd32f3..c9fb81cd32f3 100644 --- a/Documentation/DocBook/v4l/crop.pdf +++ b/Documentation/DocBook/media/v4l/crop.pdf | |||
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diff --git a/Documentation/DocBook/v4l/dev-effect.xml b/Documentation/DocBook/media/v4l/dev-effect.xml index 9c243beba0e6..9c243beba0e6 100644 --- a/Documentation/DocBook/v4l/dev-effect.xml +++ b/Documentation/DocBook/media/v4l/dev-effect.xml | |||
diff --git a/Documentation/DocBook/media/v4l/dev-event.xml b/Documentation/DocBook/media/v4l/dev-event.xml new file mode 100644 index 000000000000..f14ae3fe107c --- /dev/null +++ b/Documentation/DocBook/media/v4l/dev-event.xml | |||
| @@ -0,0 +1,51 @@ | |||
| 1 | <title>Event Interface</title> | ||
| 2 | |||
| 3 | <para>The V4L2 event interface provides a means for a user to get | ||
| 4 | immediately notified on certain conditions taking place on a device. | ||
| 5 | This might include start of frame or loss of signal events, for | ||
| 6 | example. Changes in the value or state of a V4L2 control can also be | ||
| 7 | reported through events. | ||
| 8 | </para> | ||
| 9 | |||
| 10 | <para>To receive events, the events the user is interested in first must | ||
| 11 | be subscribed using the &VIDIOC-SUBSCRIBE-EVENT; ioctl. Once an event is | ||
| 12 | subscribed, the events of subscribed types are dequeueable using the | ||
| 13 | &VIDIOC-DQEVENT; ioctl. Events may be unsubscribed using | ||
| 14 | VIDIOC_UNSUBSCRIBE_EVENT ioctl. The special event type V4L2_EVENT_ALL may | ||
| 15 | be used to unsubscribe all the events the driver supports.</para> | ||
| 16 | |||
| 17 | <para>The event subscriptions and event queues are specific to file | ||
| 18 | handles. Subscribing an event on one file handle does not affect | ||
| 19 | other file handles.</para> | ||
| 20 | |||
| 21 | <para>The information on dequeueable events is obtained by using select or | ||
| 22 | poll system calls on video devices. The V4L2 events use POLLPRI events on | ||
| 23 | poll system call and exceptions on select system call.</para> | ||
| 24 | |||
| 25 | <para>Starting with kernel 3.1 certain guarantees can be given with | ||
| 26 | regards to events:<orderedlist> | ||
| 27 | <listitem> | ||
| 28 | <para>Each subscribed event has its own internal dedicated event queue. | ||
| 29 | This means that flooding of one event type will not interfere with other | ||
| 30 | event types.</para> | ||
| 31 | </listitem> | ||
| 32 | <listitem> | ||
| 33 | <para>If the internal event queue for a particular subscribed event | ||
| 34 | becomes full, then the oldest event in that queue will be dropped.</para> | ||
| 35 | </listitem> | ||
| 36 | <listitem> | ||
| 37 | <para>Where applicable, certain event types can ensure that the payload | ||
| 38 | of the oldest event that is about to be dropped will be merged with the payload | ||
| 39 | of the next oldest event. Thus ensuring that no information is lost, but only an | ||
| 40 | intermediate step leading up to that information. See the documentation for the | ||
| 41 | event you want to subscribe to whether this is applicable for that event or not.</para> | ||
| 42 | </listitem> | ||
| 43 | </orderedlist></para> | ||
| 44 | |||
| 45 | <!-- | ||
| 46 | Local Variables: | ||
| 47 | mode: sgml | ||
| 48 | sgml-parent-document: "v4l2.sgml" | ||
| 49 | indent-tabs-mode: nil | ||
| 50 | End: | ||
| 51 | --> | ||
diff --git a/Documentation/DocBook/v4l/dev-osd.xml b/Documentation/DocBook/media/v4l/dev-osd.xml index c9a68a2ccd33..c9a68a2ccd33 100644 --- a/Documentation/DocBook/v4l/dev-osd.xml +++ b/Documentation/DocBook/media/v4l/dev-osd.xml | |||
diff --git a/Documentation/DocBook/v4l/dev-output.xml b/Documentation/DocBook/media/v4l/dev-output.xml index 919e22c53854..919e22c53854 100644 --- a/Documentation/DocBook/v4l/dev-output.xml +++ b/Documentation/DocBook/media/v4l/dev-output.xml | |||
diff --git a/Documentation/DocBook/v4l/dev-overlay.xml b/Documentation/DocBook/media/v4l/dev-overlay.xml index 92513cf79150..92513cf79150 100644 --- a/Documentation/DocBook/v4l/dev-overlay.xml +++ b/Documentation/DocBook/media/v4l/dev-overlay.xml | |||
diff --git a/Documentation/DocBook/v4l/dev-radio.xml b/Documentation/DocBook/media/v4l/dev-radio.xml index 73aa90b45b34..73aa90b45b34 100644 --- a/Documentation/DocBook/v4l/dev-radio.xml +++ b/Documentation/DocBook/media/v4l/dev-radio.xml | |||
diff --git a/Documentation/DocBook/v4l/dev-raw-vbi.xml b/Documentation/DocBook/media/v4l/dev-raw-vbi.xml index c5a70bdfaf27..c5a70bdfaf27 100644 --- a/Documentation/DocBook/v4l/dev-raw-vbi.xml +++ b/Documentation/DocBook/media/v4l/dev-raw-vbi.xml | |||
diff --git a/Documentation/DocBook/v4l/dev-rds.xml b/Documentation/DocBook/media/v4l/dev-rds.xml index 2427f54397e7..2427f54397e7 100644 --- a/Documentation/DocBook/v4l/dev-rds.xml +++ b/Documentation/DocBook/media/v4l/dev-rds.xml | |||
diff --git a/Documentation/DocBook/v4l/dev-sliced-vbi.xml b/Documentation/DocBook/media/v4l/dev-sliced-vbi.xml index 69e789fa7f7b..69e789fa7f7b 100644 --- a/Documentation/DocBook/v4l/dev-sliced-vbi.xml +++ b/Documentation/DocBook/media/v4l/dev-sliced-vbi.xml | |||
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diff --git a/Documentation/DocBook/v4l/func-close.xml b/Documentation/DocBook/media/v4l/func-close.xml index dfb41cbbbec3..dfb41cbbbec3 100644 --- a/Documentation/DocBook/v4l/func-close.xml +++ b/Documentation/DocBook/media/v4l/func-close.xml | |||
diff --git a/Documentation/DocBook/media/v4l/func-ioctl.xml b/Documentation/DocBook/media/v4l/func-ioctl.xml new file mode 100644 index 000000000000..2de64be706f5 --- /dev/null +++ b/Documentation/DocBook/media/v4l/func-ioctl.xml | |||
| @@ -0,0 +1,79 @@ | |||
| 1 | <refentry id="func-ioctl"> | ||
| 2 | <refmeta> | ||
| 3 | <refentrytitle>V4L2 ioctl()</refentrytitle> | ||
| 4 | &manvol; | ||
| 5 | </refmeta> | ||
| 6 | |||
| 7 | <refnamediv> | ||
| 8 | <refname>v4l2-ioctl</refname> | ||
| 9 | <refpurpose>Program a V4L2 device</refpurpose> | ||
| 10 | </refnamediv> | ||
| 11 | |||
| 12 | <refsynopsisdiv> | ||
| 13 | <funcsynopsis> | ||
| 14 | <funcsynopsisinfo>#include <sys/ioctl.h></funcsynopsisinfo> | ||
| 15 | <funcprototype> | ||
| 16 | <funcdef>int <function>ioctl</function></funcdef> | ||
| 17 | <paramdef>int <parameter>fd</parameter></paramdef> | ||
| 18 | <paramdef>int <parameter>request</parameter></paramdef> | ||
| 19 | <paramdef>void *<parameter>argp</parameter></paramdef> | ||
| 20 | </funcprototype> | ||
| 21 | </funcsynopsis> | ||
| 22 | </refsynopsisdiv> | ||
| 23 | |||
| 24 | <refsect1> | ||
| 25 | <title>Arguments</title> | ||
| 26 | |||
| 27 | <variablelist> | ||
| 28 | <varlistentry> | ||
| 29 | <term><parameter>fd</parameter></term> | ||
| 30 | <listitem> | ||
| 31 | <para>&fd;</para> | ||
| 32 | </listitem> | ||
| 33 | </varlistentry> | ||
| 34 | <varlistentry> | ||
| 35 | <term><parameter>request</parameter></term> | ||
| 36 | <listitem> | ||
| 37 | <para>V4L2 ioctl request code as defined in the <filename>videodev2.h</filename> header file, for example | ||
| 38 | VIDIOC_QUERYCAP.</para> | ||
| 39 | </listitem> | ||
| 40 | </varlistentry> | ||
| 41 | <varlistentry> | ||
| 42 | <term><parameter>argp</parameter></term> | ||
| 43 | <listitem> | ||
| 44 | <para>Pointer to a function parameter, usually a structure.</para> | ||
| 45 | </listitem> | ||
| 46 | </varlistentry> | ||
| 47 | </variablelist> | ||
| 48 | </refsect1> | ||
| 49 | |||
| 50 | <refsect1> | ||
| 51 | <title>Description</title> | ||
| 52 | |||
| 53 | <para>The <function>ioctl()</function> function is used to program | ||
| 54 | V4L2 devices. The argument <parameter>fd</parameter> must be an open | ||
| 55 | file descriptor. An ioctl <parameter>request</parameter> has encoded | ||
| 56 | in it whether the argument is an input, output or read/write | ||
| 57 | parameter, and the size of the argument <parameter>argp</parameter> in | ||
| 58 | bytes. Macros and defines specifying V4L2 ioctl requests are located | ||
| 59 | in the <filename>videodev2.h</filename> header file. | ||
| 60 | Applications should use their own copy, not include the version in the | ||
| 61 | kernel sources on the system they compile on. All V4L2 ioctl requests, | ||
| 62 | their respective function and parameters are specified in <xref | ||
| 63 | linkend="user-func" />.</para> | ||
| 64 | </refsect1> | ||
| 65 | |||
| 66 | <refsect1> | ||
| 67 | &return-value; | ||
| 68 | <para>When an ioctl that takes an output or read/write parameter fails, | ||
| 69 | the parameter remains unmodified.</para> | ||
| 70 | </refsect1> | ||
| 71 | </refentry> | ||
| 72 | |||
| 73 | <!-- | ||
| 74 | Local Variables: | ||
| 75 | mode: sgml | ||
| 76 | sgml-parent-document: "v4l2.sgml" | ||
| 77 | indent-tabs-mode: nil | ||
| 78 | End: | ||
| 79 | --> | ||
diff --git a/Documentation/DocBook/v4l/func-mmap.xml b/Documentation/DocBook/media/v4l/func-mmap.xml index 786732b64bbd..786732b64bbd 100644 --- a/Documentation/DocBook/v4l/func-mmap.xml +++ b/Documentation/DocBook/media/v4l/func-mmap.xml | |||
diff --git a/Documentation/DocBook/v4l/func-munmap.xml b/Documentation/DocBook/media/v4l/func-munmap.xml index e2c4190f9bb6..e2c4190f9bb6 100644 --- a/Documentation/DocBook/v4l/func-munmap.xml +++ b/Documentation/DocBook/media/v4l/func-munmap.xml | |||
diff --git a/Documentation/DocBook/v4l/func-open.xml b/Documentation/DocBook/media/v4l/func-open.xml index 7595d07a8c72..7595d07a8c72 100644 --- a/Documentation/DocBook/v4l/func-open.xml +++ b/Documentation/DocBook/media/v4l/func-open.xml | |||
diff --git a/Documentation/DocBook/v4l/func-poll.xml b/Documentation/DocBook/media/v4l/func-poll.xml index ec3c718f5963..ec3c718f5963 100644 --- a/Documentation/DocBook/v4l/func-poll.xml +++ b/Documentation/DocBook/media/v4l/func-poll.xml | |||
diff --git a/Documentation/DocBook/v4l/func-read.xml b/Documentation/DocBook/media/v4l/func-read.xml index a5089bf8873d..a5089bf8873d 100644 --- a/Documentation/DocBook/v4l/func-read.xml +++ b/Documentation/DocBook/media/v4l/func-read.xml | |||
diff --git a/Documentation/DocBook/v4l/func-select.xml b/Documentation/DocBook/media/v4l/func-select.xml index b6713623181f..b6713623181f 100644 --- a/Documentation/DocBook/v4l/func-select.xml +++ b/Documentation/DocBook/media/v4l/func-select.xml | |||
diff --git a/Documentation/DocBook/v4l/func-write.xml b/Documentation/DocBook/media/v4l/func-write.xml index 2c09c09371c3..2c09c09371c3 100644 --- a/Documentation/DocBook/v4l/func-write.xml +++ b/Documentation/DocBook/media/v4l/func-write.xml | |||
diff --git a/Documentation/DocBook/media/v4l/gen-errors.xml b/Documentation/DocBook/media/v4l/gen-errors.xml new file mode 100644 index 000000000000..5bbf3ce1973a --- /dev/null +++ b/Documentation/DocBook/media/v4l/gen-errors.xml | |||
| @@ -0,0 +1,78 @@ | |||
| 1 | <title>Generic Error Codes</title> | ||
| 2 | |||
| 3 | <table frame="none" pgwide="1" id="gen-errors"> | ||
| 4 | <title>Generic error codes</title> | ||
| 5 | <tgroup cols="2"> | ||
| 6 | &cs-str; | ||
| 7 | <tbody valign="top"> | ||
| 8 | <!-- Keep it ordered alphabetically --> | ||
| 9 | <row> | ||
| 10 | <entry>EBADF</entry> | ||
| 11 | <entry>The file descriptor is not a valid.</entry> | ||
| 12 | </row> | ||
| 13 | <row> | ||
| 14 | <entry>EBUSY</entry> | ||
| 15 | <entry>The ioctl can't be handled because the device is busy. This is | ||
| 16 | typically return while device is streaming, and an ioctl tried to | ||
| 17 | change something that would affect the stream, or would require the | ||
| 18 | usage of a hardware resource that was already allocated. The ioctl | ||
| 19 | must not be retried without performing another action to fix the | ||
| 20 | problem first (typically: stop the stream before retrying).</entry> | ||
| 21 | </row> | ||
| 22 | <row> | ||
| 23 | <entry>EFAULT</entry> | ||
| 24 | <entry>There was a failure while copying data from/to userspace, | ||
| 25 | probably caused by an invalid pointer reference.</entry> | ||
| 26 | </row> | ||
| 27 | <row> | ||
| 28 | <entry>EINVAL</entry> | ||
| 29 | <entry>One or more of the ioctl parameters are invalid or out of the | ||
| 30 | allowed range. This is a widely used error code. See the individual | ||
| 31 | ioctl requests for specific causes.</entry> | ||
| 32 | </row> | ||
| 33 | <row> | ||
| 34 | <entry>ENODEV</entry> | ||
| 35 | <entry>Device not found or was removed.</entry> | ||
| 36 | </row> | ||
| 37 | <row> | ||
| 38 | <entry>ENOMEM</entry> | ||
| 39 | <entry>There's not enough memory to handle the desired operation.</entry> | ||
| 40 | </row> | ||
| 41 | <row> | ||
| 42 | <entry>ENOTTY</entry> | ||
| 43 | <entry>The ioctl is not supported by the driver, actually meaning that | ||
| 44 | the required functionality is not available, or the file | ||
| 45 | descriptor is not for a media device.</entry> | ||
| 46 | </row> | ||
| 47 | <row> | ||
| 48 | <entry>ENOSPC</entry> | ||
| 49 | <entry>On USB devices, the stream ioctl's can return this error, meaning | ||
| 50 | that this request would overcommit the usb bandwidth reserved | ||
| 51 | for periodic transfers (up to 80% of the USB bandwidth).</entry> | ||
| 52 | </row> | ||
| 53 | <row> | ||
| 54 | <entry>ENOSYS or EOPNOTSUPP</entry> | ||
| 55 | <entry>Function not available for this device (dvb API only. Will likely | ||
| 56 | be replaced anytime soon by ENOTTY).</entry> | ||
| 57 | </row> | ||
| 58 | <row> | ||
| 59 | <entry>EPERM</entry> | ||
| 60 | <entry>Permission denied. Can be returned if the device needs write | ||
| 61 | permission, or some special capabilities is needed | ||
| 62 | (e. g. root)</entry> | ||
| 63 | </row> | ||
| 64 | <row> | ||
| 65 | <entry>EWOULDBLOCK</entry> | ||
| 66 | <entry>Operation would block. Used when the ioctl would need to wait | ||
| 67 | for an event, but the device was opened in non-blocking mode.</entry> | ||
| 68 | </row> | ||
| 69 | </tbody> | ||
| 70 | </tgroup> | ||
| 71 | </table> | ||
| 72 | |||
| 73 | <para>Note 1: ioctls may return other error codes. Since errors may have side | ||
| 74 | effects such as a driver reset, applications should abort on unexpected errors. | ||
| 75 | </para> | ||
| 76 | |||
| 77 | <para>Note 2: Request-specific error codes are listed in the individual | ||
| 78 | requests descriptions.</para> | ||
diff --git a/Documentation/DocBook/v4l/io.xml b/Documentation/DocBook/media/v4l/io.xml index c57d1ec6291c..c57d1ec6291c 100644 --- a/Documentation/DocBook/v4l/io.xml +++ b/Documentation/DocBook/media/v4l/io.xml | |||
diff --git a/Documentation/DocBook/v4l/keytable.c.xml b/Documentation/DocBook/media/v4l/keytable.c.xml index d53254a3be15..d53254a3be15 100644 --- a/Documentation/DocBook/v4l/keytable.c.xml +++ b/Documentation/DocBook/media/v4l/keytable.c.xml | |||
diff --git a/Documentation/DocBook/v4l/libv4l.xml b/Documentation/DocBook/media/v4l/libv4l.xml index 3cb10ec51929..3cb10ec51929 100644 --- a/Documentation/DocBook/v4l/libv4l.xml +++ b/Documentation/DocBook/media/v4l/libv4l.xml | |||
diff --git a/Documentation/DocBook/v4l/lirc_device_interface.xml b/Documentation/DocBook/media/v4l/lirc_device_interface.xml index 0e0453f39e73..8d7eb6bf6312 100644 --- a/Documentation/DocBook/v4l/lirc_device_interface.xml +++ b/Documentation/DocBook/media/v4l/lirc_device_interface.xml | |||
| @@ -246,6 +246,8 @@ on working with the default settings initially.</para> | |||
| 246 | </listitem> | 246 | </listitem> |
| 247 | </varlistentry> | 247 | </varlistentry> |
| 248 | </variablelist> | 248 | </variablelist> |
| 249 | 249 | <section id="lirc_dev_errors"> | |
| 250 | &return-value; | ||
| 251 | </section> | ||
| 250 | </section> | 252 | </section> |
| 251 | </section> | 253 | </section> |
diff --git a/Documentation/DocBook/v4l/media-controller.xml b/Documentation/DocBook/media/v4l/media-controller.xml index 873ac3a621f0..873ac3a621f0 100644 --- a/Documentation/DocBook/v4l/media-controller.xml +++ b/Documentation/DocBook/media/v4l/media-controller.xml | |||
diff --git a/Documentation/DocBook/v4l/media-func-close.xml b/Documentation/DocBook/media/v4l/media-func-close.xml index be149c802aeb..be149c802aeb 100644 --- a/Documentation/DocBook/v4l/media-func-close.xml +++ b/Documentation/DocBook/media/v4l/media-func-close.xml | |||
diff --git a/Documentation/DocBook/v4l/media-func-ioctl.xml b/Documentation/DocBook/media/v4l/media-func-ioctl.xml index bda8604de15c..39478d0fbcaa 100644 --- a/Documentation/DocBook/v4l/media-func-ioctl.xml +++ b/Documentation/DocBook/media/v4l/media-func-ioctl.xml | |||
| @@ -63,54 +63,11 @@ | |||
| 63 | </refsect1> | 63 | </refsect1> |
| 64 | 64 | ||
| 65 | <refsect1> | 65 | <refsect1> |
| 66 | <title>Return Value</title> | 66 | &return-value; |
| 67 | 67 | ||
| 68 | <para><function>ioctl()</function> returns <returnvalue>0</returnvalue> on | 68 | <para>Request-specific error codes are listed in the |
| 69 | success. On failure, <returnvalue>-1</returnvalue> is returned, and the | ||
| 70 | <varname>errno</varname> variable is set appropriately. Generic error codes | ||
| 71 | are listed below, and request-specific error codes are listed in the | ||
| 72 | individual requests descriptions.</para> | 69 | individual requests descriptions.</para> |
| 73 | <para>When an ioctl that takes an output or read/write parameter fails, | 70 | <para>When an ioctl that takes an output or read/write parameter fails, |
| 74 | the parameter remains unmodified.</para> | 71 | the parameter remains unmodified.</para> |
| 75 | |||
| 76 | <variablelist> | ||
| 77 | <varlistentry> | ||
| 78 | <term><errorcode>EBADF</errorcode></term> | ||
| 79 | <listitem> | ||
| 80 | <para><parameter>fd</parameter> is not a valid open file descriptor. | ||
| 81 | </para> | ||
| 82 | </listitem> | ||
| 83 | </varlistentry> | ||
| 84 | <varlistentry> | ||
| 85 | <term><errorcode>EFAULT</errorcode></term> | ||
| 86 | <listitem> | ||
| 87 | <para><parameter>argp</parameter> references an inaccessible memory | ||
| 88 | area.</para> | ||
| 89 | </listitem> | ||
| 90 | </varlistentry> | ||
| 91 | <varlistentry> | ||
| 92 | <term><errorcode>EINVAL</errorcode></term> | ||
| 93 | <listitem> | ||
| 94 | <para>The <parameter>request</parameter> or the data pointed to by | ||
| 95 | <parameter>argp</parameter> is not valid. This is a very common error | ||
| 96 | code, see the individual ioctl requests listed in | ||
| 97 | <xref linkend="media-user-func" /> for actual causes.</para> | ||
| 98 | </listitem> | ||
| 99 | </varlistentry> | ||
| 100 | <varlistentry> | ||
| 101 | <term><errorcode>ENOMEM</errorcode></term> | ||
| 102 | <listitem> | ||
| 103 | <para>Insufficient kernel memory was available to complete the | ||
| 104 | request.</para> | ||
| 105 | </listitem> | ||
| 106 | </varlistentry> | ||
| 107 | <varlistentry> | ||
| 108 | <term><errorcode>ENOTTY</errorcode></term> | ||
| 109 | <listitem> | ||
| 110 | <para><parameter>fd</parameter> is not associated with a character | ||
| 111 | special device.</para> | ||
| 112 | </listitem> | ||
| 113 | </varlistentry> | ||
| 114 | </variablelist> | ||
| 115 | </refsect1> | 72 | </refsect1> |
| 116 | </refentry> | 73 | </refentry> |
diff --git a/Documentation/DocBook/v4l/media-func-open.xml b/Documentation/DocBook/media/v4l/media-func-open.xml index f7df034dc9ed..f7df034dc9ed 100644 --- a/Documentation/DocBook/v4l/media-func-open.xml +++ b/Documentation/DocBook/media/v4l/media-func-open.xml | |||
diff --git a/Documentation/DocBook/v4l/media-ioc-device-info.xml b/Documentation/DocBook/media/v4l/media-ioc-device-info.xml index 1f3237351bba..2ce521419e67 100644 --- a/Documentation/DocBook/v4l/media-ioc-device-info.xml +++ b/Documentation/DocBook/media/v4l/media-ioc-device-info.xml | |||
| @@ -127,7 +127,6 @@ | |||
| 127 | </refsect1> | 127 | </refsect1> |
| 128 | 128 | ||
| 129 | <refsect1> | 129 | <refsect1> |
| 130 | <title>Return value</title> | 130 | &return-value; |
| 131 | <para>This function doesn't return specific error codes.</para> | ||
| 132 | </refsect1> | 131 | </refsect1> |
| 133 | </refentry> | 132 | </refentry> |
diff --git a/Documentation/DocBook/v4l/media-ioc-enum-entities.xml b/Documentation/DocBook/media/v4l/media-ioc-enum-entities.xml index 576b68b33f2c..576b68b33f2c 100644 --- a/Documentation/DocBook/v4l/media-ioc-enum-entities.xml +++ b/Documentation/DocBook/media/v4l/media-ioc-enum-entities.xml | |||
diff --git a/Documentation/DocBook/v4l/media-ioc-enum-links.xml b/Documentation/DocBook/media/v4l/media-ioc-enum-links.xml index d2fc73ef8d56..355df43badc5 100644 --- a/Documentation/DocBook/v4l/media-ioc-enum-links.xml +++ b/Documentation/DocBook/media/v4l/media-ioc-enum-links.xml | |||
| @@ -139,7 +139,7 @@ | |||
| 139 | </table> | 139 | </table> |
| 140 | 140 | ||
| 141 | <table pgwide="1" frame="none" id="media-link-desc"> | 141 | <table pgwide="1" frame="none" id="media-link-desc"> |
| 142 | <title>struct <structname>media_links_desc</structname></title> | 142 | <title>struct <structname>media_link_desc</structname></title> |
| 143 | <tgroup cols="3"> | 143 | <tgroup cols="3"> |
| 144 | &cs-str; | 144 | &cs-str; |
| 145 | <tbody valign="top"> | 145 | <tbody valign="top"> |
diff --git a/Documentation/DocBook/v4l/media-ioc-setup-link.xml b/Documentation/DocBook/media/v4l/media-ioc-setup-link.xml index cec97af4dab4..fc2e522ee65a 100644 --- a/Documentation/DocBook/v4l/media-ioc-setup-link.xml +++ b/Documentation/DocBook/media/v4l/media-ioc-setup-link.xml | |||
| @@ -72,15 +72,6 @@ | |||
| 72 | 72 | ||
| 73 | <variablelist> | 73 | <variablelist> |
| 74 | <varlistentry> | 74 | <varlistentry> |
| 75 | <term><errorcode>EBUSY</errorcode></term> | ||
| 76 | <listitem> | ||
| 77 | <para>The link properties can't be changed because the link is | ||
| 78 | currently busy. This can be caused, for instance, by an active media | ||
| 79 | stream (audio or video) on the link. The ioctl shouldn't be retried if | ||
| 80 | no other action is performed before to fix the problem.</para> | ||
| 81 | </listitem> | ||
| 82 | </varlistentry> | ||
| 83 | <varlistentry> | ||
| 84 | <term><errorcode>EINVAL</errorcode></term> | 75 | <term><errorcode>EINVAL</errorcode></term> |
| 85 | <listitem> | 76 | <listitem> |
| 86 | <para>The &media-link-desc; references a non-existing link, or the | 77 | <para>The &media-link-desc; references a non-existing link, or the |
diff --git a/Documentation/DocBook/v4l/pipeline.pdf b/Documentation/DocBook/media/v4l/pipeline.pdf index ee3e37f04b6a..ee3e37f04b6a 100644 --- a/Documentation/DocBook/v4l/pipeline.pdf +++ b/Documentation/DocBook/media/v4l/pipeline.pdf | |||
| Binary files differ | |||
diff --git a/Documentation/DocBook/v4l/pixfmt-grey.xml b/Documentation/DocBook/media/v4l/pixfmt-grey.xml index 3b72bc6b2de7..3b72bc6b2de7 100644 --- a/Documentation/DocBook/v4l/pixfmt-grey.xml +++ b/Documentation/DocBook/media/v4l/pixfmt-grey.xml | |||
diff --git a/Documentation/DocBook/v4l/pixfmt-m420.xml b/Documentation/DocBook/media/v4l/pixfmt-m420.xml index ce4bc019e5c0..ce4bc019e5c0 100644 --- a/Documentation/DocBook/v4l/pixfmt-m420.xml +++ b/Documentation/DocBook/media/v4l/pixfmt-m420.xml | |||
diff --git a/Documentation/DocBook/v4l/pixfmt-nv12.xml b/Documentation/DocBook/media/v4l/pixfmt-nv12.xml index 873f67035181..873f67035181 100644 --- a/Documentation/DocBook/v4l/pixfmt-nv12.xml +++ b/Documentation/DocBook/media/v4l/pixfmt-nv12.xml | |||
diff --git a/Documentation/DocBook/v4l/pixfmt-nv12m.xml b/Documentation/DocBook/media/v4l/pixfmt-nv12m.xml index c9e166d9ded8..c9e166d9ded8 100644 --- a/Documentation/DocBook/v4l/pixfmt-nv12m.xml +++ b/Documentation/DocBook/media/v4l/pixfmt-nv12m.xml | |||
diff --git a/Documentation/DocBook/v4l/pixfmt-nv12mt.xml b/Documentation/DocBook/media/v4l/pixfmt-nv12mt.xml index 7a2855a526c1..7a2855a526c1 100644 --- a/Documentation/DocBook/v4l/pixfmt-nv12mt.xml +++ b/Documentation/DocBook/media/v4l/pixfmt-nv12mt.xml | |||
diff --git a/Documentation/DocBook/v4l/pixfmt-nv16.xml b/Documentation/DocBook/media/v4l/pixfmt-nv16.xml index 26094035fc04..26094035fc04 100644 --- a/Documentation/DocBook/v4l/pixfmt-nv16.xml +++ b/Documentation/DocBook/media/v4l/pixfmt-nv16.xml | |||
diff --git a/Documentation/DocBook/v4l/pixfmt-packed-rgb.xml b/Documentation/DocBook/media/v4l/pixfmt-packed-rgb.xml index 4db272b8a0d3..4db272b8a0d3 100644 --- a/Documentation/DocBook/v4l/pixfmt-packed-rgb.xml +++ b/Documentation/DocBook/media/v4l/pixfmt-packed-rgb.xml | |||
diff --git a/Documentation/DocBook/v4l/pixfmt-packed-yuv.xml b/Documentation/DocBook/media/v4l/pixfmt-packed-yuv.xml index 3cab5d0ca75d..3cab5d0ca75d 100644 --- a/Documentation/DocBook/v4l/pixfmt-packed-yuv.xml +++ b/Documentation/DocBook/media/v4l/pixfmt-packed-yuv.xml | |||
diff --git a/Documentation/DocBook/v4l/pixfmt-sbggr16.xml b/Documentation/DocBook/media/v4l/pixfmt-sbggr16.xml index 519a9efbac10..519a9efbac10 100644 --- a/Documentation/DocBook/v4l/pixfmt-sbggr16.xml +++ b/Documentation/DocBook/media/v4l/pixfmt-sbggr16.xml | |||
diff --git a/Documentation/DocBook/v4l/pixfmt-sbggr8.xml b/Documentation/DocBook/media/v4l/pixfmt-sbggr8.xml index 5fe84ecc2ebe..5fe84ecc2ebe 100644 --- a/Documentation/DocBook/v4l/pixfmt-sbggr8.xml +++ b/Documentation/DocBook/media/v4l/pixfmt-sbggr8.xml | |||
diff --git a/Documentation/DocBook/v4l/pixfmt-sgbrg8.xml b/Documentation/DocBook/media/v4l/pixfmt-sgbrg8.xml index d67a472b0880..d67a472b0880 100644 --- a/Documentation/DocBook/v4l/pixfmt-sgbrg8.xml +++ b/Documentation/DocBook/media/v4l/pixfmt-sgbrg8.xml | |||
diff --git a/Documentation/DocBook/v4l/pixfmt-sgrbg8.xml b/Documentation/DocBook/media/v4l/pixfmt-sgrbg8.xml index 0cdf13b8ac1c..0cdf13b8ac1c 100644 --- a/Documentation/DocBook/v4l/pixfmt-sgrbg8.xml +++ b/Documentation/DocBook/media/v4l/pixfmt-sgrbg8.xml | |||
diff --git a/Documentation/DocBook/v4l/pixfmt-srggb10.xml b/Documentation/DocBook/media/v4l/pixfmt-srggb10.xml index 7b274092e60c..7b274092e60c 100644 --- a/Documentation/DocBook/v4l/pixfmt-srggb10.xml +++ b/Documentation/DocBook/media/v4l/pixfmt-srggb10.xml | |||
diff --git a/Documentation/DocBook/v4l/pixfmt-srggb12.xml b/Documentation/DocBook/media/v4l/pixfmt-srggb12.xml index 9ba4fb690bc0..9ba4fb690bc0 100644 --- a/Documentation/DocBook/v4l/pixfmt-srggb12.xml +++ b/Documentation/DocBook/media/v4l/pixfmt-srggb12.xml | |||
diff --git a/Documentation/DocBook/v4l/pixfmt-srggb8.xml b/Documentation/DocBook/media/v4l/pixfmt-srggb8.xml index 2570e3be3cf1..2570e3be3cf1 100644 --- a/Documentation/DocBook/v4l/pixfmt-srggb8.xml +++ b/Documentation/DocBook/media/v4l/pixfmt-srggb8.xml | |||
diff --git a/Documentation/DocBook/v4l/pixfmt-uyvy.xml b/Documentation/DocBook/media/v4l/pixfmt-uyvy.xml index 816c8d467c16..816c8d467c16 100644 --- a/Documentation/DocBook/v4l/pixfmt-uyvy.xml +++ b/Documentation/DocBook/media/v4l/pixfmt-uyvy.xml | |||
diff --git a/Documentation/DocBook/v4l/pixfmt-vyuy.xml b/Documentation/DocBook/media/v4l/pixfmt-vyuy.xml index 61f12a5e68d9..61f12a5e68d9 100644 --- a/Documentation/DocBook/v4l/pixfmt-vyuy.xml +++ b/Documentation/DocBook/media/v4l/pixfmt-vyuy.xml | |||
diff --git a/Documentation/DocBook/v4l/pixfmt-y10.xml b/Documentation/DocBook/media/v4l/pixfmt-y10.xml index d065043db8d8..d065043db8d8 100644 --- a/Documentation/DocBook/v4l/pixfmt-y10.xml +++ b/Documentation/DocBook/media/v4l/pixfmt-y10.xml | |||
diff --git a/Documentation/DocBook/v4l/pixfmt-y10b.xml b/Documentation/DocBook/media/v4l/pixfmt-y10b.xml index adb0ad808c93..adb0ad808c93 100644 --- a/Documentation/DocBook/v4l/pixfmt-y10b.xml +++ b/Documentation/DocBook/media/v4l/pixfmt-y10b.xml | |||
diff --git a/Documentation/DocBook/v4l/pixfmt-y12.xml b/Documentation/DocBook/media/v4l/pixfmt-y12.xml index ff417b858cc9..ff417b858cc9 100644 --- a/Documentation/DocBook/v4l/pixfmt-y12.xml +++ b/Documentation/DocBook/media/v4l/pixfmt-y12.xml | |||
diff --git a/Documentation/DocBook/v4l/pixfmt-y16.xml b/Documentation/DocBook/media/v4l/pixfmt-y16.xml index d58404015078..d58404015078 100644 --- a/Documentation/DocBook/v4l/pixfmt-y16.xml +++ b/Documentation/DocBook/media/v4l/pixfmt-y16.xml | |||
diff --git a/Documentation/DocBook/v4l/pixfmt-y41p.xml b/Documentation/DocBook/media/v4l/pixfmt-y41p.xml index 73c8536efb05..73c8536efb05 100644 --- a/Documentation/DocBook/v4l/pixfmt-y41p.xml +++ b/Documentation/DocBook/media/v4l/pixfmt-y41p.xml | |||
diff --git a/Documentation/DocBook/v4l/pixfmt-yuv410.xml b/Documentation/DocBook/media/v4l/pixfmt-yuv410.xml index 8eb4a193d770..8eb4a193d770 100644 --- a/Documentation/DocBook/v4l/pixfmt-yuv410.xml +++ b/Documentation/DocBook/media/v4l/pixfmt-yuv410.xml | |||
diff --git a/Documentation/DocBook/v4l/pixfmt-yuv411p.xml b/Documentation/DocBook/media/v4l/pixfmt-yuv411p.xml index 00e0960a9869..00e0960a9869 100644 --- a/Documentation/DocBook/v4l/pixfmt-yuv411p.xml +++ b/Documentation/DocBook/media/v4l/pixfmt-yuv411p.xml | |||
diff --git a/Documentation/DocBook/v4l/pixfmt-yuv420.xml b/Documentation/DocBook/media/v4l/pixfmt-yuv420.xml index 42d7de5e456d..42d7de5e456d 100644 --- a/Documentation/DocBook/v4l/pixfmt-yuv420.xml +++ b/Documentation/DocBook/media/v4l/pixfmt-yuv420.xml | |||
diff --git a/Documentation/DocBook/v4l/pixfmt-yuv420m.xml b/Documentation/DocBook/media/v4l/pixfmt-yuv420m.xml index f5d8f57495c8..f5d8f57495c8 100644 --- a/Documentation/DocBook/v4l/pixfmt-yuv420m.xml +++ b/Documentation/DocBook/media/v4l/pixfmt-yuv420m.xml | |||
diff --git a/Documentation/DocBook/v4l/pixfmt-yuv422p.xml b/Documentation/DocBook/media/v4l/pixfmt-yuv422p.xml index 4348bd9f0d01..4348bd9f0d01 100644 --- a/Documentation/DocBook/v4l/pixfmt-yuv422p.xml +++ b/Documentation/DocBook/media/v4l/pixfmt-yuv422p.xml | |||
diff --git a/Documentation/DocBook/v4l/pixfmt-yuyv.xml b/Documentation/DocBook/media/v4l/pixfmt-yuyv.xml index bdb2ffacbbcc..bdb2ffacbbcc 100644 --- a/Documentation/DocBook/v4l/pixfmt-yuyv.xml +++ b/Documentation/DocBook/media/v4l/pixfmt-yuyv.xml | |||
diff --git a/Documentation/DocBook/v4l/pixfmt-yvyu.xml b/Documentation/DocBook/media/v4l/pixfmt-yvyu.xml index 40d17ae39dde..40d17ae39dde 100644 --- a/Documentation/DocBook/v4l/pixfmt-yvyu.xml +++ b/Documentation/DocBook/media/v4l/pixfmt-yvyu.xml | |||
diff --git a/Documentation/DocBook/v4l/pixfmt.xml b/Documentation/DocBook/media/v4l/pixfmt.xml index deb660207f94..2ff6b7776d7f 100644 --- a/Documentation/DocBook/v4l/pixfmt.xml +++ b/Documentation/DocBook/media/v4l/pixfmt.xml | |||
| @@ -121,7 +121,7 @@ set this field to zero.</entry> | |||
| 121 | an array of <structname>v4l2_plane_pix_format</structname> structures, | 121 | an array of <structname>v4l2_plane_pix_format</structname> structures, |
| 122 | describing all planes of that format.</para> | 122 | describing all planes of that format.</para> |
| 123 | <table pgwide="1" frame="none" id="v4l2-plane-pix-format"> | 123 | <table pgwide="1" frame="none" id="v4l2-plane-pix-format"> |
| 124 | <title>struct <structname>vl42_plane_pix_format</structname></title> | 124 | <title>struct <structname>v4l2_plane_pix_format</structname></title> |
| 125 | <tgroup cols="3"> | 125 | <tgroup cols="3"> |
| 126 | &cs-str; | 126 | &cs-str; |
| 127 | <tbody valign="top"> | 127 | <tbody valign="top"> |
| @@ -741,10 +741,55 @@ information.</para> | |||
| 741 | <row id="V4L2-PIX-FMT-MPEG"> | 741 | <row id="V4L2-PIX-FMT-MPEG"> |
| 742 | <entry><constant>V4L2_PIX_FMT_MPEG</constant></entry> | 742 | <entry><constant>V4L2_PIX_FMT_MPEG</constant></entry> |
| 743 | <entry>'MPEG'</entry> | 743 | <entry>'MPEG'</entry> |
| 744 | <entry>MPEG stream. The actual format is determined by | 744 | <entry>MPEG multiplexed stream. The actual format is determined by |
| 745 | extended control <constant>V4L2_CID_MPEG_STREAM_TYPE</constant>, see | 745 | extended control <constant>V4L2_CID_MPEG_STREAM_TYPE</constant>, see |
| 746 | <xref linkend="mpeg-control-id" />.</entry> | 746 | <xref linkend="mpeg-control-id" />.</entry> |
| 747 | </row> | 747 | </row> |
| 748 | <row id="V4L2-PIX-FMT-H264"> | ||
| 749 | <entry><constant>V4L2_PIX_FMT_H264</constant></entry> | ||
| 750 | <entry>'H264'</entry> | ||
| 751 | <entry>H264 video elementary stream with start codes.</entry> | ||
| 752 | </row> | ||
| 753 | <row id="V4L2-PIX-FMT-H264-NO-SC"> | ||
| 754 | <entry><constant>V4L2_PIX_FMT_H264_NO_SC</constant></entry> | ||
| 755 | <entry>'AVC1'</entry> | ||
| 756 | <entry>H264 video elementary stream without start codes.</entry> | ||
| 757 | </row> | ||
| 758 | <row id="V4L2-PIX-FMT-H263"> | ||
| 759 | <entry><constant>V4L2_PIX_FMT_H263</constant></entry> | ||
| 760 | <entry>'H263'</entry> | ||
| 761 | <entry>H263 video elementary stream.</entry> | ||
| 762 | </row> | ||
| 763 | <row id="V4L2-PIX-FMT-MPEG1"> | ||
| 764 | <entry><constant>V4L2_PIX_FMT_MPEG1</constant></entry> | ||
| 765 | <entry>'MPG1'</entry> | ||
| 766 | <entry>MPEG1 video elementary stream.</entry> | ||
| 767 | </row> | ||
| 768 | <row id="V4L2-PIX-FMT-MPEG2"> | ||
| 769 | <entry><constant>V4L2_PIX_FMT_MPEG2</constant></entry> | ||
| 770 | <entry>'MPG2'</entry> | ||
| 771 | <entry>MPEG2 video elementary stream.</entry> | ||
| 772 | </row> | ||
| 773 | <row id="V4L2-PIX-FMT-MPEG4"> | ||
| 774 | <entry><constant>V4L2_PIX_FMT_MPEG4</constant></entry> | ||
| 775 | <entry>'MPG4'</entry> | ||
| 776 | <entry>MPEG4 video elementary stream.</entry> | ||
| 777 | </row> | ||
| 778 | <row id="V4L2-PIX-FMT-XVID"> | ||
| 779 | <entry><constant>V4L2_PIX_FMT_XVID</constant></entry> | ||
| 780 | <entry>'XVID'</entry> | ||
| 781 | <entry>Xvid video elementary stream.</entry> | ||
| 782 | </row> | ||
| 783 | <row id="V4L2-PIX-FMT-VC1-ANNEX-G"> | ||
| 784 | <entry><constant>V4L2_PIX_FMT_VC1_ANNEX_G</constant></entry> | ||
| 785 | <entry>'VC1G'</entry> | ||
| 786 | <entry>VC1, SMPTE 421M Annex G compliant stream.</entry> | ||
| 787 | </row> | ||
| 788 | <row id="V4L2-PIX-FMT-VC1-ANNEX-L"> | ||
| 789 | <entry><constant>V4L2_PIX_FMT_VC1_ANNEX_L</constant></entry> | ||
| 790 | <entry>'VC1L'</entry> | ||
| 791 | <entry>VC1, SMPTE 421M Annex L compliant stream.</entry> | ||
| 792 | </row> | ||
| 748 | </tbody> | 793 | </tbody> |
| 749 | </tgroup> | 794 | </tgroup> |
| 750 | </table> | 795 | </table> |
| @@ -804,6 +849,12 @@ kernel sources in the file <filename>Documentation/video4linux/cx2341x/README.hm | |||
| 804 | <entry>'CPIA'</entry> | 849 | <entry>'CPIA'</entry> |
| 805 | <entry>YUV format used by the gspca cpia1 driver.</entry> | 850 | <entry>YUV format used by the gspca cpia1 driver.</entry> |
| 806 | </row> | 851 | </row> |
| 852 | <row id="V4L2-PIX-FMT-JPGL"> | ||
| 853 | <entry><constant>V4L2_PIX_FMT_JPGL</constant></entry> | ||
| 854 | <entry>'JPGL'</entry> | ||
| 855 | <entry>JPEG-Light format (Pegasus Lossless JPEG) | ||
| 856 | used in Divio webcams NW 80x.</entry> | ||
| 857 | </row> | ||
| 807 | <row id="V4L2-PIX-FMT-SPCA501"> | 858 | <row id="V4L2-PIX-FMT-SPCA501"> |
| 808 | <entry><constant>V4L2_PIX_FMT_SPCA501</constant></entry> | 859 | <entry><constant>V4L2_PIX_FMT_SPCA501</constant></entry> |
| 809 | <entry>'S501'</entry> | 860 | <entry>'S501'</entry> |
| @@ -854,6 +905,11 @@ kernel sources in the file <filename>Documentation/video4linux/cx2341x/README.hm | |||
| 854 | <entry>'PJPG'</entry> | 905 | <entry>'PJPG'</entry> |
| 855 | <entry>Pixart 73xx JPEG format used by the gspca driver.</entry> | 906 | <entry>Pixart 73xx JPEG format used by the gspca driver.</entry> |
| 856 | </row> | 907 | </row> |
| 908 | <row id="V4L2-PIX-FMT-SE401"> | ||
| 909 | <entry><constant>V4L2_PIX_FMT_SE401</constant></entry> | ||
| 910 | <entry>'S401'</entry> | ||
| 911 | <entry>Compressed RGB format used by the gspca se401 driver</entry> | ||
| 912 | </row> | ||
| 857 | <row id="V4L2-PIX-FMT-SQ905C"> | 913 | <row id="V4L2-PIX-FMT-SQ905C"> |
| 858 | <entry><constant>V4L2_PIX_FMT_SQ905C</constant></entry> | 914 | <entry><constant>V4L2_PIX_FMT_SQ905C</constant></entry> |
| 859 | <entry>'905C'</entry> | 915 | <entry>'905C'</entry> |
diff --git a/Documentation/DocBook/v4l/planar-apis.xml b/Documentation/DocBook/media/v4l/planar-apis.xml index 878ce2040488..878ce2040488 100644 --- a/Documentation/DocBook/v4l/planar-apis.xml +++ b/Documentation/DocBook/media/v4l/planar-apis.xml | |||
diff --git a/Documentation/DocBook/v4l/remote_controllers.xml b/Documentation/DocBook/media/v4l/remote_controllers.xml index 160e464d44b7..160e464d44b7 100644 --- a/Documentation/DocBook/v4l/remote_controllers.xml +++ b/Documentation/DocBook/media/v4l/remote_controllers.xml | |||
diff --git a/Documentation/DocBook/v4l/subdev-formats.xml b/Documentation/DocBook/media/v4l/subdev-formats.xml index 8d3409d2c632..49c532ebbbbe 100644 --- a/Documentation/DocBook/v4l/subdev-formats.xml +++ b/Documentation/DocBook/media/v4l/subdev-formats.xml | |||
| @@ -380,9 +380,6 @@ | |||
| 380 | <title>Bayer Patterns</title> | 380 | <title>Bayer Patterns</title> |
| 381 | <mediaobject> | 381 | <mediaobject> |
| 382 | <imageobject> | 382 | <imageobject> |
| 383 | <imagedata fileref="bayer.pdf" format="PS" /> | ||
| 384 | </imageobject> | ||
| 385 | <imageobject> | ||
| 386 | <imagedata fileref="bayer.png" format="PNG" /> | 383 | <imagedata fileref="bayer.png" format="PNG" /> |
| 387 | </imageobject> | 384 | </imageobject> |
| 388 | <textobject> | 385 | <textobject> |
| @@ -2528,7 +2525,7 @@ | |||
| 2528 | 2525 | ||
| 2529 | <para>Those data formats consist of an ordered sequence of 8-bit bytes | 2526 | <para>Those data formats consist of an ordered sequence of 8-bit bytes |
| 2530 | obtained from JPEG compression process. Additionally to the | 2527 | obtained from JPEG compression process. Additionally to the |
| 2531 | <constant>_JPEG</constant> prefix the format code is made of | 2528 | <constant>_JPEG</constant> postfix the format code is made of |
| 2532 | the following information. | 2529 | the following information. |
| 2533 | <itemizedlist> | 2530 | <itemizedlist> |
| 2534 | <listitem><para>The number of bus samples per entropy encoded byte.</para></listitem> | 2531 | <listitem><para>The number of bus samples per entropy encoded byte.</para></listitem> |
diff --git a/Documentation/DocBook/v4l/v4l2.xml b/Documentation/DocBook/media/v4l/v4l2.xml index a7fd76d0dac1..0d05e8747c12 100644 --- a/Documentation/DocBook/v4l/v4l2.xml +++ b/Documentation/DocBook/media/v4l/v4l2.xml | |||
| @@ -87,7 +87,7 @@ Remote Controller chapter.</contrib> | |||
| 87 | </author> | 87 | </author> |
| 88 | 88 | ||
| 89 | <author> | 89 | <author> |
| 90 | <firstname>Pawel</firstname> | 90 | <firstname>Pawel</firstname> |
| 91 | <surname>Osciak</surname> | 91 | <surname>Osciak</surname> |
| 92 | <contrib>Designed and documented the multi-planar API.</contrib> | 92 | <contrib>Designed and documented the multi-planar API.</contrib> |
| 93 | <affiliation> | 93 | <affiliation> |
| @@ -128,6 +128,15 @@ structs, ioctls) must be noted in more detail in the history chapter | |||
| 128 | applications. --> | 128 | applications. --> |
| 129 | 129 | ||
| 130 | <revision> | 130 | <revision> |
| 131 | <revnumber>3.1</revnumber> | ||
| 132 | <date>2011-06-27</date> | ||
| 133 | <authorinitials>mcc, po, hv</authorinitials> | ||
| 134 | <revremark>Documented that VIDIOC_QUERYCAP now returns a per-subsystem version instead of a per-driver one. | ||
| 135 | Standardize an error code for invalid ioctl. | ||
| 136 | Added V4L2_CTRL_TYPE_BITMASK.</revremark> | ||
| 137 | </revision> | ||
| 138 | |||
| 139 | <revision> | ||
| 131 | <revnumber>2.6.39</revnumber> | 140 | <revnumber>2.6.39</revnumber> |
| 132 | <date>2011-03-01</date> | 141 | <date>2011-03-01</date> |
| 133 | <authorinitials>mcc, po</authorinitials> | 142 | <authorinitials>mcc, po</authorinitials> |
| @@ -401,7 +410,7 @@ and discussions on the V4L mailing list.</revremark> | |||
| 401 | </partinfo> | 410 | </partinfo> |
| 402 | 411 | ||
| 403 | <title>Video for Linux Two API Specification</title> | 412 | <title>Video for Linux Two API Specification</title> |
| 404 | <subtitle>Revision 2.6.39</subtitle> | 413 | <subtitle>Revision 3.1</subtitle> |
| 405 | 414 | ||
| 406 | <chapter id="common"> | 415 | <chapter id="common"> |
| 407 | &sub-common; | 416 | &sub-common; |
diff --git a/Documentation/DocBook/v4l/v4l2grab.c.xml b/Documentation/DocBook/media/v4l/v4l2grab.c.xml index bed12e40be27..bed12e40be27 100644 --- a/Documentation/DocBook/v4l/v4l2grab.c.xml +++ b/Documentation/DocBook/media/v4l/v4l2grab.c.xml | |||
diff --git a/Documentation/DocBook/v4l/vbi_525.pdf b/Documentation/DocBook/media/v4l/vbi_525.pdf index 9e72c25b208d..9e72c25b208d 100644 --- a/Documentation/DocBook/v4l/vbi_525.pdf +++ b/Documentation/DocBook/media/v4l/vbi_525.pdf | |||
| Binary files differ | |||
diff --git a/Documentation/DocBook/v4l/vbi_625.pdf b/Documentation/DocBook/media/v4l/vbi_625.pdf index 765235e33a4d..765235e33a4d 100644 --- a/Documentation/DocBook/v4l/vbi_625.pdf +++ b/Documentation/DocBook/media/v4l/vbi_625.pdf | |||
| Binary files differ | |||
diff --git a/Documentation/DocBook/v4l/vbi_hsync.pdf b/Documentation/DocBook/media/v4l/vbi_hsync.pdf index 200b668189bf..200b668189bf 100644 --- a/Documentation/DocBook/v4l/vbi_hsync.pdf +++ b/Documentation/DocBook/media/v4l/vbi_hsync.pdf | |||
| Binary files differ | |||
diff --git a/Documentation/DocBook/v4l/vidioc-cropcap.xml b/Documentation/DocBook/media/v4l/vidioc-cropcap.xml index 816e90e283c5..b4f2f255211e 100644 --- a/Documentation/DocBook/v4l/vidioc-cropcap.xml +++ b/Documentation/DocBook/media/v4l/vidioc-cropcap.xml | |||
| @@ -156,19 +156,10 @@ on 22 Oct 2002 subject "Re:[V4L][patches!] Re:v4l2/kernel-2.5" --> | |||
| 156 | <term><errorcode>EINVAL</errorcode></term> | 156 | <term><errorcode>EINVAL</errorcode></term> |
| 157 | <listitem> | 157 | <listitem> |
| 158 | <para>The &v4l2-cropcap; <structfield>type</structfield> is | 158 | <para>The &v4l2-cropcap; <structfield>type</structfield> is |
| 159 | invalid or the ioctl is not supported. This is not permitted for | 159 | invalid. This is not permitted for video capture, output and overlay devices, |
| 160 | video capture, output and overlay devices, which must support | 160 | which must support <constant>VIDIOC_CROPCAP</constant>.</para> |
| 161 | <constant>VIDIOC_CROPCAP</constant>.</para> | ||
| 162 | </listitem> | 161 | </listitem> |
| 163 | </varlistentry> | 162 | </varlistentry> |
| 164 | </variablelist> | 163 | </variablelist> |
| 165 | </refsect1> | 164 | </refsect1> |
| 166 | </refentry> | 165 | </refentry> |
| 167 | |||
| 168 | <!-- | ||
| 169 | Local Variables: | ||
| 170 | mode: sgml | ||
| 171 | sgml-parent-document: "v4l2.sgml" | ||
| 172 | indent-tabs-mode: nil | ||
| 173 | End: | ||
| 174 | --> | ||
diff --git a/Documentation/DocBook/v4l/vidioc-dbg-g-chip-ident.xml b/Documentation/DocBook/media/v4l/vidioc-dbg-g-chip-ident.xml index 4a09e203af0f..4ecd966808de 100644 --- a/Documentation/DocBook/v4l/vidioc-dbg-g-chip-ident.xml +++ b/Documentation/DocBook/media/v4l/vidioc-dbg-g-chip-ident.xml | |||
| @@ -258,18 +258,9 @@ could not identify it.</entry> | |||
| 258 | <varlistentry> | 258 | <varlistentry> |
| 259 | <term><errorcode>EINVAL</errorcode></term> | 259 | <term><errorcode>EINVAL</errorcode></term> |
| 260 | <listitem> | 260 | <listitem> |
| 261 | <para>The driver does not support this ioctl, or the | 261 | <para>The <structfield>match_type</structfield> is invalid.</para> |
| 262 | <structfield>match_type</structfield> is invalid.</para> | ||
| 263 | </listitem> | 262 | </listitem> |
| 264 | </varlistentry> | 263 | </varlistentry> |
| 265 | </variablelist> | 264 | </variablelist> |
| 266 | </refsect1> | 265 | </refsect1> |
| 267 | </refentry> | 266 | </refentry> |
| 268 | |||
| 269 | <!-- | ||
| 270 | Local Variables: | ||
| 271 | mode: sgml | ||
| 272 | sgml-parent-document: "v4l2.sgml" | ||
| 273 | indent-tabs-mode: nil | ||
| 274 | End: | ||
| 275 | --> | ||
diff --git a/Documentation/DocBook/v4l/vidioc-dbg-g-register.xml b/Documentation/DocBook/media/v4l/vidioc-dbg-g-register.xml index 980c7f3e2fd6..a44aebc7997a 100644 --- a/Documentation/DocBook/v4l/vidioc-dbg-g-register.xml +++ b/Documentation/DocBook/media/v4l/vidioc-dbg-g-register.xml | |||
| @@ -247,15 +247,6 @@ register.</entry> | |||
| 247 | 247 | ||
| 248 | <variablelist> | 248 | <variablelist> |
| 249 | <varlistentry> | 249 | <varlistentry> |
| 250 | <term><errorcode>EINVAL</errorcode></term> | ||
| 251 | <listitem> | ||
| 252 | <para>The driver does not support this ioctl, or the kernel | ||
| 253 | was not compiled with the <constant>CONFIG_VIDEO_ADV_DEBUG</constant> | ||
| 254 | option, or the <structfield>match_type</structfield> is invalid, or the | ||
| 255 | selected chip or register does not exist.</para> | ||
| 256 | </listitem> | ||
| 257 | </varlistentry> | ||
| 258 | <varlistentry> | ||
| 259 | <term><errorcode>EPERM</errorcode></term> | 250 | <term><errorcode>EPERM</errorcode></term> |
| 260 | <listitem> | 251 | <listitem> |
| 261 | <para>Insufficient permissions. Root privileges are required | 252 | <para>Insufficient permissions. Root privileges are required |
| @@ -265,11 +256,3 @@ to execute these ioctls.</para> | |||
| 265 | </variablelist> | 256 | </variablelist> |
| 266 | </refsect1> | 257 | </refsect1> |
| 267 | </refentry> | 258 | </refentry> |
| 268 | |||
| 269 | <!-- | ||
| 270 | Local Variables: | ||
| 271 | mode: sgml | ||
| 272 | sgml-parent-document: "v4l2.sgml" | ||
| 273 | indent-tabs-mode: nil | ||
| 274 | End: | ||
| 275 | --> | ||
diff --git a/Documentation/DocBook/v4l/vidioc-dqevent.xml b/Documentation/DocBook/media/v4l/vidioc-dqevent.xml index 4e0a7cc30812..7769642ee431 100644 --- a/Documentation/DocBook/v4l/vidioc-dqevent.xml +++ b/Documentation/DocBook/media/v4l/vidioc-dqevent.xml | |||
| @@ -81,6 +81,13 @@ | |||
| 81 | </row> | 81 | </row> |
| 82 | <row> | 82 | <row> |
| 83 | <entry></entry> | 83 | <entry></entry> |
| 84 | <entry>&v4l2-event-ctrl;</entry> | ||
| 85 | <entry><structfield>ctrl</structfield></entry> | ||
| 86 | <entry>Event data for event V4L2_EVENT_CTRL. | ||
| 87 | </entry> | ||
| 88 | </row> | ||
| 89 | <row> | ||
| 90 | <entry></entry> | ||
| 84 | <entry>__u8</entry> | 91 | <entry>__u8</entry> |
| 85 | <entry><structfield>data</structfield>[64]</entry> | 92 | <entry><structfield>data</structfield>[64]</entry> |
| 86 | <entry>Event data. Defined by the event type. The union | 93 | <entry>Event data. Defined by the event type. The union |
| @@ -110,8 +117,16 @@ | |||
| 110 | <entry>Event timestamp.</entry> | 117 | <entry>Event timestamp.</entry> |
| 111 | </row> | 118 | </row> |
| 112 | <row> | 119 | <row> |
| 120 | <entry>u32</entry> | ||
| 121 | <entry><structfield>id</structfield></entry> | ||
| 122 | <entry></entry> | ||
| 123 | <entry>The ID associated with the event source. If the event does not | ||
| 124 | have an associated ID (this depends on the event type), then this | ||
| 125 | is 0.</entry> | ||
| 126 | </row> | ||
| 127 | <row> | ||
| 113 | <entry>__u32</entry> | 128 | <entry>__u32</entry> |
| 114 | <entry><structfield>reserved</structfield>[9]</entry> | 129 | <entry><structfield>reserved</structfield>[8]</entry> |
| 115 | <entry></entry> | 130 | <entry></entry> |
| 116 | <entry>Reserved for future extensions. Drivers must set | 131 | <entry>Reserved for future extensions. Drivers must set |
| 117 | the array to zero.</entry> | 132 | the array to zero.</entry> |
| @@ -121,11 +136,7 @@ | |||
| 121 | </table> | 136 | </table> |
| 122 | 137 | ||
| 123 | </refsect1> | 138 | </refsect1> |
| 139 | <refsect1> | ||
| 140 | &return-value; | ||
| 141 | </refsect1> | ||
| 124 | </refentry> | 142 | </refentry> |
| 125 | <!-- | ||
| 126 | Local Variables: | ||
| 127 | mode: sgml | ||
| 128 | sgml-parent-document: "v4l2.sgml" | ||
| 129 | indent-tabs-mode: nil | ||
| 130 | End: | ||
| 131 | --> | ||
diff --git a/Documentation/DocBook/v4l/vidioc-encoder-cmd.xml b/Documentation/DocBook/media/v4l/vidioc-encoder-cmd.xml index b0dde943825c..af7f3f2a36dd 100644 --- a/Documentation/DocBook/v4l/vidioc-encoder-cmd.xml +++ b/Documentation/DocBook/media/v4l/vidioc-encoder-cmd.xml | |||
| @@ -180,8 +180,7 @@ Pictures</wordasword>, rather than immediately.</entry> | |||
| 180 | <varlistentry> | 180 | <varlistentry> |
| 181 | <term><errorcode>EINVAL</errorcode></term> | 181 | <term><errorcode>EINVAL</errorcode></term> |
| 182 | <listitem> | 182 | <listitem> |
| 183 | <para>The driver does not support this ioctl, or the | 183 | <para>The <structfield>cmd</structfield> field is invalid.</para> |
| 184 | <structfield>cmd</structfield> field is invalid.</para> | ||
| 185 | </listitem> | 184 | </listitem> |
| 186 | </varlistentry> | 185 | </varlistentry> |
| 187 | <varlistentry> | 186 | <varlistentry> |
| @@ -194,11 +193,3 @@ the encoder was not running.</para> | |||
| 194 | </variablelist> | 193 | </variablelist> |
| 195 | </refsect1> | 194 | </refsect1> |
| 196 | </refentry> | 195 | </refentry> |
| 197 | |||
| 198 | <!-- | ||
| 199 | Local Variables: | ||
| 200 | mode: sgml | ||
| 201 | sgml-parent-document: "v4l2.sgml" | ||
| 202 | indent-tabs-mode: nil | ||
| 203 | End: | ||
| 204 | --> | ||
diff --git a/Documentation/DocBook/v4l/vidioc-enum-dv-presets.xml b/Documentation/DocBook/media/v4l/vidioc-enum-dv-presets.xml index 1d31427edd1b..1d31427edd1b 100644 --- a/Documentation/DocBook/v4l/vidioc-enum-dv-presets.xml +++ b/Documentation/DocBook/media/v4l/vidioc-enum-dv-presets.xml | |||
diff --git a/Documentation/DocBook/v4l/vidioc-enum-fmt.xml b/Documentation/DocBook/media/v4l/vidioc-enum-fmt.xml index 71d373b6d36a..71d373b6d36a 100644 --- a/Documentation/DocBook/v4l/vidioc-enum-fmt.xml +++ b/Documentation/DocBook/media/v4l/vidioc-enum-fmt.xml | |||
diff --git a/Documentation/DocBook/v4l/vidioc-enum-frameintervals.xml b/Documentation/DocBook/media/v4l/vidioc-enum-frameintervals.xml index 3c216e113a54..5fd72c4c33e3 100644 --- a/Documentation/DocBook/v4l/vidioc-enum-frameintervals.xml +++ b/Documentation/DocBook/media/v4l/vidioc-enum-frameintervals.xml | |||
| @@ -254,17 +254,6 @@ enumerated.</entry> | |||
| 254 | 254 | ||
| 255 | <refsect1> | 255 | <refsect1> |
| 256 | &return-value; | 256 | &return-value; |
| 257 | |||
| 258 | <para>See the description section above for a list of return | ||
| 259 | values that <varname>errno</varname> can have.</para> | ||
| 260 | </refsect1> | 257 | </refsect1> |
| 261 | 258 | ||
| 262 | </refentry> | 259 | </refentry> |
| 263 | |||
| 264 | <!-- | ||
| 265 | Local Variables: | ||
| 266 | mode: sgml | ||
| 267 | sgml-parent-document: "v4l2.sgml" | ||
| 268 | indent-tabs-mode: nil | ||
| 269 | End: | ||
| 270 | --> | ||
diff --git a/Documentation/DocBook/v4l/vidioc-enum-framesizes.xml b/Documentation/DocBook/media/v4l/vidioc-enum-framesizes.xml index 6afa4542c818..f77a13f486d7 100644 --- a/Documentation/DocBook/v4l/vidioc-enum-framesizes.xml +++ b/Documentation/DocBook/media/v4l/vidioc-enum-framesizes.xml | |||
| @@ -267,16 +267,5 @@ application should zero out all members except for the | |||
| 267 | 267 | ||
| 268 | <refsect1> | 268 | <refsect1> |
| 269 | &return-value; | 269 | &return-value; |
| 270 | |||
| 271 | <para>See the description section above for a list of return | ||
| 272 | values that <varname>errno</varname> can have.</para> | ||
| 273 | </refsect1> | 270 | </refsect1> |
| 274 | </refentry> | 271 | </refentry> |
| 275 | |||
| 276 | <!-- | ||
| 277 | Local Variables: | ||
| 278 | mode: sgml | ||
| 279 | sgml-parent-document: "v4l2.sgml" | ||
| 280 | indent-tabs-mode: nil | ||
| 281 | End: | ||
| 282 | --> | ||
diff --git a/Documentation/DocBook/v4l/vidioc-enumaudio.xml b/Documentation/DocBook/media/v4l/vidioc-enumaudio.xml index 9ae8f2d3a96f..ea816ab2e49e 100644 --- a/Documentation/DocBook/v4l/vidioc-enumaudio.xml +++ b/Documentation/DocBook/media/v4l/vidioc-enumaudio.xml | |||
| @@ -68,19 +68,9 @@ until the driver returns <errorcode>EINVAL</errorcode>.</para> | |||
| 68 | <varlistentry> | 68 | <varlistentry> |
| 69 | <term><errorcode>EINVAL</errorcode></term> | 69 | <term><errorcode>EINVAL</errorcode></term> |
| 70 | <listitem> | 70 | <listitem> |
| 71 | <para>The number of the audio input is out of bounds, or | 71 | <para>The number of the audio input is out of bounds.</para> |
| 72 | there are no audio inputs at all and this ioctl is not | ||
| 73 | supported.</para> | ||
| 74 | </listitem> | 72 | </listitem> |
| 75 | </varlistentry> | 73 | </varlistentry> |
| 76 | </variablelist> | 74 | </variablelist> |
| 77 | </refsect1> | 75 | </refsect1> |
| 78 | </refentry> | 76 | </refentry> |
| 79 | |||
| 80 | <!-- | ||
| 81 | Local Variables: | ||
| 82 | mode: sgml | ||
| 83 | sgml-parent-document: "v4l2.sgml" | ||
| 84 | indent-tabs-mode: nil | ||
| 85 | End: | ||
| 86 | --> | ||
diff --git a/Documentation/DocBook/v4l/vidioc-enumaudioout.xml b/Documentation/DocBook/media/v4l/vidioc-enumaudioout.xml index d3d7c0ab17b8..2e87cedb0d32 100644 --- a/Documentation/DocBook/v4l/vidioc-enumaudioout.xml +++ b/Documentation/DocBook/media/v4l/vidioc-enumaudioout.xml | |||
| @@ -71,19 +71,9 @@ signal to a sound card are not audio outputs in this sense.</para> | |||
| 71 | <varlistentry> | 71 | <varlistentry> |
| 72 | <term><errorcode>EINVAL</errorcode></term> | 72 | <term><errorcode>EINVAL</errorcode></term> |
| 73 | <listitem> | 73 | <listitem> |
| 74 | <para>The number of the audio output is out of bounds, or | 74 | <para>The number of the audio output is out of bounds.</para> |
| 75 | there are no audio outputs at all and this ioctl is not | ||
| 76 | supported.</para> | ||
| 77 | </listitem> | 75 | </listitem> |
| 78 | </varlistentry> | 76 | </varlistentry> |
| 79 | </variablelist> | 77 | </variablelist> |
| 80 | </refsect1> | 78 | </refsect1> |
| 81 | </refentry> | 79 | </refentry> |
| 82 | |||
| 83 | <!-- | ||
| 84 | Local Variables: | ||
| 85 | mode: sgml | ||
| 86 | sgml-parent-document: "v4l2.sgml" | ||
| 87 | indent-tabs-mode: nil | ||
| 88 | End: | ||
| 89 | --> | ||
diff --git a/Documentation/DocBook/v4l/vidioc-enuminput.xml b/Documentation/DocBook/media/v4l/vidioc-enuminput.xml index 476fe1d2bba0..476fe1d2bba0 100644 --- a/Documentation/DocBook/v4l/vidioc-enuminput.xml +++ b/Documentation/DocBook/media/v4l/vidioc-enuminput.xml | |||
diff --git a/Documentation/DocBook/v4l/vidioc-enumoutput.xml b/Documentation/DocBook/media/v4l/vidioc-enumoutput.xml index a281d26a195f..a281d26a195f 100644 --- a/Documentation/DocBook/v4l/vidioc-enumoutput.xml +++ b/Documentation/DocBook/media/v4l/vidioc-enumoutput.xml | |||
diff --git a/Documentation/DocBook/v4l/vidioc-enumstd.xml b/Documentation/DocBook/media/v4l/vidioc-enumstd.xml index 95803fe2c8e4..95803fe2c8e4 100644 --- a/Documentation/DocBook/v4l/vidioc-enumstd.xml +++ b/Documentation/DocBook/media/v4l/vidioc-enumstd.xml | |||
diff --git a/Documentation/DocBook/v4l/vidioc-g-audio.xml b/Documentation/DocBook/media/v4l/vidioc-g-audio.xml index 65361a8c2b05..d7bb9b3738f6 100644 --- a/Documentation/DocBook/v4l/vidioc-g-audio.xml +++ b/Documentation/DocBook/media/v4l/vidioc-g-audio.xml | |||
| @@ -164,25 +164,9 @@ tuner.</entry> | |||
| 164 | <listitem> | 164 | <listitem> |
| 165 | <para>No audio inputs combine with the current video input, | 165 | <para>No audio inputs combine with the current video input, |
| 166 | or the number of the selected audio input is out of bounds or it does | 166 | or the number of the selected audio input is out of bounds or it does |
| 167 | not combine, or there are no audio inputs at all and the ioctl is not | 167 | not combine.</para> |
| 168 | supported.</para> | ||
| 169 | </listitem> | ||
| 170 | </varlistentry> | ||
| 171 | <varlistentry> | ||
| 172 | <term><errorcode>EBUSY</errorcode></term> | ||
| 173 | <listitem> | ||
| 174 | <para>I/O is in progress, the input cannot be | ||
| 175 | switched.</para> | ||
| 176 | </listitem> | 168 | </listitem> |
| 177 | </varlistentry> | 169 | </varlistentry> |
| 178 | </variablelist> | 170 | </variablelist> |
| 179 | </refsect1> | 171 | </refsect1> |
| 180 | </refentry> | 172 | </refentry> |
| 181 | |||
| 182 | <!-- | ||
| 183 | Local Variables: | ||
| 184 | mode: sgml | ||
| 185 | sgml-parent-document: "v4l2.sgml" | ||
| 186 | indent-tabs-mode: nil | ||
| 187 | End: | ||
| 188 | --> | ||
diff --git a/Documentation/DocBook/v4l/vidioc-g-audioout.xml b/Documentation/DocBook/media/v4l/vidioc-g-audioout.xml index 3632730c5c6e..200a2704a970 100644 --- a/Documentation/DocBook/v4l/vidioc-g-audioout.xml +++ b/Documentation/DocBook/media/v4l/vidioc-g-audioout.xml | |||
| @@ -130,25 +130,9 @@ applications must set the array to zero.</entry> | |||
| 130 | <listitem> | 130 | <listitem> |
| 131 | <para>No audio outputs combine with the current video | 131 | <para>No audio outputs combine with the current video |
| 132 | output, or the number of the selected audio output is out of bounds or | 132 | output, or the number of the selected audio output is out of bounds or |
| 133 | it does not combine, or there are no audio outputs at all and the | 133 | it does not combine.</para> |
| 134 | ioctl is not supported.</para> | ||
| 135 | </listitem> | ||
| 136 | </varlistentry> | ||
| 137 | <varlistentry> | ||
| 138 | <term><errorcode>EBUSY</errorcode></term> | ||
| 139 | <listitem> | ||
| 140 | <para>I/O is in progress, the output cannot be | ||
| 141 | switched.</para> | ||
| 142 | </listitem> | 134 | </listitem> |
| 143 | </varlistentry> | 135 | </varlistentry> |
| 144 | </variablelist> | 136 | </variablelist> |
| 145 | </refsect1> | 137 | </refsect1> |
| 146 | </refentry> | 138 | </refentry> |
| 147 | |||
| 148 | <!-- | ||
| 149 | Local Variables: | ||
| 150 | mode: sgml | ||
| 151 | sgml-parent-document: "v4l2.sgml" | ||
| 152 | indent-tabs-mode: nil | ||
| 153 | End: | ||
| 154 | --> | ||
diff --git a/Documentation/DocBook/v4l/vidioc-g-crop.xml b/Documentation/DocBook/media/v4l/vidioc-g-crop.xml index d235b1dedbed..01a50640dce0 100644 --- a/Documentation/DocBook/v4l/vidioc-g-crop.xml +++ b/Documentation/DocBook/media/v4l/vidioc-g-crop.xml | |||
| @@ -122,22 +122,5 @@ for &v4l2-cropcap; <structfield>bounds</structfield> is used.</entry> | |||
| 122 | 122 | ||
| 123 | <refsect1> | 123 | <refsect1> |
| 124 | &return-value; | 124 | &return-value; |
| 125 | |||
| 126 | <variablelist> | ||
| 127 | <varlistentry> | ||
| 128 | <term><errorcode>EINVAL</errorcode></term> | ||
| 129 | <listitem> | ||
| 130 | <para>Cropping is not supported.</para> | ||
| 131 | </listitem> | ||
| 132 | </varlistentry> | ||
| 133 | </variablelist> | ||
| 134 | </refsect1> | 125 | </refsect1> |
| 135 | </refentry> | 126 | </refentry> |
| 136 | |||
| 137 | <!-- | ||
| 138 | Local Variables: | ||
| 139 | mode: sgml | ||
| 140 | sgml-parent-document: "v4l2.sgml" | ||
| 141 | indent-tabs-mode: nil | ||
| 142 | End: | ||
| 143 | --> | ||
diff --git a/Documentation/DocBook/v4l/vidioc-g-ctrl.xml b/Documentation/DocBook/media/v4l/vidioc-g-ctrl.xml index 8b5e6ff7f3df..5146d00782e3 100644 --- a/Documentation/DocBook/v4l/vidioc-g-ctrl.xml +++ b/Documentation/DocBook/media/v4l/vidioc-g-ctrl.xml | |||
| @@ -117,6 +117,13 @@ because another applications took over control of the device function | |||
| 117 | this control belongs to.</para> | 117 | this control belongs to.</para> |
| 118 | </listitem> | 118 | </listitem> |
| 119 | </varlistentry> | 119 | </varlistentry> |
| 120 | <varlistentry> | ||
| 121 | <term><errorcode>EACCES</errorcode></term> | ||
| 122 | <listitem> | ||
| 123 | <para>Attempt to set a read-only control or to get a | ||
| 124 | write-only control.</para> | ||
| 125 | </listitem> | ||
| 126 | </varlistentry> | ||
| 120 | </variablelist> | 127 | </variablelist> |
| 121 | </refsect1> | 128 | </refsect1> |
| 122 | </refentry> | 129 | </refentry> |
diff --git a/Documentation/DocBook/v4l/vidioc-g-dv-preset.xml b/Documentation/DocBook/media/v4l/vidioc-g-dv-preset.xml index d733721a7519..7940c1149393 100644 --- a/Documentation/DocBook/v4l/vidioc-g-dv-preset.xml +++ b/Documentation/DocBook/media/v4l/vidioc-g-dv-preset.xml | |||
| @@ -97,14 +97,8 @@ If the preset is not supported, it returns an &EINVAL; </para> | |||
| 97 | </tbody> | 97 | </tbody> |
| 98 | </tgroup> | 98 | </tgroup> |
| 99 | </table> | 99 | </table> |
| 100 | 100 | </refsect1> | |
| 101 | <refsect1> | ||
| 102 | &return-value; | ||
| 101 | </refsect1> | 103 | </refsect1> |
| 102 | </refentry> | 104 | </refentry> |
| 103 | |||
| 104 | <!-- | ||
| 105 | Local Variables: | ||
| 106 | mode: sgml | ||
| 107 | sgml-parent-document: "v4l2.sgml" | ||
| 108 | indent-tabs-mode: nil | ||
| 109 | End: | ||
| 110 | --> | ||
diff --git a/Documentation/DocBook/v4l/vidioc-g-dv-timings.xml b/Documentation/DocBook/media/v4l/vidioc-g-dv-timings.xml index d5ec6abf0ce2..4a8648ae9a63 100644 --- a/Documentation/DocBook/v4l/vidioc-g-dv-timings.xml +++ b/Documentation/DocBook/media/v4l/vidioc-g-dv-timings.xml | |||
| @@ -212,12 +212,7 @@ bit 0 (V4L2_DV_VSYNC_POS_POL) is for vertical sync polarity and bit 1 (V4L2_DV_H | |||
| 212 | </tgroup> | 212 | </tgroup> |
| 213 | </table> | 213 | </table> |
| 214 | </refsect1> | 214 | </refsect1> |
| 215 | <refsect1> | ||
| 216 | &return-value; | ||
| 217 | </refsect1> | ||
| 215 | </refentry> | 218 | </refentry> |
| 216 | |||
| 217 | <!-- | ||
| 218 | Local Variables: | ||
| 219 | mode: sgml | ||
| 220 | sgml-parent-document: "v4l2.sgml" | ||
| 221 | indent-tabs-mode: nil | ||
| 222 | End: | ||
| 223 | --> | ||
diff --git a/Documentation/DocBook/v4l/vidioc-g-enc-index.xml b/Documentation/DocBook/media/v4l/vidioc-g-enc-index.xml index 9f242e4b2948..2aef02c9044e 100644 --- a/Documentation/DocBook/v4l/vidioc-g-enc-index.xml +++ b/Documentation/DocBook/media/v4l/vidioc-g-enc-index.xml | |||
| @@ -192,22 +192,5 @@ this mask to obtain the picture coding type.</entry> | |||
| 192 | 192 | ||
| 193 | <refsect1> | 193 | <refsect1> |
| 194 | &return-value; | 194 | &return-value; |
| 195 | |||
| 196 | <variablelist> | ||
| 197 | <varlistentry> | ||
| 198 | <term><errorcode>EINVAL</errorcode></term> | ||
| 199 | <listitem> | ||
| 200 | <para>The driver does not support this ioctl.</para> | ||
| 201 | </listitem> | ||
| 202 | </varlistentry> | ||
| 203 | </variablelist> | ||
| 204 | </refsect1> | 195 | </refsect1> |
| 205 | </refentry> | 196 | </refentry> |
| 206 | |||
| 207 | <!-- | ||
| 208 | Local Variables: | ||
| 209 | mode: sgml | ||
| 210 | sgml-parent-document: "v4l2.sgml" | ||
| 211 | indent-tabs-mode: nil | ||
| 212 | End: | ||
| 213 | --> | ||
diff --git a/Documentation/DocBook/v4l/vidioc-g-ext-ctrls.xml b/Documentation/DocBook/media/v4l/vidioc-g-ext-ctrls.xml index 3aa7f8f9ff0c..5122ce87e0b8 100644 --- a/Documentation/DocBook/v4l/vidioc-g-ext-ctrls.xml +++ b/Documentation/DocBook/media/v4l/vidioc-g-ext-ctrls.xml | |||
| @@ -250,6 +250,13 @@ These controls are described in <xref | |||
| 250 | These controls are described in <xref | 250 | These controls are described in <xref |
| 251 | linkend="fm-tx-controls" />.</entry> | 251 | linkend="fm-tx-controls" />.</entry> |
| 252 | </row> | 252 | </row> |
| 253 | <row> | ||
| 254 | <entry><constant>V4L2_CTRL_CLASS_FLASH</constant></entry> | ||
| 255 | <entry>0x9c0000</entry> | ||
| 256 | <entry>The class containing flash device controls. | ||
| 257 | These controls are described in <xref | ||
| 258 | linkend="flash-controls" />.</entry> | ||
| 259 | </row> | ||
| 253 | </tbody> | 260 | </tbody> |
| 254 | </tgroup> | 261 | </tgroup> |
| 255 | </table> | 262 | </table> |
| @@ -294,6 +301,13 @@ The field <structfield>size</structfield> is set to a value that is enough | |||
| 294 | to store the payload and this error code is returned.</para> | 301 | to store the payload and this error code is returned.</para> |
| 295 | </listitem> | 302 | </listitem> |
| 296 | </varlistentry> | 303 | </varlistentry> |
| 304 | <varlistentry> | ||
| 305 | <term><errorcode>EACCES</errorcode></term> | ||
| 306 | <listitem> | ||
| 307 | <para>Attempt to try or set a read-only control or to get a | ||
| 308 | write-only control.</para> | ||
| 309 | </listitem> | ||
| 310 | </varlistentry> | ||
| 297 | </variablelist> | 311 | </variablelist> |
| 298 | </refsect1> | 312 | </refsect1> |
| 299 | </refentry> | 313 | </refentry> |
diff --git a/Documentation/DocBook/v4l/vidioc-g-fbuf.xml b/Documentation/DocBook/media/v4l/vidioc-g-fbuf.xml index e7dda4822f04..055718231bc1 100644 --- a/Documentation/DocBook/v4l/vidioc-g-fbuf.xml +++ b/Documentation/DocBook/media/v4l/vidioc-g-fbuf.xml | |||
| @@ -446,28 +446,11 @@ overlay.</para> | |||
| 446 | </listitem> | 446 | </listitem> |
| 447 | </varlistentry> | 447 | </varlistentry> |
| 448 | <varlistentry> | 448 | <varlistentry> |
| 449 | <term><errorcode>EBUSY</errorcode></term> | ||
| 450 | <listitem> | ||
| 451 | <para>The framebuffer parameters cannot be changed at this | ||
| 452 | time because overlay is already enabled, or capturing is enabled | ||
| 453 | and the hardware cannot capture and overlay simultaneously.</para> | ||
| 454 | </listitem> | ||
| 455 | </varlistentry> | ||
| 456 | <varlistentry> | ||
| 457 | <term><errorcode>EINVAL</errorcode></term> | 449 | <term><errorcode>EINVAL</errorcode></term> |
| 458 | <listitem> | 450 | <listitem> |
| 459 | <para>The ioctl is not supported or the | 451 | <para>The <constant>VIDIOC_S_FBUF</constant> parameters are unsuitable.</para> |
| 460 | <constant>VIDIOC_S_FBUF</constant> parameters are unsuitable.</para> | ||
| 461 | </listitem> | 452 | </listitem> |
| 462 | </varlistentry> | 453 | </varlistentry> |
| 463 | </variablelist> | 454 | </variablelist> |
| 464 | </refsect1> | 455 | </refsect1> |
| 465 | </refentry> | 456 | </refentry> |
| 466 | |||
| 467 | <!-- | ||
| 468 | Local Variables: | ||
| 469 | mode: sgml | ||
| 470 | sgml-parent-document: "v4l2.sgml" | ||
| 471 | indent-tabs-mode: nil | ||
| 472 | End: | ||
| 473 | --> | ||
diff --git a/Documentation/DocBook/v4l/vidioc-g-fmt.xml b/Documentation/DocBook/media/v4l/vidioc-g-fmt.xml index a4ae59b664eb..17fbda15137b 100644 --- a/Documentation/DocBook/v4l/vidioc-g-fmt.xml +++ b/Documentation/DocBook/media/v4l/vidioc-g-fmt.xml | |||
| @@ -184,29 +184,13 @@ capture and output devices.</entry> | |||
| 184 | 184 | ||
| 185 | <variablelist> | 185 | <variablelist> |
| 186 | <varlistentry> | 186 | <varlistentry> |
| 187 | <term><errorcode>EBUSY</errorcode></term> | ||
| 188 | <listitem> | ||
| 189 | <para>The data format cannot be changed at this | ||
| 190 | time, for example because I/O is already in progress.</para> | ||
| 191 | </listitem> | ||
| 192 | </varlistentry> | ||
| 193 | <varlistentry> | ||
| 194 | <term><errorcode>EINVAL</errorcode></term> | 187 | <term><errorcode>EINVAL</errorcode></term> |
| 195 | <listitem> | 188 | <listitem> |
| 196 | <para>The &v4l2-format; <structfield>type</structfield> | 189 | <para>The &v4l2-format; <structfield>type</structfield> |
| 197 | field is invalid, the requested buffer type not supported, or | 190 | field is invalid, the requested buffer type not supported, or the |
| 198 | <constant>VIDIOC_TRY_FMT</constant> was called and is not | 191 | format is not supported with this buffer type.</para> |
| 199 | supported with this buffer type.</para> | ||
| 200 | </listitem> | 192 | </listitem> |
| 201 | </varlistentry> | 193 | </varlistentry> |
| 202 | </variablelist> | 194 | </variablelist> |
| 203 | </refsect1> | 195 | </refsect1> |
| 204 | </refentry> | 196 | </refentry> |
| 205 | |||
| 206 | <!-- | ||
| 207 | Local Variables: | ||
| 208 | mode: sgml | ||
| 209 | sgml-parent-document: "v4l2.sgml" | ||
| 210 | indent-tabs-mode: nil | ||
| 211 | End: | ||
| 212 | --> | ||
diff --git a/Documentation/DocBook/v4l/vidioc-g-frequency.xml b/Documentation/DocBook/media/v4l/vidioc-g-frequency.xml index 062d72069090..062d72069090 100644 --- a/Documentation/DocBook/v4l/vidioc-g-frequency.xml +++ b/Documentation/DocBook/media/v4l/vidioc-g-frequency.xml | |||
diff --git a/Documentation/DocBook/v4l/vidioc-g-input.xml b/Documentation/DocBook/media/v4l/vidioc-g-input.xml index ed076e92760d..08ae82f131f2 100644 --- a/Documentation/DocBook/v4l/vidioc-g-input.xml +++ b/Documentation/DocBook/media/v4l/vidioc-g-input.xml | |||
| @@ -75,26 +75,9 @@ querying or negotiating any other parameters.</para> | |||
| 75 | <varlistentry> | 75 | <varlistentry> |
| 76 | <term><errorcode>EINVAL</errorcode></term> | 76 | <term><errorcode>EINVAL</errorcode></term> |
| 77 | <listitem> | 77 | <listitem> |
| 78 | <para>The number of the video input is out of bounds, or | 78 | <para>The number of the video input is out of bounds.</para> |
| 79 | there are no video inputs at all and this ioctl is not | ||
| 80 | supported.</para> | ||
| 81 | </listitem> | ||
| 82 | </varlistentry> | ||
| 83 | <varlistentry> | ||
| 84 | <term><errorcode>EBUSY</errorcode></term> | ||
| 85 | <listitem> | ||
| 86 | <para>I/O is in progress, the input cannot be | ||
| 87 | switched.</para> | ||
| 88 | </listitem> | 79 | </listitem> |
| 89 | </varlistentry> | 80 | </varlistentry> |
| 90 | </variablelist> | 81 | </variablelist> |
| 91 | </refsect1> | 82 | </refsect1> |
| 92 | </refentry> | 83 | </refentry> |
| 93 | |||
| 94 | <!-- | ||
| 95 | Local Variables: | ||
| 96 | mode: sgml | ||
| 97 | sgml-parent-document: "v4l2.sgml" | ||
| 98 | indent-tabs-mode: nil | ||
| 99 | End: | ||
| 100 | --> | ||
diff --git a/Documentation/DocBook/v4l/vidioc-g-jpegcomp.xml b/Documentation/DocBook/media/v4l/vidioc-g-jpegcomp.xml index 77394b287411..01ea24b84385 100644 --- a/Documentation/DocBook/v4l/vidioc-g-jpegcomp.xml +++ b/Documentation/DocBook/media/v4l/vidioc-g-jpegcomp.xml | |||
| @@ -159,22 +159,5 @@ to add them.</para> | |||
| 159 | 159 | ||
| 160 | <refsect1> | 160 | <refsect1> |
| 161 | &return-value; | 161 | &return-value; |
| 162 | |||
| 163 | <variablelist> | ||
| 164 | <varlistentry> | ||
| 165 | <term><errorcode>EINVAL</errorcode></term> | ||
| 166 | <listitem> | ||
| 167 | <para>This ioctl is not supported.</para> | ||
| 168 | </listitem> | ||
| 169 | </varlistentry> | ||
| 170 | </variablelist> | ||
| 171 | </refsect1> | 162 | </refsect1> |
| 172 | </refentry> | 163 | </refentry> |
| 173 | |||
| 174 | <!-- | ||
| 175 | Local Variables: | ||
| 176 | mode: sgml | ||
| 177 | sgml-parent-document: "v4l2.sgml" | ||
| 178 | indent-tabs-mode: nil | ||
| 179 | End: | ||
| 180 | --> | ||
diff --git a/Documentation/DocBook/v4l/vidioc-g-modulator.xml b/Documentation/DocBook/media/v4l/vidioc-g-modulator.xml index 15ce660f0f5a..15ce660f0f5a 100644 --- a/Documentation/DocBook/v4l/vidioc-g-modulator.xml +++ b/Documentation/DocBook/media/v4l/vidioc-g-modulator.xml | |||
diff --git a/Documentation/DocBook/v4l/vidioc-g-output.xml b/Documentation/DocBook/media/v4l/vidioc-g-output.xml index 3ea8c0ed812e..fd45f1c13ccf 100644 --- a/Documentation/DocBook/v4l/vidioc-g-output.xml +++ b/Documentation/DocBook/media/v4l/vidioc-g-output.xml | |||
| @@ -76,25 +76,9 @@ negotiating any other parameters.</para> | |||
| 76 | <term><errorcode>EINVAL</errorcode></term> | 76 | <term><errorcode>EINVAL</errorcode></term> |
| 77 | <listitem> | 77 | <listitem> |
| 78 | <para>The number of the video output is out of bounds, or | 78 | <para>The number of the video output is out of bounds, or |
| 79 | there are no video outputs at all and this ioctl is not | 79 | there are no video outputs at all.</para> |
| 80 | supported.</para> | ||
| 81 | </listitem> | ||
| 82 | </varlistentry> | ||
| 83 | <varlistentry> | ||
| 84 | <term><errorcode>EBUSY</errorcode></term> | ||
| 85 | <listitem> | ||
| 86 | <para>I/O is in progress, the output cannot be | ||
| 87 | switched.</para> | ||
| 88 | </listitem> | 80 | </listitem> |
| 89 | </varlistentry> | 81 | </varlistentry> |
| 90 | </variablelist> | 82 | </variablelist> |
| 91 | </refsect1> | 83 | </refsect1> |
| 92 | </refentry> | 84 | </refentry> |
| 93 | |||
| 94 | <!-- | ||
| 95 | Local Variables: | ||
| 96 | mode: sgml | ||
| 97 | sgml-parent-document: "v4l2.sgml" | ||
| 98 | indent-tabs-mode: nil | ||
| 99 | End: | ||
| 100 | --> | ||
diff --git a/Documentation/DocBook/v4l/vidioc-g-parm.xml b/Documentation/DocBook/media/v4l/vidioc-g-parm.xml index 392aa9e5571e..19b1d85dd668 100644 --- a/Documentation/DocBook/v4l/vidioc-g-parm.xml +++ b/Documentation/DocBook/media/v4l/vidioc-g-parm.xml | |||
| @@ -311,22 +311,5 @@ excessive motion blur. </para> | |||
| 311 | 311 | ||
| 312 | <refsect1> | 312 | <refsect1> |
| 313 | &return-value; | 313 | &return-value; |
| 314 | |||
| 315 | <variablelist> | ||
| 316 | <varlistentry> | ||
| 317 | <term><errorcode>EINVAL</errorcode></term> | ||
| 318 | <listitem> | ||
| 319 | <para>This ioctl is not supported.</para> | ||
| 320 | </listitem> | ||
| 321 | </varlistentry> | ||
| 322 | </variablelist> | ||
| 323 | </refsect1> | 314 | </refsect1> |
| 324 | </refentry> | 315 | </refentry> |
| 325 | |||
| 326 | <!-- | ||
| 327 | Local Variables: | ||
| 328 | mode: sgml | ||
| 329 | sgml-parent-document: "v4l2.sgml" | ||
| 330 | indent-tabs-mode: nil | ||
| 331 | End: | ||
| 332 | --> | ||
diff --git a/Documentation/DocBook/v4l/vidioc-g-priority.xml b/Documentation/DocBook/media/v4l/vidioc-g-priority.xml index 5fb001978645..8f5e3da7002f 100644 --- a/Documentation/DocBook/v4l/vidioc-g-priority.xml +++ b/Documentation/DocBook/media/v4l/vidioc-g-priority.xml | |||
| @@ -120,8 +120,7 @@ recording.</entry> | |||
| 120 | <varlistentry> | 120 | <varlistentry> |
| 121 | <term><errorcode>EINVAL</errorcode></term> | 121 | <term><errorcode>EINVAL</errorcode></term> |
| 122 | <listitem> | 122 | <listitem> |
| 123 | <para>The requested priority value is invalid, or the | 123 | <para>The requested priority value is invalid.</para> |
| 124 | driver does not support access priorities.</para> | ||
| 125 | </listitem> | 124 | </listitem> |
| 126 | </varlistentry> | 125 | </varlistentry> |
| 127 | <varlistentry> | 126 | <varlistentry> |
diff --git a/Documentation/DocBook/v4l/vidioc-g-sliced-vbi-cap.xml b/Documentation/DocBook/media/v4l/vidioc-g-sliced-vbi-cap.xml index 10e721b17374..71741daaf725 100644 --- a/Documentation/DocBook/v4l/vidioc-g-sliced-vbi-cap.xml +++ b/Documentation/DocBook/media/v4l/vidioc-g-sliced-vbi-cap.xml | |||
| @@ -246,19 +246,10 @@ line systems.</entry> | |||
| 246 | <varlistentry> | 246 | <varlistentry> |
| 247 | <term><errorcode>EINVAL</errorcode></term> | 247 | <term><errorcode>EINVAL</errorcode></term> |
| 248 | <listitem> | 248 | <listitem> |
| 249 | <para>The device does not support sliced VBI capturing or | 249 | <para>The value in the <structfield>type</structfield> field is |
| 250 | output, or the value in the <structfield>type</structfield> field is | ||
| 251 | wrong.</para> | 250 | wrong.</para> |
| 252 | </listitem> | 251 | </listitem> |
| 253 | </varlistentry> | 252 | </varlistentry> |
| 254 | </variablelist> | 253 | </variablelist> |
| 255 | </refsect1> | 254 | </refsect1> |
| 256 | </refentry> | 255 | </refentry> |
| 257 | |||
| 258 | <!-- | ||
| 259 | Local Variables: | ||
| 260 | mode: sgml | ||
| 261 | sgml-parent-document: "v4l2.sgml" | ||
| 262 | indent-tabs-mode: nil | ||
| 263 | End: | ||
| 264 | --> | ||
diff --git a/Documentation/DocBook/v4l/vidioc-g-std.xml b/Documentation/DocBook/media/v4l/vidioc-g-std.xml index 912f8513e5da..37996f25b5d4 100644 --- a/Documentation/DocBook/v4l/vidioc-g-std.xml +++ b/Documentation/DocBook/media/v4l/vidioc-g-std.xml | |||
| @@ -82,14 +82,7 @@ standards.</para> | |||
| 82 | <varlistentry> | 82 | <varlistentry> |
| 83 | <term><errorcode>EINVAL</errorcode></term> | 83 | <term><errorcode>EINVAL</errorcode></term> |
| 84 | <listitem> | 84 | <listitem> |
| 85 | <para>This ioctl is not supported, or the | 85 | <para>The <constant>VIDIOC_S_STD</constant> parameter was unsuitable.</para> |
| 86 | <constant>VIDIOC_S_STD</constant> parameter was unsuitable.</para> | ||
| 87 | </listitem> | ||
| 88 | </varlistentry> | ||
| 89 | <varlistentry> | ||
| 90 | <term><errorcode>EBUSY</errorcode></term> | ||
| 91 | <listitem> | ||
| 92 | <para>The device is busy and therefore can not change the standard</para> | ||
| 93 | </listitem> | 86 | </listitem> |
| 94 | </varlistentry> | 87 | </varlistentry> |
| 95 | </variablelist> | 88 | </variablelist> |
diff --git a/Documentation/DocBook/v4l/vidioc-g-tuner.xml b/Documentation/DocBook/media/v4l/vidioc-g-tuner.xml index bd98c734c06b..bd98c734c06b 100644 --- a/Documentation/DocBook/v4l/vidioc-g-tuner.xml +++ b/Documentation/DocBook/media/v4l/vidioc-g-tuner.xml | |||
diff --git a/Documentation/DocBook/v4l/vidioc-log-status.xml b/Documentation/DocBook/media/v4l/vidioc-log-status.xml index 2634b7c88b58..5ded7d35e27b 100644 --- a/Documentation/DocBook/v4l/vidioc-log-status.xml +++ b/Documentation/DocBook/media/v4l/vidioc-log-status.xml | |||
| @@ -37,22 +37,5 @@ was introduced in Linux 2.6.15.</para> | |||
| 37 | 37 | ||
| 38 | <refsect1> | 38 | <refsect1> |
| 39 | &return-value; | 39 | &return-value; |
| 40 | |||
| 41 | <variablelist> | ||
| 42 | <varlistentry> | ||
| 43 | <term><errorcode>EINVAL</errorcode></term> | ||
| 44 | <listitem> | ||
| 45 | <para>The driver does not support this ioctl.</para> | ||
| 46 | </listitem> | ||
| 47 | </varlistentry> | ||
| 48 | </variablelist> | ||
| 49 | </refsect1> | 40 | </refsect1> |
| 50 | </refentry> | 41 | </refentry> |
| 51 | |||
| 52 | <!-- | ||
| 53 | Local Variables: | ||
| 54 | mode: sgml | ||
| 55 | sgml-parent-document: "v4l2.sgml" | ||
| 56 | indent-tabs-mode: nil | ||
| 57 | End: | ||
| 58 | --> | ||
diff --git a/Documentation/DocBook/v4l/vidioc-overlay.xml b/Documentation/DocBook/media/v4l/vidioc-overlay.xml index 1036c582cc15..250a7de1877f 100644 --- a/Documentation/DocBook/v4l/vidioc-overlay.xml +++ b/Documentation/DocBook/media/v4l/vidioc-overlay.xml | |||
| @@ -65,19 +65,10 @@ | |||
| 65 | <varlistentry> | 65 | <varlistentry> |
| 66 | <term><errorcode>EINVAL</errorcode></term> | 66 | <term><errorcode>EINVAL</errorcode></term> |
| 67 | <listitem> | 67 | <listitem> |
| 68 | <para>Video overlay is not supported, or the | 68 | <para>The overlay parameters have not been set up. See <xref |
| 69 | parameters have not been set up. See <xref | ||
| 70 | linkend="overlay" /> for the necessary steps.</para> | 69 | linkend="overlay" /> for the necessary steps.</para> |
| 71 | </listitem> | 70 | </listitem> |
| 72 | </varlistentry> | 71 | </varlistentry> |
| 73 | </variablelist> | 72 | </variablelist> |
| 74 | </refsect1> | 73 | </refsect1> |
| 75 | </refentry> | 74 | </refentry> |
| 76 | |||
| 77 | <!-- | ||
| 78 | Local Variables: | ||
| 79 | mode: sgml | ||
| 80 | sgml-parent-document: "v4l2.sgml" | ||
| 81 | indent-tabs-mode: nil | ||
| 82 | End: | ||
| 83 | --> | ||
diff --git a/Documentation/DocBook/v4l/vidioc-qbuf.xml b/Documentation/DocBook/media/v4l/vidioc-qbuf.xml index f2b11f8a4031..9caa49af580f 100644 --- a/Documentation/DocBook/v4l/vidioc-qbuf.xml +++ b/Documentation/DocBook/media/v4l/vidioc-qbuf.xml | |||
| @@ -158,15 +158,6 @@ or no buffers have been allocated yet, or the | |||
| 158 | <structfield>userptr</structfield> or | 158 | <structfield>userptr</structfield> or |
| 159 | <structfield>length</structfield> are invalid.</para> | 159 | <structfield>length</structfield> are invalid.</para> |
| 160 | </listitem> | 160 | </listitem> |
| 161 | </varlistentry> | ||
| 162 | <varlistentry> | ||
| 163 | <term><errorcode>ENOMEM</errorcode></term> | ||
| 164 | <listitem> | ||
| 165 | <para>Not enough physical or virtual memory was available to | ||
| 166 | enqueue a user pointer buffer.</para> | ||
| 167 | </listitem> | ||
| 168 | </varlistentry> | ||
| 169 | <varlistentry> | ||
| 170 | <term><errorcode>EIO</errorcode></term> | 161 | <term><errorcode>EIO</errorcode></term> |
| 171 | <listitem> | 162 | <listitem> |
| 172 | <para><constant>VIDIOC_DQBUF</constant> failed due to an | 163 | <para><constant>VIDIOC_DQBUF</constant> failed due to an |
| @@ -184,11 +175,3 @@ continue streaming. | |||
| 184 | </variablelist> | 175 | </variablelist> |
| 185 | </refsect1> | 176 | </refsect1> |
| 186 | </refentry> | 177 | </refentry> |
| 187 | |||
| 188 | <!-- | ||
| 189 | Local Variables: | ||
| 190 | mode: sgml | ||
| 191 | sgml-parent-document: "v4l2.sgml" | ||
| 192 | indent-tabs-mode: nil | ||
| 193 | End: | ||
| 194 | --> | ||
diff --git a/Documentation/DocBook/v4l/vidioc-query-dv-preset.xml b/Documentation/DocBook/media/v4l/vidioc-query-dv-preset.xml index d272f7ab91b8..23b17f604211 100644 --- a/Documentation/DocBook/v4l/vidioc-query-dv-preset.xml +++ b/Documentation/DocBook/media/v4l/vidioc-query-dv-preset.xml | |||
| @@ -61,27 +61,5 @@ returned.</para> | |||
| 61 | 61 | ||
| 62 | <refsect1> | 62 | <refsect1> |
| 63 | &return-value; | 63 | &return-value; |
| 64 | <variablelist> | ||
| 65 | <varlistentry> | ||
| 66 | <term><errorcode>EINVAL</errorcode></term> | ||
| 67 | <listitem> | ||
| 68 | <para>This ioctl is not supported.</para> | ||
| 69 | </listitem> | ||
| 70 | </varlistentry> | ||
| 71 | <varlistentry> | ||
| 72 | <term><errorcode>EBUSY</errorcode></term> | ||
| 73 | <listitem> | ||
| 74 | <para>The device is busy and therefore can not sense the preset</para> | ||
| 75 | </listitem> | ||
| 76 | </varlistentry> | ||
| 77 | </variablelist> | ||
| 78 | </refsect1> | 64 | </refsect1> |
| 79 | </refentry> | 65 | </refentry> |
| 80 | |||
| 81 | <!-- | ||
| 82 | Local Variables: | ||
| 83 | mode: sgml | ||
| 84 | sgml-parent-document: "v4l2.sgml" | ||
| 85 | indent-tabs-mode: nil | ||
| 86 | End: | ||
| 87 | --> | ||
diff --git a/Documentation/DocBook/v4l/vidioc-querybuf.xml b/Documentation/DocBook/media/v4l/vidioc-querybuf.xml index 5c104d42d31c..5c104d42d31c 100644 --- a/Documentation/DocBook/v4l/vidioc-querybuf.xml +++ b/Documentation/DocBook/media/v4l/vidioc-querybuf.xml | |||
diff --git a/Documentation/DocBook/v4l/vidioc-querycap.xml b/Documentation/DocBook/media/v4l/vidioc-querycap.xml index f29f1b86213c..e3664d6f2de4 100644 --- a/Documentation/DocBook/v4l/vidioc-querycap.xml +++ b/Documentation/DocBook/media/v4l/vidioc-querycap.xml | |||
| @@ -67,9 +67,8 @@ driver is not compatible with this specification the ioctl returns an | |||
| 67 | <entry><para>Name of the driver, a unique NUL-terminated | 67 | <entry><para>Name of the driver, a unique NUL-terminated |
| 68 | ASCII string. For example: "bttv". Driver specific applications can | 68 | ASCII string. For example: "bttv". Driver specific applications can |
| 69 | use this information to verify the driver identity. It is also useful | 69 | use this information to verify the driver identity. It is also useful |
| 70 | to work around known bugs, or to identify drivers in error reports. | 70 | to work around known bugs, or to identify drivers in error reports.</para> |
| 71 | The driver version is stored in the <structfield>version</structfield> | 71 | <para>Storing strings in fixed sized arrays is bad |
| 72 | field.</para><para>Storing strings in fixed sized arrays is bad | ||
| 73 | practice but unavoidable here. Drivers and applications should take | 72 | practice but unavoidable here. Drivers and applications should take |
| 74 | precautions to never read or write beyond the end of the array and to | 73 | precautions to never read or write beyond the end of the array and to |
| 75 | make sure the strings are properly NUL-terminated.</para></entry> | 74 | make sure the strings are properly NUL-terminated.</para></entry> |
| @@ -100,9 +99,13 @@ empty string (<structfield>bus_info</structfield>[0] = 0).<!-- XXX pci_dev->slot | |||
| 100 | <row> | 99 | <row> |
| 101 | <entry>__u32</entry> | 100 | <entry>__u32</entry> |
| 102 | <entry><structfield>version</structfield></entry> | 101 | <entry><structfield>version</structfield></entry> |
| 103 | <entry><para>Version number of the driver. Together with | 102 | <entry><para>Version number of the driver.</para> |
| 104 | the <structfield>driver</structfield> field this identifies a | 103 | <para>Starting on kernel 3.1, the version reported is provided per |
| 105 | particular driver. The version number is formatted using the | 104 | V4L2 subsystem, following the same Kernel numberation scheme. However, it |
| 105 | should not always return the same version as the kernel, if, for example, | ||
| 106 | an stable or distribution-modified kernel uses the V4L2 stack from a | ||
| 107 | newer kernel.</para> | ||
| 108 | <para>The version number is formatted using the | ||
| 106 | <constant>KERNEL_VERSION()</constant> macro:</para></entry> | 109 | <constant>KERNEL_VERSION()</constant> macro:</para></entry> |
| 107 | </row> | 110 | </row> |
| 108 | <row> | 111 | <row> |
| @@ -280,24 +283,5 @@ linkend="mmap">streaming</link> I/O method.</entry> | |||
| 280 | 283 | ||
| 281 | <refsect1> | 284 | <refsect1> |
| 282 | &return-value; | 285 | &return-value; |
| 283 | |||
| 284 | <variablelist> | ||
| 285 | <varlistentry> | ||
| 286 | <term><errorcode>EINVAL</errorcode></term> | ||
| 287 | <listitem> | ||
| 288 | <para>The device is not compatible with this | ||
| 289 | specification.</para> | ||
| 290 | </listitem> | ||
| 291 | </varlistentry> | ||
| 292 | </variablelist> | ||
| 293 | </refsect1> | 286 | </refsect1> |
| 294 | </refentry> | 287 | </refentry> |
| 295 | |||
| 296 | <!-- | ||
| 297 | Local Variables: | ||
| 298 | mode: sgml | ||
| 299 | sgml-parent-document: "v4l2.sgml" | ||
| 300 | indent-tabs-mode: nil | ||
| 301 | End: | ||
| 302 | --> | ||
| 303 | |||
diff --git a/Documentation/DocBook/v4l/vidioc-queryctrl.xml b/Documentation/DocBook/media/v4l/vidioc-queryctrl.xml index 0d5e8283cf32..677ea646c29f 100644 --- a/Documentation/DocBook/v4l/vidioc-queryctrl.xml +++ b/Documentation/DocBook/media/v4l/vidioc-queryctrl.xml | |||
| @@ -156,7 +156,8 @@ signed value.</entry> | |||
| 156 | <entry>Maximum value, inclusive. This field gives an upper | 156 | <entry>Maximum value, inclusive. This field gives an upper |
| 157 | bound for <constant>V4L2_CTRL_TYPE_INTEGER</constant> controls and the | 157 | bound for <constant>V4L2_CTRL_TYPE_INTEGER</constant> controls and the |
| 158 | highest valid index for <constant>V4L2_CTRL_TYPE_MENU</constant> | 158 | highest valid index for <constant>V4L2_CTRL_TYPE_MENU</constant> |
| 159 | controls. | 159 | controls. For <constant>V4L2_CTRL_TYPE_BITMASK</constant> controls it is the |
| 160 | set of usable bits. | ||
| 160 | For <constant>V4L2_CTRL_TYPE_STRING</constant> controls the maximum value | 161 | For <constant>V4L2_CTRL_TYPE_STRING</constant> controls the maximum value |
| 161 | gives the maximum length of the string. This length <emphasis>does not include the terminating | 162 | gives the maximum length of the string. This length <emphasis>does not include the terminating |
| 162 | zero</emphasis>. It may not be valid for any other type of control, including | 163 | zero</emphasis>. It may not be valid for any other type of control, including |
| @@ -291,6 +292,15 @@ the menu items can be enumerated with the | |||
| 291 | <constant>VIDIOC_QUERYMENU</constant> ioctl.</entry> | 292 | <constant>VIDIOC_QUERYMENU</constant> ioctl.</entry> |
| 292 | </row> | 293 | </row> |
| 293 | <row> | 294 | <row> |
| 295 | <entry><constant>V4L2_CTRL_TYPE_BITMASK</constant></entry> | ||
| 296 | <entry>0</entry> | ||
| 297 | <entry>n/a</entry> | ||
| 298 | <entry>any</entry> | ||
| 299 | <entry>A bitmask field. The maximum value is the set of bits that can | ||
| 300 | be used, all other bits are to be 0. The maximum value is interpreted as a __u32, | ||
| 301 | allowing the use of bit 31 in the bitmask.</entry> | ||
| 302 | </row> | ||
| 303 | <row> | ||
| 294 | <entry><constant>V4L2_CTRL_TYPE_BUTTON</constant></entry> | 304 | <entry><constant>V4L2_CTRL_TYPE_BUTTON</constant></entry> |
| 295 | <entry>0</entry> | 305 | <entry>0</entry> |
| 296 | <entry>0</entry> | 306 | <entry>0</entry> |
diff --git a/Documentation/DocBook/v4l/vidioc-querystd.xml b/Documentation/DocBook/media/v4l/vidioc-querystd.xml index 1a9e60393091..4b79c7c04ed6 100644 --- a/Documentation/DocBook/v4l/vidioc-querystd.xml +++ b/Documentation/DocBook/media/v4l/vidioc-querystd.xml | |||
| @@ -62,28 +62,5 @@ current video input or output.</para> | |||
| 62 | 62 | ||
| 63 | <refsect1> | 63 | <refsect1> |
| 64 | &return-value; | 64 | &return-value; |
| 65 | |||
| 66 | <variablelist> | ||
| 67 | <varlistentry> | ||
| 68 | <term><errorcode>EINVAL</errorcode></term> | ||
| 69 | <listitem> | ||
| 70 | <para>This ioctl is not supported.</para> | ||
| 71 | </listitem> | ||
| 72 | </varlistentry> | ||
| 73 | <varlistentry> | ||
| 74 | <term><errorcode>EBUSY</errorcode></term> | ||
| 75 | <listitem> | ||
| 76 | <para>The device is busy and therefore can not detect the standard</para> | ||
| 77 | </listitem> | ||
| 78 | </varlistentry> | ||
| 79 | </variablelist> | ||
| 80 | </refsect1> | 65 | </refsect1> |
| 81 | </refentry> | 66 | </refentry> |
| 82 | |||
| 83 | <!-- | ||
| 84 | Local Variables: | ||
| 85 | mode: sgml | ||
| 86 | sgml-parent-document: "v4l2.sgml" | ||
| 87 | indent-tabs-mode: nil | ||
| 88 | End: | ||
| 89 | --> | ||
diff --git a/Documentation/DocBook/v4l/vidioc-reqbufs.xml b/Documentation/DocBook/media/v4l/vidioc-reqbufs.xml index 69800ae23348..7be4b1d29b90 100644 --- a/Documentation/DocBook/v4l/vidioc-reqbufs.xml +++ b/Documentation/DocBook/media/v4l/vidioc-reqbufs.xml | |||
| @@ -122,14 +122,6 @@ higher. This array should be zeroed by applications.</entry> | |||
| 122 | 122 | ||
| 123 | <variablelist> | 123 | <variablelist> |
| 124 | <varlistentry> | 124 | <varlistentry> |
| 125 | <term><errorcode>EBUSY</errorcode></term> | ||
| 126 | <listitem> | ||
| 127 | <para>The driver supports multiple opens and I/O is already | ||
| 128 | in progress, or reallocation of buffers was attempted although one or | ||
| 129 | more are still mapped.</para> | ||
| 130 | </listitem> | ||
| 131 | </varlistentry> | ||
| 132 | <varlistentry> | ||
| 133 | <term><errorcode>EINVAL</errorcode></term> | 125 | <term><errorcode>EINVAL</errorcode></term> |
| 134 | <listitem> | 126 | <listitem> |
| 135 | <para>The buffer type (<structfield>type</structfield> field) or the | 127 | <para>The buffer type (<structfield>type</structfield> field) or the |
| @@ -140,11 +132,3 @@ supported.</para> | |||
| 140 | </variablelist> | 132 | </variablelist> |
| 141 | </refsect1> | 133 | </refsect1> |
| 142 | </refentry> | 134 | </refentry> |
| 143 | |||
| 144 | <!-- | ||
| 145 | Local Variables: | ||
| 146 | mode: sgml | ||
| 147 | sgml-parent-document: "v4l2.sgml" | ||
| 148 | indent-tabs-mode: nil | ||
| 149 | End: | ||
| 150 | --> | ||
diff --git a/Documentation/DocBook/v4l/vidioc-s-hw-freq-seek.xml b/Documentation/DocBook/media/v4l/vidioc-s-hw-freq-seek.xml index c30dcc4232c0..c30dcc4232c0 100644 --- a/Documentation/DocBook/v4l/vidioc-s-hw-freq-seek.xml +++ b/Documentation/DocBook/media/v4l/vidioc-s-hw-freq-seek.xml | |||
diff --git a/Documentation/DocBook/v4l/vidioc-streamon.xml b/Documentation/DocBook/media/v4l/vidioc-streamon.xml index 75ed39bf4d2b..81cca4569050 100644 --- a/Documentation/DocBook/v4l/vidioc-streamon.xml +++ b/Documentation/DocBook/media/v4l/vidioc-streamon.xml | |||
| @@ -88,9 +88,9 @@ synchronize with other events.</para> | |||
| 88 | <varlistentry> | 88 | <varlistentry> |
| 89 | <term><errorcode>EINVAL</errorcode></term> | 89 | <term><errorcode>EINVAL</errorcode></term> |
| 90 | <listitem> | 90 | <listitem> |
| 91 | <para>Streaming I/O is not supported, the buffer | 91 | <para>The buffer<structfield>type</structfield> is not supported, |
| 92 | <structfield>type</structfield> is not supported, or no buffers have | 92 | or no buffers have been allocated (memory mapping) or enqueued |
| 93 | been allocated (memory mapping) or enqueued (output) yet.</para> | 93 | (output) yet.</para> |
| 94 | </listitem> | 94 | </listitem> |
| 95 | </varlistentry> | 95 | </varlistentry> |
| 96 | <varlistentry> | 96 | <varlistentry> |
| @@ -105,11 +105,3 @@ been allocated (memory mapping) or enqueued (output) yet.</para> | |||
| 105 | </variablelist> | 105 | </variablelist> |
| 106 | </refsect1> | 106 | </refsect1> |
| 107 | </refentry> | 107 | </refentry> |
| 108 | |||
| 109 | <!-- | ||
| 110 | Local Variables: | ||
| 111 | mode: sgml | ||
| 112 | sgml-parent-document: "v4l2.sgml" | ||
| 113 | indent-tabs-mode: nil | ||
| 114 | End: | ||
| 115 | --> | ||
diff --git a/Documentation/DocBook/v4l/vidioc-subdev-enum-frame-interval.xml b/Documentation/DocBook/media/v4l/vidioc-subdev-enum-frame-interval.xml index 2f8f4f0a0235..2f8f4f0a0235 100644 --- a/Documentation/DocBook/v4l/vidioc-subdev-enum-frame-interval.xml +++ b/Documentation/DocBook/media/v4l/vidioc-subdev-enum-frame-interval.xml | |||
diff --git a/Documentation/DocBook/v4l/vidioc-subdev-enum-frame-size.xml b/Documentation/DocBook/media/v4l/vidioc-subdev-enum-frame-size.xml index 79ce42b7c60c..79ce42b7c60c 100644 --- a/Documentation/DocBook/v4l/vidioc-subdev-enum-frame-size.xml +++ b/Documentation/DocBook/media/v4l/vidioc-subdev-enum-frame-size.xml | |||
diff --git a/Documentation/DocBook/v4l/vidioc-subdev-enum-mbus-code.xml b/Documentation/DocBook/media/v4l/vidioc-subdev-enum-mbus-code.xml index a6b3432449f6..a6b3432449f6 100644 --- a/Documentation/DocBook/v4l/vidioc-subdev-enum-mbus-code.xml +++ b/Documentation/DocBook/media/v4l/vidioc-subdev-enum-mbus-code.xml | |||
diff --git a/Documentation/DocBook/v4l/vidioc-subdev-g-crop.xml b/Documentation/DocBook/media/v4l/vidioc-subdev-g-crop.xml index 06197323a8cc..06197323a8cc 100644 --- a/Documentation/DocBook/v4l/vidioc-subdev-g-crop.xml +++ b/Documentation/DocBook/media/v4l/vidioc-subdev-g-crop.xml | |||
diff --git a/Documentation/DocBook/v4l/vidioc-subdev-g-fmt.xml b/Documentation/DocBook/media/v4l/vidioc-subdev-g-fmt.xml index f367c570c530..a67cde6f8c54 100644 --- a/Documentation/DocBook/v4l/vidioc-subdev-g-fmt.xml +++ b/Documentation/DocBook/media/v4l/vidioc-subdev-g-fmt.xml | |||
| @@ -177,4 +177,7 @@ | |||
| 177 | </varlistentry> | 177 | </varlistentry> |
| 178 | </variablelist> | 178 | </variablelist> |
| 179 | </refsect1> | 179 | </refsect1> |
| 180 | <refsect1> | ||
| 181 | &return-value; | ||
| 182 | </refsect1> | ||
| 180 | </refentry> | 183 | </refentry> |
diff --git a/Documentation/DocBook/v4l/vidioc-subdev-g-frame-interval.xml b/Documentation/DocBook/media/v4l/vidioc-subdev-g-frame-interval.xml index 0bc3ea22d31f..0bc3ea22d31f 100644 --- a/Documentation/DocBook/v4l/vidioc-subdev-g-frame-interval.xml +++ b/Documentation/DocBook/media/v4l/vidioc-subdev-g-frame-interval.xml | |||
diff --git a/Documentation/DocBook/media/v4l/vidioc-subscribe-event.xml b/Documentation/DocBook/media/v4l/vidioc-subscribe-event.xml new file mode 100644 index 000000000000..69c0d8a2a3d2 --- /dev/null +++ b/Documentation/DocBook/media/v4l/vidioc-subscribe-event.xml | |||
| @@ -0,0 +1,297 @@ | |||
| 1 | <refentry id="vidioc-subscribe-event"> | ||
| 2 | <refmeta> | ||
| 3 | <refentrytitle>ioctl VIDIOC_SUBSCRIBE_EVENT, VIDIOC_UNSUBSCRIBE_EVENT</refentrytitle> | ||
| 4 | &manvol; | ||
| 5 | </refmeta> | ||
| 6 | |||
| 7 | <refnamediv> | ||
| 8 | <refname>VIDIOC_SUBSCRIBE_EVENT, VIDIOC_UNSUBSCRIBE_EVENT</refname> | ||
| 9 | <refpurpose>Subscribe or unsubscribe event</refpurpose> | ||
| 10 | </refnamediv> | ||
| 11 | |||
| 12 | <refsynopsisdiv> | ||
| 13 | <funcsynopsis> | ||
| 14 | <funcprototype> | ||
| 15 | <funcdef>int <function>ioctl</function></funcdef> | ||
| 16 | <paramdef>int <parameter>fd</parameter></paramdef> | ||
| 17 | <paramdef>int <parameter>request</parameter></paramdef> | ||
| 18 | <paramdef>struct v4l2_event_subscription | ||
| 19 | *<parameter>argp</parameter></paramdef> | ||
| 20 | </funcprototype> | ||
| 21 | </funcsynopsis> | ||
| 22 | </refsynopsisdiv> | ||
| 23 | |||
| 24 | <refsect1> | ||
| 25 | <title>Arguments</title> | ||
| 26 | |||
| 27 | <variablelist> | ||
| 28 | <varlistentry> | ||
| 29 | <term><parameter>fd</parameter></term> | ||
| 30 | <listitem> | ||
| 31 | <para>&fd;</para> | ||
| 32 | </listitem> | ||
| 33 | </varlistentry> | ||
| 34 | <varlistentry> | ||
| 35 | <term><parameter>request</parameter></term> | ||
| 36 | <listitem> | ||
| 37 | <para>VIDIOC_SUBSCRIBE_EVENT, VIDIOC_UNSUBSCRIBE_EVENT</para> | ||
| 38 | </listitem> | ||
| 39 | </varlistentry> | ||
| 40 | <varlistentry> | ||
| 41 | <term><parameter>argp</parameter></term> | ||
| 42 | <listitem> | ||
| 43 | <para></para> | ||
| 44 | </listitem> | ||
| 45 | </varlistentry> | ||
| 46 | </variablelist> | ||
| 47 | </refsect1> | ||
| 48 | |||
| 49 | <refsect1> | ||
| 50 | <title>Description</title> | ||
| 51 | |||
| 52 | <para>Subscribe or unsubscribe V4L2 event. Subscribed events are | ||
| 53 | dequeued by using the &VIDIOC-DQEVENT; ioctl.</para> | ||
| 54 | |||
| 55 | <table frame="none" pgwide="1" id="v4l2-event-subscription"> | ||
| 56 | <title>struct <structname>v4l2_event_subscription</structname></title> | ||
| 57 | <tgroup cols="3"> | ||
| 58 | &cs-str; | ||
| 59 | <tbody valign="top"> | ||
| 60 | <row> | ||
| 61 | <entry>__u32</entry> | ||
| 62 | <entry><structfield>type</structfield></entry> | ||
| 63 | <entry>Type of the event.</entry> | ||
| 64 | </row> | ||
| 65 | <row> | ||
| 66 | <entry>__u32</entry> | ||
| 67 | <entry><structfield>id</structfield></entry> | ||
| 68 | <entry>ID of the event source. If there is no ID associated with | ||
| 69 | the event source, then set this to 0. Whether or not an event | ||
| 70 | needs an ID depends on the event type.</entry> | ||
| 71 | </row> | ||
| 72 | <row> | ||
| 73 | <entry>__u32</entry> | ||
| 74 | <entry><structfield>flags</structfield></entry> | ||
| 75 | <entry>Event flags, see <xref linkend="event-flags" />.</entry> | ||
| 76 | </row> | ||
| 77 | <row> | ||
| 78 | <entry>__u32</entry> | ||
| 79 | <entry><structfield>reserved</structfield>[5]</entry> | ||
| 80 | <entry>Reserved for future extensions. Drivers and applications | ||
| 81 | must set the array to zero.</entry> | ||
| 82 | </row> | ||
| 83 | </tbody> | ||
| 84 | </tgroup> | ||
| 85 | </table> | ||
| 86 | |||
| 87 | <table frame="none" pgwide="1" id="event-type"> | ||
| 88 | <title>Event Types</title> | ||
| 89 | <tgroup cols="3"> | ||
| 90 | &cs-def; | ||
| 91 | <tbody valign="top"> | ||
| 92 | <row> | ||
| 93 | <entry><constant>V4L2_EVENT_ALL</constant></entry> | ||
| 94 | <entry>0</entry> | ||
| 95 | <entry>All events. V4L2_EVENT_ALL is valid only for | ||
| 96 | VIDIOC_UNSUBSCRIBE_EVENT for unsubscribing all events at once. | ||
| 97 | </entry> | ||
| 98 | </row> | ||
| 99 | <row> | ||
| 100 | <entry><constant>V4L2_EVENT_VSYNC</constant></entry> | ||
| 101 | <entry>1</entry> | ||
| 102 | <entry>This event is triggered on the vertical sync. | ||
| 103 | This event has a &v4l2-event-vsync; associated with it. | ||
| 104 | </entry> | ||
| 105 | </row> | ||
| 106 | <row> | ||
| 107 | <entry><constant>V4L2_EVENT_EOS</constant></entry> | ||
| 108 | <entry>2</entry> | ||
| 109 | <entry>This event is triggered when the end of a stream is reached. | ||
| 110 | This is typically used with MPEG decoders to report to the application | ||
| 111 | when the last of the MPEG stream has been decoded. | ||
| 112 | </entry> | ||
| 113 | </row> | ||
| 114 | <row> | ||
| 115 | <entry><constant>V4L2_EVENT_CTRL</constant></entry> | ||
| 116 | <entry>3</entry> | ||
| 117 | <entry><para>This event requires that the <structfield>id</structfield> | ||
| 118 | matches the control ID from which you want to receive events. | ||
| 119 | This event is triggered if the control's value changes, if a | ||
| 120 | button control is pressed or if the control's flags change. | ||
| 121 | This event has a &v4l2-event-ctrl; associated with it. This struct | ||
| 122 | contains much of the same information as &v4l2-queryctrl; and | ||
| 123 | &v4l2-control;.</para> | ||
| 124 | |||
| 125 | <para>If the event is generated due to a call to &VIDIOC-S-CTRL; or | ||
| 126 | &VIDIOC-S-EXT-CTRLS;, then the event will <emphasis>not</emphasis> be sent to | ||
| 127 | the file handle that called the ioctl function. This prevents | ||
| 128 | nasty feedback loops. If you <emphasis>do</emphasis> want to get the | ||
| 129 | event, then set the <constant>V4L2_EVENT_SUB_FL_ALLOW_FEEDBACK</constant> | ||
| 130 | flag. | ||
| 131 | </para> | ||
| 132 | |||
| 133 | <para>This event type will ensure that no information is lost when | ||
| 134 | more events are raised than there is room internally. In that | ||
| 135 | case the &v4l2-event-ctrl; of the second-oldest event is kept, | ||
| 136 | but the <structfield>changes</structfield> field of the | ||
| 137 | second-oldest event is ORed with the <structfield>changes</structfield> | ||
| 138 | field of the oldest event.</para> | ||
| 139 | </entry> | ||
| 140 | </row> | ||
| 141 | <row> | ||
| 142 | <entry><constant>V4L2_EVENT_PRIVATE_START</constant></entry> | ||
| 143 | <entry>0x08000000</entry> | ||
| 144 | <entry>Base event number for driver-private events.</entry> | ||
| 145 | </row> | ||
| 146 | </tbody> | ||
| 147 | </tgroup> | ||
| 148 | </table> | ||
| 149 | |||
| 150 | <table pgwide="1" frame="none" id="event-flags"> | ||
| 151 | <title>Event Flags</title> | ||
| 152 | <tgroup cols="3"> | ||
| 153 | &cs-def; | ||
| 154 | <tbody valign="top"> | ||
| 155 | <row> | ||
| 156 | <entry><constant>V4L2_EVENT_SUB_FL_SEND_INITIAL</constant></entry> | ||
| 157 | <entry>0x0001</entry> | ||
| 158 | <entry>When this event is subscribed an initial event will be sent | ||
| 159 | containing the current status. This only makes sense for events | ||
| 160 | that are triggered by a status change such as <constant>V4L2_EVENT_CTRL</constant>. | ||
| 161 | Other events will ignore this flag.</entry> | ||
| 162 | </row> | ||
| 163 | <row> | ||
| 164 | <entry><constant>V4L2_EVENT_SUB_FL_ALLOW_FEEDBACK</constant></entry> | ||
| 165 | <entry>0x0002</entry> | ||
| 166 | <entry><para>If set, then events directly caused by an ioctl will also be sent to | ||
| 167 | the filehandle that called that ioctl. For example, changing a control using | ||
| 168 | &VIDIOC-S-CTRL; will cause a V4L2_EVENT_CTRL to be sent back to that same | ||
| 169 | filehandle. Normally such events are suppressed to prevent feedback loops | ||
| 170 | where an application changes a control to a one value and then another, and | ||
| 171 | then receives an event telling it that that control has changed to the first | ||
| 172 | value.</para> | ||
| 173 | |||
| 174 | <para>Since it can't tell whether that event was caused by another application | ||
| 175 | or by the &VIDIOC-S-CTRL; call it is hard to decide whether to set the | ||
| 176 | control to the value in the event, or ignore it.</para> | ||
| 177 | |||
| 178 | <para>Think carefully when you set this flag so you won't get into situations | ||
| 179 | like that.</para> | ||
| 180 | </entry> | ||
| 181 | </row> | ||
| 182 | </tbody> | ||
| 183 | </tgroup> | ||
| 184 | </table> | ||
| 185 | |||
| 186 | <table frame="none" pgwide="1" id="v4l2-event-vsync"> | ||
| 187 | <title>struct <structname>v4l2_event_vsync</structname></title> | ||
| 188 | <tgroup cols="3"> | ||
| 189 | &cs-str; | ||
| 190 | <tbody valign="top"> | ||
| 191 | <row> | ||
| 192 | <entry>__u8</entry> | ||
| 193 | <entry><structfield>field</structfield></entry> | ||
| 194 | <entry>The upcoming field. See &v4l2-field;.</entry> | ||
| 195 | </row> | ||
| 196 | </tbody> | ||
| 197 | </tgroup> | ||
| 198 | </table> | ||
| 199 | |||
| 200 | <table frame="none" pgwide="1" id="v4l2-event-ctrl"> | ||
| 201 | <title>struct <structname>v4l2_event_ctrl</structname></title> | ||
| 202 | <tgroup cols="4"> | ||
| 203 | &cs-str; | ||
| 204 | <tbody valign="top"> | ||
| 205 | <row> | ||
| 206 | <entry>__u32</entry> | ||
| 207 | <entry><structfield>changes</structfield></entry> | ||
| 208 | <entry></entry> | ||
| 209 | <entry>A bitmask that tells what has changed. See <xref linkend="changes-flags" />.</entry> | ||
| 210 | </row> | ||
| 211 | <row> | ||
| 212 | <entry>__u32</entry> | ||
| 213 | <entry><structfield>type</structfield></entry> | ||
| 214 | <entry></entry> | ||
| 215 | <entry>The type of the control. See &v4l2-ctrl-type;.</entry> | ||
| 216 | </row> | ||
| 217 | <row> | ||
| 218 | <entry>union (anonymous)</entry> | ||
| 219 | <entry></entry> | ||
| 220 | <entry></entry> | ||
| 221 | <entry></entry> | ||
| 222 | </row> | ||
| 223 | <row> | ||
| 224 | <entry></entry> | ||
| 225 | <entry>__s32</entry> | ||
| 226 | <entry><structfield>value</structfield></entry> | ||
| 227 | <entry>The 32-bit value of the control for 32-bit control types. | ||
| 228 | This is 0 for string controls since the value of a string | ||
| 229 | cannot be passed using &VIDIOC-DQEVENT;.</entry> | ||
| 230 | </row> | ||
| 231 | <row> | ||
| 232 | <entry></entry> | ||
| 233 | <entry>__s64</entry> | ||
| 234 | <entry><structfield>value64</structfield></entry> | ||
| 235 | <entry>The 64-bit value of the control for 64-bit control types.</entry> | ||
| 236 | </row> | ||
| 237 | <row> | ||
| 238 | <entry>__u32</entry> | ||
| 239 | <entry><structfield>flags</structfield></entry> | ||
| 240 | <entry></entry> | ||
| 241 | <entry>The control flags. See <xref linkend="control-flags" />.</entry> | ||
| 242 | </row> | ||
| 243 | <row> | ||
| 244 | <entry>__s32</entry> | ||
| 245 | <entry><structfield>minimum</structfield></entry> | ||
| 246 | <entry></entry> | ||
| 247 | <entry>The minimum value of the control. See &v4l2-queryctrl;.</entry> | ||
| 248 | </row> | ||
| 249 | <row> | ||
| 250 | <entry>__s32</entry> | ||
| 251 | <entry><structfield>maximum</structfield></entry> | ||
| 252 | <entry></entry> | ||
| 253 | <entry>The maximum value of the control. See &v4l2-queryctrl;.</entry> | ||
| 254 | </row> | ||
| 255 | <row> | ||
| 256 | <entry>__s32</entry> | ||
| 257 | <entry><structfield>step</structfield></entry> | ||
| 258 | <entry></entry> | ||
| 259 | <entry>The step value of the control. See &v4l2-queryctrl;.</entry> | ||
| 260 | </row> | ||
| 261 | <row> | ||
| 262 | <entry>__s32</entry> | ||
| 263 | <entry><structfield>default_value</structfield></entry> | ||
| 264 | <entry></entry> | ||
| 265 | <entry>The default value value of the control. See &v4l2-queryctrl;.</entry> | ||
| 266 | </row> | ||
| 267 | </tbody> | ||
| 268 | </tgroup> | ||
| 269 | </table> | ||
| 270 | |||
| 271 | <table pgwide="1" frame="none" id="changes-flags"> | ||
| 272 | <title>Changes</title> | ||
| 273 | <tgroup cols="3"> | ||
| 274 | &cs-def; | ||
| 275 | <tbody valign="top"> | ||
| 276 | <row> | ||
| 277 | <entry><constant>V4L2_EVENT_CTRL_CH_VALUE</constant></entry> | ||
| 278 | <entry>0x0001</entry> | ||
| 279 | <entry>This control event was triggered because the value of the control | ||
| 280 | changed. Special case: if a button control is pressed, then this | ||
| 281 | event is sent as well, even though there is not explicit value | ||
| 282 | associated with a button control.</entry> | ||
| 283 | </row> | ||
| 284 | <row> | ||
| 285 | <entry><constant>V4L2_EVENT_CTRL_CH_FLAGS</constant></entry> | ||
| 286 | <entry>0x0002</entry> | ||
| 287 | <entry>This control event was triggered because the control flags | ||
| 288 | changed.</entry> | ||
| 289 | </row> | ||
| 290 | </tbody> | ||
| 291 | </tgroup> | ||
| 292 | </table> | ||
| 293 | </refsect1> | ||
| 294 | <refsect1> | ||
| 295 | &return-value; | ||
| 296 | </refsect1> | ||
| 297 | </refentry> | ||
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diff --git a/Documentation/DocBook/media.tmpl b/Documentation/DocBook/media_api.tmpl index 88f2cc680cc2..4e8e8985cc17 100644 --- a/Documentation/DocBook/media.tmpl +++ b/Documentation/DocBook/media_api.tmpl | |||
| @@ -8,7 +8,8 @@ | |||
| 8 | <!ENTITY ie "i. e."> | 8 | <!ENTITY ie "i. e."> |
| 9 | <!ENTITY fd "File descriptor returned by <link linkend='func-open'><function>open()</function></link>."> | 9 | <!ENTITY fd "File descriptor returned by <link linkend='func-open'><function>open()</function></link>."> |
| 10 | <!ENTITY i2c "I<superscript>2</superscript>C"> | 10 | <!ENTITY i2c "I<superscript>2</superscript>C"> |
| 11 | <!ENTITY return-value "<title>Return Value</title><para>On success <returnvalue>0</returnvalue> is returned, on error <returnvalue>-1</returnvalue> and the <varname>errno</varname> variable is set appropriately:</para>"> | 11 | <!ENTITY return-value "<title>Return Value</title><para>On success <returnvalue>0</returnvalue> is returned, on error <returnvalue>-1</returnvalue> and the <varname>errno</varname> variable is set appropriately. The generic error codes are described at the <link linkend='gen-errors'>Generic Error Codes</link> chapter.</para>"> |
| 12 | <!ENTITY return-value-dvb "<para>RETURN VALUE</para><para>On success <returnvalue>0</returnvalue> is returned, on error <returnvalue>-1</returnvalue> and the <varname>errno</varname> variable is set appropriately. The generic error codes are described at the <link linkend='gen-errors'>Generic Error Codes</link> chapter.</para>"> | ||
| 12 | <!ENTITY manvol "<manvolnum>2</manvolnum>"> | 13 | <!ENTITY manvol "<manvolnum>2</manvolnum>"> |
| 13 | 14 | ||
| 14 | <!-- Table templates: structs, structs w/union, defines. --> | 15 | <!-- Table templates: structs, structs w/union, defines. --> |
| @@ -110,6 +111,11 @@ Foundation. A copy of the license is included in the chapter entitled | |||
| 110 | &sub-media-controller; | 111 | &sub-media-controller; |
| 111 | </part> | 112 | </part> |
| 112 | 113 | ||
| 114 | <chapter id="gen_errors"> | ||
| 115 | &sub-gen-errors; | ||
| 116 | </chapter> | ||
| 117 | |||
| 118 | |||
| 113 | &sub-fdl-appendix; | 119 | &sub-fdl-appendix; |
| 114 | 120 | ||
| 115 | </book> | 121 | </book> |
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diff --git a/Documentation/DocBook/v4l/dev-event.xml b/Documentation/DocBook/v4l/dev-event.xml deleted file mode 100644 index be5a98fb4fab..000000000000 --- a/Documentation/DocBook/v4l/dev-event.xml +++ /dev/null | |||
| @@ -1,31 +0,0 @@ | |||
| 1 | <title>Event Interface</title> | ||
| 2 | |||
| 3 | <para>The V4L2 event interface provides means for user to get | ||
| 4 | immediately notified on certain conditions taking place on a device. | ||
| 5 | This might include start of frame or loss of signal events, for | ||
| 6 | example. | ||
| 7 | </para> | ||
| 8 | |||
| 9 | <para>To receive events, the events the user is interested in first must | ||
| 10 | be subscribed using the &VIDIOC-SUBSCRIBE-EVENT; ioctl. Once an event is | ||
| 11 | subscribed, the events of subscribed types are dequeueable using the | ||
| 12 | &VIDIOC-DQEVENT; ioctl. Events may be unsubscribed using | ||
| 13 | VIDIOC_UNSUBSCRIBE_EVENT ioctl. The special event type V4L2_EVENT_ALL may | ||
| 14 | be used to unsubscribe all the events the driver supports.</para> | ||
| 15 | |||
| 16 | <para>The event subscriptions and event queues are specific to file | ||
| 17 | handles. Subscribing an event on one file handle does not affect | ||
| 18 | other file handles. | ||
| 19 | </para> | ||
| 20 | |||
| 21 | <para>The information on dequeueable events is obtained by using select or | ||
| 22 | poll system calls on video devices. The V4L2 events use POLLPRI events on | ||
| 23 | poll system call and exceptions on select system call. </para> | ||
| 24 | |||
| 25 | <!-- | ||
| 26 | Local Variables: | ||
| 27 | mode: sgml | ||
| 28 | sgml-parent-document: "v4l2.sgml" | ||
| 29 | indent-tabs-mode: nil | ||
| 30 | End: | ||
| 31 | --> | ||
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diff --git a/Documentation/DocBook/v4l/func-ioctl.xml b/Documentation/DocBook/v4l/func-ioctl.xml deleted file mode 100644 index b60fd37a6295..000000000000 --- a/Documentation/DocBook/v4l/func-ioctl.xml +++ /dev/null | |||
| @@ -1,145 +0,0 @@ | |||
| 1 | <refentry id="func-ioctl"> | ||
| 2 | <refmeta> | ||
| 3 | <refentrytitle>V4L2 ioctl()</refentrytitle> | ||
| 4 | &manvol; | ||
| 5 | </refmeta> | ||
| 6 | |||
| 7 | <refnamediv> | ||
| 8 | <refname>v4l2-ioctl</refname> | ||
| 9 | <refpurpose>Program a V4L2 device</refpurpose> | ||
| 10 | </refnamediv> | ||
| 11 | |||
| 12 | <refsynopsisdiv> | ||
| 13 | <funcsynopsis> | ||
| 14 | <funcsynopsisinfo>#include <sys/ioctl.h></funcsynopsisinfo> | ||
| 15 | <funcprototype> | ||
| 16 | <funcdef>int <function>ioctl</function></funcdef> | ||
| 17 | <paramdef>int <parameter>fd</parameter></paramdef> | ||
| 18 | <paramdef>int <parameter>request</parameter></paramdef> | ||
| 19 | <paramdef>void *<parameter>argp</parameter></paramdef> | ||
| 20 | </funcprototype> | ||
| 21 | </funcsynopsis> | ||
| 22 | </refsynopsisdiv> | ||
| 23 | |||
| 24 | <refsect1> | ||
| 25 | <title>Arguments</title> | ||
| 26 | |||
| 27 | <variablelist> | ||
| 28 | <varlistentry> | ||
| 29 | <term><parameter>fd</parameter></term> | ||
| 30 | <listitem> | ||
| 31 | <para>&fd;</para> | ||
| 32 | </listitem> | ||
| 33 | </varlistentry> | ||
| 34 | <varlistentry> | ||
| 35 | <term><parameter>request</parameter></term> | ||
| 36 | <listitem> | ||
| 37 | <para>V4L2 ioctl request code as defined in the <filename>videodev2.h</filename> header file, for example | ||
| 38 | VIDIOC_QUERYCAP.</para> | ||
| 39 | </listitem> | ||
| 40 | </varlistentry> | ||
| 41 | <varlistentry> | ||
| 42 | <term><parameter>argp</parameter></term> | ||
| 43 | <listitem> | ||
| 44 | <para>Pointer to a function parameter, usually a structure.</para> | ||
| 45 | </listitem> | ||
| 46 | </varlistentry> | ||
| 47 | </variablelist> | ||
| 48 | </refsect1> | ||
| 49 | |||
| 50 | <refsect1> | ||
| 51 | <title>Description</title> | ||
| 52 | |||
| 53 | <para>The <function>ioctl()</function> function is used to program | ||
| 54 | V4L2 devices. The argument <parameter>fd</parameter> must be an open | ||
| 55 | file descriptor. An ioctl <parameter>request</parameter> has encoded | ||
| 56 | in it whether the argument is an input, output or read/write | ||
| 57 | parameter, and the size of the argument <parameter>argp</parameter> in | ||
| 58 | bytes. Macros and defines specifying V4L2 ioctl requests are located | ||
| 59 | in the <filename>videodev2.h</filename> header file. | ||
| 60 | Applications should use their own copy, not include the version in the | ||
| 61 | kernel sources on the system they compile on. All V4L2 ioctl requests, | ||
| 62 | their respective function and parameters are specified in <xref | ||
| 63 | linkend="user-func" />.</para> | ||
| 64 | </refsect1> | ||
| 65 | |||
| 66 | <refsect1> | ||
| 67 | <title>Return Value</title> | ||
| 68 | |||
| 69 | <para>On success the <function>ioctl()</function> function returns | ||
| 70 | <returnvalue>0</returnvalue> and does not reset the | ||
| 71 | <varname>errno</varname> variable. On failure | ||
| 72 | <returnvalue>-1</returnvalue> is returned, when the ioctl takes an | ||
| 73 | output or read/write parameter it remains unmodified, and the | ||
| 74 | <varname>errno</varname> variable is set appropriately. See below for | ||
| 75 | possible error codes. Generic errors like <errorcode>EBADF</errorcode> | ||
| 76 | or <errorcode>EFAULT</errorcode> are not listed in the sections | ||
| 77 | discussing individual ioctl requests.</para> | ||
| 78 | <para>Note ioctls may return undefined error codes. Since errors | ||
| 79 | may have side effects such as a driver reset applications should | ||
| 80 | abort on unexpected errors.</para> | ||
| 81 | |||
| 82 | <variablelist> | ||
| 83 | <varlistentry> | ||
| 84 | <term><errorcode>EBADF</errorcode></term> | ||
| 85 | <listitem> | ||
| 86 | <para><parameter>fd</parameter> is not a valid open file | ||
| 87 | descriptor.</para> | ||
| 88 | </listitem> | ||
| 89 | </varlistentry> | ||
| 90 | <varlistentry> | ||
| 91 | <term><errorcode>EBUSY</errorcode></term> | ||
| 92 | <listitem> | ||
| 93 | <para>The property cannot be changed right now. Typically | ||
| 94 | this error code is returned when I/O is in progress or the driver | ||
| 95 | supports multiple opens and another process locked the property.</para> | ||
| 96 | </listitem> | ||
| 97 | </varlistentry> | ||
| 98 | <varlistentry> | ||
| 99 | <term><errorcode>EFAULT</errorcode></term> | ||
| 100 | <listitem> | ||
| 101 | <para><parameter>argp</parameter> references an inaccessible | ||
| 102 | memory area.</para> | ||
| 103 | </listitem> | ||
| 104 | </varlistentry> | ||
| 105 | <varlistentry> | ||
| 106 | <term><errorcode>ENOTTY</errorcode></term> | ||
| 107 | <listitem> | ||
| 108 | <para><parameter>fd</parameter> is not associated with a | ||
| 109 | character special device.</para> | ||
| 110 | </listitem> | ||
| 111 | </varlistentry> | ||
| 112 | <varlistentry> | ||
| 113 | <term><errorcode>EINVAL</errorcode></term> | ||
| 114 | <listitem> | ||
| 115 | <para>The <parameter>request</parameter> or the data pointed | ||
| 116 | to by <parameter>argp</parameter> is not valid. This is a very common | ||
| 117 | error code, see the individual ioctl requests listed in <xref | ||
| 118 | linkend="user-func" /> for actual causes.</para> | ||
| 119 | </listitem> | ||
| 120 | </varlistentry> | ||
| 121 | <varlistentry> | ||
| 122 | <term><errorcode>ENOMEM</errorcode></term> | ||
| 123 | <listitem> | ||
| 124 | <para>Not enough physical or virtual memory was available to | ||
| 125 | complete the request.</para> | ||
| 126 | </listitem> | ||
| 127 | </varlistentry> | ||
| 128 | <varlistentry> | ||
| 129 | <term><errorcode>ERANGE</errorcode></term> | ||
| 130 | <listitem> | ||
| 131 | <para>The application attempted to set a control with the | ||
| 132 | &VIDIOC-S-CTRL; ioctl to a value which is out of bounds.</para> | ||
| 133 | </listitem> | ||
| 134 | </varlistentry> | ||
| 135 | </variablelist> | ||
| 136 | </refsect1> | ||
| 137 | </refentry> | ||
| 138 | |||
| 139 | <!-- | ||
| 140 | Local Variables: | ||
| 141 | mode: sgml | ||
| 142 | sgml-parent-document: "v4l2.sgml" | ||
| 143 | indent-tabs-mode: nil | ||
| 144 | End: | ||
| 145 | --> | ||
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diff --git a/Documentation/DocBook/v4l/videodev2.h.xml b/Documentation/DocBook/v4l/videodev2.h.xml deleted file mode 100644 index c50536a4f596..000000000000 --- a/Documentation/DocBook/v4l/videodev2.h.xml +++ /dev/null | |||
| @@ -1,1946 +0,0 @@ | |||
| 1 | <programlisting> | ||
| 2 | /* | ||
| 3 | * Video for Linux Two header file | ||
| 4 | * | ||
| 5 | * Copyright (C) 1999-2007 the contributors | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License as published by | ||
| 9 | * the Free Software Foundation; either version 2 of the License, or | ||
| 10 | * (at your option) any later version. | ||
| 11 | * | ||
| 12 | * This program is distributed in the hope that it will be useful, | ||
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 15 | * GNU General Public License for more details. | ||
| 16 | * | ||
| 17 | * Alternatively you can redistribute this file under the terms of the | ||
| 18 | * BSD license as stated below: | ||
| 19 | * | ||
| 20 | * Redistribution and use in source and binary forms, with or without | ||
| 21 | * modification, are permitted provided that the following conditions | ||
| 22 | * are met: | ||
| 23 | * 1. Redistributions of source code must retain the above copyright | ||
| 24 | * notice, this list of conditions and the following disclaimer. | ||
| 25 | * 2. Redistributions in binary form must reproduce the above copyright | ||
| 26 | * notice, this list of conditions and the following disclaimer in | ||
| 27 | * the documentation and/or other materials provided with the | ||
| 28 | * distribution. | ||
| 29 | * 3. The names of its contributors may not be used to endorse or promote | ||
| 30 | * products derived from this software without specific prior written | ||
| 31 | * permission. | ||
| 32 | * | ||
| 33 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | ||
| 34 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | ||
| 35 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | ||
| 36 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | ||
| 37 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | ||
| 38 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED | ||
| 39 | * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR | ||
| 40 | * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF | ||
| 41 | * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING | ||
| 42 | * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS | ||
| 43 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
| 44 | * | ||
| 45 | * Header file for v4l or V4L2 drivers and applications | ||
| 46 | * with public API. | ||
| 47 | * All kernel-specific stuff were moved to media/v4l2-dev.h, so | ||
| 48 | * no #if __KERNEL tests are allowed here | ||
| 49 | * | ||
| 50 | * See http://linuxtv.org for more info | ||
| 51 | * | ||
| 52 | * Author: Bill Dirks <bill@thedirks.org> | ||
| 53 | * Justin Schoeman | ||
| 54 | * Hans Verkuil <hverkuil@xs4all.nl> | ||
| 55 | * et al. | ||
| 56 | */ | ||
| 57 | #ifndef __LINUX_VIDEODEV2_H | ||
| 58 | #define __LINUX_VIDEODEV2_H | ||
| 59 | |||
| 60 | #ifdef __KERNEL__ | ||
| 61 | #include <linux/time.h> /* need struct timeval */ | ||
| 62 | #else | ||
| 63 | #include <sys/time.h> | ||
| 64 | #endif | ||
| 65 | #include <linux/compiler.h> | ||
| 66 | #include <linux/ioctl.h> | ||
| 67 | #include <linux/types.h> | ||
| 68 | |||
| 69 | /* | ||
| 70 | * Common stuff for both V4L1 and V4L2 | ||
| 71 | * Moved from videodev.h | ||
| 72 | */ | ||
| 73 | #define VIDEO_MAX_FRAME 32 | ||
| 74 | #define VIDEO_MAX_PLANES 8 | ||
| 75 | |||
| 76 | #ifndef __KERNEL__ | ||
| 77 | |||
| 78 | /* These defines are V4L1 specific and should not be used with the V4L2 API! | ||
| 79 | They will be removed from this header in the future. */ | ||
| 80 | |||
| 81 | #define VID_TYPE_CAPTURE 1 /* Can capture */ | ||
| 82 | #define VID_TYPE_TUNER 2 /* Can tune */ | ||
| 83 | #define VID_TYPE_TELETEXT 4 /* Does teletext */ | ||
| 84 | #define VID_TYPE_OVERLAY 8 /* Overlay onto frame buffer */ | ||
| 85 | #define VID_TYPE_CHROMAKEY 16 /* Overlay by chromakey */ | ||
| 86 | #define VID_TYPE_CLIPPING 32 /* Can clip */ | ||
| 87 | #define VID_TYPE_FRAMERAM 64 /* Uses the frame buffer memory */ | ||
| 88 | #define VID_TYPE_SCALES 128 /* Scalable */ | ||
| 89 | #define VID_TYPE_MONOCHROME 256 /* Monochrome only */ | ||
| 90 | #define VID_TYPE_SUBCAPTURE 512 /* Can capture subareas of the image */ | ||
| 91 | #define VID_TYPE_MPEG_DECODER 1024 /* Can decode MPEG streams */ | ||
| 92 | #define VID_TYPE_MPEG_ENCODER 2048 /* Can encode MPEG streams */ | ||
| 93 | #define VID_TYPE_MJPEG_DECODER 4096 /* Can decode MJPEG streams */ | ||
| 94 | #define VID_TYPE_MJPEG_ENCODER 8192 /* Can encode MJPEG streams */ | ||
| 95 | #endif | ||
| 96 | |||
| 97 | /* | ||
| 98 | * M I S C E L L A N E O U S | ||
| 99 | */ | ||
| 100 | |||
| 101 | /* Four-character-code (FOURCC) */ | ||
| 102 | #define v4l2_fourcc(a, b, c, d)\ | ||
| 103 | ((__u32)(a) | ((__u32)(b) << 8) | ((__u32)(c) << 16) | ((__u32)(d) << 24)) | ||
| 104 | |||
| 105 | /* | ||
| 106 | * E N U M S | ||
| 107 | */ | ||
| 108 | enum <link linkend="v4l2-field">v4l2_field</link> { | ||
| 109 | V4L2_FIELD_ANY = 0, /* driver can choose from none, | ||
| 110 | top, bottom, interlaced | ||
| 111 | depending on whatever it thinks | ||
| 112 | is approximate ... */ | ||
| 113 | V4L2_FIELD_NONE = 1, /* this device has no fields ... */ | ||
| 114 | V4L2_FIELD_TOP = 2, /* top field only */ | ||
| 115 | V4L2_FIELD_BOTTOM = 3, /* bottom field only */ | ||
| 116 | V4L2_FIELD_INTERLACED = 4, /* both fields interlaced */ | ||
| 117 | V4L2_FIELD_SEQ_TB = 5, /* both fields sequential into one | ||
| 118 | buffer, top-bottom order */ | ||
| 119 | V4L2_FIELD_SEQ_BT = 6, /* same as above + bottom-top order */ | ||
| 120 | V4L2_FIELD_ALTERNATE = 7, /* both fields alternating into | ||
| 121 | separate buffers */ | ||
| 122 | V4L2_FIELD_INTERLACED_TB = 8, /* both fields interlaced, top field | ||
| 123 | first and the top field is | ||
| 124 | transmitted first */ | ||
| 125 | V4L2_FIELD_INTERLACED_BT = 9, /* both fields interlaced, top field | ||
| 126 | first and the bottom field is | ||
| 127 | transmitted first */ | ||
| 128 | }; | ||
| 129 | #define V4L2_FIELD_HAS_TOP(field) \ | ||
| 130 | ((field) == V4L2_FIELD_TOP ||\ | ||
| 131 | (field) == V4L2_FIELD_INTERLACED ||\ | ||
| 132 | (field) == V4L2_FIELD_INTERLACED_TB ||\ | ||
| 133 | (field) == V4L2_FIELD_INTERLACED_BT ||\ | ||
| 134 | (field) == V4L2_FIELD_SEQ_TB ||\ | ||
| 135 | (field) == V4L2_FIELD_SEQ_BT) | ||
| 136 | #define V4L2_FIELD_HAS_BOTTOM(field) \ | ||
| 137 | ((field) == V4L2_FIELD_BOTTOM ||\ | ||
| 138 | (field) == V4L2_FIELD_INTERLACED ||\ | ||
| 139 | (field) == V4L2_FIELD_INTERLACED_TB ||\ | ||
| 140 | (field) == V4L2_FIELD_INTERLACED_BT ||\ | ||
| 141 | (field) == V4L2_FIELD_SEQ_TB ||\ | ||
| 142 | (field) == V4L2_FIELD_SEQ_BT) | ||
| 143 | #define V4L2_FIELD_HAS_BOTH(field) \ | ||
| 144 | ((field) == V4L2_FIELD_INTERLACED ||\ | ||
| 145 | (field) == V4L2_FIELD_INTERLACED_TB ||\ | ||
| 146 | (field) == V4L2_FIELD_INTERLACED_BT ||\ | ||
| 147 | (field) == V4L2_FIELD_SEQ_TB ||\ | ||
| 148 | (field) == V4L2_FIELD_SEQ_BT) | ||
| 149 | |||
| 150 | enum <link linkend="v4l2-buf-type">v4l2_buf_type</link> { | ||
| 151 | V4L2_BUF_TYPE_VIDEO_CAPTURE = 1, | ||
| 152 | V4L2_BUF_TYPE_VIDEO_OUTPUT = 2, | ||
| 153 | V4L2_BUF_TYPE_VIDEO_OVERLAY = 3, | ||
| 154 | V4L2_BUF_TYPE_VBI_CAPTURE = 4, | ||
| 155 | V4L2_BUF_TYPE_VBI_OUTPUT = 5, | ||
| 156 | V4L2_BUF_TYPE_SLICED_VBI_CAPTURE = 6, | ||
| 157 | V4L2_BUF_TYPE_SLICED_VBI_OUTPUT = 7, | ||
| 158 | #if 1 | ||
| 159 | /* Experimental */ | ||
| 160 | V4L2_BUF_TYPE_VIDEO_OUTPUT_OVERLAY = 8, | ||
| 161 | #endif | ||
| 162 | V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE = 9, | ||
| 163 | V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE = 10, | ||
| 164 | V4L2_BUF_TYPE_PRIVATE = 0x80, | ||
| 165 | }; | ||
| 166 | |||
| 167 | #define V4L2_TYPE_IS_MULTIPLANAR(type) \ | ||
| 168 | ((type) == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE \ | ||
| 169 | || (type) == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) | ||
| 170 | |||
| 171 | #define V4L2_TYPE_IS_OUTPUT(type) \ | ||
| 172 | ((type) == V4L2_BUF_TYPE_VIDEO_OUTPUT \ | ||
| 173 | || (type) == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE \ | ||
| 174 | || (type) == V4L2_BUF_TYPE_VIDEO_OVERLAY \ | ||
| 175 | || (type) == V4L2_BUF_TYPE_VIDEO_OUTPUT_OVERLAY \ | ||
| 176 | || (type) == V4L2_BUF_TYPE_VBI_OUTPUT \ | ||
| 177 | || (type) == V4L2_BUF_TYPE_SLICED_VBI_OUTPUT) | ||
| 178 | |||
| 179 | enum <link linkend="v4l2-tuner-type">v4l2_tuner_type</link> { | ||
| 180 | V4L2_TUNER_RADIO = 1, | ||
| 181 | V4L2_TUNER_ANALOG_TV = 2, | ||
| 182 | V4L2_TUNER_DIGITAL_TV = 3, | ||
| 183 | }; | ||
| 184 | |||
| 185 | enum <link linkend="v4l2-memory">v4l2_memory</link> { | ||
| 186 | V4L2_MEMORY_MMAP = 1, | ||
| 187 | V4L2_MEMORY_USERPTR = 2, | ||
| 188 | V4L2_MEMORY_OVERLAY = 3, | ||
| 189 | }; | ||
| 190 | |||
| 191 | /* see also http://vektor.theorem.ca/graphics/ycbcr/ */ | ||
| 192 | enum <link linkend="v4l2-colorspace">v4l2_colorspace</link> { | ||
| 193 | /* ITU-R 601 -- broadcast NTSC/PAL */ | ||
| 194 | V4L2_COLORSPACE_SMPTE170M = 1, | ||
| 195 | |||
| 196 | /* 1125-Line (US) HDTV */ | ||
| 197 | V4L2_COLORSPACE_SMPTE240M = 2, | ||
| 198 | |||
| 199 | /* HD and modern captures. */ | ||
| 200 | V4L2_COLORSPACE_REC709 = 3, | ||
| 201 | |||
| 202 | /* broken BT878 extents (601, luma range 16-253 instead of 16-235) */ | ||
| 203 | V4L2_COLORSPACE_BT878 = 4, | ||
| 204 | |||
| 205 | /* These should be useful. Assume 601 extents. */ | ||
| 206 | V4L2_COLORSPACE_470_SYSTEM_M = 5, | ||
| 207 | V4L2_COLORSPACE_470_SYSTEM_BG = 6, | ||
| 208 | |||
| 209 | /* I know there will be cameras that send this. So, this is | ||
| 210 | * unspecified chromaticities and full 0-255 on each of the | ||
| 211 | * Y'CbCr components | ||
| 212 | */ | ||
| 213 | V4L2_COLORSPACE_JPEG = 7, | ||
| 214 | |||
| 215 | /* For RGB colourspaces, this is probably a good start. */ | ||
| 216 | V4L2_COLORSPACE_SRGB = 8, | ||
| 217 | }; | ||
| 218 | |||
| 219 | enum <link linkend="v4l2-priority">v4l2_priority</link> { | ||
| 220 | V4L2_PRIORITY_UNSET = 0, /* not initialized */ | ||
| 221 | V4L2_PRIORITY_BACKGROUND = 1, | ||
| 222 | V4L2_PRIORITY_INTERACTIVE = 2, | ||
| 223 | V4L2_PRIORITY_RECORD = 3, | ||
| 224 | V4L2_PRIORITY_DEFAULT = V4L2_PRIORITY_INTERACTIVE, | ||
| 225 | }; | ||
| 226 | |||
| 227 | struct <link linkend="v4l2-rect">v4l2_rect</link> { | ||
| 228 | __s32 left; | ||
| 229 | __s32 top; | ||
| 230 | __s32 width; | ||
| 231 | __s32 height; | ||
| 232 | }; | ||
| 233 | |||
| 234 | struct <link linkend="v4l2-fract">v4l2_fract</link> { | ||
| 235 | __u32 numerator; | ||
| 236 | __u32 denominator; | ||
| 237 | }; | ||
| 238 | |||
| 239 | /* | ||
| 240 | * D R I V E R C A P A B I L I T I E S | ||
| 241 | */ | ||
| 242 | struct <link linkend="v4l2-capability">v4l2_capability</link> { | ||
| 243 | __u8 driver[16]; /* i.e.ie; "bttv" */ | ||
| 244 | __u8 card[32]; /* i.e.ie; "Hauppauge WinTV" */ | ||
| 245 | __u8 bus_info[32]; /* "PCI:" + pci_name(pci_dev) */ | ||
| 246 | __u32 version; /* should use KERNEL_VERSION() */ | ||
| 247 | __u32 capabilities; /* Device capabilities */ | ||
| 248 | __u32 reserved[4]; | ||
| 249 | }; | ||
| 250 | |||
| 251 | /* Values for 'capabilities' field */ | ||
| 252 | #define V4L2_CAP_VIDEO_CAPTURE 0x00000001 /* Is a video capture device */ | ||
| 253 | #define V4L2_CAP_VIDEO_OUTPUT 0x00000002 /* Is a video output device */ | ||
| 254 | #define V4L2_CAP_VIDEO_OVERLAY 0x00000004 /* Can do video overlay */ | ||
| 255 | #define V4L2_CAP_VBI_CAPTURE 0x00000010 /* Is a raw VBI capture device */ | ||
| 256 | #define V4L2_CAP_VBI_OUTPUT 0x00000020 /* Is a raw VBI output device */ | ||
| 257 | #define V4L2_CAP_SLICED_VBI_CAPTURE 0x00000040 /* Is a sliced VBI capture device */ | ||
| 258 | #define V4L2_CAP_SLICED_VBI_OUTPUT 0x00000080 /* Is a sliced VBI output device */ | ||
| 259 | #define V4L2_CAP_RDS_CAPTURE 0x00000100 /* RDS data capture */ | ||
| 260 | #define V4L2_CAP_VIDEO_OUTPUT_OVERLAY 0x00000200 /* Can do video output overlay */ | ||
| 261 | #define V4L2_CAP_HW_FREQ_SEEK 0x00000400 /* Can do hardware frequency seek */ | ||
| 262 | #define V4L2_CAP_RDS_OUTPUT 0x00000800 /* Is an RDS encoder */ | ||
| 263 | |||
| 264 | /* Is a video capture device that supports multiplanar formats */ | ||
| 265 | #define V4L2_CAP_VIDEO_CAPTURE_MPLANE 0x00001000 | ||
| 266 | /* Is a video output device that supports multiplanar formats */ | ||
| 267 | #define V4L2_CAP_VIDEO_OUTPUT_MPLANE 0x00002000 | ||
| 268 | |||
| 269 | #define V4L2_CAP_TUNER 0x00010000 /* has a tuner */ | ||
| 270 | #define V4L2_CAP_AUDIO 0x00020000 /* has audio support */ | ||
| 271 | #define V4L2_CAP_RADIO 0x00040000 /* is a radio device */ | ||
| 272 | #define V4L2_CAP_MODULATOR 0x00080000 /* has a modulator */ | ||
| 273 | |||
| 274 | #define V4L2_CAP_READWRITE 0x01000000 /* read/write systemcalls */ | ||
| 275 | #define V4L2_CAP_ASYNCIO 0x02000000 /* async I/O */ | ||
| 276 | #define V4L2_CAP_STREAMING 0x04000000 /* streaming I/O ioctls */ | ||
| 277 | |||
| 278 | /* | ||
| 279 | * V I D E O I M A G E F O R M A T | ||
| 280 | */ | ||
| 281 | struct <link linkend="v4l2-pix-format">v4l2_pix_format</link> { | ||
| 282 | __u32 width; | ||
| 283 | __u32 height; | ||
| 284 | __u32 pixelformat; | ||
| 285 | enum <link linkend="v4l2-field">v4l2_field</link> field; | ||
| 286 | __u32 bytesperline; /* for padding, zero if unused */ | ||
| 287 | __u32 sizeimage; | ||
| 288 | enum <link linkend="v4l2-colorspace">v4l2_colorspace</link> colorspace; | ||
| 289 | __u32 priv; /* private data, depends on pixelformat */ | ||
| 290 | }; | ||
| 291 | |||
| 292 | /* Pixel format FOURCC depth Description */ | ||
| 293 | |||
| 294 | /* RGB formats */ | ||
| 295 | #define <link linkend="V4L2-PIX-FMT-RGB332">V4L2_PIX_FMT_RGB332</link> v4l2_fourcc('R', 'G', 'B', '1') /* 8 RGB-3-3-2 */ | ||
| 296 | #define <link linkend="V4L2-PIX-FMT-RGB444">V4L2_PIX_FMT_RGB444</link> v4l2_fourcc('R', '4', '4', '4') /* 16 xxxxrrrr ggggbbbb */ | ||
| 297 | #define <link linkend="V4L2-PIX-FMT-RGB555">V4L2_PIX_FMT_RGB555</link> v4l2_fourcc('R', 'G', 'B', 'O') /* 16 RGB-5-5-5 */ | ||
| 298 | #define <link linkend="V4L2-PIX-FMT-RGB565">V4L2_PIX_FMT_RGB565</link> v4l2_fourcc('R', 'G', 'B', 'P') /* 16 RGB-5-6-5 */ | ||
| 299 | #define <link linkend="V4L2-PIX-FMT-RGB555X">V4L2_PIX_FMT_RGB555X</link> v4l2_fourcc('R', 'G', 'B', 'Q') /* 16 RGB-5-5-5 BE */ | ||
| 300 | #define <link linkend="V4L2-PIX-FMT-RGB565X">V4L2_PIX_FMT_RGB565X</link> v4l2_fourcc('R', 'G', 'B', 'R') /* 16 RGB-5-6-5 BE */ | ||
| 301 | #define <link linkend="V4L2-PIX-FMT-BGR666">V4L2_PIX_FMT_BGR666</link> v4l2_fourcc('B', 'G', 'R', 'H') /* 18 BGR-6-6-6 */ | ||
| 302 | #define <link linkend="V4L2-PIX-FMT-BGR24">V4L2_PIX_FMT_BGR24</link> v4l2_fourcc('B', 'G', 'R', '3') /* 24 BGR-8-8-8 */ | ||
| 303 | #define <link linkend="V4L2-PIX-FMT-RGB24">V4L2_PIX_FMT_RGB24</link> v4l2_fourcc('R', 'G', 'B', '3') /* 24 RGB-8-8-8 */ | ||
| 304 | #define <link linkend="V4L2-PIX-FMT-BGR32">V4L2_PIX_FMT_BGR32</link> v4l2_fourcc('B', 'G', 'R', '4') /* 32 BGR-8-8-8-8 */ | ||
| 305 | #define <link linkend="V4L2-PIX-FMT-RGB32">V4L2_PIX_FMT_RGB32</link> v4l2_fourcc('R', 'G', 'B', '4') /* 32 RGB-8-8-8-8 */ | ||
| 306 | |||
| 307 | /* Grey formats */ | ||
| 308 | #define <link linkend="V4L2-PIX-FMT-GREY">V4L2_PIX_FMT_GREY</link> v4l2_fourcc('G', 'R', 'E', 'Y') /* 8 Greyscale */ | ||
| 309 | #define <link linkend="V4L2-PIX-FMT-Y4">V4L2_PIX_FMT_Y4</link> v4l2_fourcc('Y', '0', '4', ' ') /* 4 Greyscale */ | ||
| 310 | #define <link linkend="V4L2-PIX-FMT-Y6">V4L2_PIX_FMT_Y6</link> v4l2_fourcc('Y', '0', '6', ' ') /* 6 Greyscale */ | ||
| 311 | #define <link linkend="V4L2-PIX-FMT-Y10">V4L2_PIX_FMT_Y10</link> v4l2_fourcc('Y', '1', '0', ' ') /* 10 Greyscale */ | ||
| 312 | #define <link linkend="V4L2-PIX-FMT-Y16">V4L2_PIX_FMT_Y16</link> v4l2_fourcc('Y', '1', '6', ' ') /* 16 Greyscale */ | ||
| 313 | |||
| 314 | /* Grey bit-packed formats */ | ||
| 315 | #define <link linkend="V4L2-PIX-FMT-Y10BPACK">V4L2_PIX_FMT_Y10BPACK</link> v4l2_fourcc('Y', '1', '0', 'B') /* 10 Greyscale bit-packed */ | ||
| 316 | |||
| 317 | /* Palette formats */ | ||
| 318 | #define <link linkend="V4L2-PIX-FMT-PAL8">V4L2_PIX_FMT_PAL8</link> v4l2_fourcc('P', 'A', 'L', '8') /* 8 8-bit palette */ | ||
| 319 | |||
| 320 | /* Luminance+Chrominance formats */ | ||
| 321 | #define <link linkend="V4L2-PIX-FMT-YVU410">V4L2_PIX_FMT_YVU410</link> v4l2_fourcc('Y', 'V', 'U', '9') /* 9 YVU 4:1:0 */ | ||
| 322 | #define <link linkend="V4L2-PIX-FMT-YVU420">V4L2_PIX_FMT_YVU420</link> v4l2_fourcc('Y', 'V', '1', '2') /* 12 YVU 4:2:0 */ | ||
| 323 | #define <link linkend="V4L2-PIX-FMT-YUYV">V4L2_PIX_FMT_YUYV</link> v4l2_fourcc('Y', 'U', 'Y', 'V') /* 16 YUV 4:2:2 */ | ||
| 324 | #define <link linkend="V4L2-PIX-FMT-YYUV">V4L2_PIX_FMT_YYUV</link> v4l2_fourcc('Y', 'Y', 'U', 'V') /* 16 YUV 4:2:2 */ | ||
| 325 | #define <link linkend="V4L2-PIX-FMT-YVYU">V4L2_PIX_FMT_YVYU</link> v4l2_fourcc('Y', 'V', 'Y', 'U') /* 16 YVU 4:2:2 */ | ||
| 326 | #define <link linkend="V4L2-PIX-FMT-UYVY">V4L2_PIX_FMT_UYVY</link> v4l2_fourcc('U', 'Y', 'V', 'Y') /* 16 YUV 4:2:2 */ | ||
| 327 | #define <link linkend="V4L2-PIX-FMT-VYUY">V4L2_PIX_FMT_VYUY</link> v4l2_fourcc('V', 'Y', 'U', 'Y') /* 16 YUV 4:2:2 */ | ||
| 328 | #define <link linkend="V4L2-PIX-FMT-YUV422P">V4L2_PIX_FMT_YUV422P</link> v4l2_fourcc('4', '2', '2', 'P') /* 16 YVU422 planar */ | ||
| 329 | #define <link linkend="V4L2-PIX-FMT-YUV411P">V4L2_PIX_FMT_YUV411P</link> v4l2_fourcc('4', '1', '1', 'P') /* 16 YVU411 planar */ | ||
| 330 | #define <link linkend="V4L2-PIX-FMT-Y41P">V4L2_PIX_FMT_Y41P</link> v4l2_fourcc('Y', '4', '1', 'P') /* 12 YUV 4:1:1 */ | ||
| 331 | #define <link linkend="V4L2-PIX-FMT-YUV444">V4L2_PIX_FMT_YUV444</link> v4l2_fourcc('Y', '4', '4', '4') /* 16 xxxxyyyy uuuuvvvv */ | ||
| 332 | #define <link linkend="V4L2-PIX-FMT-YUV555">V4L2_PIX_FMT_YUV555</link> v4l2_fourcc('Y', 'U', 'V', 'O') /* 16 YUV-5-5-5 */ | ||
| 333 | #define <link linkend="V4L2-PIX-FMT-YUV565">V4L2_PIX_FMT_YUV565</link> v4l2_fourcc('Y', 'U', 'V', 'P') /* 16 YUV-5-6-5 */ | ||
| 334 | #define <link linkend="V4L2-PIX-FMT-YUV32">V4L2_PIX_FMT_YUV32</link> v4l2_fourcc('Y', 'U', 'V', '4') /* 32 YUV-8-8-8-8 */ | ||
| 335 | #define <link linkend="V4L2-PIX-FMT-YUV410">V4L2_PIX_FMT_YUV410</link> v4l2_fourcc('Y', 'U', 'V', '9') /* 9 YUV 4:1:0 */ | ||
| 336 | #define <link linkend="V4L2-PIX-FMT-YUV420">V4L2_PIX_FMT_YUV420</link> v4l2_fourcc('Y', 'U', '1', '2') /* 12 YUV 4:2:0 */ | ||
| 337 | #define <link linkend="V4L2-PIX-FMT-HI240">V4L2_PIX_FMT_HI240</link> v4l2_fourcc('H', 'I', '2', '4') /* 8 8-bit color */ | ||
| 338 | #define <link linkend="V4L2-PIX-FMT-HM12">V4L2_PIX_FMT_HM12</link> v4l2_fourcc('H', 'M', '1', '2') /* 8 YUV 4:2:0 16x16 macroblocks */ | ||
| 339 | #define <link linkend="V4L2-PIX-FMT-M420">V4L2_PIX_FMT_M420</link> v4l2_fourcc('M', '4', '2', '0') /* 12 YUV 4:2:0 2 lines y, 1 line uv interleaved */ | ||
| 340 | |||
| 341 | /* two planes -- one Y, one Cr + Cb interleaved */ | ||
| 342 | #define <link linkend="V4L2-PIX-FMT-NV12">V4L2_PIX_FMT_NV12</link> v4l2_fourcc('N', 'V', '1', '2') /* 12 Y/CbCr 4:2:0 */ | ||
| 343 | #define <link linkend="V4L2-PIX-FMT-NV21">V4L2_PIX_FMT_NV21</link> v4l2_fourcc('N', 'V', '2', '1') /* 12 Y/CrCb 4:2:0 */ | ||
| 344 | #define <link linkend="V4L2-PIX-FMT-NV16">V4L2_PIX_FMT_NV16</link> v4l2_fourcc('N', 'V', '1', '6') /* 16 Y/CbCr 4:2:2 */ | ||
| 345 | #define <link linkend="V4L2-PIX-FMT-NV61">V4L2_PIX_FMT_NV61</link> v4l2_fourcc('N', 'V', '6', '1') /* 16 Y/CrCb 4:2:2 */ | ||
| 346 | |||
| 347 | /* two non contiguous planes - one Y, one Cr + Cb interleaved */ | ||
| 348 | #define <link linkend="V4L2-PIX-FMT-NV12M">V4L2_PIX_FMT_NV12M</link> v4l2_fourcc('N', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 */ | ||
| 349 | #define <link linkend="V4L2-PIX-FMT-NV12MT">V4L2_PIX_FMT_NV12MT</link> v4l2_fourcc('T', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 64x32 macroblocks */ | ||
| 350 | |||
| 351 | /* three non contiguous planes - Y, Cb, Cr */ | ||
| 352 | #define <link linkend="V4L2-PIX-FMT-YUV420M">V4L2_PIX_FMT_YUV420M</link> v4l2_fourcc('Y', 'M', '1', '2') /* 12 YUV420 planar */ | ||
| 353 | |||
| 354 | /* Bayer formats - see http://www.siliconimaging.com/RGB%20Bayer.htm */ | ||
| 355 | #define <link linkend="V4L2-PIX-FMT-SBGGR8">V4L2_PIX_FMT_SBGGR8</link> v4l2_fourcc('B', 'A', '8', '1') /* 8 BGBG.. GRGR.. */ | ||
| 356 | #define <link linkend="V4L2-PIX-FMT-SGBRG8">V4L2_PIX_FMT_SGBRG8</link> v4l2_fourcc('G', 'B', 'R', 'G') /* 8 GBGB.. RGRG.. */ | ||
| 357 | #define <link linkend="V4L2-PIX-FMT-SGRBG8">V4L2_PIX_FMT_SGRBG8</link> v4l2_fourcc('G', 'R', 'B', 'G') /* 8 GRGR.. BGBG.. */ | ||
| 358 | #define <link linkend="V4L2-PIX-FMT-SRGGB8">V4L2_PIX_FMT_SRGGB8</link> v4l2_fourcc('R', 'G', 'G', 'B') /* 8 RGRG.. GBGB.. */ | ||
| 359 | #define <link linkend="V4L2-PIX-FMT-SBGGR10">V4L2_PIX_FMT_SBGGR10</link> v4l2_fourcc('B', 'G', '1', '0') /* 10 BGBG.. GRGR.. */ | ||
| 360 | #define <link linkend="V4L2-PIX-FMT-SGBRG10">V4L2_PIX_FMT_SGBRG10</link> v4l2_fourcc('G', 'B', '1', '0') /* 10 GBGB.. RGRG.. */ | ||
| 361 | #define <link linkend="V4L2-PIX-FMT-SGRBG10">V4L2_PIX_FMT_SGRBG10</link> v4l2_fourcc('B', 'A', '1', '0') /* 10 GRGR.. BGBG.. */ | ||
| 362 | #define <link linkend="V4L2-PIX-FMT-SRGGB10">V4L2_PIX_FMT_SRGGB10</link> v4l2_fourcc('R', 'G', '1', '0') /* 10 RGRG.. GBGB.. */ | ||
| 363 | /* 10bit raw bayer DPCM compressed to 8 bits */ | ||
| 364 | #define <link linkend="V4L2-PIX-FMT-SGRBG10DPCM8">V4L2_PIX_FMT_SGRBG10DPCM8</link> v4l2_fourcc('B', 'D', '1', '0') | ||
| 365 | /* | ||
| 366 | * 10bit raw bayer, expanded to 16 bits | ||
| 367 | * xxxxrrrrrrrrrrxxxxgggggggggg xxxxggggggggggxxxxbbbbbbbbbb... | ||
| 368 | */ | ||
| 369 | #define <link linkend="V4L2-PIX-FMT-SBGGR16">V4L2_PIX_FMT_SBGGR16</link> v4l2_fourcc('B', 'Y', 'R', '2') /* 16 BGBG.. GRGR.. */ | ||
| 370 | |||
| 371 | /* compressed formats */ | ||
| 372 | #define <link linkend="V4L2-PIX-FMT-MJPEG">V4L2_PIX_FMT_MJPEG</link> v4l2_fourcc('M', 'J', 'P', 'G') /* Motion-JPEG */ | ||
| 373 | #define <link linkend="V4L2-PIX-FMT-JPEG">V4L2_PIX_FMT_JPEG</link> v4l2_fourcc('J', 'P', 'E', 'G') /* JFIF JPEG */ | ||
| 374 | #define <link linkend="V4L2-PIX-FMT-DV">V4L2_PIX_FMT_DV</link> v4l2_fourcc('d', 'v', 's', 'd') /* 1394 */ | ||
| 375 | #define <link linkend="V4L2-PIX-FMT-MPEG">V4L2_PIX_FMT_MPEG</link> v4l2_fourcc('M', 'P', 'E', 'G') /* MPEG-1/2/4 */ | ||
| 376 | |||
| 377 | /* Vendor-specific formats */ | ||
| 378 | #define <link linkend="V4L2-PIX-FMT-CPIA1">V4L2_PIX_FMT_CPIA1</link> v4l2_fourcc('C', 'P', 'I', 'A') /* cpia1 YUV */ | ||
| 379 | #define <link linkend="V4L2-PIX-FMT-WNVA">V4L2_PIX_FMT_WNVA</link> v4l2_fourcc('W', 'N', 'V', 'A') /* Winnov hw compress */ | ||
| 380 | #define <link linkend="V4L2-PIX-FMT-SN9C10X">V4L2_PIX_FMT_SN9C10X</link> v4l2_fourcc('S', '9', '1', '0') /* SN9C10x compression */ | ||
| 381 | #define <link linkend="V4L2-PIX-FMT-SN9C20X-I420">V4L2_PIX_FMT_SN9C20X_I420</link> v4l2_fourcc('S', '9', '2', '0') /* SN9C20x YUV 4:2:0 */ | ||
| 382 | #define <link linkend="V4L2-PIX-FMT-PWC1">V4L2_PIX_FMT_PWC1</link> v4l2_fourcc('P', 'W', 'C', '1') /* pwc older webcam */ | ||
| 383 | #define <link linkend="V4L2-PIX-FMT-PWC2">V4L2_PIX_FMT_PWC2</link> v4l2_fourcc('P', 'W', 'C', '2') /* pwc newer webcam */ | ||
| 384 | #define <link linkend="V4L2-PIX-FMT-ET61X251">V4L2_PIX_FMT_ET61X251</link> v4l2_fourcc('E', '6', '2', '5') /* ET61X251 compression */ | ||
| 385 | #define <link linkend="V4L2-PIX-FMT-SPCA501">V4L2_PIX_FMT_SPCA501</link> v4l2_fourcc('S', '5', '0', '1') /* YUYV per line */ | ||
| 386 | #define <link linkend="V4L2-PIX-FMT-SPCA505">V4L2_PIX_FMT_SPCA505</link> v4l2_fourcc('S', '5', '0', '5') /* YYUV per line */ | ||
| 387 | #define <link linkend="V4L2-PIX-FMT-SPCA508">V4L2_PIX_FMT_SPCA508</link> v4l2_fourcc('S', '5', '0', '8') /* YUVY per line */ | ||
| 388 | #define <link linkend="V4L2-PIX-FMT-SPCA561">V4L2_PIX_FMT_SPCA561</link> v4l2_fourcc('S', '5', '6', '1') /* compressed GBRG bayer */ | ||
| 389 | #define <link linkend="V4L2-PIX-FMT-PAC207">V4L2_PIX_FMT_PAC207</link> v4l2_fourcc('P', '2', '0', '7') /* compressed BGGR bayer */ | ||
| 390 | #define <link linkend="V4L2-PIX-FMT-MR97310A">V4L2_PIX_FMT_MR97310A</link> v4l2_fourcc('M', '3', '1', '0') /* compressed BGGR bayer */ | ||
| 391 | #define <link linkend="V4L2-PIX-FMT-SN9C2028">V4L2_PIX_FMT_SN9C2028</link> v4l2_fourcc('S', 'O', 'N', 'X') /* compressed GBRG bayer */ | ||
| 392 | #define <link linkend="V4L2-PIX-FMT-SQ905C">V4L2_PIX_FMT_SQ905C</link> v4l2_fourcc('9', '0', '5', 'C') /* compressed RGGB bayer */ | ||
| 393 | #define <link linkend="V4L2-PIX-FMT-PJPG">V4L2_PIX_FMT_PJPG</link> v4l2_fourcc('P', 'J', 'P', 'G') /* Pixart 73xx JPEG */ | ||
| 394 | #define <link linkend="V4L2-PIX-FMT-OV511">V4L2_PIX_FMT_OV511</link> v4l2_fourcc('O', '5', '1', '1') /* ov511 JPEG */ | ||
| 395 | #define <link linkend="V4L2-PIX-FMT-OV518">V4L2_PIX_FMT_OV518</link> v4l2_fourcc('O', '5', '1', '8') /* ov518 JPEG */ | ||
| 396 | #define <link linkend="V4L2-PIX-FMT-STV0680">V4L2_PIX_FMT_STV0680</link> v4l2_fourcc('S', '6', '8', '0') /* stv0680 bayer */ | ||
| 397 | #define <link linkend="V4L2-PIX-FMT-TM6000">V4L2_PIX_FMT_TM6000</link> v4l2_fourcc('T', 'M', '6', '0') /* tm5600/tm60x0 */ | ||
| 398 | #define <link linkend="V4L2-PIX-FMT-CIT-YYVYUY">V4L2_PIX_FMT_CIT_YYVYUY</link> v4l2_fourcc('C', 'I', 'T', 'V') /* one line of Y then 1 line of VYUY */ | ||
| 399 | #define <link linkend="V4L2-PIX-FMT-KONICA420">V4L2_PIX_FMT_KONICA420</link> v4l2_fourcc('K', 'O', 'N', 'I') /* YUV420 planar in blocks of 256 pixels */ | ||
| 400 | |||
| 401 | /* | ||
| 402 | * F O R M A T E N U M E R A T I O N | ||
| 403 | */ | ||
| 404 | struct <link linkend="v4l2-fmtdesc">v4l2_fmtdesc</link> { | ||
| 405 | __u32 index; /* Format number */ | ||
| 406 | enum <link linkend="v4l2-buf-type">v4l2_buf_type</link> type; /* buffer type */ | ||
| 407 | __u32 flags; | ||
| 408 | __u8 description[32]; /* Description string */ | ||
| 409 | __u32 pixelformat; /* Format fourcc */ | ||
| 410 | __u32 reserved[4]; | ||
| 411 | }; | ||
| 412 | |||
| 413 | #define V4L2_FMT_FLAG_COMPRESSED 0x0001 | ||
| 414 | #define V4L2_FMT_FLAG_EMULATED 0x0002 | ||
| 415 | |||
| 416 | #if 1 | ||
| 417 | /* Experimental Frame Size and frame rate enumeration */ | ||
| 418 | /* | ||
| 419 | * F R A M E S I Z E E N U M E R A T I O N | ||
| 420 | */ | ||
| 421 | enum <link linkend="v4l2-frmsizetypes">v4l2_frmsizetypes</link> { | ||
| 422 | V4L2_FRMSIZE_TYPE_DISCRETE = 1, | ||
| 423 | V4L2_FRMSIZE_TYPE_CONTINUOUS = 2, | ||
| 424 | V4L2_FRMSIZE_TYPE_STEPWISE = 3, | ||
| 425 | }; | ||
| 426 | |||
| 427 | struct <link linkend="v4l2-frmsize-discrete">v4l2_frmsize_discrete</link> { | ||
| 428 | __u32 width; /* Frame width [pixel] */ | ||
| 429 | __u32 height; /* Frame height [pixel] */ | ||
| 430 | }; | ||
| 431 | |||
| 432 | struct <link linkend="v4l2-frmsize-stepwise">v4l2_frmsize_stepwise</link> { | ||
| 433 | __u32 min_width; /* Minimum frame width [pixel] */ | ||
| 434 | __u32 max_width; /* Maximum frame width [pixel] */ | ||
| 435 | __u32 step_width; /* Frame width step size [pixel] */ | ||
| 436 | __u32 min_height; /* Minimum frame height [pixel] */ | ||
| 437 | __u32 max_height; /* Maximum frame height [pixel] */ | ||
| 438 | __u32 step_height; /* Frame height step size [pixel] */ | ||
| 439 | }; | ||
| 440 | |||
| 441 | struct <link linkend="v4l2-frmsizeenum">v4l2_frmsizeenum</link> { | ||
| 442 | __u32 index; /* Frame size number */ | ||
| 443 | __u32 pixel_format; /* Pixel format */ | ||
| 444 | __u32 type; /* Frame size type the device supports. */ | ||
| 445 | |||
| 446 | union { /* Frame size */ | ||
| 447 | struct <link linkend="v4l2-frmsize-discrete">v4l2_frmsize_discrete</link> discrete; | ||
| 448 | struct <link linkend="v4l2-frmsize-stepwise">v4l2_frmsize_stepwise</link> stepwise; | ||
| 449 | }; | ||
| 450 | |||
| 451 | __u32 reserved[2]; /* Reserved space for future use */ | ||
| 452 | }; | ||
| 453 | |||
| 454 | /* | ||
| 455 | * F R A M E R A T E E N U M E R A T I O N | ||
| 456 | */ | ||
| 457 | enum <link linkend="v4l2-frmivaltypes">v4l2_frmivaltypes</link> { | ||
| 458 | V4L2_FRMIVAL_TYPE_DISCRETE = 1, | ||
| 459 | V4L2_FRMIVAL_TYPE_CONTINUOUS = 2, | ||
| 460 | V4L2_FRMIVAL_TYPE_STEPWISE = 3, | ||
| 461 | }; | ||
| 462 | |||
| 463 | struct <link linkend="v4l2-frmival-stepwise">v4l2_frmival_stepwise</link> { | ||
| 464 | struct <link linkend="v4l2-fract">v4l2_fract</link> min; /* Minimum frame interval [s] */ | ||
| 465 | struct <link linkend="v4l2-fract">v4l2_fract</link> max; /* Maximum frame interval [s] */ | ||
| 466 | struct <link linkend="v4l2-fract">v4l2_fract</link> step; /* Frame interval step size [s] */ | ||
| 467 | }; | ||
| 468 | |||
| 469 | struct <link linkend="v4l2-frmivalenum">v4l2_frmivalenum</link> { | ||
| 470 | __u32 index; /* Frame format index */ | ||
| 471 | __u32 pixel_format; /* Pixel format */ | ||
| 472 | __u32 width; /* Frame width */ | ||
| 473 | __u32 height; /* Frame height */ | ||
| 474 | __u32 type; /* Frame interval type the device supports. */ | ||
| 475 | |||
| 476 | union { /* Frame interval */ | ||
| 477 | struct <link linkend="v4l2-fract">v4l2_fract</link> discrete; | ||
| 478 | struct <link linkend="v4l2-frmival-stepwise">v4l2_frmival_stepwise</link> stepwise; | ||
| 479 | }; | ||
| 480 | |||
| 481 | __u32 reserved[2]; /* Reserved space for future use */ | ||
| 482 | }; | ||
| 483 | #endif | ||
| 484 | |||
| 485 | /* | ||
| 486 | * T I M E C O D E | ||
| 487 | */ | ||
| 488 | struct <link linkend="v4l2-timecode">v4l2_timecode</link> { | ||
| 489 | __u32 type; | ||
| 490 | __u32 flags; | ||
| 491 | __u8 frames; | ||
| 492 | __u8 seconds; | ||
| 493 | __u8 minutes; | ||
| 494 | __u8 hours; | ||
| 495 | __u8 userbits[4]; | ||
| 496 | }; | ||
| 497 | |||
| 498 | /* Type */ | ||
| 499 | #define V4L2_TC_TYPE_24FPS 1 | ||
| 500 | #define V4L2_TC_TYPE_25FPS 2 | ||
| 501 | #define V4L2_TC_TYPE_30FPS 3 | ||
| 502 | #define V4L2_TC_TYPE_50FPS 4 | ||
| 503 | #define V4L2_TC_TYPE_60FPS 5 | ||
| 504 | |||
| 505 | /* Flags */ | ||
| 506 | #define V4L2_TC_FLAG_DROPFRAME 0x0001 /* "drop-frame" mode */ | ||
| 507 | #define V4L2_TC_FLAG_COLORFRAME 0x0002 | ||
| 508 | #define V4L2_TC_USERBITS_field 0x000C | ||
| 509 | #define V4L2_TC_USERBITS_USERDEFINED 0x0000 | ||
| 510 | #define V4L2_TC_USERBITS_8BITCHARS 0x0008 | ||
| 511 | /* The above is based on SMPTE timecodes */ | ||
| 512 | |||
| 513 | struct <link linkend="v4l2-jpegcompression">v4l2_jpegcompression</link> { | ||
| 514 | int quality; | ||
| 515 | |||
| 516 | int APPn; /* Number of APP segment to be written, | ||
| 517 | * must be 0..15 */ | ||
| 518 | int APP_len; /* Length of data in JPEG APPn segment */ | ||
| 519 | char APP_data[60]; /* Data in the JPEG APPn segment. */ | ||
| 520 | |||
| 521 | int COM_len; /* Length of data in JPEG COM segment */ | ||
| 522 | char COM_data[60]; /* Data in JPEG COM segment */ | ||
| 523 | |||
| 524 | __u32 jpeg_markers; /* Which markers should go into the JPEG | ||
| 525 | * output. Unless you exactly know what | ||
| 526 | * you do, leave them untouched. | ||
| 527 | * Inluding less markers will make the | ||
| 528 | * resulting code smaller, but there will | ||
| 529 | * be fewer applications which can read it. | ||
| 530 | * The presence of the APP and COM marker | ||
| 531 | * is influenced by APP_len and COM_len | ||
| 532 | * ONLY, not by this property! */ | ||
| 533 | |||
| 534 | #define V4L2_JPEG_MARKER_DHT (1<<3) /* Define Huffman Tables */ | ||
| 535 | #define V4L2_JPEG_MARKER_DQT (1<<4) /* Define Quantization Tables */ | ||
| 536 | #define V4L2_JPEG_MARKER_DRI (1<<5) /* Define Restart Interval */ | ||
| 537 | #define V4L2_JPEG_MARKER_COM (1<<6) /* Comment segment */ | ||
| 538 | #define V4L2_JPEG_MARKER_APP (1<<7) /* App segment, driver will | ||
| 539 | * allways use APP0 */ | ||
| 540 | }; | ||
| 541 | |||
| 542 | /* | ||
| 543 | * M E M O R Y - M A P P I N G B U F F E R S | ||
| 544 | */ | ||
| 545 | struct <link linkend="v4l2-requestbuffers">v4l2_requestbuffers</link> { | ||
| 546 | __u32 count; | ||
| 547 | enum <link linkend="v4l2-buf-type">v4l2_buf_type</link> type; | ||
| 548 | enum <link linkend="v4l2-memory">v4l2_memory</link> memory; | ||
| 549 | __u32 reserved[2]; | ||
| 550 | }; | ||
| 551 | |||
| 552 | /** | ||
| 553 | * struct <link linkend="v4l2-plane">v4l2_plane</link> - plane info for multi-planar buffers | ||
| 554 | * @bytesused: number of bytes occupied by data in the plane (payload) | ||
| 555 | * @length: size of this plane (NOT the payload) in bytes | ||
| 556 | * @mem_offset: when memory in the associated struct <link linkend="v4l2-buffer">v4l2_buffer</link> is | ||
| 557 | * V4L2_MEMORY_MMAP, equals the offset from the start of | ||
| 558 | * the device memory for this plane (or is a "cookie" that | ||
| 559 | * should be passed to mmap() called on the video node) | ||
| 560 | * @userptr: when memory is V4L2_MEMORY_USERPTR, a userspace pointer | ||
| 561 | * pointing to this plane | ||
| 562 | * @data_offset: offset in the plane to the start of data; usually 0, | ||
| 563 | * unless there is a header in front of the data | ||
| 564 | * | ||
| 565 | * Multi-planar buffers consist of one or more planes, e.g. an YCbCr buffer | ||
| 566 | * with two planes can have one plane for Y, and another for interleaved CbCr | ||
| 567 | * components. Each plane can reside in a separate memory buffer, or even in | ||
| 568 | * a completely separate memory node (e.g. in embedded devices). | ||
| 569 | */ | ||
| 570 | struct <link linkend="v4l2-plane">v4l2_plane</link> { | ||
| 571 | __u32 bytesused; | ||
| 572 | __u32 length; | ||
| 573 | union { | ||
| 574 | __u32 mem_offset; | ||
| 575 | unsigned long userptr; | ||
| 576 | } m; | ||
| 577 | __u32 data_offset; | ||
| 578 | __u32 reserved[11]; | ||
| 579 | }; | ||
| 580 | |||
| 581 | /** | ||
| 582 | * struct <link linkend="v4l2-buffer">v4l2_buffer</link> - video buffer info | ||
| 583 | * @index: id number of the buffer | ||
| 584 | * @type: buffer type (type == *_MPLANE for multiplanar buffers) | ||
| 585 | * @bytesused: number of bytes occupied by data in the buffer (payload); | ||
| 586 | * unused (set to 0) for multiplanar buffers | ||
| 587 | * @flags: buffer informational flags | ||
| 588 | * @field: field order of the image in the buffer | ||
| 589 | * @timestamp: frame timestamp | ||
| 590 | * @timecode: frame timecode | ||
| 591 | * @sequence: sequence count of this frame | ||
| 592 | * @memory: the method, in which the actual video data is passed | ||
| 593 | * @offset: for non-multiplanar buffers with memory == V4L2_MEMORY_MMAP; | ||
| 594 | * offset from the start of the device memory for this plane, | ||
| 595 | * (or a "cookie" that should be passed to mmap() as offset) | ||
| 596 | * @userptr: for non-multiplanar buffers with memory == V4L2_MEMORY_USERPTR; | ||
| 597 | * a userspace pointer pointing to this buffer | ||
| 598 | * @planes: for multiplanar buffers; userspace pointer to the array of plane | ||
| 599 | * info structs for this buffer | ||
| 600 | * @length: size in bytes of the buffer (NOT its payload) for single-plane | ||
| 601 | * buffers (when type != *_MPLANE); number of elements in the | ||
| 602 | * planes array for multi-plane buffers | ||
| 603 | * @input: input number from which the video data has has been captured | ||
| 604 | * | ||
| 605 | * Contains data exchanged by application and driver using one of the Streaming | ||
| 606 | * I/O methods. | ||
| 607 | */ | ||
| 608 | struct <link linkend="v4l2-buffer">v4l2_buffer</link> { | ||
| 609 | __u32 index; | ||
| 610 | enum <link linkend="v4l2-buf-type">v4l2_buf_type</link> type; | ||
| 611 | __u32 bytesused; | ||
| 612 | __u32 flags; | ||
| 613 | enum <link linkend="v4l2-field">v4l2_field</link> field; | ||
| 614 | struct timeval timestamp; | ||
| 615 | struct <link linkend="v4l2-timecode">v4l2_timecode</link> timecode; | ||
| 616 | __u32 sequence; | ||
| 617 | |||
| 618 | /* memory location */ | ||
| 619 | enum <link linkend="v4l2-memory">v4l2_memory</link> memory; | ||
| 620 | union { | ||
| 621 | __u32 offset; | ||
| 622 | unsigned long userptr; | ||
| 623 | struct <link linkend="v4l2-plane">v4l2_plane</link> *planes; | ||
| 624 | } m; | ||
| 625 | __u32 length; | ||
| 626 | __u32 input; | ||
| 627 | __u32 reserved; | ||
| 628 | }; | ||
| 629 | |||
| 630 | /* Flags for 'flags' field */ | ||
| 631 | #define V4L2_BUF_FLAG_MAPPED 0x0001 /* Buffer is mapped (flag) */ | ||
| 632 | #define V4L2_BUF_FLAG_QUEUED 0x0002 /* Buffer is queued for processing */ | ||
| 633 | #define V4L2_BUF_FLAG_DONE 0x0004 /* Buffer is ready */ | ||
| 634 | #define V4L2_BUF_FLAG_KEYFRAME 0x0008 /* Image is a keyframe (I-frame) */ | ||
| 635 | #define V4L2_BUF_FLAG_PFRAME 0x0010 /* Image is a P-frame */ | ||
| 636 | #define V4L2_BUF_FLAG_BFRAME 0x0020 /* Image is a B-frame */ | ||
| 637 | /* Buffer is ready, but the data contained within is corrupted. */ | ||
| 638 | #define V4L2_BUF_FLAG_ERROR 0x0040 | ||
| 639 | #define V4L2_BUF_FLAG_TIMECODE 0x0100 /* timecode field is valid */ | ||
| 640 | #define V4L2_BUF_FLAG_INPUT 0x0200 /* input field is valid */ | ||
| 641 | |||
| 642 | /* | ||
| 643 | * O V E R L A Y P R E V I E W | ||
| 644 | */ | ||
| 645 | struct <link linkend="v4l2-framebuffer">v4l2_framebuffer</link> { | ||
| 646 | __u32 capability; | ||
| 647 | __u32 flags; | ||
| 648 | /* FIXME: in theory we should pass something like PCI device + memory | ||
| 649 | * region + offset instead of some physical address */ | ||
| 650 | void *base; | ||
| 651 | struct <link linkend="v4l2-pix-format">v4l2_pix_format</link> fmt; | ||
| 652 | }; | ||
| 653 | /* Flags for the 'capability' field. Read only */ | ||
| 654 | #define V4L2_FBUF_CAP_EXTERNOVERLAY 0x0001 | ||
| 655 | #define V4L2_FBUF_CAP_CHROMAKEY 0x0002 | ||
| 656 | #define V4L2_FBUF_CAP_LIST_CLIPPING 0x0004 | ||
| 657 | #define V4L2_FBUF_CAP_BITMAP_CLIPPING 0x0008 | ||
| 658 | #define V4L2_FBUF_CAP_LOCAL_ALPHA 0x0010 | ||
| 659 | #define V4L2_FBUF_CAP_GLOBAL_ALPHA 0x0020 | ||
| 660 | #define V4L2_FBUF_CAP_LOCAL_INV_ALPHA 0x0040 | ||
| 661 | #define V4L2_FBUF_CAP_SRC_CHROMAKEY 0x0080 | ||
| 662 | /* Flags for the 'flags' field. */ | ||
| 663 | #define V4L2_FBUF_FLAG_PRIMARY 0x0001 | ||
| 664 | #define V4L2_FBUF_FLAG_OVERLAY 0x0002 | ||
| 665 | #define V4L2_FBUF_FLAG_CHROMAKEY 0x0004 | ||
| 666 | #define V4L2_FBUF_FLAG_LOCAL_ALPHA 0x0008 | ||
| 667 | #define V4L2_FBUF_FLAG_GLOBAL_ALPHA 0x0010 | ||
| 668 | #define V4L2_FBUF_FLAG_LOCAL_INV_ALPHA 0x0020 | ||
| 669 | #define V4L2_FBUF_FLAG_SRC_CHROMAKEY 0x0040 | ||
| 670 | |||
| 671 | struct <link linkend="v4l2-clip">v4l2_clip</link> { | ||
| 672 | struct <link linkend="v4l2-rect">v4l2_rect</link> c; | ||
| 673 | struct <link linkend="v4l2-clip">v4l2_clip</link> __user *next; | ||
| 674 | }; | ||
| 675 | |||
| 676 | struct <link linkend="v4l2-window">v4l2_window</link> { | ||
| 677 | struct <link linkend="v4l2-rect">v4l2_rect</link> w; | ||
| 678 | enum <link linkend="v4l2-field">v4l2_field</link> field; | ||
| 679 | __u32 chromakey; | ||
| 680 | struct <link linkend="v4l2-clip">v4l2_clip</link> __user *clips; | ||
| 681 | __u32 clipcount; | ||
| 682 | void __user *bitmap; | ||
| 683 | __u8 global_alpha; | ||
| 684 | }; | ||
| 685 | |||
| 686 | /* | ||
| 687 | * C A P T U R E P A R A M E T E R S | ||
| 688 | */ | ||
| 689 | struct <link linkend="v4l2-captureparm">v4l2_captureparm</link> { | ||
| 690 | __u32 capability; /* Supported modes */ | ||
| 691 | __u32 capturemode; /* Current mode */ | ||
| 692 | struct <link linkend="v4l2-fract">v4l2_fract</link> timeperframe; /* Time per frame in .1us units */ | ||
| 693 | __u32 extendedmode; /* Driver-specific extensions */ | ||
| 694 | __u32 readbuffers; /* # of buffers for read */ | ||
| 695 | __u32 reserved[4]; | ||
| 696 | }; | ||
| 697 | |||
| 698 | /* Flags for 'capability' and 'capturemode' fields */ | ||
| 699 | #define V4L2_MODE_HIGHQUALITY 0x0001 /* High quality imaging mode */ | ||
| 700 | #define V4L2_CAP_TIMEPERFRAME 0x1000 /* timeperframe field is supported */ | ||
| 701 | |||
| 702 | struct <link linkend="v4l2-outputparm">v4l2_outputparm</link> { | ||
| 703 | __u32 capability; /* Supported modes */ | ||
| 704 | __u32 outputmode; /* Current mode */ | ||
| 705 | struct <link linkend="v4l2-fract">v4l2_fract</link> timeperframe; /* Time per frame in seconds */ | ||
| 706 | __u32 extendedmode; /* Driver-specific extensions */ | ||
| 707 | __u32 writebuffers; /* # of buffers for write */ | ||
| 708 | __u32 reserved[4]; | ||
| 709 | }; | ||
| 710 | |||
| 711 | /* | ||
| 712 | * I N P U T I M A G E C R O P P I N G | ||
| 713 | */ | ||
| 714 | struct <link linkend="v4l2-cropcap">v4l2_cropcap</link> { | ||
| 715 | enum <link linkend="v4l2-buf-type">v4l2_buf_type</link> type; | ||
| 716 | struct <link linkend="v4l2-rect">v4l2_rect</link> bounds; | ||
| 717 | struct <link linkend="v4l2-rect">v4l2_rect</link> defrect; | ||
| 718 | struct <link linkend="v4l2-fract">v4l2_fract</link> pixelaspect; | ||
| 719 | }; | ||
| 720 | |||
| 721 | struct <link linkend="v4l2-crop">v4l2_crop</link> { | ||
| 722 | enum <link linkend="v4l2-buf-type">v4l2_buf_type</link> type; | ||
| 723 | struct <link linkend="v4l2-rect">v4l2_rect</link> c; | ||
| 724 | }; | ||
| 725 | |||
| 726 | /* | ||
| 727 | * A N A L O G V I D E O S T A N D A R D | ||
| 728 | */ | ||
| 729 | |||
| 730 | typedef __u64 v4l2_std_id; | ||
| 731 | |||
| 732 | /* one bit for each */ | ||
| 733 | #define V4L2_STD_PAL_B ((v4l2_std_id)0x00000001) | ||
| 734 | #define V4L2_STD_PAL_B1 ((v4l2_std_id)0x00000002) | ||
| 735 | #define V4L2_STD_PAL_G ((v4l2_std_id)0x00000004) | ||
| 736 | #define V4L2_STD_PAL_H ((v4l2_std_id)0x00000008) | ||
| 737 | #define V4L2_STD_PAL_I ((v4l2_std_id)0x00000010) | ||
| 738 | #define V4L2_STD_PAL_D ((v4l2_std_id)0x00000020) | ||
| 739 | #define V4L2_STD_PAL_D1 ((v4l2_std_id)0x00000040) | ||
| 740 | #define V4L2_STD_PAL_K ((v4l2_std_id)0x00000080) | ||
| 741 | |||
| 742 | #define V4L2_STD_PAL_M ((v4l2_std_id)0x00000100) | ||
| 743 | #define V4L2_STD_PAL_N ((v4l2_std_id)0x00000200) | ||
| 744 | #define V4L2_STD_PAL_Nc ((v4l2_std_id)0x00000400) | ||
| 745 | #define V4L2_STD_PAL_60 ((v4l2_std_id)0x00000800) | ||
| 746 | |||
| 747 | #define V4L2_STD_NTSC_M ((v4l2_std_id)0x00001000) | ||
| 748 | #define V4L2_STD_NTSC_M_JP ((v4l2_std_id)0x00002000) | ||
| 749 | #define V4L2_STD_NTSC_443 ((v4l2_std_id)0x00004000) | ||
| 750 | #define V4L2_STD_NTSC_M_KR ((v4l2_std_id)0x00008000) | ||
| 751 | |||
| 752 | #define V4L2_STD_SECAM_B ((v4l2_std_id)0x00010000) | ||
| 753 | #define V4L2_STD_SECAM_D ((v4l2_std_id)0x00020000) | ||
| 754 | #define V4L2_STD_SECAM_G ((v4l2_std_id)0x00040000) | ||
| 755 | #define V4L2_STD_SECAM_H ((v4l2_std_id)0x00080000) | ||
| 756 | #define V4L2_STD_SECAM_K ((v4l2_std_id)0x00100000) | ||
| 757 | #define V4L2_STD_SECAM_K1 ((v4l2_std_id)0x00200000) | ||
| 758 | #define V4L2_STD_SECAM_L ((v4l2_std_id)0x00400000) | ||
| 759 | #define V4L2_STD_SECAM_LC ((v4l2_std_id)0x00800000) | ||
| 760 | |||
| 761 | /* ATSC/HDTV */ | ||
| 762 | #define V4L2_STD_ATSC_8_VSB ((v4l2_std_id)0x01000000) | ||
| 763 | #define V4L2_STD_ATSC_16_VSB ((v4l2_std_id)0x02000000) | ||
| 764 | |||
| 765 | /* FIXME: | ||
| 766 | Although std_id is 64 bits, there is an issue on PPC32 architecture that | ||
| 767 | makes switch(__u64) to break. So, there's a hack on v4l2-common.c rounding | ||
| 768 | this value to 32 bits. | ||
| 769 | As, currently, the max value is for V4L2_STD_ATSC_16_VSB (30 bits wide), | ||
| 770 | it should work fine. However, if needed to add more than two standards, | ||
| 771 | v4l2-common.c should be fixed. | ||
| 772 | */ | ||
| 773 | |||
| 774 | /* some merged standards */ | ||
| 775 | #define V4L2_STD_MN (V4L2_STD_PAL_M|V4L2_STD_PAL_N|V4L2_STD_PAL_Nc|V4L2_STD_NTSC) | ||
| 776 | #define V4L2_STD_B (V4L2_STD_PAL_B|V4L2_STD_PAL_B1|V4L2_STD_SECAM_B) | ||
| 777 | #define V4L2_STD_GH (V4L2_STD_PAL_G|V4L2_STD_PAL_H|V4L2_STD_SECAM_G|V4L2_STD_SECAM_H) | ||
| 778 | #define V4L2_STD_DK (V4L2_STD_PAL_DK|V4L2_STD_SECAM_DK) | ||
| 779 | |||
| 780 | /* some common needed stuff */ | ||
| 781 | #define V4L2_STD_PAL_BG (V4L2_STD_PAL_B |\ | ||
| 782 | V4L2_STD_PAL_B1 |\ | ||
| 783 | V4L2_STD_PAL_G) | ||
| 784 | #define V4L2_STD_PAL_DK (V4L2_STD_PAL_D |\ | ||
| 785 | V4L2_STD_PAL_D1 |\ | ||
| 786 | V4L2_STD_PAL_K) | ||
| 787 | #define V4L2_STD_PAL (V4L2_STD_PAL_BG |\ | ||
| 788 | V4L2_STD_PAL_DK |\ | ||
| 789 | V4L2_STD_PAL_H |\ | ||
| 790 | V4L2_STD_PAL_I) | ||
| 791 | #define V4L2_STD_NTSC (V4L2_STD_NTSC_M |\ | ||
| 792 | V4L2_STD_NTSC_M_JP |\ | ||
| 793 | V4L2_STD_NTSC_M_KR) | ||
| 794 | #define V4L2_STD_SECAM_DK (V4L2_STD_SECAM_D |\ | ||
| 795 | V4L2_STD_SECAM_K |\ | ||
| 796 | V4L2_STD_SECAM_K1) | ||
| 797 | #define V4L2_STD_SECAM (V4L2_STD_SECAM_B |\ | ||
| 798 | V4L2_STD_SECAM_G |\ | ||
| 799 | V4L2_STD_SECAM_H |\ | ||
| 800 | V4L2_STD_SECAM_DK |\ | ||
| 801 | V4L2_STD_SECAM_L |\ | ||
| 802 | V4L2_STD_SECAM_LC) | ||
| 803 | |||
| 804 | #define V4L2_STD_525_60 (V4L2_STD_PAL_M |\ | ||
| 805 | V4L2_STD_PAL_60 |\ | ||
| 806 | V4L2_STD_NTSC |\ | ||
| 807 | V4L2_STD_NTSC_443) | ||
| 808 | #define V4L2_STD_625_50 (V4L2_STD_PAL |\ | ||
| 809 | V4L2_STD_PAL_N |\ | ||
| 810 | V4L2_STD_PAL_Nc |\ | ||
| 811 | V4L2_STD_SECAM) | ||
| 812 | #define V4L2_STD_ATSC (V4L2_STD_ATSC_8_VSB |\ | ||
| 813 | V4L2_STD_ATSC_16_VSB) | ||
| 814 | |||
| 815 | #define V4L2_STD_UNKNOWN 0 | ||
| 816 | #define V4L2_STD_ALL (V4L2_STD_525_60 |\ | ||
| 817 | V4L2_STD_625_50) | ||
| 818 | |||
| 819 | struct <link linkend="v4l2-standard">v4l2_standard</link> { | ||
| 820 | __u32 index; | ||
| 821 | v4l2_std_id id; | ||
| 822 | __u8 name[24]; | ||
| 823 | struct <link linkend="v4l2-fract">v4l2_fract</link> frameperiod; /* Frames, not fields */ | ||
| 824 | __u32 framelines; | ||
| 825 | __u32 reserved[4]; | ||
| 826 | }; | ||
| 827 | |||
| 828 | /* | ||
| 829 | * V I D E O T I M I N G S D V P R E S E T | ||
| 830 | */ | ||
| 831 | struct <link linkend="v4l2-dv-preset">v4l2_dv_preset</link> { | ||
| 832 | __u32 preset; | ||
| 833 | __u32 reserved[4]; | ||
| 834 | }; | ||
| 835 | |||
| 836 | /* | ||
| 837 | * D V P R E S E T S E N U M E R A T I O N | ||
| 838 | */ | ||
| 839 | struct <link linkend="v4l2-dv-enum-preset">v4l2_dv_enum_preset</link> { | ||
| 840 | __u32 index; | ||
| 841 | __u32 preset; | ||
| 842 | __u8 name[32]; /* Name of the preset timing */ | ||
| 843 | __u32 width; | ||
| 844 | __u32 height; | ||
| 845 | __u32 reserved[4]; | ||
| 846 | }; | ||
| 847 | |||
| 848 | /* | ||
| 849 | * D V P R E S E T V A L U E S | ||
| 850 | */ | ||
| 851 | #define V4L2_DV_INVALID 0 | ||
| 852 | #define V4L2_DV_480P59_94 1 /* BT.1362 */ | ||
| 853 | #define V4L2_DV_576P50 2 /* BT.1362 */ | ||
| 854 | #define V4L2_DV_720P24 3 /* SMPTE 296M */ | ||
| 855 | #define V4L2_DV_720P25 4 /* SMPTE 296M */ | ||
| 856 | #define V4L2_DV_720P30 5 /* SMPTE 296M */ | ||
| 857 | #define V4L2_DV_720P50 6 /* SMPTE 296M */ | ||
| 858 | #define V4L2_DV_720P59_94 7 /* SMPTE 274M */ | ||
| 859 | #define V4L2_DV_720P60 8 /* SMPTE 274M/296M */ | ||
| 860 | #define V4L2_DV_1080I29_97 9 /* BT.1120/ SMPTE 274M */ | ||
| 861 | #define V4L2_DV_1080I30 10 /* BT.1120/ SMPTE 274M */ | ||
| 862 | #define V4L2_DV_1080I25 11 /* BT.1120 */ | ||
| 863 | #define V4L2_DV_1080I50 12 /* SMPTE 296M */ | ||
| 864 | #define V4L2_DV_1080I60 13 /* SMPTE 296M */ | ||
| 865 | #define V4L2_DV_1080P24 14 /* SMPTE 296M */ | ||
| 866 | #define V4L2_DV_1080P25 15 /* SMPTE 296M */ | ||
| 867 | #define V4L2_DV_1080P30 16 /* SMPTE 296M */ | ||
| 868 | #define V4L2_DV_1080P50 17 /* BT.1120 */ | ||
| 869 | #define V4L2_DV_1080P60 18 /* BT.1120 */ | ||
| 870 | |||
| 871 | /* | ||
| 872 | * D V B T T I M I N G S | ||
| 873 | */ | ||
| 874 | |||
| 875 | /* BT.656/BT.1120 timing data */ | ||
| 876 | struct <link linkend="v4l2-bt-timings">v4l2_bt_timings</link> { | ||
| 877 | __u32 width; /* width in pixels */ | ||
| 878 | __u32 height; /* height in lines */ | ||
| 879 | __u32 interlaced; /* Interlaced or progressive */ | ||
| 880 | __u32 polarities; /* Positive or negative polarity */ | ||
| 881 | __u64 pixelclock; /* Pixel clock in HZ. Ex. 74.25MHz->74250000 */ | ||
| 882 | __u32 hfrontporch; /* Horizpontal front porch in pixels */ | ||
| 883 | __u32 hsync; /* Horizontal Sync length in pixels */ | ||
| 884 | __u32 hbackporch; /* Horizontal back porch in pixels */ | ||
| 885 | __u32 vfrontporch; /* Vertical front porch in pixels */ | ||
| 886 | __u32 vsync; /* Vertical Sync length in lines */ | ||
| 887 | __u32 vbackporch; /* Vertical back porch in lines */ | ||
| 888 | __u32 il_vfrontporch; /* Vertical front porch for bottom field of | ||
| 889 | * interlaced field formats | ||
| 890 | */ | ||
| 891 | __u32 il_vsync; /* Vertical sync length for bottom field of | ||
| 892 | * interlaced field formats | ||
| 893 | */ | ||
| 894 | __u32 il_vbackporch; /* Vertical back porch for bottom field of | ||
| 895 | * interlaced field formats | ||
| 896 | */ | ||
| 897 | __u32 reserved[16]; | ||
| 898 | } __attribute__ ((packed)); | ||
| 899 | |||
| 900 | /* Interlaced or progressive format */ | ||
| 901 | #define V4L2_DV_PROGRESSIVE 0 | ||
| 902 | #define V4L2_DV_INTERLACED 1 | ||
| 903 | |||
| 904 | /* Polarities. If bit is not set, it is assumed to be negative polarity */ | ||
| 905 | #define V4L2_DV_VSYNC_POS_POL 0x00000001 | ||
| 906 | #define V4L2_DV_HSYNC_POS_POL 0x00000002 | ||
| 907 | |||
| 908 | |||
| 909 | /* DV timings */ | ||
| 910 | struct <link linkend="v4l2-dv-timings">v4l2_dv_timings</link> { | ||
| 911 | __u32 type; | ||
| 912 | union { | ||
| 913 | struct <link linkend="v4l2-bt-timings">v4l2_bt_timings</link> bt; | ||
| 914 | __u32 reserved[32]; | ||
| 915 | }; | ||
| 916 | } __attribute__ ((packed)); | ||
| 917 | |||
| 918 | /* Values for the type field */ | ||
| 919 | #define V4L2_DV_BT_656_1120 0 /* BT.656/1120 timing type */ | ||
| 920 | |||
| 921 | /* | ||
| 922 | * V I D E O I N P U T S | ||
| 923 | */ | ||
| 924 | struct <link linkend="v4l2-input">v4l2_input</link> { | ||
| 925 | __u32 index; /* Which input */ | ||
| 926 | __u8 name[32]; /* Label */ | ||
| 927 | __u32 type; /* Type of input */ | ||
| 928 | __u32 audioset; /* Associated audios (bitfield) */ | ||
| 929 | __u32 tuner; /* Associated tuner */ | ||
| 930 | v4l2_std_id std; | ||
| 931 | __u32 status; | ||
| 932 | __u32 capabilities; | ||
| 933 | __u32 reserved[3]; | ||
| 934 | }; | ||
| 935 | |||
| 936 | /* Values for the 'type' field */ | ||
| 937 | #define V4L2_INPUT_TYPE_TUNER 1 | ||
| 938 | #define V4L2_INPUT_TYPE_CAMERA 2 | ||
| 939 | |||
| 940 | /* field 'status' - general */ | ||
| 941 | #define V4L2_IN_ST_NO_POWER 0x00000001 /* Attached device is off */ | ||
| 942 | #define V4L2_IN_ST_NO_SIGNAL 0x00000002 | ||
| 943 | #define V4L2_IN_ST_NO_COLOR 0x00000004 | ||
| 944 | |||
| 945 | /* field 'status' - sensor orientation */ | ||
| 946 | /* If sensor is mounted upside down set both bits */ | ||
| 947 | #define V4L2_IN_ST_HFLIP 0x00000010 /* Frames are flipped horizontally */ | ||
| 948 | #define V4L2_IN_ST_VFLIP 0x00000020 /* Frames are flipped vertically */ | ||
| 949 | |||
| 950 | /* field 'status' - analog */ | ||
| 951 | #define V4L2_IN_ST_NO_H_LOCK 0x00000100 /* No horizontal sync lock */ | ||
| 952 | #define V4L2_IN_ST_COLOR_KILL 0x00000200 /* Color killer is active */ | ||
| 953 | |||
| 954 | /* field 'status' - digital */ | ||
| 955 | #define V4L2_IN_ST_NO_SYNC 0x00010000 /* No synchronization lock */ | ||
| 956 | #define V4L2_IN_ST_NO_EQU 0x00020000 /* No equalizer lock */ | ||
| 957 | #define V4L2_IN_ST_NO_CARRIER 0x00040000 /* Carrier recovery failed */ | ||
| 958 | |||
| 959 | /* field 'status' - VCR and set-top box */ | ||
| 960 | #define V4L2_IN_ST_MACROVISION 0x01000000 /* Macrovision detected */ | ||
| 961 | #define V4L2_IN_ST_NO_ACCESS 0x02000000 /* Conditional access denied */ | ||
| 962 | #define V4L2_IN_ST_VTR 0x04000000 /* VTR time constant */ | ||
| 963 | |||
| 964 | /* capabilities flags */ | ||
| 965 | #define V4L2_IN_CAP_PRESETS 0x00000001 /* Supports S_DV_PRESET */ | ||
| 966 | #define V4L2_IN_CAP_CUSTOM_TIMINGS 0x00000002 /* Supports S_DV_TIMINGS */ | ||
| 967 | #define V4L2_IN_CAP_STD 0x00000004 /* Supports S_STD */ | ||
| 968 | |||
| 969 | /* | ||
| 970 | * V I D E O O U T P U T S | ||
| 971 | */ | ||
| 972 | struct <link linkend="v4l2-output">v4l2_output</link> { | ||
| 973 | __u32 index; /* Which output */ | ||
| 974 | __u8 name[32]; /* Label */ | ||
| 975 | __u32 type; /* Type of output */ | ||
| 976 | __u32 audioset; /* Associated audios (bitfield) */ | ||
| 977 | __u32 modulator; /* Associated modulator */ | ||
| 978 | v4l2_std_id std; | ||
| 979 | __u32 capabilities; | ||
| 980 | __u32 reserved[3]; | ||
| 981 | }; | ||
| 982 | /* Values for the 'type' field */ | ||
| 983 | #define V4L2_OUTPUT_TYPE_MODULATOR 1 | ||
| 984 | #define V4L2_OUTPUT_TYPE_ANALOG 2 | ||
| 985 | #define V4L2_OUTPUT_TYPE_ANALOGVGAOVERLAY 3 | ||
| 986 | |||
| 987 | /* capabilities flags */ | ||
| 988 | #define V4L2_OUT_CAP_PRESETS 0x00000001 /* Supports S_DV_PRESET */ | ||
| 989 | #define V4L2_OUT_CAP_CUSTOM_TIMINGS 0x00000002 /* Supports S_DV_TIMINGS */ | ||
| 990 | #define V4L2_OUT_CAP_STD 0x00000004 /* Supports S_STD */ | ||
| 991 | |||
| 992 | /* | ||
| 993 | * C O N T R O L S | ||
| 994 | */ | ||
| 995 | struct <link linkend="v4l2-control">v4l2_control</link> { | ||
| 996 | __u32 id; | ||
| 997 | __s32 value; | ||
| 998 | }; | ||
| 999 | |||
| 1000 | struct <link linkend="v4l2-ext-control">v4l2_ext_control</link> { | ||
| 1001 | __u32 id; | ||
| 1002 | __u32 size; | ||
| 1003 | __u32 reserved2[1]; | ||
| 1004 | union { | ||
| 1005 | __s32 value; | ||
| 1006 | __s64 value64; | ||
| 1007 | char *string; | ||
| 1008 | }; | ||
| 1009 | } __attribute__ ((packed)); | ||
| 1010 | |||
| 1011 | struct <link linkend="v4l2-ext-controls">v4l2_ext_controls</link> { | ||
| 1012 | __u32 ctrl_class; | ||
| 1013 | __u32 count; | ||
| 1014 | __u32 error_idx; | ||
| 1015 | __u32 reserved[2]; | ||
| 1016 | struct <link linkend="v4l2-ext-control">v4l2_ext_control</link> *controls; | ||
| 1017 | }; | ||
| 1018 | |||
| 1019 | /* Values for ctrl_class field */ | ||
| 1020 | #define V4L2_CTRL_CLASS_USER 0x00980000 /* Old-style 'user' controls */ | ||
| 1021 | #define V4L2_CTRL_CLASS_MPEG 0x00990000 /* MPEG-compression controls */ | ||
| 1022 | #define V4L2_CTRL_CLASS_CAMERA 0x009a0000 /* Camera class controls */ | ||
| 1023 | #define V4L2_CTRL_CLASS_FM_TX 0x009b0000 /* FM Modulator control class */ | ||
| 1024 | |||
| 1025 | #define V4L2_CTRL_ID_MASK (0x0fffffff) | ||
| 1026 | #define V4L2_CTRL_ID2CLASS(id) ((id) & 0x0fff0000UL) | ||
| 1027 | #define V4L2_CTRL_DRIVER_PRIV(id) (((id) & 0xffff) >= 0x1000) | ||
| 1028 | |||
| 1029 | enum <link linkend="v4l2-ctrl-type">v4l2_ctrl_type</link> { | ||
| 1030 | V4L2_CTRL_TYPE_INTEGER = 1, | ||
| 1031 | V4L2_CTRL_TYPE_BOOLEAN = 2, | ||
| 1032 | V4L2_CTRL_TYPE_MENU = 3, | ||
| 1033 | V4L2_CTRL_TYPE_BUTTON = 4, | ||
| 1034 | V4L2_CTRL_TYPE_INTEGER64 = 5, | ||
| 1035 | V4L2_CTRL_TYPE_CTRL_CLASS = 6, | ||
| 1036 | V4L2_CTRL_TYPE_STRING = 7, | ||
| 1037 | }; | ||
| 1038 | |||
| 1039 | /* Used in the VIDIOC_QUERYCTRL ioctl for querying controls */ | ||
| 1040 | struct <link linkend="v4l2-queryctrl">v4l2_queryctrl</link> { | ||
| 1041 | __u32 id; | ||
| 1042 | enum <link linkend="v4l2-ctrl-type">v4l2_ctrl_type</link> type; | ||
| 1043 | __u8 name[32]; /* Whatever */ | ||
| 1044 | __s32 minimum; /* Note signedness */ | ||
| 1045 | __s32 maximum; | ||
| 1046 | __s32 step; | ||
| 1047 | __s32 default_value; | ||
| 1048 | __u32 flags; | ||
| 1049 | __u32 reserved[2]; | ||
| 1050 | }; | ||
| 1051 | |||
| 1052 | /* Used in the VIDIOC_QUERYMENU ioctl for querying menu items */ | ||
| 1053 | struct <link linkend="v4l2-querymenu">v4l2_querymenu</link> { | ||
| 1054 | __u32 id; | ||
| 1055 | __u32 index; | ||
| 1056 | __u8 name[32]; /* Whatever */ | ||
| 1057 | __u32 reserved; | ||
| 1058 | }; | ||
| 1059 | |||
| 1060 | /* Control flags */ | ||
| 1061 | #define V4L2_CTRL_FLAG_DISABLED 0x0001 | ||
| 1062 | #define V4L2_CTRL_FLAG_GRABBED 0x0002 | ||
| 1063 | #define V4L2_CTRL_FLAG_READ_ONLY 0x0004 | ||
| 1064 | #define V4L2_CTRL_FLAG_UPDATE 0x0008 | ||
| 1065 | #define V4L2_CTRL_FLAG_INACTIVE 0x0010 | ||
| 1066 | #define V4L2_CTRL_FLAG_SLIDER 0x0020 | ||
| 1067 | #define V4L2_CTRL_FLAG_WRITE_ONLY 0x0040 | ||
| 1068 | |||
| 1069 | /* Query flag, to be ORed with the control ID */ | ||
| 1070 | #define V4L2_CTRL_FLAG_NEXT_CTRL 0x80000000 | ||
| 1071 | |||
| 1072 | /* User-class control IDs defined by V4L2 */ | ||
| 1073 | #define V4L2_CID_BASE (V4L2_CTRL_CLASS_USER | 0x900) | ||
| 1074 | #define V4L2_CID_USER_BASE V4L2_CID_BASE | ||
| 1075 | /* IDs reserved for driver specific controls */ | ||
| 1076 | #define V4L2_CID_PRIVATE_BASE 0x08000000 | ||
| 1077 | |||
| 1078 | #define V4L2_CID_USER_CLASS (V4L2_CTRL_CLASS_USER | 1) | ||
| 1079 | #define V4L2_CID_BRIGHTNESS (V4L2_CID_BASE+0) | ||
| 1080 | #define V4L2_CID_CONTRAST (V4L2_CID_BASE+1) | ||
| 1081 | #define V4L2_CID_SATURATION (V4L2_CID_BASE+2) | ||
| 1082 | #define V4L2_CID_HUE (V4L2_CID_BASE+3) | ||
| 1083 | #define V4L2_CID_AUDIO_VOLUME (V4L2_CID_BASE+5) | ||
| 1084 | #define V4L2_CID_AUDIO_BALANCE (V4L2_CID_BASE+6) | ||
| 1085 | #define V4L2_CID_AUDIO_BASS (V4L2_CID_BASE+7) | ||
| 1086 | #define V4L2_CID_AUDIO_TREBLE (V4L2_CID_BASE+8) | ||
| 1087 | #define V4L2_CID_AUDIO_MUTE (V4L2_CID_BASE+9) | ||
| 1088 | #define V4L2_CID_AUDIO_LOUDNESS (V4L2_CID_BASE+10) | ||
| 1089 | #define V4L2_CID_BLACK_LEVEL (V4L2_CID_BASE+11) /* Deprecated */ | ||
| 1090 | #define V4L2_CID_AUTO_WHITE_BALANCE (V4L2_CID_BASE+12) | ||
| 1091 | #define V4L2_CID_DO_WHITE_BALANCE (V4L2_CID_BASE+13) | ||
| 1092 | #define V4L2_CID_RED_BALANCE (V4L2_CID_BASE+14) | ||
| 1093 | #define V4L2_CID_BLUE_BALANCE (V4L2_CID_BASE+15) | ||
| 1094 | #define V4L2_CID_GAMMA (V4L2_CID_BASE+16) | ||
| 1095 | #define V4L2_CID_WHITENESS (V4L2_CID_GAMMA) /* Deprecated */ | ||
| 1096 | #define V4L2_CID_EXPOSURE (V4L2_CID_BASE+17) | ||
| 1097 | #define V4L2_CID_AUTOGAIN (V4L2_CID_BASE+18) | ||
| 1098 | #define V4L2_CID_GAIN (V4L2_CID_BASE+19) | ||
| 1099 | #define V4L2_CID_HFLIP (V4L2_CID_BASE+20) | ||
| 1100 | #define V4L2_CID_VFLIP (V4L2_CID_BASE+21) | ||
| 1101 | |||
| 1102 | /* Deprecated; use V4L2_CID_PAN_RESET and V4L2_CID_TILT_RESET */ | ||
| 1103 | #define V4L2_CID_HCENTER (V4L2_CID_BASE+22) | ||
| 1104 | #define V4L2_CID_VCENTER (V4L2_CID_BASE+23) | ||
| 1105 | |||
| 1106 | #define V4L2_CID_POWER_LINE_FREQUENCY (V4L2_CID_BASE+24) | ||
| 1107 | enum <link linkend="v4l2-power-line-frequency">v4l2_power_line_frequency</link> { | ||
| 1108 | V4L2_CID_POWER_LINE_FREQUENCY_DISABLED = 0, | ||
| 1109 | V4L2_CID_POWER_LINE_FREQUENCY_50HZ = 1, | ||
| 1110 | V4L2_CID_POWER_LINE_FREQUENCY_60HZ = 2, | ||
| 1111 | }; | ||
| 1112 | #define V4L2_CID_HUE_AUTO (V4L2_CID_BASE+25) | ||
| 1113 | #define V4L2_CID_WHITE_BALANCE_TEMPERATURE (V4L2_CID_BASE+26) | ||
| 1114 | #define V4L2_CID_SHARPNESS (V4L2_CID_BASE+27) | ||
| 1115 | #define V4L2_CID_BACKLIGHT_COMPENSATION (V4L2_CID_BASE+28) | ||
| 1116 | #define V4L2_CID_CHROMA_AGC (V4L2_CID_BASE+29) | ||
| 1117 | #define V4L2_CID_COLOR_KILLER (V4L2_CID_BASE+30) | ||
| 1118 | #define V4L2_CID_COLORFX (V4L2_CID_BASE+31) | ||
| 1119 | enum <link linkend="v4l2-colorfx">v4l2_colorfx</link> { | ||
| 1120 | V4L2_COLORFX_NONE = 0, | ||
| 1121 | V4L2_COLORFX_BW = 1, | ||
| 1122 | V4L2_COLORFX_SEPIA = 2, | ||
| 1123 | V4L2_COLORFX_NEGATIVE = 3, | ||
| 1124 | V4L2_COLORFX_EMBOSS = 4, | ||
| 1125 | V4L2_COLORFX_SKETCH = 5, | ||
| 1126 | V4L2_COLORFX_SKY_BLUE = 6, | ||
| 1127 | V4L2_COLORFX_GRASS_GREEN = 7, | ||
| 1128 | V4L2_COLORFX_SKIN_WHITEN = 8, | ||
| 1129 | V4L2_COLORFX_VIVID = 9, | ||
| 1130 | }; | ||
| 1131 | #define V4L2_CID_AUTOBRIGHTNESS (V4L2_CID_BASE+32) | ||
| 1132 | #define V4L2_CID_BAND_STOP_FILTER (V4L2_CID_BASE+33) | ||
| 1133 | |||
| 1134 | #define V4L2_CID_ROTATE (V4L2_CID_BASE+34) | ||
| 1135 | #define V4L2_CID_BG_COLOR (V4L2_CID_BASE+35) | ||
| 1136 | |||
| 1137 | #define V4L2_CID_CHROMA_GAIN (V4L2_CID_BASE+36) | ||
| 1138 | |||
| 1139 | #define V4L2_CID_ILLUMINATORS_1 (V4L2_CID_BASE+37) | ||
| 1140 | #define V4L2_CID_ILLUMINATORS_2 (V4L2_CID_BASE+38) | ||
| 1141 | |||
| 1142 | /* last CID + 1 */ | ||
| 1143 | #define V4L2_CID_LASTP1 (V4L2_CID_BASE+39) | ||
| 1144 | |||
| 1145 | /* MPEG-class control IDs defined by V4L2 */ | ||
| 1146 | #define V4L2_CID_MPEG_BASE (V4L2_CTRL_CLASS_MPEG | 0x900) | ||
| 1147 | #define V4L2_CID_MPEG_CLASS (V4L2_CTRL_CLASS_MPEG | 1) | ||
| 1148 | |||
| 1149 | /* MPEG streams */ | ||
| 1150 | #define V4L2_CID_MPEG_STREAM_TYPE (V4L2_CID_MPEG_BASE+0) | ||
| 1151 | enum <link linkend="v4l2-mpeg-stream-type">v4l2_mpeg_stream_type</link> { | ||
| 1152 | V4L2_MPEG_STREAM_TYPE_MPEG2_PS = 0, /* MPEG-2 program stream */ | ||
| 1153 | V4L2_MPEG_STREAM_TYPE_MPEG2_TS = 1, /* MPEG-2 transport stream */ | ||
| 1154 | V4L2_MPEG_STREAM_TYPE_MPEG1_SS = 2, /* MPEG-1 system stream */ | ||
| 1155 | V4L2_MPEG_STREAM_TYPE_MPEG2_DVD = 3, /* MPEG-2 DVD-compatible stream */ | ||
| 1156 | V4L2_MPEG_STREAM_TYPE_MPEG1_VCD = 4, /* MPEG-1 VCD-compatible stream */ | ||
| 1157 | V4L2_MPEG_STREAM_TYPE_MPEG2_SVCD = 5, /* MPEG-2 SVCD-compatible stream */ | ||
| 1158 | }; | ||
| 1159 | #define V4L2_CID_MPEG_STREAM_PID_PMT (V4L2_CID_MPEG_BASE+1) | ||
| 1160 | #define V4L2_CID_MPEG_STREAM_PID_AUDIO (V4L2_CID_MPEG_BASE+2) | ||
| 1161 | #define V4L2_CID_MPEG_STREAM_PID_VIDEO (V4L2_CID_MPEG_BASE+3) | ||
| 1162 | #define V4L2_CID_MPEG_STREAM_PID_PCR (V4L2_CID_MPEG_BASE+4) | ||
| 1163 | #define V4L2_CID_MPEG_STREAM_PES_ID_AUDIO (V4L2_CID_MPEG_BASE+5) | ||
| 1164 | #define V4L2_CID_MPEG_STREAM_PES_ID_VIDEO (V4L2_CID_MPEG_BASE+6) | ||
| 1165 | #define V4L2_CID_MPEG_STREAM_VBI_FMT (V4L2_CID_MPEG_BASE+7) | ||
| 1166 | enum <link linkend="v4l2-mpeg-stream-vbi-fmt">v4l2_mpeg_stream_vbi_fmt</link> { | ||
| 1167 | V4L2_MPEG_STREAM_VBI_FMT_NONE = 0, /* No VBI in the MPEG stream */ | ||
| 1168 | V4L2_MPEG_STREAM_VBI_FMT_IVTV = 1, /* VBI in private packets, IVTV format */ | ||
| 1169 | }; | ||
| 1170 | |||
| 1171 | /* MPEG audio */ | ||
| 1172 | #define V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ (V4L2_CID_MPEG_BASE+100) | ||
| 1173 | enum <link linkend="v4l2-mpeg-audio-sampling-freq">v4l2_mpeg_audio_sampling_freq</link> { | ||
| 1174 | V4L2_MPEG_AUDIO_SAMPLING_FREQ_44100 = 0, | ||
| 1175 | V4L2_MPEG_AUDIO_SAMPLING_FREQ_48000 = 1, | ||
| 1176 | V4L2_MPEG_AUDIO_SAMPLING_FREQ_32000 = 2, | ||
| 1177 | }; | ||
| 1178 | #define V4L2_CID_MPEG_AUDIO_ENCODING (V4L2_CID_MPEG_BASE+101) | ||
| 1179 | enum <link linkend="v4l2-mpeg-audio-encoding">v4l2_mpeg_audio_encoding</link> { | ||
| 1180 | V4L2_MPEG_AUDIO_ENCODING_LAYER_1 = 0, | ||
| 1181 | V4L2_MPEG_AUDIO_ENCODING_LAYER_2 = 1, | ||
| 1182 | V4L2_MPEG_AUDIO_ENCODING_LAYER_3 = 2, | ||
| 1183 | V4L2_MPEG_AUDIO_ENCODING_AAC = 3, | ||
| 1184 | V4L2_MPEG_AUDIO_ENCODING_AC3 = 4, | ||
| 1185 | }; | ||
| 1186 | #define V4L2_CID_MPEG_AUDIO_L1_BITRATE (V4L2_CID_MPEG_BASE+102) | ||
| 1187 | enum <link linkend="v4l2-mpeg-audio-l1-bitrate">v4l2_mpeg_audio_l1_bitrate</link> { | ||
| 1188 | V4L2_MPEG_AUDIO_L1_BITRATE_32K = 0, | ||
| 1189 | V4L2_MPEG_AUDIO_L1_BITRATE_64K = 1, | ||
| 1190 | V4L2_MPEG_AUDIO_L1_BITRATE_96K = 2, | ||
| 1191 | V4L2_MPEG_AUDIO_L1_BITRATE_128K = 3, | ||
| 1192 | V4L2_MPEG_AUDIO_L1_BITRATE_160K = 4, | ||
| 1193 | V4L2_MPEG_AUDIO_L1_BITRATE_192K = 5, | ||
| 1194 | V4L2_MPEG_AUDIO_L1_BITRATE_224K = 6, | ||
| 1195 | V4L2_MPEG_AUDIO_L1_BITRATE_256K = 7, | ||
| 1196 | V4L2_MPEG_AUDIO_L1_BITRATE_288K = 8, | ||
| 1197 | V4L2_MPEG_AUDIO_L1_BITRATE_320K = 9, | ||
| 1198 | V4L2_MPEG_AUDIO_L1_BITRATE_352K = 10, | ||
| 1199 | V4L2_MPEG_AUDIO_L1_BITRATE_384K = 11, | ||
| 1200 | V4L2_MPEG_AUDIO_L1_BITRATE_416K = 12, | ||
| 1201 | V4L2_MPEG_AUDIO_L1_BITRATE_448K = 13, | ||
| 1202 | }; | ||
| 1203 | #define V4L2_CID_MPEG_AUDIO_L2_BITRATE (V4L2_CID_MPEG_BASE+103) | ||
| 1204 | enum <link linkend="v4l2-mpeg-audio-l2-bitrate">v4l2_mpeg_audio_l2_bitrate</link> { | ||
| 1205 | V4L2_MPEG_AUDIO_L2_BITRATE_32K = 0, | ||
| 1206 | V4L2_MPEG_AUDIO_L2_BITRATE_48K = 1, | ||
| 1207 | V4L2_MPEG_AUDIO_L2_BITRATE_56K = 2, | ||
| 1208 | V4L2_MPEG_AUDIO_L2_BITRATE_64K = 3, | ||
| 1209 | V4L2_MPEG_AUDIO_L2_BITRATE_80K = 4, | ||
| 1210 | V4L2_MPEG_AUDIO_L2_BITRATE_96K = 5, | ||
| 1211 | V4L2_MPEG_AUDIO_L2_BITRATE_112K = 6, | ||
| 1212 | V4L2_MPEG_AUDIO_L2_BITRATE_128K = 7, | ||
| 1213 | V4L2_MPEG_AUDIO_L2_BITRATE_160K = 8, | ||
| 1214 | V4L2_MPEG_AUDIO_L2_BITRATE_192K = 9, | ||
| 1215 | V4L2_MPEG_AUDIO_L2_BITRATE_224K = 10, | ||
| 1216 | V4L2_MPEG_AUDIO_L2_BITRATE_256K = 11, | ||
| 1217 | V4L2_MPEG_AUDIO_L2_BITRATE_320K = 12, | ||
| 1218 | V4L2_MPEG_AUDIO_L2_BITRATE_384K = 13, | ||
| 1219 | }; | ||
| 1220 | #define V4L2_CID_MPEG_AUDIO_L3_BITRATE (V4L2_CID_MPEG_BASE+104) | ||
| 1221 | enum <link linkend="v4l2-mpeg-audio-l3-bitrate">v4l2_mpeg_audio_l3_bitrate</link> { | ||
| 1222 | V4L2_MPEG_AUDIO_L3_BITRATE_32K = 0, | ||
| 1223 | V4L2_MPEG_AUDIO_L3_BITRATE_40K = 1, | ||
| 1224 | V4L2_MPEG_AUDIO_L3_BITRATE_48K = 2, | ||
| 1225 | V4L2_MPEG_AUDIO_L3_BITRATE_56K = 3, | ||
| 1226 | V4L2_MPEG_AUDIO_L3_BITRATE_64K = 4, | ||
| 1227 | V4L2_MPEG_AUDIO_L3_BITRATE_80K = 5, | ||
| 1228 | V4L2_MPEG_AUDIO_L3_BITRATE_96K = 6, | ||
| 1229 | V4L2_MPEG_AUDIO_L3_BITRATE_112K = 7, | ||
| 1230 | V4L2_MPEG_AUDIO_L3_BITRATE_128K = 8, | ||
| 1231 | V4L2_MPEG_AUDIO_L3_BITRATE_160K = 9, | ||
| 1232 | V4L2_MPEG_AUDIO_L3_BITRATE_192K = 10, | ||
| 1233 | V4L2_MPEG_AUDIO_L3_BITRATE_224K = 11, | ||
| 1234 | V4L2_MPEG_AUDIO_L3_BITRATE_256K = 12, | ||
| 1235 | V4L2_MPEG_AUDIO_L3_BITRATE_320K = 13, | ||
| 1236 | }; | ||
| 1237 | #define V4L2_CID_MPEG_AUDIO_MODE (V4L2_CID_MPEG_BASE+105) | ||
| 1238 | enum <link linkend="v4l2-mpeg-audio-mode">v4l2_mpeg_audio_mode</link> { | ||
| 1239 | V4L2_MPEG_AUDIO_MODE_STEREO = 0, | ||
| 1240 | V4L2_MPEG_AUDIO_MODE_JOINT_STEREO = 1, | ||
| 1241 | V4L2_MPEG_AUDIO_MODE_DUAL = 2, | ||
| 1242 | V4L2_MPEG_AUDIO_MODE_MONO = 3, | ||
| 1243 | }; | ||
| 1244 | #define V4L2_CID_MPEG_AUDIO_MODE_EXTENSION (V4L2_CID_MPEG_BASE+106) | ||
| 1245 | enum <link linkend="v4l2-mpeg-audio-mode-extension">v4l2_mpeg_audio_mode_extension</link> { | ||
| 1246 | V4L2_MPEG_AUDIO_MODE_EXTENSION_BOUND_4 = 0, | ||
| 1247 | V4L2_MPEG_AUDIO_MODE_EXTENSION_BOUND_8 = 1, | ||
| 1248 | V4L2_MPEG_AUDIO_MODE_EXTENSION_BOUND_12 = 2, | ||
| 1249 | V4L2_MPEG_AUDIO_MODE_EXTENSION_BOUND_16 = 3, | ||
| 1250 | }; | ||
| 1251 | #define V4L2_CID_MPEG_AUDIO_EMPHASIS (V4L2_CID_MPEG_BASE+107) | ||
| 1252 | enum <link linkend="v4l2-mpeg-audio-emphasis">v4l2_mpeg_audio_emphasis</link> { | ||
| 1253 | V4L2_MPEG_AUDIO_EMPHASIS_NONE = 0, | ||
| 1254 | V4L2_MPEG_AUDIO_EMPHASIS_50_DIV_15_uS = 1, | ||
| 1255 | V4L2_MPEG_AUDIO_EMPHASIS_CCITT_J17 = 2, | ||
| 1256 | }; | ||
| 1257 | #define V4L2_CID_MPEG_AUDIO_CRC (V4L2_CID_MPEG_BASE+108) | ||
| 1258 | enum <link linkend="v4l2-mpeg-audio-crc">v4l2_mpeg_audio_crc</link> { | ||
| 1259 | V4L2_MPEG_AUDIO_CRC_NONE = 0, | ||
| 1260 | V4L2_MPEG_AUDIO_CRC_CRC16 = 1, | ||
| 1261 | }; | ||
| 1262 | #define V4L2_CID_MPEG_AUDIO_MUTE (V4L2_CID_MPEG_BASE+109) | ||
| 1263 | #define V4L2_CID_MPEG_AUDIO_AAC_BITRATE (V4L2_CID_MPEG_BASE+110) | ||
| 1264 | #define V4L2_CID_MPEG_AUDIO_AC3_BITRATE (V4L2_CID_MPEG_BASE+111) | ||
| 1265 | enum <link linkend="v4l2-mpeg-audio-ac3-bitrate">v4l2_mpeg_audio_ac3_bitrate</link> { | ||
| 1266 | V4L2_MPEG_AUDIO_AC3_BITRATE_32K = 0, | ||
| 1267 | V4L2_MPEG_AUDIO_AC3_BITRATE_40K = 1, | ||
| 1268 | V4L2_MPEG_AUDIO_AC3_BITRATE_48K = 2, | ||
| 1269 | V4L2_MPEG_AUDIO_AC3_BITRATE_56K = 3, | ||
| 1270 | V4L2_MPEG_AUDIO_AC3_BITRATE_64K = 4, | ||
| 1271 | V4L2_MPEG_AUDIO_AC3_BITRATE_80K = 5, | ||
| 1272 | V4L2_MPEG_AUDIO_AC3_BITRATE_96K = 6, | ||
| 1273 | V4L2_MPEG_AUDIO_AC3_BITRATE_112K = 7, | ||
| 1274 | V4L2_MPEG_AUDIO_AC3_BITRATE_128K = 8, | ||
| 1275 | V4L2_MPEG_AUDIO_AC3_BITRATE_160K = 9, | ||
| 1276 | V4L2_MPEG_AUDIO_AC3_BITRATE_192K = 10, | ||
| 1277 | V4L2_MPEG_AUDIO_AC3_BITRATE_224K = 11, | ||
| 1278 | V4L2_MPEG_AUDIO_AC3_BITRATE_256K = 12, | ||
| 1279 | V4L2_MPEG_AUDIO_AC3_BITRATE_320K = 13, | ||
| 1280 | V4L2_MPEG_AUDIO_AC3_BITRATE_384K = 14, | ||
| 1281 | V4L2_MPEG_AUDIO_AC3_BITRATE_448K = 15, | ||
| 1282 | V4L2_MPEG_AUDIO_AC3_BITRATE_512K = 16, | ||
| 1283 | V4L2_MPEG_AUDIO_AC3_BITRATE_576K = 17, | ||
| 1284 | V4L2_MPEG_AUDIO_AC3_BITRATE_640K = 18, | ||
| 1285 | }; | ||
| 1286 | |||
| 1287 | /* MPEG video */ | ||
| 1288 | #define V4L2_CID_MPEG_VIDEO_ENCODING (V4L2_CID_MPEG_BASE+200) | ||
| 1289 | enum <link linkend="v4l2-mpeg-video-encoding">v4l2_mpeg_video_encoding</link> { | ||
| 1290 | V4L2_MPEG_VIDEO_ENCODING_MPEG_1 = 0, | ||
| 1291 | V4L2_MPEG_VIDEO_ENCODING_MPEG_2 = 1, | ||
| 1292 | V4L2_MPEG_VIDEO_ENCODING_MPEG_4_AVC = 2, | ||
| 1293 | }; | ||
| 1294 | #define V4L2_CID_MPEG_VIDEO_ASPECT (V4L2_CID_MPEG_BASE+201) | ||
| 1295 | enum <link linkend="v4l2-mpeg-video-aspect">v4l2_mpeg_video_aspect</link> { | ||
| 1296 | V4L2_MPEG_VIDEO_ASPECT_1x1 = 0, | ||
| 1297 | V4L2_MPEG_VIDEO_ASPECT_4x3 = 1, | ||
| 1298 | V4L2_MPEG_VIDEO_ASPECT_16x9 = 2, | ||
| 1299 | V4L2_MPEG_VIDEO_ASPECT_221x100 = 3, | ||
| 1300 | }; | ||
| 1301 | #define V4L2_CID_MPEG_VIDEO_B_FRAMES (V4L2_CID_MPEG_BASE+202) | ||
| 1302 | #define V4L2_CID_MPEG_VIDEO_GOP_SIZE (V4L2_CID_MPEG_BASE+203) | ||
| 1303 | #define V4L2_CID_MPEG_VIDEO_GOP_CLOSURE (V4L2_CID_MPEG_BASE+204) | ||
| 1304 | #define V4L2_CID_MPEG_VIDEO_PULLDOWN (V4L2_CID_MPEG_BASE+205) | ||
| 1305 | #define V4L2_CID_MPEG_VIDEO_BITRATE_MODE (V4L2_CID_MPEG_BASE+206) | ||
| 1306 | enum <link linkend="v4l2-mpeg-video-bitrate-mode">v4l2_mpeg_video_bitrate_mode</link> { | ||
| 1307 | V4L2_MPEG_VIDEO_BITRATE_MODE_VBR = 0, | ||
| 1308 | V4L2_MPEG_VIDEO_BITRATE_MODE_CBR = 1, | ||
| 1309 | }; | ||
| 1310 | #define V4L2_CID_MPEG_VIDEO_BITRATE (V4L2_CID_MPEG_BASE+207) | ||
| 1311 | #define V4L2_CID_MPEG_VIDEO_BITRATE_PEAK (V4L2_CID_MPEG_BASE+208) | ||
| 1312 | #define V4L2_CID_MPEG_VIDEO_TEMPORAL_DECIMATION (V4L2_CID_MPEG_BASE+209) | ||
| 1313 | #define V4L2_CID_MPEG_VIDEO_MUTE (V4L2_CID_MPEG_BASE+210) | ||
| 1314 | #define V4L2_CID_MPEG_VIDEO_MUTE_YUV (V4L2_CID_MPEG_BASE+211) | ||
| 1315 | |||
| 1316 | /* MPEG-class control IDs specific to the CX2341x driver as defined by V4L2 */ | ||
| 1317 | #define V4L2_CID_MPEG_CX2341X_BASE (V4L2_CTRL_CLASS_MPEG | 0x1000) | ||
| 1318 | #define V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE (V4L2_CID_MPEG_CX2341X_BASE+0) | ||
| 1319 | enum <link linkend="v4l2-mpeg-cx2341x-video-spatial-filter-mode">v4l2_mpeg_cx2341x_video_spatial_filter_mode</link> { | ||
| 1320 | V4L2_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE_MANUAL = 0, | ||
| 1321 | V4L2_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE_AUTO = 1, | ||
| 1322 | }; | ||
| 1323 | #define V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER (V4L2_CID_MPEG_CX2341X_BASE+1) | ||
| 1324 | #define V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE (V4L2_CID_MPEG_CX2341X_BASE+2) | ||
| 1325 | enum <link linkend="luma-spatial-filter-type">v4l2_mpeg_cx2341x_video_luma_spatial_filter_type</link> { | ||
| 1326 | V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_OFF = 0, | ||
| 1327 | V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_1D_HOR = 1, | ||
| 1328 | V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_1D_VERT = 2, | ||
| 1329 | V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_2D_HV_SEPARABLE = 3, | ||
| 1330 | V4L2_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE_2D_SYM_NON_SEPARABLE = 4, | ||
| 1331 | }; | ||
| 1332 | #define V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_SPATIAL_FILTER_TYPE (V4L2_CID_MPEG_CX2341X_BASE+3) | ||
| 1333 | enum <link linkend="chroma-spatial-filter-type">v4l2_mpeg_cx2341x_video_chroma_spatial_filter_type</link> { | ||
| 1334 | V4L2_MPEG_CX2341X_VIDEO_CHROMA_SPATIAL_FILTER_TYPE_OFF = 0, | ||
| 1335 | V4L2_MPEG_CX2341X_VIDEO_CHROMA_SPATIAL_FILTER_TYPE_1D_HOR = 1, | ||
| 1336 | }; | ||
| 1337 | #define V4L2_CID_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER_MODE (V4L2_CID_MPEG_CX2341X_BASE+4) | ||
| 1338 | enum <link linkend="v4l2-mpeg-cx2341x-video-temporal-filter-mode">v4l2_mpeg_cx2341x_video_temporal_filter_mode</link> { | ||
| 1339 | V4L2_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER_MODE_MANUAL = 0, | ||
| 1340 | V4L2_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER_MODE_AUTO = 1, | ||
| 1341 | }; | ||
| 1342 | #define V4L2_CID_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER (V4L2_CID_MPEG_CX2341X_BASE+5) | ||
| 1343 | #define V4L2_CID_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE (V4L2_CID_MPEG_CX2341X_BASE+6) | ||
| 1344 | enum <link linkend="v4l2-mpeg-cx2341x-video-median-filter-type">v4l2_mpeg_cx2341x_video_median_filter_type</link> { | ||
| 1345 | V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_OFF = 0, | ||
| 1346 | V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_HOR = 1, | ||
| 1347 | V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_VERT = 2, | ||
| 1348 | V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_HOR_VERT = 3, | ||
| 1349 | V4L2_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE_DIAG = 4, | ||
| 1350 | }; | ||
| 1351 | #define V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_MEDIAN_FILTER_BOTTOM (V4L2_CID_MPEG_CX2341X_BASE+7) | ||
| 1352 | #define V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_MEDIAN_FILTER_TOP (V4L2_CID_MPEG_CX2341X_BASE+8) | ||
| 1353 | #define V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_BOTTOM (V4L2_CID_MPEG_CX2341X_BASE+9) | ||
| 1354 | #define V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_TOP (V4L2_CID_MPEG_CX2341X_BASE+10) | ||
| 1355 | #define V4L2_CID_MPEG_CX2341X_STREAM_INSERT_NAV_PACKETS (V4L2_CID_MPEG_CX2341X_BASE+11) | ||
| 1356 | |||
| 1357 | /* Camera class control IDs */ | ||
| 1358 | #define V4L2_CID_CAMERA_CLASS_BASE (V4L2_CTRL_CLASS_CAMERA | 0x900) | ||
| 1359 | #define V4L2_CID_CAMERA_CLASS (V4L2_CTRL_CLASS_CAMERA | 1) | ||
| 1360 | |||
| 1361 | #define V4L2_CID_EXPOSURE_AUTO (V4L2_CID_CAMERA_CLASS_BASE+1) | ||
| 1362 | enum <link linkend="v4l2-exposure-auto-type">v4l2_exposure_auto_type</link> { | ||
| 1363 | V4L2_EXPOSURE_AUTO = 0, | ||
| 1364 | V4L2_EXPOSURE_MANUAL = 1, | ||
| 1365 | V4L2_EXPOSURE_SHUTTER_PRIORITY = 2, | ||
| 1366 | V4L2_EXPOSURE_APERTURE_PRIORITY = 3 | ||
| 1367 | }; | ||
| 1368 | #define V4L2_CID_EXPOSURE_ABSOLUTE (V4L2_CID_CAMERA_CLASS_BASE+2) | ||
| 1369 | #define V4L2_CID_EXPOSURE_AUTO_PRIORITY (V4L2_CID_CAMERA_CLASS_BASE+3) | ||
| 1370 | |||
| 1371 | #define V4L2_CID_PAN_RELATIVE (V4L2_CID_CAMERA_CLASS_BASE+4) | ||
| 1372 | #define V4L2_CID_TILT_RELATIVE (V4L2_CID_CAMERA_CLASS_BASE+5) | ||
| 1373 | #define V4L2_CID_PAN_RESET (V4L2_CID_CAMERA_CLASS_BASE+6) | ||
| 1374 | #define V4L2_CID_TILT_RESET (V4L2_CID_CAMERA_CLASS_BASE+7) | ||
| 1375 | |||
| 1376 | #define V4L2_CID_PAN_ABSOLUTE (V4L2_CID_CAMERA_CLASS_BASE+8) | ||
| 1377 | #define V4L2_CID_TILT_ABSOLUTE (V4L2_CID_CAMERA_CLASS_BASE+9) | ||
| 1378 | |||
| 1379 | #define V4L2_CID_FOCUS_ABSOLUTE (V4L2_CID_CAMERA_CLASS_BASE+10) | ||
| 1380 | #define V4L2_CID_FOCUS_RELATIVE (V4L2_CID_CAMERA_CLASS_BASE+11) | ||
| 1381 | #define V4L2_CID_FOCUS_AUTO (V4L2_CID_CAMERA_CLASS_BASE+12) | ||
| 1382 | |||
| 1383 | #define V4L2_CID_ZOOM_ABSOLUTE (V4L2_CID_CAMERA_CLASS_BASE+13) | ||
| 1384 | #define V4L2_CID_ZOOM_RELATIVE (V4L2_CID_CAMERA_CLASS_BASE+14) | ||
| 1385 | #define V4L2_CID_ZOOM_CONTINUOUS (V4L2_CID_CAMERA_CLASS_BASE+15) | ||
| 1386 | |||
| 1387 | #define V4L2_CID_PRIVACY (V4L2_CID_CAMERA_CLASS_BASE+16) | ||
| 1388 | |||
| 1389 | #define V4L2_CID_IRIS_ABSOLUTE (V4L2_CID_CAMERA_CLASS_BASE+17) | ||
| 1390 | #define V4L2_CID_IRIS_RELATIVE (V4L2_CID_CAMERA_CLASS_BASE+18) | ||
| 1391 | |||
| 1392 | /* FM Modulator class control IDs */ | ||
| 1393 | #define V4L2_CID_FM_TX_CLASS_BASE (V4L2_CTRL_CLASS_FM_TX | 0x900) | ||
| 1394 | #define V4L2_CID_FM_TX_CLASS (V4L2_CTRL_CLASS_FM_TX | 1) | ||
| 1395 | |||
| 1396 | #define V4L2_CID_RDS_TX_DEVIATION (V4L2_CID_FM_TX_CLASS_BASE + 1) | ||
| 1397 | #define V4L2_CID_RDS_TX_PI (V4L2_CID_FM_TX_CLASS_BASE + 2) | ||
| 1398 | #define V4L2_CID_RDS_TX_PTY (V4L2_CID_FM_TX_CLASS_BASE + 3) | ||
| 1399 | #define V4L2_CID_RDS_TX_PS_NAME (V4L2_CID_FM_TX_CLASS_BASE + 5) | ||
| 1400 | #define V4L2_CID_RDS_TX_RADIO_TEXT (V4L2_CID_FM_TX_CLASS_BASE + 6) | ||
| 1401 | |||
| 1402 | #define V4L2_CID_AUDIO_LIMITER_ENABLED (V4L2_CID_FM_TX_CLASS_BASE + 64) | ||
| 1403 | #define V4L2_CID_AUDIO_LIMITER_RELEASE_TIME (V4L2_CID_FM_TX_CLASS_BASE + 65) | ||
| 1404 | #define V4L2_CID_AUDIO_LIMITER_DEVIATION (V4L2_CID_FM_TX_CLASS_BASE + 66) | ||
| 1405 | |||
| 1406 | #define V4L2_CID_AUDIO_COMPRESSION_ENABLED (V4L2_CID_FM_TX_CLASS_BASE + 80) | ||
| 1407 | #define V4L2_CID_AUDIO_COMPRESSION_GAIN (V4L2_CID_FM_TX_CLASS_BASE + 81) | ||
| 1408 | #define V4L2_CID_AUDIO_COMPRESSION_THRESHOLD (V4L2_CID_FM_TX_CLASS_BASE + 82) | ||
| 1409 | #define V4L2_CID_AUDIO_COMPRESSION_ATTACK_TIME (V4L2_CID_FM_TX_CLASS_BASE + 83) | ||
| 1410 | #define V4L2_CID_AUDIO_COMPRESSION_RELEASE_TIME (V4L2_CID_FM_TX_CLASS_BASE + 84) | ||
| 1411 | |||
| 1412 | #define V4L2_CID_PILOT_TONE_ENABLED (V4L2_CID_FM_TX_CLASS_BASE + 96) | ||
| 1413 | #define V4L2_CID_PILOT_TONE_DEVIATION (V4L2_CID_FM_TX_CLASS_BASE + 97) | ||
| 1414 | #define V4L2_CID_PILOT_TONE_FREQUENCY (V4L2_CID_FM_TX_CLASS_BASE + 98) | ||
| 1415 | |||
| 1416 | #define V4L2_CID_TUNE_PREEMPHASIS (V4L2_CID_FM_TX_CLASS_BASE + 112) | ||
| 1417 | enum <link linkend="v4l2-preemphasis">v4l2_preemphasis</link> { | ||
| 1418 | V4L2_PREEMPHASIS_DISABLED = 0, | ||
| 1419 | V4L2_PREEMPHASIS_50_uS = 1, | ||
| 1420 | V4L2_PREEMPHASIS_75_uS = 2, | ||
| 1421 | }; | ||
| 1422 | #define V4L2_CID_TUNE_POWER_LEVEL (V4L2_CID_FM_TX_CLASS_BASE + 113) | ||
| 1423 | #define V4L2_CID_TUNE_ANTENNA_CAPACITOR (V4L2_CID_FM_TX_CLASS_BASE + 114) | ||
| 1424 | |||
| 1425 | /* | ||
| 1426 | * T U N I N G | ||
| 1427 | */ | ||
| 1428 | struct <link linkend="v4l2-tuner">v4l2_tuner</link> { | ||
| 1429 | __u32 index; | ||
| 1430 | __u8 name[32]; | ||
| 1431 | enum <link linkend="v4l2-tuner-type">v4l2_tuner_type</link> type; | ||
| 1432 | __u32 capability; | ||
| 1433 | __u32 rangelow; | ||
| 1434 | __u32 rangehigh; | ||
| 1435 | __u32 rxsubchans; | ||
| 1436 | __u32 audmode; | ||
| 1437 | __s32 signal; | ||
| 1438 | __s32 afc; | ||
| 1439 | __u32 reserved[4]; | ||
| 1440 | }; | ||
| 1441 | |||
| 1442 | struct <link linkend="v4l2-modulator">v4l2_modulator</link> { | ||
| 1443 | __u32 index; | ||
| 1444 | __u8 name[32]; | ||
| 1445 | __u32 capability; | ||
| 1446 | __u32 rangelow; | ||
| 1447 | __u32 rangehigh; | ||
| 1448 | __u32 txsubchans; | ||
| 1449 | __u32 reserved[4]; | ||
| 1450 | }; | ||
| 1451 | |||
| 1452 | /* Flags for the 'capability' field */ | ||
| 1453 | #define V4L2_TUNER_CAP_LOW 0x0001 | ||
| 1454 | #define V4L2_TUNER_CAP_NORM 0x0002 | ||
| 1455 | #define V4L2_TUNER_CAP_STEREO 0x0010 | ||
| 1456 | #define V4L2_TUNER_CAP_LANG2 0x0020 | ||
| 1457 | #define V4L2_TUNER_CAP_SAP 0x0020 | ||
| 1458 | #define V4L2_TUNER_CAP_LANG1 0x0040 | ||
| 1459 | #define V4L2_TUNER_CAP_RDS 0x0080 | ||
| 1460 | #define V4L2_TUNER_CAP_RDS_BLOCK_IO 0x0100 | ||
| 1461 | #define V4L2_TUNER_CAP_RDS_CONTROLS 0x0200 | ||
| 1462 | |||
| 1463 | /* Flags for the 'rxsubchans' field */ | ||
| 1464 | #define V4L2_TUNER_SUB_MONO 0x0001 | ||
| 1465 | #define V4L2_TUNER_SUB_STEREO 0x0002 | ||
| 1466 | #define V4L2_TUNER_SUB_LANG2 0x0004 | ||
| 1467 | #define V4L2_TUNER_SUB_SAP 0x0004 | ||
| 1468 | #define V4L2_TUNER_SUB_LANG1 0x0008 | ||
| 1469 | #define V4L2_TUNER_SUB_RDS 0x0010 | ||
| 1470 | |||
| 1471 | /* Values for the 'audmode' field */ | ||
| 1472 | #define V4L2_TUNER_MODE_MONO 0x0000 | ||
| 1473 | #define V4L2_TUNER_MODE_STEREO 0x0001 | ||
| 1474 | #define V4L2_TUNER_MODE_LANG2 0x0002 | ||
| 1475 | #define V4L2_TUNER_MODE_SAP 0x0002 | ||
| 1476 | #define V4L2_TUNER_MODE_LANG1 0x0003 | ||
| 1477 | #define V4L2_TUNER_MODE_LANG1_LANG2 0x0004 | ||
| 1478 | |||
| 1479 | struct <link linkend="v4l2-frequency">v4l2_frequency</link> { | ||
| 1480 | __u32 tuner; | ||
| 1481 | enum <link linkend="v4l2-tuner-type">v4l2_tuner_type</link> type; | ||
| 1482 | __u32 frequency; | ||
| 1483 | __u32 reserved[8]; | ||
| 1484 | }; | ||
| 1485 | |||
| 1486 | struct <link linkend="v4l2-hw-freq-seek">v4l2_hw_freq_seek</link> { | ||
| 1487 | __u32 tuner; | ||
| 1488 | enum <link linkend="v4l2-tuner-type">v4l2_tuner_type</link> type; | ||
| 1489 | __u32 seek_upward; | ||
| 1490 | __u32 wrap_around; | ||
| 1491 | __u32 spacing; | ||
| 1492 | __u32 reserved[7]; | ||
| 1493 | }; | ||
| 1494 | |||
| 1495 | /* | ||
| 1496 | * R D S | ||
| 1497 | */ | ||
| 1498 | |||
| 1499 | struct <link linkend="v4l2-rds-data">v4l2_rds_data</link> { | ||
| 1500 | __u8 lsb; | ||
| 1501 | __u8 msb; | ||
| 1502 | __u8 block; | ||
| 1503 | } __attribute__ ((packed)); | ||
| 1504 | |||
| 1505 | #define V4L2_RDS_BLOCK_MSK 0x7 | ||
| 1506 | #define V4L2_RDS_BLOCK_A 0 | ||
| 1507 | #define V4L2_RDS_BLOCK_B 1 | ||
| 1508 | #define V4L2_RDS_BLOCK_C 2 | ||
| 1509 | #define V4L2_RDS_BLOCK_D 3 | ||
| 1510 | #define V4L2_RDS_BLOCK_C_ALT 4 | ||
| 1511 | #define V4L2_RDS_BLOCK_INVALID 7 | ||
| 1512 | |||
| 1513 | #define V4L2_RDS_BLOCK_CORRECTED 0x40 | ||
| 1514 | #define V4L2_RDS_BLOCK_ERROR 0x80 | ||
| 1515 | |||
| 1516 | /* | ||
| 1517 | * A U D I O | ||
| 1518 | */ | ||
| 1519 | struct <link linkend="v4l2-audio">v4l2_audio</link> { | ||
| 1520 | __u32 index; | ||
| 1521 | __u8 name[32]; | ||
| 1522 | __u32 capability; | ||
| 1523 | __u32 mode; | ||
| 1524 | __u32 reserved[2]; | ||
| 1525 | }; | ||
| 1526 | |||
| 1527 | /* Flags for the 'capability' field */ | ||
| 1528 | #define V4L2_AUDCAP_STEREO 0x00001 | ||
| 1529 | #define V4L2_AUDCAP_AVL 0x00002 | ||
| 1530 | |||
| 1531 | /* Flags for the 'mode' field */ | ||
| 1532 | #define V4L2_AUDMODE_AVL 0x00001 | ||
| 1533 | |||
| 1534 | struct <link linkend="v4l2-audioout">v4l2_audioout</link> { | ||
| 1535 | __u32 index; | ||
| 1536 | __u8 name[32]; | ||
| 1537 | __u32 capability; | ||
| 1538 | __u32 mode; | ||
| 1539 | __u32 reserved[2]; | ||
| 1540 | }; | ||
| 1541 | |||
| 1542 | /* | ||
| 1543 | * M P E G S E R V I C E S | ||
| 1544 | * | ||
| 1545 | * NOTE: EXPERIMENTAL API | ||
| 1546 | */ | ||
| 1547 | #if 1 | ||
| 1548 | #define V4L2_ENC_IDX_FRAME_I (0) | ||
| 1549 | #define V4L2_ENC_IDX_FRAME_P (1) | ||
| 1550 | #define V4L2_ENC_IDX_FRAME_B (2) | ||
| 1551 | #define V4L2_ENC_IDX_FRAME_MASK (0xf) | ||
| 1552 | |||
| 1553 | struct <link linkend="v4l2-enc-idx-entry">v4l2_enc_idx_entry</link> { | ||
| 1554 | __u64 offset; | ||
| 1555 | __u64 pts; | ||
| 1556 | __u32 length; | ||
| 1557 | __u32 flags; | ||
| 1558 | __u32 reserved[2]; | ||
| 1559 | }; | ||
| 1560 | |||
| 1561 | #define V4L2_ENC_IDX_ENTRIES (64) | ||
| 1562 | struct <link linkend="v4l2-enc-idx">v4l2_enc_idx</link> { | ||
| 1563 | __u32 entries; | ||
| 1564 | __u32 entries_cap; | ||
| 1565 | __u32 reserved[4]; | ||
| 1566 | struct <link linkend="v4l2-enc-idx-entry">v4l2_enc_idx_entry</link> entry[V4L2_ENC_IDX_ENTRIES]; | ||
| 1567 | }; | ||
| 1568 | |||
| 1569 | |||
| 1570 | #define V4L2_ENC_CMD_START (0) | ||
| 1571 | #define V4L2_ENC_CMD_STOP (1) | ||
| 1572 | #define V4L2_ENC_CMD_PAUSE (2) | ||
| 1573 | #define V4L2_ENC_CMD_RESUME (3) | ||
| 1574 | |||
| 1575 | /* Flags for V4L2_ENC_CMD_STOP */ | ||
| 1576 | #define V4L2_ENC_CMD_STOP_AT_GOP_END (1 << 0) | ||
| 1577 | |||
| 1578 | struct <link linkend="v4l2-encoder-cmd">v4l2_encoder_cmd</link> { | ||
| 1579 | __u32 cmd; | ||
| 1580 | __u32 flags; | ||
| 1581 | union { | ||
| 1582 | struct { | ||
| 1583 | __u32 data[8]; | ||
| 1584 | } raw; | ||
| 1585 | }; | ||
| 1586 | }; | ||
| 1587 | |||
| 1588 | #endif | ||
| 1589 | |||
| 1590 | |||
| 1591 | /* | ||
| 1592 | * D A T A S E R V I C E S ( V B I ) | ||
| 1593 | * | ||
| 1594 | * Data services API by Michael Schimek | ||
| 1595 | */ | ||
| 1596 | |||
| 1597 | /* Raw VBI */ | ||
| 1598 | struct <link linkend="v4l2-vbi-format">v4l2_vbi_format</link> { | ||
| 1599 | __u32 sampling_rate; /* in 1 Hz */ | ||
| 1600 | __u32 offset; | ||
| 1601 | __u32 samples_per_line; | ||
| 1602 | __u32 sample_format; /* V4L2_PIX_FMT_* */ | ||
| 1603 | __s32 start[2]; | ||
| 1604 | __u32 count[2]; | ||
| 1605 | __u32 flags; /* V4L2_VBI_* */ | ||
| 1606 | __u32 reserved[2]; /* must be zero */ | ||
| 1607 | }; | ||
| 1608 | |||
| 1609 | /* VBI flags */ | ||
| 1610 | #define V4L2_VBI_UNSYNC (1 << 0) | ||
| 1611 | #define V4L2_VBI_INTERLACED (1 << 1) | ||
| 1612 | |||
| 1613 | /* Sliced VBI | ||
| 1614 | * | ||
| 1615 | * This implements is a proposal V4L2 API to allow SLICED VBI | ||
| 1616 | * required for some hardware encoders. It should change without | ||
| 1617 | * notice in the definitive implementation. | ||
| 1618 | */ | ||
| 1619 | |||
| 1620 | struct <link linkend="v4l2-sliced-vbi-format">v4l2_sliced_vbi_format</link> { | ||
| 1621 | __u16 service_set; | ||
| 1622 | /* service_lines[0][...] specifies lines 0-23 (1-23 used) of the first field | ||
| 1623 | service_lines[1][...] specifies lines 0-23 (1-23 used) of the second field | ||
| 1624 | (equals frame lines 313-336 for 625 line video | ||
| 1625 | standards, 263-286 for 525 line standards) */ | ||
| 1626 | __u16 service_lines[2][24]; | ||
| 1627 | __u32 io_size; | ||
| 1628 | __u32 reserved[2]; /* must be zero */ | ||
| 1629 | }; | ||
| 1630 | |||
| 1631 | /* Teletext World System Teletext | ||
| 1632 | (WST), defined on ITU-R BT.653-2 */ | ||
| 1633 | #define V4L2_SLICED_TELETEXT_B (0x0001) | ||
| 1634 | /* Video Program System, defined on ETS 300 231*/ | ||
| 1635 | #define V4L2_SLICED_VPS (0x0400) | ||
| 1636 | /* Closed Caption, defined on EIA-608 */ | ||
| 1637 | #define V4L2_SLICED_CAPTION_525 (0x1000) | ||
| 1638 | /* Wide Screen System, defined on ITU-R BT1119.1 */ | ||
| 1639 | #define V4L2_SLICED_WSS_625 (0x4000) | ||
| 1640 | |||
| 1641 | #define V4L2_SLICED_VBI_525 (V4L2_SLICED_CAPTION_525) | ||
| 1642 | #define V4L2_SLICED_VBI_625 (V4L2_SLICED_TELETEXT_B | V4L2_SLICED_VPS | V4L2_SLICED_WSS_625) | ||
| 1643 | |||
| 1644 | struct <link linkend="v4l2-sliced-vbi-cap">v4l2_sliced_vbi_cap</link> { | ||
| 1645 | __u16 service_set; | ||
| 1646 | /* service_lines[0][...] specifies lines 0-23 (1-23 used) of the first field | ||
| 1647 | service_lines[1][...] specifies lines 0-23 (1-23 used) of the second field | ||
| 1648 | (equals frame lines 313-336 for 625 line video | ||
| 1649 | standards, 263-286 for 525 line standards) */ | ||
| 1650 | __u16 service_lines[2][24]; | ||
| 1651 | enum <link linkend="v4l2-buf-type">v4l2_buf_type</link> type; | ||
| 1652 | __u32 reserved[3]; /* must be 0 */ | ||
| 1653 | }; | ||
| 1654 | |||
| 1655 | struct <link linkend="v4l2-sliced-vbi-data">v4l2_sliced_vbi_data</link> { | ||
| 1656 | __u32 id; | ||
| 1657 | __u32 field; /* 0: first field, 1: second field */ | ||
| 1658 | __u32 line; /* 1-23 */ | ||
| 1659 | __u32 reserved; /* must be 0 */ | ||
| 1660 | __u8 data[48]; | ||
| 1661 | }; | ||
| 1662 | |||
| 1663 | /* | ||
| 1664 | * Sliced VBI data inserted into MPEG Streams | ||
| 1665 | */ | ||
| 1666 | |||
| 1667 | /* | ||
| 1668 | * V4L2_MPEG_STREAM_VBI_FMT_IVTV: | ||
| 1669 | * | ||
| 1670 | * Structure of payload contained in an MPEG 2 Private Stream 1 PES Packet in an | ||
| 1671 | * MPEG-2 Program Pack that contains V4L2_MPEG_STREAM_VBI_FMT_IVTV Sliced VBI | ||
| 1672 | * data | ||
| 1673 | * | ||
| 1674 | * Note, the MPEG-2 Program Pack and Private Stream 1 PES packet header | ||
| 1675 | * definitions are not included here. See the MPEG-2 specifications for details | ||
| 1676 | * on these headers. | ||
| 1677 | */ | ||
| 1678 | |||
| 1679 | /* Line type IDs */ | ||
| 1680 | #define V4L2_MPEG_VBI_IVTV_TELETEXT_B (1) | ||
| 1681 | #define V4L2_MPEG_VBI_IVTV_CAPTION_525 (4) | ||
| 1682 | #define V4L2_MPEG_VBI_IVTV_WSS_625 (5) | ||
| 1683 | #define V4L2_MPEG_VBI_IVTV_VPS (7) | ||
| 1684 | |||
| 1685 | struct <link linkend="v4l2-mpeg-vbi-itv0-line">v4l2_mpeg_vbi_itv0_line</link> { | ||
| 1686 | __u8 id; /* One of V4L2_MPEG_VBI_IVTV_* above */ | ||
| 1687 | __u8 data[42]; /* Sliced VBI data for the line */ | ||
| 1688 | } __attribute__ ((packed)); | ||
| 1689 | |||
| 1690 | struct <link linkend="v4l2-mpeg-vbi-itv0">v4l2_mpeg_vbi_itv0</link> { | ||
| 1691 | __le32 linemask[2]; /* Bitmasks of VBI service lines present */ | ||
| 1692 | struct <link linkend="v4l2-mpeg-vbi-itv0-line">v4l2_mpeg_vbi_itv0_line</link> line[35]; | ||
| 1693 | } __attribute__ ((packed)); | ||
| 1694 | |||
| 1695 | struct <link linkend="v4l2-mpeg-vbi-itv0-1">v4l2_mpeg_vbi_ITV0</link> { | ||
| 1696 | struct <link linkend="v4l2-mpeg-vbi-itv0-line">v4l2_mpeg_vbi_itv0_line</link> line[36]; | ||
| 1697 | } __attribute__ ((packed)); | ||
| 1698 | |||
| 1699 | #define V4L2_MPEG_VBI_IVTV_MAGIC0 "itv0" | ||
| 1700 | #define V4L2_MPEG_VBI_IVTV_MAGIC1 "ITV0" | ||
| 1701 | |||
| 1702 | struct <link linkend="v4l2-mpeg-vbi-fmt-ivtv">v4l2_mpeg_vbi_fmt_ivtv</link> { | ||
| 1703 | __u8 magic[4]; | ||
| 1704 | union { | ||
| 1705 | struct <link linkend="v4l2-mpeg-vbi-itv0">v4l2_mpeg_vbi_itv0</link> itv0; | ||
| 1706 | struct <link linkend="v4l2-mpeg-vbi-itv0-1">v4l2_mpeg_vbi_ITV0</link> ITV0; | ||
| 1707 | }; | ||
| 1708 | } __attribute__ ((packed)); | ||
| 1709 | |||
| 1710 | /* | ||
| 1711 | * A G G R E G A T E S T R U C T U R E S | ||
| 1712 | */ | ||
| 1713 | |||
| 1714 | /** | ||
| 1715 | * struct <link linkend="v4l2-plane-pix-format">v4l2_plane_pix_format</link> - additional, per-plane format definition | ||
| 1716 | * @sizeimage: maximum size in bytes required for data, for which | ||
| 1717 | * this plane will be used | ||
| 1718 | * @bytesperline: distance in bytes between the leftmost pixels in two | ||
| 1719 | * adjacent lines | ||
| 1720 | */ | ||
| 1721 | struct <link linkend="v4l2-plane-pix-format">v4l2_plane_pix_format</link> { | ||
| 1722 | __u32 sizeimage; | ||
| 1723 | __u16 bytesperline; | ||
| 1724 | __u16 reserved[7]; | ||
| 1725 | } __attribute__ ((packed)); | ||
| 1726 | |||
| 1727 | /** | ||
| 1728 | * struct <link linkend="v4l2-pix-format-mplane">v4l2_pix_format_mplane</link> - multiplanar format definition | ||
| 1729 | * @width: image width in pixels | ||
| 1730 | * @height: image height in pixels | ||
| 1731 | * @pixelformat: little endian four character code (fourcc) | ||
| 1732 | * @field: field order (for interlaced video) | ||
| 1733 | * @colorspace: supplemental to pixelformat | ||
| 1734 | * @plane_fmt: per-plane information | ||
| 1735 | * @num_planes: number of planes for this format | ||
| 1736 | */ | ||
| 1737 | struct <link linkend="v4l2-pix-format-mplane">v4l2_pix_format_mplane</link> { | ||
| 1738 | __u32 width; | ||
| 1739 | __u32 height; | ||
| 1740 | __u32 pixelformat; | ||
| 1741 | enum <link linkend="v4l2-field">v4l2_field</link> field; | ||
| 1742 | enum <link linkend="v4l2-colorspace">v4l2_colorspace</link> colorspace; | ||
| 1743 | |||
| 1744 | struct <link linkend="v4l2-plane-pix-format">v4l2_plane_pix_format</link> plane_fmt[VIDEO_MAX_PLANES]; | ||
| 1745 | __u8 num_planes; | ||
| 1746 | __u8 reserved[11]; | ||
| 1747 | } __attribute__ ((packed)); | ||
| 1748 | |||
| 1749 | /** | ||
| 1750 | * struct <link linkend="v4l2-format">v4l2_format</link> - stream data format | ||
| 1751 | * @type: type of the data stream | ||
| 1752 | * @pix: definition of an image format | ||
| 1753 | * @pix_mp: definition of a multiplanar image format | ||
| 1754 | * @win: definition of an overlaid image | ||
| 1755 | * @vbi: raw VBI capture or output parameters | ||
| 1756 | * @sliced: sliced VBI capture or output parameters | ||
| 1757 | * @raw_data: placeholder for future extensions and custom formats | ||
| 1758 | */ | ||
| 1759 | struct <link linkend="v4l2-format">v4l2_format</link> { | ||
| 1760 | enum <link linkend="v4l2-buf-type">v4l2_buf_type</link> type; | ||
| 1761 | union { | ||
| 1762 | struct <link linkend="v4l2-pix-format">v4l2_pix_format</link> pix; /* V4L2_BUF_TYPE_VIDEO_CAPTURE */ | ||
| 1763 | struct <link linkend="v4l2-pix-format-mplane">v4l2_pix_format_mplane</link> pix_mp; /* V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE */ | ||
| 1764 | struct <link linkend="v4l2-window">v4l2_window</link> win; /* V4L2_BUF_TYPE_VIDEO_OVERLAY */ | ||
| 1765 | struct <link linkend="v4l2-vbi-format">v4l2_vbi_format</link> vbi; /* V4L2_BUF_TYPE_VBI_CAPTURE */ | ||
| 1766 | struct <link linkend="v4l2-sliced-vbi-format">v4l2_sliced_vbi_format</link> sliced; /* V4L2_BUF_TYPE_SLICED_VBI_CAPTURE */ | ||
| 1767 | __u8 raw_data[200]; /* user-defined */ | ||
| 1768 | } fmt; | ||
| 1769 | }; | ||
| 1770 | |||
| 1771 | /* Stream type-dependent parameters | ||
| 1772 | */ | ||
| 1773 | struct <link linkend="v4l2-streamparm">v4l2_streamparm</link> { | ||
| 1774 | enum <link linkend="v4l2-buf-type">v4l2_buf_type</link> type; | ||
| 1775 | union { | ||
| 1776 | struct <link linkend="v4l2-captureparm">v4l2_captureparm</link> capture; | ||
| 1777 | struct <link linkend="v4l2-outputparm">v4l2_outputparm</link> output; | ||
| 1778 | __u8 raw_data[200]; /* user-defined */ | ||
| 1779 | } parm; | ||
| 1780 | }; | ||
| 1781 | |||
| 1782 | /* | ||
| 1783 | * E V E N T S | ||
| 1784 | */ | ||
| 1785 | |||
| 1786 | #define V4L2_EVENT_ALL 0 | ||
| 1787 | #define V4L2_EVENT_VSYNC 1 | ||
| 1788 | #define V4L2_EVENT_EOS 2 | ||
| 1789 | #define V4L2_EVENT_PRIVATE_START 0x08000000 | ||
| 1790 | |||
| 1791 | /* Payload for V4L2_EVENT_VSYNC */ | ||
| 1792 | struct <link linkend="v4l2-event-vsync">v4l2_event_vsync</link> { | ||
| 1793 | /* Can be V4L2_FIELD_ANY, _NONE, _TOP or _BOTTOM */ | ||
| 1794 | __u8 field; | ||
| 1795 | } __attribute__ ((packed)); | ||
| 1796 | |||
| 1797 | struct <link linkend="v4l2-event">v4l2_event</link> { | ||
| 1798 | __u32 type; | ||
| 1799 | union { | ||
| 1800 | struct <link linkend="v4l2-event-vsync">v4l2_event_vsync</link> vsync; | ||
| 1801 | __u8 data[64]; | ||
| 1802 | } u; | ||
| 1803 | __u32 pending; | ||
| 1804 | __u32 sequence; | ||
| 1805 | struct timespec timestamp; | ||
| 1806 | __u32 reserved[9]; | ||
| 1807 | }; | ||
| 1808 | |||
| 1809 | struct <link linkend="v4l2-event-subscription">v4l2_event_subscription</link> { | ||
| 1810 | __u32 type; | ||
| 1811 | __u32 reserved[7]; | ||
| 1812 | }; | ||
| 1813 | |||
| 1814 | /* | ||
| 1815 | * A D V A N C E D D E B U G G I N G | ||
| 1816 | * | ||
| 1817 | * NOTE: EXPERIMENTAL API, NEVER RELY ON THIS IN APPLICATIONS! | ||
| 1818 | * FOR DEBUGGING, TESTING AND INTERNAL USE ONLY! | ||
| 1819 | */ | ||
| 1820 | |||
| 1821 | /* VIDIOC_DBG_G_REGISTER and VIDIOC_DBG_S_REGISTER */ | ||
| 1822 | |||
| 1823 | #define V4L2_CHIP_MATCH_HOST 0 /* Match against chip ID on host (0 for the host) */ | ||
| 1824 | #define V4L2_CHIP_MATCH_I2C_DRIVER 1 /* Match against I2C driver name */ | ||
| 1825 | #define V4L2_CHIP_MATCH_I2C_ADDR 2 /* Match against I2C 7-bit address */ | ||
| 1826 | #define V4L2_CHIP_MATCH_AC97 3 /* Match against anciliary AC97 chip */ | ||
| 1827 | |||
| 1828 | struct <link linkend="v4l2-dbg-match">v4l2_dbg_match</link> { | ||
| 1829 | __u32 type; /* Match type */ | ||
| 1830 | union { /* Match this chip, meaning determined by type */ | ||
| 1831 | __u32 addr; | ||
| 1832 | char name[32]; | ||
| 1833 | }; | ||
| 1834 | } __attribute__ ((packed)); | ||
| 1835 | |||
| 1836 | struct <link linkend="v4l2-dbg-register">v4l2_dbg_register</link> { | ||
| 1837 | struct <link linkend="v4l2-dbg-match">v4l2_dbg_match</link> match; | ||
| 1838 | __u32 size; /* register size in bytes */ | ||
| 1839 | __u64 reg; | ||
| 1840 | __u64 val; | ||
| 1841 | } __attribute__ ((packed)); | ||
| 1842 | |||
| 1843 | /* VIDIOC_DBG_G_CHIP_IDENT */ | ||
| 1844 | struct <link linkend="v4l2-dbg-chip-ident">v4l2_dbg_chip_ident</link> { | ||
| 1845 | struct <link linkend="v4l2-dbg-match">v4l2_dbg_match</link> match; | ||
| 1846 | __u32 ident; /* chip identifier as specified in <media/v4l2-chip-ident.h> */ | ||
| 1847 | __u32 revision; /* chip revision, chip specific */ | ||
| 1848 | } __attribute__ ((packed)); | ||
| 1849 | |||
| 1850 | /* | ||
| 1851 | * I O C T L C O D E S F O R V I D E O D E V I C E S | ||
| 1852 | * | ||
| 1853 | */ | ||
| 1854 | #define VIDIOC_QUERYCAP _IOR('V', 0, struct <link linkend="v4l2-capability">v4l2_capability</link>) | ||
| 1855 | #define VIDIOC_RESERVED _IO('V', 1) | ||
| 1856 | #define VIDIOC_ENUM_FMT _IOWR('V', 2, struct <link linkend="v4l2-fmtdesc">v4l2_fmtdesc</link>) | ||
| 1857 | #define VIDIOC_G_FMT _IOWR('V', 4, struct <link linkend="v4l2-format">v4l2_format</link>) | ||
| 1858 | #define VIDIOC_S_FMT _IOWR('V', 5, struct <link linkend="v4l2-format">v4l2_format</link>) | ||
| 1859 | #define VIDIOC_REQBUFS _IOWR('V', 8, struct <link linkend="v4l2-requestbuffers">v4l2_requestbuffers</link>) | ||
| 1860 | #define VIDIOC_QUERYBUF _IOWR('V', 9, struct <link linkend="v4l2-buffer">v4l2_buffer</link>) | ||
| 1861 | #define VIDIOC_G_FBUF _IOR('V', 10, struct <link linkend="v4l2-framebuffer">v4l2_framebuffer</link>) | ||
| 1862 | #define VIDIOC_S_FBUF _IOW('V', 11, struct <link linkend="v4l2-framebuffer">v4l2_framebuffer</link>) | ||
| 1863 | #define VIDIOC_OVERLAY _IOW('V', 14, int) | ||
| 1864 | #define VIDIOC_QBUF _IOWR('V', 15, struct <link linkend="v4l2-buffer">v4l2_buffer</link>) | ||
| 1865 | #define VIDIOC_DQBUF _IOWR('V', 17, struct <link linkend="v4l2-buffer">v4l2_buffer</link>) | ||
| 1866 | #define VIDIOC_STREAMON _IOW('V', 18, int) | ||
| 1867 | #define VIDIOC_STREAMOFF _IOW('V', 19, int) | ||
| 1868 | #define VIDIOC_G_PARM _IOWR('V', 21, struct <link linkend="v4l2-streamparm">v4l2_streamparm</link>) | ||
| 1869 | #define VIDIOC_S_PARM _IOWR('V', 22, struct <link linkend="v4l2-streamparm">v4l2_streamparm</link>) | ||
| 1870 | #define VIDIOC_G_STD _IOR('V', 23, v4l2_std_id) | ||
| 1871 | #define VIDIOC_S_STD _IOW('V', 24, v4l2_std_id) | ||
| 1872 | #define VIDIOC_ENUMSTD _IOWR('V', 25, struct <link linkend="v4l2-standard">v4l2_standard</link>) | ||
| 1873 | #define VIDIOC_ENUMINPUT _IOWR('V', 26, struct <link linkend="v4l2-input">v4l2_input</link>) | ||
| 1874 | #define VIDIOC_G_CTRL _IOWR('V', 27, struct <link linkend="v4l2-control">v4l2_control</link>) | ||
| 1875 | #define VIDIOC_S_CTRL _IOWR('V', 28, struct <link linkend="v4l2-control">v4l2_control</link>) | ||
| 1876 | #define VIDIOC_G_TUNER _IOWR('V', 29, struct <link linkend="v4l2-tuner">v4l2_tuner</link>) | ||
| 1877 | #define VIDIOC_S_TUNER _IOW('V', 30, struct <link linkend="v4l2-tuner">v4l2_tuner</link>) | ||
| 1878 | #define VIDIOC_G_AUDIO _IOR('V', 33, struct <link linkend="v4l2-audio">v4l2_audio</link>) | ||
| 1879 | #define VIDIOC_S_AUDIO _IOW('V', 34, struct <link linkend="v4l2-audio">v4l2_audio</link>) | ||
| 1880 | #define VIDIOC_QUERYCTRL _IOWR('V', 36, struct <link linkend="v4l2-queryctrl">v4l2_queryctrl</link>) | ||
| 1881 | #define VIDIOC_QUERYMENU _IOWR('V', 37, struct <link linkend="v4l2-querymenu">v4l2_querymenu</link>) | ||
| 1882 | #define VIDIOC_G_INPUT _IOR('V', 38, int) | ||
| 1883 | #define VIDIOC_S_INPUT _IOWR('V', 39, int) | ||
| 1884 | #define VIDIOC_G_OUTPUT _IOR('V', 46, int) | ||
| 1885 | #define VIDIOC_S_OUTPUT _IOWR('V', 47, int) | ||
| 1886 | #define VIDIOC_ENUMOUTPUT _IOWR('V', 48, struct <link linkend="v4l2-output">v4l2_output</link>) | ||
| 1887 | #define VIDIOC_G_AUDOUT _IOR('V', 49, struct <link linkend="v4l2-audioout">v4l2_audioout</link>) | ||
| 1888 | #define VIDIOC_S_AUDOUT _IOW('V', 50, struct <link linkend="v4l2-audioout">v4l2_audioout</link>) | ||
| 1889 | #define VIDIOC_G_MODULATOR _IOWR('V', 54, struct <link linkend="v4l2-modulator">v4l2_modulator</link>) | ||
| 1890 | #define VIDIOC_S_MODULATOR _IOW('V', 55, struct <link linkend="v4l2-modulator">v4l2_modulator</link>) | ||
| 1891 | #define VIDIOC_G_FREQUENCY _IOWR('V', 56, struct <link linkend="v4l2-frequency">v4l2_frequency</link>) | ||
| 1892 | #define VIDIOC_S_FREQUENCY _IOW('V', 57, struct <link linkend="v4l2-frequency">v4l2_frequency</link>) | ||
| 1893 | #define VIDIOC_CROPCAP _IOWR('V', 58, struct <link linkend="v4l2-cropcap">v4l2_cropcap</link>) | ||
| 1894 | #define VIDIOC_G_CROP _IOWR('V', 59, struct <link linkend="v4l2-crop">v4l2_crop</link>) | ||
| 1895 | #define VIDIOC_S_CROP _IOW('V', 60, struct <link linkend="v4l2-crop">v4l2_crop</link>) | ||
| 1896 | #define VIDIOC_G_JPEGCOMP _IOR('V', 61, struct <link linkend="v4l2-jpegcompression">v4l2_jpegcompression</link>) | ||
| 1897 | #define VIDIOC_S_JPEGCOMP _IOW('V', 62, struct <link linkend="v4l2-jpegcompression">v4l2_jpegcompression</link>) | ||
| 1898 | #define VIDIOC_QUERYSTD _IOR('V', 63, v4l2_std_id) | ||
| 1899 | #define VIDIOC_TRY_FMT _IOWR('V', 64, struct <link linkend="v4l2-format">v4l2_format</link>) | ||
| 1900 | #define VIDIOC_ENUMAUDIO _IOWR('V', 65, struct <link linkend="v4l2-audio">v4l2_audio</link>) | ||
| 1901 | #define VIDIOC_ENUMAUDOUT _IOWR('V', 66, struct <link linkend="v4l2-audioout">v4l2_audioout</link>) | ||
| 1902 | #define VIDIOC_G_PRIORITY _IOR('V', 67, enum <link linkend="v4l2-priority">v4l2_priority</link>) | ||
| 1903 | #define VIDIOC_S_PRIORITY _IOW('V', 68, enum <link linkend="v4l2-priority">v4l2_priority</link>) | ||
| 1904 | #define VIDIOC_G_SLICED_VBI_CAP _IOWR('V', 69, struct <link linkend="v4l2-sliced-vbi-cap">v4l2_sliced_vbi_cap</link>) | ||
| 1905 | #define VIDIOC_LOG_STATUS _IO('V', 70) | ||
| 1906 | #define VIDIOC_G_EXT_CTRLS _IOWR('V', 71, struct <link linkend="v4l2-ext-controls">v4l2_ext_controls</link>) | ||
| 1907 | #define VIDIOC_S_EXT_CTRLS _IOWR('V', 72, struct <link linkend="v4l2-ext-controls">v4l2_ext_controls</link>) | ||
| 1908 | #define VIDIOC_TRY_EXT_CTRLS _IOWR('V', 73, struct <link linkend="v4l2-ext-controls">v4l2_ext_controls</link>) | ||
| 1909 | #if 1 | ||
| 1910 | #define VIDIOC_ENUM_FRAMESIZES _IOWR('V', 74, struct <link linkend="v4l2-frmsizeenum">v4l2_frmsizeenum</link>) | ||
| 1911 | #define VIDIOC_ENUM_FRAMEINTERVALS _IOWR('V', 75, struct <link linkend="v4l2-frmivalenum">v4l2_frmivalenum</link>) | ||
| 1912 | #define VIDIOC_G_ENC_INDEX _IOR('V', 76, struct <link linkend="v4l2-enc-idx">v4l2_enc_idx</link>) | ||
| 1913 | #define VIDIOC_ENCODER_CMD _IOWR('V', 77, struct <link linkend="v4l2-encoder-cmd">v4l2_encoder_cmd</link>) | ||
| 1914 | #define VIDIOC_TRY_ENCODER_CMD _IOWR('V', 78, struct <link linkend="v4l2-encoder-cmd">v4l2_encoder_cmd</link>) | ||
| 1915 | #endif | ||
| 1916 | |||
| 1917 | #if 1 | ||
| 1918 | /* Experimental, meant for debugging, testing and internal use. | ||
| 1919 | Only implemented if CONFIG_VIDEO_ADV_DEBUG is defined. | ||
| 1920 | You must be root to use these ioctls. Never use these in applications! */ | ||
| 1921 | #define VIDIOC_DBG_S_REGISTER _IOW('V', 79, struct <link linkend="v4l2-dbg-register">v4l2_dbg_register</link>) | ||
| 1922 | #define VIDIOC_DBG_G_REGISTER _IOWR('V', 80, struct <link linkend="v4l2-dbg-register">v4l2_dbg_register</link>) | ||
| 1923 | |||
| 1924 | /* Experimental, meant for debugging, testing and internal use. | ||
| 1925 | Never use this ioctl in applications! */ | ||
| 1926 | #define VIDIOC_DBG_G_CHIP_IDENT _IOWR('V', 81, struct <link linkend="v4l2-dbg-chip-ident">v4l2_dbg_chip_ident</link>) | ||
| 1927 | #endif | ||
| 1928 | |||
| 1929 | #define VIDIOC_S_HW_FREQ_SEEK _IOW('V', 82, struct <link linkend="v4l2-hw-freq-seek">v4l2_hw_freq_seek</link>) | ||
| 1930 | #define VIDIOC_ENUM_DV_PRESETS _IOWR('V', 83, struct <link linkend="v4l2-dv-enum-preset">v4l2_dv_enum_preset</link>) | ||
| 1931 | #define VIDIOC_S_DV_PRESET _IOWR('V', 84, struct <link linkend="v4l2-dv-preset">v4l2_dv_preset</link>) | ||
| 1932 | #define VIDIOC_G_DV_PRESET _IOWR('V', 85, struct <link linkend="v4l2-dv-preset">v4l2_dv_preset</link>) | ||
| 1933 | #define VIDIOC_QUERY_DV_PRESET _IOR('V', 86, struct <link linkend="v4l2-dv-preset">v4l2_dv_preset</link>) | ||
| 1934 | #define VIDIOC_S_DV_TIMINGS _IOWR('V', 87, struct <link linkend="v4l2-dv-timings">v4l2_dv_timings</link>) | ||
| 1935 | #define VIDIOC_G_DV_TIMINGS _IOWR('V', 88, struct <link linkend="v4l2-dv-timings">v4l2_dv_timings</link>) | ||
| 1936 | #define VIDIOC_DQEVENT _IOR('V', 89, struct <link linkend="v4l2-event">v4l2_event</link>) | ||
| 1937 | #define VIDIOC_SUBSCRIBE_EVENT _IOW('V', 90, struct <link linkend="v4l2-event-subscription">v4l2_event_subscription</link>) | ||
| 1938 | #define VIDIOC_UNSUBSCRIBE_EVENT _IOW('V', 91, struct <link linkend="v4l2-event-subscription">v4l2_event_subscription</link>) | ||
| 1939 | |||
| 1940 | /* Reminder: when adding new ioctls please add support for them to | ||
| 1941 | drivers/media/video/v4l2-compat-ioctl32.c as well! */ | ||
| 1942 | |||
| 1943 | #define BASE_VIDIOC_PRIVATE 192 /* 192-255 are private */ | ||
| 1944 | |||
| 1945 | #endif /* __LINUX_VIDEODEV2_H */ | ||
| 1946 | </programlisting> | ||
diff --git a/Documentation/DocBook/v4l/vidioc-subscribe-event.xml b/Documentation/DocBook/v4l/vidioc-subscribe-event.xml deleted file mode 100644 index 8b501791aa68..000000000000 --- a/Documentation/DocBook/v4l/vidioc-subscribe-event.xml +++ /dev/null | |||
| @@ -1,133 +0,0 @@ | |||
| 1 | <refentry id="vidioc-subscribe-event"> | ||
| 2 | <refmeta> | ||
| 3 | <refentrytitle>ioctl VIDIOC_SUBSCRIBE_EVENT, VIDIOC_UNSUBSCRIBE_EVENT</refentrytitle> | ||
| 4 | &manvol; | ||
| 5 | </refmeta> | ||
| 6 | |||
| 7 | <refnamediv> | ||
| 8 | <refname>VIDIOC_SUBSCRIBE_EVENT, VIDIOC_UNSUBSCRIBE_EVENT</refname> | ||
| 9 | <refpurpose>Subscribe or unsubscribe event</refpurpose> | ||
| 10 | </refnamediv> | ||
| 11 | |||
| 12 | <refsynopsisdiv> | ||
| 13 | <funcsynopsis> | ||
| 14 | <funcprototype> | ||
| 15 | <funcdef>int <function>ioctl</function></funcdef> | ||
| 16 | <paramdef>int <parameter>fd</parameter></paramdef> | ||
| 17 | <paramdef>int <parameter>request</parameter></paramdef> | ||
| 18 | <paramdef>struct v4l2_event_subscription | ||
| 19 | *<parameter>argp</parameter></paramdef> | ||
| 20 | </funcprototype> | ||
| 21 | </funcsynopsis> | ||
| 22 | </refsynopsisdiv> | ||
| 23 | |||
| 24 | <refsect1> | ||
| 25 | <title>Arguments</title> | ||
| 26 | |||
| 27 | <variablelist> | ||
| 28 | <varlistentry> | ||
| 29 | <term><parameter>fd</parameter></term> | ||
| 30 | <listitem> | ||
| 31 | <para>&fd;</para> | ||
| 32 | </listitem> | ||
| 33 | </varlistentry> | ||
| 34 | <varlistentry> | ||
| 35 | <term><parameter>request</parameter></term> | ||
| 36 | <listitem> | ||
| 37 | <para>VIDIOC_SUBSCRIBE_EVENT, VIDIOC_UNSUBSCRIBE_EVENT</para> | ||
| 38 | </listitem> | ||
| 39 | </varlistentry> | ||
| 40 | <varlistentry> | ||
| 41 | <term><parameter>argp</parameter></term> | ||
| 42 | <listitem> | ||
| 43 | <para></para> | ||
| 44 | </listitem> | ||
| 45 | </varlistentry> | ||
| 46 | </variablelist> | ||
| 47 | </refsect1> | ||
| 48 | |||
| 49 | <refsect1> | ||
| 50 | <title>Description</title> | ||
| 51 | |||
| 52 | <para>Subscribe or unsubscribe V4L2 event. Subscribed events are | ||
| 53 | dequeued by using the &VIDIOC-DQEVENT; ioctl.</para> | ||
| 54 | |||
| 55 | <table frame="none" pgwide="1" id="v4l2-event-subscription"> | ||
| 56 | <title>struct <structname>v4l2_event_subscription</structname></title> | ||
| 57 | <tgroup cols="3"> | ||
| 58 | &cs-str; | ||
| 59 | <tbody valign="top"> | ||
| 60 | <row> | ||
| 61 | <entry>__u32</entry> | ||
| 62 | <entry><structfield>type</structfield></entry> | ||
| 63 | <entry>Type of the event.</entry> | ||
| 64 | </row> | ||
| 65 | <row> | ||
| 66 | <entry>__u32</entry> | ||
| 67 | <entry><structfield>reserved</structfield>[7]</entry> | ||
| 68 | <entry>Reserved for future extensions. Drivers and applications | ||
| 69 | must set the array to zero.</entry> | ||
| 70 | </row> | ||
| 71 | </tbody> | ||
| 72 | </tgroup> | ||
| 73 | </table> | ||
| 74 | |||
| 75 | <table frame="none" pgwide="1" id="event-type"> | ||
| 76 | <title>Event Types</title> | ||
| 77 | <tgroup cols="3"> | ||
| 78 | &cs-def; | ||
| 79 | <tbody valign="top"> | ||
| 80 | <row> | ||
| 81 | <entry><constant>V4L2_EVENT_ALL</constant></entry> | ||
| 82 | <entry>0</entry> | ||
| 83 | <entry>All events. V4L2_EVENT_ALL is valid only for | ||
| 84 | VIDIOC_UNSUBSCRIBE_EVENT for unsubscribing all events at once. | ||
| 85 | </entry> | ||
| 86 | </row> | ||
| 87 | <row> | ||
| 88 | <entry><constant>V4L2_EVENT_VSYNC</constant></entry> | ||
| 89 | <entry>1</entry> | ||
| 90 | <entry>This event is triggered on the vertical sync. | ||
| 91 | This event has &v4l2-event-vsync; associated with it. | ||
| 92 | </entry> | ||
| 93 | </row> | ||
| 94 | <row> | ||
| 95 | <entry><constant>V4L2_EVENT_EOS</constant></entry> | ||
| 96 | <entry>2</entry> | ||
| 97 | <entry>This event is triggered when the end of a stream is reached. | ||
| 98 | This is typically used with MPEG decoders to report to the application | ||
| 99 | when the last of the MPEG stream has been decoded. | ||
| 100 | </entry> | ||
| 101 | </row> | ||
| 102 | <row> | ||
| 103 | <entry><constant>V4L2_EVENT_PRIVATE_START</constant></entry> | ||
| 104 | <entry>0x08000000</entry> | ||
| 105 | <entry>Base event number for driver-private events.</entry> | ||
| 106 | </row> | ||
| 107 | </tbody> | ||
| 108 | </tgroup> | ||
| 109 | </table> | ||
| 110 | |||
| 111 | <table frame="none" pgwide="1" id="v4l2-event-vsync"> | ||
| 112 | <title>struct <structname>v4l2_event_vsync</structname></title> | ||
| 113 | <tgroup cols="3"> | ||
| 114 | &cs-str; | ||
| 115 | <tbody valign="top"> | ||
| 116 | <row> | ||
| 117 | <entry>__u8</entry> | ||
| 118 | <entry><structfield>field</structfield></entry> | ||
| 119 | <entry>The upcoming field. See &v4l2-field;.</entry> | ||
| 120 | </row> | ||
| 121 | </tbody> | ||
| 122 | </tgroup> | ||
| 123 | </table> | ||
| 124 | |||
| 125 | </refsect1> | ||
| 126 | </refentry> | ||
| 127 | <!-- | ||
| 128 | Local Variables: | ||
| 129 | mode: sgml | ||
| 130 | sgml-parent-document: "v4l2.sgml" | ||
| 131 | indent-tabs-mode: nil | ||
| 132 | End: | ||
| 133 | --> | ||
diff --git a/Documentation/dvb/get_dvb_firmware b/Documentation/dvb/get_dvb_firmware index 3348d313fbe0..c466f5831f15 100644..100755 --- a/Documentation/dvb/get_dvb_firmware +++ b/Documentation/dvb/get_dvb_firmware | |||
| @@ -27,7 +27,7 @@ use IO::Handle; | |||
| 27 | "or51211", "or51132_qam", "or51132_vsb", "bluebird", | 27 | "or51211", "or51132_qam", "or51132_vsb", "bluebird", |
| 28 | "opera1", "cx231xx", "cx18", "cx23885", "pvrusb2", "mpc718", | 28 | "opera1", "cx231xx", "cx18", "cx23885", "pvrusb2", "mpc718", |
| 29 | "af9015", "ngene", "az6027", "lme2510_lg", "lme2510c_s7395", | 29 | "af9015", "ngene", "az6027", "lme2510_lg", "lme2510c_s7395", |
| 30 | "lme2510c_s7395_old"); | 30 | "lme2510c_s7395_old", "drxk", "drxk_terratec_h5"); |
| 31 | 31 | ||
| 32 | # Check args | 32 | # Check args |
| 33 | syntax() if (scalar(@ARGV) != 1); | 33 | syntax() if (scalar(@ARGV) != 1); |
| @@ -634,6 +634,37 @@ sub lme2510c_s7395_old { | |||
| 634 | $outfile; | 634 | $outfile; |
| 635 | } | 635 | } |
| 636 | 636 | ||
| 637 | sub drxk { | ||
| 638 | my $url = "http://l4m-daten.de/files/"; | ||
| 639 | my $zipfile = "DDTuner.zip"; | ||
| 640 | my $hash = "f5a37b9a20a3534997997c0b1382a3e5"; | ||
| 641 | my $tmpdir = tempdir(DIR => "/tmp", CLEANUP => 1); | ||
| 642 | my $drvfile = "DDTuner.sys"; | ||
| 643 | my $fwfile = "drxk_a3.mc"; | ||
| 644 | |||
| 645 | checkstandard(); | ||
| 646 | |||
| 647 | wgetfile($zipfile, $url . $zipfile); | ||
| 648 | verify($zipfile, $hash); | ||
| 649 | unzip($zipfile, $tmpdir); | ||
| 650 | extract("$tmpdir/$drvfile", 0x14dd8, 15634, "$fwfile"); | ||
| 651 | |||
| 652 | "$fwfile" | ||
| 653 | } | ||
| 654 | |||
| 655 | sub drxk_terratec_h5 { | ||
| 656 | my $url = "http://www.linuxtv.org/downloads/firmware/"; | ||
| 657 | my $hash = "19000dada8e2741162ccc50cc91fa7f1"; | ||
| 658 | my $fwfile = "dvb-usb-terratec-h5-drxk.fw"; | ||
| 659 | |||
| 660 | checkstandard(); | ||
| 661 | |||
| 662 | wgetfile($fwfile, $url . $fwfile); | ||
| 663 | verify($fwfile, $hash); | ||
| 664 | |||
| 665 | "$fwfile" | ||
| 666 | } | ||
| 667 | |||
| 637 | # --------------------------------------------------------------- | 668 | # --------------------------------------------------------------- |
| 638 | # Utilities | 669 | # Utilities |
| 639 | 670 | ||
diff --git a/Documentation/feature-removal-schedule.txt b/Documentation/feature-removal-schedule.txt index dfd6a9f4a583..ea0bace0124a 100644 --- a/Documentation/feature-removal-schedule.txt +++ b/Documentation/feature-removal-schedule.txt | |||
| @@ -527,6 +527,41 @@ Who: Laurent Pinchart <laurent.pinchart@ideasonboard.com> | |||
| 527 | 527 | ||
| 528 | ---------------------------- | 528 | ---------------------------- |
| 529 | 529 | ||
| 530 | What: Support for driver specific ioctls in the pwc driver (everything | ||
| 531 | defined in media/pwc-ioctl.h) | ||
| 532 | When: 3.3 | ||
| 533 | Why: This stems from the v4l1 era, with v4l2 everything can be done with | ||
| 534 | standardized v4l2 API calls | ||
| 535 | Who: Hans de Goede <hdegoede@redhat.com> | ||
| 536 | |||
| 537 | ---------------------------- | ||
| 538 | |||
| 539 | What: Driver specific sysfs API in the pwc driver | ||
| 540 | When: 3.3 | ||
| 541 | Why: Setting pan/tilt should be done with v4l2 controls, like with other | ||
| 542 | cams. The button is available as a standard input device | ||
| 543 | Who: Hans de Goede <hdegoede@redhat.com> | ||
| 544 | |||
| 545 | ---------------------------- | ||
| 546 | |||
| 547 | What: Driver specific use of pixfmt.priv in the pwc driver | ||
| 548 | When: 3.3 | ||
| 549 | Why: The .priv field never was intended for this, setting a framerate is | ||
| 550 | support using the standardized S_PARM ioctl | ||
| 551 | Who: Hans de Goede <hdegoede@redhat.com> | ||
| 552 | |||
| 553 | ---------------------------- | ||
| 554 | |||
| 555 | What: Software emulation of arbritary resolutions in the pwc driver | ||
| 556 | When: 3.3 | ||
| 557 | Why: The pwc driver claims to support any resolution between 160x120 | ||
| 558 | and 640x480, but emulates this by simply drawing a black border | ||
| 559 | around the image. Userspace can draw its own black border if it | ||
| 560 | really wants one. | ||
| 561 | Who: Hans de Goede <hdegoede@redhat.com> | ||
| 562 | |||
| 563 | ---------------------------- | ||
| 564 | |||
| 530 | What: For VIDIOC_S_FREQUENCY the type field must match the device node's type. | 565 | What: For VIDIOC_S_FREQUENCY the type field must match the device node's type. |
| 531 | If not, return -EINVAL. | 566 | If not, return -EINVAL. |
| 532 | When: 3.2 | 567 | When: 3.2 |
diff --git a/Documentation/media-framework.txt b/Documentation/media-framework.txt index 76a2087db205..669b5fb03a86 100644 --- a/Documentation/media-framework.txt +++ b/Documentation/media-framework.txt | |||
| @@ -310,7 +310,7 @@ is non-immutable. The operation must either configure the hardware or store | |||
| 310 | the configuration information to be applied later. | 310 | the configuration information to be applied later. |
| 311 | 311 | ||
| 312 | Link configuration must not have any side effect on other links. If an enabled | 312 | Link configuration must not have any side effect on other links. If an enabled |
| 313 | link at a sink pad prevents another link at the same pad from being disabled, | 313 | link at a sink pad prevents another link at the same pad from being enabled, |
| 314 | the link_setup operation must return -EBUSY and can't implicitly disable the | 314 | the link_setup operation must return -EBUSY and can't implicitly disable the |
| 315 | first enabled link. | 315 | first enabled link. |
| 316 | 316 | ||
diff --git a/Documentation/video4linux/API.html b/Documentation/video4linux/API.html index d72fd2aa9158..256f8efa992c 100644 --- a/Documentation/video4linux/API.html +++ b/Documentation/video4linux/API.html | |||
| @@ -9,7 +9,7 @@ | |||
| 9 | <table border="0"> | 9 | <table border="0"> |
| 10 | <tr> | 10 | <tr> |
| 11 | <td> | 11 | <td> |
| 12 | <a href="http://www.linuxtv.org/downloads/video4linux/API/V4L1_API.html">V4L original API</a> | 12 | <a href="http://linuxtv.org/downloads/legacy/video4linux/API/V4L1_API.html">V4L original API</a> |
| 13 | </td> | 13 | </td> |
| 14 | <td> | 14 | <td> |
| 15 | Obsoleted by V4L2 API | 15 | Obsoleted by V4L2 API |
diff --git a/Documentation/video4linux/CARDLIST.cx23885 b/Documentation/video4linux/CARDLIST.cx23885 index 87c46347bd63..8910449d23a8 100644 --- a/Documentation/video4linux/CARDLIST.cx23885 +++ b/Documentation/video4linux/CARDLIST.cx23885 | |||
| @@ -27,3 +27,5 @@ | |||
| 27 | 26 -> Hauppauge WinTV-HVR1290 [0070:8551] | 27 | 26 -> Hauppauge WinTV-HVR1290 [0070:8551] |
| 28 | 27 -> Mygica X8558 PRO DMB-TH [14f1:8578] | 28 | 27 -> Mygica X8558 PRO DMB-TH [14f1:8578] |
| 29 | 28 -> LEADTEK WinFast PxTV1200 [107d:6f22] | 29 | 28 -> LEADTEK WinFast PxTV1200 [107d:6f22] |
| 30 | 29 -> GoTView X5 3D Hybrid [5654:2390] | ||
| 31 | 30 -> NetUP Dual DVB-T/C-CI RF [1b55:e2e4] | ||
diff --git a/Documentation/video4linux/CARDLIST.cx88 b/Documentation/video4linux/CARDLIST.cx88 index 42517d9121de..d9c0f119196d 100644 --- a/Documentation/video4linux/CARDLIST.cx88 +++ b/Documentation/video4linux/CARDLIST.cx88 | |||
| @@ -84,3 +84,4 @@ | |||
| 84 | 83 -> Prof 7301 DVB-S/S2 [b034:3034] | 84 | 83 -> Prof 7301 DVB-S/S2 [b034:3034] |
| 85 | 84 -> Samsung SMT 7020 DVB-S [18ac:dc00,18ac:dccd] | 85 | 84 -> Samsung SMT 7020 DVB-S [18ac:dc00,18ac:dccd] |
| 86 | 85 -> Twinhan VP-1027 DVB-S [1822:0023] | 86 | 85 -> Twinhan VP-1027 DVB-S [1822:0023] |
| 87 | 86 -> TeVii S464 DVB-S/S2 [d464:9022] | ||
diff --git a/Documentation/video4linux/CARDLIST.em28xx b/Documentation/video4linux/CARDLIST.em28xx index 9aae449440dc..4a7b3df6d8bd 100644 --- a/Documentation/video4linux/CARDLIST.em28xx +++ b/Documentation/video4linux/CARDLIST.em28xx | |||
| @@ -74,3 +74,5 @@ | |||
| 74 | 74 -> Actionmaster/LinXcel/Digitus VC211A (em2800) | 74 | 74 -> Actionmaster/LinXcel/Digitus VC211A (em2800) |
| 75 | 75 -> Dikom DK300 (em2882) | 75 | 75 -> Dikom DK300 (em2882) |
| 76 | 76 -> KWorld PlusTV 340U or UB435-Q (ATSC) (em2870) [1b80:a340] | 76 | 76 -> KWorld PlusTV 340U or UB435-Q (ATSC) (em2870) [1b80:a340] |
| 77 | 77 -> EM2874 Leadership ISDBT (em2874) | ||
| 78 | 78 -> PCTV nanoStick T2 290e (em28174) | ||
diff --git a/Documentation/video4linux/CARDLIST.saa7134 b/Documentation/video4linux/CARDLIST.saa7134 index 6b4c72d8862d..7efae9bd73ed 100644 --- a/Documentation/video4linux/CARDLIST.saa7134 +++ b/Documentation/video4linux/CARDLIST.saa7134 | |||
| @@ -182,3 +182,7 @@ | |||
| 182 | 181 -> TechoTrend TT-budget T-3000 [13c2:2804] | 182 | 181 -> TechoTrend TT-budget T-3000 [13c2:2804] |
| 183 | 182 -> Kworld PCI SBTVD/ISDB-T Full-Seg Hybrid [17de:b136] | 183 | 182 -> Kworld PCI SBTVD/ISDB-T Full-Seg Hybrid [17de:b136] |
| 184 | 183 -> Compro VideoMate Vista M1F [185b:c900] | 184 | 183 -> Compro VideoMate Vista M1F [185b:c900] |
| 185 | 184 -> Encore ENLTV-FM 3 [1a7f:2108] | ||
| 186 | 185 -> MagicPro ProHDTV Pro2 DMB-TH/Hybrid [17de:d136] | ||
| 187 | 186 -> Beholder BeholdTV 501 [5ace:5010] | ||
| 188 | 187 -> Beholder BeholdTV 503 FM [5ace:5030] | ||
diff --git a/Documentation/video4linux/CARDLIST.tuner b/Documentation/video4linux/CARDLIST.tuner index e67c1db96854..6323b7a20719 100644 --- a/Documentation/video4linux/CARDLIST.tuner +++ b/Documentation/video4linux/CARDLIST.tuner | |||
| @@ -78,8 +78,10 @@ tuner=77 - TCL tuner MF02GIP-5N-E | |||
| 78 | tuner=78 - Philips FMD1216MEX MK3 Hybrid Tuner | 78 | tuner=78 - Philips FMD1216MEX MK3 Hybrid Tuner |
| 79 | tuner=79 - Philips PAL/SECAM multi (FM1216 MK5) | 79 | tuner=79 - Philips PAL/SECAM multi (FM1216 MK5) |
| 80 | tuner=80 - Philips FQ1216LME MK3 PAL/SECAM w/active loopthrough | 80 | tuner=80 - Philips FQ1216LME MK3 PAL/SECAM w/active loopthrough |
| 81 | tuner=81 - Xceive 4000 tuner | ||
| 81 | tuner=81 - Partsnic (Daewoo) PTI-5NF05 | 82 | tuner=81 - Partsnic (Daewoo) PTI-5NF05 |
| 82 | tuner=82 - Philips CU1216L | 83 | tuner=82 - Philips CU1216L |
| 83 | tuner=83 - NXP TDA18271 | 84 | tuner=83 - NXP TDA18271 |
| 84 | tuner=84 - Sony BTF-Pxn01Z | 85 | tuner=84 - Sony BTF-Pxn01Z |
| 85 | tuner=85 - Philips FQ1236 MK5 | 86 | tuner=85 - Philips FQ1236 MK5 |
| 87 | tuner=86 - Tena TNF5337 MFD | ||
diff --git a/Documentation/video4linux/CARDLIST.usbvision b/Documentation/video4linux/CARDLIST.usbvision index 0b72d3fee17e..6fd1af365142 100644 --- a/Documentation/video4linux/CARDLIST.usbvision +++ b/Documentation/video4linux/CARDLIST.usbvision | |||
| @@ -63,3 +63,5 @@ | |||
| 63 | 62 -> Pinnacle PCTV Bungee USB (PAL) FM [2304:0419] | 63 | 62 -> Pinnacle PCTV Bungee USB (PAL) FM [2304:0419] |
| 64 | 63 -> Hauppauge WinTv-USB [2400:4200] | 64 | 63 -> Hauppauge WinTv-USB [2400:4200] |
| 65 | 64 -> Pinnacle Studio PCTV USB (NTSC) FM V3 [2304:0113] | 65 | 64 -> Pinnacle Studio PCTV USB (NTSC) FM V3 [2304:0113] |
| 66 | 65 -> Nogatech USB MicroCam NTSC (NV3000N) [0573:3000] | ||
| 67 | 66 -> Nogatech USB MicroCam PAL (NV3001P) [0573:3001] | ||
diff --git a/Documentation/video4linux/README.davinci-vpbe b/Documentation/video4linux/README.davinci-vpbe new file mode 100644 index 000000000000..7a460b0685bb --- /dev/null +++ b/Documentation/video4linux/README.davinci-vpbe | |||
| @@ -0,0 +1,93 @@ | |||
| 1 | |||
| 2 | VPBE V4L2 driver design | ||
| 3 | ====================================================================== | ||
| 4 | |||
| 5 | File partitioning | ||
| 6 | ----------------- | ||
| 7 | V4L2 display device driver | ||
| 8 | drivers/media/video/davinci/vpbe_display.c | ||
| 9 | drivers/media/video/davinci/vpbe_display.h | ||
| 10 | |||
| 11 | VPBE display controller | ||
| 12 | drivers/media/video/davinci/vpbe.c | ||
| 13 | drivers/media/video/davinci/vpbe.h | ||
| 14 | |||
| 15 | VPBE venc sub device driver | ||
| 16 | drivers/media/video/davinci/vpbe_venc.c | ||
| 17 | drivers/media/video/davinci/vpbe_venc.h | ||
| 18 | drivers/media/video/davinci/vpbe_venc_regs.h | ||
| 19 | |||
| 20 | VPBE osd driver | ||
| 21 | drivers/media/video/davinci/vpbe_osd.c | ||
| 22 | drivers/media/video/davinci/vpbe_osd.h | ||
| 23 | drivers/media/video/davinci/vpbe_osd_regs.h | ||
| 24 | |||
| 25 | Functional partitioning | ||
| 26 | ----------------------- | ||
| 27 | |||
| 28 | Consists of the following (in the same order as the list under file | ||
| 29 | partitioning):- | ||
| 30 | |||
| 31 | 1. V4L2 display driver | ||
| 32 | Implements creation of video2 and video3 device nodes and | ||
| 33 | provides v4l2 device interface to manage VID0 and VID1 layers. | ||
| 34 | |||
| 35 | 2. Display controller | ||
| 36 | Loads up VENC, OSD and external encoders such as ths8200. It provides | ||
| 37 | a set of API calls to V4L2 drivers to set the output/standards | ||
| 38 | in the VENC or external sub devices. It also provides | ||
| 39 | a device object to access the services from OSD subdevice | ||
| 40 | using sub device ops. The connection of external encoders to VENC LCD | ||
| 41 | controller port is done at init time based on default output and standard | ||
| 42 | selection or at run time when application change the output through | ||
| 43 | V4L2 IOCTLs. | ||
| 44 | |||
| 45 | When connected to an external encoder, vpbe controller is also responsible | ||
| 46 | for setting up the interface between VENC and external encoders based on | ||
| 47 | board specific settings (specified in board-xxx-evm.c). This allows | ||
| 48 | interfacing external encoders such as ths8200. The setup_if_config() | ||
| 49 | is implemented for this as well as configure_venc() (part of the next patch) | ||
| 50 | API to set timings in VENC for a specific display resolution. As of this | ||
| 51 | patch series, the interconnection and enabling and setting of the external | ||
| 52 | encoders is not present, and would be a part of the next patch series. | ||
| 53 | |||
| 54 | 3. VENC subdevice module | ||
| 55 | Responsible for setting outputs provided through internal DACs and also | ||
| 56 | setting timings at LCD controller port when external encoders are connected | ||
| 57 | at the port or LCD panel timings required. When external encoder/LCD panel | ||
| 58 | is connected, the timings for a specific standard/preset is retrieved from | ||
| 59 | the board specific table and the values are used to set the timings in | ||
| 60 | venc using non-standard timing mode. | ||
| 61 | |||
| 62 | Support LCD Panel displays using the VENC. For example to support a Logic | ||
| 63 | PD display, it requires setting up the LCD controller port with a set of | ||
| 64 | timings for the resolution supported and setting the dot clock. So we could | ||
| 65 | add the available outputs as a board specific entry (i.e add the "LogicPD" | ||
| 66 | output name to board-xxx-evm.c). A table of timings for various LCDs | ||
| 67 | supported can be maintained in the board specific setup file to support | ||
| 68 | various LCD displays.As of this patch a basic driver is present, and this | ||
| 69 | support for external encoders and displays forms a part of the next | ||
| 70 | patch series. | ||
| 71 | |||
| 72 | 4. OSD module | ||
| 73 | OSD module implements all OSD layer management and hardware specific | ||
| 74 | features. The VPBE module interacts with the OSD for enabling and | ||
| 75 | disabling appropriate features of the OSD. | ||
| 76 | |||
| 77 | Current status:- | ||
| 78 | |||
| 79 | A fully functional working version of the V4L2 driver is available. This | ||
| 80 | driver has been tested with NTSC and PAL standards and buffer streaming. | ||
| 81 | |||
| 82 | Following are TBDs. | ||
| 83 | |||
| 84 | vpbe display controller | ||
| 85 | - Add support for external encoders. | ||
| 86 | - add support for selecting external encoder as default at probe time. | ||
| 87 | |||
| 88 | vpbe venc sub device | ||
| 89 | - add timings for supporting ths8200 | ||
| 90 | - add support for LogicPD LCD. | ||
| 91 | |||
| 92 | FB drivers | ||
| 93 | - Add support for fbdev drivers.- Ready and part of subsequent patches. | ||
diff --git a/Documentation/video4linux/v4l2-controls.txt b/Documentation/video4linux/v4l2-controls.txt index 881e7f44491b..9346fc8cbf2b 100644 --- a/Documentation/video4linux/v4l2-controls.txt +++ b/Documentation/video4linux/v4l2-controls.txt | |||
| @@ -277,16 +277,13 @@ implement g_volatile_ctrl like this: | |||
| 277 | { | 277 | { |
| 278 | switch (ctrl->id) { | 278 | switch (ctrl->id) { |
| 279 | case V4L2_CID_BRIGHTNESS: | 279 | case V4L2_CID_BRIGHTNESS: |
| 280 | ctrl->cur.val = read_reg(0x123); | 280 | ctrl->val = read_reg(0x123); |
| 281 | break; | 281 | break; |
| 282 | } | 282 | } |
| 283 | } | 283 | } |
| 284 | 284 | ||
| 285 | The 'new value' union is not used in g_volatile_ctrl. In general controls | 285 | Note that you use the 'new value' union as well in g_volatile_ctrl. In general |
| 286 | that need to implement g_volatile_ctrl are read-only controls. | 286 | controls that need to implement g_volatile_ctrl are read-only controls. |
| 287 | |||
| 288 | Note that if one or more controls in a control cluster are marked as volatile, | ||
| 289 | then all the controls in the cluster are seen as volatile. | ||
| 290 | 287 | ||
| 291 | To mark a control as volatile you have to set the is_volatile flag: | 288 | To mark a control as volatile you have to set the is_volatile flag: |
| 292 | 289 | ||
| @@ -453,6 +450,25 @@ In the example above the following are equivalent for the VOLUME case: | |||
| 453 | ctrl == ctrl->cluster[AUDIO_CL_VOLUME] == state->audio_cluster[AUDIO_CL_VOLUME] | 450 | ctrl == ctrl->cluster[AUDIO_CL_VOLUME] == state->audio_cluster[AUDIO_CL_VOLUME] |
| 454 | ctrl->cluster[AUDIO_CL_MUTE] == state->audio_cluster[AUDIO_CL_MUTE] | 451 | ctrl->cluster[AUDIO_CL_MUTE] == state->audio_cluster[AUDIO_CL_MUTE] |
| 455 | 452 | ||
| 453 | In practice using cluster arrays like this becomes very tiresome. So instead | ||
| 454 | the following equivalent method is used: | ||
| 455 | |||
| 456 | struct { | ||
| 457 | /* audio cluster */ | ||
| 458 | struct v4l2_ctrl *volume; | ||
| 459 | struct v4l2_ctrl *mute; | ||
| 460 | }; | ||
| 461 | |||
| 462 | The anonymous struct is used to clearly 'cluster' these two control pointers, | ||
| 463 | but it serves no other purpose. The effect is the same as creating an | ||
| 464 | array with two control pointers. So you can just do: | ||
| 465 | |||
| 466 | state->volume = v4l2_ctrl_new_std(&state->ctrl_handler, ...); | ||
| 467 | state->mute = v4l2_ctrl_new_std(&state->ctrl_handler, ...); | ||
| 468 | v4l2_ctrl_cluster(2, &state->volume); | ||
| 469 | |||
| 470 | And in foo_s_ctrl you can use these pointers directly: state->mute->val. | ||
| 471 | |||
| 456 | Note that controls in a cluster may be NULL. For example, if for some | 472 | Note that controls in a cluster may be NULL. For example, if for some |
| 457 | reason mute was never added (because the hardware doesn't support that | 473 | reason mute was never added (because the hardware doesn't support that |
| 458 | particular feature), then mute will be NULL. So in that case we have a | 474 | particular feature), then mute will be NULL. So in that case we have a |
| @@ -475,6 +491,43 @@ controls, then the 'is_new' flag would be 1 for both controls. | |||
| 475 | The 'is_new' flag is always 1 when called from v4l2_ctrl_handler_setup(). | 491 | The 'is_new' flag is always 1 when called from v4l2_ctrl_handler_setup(). |
| 476 | 492 | ||
| 477 | 493 | ||
| 494 | Handling autogain/gain-type Controls with Auto Clusters | ||
| 495 | ======================================================= | ||
| 496 | |||
| 497 | A common type of control cluster is one that handles 'auto-foo/foo'-type | ||
| 498 | controls. Typical examples are autogain/gain, autoexposure/exposure, | ||
| 499 | autowhitebalance/red balance/blue balance. In all cases you have one controls | ||
| 500 | that determines whether another control is handled automatically by the hardware, | ||
| 501 | or whether it is under manual control from the user. | ||
| 502 | |||
| 503 | If the cluster is in automatic mode, then the manual controls should be | ||
| 504 | marked inactive. When the volatile controls are read the g_volatile_ctrl | ||
| 505 | operation should return the value that the hardware's automatic mode set up | ||
| 506 | automatically. | ||
| 507 | |||
| 508 | If the cluster is put in manual mode, then the manual controls should become | ||
| 509 | active again and the is_volatile flag should be ignored (so g_volatile_ctrl is | ||
| 510 | no longer called while in manual mode). | ||
| 511 | |||
| 512 | Finally the V4L2_CTRL_FLAG_UPDATE should be set for the auto control since | ||
| 513 | changing that control affects the control flags of the manual controls. | ||
| 514 | |||
| 515 | In order to simplify this a special variation of v4l2_ctrl_cluster was | ||
| 516 | introduced: | ||
| 517 | |||
| 518 | void v4l2_ctrl_auto_cluster(unsigned ncontrols, struct v4l2_ctrl **controls, | ||
| 519 | u8 manual_val, bool set_volatile); | ||
| 520 | |||
| 521 | The first two arguments are identical to v4l2_ctrl_cluster. The third argument | ||
| 522 | tells the framework which value switches the cluster into manual mode. The | ||
| 523 | last argument will optionally set the is_volatile flag for the non-auto controls. | ||
| 524 | |||
| 525 | The first control of the cluster is assumed to be the 'auto' control. | ||
| 526 | |||
| 527 | Using this function will ensure that you don't need to handle all the complex | ||
| 528 | flag and volatile handling. | ||
| 529 | |||
| 530 | |||
| 478 | VIDIOC_LOG_STATUS Support | 531 | VIDIOC_LOG_STATUS Support |
| 479 | ========================= | 532 | ========================= |
| 480 | 533 | ||
| @@ -636,9 +689,7 @@ button controls are write-only controls. | |||
| 636 | -EINVAL as the spec says. | 689 | -EINVAL as the spec says. |
| 637 | 690 | ||
| 638 | 5) The spec does not mention what should happen when you try to set/get a | 691 | 5) The spec does not mention what should happen when you try to set/get a |
| 639 | control class controls. ivtv currently returns -EINVAL (indicating that the | 692 | control class controls. The framework will return -EACCES. |
| 640 | control ID does not exist) while the framework will return -EACCES, which | ||
| 641 | makes more sense. | ||
| 642 | 693 | ||
| 643 | 694 | ||
| 644 | Proposals for Extensions | 695 | Proposals for Extensions |
diff --git a/Documentation/video4linux/v4l2-framework.txt b/Documentation/video4linux/v4l2-framework.txt index cf21f7aae976..f8dcabf7852c 100644 --- a/Documentation/video4linux/v4l2-framework.txt +++ b/Documentation/video4linux/v4l2-framework.txt | |||
| @@ -817,11 +817,7 @@ int my_open(struct file *file) | |||
| 817 | 817 | ||
| 818 | ... | 818 | ... |
| 819 | 819 | ||
| 820 | ret = v4l2_fh_init(&my_fh->fh, vfd); | 820 | v4l2_fh_init(&my_fh->fh, vfd); |
| 821 | if (ret) { | ||
| 822 | kfree(my_fh); | ||
| 823 | return ret; | ||
| 824 | } | ||
| 825 | 821 | ||
| 826 | ... | 822 | ... |
| 827 | 823 | ||
| @@ -844,7 +840,7 @@ int my_release(struct file *file) | |||
| 844 | 840 | ||
| 845 | Below is a short description of the v4l2_fh functions used: | 841 | Below is a short description of the v4l2_fh functions used: |
| 846 | 842 | ||
| 847 | int v4l2_fh_init(struct v4l2_fh *fh, struct video_device *vdev) | 843 | void v4l2_fh_init(struct v4l2_fh *fh, struct video_device *vdev) |
| 848 | 844 | ||
| 849 | Initialise the file handle. This *MUST* be performed in the driver's | 845 | Initialise the file handle. This *MUST* be performed in the driver's |
| 850 | v4l2_file_operations->open() handler. | 846 | v4l2_file_operations->open() handler. |
| @@ -901,14 +897,38 @@ V4L2 events | |||
| 901 | The V4L2 events provide a generic way to pass events to user space. | 897 | The V4L2 events provide a generic way to pass events to user space. |
| 902 | The driver must use v4l2_fh to be able to support V4L2 events. | 898 | The driver must use v4l2_fh to be able to support V4L2 events. |
| 903 | 899 | ||
| 904 | Useful functions: | 900 | Events are defined by a type and an optional ID. The ID may refer to a V4L2 |
| 901 | object such as a control ID. If unused, then the ID is 0. | ||
| 902 | |||
| 903 | When the user subscribes to an event the driver will allocate a number of | ||
| 904 | kevent structs for that event. So every (type, ID) event tuple will have | ||
| 905 | its own set of kevent structs. This guarantees that if a driver is generating | ||
| 906 | lots of events of one type in a short time, then that will not overwrite | ||
| 907 | events of another type. | ||
| 908 | |||
| 909 | But if you get more events of one type than the number of kevents that were | ||
| 910 | reserved, then the oldest event will be dropped and the new one added. | ||
| 911 | |||
| 912 | Furthermore, the internal struct v4l2_subscribed_event has merge() and | ||
| 913 | replace() callbacks which drivers can set. These callbacks are called when | ||
| 914 | a new event is raised and there is no more room. The replace() callback | ||
| 915 | allows you to replace the payload of the old event with that of the new event, | ||
| 916 | merging any relevant data from the old payload into the new payload that | ||
| 917 | replaces it. It is called when this event type has only one kevent struct | ||
| 918 | allocated. The merge() callback allows you to merge the oldest event payload | ||
| 919 | into that of the second-oldest event payload. It is called when there are two | ||
| 920 | or more kevent structs allocated. | ||
| 905 | 921 | ||
| 906 | - v4l2_event_alloc() | 922 | This way no status information is lost, just the intermediate steps leading |
| 923 | up to that state. | ||
| 907 | 924 | ||
| 908 | To use events, the driver must allocate events for the file handle. By | 925 | A good example of these replace/merge callbacks is in v4l2-event.c: |
| 909 | calling the function more than once, the driver may assure that at least n | 926 | ctrls_replace() and ctrls_merge() callbacks for the control event. |
| 910 | events in total have been allocated. The function may not be called in | 927 | |
| 911 | atomic context. | 928 | Note: these callbacks can be called from interrupt context, so they must be |
| 929 | fast. | ||
| 930 | |||
| 931 | Useful functions: | ||
| 912 | 932 | ||
| 913 | - v4l2_event_queue() | 933 | - v4l2_event_queue() |
| 914 | 934 | ||
| @@ -920,7 +940,9 @@ Useful functions: | |||
| 920 | 940 | ||
| 921 | The video_device->ioctl_ops->vidioc_subscribe_event must check the driver | 941 | The video_device->ioctl_ops->vidioc_subscribe_event must check the driver |
| 922 | is able to produce events with specified event id. Then it calls | 942 | is able to produce events with specified event id. Then it calls |
| 923 | v4l2_event_subscribe() to subscribe the event. | 943 | v4l2_event_subscribe() to subscribe the event. The last argument is the |
| 944 | size of the event queue for this event. If it is 0, then the framework | ||
| 945 | will fill in a default value (this depends on the event type). | ||
| 924 | 946 | ||
| 925 | - v4l2_event_unsubscribe() | 947 | - v4l2_event_unsubscribe() |
| 926 | 948 | ||
| @@ -935,14 +957,8 @@ Useful functions: | |||
| 935 | 957 | ||
| 936 | Returns the number of pending events. Useful when implementing poll. | 958 | Returns the number of pending events. Useful when implementing poll. |
| 937 | 959 | ||
| 938 | Drivers do not initialise events directly. The events are initialised | ||
| 939 | through v4l2_fh_init() if video_device->ioctl_ops->vidioc_subscribe_event is | ||
| 940 | non-NULL. This *MUST* be performed in the driver's | ||
| 941 | v4l2_file_operations->open() handler. | ||
| 942 | |||
| 943 | Events are delivered to user space through the poll system call. The driver | 960 | Events are delivered to user space through the poll system call. The driver |
| 944 | can use v4l2_fh->events->wait wait_queue_head_t as the argument for | 961 | can use v4l2_fh->wait (a wait_queue_head_t) as the argument for poll_wait(). |
| 945 | poll_wait(). | ||
| 946 | 962 | ||
| 947 | There are standard and private events. New standard events must use the | 963 | There are standard and private events. New standard events must use the |
| 948 | smallest available event type. The drivers must allocate their events from | 964 | smallest available event type. The drivers must allocate their events from |
| @@ -952,5 +968,4 @@ The first event type in the class is reserved for future use, so the first | |||
| 952 | available event type is 'class base + 1'. | 968 | available event type is 'class base + 1'. |
| 953 | 969 | ||
| 954 | An example on how the V4L2 events may be used can be found in the OMAP | 970 | An example on how the V4L2 events may be used can be found in the OMAP |
| 955 | 3 ISP driver available at <URL:http://gitorious.org/omap3camera> as of | 971 | 3 ISP driver (drivers/media/video/omap3isp). |
| 956 | writing this. | ||
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c index cc503aa89c5e..5a886cd2c598 100644 --- a/arch/arm/mach-omap2/board-rx51-peripherals.c +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c | |||
| @@ -418,6 +418,10 @@ static struct regulator_consumer_supply rx51_vmmc1_supply[] = { | |||
| 418 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), | 418 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), |
| 419 | }; | 419 | }; |
| 420 | 420 | ||
| 421 | static struct regulator_consumer_supply rx51_vaux2_supply[] = { | ||
| 422 | REGULATOR_SUPPLY("vdds_csib", "omap3isp"), | ||
| 423 | }; | ||
| 424 | |||
| 421 | static struct regulator_consumer_supply rx51_vaux3_supply[] = { | 425 | static struct regulator_consumer_supply rx51_vaux3_supply[] = { |
| 422 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), | 426 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), |
| 423 | }; | 427 | }; |
| @@ -479,6 +483,8 @@ static struct regulator_init_data rx51_vaux2 = { | |||
| 479 | .valid_ops_mask = REGULATOR_CHANGE_MODE | 483 | .valid_ops_mask = REGULATOR_CHANGE_MODE |
| 480 | | REGULATOR_CHANGE_STATUS, | 484 | | REGULATOR_CHANGE_STATUS, |
| 481 | }, | 485 | }, |
| 486 | .num_consumer_supplies = ARRAY_SIZE(rx51_vaux2_supply), | ||
| 487 | .consumer_supplies = rx51_vaux2_supply, | ||
| 482 | }; | 488 | }; |
| 483 | 489 | ||
| 484 | /* VAUX3 - adds more power to VIO_18 rail */ | 490 | /* VAUX3 - adds more power to VIO_18 rail */ |
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c index 837138e369bc..9e0856b2f9e9 100644 --- a/arch/arm/mach-shmobile/board-ap4evb.c +++ b/arch/arm/mach-shmobile/board-ap4evb.c | |||
| @@ -957,19 +957,16 @@ static struct resource csi2_resources[] = { | |||
| 957 | }, | 957 | }, |
| 958 | }; | 958 | }; |
| 959 | 959 | ||
| 960 | static struct platform_device csi2_device = { | 960 | static struct sh_mobile_ceu_companion csi2 = { |
| 961 | .name = "sh-mobile-csi2", | 961 | .id = 0, |
| 962 | .id = 0, | ||
| 963 | .num_resources = ARRAY_SIZE(csi2_resources), | 962 | .num_resources = ARRAY_SIZE(csi2_resources), |
| 964 | .resource = csi2_resources, | 963 | .resource = csi2_resources, |
| 965 | .dev = { | 964 | .platform_data = &csi2_info, |
| 966 | .platform_data = &csi2_info, | ||
| 967 | }, | ||
| 968 | }; | 965 | }; |
| 969 | 966 | ||
| 970 | static struct sh_mobile_ceu_info sh_mobile_ceu_info = { | 967 | static struct sh_mobile_ceu_info sh_mobile_ceu_info = { |
| 971 | .flags = SH_CEU_FLAG_USE_8BIT_BUS, | 968 | .flags = SH_CEU_FLAG_USE_8BIT_BUS, |
| 972 | .csi2_dev = &csi2_device.dev, | 969 | .csi2 = &csi2, |
| 973 | }; | 970 | }; |
| 974 | 971 | ||
| 975 | static struct resource ceu_resources[] = { | 972 | static struct resource ceu_resources[] = { |
| @@ -1013,7 +1010,6 @@ static struct platform_device *ap4evb_devices[] __initdata = { | |||
| 1013 | &lcdc1_device, | 1010 | &lcdc1_device, |
| 1014 | &lcdc_device, | 1011 | &lcdc_device, |
| 1015 | &hdmi_device, | 1012 | &hdmi_device, |
| 1016 | &csi2_device, | ||
| 1017 | &ceu_device, | 1013 | &ceu_device, |
| 1018 | &ap4evb_camera, | 1014 | &ap4evb_camera, |
| 1019 | &meram_device, | 1015 | &meram_device, |
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c index 5b36b6c5b448..d41c01f83f15 100644 --- a/arch/arm/mach-shmobile/board-mackerel.c +++ b/arch/arm/mach-shmobile/board-mackerel.c | |||
| @@ -1192,8 +1192,8 @@ static struct platform_device sh_mmcif_device = { | |||
| 1192 | }; | 1192 | }; |
| 1193 | 1193 | ||
| 1194 | 1194 | ||
| 1195 | static int mackerel_camera_add(struct soc_camera_link *icl, struct device *dev); | 1195 | static int mackerel_camera_add(struct soc_camera_device *icd); |
| 1196 | static void mackerel_camera_del(struct soc_camera_link *icl); | 1196 | static void mackerel_camera_del(struct soc_camera_device *icd); |
| 1197 | 1197 | ||
| 1198 | static int camera_set_capture(struct soc_camera_platform_info *info, | 1198 | static int camera_set_capture(struct soc_camera_platform_info *info, |
| 1199 | int enable) | 1199 | int enable) |
| @@ -1232,16 +1232,15 @@ static void mackerel_camera_release(struct device *dev) | |||
| 1232 | soc_camera_platform_release(&camera_device); | 1232 | soc_camera_platform_release(&camera_device); |
| 1233 | } | 1233 | } |
| 1234 | 1234 | ||
| 1235 | static int mackerel_camera_add(struct soc_camera_link *icl, | 1235 | static int mackerel_camera_add(struct soc_camera_device *icd) |
| 1236 | struct device *dev) | ||
| 1237 | { | 1236 | { |
| 1238 | return soc_camera_platform_add(icl, dev, &camera_device, &camera_link, | 1237 | return soc_camera_platform_add(icd, &camera_device, &camera_link, |
| 1239 | mackerel_camera_release, 0); | 1238 | mackerel_camera_release, 0); |
| 1240 | } | 1239 | } |
| 1241 | 1240 | ||
| 1242 | static void mackerel_camera_del(struct soc_camera_link *icl) | 1241 | static void mackerel_camera_del(struct soc_camera_device *icd) |
| 1243 | { | 1242 | { |
| 1244 | soc_camera_platform_del(icl, camera_device, &camera_link); | 1243 | soc_camera_platform_del(icd, camera_device, &camera_link); |
| 1245 | } | 1244 | } |
| 1246 | 1245 | ||
| 1247 | static struct sh_mobile_ceu_info sh_mobile_ceu_info = { | 1246 | static struct sh_mobile_ceu_info sh_mobile_ceu_info = { |
diff --git a/arch/sh/boards/mach-ap325rxa/setup.c b/arch/sh/boards/mach-ap325rxa/setup.c index 1dc924b2f508..d36265758911 100644 --- a/arch/sh/boards/mach-ap325rxa/setup.c +++ b/arch/sh/boards/mach-ap325rxa/setup.c | |||
| @@ -332,8 +332,8 @@ static int camera_set_capture(struct soc_camera_platform_info *info, | |||
| 332 | return ret; | 332 | return ret; |
| 333 | } | 333 | } |
| 334 | 334 | ||
| 335 | static int ap325rxa_camera_add(struct soc_camera_link *icl, struct device *dev); | 335 | static int ap325rxa_camera_add(struct soc_camera_device *icd); |
| 336 | static void ap325rxa_camera_del(struct soc_camera_link *icl); | 336 | static void ap325rxa_camera_del(struct soc_camera_device *icd); |
| 337 | 337 | ||
| 338 | static struct soc_camera_platform_info camera_info = { | 338 | static struct soc_camera_platform_info camera_info = { |
| 339 | .format_name = "UYVY", | 339 | .format_name = "UYVY", |
| @@ -366,24 +366,23 @@ static void ap325rxa_camera_release(struct device *dev) | |||
| 366 | soc_camera_platform_release(&camera_device); | 366 | soc_camera_platform_release(&camera_device); |
| 367 | } | 367 | } |
| 368 | 368 | ||
| 369 | static int ap325rxa_camera_add(struct soc_camera_link *icl, | 369 | static int ap325rxa_camera_add(struct soc_camera_device *icd) |
| 370 | struct device *dev) | ||
| 371 | { | 370 | { |
| 372 | int ret = soc_camera_platform_add(icl, dev, &camera_device, &camera_link, | 371 | int ret = soc_camera_platform_add(icd, &camera_device, &camera_link, |
| 373 | ap325rxa_camera_release, 0); | 372 | ap325rxa_camera_release, 0); |
| 374 | if (ret < 0) | 373 | if (ret < 0) |
| 375 | return ret; | 374 | return ret; |
| 376 | 375 | ||
| 377 | ret = camera_probe(); | 376 | ret = camera_probe(); |
| 378 | if (ret < 0) | 377 | if (ret < 0) |
| 379 | soc_camera_platform_del(icl, camera_device, &camera_link); | 378 | soc_camera_platform_del(icd, camera_device, &camera_link); |
| 380 | 379 | ||
| 381 | return ret; | 380 | return ret; |
| 382 | } | 381 | } |
| 383 | 382 | ||
| 384 | static void ap325rxa_camera_del(struct soc_camera_link *icl) | 383 | static void ap325rxa_camera_del(struct soc_camera_device *icd) |
| 385 | { | 384 | { |
| 386 | soc_camera_platform_del(icl, camera_device, &camera_link); | 385 | soc_camera_platform_del(icd, camera_device, &camera_link); |
| 387 | } | 386 | } |
| 388 | #endif /* CONFIG_I2C */ | 387 | #endif /* CONFIG_I2C */ |
| 389 | 388 | ||
diff --git a/drivers/media/Kconfig b/drivers/media/Kconfig index 6995940b633a..9575db429df4 100644 --- a/drivers/media/Kconfig +++ b/drivers/media/Kconfig | |||
| @@ -68,7 +68,6 @@ config VIDEO_V4L2_SUBDEV_API | |||
| 68 | 68 | ||
| 69 | config DVB_CORE | 69 | config DVB_CORE |
| 70 | tristate "DVB for Linux" | 70 | tristate "DVB for Linux" |
| 71 | depends on NET && INET | ||
| 72 | select CRC32 | 71 | select CRC32 |
| 73 | help | 72 | help |
| 74 | DVB core utility functions for device handling, software fallbacks etc. | 73 | DVB core utility functions for device handling, software fallbacks etc. |
| @@ -85,6 +84,19 @@ config DVB_CORE | |||
| 85 | 84 | ||
| 86 | If unsure say N. | 85 | If unsure say N. |
| 87 | 86 | ||
| 87 | config DVB_NET | ||
| 88 | bool "DVB Network Support" | ||
| 89 | default (NET && INET) | ||
| 90 | depends on NET && INET && DVB_CORE | ||
| 91 | help | ||
| 92 | This option enables DVB Network Support which is a part of the DVB | ||
| 93 | standard. It is used, for example, by automatic firmware updates used | ||
| 94 | on Set-Top-Boxes. It can also be used to access the Internet via the | ||
| 95 | DVB card, if the network provider supports it. | ||
| 96 | |||
| 97 | You may want to disable the network support on embedded devices. If | ||
| 98 | unsure say Y. | ||
| 99 | |||
| 88 | config VIDEO_MEDIA | 100 | config VIDEO_MEDIA |
| 89 | tristate | 101 | tristate |
| 90 | default (DVB_CORE && (VIDEO_DEV = n)) || (VIDEO_DEV && (DVB_CORE = n)) || (DVB_CORE && VIDEO_DEV) | 102 | default (DVB_CORE && (VIDEO_DEV = n)) || (VIDEO_DEV && (DVB_CORE = n)) || (DVB_CORE && VIDEO_DEV) |
diff --git a/drivers/media/common/tuners/Kconfig b/drivers/media/common/tuners/Kconfig index 22d3ca36370e..996302ae210e 100644 --- a/drivers/media/common/tuners/Kconfig +++ b/drivers/media/common/tuners/Kconfig | |||
| @@ -23,6 +23,7 @@ config MEDIA_TUNER | |||
| 23 | depends on VIDEO_MEDIA && I2C | 23 | depends on VIDEO_MEDIA && I2C |
| 24 | select MEDIA_TUNER_XC2028 if !MEDIA_TUNER_CUSTOMISE | 24 | select MEDIA_TUNER_XC2028 if !MEDIA_TUNER_CUSTOMISE |
| 25 | select MEDIA_TUNER_XC5000 if !MEDIA_TUNER_CUSTOMISE | 25 | select MEDIA_TUNER_XC5000 if !MEDIA_TUNER_CUSTOMISE |
| 26 | select MEDIA_TUNER_XC4000 if !MEDIA_TUNER_CUSTOMISE | ||
| 26 | select MEDIA_TUNER_MT20XX if !MEDIA_TUNER_CUSTOMISE | 27 | select MEDIA_TUNER_MT20XX if !MEDIA_TUNER_CUSTOMISE |
| 27 | select MEDIA_TUNER_TDA8290 if !MEDIA_TUNER_CUSTOMISE | 28 | select MEDIA_TUNER_TDA8290 if !MEDIA_TUNER_CUSTOMISE |
| 28 | select MEDIA_TUNER_TEA5761 if !MEDIA_TUNER_CUSTOMISE | 29 | select MEDIA_TUNER_TEA5761 if !MEDIA_TUNER_CUSTOMISE |
| @@ -152,6 +153,15 @@ config MEDIA_TUNER_XC5000 | |||
| 152 | This device is only used inside a SiP called together with a | 153 | This device is only used inside a SiP called together with a |
| 153 | demodulator for now. | 154 | demodulator for now. |
| 154 | 155 | ||
| 156 | config MEDIA_TUNER_XC4000 | ||
| 157 | tristate "Xceive XC4000 silicon tuner" | ||
| 158 | depends on VIDEO_MEDIA && I2C | ||
| 159 | default m if MEDIA_TUNER_CUSTOMISE | ||
| 160 | help | ||
| 161 | A driver for the silicon tuner XC4000 from Xceive. | ||
| 162 | This device is only used inside a SiP called together with a | ||
| 163 | demodulator for now. | ||
| 164 | |||
| 155 | config MEDIA_TUNER_MXL5005S | 165 | config MEDIA_TUNER_MXL5005S |
| 156 | tristate "MaxLinear MSL5005S silicon tuner" | 166 | tristate "MaxLinear MSL5005S silicon tuner" |
| 157 | depends on VIDEO_MEDIA && I2C | 167 | depends on VIDEO_MEDIA && I2C |
diff --git a/drivers/media/common/tuners/Makefile b/drivers/media/common/tuners/Makefile index 2cb4f5327843..20d24fca2cfb 100644 --- a/drivers/media/common/tuners/Makefile +++ b/drivers/media/common/tuners/Makefile | |||
| @@ -16,6 +16,7 @@ obj-$(CONFIG_MEDIA_TUNER_TDA9887) += tda9887.o | |||
| 16 | obj-$(CONFIG_MEDIA_TUNER_TDA827X) += tda827x.o | 16 | obj-$(CONFIG_MEDIA_TUNER_TDA827X) += tda827x.o |
| 17 | obj-$(CONFIG_MEDIA_TUNER_TDA18271) += tda18271.o | 17 | obj-$(CONFIG_MEDIA_TUNER_TDA18271) += tda18271.o |
| 18 | obj-$(CONFIG_MEDIA_TUNER_XC5000) += xc5000.o | 18 | obj-$(CONFIG_MEDIA_TUNER_XC5000) += xc5000.o |
| 19 | obj-$(CONFIG_MEDIA_TUNER_XC4000) += xc4000.o | ||
| 19 | obj-$(CONFIG_MEDIA_TUNER_MT2060) += mt2060.o | 20 | obj-$(CONFIG_MEDIA_TUNER_MT2060) += mt2060.o |
| 20 | obj-$(CONFIG_MEDIA_TUNER_MT2266) += mt2266.o | 21 | obj-$(CONFIG_MEDIA_TUNER_MT2266) += mt2266.o |
| 21 | obj-$(CONFIG_MEDIA_TUNER_QT1010) += qt1010.o | 22 | obj-$(CONFIG_MEDIA_TUNER_QT1010) += qt1010.o |
diff --git a/drivers/media/common/tuners/tuner-types.c b/drivers/media/common/tuners/tuner-types.c index afba6dc5e080..94a603a60842 100644 --- a/drivers/media/common/tuners/tuner-types.c +++ b/drivers/media/common/tuners/tuner-types.c | |||
| @@ -1805,6 +1805,10 @@ struct tunertype tuners[] = { | |||
| 1805 | .name = "Xceive 5000 tuner", | 1805 | .name = "Xceive 5000 tuner", |
| 1806 | /* see xc5000.c for details */ | 1806 | /* see xc5000.c for details */ |
| 1807 | }, | 1807 | }, |
| 1808 | [TUNER_XC4000] = { /* Xceive 4000 */ | ||
| 1809 | .name = "Xceive 4000 tuner", | ||
| 1810 | /* see xc4000.c for details */ | ||
| 1811 | }, | ||
| 1808 | [TUNER_TCL_MF02GIP_5N] = { /* TCL tuner MF02GIP-5N-E */ | 1812 | [TUNER_TCL_MF02GIP_5N] = { /* TCL tuner MF02GIP-5N-E */ |
| 1809 | .name = "TCL tuner MF02GIP-5N-E", | 1813 | .name = "TCL tuner MF02GIP-5N-E", |
| 1810 | .params = tuner_tcl_mf02gip_5n_params, | 1814 | .params = tuner_tcl_mf02gip_5n_params, |
diff --git a/drivers/media/common/tuners/xc4000.c b/drivers/media/common/tuners/xc4000.c new file mode 100644 index 000000000000..634f4d9b6c63 --- /dev/null +++ b/drivers/media/common/tuners/xc4000.c | |||
| @@ -0,0 +1,1691 @@ | |||
| 1 | /* | ||
| 2 | * Driver for Xceive XC4000 "QAM/8VSB single chip tuner" | ||
| 3 | * | ||
| 4 | * Copyright (c) 2007 Xceive Corporation | ||
| 5 | * Copyright (c) 2007 Steven Toth <stoth@linuxtv.org> | ||
| 6 | * Copyright (c) 2009 Devin Heitmueller <dheitmueller@kernellabs.com> | ||
| 7 | * Copyright (c) 2009 Davide Ferri <d.ferri@zero11.it> | ||
| 8 | * Copyright (c) 2010 Istvan Varga <istvan_v@mailbox.hu> | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License as published by | ||
| 12 | * the Free Software Foundation; either version 2 of the License, or | ||
| 13 | * (at your option) any later version. | ||
| 14 | * | ||
| 15 | * This program is distributed in the hope that it will be useful, | ||
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 18 | * GNU General Public License for more details. | ||
| 19 | * | ||
| 20 | * You should have received a copy of the GNU General Public License | ||
| 21 | * along with this program; if not, write to the Free Software | ||
| 22 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
| 23 | */ | ||
| 24 | |||
| 25 | #include <linux/module.h> | ||
| 26 | #include <linux/moduleparam.h> | ||
| 27 | #include <linux/videodev2.h> | ||
| 28 | #include <linux/delay.h> | ||
| 29 | #include <linux/dvb/frontend.h> | ||
| 30 | #include <linux/i2c.h> | ||
| 31 | #include <linux/mutex.h> | ||
| 32 | #include <asm/unaligned.h> | ||
| 33 | |||
| 34 | #include "dvb_frontend.h" | ||
| 35 | |||
| 36 | #include "xc4000.h" | ||
| 37 | #include "tuner-i2c.h" | ||
| 38 | #include "tuner-xc2028-types.h" | ||
| 39 | |||
| 40 | static int debug; | ||
| 41 | module_param(debug, int, 0644); | ||
| 42 | MODULE_PARM_DESC(debug, "Debugging level (0 to 2, default: 0 (off))."); | ||
| 43 | |||
| 44 | static int no_poweroff; | ||
| 45 | module_param(no_poweroff, int, 0644); | ||
| 46 | MODULE_PARM_DESC(no_poweroff, "Power management (1: disabled, 2: enabled, " | ||
| 47 | "0 (default): use device-specific default mode)."); | ||
| 48 | |||
| 49 | static int audio_std; | ||
| 50 | module_param(audio_std, int, 0644); | ||
| 51 | MODULE_PARM_DESC(audio_std, "Audio standard. XC4000 audio decoder explicitly " | ||
| 52 | "needs to know what audio standard is needed for some video standards " | ||
| 53 | "with audio A2 or NICAM. The valid settings are a sum of:\n" | ||
| 54 | " 1: use NICAM/B or A2/B instead of NICAM/A or A2/A\n" | ||
| 55 | " 2: use A2 instead of NICAM or BTSC\n" | ||
| 56 | " 4: use SECAM/K3 instead of K1\n" | ||
| 57 | " 8: use PAL-D/K audio for SECAM-D/K\n" | ||
| 58 | "16: use FM radio input 1 instead of input 2\n" | ||
| 59 | "32: use mono audio (the lower three bits are ignored)"); | ||
| 60 | |||
| 61 | static char firmware_name[30]; | ||
| 62 | module_param_string(firmware_name, firmware_name, sizeof(firmware_name), 0); | ||
| 63 | MODULE_PARM_DESC(firmware_name, "Firmware file name. Allows overriding the " | ||
| 64 | "default firmware name."); | ||
| 65 | |||
| 66 | static DEFINE_MUTEX(xc4000_list_mutex); | ||
| 67 | static LIST_HEAD(hybrid_tuner_instance_list); | ||
| 68 | |||
| 69 | #define dprintk(level, fmt, arg...) if (debug >= level) \ | ||
| 70 | printk(KERN_INFO "%s: " fmt, "xc4000", ## arg) | ||
| 71 | |||
| 72 | /* struct for storing firmware table */ | ||
| 73 | struct firmware_description { | ||
| 74 | unsigned int type; | ||
| 75 | v4l2_std_id id; | ||
| 76 | __u16 int_freq; | ||
| 77 | unsigned char *ptr; | ||
| 78 | unsigned int size; | ||
| 79 | }; | ||
| 80 | |||
| 81 | struct firmware_properties { | ||
| 82 | unsigned int type; | ||
| 83 | v4l2_std_id id; | ||
| 84 | v4l2_std_id std_req; | ||
| 85 | __u16 int_freq; | ||
| 86 | unsigned int scode_table; | ||
| 87 | int scode_nr; | ||
| 88 | }; | ||
| 89 | |||
| 90 | struct xc4000_priv { | ||
| 91 | struct tuner_i2c_props i2c_props; | ||
| 92 | struct list_head hybrid_tuner_instance_list; | ||
| 93 | struct firmware_description *firm; | ||
| 94 | int firm_size; | ||
| 95 | u32 if_khz; | ||
| 96 | u32 freq_hz; | ||
| 97 | u32 bandwidth; | ||
| 98 | u8 video_standard; | ||
| 99 | u8 rf_mode; | ||
| 100 | u8 default_pm; | ||
| 101 | u8 dvb_amplitude; | ||
| 102 | u8 set_smoothedcvbs; | ||
| 103 | u8 ignore_i2c_write_errors; | ||
| 104 | __u16 firm_version; | ||
| 105 | struct firmware_properties cur_fw; | ||
| 106 | __u16 hwmodel; | ||
| 107 | __u16 hwvers; | ||
| 108 | struct mutex lock; | ||
| 109 | }; | ||
| 110 | |||
| 111 | #define XC4000_AUDIO_STD_B 1 | ||
| 112 | #define XC4000_AUDIO_STD_A2 2 | ||
| 113 | #define XC4000_AUDIO_STD_K3 4 | ||
| 114 | #define XC4000_AUDIO_STD_L 8 | ||
| 115 | #define XC4000_AUDIO_STD_INPUT1 16 | ||
| 116 | #define XC4000_AUDIO_STD_MONO 32 | ||
| 117 | |||
| 118 | #define XC4000_DEFAULT_FIRMWARE "dvb-fe-xc4000-1.4.fw" | ||
| 119 | |||
| 120 | /* Misc Defines */ | ||
| 121 | #define MAX_TV_STANDARD 24 | ||
| 122 | #define XC_MAX_I2C_WRITE_LENGTH 64 | ||
| 123 | #define XC_POWERED_DOWN 0x80000000U | ||
| 124 | |||
| 125 | /* Signal Types */ | ||
| 126 | #define XC_RF_MODE_AIR 0 | ||
| 127 | #define XC_RF_MODE_CABLE 1 | ||
| 128 | |||
| 129 | /* Product id */ | ||
| 130 | #define XC_PRODUCT_ID_FW_NOT_LOADED 0x2000 | ||
| 131 | #define XC_PRODUCT_ID_XC4000 0x0FA0 | ||
| 132 | #define XC_PRODUCT_ID_XC4100 0x1004 | ||
| 133 | |||
| 134 | /* Registers (Write-only) */ | ||
| 135 | #define XREG_INIT 0x00 | ||
| 136 | #define XREG_VIDEO_MODE 0x01 | ||
| 137 | #define XREG_AUDIO_MODE 0x02 | ||
| 138 | #define XREG_RF_FREQ 0x03 | ||
| 139 | #define XREG_D_CODE 0x04 | ||
| 140 | #define XREG_DIRECTSITTING_MODE 0x05 | ||
| 141 | #define XREG_SEEK_MODE 0x06 | ||
| 142 | #define XREG_POWER_DOWN 0x08 | ||
| 143 | #define XREG_SIGNALSOURCE 0x0A | ||
| 144 | #define XREG_SMOOTHEDCVBS 0x0E | ||
| 145 | #define XREG_AMPLITUDE 0x10 | ||
| 146 | |||
| 147 | /* Registers (Read-only) */ | ||
| 148 | #define XREG_ADC_ENV 0x00 | ||
| 149 | #define XREG_QUALITY 0x01 | ||
| 150 | #define XREG_FRAME_LINES 0x02 | ||
| 151 | #define XREG_HSYNC_FREQ 0x03 | ||
| 152 | #define XREG_LOCK 0x04 | ||
| 153 | #define XREG_FREQ_ERROR 0x05 | ||
| 154 | #define XREG_SNR 0x06 | ||
| 155 | #define XREG_VERSION 0x07 | ||
| 156 | #define XREG_PRODUCT_ID 0x08 | ||
| 157 | |||
| 158 | /* | ||
| 159 | Basic firmware description. This will remain with | ||
| 160 | the driver for documentation purposes. | ||
| 161 | |||
| 162 | This represents an I2C firmware file encoded as a | ||
| 163 | string of unsigned char. Format is as follows: | ||
| 164 | |||
| 165 | char[0 ]=len0_MSB -> len = len_MSB * 256 + len_LSB | ||
| 166 | char[1 ]=len0_LSB -> length of first write transaction | ||
| 167 | char[2 ]=data0 -> first byte to be sent | ||
| 168 | char[3 ]=data1 | ||
| 169 | char[4 ]=data2 | ||
| 170 | char[ ]=... | ||
| 171 | char[M ]=dataN -> last byte to be sent | ||
| 172 | char[M+1]=len1_MSB -> len = len_MSB * 256 + len_LSB | ||
| 173 | char[M+2]=len1_LSB -> length of second write transaction | ||
| 174 | char[M+3]=data0 | ||
| 175 | char[M+4]=data1 | ||
| 176 | ... | ||
| 177 | etc. | ||
| 178 | |||
| 179 | The [len] value should be interpreted as follows: | ||
| 180 | |||
| 181 | len= len_MSB _ len_LSB | ||
| 182 | len=1111_1111_1111_1111 : End of I2C_SEQUENCE | ||
| 183 | len=0000_0000_0000_0000 : Reset command: Do hardware reset | ||
| 184 | len=0NNN_NNNN_NNNN_NNNN : Normal transaction: number of bytes = {1:32767) | ||
| 185 | len=1WWW_WWWW_WWWW_WWWW : Wait command: wait for {1:32767} ms | ||
| 186 | |||
| 187 | For the RESET and WAIT commands, the two following bytes will contain | ||
| 188 | immediately the length of the following transaction. | ||
| 189 | */ | ||
| 190 | |||
| 191 | struct XC_TV_STANDARD { | ||
| 192 | const char *Name; | ||
| 193 | u16 audio_mode; | ||
| 194 | u16 video_mode; | ||
| 195 | u16 int_freq; | ||
| 196 | }; | ||
| 197 | |||
| 198 | /* Tuner standards */ | ||
| 199 | #define XC4000_MN_NTSC_PAL_BTSC 0 | ||
| 200 | #define XC4000_MN_NTSC_PAL_A2 1 | ||
| 201 | #define XC4000_MN_NTSC_PAL_EIAJ 2 | ||
| 202 | #define XC4000_MN_NTSC_PAL_Mono 3 | ||
| 203 | #define XC4000_BG_PAL_A2 4 | ||
| 204 | #define XC4000_BG_PAL_NICAM 5 | ||
| 205 | #define XC4000_BG_PAL_MONO 6 | ||
| 206 | #define XC4000_I_PAL_NICAM 7 | ||
| 207 | #define XC4000_I_PAL_NICAM_MONO 8 | ||
| 208 | #define XC4000_DK_PAL_A2 9 | ||
| 209 | #define XC4000_DK_PAL_NICAM 10 | ||
| 210 | #define XC4000_DK_PAL_MONO 11 | ||
| 211 | #define XC4000_DK_SECAM_A2DK1 12 | ||
| 212 | #define XC4000_DK_SECAM_A2LDK3 13 | ||
| 213 | #define XC4000_DK_SECAM_A2MONO 14 | ||
| 214 | #define XC4000_DK_SECAM_NICAM 15 | ||
| 215 | #define XC4000_L_SECAM_NICAM 16 | ||
| 216 | #define XC4000_LC_SECAM_NICAM 17 | ||
| 217 | #define XC4000_DTV6 18 | ||
| 218 | #define XC4000_DTV8 19 | ||
| 219 | #define XC4000_DTV7_8 20 | ||
| 220 | #define XC4000_DTV7 21 | ||
| 221 | #define XC4000_FM_Radio_INPUT2 22 | ||
| 222 | #define XC4000_FM_Radio_INPUT1 23 | ||
| 223 | |||
| 224 | static struct XC_TV_STANDARD xc4000_standard[MAX_TV_STANDARD] = { | ||
| 225 | {"M/N-NTSC/PAL-BTSC", 0x0000, 0x80A0, 4500}, | ||
| 226 | {"M/N-NTSC/PAL-A2", 0x0000, 0x80A0, 4600}, | ||
| 227 | {"M/N-NTSC/PAL-EIAJ", 0x0040, 0x80A0, 4500}, | ||
| 228 | {"M/N-NTSC/PAL-Mono", 0x0078, 0x80A0, 4500}, | ||
| 229 | {"B/G-PAL-A2", 0x0000, 0x8159, 5640}, | ||
| 230 | {"B/G-PAL-NICAM", 0x0004, 0x8159, 5740}, | ||
| 231 | {"B/G-PAL-MONO", 0x0078, 0x8159, 5500}, | ||
| 232 | {"I-PAL-NICAM", 0x0080, 0x8049, 6240}, | ||
| 233 | {"I-PAL-NICAM-MONO", 0x0078, 0x8049, 6000}, | ||
| 234 | {"D/K-PAL-A2", 0x0000, 0x8049, 6380}, | ||
| 235 | {"D/K-PAL-NICAM", 0x0080, 0x8049, 6200}, | ||
| 236 | {"D/K-PAL-MONO", 0x0078, 0x8049, 6500}, | ||
| 237 | {"D/K-SECAM-A2 DK1", 0x0000, 0x8049, 6340}, | ||
| 238 | {"D/K-SECAM-A2 L/DK3", 0x0000, 0x8049, 6000}, | ||
| 239 | {"D/K-SECAM-A2 MONO", 0x0078, 0x8049, 6500}, | ||
| 240 | {"D/K-SECAM-NICAM", 0x0080, 0x8049, 6200}, | ||
| 241 | {"L-SECAM-NICAM", 0x8080, 0x0009, 6200}, | ||
| 242 | {"L'-SECAM-NICAM", 0x8080, 0x4009, 6200}, | ||
| 243 | {"DTV6", 0x00C0, 0x8002, 0}, | ||
| 244 | {"DTV8", 0x00C0, 0x800B, 0}, | ||
| 245 | {"DTV7/8", 0x00C0, 0x801B, 0}, | ||
| 246 | {"DTV7", 0x00C0, 0x8007, 0}, | ||
| 247 | {"FM Radio-INPUT2", 0x0008, 0x9800, 10700}, | ||
| 248 | {"FM Radio-INPUT1", 0x0008, 0x9000, 10700} | ||
| 249 | }; | ||
| 250 | |||
| 251 | static int xc4000_readreg(struct xc4000_priv *priv, u16 reg, u16 *val); | ||
| 252 | static int xc4000_tuner_reset(struct dvb_frontend *fe); | ||
| 253 | static void xc_debug_dump(struct xc4000_priv *priv); | ||
| 254 | |||
| 255 | static int xc_send_i2c_data(struct xc4000_priv *priv, u8 *buf, int len) | ||
| 256 | { | ||
| 257 | struct i2c_msg msg = { .addr = priv->i2c_props.addr, | ||
| 258 | .flags = 0, .buf = buf, .len = len }; | ||
| 259 | if (i2c_transfer(priv->i2c_props.adap, &msg, 1) != 1) { | ||
| 260 | if (priv->ignore_i2c_write_errors == 0) { | ||
| 261 | printk(KERN_ERR "xc4000: I2C write failed (len=%i)\n", | ||
| 262 | len); | ||
| 263 | if (len == 4) { | ||
| 264 | printk(KERN_ERR "bytes %02x %02x %02x %02x\n", buf[0], | ||
| 265 | buf[1], buf[2], buf[3]); | ||
| 266 | } | ||
| 267 | return -EREMOTEIO; | ||
| 268 | } | ||
| 269 | } | ||
| 270 | return 0; | ||
| 271 | } | ||
| 272 | |||
| 273 | static int xc4000_tuner_reset(struct dvb_frontend *fe) | ||
| 274 | { | ||
| 275 | struct xc4000_priv *priv = fe->tuner_priv; | ||
| 276 | int ret; | ||
| 277 | |||
| 278 | dprintk(1, "%s()\n", __func__); | ||
| 279 | |||
| 280 | if (fe->callback) { | ||
| 281 | ret = fe->callback(((fe->dvb) && (fe->dvb->priv)) ? | ||
| 282 | fe->dvb->priv : | ||
| 283 | priv->i2c_props.adap->algo_data, | ||
| 284 | DVB_FRONTEND_COMPONENT_TUNER, | ||
| 285 | XC4000_TUNER_RESET, 0); | ||
| 286 | if (ret) { | ||
| 287 | printk(KERN_ERR "xc4000: reset failed\n"); | ||
| 288 | return -EREMOTEIO; | ||
| 289 | } | ||
| 290 | } else { | ||
| 291 | printk(KERN_ERR "xc4000: no tuner reset callback function, " | ||
| 292 | "fatal\n"); | ||
| 293 | return -EINVAL; | ||
| 294 | } | ||
| 295 | return 0; | ||
| 296 | } | ||
| 297 | |||
| 298 | static int xc_write_reg(struct xc4000_priv *priv, u16 regAddr, u16 i2cData) | ||
| 299 | { | ||
| 300 | u8 buf[4]; | ||
| 301 | int result; | ||
| 302 | |||
| 303 | buf[0] = (regAddr >> 8) & 0xFF; | ||
| 304 | buf[1] = regAddr & 0xFF; | ||
| 305 | buf[2] = (i2cData >> 8) & 0xFF; | ||
| 306 | buf[3] = i2cData & 0xFF; | ||
| 307 | result = xc_send_i2c_data(priv, buf, 4); | ||
| 308 | |||
| 309 | return result; | ||
| 310 | } | ||
| 311 | |||
| 312 | static int xc_load_i2c_sequence(struct dvb_frontend *fe, const u8 *i2c_sequence) | ||
| 313 | { | ||
| 314 | struct xc4000_priv *priv = fe->tuner_priv; | ||
| 315 | |||
| 316 | int i, nbytes_to_send, result; | ||
| 317 | unsigned int len, pos, index; | ||
| 318 | u8 buf[XC_MAX_I2C_WRITE_LENGTH]; | ||
| 319 | |||
| 320 | index = 0; | ||
| 321 | while ((i2c_sequence[index] != 0xFF) || | ||
| 322 | (i2c_sequence[index + 1] != 0xFF)) { | ||
| 323 | len = i2c_sequence[index] * 256 + i2c_sequence[index+1]; | ||
| 324 | if (len == 0x0000) { | ||
| 325 | /* RESET command */ | ||
| 326 | /* NOTE: this is ignored, as the reset callback was */ | ||
| 327 | /* already called by check_firmware() */ | ||
| 328 | index += 2; | ||
| 329 | } else if (len & 0x8000) { | ||
| 330 | /* WAIT command */ | ||
| 331 | msleep(len & 0x7FFF); | ||
| 332 | index += 2; | ||
| 333 | } else { | ||
| 334 | /* Send i2c data whilst ensuring individual transactions | ||
| 335 | * do not exceed XC_MAX_I2C_WRITE_LENGTH bytes. | ||
| 336 | */ | ||
| 337 | index += 2; | ||
| 338 | buf[0] = i2c_sequence[index]; | ||
| 339 | buf[1] = i2c_sequence[index + 1]; | ||
| 340 | pos = 2; | ||
| 341 | while (pos < len) { | ||
| 342 | if ((len - pos) > XC_MAX_I2C_WRITE_LENGTH - 2) | ||
| 343 | nbytes_to_send = | ||
| 344 | XC_MAX_I2C_WRITE_LENGTH; | ||
| 345 | else | ||
| 346 | nbytes_to_send = (len - pos + 2); | ||
| 347 | for (i = 2; i < nbytes_to_send; i++) { | ||
| 348 | buf[i] = i2c_sequence[index + pos + | ||
| 349 | i - 2]; | ||
| 350 | } | ||
| 351 | result = xc_send_i2c_data(priv, buf, | ||
| 352 | nbytes_to_send); | ||
| 353 | |||
| 354 | if (result != 0) | ||
| 355 | return result; | ||
| 356 | |||
| 357 | pos += nbytes_to_send - 2; | ||
| 358 | } | ||
| 359 | index += len; | ||
| 360 | } | ||
| 361 | } | ||
| 362 | return 0; | ||
| 363 | } | ||
| 364 | |||
| 365 | static int xc_set_tv_standard(struct xc4000_priv *priv, | ||
| 366 | u16 video_mode, u16 audio_mode) | ||
| 367 | { | ||
| 368 | int ret; | ||
| 369 | dprintk(1, "%s(0x%04x,0x%04x)\n", __func__, video_mode, audio_mode); | ||
| 370 | dprintk(1, "%s() Standard = %s\n", | ||
| 371 | __func__, | ||
| 372 | xc4000_standard[priv->video_standard].Name); | ||
| 373 | |||
| 374 | /* Don't complain when the request fails because of i2c stretching */ | ||
| 375 | priv->ignore_i2c_write_errors = 1; | ||
| 376 | |||
| 377 | ret = xc_write_reg(priv, XREG_VIDEO_MODE, video_mode); | ||
| 378 | if (ret == 0) | ||
| 379 | ret = xc_write_reg(priv, XREG_AUDIO_MODE, audio_mode); | ||
| 380 | |||
| 381 | priv->ignore_i2c_write_errors = 0; | ||
| 382 | |||
| 383 | return ret; | ||
| 384 | } | ||
| 385 | |||
| 386 | static int xc_set_signal_source(struct xc4000_priv *priv, u16 rf_mode) | ||
| 387 | { | ||
| 388 | dprintk(1, "%s(%d) Source = %s\n", __func__, rf_mode, | ||
| 389 | rf_mode == XC_RF_MODE_AIR ? "ANTENNA" : "CABLE"); | ||
| 390 | |||
| 391 | if ((rf_mode != XC_RF_MODE_AIR) && (rf_mode != XC_RF_MODE_CABLE)) { | ||
| 392 | rf_mode = XC_RF_MODE_CABLE; | ||
| 393 | printk(KERN_ERR | ||
| 394 | "%s(), Invalid mode, defaulting to CABLE", | ||
| 395 | __func__); | ||
| 396 | } | ||
| 397 | return xc_write_reg(priv, XREG_SIGNALSOURCE, rf_mode); | ||
| 398 | } | ||
| 399 | |||
| 400 | static const struct dvb_tuner_ops xc4000_tuner_ops; | ||
| 401 | |||
| 402 | static int xc_set_rf_frequency(struct xc4000_priv *priv, u32 freq_hz) | ||
| 403 | { | ||
| 404 | u16 freq_code; | ||
| 405 | |||
| 406 | dprintk(1, "%s(%u)\n", __func__, freq_hz); | ||
| 407 | |||
| 408 | if ((freq_hz > xc4000_tuner_ops.info.frequency_max) || | ||
| 409 | (freq_hz < xc4000_tuner_ops.info.frequency_min)) | ||
| 410 | return -EINVAL; | ||
| 411 | |||
| 412 | freq_code = (u16)(freq_hz / 15625); | ||
| 413 | |||
| 414 | /* WAS: Starting in firmware version 1.1.44, Xceive recommends using the | ||
| 415 | FINERFREQ for all normal tuning (the doc indicates reg 0x03 should | ||
| 416 | only be used for fast scanning for channel lock) */ | ||
| 417 | /* WAS: XREG_FINERFREQ */ | ||
| 418 | return xc_write_reg(priv, XREG_RF_FREQ, freq_code); | ||
| 419 | } | ||
| 420 | |||
| 421 | static int xc_get_adc_envelope(struct xc4000_priv *priv, u16 *adc_envelope) | ||
| 422 | { | ||
| 423 | return xc4000_readreg(priv, XREG_ADC_ENV, adc_envelope); | ||
| 424 | } | ||
| 425 | |||
| 426 | static int xc_get_frequency_error(struct xc4000_priv *priv, u32 *freq_error_hz) | ||
| 427 | { | ||
| 428 | int result; | ||
| 429 | u16 regData; | ||
| 430 | u32 tmp; | ||
| 431 | |||
| 432 | result = xc4000_readreg(priv, XREG_FREQ_ERROR, ®Data); | ||
| 433 | if (result != 0) | ||
| 434 | return result; | ||
| 435 | |||
| 436 | tmp = (u32)regData & 0xFFFFU; | ||
| 437 | tmp = (tmp < 0x8000U ? tmp : 0x10000U - tmp); | ||
| 438 | (*freq_error_hz) = tmp * 15625; | ||
| 439 | return result; | ||
| 440 | } | ||
| 441 | |||
| 442 | static int xc_get_lock_status(struct xc4000_priv *priv, u16 *lock_status) | ||
| 443 | { | ||
| 444 | return xc4000_readreg(priv, XREG_LOCK, lock_status); | ||
| 445 | } | ||
| 446 | |||
| 447 | static int xc_get_version(struct xc4000_priv *priv, | ||
| 448 | u8 *hw_majorversion, u8 *hw_minorversion, | ||
| 449 | u8 *fw_majorversion, u8 *fw_minorversion) | ||
| 450 | { | ||
| 451 | u16 data; | ||
| 452 | int result; | ||
| 453 | |||
| 454 | result = xc4000_readreg(priv, XREG_VERSION, &data); | ||
| 455 | if (result != 0) | ||
| 456 | return result; | ||
| 457 | |||
| 458 | (*hw_majorversion) = (data >> 12) & 0x0F; | ||
| 459 | (*hw_minorversion) = (data >> 8) & 0x0F; | ||
| 460 | (*fw_majorversion) = (data >> 4) & 0x0F; | ||
| 461 | (*fw_minorversion) = data & 0x0F; | ||
| 462 | |||
| 463 | return 0; | ||
| 464 | } | ||
| 465 | |||
| 466 | static int xc_get_hsync_freq(struct xc4000_priv *priv, u32 *hsync_freq_hz) | ||
| 467 | { | ||
| 468 | u16 regData; | ||
| 469 | int result; | ||
| 470 | |||
| 471 | result = xc4000_readreg(priv, XREG_HSYNC_FREQ, ®Data); | ||
| 472 | if (result != 0) | ||
| 473 | return result; | ||
| 474 | |||
| 475 | (*hsync_freq_hz) = ((regData & 0x0fff) * 763)/100; | ||
| 476 | return result; | ||
| 477 | } | ||
| 478 | |||
| 479 | static int xc_get_frame_lines(struct xc4000_priv *priv, u16 *frame_lines) | ||
| 480 | { | ||
| 481 | return xc4000_readreg(priv, XREG_FRAME_LINES, frame_lines); | ||
| 482 | } | ||
| 483 | |||
| 484 | static int xc_get_quality(struct xc4000_priv *priv, u16 *quality) | ||
| 485 | { | ||
| 486 | return xc4000_readreg(priv, XREG_QUALITY, quality); | ||
| 487 | } | ||
| 488 | |||
| 489 | static u16 xc_wait_for_lock(struct xc4000_priv *priv) | ||
| 490 | { | ||
| 491 | u16 lock_state = 0; | ||
| 492 | int watchdog_count = 40; | ||
| 493 | |||
| 494 | while ((lock_state == 0) && (watchdog_count > 0)) { | ||
| 495 | xc_get_lock_status(priv, &lock_state); | ||
| 496 | if (lock_state != 1) { | ||
| 497 | msleep(5); | ||
| 498 | watchdog_count--; | ||
| 499 | } | ||
| 500 | } | ||
| 501 | return lock_state; | ||
| 502 | } | ||
| 503 | |||
| 504 | static int xc_tune_channel(struct xc4000_priv *priv, u32 freq_hz) | ||
| 505 | { | ||
| 506 | int found = 1; | ||
| 507 | int result; | ||
| 508 | |||
| 509 | dprintk(1, "%s(%u)\n", __func__, freq_hz); | ||
| 510 | |||
| 511 | /* Don't complain when the request fails because of i2c stretching */ | ||
| 512 | priv->ignore_i2c_write_errors = 1; | ||
| 513 | result = xc_set_rf_frequency(priv, freq_hz); | ||
| 514 | priv->ignore_i2c_write_errors = 0; | ||
| 515 | |||
| 516 | if (result != 0) | ||
| 517 | return 0; | ||
| 518 | |||
| 519 | /* wait for lock only in analog TV mode */ | ||
| 520 | if ((priv->cur_fw.type & (FM | DTV6 | DTV7 | DTV78 | DTV8)) == 0) { | ||
| 521 | if (xc_wait_for_lock(priv) != 1) | ||
| 522 | found = 0; | ||
| 523 | } | ||
| 524 | |||
| 525 | /* Wait for stats to stabilize. | ||
| 526 | * Frame Lines needs two frame times after initial lock | ||
| 527 | * before it is valid. | ||
| 528 | */ | ||
| 529 | msleep(debug ? 100 : 10); | ||
| 530 | |||
| 531 | if (debug) | ||
| 532 | xc_debug_dump(priv); | ||
| 533 | |||
| 534 | return found; | ||
| 535 | } | ||
| 536 | |||
| 537 | static int xc4000_readreg(struct xc4000_priv *priv, u16 reg, u16 *val) | ||
| 538 | { | ||
| 539 | u8 buf[2] = { reg >> 8, reg & 0xff }; | ||
| 540 | u8 bval[2] = { 0, 0 }; | ||
| 541 | struct i2c_msg msg[2] = { | ||
| 542 | { .addr = priv->i2c_props.addr, | ||
| 543 | .flags = 0, .buf = &buf[0], .len = 2 }, | ||
| 544 | { .addr = priv->i2c_props.addr, | ||
| 545 | .flags = I2C_M_RD, .buf = &bval[0], .len = 2 }, | ||
| 546 | }; | ||
| 547 | |||
| 548 | if (i2c_transfer(priv->i2c_props.adap, msg, 2) != 2) { | ||
| 549 | printk(KERN_ERR "xc4000: I2C read failed\n"); | ||
| 550 | return -EREMOTEIO; | ||
| 551 | } | ||
| 552 | |||
| 553 | *val = (bval[0] << 8) | bval[1]; | ||
| 554 | return 0; | ||
| 555 | } | ||
| 556 | |||
| 557 | #define dump_firm_type(t) dump_firm_type_and_int_freq(t, 0) | ||
| 558 | static void dump_firm_type_and_int_freq(unsigned int type, u16 int_freq) | ||
| 559 | { | ||
| 560 | if (type & BASE) | ||
| 561 | printk(KERN_CONT "BASE "); | ||
| 562 | if (type & INIT1) | ||
| 563 | printk(KERN_CONT "INIT1 "); | ||
| 564 | if (type & F8MHZ) | ||
| 565 | printk(KERN_CONT "F8MHZ "); | ||
| 566 | if (type & MTS) | ||
| 567 | printk(KERN_CONT "MTS "); | ||
| 568 | if (type & D2620) | ||
| 569 | printk(KERN_CONT "D2620 "); | ||
| 570 | if (type & D2633) | ||
| 571 | printk(KERN_CONT "D2633 "); | ||
| 572 | if (type & DTV6) | ||
| 573 | printk(KERN_CONT "DTV6 "); | ||
| 574 | if (type & QAM) | ||
| 575 | printk(KERN_CONT "QAM "); | ||
| 576 | if (type & DTV7) | ||
| 577 | printk(KERN_CONT "DTV7 "); | ||
| 578 | if (type & DTV78) | ||
| 579 | printk(KERN_CONT "DTV78 "); | ||
| 580 | if (type & DTV8) | ||
| 581 | printk(KERN_CONT "DTV8 "); | ||
| 582 | if (type & FM) | ||
| 583 | printk(KERN_CONT "FM "); | ||
| 584 | if (type & INPUT1) | ||
| 585 | printk(KERN_CONT "INPUT1 "); | ||
| 586 | if (type & LCD) | ||
| 587 | printk(KERN_CONT "LCD "); | ||
| 588 | if (type & NOGD) | ||
| 589 | printk(KERN_CONT "NOGD "); | ||
| 590 | if (type & MONO) | ||
| 591 | printk(KERN_CONT "MONO "); | ||
| 592 | if (type & ATSC) | ||
| 593 | printk(KERN_CONT "ATSC "); | ||
| 594 | if (type & IF) | ||
| 595 | printk(KERN_CONT "IF "); | ||
| 596 | if (type & LG60) | ||
| 597 | printk(KERN_CONT "LG60 "); | ||
| 598 | if (type & ATI638) | ||
| 599 | printk(KERN_CONT "ATI638 "); | ||
| 600 | if (type & OREN538) | ||
| 601 | printk(KERN_CONT "OREN538 "); | ||
| 602 | if (type & OREN36) | ||
| 603 | printk(KERN_CONT "OREN36 "); | ||
| 604 | if (type & TOYOTA388) | ||
| 605 | printk(KERN_CONT "TOYOTA388 "); | ||
| 606 | if (type & TOYOTA794) | ||
| 607 | printk(KERN_CONT "TOYOTA794 "); | ||
| 608 | if (type & DIBCOM52) | ||
| 609 | printk(KERN_CONT "DIBCOM52 "); | ||
| 610 | if (type & ZARLINK456) | ||
| 611 | printk(KERN_CONT "ZARLINK456 "); | ||
| 612 | if (type & CHINA) | ||
| 613 | printk(KERN_CONT "CHINA "); | ||
| 614 | if (type & F6MHZ) | ||
| 615 | printk(KERN_CONT "F6MHZ "); | ||
| 616 | if (type & INPUT2) | ||
| 617 | printk(KERN_CONT "INPUT2 "); | ||
| 618 | if (type & SCODE) | ||
| 619 | printk(KERN_CONT "SCODE "); | ||
| 620 | if (type & HAS_IF) | ||
| 621 | printk(KERN_CONT "HAS_IF_%d ", int_freq); | ||
| 622 | } | ||
| 623 | |||
| 624 | static int seek_firmware(struct dvb_frontend *fe, unsigned int type, | ||
| 625 | v4l2_std_id *id) | ||
| 626 | { | ||
| 627 | struct xc4000_priv *priv = fe->tuner_priv; | ||
| 628 | int i, best_i = -1; | ||
| 629 | unsigned int best_nr_diffs = 255U; | ||
| 630 | |||
| 631 | if (!priv->firm) { | ||
| 632 | printk(KERN_ERR "Error! firmware not loaded\n"); | ||
| 633 | return -EINVAL; | ||
| 634 | } | ||
| 635 | |||
| 636 | if (((type & ~SCODE) == 0) && (*id == 0)) | ||
| 637 | *id = V4L2_STD_PAL; | ||
| 638 | |||
| 639 | /* Seek for generic video standard match */ | ||
| 640 | for (i = 0; i < priv->firm_size; i++) { | ||
| 641 | v4l2_std_id id_diff_mask = | ||
| 642 | (priv->firm[i].id ^ (*id)) & (*id); | ||
| 643 | unsigned int type_diff_mask = | ||
| 644 | (priv->firm[i].type ^ type) | ||
| 645 | & (BASE_TYPES | DTV_TYPES | LCD | NOGD | MONO | SCODE); | ||
| 646 | unsigned int nr_diffs; | ||
| 647 | |||
| 648 | if (type_diff_mask | ||
| 649 | & (BASE | INIT1 | FM | DTV6 | DTV7 | DTV78 | DTV8 | SCODE)) | ||
| 650 | continue; | ||
| 651 | |||
| 652 | nr_diffs = hweight64(id_diff_mask) + hweight32(type_diff_mask); | ||
| 653 | if (!nr_diffs) /* Supports all the requested standards */ | ||
| 654 | goto found; | ||
| 655 | |||
| 656 | if (nr_diffs < best_nr_diffs) { | ||
| 657 | best_nr_diffs = nr_diffs; | ||
| 658 | best_i = i; | ||
| 659 | } | ||
| 660 | } | ||
| 661 | |||
| 662 | /* FIXME: Would make sense to seek for type "hint" match ? */ | ||
| 663 | if (best_i < 0) { | ||
| 664 | i = -ENOENT; | ||
| 665 | goto ret; | ||
| 666 | } | ||
| 667 | |||
| 668 | if (best_nr_diffs > 0U) { | ||
| 669 | printk(KERN_WARNING | ||
| 670 | "Selecting best matching firmware (%u bits differ) for " | ||
| 671 | "type=(%x), id %016llx:\n", | ||
| 672 | best_nr_diffs, type, (unsigned long long)*id); | ||
| 673 | i = best_i; | ||
| 674 | } | ||
| 675 | |||
| 676 | found: | ||
| 677 | *id = priv->firm[i].id; | ||
| 678 | |||
| 679 | ret: | ||
| 680 | if (debug) { | ||
| 681 | printk(KERN_DEBUG "%s firmware for type=", | ||
| 682 | (i < 0) ? "Can't find" : "Found"); | ||
| 683 | dump_firm_type(type); | ||
| 684 | printk(KERN_DEBUG "(%x), id %016llx.\n", type, (unsigned long long)*id); | ||
| 685 | } | ||
| 686 | return i; | ||
| 687 | } | ||
| 688 | |||
| 689 | static int load_firmware(struct dvb_frontend *fe, unsigned int type, | ||
| 690 | v4l2_std_id *id) | ||
| 691 | { | ||
| 692 | struct xc4000_priv *priv = fe->tuner_priv; | ||
| 693 | int pos, rc; | ||
| 694 | unsigned char *p; | ||
| 695 | |||
| 696 | pos = seek_firmware(fe, type, id); | ||
| 697 | if (pos < 0) | ||
| 698 | return pos; | ||
| 699 | |||
| 700 | p = priv->firm[pos].ptr; | ||
| 701 | |||
| 702 | /* Don't complain when the request fails because of i2c stretching */ | ||
| 703 | priv->ignore_i2c_write_errors = 1; | ||
| 704 | |||
| 705 | rc = xc_load_i2c_sequence(fe, p); | ||
| 706 | |||
| 707 | priv->ignore_i2c_write_errors = 0; | ||
| 708 | |||
| 709 | return rc; | ||
| 710 | } | ||
| 711 | |||
| 712 | static int xc4000_fwupload(struct dvb_frontend *fe) | ||
| 713 | { | ||
| 714 | struct xc4000_priv *priv = fe->tuner_priv; | ||
| 715 | const struct firmware *fw = NULL; | ||
| 716 | const unsigned char *p, *endp; | ||
| 717 | int rc = 0; | ||
| 718 | int n, n_array; | ||
| 719 | char name[33]; | ||
| 720 | const char *fname; | ||
| 721 | |||
| 722 | if (firmware_name[0] != '\0') | ||
| 723 | fname = firmware_name; | ||
| 724 | else | ||
| 725 | fname = XC4000_DEFAULT_FIRMWARE; | ||
| 726 | |||
| 727 | dprintk(1, "Reading firmware %s\n", fname); | ||
| 728 | rc = request_firmware(&fw, fname, priv->i2c_props.adap->dev.parent); | ||
| 729 | if (rc < 0) { | ||
| 730 | if (rc == -ENOENT) | ||
| 731 | printk(KERN_ERR "Error: firmware %s not found.\n", fname); | ||
| 732 | else | ||
| 733 | printk(KERN_ERR "Error %d while requesting firmware %s\n", | ||
| 734 | rc, fname); | ||
| 735 | |||
| 736 | return rc; | ||
| 737 | } | ||
| 738 | p = fw->data; | ||
| 739 | endp = p + fw->size; | ||
| 740 | |||
| 741 | if (fw->size < sizeof(name) - 1 + 2 + 2) { | ||
| 742 | printk(KERN_ERR "Error: firmware file %s has invalid size!\n", | ||
| 743 | fname); | ||
| 744 | goto corrupt; | ||
| 745 | } | ||
| 746 | |||
| 747 | memcpy(name, p, sizeof(name) - 1); | ||
| 748 | name[sizeof(name) - 1] = '\0'; | ||
| 749 | p += sizeof(name) - 1; | ||
| 750 | |||
| 751 | priv->firm_version = get_unaligned_le16(p); | ||
| 752 | p += 2; | ||
| 753 | |||
| 754 | n_array = get_unaligned_le16(p); | ||
| 755 | p += 2; | ||
| 756 | |||
| 757 | dprintk(1, "Loading %d firmware images from %s, type: %s, ver %d.%d\n", | ||
| 758 | n_array, fname, name, | ||
| 759 | priv->firm_version >> 8, priv->firm_version & 0xff); | ||
| 760 | |||
| 761 | priv->firm = kzalloc(sizeof(*priv->firm) * n_array, GFP_KERNEL); | ||
| 762 | if (priv->firm == NULL) { | ||
| 763 | printk(KERN_ERR "Not enough memory to load firmware file.\n"); | ||
| 764 | rc = -ENOMEM; | ||
| 765 | goto done; | ||
| 766 | } | ||
| 767 | priv->firm_size = n_array; | ||
| 768 | |||
| 769 | n = -1; | ||
| 770 | while (p < endp) { | ||
| 771 | __u32 type, size; | ||
| 772 | v4l2_std_id id; | ||
| 773 | __u16 int_freq = 0; | ||
| 774 | |||
| 775 | n++; | ||
| 776 | if (n >= n_array) { | ||
| 777 | printk(KERN_ERR "More firmware images in file than " | ||
| 778 | "were expected!\n"); | ||
| 779 | goto corrupt; | ||
| 780 | } | ||
| 781 | |||
| 782 | /* Checks if there's enough bytes to read */ | ||
| 783 | if (endp - p < sizeof(type) + sizeof(id) + sizeof(size)) | ||
| 784 | goto header; | ||
| 785 | |||
| 786 | type = get_unaligned_le32(p); | ||
| 787 | p += sizeof(type); | ||
| 788 | |||
| 789 | id = get_unaligned_le64(p); | ||
| 790 | p += sizeof(id); | ||
| 791 | |||
| 792 | if (type & HAS_IF) { | ||
| 793 | int_freq = get_unaligned_le16(p); | ||
| 794 | p += sizeof(int_freq); | ||
| 795 | if (endp - p < sizeof(size)) | ||
| 796 | goto header; | ||
| 797 | } | ||
| 798 | |||
| 799 | size = get_unaligned_le32(p); | ||
| 800 | p += sizeof(size); | ||
| 801 | |||
| 802 | if (!size || size > endp - p) { | ||
| 803 | printk(KERN_ERR "Firmware type (%x), id %llx is corrupted (size=%d, expected %d)\n", | ||
| 804 | type, (unsigned long long)id, | ||
| 805 | (unsigned)(endp - p), size); | ||
| 806 | goto corrupt; | ||
| 807 | } | ||
| 808 | |||
| 809 | priv->firm[n].ptr = kzalloc(size, GFP_KERNEL); | ||
| 810 | if (priv->firm[n].ptr == NULL) { | ||
| 811 | printk(KERN_ERR "Not enough memory to load firmware file.\n"); | ||
| 812 | rc = -ENOMEM; | ||
| 813 | goto done; | ||
| 814 | } | ||
| 815 | |||
| 816 | if (debug) { | ||
| 817 | printk(KERN_DEBUG "Reading firmware type "); | ||
| 818 | dump_firm_type_and_int_freq(type, int_freq); | ||
| 819 | printk(KERN_DEBUG "(%x), id %llx, size=%d.\n", | ||
| 820 | type, (unsigned long long)id, size); | ||
| 821 | } | ||
| 822 | |||
| 823 | memcpy(priv->firm[n].ptr, p, size); | ||
| 824 | priv->firm[n].type = type; | ||
| 825 | priv->firm[n].id = id; | ||
| 826 | priv->firm[n].size = size; | ||
| 827 | priv->firm[n].int_freq = int_freq; | ||
| 828 | |||
| 829 | p += size; | ||
| 830 | } | ||
| 831 | |||
| 832 | if (n + 1 != priv->firm_size) { | ||
| 833 | printk(KERN_ERR "Firmware file is incomplete!\n"); | ||
| 834 | goto corrupt; | ||
| 835 | } | ||
| 836 | |||
| 837 | goto done; | ||
| 838 | |||
| 839 | header: | ||
| 840 | printk(KERN_ERR "Firmware header is incomplete!\n"); | ||
| 841 | corrupt: | ||
| 842 | rc = -EINVAL; | ||
| 843 | printk(KERN_ERR "Error: firmware file is corrupted!\n"); | ||
| 844 | |||
| 845 | done: | ||
| 846 | release_firmware(fw); | ||
| 847 | if (rc == 0) | ||
| 848 | dprintk(1, "Firmware files loaded.\n"); | ||
| 849 | |||
| 850 | return rc; | ||
| 851 | } | ||
| 852 | |||
| 853 | static int load_scode(struct dvb_frontend *fe, unsigned int type, | ||
| 854 | v4l2_std_id *id, __u16 int_freq, int scode) | ||
| 855 | { | ||
| 856 | struct xc4000_priv *priv = fe->tuner_priv; | ||
| 857 | int pos, rc; | ||
| 858 | unsigned char *p; | ||
| 859 | u8 scode_buf[13]; | ||
| 860 | u8 indirect_mode[5]; | ||
| 861 | |||
| 862 | dprintk(1, "%s called int_freq=%d\n", __func__, int_freq); | ||
| 863 | |||
| 864 | if (!int_freq) { | ||
| 865 | pos = seek_firmware(fe, type, id); | ||
| 866 | if (pos < 0) | ||
| 867 | return pos; | ||
| 868 | } else { | ||
| 869 | for (pos = 0; pos < priv->firm_size; pos++) { | ||
| 870 | if ((priv->firm[pos].int_freq == int_freq) && | ||
| 871 | (priv->firm[pos].type & HAS_IF)) | ||
| 872 | break; | ||
| 873 | } | ||
| 874 | if (pos == priv->firm_size) | ||
| 875 | return -ENOENT; | ||
| 876 | } | ||
| 877 | |||
| 878 | p = priv->firm[pos].ptr; | ||
| 879 | |||
| 880 | if (priv->firm[pos].size != 12 * 16 || scode >= 16) | ||
| 881 | return -EINVAL; | ||
| 882 | p += 12 * scode; | ||
| 883 | |||
| 884 | if (debug) { | ||
| 885 | tuner_info("Loading SCODE for type="); | ||
| 886 | dump_firm_type_and_int_freq(priv->firm[pos].type, | ||
| 887 | priv->firm[pos].int_freq); | ||
| 888 | printk(KERN_CONT "(%x), id %016llx.\n", priv->firm[pos].type, | ||
| 889 | (unsigned long long)*id); | ||
| 890 | } | ||
| 891 | |||
| 892 | scode_buf[0] = 0x00; | ||
| 893 | memcpy(&scode_buf[1], p, 12); | ||
| 894 | |||
| 895 | /* Enter direct-mode */ | ||
| 896 | rc = xc_write_reg(priv, XREG_DIRECTSITTING_MODE, 0); | ||
| 897 | if (rc < 0) { | ||
| 898 | printk(KERN_ERR "failed to put device into direct mode!\n"); | ||
| 899 | return -EIO; | ||
| 900 | } | ||
| 901 | |||
| 902 | rc = xc_send_i2c_data(priv, scode_buf, 13); | ||
| 903 | if (rc != 0) { | ||
| 904 | /* Even if the send failed, make sure we set back to indirect | ||
| 905 | mode */ | ||
| 906 | printk(KERN_ERR "Failed to set scode %d\n", rc); | ||
| 907 | } | ||
| 908 | |||
| 909 | /* Switch back to indirect-mode */ | ||
| 910 | memset(indirect_mode, 0, sizeof(indirect_mode)); | ||
| 911 | indirect_mode[4] = 0x88; | ||
| 912 | xc_send_i2c_data(priv, indirect_mode, sizeof(indirect_mode)); | ||
| 913 | msleep(10); | ||
| 914 | |||
| 915 | return 0; | ||
| 916 | } | ||
| 917 | |||
| 918 | static int check_firmware(struct dvb_frontend *fe, unsigned int type, | ||
| 919 | v4l2_std_id std, __u16 int_freq) | ||
| 920 | { | ||
| 921 | struct xc4000_priv *priv = fe->tuner_priv; | ||
| 922 | struct firmware_properties new_fw; | ||
| 923 | int rc = 0, is_retry = 0; | ||
| 924 | u16 hwmodel; | ||
| 925 | v4l2_std_id std0; | ||
| 926 | u8 hw_major, hw_minor, fw_major, fw_minor; | ||
| 927 | |||
| 928 | dprintk(1, "%s called\n", __func__); | ||
| 929 | |||
| 930 | if (!priv->firm) { | ||
| 931 | rc = xc4000_fwupload(fe); | ||
| 932 | if (rc < 0) | ||
| 933 | return rc; | ||
| 934 | } | ||
| 935 | |||
| 936 | retry: | ||
| 937 | new_fw.type = type; | ||
| 938 | new_fw.id = std; | ||
| 939 | new_fw.std_req = std; | ||
| 940 | new_fw.scode_table = SCODE; | ||
| 941 | new_fw.scode_nr = 0; | ||
| 942 | new_fw.int_freq = int_freq; | ||
| 943 | |||
| 944 | dprintk(1, "checking firmware, user requested type="); | ||
| 945 | if (debug) { | ||
| 946 | dump_firm_type(new_fw.type); | ||
| 947 | printk(KERN_CONT "(%x), id %016llx, ", new_fw.type, | ||
| 948 | (unsigned long long)new_fw.std_req); | ||
| 949 | if (!int_freq) | ||
| 950 | printk(KERN_CONT "scode_tbl "); | ||
| 951 | else | ||
| 952 | printk(KERN_CONT "int_freq %d, ", new_fw.int_freq); | ||
| 953 | printk(KERN_CONT "scode_nr %d\n", new_fw.scode_nr); | ||
| 954 | } | ||
| 955 | |||
| 956 | /* No need to reload base firmware if it matches */ | ||
| 957 | if (priv->cur_fw.type & BASE) { | ||
| 958 | dprintk(1, "BASE firmware not changed.\n"); | ||
| 959 | goto skip_base; | ||
| 960 | } | ||
| 961 | |||
| 962 | /* Updating BASE - forget about all currently loaded firmware */ | ||
| 963 | memset(&priv->cur_fw, 0, sizeof(priv->cur_fw)); | ||
| 964 | |||
| 965 | /* Reset is needed before loading firmware */ | ||
| 966 | rc = xc4000_tuner_reset(fe); | ||
| 967 | if (rc < 0) | ||
| 968 | goto fail; | ||
| 969 | |||
| 970 | /* BASE firmwares are all std0 */ | ||
| 971 | std0 = 0; | ||
| 972 | rc = load_firmware(fe, BASE, &std0); | ||
| 973 | if (rc < 0) { | ||
| 974 | printk(KERN_ERR "Error %d while loading base firmware\n", rc); | ||
| 975 | goto fail; | ||
| 976 | } | ||
| 977 | |||
| 978 | /* Load INIT1, if needed */ | ||
| 979 | dprintk(1, "Load init1 firmware, if exists\n"); | ||
| 980 | |||
| 981 | rc = load_firmware(fe, BASE | INIT1, &std0); | ||
| 982 | if (rc == -ENOENT) | ||
| 983 | rc = load_firmware(fe, BASE | INIT1, &std0); | ||
| 984 | if (rc < 0 && rc != -ENOENT) { | ||
| 985 | tuner_err("Error %d while loading init1 firmware\n", | ||
| 986 | rc); | ||
| 987 | goto fail; | ||
| 988 | } | ||
| 989 | |||
| 990 | skip_base: | ||
| 991 | /* | ||
| 992 | * No need to reload standard specific firmware if base firmware | ||
| 993 | * was not reloaded and requested video standards have not changed. | ||
| 994 | */ | ||
| 995 | if (priv->cur_fw.type == (BASE | new_fw.type) && | ||
| 996 | priv->cur_fw.std_req == std) { | ||
| 997 | dprintk(1, "Std-specific firmware already loaded.\n"); | ||
| 998 | goto skip_std_specific; | ||
| 999 | } | ||
| 1000 | |||
| 1001 | /* Reloading std-specific firmware forces a SCODE update */ | ||
| 1002 | priv->cur_fw.scode_table = 0; | ||
| 1003 | |||
| 1004 | /* Load the standard firmware */ | ||
| 1005 | rc = load_firmware(fe, new_fw.type, &new_fw.id); | ||
| 1006 | |||
| 1007 | if (rc < 0) | ||
| 1008 | goto fail; | ||
| 1009 | |||
| 1010 | skip_std_specific: | ||
| 1011 | if (priv->cur_fw.scode_table == new_fw.scode_table && | ||
| 1012 | priv->cur_fw.scode_nr == new_fw.scode_nr) { | ||
| 1013 | dprintk(1, "SCODE firmware already loaded.\n"); | ||
| 1014 | goto check_device; | ||
| 1015 | } | ||
| 1016 | |||
| 1017 | /* Load SCODE firmware, if exists */ | ||
| 1018 | rc = load_scode(fe, new_fw.type | new_fw.scode_table, &new_fw.id, | ||
| 1019 | new_fw.int_freq, new_fw.scode_nr); | ||
| 1020 | if (rc != 0) | ||
| 1021 | dprintk(1, "load scode failed %d\n", rc); | ||
| 1022 | |||
| 1023 | check_device: | ||
| 1024 | rc = xc4000_readreg(priv, XREG_PRODUCT_ID, &hwmodel); | ||
| 1025 | |||
| 1026 | if (xc_get_version(priv, &hw_major, &hw_minor, &fw_major, | ||
| 1027 | &fw_minor) != 0) { | ||
| 1028 | printk(KERN_ERR "Unable to read tuner registers.\n"); | ||
| 1029 | goto fail; | ||
| 1030 | } | ||
| 1031 | |||
| 1032 | dprintk(1, "Device is Xceive %d version %d.%d, " | ||
| 1033 | "firmware version %d.%d\n", | ||
| 1034 | hwmodel, hw_major, hw_minor, fw_major, fw_minor); | ||
| 1035 | |||
| 1036 | /* Check firmware version against what we downloaded. */ | ||
| 1037 | if (priv->firm_version != ((fw_major << 8) | fw_minor)) { | ||
| 1038 | printk(KERN_WARNING | ||
| 1039 | "Incorrect readback of firmware version %d.%d.\n", | ||
| 1040 | fw_major, fw_minor); | ||
| 1041 | goto fail; | ||
| 1042 | } | ||
| 1043 | |||
| 1044 | /* Check that the tuner hardware model remains consistent over time. */ | ||
| 1045 | if (priv->hwmodel == 0 && | ||
| 1046 | (hwmodel == XC_PRODUCT_ID_XC4000 || | ||
| 1047 | hwmodel == XC_PRODUCT_ID_XC4100)) { | ||
| 1048 | priv->hwmodel = hwmodel; | ||
| 1049 | priv->hwvers = (hw_major << 8) | hw_minor; | ||
| 1050 | } else if (priv->hwmodel == 0 || priv->hwmodel != hwmodel || | ||
| 1051 | priv->hwvers != ((hw_major << 8) | hw_minor)) { | ||
| 1052 | printk(KERN_WARNING | ||
| 1053 | "Read invalid device hardware information - tuner " | ||
| 1054 | "hung?\n"); | ||
| 1055 | goto fail; | ||
| 1056 | } | ||
| 1057 | |||
| 1058 | memcpy(&priv->cur_fw, &new_fw, sizeof(priv->cur_fw)); | ||
| 1059 | |||
| 1060 | /* | ||
| 1061 | * By setting BASE in cur_fw.type only after successfully loading all | ||
| 1062 | * firmwares, we can: | ||
| 1063 | * 1. Identify that BASE firmware with type=0 has been loaded; | ||
| 1064 | * 2. Tell whether BASE firmware was just changed the next time through. | ||
| 1065 | */ | ||
| 1066 | priv->cur_fw.type |= BASE; | ||
| 1067 | |||
| 1068 | return 0; | ||
| 1069 | |||
| 1070 | fail: | ||
| 1071 | memset(&priv->cur_fw, 0, sizeof(priv->cur_fw)); | ||
| 1072 | if (!is_retry) { | ||
| 1073 | msleep(50); | ||
| 1074 | is_retry = 1; | ||
| 1075 | dprintk(1, "Retrying firmware load\n"); | ||
| 1076 | goto retry; | ||
| 1077 | } | ||
| 1078 | |||
| 1079 | if (rc == -ENOENT) | ||
| 1080 | rc = -EINVAL; | ||
| 1081 | return rc; | ||
| 1082 | } | ||
| 1083 | |||
| 1084 | static void xc_debug_dump(struct xc4000_priv *priv) | ||
| 1085 | { | ||
| 1086 | u16 adc_envelope; | ||
| 1087 | u32 freq_error_hz = 0; | ||
| 1088 | u16 lock_status; | ||
| 1089 | u32 hsync_freq_hz = 0; | ||
| 1090 | u16 frame_lines; | ||
| 1091 | u16 quality; | ||
| 1092 | u8 hw_majorversion = 0, hw_minorversion = 0; | ||
| 1093 | u8 fw_majorversion = 0, fw_minorversion = 0; | ||
| 1094 | |||
| 1095 | xc_get_adc_envelope(priv, &adc_envelope); | ||
| 1096 | dprintk(1, "*** ADC envelope (0-1023) = %d\n", adc_envelope); | ||
| 1097 | |||
| 1098 | xc_get_frequency_error(priv, &freq_error_hz); | ||
| 1099 | dprintk(1, "*** Frequency error = %d Hz\n", freq_error_hz); | ||
| 1100 | |||
| 1101 | xc_get_lock_status(priv, &lock_status); | ||
| 1102 | dprintk(1, "*** Lock status (0-Wait, 1-Locked, 2-No-signal) = %d\n", | ||
| 1103 | lock_status); | ||
| 1104 | |||
| 1105 | xc_get_version(priv, &hw_majorversion, &hw_minorversion, | ||
| 1106 | &fw_majorversion, &fw_minorversion); | ||
| 1107 | dprintk(1, "*** HW: V%02x.%02x, FW: V%02x.%02x\n", | ||
| 1108 | hw_majorversion, hw_minorversion, | ||
| 1109 | fw_majorversion, fw_minorversion); | ||
| 1110 | |||
| 1111 | if (priv->video_standard < XC4000_DTV6) { | ||
| 1112 | xc_get_hsync_freq(priv, &hsync_freq_hz); | ||
| 1113 | dprintk(1, "*** Horizontal sync frequency = %d Hz\n", | ||
| 1114 | hsync_freq_hz); | ||
| 1115 | |||
| 1116 | xc_get_frame_lines(priv, &frame_lines); | ||
| 1117 | dprintk(1, "*** Frame lines = %d\n", frame_lines); | ||
| 1118 | } | ||
| 1119 | |||
| 1120 | xc_get_quality(priv, &quality); | ||
| 1121 | dprintk(1, "*** Quality (0:<8dB, 7:>56dB) = %d\n", quality); | ||
| 1122 | } | ||
| 1123 | |||
| 1124 | static int xc4000_set_params(struct dvb_frontend *fe, | ||
| 1125 | struct dvb_frontend_parameters *params) | ||
| 1126 | { | ||
| 1127 | struct xc4000_priv *priv = fe->tuner_priv; | ||
| 1128 | unsigned int type; | ||
| 1129 | int ret = -EREMOTEIO; | ||
| 1130 | |||
| 1131 | dprintk(1, "%s() frequency=%d (Hz)\n", __func__, params->frequency); | ||
| 1132 | |||
| 1133 | mutex_lock(&priv->lock); | ||
| 1134 | |||
| 1135 | if (fe->ops.info.type == FE_ATSC) { | ||
| 1136 | dprintk(1, "%s() ATSC\n", __func__); | ||
| 1137 | switch (params->u.vsb.modulation) { | ||
| 1138 | case VSB_8: | ||
| 1139 | case VSB_16: | ||
| 1140 | dprintk(1, "%s() VSB modulation\n", __func__); | ||
| 1141 | priv->rf_mode = XC_RF_MODE_AIR; | ||
| 1142 | priv->freq_hz = params->frequency - 1750000; | ||
| 1143 | priv->bandwidth = BANDWIDTH_6_MHZ; | ||
| 1144 | priv->video_standard = XC4000_DTV6; | ||
| 1145 | type = DTV6; | ||
| 1146 | break; | ||
| 1147 | case QAM_64: | ||
| 1148 | case QAM_256: | ||
| 1149 | case QAM_AUTO: | ||
| 1150 | dprintk(1, "%s() QAM modulation\n", __func__); | ||
| 1151 | priv->rf_mode = XC_RF_MODE_CABLE; | ||
| 1152 | priv->freq_hz = params->frequency - 1750000; | ||
| 1153 | priv->bandwidth = BANDWIDTH_6_MHZ; | ||
| 1154 | priv->video_standard = XC4000_DTV6; | ||
| 1155 | type = DTV6; | ||
| 1156 | break; | ||
| 1157 | default: | ||
| 1158 | ret = -EINVAL; | ||
| 1159 | goto fail; | ||
| 1160 | } | ||
| 1161 | } else if (fe->ops.info.type == FE_OFDM) { | ||
| 1162 | dprintk(1, "%s() OFDM\n", __func__); | ||
| 1163 | switch (params->u.ofdm.bandwidth) { | ||
| 1164 | case BANDWIDTH_6_MHZ: | ||
| 1165 | priv->bandwidth = BANDWIDTH_6_MHZ; | ||
| 1166 | priv->video_standard = XC4000_DTV6; | ||
| 1167 | priv->freq_hz = params->frequency - 1750000; | ||
| 1168 | type = DTV6; | ||
| 1169 | break; | ||
| 1170 | case BANDWIDTH_7_MHZ: | ||
| 1171 | priv->bandwidth = BANDWIDTH_7_MHZ; | ||
| 1172 | priv->video_standard = XC4000_DTV7; | ||
| 1173 | priv->freq_hz = params->frequency - 2250000; | ||
| 1174 | type = DTV7; | ||
| 1175 | break; | ||
| 1176 | case BANDWIDTH_8_MHZ: | ||
| 1177 | priv->bandwidth = BANDWIDTH_8_MHZ; | ||
| 1178 | priv->video_standard = XC4000_DTV8; | ||
| 1179 | priv->freq_hz = params->frequency - 2750000; | ||
| 1180 | type = DTV8; | ||
| 1181 | break; | ||
| 1182 | case BANDWIDTH_AUTO: | ||
| 1183 | if (params->frequency < 400000000) { | ||
| 1184 | priv->bandwidth = BANDWIDTH_7_MHZ; | ||
| 1185 | priv->freq_hz = params->frequency - 2250000; | ||
| 1186 | } else { | ||
| 1187 | priv->bandwidth = BANDWIDTH_8_MHZ; | ||
| 1188 | priv->freq_hz = params->frequency - 2750000; | ||
| 1189 | } | ||
| 1190 | priv->video_standard = XC4000_DTV7_8; | ||
| 1191 | type = DTV78; | ||
| 1192 | break; | ||
| 1193 | default: | ||
| 1194 | printk(KERN_ERR "xc4000 bandwidth not set!\n"); | ||
| 1195 | ret = -EINVAL; | ||
| 1196 | goto fail; | ||
| 1197 | } | ||
| 1198 | priv->rf_mode = XC_RF_MODE_AIR; | ||
| 1199 | } else { | ||
| 1200 | printk(KERN_ERR "xc4000 modulation type not supported!\n"); | ||
| 1201 | ret = -EINVAL; | ||
| 1202 | goto fail; | ||
| 1203 | } | ||
| 1204 | |||
| 1205 | dprintk(1, "%s() frequency=%d (compensated)\n", | ||
| 1206 | __func__, priv->freq_hz); | ||
| 1207 | |||
| 1208 | /* Make sure the correct firmware type is loaded */ | ||
| 1209 | if (check_firmware(fe, type, 0, priv->if_khz) != 0) | ||
| 1210 | goto fail; | ||
| 1211 | |||
| 1212 | ret = xc_set_signal_source(priv, priv->rf_mode); | ||
| 1213 | if (ret != 0) { | ||
| 1214 | printk(KERN_ERR "xc4000: xc_set_signal_source(%d) failed\n", | ||
| 1215 | priv->rf_mode); | ||
| 1216 | goto fail; | ||
| 1217 | } else { | ||
| 1218 | u16 video_mode, audio_mode; | ||
| 1219 | video_mode = xc4000_standard[priv->video_standard].video_mode; | ||
| 1220 | audio_mode = xc4000_standard[priv->video_standard].audio_mode; | ||
| 1221 | if (type == DTV6 && priv->firm_version != 0x0102) | ||
| 1222 | video_mode |= 0x0001; | ||
| 1223 | ret = xc_set_tv_standard(priv, video_mode, audio_mode); | ||
| 1224 | if (ret != 0) { | ||
| 1225 | printk(KERN_ERR "xc4000: xc_set_tv_standard failed\n"); | ||
| 1226 | /* DJH - do not return when it fails... */ | ||
| 1227 | /* goto fail; */ | ||
| 1228 | } | ||
| 1229 | } | ||
| 1230 | |||
| 1231 | if (xc_write_reg(priv, XREG_D_CODE, 0) == 0) | ||
| 1232 | ret = 0; | ||
| 1233 | if (priv->dvb_amplitude != 0) { | ||
| 1234 | if (xc_write_reg(priv, XREG_AMPLITUDE, | ||
| 1235 | (priv->firm_version != 0x0102 || | ||
| 1236 | priv->dvb_amplitude != 134 ? | ||
| 1237 | priv->dvb_amplitude : 132)) != 0) | ||
| 1238 | ret = -EREMOTEIO; | ||
| 1239 | } | ||
| 1240 | if (priv->set_smoothedcvbs != 0) { | ||
| 1241 | if (xc_write_reg(priv, XREG_SMOOTHEDCVBS, 1) != 0) | ||
| 1242 | ret = -EREMOTEIO; | ||
| 1243 | } | ||
| 1244 | if (ret != 0) { | ||
| 1245 | printk(KERN_ERR "xc4000: setting registers failed\n"); | ||
| 1246 | /* goto fail; */ | ||
| 1247 | } | ||
| 1248 | |||
| 1249 | xc_tune_channel(priv, priv->freq_hz); | ||
| 1250 | |||
| 1251 | ret = 0; | ||
| 1252 | |||
| 1253 | fail: | ||
| 1254 | mutex_unlock(&priv->lock); | ||
| 1255 | |||
| 1256 | return ret; | ||
| 1257 | } | ||
| 1258 | |||
| 1259 | static int xc4000_set_analog_params(struct dvb_frontend *fe, | ||
| 1260 | struct analog_parameters *params) | ||
| 1261 | { | ||
| 1262 | struct xc4000_priv *priv = fe->tuner_priv; | ||
| 1263 | unsigned int type = 0; | ||
| 1264 | int ret = -EREMOTEIO; | ||
| 1265 | |||
| 1266 | if (params->mode == V4L2_TUNER_RADIO) { | ||
| 1267 | dprintk(1, "%s() frequency=%d (in units of 62.5Hz)\n", | ||
| 1268 | __func__, params->frequency); | ||
| 1269 | |||
| 1270 | mutex_lock(&priv->lock); | ||
| 1271 | |||
| 1272 | params->std = 0; | ||
| 1273 | priv->freq_hz = params->frequency * 125L / 2; | ||
| 1274 | |||
| 1275 | if (audio_std & XC4000_AUDIO_STD_INPUT1) { | ||
| 1276 | priv->video_standard = XC4000_FM_Radio_INPUT1; | ||
| 1277 | type = FM | INPUT1; | ||
| 1278 | } else { | ||
| 1279 | priv->video_standard = XC4000_FM_Radio_INPUT2; | ||
| 1280 | type = FM | INPUT2; | ||
| 1281 | } | ||
| 1282 | |||
| 1283 | goto tune_channel; | ||
| 1284 | } | ||
| 1285 | |||
| 1286 | dprintk(1, "%s() frequency=%d (in units of 62.5khz)\n", | ||
| 1287 | __func__, params->frequency); | ||
| 1288 | |||
| 1289 | mutex_lock(&priv->lock); | ||
| 1290 | |||
| 1291 | /* params->frequency is in units of 62.5khz */ | ||
| 1292 | priv->freq_hz = params->frequency * 62500; | ||
| 1293 | |||
| 1294 | params->std &= V4L2_STD_ALL; | ||
| 1295 | /* if std is not defined, choose one */ | ||
| 1296 | if (!params->std) | ||
| 1297 | params->std = V4L2_STD_PAL_BG; | ||
| 1298 | |||
| 1299 | if (audio_std & XC4000_AUDIO_STD_MONO) | ||
| 1300 | type = MONO; | ||
| 1301 | |||
| 1302 | if (params->std & V4L2_STD_MN) { | ||
| 1303 | params->std = V4L2_STD_MN; | ||
| 1304 | if (audio_std & XC4000_AUDIO_STD_MONO) { | ||
| 1305 | priv->video_standard = XC4000_MN_NTSC_PAL_Mono; | ||
| 1306 | } else if (audio_std & XC4000_AUDIO_STD_A2) { | ||
| 1307 | params->std |= V4L2_STD_A2; | ||
| 1308 | priv->video_standard = XC4000_MN_NTSC_PAL_A2; | ||
| 1309 | } else { | ||
| 1310 | params->std |= V4L2_STD_BTSC; | ||
| 1311 | priv->video_standard = XC4000_MN_NTSC_PAL_BTSC; | ||
| 1312 | } | ||
| 1313 | goto tune_channel; | ||
| 1314 | } | ||
| 1315 | |||
| 1316 | if (params->std & V4L2_STD_PAL_BG) { | ||
| 1317 | params->std = V4L2_STD_PAL_BG; | ||
| 1318 | if (audio_std & XC4000_AUDIO_STD_MONO) { | ||
| 1319 | priv->video_standard = XC4000_BG_PAL_MONO; | ||
| 1320 | } else if (!(audio_std & XC4000_AUDIO_STD_A2)) { | ||
| 1321 | if (!(audio_std & XC4000_AUDIO_STD_B)) { | ||
| 1322 | params->std |= V4L2_STD_NICAM_A; | ||
| 1323 | priv->video_standard = XC4000_BG_PAL_NICAM; | ||
| 1324 | } else { | ||
| 1325 | params->std |= V4L2_STD_NICAM_B; | ||
| 1326 | priv->video_standard = XC4000_BG_PAL_NICAM; | ||
| 1327 | } | ||
| 1328 | } else { | ||
| 1329 | if (!(audio_std & XC4000_AUDIO_STD_B)) { | ||
| 1330 | params->std |= V4L2_STD_A2_A; | ||
| 1331 | priv->video_standard = XC4000_BG_PAL_A2; | ||
| 1332 | } else { | ||
| 1333 | params->std |= V4L2_STD_A2_B; | ||
| 1334 | priv->video_standard = XC4000_BG_PAL_A2; | ||
| 1335 | } | ||
| 1336 | } | ||
| 1337 | goto tune_channel; | ||
| 1338 | } | ||
| 1339 | |||
| 1340 | if (params->std & V4L2_STD_PAL_I) { | ||
| 1341 | /* default to NICAM audio standard */ | ||
| 1342 | params->std = V4L2_STD_PAL_I | V4L2_STD_NICAM; | ||
| 1343 | if (audio_std & XC4000_AUDIO_STD_MONO) | ||
| 1344 | priv->video_standard = XC4000_I_PAL_NICAM_MONO; | ||
| 1345 | else | ||
| 1346 | priv->video_standard = XC4000_I_PAL_NICAM; | ||
| 1347 | goto tune_channel; | ||
| 1348 | } | ||
| 1349 | |||
| 1350 | if (params->std & V4L2_STD_PAL_DK) { | ||
| 1351 | params->std = V4L2_STD_PAL_DK; | ||
| 1352 | if (audio_std & XC4000_AUDIO_STD_MONO) { | ||
| 1353 | priv->video_standard = XC4000_DK_PAL_MONO; | ||
| 1354 | } else if (audio_std & XC4000_AUDIO_STD_A2) { | ||
| 1355 | params->std |= V4L2_STD_A2; | ||
| 1356 | priv->video_standard = XC4000_DK_PAL_A2; | ||
| 1357 | } else { | ||
| 1358 | params->std |= V4L2_STD_NICAM; | ||
| 1359 | priv->video_standard = XC4000_DK_PAL_NICAM; | ||
| 1360 | } | ||
| 1361 | goto tune_channel; | ||
| 1362 | } | ||
| 1363 | |||
| 1364 | if (params->std & V4L2_STD_SECAM_DK) { | ||
| 1365 | /* default to A2 audio standard */ | ||
| 1366 | params->std = V4L2_STD_SECAM_DK | V4L2_STD_A2; | ||
| 1367 | if (audio_std & XC4000_AUDIO_STD_L) { | ||
| 1368 | type = 0; | ||
| 1369 | priv->video_standard = XC4000_DK_SECAM_NICAM; | ||
| 1370 | } else if (audio_std & XC4000_AUDIO_STD_MONO) { | ||
| 1371 | priv->video_standard = XC4000_DK_SECAM_A2MONO; | ||
| 1372 | } else if (audio_std & XC4000_AUDIO_STD_K3) { | ||
| 1373 | params->std |= V4L2_STD_SECAM_K3; | ||
| 1374 | priv->video_standard = XC4000_DK_SECAM_A2LDK3; | ||
| 1375 | } else { | ||
| 1376 | priv->video_standard = XC4000_DK_SECAM_A2DK1; | ||
| 1377 | } | ||
| 1378 | goto tune_channel; | ||
| 1379 | } | ||
| 1380 | |||
| 1381 | if (params->std & V4L2_STD_SECAM_L) { | ||
| 1382 | /* default to NICAM audio standard */ | ||
| 1383 | type = 0; | ||
| 1384 | params->std = V4L2_STD_SECAM_L | V4L2_STD_NICAM; | ||
| 1385 | priv->video_standard = XC4000_L_SECAM_NICAM; | ||
| 1386 | goto tune_channel; | ||
| 1387 | } | ||
| 1388 | |||
| 1389 | if (params->std & V4L2_STD_SECAM_LC) { | ||
| 1390 | /* default to NICAM audio standard */ | ||
| 1391 | type = 0; | ||
| 1392 | params->std = V4L2_STD_SECAM_LC | V4L2_STD_NICAM; | ||
| 1393 | priv->video_standard = XC4000_LC_SECAM_NICAM; | ||
| 1394 | goto tune_channel; | ||
| 1395 | } | ||
| 1396 | |||
| 1397 | tune_channel: | ||
| 1398 | /* FIXME: it could be air. */ | ||
| 1399 | priv->rf_mode = XC_RF_MODE_CABLE; | ||
| 1400 | |||
| 1401 | if (check_firmware(fe, type, params->std, | ||
| 1402 | xc4000_standard[priv->video_standard].int_freq) != 0) | ||
| 1403 | goto fail; | ||
| 1404 | |||
| 1405 | ret = xc_set_signal_source(priv, priv->rf_mode); | ||
| 1406 | if (ret != 0) { | ||
| 1407 | printk(KERN_ERR | ||
| 1408 | "xc4000: xc_set_signal_source(%d) failed\n", | ||
| 1409 | priv->rf_mode); | ||
| 1410 | goto fail; | ||
| 1411 | } else { | ||
| 1412 | u16 video_mode, audio_mode; | ||
| 1413 | video_mode = xc4000_standard[priv->video_standard].video_mode; | ||
| 1414 | audio_mode = xc4000_standard[priv->video_standard].audio_mode; | ||
| 1415 | if (priv->video_standard < XC4000_BG_PAL_A2) { | ||
| 1416 | if (type & NOGD) | ||
| 1417 | video_mode &= 0xFF7F; | ||
| 1418 | } else if (priv->video_standard < XC4000_I_PAL_NICAM) { | ||
| 1419 | if (priv->firm_version == 0x0102) | ||
| 1420 | video_mode &= 0xFEFF; | ||
| 1421 | if (audio_std & XC4000_AUDIO_STD_B) | ||
| 1422 | video_mode |= 0x0080; | ||
| 1423 | } | ||
| 1424 | ret = xc_set_tv_standard(priv, video_mode, audio_mode); | ||
| 1425 | if (ret != 0) { | ||
| 1426 | printk(KERN_ERR "xc4000: xc_set_tv_standard failed\n"); | ||
| 1427 | goto fail; | ||
| 1428 | } | ||
| 1429 | } | ||
| 1430 | |||
| 1431 | if (xc_write_reg(priv, XREG_D_CODE, 0) == 0) | ||
| 1432 | ret = 0; | ||
| 1433 | if (xc_write_reg(priv, XREG_AMPLITUDE, 1) != 0) | ||
| 1434 | ret = -EREMOTEIO; | ||
| 1435 | if (priv->set_smoothedcvbs != 0) { | ||
| 1436 | if (xc_write_reg(priv, XREG_SMOOTHEDCVBS, 1) != 0) | ||
| 1437 | ret = -EREMOTEIO; | ||
| 1438 | } | ||
| 1439 | if (ret != 0) { | ||
| 1440 | printk(KERN_ERR "xc4000: setting registers failed\n"); | ||
| 1441 | goto fail; | ||
| 1442 | } | ||
| 1443 | |||
| 1444 | xc_tune_channel(priv, priv->freq_hz); | ||
| 1445 | |||
| 1446 | ret = 0; | ||
| 1447 | |||
| 1448 | fail: | ||
| 1449 | mutex_unlock(&priv->lock); | ||
| 1450 | |||
| 1451 | return ret; | ||
| 1452 | } | ||
| 1453 | |||
| 1454 | static int xc4000_get_frequency(struct dvb_frontend *fe, u32 *freq) | ||
| 1455 | { | ||
| 1456 | struct xc4000_priv *priv = fe->tuner_priv; | ||
| 1457 | |||
| 1458 | *freq = priv->freq_hz; | ||
| 1459 | |||
| 1460 | if (debug) { | ||
| 1461 | mutex_lock(&priv->lock); | ||
| 1462 | if ((priv->cur_fw.type | ||
| 1463 | & (BASE | FM | DTV6 | DTV7 | DTV78 | DTV8)) == BASE) { | ||
| 1464 | u16 snr = 0; | ||
| 1465 | if (xc4000_readreg(priv, XREG_SNR, &snr) == 0) { | ||
| 1466 | mutex_unlock(&priv->lock); | ||
| 1467 | dprintk(1, "%s() freq = %u, SNR = %d\n", | ||
| 1468 | __func__, *freq, snr); | ||
| 1469 | return 0; | ||
| 1470 | } | ||
| 1471 | } | ||
| 1472 | mutex_unlock(&priv->lock); | ||
| 1473 | } | ||
| 1474 | |||
| 1475 | dprintk(1, "%s()\n", __func__); | ||
| 1476 | |||
| 1477 | return 0; | ||
| 1478 | } | ||
| 1479 | |||
| 1480 | static int xc4000_get_bandwidth(struct dvb_frontend *fe, u32 *bw) | ||
| 1481 | { | ||
| 1482 | struct xc4000_priv *priv = fe->tuner_priv; | ||
| 1483 | dprintk(1, "%s()\n", __func__); | ||
| 1484 | |||
| 1485 | *bw = priv->bandwidth; | ||
| 1486 | return 0; | ||
| 1487 | } | ||
| 1488 | |||
| 1489 | static int xc4000_get_status(struct dvb_frontend *fe, u32 *status) | ||
| 1490 | { | ||
| 1491 | struct xc4000_priv *priv = fe->tuner_priv; | ||
| 1492 | u16 lock_status = 0; | ||
| 1493 | |||
| 1494 | mutex_lock(&priv->lock); | ||
| 1495 | |||
| 1496 | if (priv->cur_fw.type & BASE) | ||
| 1497 | xc_get_lock_status(priv, &lock_status); | ||
| 1498 | |||
| 1499 | *status = (lock_status == 1 ? | ||
| 1500 | TUNER_STATUS_LOCKED | TUNER_STATUS_STEREO : 0); | ||
| 1501 | if (priv->cur_fw.type & (DTV6 | DTV7 | DTV78 | DTV8)) | ||
| 1502 | *status &= (~TUNER_STATUS_STEREO); | ||
| 1503 | |||
| 1504 | mutex_unlock(&priv->lock); | ||
| 1505 | |||
| 1506 | dprintk(2, "%s() lock_status = %d\n", __func__, lock_status); | ||
| 1507 | |||
| 1508 | return 0; | ||
| 1509 | } | ||
| 1510 | |||
| 1511 | static int xc4000_sleep(struct dvb_frontend *fe) | ||
| 1512 | { | ||
| 1513 | struct xc4000_priv *priv = fe->tuner_priv; | ||
| 1514 | int ret = 0; | ||
| 1515 | |||
| 1516 | dprintk(1, "%s()\n", __func__); | ||
| 1517 | |||
| 1518 | mutex_lock(&priv->lock); | ||
| 1519 | |||
| 1520 | /* Avoid firmware reload on slow devices */ | ||
| 1521 | if ((no_poweroff == 2 || | ||
| 1522 | (no_poweroff == 0 && priv->default_pm != 0)) && | ||
| 1523 | (priv->cur_fw.type & BASE) != 0) { | ||
| 1524 | /* force reset and firmware reload */ | ||
| 1525 | priv->cur_fw.type = XC_POWERED_DOWN; | ||
| 1526 | |||
| 1527 | if (xc_write_reg(priv, XREG_POWER_DOWN, 0) != 0) { | ||
| 1528 | printk(KERN_ERR | ||
| 1529 | "xc4000: %s() unable to shutdown tuner\n", | ||
| 1530 | __func__); | ||
| 1531 | ret = -EREMOTEIO; | ||
| 1532 | } | ||
| 1533 | msleep(20); | ||
| 1534 | } | ||
| 1535 | |||
| 1536 | mutex_unlock(&priv->lock); | ||
| 1537 | |||
| 1538 | return ret; | ||
| 1539 | } | ||
| 1540 | |||
| 1541 | static int xc4000_init(struct dvb_frontend *fe) | ||
| 1542 | { | ||
| 1543 | dprintk(1, "%s()\n", __func__); | ||
| 1544 | |||
| 1545 | return 0; | ||
| 1546 | } | ||
| 1547 | |||
| 1548 | static int xc4000_release(struct dvb_frontend *fe) | ||
| 1549 | { | ||
| 1550 | struct xc4000_priv *priv = fe->tuner_priv; | ||
| 1551 | |||
| 1552 | dprintk(1, "%s()\n", __func__); | ||
| 1553 | |||
| 1554 | mutex_lock(&xc4000_list_mutex); | ||
| 1555 | |||
| 1556 | if (priv) | ||
| 1557 | hybrid_tuner_release_state(priv); | ||
| 1558 | |||
| 1559 | mutex_unlock(&xc4000_list_mutex); | ||
| 1560 | |||
| 1561 | fe->tuner_priv = NULL; | ||
| 1562 | |||
| 1563 | return 0; | ||
| 1564 | } | ||
| 1565 | |||
| 1566 | static const struct dvb_tuner_ops xc4000_tuner_ops = { | ||
| 1567 | .info = { | ||
| 1568 | .name = "Xceive XC4000", | ||
| 1569 | .frequency_min = 1000000, | ||
| 1570 | .frequency_max = 1023000000, | ||
| 1571 | .frequency_step = 50000, | ||
| 1572 | }, | ||
| 1573 | |||
| 1574 | .release = xc4000_release, | ||
| 1575 | .init = xc4000_init, | ||
| 1576 | .sleep = xc4000_sleep, | ||
| 1577 | |||
| 1578 | .set_params = xc4000_set_params, | ||
| 1579 | .set_analog_params = xc4000_set_analog_params, | ||
| 1580 | .get_frequency = xc4000_get_frequency, | ||
| 1581 | .get_bandwidth = xc4000_get_bandwidth, | ||
| 1582 | .get_status = xc4000_get_status | ||
| 1583 | }; | ||
| 1584 | |||
| 1585 | struct dvb_frontend *xc4000_attach(struct dvb_frontend *fe, | ||
| 1586 | struct i2c_adapter *i2c, | ||
| 1587 | struct xc4000_config *cfg) | ||
| 1588 | { | ||
| 1589 | struct xc4000_priv *priv = NULL; | ||
| 1590 | int instance; | ||
| 1591 | u16 id = 0; | ||
| 1592 | |||
| 1593 | dprintk(1, "%s(%d-%04x)\n", __func__, | ||
| 1594 | i2c ? i2c_adapter_id(i2c) : -1, | ||
| 1595 | cfg ? cfg->i2c_address : -1); | ||
| 1596 | |||
| 1597 | mutex_lock(&xc4000_list_mutex); | ||
| 1598 | |||
| 1599 | instance = hybrid_tuner_request_state(struct xc4000_priv, priv, | ||
| 1600 | hybrid_tuner_instance_list, | ||
| 1601 | i2c, cfg->i2c_address, "xc4000"); | ||
| 1602 | switch (instance) { | ||
| 1603 | case 0: | ||
| 1604 | goto fail; | ||
| 1605 | break; | ||
| 1606 | case 1: | ||
| 1607 | /* new tuner instance */ | ||
| 1608 | priv->bandwidth = BANDWIDTH_6_MHZ; | ||
| 1609 | /* set default configuration */ | ||
| 1610 | priv->if_khz = 4560; | ||
| 1611 | priv->default_pm = 0; | ||
| 1612 | priv->dvb_amplitude = 134; | ||
| 1613 | priv->set_smoothedcvbs = 1; | ||
| 1614 | mutex_init(&priv->lock); | ||
| 1615 | fe->tuner_priv = priv; | ||
| 1616 | break; | ||
| 1617 | default: | ||
| 1618 | /* existing tuner instance */ | ||
| 1619 | fe->tuner_priv = priv; | ||
| 1620 | break; | ||
| 1621 | } | ||
| 1622 | |||
| 1623 | if (cfg->if_khz != 0) { | ||
| 1624 | /* copy configuration if provided by the caller */ | ||
| 1625 | priv->if_khz = cfg->if_khz; | ||
| 1626 | priv->default_pm = cfg->default_pm; | ||
| 1627 | priv->dvb_amplitude = cfg->dvb_amplitude; | ||
| 1628 | priv->set_smoothedcvbs = cfg->set_smoothedcvbs; | ||
| 1629 | } | ||
| 1630 | |||
| 1631 | /* Check if firmware has been loaded. It is possible that another | ||
| 1632 | instance of the driver has loaded the firmware. | ||
| 1633 | */ | ||
| 1634 | |||
| 1635 | if (instance == 1) { | ||
| 1636 | if (xc4000_readreg(priv, XREG_PRODUCT_ID, &id) != 0) | ||
| 1637 | goto fail; | ||
| 1638 | } else { | ||
| 1639 | id = ((priv->cur_fw.type & BASE) != 0 ? | ||
| 1640 | priv->hwmodel : XC_PRODUCT_ID_FW_NOT_LOADED); | ||
| 1641 | } | ||
| 1642 | |||
| 1643 | switch (id) { | ||
| 1644 | case XC_PRODUCT_ID_XC4000: | ||
| 1645 | case XC_PRODUCT_ID_XC4100: | ||
| 1646 | printk(KERN_INFO | ||
| 1647 | "xc4000: Successfully identified at address 0x%02x\n", | ||
| 1648 | cfg->i2c_address); | ||
| 1649 | printk(KERN_INFO | ||
| 1650 | "xc4000: Firmware has been loaded previously\n"); | ||
| 1651 | break; | ||
| 1652 | case XC_PRODUCT_ID_FW_NOT_LOADED: | ||
| 1653 | printk(KERN_INFO | ||
| 1654 | "xc4000: Successfully identified at address 0x%02x\n", | ||
| 1655 | cfg->i2c_address); | ||
| 1656 | printk(KERN_INFO | ||
| 1657 | "xc4000: Firmware has not been loaded previously\n"); | ||
| 1658 | break; | ||
| 1659 | default: | ||
| 1660 | printk(KERN_ERR | ||
| 1661 | "xc4000: Device not found at addr 0x%02x (0x%x)\n", | ||
| 1662 | cfg->i2c_address, id); | ||
| 1663 | goto fail; | ||
| 1664 | } | ||
| 1665 | |||
| 1666 | mutex_unlock(&xc4000_list_mutex); | ||
| 1667 | |||
| 1668 | memcpy(&fe->ops.tuner_ops, &xc4000_tuner_ops, | ||
| 1669 | sizeof(struct dvb_tuner_ops)); | ||
| 1670 | |||
| 1671 | if (instance == 1) { | ||
| 1672 | int ret; | ||
| 1673 | mutex_lock(&priv->lock); | ||
| 1674 | ret = xc4000_fwupload(fe); | ||
| 1675 | mutex_unlock(&priv->lock); | ||
| 1676 | if (ret != 0) | ||
| 1677 | goto fail2; | ||
| 1678 | } | ||
| 1679 | |||
| 1680 | return fe; | ||
| 1681 | fail: | ||
| 1682 | mutex_unlock(&xc4000_list_mutex); | ||
| 1683 | fail2: | ||
| 1684 | xc4000_release(fe); | ||
| 1685 | return NULL; | ||
| 1686 | } | ||
| 1687 | EXPORT_SYMBOL(xc4000_attach); | ||
| 1688 | |||
| 1689 | MODULE_AUTHOR("Steven Toth, Davide Ferri"); | ||
| 1690 | MODULE_DESCRIPTION("Xceive xc4000 silicon tuner driver"); | ||
| 1691 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/media/common/tuners/xc4000.h b/drivers/media/common/tuners/xc4000.h new file mode 100644 index 000000000000..e6a44d151cbd --- /dev/null +++ b/drivers/media/common/tuners/xc4000.h | |||
| @@ -0,0 +1,67 @@ | |||
| 1 | /* | ||
| 2 | * Driver for Xceive XC4000 "QAM/8VSB single chip tuner" | ||
| 3 | * | ||
| 4 | * Copyright (c) 2007 Steven Toth <stoth@linuxtv.org> | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License as published by | ||
| 8 | * the Free Software Foundation; either version 2 of the License, or | ||
| 9 | * (at your option) any later version. | ||
| 10 | * | ||
| 11 | * This program is distributed in the hope that it will be useful, | ||
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 14 | * | ||
| 15 | * GNU General Public License for more details. | ||
| 16 | * | ||
| 17 | * You should have received a copy of the GNU General Public License | ||
| 18 | * along with this program; if not, write to the Free Software | ||
| 19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
| 20 | */ | ||
| 21 | |||
| 22 | #ifndef __XC4000_H__ | ||
| 23 | #define __XC4000_H__ | ||
| 24 | |||
| 25 | #include <linux/firmware.h> | ||
| 26 | |||
| 27 | struct dvb_frontend; | ||
| 28 | struct i2c_adapter; | ||
| 29 | |||
| 30 | struct xc4000_config { | ||
| 31 | u8 i2c_address; | ||
| 32 | /* if non-zero, power management is enabled by default */ | ||
| 33 | u8 default_pm; | ||
| 34 | /* value to be written to XREG_AMPLITUDE in DVB-T mode (0: no write) */ | ||
| 35 | u8 dvb_amplitude; | ||
| 36 | /* if non-zero, register 0x0E is set to filter analog TV video output */ | ||
| 37 | u8 set_smoothedcvbs; | ||
| 38 | /* IF for DVB-T */ | ||
| 39 | u32 if_khz; | ||
| 40 | }; | ||
| 41 | |||
| 42 | /* xc4000 callback command */ | ||
| 43 | #define XC4000_TUNER_RESET 0 | ||
| 44 | |||
| 45 | /* For each bridge framework, when it attaches either analog or digital, | ||
| 46 | * it has to store a reference back to its _core equivalent structure, | ||
| 47 | * so that it can service the hardware by steering gpio's etc. | ||
| 48 | * Each bridge implementation is different so cast devptr accordingly. | ||
| 49 | * The xc4000 driver cares not for this value, other than ensuring | ||
| 50 | * it's passed back to a bridge during tuner_callback(). | ||
| 51 | */ | ||
| 52 | |||
| 53 | #if defined(CONFIG_MEDIA_TUNER_XC4000) || (defined(CONFIG_MEDIA_TUNER_XC4000_MODULE) && defined(MODULE)) | ||
| 54 | extern struct dvb_frontend *xc4000_attach(struct dvb_frontend *fe, | ||
| 55 | struct i2c_adapter *i2c, | ||
| 56 | struct xc4000_config *cfg); | ||
| 57 | #else | ||
| 58 | static inline struct dvb_frontend *xc4000_attach(struct dvb_frontend *fe, | ||
| 59 | struct i2c_adapter *i2c, | ||
| 60 | struct xc4000_config *cfg) | ||
| 61 | { | ||
| 62 | printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); | ||
| 63 | return NULL; | ||
| 64 | } | ||
| 65 | #endif | ||
| 66 | |||
| 67 | #endif | ||
diff --git a/drivers/media/dvb/Kconfig b/drivers/media/dvb/Kconfig index ee214c3b63d7..f6e40b3a44cc 100644 --- a/drivers/media/dvb/Kconfig +++ b/drivers/media/dvb/Kconfig | |||
| @@ -80,6 +80,10 @@ comment "Supported nGene Adapters" | |||
| 80 | depends on DVB_CORE && PCI && I2C | 80 | depends on DVB_CORE && PCI && I2C |
| 81 | source "drivers/media/dvb/ngene/Kconfig" | 81 | source "drivers/media/dvb/ngene/Kconfig" |
| 82 | 82 | ||
| 83 | comment "Supported ddbridge ('Octopus') Adapters" | ||
| 84 | depends on DVB_CORE && PCI && I2C | ||
| 85 | source "drivers/media/dvb/ddbridge/Kconfig" | ||
| 86 | |||
| 83 | comment "Supported DVB Frontends" | 87 | comment "Supported DVB Frontends" |
| 84 | depends on DVB_CORE | 88 | depends on DVB_CORE |
| 85 | source "drivers/media/dvb/frontends/Kconfig" | 89 | source "drivers/media/dvb/frontends/Kconfig" |
diff --git a/drivers/media/dvb/Makefile b/drivers/media/dvb/Makefile index a1a08758a6f2..b2cefe637a64 100644 --- a/drivers/media/dvb/Makefile +++ b/drivers/media/dvb/Makefile | |||
| @@ -15,6 +15,7 @@ obj-y := dvb-core/ \ | |||
| 15 | dm1105/ \ | 15 | dm1105/ \ |
| 16 | pt1/ \ | 16 | pt1/ \ |
| 17 | mantis/ \ | 17 | mantis/ \ |
| 18 | ngene/ | 18 | ngene/ \ |
| 19 | ddbridge/ | ||
| 19 | 20 | ||
| 20 | obj-$(CONFIG_DVB_FIREDTV) += firewire/ | 21 | obj-$(CONFIG_DVB_FIREDTV) += firewire/ |
diff --git a/drivers/media/dvb/bt8xx/dvb-bt8xx.c b/drivers/media/dvb/bt8xx/dvb-bt8xx.c index 1e1106dcd063..521d69104982 100644 --- a/drivers/media/dvb/bt8xx/dvb-bt8xx.c +++ b/drivers/media/dvb/bt8xx/dvb-bt8xx.c | |||
| @@ -892,7 +892,7 @@ static int __devinit dvb_bt8xx_probe(struct bttv_sub_device *sub) | |||
| 892 | if (!(bttv_pci_dev = bttv_get_pcidev(card->bttv_nr))) { | 892 | if (!(bttv_pci_dev = bttv_get_pcidev(card->bttv_nr))) { |
| 893 | printk("dvb_bt8xx: no pci device for card %d\n", card->bttv_nr); | 893 | printk("dvb_bt8xx: no pci device for card %d\n", card->bttv_nr); |
| 894 | kfree(card); | 894 | kfree(card); |
| 895 | return -EFAULT; | 895 | return -ENODEV; |
| 896 | } | 896 | } |
| 897 | 897 | ||
| 898 | if (!(card->bt = dvb_bt8xx_878_match(card->bttv_nr, bttv_pci_dev))) { | 898 | if (!(card->bt = dvb_bt8xx_878_match(card->bttv_nr, bttv_pci_dev))) { |
| @@ -902,7 +902,7 @@ static int __devinit dvb_bt8xx_probe(struct bttv_sub_device *sub) | |||
| 902 | "installed, try removing it.\n"); | 902 | "installed, try removing it.\n"); |
| 903 | 903 | ||
| 904 | kfree(card); | 904 | kfree(card); |
| 905 | return -EFAULT; | 905 | return -ENODEV; |
| 906 | } | 906 | } |
| 907 | 907 | ||
| 908 | mutex_init(&card->bt->gpio_lock); | 908 | mutex_init(&card->bt->gpio_lock); |
diff --git a/drivers/media/dvb/ddbridge/Kconfig b/drivers/media/dvb/ddbridge/Kconfig new file mode 100644 index 000000000000..d099e1a12c85 --- /dev/null +++ b/drivers/media/dvb/ddbridge/Kconfig | |||
| @@ -0,0 +1,18 @@ | |||
| 1 | config DVB_DDBRIDGE | ||
| 2 | tristate "Digital Devices bridge support" | ||
| 3 | depends on DVB_CORE && PCI && I2C | ||
| 4 | select DVB_LNBP21 if !DVB_FE_CUSTOMISE | ||
| 5 | select DVB_STV6110x if !DVB_FE_CUSTOMISE | ||
| 6 | select DVB_STV090x if !DVB_FE_CUSTOMISE | ||
| 7 | select DVB_DRXK if !DVB_FE_CUSTOMISE | ||
| 8 | select DVB_TDA18271C2DD if !DVB_FE_CUSTOMISE | ||
| 9 | ---help--- | ||
| 10 | Support for cards with the Digital Devices PCI express bridge: | ||
| 11 | - Octopus PCIe Bridge | ||
| 12 | - Octopus mini PCIe Bridge | ||
| 13 | - Octopus LE | ||
| 14 | - DuoFlex S2 Octopus | ||
| 15 | - DuoFlex CT Octopus | ||
| 16 | - cineS2(v6) | ||
| 17 | |||
| 18 | Say Y if you own such a card and want to use it. | ||
diff --git a/drivers/media/dvb/ddbridge/Makefile b/drivers/media/dvb/ddbridge/Makefile new file mode 100644 index 000000000000..de4fe193c3ef --- /dev/null +++ b/drivers/media/dvb/ddbridge/Makefile | |||
| @@ -0,0 +1,14 @@ | |||
| 1 | # | ||
| 2 | # Makefile for the ddbridge device driver | ||
| 3 | # | ||
| 4 | |||
| 5 | ddbridge-objs := ddbridge-core.o | ||
| 6 | |||
| 7 | obj-$(CONFIG_DVB_DDBRIDGE) += ddbridge.o | ||
| 8 | |||
| 9 | EXTRA_CFLAGS += -Idrivers/media/dvb/dvb-core/ | ||
| 10 | EXTRA_CFLAGS += -Idrivers/media/dvb/frontends/ | ||
| 11 | EXTRA_CFLAGS += -Idrivers/media/common/tuners/ | ||
| 12 | |||
| 13 | # For the staging CI driver cxd2099 | ||
| 14 | EXTRA_CFLAGS += -Idrivers/staging/cxd2099/ | ||
diff --git a/drivers/media/dvb/ddbridge/ddbridge-core.c b/drivers/media/dvb/ddbridge/ddbridge-core.c new file mode 100644 index 000000000000..573d540f213e --- /dev/null +++ b/drivers/media/dvb/ddbridge/ddbridge-core.c | |||
| @@ -0,0 +1,1719 @@ | |||
| 1 | /* | ||
| 2 | * ddbridge.c: Digital Devices PCIe bridge driver | ||
| 3 | * | ||
| 4 | * Copyright (C) 2010-2011 Digital Devices GmbH | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or | ||
| 7 | * modify it under the terms of the GNU General Public License | ||
| 8 | * version 2 only, as published by the Free Software Foundation. | ||
| 9 | * | ||
| 10 | * | ||
| 11 | * This program is distributed in the hope that it will be useful, | ||
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 14 | * GNU General Public License for more details. | ||
| 15 | * | ||
| 16 | * | ||
| 17 | * You should have received a copy of the GNU General Public License | ||
| 18 | * along with this program; if not, write to the Free Software | ||
| 19 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA | ||
| 20 | * 02110-1301, USA | ||
| 21 | * Or, point your browser to http://www.gnu.org/copyleft/gpl.html | ||
| 22 | */ | ||
| 23 | |||
| 24 | #include <linux/module.h> | ||
| 25 | #include <linux/init.h> | ||
| 26 | #include <linux/interrupt.h> | ||
| 27 | #include <linux/delay.h> | ||
| 28 | #include <linux/slab.h> | ||
| 29 | #include <linux/poll.h> | ||
| 30 | #include <linux/io.h> | ||
| 31 | #include <linux/pci.h> | ||
| 32 | #include <linux/pci_ids.h> | ||
| 33 | #include <linux/timer.h> | ||
| 34 | #include <linux/version.h> | ||
| 35 | #include <linux/i2c.h> | ||
| 36 | #include <linux/swab.h> | ||
| 37 | #include <linux/vmalloc.h> | ||
| 38 | #include "ddbridge.h" | ||
| 39 | |||
| 40 | #include "ddbridge-regs.h" | ||
| 41 | |||
| 42 | #include "tda18271c2dd.h" | ||
| 43 | #include "stv6110x.h" | ||
| 44 | #include "stv090x.h" | ||
| 45 | #include "lnbh24.h" | ||
| 46 | #include "drxk.h" | ||
| 47 | |||
| 48 | DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); | ||
| 49 | |||
| 50 | /* MSI had problems with lost interrupts, fixed but needs testing */ | ||
| 51 | #undef CONFIG_PCI_MSI | ||
| 52 | |||
| 53 | /******************************************************************************/ | ||
| 54 | |||
| 55 | static int i2c_read(struct i2c_adapter *adapter, u8 adr, u8 *val) | ||
| 56 | { | ||
| 57 | struct i2c_msg msgs[1] = {{.addr = adr, .flags = I2C_M_RD, | ||
| 58 | .buf = val, .len = 1 } }; | ||
| 59 | return (i2c_transfer(adapter, msgs, 1) == 1) ? 0 : -1; | ||
| 60 | } | ||
| 61 | |||
| 62 | static int i2c_read_reg(struct i2c_adapter *adapter, u8 adr, u8 reg, u8 *val) | ||
| 63 | { | ||
| 64 | struct i2c_msg msgs[2] = {{.addr = adr, .flags = 0, | ||
| 65 | .buf = ®, .len = 1 }, | ||
| 66 | {.addr = adr, .flags = I2C_M_RD, | ||
| 67 | .buf = val, .len = 1 } }; | ||
| 68 | return (i2c_transfer(adapter, msgs, 2) == 2) ? 0 : -1; | ||
| 69 | } | ||
| 70 | |||
| 71 | static int i2c_read_reg16(struct i2c_adapter *adapter, u8 adr, | ||
| 72 | u16 reg, u8 *val) | ||
| 73 | { | ||
| 74 | u8 msg[2] = {reg>>8, reg&0xff}; | ||
| 75 | struct i2c_msg msgs[2] = {{.addr = adr, .flags = 0, | ||
| 76 | .buf = msg, .len = 2}, | ||
| 77 | {.addr = adr, .flags = I2C_M_RD, | ||
| 78 | .buf = val, .len = 1} }; | ||
| 79 | return (i2c_transfer(adapter, msgs, 2) == 2) ? 0 : -1; | ||
| 80 | } | ||
| 81 | |||
| 82 | static int ddb_i2c_cmd(struct ddb_i2c *i2c, u32 adr, u32 cmd) | ||
| 83 | { | ||
| 84 | struct ddb *dev = i2c->dev; | ||
| 85 | int stat; | ||
| 86 | u32 val; | ||
| 87 | |||
| 88 | i2c->done = 0; | ||
| 89 | ddbwritel((adr << 9) | cmd, i2c->regs + I2C_COMMAND); | ||
| 90 | stat = wait_event_timeout(i2c->wq, i2c->done == 1, HZ); | ||
| 91 | if (stat <= 0) { | ||
| 92 | printk(KERN_ERR "I2C timeout\n"); | ||
| 93 | { /* MSI debugging*/ | ||
| 94 | u32 istat = ddbreadl(INTERRUPT_STATUS); | ||
| 95 | printk(KERN_ERR "IRS %08x\n", istat); | ||
| 96 | ddbwritel(istat, INTERRUPT_ACK); | ||
| 97 | } | ||
| 98 | return -EIO; | ||
| 99 | } | ||
| 100 | val = ddbreadl(i2c->regs+I2C_COMMAND); | ||
| 101 | if (val & 0x70000) | ||
| 102 | return -EIO; | ||
| 103 | return 0; | ||
| 104 | } | ||
| 105 | |||
| 106 | static int ddb_i2c_master_xfer(struct i2c_adapter *adapter, | ||
| 107 | struct i2c_msg msg[], int num) | ||
| 108 | { | ||
| 109 | struct ddb_i2c *i2c = (struct ddb_i2c *)i2c_get_adapdata(adapter); | ||
| 110 | struct ddb *dev = i2c->dev; | ||
| 111 | u8 addr = 0; | ||
| 112 | |||
| 113 | if (num) | ||
| 114 | addr = msg[0].addr; | ||
| 115 | |||
| 116 | if (num == 2 && msg[1].flags & I2C_M_RD && | ||
| 117 | !(msg[0].flags & I2C_M_RD)) { | ||
| 118 | memcpy_toio(dev->regs + I2C_TASKMEM_BASE + i2c->wbuf, | ||
| 119 | msg[0].buf, msg[0].len); | ||
| 120 | ddbwritel(msg[0].len|(msg[1].len << 16), | ||
| 121 | i2c->regs+I2C_TASKLENGTH); | ||
| 122 | if (!ddb_i2c_cmd(i2c, addr, 1)) { | ||
| 123 | memcpy_fromio(msg[1].buf, | ||
| 124 | dev->regs + I2C_TASKMEM_BASE + i2c->rbuf, | ||
| 125 | msg[1].len); | ||
| 126 | return num; | ||
| 127 | } | ||
| 128 | } | ||
| 129 | |||
| 130 | if (num == 1 && !(msg[0].flags & I2C_M_RD)) { | ||
| 131 | ddbcpyto(I2C_TASKMEM_BASE + i2c->wbuf, msg[0].buf, msg[0].len); | ||
| 132 | ddbwritel(msg[0].len, i2c->regs + I2C_TASKLENGTH); | ||
| 133 | if (!ddb_i2c_cmd(i2c, addr, 2)) | ||
| 134 | return num; | ||
| 135 | } | ||
| 136 | if (num == 1 && (msg[0].flags & I2C_M_RD)) { | ||
| 137 | ddbwritel(msg[0].len << 16, i2c->regs + I2C_TASKLENGTH); | ||
| 138 | if (!ddb_i2c_cmd(i2c, addr, 3)) { | ||
| 139 | ddbcpyfrom(msg[0].buf, | ||
| 140 | I2C_TASKMEM_BASE + i2c->rbuf, msg[0].len); | ||
| 141 | return num; | ||
| 142 | } | ||
| 143 | } | ||
| 144 | return -EIO; | ||
| 145 | } | ||
| 146 | |||
| 147 | |||
| 148 | static u32 ddb_i2c_functionality(struct i2c_adapter *adap) | ||
| 149 | { | ||
| 150 | return I2C_FUNC_SMBUS_EMUL; | ||
| 151 | } | ||
| 152 | |||
| 153 | struct i2c_algorithm ddb_i2c_algo = { | ||
| 154 | .master_xfer = ddb_i2c_master_xfer, | ||
| 155 | .functionality = ddb_i2c_functionality, | ||
| 156 | }; | ||
| 157 | |||
| 158 | static void ddb_i2c_release(struct ddb *dev) | ||
| 159 | { | ||
| 160 | int i; | ||
| 161 | struct ddb_i2c *i2c; | ||
| 162 | struct i2c_adapter *adap; | ||
| 163 | |||
| 164 | for (i = 0; i < dev->info->port_num; i++) { | ||
| 165 | i2c = &dev->i2c[i]; | ||
| 166 | adap = &i2c->adap; | ||
| 167 | i2c_del_adapter(adap); | ||
| 168 | } | ||
| 169 | } | ||
| 170 | |||
| 171 | static int ddb_i2c_init(struct ddb *dev) | ||
| 172 | { | ||
| 173 | int i, j, stat = 0; | ||
| 174 | struct ddb_i2c *i2c; | ||
| 175 | struct i2c_adapter *adap; | ||
| 176 | |||
| 177 | for (i = 0; i < dev->info->port_num; i++) { | ||
| 178 | i2c = &dev->i2c[i]; | ||
| 179 | i2c->dev = dev; | ||
| 180 | i2c->nr = i; | ||
| 181 | i2c->wbuf = i * (I2C_TASKMEM_SIZE / 4); | ||
| 182 | i2c->rbuf = i2c->wbuf + (I2C_TASKMEM_SIZE / 8); | ||
| 183 | i2c->regs = 0x80 + i * 0x20; | ||
| 184 | ddbwritel(I2C_SPEED_100, i2c->regs + I2C_TIMING); | ||
| 185 | ddbwritel((i2c->rbuf << 16) | i2c->wbuf, | ||
| 186 | i2c->regs + I2C_TASKADDRESS); | ||
| 187 | init_waitqueue_head(&i2c->wq); | ||
| 188 | |||
| 189 | adap = &i2c->adap; | ||
| 190 | i2c_set_adapdata(adap, i2c); | ||
| 191 | #ifdef I2C_ADAP_CLASS_TV_DIGITAL | ||
| 192 | adap->class = I2C_ADAP_CLASS_TV_DIGITAL|I2C_CLASS_TV_ANALOG; | ||
| 193 | #else | ||
| 194 | #ifdef I2C_CLASS_TV_ANALOG | ||
| 195 | adap->class = I2C_CLASS_TV_ANALOG; | ||
| 196 | #endif | ||
| 197 | #endif | ||
| 198 | strcpy(adap->name, "ddbridge"); | ||
| 199 | adap->algo = &ddb_i2c_algo; | ||
| 200 | adap->algo_data = (void *)i2c; | ||
| 201 | adap->dev.parent = &dev->pdev->dev; | ||
| 202 | stat = i2c_add_adapter(adap); | ||
| 203 | if (stat) | ||
| 204 | break; | ||
| 205 | } | ||
| 206 | if (stat) | ||
| 207 | for (j = 0; j < i; j++) { | ||
| 208 | i2c = &dev->i2c[j]; | ||
| 209 | adap = &i2c->adap; | ||
| 210 | i2c_del_adapter(adap); | ||
| 211 | } | ||
| 212 | return stat; | ||
| 213 | } | ||
| 214 | |||
| 215 | |||
| 216 | /******************************************************************************/ | ||
| 217 | /******************************************************************************/ | ||
| 218 | /******************************************************************************/ | ||
| 219 | |||
| 220 | #if 0 | ||
| 221 | static void set_table(struct ddb *dev, u32 off, | ||
| 222 | dma_addr_t *pbuf, u32 num) | ||
| 223 | { | ||
| 224 | u32 i, base; | ||
| 225 | u64 mem; | ||
| 226 | |||
| 227 | base = DMA_BASE_ADDRESS_TABLE + off; | ||
| 228 | for (i = 0; i < num; i++) { | ||
| 229 | mem = pbuf[i]; | ||
| 230 | ddbwritel(mem & 0xffffffff, base + i * 8); | ||
| 231 | ddbwritel(mem >> 32, base + i * 8 + 4); | ||
| 232 | } | ||
| 233 | } | ||
| 234 | #endif | ||
| 235 | |||
| 236 | static void ddb_address_table(struct ddb *dev) | ||
| 237 | { | ||
| 238 | u32 i, j, base; | ||
| 239 | u64 mem; | ||
| 240 | dma_addr_t *pbuf; | ||
| 241 | |||
| 242 | for (i = 0; i < dev->info->port_num * 2; i++) { | ||
| 243 | base = DMA_BASE_ADDRESS_TABLE + i * 0x100; | ||
| 244 | pbuf = dev->input[i].pbuf; | ||
| 245 | for (j = 0; j < dev->input[i].dma_buf_num; j++) { | ||
| 246 | mem = pbuf[j]; | ||
| 247 | ddbwritel(mem & 0xffffffff, base + j * 8); | ||
| 248 | ddbwritel(mem >> 32, base + j * 8 + 4); | ||
| 249 | } | ||
| 250 | } | ||
| 251 | for (i = 0; i < dev->info->port_num; i++) { | ||
| 252 | base = DMA_BASE_ADDRESS_TABLE + 0x800 + i * 0x100; | ||
| 253 | pbuf = dev->output[i].pbuf; | ||
| 254 | for (j = 0; j < dev->output[i].dma_buf_num; j++) { | ||
| 255 | mem = pbuf[j]; | ||
| 256 | ddbwritel(mem & 0xffffffff, base + j * 8); | ||
| 257 | ddbwritel(mem >> 32, base + j * 8 + 4); | ||
| 258 | } | ||
| 259 | } | ||
| 260 | } | ||
| 261 | |||
| 262 | static void io_free(struct pci_dev *pdev, u8 **vbuf, | ||
| 263 | dma_addr_t *pbuf, u32 size, int num) | ||
| 264 | { | ||
| 265 | int i; | ||
| 266 | |||
| 267 | for (i = 0; i < num; i++) { | ||
| 268 | if (vbuf[i]) { | ||
| 269 | pci_free_consistent(pdev, size, vbuf[i], pbuf[i]); | ||
| 270 | vbuf[i] = 0; | ||
| 271 | } | ||
| 272 | } | ||
| 273 | } | ||
| 274 | |||
| 275 | static int io_alloc(struct pci_dev *pdev, u8 **vbuf, | ||
| 276 | dma_addr_t *pbuf, u32 size, int num) | ||
| 277 | { | ||
| 278 | int i; | ||
| 279 | |||
| 280 | for (i = 0; i < num; i++) { | ||
| 281 | vbuf[i] = pci_alloc_consistent(pdev, size, &pbuf[i]); | ||
| 282 | if (!vbuf[i]) | ||
| 283 | return -ENOMEM; | ||
| 284 | } | ||
| 285 | return 0; | ||
| 286 | } | ||
| 287 | |||
| 288 | static int ddb_buffers_alloc(struct ddb *dev) | ||
| 289 | { | ||
| 290 | int i; | ||
| 291 | struct ddb_port *port; | ||
| 292 | |||
| 293 | for (i = 0; i < dev->info->port_num; i++) { | ||
| 294 | port = &dev->port[i]; | ||
| 295 | switch (port->class) { | ||
| 296 | case DDB_PORT_TUNER: | ||
| 297 | if (io_alloc(dev->pdev, port->input[0]->vbuf, | ||
| 298 | port->input[0]->pbuf, | ||
| 299 | port->input[0]->dma_buf_size, | ||
| 300 | port->input[0]->dma_buf_num) < 0) | ||
| 301 | return -1; | ||
| 302 | if (io_alloc(dev->pdev, port->input[1]->vbuf, | ||
| 303 | port->input[1]->pbuf, | ||
| 304 | port->input[1]->dma_buf_size, | ||
| 305 | port->input[1]->dma_buf_num) < 0) | ||
| 306 | return -1; | ||
| 307 | break; | ||
| 308 | case DDB_PORT_CI: | ||
| 309 | if (io_alloc(dev->pdev, port->input[0]->vbuf, | ||
| 310 | port->input[0]->pbuf, | ||
| 311 | port->input[0]->dma_buf_size, | ||
| 312 | port->input[0]->dma_buf_num) < 0) | ||
| 313 | return -1; | ||
| 314 | if (io_alloc(dev->pdev, port->output->vbuf, | ||
| 315 | port->output->pbuf, | ||
| 316 | port->output->dma_buf_size, | ||
| 317 | port->output->dma_buf_num) < 0) | ||
| 318 | return -1; | ||
| 319 | break; | ||
| 320 | default: | ||
| 321 | break; | ||
| 322 | } | ||
| 323 | } | ||
| 324 | ddb_address_table(dev); | ||
| 325 | return 0; | ||
| 326 | } | ||
| 327 | |||
| 328 | static void ddb_buffers_free(struct ddb *dev) | ||
| 329 | { | ||
| 330 | int i; | ||
| 331 | struct ddb_port *port; | ||
| 332 | |||
| 333 | for (i = 0; i < dev->info->port_num; i++) { | ||
| 334 | port = &dev->port[i]; | ||
| 335 | io_free(dev->pdev, port->input[0]->vbuf, | ||
| 336 | port->input[0]->pbuf, | ||
| 337 | port->input[0]->dma_buf_size, | ||
| 338 | port->input[0]->dma_buf_num); | ||
| 339 | io_free(dev->pdev, port->input[1]->vbuf, | ||
| 340 | port->input[1]->pbuf, | ||
| 341 | port->input[1]->dma_buf_size, | ||
| 342 | port->input[1]->dma_buf_num); | ||
| 343 | io_free(dev->pdev, port->output->vbuf, | ||
| 344 | port->output->pbuf, | ||
| 345 | port->output->dma_buf_size, | ||
| 346 | port->output->dma_buf_num); | ||
| 347 | } | ||
| 348 | } | ||
| 349 | |||
| 350 | static void ddb_input_start(struct ddb_input *input) | ||
| 351 | { | ||
| 352 | struct ddb *dev = input->port->dev; | ||
| 353 | |||
| 354 | spin_lock_irq(&input->lock); | ||
| 355 | input->cbuf = 0; | ||
| 356 | input->coff = 0; | ||
| 357 | |||
| 358 | /* reset */ | ||
| 359 | ddbwritel(0, TS_INPUT_CONTROL(input->nr)); | ||
| 360 | ddbwritel(2, TS_INPUT_CONTROL(input->nr)); | ||
| 361 | ddbwritel(0, TS_INPUT_CONTROL(input->nr)); | ||
| 362 | |||
| 363 | ddbwritel((1 << 16) | | ||
| 364 | (input->dma_buf_num << 11) | | ||
| 365 | (input->dma_buf_size >> 7), | ||
| 366 | DMA_BUFFER_SIZE(input->nr)); | ||
| 367 | ddbwritel(0, DMA_BUFFER_ACK(input->nr)); | ||
| 368 | |||
| 369 | ddbwritel(1, DMA_BASE_WRITE); | ||
| 370 | ddbwritel(3, DMA_BUFFER_CONTROL(input->nr)); | ||
| 371 | ddbwritel(9, TS_INPUT_CONTROL(input->nr)); | ||
| 372 | input->running = 1; | ||
| 373 | spin_unlock_irq(&input->lock); | ||
| 374 | } | ||
| 375 | |||
| 376 | static void ddb_input_stop(struct ddb_input *input) | ||
| 377 | { | ||
| 378 | struct ddb *dev = input->port->dev; | ||
| 379 | |||
| 380 | spin_lock_irq(&input->lock); | ||
| 381 | ddbwritel(0, TS_INPUT_CONTROL(input->nr)); | ||
| 382 | ddbwritel(0, DMA_BUFFER_CONTROL(input->nr)); | ||
| 383 | input->running = 0; | ||
| 384 | spin_unlock_irq(&input->lock); | ||
| 385 | } | ||
| 386 | |||
| 387 | static void ddb_output_start(struct ddb_output *output) | ||
| 388 | { | ||
| 389 | struct ddb *dev = output->port->dev; | ||
| 390 | |||
| 391 | spin_lock_irq(&output->lock); | ||
| 392 | output->cbuf = 0; | ||
| 393 | output->coff = 0; | ||
| 394 | ddbwritel(0, TS_OUTPUT_CONTROL(output->nr)); | ||
| 395 | ddbwritel(2, TS_OUTPUT_CONTROL(output->nr)); | ||
| 396 | ddbwritel(0, TS_OUTPUT_CONTROL(output->nr)); | ||
| 397 | ddbwritel(0x3c, TS_OUTPUT_CONTROL(output->nr)); | ||
| 398 | ddbwritel((1 << 16) | | ||
| 399 | (output->dma_buf_num << 11) | | ||
| 400 | (output->dma_buf_size >> 7), | ||
| 401 | DMA_BUFFER_SIZE(output->nr + 8)); | ||
| 402 | ddbwritel(0, DMA_BUFFER_ACK(output->nr + 8)); | ||
| 403 | |||
| 404 | ddbwritel(1, DMA_BASE_READ); | ||
| 405 | ddbwritel(3, DMA_BUFFER_CONTROL(output->nr + 8)); | ||
| 406 | /* ddbwritel(0xbd, TS_OUTPUT_CONTROL(output->nr)); */ | ||
| 407 | ddbwritel(0x1d, TS_OUTPUT_CONTROL(output->nr)); | ||
| 408 | output->running = 1; | ||
| 409 | spin_unlock_irq(&output->lock); | ||
| 410 | } | ||
| 411 | |||
| 412 | static void ddb_output_stop(struct ddb_output *output) | ||
| 413 | { | ||
| 414 | struct ddb *dev = output->port->dev; | ||
| 415 | |||
| 416 | spin_lock_irq(&output->lock); | ||
| 417 | ddbwritel(0, TS_OUTPUT_CONTROL(output->nr)); | ||
| 418 | ddbwritel(0, DMA_BUFFER_CONTROL(output->nr + 8)); | ||
| 419 | output->running = 0; | ||
| 420 | spin_unlock_irq(&output->lock); | ||
| 421 | } | ||
| 422 | |||
| 423 | static u32 ddb_output_free(struct ddb_output *output) | ||
| 424 | { | ||
| 425 | u32 idx, off, stat = output->stat; | ||
| 426 | s32 diff; | ||
| 427 | |||
| 428 | idx = (stat >> 11) & 0x1f; | ||
| 429 | off = (stat & 0x7ff) << 7; | ||
| 430 | |||
| 431 | if (output->cbuf != idx) { | ||
| 432 | if ((((output->cbuf + 1) % output->dma_buf_num) == idx) && | ||
| 433 | (output->dma_buf_size - output->coff <= 188)) | ||
| 434 | return 0; | ||
| 435 | return 188; | ||
| 436 | } | ||
| 437 | diff = off - output->coff; | ||
| 438 | if (diff <= 0 || diff > 188) | ||
| 439 | return 188; | ||
| 440 | return 0; | ||
| 441 | } | ||
| 442 | |||
| 443 | static ssize_t ddb_output_write(struct ddb_output *output, | ||
| 444 | const u8 *buf, size_t count) | ||
| 445 | { | ||
| 446 | struct ddb *dev = output->port->dev; | ||
| 447 | u32 idx, off, stat = output->stat; | ||
| 448 | u32 left = count, len; | ||
| 449 | |||
| 450 | idx = (stat >> 11) & 0x1f; | ||
| 451 | off = (stat & 0x7ff) << 7; | ||
| 452 | |||
| 453 | while (left) { | ||
| 454 | len = output->dma_buf_size - output->coff; | ||
| 455 | if ((((output->cbuf + 1) % output->dma_buf_num) == idx) && | ||
| 456 | (off == 0)) { | ||
| 457 | if (len <= 188) | ||
| 458 | break; | ||
| 459 | len -= 188; | ||
| 460 | } | ||
| 461 | if (output->cbuf == idx) { | ||
| 462 | if (off > output->coff) { | ||
| 463 | #if 1 | ||
| 464 | len = off - output->coff; | ||
| 465 | len -= (len % 188); | ||
| 466 | if (len <= 188) | ||
| 467 | |||
| 468 | #endif | ||
| 469 | break; | ||
| 470 | len -= 188; | ||
| 471 | } | ||
| 472 | } | ||
| 473 | if (len > left) | ||
| 474 | len = left; | ||
| 475 | if (copy_from_user(output->vbuf[output->cbuf] + output->coff, | ||
| 476 | buf, len)) | ||
| 477 | return -EIO; | ||
| 478 | left -= len; | ||
| 479 | buf += len; | ||
| 480 | output->coff += len; | ||
| 481 | if (output->coff == output->dma_buf_size) { | ||
| 482 | output->coff = 0; | ||
| 483 | output->cbuf = ((output->cbuf + 1) % output->dma_buf_num); | ||
| 484 | } | ||
| 485 | ddbwritel((output->cbuf << 11) | (output->coff >> 7), | ||
| 486 | DMA_BUFFER_ACK(output->nr + 8)); | ||
| 487 | } | ||
| 488 | return count - left; | ||
| 489 | } | ||
| 490 | |||
| 491 | static u32 ddb_input_avail(struct ddb_input *input) | ||
| 492 | { | ||
| 493 | struct ddb *dev = input->port->dev; | ||
| 494 | u32 idx, off, stat = input->stat; | ||
| 495 | u32 ctrl = ddbreadl(DMA_BUFFER_CONTROL(input->nr)); | ||
| 496 | |||
| 497 | idx = (stat >> 11) & 0x1f; | ||
| 498 | off = (stat & 0x7ff) << 7; | ||
| 499 | |||
| 500 | if (ctrl & 4) { | ||
| 501 | printk(KERN_ERR "IA %d %d %08x\n", idx, off, ctrl); | ||
| 502 | ddbwritel(input->stat, DMA_BUFFER_ACK(input->nr)); | ||
| 503 | return 0; | ||
| 504 | } | ||
| 505 | if (input->cbuf != idx) | ||
| 506 | return 188; | ||
| 507 | return 0; | ||
| 508 | } | ||
| 509 | |||
| 510 | static size_t ddb_input_read(struct ddb_input *input, u8 *buf, size_t count) | ||
| 511 | { | ||
| 512 | struct ddb *dev = input->port->dev; | ||
| 513 | u32 left = count; | ||
| 514 | u32 idx, off, free, stat = input->stat; | ||
| 515 | int ret; | ||
| 516 | |||
| 517 | idx = (stat >> 11) & 0x1f; | ||
| 518 | off = (stat & 0x7ff) << 7; | ||
| 519 | |||
| 520 | while (left) { | ||
| 521 | if (input->cbuf == idx) | ||
| 522 | return count - left; | ||
| 523 | free = input->dma_buf_size - input->coff; | ||
| 524 | if (free > left) | ||
| 525 | free = left; | ||
| 526 | ret = copy_to_user(buf, input->vbuf[input->cbuf] + | ||
| 527 | input->coff, free); | ||
| 528 | input->coff += free; | ||
| 529 | if (input->coff == input->dma_buf_size) { | ||
| 530 | input->coff = 0; | ||
| 531 | input->cbuf = (input->cbuf+1) % input->dma_buf_num; | ||
| 532 | } | ||
| 533 | left -= free; | ||
| 534 | ddbwritel((input->cbuf << 11) | (input->coff >> 7), | ||
| 535 | DMA_BUFFER_ACK(input->nr)); | ||
| 536 | } | ||
| 537 | return count; | ||
| 538 | } | ||
| 539 | |||
| 540 | /******************************************************************************/ | ||
| 541 | /******************************************************************************/ | ||
| 542 | /******************************************************************************/ | ||
| 543 | |||
| 544 | #if 0 | ||
| 545 | static struct ddb_input *fe2input(struct ddb *dev, struct dvb_frontend *fe) | ||
| 546 | { | ||
| 547 | int i; | ||
| 548 | |||
| 549 | for (i = 0; i < dev->info->port_num * 2; i++) { | ||
| 550 | if (dev->input[i].fe == fe) | ||
| 551 | return &dev->input[i]; | ||
| 552 | } | ||
| 553 | return NULL; | ||
| 554 | } | ||
| 555 | #endif | ||
| 556 | |||
| 557 | static int drxk_gate_ctrl(struct dvb_frontend *fe, int enable) | ||
| 558 | { | ||
| 559 | struct ddb_input *input = fe->sec_priv; | ||
| 560 | struct ddb_port *port = input->port; | ||
| 561 | int status; | ||
| 562 | |||
| 563 | if (enable) { | ||
| 564 | mutex_lock(&port->i2c_gate_lock); | ||
| 565 | status = input->gate_ctrl(fe, 1); | ||
| 566 | } else { | ||
| 567 | status = input->gate_ctrl(fe, 0); | ||
| 568 | mutex_unlock(&port->i2c_gate_lock); | ||
| 569 | } | ||
| 570 | return status; | ||
| 571 | } | ||
| 572 | |||
| 573 | static int demod_attach_drxk(struct ddb_input *input) | ||
| 574 | { | ||
| 575 | struct i2c_adapter *i2c = &input->port->i2c->adap; | ||
| 576 | struct dvb_frontend *fe; | ||
| 577 | struct drxk_config config; | ||
| 578 | |||
| 579 | memset(&config, 0, sizeof(config)); | ||
| 580 | config.adr = 0x29 + (input->nr & 1); | ||
| 581 | |||
| 582 | fe = input->fe = dvb_attach(drxk_attach, &config, i2c, &input->fe2); | ||
| 583 | if (!input->fe) { | ||
| 584 | printk(KERN_ERR "No DRXK found!\n"); | ||
| 585 | return -ENODEV; | ||
| 586 | } | ||
| 587 | fe->sec_priv = input; | ||
| 588 | input->gate_ctrl = fe->ops.i2c_gate_ctrl; | ||
| 589 | fe->ops.i2c_gate_ctrl = drxk_gate_ctrl; | ||
| 590 | return 0; | ||
| 591 | } | ||
| 592 | |||
| 593 | static int tuner_attach_tda18271(struct ddb_input *input) | ||
| 594 | { | ||
| 595 | struct i2c_adapter *i2c = &input->port->i2c->adap; | ||
| 596 | struct dvb_frontend *fe; | ||
| 597 | |||
| 598 | if (input->fe->ops.i2c_gate_ctrl) | ||
| 599 | input->fe->ops.i2c_gate_ctrl(input->fe, 1); | ||
| 600 | fe = dvb_attach(tda18271c2dd_attach, input->fe, i2c, 0x60); | ||
| 601 | if (!fe) { | ||
| 602 | printk(KERN_ERR "No TDA18271 found!\n"); | ||
| 603 | return -ENODEV; | ||
| 604 | } | ||
| 605 | if (input->fe->ops.i2c_gate_ctrl) | ||
| 606 | input->fe->ops.i2c_gate_ctrl(input->fe, 0); | ||
| 607 | return 0; | ||
| 608 | } | ||
| 609 | |||
| 610 | /******************************************************************************/ | ||
| 611 | /******************************************************************************/ | ||
| 612 | /******************************************************************************/ | ||
| 613 | |||
| 614 | static struct stv090x_config stv0900 = { | ||
| 615 | .device = STV0900, | ||
| 616 | .demod_mode = STV090x_DUAL, | ||
| 617 | .clk_mode = STV090x_CLK_EXT, | ||
| 618 | |||
| 619 | .xtal = 27000000, | ||
| 620 | .address = 0x69, | ||
| 621 | |||
| 622 | .ts1_mode = STV090x_TSMODE_SERIAL_PUNCTURED, | ||
| 623 | .ts2_mode = STV090x_TSMODE_SERIAL_PUNCTURED, | ||
| 624 | |||
| 625 | .repeater_level = STV090x_RPTLEVEL_16, | ||
| 626 | |||
| 627 | .adc1_range = STV090x_ADC_1Vpp, | ||
| 628 | .adc2_range = STV090x_ADC_1Vpp, | ||
| 629 | |||
| 630 | .diseqc_envelope_mode = true, | ||
| 631 | }; | ||
| 632 | |||
| 633 | static struct stv090x_config stv0900_aa = { | ||
| 634 | .device = STV0900, | ||
| 635 | .demod_mode = STV090x_DUAL, | ||
| 636 | .clk_mode = STV090x_CLK_EXT, | ||
| 637 | |||
| 638 | .xtal = 27000000, | ||
| 639 | .address = 0x68, | ||
| 640 | |||
| 641 | .ts1_mode = STV090x_TSMODE_SERIAL_PUNCTURED, | ||
| 642 | .ts2_mode = STV090x_TSMODE_SERIAL_PUNCTURED, | ||
| 643 | |||
| 644 | .repeater_level = STV090x_RPTLEVEL_16, | ||
| 645 | |||
| 646 | .adc1_range = STV090x_ADC_1Vpp, | ||
| 647 | .adc2_range = STV090x_ADC_1Vpp, | ||
| 648 | |||
| 649 | .diseqc_envelope_mode = true, | ||
| 650 | }; | ||
| 651 | |||
| 652 | static struct stv6110x_config stv6110a = { | ||
| 653 | .addr = 0x60, | ||
| 654 | .refclk = 27000000, | ||
| 655 | .clk_div = 1, | ||
| 656 | }; | ||
| 657 | |||
| 658 | static struct stv6110x_config stv6110b = { | ||
| 659 | .addr = 0x63, | ||
| 660 | .refclk = 27000000, | ||
| 661 | .clk_div = 1, | ||
| 662 | }; | ||
| 663 | |||
| 664 | static int demod_attach_stv0900(struct ddb_input *input, int type) | ||
| 665 | { | ||
| 666 | struct i2c_adapter *i2c = &input->port->i2c->adap; | ||
| 667 | struct stv090x_config *feconf = type ? &stv0900_aa : &stv0900; | ||
| 668 | |||
| 669 | input->fe = dvb_attach(stv090x_attach, feconf, i2c, | ||
| 670 | (input->nr & 1) ? STV090x_DEMODULATOR_1 | ||
| 671 | : STV090x_DEMODULATOR_0); | ||
| 672 | if (!input->fe) { | ||
| 673 | printk(KERN_ERR "No STV0900 found!\n"); | ||
| 674 | return -ENODEV; | ||
| 675 | } | ||
| 676 | if (!dvb_attach(lnbh24_attach, input->fe, i2c, 0, | ||
| 677 | 0, (input->nr & 1) ? | ||
| 678 | (0x09 - type) : (0x0b - type))) { | ||
| 679 | printk(KERN_ERR "No LNBH24 found!\n"); | ||
| 680 | return -ENODEV; | ||
| 681 | } | ||
| 682 | return 0; | ||
| 683 | } | ||
| 684 | |||
| 685 | static int tuner_attach_stv6110(struct ddb_input *input, int type) | ||
| 686 | { | ||
| 687 | struct i2c_adapter *i2c = &input->port->i2c->adap; | ||
| 688 | struct stv090x_config *feconf = type ? &stv0900_aa : &stv0900; | ||
| 689 | struct stv6110x_config *tunerconf = (input->nr & 1) ? | ||
| 690 | &stv6110b : &stv6110a; | ||
| 691 | struct stv6110x_devctl *ctl; | ||
| 692 | |||
| 693 | ctl = dvb_attach(stv6110x_attach, input->fe, tunerconf, i2c); | ||
| 694 | if (!ctl) { | ||
| 695 | printk(KERN_ERR "No STV6110X found!\n"); | ||
| 696 | return -ENODEV; | ||
| 697 | } | ||
| 698 | printk(KERN_INFO "attach tuner input %d adr %02x\n", | ||
| 699 | input->nr, tunerconf->addr); | ||
| 700 | |||
| 701 | feconf->tuner_init = ctl->tuner_init; | ||
| 702 | feconf->tuner_sleep = ctl->tuner_sleep; | ||
| 703 | feconf->tuner_set_mode = ctl->tuner_set_mode; | ||
| 704 | feconf->tuner_set_frequency = ctl->tuner_set_frequency; | ||
| 705 | feconf->tuner_get_frequency = ctl->tuner_get_frequency; | ||
| 706 | feconf->tuner_set_bandwidth = ctl->tuner_set_bandwidth; | ||
| 707 | feconf->tuner_get_bandwidth = ctl->tuner_get_bandwidth; | ||
| 708 | feconf->tuner_set_bbgain = ctl->tuner_set_bbgain; | ||
| 709 | feconf->tuner_get_bbgain = ctl->tuner_get_bbgain; | ||
| 710 | feconf->tuner_set_refclk = ctl->tuner_set_refclk; | ||
| 711 | feconf->tuner_get_status = ctl->tuner_get_status; | ||
| 712 | |||
| 713 | return 0; | ||
| 714 | } | ||
| 715 | |||
| 716 | static int my_dvb_dmx_ts_card_init(struct dvb_demux *dvbdemux, char *id, | ||
| 717 | int (*start_feed)(struct dvb_demux_feed *), | ||
| 718 | int (*stop_feed)(struct dvb_demux_feed *), | ||
| 719 | void *priv) | ||
| 720 | { | ||
| 721 | dvbdemux->priv = priv; | ||
| 722 | |||
| 723 | dvbdemux->filternum = 256; | ||
| 724 | dvbdemux->feednum = 256; | ||
| 725 | dvbdemux->start_feed = start_feed; | ||
| 726 | dvbdemux->stop_feed = stop_feed; | ||
| 727 | dvbdemux->write_to_decoder = NULL; | ||
| 728 | dvbdemux->dmx.capabilities = (DMX_TS_FILTERING | | ||
| 729 | DMX_SECTION_FILTERING | | ||
| 730 | DMX_MEMORY_BASED_FILTERING); | ||
| 731 | return dvb_dmx_init(dvbdemux); | ||
| 732 | } | ||
| 733 | |||
| 734 | static int my_dvb_dmxdev_ts_card_init(struct dmxdev *dmxdev, | ||
| 735 | struct dvb_demux *dvbdemux, | ||
| 736 | struct dmx_frontend *hw_frontend, | ||
| 737 | struct dmx_frontend *mem_frontend, | ||
| 738 | struct dvb_adapter *dvb_adapter) | ||
| 739 | { | ||
| 740 | int ret; | ||
| 741 | |||
| 742 | dmxdev->filternum = 256; | ||
| 743 | dmxdev->demux = &dvbdemux->dmx; | ||
| 744 | dmxdev->capabilities = 0; | ||
| 745 | ret = dvb_dmxdev_init(dmxdev, dvb_adapter); | ||
| 746 | if (ret < 0) | ||
| 747 | return ret; | ||
| 748 | |||
| 749 | hw_frontend->source = DMX_FRONTEND_0; | ||
| 750 | dvbdemux->dmx.add_frontend(&dvbdemux->dmx, hw_frontend); | ||
| 751 | mem_frontend->source = DMX_MEMORY_FE; | ||
| 752 | dvbdemux->dmx.add_frontend(&dvbdemux->dmx, mem_frontend); | ||
| 753 | return dvbdemux->dmx.connect_frontend(&dvbdemux->dmx, hw_frontend); | ||
| 754 | } | ||
| 755 | |||
| 756 | static int start_feed(struct dvb_demux_feed *dvbdmxfeed) | ||
| 757 | { | ||
| 758 | struct dvb_demux *dvbdmx = dvbdmxfeed->demux; | ||
| 759 | struct ddb_input *input = dvbdmx->priv; | ||
| 760 | |||
| 761 | if (!input->users) | ||
| 762 | ddb_input_start(input); | ||
| 763 | |||
| 764 | return ++input->users; | ||
| 765 | } | ||
| 766 | |||
| 767 | static int stop_feed(struct dvb_demux_feed *dvbdmxfeed) | ||
| 768 | { | ||
| 769 | struct dvb_demux *dvbdmx = dvbdmxfeed->demux; | ||
| 770 | struct ddb_input *input = dvbdmx->priv; | ||
| 771 | |||
| 772 | if (--input->users) | ||
| 773 | return input->users; | ||
| 774 | |||
| 775 | ddb_input_stop(input); | ||
| 776 | return 0; | ||
| 777 | } | ||
| 778 | |||
| 779 | |||
| 780 | static void dvb_input_detach(struct ddb_input *input) | ||
| 781 | { | ||
| 782 | struct dvb_adapter *adap = &input->adap; | ||
| 783 | struct dvb_demux *dvbdemux = &input->demux; | ||
| 784 | |||
| 785 | switch (input->attached) { | ||
| 786 | case 5: | ||
| 787 | if (input->fe2) | ||
| 788 | dvb_unregister_frontend(input->fe2); | ||
| 789 | if (input->fe) { | ||
| 790 | dvb_unregister_frontend(input->fe); | ||
| 791 | dvb_frontend_detach(input->fe); | ||
| 792 | input->fe = NULL; | ||
| 793 | } | ||
| 794 | case 4: | ||
| 795 | dvb_net_release(&input->dvbnet); | ||
| 796 | |||
| 797 | case 3: | ||
| 798 | dvbdemux->dmx.close(&dvbdemux->dmx); | ||
| 799 | dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, | ||
| 800 | &input->hw_frontend); | ||
| 801 | dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, | ||
| 802 | &input->mem_frontend); | ||
| 803 | dvb_dmxdev_release(&input->dmxdev); | ||
| 804 | |||
| 805 | case 2: | ||
| 806 | dvb_dmx_release(&input->demux); | ||
| 807 | |||
| 808 | case 1: | ||
| 809 | dvb_unregister_adapter(adap); | ||
| 810 | } | ||
| 811 | input->attached = 0; | ||
| 812 | } | ||
| 813 | |||
| 814 | static int dvb_input_attach(struct ddb_input *input) | ||
| 815 | { | ||
| 816 | int ret; | ||
| 817 | struct ddb_port *port = input->port; | ||
| 818 | struct dvb_adapter *adap = &input->adap; | ||
| 819 | struct dvb_demux *dvbdemux = &input->demux; | ||
| 820 | |||
| 821 | ret = dvb_register_adapter(adap, "DDBridge", THIS_MODULE, | ||
| 822 | &input->port->dev->pdev->dev, | ||
| 823 | adapter_nr); | ||
| 824 | if (ret < 0) { | ||
| 825 | printk(KERN_ERR "ddbridge: Could not register adapter." | ||
| 826 | "Check if you enabled enough adapters in dvb-core!\n"); | ||
| 827 | return ret; | ||
| 828 | } | ||
| 829 | input->attached = 1; | ||
| 830 | |||
| 831 | ret = my_dvb_dmx_ts_card_init(dvbdemux, "SW demux", | ||
| 832 | start_feed, | ||
| 833 | stop_feed, input); | ||
| 834 | if (ret < 0) | ||
| 835 | return ret; | ||
| 836 | input->attached = 2; | ||
| 837 | |||
| 838 | ret = my_dvb_dmxdev_ts_card_init(&input->dmxdev, &input->demux, | ||
| 839 | &input->hw_frontend, | ||
| 840 | &input->mem_frontend, adap); | ||
| 841 | if (ret < 0) | ||
| 842 | return ret; | ||
| 843 | input->attached = 3; | ||
| 844 | |||
| 845 | ret = dvb_net_init(adap, &input->dvbnet, input->dmxdev.demux); | ||
| 846 | if (ret < 0) | ||
| 847 | return ret; | ||
| 848 | input->attached = 4; | ||
| 849 | |||
| 850 | input->fe = 0; | ||
| 851 | switch (port->type) { | ||
| 852 | case DDB_TUNER_DVBS_ST: | ||
| 853 | if (demod_attach_stv0900(input, 0) < 0) | ||
| 854 | return -ENODEV; | ||
| 855 | if (tuner_attach_stv6110(input, 0) < 0) | ||
| 856 | return -ENODEV; | ||
| 857 | if (input->fe) { | ||
| 858 | if (dvb_register_frontend(adap, input->fe) < 0) | ||
| 859 | return -ENODEV; | ||
| 860 | } | ||
| 861 | break; | ||
| 862 | case DDB_TUNER_DVBS_ST_AA: | ||
| 863 | if (demod_attach_stv0900(input, 1) < 0) | ||
| 864 | return -ENODEV; | ||
| 865 | if (tuner_attach_stv6110(input, 1) < 0) | ||
| 866 | return -ENODEV; | ||
| 867 | if (input->fe) { | ||
| 868 | if (dvb_register_frontend(adap, input->fe) < 0) | ||
| 869 | return -ENODEV; | ||
| 870 | } | ||
| 871 | break; | ||
| 872 | case DDB_TUNER_DVBCT_TR: | ||
| 873 | if (demod_attach_drxk(input) < 0) | ||
| 874 | return -ENODEV; | ||
| 875 | if (tuner_attach_tda18271(input) < 0) | ||
| 876 | return -ENODEV; | ||
| 877 | if (input->fe) { | ||
| 878 | if (dvb_register_frontend(adap, input->fe) < 0) | ||
| 879 | return -ENODEV; | ||
| 880 | } | ||
| 881 | if (input->fe2) { | ||
| 882 | if (dvb_register_frontend(adap, input->fe2) < 0) | ||
| 883 | return -ENODEV; | ||
| 884 | input->fe2->tuner_priv = input->fe->tuner_priv; | ||
| 885 | memcpy(&input->fe2->ops.tuner_ops, | ||
| 886 | &input->fe->ops.tuner_ops, | ||
| 887 | sizeof(struct dvb_tuner_ops)); | ||
| 888 | } | ||
| 889 | break; | ||
| 890 | } | ||
| 891 | input->attached = 5; | ||
| 892 | return 0; | ||
| 893 | } | ||
| 894 | |||
| 895 | /****************************************************************************/ | ||
| 896 | /****************************************************************************/ | ||
| 897 | |||
| 898 | static ssize_t ts_write(struct file *file, const char *buf, | ||
| 899 | size_t count, loff_t *ppos) | ||
| 900 | { | ||
| 901 | struct dvb_device *dvbdev = file->private_data; | ||
| 902 | struct ddb_output *output = dvbdev->priv; | ||
| 903 | size_t left = count; | ||
| 904 | int stat; | ||
| 905 | |||
| 906 | while (left) { | ||
| 907 | if (ddb_output_free(output) < 188) { | ||
| 908 | if (file->f_flags & O_NONBLOCK) | ||
| 909 | break; | ||
| 910 | if (wait_event_interruptible( | ||
| 911 | output->wq, ddb_output_free(output) >= 188) < 0) | ||
| 912 | break; | ||
| 913 | } | ||
| 914 | stat = ddb_output_write(output, buf, left); | ||
| 915 | if (stat < 0) | ||
| 916 | break; | ||
| 917 | buf += stat; | ||
| 918 | left -= stat; | ||
| 919 | } | ||
| 920 | return (left == count) ? -EAGAIN : (count - left); | ||
| 921 | } | ||
| 922 | |||
| 923 | static ssize_t ts_read(struct file *file, char *buf, | ||
| 924 | size_t count, loff_t *ppos) | ||
| 925 | { | ||
| 926 | struct dvb_device *dvbdev = file->private_data; | ||
| 927 | struct ddb_output *output = dvbdev->priv; | ||
| 928 | struct ddb_input *input = output->port->input[0]; | ||
| 929 | int left, read; | ||
| 930 | |||
| 931 | count -= count % 188; | ||
| 932 | left = count; | ||
| 933 | while (left) { | ||
| 934 | if (ddb_input_avail(input) < 188) { | ||
| 935 | if (file->f_flags & O_NONBLOCK) | ||
| 936 | break; | ||
| 937 | if (wait_event_interruptible( | ||
| 938 | input->wq, ddb_input_avail(input) >= 188) < 0) | ||
| 939 | break; | ||
| 940 | } | ||
| 941 | read = ddb_input_read(input, buf, left); | ||
| 942 | left -= read; | ||
| 943 | buf += read; | ||
| 944 | } | ||
| 945 | return (left == count) ? -EAGAIN : (count - left); | ||
| 946 | } | ||
| 947 | |||
| 948 | static unsigned int ts_poll(struct file *file, poll_table *wait) | ||
| 949 | { | ||
| 950 | /* | ||
| 951 | struct dvb_device *dvbdev = file->private_data; | ||
| 952 | struct ddb_output *output = dvbdev->priv; | ||
| 953 | struct ddb_input *input = output->port->input[0]; | ||
| 954 | */ | ||
| 955 | unsigned int mask = 0; | ||
| 956 | |||
| 957 | #if 0 | ||
| 958 | if (data_avail_to_read) | ||
| 959 | mask |= POLLIN | POLLRDNORM; | ||
| 960 | if (data_avail_to_write) | ||
| 961 | mask |= POLLOUT | POLLWRNORM; | ||
| 962 | |||
| 963 | poll_wait(file, &read_queue, wait); | ||
| 964 | poll_wait(file, &write_queue, wait); | ||
| 965 | #endif | ||
| 966 | return mask; | ||
| 967 | } | ||
| 968 | |||
| 969 | static const struct file_operations ci_fops = { | ||
| 970 | .owner = THIS_MODULE, | ||
| 971 | .read = ts_read, | ||
| 972 | .write = ts_write, | ||
| 973 | .open = dvb_generic_open, | ||
| 974 | .release = dvb_generic_release, | ||
| 975 | .poll = ts_poll, | ||
| 976 | .mmap = 0, | ||
| 977 | }; | ||
| 978 | |||
| 979 | static struct dvb_device dvbdev_ci = { | ||
| 980 | .priv = 0, | ||
| 981 | .readers = -1, | ||
| 982 | .writers = -1, | ||
| 983 | .users = -1, | ||
| 984 | .fops = &ci_fops, | ||
| 985 | }; | ||
| 986 | |||
| 987 | /****************************************************************************/ | ||
| 988 | /****************************************************************************/ | ||
| 989 | /****************************************************************************/ | ||
| 990 | |||
| 991 | static void input_tasklet(unsigned long data) | ||
| 992 | { | ||
| 993 | struct ddb_input *input = (struct ddb_input *) data; | ||
| 994 | struct ddb *dev = input->port->dev; | ||
| 995 | |||
| 996 | spin_lock(&input->lock); | ||
| 997 | if (!input->running) { | ||
| 998 | spin_unlock(&input->lock); | ||
| 999 | return; | ||
| 1000 | } | ||
| 1001 | input->stat = ddbreadl(DMA_BUFFER_CURRENT(input->nr)); | ||
| 1002 | |||
| 1003 | if (input->port->class == DDB_PORT_TUNER) { | ||
| 1004 | if (4&ddbreadl(DMA_BUFFER_CONTROL(input->nr))) | ||
| 1005 | printk(KERN_ERR "Overflow input %d\n", input->nr); | ||
| 1006 | while (input->cbuf != ((input->stat >> 11) & 0x1f) | ||
| 1007 | || (4&ddbreadl(DMA_BUFFER_CONTROL(input->nr)))) { | ||
| 1008 | dvb_dmx_swfilter_packets(&input->demux, | ||
| 1009 | input->vbuf[input->cbuf], | ||
| 1010 | input->dma_buf_size / 188); | ||
| 1011 | |||
| 1012 | input->cbuf = (input->cbuf + 1) % input->dma_buf_num; | ||
| 1013 | ddbwritel((input->cbuf << 11), | ||
| 1014 | DMA_BUFFER_ACK(input->nr)); | ||
| 1015 | input->stat = ddbreadl(DMA_BUFFER_CURRENT(input->nr)); | ||
| 1016 | } | ||
| 1017 | } | ||
| 1018 | if (input->port->class == DDB_PORT_CI) | ||
| 1019 | wake_up(&input->wq); | ||
| 1020 | spin_unlock(&input->lock); | ||
| 1021 | } | ||
| 1022 | |||
| 1023 | static void output_tasklet(unsigned long data) | ||
| 1024 | { | ||
| 1025 | struct ddb_output *output = (struct ddb_output *) data; | ||
| 1026 | struct ddb *dev = output->port->dev; | ||
| 1027 | |||
| 1028 | spin_lock(&output->lock); | ||
| 1029 | if (!output->running) { | ||
| 1030 | spin_unlock(&output->lock); | ||
| 1031 | return; | ||
| 1032 | } | ||
| 1033 | output->stat = ddbreadl(DMA_BUFFER_CURRENT(output->nr + 8)); | ||
| 1034 | wake_up(&output->wq); | ||
| 1035 | spin_unlock(&output->lock); | ||
| 1036 | } | ||
| 1037 | |||
| 1038 | |||
| 1039 | struct cxd2099_cfg cxd_cfg = { | ||
| 1040 | .bitrate = 62000, | ||
| 1041 | .adr = 0x40, | ||
| 1042 | .polarity = 1, | ||
| 1043 | .clock_mode = 1, | ||
| 1044 | }; | ||
| 1045 | |||
| 1046 | static int ddb_ci_attach(struct ddb_port *port) | ||
| 1047 | { | ||
| 1048 | int ret; | ||
| 1049 | |||
| 1050 | ret = dvb_register_adapter(&port->output->adap, | ||
| 1051 | "DDBridge", | ||
| 1052 | THIS_MODULE, | ||
| 1053 | &port->dev->pdev->dev, | ||
| 1054 | adapter_nr); | ||
| 1055 | if (ret < 0) | ||
| 1056 | return ret; | ||
| 1057 | port->en = cxd2099_attach(&cxd_cfg, port, &port->i2c->adap); | ||
| 1058 | if (!port->en) { | ||
| 1059 | dvb_unregister_adapter(&port->output->adap); | ||
| 1060 | return -ENODEV; | ||
| 1061 | } | ||
| 1062 | ddb_input_start(port->input[0]); | ||
| 1063 | ddb_output_start(port->output); | ||
| 1064 | dvb_ca_en50221_init(&port->output->adap, | ||
| 1065 | port->en, 0, 1); | ||
| 1066 | ret = dvb_register_device(&port->output->adap, &port->output->dev, | ||
| 1067 | &dvbdev_ci, (void *) port->output, | ||
| 1068 | DVB_DEVICE_SEC); | ||
| 1069 | return ret; | ||
| 1070 | } | ||
| 1071 | |||
| 1072 | static int ddb_port_attach(struct ddb_port *port) | ||
| 1073 | { | ||
| 1074 | int ret = 0; | ||
| 1075 | |||
| 1076 | switch (port->class) { | ||
| 1077 | case DDB_PORT_TUNER: | ||
| 1078 | ret = dvb_input_attach(port->input[0]); | ||
| 1079 | if (ret < 0) | ||
| 1080 | break; | ||
| 1081 | ret = dvb_input_attach(port->input[1]); | ||
| 1082 | break; | ||
| 1083 | case DDB_PORT_CI: | ||
| 1084 | ret = ddb_ci_attach(port); | ||
| 1085 | break; | ||
| 1086 | default: | ||
| 1087 | break; | ||
| 1088 | } | ||
| 1089 | if (ret < 0) | ||
| 1090 | printk(KERN_ERR "port_attach on port %d failed\n", port->nr); | ||
| 1091 | return ret; | ||
| 1092 | } | ||
| 1093 | |||
| 1094 | static int ddb_ports_attach(struct ddb *dev) | ||
| 1095 | { | ||
| 1096 | int i, ret = 0; | ||
| 1097 | struct ddb_port *port; | ||
| 1098 | |||
| 1099 | for (i = 0; i < dev->info->port_num; i++) { | ||
| 1100 | port = &dev->port[i]; | ||
| 1101 | ret = ddb_port_attach(port); | ||
| 1102 | if (ret < 0) | ||
| 1103 | break; | ||
| 1104 | } | ||
| 1105 | return ret; | ||
| 1106 | } | ||
| 1107 | |||
| 1108 | static void ddb_ports_detach(struct ddb *dev) | ||
| 1109 | { | ||
| 1110 | int i; | ||
| 1111 | struct ddb_port *port; | ||
| 1112 | |||
| 1113 | for (i = 0; i < dev->info->port_num; i++) { | ||
| 1114 | port = &dev->port[i]; | ||
| 1115 | switch (port->class) { | ||
| 1116 | case DDB_PORT_TUNER: | ||
| 1117 | dvb_input_detach(port->input[0]); | ||
| 1118 | dvb_input_detach(port->input[1]); | ||
| 1119 | break; | ||
| 1120 | case DDB_PORT_CI: | ||
| 1121 | if (port->output->dev) | ||
| 1122 | dvb_unregister_device(port->output->dev); | ||
| 1123 | if (port->en) { | ||
| 1124 | ddb_input_stop(port->input[0]); | ||
| 1125 | ddb_output_stop(port->output); | ||
| 1126 | dvb_ca_en50221_release(port->en); | ||
| 1127 | kfree(port->en); | ||
| 1128 | port->en = 0; | ||
| 1129 | dvb_unregister_adapter(&port->output->adap); | ||
| 1130 | } | ||
| 1131 | break; | ||
| 1132 | } | ||
| 1133 | } | ||
| 1134 | } | ||
| 1135 | |||
| 1136 | /****************************************************************************/ | ||
| 1137 | /****************************************************************************/ | ||
| 1138 | |||
| 1139 | static int port_has_ci(struct ddb_port *port) | ||
| 1140 | { | ||
| 1141 | u8 val; | ||
| 1142 | return i2c_read_reg(&port->i2c->adap, 0x40, 0, &val) ? 0 : 1; | ||
| 1143 | } | ||
| 1144 | |||
| 1145 | static int port_has_stv0900(struct ddb_port *port) | ||
| 1146 | { | ||
| 1147 | u8 val; | ||
| 1148 | if (i2c_read_reg16(&port->i2c->adap, 0x69, 0xf100, &val) < 0) | ||
| 1149 | return 0; | ||
| 1150 | return 1; | ||
| 1151 | } | ||
| 1152 | |||
| 1153 | static int port_has_stv0900_aa(struct ddb_port *port) | ||
| 1154 | { | ||
| 1155 | u8 val; | ||
| 1156 | if (i2c_read_reg16(&port->i2c->adap, 0x68, 0xf100, &val) < 0) | ||
| 1157 | return 0; | ||
| 1158 | return 1; | ||
| 1159 | } | ||
| 1160 | |||
| 1161 | static int port_has_drxks(struct ddb_port *port) | ||
| 1162 | { | ||
| 1163 | u8 val; | ||
| 1164 | if (i2c_read(&port->i2c->adap, 0x29, &val) < 0) | ||
| 1165 | return 0; | ||
| 1166 | if (i2c_read(&port->i2c->adap, 0x2a, &val) < 0) | ||
| 1167 | return 0; | ||
| 1168 | return 1; | ||
| 1169 | } | ||
| 1170 | |||
| 1171 | static void ddb_port_probe(struct ddb_port *port) | ||
| 1172 | { | ||
| 1173 | struct ddb *dev = port->dev; | ||
| 1174 | char *modname = "NO MODULE"; | ||
| 1175 | |||
| 1176 | port->class = DDB_PORT_NONE; | ||
| 1177 | |||
| 1178 | if (port_has_ci(port)) { | ||
| 1179 | modname = "CI"; | ||
| 1180 | port->class = DDB_PORT_CI; | ||
| 1181 | ddbwritel(I2C_SPEED_400, port->i2c->regs + I2C_TIMING); | ||
| 1182 | } else if (port_has_stv0900(port)) { | ||
| 1183 | modname = "DUAL DVB-S2"; | ||
| 1184 | port->class = DDB_PORT_TUNER; | ||
| 1185 | port->type = DDB_TUNER_DVBS_ST; | ||
| 1186 | ddbwritel(I2C_SPEED_100, port->i2c->regs + I2C_TIMING); | ||
| 1187 | } else if (port_has_stv0900_aa(port)) { | ||
| 1188 | modname = "DUAL DVB-S2"; | ||
| 1189 | port->class = DDB_PORT_TUNER; | ||
| 1190 | port->type = DDB_TUNER_DVBS_ST_AA; | ||
| 1191 | ddbwritel(I2C_SPEED_100, port->i2c->regs + I2C_TIMING); | ||
| 1192 | } else if (port_has_drxks(port)) { | ||
| 1193 | modname = "DUAL DVB-C/T"; | ||
| 1194 | port->class = DDB_PORT_TUNER; | ||
| 1195 | port->type = DDB_TUNER_DVBCT_TR; | ||
| 1196 | ddbwritel(I2C_SPEED_400, port->i2c->regs + I2C_TIMING); | ||
| 1197 | } | ||
| 1198 | printk(KERN_INFO "Port %d (TAB %d): %s\n", | ||
| 1199 | port->nr, port->nr+1, modname); | ||
| 1200 | } | ||
| 1201 | |||
| 1202 | static void ddb_input_init(struct ddb_port *port, int nr) | ||
| 1203 | { | ||
| 1204 | struct ddb *dev = port->dev; | ||
| 1205 | struct ddb_input *input = &dev->input[nr]; | ||
| 1206 | |||
| 1207 | input->nr = nr; | ||
| 1208 | input->port = port; | ||
| 1209 | input->dma_buf_num = INPUT_DMA_BUFS; | ||
| 1210 | input->dma_buf_size = INPUT_DMA_SIZE; | ||
| 1211 | ddbwritel(0, TS_INPUT_CONTROL(nr)); | ||
| 1212 | ddbwritel(2, TS_INPUT_CONTROL(nr)); | ||
| 1213 | ddbwritel(0, TS_INPUT_CONTROL(nr)); | ||
| 1214 | ddbwritel(0, DMA_BUFFER_ACK(nr)); | ||
| 1215 | tasklet_init(&input->tasklet, input_tasklet, (unsigned long) input); | ||
| 1216 | spin_lock_init(&input->lock); | ||
| 1217 | init_waitqueue_head(&input->wq); | ||
| 1218 | } | ||
| 1219 | |||
| 1220 | static void ddb_output_init(struct ddb_port *port, int nr) | ||
| 1221 | { | ||
| 1222 | struct ddb *dev = port->dev; | ||
| 1223 | struct ddb_output *output = &dev->output[nr]; | ||
| 1224 | output->nr = nr; | ||
| 1225 | output->port = port; | ||
| 1226 | output->dma_buf_num = OUTPUT_DMA_BUFS; | ||
| 1227 | output->dma_buf_size = OUTPUT_DMA_SIZE; | ||
| 1228 | |||
| 1229 | ddbwritel(0, TS_OUTPUT_CONTROL(nr)); | ||
| 1230 | ddbwritel(2, TS_OUTPUT_CONTROL(nr)); | ||
| 1231 | ddbwritel(0, TS_OUTPUT_CONTROL(nr)); | ||
| 1232 | tasklet_init(&output->tasklet, output_tasklet, (unsigned long) output); | ||
| 1233 | init_waitqueue_head(&output->wq); | ||
| 1234 | } | ||
| 1235 | |||
| 1236 | static void ddb_ports_init(struct ddb *dev) | ||
| 1237 | { | ||
| 1238 | int i; | ||
| 1239 | struct ddb_port *port; | ||
| 1240 | |||
| 1241 | for (i = 0; i < dev->info->port_num; i++) { | ||
| 1242 | port = &dev->port[i]; | ||
| 1243 | port->dev = dev; | ||
| 1244 | port->nr = i; | ||
| 1245 | port->i2c = &dev->i2c[i]; | ||
| 1246 | port->input[0] = &dev->input[2 * i]; | ||
| 1247 | port->input[1] = &dev->input[2 * i + 1]; | ||
| 1248 | port->output = &dev->output[i]; | ||
| 1249 | |||
| 1250 | mutex_init(&port->i2c_gate_lock); | ||
| 1251 | ddb_port_probe(port); | ||
| 1252 | ddb_input_init(port, 2 * i); | ||
| 1253 | ddb_input_init(port, 2 * i + 1); | ||
| 1254 | ddb_output_init(port, i); | ||
| 1255 | } | ||
| 1256 | } | ||
| 1257 | |||
| 1258 | static void ddb_ports_release(struct ddb *dev) | ||
| 1259 | { | ||
| 1260 | int i; | ||
| 1261 | struct ddb_port *port; | ||
| 1262 | |||
| 1263 | for (i = 0; i < dev->info->port_num; i++) { | ||
| 1264 | port = &dev->port[i]; | ||
| 1265 | port->dev = dev; | ||
| 1266 | tasklet_kill(&port->input[0]->tasklet); | ||
| 1267 | tasklet_kill(&port->input[1]->tasklet); | ||
| 1268 | tasklet_kill(&port->output->tasklet); | ||
| 1269 | } | ||
| 1270 | } | ||
| 1271 | |||
| 1272 | /****************************************************************************/ | ||
| 1273 | /****************************************************************************/ | ||
| 1274 | /****************************************************************************/ | ||
| 1275 | |||
| 1276 | static void irq_handle_i2c(struct ddb *dev, int n) | ||
| 1277 | { | ||
| 1278 | struct ddb_i2c *i2c = &dev->i2c[n]; | ||
| 1279 | |||
| 1280 | i2c->done = 1; | ||
| 1281 | wake_up(&i2c->wq); | ||
| 1282 | } | ||
| 1283 | |||
| 1284 | static irqreturn_t irq_handler(int irq, void *dev_id) | ||
| 1285 | { | ||
| 1286 | struct ddb *dev = (struct ddb *) dev_id; | ||
| 1287 | u32 s = ddbreadl(INTERRUPT_STATUS); | ||
| 1288 | |||
| 1289 | if (!s) | ||
| 1290 | return IRQ_NONE; | ||
| 1291 | |||
| 1292 | do { | ||
| 1293 | ddbwritel(s, INTERRUPT_ACK); | ||
| 1294 | |||
| 1295 | if (s & 0x00000001) | ||
| 1296 | irq_handle_i2c(dev, 0); | ||
| 1297 | if (s & 0x00000002) | ||
| 1298 | irq_handle_i2c(dev, 1); | ||
| 1299 | if (s & 0x00000004) | ||
| 1300 | irq_handle_i2c(dev, 2); | ||
| 1301 | if (s & 0x00000008) | ||
| 1302 | irq_handle_i2c(dev, 3); | ||
| 1303 | |||
| 1304 | if (s & 0x00000100) | ||
| 1305 | tasklet_schedule(&dev->input[0].tasklet); | ||
| 1306 | if (s & 0x00000200) | ||
| 1307 | tasklet_schedule(&dev->input[1].tasklet); | ||
| 1308 | if (s & 0x00000400) | ||
| 1309 | tasklet_schedule(&dev->input[2].tasklet); | ||
| 1310 | if (s & 0x00000800) | ||
| 1311 | tasklet_schedule(&dev->input[3].tasklet); | ||
| 1312 | if (s & 0x00001000) | ||
| 1313 | tasklet_schedule(&dev->input[4].tasklet); | ||
| 1314 | if (s & 0x00002000) | ||
| 1315 | tasklet_schedule(&dev->input[5].tasklet); | ||
| 1316 | if (s & 0x00004000) | ||
| 1317 | tasklet_schedule(&dev->input[6].tasklet); | ||
| 1318 | if (s & 0x00008000) | ||
| 1319 | tasklet_schedule(&dev->input[7].tasklet); | ||
| 1320 | |||
| 1321 | if (s & 0x00010000) | ||
| 1322 | tasklet_schedule(&dev->output[0].tasklet); | ||
| 1323 | if (s & 0x00020000) | ||
| 1324 | tasklet_schedule(&dev->output[1].tasklet); | ||
| 1325 | if (s & 0x00040000) | ||
| 1326 | tasklet_schedule(&dev->output[2].tasklet); | ||
| 1327 | if (s & 0x00080000) | ||
| 1328 | tasklet_schedule(&dev->output[3].tasklet); | ||
| 1329 | |||
| 1330 | /* if (s & 0x000f0000) printk(KERN_DEBUG "%08x\n", istat); */ | ||
| 1331 | } while ((s = ddbreadl(INTERRUPT_STATUS))); | ||
| 1332 | |||
| 1333 | return IRQ_HANDLED; | ||
| 1334 | } | ||
| 1335 | |||
| 1336 | /******************************************************************************/ | ||
| 1337 | /******************************************************************************/ | ||
| 1338 | /******************************************************************************/ | ||
| 1339 | |||
| 1340 | static int flashio(struct ddb *dev, u8 *wbuf, u32 wlen, u8 *rbuf, u32 rlen) | ||
| 1341 | { | ||
| 1342 | u32 data, shift; | ||
| 1343 | |||
| 1344 | if (wlen > 4) | ||
| 1345 | ddbwritel(1, SPI_CONTROL); | ||
| 1346 | while (wlen > 4) { | ||
| 1347 | /* FIXME: check for big-endian */ | ||
| 1348 | data = swab32(*(u32 *)wbuf); | ||
| 1349 | wbuf += 4; | ||
| 1350 | wlen -= 4; | ||
| 1351 | ddbwritel(data, SPI_DATA); | ||
| 1352 | while (ddbreadl(SPI_CONTROL) & 0x0004) | ||
| 1353 | ; | ||
| 1354 | } | ||
| 1355 | |||
| 1356 | if (rlen) | ||
| 1357 | ddbwritel(0x0001 | ((wlen << (8 + 3)) & 0x1f00), SPI_CONTROL); | ||
| 1358 | else | ||
| 1359 | ddbwritel(0x0003 | ((wlen << (8 + 3)) & 0x1f00), SPI_CONTROL); | ||
| 1360 | |||
| 1361 | data = 0; | ||
| 1362 | shift = ((4 - wlen) * 8); | ||
| 1363 | while (wlen) { | ||
| 1364 | data <<= 8; | ||
| 1365 | data |= *wbuf; | ||
| 1366 | wlen--; | ||
| 1367 | wbuf++; | ||
| 1368 | } | ||
| 1369 | if (shift) | ||
| 1370 | data <<= shift; | ||
| 1371 | ddbwritel(data, SPI_DATA); | ||
| 1372 | while (ddbreadl(SPI_CONTROL) & 0x0004) | ||
| 1373 | ; | ||
| 1374 | |||
| 1375 | if (!rlen) { | ||
| 1376 | ddbwritel(0, SPI_CONTROL); | ||
| 1377 | return 0; | ||
| 1378 | } | ||
| 1379 | if (rlen > 4) | ||
| 1380 | ddbwritel(1, SPI_CONTROL); | ||
| 1381 | |||
| 1382 | while (rlen > 4) { | ||
| 1383 | ddbwritel(0xffffffff, SPI_DATA); | ||
| 1384 | while (ddbreadl(SPI_CONTROL) & 0x0004) | ||
| 1385 | ; | ||
| 1386 | data = ddbreadl(SPI_DATA); | ||
| 1387 | *(u32 *) rbuf = swab32(data); | ||
| 1388 | rbuf += 4; | ||
| 1389 | rlen -= 4; | ||
| 1390 | } | ||
| 1391 | ddbwritel(0x0003 | ((rlen << (8 + 3)) & 0x1F00), SPI_CONTROL); | ||
| 1392 | ddbwritel(0xffffffff, SPI_DATA); | ||
| 1393 | while (ddbreadl(SPI_CONTROL) & 0x0004) | ||
| 1394 | ; | ||
| 1395 | |||
| 1396 | data = ddbreadl(SPI_DATA); | ||
| 1397 | ddbwritel(0, SPI_CONTROL); | ||
| 1398 | |||
| 1399 | if (rlen < 4) | ||
| 1400 | data <<= ((4 - rlen) * 8); | ||
| 1401 | |||
| 1402 | while (rlen > 0) { | ||
| 1403 | *rbuf = ((data >> 24) & 0xff); | ||
| 1404 | data <<= 8; | ||
| 1405 | rbuf++; | ||
| 1406 | rlen--; | ||
| 1407 | } | ||
| 1408 | return 0; | ||
| 1409 | } | ||
| 1410 | |||
| 1411 | #define DDB_MAGIC 'd' | ||
| 1412 | |||
| 1413 | struct ddb_flashio { | ||
| 1414 | __u8 *write_buf; | ||
| 1415 | __u32 write_len; | ||
| 1416 | __u8 *read_buf; | ||
| 1417 | __u32 read_len; | ||
| 1418 | }; | ||
| 1419 | |||
| 1420 | #define IOCTL_DDB_FLASHIO _IOWR(DDB_MAGIC, 0x00, struct ddb_flashio) | ||
| 1421 | |||
| 1422 | #define DDB_NAME "ddbridge" | ||
| 1423 | |||
| 1424 | static u32 ddb_num; | ||
| 1425 | static struct ddb *ddbs[32]; | ||
| 1426 | static struct class *ddb_class; | ||
| 1427 | static int ddb_major; | ||
| 1428 | |||
| 1429 | static int ddb_open(struct inode *inode, struct file *file) | ||
| 1430 | { | ||
| 1431 | struct ddb *dev = ddbs[iminor(inode)]; | ||
| 1432 | |||
| 1433 | file->private_data = dev; | ||
| 1434 | return 0; | ||
| 1435 | } | ||
| 1436 | |||
| 1437 | static long ddb_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | ||
| 1438 | { | ||
| 1439 | struct ddb *dev = file->private_data; | ||
| 1440 | void *parg = (void *)arg; | ||
| 1441 | int res = -EFAULT; | ||
| 1442 | |||
| 1443 | switch (cmd) { | ||
| 1444 | case IOCTL_DDB_FLASHIO: | ||
| 1445 | { | ||
| 1446 | struct ddb_flashio fio; | ||
| 1447 | u8 *rbuf, *wbuf; | ||
| 1448 | |||
| 1449 | if (copy_from_user(&fio, parg, sizeof(fio))) | ||
| 1450 | break; | ||
| 1451 | if (fio.write_len + fio.read_len > 1028) { | ||
| 1452 | printk(KERN_ERR "IOBUF too small\n"); | ||
| 1453 | return -ENOMEM; | ||
| 1454 | } | ||
| 1455 | wbuf = &dev->iobuf[0]; | ||
| 1456 | if (!wbuf) | ||
| 1457 | return -ENOMEM; | ||
| 1458 | rbuf = wbuf + fio.write_len; | ||
| 1459 | if (copy_from_user(wbuf, fio.write_buf, fio.write_len)) { | ||
| 1460 | vfree(wbuf); | ||
| 1461 | break; | ||
| 1462 | } | ||
| 1463 | res = flashio(dev, wbuf, fio.write_len, | ||
| 1464 | rbuf, fio.read_len); | ||
| 1465 | if (copy_to_user(fio.read_buf, rbuf, fio.read_len)) | ||
| 1466 | res = -EFAULT; | ||
| 1467 | break; | ||
| 1468 | } | ||
| 1469 | default: | ||
| 1470 | break; | ||
| 1471 | } | ||
| 1472 | return res; | ||
| 1473 | } | ||
| 1474 | |||
| 1475 | static const struct file_operations ddb_fops = { | ||
| 1476 | .unlocked_ioctl = ddb_ioctl, | ||
| 1477 | .open = ddb_open, | ||
| 1478 | }; | ||
| 1479 | |||
| 1480 | static char *ddb_devnode(struct device *device, mode_t *mode) | ||
| 1481 | { | ||
| 1482 | struct ddb *dev = dev_get_drvdata(device); | ||
| 1483 | |||
| 1484 | return kasprintf(GFP_KERNEL, "ddbridge/card%d", dev->nr); | ||
| 1485 | } | ||
| 1486 | |||
| 1487 | static int ddb_class_create(void) | ||
| 1488 | { | ||
| 1489 | ddb_major = register_chrdev(0, DDB_NAME, &ddb_fops); | ||
| 1490 | if (ddb_major < 0) | ||
| 1491 | return ddb_major; | ||
| 1492 | |||
| 1493 | ddb_class = class_create(THIS_MODULE, DDB_NAME); | ||
| 1494 | if (IS_ERR(ddb_class)) { | ||
| 1495 | unregister_chrdev(ddb_major, DDB_NAME); | ||
| 1496 | return -1; | ||
| 1497 | } | ||
| 1498 | ddb_class->devnode = ddb_devnode; | ||
| 1499 | return 0; | ||
| 1500 | } | ||
| 1501 | |||
| 1502 | static void ddb_class_destroy(void) | ||
| 1503 | { | ||
| 1504 | class_destroy(ddb_class); | ||
| 1505 | unregister_chrdev(ddb_major, DDB_NAME); | ||
| 1506 | } | ||
| 1507 | |||
| 1508 | static int ddb_device_create(struct ddb *dev) | ||
| 1509 | { | ||
| 1510 | dev->nr = ddb_num++; | ||
| 1511 | dev->ddb_dev = device_create(ddb_class, NULL, | ||
| 1512 | MKDEV(ddb_major, dev->nr), | ||
| 1513 | dev, "ddbridge%d", dev->nr); | ||
| 1514 | ddbs[dev->nr] = dev; | ||
| 1515 | if (IS_ERR(dev->ddb_dev)) | ||
| 1516 | return -1; | ||
| 1517 | return 0; | ||
| 1518 | } | ||
| 1519 | |||
| 1520 | static void ddb_device_destroy(struct ddb *dev) | ||
| 1521 | { | ||
| 1522 | ddb_num--; | ||
| 1523 | if (IS_ERR(dev->ddb_dev)) | ||
| 1524 | return; | ||
| 1525 | device_destroy(ddb_class, MKDEV(ddb_major, 0)); | ||
| 1526 | } | ||
| 1527 | |||
| 1528 | |||
| 1529 | /****************************************************************************/ | ||
| 1530 | /****************************************************************************/ | ||
| 1531 | /****************************************************************************/ | ||
| 1532 | |||
| 1533 | static void ddb_unmap(struct ddb *dev) | ||
| 1534 | { | ||
| 1535 | if (dev->regs) | ||
| 1536 | iounmap(dev->regs); | ||
| 1537 | vfree(dev); | ||
| 1538 | } | ||
| 1539 | |||
| 1540 | |||
| 1541 | static void __devexit ddb_remove(struct pci_dev *pdev) | ||
| 1542 | { | ||
| 1543 | struct ddb *dev = (struct ddb *) pci_get_drvdata(pdev); | ||
| 1544 | |||
| 1545 | ddb_ports_detach(dev); | ||
| 1546 | ddb_i2c_release(dev); | ||
| 1547 | |||
| 1548 | ddbwritel(0, INTERRUPT_ENABLE); | ||
| 1549 | free_irq(dev->pdev->irq, dev); | ||
| 1550 | #ifdef CONFIG_PCI_MSI | ||
| 1551 | if (dev->msi) | ||
| 1552 | pci_disable_msi(dev->pdev); | ||
| 1553 | #endif | ||
| 1554 | ddb_ports_release(dev); | ||
| 1555 | ddb_buffers_free(dev); | ||
| 1556 | ddb_device_destroy(dev); | ||
| 1557 | |||
| 1558 | ddb_unmap(dev); | ||
| 1559 | pci_set_drvdata(pdev, 0); | ||
| 1560 | pci_disable_device(pdev); | ||
| 1561 | } | ||
| 1562 | |||
| 1563 | |||
| 1564 | static int __devinit ddb_probe(struct pci_dev *pdev, | ||
| 1565 | const struct pci_device_id *id) | ||
| 1566 | { | ||
| 1567 | struct ddb *dev; | ||
| 1568 | int stat = 0; | ||
| 1569 | int irq_flag = IRQF_SHARED; | ||
| 1570 | |||
| 1571 | if (pci_enable_device(pdev) < 0) | ||
| 1572 | return -ENODEV; | ||
| 1573 | |||
| 1574 | dev = vmalloc(sizeof(struct ddb)); | ||
| 1575 | if (dev == NULL) | ||
| 1576 | return -ENOMEM; | ||
| 1577 | memset(dev, 0, sizeof(struct ddb)); | ||
| 1578 | |||
| 1579 | dev->pdev = pdev; | ||
| 1580 | pci_set_drvdata(pdev, dev); | ||
| 1581 | dev->info = (struct ddb_info *) id->driver_data; | ||
| 1582 | printk(KERN_INFO "DDBridge driver detected: %s\n", dev->info->name); | ||
| 1583 | |||
| 1584 | dev->regs = ioremap(pci_resource_start(dev->pdev, 0), | ||
| 1585 | pci_resource_len(dev->pdev, 0)); | ||
| 1586 | if (!dev->regs) { | ||
| 1587 | stat = -ENOMEM; | ||
| 1588 | goto fail; | ||
| 1589 | } | ||
| 1590 | printk(KERN_INFO "HW %08x FW %08x\n", ddbreadl(0), ddbreadl(4)); | ||
| 1591 | |||
| 1592 | #ifdef CONFIG_PCI_MSI | ||
| 1593 | if (pci_msi_enabled()) | ||
| 1594 | stat = pci_enable_msi(dev->pdev); | ||
| 1595 | if (stat) { | ||
| 1596 | printk(KERN_INFO ": MSI not available.\n"); | ||
| 1597 | } else { | ||
| 1598 | irq_flag = 0; | ||
| 1599 | dev->msi = 1; | ||
| 1600 | } | ||
| 1601 | #endif | ||
| 1602 | stat = request_irq(dev->pdev->irq, irq_handler, | ||
| 1603 | irq_flag, "DDBridge", (void *) dev); | ||
| 1604 | if (stat < 0) | ||
| 1605 | goto fail1; | ||
| 1606 | ddbwritel(0, DMA_BASE_WRITE); | ||
| 1607 | ddbwritel(0, DMA_BASE_READ); | ||
| 1608 | ddbwritel(0xffffffff, INTERRUPT_ACK); | ||
| 1609 | ddbwritel(0xfff0f, INTERRUPT_ENABLE); | ||
| 1610 | ddbwritel(0, MSI1_ENABLE); | ||
| 1611 | |||
| 1612 | if (ddb_i2c_init(dev) < 0) | ||
| 1613 | goto fail1; | ||
| 1614 | ddb_ports_init(dev); | ||
| 1615 | if (ddb_buffers_alloc(dev) < 0) { | ||
| 1616 | printk(KERN_INFO ": Could not allocate buffer memory\n"); | ||
| 1617 | goto fail2; | ||
| 1618 | } | ||
| 1619 | if (ddb_ports_attach(dev) < 0) | ||
| 1620 | goto fail3; | ||
| 1621 | ddb_device_create(dev); | ||
| 1622 | return 0; | ||
| 1623 | |||
| 1624 | fail3: | ||
| 1625 | ddb_ports_detach(dev); | ||
| 1626 | printk(KERN_ERR "fail3\n"); | ||
| 1627 | ddb_ports_release(dev); | ||
| 1628 | fail2: | ||
| 1629 | printk(KERN_ERR "fail2\n"); | ||
| 1630 | ddb_buffers_free(dev); | ||
| 1631 | fail1: | ||
| 1632 | printk(KERN_ERR "fail1\n"); | ||
| 1633 | if (dev->msi) | ||
| 1634 | pci_disable_msi(dev->pdev); | ||
| 1635 | free_irq(dev->pdev->irq, dev); | ||
| 1636 | fail: | ||
| 1637 | printk(KERN_ERR "fail\n"); | ||
| 1638 | ddb_unmap(dev); | ||
| 1639 | pci_set_drvdata(pdev, 0); | ||
| 1640 | pci_disable_device(pdev); | ||
| 1641 | return -1; | ||
| 1642 | } | ||
| 1643 | |||
| 1644 | /******************************************************************************/ | ||
| 1645 | /******************************************************************************/ | ||
| 1646 | /******************************************************************************/ | ||
| 1647 | |||
| 1648 | static struct ddb_info ddb_none = { | ||
| 1649 | .type = DDB_NONE, | ||
| 1650 | .name = "Digital Devices PCIe bridge", | ||
| 1651 | }; | ||
| 1652 | |||
| 1653 | static struct ddb_info ddb_octopus = { | ||
| 1654 | .type = DDB_OCTOPUS, | ||
| 1655 | .name = "Digital Devices Octopus DVB adapter", | ||
| 1656 | .port_num = 4, | ||
| 1657 | }; | ||
| 1658 | |||
| 1659 | static struct ddb_info ddb_octopus_le = { | ||
| 1660 | .type = DDB_OCTOPUS, | ||
| 1661 | .name = "Digital Devices Octopus LE DVB adapter", | ||
| 1662 | .port_num = 2, | ||
| 1663 | }; | ||
| 1664 | |||
| 1665 | static struct ddb_info ddb_v6 = { | ||
| 1666 | .type = DDB_OCTOPUS, | ||
| 1667 | .name = "Digital Devices Cine S2 V6 DVB adapter", | ||
| 1668 | .port_num = 3, | ||
| 1669 | }; | ||
| 1670 | |||
| 1671 | #define DDVID 0xdd01 /* Digital Devices Vendor ID */ | ||
| 1672 | |||
| 1673 | #define DDB_ID(_vend, _dev, _subvend, _subdev, _driverdata) { \ | ||
| 1674 | .vendor = _vend, .device = _dev, \ | ||
| 1675 | .subvendor = _subvend, .subdevice = _subdev, \ | ||
| 1676 | .driver_data = (unsigned long)&_driverdata } | ||
| 1677 | |||
| 1678 | static const struct pci_device_id ddb_id_tbl[] __devinitdata = { | ||
| 1679 | DDB_ID(DDVID, 0x0002, DDVID, 0x0001, ddb_octopus), | ||
| 1680 | DDB_ID(DDVID, 0x0003, DDVID, 0x0001, ddb_octopus), | ||
| 1681 | DDB_ID(DDVID, 0x0003, DDVID, 0x0002, ddb_octopus_le), | ||
| 1682 | DDB_ID(DDVID, 0x0003, DDVID, 0x0010, ddb_octopus), | ||
| 1683 | DDB_ID(DDVID, 0x0003, DDVID, 0x0020, ddb_v6), | ||
| 1684 | /* in case sub-ids got deleted in flash */ | ||
| 1685 | DDB_ID(DDVID, 0x0003, PCI_ANY_ID, PCI_ANY_ID, ddb_none), | ||
| 1686 | {0} | ||
| 1687 | }; | ||
| 1688 | MODULE_DEVICE_TABLE(pci, ddb_id_tbl); | ||
| 1689 | |||
| 1690 | |||
| 1691 | static struct pci_driver ddb_pci_driver = { | ||
| 1692 | .name = "DDBridge", | ||
| 1693 | .id_table = ddb_id_tbl, | ||
| 1694 | .probe = ddb_probe, | ||
| 1695 | .remove = ddb_remove, | ||
| 1696 | }; | ||
| 1697 | |||
| 1698 | static __init int module_init_ddbridge(void) | ||
| 1699 | { | ||
| 1700 | printk(KERN_INFO "Digital Devices PCIE bridge driver, " | ||
| 1701 | "Copyright (C) 2010-11 Digital Devices GmbH\n"); | ||
| 1702 | if (ddb_class_create()) | ||
| 1703 | return -1; | ||
| 1704 | return pci_register_driver(&ddb_pci_driver); | ||
| 1705 | } | ||
| 1706 | |||
| 1707 | static __exit void module_exit_ddbridge(void) | ||
| 1708 | { | ||
| 1709 | pci_unregister_driver(&ddb_pci_driver); | ||
| 1710 | ddb_class_destroy(); | ||
| 1711 | } | ||
| 1712 | |||
| 1713 | module_init(module_init_ddbridge); | ||
| 1714 | module_exit(module_exit_ddbridge); | ||
| 1715 | |||
| 1716 | MODULE_DESCRIPTION("Digital Devices PCIe Bridge"); | ||
| 1717 | MODULE_AUTHOR("Ralph Metzler"); | ||
| 1718 | MODULE_LICENSE("GPL"); | ||
| 1719 | MODULE_VERSION("0.5"); | ||
diff --git a/drivers/media/dvb/ddbridge/ddbridge-regs.h b/drivers/media/dvb/ddbridge/ddbridge-regs.h new file mode 100644 index 000000000000..a3ccb318b500 --- /dev/null +++ b/drivers/media/dvb/ddbridge/ddbridge-regs.h | |||
| @@ -0,0 +1,151 @@ | |||
| 1 | /* | ||
| 2 | * ddbridge-regs.h: Digital Devices PCIe bridge driver | ||
| 3 | * | ||
| 4 | * Copyright (C) 2010-2011 Digital Devices GmbH | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or | ||
| 7 | * modify it under the terms of the GNU General Public License | ||
| 8 | * version 2 only, as published by the Free Software Foundation. | ||
| 9 | * | ||
| 10 | * | ||
| 11 | * This program is distributed in the hope that it will be useful, | ||
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 14 | * GNU General Public License for more details. | ||
| 15 | * | ||
| 16 | * | ||
| 17 | * You should have received a copy of the GNU General Public License | ||
| 18 | * along with this program; if not, write to the Free Software | ||
| 19 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA | ||
| 20 | * 02110-1301, USA | ||
| 21 | * Or, point your browser to http://www.gnu.org/copyleft/gpl.html | ||
| 22 | */ | ||
| 23 | |||
| 24 | /* DD-DVBBridgeV1.h 273 2010-09-17 05:03:16Z manfred */ | ||
| 25 | |||
| 26 | /* Register Definitions */ | ||
| 27 | |||
| 28 | #define CUR_REGISTERMAP_VERSION 0x10000 | ||
| 29 | |||
| 30 | #define HARDWARE_VERSION 0x00 | ||
| 31 | #define REGISTERMAP_VERSION 0x04 | ||
| 32 | |||
| 33 | /* ------------------------------------------------------------------------- */ | ||
| 34 | /* SPI Controller */ | ||
| 35 | |||
| 36 | #define SPI_CONTROL 0x10 | ||
| 37 | #define SPI_DATA 0x14 | ||
| 38 | |||
| 39 | /* ------------------------------------------------------------------------- */ | ||
| 40 | |||
| 41 | /* Interrupt controller */ | ||
| 42 | /* How many MSI's are available depends on HW (Min 2 max 8) */ | ||
| 43 | /* How many are usable also depends on Host platform */ | ||
| 44 | |||
| 45 | #define INTERRUPT_BASE (0x40) | ||
| 46 | |||
| 47 | #define INTERRUPT_ENABLE (INTERRUPT_BASE + 0x00) | ||
| 48 | #define MSI0_ENABLE (INTERRUPT_BASE + 0x00) | ||
| 49 | #define MSI1_ENABLE (INTERRUPT_BASE + 0x04) | ||
| 50 | #define MSI2_ENABLE (INTERRUPT_BASE + 0x08) | ||
| 51 | #define MSI3_ENABLE (INTERRUPT_BASE + 0x0C) | ||
| 52 | #define MSI4_ENABLE (INTERRUPT_BASE + 0x10) | ||
| 53 | #define MSI5_ENABLE (INTERRUPT_BASE + 0x14) | ||
| 54 | #define MSI6_ENABLE (INTERRUPT_BASE + 0x18) | ||
| 55 | #define MSI7_ENABLE (INTERRUPT_BASE + 0x1C) | ||
| 56 | |||
| 57 | #define INTERRUPT_STATUS (INTERRUPT_BASE + 0x20) | ||
| 58 | #define INTERRUPT_ACK (INTERRUPT_BASE + 0x20) | ||
| 59 | |||
| 60 | #define INTMASK_I2C1 (0x00000001) | ||
| 61 | #define INTMASK_I2C2 (0x00000002) | ||
| 62 | #define INTMASK_I2C3 (0x00000004) | ||
| 63 | #define INTMASK_I2C4 (0x00000008) | ||
| 64 | |||
| 65 | #define INTMASK_CIRQ1 (0x00000010) | ||
| 66 | #define INTMASK_CIRQ2 (0x00000020) | ||
| 67 | #define INTMASK_CIRQ3 (0x00000040) | ||
| 68 | #define INTMASK_CIRQ4 (0x00000080) | ||
| 69 | |||
| 70 | #define INTMASK_TSINPUT1 (0x00000100) | ||
| 71 | #define INTMASK_TSINPUT2 (0x00000200) | ||
| 72 | #define INTMASK_TSINPUT3 (0x00000400) | ||
| 73 | #define INTMASK_TSINPUT4 (0x00000800) | ||
| 74 | #define INTMASK_TSINPUT5 (0x00001000) | ||
| 75 | #define INTMASK_TSINPUT6 (0x00002000) | ||
| 76 | #define INTMASK_TSINPUT7 (0x00004000) | ||
| 77 | #define INTMASK_TSINPUT8 (0x00008000) | ||
| 78 | |||
| 79 | #define INTMASK_TSOUTPUT1 (0x00010000) | ||
| 80 | #define INTMASK_TSOUTPUT2 (0x00020000) | ||
| 81 | #define INTMASK_TSOUTPUT3 (0x00040000) | ||
| 82 | #define INTMASK_TSOUTPUT4 (0x00080000) | ||
| 83 | |||
| 84 | /* ------------------------------------------------------------------------- */ | ||
| 85 | /* I2C Master Controller */ | ||
| 86 | |||
| 87 | #define I2C_BASE (0x80) /* Byte offset */ | ||
| 88 | |||
| 89 | #define I2C_COMMAND (0x00) | ||
| 90 | #define I2C_TIMING (0x04) | ||
| 91 | #define I2C_TASKLENGTH (0x08) /* High read, low write */ | ||
| 92 | #define I2C_TASKADDRESS (0x0C) /* High read, low write */ | ||
| 93 | |||
| 94 | #define I2C_MONITOR (0x1C) | ||
| 95 | |||
| 96 | #define I2C_BASE_1 (I2C_BASE + 0x00) | ||
| 97 | #define I2C_BASE_2 (I2C_BASE + 0x20) | ||
| 98 | #define I2C_BASE_3 (I2C_BASE + 0x40) | ||
| 99 | #define I2C_BASE_4 (I2C_BASE + 0x60) | ||
| 100 | |||
| 101 | #define I2C_BASE_N(i) (I2C_BASE + (i) * 0x20) | ||
| 102 | |||
| 103 | #define I2C_TASKMEM_BASE (0x1000) /* Byte offset */ | ||
| 104 | #define I2C_TASKMEM_SIZE (0x1000) | ||
| 105 | |||
| 106 | #define I2C_SPEED_400 (0x04030404) | ||
| 107 | #define I2C_SPEED_200 (0x09080909) | ||
| 108 | #define I2C_SPEED_154 (0x0C0B0C0C) | ||
| 109 | #define I2C_SPEED_100 (0x13121313) | ||
| 110 | #define I2C_SPEED_77 (0x19181919) | ||
| 111 | #define I2C_SPEED_50 (0x27262727) | ||
| 112 | |||
| 113 | |||
| 114 | /* ------------------------------------------------------------------------- */ | ||
| 115 | /* DMA Controller */ | ||
| 116 | |||
| 117 | #define DMA_BASE_WRITE (0x100) | ||
| 118 | #define DMA_BASE_READ (0x140) | ||
| 119 | |||
| 120 | #define DMA_CONTROL (0x00) /* 64 */ | ||
| 121 | #define DMA_ERROR (0x04) /* 65 ( only read instance ) */ | ||
| 122 | |||
| 123 | #define DMA_DIAG_CONTROL (0x1C) /* 71 */ | ||
| 124 | #define DMA_DIAG_PACKETCOUNTER_LOW (0x20) /* 72 */ | ||
| 125 | #define DMA_DIAG_PACKETCOUNTER_HIGH (0x24) /* 73 */ | ||
| 126 | #define DMA_DIAG_TIMECOUNTER_LOW (0x28) /* 74 */ | ||
| 127 | #define DMA_DIAG_TIMECOUNTER_HIGH (0x2C) /* 75 */ | ||
| 128 | #define DMA_DIAG_RECHECKCOUNTER (0x30) /* 76 ( Split completions on read ) */ | ||
| 129 | #define DMA_DIAG_WAITTIMEOUTINIT (0x34) /* 77 */ | ||
| 130 | #define DMA_DIAG_WAITOVERFLOWCOUNTER (0x38) /* 78 */ | ||
| 131 | #define DMA_DIAG_WAITCOUNTER (0x3C) /* 79 */ | ||
| 132 | |||
| 133 | /* ------------------------------------------------------------------------- */ | ||
| 134 | /* DMA Buffer */ | ||
| 135 | |||
| 136 | #define TS_INPUT_BASE (0x200) | ||
| 137 | #define TS_INPUT_CONTROL(i) (TS_INPUT_BASE + (i) * 16 + 0x00) | ||
| 138 | |||
| 139 | #define TS_OUTPUT_BASE (0x280) | ||
| 140 | #define TS_OUTPUT_CONTROL(i) (TS_OUTPUT_BASE + (i) * 16 + 0x00) | ||
| 141 | |||
| 142 | #define DMA_BUFFER_BASE (0x300) | ||
| 143 | |||
| 144 | #define DMA_BUFFER_CONTROL(i) (DMA_BUFFER_BASE + (i) * 16 + 0x00) | ||
| 145 | #define DMA_BUFFER_ACK(i) (DMA_BUFFER_BASE + (i) * 16 + 0x04) | ||
| 146 | #define DMA_BUFFER_CURRENT(i) (DMA_BUFFER_BASE + (i) * 16 + 0x08) | ||
| 147 | #define DMA_BUFFER_SIZE(i) (DMA_BUFFER_BASE + (i) * 16 + 0x0c) | ||
| 148 | |||
| 149 | #define DMA_BASE_ADDRESS_TABLE (0x2000) | ||
| 150 | #define DMA_BASE_ADDRESS_TABLE_ENTRIES (512) | ||
| 151 | |||
diff --git a/drivers/media/dvb/ddbridge/ddbridge.h b/drivers/media/dvb/ddbridge/ddbridge.h new file mode 100644 index 000000000000..6d14893218f4 --- /dev/null +++ b/drivers/media/dvb/ddbridge/ddbridge.h | |||
| @@ -0,0 +1,187 @@ | |||
| 1 | /* | ||
| 2 | * ddbridge.h: Digital Devices PCIe bridge driver | ||
| 3 | * | ||
| 4 | * Copyright (C) 2010-2011 Digital Devices GmbH | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or | ||
| 7 | * modify it under the terms of the GNU General Public License | ||
| 8 | * version 2 only, as published by the Free Software Foundation. | ||
| 9 | * | ||
| 10 | * | ||
| 11 | * This program is distributed in the hope that it will be useful, | ||
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 14 | * GNU General Public License for more details. | ||
| 15 | * | ||
| 16 | * | ||
| 17 | * You should have received a copy of the GNU General Public License | ||
| 18 | * along with this program; if not, write to the Free Software | ||
| 19 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA | ||
| 20 | * 02110-1301, USA | ||
| 21 | * Or, point your browser to http://www.gnu.org/copyleft/gpl.html | ||
| 22 | */ | ||
| 23 | |||
| 24 | #ifndef _DDBRIDGE_H_ | ||
| 25 | #define _DDBRIDGE_H_ | ||
| 26 | |||
| 27 | #include <linux/types.h> | ||
| 28 | #include <linux/sched.h> | ||
| 29 | #include <linux/interrupt.h> | ||
| 30 | #include <linux/i2c.h> | ||
| 31 | #include <linux/mutex.h> | ||
| 32 | #include <asm/dma.h> | ||
| 33 | #include <linux/dvb/frontend.h> | ||
| 34 | #include <linux/dvb/ca.h> | ||
| 35 | #include <linux/dvb/video.h> | ||
| 36 | #include <linux/dvb/audio.h> | ||
| 37 | #include <linux/socket.h> | ||
| 38 | |||
| 39 | #include "dmxdev.h" | ||
| 40 | #include "dvbdev.h" | ||
| 41 | #include "dvb_demux.h" | ||
| 42 | #include "dvb_frontend.h" | ||
| 43 | #include "dvb_ringbuffer.h" | ||
| 44 | #include "dvb_ca_en50221.h" | ||
| 45 | #include "dvb_net.h" | ||
| 46 | #include "cxd2099.h" | ||
| 47 | |||
| 48 | #define DDB_MAX_I2C 4 | ||
| 49 | #define DDB_MAX_PORT 4 | ||
| 50 | #define DDB_MAX_INPUT 8 | ||
| 51 | #define DDB_MAX_OUTPUT 4 | ||
| 52 | |||
| 53 | struct ddb_info { | ||
| 54 | int type; | ||
| 55 | #define DDB_NONE 0 | ||
| 56 | #define DDB_OCTOPUS 1 | ||
| 57 | char *name; | ||
| 58 | int port_num; | ||
| 59 | u32 port_type[DDB_MAX_PORT]; | ||
| 60 | }; | ||
| 61 | |||
| 62 | /* DMA_SIZE MUST be divisible by 188 and 128 !!! */ | ||
| 63 | |||
| 64 | #define INPUT_DMA_MAX_BUFS 32 /* hardware table limit */ | ||
| 65 | #define INPUT_DMA_BUFS 8 | ||
| 66 | #define INPUT_DMA_SIZE (128*47*21) | ||
| 67 | |||
| 68 | #define OUTPUT_DMA_MAX_BUFS 32 | ||
| 69 | #define OUTPUT_DMA_BUFS 8 | ||
| 70 | #define OUTPUT_DMA_SIZE (128*47*21) | ||
| 71 | |||
| 72 | struct ddb; | ||
| 73 | struct ddb_port; | ||
| 74 | |||
| 75 | struct ddb_input { | ||
| 76 | struct ddb_port *port; | ||
| 77 | u32 nr; | ||
| 78 | int attached; | ||
| 79 | |||
| 80 | dma_addr_t pbuf[INPUT_DMA_MAX_BUFS]; | ||
| 81 | u8 *vbuf[INPUT_DMA_MAX_BUFS]; | ||
| 82 | u32 dma_buf_num; | ||
| 83 | u32 dma_buf_size; | ||
| 84 | |||
| 85 | struct tasklet_struct tasklet; | ||
| 86 | spinlock_t lock; | ||
| 87 | wait_queue_head_t wq; | ||
| 88 | int running; | ||
| 89 | u32 stat; | ||
| 90 | u32 cbuf; | ||
| 91 | u32 coff; | ||
| 92 | |||
| 93 | struct dvb_adapter adap; | ||
| 94 | struct dvb_device *dev; | ||
| 95 | struct dvb_frontend *fe; | ||
| 96 | struct dvb_frontend *fe2; | ||
| 97 | struct dmxdev dmxdev; | ||
| 98 | struct dvb_demux demux; | ||
| 99 | struct dvb_net dvbnet; | ||
| 100 | struct dmx_frontend hw_frontend; | ||
| 101 | struct dmx_frontend mem_frontend; | ||
| 102 | int users; | ||
| 103 | int (*gate_ctrl)(struct dvb_frontend *, int); | ||
| 104 | }; | ||
| 105 | |||
| 106 | struct ddb_output { | ||
| 107 | struct ddb_port *port; | ||
| 108 | u32 nr; | ||
| 109 | dma_addr_t pbuf[OUTPUT_DMA_MAX_BUFS]; | ||
| 110 | u8 *vbuf[OUTPUT_DMA_MAX_BUFS]; | ||
| 111 | u32 dma_buf_num; | ||
| 112 | u32 dma_buf_size; | ||
| 113 | struct tasklet_struct tasklet; | ||
| 114 | spinlock_t lock; | ||
| 115 | wait_queue_head_t wq; | ||
| 116 | int running; | ||
| 117 | u32 stat; | ||
| 118 | u32 cbuf; | ||
| 119 | u32 coff; | ||
| 120 | |||
| 121 | struct dvb_adapter adap; | ||
| 122 | struct dvb_device *dev; | ||
| 123 | }; | ||
| 124 | |||
| 125 | struct ddb_i2c { | ||
| 126 | struct ddb *dev; | ||
| 127 | u32 nr; | ||
| 128 | struct i2c_adapter adap; | ||
| 129 | struct i2c_adapter adap2; | ||
| 130 | u32 regs; | ||
| 131 | u32 rbuf; | ||
| 132 | u32 wbuf; | ||
| 133 | int done; | ||
| 134 | wait_queue_head_t wq; | ||
| 135 | }; | ||
| 136 | |||
| 137 | struct ddb_port { | ||
| 138 | struct ddb *dev; | ||
| 139 | u32 nr; | ||
| 140 | struct ddb_i2c *i2c; | ||
| 141 | struct mutex i2c_gate_lock; | ||
| 142 | u32 class; | ||
| 143 | #define DDB_PORT_NONE 0 | ||
| 144 | #define DDB_PORT_CI 1 | ||
| 145 | #define DDB_PORT_TUNER 2 | ||
| 146 | u32 type; | ||
| 147 | #define DDB_TUNER_NONE 0 | ||
| 148 | #define DDB_TUNER_DVBS_ST 1 | ||
| 149 | #define DDB_TUNER_DVBS_ST_AA 2 | ||
| 150 | #define DDB_TUNER_DVBCT_TR 16 | ||
| 151 | #define DDB_TUNER_DVBCT_ST 17 | ||
| 152 | u32 adr; | ||
| 153 | |||
| 154 | struct ddb_input *input[2]; | ||
| 155 | struct ddb_output *output; | ||
| 156 | struct dvb_ca_en50221 *en; | ||
| 157 | }; | ||
| 158 | |||
| 159 | struct ddb { | ||
| 160 | struct pci_dev *pdev; | ||
| 161 | unsigned char *regs; | ||
| 162 | struct ddb_port port[DDB_MAX_PORT]; | ||
| 163 | struct ddb_i2c i2c[DDB_MAX_I2C]; | ||
| 164 | struct ddb_input input[DDB_MAX_INPUT]; | ||
| 165 | struct ddb_output output[DDB_MAX_OUTPUT]; | ||
| 166 | |||
| 167 | struct device *ddb_dev; | ||
| 168 | int nr; | ||
| 169 | u8 iobuf[1028]; | ||
| 170 | |||
| 171 | struct ddb_info *info; | ||
| 172 | int msi; | ||
| 173 | }; | ||
| 174 | |||
| 175 | /****************************************************************************/ | ||
| 176 | |||
| 177 | #define ddbwritel(_val, _adr) writel((_val), \ | ||
| 178 | (char *) (dev->regs+(_adr))) | ||
| 179 | #define ddbreadl(_adr) readl((char *) (dev->regs+(_adr))) | ||
| 180 | #define ddbcpyto(_adr, _src, _count) memcpy_toio((char *) \ | ||
| 181 | (dev->regs+(_adr)), (_src), (_count)) | ||
| 182 | #define ddbcpyfrom(_dst, _adr, _count) memcpy_fromio((_dst), (char *) \ | ||
| 183 | (dev->regs+(_adr)), (_count)) | ||
| 184 | |||
| 185 | /****************************************************************************/ | ||
| 186 | |||
| 187 | #endif | ||
diff --git a/drivers/media/dvb/dvb-core/Makefile b/drivers/media/dvb/dvb-core/Makefile index 0b5182835cc8..8f22bcd7c1f9 100644 --- a/drivers/media/dvb/dvb-core/Makefile +++ b/drivers/media/dvb/dvb-core/Makefile | |||
| @@ -2,8 +2,10 @@ | |||
| 2 | # Makefile for the kernel DVB device drivers. | 2 | # Makefile for the kernel DVB device drivers. |
| 3 | # | 3 | # |
| 4 | 4 | ||
| 5 | dvb-net-$(CONFIG_DVB_NET) := dvb_net.o | ||
| 6 | |||
| 5 | dvb-core-objs := dvbdev.o dmxdev.o dvb_demux.o dvb_filter.o \ | 7 | dvb-core-objs := dvbdev.o dmxdev.o dvb_demux.o dvb_filter.o \ |
| 6 | dvb_ca_en50221.o dvb_frontend.o \ | 8 | dvb_ca_en50221.o dvb_frontend.o \ |
| 7 | dvb_net.o dvb_ringbuffer.o dvb_math.o | 9 | $(dvb-net-y) dvb_ringbuffer.o dvb_math.o |
| 8 | 10 | ||
| 9 | obj-$(CONFIG_DVB_CORE) += dvb-core.o | 11 | obj-$(CONFIG_DVB_CORE) += dvb-core.o |
diff --git a/drivers/media/dvb/dvb-core/dvb_frontend.c b/drivers/media/dvb/dvb-core/dvb_frontend.c index 5b6b451d4694..efe9c30605e8 100644 --- a/drivers/media/dvb/dvb-core/dvb_frontend.c +++ b/drivers/media/dvb/dvb-core/dvb_frontend.c | |||
| @@ -904,7 +904,7 @@ static int dvb_frontend_clear_cache(struct dvb_frontend *fe) | |||
| 904 | .buffer = b \ | 904 | .buffer = b \ |
| 905 | } | 905 | } |
| 906 | 906 | ||
| 907 | static struct dtv_cmds_h dtv_cmds[] = { | 907 | static struct dtv_cmds_h dtv_cmds[DTV_MAX_COMMAND + 1] = { |
| 908 | _DTV_CMD(DTV_TUNE, 1, 0), | 908 | _DTV_CMD(DTV_TUNE, 1, 0), |
| 909 | _DTV_CMD(DTV_CLEAR, 1, 0), | 909 | _DTV_CMD(DTV_CLEAR, 1, 0), |
| 910 | 910 | ||
| @@ -966,6 +966,7 @@ static struct dtv_cmds_h dtv_cmds[] = { | |||
| 966 | _DTV_CMD(DTV_ISDBT_LAYERC_TIME_INTERLEAVING, 0, 0), | 966 | _DTV_CMD(DTV_ISDBT_LAYERC_TIME_INTERLEAVING, 0, 0), |
| 967 | 967 | ||
| 968 | _DTV_CMD(DTV_ISDBS_TS_ID, 1, 0), | 968 | _DTV_CMD(DTV_ISDBS_TS_ID, 1, 0), |
| 969 | _DTV_CMD(DTV_DVBT2_PLP_ID, 1, 0), | ||
| 969 | 970 | ||
| 970 | /* Get */ | 971 | /* Get */ |
| 971 | _DTV_CMD(DTV_DISEQC_SLAVE_REPLY, 0, 1), | 972 | _DTV_CMD(DTV_DISEQC_SLAVE_REPLY, 0, 1), |
diff --git a/drivers/media/dvb/dvb-core/dvb_net.h b/drivers/media/dvb/dvb-core/dvb_net.h index 3a3126cae03b..1e53acd50cf4 100644 --- a/drivers/media/dvb/dvb-core/dvb_net.h +++ b/drivers/media/dvb/dvb-core/dvb_net.h | |||
| @@ -32,6 +32,8 @@ | |||
| 32 | 32 | ||
| 33 | #define DVB_NET_DEVICES_MAX 10 | 33 | #define DVB_NET_DEVICES_MAX 10 |
| 34 | 34 | ||
| 35 | #ifdef CONFIG_DVB_NET | ||
| 36 | |||
| 35 | struct dvb_net { | 37 | struct dvb_net { |
| 36 | struct dvb_device *dvbdev; | 38 | struct dvb_device *dvbdev; |
| 37 | struct net_device *device[DVB_NET_DEVICES_MAX]; | 39 | struct net_device *device[DVB_NET_DEVICES_MAX]; |
| @@ -40,8 +42,25 @@ struct dvb_net { | |||
| 40 | struct dmx_demux *demux; | 42 | struct dmx_demux *demux; |
| 41 | }; | 43 | }; |
| 42 | 44 | ||
| 43 | |||
| 44 | void dvb_net_release(struct dvb_net *); | 45 | void dvb_net_release(struct dvb_net *); |
| 45 | int dvb_net_init(struct dvb_adapter *, struct dvb_net *, struct dmx_demux *); | 46 | int dvb_net_init(struct dvb_adapter *, struct dvb_net *, struct dmx_demux *); |
| 46 | 47 | ||
| 48 | #else | ||
| 49 | |||
| 50 | struct dvb_net { | ||
| 51 | struct dvb_device *dvbdev; | ||
| 52 | }; | ||
| 53 | |||
| 54 | static inline void dvb_net_release(struct dvb_net *dvbnet) | ||
| 55 | { | ||
| 56 | } | ||
| 57 | |||
| 58 | static inline int dvb_net_init(struct dvb_adapter *adap, | ||
| 59 | struct dvb_net *dvbnet, struct dmx_demux *dmx) | ||
| 60 | { | ||
| 61 | return 0; | ||
| 62 | } | ||
| 63 | |||
| 64 | #endif /* ifdef CONFIG_DVB_NET */ | ||
| 65 | |||
| 47 | #endif | 66 | #endif |
diff --git a/drivers/media/dvb/dvb-usb/Kconfig b/drivers/media/dvb/dvb-usb/Kconfig index e85304c59a2b..5d73dec8ac07 100644 --- a/drivers/media/dvb/dvb-usb/Kconfig +++ b/drivers/media/dvb/dvb-usb/Kconfig | |||
| @@ -81,6 +81,7 @@ config DVB_USB_DIB0700 | |||
| 81 | select MEDIA_TUNER_MT2266 if !MEDIA_TUNER_CUSTOMISE | 81 | select MEDIA_TUNER_MT2266 if !MEDIA_TUNER_CUSTOMISE |
| 82 | select MEDIA_TUNER_XC2028 if !MEDIA_TUNER_CUSTOMISE | 82 | select MEDIA_TUNER_XC2028 if !MEDIA_TUNER_CUSTOMISE |
| 83 | select MEDIA_TUNER_XC5000 if !MEDIA_TUNER_CUSTOMISE | 83 | select MEDIA_TUNER_XC5000 if !MEDIA_TUNER_CUSTOMISE |
| 84 | select MEDIA_TUNER_XC4000 if !MEDIA_TUNER_CUSTOMISE | ||
| 84 | select MEDIA_TUNER_MXL5007T if !MEDIA_TUNER_CUSTOMISE | 85 | select MEDIA_TUNER_MXL5007T if !MEDIA_TUNER_CUSTOMISE |
| 85 | help | 86 | help |
| 86 | Support for USB2.0/1.1 DVB receivers based on the DiB0700 USB bridge. The | 87 | Support for USB2.0/1.1 DVB receivers based on the DiB0700 USB bridge. The |
diff --git a/drivers/media/dvb/dvb-usb/af9015.c b/drivers/media/dvb/dvb-usb/af9015.c index 100ebc37e99e..d7ad05fc383b 100644 --- a/drivers/media/dvb/dvb-usb/af9015.c +++ b/drivers/media/dvb/dvb-usb/af9015.c | |||
| @@ -91,7 +91,6 @@ static int af9015_rw_udev(struct usb_device *udev, struct req_t *req) | |||
| 91 | case GET_CONFIG: | 91 | case GET_CONFIG: |
| 92 | case READ_MEMORY: | 92 | case READ_MEMORY: |
| 93 | case RECONNECT_USB: | 93 | case RECONNECT_USB: |
| 94 | case GET_IR_CODE: | ||
| 95 | write = 0; | 94 | write = 0; |
| 96 | break; | 95 | break; |
| 97 | case READ_I2C: | 96 | case READ_I2C: |
| @@ -164,13 +163,6 @@ static int af9015_rw_udev(struct usb_device *udev, struct req_t *req) | |||
| 164 | deb_xfer("<<< "); | 163 | deb_xfer("<<< "); |
| 165 | debug_dump(buf, act_len, deb_xfer); | 164 | debug_dump(buf, act_len, deb_xfer); |
| 166 | 165 | ||
| 167 | /* remote controller query status is 1 if remote code is not received */ | ||
| 168 | if (req->cmd == GET_IR_CODE && buf[1] == 1) { | ||
| 169 | buf[1] = 0; /* clear command "error" status */ | ||
| 170 | memset(&buf[2], 0, req->data_len); | ||
| 171 | buf[3] = 1; /* no remote code received mark */ | ||
| 172 | } | ||
| 173 | |||
| 174 | /* check status */ | 166 | /* check status */ |
| 175 | if (buf[1]) { | 167 | if (buf[1]) { |
| 176 | err("command failed:%d", buf[1]); | 168 | err("command failed:%d", buf[1]); |
| @@ -292,6 +284,10 @@ Due to that the only way to select correct tuner is use demodulator I2C-gate. | |||
| 292 | } | 284 | } |
| 293 | 285 | ||
| 294 | if (num > i + 1 && (msg[i+1].flags & I2C_M_RD)) { | 286 | if (num > i + 1 && (msg[i+1].flags & I2C_M_RD)) { |
| 287 | if (msg[i].len > 3 || msg[i+1].len > 61) { | ||
| 288 | ret = -EOPNOTSUPP; | ||
| 289 | goto error; | ||
| 290 | } | ||
| 295 | if (msg[i].addr == | 291 | if (msg[i].addr == |
| 296 | af9015_af9013_config[0].demod_address) | 292 | af9015_af9013_config[0].demod_address) |
| 297 | req.cmd = READ_MEMORY; | 293 | req.cmd = READ_MEMORY; |
| @@ -306,12 +302,16 @@ Due to that the only way to select correct tuner is use demodulator I2C-gate. | |||
| 306 | ret = af9015_ctrl_msg(d, &req); | 302 | ret = af9015_ctrl_msg(d, &req); |
| 307 | i += 2; | 303 | i += 2; |
| 308 | } else if (msg[i].flags & I2C_M_RD) { | 304 | } else if (msg[i].flags & I2C_M_RD) { |
| 309 | ret = -EINVAL; | 305 | if (msg[i].len > 61) { |
| 306 | ret = -EOPNOTSUPP; | ||
| 307 | goto error; | ||
| 308 | } | ||
| 310 | if (msg[i].addr == | 309 | if (msg[i].addr == |
| 311 | af9015_af9013_config[0].demod_address) | 310 | af9015_af9013_config[0].demod_address) { |
| 311 | ret = -EINVAL; | ||
| 312 | goto error; | 312 | goto error; |
| 313 | else | 313 | } |
| 314 | req.cmd = READ_I2C; | 314 | req.cmd = READ_I2C; |
| 315 | req.i2c_addr = msg[i].addr; | 315 | req.i2c_addr = msg[i].addr; |
| 316 | req.addr = addr; | 316 | req.addr = addr; |
| 317 | req.mbox = mbox; | 317 | req.mbox = mbox; |
| @@ -321,6 +321,10 @@ Due to that the only way to select correct tuner is use demodulator I2C-gate. | |||
| 321 | ret = af9015_ctrl_msg(d, &req); | 321 | ret = af9015_ctrl_msg(d, &req); |
| 322 | i += 1; | 322 | i += 1; |
| 323 | } else { | 323 | } else { |
| 324 | if (msg[i].len > 21) { | ||
| 325 | ret = -EOPNOTSUPP; | ||
| 326 | goto error; | ||
| 327 | } | ||
| 324 | if (msg[i].addr == | 328 | if (msg[i].addr == |
| 325 | af9015_af9013_config[0].demod_address) | 329 | af9015_af9013_config[0].demod_address) |
| 326 | req.cmd = WRITE_MEMORY; | 330 | req.cmd = WRITE_MEMORY; |
| @@ -735,6 +739,7 @@ static const struct af9015_rc_setup af9015_rc_setup_hashes[] = { | |||
| 735 | { 0xb8feb708, RC_MAP_MSI_DIGIVOX_II }, | 739 | { 0xb8feb708, RC_MAP_MSI_DIGIVOX_II }, |
| 736 | { 0xa3703d00, RC_MAP_ALINK_DTU_M }, | 740 | { 0xa3703d00, RC_MAP_ALINK_DTU_M }, |
| 737 | { 0x9b7dc64e, RC_MAP_TOTAL_MEDIA_IN_HAND }, /* MYGICTV U718 */ | 741 | { 0x9b7dc64e, RC_MAP_TOTAL_MEDIA_IN_HAND }, /* MYGICTV U718 */ |
| 742 | { 0x5d49e3db, RC_MAP_DIGITTRADE }, /* LC-Power LC-USB-DVBT */ | ||
| 738 | { } | 743 | { } |
| 739 | }; | 744 | }; |
| 740 | 745 | ||
| @@ -749,6 +754,8 @@ static const struct af9015_rc_setup af9015_rc_setup_usbids[] = { | |||
| 749 | RC_MAP_AZUREWAVE_AD_TU700 }, | 754 | RC_MAP_AZUREWAVE_AD_TU700 }, |
| 750 | { (USB_VID_MSI_2 << 16) + USB_PID_MSI_DIGI_VOX_MINI_III, | 755 | { (USB_VID_MSI_2 << 16) + USB_PID_MSI_DIGI_VOX_MINI_III, |
| 751 | RC_MAP_MSI_DIGIVOX_III }, | 756 | RC_MAP_MSI_DIGIVOX_III }, |
| 757 | { (USB_VID_MSI_2 << 16) + USB_PID_MSI_DIGIVOX_DUO, | ||
| 758 | RC_MAP_MSI_DIGIVOX_III }, | ||
| 752 | { (USB_VID_LEADTEK << 16) + USB_PID_WINFAST_DTV_DONGLE_GOLD, | 759 | { (USB_VID_LEADTEK << 16) + USB_PID_WINFAST_DTV_DONGLE_GOLD, |
| 753 | RC_MAP_LEADTEK_Y04G0051 }, | 760 | RC_MAP_LEADTEK_Y04G0051 }, |
| 754 | { (USB_VID_AVERMEDIA << 16) + USB_PID_AVERMEDIA_VOLAR_X, | 761 | { (USB_VID_AVERMEDIA << 16) + USB_PID_AVERMEDIA_VOLAR_X, |
| @@ -759,6 +766,8 @@ static const struct af9015_rc_setup af9015_rc_setup_usbids[] = { | |||
| 759 | RC_MAP_DIGITALNOW_TINYTWIN }, | 766 | RC_MAP_DIGITALNOW_TINYTWIN }, |
| 760 | { (USB_VID_GTEK << 16) + USB_PID_TINYTWIN_3, | 767 | { (USB_VID_GTEK << 16) + USB_PID_TINYTWIN_3, |
| 761 | RC_MAP_DIGITALNOW_TINYTWIN }, | 768 | RC_MAP_DIGITALNOW_TINYTWIN }, |
| 769 | { (USB_VID_KWORLD_2 << 16) + USB_PID_SVEON_STV22, | ||
| 770 | RC_MAP_MSI_DIGIVOX_III }, | ||
| 762 | { } | 771 | { } |
| 763 | }; | 772 | }; |
| 764 | 773 | ||
| @@ -1082,44 +1091,11 @@ error: | |||
| 1082 | return ret; | 1091 | return ret; |
| 1083 | } | 1092 | } |
| 1084 | 1093 | ||
| 1085 | /* init 2nd I2C adapter */ | ||
| 1086 | static int af9015_i2c_init(struct dvb_usb_device *d) | ||
| 1087 | { | ||
| 1088 | int ret; | ||
| 1089 | struct af9015_state *state = d->priv; | ||
| 1090 | deb_info("%s:\n", __func__); | ||
| 1091 | |||
| 1092 | strncpy(state->i2c_adap.name, d->desc->name, | ||
| 1093 | sizeof(state->i2c_adap.name)); | ||
| 1094 | state->i2c_adap.algo = d->props.i2c_algo; | ||
| 1095 | state->i2c_adap.algo_data = NULL; | ||
| 1096 | state->i2c_adap.dev.parent = &d->udev->dev; | ||
| 1097 | |||
| 1098 | i2c_set_adapdata(&state->i2c_adap, d); | ||
| 1099 | |||
| 1100 | ret = i2c_add_adapter(&state->i2c_adap); | ||
| 1101 | if (ret < 0) | ||
| 1102 | err("could not add i2c adapter"); | ||
| 1103 | |||
| 1104 | return ret; | ||
| 1105 | } | ||
| 1106 | |||
| 1107 | static int af9015_af9013_frontend_attach(struct dvb_usb_adapter *adap) | 1094 | static int af9015_af9013_frontend_attach(struct dvb_usb_adapter *adap) |
| 1108 | { | 1095 | { |
| 1109 | int ret; | 1096 | int ret; |
| 1110 | struct af9015_state *state = adap->dev->priv; | ||
| 1111 | struct i2c_adapter *i2c_adap; | ||
| 1112 | |||
| 1113 | if (adap->id == 0) { | ||
| 1114 | /* select I2C adapter */ | ||
| 1115 | i2c_adap = &adap->dev->i2c_adap; | ||
| 1116 | |||
| 1117 | deb_info("%s: init I2C\n", __func__); | ||
| 1118 | ret = af9015_i2c_init(adap->dev); | ||
| 1119 | } else { | ||
| 1120 | /* select I2C adapter */ | ||
| 1121 | i2c_adap = &state->i2c_adap; | ||
| 1122 | 1097 | ||
| 1098 | if (adap->id == 1) { | ||
| 1123 | /* copy firmware to 2nd demodulator */ | 1099 | /* copy firmware to 2nd demodulator */ |
| 1124 | if (af9015_config.dual_mode) { | 1100 | if (af9015_config.dual_mode) { |
| 1125 | ret = af9015_copy_firmware(adap->dev); | 1101 | ret = af9015_copy_firmware(adap->dev); |
| @@ -1136,7 +1112,7 @@ static int af9015_af9013_frontend_attach(struct dvb_usb_adapter *adap) | |||
| 1136 | 1112 | ||
| 1137 | /* attach demodulator */ | 1113 | /* attach demodulator */ |
| 1138 | adap->fe = dvb_attach(af9013_attach, &af9015_af9013_config[adap->id], | 1114 | adap->fe = dvb_attach(af9013_attach, &af9015_af9013_config[adap->id], |
| 1139 | i2c_adap); | 1115 | &adap->dev->i2c_adap); |
| 1140 | 1116 | ||
| 1141 | return adap->fe == NULL ? -ENODEV : 0; | 1117 | return adap->fe == NULL ? -ENODEV : 0; |
| 1142 | } | 1118 | } |
| @@ -1206,57 +1182,56 @@ static struct mxl5007t_config af9015_mxl5007t_config = { | |||
| 1206 | 1182 | ||
| 1207 | static int af9015_tuner_attach(struct dvb_usb_adapter *adap) | 1183 | static int af9015_tuner_attach(struct dvb_usb_adapter *adap) |
| 1208 | { | 1184 | { |
| 1209 | struct af9015_state *state = adap->dev->priv; | ||
| 1210 | struct i2c_adapter *i2c_adap; | ||
| 1211 | int ret; | 1185 | int ret; |
| 1212 | deb_info("%s:\n", __func__); | 1186 | deb_info("%s:\n", __func__); |
| 1213 | 1187 | ||
| 1214 | /* select I2C adapter */ | ||
| 1215 | if (adap->id == 0) | ||
| 1216 | i2c_adap = &adap->dev->i2c_adap; | ||
| 1217 | else | ||
| 1218 | i2c_adap = &state->i2c_adap; | ||
| 1219 | |||
| 1220 | switch (af9015_af9013_config[adap->id].tuner) { | 1188 | switch (af9015_af9013_config[adap->id].tuner) { |
| 1221 | case AF9013_TUNER_MT2060: | 1189 | case AF9013_TUNER_MT2060: |
| 1222 | case AF9013_TUNER_MT2060_2: | 1190 | case AF9013_TUNER_MT2060_2: |
| 1223 | ret = dvb_attach(mt2060_attach, adap->fe, i2c_adap, | 1191 | ret = dvb_attach(mt2060_attach, adap->fe, &adap->dev->i2c_adap, |
| 1224 | &af9015_mt2060_config, | 1192 | &af9015_mt2060_config, |
| 1225 | af9015_config.mt2060_if1[adap->id]) | 1193 | af9015_config.mt2060_if1[adap->id]) |
| 1226 | == NULL ? -ENODEV : 0; | 1194 | == NULL ? -ENODEV : 0; |
| 1227 | break; | 1195 | break; |
| 1228 | case AF9013_TUNER_QT1010: | 1196 | case AF9013_TUNER_QT1010: |
| 1229 | case AF9013_TUNER_QT1010A: | 1197 | case AF9013_TUNER_QT1010A: |
| 1230 | ret = dvb_attach(qt1010_attach, adap->fe, i2c_adap, | 1198 | ret = dvb_attach(qt1010_attach, adap->fe, &adap->dev->i2c_adap, |
| 1231 | &af9015_qt1010_config) == NULL ? -ENODEV : 0; | 1199 | &af9015_qt1010_config) == NULL ? -ENODEV : 0; |
| 1232 | break; | 1200 | break; |
| 1233 | case AF9013_TUNER_TDA18271: | 1201 | case AF9013_TUNER_TDA18271: |
| 1234 | ret = dvb_attach(tda18271_attach, adap->fe, 0xc0, i2c_adap, | 1202 | ret = dvb_attach(tda18271_attach, adap->fe, 0xc0, |
| 1203 | &adap->dev->i2c_adap, | ||
| 1235 | &af9015_tda18271_config) == NULL ? -ENODEV : 0; | 1204 | &af9015_tda18271_config) == NULL ? -ENODEV : 0; |
| 1236 | break; | 1205 | break; |
| 1237 | case AF9013_TUNER_TDA18218: | 1206 | case AF9013_TUNER_TDA18218: |
| 1238 | ret = dvb_attach(tda18218_attach, adap->fe, i2c_adap, | 1207 | ret = dvb_attach(tda18218_attach, adap->fe, |
| 1208 | &adap->dev->i2c_adap, | ||
| 1239 | &af9015_tda18218_config) == NULL ? -ENODEV : 0; | 1209 | &af9015_tda18218_config) == NULL ? -ENODEV : 0; |
| 1240 | break; | 1210 | break; |
| 1241 | case AF9013_TUNER_MXL5003D: | 1211 | case AF9013_TUNER_MXL5003D: |
| 1242 | ret = dvb_attach(mxl5005s_attach, adap->fe, i2c_adap, | 1212 | ret = dvb_attach(mxl5005s_attach, adap->fe, |
| 1213 | &adap->dev->i2c_adap, | ||
| 1243 | &af9015_mxl5003_config) == NULL ? -ENODEV : 0; | 1214 | &af9015_mxl5003_config) == NULL ? -ENODEV : 0; |
| 1244 | break; | 1215 | break; |
| 1245 | case AF9013_TUNER_MXL5005D: | 1216 | case AF9013_TUNER_MXL5005D: |
| 1246 | case AF9013_TUNER_MXL5005R: | 1217 | case AF9013_TUNER_MXL5005R: |
| 1247 | ret = dvb_attach(mxl5005s_attach, adap->fe, i2c_adap, | 1218 | ret = dvb_attach(mxl5005s_attach, adap->fe, |
| 1219 | &adap->dev->i2c_adap, | ||
| 1248 | &af9015_mxl5005_config) == NULL ? -ENODEV : 0; | 1220 | &af9015_mxl5005_config) == NULL ? -ENODEV : 0; |
| 1249 | break; | 1221 | break; |
| 1250 | case AF9013_TUNER_ENV77H11D5: | 1222 | case AF9013_TUNER_ENV77H11D5: |
| 1251 | ret = dvb_attach(dvb_pll_attach, adap->fe, 0xc0, i2c_adap, | 1223 | ret = dvb_attach(dvb_pll_attach, adap->fe, 0xc0, |
| 1224 | &adap->dev->i2c_adap, | ||
| 1252 | DVB_PLL_TDA665X) == NULL ? -ENODEV : 0; | 1225 | DVB_PLL_TDA665X) == NULL ? -ENODEV : 0; |
| 1253 | break; | 1226 | break; |
| 1254 | case AF9013_TUNER_MC44S803: | 1227 | case AF9013_TUNER_MC44S803: |
| 1255 | ret = dvb_attach(mc44s803_attach, adap->fe, i2c_adap, | 1228 | ret = dvb_attach(mc44s803_attach, adap->fe, |
| 1229 | &adap->dev->i2c_adap, | ||
| 1256 | &af9015_mc44s803_config) == NULL ? -ENODEV : 0; | 1230 | &af9015_mc44s803_config) == NULL ? -ENODEV : 0; |
| 1257 | break; | 1231 | break; |
| 1258 | case AF9013_TUNER_MXL5007T: | 1232 | case AF9013_TUNER_MXL5007T: |
| 1259 | ret = dvb_attach(mxl5007t_attach, adap->fe, i2c_adap, | 1233 | ret = dvb_attach(mxl5007t_attach, adap->fe, |
| 1234 | &adap->dev->i2c_adap, | ||
| 1260 | 0xc0, &af9015_mxl5007t_config) == NULL ? -ENODEV : 0; | 1235 | 0xc0, &af9015_mxl5007t_config) == NULL ? -ENODEV : 0; |
| 1261 | break; | 1236 | break; |
| 1262 | case AF9013_TUNER_UNKNOWN: | 1237 | case AF9013_TUNER_UNKNOWN: |
| @@ -1309,6 +1284,7 @@ static struct usb_device_id af9015_usb_table[] = { | |||
| 1309 | USB_PID_TERRATEC_CINERGY_T_STICK_DUAL_RC)}, | 1284 | USB_PID_TERRATEC_CINERGY_T_STICK_DUAL_RC)}, |
| 1310 | /* 35 */{USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_A850T)}, | 1285 | /* 35 */{USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_A850T)}, |
| 1311 | {USB_DEVICE(USB_VID_GTEK, USB_PID_TINYTWIN_3)}, | 1286 | {USB_DEVICE(USB_VID_GTEK, USB_PID_TINYTWIN_3)}, |
| 1287 | {USB_DEVICE(USB_VID_KWORLD_2, USB_PID_SVEON_STV22)}, | ||
| 1312 | {0}, | 1288 | {0}, |
| 1313 | }; | 1289 | }; |
| 1314 | MODULE_DEVICE_TABLE(usb, af9015_usb_table); | 1290 | MODULE_DEVICE_TABLE(usb, af9015_usb_table); |
| @@ -1502,7 +1478,7 @@ static struct dvb_usb_device_properties af9015_properties[] = { | |||
| 1502 | 1478 | ||
| 1503 | .i2c_algo = &af9015_i2c_algo, | 1479 | .i2c_algo = &af9015_i2c_algo, |
| 1504 | 1480 | ||
| 1505 | .num_device_descs = 9, /* check max from dvb-usb.h */ | 1481 | .num_device_descs = 10, /* check max from dvb-usb.h */ |
| 1506 | .devices = { | 1482 | .devices = { |
| 1507 | { | 1483 | { |
| 1508 | .name = "Xtensions XD-380", | 1484 | .name = "Xtensions XD-380", |
| @@ -1554,6 +1530,11 @@ static struct dvb_usb_device_properties af9015_properties[] = { | |||
| 1554 | .cold_ids = {&af9015_usb_table[20], NULL}, | 1530 | .cold_ids = {&af9015_usb_table[20], NULL}, |
| 1555 | .warm_ids = {NULL}, | 1531 | .warm_ids = {NULL}, |
| 1556 | }, | 1532 | }, |
| 1533 | { | ||
| 1534 | .name = "Sveon STV22 Dual USB DVB-T Tuner HDTV", | ||
| 1535 | .cold_ids = {&af9015_usb_table[37], NULL}, | ||
| 1536 | .warm_ids = {NULL}, | ||
| 1537 | }, | ||
| 1557 | } | 1538 | } |
| 1558 | }, { | 1539 | }, { |
| 1559 | .caps = DVB_USB_IS_AN_I2C_ADAPTER, | 1540 | .caps = DVB_USB_IS_AN_I2C_ADAPTER, |
| @@ -1704,33 +1685,11 @@ static int af9015_usb_probe(struct usb_interface *intf, | |||
| 1704 | return ret; | 1685 | return ret; |
| 1705 | } | 1686 | } |
| 1706 | 1687 | ||
| 1707 | static void af9015_i2c_exit(struct dvb_usb_device *d) | ||
| 1708 | { | ||
| 1709 | struct af9015_state *state = d->priv; | ||
| 1710 | deb_info("%s:\n", __func__); | ||
| 1711 | |||
| 1712 | /* remove 2nd I2C adapter */ | ||
| 1713 | if (d->state & DVB_USB_STATE_I2C) | ||
| 1714 | i2c_del_adapter(&state->i2c_adap); | ||
| 1715 | } | ||
| 1716 | |||
| 1717 | static void af9015_usb_device_exit(struct usb_interface *intf) | ||
| 1718 | { | ||
| 1719 | struct dvb_usb_device *d = usb_get_intfdata(intf); | ||
| 1720 | deb_info("%s:\n", __func__); | ||
| 1721 | |||
| 1722 | /* remove 2nd I2C adapter */ | ||
| 1723 | if (d != NULL && d->desc != NULL) | ||
| 1724 | af9015_i2c_exit(d); | ||
| 1725 | |||
| 1726 | dvb_usb_device_exit(intf); | ||
| 1727 | } | ||
| 1728 | |||
| 1729 | /* usb specific object needed to register this driver with the usb subsystem */ | 1688 | /* usb specific object needed to register this driver with the usb subsystem */ |
| 1730 | static struct usb_driver af9015_usb_driver = { | 1689 | static struct usb_driver af9015_usb_driver = { |
| 1731 | .name = "dvb_usb_af9015", | 1690 | .name = "dvb_usb_af9015", |
| 1732 | .probe = af9015_usb_probe, | 1691 | .probe = af9015_usb_probe, |
| 1733 | .disconnect = af9015_usb_device_exit, | 1692 | .disconnect = dvb_usb_device_exit, |
| 1734 | .id_table = af9015_usb_table, | 1693 | .id_table = af9015_usb_table, |
| 1735 | }; | 1694 | }; |
| 1736 | 1695 | ||
diff --git a/drivers/media/dvb/dvb-usb/af9015.h b/drivers/media/dvb/dvb-usb/af9015.h index beb3004f00ba..6252ea6c1904 100644 --- a/drivers/media/dvb/dvb-usb/af9015.h +++ b/drivers/media/dvb/dvb-usb/af9015.h | |||
| @@ -99,7 +99,6 @@ enum af9015_ir_mode { | |||
| 99 | }; | 99 | }; |
| 100 | 100 | ||
| 101 | struct af9015_state { | 101 | struct af9015_state { |
| 102 | struct i2c_adapter i2c_adap; /* I2C adapter for 2nd FE */ | ||
| 103 | u8 rc_repeat; | 102 | u8 rc_repeat; |
| 104 | u32 rc_keycode; | 103 | u32 rc_keycode; |
| 105 | u8 rc_last[4]; | 104 | u8 rc_last[4]; |
diff --git a/drivers/media/dvb/dvb-usb/anysee.c b/drivers/media/dvb/dvb-usb/anysee.c index 7c327b54308e..2cbf19a52e38 100644 --- a/drivers/media/dvb/dvb-usb/anysee.c +++ b/drivers/media/dvb/dvb-usb/anysee.c | |||
| @@ -347,15 +347,17 @@ static struct isl6423_config anysee_isl6423_config = { | |||
| 347 | * PCB: ? | 347 | * PCB: ? |
| 348 | * parts: DNOS404ZH102A(MT352, DTT7579(?)) | 348 | * parts: DNOS404ZH102A(MT352, DTT7579(?)) |
| 349 | * | 349 | * |
| 350 | * E30 VID=04b4 PID=861f HW=2 FW=2.1 Product=???????? | 350 | * E30 VID=04b4 PID=861f HW=2 FW=2.1 "anysee-T(LP)" |
| 351 | * PCB: ? | 351 | * PCB: PCB 507T (rev1.61) |
| 352 | * parts: DNOS404ZH103A(ZL10353, DTT7579(?)) | 352 | * parts: DNOS404ZH103A(ZL10353, DTT7579(?)) |
| 353 | * OEA=0a OEB=00 OEC=00 OED=ff OEE=00 | ||
| 354 | * IOA=45 IOB=ff IOC=00 IOD=ff IOE=00 | ||
| 353 | * | 355 | * |
| 354 | * E30 Plus VID=04b4 PID=861f HW=6 FW=1.0 "anysee" | 356 | * E30 Plus VID=04b4 PID=861f HW=6 FW=1.0 "anysee" |
| 355 | * PCB: 507CD (rev1.1) | 357 | * PCB: 507CD (rev1.1) |
| 356 | * parts: DNOS404ZH103A(ZL10353, DTT7579(?)), CST56I01 | 358 | * parts: DNOS404ZH103A(ZL10353, DTT7579(?)), CST56I01 |
| 357 | * OEA=80 OEB=00 OEC=00 OED=ff OEF=fe | 359 | * OEA=80 OEB=00 OEC=00 OED=ff OEE=fe |
| 358 | * IOA=4f IOB=ff IOC=00 IOD=06 IOF=01 | 360 | * IOA=4f IOB=ff IOC=00 IOD=06 IOE=01 |
| 359 | * IOD[0] ZL10353 1=enabled | 361 | * IOD[0] ZL10353 1=enabled |
| 360 | * IOA[7] TS 0=enabled | 362 | * IOA[7] TS 0=enabled |
| 361 | * tuner is not behind ZL10353 I2C-gate (no care if gate disabled or not) | 363 | * tuner is not behind ZL10353 I2C-gate (no care if gate disabled or not) |
| @@ -363,30 +365,30 @@ static struct isl6423_config anysee_isl6423_config = { | |||
| 363 | * E30 C Plus VID=04b4 PID=861f HW=10 FW=1.0 "anysee-DC(LP)" | 365 | * E30 C Plus VID=04b4 PID=861f HW=10 FW=1.0 "anysee-DC(LP)" |
| 364 | * PCB: 507DC (rev0.2) | 366 | * PCB: 507DC (rev0.2) |
| 365 | * parts: TDA10023, DTOS403IH102B TM, CST56I01 | 367 | * parts: TDA10023, DTOS403IH102B TM, CST56I01 |
| 366 | * OEA=80 OEB=00 OEC=00 OED=ff OEF=fe | 368 | * OEA=80 OEB=00 OEC=00 OED=ff OEE=fe |
| 367 | * IOA=4f IOB=ff IOC=00 IOD=26 IOF=01 | 369 | * IOA=4f IOB=ff IOC=00 IOD=26 IOE=01 |
| 368 | * IOD[0] TDA10023 1=enabled | 370 | * IOD[0] TDA10023 1=enabled |
| 369 | * | 371 | * |
| 370 | * E30 S2 Plus VID=04b4 PID=861f HW=11 FW=0.1 "anysee-S2(LP)" | 372 | * E30 S2 Plus VID=04b4 PID=861f HW=11 FW=0.1 "anysee-S2(LP)" |
| 371 | * PCB: 507SI (rev2.1) | 373 | * PCB: 507SI (rev2.1) |
| 372 | * parts: BS2N10WCC01(CX24116, CX24118), ISL6423, TDA8024 | 374 | * parts: BS2N10WCC01(CX24116, CX24118), ISL6423, TDA8024 |
| 373 | * OEA=80 OEB=00 OEC=ff OED=ff OEF=fe | 375 | * OEA=80 OEB=00 OEC=ff OED=ff OEE=fe |
| 374 | * IOA=4d IOB=ff IOC=00 IOD=26 IOF=01 | 376 | * IOA=4d IOB=ff IOC=00 IOD=26 IOE=01 |
| 375 | * IOD[0] CX24116 1=enabled | 377 | * IOD[0] CX24116 1=enabled |
| 376 | * | 378 | * |
| 377 | * E30 C Plus VID=1c73 PID=861f HW=15 FW=1.2 "anysee-FA(LP)" | 379 | * E30 C Plus VID=1c73 PID=861f HW=15 FW=1.2 "anysee-FA(LP)" |
| 378 | * PCB: 507FA (rev0.4) | 380 | * PCB: 507FA (rev0.4) |
| 379 | * parts: TDA10023, DTOS403IH102B TM, TDA8024 | 381 | * parts: TDA10023, DTOS403IH102B TM, TDA8024 |
| 380 | * OEA=80 OEB=00 OEC=ff OED=ff OEF=ff | 382 | * OEA=80 OEB=00 OEC=ff OED=ff OEE=ff |
| 381 | * IOA=4d IOB=ff IOC=00 IOD=00 IOF=c0 | 383 | * IOA=4d IOB=ff IOC=00 IOD=00 IOE=c0 |
| 382 | * IOD[5] TDA10023 1=enabled | 384 | * IOD[5] TDA10023 1=enabled |
| 383 | * IOE[0] tuner 1=enabled | 385 | * IOE[0] tuner 1=enabled |
| 384 | * | 386 | * |
| 385 | * E30 Combo Plus VID=1c73 PID=861f HW=15 FW=1.2 "anysee-FA(LP)" | 387 | * E30 Combo Plus VID=1c73 PID=861f HW=15 FW=1.2 "anysee-FA(LP)" |
| 386 | * PCB: 507FA (rev1.1) | 388 | * PCB: 507FA (rev1.1) |
| 387 | * parts: ZL10353, TDA10023, DTOS403IH102B TM, TDA8024 | 389 | * parts: ZL10353, TDA10023, DTOS403IH102B TM, TDA8024 |
| 388 | * OEA=80 OEB=00 OEC=ff OED=ff OEF=ff | 390 | * OEA=80 OEB=00 OEC=ff OED=ff OEE=ff |
| 389 | * IOA=4d IOB=ff IOC=00 IOD=00 IOF=c0 | 391 | * IOA=4d IOB=ff IOC=00 IOD=00 IOE=c0 |
| 390 | * DVB-C: | 392 | * DVB-C: |
| 391 | * IOD[5] TDA10023 1=enabled | 393 | * IOD[5] TDA10023 1=enabled |
| 392 | * IOE[0] tuner 1=enabled | 394 | * IOE[0] tuner 1=enabled |
| @@ -398,8 +400,8 @@ static struct isl6423_config anysee_isl6423_config = { | |||
| 398 | * E7 TC VID=1c73 PID=861f HW=18 FW=0.7 AMTCI=0.5 "anysee-E7TC(LP)" | 400 | * E7 TC VID=1c73 PID=861f HW=18 FW=0.7 AMTCI=0.5 "anysee-E7TC(LP)" |
| 399 | * PCB: 508TC (rev0.6) | 401 | * PCB: 508TC (rev0.6) |
| 400 | * parts: ZL10353, TDA10023, DNOD44CDH086A(TDA18212) | 402 | * parts: ZL10353, TDA10023, DNOD44CDH086A(TDA18212) |
| 401 | * OEA=80 OEB=00 OEC=03 OED=f7 OEF=ff | 403 | * OEA=80 OEB=00 OEC=03 OED=f7 OEE=ff |
| 402 | * IOA=4d IOB=00 IOC=cc IOD=48 IOF=e4 | 404 | * IOA=4d IOB=00 IOC=cc IOD=48 IOE=e4 |
| 403 | * IOA[7] TS 1=enabled | 405 | * IOA[7] TS 1=enabled |
| 404 | * IOE[4] TDA18212 1=enabled | 406 | * IOE[4] TDA18212 1=enabled |
| 405 | * DVB-C: | 407 | * DVB-C: |
| @@ -414,11 +416,34 @@ static struct isl6423_config anysee_isl6423_config = { | |||
| 414 | * E7 S2 VID=1c73 PID=861f HW=19 FW=0.4 AMTCI=0.5 "anysee-E7S2(LP)" | 416 | * E7 S2 VID=1c73 PID=861f HW=19 FW=0.4 AMTCI=0.5 "anysee-E7S2(LP)" |
| 415 | * PCB: 508S2 (rev0.7) | 417 | * PCB: 508S2 (rev0.7) |
| 416 | * parts: DNBU10512IST(STV0903, STV6110), ISL6423 | 418 | * parts: DNBU10512IST(STV0903, STV6110), ISL6423 |
| 417 | * OEA=80 OEB=00 OEC=03 OED=f7 OEF=ff | 419 | * OEA=80 OEB=00 OEC=03 OED=f7 OEE=ff |
| 418 | * IOA=4d IOB=00 IOC=c4 IOD=08 IOF=e4 | 420 | * IOA=4d IOB=00 IOC=c4 IOD=08 IOE=e4 |
| 419 | * IOA[7] TS 1=enabled | 421 | * IOA[7] TS 1=enabled |
| 420 | * IOE[5] STV0903 1=enabled | 422 | * IOE[5] STV0903 1=enabled |
| 421 | * | 423 | * |
| 424 | * E7 PTC VID=1c73 PID=861f HW=21 FW=0.1 AMTCI=?? "anysee-E7PTC(LP)" | ||
| 425 | * PCB: 508PTC (rev0.5) | ||
| 426 | * parts: ZL10353, TDA10023, DNOD44CDH086A(TDA18212) | ||
| 427 | * OEA=80 OEB=00 OEC=03 OED=f7 OEE=ff | ||
| 428 | * IOA=4d IOB=00 IOC=cc IOD=48 IOE=e4 | ||
| 429 | * IOA[7] TS 1=enabled | ||
| 430 | * IOE[4] TDA18212 1=enabled | ||
| 431 | * DVB-C: | ||
| 432 | * IOD[6] ZL10353 0=disabled | ||
| 433 | * IOD[5] TDA10023 1=enabled | ||
| 434 | * IOE[0] IF 1=enabled | ||
| 435 | * DVB-T: | ||
| 436 | * IOD[5] TDA10023 0=disabled | ||
| 437 | * IOD[6] ZL10353 1=enabled | ||
| 438 | * IOE[0] IF 0=enabled | ||
| 439 | * | ||
| 440 | * E7 S2 VID=1c73 PID=861f HW=22 FW=0.1 AMTCI=?? "anysee-E7PS2(LP)" | ||
| 441 | * PCB: 508PS2 (rev0.4) | ||
| 442 | * parts: DNBU10512IST(STV0903, STV6110), ISL6423 | ||
| 443 | * OEA=80 OEB=00 OEC=03 OED=f7 OEE=ff | ||
| 444 | * IOA=4d IOB=00 IOC=c4 IOD=08 IOE=e4 | ||
| 445 | * IOA[7] TS 1=enabled | ||
| 446 | * IOE[5] STV0903 1=enabled | ||
| 422 | */ | 447 | */ |
| 423 | 448 | ||
| 424 | static int anysee_frontend_attach(struct dvb_usb_adapter *adap) | 449 | static int anysee_frontend_attach(struct dvb_usb_adapter *adap) |
| @@ -459,7 +484,7 @@ static int anysee_frontend_attach(struct dvb_usb_adapter *adap) | |||
| 459 | state->hw = hw_info[0]; | 484 | state->hw = hw_info[0]; |
| 460 | 485 | ||
| 461 | switch (state->hw) { | 486 | switch (state->hw) { |
| 462 | case ANYSEE_HW_02: /* 2 */ | 487 | case ANYSEE_HW_507T: /* 2 */ |
| 463 | /* E30 */ | 488 | /* E30 */ |
| 464 | 489 | ||
| 465 | /* attach demod */ | 490 | /* attach demod */ |
| @@ -593,7 +618,9 @@ static int anysee_frontend_attach(struct dvb_usb_adapter *adap) | |||
| 593 | 618 | ||
| 594 | break; | 619 | break; |
| 595 | case ANYSEE_HW_508TC: /* 18 */ | 620 | case ANYSEE_HW_508TC: /* 18 */ |
| 621 | case ANYSEE_HW_508PTC: /* 21 */ | ||
| 596 | /* E7 TC */ | 622 | /* E7 TC */ |
| 623 | /* E7 PTC */ | ||
| 597 | 624 | ||
| 598 | /* enable transport stream on IOA[7] */ | 625 | /* enable transport stream on IOA[7] */ |
| 599 | ret = anysee_wr_reg_mask(adap->dev, REG_IOA, (1 << 7), 0x80); | 626 | ret = anysee_wr_reg_mask(adap->dev, REG_IOA, (1 << 7), 0x80); |
| @@ -650,7 +677,9 @@ static int anysee_frontend_attach(struct dvb_usb_adapter *adap) | |||
| 650 | 677 | ||
| 651 | break; | 678 | break; |
| 652 | case ANYSEE_HW_508S2: /* 19 */ | 679 | case ANYSEE_HW_508S2: /* 19 */ |
| 680 | case ANYSEE_HW_508PS2: /* 22 */ | ||
| 653 | /* E7 S2 */ | 681 | /* E7 S2 */ |
| 682 | /* E7 PS2 */ | ||
| 654 | 683 | ||
| 655 | /* enable transport stream on IOA[7] */ | 684 | /* enable transport stream on IOA[7] */ |
| 656 | ret = anysee_wr_reg_mask(adap->dev, REG_IOA, (1 << 7), 0x80); | 685 | ret = anysee_wr_reg_mask(adap->dev, REG_IOA, (1 << 7), 0x80); |
| @@ -687,7 +716,7 @@ static int anysee_tuner_attach(struct dvb_usb_adapter *adap) | |||
| 687 | deb_info("%s:\n", __func__); | 716 | deb_info("%s:\n", __func__); |
| 688 | 717 | ||
| 689 | switch (state->hw) { | 718 | switch (state->hw) { |
| 690 | case ANYSEE_HW_02: /* 2 */ | 719 | case ANYSEE_HW_507T: /* 2 */ |
| 691 | /* E30 */ | 720 | /* E30 */ |
| 692 | 721 | ||
| 693 | /* attach tuner */ | 722 | /* attach tuner */ |
| @@ -762,7 +791,9 @@ static int anysee_tuner_attach(struct dvb_usb_adapter *adap) | |||
| 762 | 791 | ||
| 763 | break; | 792 | break; |
| 764 | case ANYSEE_HW_508TC: /* 18 */ | 793 | case ANYSEE_HW_508TC: /* 18 */ |
| 794 | case ANYSEE_HW_508PTC: /* 21 */ | ||
| 765 | /* E7 TC */ | 795 | /* E7 TC */ |
| 796 | /* E7 PTC */ | ||
| 766 | 797 | ||
| 767 | /* enable tuner on IOE[4] */ | 798 | /* enable tuner on IOE[4] */ |
| 768 | ret = anysee_wr_reg_mask(adap->dev, REG_IOE, (1 << 4), 0x10); | 799 | ret = anysee_wr_reg_mask(adap->dev, REG_IOE, (1 << 4), 0x10); |
| @@ -775,7 +806,9 @@ static int anysee_tuner_attach(struct dvb_usb_adapter *adap) | |||
| 775 | 806 | ||
| 776 | break; | 807 | break; |
| 777 | case ANYSEE_HW_508S2: /* 19 */ | 808 | case ANYSEE_HW_508S2: /* 19 */ |
| 809 | case ANYSEE_HW_508PS2: /* 22 */ | ||
| 778 | /* E7 S2 */ | 810 | /* E7 S2 */ |
| 811 | /* E7 PS2 */ | ||
| 779 | 812 | ||
| 780 | /* attach tuner */ | 813 | /* attach tuner */ |
| 781 | fe = dvb_attach(stv6110_attach, adap->fe, | 814 | fe = dvb_attach(stv6110_attach, adap->fe, |
diff --git a/drivers/media/dvb/dvb-usb/anysee.h b/drivers/media/dvb/dvb-usb/anysee.h index a7673aa1e007..ad6ccd1ea2d9 100644 --- a/drivers/media/dvb/dvb-usb/anysee.h +++ b/drivers/media/dvb/dvb-usb/anysee.h | |||
| @@ -61,13 +61,15 @@ struct anysee_state { | |||
| 61 | u8 seq; | 61 | u8 seq; |
| 62 | }; | 62 | }; |
| 63 | 63 | ||
| 64 | #define ANYSEE_HW_02 2 /* E30 */ | 64 | #define ANYSEE_HW_507T 2 /* E30 */ |
| 65 | #define ANYSEE_HW_507CD 6 /* E30 Plus */ | 65 | #define ANYSEE_HW_507CD 6 /* E30 Plus */ |
| 66 | #define ANYSEE_HW_507DC 10 /* E30 C Plus */ | 66 | #define ANYSEE_HW_507DC 10 /* E30 C Plus */ |
| 67 | #define ANYSEE_HW_507SI 11 /* E30 S2 Plus */ | 67 | #define ANYSEE_HW_507SI 11 /* E30 S2 Plus */ |
| 68 | #define ANYSEE_HW_507FA 15 /* E30 Combo Plus / E30 C Plus */ | 68 | #define ANYSEE_HW_507FA 15 /* E30 Combo Plus / E30 C Plus */ |
| 69 | #define ANYSEE_HW_508TC 18 /* E7 TC */ | 69 | #define ANYSEE_HW_508TC 18 /* E7 TC */ |
| 70 | #define ANYSEE_HW_508S2 19 /* E7 S2 */ | 70 | #define ANYSEE_HW_508S2 19 /* E7 S2 */ |
| 71 | #define ANYSEE_HW_508PTC 21 /* E7 PTC Plus */ | ||
| 72 | #define ANYSEE_HW_508PS2 22 /* E7 PS2 Plus */ | ||
| 71 | 73 | ||
| 72 | #define REG_IOA 0x80 /* Port A (bit addressable) */ | 74 | #define REG_IOA 0x80 /* Port A (bit addressable) */ |
| 73 | #define REG_IOB 0x90 /* Port B (bit addressable) */ | 75 | #define REG_IOB 0x90 /* Port B (bit addressable) */ |
diff --git a/drivers/media/dvb/dvb-usb/dib0700_devices.c b/drivers/media/dvb/dvb-usb/dib0700_devices.c index c519ad5eb731..d0ea5b64f6b4 100644 --- a/drivers/media/dvb/dvb-usb/dib0700_devices.c +++ b/drivers/media/dvb/dvb-usb/dib0700_devices.c | |||
| @@ -17,6 +17,7 @@ | |||
| 17 | #include "mt2266.h" | 17 | #include "mt2266.h" |
| 18 | #include "tuner-xc2028.h" | 18 | #include "tuner-xc2028.h" |
| 19 | #include "xc5000.h" | 19 | #include "xc5000.h" |
| 20 | #include "xc4000.h" | ||
| 20 | #include "s5h1411.h" | 21 | #include "s5h1411.h" |
| 21 | #include "dib0070.h" | 22 | #include "dib0070.h" |
| 22 | #include "dib0090.h" | 23 | #include "dib0090.h" |
| @@ -2655,6 +2656,156 @@ static int xc5000_tuner_attach(struct dvb_usb_adapter *adap) | |||
| 2655 | == NULL ? -ENODEV : 0; | 2656 | == NULL ? -ENODEV : 0; |
| 2656 | } | 2657 | } |
| 2657 | 2658 | ||
| 2659 | static int dib0700_xc4000_tuner_callback(void *priv, int component, | ||
| 2660 | int command, int arg) | ||
| 2661 | { | ||
| 2662 | struct dvb_usb_adapter *adap = priv; | ||
| 2663 | |||
| 2664 | if (command == XC4000_TUNER_RESET) { | ||
| 2665 | /* Reset the tuner */ | ||
| 2666 | dib7000p_set_gpio(adap->fe, 8, 0, 0); | ||
| 2667 | msleep(10); | ||
| 2668 | dib7000p_set_gpio(adap->fe, 8, 0, 1); | ||
| 2669 | } else { | ||
| 2670 | err("xc4000: unknown tuner callback command: %d\n", command); | ||
| 2671 | return -EINVAL; | ||
| 2672 | } | ||
| 2673 | |||
| 2674 | return 0; | ||
| 2675 | } | ||
| 2676 | |||
| 2677 | static struct dibx000_agc_config stk7700p_7000p_xc4000_agc_config = { | ||
| 2678 | .band_caps = BAND_UHF | BAND_VHF, | ||
| 2679 | .setup = 0x64, | ||
| 2680 | .inv_gain = 0x02c8, | ||
| 2681 | .time_stabiliz = 0x15, | ||
| 2682 | .alpha_level = 0x00, | ||
| 2683 | .thlock = 0x76, | ||
| 2684 | .wbd_inv = 0x01, | ||
| 2685 | .wbd_ref = 0x0b33, | ||
| 2686 | .wbd_sel = 0x00, | ||
| 2687 | .wbd_alpha = 0x02, | ||
| 2688 | .agc1_max = 0x00, | ||
| 2689 | .agc1_min = 0x00, | ||
| 2690 | .agc2_max = 0x9b26, | ||
| 2691 | .agc2_min = 0x26ca, | ||
| 2692 | .agc1_pt1 = 0x00, | ||
| 2693 | .agc1_pt2 = 0x00, | ||
| 2694 | .agc1_pt3 = 0x00, | ||
| 2695 | .agc1_slope1 = 0x00, | ||
| 2696 | .agc1_slope2 = 0x00, | ||
| 2697 | .agc2_pt1 = 0x00, | ||
| 2698 | .agc2_pt2 = 0x80, | ||
| 2699 | .agc2_slope1 = 0x1d, | ||
| 2700 | .agc2_slope2 = 0x1d, | ||
| 2701 | .alpha_mant = 0x11, | ||
| 2702 | .alpha_exp = 0x1b, | ||
| 2703 | .beta_mant = 0x17, | ||
| 2704 | .beta_exp = 0x33, | ||
| 2705 | .perform_agc_softsplit = 0x00, | ||
| 2706 | }; | ||
| 2707 | |||
| 2708 | static struct dibx000_bandwidth_config stk7700p_xc4000_pll_config = { | ||
| 2709 | 60000, 30000, /* internal, sampling */ | ||
| 2710 | 1, 8, 3, 1, 0, /* pll_cfg: prediv, ratio, range, reset, bypass */ | ||
| 2711 | 0, 0, 1, 1, 0, /* misc: refdiv, bypclk_div, IO_CLK_en_core, */ | ||
| 2712 | /* ADClkSrc, modulo */ | ||
| 2713 | (3 << 14) | (1 << 12) | 524, /* sad_cfg: refsel, sel, freq_15k */ | ||
| 2714 | 39370534, /* ifreq */ | ||
| 2715 | 20452225, /* timf */ | ||
| 2716 | 30000000 /* xtal */ | ||
| 2717 | }; | ||
| 2718 | |||
| 2719 | /* FIXME: none of these inputs are validated yet */ | ||
| 2720 | static struct dib7000p_config pctv_340e_config = { | ||
| 2721 | .output_mpeg2_in_188_bytes = 1, | ||
| 2722 | |||
| 2723 | .agc_config_count = 1, | ||
| 2724 | .agc = &stk7700p_7000p_xc4000_agc_config, | ||
| 2725 | .bw = &stk7700p_xc4000_pll_config, | ||
| 2726 | |||
| 2727 | .gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS, | ||
| 2728 | .gpio_val = DIB7000M_GPIO_DEFAULT_VALUES, | ||
| 2729 | .gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS, | ||
| 2730 | }; | ||
| 2731 | |||
| 2732 | /* PCTV 340e GPIOs map: | ||
| 2733 | dib0700: | ||
| 2734 | GPIO2 - CX25843 sleep | ||
| 2735 | GPIO3 - CS5340 reset | ||
| 2736 | GPIO5 - IRD | ||
| 2737 | GPIO6 - Power Supply | ||
| 2738 | GPIO8 - LNA (1=off 0=on) | ||
| 2739 | GPIO10 - CX25843 reset | ||
| 2740 | dib7000: | ||
| 2741 | GPIO8 - xc4000 reset | ||
| 2742 | */ | ||
| 2743 | static int pctv340e_frontend_attach(struct dvb_usb_adapter *adap) | ||
| 2744 | { | ||
| 2745 | struct dib0700_state *st = adap->dev->priv; | ||
| 2746 | |||
| 2747 | /* Power Supply on */ | ||
| 2748 | dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); | ||
| 2749 | msleep(50); | ||
| 2750 | dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); | ||
| 2751 | msleep(100); /* Allow power supply to settle before probing */ | ||
| 2752 | |||
| 2753 | /* cx25843 reset */ | ||
| 2754 | dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); | ||
| 2755 | msleep(1); /* cx25843 datasheet say 350us required */ | ||
| 2756 | dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); | ||
| 2757 | |||
| 2758 | /* LNA off for now */ | ||
| 2759 | dib0700_set_gpio(adap->dev, GPIO8, GPIO_OUT, 1); | ||
| 2760 | |||
| 2761 | /* Put the CX25843 to sleep for now since we're in digital mode */ | ||
| 2762 | dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 1); | ||
| 2763 | |||
| 2764 | /* FIXME: not verified yet */ | ||
| 2765 | dib0700_ctrl_clock(adap->dev, 72, 1); | ||
| 2766 | |||
| 2767 | msleep(500); | ||
| 2768 | |||
| 2769 | if (dib7000pc_detection(&adap->dev->i2c_adap) == 0) { | ||
| 2770 | /* Demodulator not found for some reason? */ | ||
| 2771 | return -ENODEV; | ||
| 2772 | } | ||
| 2773 | |||
| 2774 | adap->fe = dvb_attach(dib7000p_attach, &adap->dev->i2c_adap, 0x12, | ||
| 2775 | &pctv_340e_config); | ||
| 2776 | st->is_dib7000pc = 1; | ||
| 2777 | |||
| 2778 | return adap->fe == NULL ? -ENODEV : 0; | ||
| 2779 | } | ||
| 2780 | |||
| 2781 | static struct xc4000_config dib7000p_xc4000_tunerconfig = { | ||
| 2782 | .i2c_address = 0x61, | ||
| 2783 | .default_pm = 1, | ||
| 2784 | .dvb_amplitude = 0, | ||
| 2785 | .set_smoothedcvbs = 0, | ||
| 2786 | .if_khz = 5400 | ||
| 2787 | }; | ||
| 2788 | |||
| 2789 | static int xc4000_tuner_attach(struct dvb_usb_adapter *adap) | ||
| 2790 | { | ||
| 2791 | struct i2c_adapter *tun_i2c; | ||
| 2792 | |||
| 2793 | /* The xc4000 is not on the main i2c bus */ | ||
| 2794 | tun_i2c = dib7000p_get_i2c_master(adap->fe, | ||
| 2795 | DIBX000_I2C_INTERFACE_TUNER, 1); | ||
| 2796 | if (tun_i2c == NULL) { | ||
| 2797 | printk(KERN_ERR "Could not reach tuner i2c bus\n"); | ||
| 2798 | return 0; | ||
| 2799 | } | ||
| 2800 | |||
| 2801 | /* Setup the reset callback */ | ||
| 2802 | adap->fe->callback = dib0700_xc4000_tuner_callback; | ||
| 2803 | |||
| 2804 | return dvb_attach(xc4000_attach, adap->fe, tun_i2c, | ||
| 2805 | &dib7000p_xc4000_tunerconfig) | ||
| 2806 | == NULL ? -ENODEV : 0; | ||
| 2807 | } | ||
| 2808 | |||
| 2658 | static struct lgdt3305_config hcw_lgdt3305_config = { | 2809 | static struct lgdt3305_config hcw_lgdt3305_config = { |
| 2659 | .i2c_addr = 0x0e, | 2810 | .i2c_addr = 0x0e, |
| 2660 | .mpeg_mode = LGDT3305_MPEG_PARALLEL, | 2811 | .mpeg_mode = LGDT3305_MPEG_PARALLEL, |
| @@ -2802,6 +2953,8 @@ struct usb_device_id dib0700_usb_id_table[] = { | |||
| 2802 | { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_TFE7090PVR) }, | 2953 | { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_TFE7090PVR) }, |
| 2803 | { USB_DEVICE(USB_VID_TECHNISAT, USB_PID_TECHNISAT_AIRSTAR_TELESTICK_2) }, | 2954 | { USB_DEVICE(USB_VID_TECHNISAT, USB_PID_TECHNISAT_AIRSTAR_TELESTICK_2) }, |
| 2804 | /* 75 */{ USB_DEVICE(USB_VID_MEDION, USB_PID_CREATIX_CTX1921) }, | 2955 | /* 75 */{ USB_DEVICE(USB_VID_MEDION, USB_PID_CREATIX_CTX1921) }, |
| 2956 | { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV340E) }, | ||
| 2957 | { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV340E_SE) }, | ||
| 2805 | { 0 } /* Terminating entry */ | 2958 | { 0 } /* Terminating entry */ |
| 2806 | }; | 2959 | }; |
| 2807 | MODULE_DEVICE_TABLE(usb, dib0700_usb_id_table); | 2960 | MODULE_DEVICE_TABLE(usb, dib0700_usb_id_table); |
| @@ -3772,6 +3925,41 @@ struct dvb_usb_device_properties dib0700_devices[] = { | |||
| 3772 | RC_TYPE_NEC, | 3925 | RC_TYPE_NEC, |
| 3773 | .change_protocol = dib0700_change_protocol, | 3926 | .change_protocol = dib0700_change_protocol, |
| 3774 | }, | 3927 | }, |
| 3928 | }, { DIB0700_DEFAULT_DEVICE_PROPERTIES, | ||
| 3929 | .num_adapters = 1, | ||
| 3930 | .adapter = { | ||
| 3931 | { | ||
| 3932 | .frontend_attach = pctv340e_frontend_attach, | ||
| 3933 | .tuner_attach = xc4000_tuner_attach, | ||
| 3934 | |||
| 3935 | DIB0700_DEFAULT_STREAMING_CONFIG(0x02), | ||
| 3936 | |||
| 3937 | .size_of_priv = sizeof(struct | ||
| 3938 | dib0700_adapter_state), | ||
| 3939 | }, | ||
| 3940 | }, | ||
| 3941 | |||
| 3942 | .num_device_descs = 2, | ||
| 3943 | .devices = { | ||
| 3944 | { "Pinnacle PCTV 340e HD Pro USB Stick", | ||
| 3945 | { &dib0700_usb_id_table[76], NULL }, | ||
| 3946 | { NULL }, | ||
| 3947 | }, | ||
| 3948 | { "Pinnacle PCTV Hybrid Stick Solo", | ||
| 3949 | { &dib0700_usb_id_table[77], NULL }, | ||
| 3950 | { NULL }, | ||
| 3951 | }, | ||
| 3952 | }, | ||
| 3953 | .rc.core = { | ||
| 3954 | .rc_interval = DEFAULT_RC_INTERVAL, | ||
| 3955 | .rc_codes = RC_MAP_DIB0700_RC5_TABLE, | ||
| 3956 | .module_name = "dib0700", | ||
| 3957 | .rc_query = dib0700_rc_query_old_firmware, | ||
| 3958 | .allowed_protos = RC_TYPE_RC5 | | ||
| 3959 | RC_TYPE_RC6 | | ||
| 3960 | RC_TYPE_NEC, | ||
| 3961 | .change_protocol = dib0700_change_protocol, | ||
| 3962 | }, | ||
| 3775 | }, | 3963 | }, |
| 3776 | }; | 3964 | }; |
| 3777 | 3965 | ||
diff --git a/drivers/media/dvb/dvb-usb/dvb-usb-ids.h b/drivers/media/dvb/dvb-usb/dvb-usb-ids.h index 21b15495d2d7..2a79b8fb3e8d 100644 --- a/drivers/media/dvb/dvb-usb/dvb-usb-ids.h +++ b/drivers/media/dvb/dvb-usb/dvb-usb-ids.h | |||
| @@ -230,6 +230,8 @@ | |||
| 230 | #define USB_PID_PINNACLE_PCTV310E 0x3211 | 230 | #define USB_PID_PINNACLE_PCTV310E 0x3211 |
| 231 | #define USB_PID_PINNACLE_PCTV801E 0x023a | 231 | #define USB_PID_PINNACLE_PCTV801E 0x023a |
| 232 | #define USB_PID_PINNACLE_PCTV801E_SE 0x023b | 232 | #define USB_PID_PINNACLE_PCTV801E_SE 0x023b |
| 233 | #define USB_PID_PINNACLE_PCTV340E 0x023d | ||
| 234 | #define USB_PID_PINNACLE_PCTV340E_SE 0x023e | ||
| 233 | #define USB_PID_PINNACLE_PCTV73A 0x0243 | 235 | #define USB_PID_PINNACLE_PCTV73A 0x0243 |
| 234 | #define USB_PID_PINNACLE_PCTV73ESE 0x0245 | 236 | #define USB_PID_PINNACLE_PCTV73ESE 0x0245 |
| 235 | #define USB_PID_PINNACLE_PCTV74E 0x0246 | 237 | #define USB_PID_PINNACLE_PCTV74E 0x0246 |
| @@ -313,6 +315,7 @@ | |||
| 313 | #define USB_PID_FRIIO_WHITE 0x0001 | 315 | #define USB_PID_FRIIO_WHITE 0x0001 |
| 314 | #define USB_PID_TVWAY_PLUS 0x0002 | 316 | #define USB_PID_TVWAY_PLUS 0x0002 |
| 315 | #define USB_PID_SVEON_STV20 0xe39d | 317 | #define USB_PID_SVEON_STV20 0xe39d |
| 318 | #define USB_PID_SVEON_STV22 0xe401 | ||
| 316 | #define USB_PID_AZUREWAVE_AZ6027 0x3275 | 319 | #define USB_PID_AZUREWAVE_AZ6027 0x3275 |
| 317 | #define USB_PID_TERRATEC_DVBS2CI_V1 0x10a4 | 320 | #define USB_PID_TERRATEC_DVBS2CI_V1 0x10a4 |
| 318 | #define USB_PID_TERRATEC_DVBS2CI_V2 0x10ac | 321 | #define USB_PID_TERRATEC_DVBS2CI_V2 0x10ac |
diff --git a/drivers/media/dvb/dvb-usb/dvb-usb.h b/drivers/media/dvb/dvb-usb/dvb-usb.h index 76a80968482a..7d35d078342b 100644 --- a/drivers/media/dvb/dvb-usb/dvb-usb.h +++ b/drivers/media/dvb/dvb-usb/dvb-usb.h | |||
| @@ -85,7 +85,7 @@ static inline u8 rc5_data(struct rc_map_table *key) | |||
| 85 | return key->scancode & 0xff; | 85 | return key->scancode & 0xff; |
| 86 | } | 86 | } |
| 87 | 87 | ||
| 88 | static inline u8 rc5_scan(struct rc_map_table *key) | 88 | static inline u16 rc5_scan(struct rc_map_table *key) |
| 89 | { | 89 | { |
| 90 | return key->scancode & 0xffff; | 90 | return key->scancode & 0xffff; |
| 91 | } | 91 | } |
diff --git a/drivers/media/dvb/dvb-usb/gp8psk.h b/drivers/media/dvb/dvb-usb/gp8psk.h index 831749a518cb..ed32b9da4843 100644 --- a/drivers/media/dvb/dvb-usb/gp8psk.h +++ b/drivers/media/dvb/dvb-usb/gp8psk.h | |||
| @@ -78,9 +78,6 @@ extern int dvb_usb_gp8psk_debug; | |||
| 78 | #define ADV_MOD_DVB_BPSK 9 /* DVB-S BPSK */ | 78 | #define ADV_MOD_DVB_BPSK 9 /* DVB-S BPSK */ |
| 79 | 79 | ||
| 80 | #define GET_USB_SPEED 0x07 | 80 | #define GET_USB_SPEED 0x07 |
| 81 | #define USB_SPEED_LOW 0 | ||
| 82 | #define USB_SPEED_FULL 1 | ||
| 83 | #define USB_SPEED_HIGH 2 | ||
| 84 | 81 | ||
| 85 | #define RESET_FX2 0x13 | 82 | #define RESET_FX2 0x13 |
| 86 | 83 | ||
diff --git a/drivers/media/dvb/dvb-usb/technisat-usb2.c b/drivers/media/dvb/dvb-usb/technisat-usb2.c index 08f8842ad280..473b95ed4d52 100644 --- a/drivers/media/dvb/dvb-usb/technisat-usb2.c +++ b/drivers/media/dvb/dvb-usb/technisat-usb2.c | |||
| @@ -765,10 +765,8 @@ static void technisat_usb2_disconnect(struct usb_interface *intf) | |||
| 765 | /* work and stuff was only created when the device is is hot-state */ | 765 | /* work and stuff was only created when the device is is hot-state */ |
| 766 | if (dev != NULL) { | 766 | if (dev != NULL) { |
| 767 | struct technisat_usb2_state *state = dev->priv; | 767 | struct technisat_usb2_state *state = dev->priv; |
| 768 | if (state != NULL) { | 768 | if (state != NULL) |
| 769 | cancel_delayed_work_sync(&state->green_led_work); | 769 | cancel_delayed_work_sync(&state->green_led_work); |
| 770 | flush_scheduled_work(); | ||
| 771 | } | ||
| 772 | } | 770 | } |
| 773 | 771 | ||
| 774 | dvb_usb_device_exit(intf); | 772 | dvb_usb_device_exit(intf); |
diff --git a/drivers/media/dvb/dvb-usb/vp7045.h b/drivers/media/dvb/dvb-usb/vp7045.h index 969688f85267..cf5ec46f8bb1 100644 --- a/drivers/media/dvb/dvb-usb/vp7045.h +++ b/drivers/media/dvb/dvb-usb/vp7045.h | |||
| @@ -36,9 +36,6 @@ | |||
| 36 | #define Tuner_Power_OFF 0 | 36 | #define Tuner_Power_OFF 0 |
| 37 | 37 | ||
| 38 | #define GET_USB_SPEED 0x07 | 38 | #define GET_USB_SPEED 0x07 |
| 39 | #define USB_SPEED_LOW 0 | ||
| 40 | #define USB_SPEED_FULL 1 | ||
| 41 | #define USB_SPEED_HIGH 2 | ||
| 42 | 39 | ||
| 43 | #define LOCK_TUNER_COMMAND 0x09 | 40 | #define LOCK_TUNER_COMMAND 0x09 |
| 44 | 41 | ||
diff --git a/drivers/media/dvb/firewire/firedtv-avc.c b/drivers/media/dvb/firewire/firedtv-avc.c index 21c52e3b522e..489ae8245867 100644 --- a/drivers/media/dvb/firewire/firedtv-avc.c +++ b/drivers/media/dvb/firewire/firedtv-avc.c | |||
| @@ -1208,7 +1208,7 @@ int avc_ca_pmt(struct firedtv *fdtv, char *msg, int length) | |||
| 1208 | if (r->response != AVC_RESPONSE_ACCEPTED) { | 1208 | if (r->response != AVC_RESPONSE_ACCEPTED) { |
| 1209 | dev_err(fdtv->device, | 1209 | dev_err(fdtv->device, |
| 1210 | "CA PMT failed with response 0x%x\n", r->response); | 1210 | "CA PMT failed with response 0x%x\n", r->response); |
| 1211 | ret = -EFAULT; | 1211 | ret = -EACCES; |
| 1212 | } | 1212 | } |
| 1213 | out: | 1213 | out: |
| 1214 | mutex_unlock(&fdtv->avc_mutex); | 1214 | mutex_unlock(&fdtv->avc_mutex); |
diff --git a/drivers/media/dvb/firewire/firedtv-ci.c b/drivers/media/dvb/firewire/firedtv-ci.c index 8ffb565f0704..e5ebdbfe8c19 100644 --- a/drivers/media/dvb/firewire/firedtv-ci.c +++ b/drivers/media/dvb/firewire/firedtv-ci.c | |||
| @@ -45,11 +45,6 @@ static int fdtv_get_ca_flags(struct firedtv_tuner_status *stat) | |||
| 45 | return flags; | 45 | return flags; |
| 46 | } | 46 | } |
| 47 | 47 | ||
| 48 | static int fdtv_ca_reset(struct firedtv *fdtv) | ||
| 49 | { | ||
| 50 | return avc_ca_reset(fdtv) ? -EFAULT : 0; | ||
| 51 | } | ||
| 52 | |||
| 53 | static int fdtv_ca_get_caps(void *arg) | 48 | static int fdtv_ca_get_caps(void *arg) |
| 54 | { | 49 | { |
| 55 | struct ca_caps *cap = arg; | 50 | struct ca_caps *cap = arg; |
| @@ -65,12 +60,14 @@ static int fdtv_ca_get_slot_info(struct firedtv *fdtv, void *arg) | |||
| 65 | { | 60 | { |
| 66 | struct firedtv_tuner_status stat; | 61 | struct firedtv_tuner_status stat; |
| 67 | struct ca_slot_info *slot = arg; | 62 | struct ca_slot_info *slot = arg; |
| 63 | int err; | ||
| 68 | 64 | ||
| 69 | if (avc_tuner_status(fdtv, &stat)) | 65 | err = avc_tuner_status(fdtv, &stat); |
| 70 | return -EFAULT; | 66 | if (err) |
| 67 | return err; | ||
| 71 | 68 | ||
| 72 | if (slot->num != 0) | 69 | if (slot->num != 0) |
| 73 | return -EFAULT; | 70 | return -EACCES; |
| 74 | 71 | ||
| 75 | slot->type = CA_CI; | 72 | slot->type = CA_CI; |
| 76 | slot->flags = fdtv_get_ca_flags(&stat); | 73 | slot->flags = fdtv_get_ca_flags(&stat); |
| @@ -81,21 +78,21 @@ static int fdtv_ca_app_info(struct firedtv *fdtv, void *arg) | |||
| 81 | { | 78 | { |
| 82 | struct ca_msg *reply = arg; | 79 | struct ca_msg *reply = arg; |
| 83 | 80 | ||
| 84 | return avc_ca_app_info(fdtv, reply->msg, &reply->length) ? -EFAULT : 0; | 81 | return avc_ca_app_info(fdtv, reply->msg, &reply->length); |
| 85 | } | 82 | } |
| 86 | 83 | ||
| 87 | static int fdtv_ca_info(struct firedtv *fdtv, void *arg) | 84 | static int fdtv_ca_info(struct firedtv *fdtv, void *arg) |
| 88 | { | 85 | { |
| 89 | struct ca_msg *reply = arg; | 86 | struct ca_msg *reply = arg; |
| 90 | 87 | ||
| 91 | return avc_ca_info(fdtv, reply->msg, &reply->length) ? -EFAULT : 0; | 88 | return avc_ca_info(fdtv, reply->msg, &reply->length); |
| 92 | } | 89 | } |
| 93 | 90 | ||
| 94 | static int fdtv_ca_get_mmi(struct firedtv *fdtv, void *arg) | 91 | static int fdtv_ca_get_mmi(struct firedtv *fdtv, void *arg) |
| 95 | { | 92 | { |
| 96 | struct ca_msg *reply = arg; | 93 | struct ca_msg *reply = arg; |
| 97 | 94 | ||
| 98 | return avc_ca_get_mmi(fdtv, reply->msg, &reply->length) ? -EFAULT : 0; | 95 | return avc_ca_get_mmi(fdtv, reply->msg, &reply->length); |
| 99 | } | 96 | } |
| 100 | 97 | ||
| 101 | static int fdtv_ca_get_msg(struct firedtv *fdtv, void *arg) | 98 | static int fdtv_ca_get_msg(struct firedtv *fdtv, void *arg) |
| @@ -111,14 +108,15 @@ static int fdtv_ca_get_msg(struct firedtv *fdtv, void *arg) | |||
| 111 | err = fdtv_ca_info(fdtv, arg); | 108 | err = fdtv_ca_info(fdtv, arg); |
| 112 | break; | 109 | break; |
| 113 | default: | 110 | default: |
| 114 | if (avc_tuner_status(fdtv, &stat)) | 111 | err = avc_tuner_status(fdtv, &stat); |
| 115 | err = -EFAULT; | 112 | if (err) |
| 116 | else if (stat.ca_mmi == 1) | 113 | break; |
| 114 | if (stat.ca_mmi == 1) | ||
| 117 | err = fdtv_ca_get_mmi(fdtv, arg); | 115 | err = fdtv_ca_get_mmi(fdtv, arg); |
| 118 | else { | 116 | else { |
| 119 | dev_info(fdtv->device, "unhandled CA message 0x%08x\n", | 117 | dev_info(fdtv->device, "unhandled CA message 0x%08x\n", |
| 120 | fdtv->ca_last_command); | 118 | fdtv->ca_last_command); |
| 121 | err = -EFAULT; | 119 | err = -EACCES; |
| 122 | } | 120 | } |
| 123 | } | 121 | } |
| 124 | fdtv->ca_last_command = 0; | 122 | fdtv->ca_last_command = 0; |
| @@ -141,7 +139,7 @@ static int fdtv_ca_pmt(struct firedtv *fdtv, void *arg) | |||
| 141 | data_length = msg->msg[3]; | 139 | data_length = msg->msg[3]; |
| 142 | } | 140 | } |
| 143 | 141 | ||
| 144 | return avc_ca_pmt(fdtv, &msg->msg[data_pos], data_length) ? -EFAULT : 0; | 142 | return avc_ca_pmt(fdtv, &msg->msg[data_pos], data_length); |
| 145 | } | 143 | } |
| 146 | 144 | ||
| 147 | static int fdtv_ca_send_msg(struct firedtv *fdtv, void *arg) | 145 | static int fdtv_ca_send_msg(struct firedtv *fdtv, void *arg) |
| @@ -170,7 +168,7 @@ static int fdtv_ca_send_msg(struct firedtv *fdtv, void *arg) | |||
| 170 | default: | 168 | default: |
| 171 | dev_err(fdtv->device, "unhandled CA message 0x%08x\n", | 169 | dev_err(fdtv->device, "unhandled CA message 0x%08x\n", |
| 172 | fdtv->ca_last_command); | 170 | fdtv->ca_last_command); |
| 173 | err = -EFAULT; | 171 | err = -EACCES; |
| 174 | } | 172 | } |
| 175 | return err; | 173 | return err; |
| 176 | } | 174 | } |
| @@ -184,7 +182,7 @@ static int fdtv_ca_ioctl(struct file *file, unsigned int cmd, void *arg) | |||
| 184 | 182 | ||
| 185 | switch (cmd) { | 183 | switch (cmd) { |
| 186 | case CA_RESET: | 184 | case CA_RESET: |
| 187 | err = fdtv_ca_reset(fdtv); | 185 | err = avc_ca_reset(fdtv); |
| 188 | break; | 186 | break; |
| 189 | case CA_GET_CAP: | 187 | case CA_GET_CAP: |
| 190 | err = fdtv_ca_get_caps(arg); | 188 | err = fdtv_ca_get_caps(arg); |
diff --git a/drivers/media/dvb/frontends/Kconfig b/drivers/media/dvb/frontends/Kconfig index 44b816f2601e..32e08e351525 100644 --- a/drivers/media/dvb/frontends/Kconfig +++ b/drivers/media/dvb/frontends/Kconfig | |||
| @@ -49,6 +49,27 @@ config DVB_STV6110x | |||
| 49 | help | 49 | help |
| 50 | A Silicon tuner that supports DVB-S and DVB-S2 modes | 50 | A Silicon tuner that supports DVB-S and DVB-S2 modes |
| 51 | 51 | ||
| 52 | comment "Multistandard (cable + terrestrial) frontends" | ||
| 53 | depends on DVB_CORE | ||
| 54 | |||
| 55 | config DVB_DRXK | ||
| 56 | tristate "Micronas DRXK based" | ||
| 57 | depends on DVB_CORE && I2C | ||
| 58 | default m if DVB_FE_CUSTOMISE | ||
| 59 | help | ||
| 60 | Micronas DRX-K DVB-C/T demodulator. | ||
| 61 | |||
| 62 | Say Y when you want to support this frontend. | ||
| 63 | |||
| 64 | config DVB_TDA18271C2DD | ||
| 65 | tristate "NXP TDA18271C2 silicon tuner" | ||
| 66 | depends on DVB_CORE && I2C | ||
| 67 | default m if DVB_FE_CUSTOMISE | ||
| 68 | help | ||
| 69 | NXP TDA18271 silicon tuner. | ||
| 70 | |||
| 71 | Say Y when you want to support this tuner. | ||
| 72 | |||
| 52 | comment "DVB-S (satellite) frontends" | 73 | comment "DVB-S (satellite) frontends" |
| 53 | depends on DVB_CORE | 74 | depends on DVB_CORE |
| 54 | 75 | ||
diff --git a/drivers/media/dvb/frontends/Makefile b/drivers/media/dvb/frontends/Makefile index 2f3a6f736d64..6a6ba053ead4 100644 --- a/drivers/media/dvb/frontends/Makefile +++ b/drivers/media/dvb/frontends/Makefile | |||
| @@ -10,6 +10,7 @@ stv0900-objs = stv0900_core.o stv0900_sw.o | |||
| 10 | au8522-objs = au8522_dig.o au8522_decoder.o | 10 | au8522-objs = au8522_dig.o au8522_decoder.o |
| 11 | drxd-objs = drxd_firm.o drxd_hard.o | 11 | drxd-objs = drxd_firm.o drxd_hard.o |
| 12 | cxd2820r-objs = cxd2820r_core.o cxd2820r_c.o cxd2820r_t.o cxd2820r_t2.o | 12 | cxd2820r-objs = cxd2820r_core.o cxd2820r_c.o cxd2820r_t.o cxd2820r_t2.o |
| 13 | drxk-objs := drxk_hard.o | ||
| 13 | 14 | ||
| 14 | obj-$(CONFIG_DVB_PLL) += dvb-pll.o | 15 | obj-$(CONFIG_DVB_PLL) += dvb-pll.o |
| 15 | obj-$(CONFIG_DVB_STV0299) += stv0299.o | 16 | obj-$(CONFIG_DVB_STV0299) += stv0299.o |
| @@ -88,4 +89,6 @@ obj-$(CONFIG_DVB_MB86A20S) += mb86a20s.o | |||
| 88 | obj-$(CONFIG_DVB_IX2505V) += ix2505v.o | 89 | obj-$(CONFIG_DVB_IX2505V) += ix2505v.o |
| 89 | obj-$(CONFIG_DVB_STV0367) += stv0367.o | 90 | obj-$(CONFIG_DVB_STV0367) += stv0367.o |
| 90 | obj-$(CONFIG_DVB_CXD2820R) += cxd2820r.o | 91 | obj-$(CONFIG_DVB_CXD2820R) += cxd2820r.o |
| 92 | obj-$(CONFIG_DVB_DRXK) += drxk.o | ||
| 93 | obj-$(CONFIG_DVB_TDA18271C2DD) += tda18271c2dd.o | ||
| 91 | 94 | ||
diff --git a/drivers/media/dvb/frontends/au8522_decoder.c b/drivers/media/dvb/frontends/au8522_decoder.c index b537891a4cc9..2b248c12f404 100644 --- a/drivers/media/dvb/frontends/au8522_decoder.c +++ b/drivers/media/dvb/frontends/au8522_decoder.c | |||
| @@ -692,7 +692,7 @@ static int au8522_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt) | |||
| 692 | /* Interrogate the decoder to see if we are getting a real signal */ | 692 | /* Interrogate the decoder to see if we are getting a real signal */ |
| 693 | lock_status = au8522_readreg(state, 0x00); | 693 | lock_status = au8522_readreg(state, 0x00); |
| 694 | if (lock_status == 0xa2) | 694 | if (lock_status == 0xa2) |
| 695 | vt->signal = 0x01; | 695 | vt->signal = 0xffff; |
| 696 | else | 696 | else |
| 697 | vt->signal = 0x00; | 697 | vt->signal = 0x00; |
| 698 | 698 | ||
diff --git a/drivers/media/dvb/frontends/cx24113.c b/drivers/media/dvb/frontends/cx24113.c index e9ee55592fd3..c341d57d5e81 100644 --- a/drivers/media/dvb/frontends/cx24113.c +++ b/drivers/media/dvb/frontends/cx24113.c | |||
| @@ -31,8 +31,8 @@ | |||
| 31 | 31 | ||
| 32 | static int debug; | 32 | static int debug; |
| 33 | 33 | ||
| 34 | #define info(args...) do { printk(KERN_INFO "CX24113: " args); } while (0) | 34 | #define cx_info(args...) do { printk(KERN_INFO "CX24113: " args); } while (0) |
| 35 | #define err(args...) do { printk(KERN_ERR "CX24113: " args); } while (0) | 35 | #define cx_err(args...) do { printk(KERN_ERR "CX24113: " args); } while (0) |
| 36 | 36 | ||
| 37 | #define dprintk(args...) \ | 37 | #define dprintk(args...) \ |
| 38 | do { \ | 38 | do { \ |
| @@ -341,7 +341,7 @@ static void cx24113_calc_pll_nf(struct cx24113_state *state, u16 *n, s32 *f) | |||
| 341 | } while (N < 6 && R < 3); | 341 | } while (N < 6 && R < 3); |
| 342 | 342 | ||
| 343 | if (N < 6) { | 343 | if (N < 6) { |
| 344 | err("strange frequency: N < 6\n"); | 344 | cx_err("strange frequency: N < 6\n"); |
| 345 | return; | 345 | return; |
| 346 | } | 346 | } |
| 347 | F = freq_hz; | 347 | F = freq_hz; |
| @@ -563,7 +563,7 @@ struct dvb_frontend *cx24113_attach(struct dvb_frontend *fe, | |||
| 563 | kzalloc(sizeof(struct cx24113_state), GFP_KERNEL); | 563 | kzalloc(sizeof(struct cx24113_state), GFP_KERNEL); |
| 564 | int rc; | 564 | int rc; |
| 565 | if (state == NULL) { | 565 | if (state == NULL) { |
| 566 | err("Unable to kzalloc\n"); | 566 | cx_err("Unable to kzalloc\n"); |
| 567 | goto error; | 567 | goto error; |
| 568 | } | 568 | } |
| 569 | 569 | ||
| @@ -571,7 +571,7 @@ struct dvb_frontend *cx24113_attach(struct dvb_frontend *fe, | |||
| 571 | state->config = config; | 571 | state->config = config; |
| 572 | state->i2c = i2c; | 572 | state->i2c = i2c; |
| 573 | 573 | ||
| 574 | info("trying to detect myself\n"); | 574 | cx_info("trying to detect myself\n"); |
| 575 | 575 | ||
| 576 | /* making a dummy read, because of some expected troubles | 576 | /* making a dummy read, because of some expected troubles |
| 577 | * after power on */ | 577 | * after power on */ |
| @@ -579,24 +579,24 @@ struct dvb_frontend *cx24113_attach(struct dvb_frontend *fe, | |||
| 579 | 579 | ||
| 580 | rc = cx24113_readreg(state, 0x00); | 580 | rc = cx24113_readreg(state, 0x00); |
| 581 | if (rc < 0) { | 581 | if (rc < 0) { |
| 582 | info("CX24113 not found.\n"); | 582 | cx_info("CX24113 not found.\n"); |
| 583 | goto error; | 583 | goto error; |
| 584 | } | 584 | } |
| 585 | state->rev = rc; | 585 | state->rev = rc; |
| 586 | 586 | ||
| 587 | switch (rc) { | 587 | switch (rc) { |
| 588 | case 0x43: | 588 | case 0x43: |
| 589 | info("detected CX24113 variant\n"); | 589 | cx_info("detected CX24113 variant\n"); |
| 590 | break; | 590 | break; |
| 591 | case REV_CX24113: | 591 | case REV_CX24113: |
| 592 | info("successfully detected\n"); | 592 | cx_info("successfully detected\n"); |
| 593 | break; | 593 | break; |
| 594 | default: | 594 | default: |
| 595 | err("unsupported device id: %x\n", state->rev); | 595 | cx_err("unsupported device id: %x\n", state->rev); |
| 596 | goto error; | 596 | goto error; |
| 597 | } | 597 | } |
| 598 | state->ver = cx24113_readreg(state, 0x01); | 598 | state->ver = cx24113_readreg(state, 0x01); |
| 599 | info("version: %x\n", state->ver); | 599 | cx_info("version: %x\n", state->ver); |
| 600 | 600 | ||
| 601 | /* create dvb_frontend */ | 601 | /* create dvb_frontend */ |
| 602 | memcpy(&fe->ops.tuner_ops, &cx24113_tuner_ops, | 602 | memcpy(&fe->ops.tuner_ops, &cx24113_tuner_ops, |
diff --git a/drivers/media/dvb/frontends/cx24116.c b/drivers/media/dvb/frontends/cx24116.c index 95c6465b87a1..ccd05255d527 100644 --- a/drivers/media/dvb/frontends/cx24116.c +++ b/drivers/media/dvb/frontends/cx24116.c | |||
| @@ -1452,11 +1452,7 @@ tuned: /* Set/Reset B/W */ | |||
| 1452 | cmd.args[0x00] = CMD_BANDWIDTH; | 1452 | cmd.args[0x00] = CMD_BANDWIDTH; |
| 1453 | cmd.args[0x01] = 0x00; | 1453 | cmd.args[0x01] = 0x00; |
| 1454 | cmd.len = 0x02; | 1454 | cmd.len = 0x02; |
| 1455 | ret = cx24116_cmd_execute(fe, &cmd); | 1455 | return cx24116_cmd_execute(fe, &cmd); |
| 1456 | if (ret != 0) | ||
| 1457 | return ret; | ||
| 1458 | |||
| 1459 | return ret; | ||
| 1460 | } | 1456 | } |
| 1461 | 1457 | ||
| 1462 | static int cx24116_tune(struct dvb_frontend *fe, struct dvb_frontend_parameters *params, | 1458 | static int cx24116_tune(struct dvb_frontend *fe, struct dvb_frontend_parameters *params, |
diff --git a/drivers/media/dvb/frontends/cxd2820r.h b/drivers/media/dvb/frontends/cxd2820r.h index ad17845123d9..2906582dc94c 100644 --- a/drivers/media/dvb/frontends/cxd2820r.h +++ b/drivers/media/dvb/frontends/cxd2820r.h | |||
| @@ -55,13 +55,13 @@ struct cxd2820r_config { | |||
| 55 | * Default: 0 | 55 | * Default: 0 |
| 56 | * Values: 0, 1 | 56 | * Values: 0, 1 |
| 57 | */ | 57 | */ |
| 58 | int if_agc_polarity:1; | 58 | bool if_agc_polarity; |
| 59 | 59 | ||
| 60 | /* Spectrum inversion. | 60 | /* Spectrum inversion. |
| 61 | * Default: 0 | 61 | * Default: 0 |
| 62 | * Values: 0, 1 | 62 | * Values: 0, 1 |
| 63 | */ | 63 | */ |
| 64 | int spec_inv:1; | 64 | bool spec_inv; |
| 65 | 65 | ||
| 66 | /* IFs for all used modes. | 66 | /* IFs for all used modes. |
| 67 | * Default: none, must set | 67 | * Default: none, must set |
diff --git a/drivers/media/dvb/frontends/cxd2820r_core.c b/drivers/media/dvb/frontends/cxd2820r_core.c index 0779f69db793..d416e85589e1 100644 --- a/drivers/media/dvb/frontends/cxd2820r_core.c +++ b/drivers/media/dvb/frontends/cxd2820r_core.c | |||
| @@ -314,6 +314,8 @@ static int cxd2820r_set_frontend(struct dvb_frontend *fe, | |||
| 314 | } else if (c->delivery_system == SYS_DVBT2) { | 314 | } else if (c->delivery_system == SYS_DVBT2) { |
| 315 | /* DVB-T => DVB-T2 */ | 315 | /* DVB-T => DVB-T2 */ |
| 316 | ret = cxd2820r_sleep_t(fe); | 316 | ret = cxd2820r_sleep_t(fe); |
| 317 | if (ret) | ||
| 318 | break; | ||
| 317 | ret = cxd2820r_set_frontend_t2(fe, p); | 319 | ret = cxd2820r_set_frontend_t2(fe, p); |
| 318 | } | 320 | } |
| 319 | break; | 321 | break; |
| @@ -324,6 +326,8 @@ static int cxd2820r_set_frontend(struct dvb_frontend *fe, | |||
| 324 | } else if (c->delivery_system == SYS_DVBT) { | 326 | } else if (c->delivery_system == SYS_DVBT) { |
| 325 | /* DVB-T2 => DVB-T */ | 327 | /* DVB-T2 => DVB-T */ |
| 326 | ret = cxd2820r_sleep_t2(fe); | 328 | ret = cxd2820r_sleep_t2(fe); |
| 329 | if (ret) | ||
| 330 | break; | ||
| 327 | ret = cxd2820r_set_frontend_t(fe, p); | 331 | ret = cxd2820r_set_frontend_t(fe, p); |
| 328 | } | 332 | } |
| 329 | break; | 333 | break; |
| @@ -740,12 +744,13 @@ static int cxd2820r_tuner_i2c_xfer(struct i2c_adapter *i2c_adap, | |||
| 740 | struct i2c_msg msg[], int num) | 744 | struct i2c_msg msg[], int num) |
| 741 | { | 745 | { |
| 742 | struct cxd2820r_priv *priv = i2c_get_adapdata(i2c_adap); | 746 | struct cxd2820r_priv *priv = i2c_get_adapdata(i2c_adap); |
| 743 | u8 obuf[msg[0].len + 2]; | 747 | int ret; |
| 748 | u8 *obuf = kmalloc(msg[0].len + 2, GFP_KERNEL); | ||
| 744 | struct i2c_msg msg2[2] = { | 749 | struct i2c_msg msg2[2] = { |
| 745 | { | 750 | { |
| 746 | .addr = priv->cfg.i2c_address, | 751 | .addr = priv->cfg.i2c_address, |
| 747 | .flags = 0, | 752 | .flags = 0, |
| 748 | .len = sizeof(obuf), | 753 | .len = msg[0].len + 2, |
| 749 | .buf = obuf, | 754 | .buf = obuf, |
| 750 | }, { | 755 | }, { |
| 751 | .addr = priv->cfg.i2c_address, | 756 | .addr = priv->cfg.i2c_address, |
| @@ -755,15 +760,24 @@ static int cxd2820r_tuner_i2c_xfer(struct i2c_adapter *i2c_adap, | |||
| 755 | } | 760 | } |
| 756 | }; | 761 | }; |
| 757 | 762 | ||
| 763 | if (!obuf) | ||
| 764 | return -ENOMEM; | ||
| 765 | |||
| 758 | obuf[0] = 0x09; | 766 | obuf[0] = 0x09; |
| 759 | obuf[1] = (msg[0].addr << 1); | 767 | obuf[1] = (msg[0].addr << 1); |
| 760 | if (num == 2) { /* I2C read */ | 768 | if (num == 2) { /* I2C read */ |
| 761 | obuf[1] = (msg[0].addr << 1) | I2C_M_RD; /* I2C RD flag */ | 769 | obuf[1] = (msg[0].addr << 1) | I2C_M_RD; /* I2C RD flag */ |
| 762 | msg2[0].len = sizeof(obuf) - 1; /* maybe HW bug ? */ | 770 | msg2[0].len = msg[0].len + 2 - 1; /* '-1' maybe HW bug ? */ |
| 763 | } | 771 | } |
| 764 | memcpy(&obuf[2], msg[0].buf, msg[0].len); | 772 | memcpy(&obuf[2], msg[0].buf, msg[0].len); |
| 765 | 773 | ||
| 766 | return i2c_transfer(priv->i2c, msg2, num); | 774 | ret = i2c_transfer(priv->i2c, msg2, num); |
| 775 | if (ret < 0) | ||
| 776 | warn("tuner i2c failed ret:%d", ret); | ||
| 777 | |||
| 778 | kfree(obuf); | ||
| 779 | |||
| 780 | return ret; | ||
| 767 | } | 781 | } |
| 768 | 782 | ||
| 769 | static struct i2c_algorithm cxd2820r_tuner_i2c_algo = { | 783 | static struct i2c_algorithm cxd2820r_tuner_i2c_algo = { |
diff --git a/drivers/media/dvb/frontends/cxd2820r_priv.h b/drivers/media/dvb/frontends/cxd2820r_priv.h index 25adbeefa6d3..0c0ebc9d5c4a 100644 --- a/drivers/media/dvb/frontends/cxd2820r_priv.h +++ b/drivers/media/dvb/frontends/cxd2820r_priv.h | |||
| @@ -55,13 +55,13 @@ struct cxd2820r_priv { | |||
| 55 | struct mutex fe_lock; /*Â FE lock */ | 55 | struct mutex fe_lock; /*Â FE lock */ |
| 56 | int active_fe:2; /* FE lock, -1=NONE, 0=DVB-T/T2, 1=DVB-C */ | 56 | int active_fe:2; /* FE lock, -1=NONE, 0=DVB-T/T2, 1=DVB-C */ |
| 57 | 57 | ||
| 58 | int ber_running:1; | 58 | bool ber_running; |
| 59 | 59 | ||
| 60 | u8 bank[2]; | 60 | u8 bank[2]; |
| 61 | u8 gpio[3]; | 61 | u8 gpio[3]; |
| 62 | 62 | ||
| 63 | fe_delivery_system_t delivery_system; | 63 | fe_delivery_system_t delivery_system; |
| 64 | int last_tune_failed:1; /* for switch between T and T2 tune */ | 64 | bool last_tune_failed; /* for switch between T and T2 tune */ |
| 65 | }; | 65 | }; |
| 66 | 66 | ||
| 67 | /* cxd2820r_core.c */ | 67 | /* cxd2820r_core.c */ |
diff --git a/drivers/media/dvb/frontends/dib7000p.c b/drivers/media/dvb/frontends/dib7000p.c index 0c9f40c2a251..a64a538ba364 100644 --- a/drivers/media/dvb/frontends/dib7000p.c +++ b/drivers/media/dvb/frontends/dib7000p.c | |||
| @@ -2336,6 +2336,11 @@ struct dvb_frontend *dib7000p_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr, | |||
| 2336 | request_firmware() will hit an OOPS (this should be moved somewhere | 2336 | request_firmware() will hit an OOPS (this should be moved somewhere |
| 2337 | more common) */ | 2337 | more common) */ |
| 2338 | 2338 | ||
| 2339 | /* FIXME: make sure the dev.parent field is initialized, or else | ||
| 2340 | request_firmware() will hit an OOPS (this should be moved somewhere | ||
| 2341 | more common) */ | ||
| 2342 | st->i2c_master.gated_tuner_i2c_adap.dev.parent = i2c_adap->dev.parent; | ||
| 2343 | |||
| 2339 | dibx000_init_i2c_master(&st->i2c_master, DIB7000P, st->i2c_adap, st->i2c_addr); | 2344 | dibx000_init_i2c_master(&st->i2c_master, DIB7000P, st->i2c_adap, st->i2c_addr); |
| 2340 | 2345 | ||
| 2341 | /* init 7090 tuner adapter */ | 2346 | /* init 7090 tuner adapter */ |
diff --git a/drivers/media/dvb/frontends/drxd_hard.c b/drivers/media/dvb/frontends/drxd_hard.c index ea4c1c361d2b..2238bf0be959 100644 --- a/drivers/media/dvb/frontends/drxd_hard.c +++ b/drivers/media/dvb/frontends/drxd_hard.c | |||
| @@ -28,7 +28,6 @@ | |||
| 28 | #include <linux/delay.h> | 28 | #include <linux/delay.h> |
| 29 | #include <linux/firmware.h> | 29 | #include <linux/firmware.h> |
| 30 | #include <linux/i2c.h> | 30 | #include <linux/i2c.h> |
| 31 | #include <linux/version.h> | ||
| 32 | #include <asm/div64.h> | 31 | #include <asm/div64.h> |
| 33 | 32 | ||
| 34 | #include "dvb_frontend.h" | 33 | #include "dvb_frontend.h" |
| @@ -233,7 +232,7 @@ static int i2c_read(struct i2c_adapter *adap, | |||
| 233 | return 0; | 232 | return 0; |
| 234 | } | 233 | } |
| 235 | 234 | ||
| 236 | inline u32 MulDiv32(u32 a, u32 b, u32 c) | 235 | static inline u32 MulDiv32(u32 a, u32 b, u32 c) |
| 237 | { | 236 | { |
| 238 | u64 tmp64; | 237 | u64 tmp64; |
| 239 | 238 | ||
| @@ -910,14 +909,16 @@ static int load_firmware(struct drxd_state *state, const char *fw_name) | |||
| 910 | return -EIO; | 909 | return -EIO; |
| 911 | } | 910 | } |
| 912 | 911 | ||
| 913 | state->microcode = kzalloc(fw->size, GFP_KERNEL); | 912 | state->microcode = kmalloc(fw->size, GFP_KERNEL); |
| 914 | if (state->microcode == NULL) { | 913 | if (state->microcode == NULL) { |
| 915 | printk(KERN_ERR "drxd: firmware load failure: nomemory\n"); | 914 | release_firmware(fw); |
| 915 | printk(KERN_ERR "drxd: firmware load failure: no memory\n"); | ||
| 916 | return -ENOMEM; | 916 | return -ENOMEM; |
| 917 | } | 917 | } |
| 918 | 918 | ||
| 919 | memcpy(state->microcode, fw->data, fw->size); | 919 | memcpy(state->microcode, fw->data, fw->size); |
| 920 | state->microcode_length = fw->size; | 920 | state->microcode_length = fw->size; |
| 921 | release_firmware(fw); | ||
| 921 | return 0; | 922 | return 0; |
| 922 | } | 923 | } |
| 923 | 924 | ||
diff --git a/drivers/media/dvb/frontends/drxk.h b/drivers/media/dvb/frontends/drxk.h new file mode 100644 index 000000000000..58baf419560c --- /dev/null +++ b/drivers/media/dvb/frontends/drxk.h | |||
| @@ -0,0 +1,47 @@ | |||
| 1 | #ifndef _DRXK_H_ | ||
| 2 | #define _DRXK_H_ | ||
| 3 | |||
| 4 | #include <linux/types.h> | ||
| 5 | #include <linux/i2c.h> | ||
| 6 | |||
| 7 | /** | ||
| 8 | * struct drxk_config - Configure the initial parameters for DRX-K | ||
| 9 | * | ||
| 10 | * adr: I2C Address of the DRX-K | ||
| 11 | * single_master: Device is on the single master mode | ||
| 12 | * no_i2c_bridge: Don't switch the I2C bridge to talk with tuner | ||
| 13 | * antenna_gpio: GPIO bit used to control the antenna | ||
| 14 | * antenna_dvbt: GPIO bit for changing antenna to DVB-C. A value of 1 | ||
| 15 | * means that 1=DVBC, 0 = DVBT. Zero means the opposite. | ||
| 16 | * microcode_name: Name of the firmware file with the microcode | ||
| 17 | * | ||
| 18 | * On the *_gpio vars, bit 0 is UIO-1, bit 1 is UIO-2 and bit 2 is | ||
| 19 | * UIO-3. | ||
| 20 | */ | ||
| 21 | struct drxk_config { | ||
| 22 | u8 adr; | ||
| 23 | bool single_master; | ||
| 24 | bool no_i2c_bridge; | ||
| 25 | |||
| 26 | bool antenna_dvbt; | ||
| 27 | u16 antenna_gpio; | ||
| 28 | |||
| 29 | const char *microcode_name; | ||
| 30 | }; | ||
| 31 | |||
| 32 | #if defined(CONFIG_DVB_DRXK) || (defined(CONFIG_DVB_DRXK_MODULE) \ | ||
| 33 | && defined(MODULE)) | ||
| 34 | extern struct dvb_frontend *drxk_attach(const struct drxk_config *config, | ||
| 35 | struct i2c_adapter *i2c, | ||
| 36 | struct dvb_frontend **fe_t); | ||
| 37 | #else | ||
| 38 | static inline struct dvb_frontend *drxk_attach(const struct drxk_config *config, | ||
| 39 | struct i2c_adapter *i2c, | ||
| 40 | struct dvb_frontend **fe_t) | ||
| 41 | { | ||
| 42 | printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); | ||
| 43 | return NULL; | ||
| 44 | } | ||
| 45 | #endif | ||
| 46 | |||
| 47 | #endif | ||
diff --git a/drivers/media/dvb/frontends/drxk_hard.c b/drivers/media/dvb/frontends/drxk_hard.c new file mode 100644 index 000000000000..41b083820dae --- /dev/null +++ b/drivers/media/dvb/frontends/drxk_hard.c | |||
| @@ -0,0 +1,6454 @@ | |||
| 1 | /* | ||
| 2 | * drxk_hard: DRX-K DVB-C/T demodulator driver | ||
| 3 | * | ||
| 4 | * Copyright (C) 2010-2011 Digital Devices GmbH | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or | ||
| 7 | * modify it under the terms of the GNU General Public License | ||
| 8 | * version 2 only, as published by the Free Software Foundation. | ||
| 9 | * | ||
| 10 | * | ||
| 11 | * This program is distributed in the hope that it will be useful, | ||
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 14 | * GNU General Public License for more details. | ||
| 15 | * | ||
| 16 | * | ||
| 17 | * You should have received a copy of the GNU General Public License | ||
| 18 | * along with this program; if not, write to the Free Software | ||
| 19 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA | ||
| 20 | * 02110-1301, USA | ||
| 21 | * Or, point your browser to http://www.gnu.org/copyleft/gpl.html | ||
| 22 | */ | ||
| 23 | |||
| 24 | #include <linux/kernel.h> | ||
| 25 | #include <linux/module.h> | ||
| 26 | #include <linux/moduleparam.h> | ||
| 27 | #include <linux/init.h> | ||
| 28 | #include <linux/delay.h> | ||
| 29 | #include <linux/firmware.h> | ||
| 30 | #include <linux/i2c.h> | ||
| 31 | #include <linux/version.h> | ||
| 32 | #include <asm/div64.h> | ||
| 33 | |||
| 34 | #include "dvb_frontend.h" | ||
| 35 | #include "drxk.h" | ||
| 36 | #include "drxk_hard.h" | ||
| 37 | |||
| 38 | static int PowerDownDVBT(struct drxk_state *state, bool setPowerMode); | ||
| 39 | static int PowerDownQAM(struct drxk_state *state); | ||
| 40 | static int SetDVBTStandard(struct drxk_state *state, | ||
| 41 | enum OperationMode oMode); | ||
| 42 | static int SetQAMStandard(struct drxk_state *state, | ||
| 43 | enum OperationMode oMode); | ||
| 44 | static int SetQAM(struct drxk_state *state, u16 IntermediateFreqkHz, | ||
| 45 | s32 tunerFreqOffset); | ||
| 46 | static int SetDVBTStandard(struct drxk_state *state, | ||
| 47 | enum OperationMode oMode); | ||
| 48 | static int DVBTStart(struct drxk_state *state); | ||
| 49 | static int SetDVBT(struct drxk_state *state, u16 IntermediateFreqkHz, | ||
| 50 | s32 tunerFreqOffset); | ||
| 51 | static int GetQAMLockStatus(struct drxk_state *state, u32 *pLockStatus); | ||
| 52 | static int GetDVBTLockStatus(struct drxk_state *state, u32 *pLockStatus); | ||
| 53 | static int SwitchAntennaToQAM(struct drxk_state *state); | ||
| 54 | static int SwitchAntennaToDVBT(struct drxk_state *state); | ||
| 55 | |||
| 56 | static bool IsDVBT(struct drxk_state *state) | ||
| 57 | { | ||
| 58 | return state->m_OperationMode == OM_DVBT; | ||
| 59 | } | ||
| 60 | |||
| 61 | static bool IsQAM(struct drxk_state *state) | ||
| 62 | { | ||
| 63 | return state->m_OperationMode == OM_QAM_ITU_A || | ||
| 64 | state->m_OperationMode == OM_QAM_ITU_B || | ||
| 65 | state->m_OperationMode == OM_QAM_ITU_C; | ||
| 66 | } | ||
| 67 | |||
| 68 | bool IsA1WithPatchCode(struct drxk_state *state) | ||
| 69 | { | ||
| 70 | return state->m_DRXK_A1_PATCH_CODE; | ||
| 71 | } | ||
| 72 | |||
| 73 | bool IsA1WithRomCode(struct drxk_state *state) | ||
| 74 | { | ||
| 75 | return state->m_DRXK_A1_ROM_CODE; | ||
| 76 | } | ||
| 77 | |||
| 78 | #define NOA1ROM 0 | ||
| 79 | |||
| 80 | #define DRXDAP_FASI_SHORT_FORMAT(addr) (((addr) & 0xFC30FF80) == 0) | ||
| 81 | #define DRXDAP_FASI_LONG_FORMAT(addr) (((addr) & 0xFC30FF80) != 0) | ||
| 82 | |||
| 83 | #define DEFAULT_MER_83 165 | ||
| 84 | #define DEFAULT_MER_93 250 | ||
| 85 | |||
| 86 | #ifndef DRXK_MPEG_SERIAL_OUTPUT_PIN_DRIVE_STRENGTH | ||
| 87 | #define DRXK_MPEG_SERIAL_OUTPUT_PIN_DRIVE_STRENGTH (0x02) | ||
| 88 | #endif | ||
| 89 | |||
| 90 | #ifndef DRXK_MPEG_PARALLEL_OUTPUT_PIN_DRIVE_STRENGTH | ||
| 91 | #define DRXK_MPEG_PARALLEL_OUTPUT_PIN_DRIVE_STRENGTH (0x03) | ||
| 92 | #endif | ||
| 93 | |||
| 94 | #ifndef DRXK_MPEG_OUTPUT_CLK_DRIVE_STRENGTH | ||
| 95 | #define DRXK_MPEG_OUTPUT_CLK_DRIVE_STRENGTH (0x06) | ||
| 96 | #endif | ||
| 97 | |||
| 98 | #define DEFAULT_DRXK_MPEG_LOCK_TIMEOUT 700 | ||
| 99 | #define DEFAULT_DRXK_DEMOD_LOCK_TIMEOUT 500 | ||
| 100 | |||
| 101 | #ifndef DRXK_KI_RAGC_ATV | ||
| 102 | #define DRXK_KI_RAGC_ATV 4 | ||
| 103 | #endif | ||
| 104 | #ifndef DRXK_KI_IAGC_ATV | ||
| 105 | #define DRXK_KI_IAGC_ATV 6 | ||
| 106 | #endif | ||
| 107 | #ifndef DRXK_KI_DAGC_ATV | ||
| 108 | #define DRXK_KI_DAGC_ATV 7 | ||
| 109 | #endif | ||
| 110 | |||
| 111 | #ifndef DRXK_KI_RAGC_QAM | ||
| 112 | #define DRXK_KI_RAGC_QAM 3 | ||
| 113 | #endif | ||
| 114 | #ifndef DRXK_KI_IAGC_QAM | ||
| 115 | #define DRXK_KI_IAGC_QAM 4 | ||
| 116 | #endif | ||
| 117 | #ifndef DRXK_KI_DAGC_QAM | ||
| 118 | #define DRXK_KI_DAGC_QAM 7 | ||
| 119 | #endif | ||
| 120 | #ifndef DRXK_KI_RAGC_DVBT | ||
| 121 | #define DRXK_KI_RAGC_DVBT (IsA1WithPatchCode(state) ? 3 : 2) | ||
| 122 | #endif | ||
| 123 | #ifndef DRXK_KI_IAGC_DVBT | ||
| 124 | #define DRXK_KI_IAGC_DVBT (IsA1WithPatchCode(state) ? 4 : 2) | ||
| 125 | #endif | ||
| 126 | #ifndef DRXK_KI_DAGC_DVBT | ||
| 127 | #define DRXK_KI_DAGC_DVBT (IsA1WithPatchCode(state) ? 10 : 7) | ||
| 128 | #endif | ||
| 129 | |||
| 130 | #ifndef DRXK_AGC_DAC_OFFSET | ||
| 131 | #define DRXK_AGC_DAC_OFFSET (0x800) | ||
| 132 | #endif | ||
| 133 | |||
| 134 | #ifndef DRXK_BANDWIDTH_8MHZ_IN_HZ | ||
| 135 | #define DRXK_BANDWIDTH_8MHZ_IN_HZ (0x8B8249L) | ||
| 136 | #endif | ||
| 137 | |||
| 138 | #ifndef DRXK_BANDWIDTH_7MHZ_IN_HZ | ||
| 139 | #define DRXK_BANDWIDTH_7MHZ_IN_HZ (0x7A1200L) | ||
| 140 | #endif | ||
| 141 | |||
| 142 | #ifndef DRXK_BANDWIDTH_6MHZ_IN_HZ | ||
| 143 | #define DRXK_BANDWIDTH_6MHZ_IN_HZ (0x68A1B6L) | ||
| 144 | #endif | ||
| 145 | |||
| 146 | #ifndef DRXK_QAM_SYMBOLRATE_MAX | ||
| 147 | #define DRXK_QAM_SYMBOLRATE_MAX (7233000) | ||
| 148 | #endif | ||
| 149 | |||
| 150 | #define DRXK_BL_ROM_OFFSET_TAPS_DVBT 56 | ||
| 151 | #define DRXK_BL_ROM_OFFSET_TAPS_ITU_A 64 | ||
| 152 | #define DRXK_BL_ROM_OFFSET_TAPS_ITU_C 0x5FE0 | ||
| 153 | #define DRXK_BL_ROM_OFFSET_TAPS_BG 24 | ||
| 154 | #define DRXK_BL_ROM_OFFSET_TAPS_DKILLP 32 | ||
| 155 | #define DRXK_BL_ROM_OFFSET_TAPS_NTSC 40 | ||
| 156 | #define DRXK_BL_ROM_OFFSET_TAPS_FM 48 | ||
| 157 | #define DRXK_BL_ROM_OFFSET_UCODE 0 | ||
| 158 | |||
| 159 | #define DRXK_BLC_TIMEOUT 100 | ||
| 160 | |||
| 161 | #define DRXK_BLCC_NR_ELEMENTS_TAPS 2 | ||
| 162 | #define DRXK_BLCC_NR_ELEMENTS_UCODE 6 | ||
| 163 | |||
| 164 | #define DRXK_BLDC_NR_ELEMENTS_TAPS 28 | ||
| 165 | |||
| 166 | #ifndef DRXK_OFDM_NE_NOTCH_WIDTH | ||
| 167 | #define DRXK_OFDM_NE_NOTCH_WIDTH (4) | ||
| 168 | #endif | ||
| 169 | |||
| 170 | #define DRXK_QAM_SL_SIG_POWER_QAM16 (40960) | ||
| 171 | #define DRXK_QAM_SL_SIG_POWER_QAM32 (20480) | ||
| 172 | #define DRXK_QAM_SL_SIG_POWER_QAM64 (43008) | ||
| 173 | #define DRXK_QAM_SL_SIG_POWER_QAM128 (20992) | ||
| 174 | #define DRXK_QAM_SL_SIG_POWER_QAM256 (43520) | ||
| 175 | |||
| 176 | static unsigned int debug; | ||
| 177 | module_param(debug, int, 0644); | ||
| 178 | MODULE_PARM_DESC(debug, "enable debug messages"); | ||
| 179 | |||
| 180 | #define dprintk(level, fmt, arg...) do { \ | ||
| 181 | if (debug >= level) \ | ||
| 182 | printk(KERN_DEBUG "drxk: %s" fmt, __func__, ## arg); \ | ||
| 183 | } while (0) | ||
| 184 | |||
| 185 | |||
| 186 | static inline u32 MulDiv32(u32 a, u32 b, u32 c) | ||
| 187 | { | ||
| 188 | u64 tmp64; | ||
| 189 | |||
| 190 | tmp64 = (u64) a * (u64) b; | ||
| 191 | do_div(tmp64, c); | ||
| 192 | |||
| 193 | return (u32) tmp64; | ||
| 194 | } | ||
| 195 | |||
| 196 | inline u32 Frac28a(u32 a, u32 c) | ||
| 197 | { | ||
| 198 | int i = 0; | ||
| 199 | u32 Q1 = 0; | ||
| 200 | u32 R0 = 0; | ||
| 201 | |||
| 202 | R0 = (a % c) << 4; /* 32-28 == 4 shifts possible at max */ | ||
| 203 | Q1 = a / c; /* integer part, only the 4 least significant bits | ||
| 204 | will be visible in the result */ | ||
| 205 | |||
| 206 | /* division using radix 16, 7 nibbles in the result */ | ||
| 207 | for (i = 0; i < 7; i++) { | ||
| 208 | Q1 = (Q1 << 4) | (R0 / c); | ||
| 209 | R0 = (R0 % c) << 4; | ||
| 210 | } | ||
| 211 | /* rounding */ | ||
| 212 | if ((R0 >> 3) >= c) | ||
| 213 | Q1++; | ||
| 214 | |||
| 215 | return Q1; | ||
| 216 | } | ||
| 217 | |||
| 218 | static u32 Log10Times100(u32 x) | ||
| 219 | { | ||
| 220 | static const u8 scale = 15; | ||
| 221 | static const u8 indexWidth = 5; | ||
| 222 | u8 i = 0; | ||
| 223 | u32 y = 0; | ||
| 224 | u32 d = 0; | ||
| 225 | u32 k = 0; | ||
| 226 | u32 r = 0; | ||
| 227 | /* | ||
| 228 | log2lut[n] = (1<<scale) * 200 * log2(1.0 + ((1.0/(1<<INDEXWIDTH)) * n)) | ||
| 229 | 0 <= n < ((1<<INDEXWIDTH)+1) | ||
| 230 | */ | ||
| 231 | |||
| 232 | static const u32 log2lut[] = { | ||
| 233 | 0, /* 0.000000 */ | ||
| 234 | 290941, /* 290941.300628 */ | ||
| 235 | 573196, /* 573196.476418 */ | ||
| 236 | 847269, /* 847269.179851 */ | ||
| 237 | 1113620, /* 1113620.489452 */ | ||
| 238 | 1372674, /* 1372673.576986 */ | ||
| 239 | 1624818, /* 1624817.752104 */ | ||
| 240 | 1870412, /* 1870411.981536 */ | ||
| 241 | 2109788, /* 2109787.962654 */ | ||
| 242 | 2343253, /* 2343252.817465 */ | ||
| 243 | 2571091, /* 2571091.461923 */ | ||
| 244 | 2793569, /* 2793568.696416 */ | ||
| 245 | 3010931, /* 3010931.055901 */ | ||
| 246 | 3223408, /* 3223408.452106 */ | ||
| 247 | 3431216, /* 3431215.635215 */ | ||
| 248 | 3634553, /* 3634553.498355 */ | ||
| 249 | 3833610, /* 3833610.244726 */ | ||
| 250 | 4028562, /* 4028562.434393 */ | ||
| 251 | 4219576, /* 4219575.925308 */ | ||
| 252 | 4406807, /* 4406806.721144 */ | ||
| 253 | 4590402, /* 4590401.736809 */ | ||
| 254 | 4770499, /* 4770499.491025 */ | ||
| 255 | 4947231, /* 4947230.734179 */ | ||
| 256 | 5120719, /* 5120719.018555 */ | ||
| 257 | 5291081, /* 5291081.217197 */ | ||
| 258 | 5458428, /* 5458427.996830 */ | ||
| 259 | 5622864, /* 5622864.249668 */ | ||
| 260 | 5784489, /* 5784489.488298 */ | ||
| 261 | 5943398, /* 5943398.207380 */ | ||
| 262 | 6099680, /* 6099680.215452 */ | ||
| 263 | 6253421, /* 6253420.939751 */ | ||
| 264 | 6404702, /* 6404701.706649 */ | ||
| 265 | 6553600, /* 6553600.000000 */ | ||
| 266 | }; | ||
| 267 | |||
| 268 | |||
| 269 | if (x == 0) | ||
| 270 | return 0; | ||
| 271 | |||
| 272 | /* Scale x (normalize) */ | ||
| 273 | /* computing y in log(x/y) = log(x) - log(y) */ | ||
| 274 | if ((x & ((0xffffffff) << (scale + 1))) == 0) { | ||
| 275 | for (k = scale; k > 0; k--) { | ||
| 276 | if (x & (((u32) 1) << scale)) | ||
| 277 | break; | ||
| 278 | x <<= 1; | ||
| 279 | } | ||
| 280 | } else { | ||
| 281 | for (k = scale; k < 31; k++) { | ||
| 282 | if ((x & (((u32) (-1)) << (scale + 1))) == 0) | ||
| 283 | break; | ||
| 284 | x >>= 1; | ||
| 285 | } | ||
| 286 | } | ||
| 287 | /* | ||
| 288 | Now x has binary point between bit[scale] and bit[scale-1] | ||
| 289 | and 1.0 <= x < 2.0 */ | ||
| 290 | |||
| 291 | /* correction for divison: log(x) = log(x/y)+log(y) */ | ||
| 292 | y = k * ((((u32) 1) << scale) * 200); | ||
| 293 | |||
| 294 | /* remove integer part */ | ||
| 295 | x &= ((((u32) 1) << scale) - 1); | ||
| 296 | /* get index */ | ||
| 297 | i = (u8) (x >> (scale - indexWidth)); | ||
| 298 | /* compute delta (x - a) */ | ||
| 299 | d = x & ((((u32) 1) << (scale - indexWidth)) - 1); | ||
| 300 | /* compute log, multiplication (d* (..)) must be within range ! */ | ||
| 301 | y += log2lut[i] + | ||
| 302 | ((d * (log2lut[i + 1] - log2lut[i])) >> (scale - indexWidth)); | ||
| 303 | /* Conver to log10() */ | ||
| 304 | y /= 108853; /* (log2(10) << scale) */ | ||
| 305 | r = (y >> 1); | ||
| 306 | /* rounding */ | ||
| 307 | if (y & ((u32) 1)) | ||
| 308 | r++; | ||
| 309 | return r; | ||
| 310 | } | ||
| 311 | |||
| 312 | /****************************************************************************/ | ||
| 313 | /* I2C **********************************************************************/ | ||
| 314 | /****************************************************************************/ | ||
| 315 | |||
| 316 | static int i2c_read1(struct i2c_adapter *adapter, u8 adr, u8 *val) | ||
| 317 | { | ||
| 318 | struct i2c_msg msgs[1] = { {.addr = adr, .flags = I2C_M_RD, | ||
| 319 | .buf = val, .len = 1} | ||
| 320 | }; | ||
| 321 | |||
| 322 | return i2c_transfer(adapter, msgs, 1); | ||
| 323 | } | ||
| 324 | |||
| 325 | static int i2c_write(struct i2c_adapter *adap, u8 adr, u8 *data, int len) | ||
| 326 | { | ||
| 327 | int status; | ||
| 328 | struct i2c_msg msg = { | ||
| 329 | .addr = adr, .flags = 0, .buf = data, .len = len }; | ||
| 330 | |||
| 331 | dprintk(3, ":"); | ||
| 332 | if (debug > 2) { | ||
| 333 | int i; | ||
| 334 | for (i = 0; i < len; i++) | ||
| 335 | printk(KERN_CONT " %02x", data[i]); | ||
| 336 | printk(KERN_CONT "\n"); | ||
| 337 | } | ||
| 338 | status = i2c_transfer(adap, &msg, 1); | ||
| 339 | if (status >= 0 && status != 1) | ||
| 340 | status = -EIO; | ||
| 341 | |||
| 342 | if (status < 0) | ||
| 343 | printk(KERN_ERR "drxk: i2c write error at addr 0x%02x\n", adr); | ||
| 344 | |||
| 345 | return status; | ||
| 346 | } | ||
| 347 | |||
| 348 | static int i2c_read(struct i2c_adapter *adap, | ||
| 349 | u8 adr, u8 *msg, int len, u8 *answ, int alen) | ||
| 350 | { | ||
| 351 | int status; | ||
| 352 | struct i2c_msg msgs[2] = { | ||
| 353 | {.addr = adr, .flags = 0, | ||
| 354 | .buf = msg, .len = len}, | ||
| 355 | {.addr = adr, .flags = I2C_M_RD, | ||
| 356 | .buf = answ, .len = alen} | ||
| 357 | }; | ||
| 358 | |||
| 359 | status = i2c_transfer(adap, msgs, 2); | ||
| 360 | if (status != 2) { | ||
| 361 | if (debug > 2) | ||
| 362 | printk(KERN_CONT ": ERROR!\n"); | ||
| 363 | if (status >= 0) | ||
| 364 | status = -EIO; | ||
| 365 | |||
| 366 | printk(KERN_ERR "drxk: i2c read error at addr 0x%02x\n", adr); | ||
| 367 | return status; | ||
| 368 | } | ||
| 369 | if (debug > 2) { | ||
| 370 | int i; | ||
| 371 | dprintk(2, ": read from "); | ||
| 372 | for (i = 0; i < len; i++) | ||
| 373 | printk(KERN_CONT " %02x", msg[i]); | ||
| 374 | printk(KERN_CONT "Value = "); | ||
| 375 | for (i = 0; i < alen; i++) | ||
| 376 | printk(KERN_CONT " %02x", answ[i]); | ||
| 377 | printk(KERN_CONT "\n"); | ||
| 378 | } | ||
| 379 | return 0; | ||
| 380 | } | ||
| 381 | |||
| 382 | static int read16_flags(struct drxk_state *state, u32 reg, u16 *data, u8 flags) | ||
| 383 | { | ||
| 384 | int status; | ||
| 385 | u8 adr = state->demod_address, mm1[4], mm2[2], len; | ||
| 386 | |||
| 387 | if (state->single_master) | ||
| 388 | flags |= 0xC0; | ||
| 389 | |||
| 390 | if (DRXDAP_FASI_LONG_FORMAT(reg) || (flags != 0)) { | ||
| 391 | mm1[0] = (((reg << 1) & 0xFF) | 0x01); | ||
| 392 | mm1[1] = ((reg >> 16) & 0xFF); | ||
| 393 | mm1[2] = ((reg >> 24) & 0xFF) | flags; | ||
| 394 | mm1[3] = ((reg >> 7) & 0xFF); | ||
| 395 | len = 4; | ||
| 396 | } else { | ||
| 397 | mm1[0] = ((reg << 1) & 0xFF); | ||
| 398 | mm1[1] = (((reg >> 16) & 0x0F) | ((reg >> 18) & 0xF0)); | ||
| 399 | len = 2; | ||
| 400 | } | ||
| 401 | dprintk(2, "(0x%08x, 0x%02x)\n", reg, flags); | ||
| 402 | status = i2c_read(state->i2c, adr, mm1, len, mm2, 2); | ||
| 403 | if (status < 0) | ||
| 404 | return status; | ||
| 405 | if (data) | ||
| 406 | *data = mm2[0] | (mm2[1] << 8); | ||
| 407 | |||
| 408 | return 0; | ||
| 409 | } | ||
| 410 | |||
| 411 | static int read16(struct drxk_state *state, u32 reg, u16 *data) | ||
| 412 | { | ||
| 413 | return read16_flags(state, reg, data, 0); | ||
| 414 | } | ||
| 415 | |||
| 416 | static int read32_flags(struct drxk_state *state, u32 reg, u32 *data, u8 flags) | ||
| 417 | { | ||
| 418 | int status; | ||
| 419 | u8 adr = state->demod_address, mm1[4], mm2[4], len; | ||
| 420 | |||
| 421 | if (state->single_master) | ||
| 422 | flags |= 0xC0; | ||
| 423 | |||
| 424 | if (DRXDAP_FASI_LONG_FORMAT(reg) || (flags != 0)) { | ||
| 425 | mm1[0] = (((reg << 1) & 0xFF) | 0x01); | ||
| 426 | mm1[1] = ((reg >> 16) & 0xFF); | ||
| 427 | mm1[2] = ((reg >> 24) & 0xFF) | flags; | ||
| 428 | mm1[3] = ((reg >> 7) & 0xFF); | ||
| 429 | len = 4; | ||
| 430 | } else { | ||
| 431 | mm1[0] = ((reg << 1) & 0xFF); | ||
| 432 | mm1[1] = (((reg >> 16) & 0x0F) | ((reg >> 18) & 0xF0)); | ||
| 433 | len = 2; | ||
| 434 | } | ||
| 435 | dprintk(2, "(0x%08x, 0x%02x)\n", reg, flags); | ||
| 436 | status = i2c_read(state->i2c, adr, mm1, len, mm2, 4); | ||
| 437 | if (status < 0) | ||
| 438 | return status; | ||
| 439 | if (data) | ||
| 440 | *data = mm2[0] | (mm2[1] << 8) | | ||
| 441 | (mm2[2] << 16) | (mm2[3] << 24); | ||
| 442 | |||
| 443 | return 0; | ||
| 444 | } | ||
| 445 | |||
| 446 | static int read32(struct drxk_state *state, u32 reg, u32 *data) | ||
| 447 | { | ||
| 448 | return read32_flags(state, reg, data, 0); | ||
| 449 | } | ||
| 450 | |||
| 451 | static int write16_flags(struct drxk_state *state, u32 reg, u16 data, u8 flags) | ||
| 452 | { | ||
| 453 | u8 adr = state->demod_address, mm[6], len; | ||
| 454 | |||
| 455 | if (state->single_master) | ||
| 456 | flags |= 0xC0; | ||
| 457 | if (DRXDAP_FASI_LONG_FORMAT(reg) || (flags != 0)) { | ||
| 458 | mm[0] = (((reg << 1) & 0xFF) | 0x01); | ||
| 459 | mm[1] = ((reg >> 16) & 0xFF); | ||
| 460 | mm[2] = ((reg >> 24) & 0xFF) | flags; | ||
| 461 | mm[3] = ((reg >> 7) & 0xFF); | ||
| 462 | len = 4; | ||
| 463 | } else { | ||
| 464 | mm[0] = ((reg << 1) & 0xFF); | ||
| 465 | mm[1] = (((reg >> 16) & 0x0F) | ((reg >> 18) & 0xF0)); | ||
| 466 | len = 2; | ||
| 467 | } | ||
| 468 | mm[len] = data & 0xff; | ||
| 469 | mm[len + 1] = (data >> 8) & 0xff; | ||
| 470 | |||
| 471 | dprintk(2, "(0x%08x, 0x%04x, 0x%02x)\n", reg, data, flags); | ||
| 472 | return i2c_write(state->i2c, adr, mm, len + 2); | ||
| 473 | } | ||
| 474 | |||
| 475 | static int write16(struct drxk_state *state, u32 reg, u16 data) | ||
| 476 | { | ||
| 477 | return write16_flags(state, reg, data, 0); | ||
| 478 | } | ||
| 479 | |||
| 480 | static int write32_flags(struct drxk_state *state, u32 reg, u32 data, u8 flags) | ||
| 481 | { | ||
| 482 | u8 adr = state->demod_address, mm[8], len; | ||
| 483 | |||
| 484 | if (state->single_master) | ||
| 485 | flags |= 0xC0; | ||
| 486 | if (DRXDAP_FASI_LONG_FORMAT(reg) || (flags != 0)) { | ||
| 487 | mm[0] = (((reg << 1) & 0xFF) | 0x01); | ||
| 488 | mm[1] = ((reg >> 16) & 0xFF); | ||
| 489 | mm[2] = ((reg >> 24) & 0xFF) | flags; | ||
| 490 | mm[3] = ((reg >> 7) & 0xFF); | ||
| 491 | len = 4; | ||
| 492 | } else { | ||
| 493 | mm[0] = ((reg << 1) & 0xFF); | ||
| 494 | mm[1] = (((reg >> 16) & 0x0F) | ((reg >> 18) & 0xF0)); | ||
| 495 | len = 2; | ||
| 496 | } | ||
| 497 | mm[len] = data & 0xff; | ||
| 498 | mm[len + 1] = (data >> 8) & 0xff; | ||
| 499 | mm[len + 2] = (data >> 16) & 0xff; | ||
| 500 | mm[len + 3] = (data >> 24) & 0xff; | ||
| 501 | dprintk(2, "(0x%08x, 0x%08x, 0x%02x)\n", reg, data, flags); | ||
| 502 | |||
| 503 | return i2c_write(state->i2c, adr, mm, len + 4); | ||
| 504 | } | ||
| 505 | |||
| 506 | static int write32(struct drxk_state *state, u32 reg, u32 data) | ||
| 507 | { | ||
| 508 | return write32_flags(state, reg, data, 0); | ||
| 509 | } | ||
| 510 | |||
| 511 | static int write_block(struct drxk_state *state, u32 Address, | ||
| 512 | const int BlockSize, const u8 pBlock[]) | ||
| 513 | { | ||
| 514 | int status = 0, BlkSize = BlockSize; | ||
| 515 | u8 Flags = 0; | ||
| 516 | |||
| 517 | if (state->single_master) | ||
| 518 | Flags |= 0xC0; | ||
| 519 | |||
| 520 | while (BlkSize > 0) { | ||
| 521 | int Chunk = BlkSize > state->m_ChunkSize ? | ||
| 522 | state->m_ChunkSize : BlkSize; | ||
| 523 | u8 *AdrBuf = &state->Chunk[0]; | ||
| 524 | u32 AdrLength = 0; | ||
| 525 | |||
| 526 | if (DRXDAP_FASI_LONG_FORMAT(Address) || (Flags != 0)) { | ||
| 527 | AdrBuf[0] = (((Address << 1) & 0xFF) | 0x01); | ||
| 528 | AdrBuf[1] = ((Address >> 16) & 0xFF); | ||
| 529 | AdrBuf[2] = ((Address >> 24) & 0xFF); | ||
| 530 | AdrBuf[3] = ((Address >> 7) & 0xFF); | ||
| 531 | AdrBuf[2] |= Flags; | ||
| 532 | AdrLength = 4; | ||
| 533 | if (Chunk == state->m_ChunkSize) | ||
| 534 | Chunk -= 2; | ||
| 535 | } else { | ||
| 536 | AdrBuf[0] = ((Address << 1) & 0xFF); | ||
| 537 | AdrBuf[1] = (((Address >> 16) & 0x0F) | | ||
| 538 | ((Address >> 18) & 0xF0)); | ||
| 539 | AdrLength = 2; | ||
| 540 | } | ||
| 541 | memcpy(&state->Chunk[AdrLength], pBlock, Chunk); | ||
| 542 | dprintk(2, "(0x%08x, 0x%02x)\n", Address, Flags); | ||
| 543 | if (debug > 1) { | ||
| 544 | int i; | ||
| 545 | if (pBlock) | ||
| 546 | for (i = 0; i < Chunk; i++) | ||
| 547 | printk(KERN_CONT " %02x", pBlock[i]); | ||
| 548 | printk(KERN_CONT "\n"); | ||
| 549 | } | ||
| 550 | status = i2c_write(state->i2c, state->demod_address, | ||
| 551 | &state->Chunk[0], Chunk + AdrLength); | ||
| 552 | if (status < 0) { | ||
| 553 | printk(KERN_ERR "drxk: %s: i2c write error at addr 0x%02x\n", | ||
| 554 | __func__, Address); | ||
| 555 | break; | ||
| 556 | } | ||
| 557 | pBlock += Chunk; | ||
| 558 | Address += (Chunk >> 1); | ||
| 559 | BlkSize -= Chunk; | ||
| 560 | } | ||
| 561 | return status; | ||
| 562 | } | ||
| 563 | |||
| 564 | #ifndef DRXK_MAX_RETRIES_POWERUP | ||
| 565 | #define DRXK_MAX_RETRIES_POWERUP 20 | ||
| 566 | #endif | ||
| 567 | |||
| 568 | int PowerUpDevice(struct drxk_state *state) | ||
| 569 | { | ||
| 570 | int status; | ||
| 571 | u8 data = 0; | ||
| 572 | u16 retryCount = 0; | ||
| 573 | |||
| 574 | dprintk(1, "\n"); | ||
| 575 | |||
| 576 | status = i2c_read1(state->i2c, state->demod_address, &data); | ||
| 577 | if (status < 0) { | ||
| 578 | do { | ||
| 579 | data = 0; | ||
| 580 | status = i2c_write(state->i2c, state->demod_address, | ||
| 581 | &data, 1); | ||
| 582 | msleep(10); | ||
| 583 | retryCount++; | ||
| 584 | if (status < 0) | ||
| 585 | continue; | ||
| 586 | status = i2c_read1(state->i2c, state->demod_address, | ||
| 587 | &data); | ||
| 588 | } while (status < 0 && | ||
| 589 | (retryCount < DRXK_MAX_RETRIES_POWERUP)); | ||
| 590 | if (status < 0 && retryCount >= DRXK_MAX_RETRIES_POWERUP) | ||
| 591 | goto error; | ||
| 592 | } | ||
| 593 | |||
| 594 | /* Make sure all clk domains are active */ | ||
| 595 | status = write16(state, SIO_CC_PWD_MODE__A, SIO_CC_PWD_MODE_LEVEL_NONE); | ||
| 596 | if (status < 0) | ||
| 597 | goto error; | ||
| 598 | status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY); | ||
| 599 | if (status < 0) | ||
| 600 | goto error; | ||
| 601 | /* Enable pll lock tests */ | ||
| 602 | status = write16(state, SIO_CC_PLL_LOCK__A, 1); | ||
| 603 | if (status < 0) | ||
| 604 | goto error; | ||
| 605 | |||
| 606 | state->m_currentPowerMode = DRX_POWER_UP; | ||
| 607 | |||
| 608 | error: | ||
| 609 | if (status < 0) | ||
| 610 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 611 | |||
| 612 | return status; | ||
| 613 | } | ||
| 614 | |||
| 615 | |||
| 616 | static int init_state(struct drxk_state *state) | ||
| 617 | { | ||
| 618 | /* | ||
| 619 | * FIXME: most (all?) of the values bellow should be moved into | ||
| 620 | * struct drxk_config, as they are probably board-specific | ||
| 621 | */ | ||
| 622 | u32 ulVSBIfAgcMode = DRXK_AGC_CTRL_AUTO; | ||
| 623 | u32 ulVSBIfAgcOutputLevel = 0; | ||
| 624 | u32 ulVSBIfAgcMinLevel = 0; | ||
| 625 | u32 ulVSBIfAgcMaxLevel = 0x7FFF; | ||
| 626 | u32 ulVSBIfAgcSpeed = 3; | ||
| 627 | |||
| 628 | u32 ulVSBRfAgcMode = DRXK_AGC_CTRL_AUTO; | ||
| 629 | u32 ulVSBRfAgcOutputLevel = 0; | ||
| 630 | u32 ulVSBRfAgcMinLevel = 0; | ||
| 631 | u32 ulVSBRfAgcMaxLevel = 0x7FFF; | ||
| 632 | u32 ulVSBRfAgcSpeed = 3; | ||
| 633 | u32 ulVSBRfAgcTop = 9500; | ||
| 634 | u32 ulVSBRfAgcCutOffCurrent = 4000; | ||
| 635 | |||
| 636 | u32 ulATVIfAgcMode = DRXK_AGC_CTRL_AUTO; | ||
| 637 | u32 ulATVIfAgcOutputLevel = 0; | ||
| 638 | u32 ulATVIfAgcMinLevel = 0; | ||
| 639 | u32 ulATVIfAgcMaxLevel = 0; | ||
| 640 | u32 ulATVIfAgcSpeed = 3; | ||
| 641 | |||
| 642 | u32 ulATVRfAgcMode = DRXK_AGC_CTRL_OFF; | ||
| 643 | u32 ulATVRfAgcOutputLevel = 0; | ||
| 644 | u32 ulATVRfAgcMinLevel = 0; | ||
| 645 | u32 ulATVRfAgcMaxLevel = 0; | ||
| 646 | u32 ulATVRfAgcTop = 9500; | ||
| 647 | u32 ulATVRfAgcCutOffCurrent = 4000; | ||
| 648 | u32 ulATVRfAgcSpeed = 3; | ||
| 649 | |||
| 650 | u32 ulQual83 = DEFAULT_MER_83; | ||
| 651 | u32 ulQual93 = DEFAULT_MER_93; | ||
| 652 | |||
| 653 | u32 ulDVBTStaticTSClock = 1; | ||
| 654 | u32 ulDVBCStaticTSClock = 1; | ||
| 655 | |||
| 656 | u32 ulMpegLockTimeOut = DEFAULT_DRXK_MPEG_LOCK_TIMEOUT; | ||
| 657 | u32 ulDemodLockTimeOut = DEFAULT_DRXK_DEMOD_LOCK_TIMEOUT; | ||
| 658 | |||
| 659 | /* io_pad_cfg register (8 bit reg.) MSB bit is 1 (default value) */ | ||
| 660 | /* io_pad_cfg_mode output mode is drive always */ | ||
| 661 | /* io_pad_cfg_drive is set to power 2 (23 mA) */ | ||
| 662 | u32 ulGPIOCfg = 0x0113; | ||
| 663 | u32 ulSerialMode = 1; | ||
| 664 | u32 ulInvertTSClock = 0; | ||
| 665 | u32 ulTSDataStrength = DRXK_MPEG_SERIAL_OUTPUT_PIN_DRIVE_STRENGTH; | ||
| 666 | u32 ulTSClockkStrength = DRXK_MPEG_OUTPUT_CLK_DRIVE_STRENGTH; | ||
| 667 | u32 ulDVBTBitrate = 50000000; | ||
| 668 | u32 ulDVBCBitrate = DRXK_QAM_SYMBOLRATE_MAX * 8; | ||
| 669 | |||
| 670 | u32 ulInsertRSByte = 0; | ||
| 671 | |||
| 672 | u32 ulRfMirror = 1; | ||
| 673 | u32 ulPowerDown = 0; | ||
| 674 | |||
| 675 | dprintk(1, "\n"); | ||
| 676 | |||
| 677 | state->m_hasLNA = false; | ||
| 678 | state->m_hasDVBT = false; | ||
| 679 | state->m_hasDVBC = false; | ||
| 680 | state->m_hasATV = false; | ||
| 681 | state->m_hasOOB = false; | ||
| 682 | state->m_hasAudio = false; | ||
| 683 | |||
| 684 | state->m_ChunkSize = 124; | ||
| 685 | |||
| 686 | state->m_oscClockFreq = 0; | ||
| 687 | state->m_smartAntInverted = false; | ||
| 688 | state->m_bPDownOpenBridge = false; | ||
| 689 | |||
| 690 | /* real system clock frequency in kHz */ | ||
| 691 | state->m_sysClockFreq = 151875; | ||
| 692 | /* Timing div, 250ns/Psys */ | ||
| 693 | /* Timing div, = (delay (nano seconds) * sysclk (kHz))/ 1000 */ | ||
| 694 | state->m_HICfgTimingDiv = ((state->m_sysClockFreq / 1000) * | ||
| 695 | HI_I2C_DELAY) / 1000; | ||
| 696 | /* Clipping */ | ||
| 697 | if (state->m_HICfgTimingDiv > SIO_HI_RA_RAM_PAR_2_CFG_DIV__M) | ||
| 698 | state->m_HICfgTimingDiv = SIO_HI_RA_RAM_PAR_2_CFG_DIV__M; | ||
| 699 | state->m_HICfgWakeUpKey = (state->demod_address << 1); | ||
| 700 | /* port/bridge/power down ctrl */ | ||
| 701 | state->m_HICfgCtrl = SIO_HI_RA_RAM_PAR_5_CFG_SLV0_SLAVE; | ||
| 702 | |||
| 703 | state->m_bPowerDown = (ulPowerDown != 0); | ||
| 704 | |||
| 705 | state->m_DRXK_A1_PATCH_CODE = false; | ||
| 706 | state->m_DRXK_A1_ROM_CODE = false; | ||
| 707 | state->m_DRXK_A2_ROM_CODE = false; | ||
| 708 | state->m_DRXK_A3_ROM_CODE = false; | ||
| 709 | state->m_DRXK_A2_PATCH_CODE = false; | ||
| 710 | state->m_DRXK_A3_PATCH_CODE = false; | ||
| 711 | |||
| 712 | /* Init AGC and PGA parameters */ | ||
| 713 | /* VSB IF */ | ||
| 714 | state->m_vsbIfAgcCfg.ctrlMode = (ulVSBIfAgcMode); | ||
| 715 | state->m_vsbIfAgcCfg.outputLevel = (ulVSBIfAgcOutputLevel); | ||
| 716 | state->m_vsbIfAgcCfg.minOutputLevel = (ulVSBIfAgcMinLevel); | ||
| 717 | state->m_vsbIfAgcCfg.maxOutputLevel = (ulVSBIfAgcMaxLevel); | ||
| 718 | state->m_vsbIfAgcCfg.speed = (ulVSBIfAgcSpeed); | ||
| 719 | state->m_vsbPgaCfg = 140; | ||
| 720 | |||
| 721 | /* VSB RF */ | ||
| 722 | state->m_vsbRfAgcCfg.ctrlMode = (ulVSBRfAgcMode); | ||
| 723 | state->m_vsbRfAgcCfg.outputLevel = (ulVSBRfAgcOutputLevel); | ||
| 724 | state->m_vsbRfAgcCfg.minOutputLevel = (ulVSBRfAgcMinLevel); | ||
| 725 | state->m_vsbRfAgcCfg.maxOutputLevel = (ulVSBRfAgcMaxLevel); | ||
| 726 | state->m_vsbRfAgcCfg.speed = (ulVSBRfAgcSpeed); | ||
| 727 | state->m_vsbRfAgcCfg.top = (ulVSBRfAgcTop); | ||
| 728 | state->m_vsbRfAgcCfg.cutOffCurrent = (ulVSBRfAgcCutOffCurrent); | ||
| 729 | state->m_vsbPreSawCfg.reference = 0x07; | ||
| 730 | state->m_vsbPreSawCfg.usePreSaw = true; | ||
| 731 | |||
| 732 | state->m_Quality83percent = DEFAULT_MER_83; | ||
| 733 | state->m_Quality93percent = DEFAULT_MER_93; | ||
| 734 | if (ulQual93 <= 500 && ulQual83 < ulQual93) { | ||
| 735 | state->m_Quality83percent = ulQual83; | ||
| 736 | state->m_Quality93percent = ulQual93; | ||
| 737 | } | ||
| 738 | |||
| 739 | /* ATV IF */ | ||
| 740 | state->m_atvIfAgcCfg.ctrlMode = (ulATVIfAgcMode); | ||
| 741 | state->m_atvIfAgcCfg.outputLevel = (ulATVIfAgcOutputLevel); | ||
| 742 | state->m_atvIfAgcCfg.minOutputLevel = (ulATVIfAgcMinLevel); | ||
| 743 | state->m_atvIfAgcCfg.maxOutputLevel = (ulATVIfAgcMaxLevel); | ||
| 744 | state->m_atvIfAgcCfg.speed = (ulATVIfAgcSpeed); | ||
| 745 | |||
| 746 | /* ATV RF */ | ||
| 747 | state->m_atvRfAgcCfg.ctrlMode = (ulATVRfAgcMode); | ||
| 748 | state->m_atvRfAgcCfg.outputLevel = (ulATVRfAgcOutputLevel); | ||
| 749 | state->m_atvRfAgcCfg.minOutputLevel = (ulATVRfAgcMinLevel); | ||
| 750 | state->m_atvRfAgcCfg.maxOutputLevel = (ulATVRfAgcMaxLevel); | ||
| 751 | state->m_atvRfAgcCfg.speed = (ulATVRfAgcSpeed); | ||
| 752 | state->m_atvRfAgcCfg.top = (ulATVRfAgcTop); | ||
| 753 | state->m_atvRfAgcCfg.cutOffCurrent = (ulATVRfAgcCutOffCurrent); | ||
| 754 | state->m_atvPreSawCfg.reference = 0x04; | ||
| 755 | state->m_atvPreSawCfg.usePreSaw = true; | ||
| 756 | |||
| 757 | |||
| 758 | /* DVBT RF */ | ||
| 759 | state->m_dvbtRfAgcCfg.ctrlMode = DRXK_AGC_CTRL_OFF; | ||
| 760 | state->m_dvbtRfAgcCfg.outputLevel = 0; | ||
| 761 | state->m_dvbtRfAgcCfg.minOutputLevel = 0; | ||
| 762 | state->m_dvbtRfAgcCfg.maxOutputLevel = 0xFFFF; | ||
| 763 | state->m_dvbtRfAgcCfg.top = 0x2100; | ||
| 764 | state->m_dvbtRfAgcCfg.cutOffCurrent = 4000; | ||
| 765 | state->m_dvbtRfAgcCfg.speed = 1; | ||
| 766 | |||
| 767 | |||
| 768 | /* DVBT IF */ | ||
| 769 | state->m_dvbtIfAgcCfg.ctrlMode = DRXK_AGC_CTRL_AUTO; | ||
| 770 | state->m_dvbtIfAgcCfg.outputLevel = 0; | ||
| 771 | state->m_dvbtIfAgcCfg.minOutputLevel = 0; | ||
| 772 | state->m_dvbtIfAgcCfg.maxOutputLevel = 9000; | ||
| 773 | state->m_dvbtIfAgcCfg.top = 13424; | ||
| 774 | state->m_dvbtIfAgcCfg.cutOffCurrent = 0; | ||
| 775 | state->m_dvbtIfAgcCfg.speed = 3; | ||
| 776 | state->m_dvbtIfAgcCfg.FastClipCtrlDelay = 30; | ||
| 777 | state->m_dvbtIfAgcCfg.IngainTgtMax = 30000; | ||
| 778 | /* state->m_dvbtPgaCfg = 140; */ | ||
| 779 | |||
| 780 | state->m_dvbtPreSawCfg.reference = 4; | ||
| 781 | state->m_dvbtPreSawCfg.usePreSaw = false; | ||
| 782 | |||
| 783 | /* QAM RF */ | ||
| 784 | state->m_qamRfAgcCfg.ctrlMode = DRXK_AGC_CTRL_OFF; | ||
| 785 | state->m_qamRfAgcCfg.outputLevel = 0; | ||
| 786 | state->m_qamRfAgcCfg.minOutputLevel = 6023; | ||
| 787 | state->m_qamRfAgcCfg.maxOutputLevel = 27000; | ||
| 788 | state->m_qamRfAgcCfg.top = 0x2380; | ||
| 789 | state->m_qamRfAgcCfg.cutOffCurrent = 4000; | ||
| 790 | state->m_qamRfAgcCfg.speed = 3; | ||
| 791 | |||
| 792 | /* QAM IF */ | ||
| 793 | state->m_qamIfAgcCfg.ctrlMode = DRXK_AGC_CTRL_AUTO; | ||
| 794 | state->m_qamIfAgcCfg.outputLevel = 0; | ||
| 795 | state->m_qamIfAgcCfg.minOutputLevel = 0; | ||
| 796 | state->m_qamIfAgcCfg.maxOutputLevel = 9000; | ||
| 797 | state->m_qamIfAgcCfg.top = 0x0511; | ||
| 798 | state->m_qamIfAgcCfg.cutOffCurrent = 0; | ||
| 799 | state->m_qamIfAgcCfg.speed = 3; | ||
| 800 | state->m_qamIfAgcCfg.IngainTgtMax = 5119; | ||
| 801 | state->m_qamIfAgcCfg.FastClipCtrlDelay = 50; | ||
| 802 | |||
| 803 | state->m_qamPgaCfg = 140; | ||
| 804 | state->m_qamPreSawCfg.reference = 4; | ||
| 805 | state->m_qamPreSawCfg.usePreSaw = false; | ||
| 806 | |||
| 807 | state->m_OperationMode = OM_NONE; | ||
| 808 | state->m_DrxkState = DRXK_UNINITIALIZED; | ||
| 809 | |||
| 810 | /* MPEG output configuration */ | ||
| 811 | state->m_enableMPEGOutput = true; /* If TRUE; enable MPEG ouput */ | ||
| 812 | state->m_insertRSByte = false; /* If TRUE; insert RS byte */ | ||
| 813 | state->m_enableParallel = true; /* If TRUE; | ||
| 814 | parallel out otherwise serial */ | ||
| 815 | state->m_invertDATA = false; /* If TRUE; invert DATA signals */ | ||
| 816 | state->m_invertERR = false; /* If TRUE; invert ERR signal */ | ||
| 817 | state->m_invertSTR = false; /* If TRUE; invert STR signals */ | ||
| 818 | state->m_invertVAL = false; /* If TRUE; invert VAL signals */ | ||
| 819 | state->m_invertCLK = (ulInvertTSClock != 0); /* If TRUE; invert CLK signals */ | ||
| 820 | state->m_DVBTStaticCLK = (ulDVBTStaticTSClock != 0); | ||
| 821 | state->m_DVBCStaticCLK = (ulDVBCStaticTSClock != 0); | ||
| 822 | /* If TRUE; static MPEG clockrate will be used; | ||
| 823 | otherwise clockrate will adapt to the bitrate of the TS */ | ||
| 824 | |||
| 825 | state->m_DVBTBitrate = ulDVBTBitrate; | ||
| 826 | state->m_DVBCBitrate = ulDVBCBitrate; | ||
| 827 | |||
| 828 | state->m_TSDataStrength = (ulTSDataStrength & 0x07); | ||
| 829 | state->m_TSClockkStrength = (ulTSClockkStrength & 0x07); | ||
| 830 | |||
| 831 | /* Maximum bitrate in b/s in case static clockrate is selected */ | ||
| 832 | state->m_mpegTsStaticBitrate = 19392658; | ||
| 833 | state->m_disableTEIhandling = false; | ||
| 834 | |||
| 835 | if (ulInsertRSByte) | ||
| 836 | state->m_insertRSByte = true; | ||
| 837 | |||
| 838 | state->m_MpegLockTimeOut = DEFAULT_DRXK_MPEG_LOCK_TIMEOUT; | ||
| 839 | if (ulMpegLockTimeOut < 10000) | ||
| 840 | state->m_MpegLockTimeOut = ulMpegLockTimeOut; | ||
| 841 | state->m_DemodLockTimeOut = DEFAULT_DRXK_DEMOD_LOCK_TIMEOUT; | ||
| 842 | if (ulDemodLockTimeOut < 10000) | ||
| 843 | state->m_DemodLockTimeOut = ulDemodLockTimeOut; | ||
| 844 | |||
| 845 | /* QAM defaults */ | ||
| 846 | state->m_Constellation = DRX_CONSTELLATION_AUTO; | ||
| 847 | state->m_qamInterleaveMode = DRXK_QAM_I12_J17; | ||
| 848 | state->m_fecRsPlen = 204 * 8; /* fecRsPlen annex A */ | ||
| 849 | state->m_fecRsPrescale = 1; | ||
| 850 | |||
| 851 | state->m_sqiSpeed = DRXK_DVBT_SQI_SPEED_MEDIUM; | ||
| 852 | state->m_agcFastClipCtrlDelay = 0; | ||
| 853 | |||
| 854 | state->m_GPIOCfg = (ulGPIOCfg); | ||
| 855 | |||
| 856 | state->m_bPowerDown = false; | ||
| 857 | state->m_currentPowerMode = DRX_POWER_DOWN; | ||
| 858 | |||
| 859 | state->m_enableParallel = (ulSerialMode == 0); | ||
| 860 | |||
| 861 | state->m_rfmirror = (ulRfMirror == 0); | ||
| 862 | state->m_IfAgcPol = false; | ||
| 863 | return 0; | ||
| 864 | } | ||
| 865 | |||
| 866 | static int DRXX_Open(struct drxk_state *state) | ||
| 867 | { | ||
| 868 | int status = 0; | ||
| 869 | u32 jtag = 0; | ||
| 870 | u16 bid = 0; | ||
| 871 | u16 key = 0; | ||
| 872 | |||
| 873 | dprintk(1, "\n"); | ||
| 874 | /* stop lock indicator process */ | ||
| 875 | status = write16(state, SCU_RAM_GPIO__A, SCU_RAM_GPIO_HW_LOCK_IND_DISABLE); | ||
| 876 | if (status < 0) | ||
| 877 | goto error; | ||
| 878 | /* Check device id */ | ||
| 879 | status = read16(state, SIO_TOP_COMM_KEY__A, &key); | ||
| 880 | if (status < 0) | ||
| 881 | goto error; | ||
| 882 | status = write16(state, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY); | ||
| 883 | if (status < 0) | ||
| 884 | goto error; | ||
| 885 | status = read32(state, SIO_TOP_JTAGID_LO__A, &jtag); | ||
| 886 | if (status < 0) | ||
| 887 | goto error; | ||
| 888 | status = read16(state, SIO_PDR_UIO_IN_HI__A, &bid); | ||
| 889 | if (status < 0) | ||
| 890 | goto error; | ||
| 891 | status = write16(state, SIO_TOP_COMM_KEY__A, key); | ||
| 892 | error: | ||
| 893 | if (status < 0) | ||
| 894 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 895 | return status; | ||
| 896 | } | ||
| 897 | |||
| 898 | static int GetDeviceCapabilities(struct drxk_state *state) | ||
| 899 | { | ||
| 900 | u16 sioPdrOhwCfg = 0; | ||
| 901 | u32 sioTopJtagidLo = 0; | ||
| 902 | int status; | ||
| 903 | const char *spin = ""; | ||
| 904 | |||
| 905 | dprintk(1, "\n"); | ||
| 906 | |||
| 907 | /* driver 0.9.0 */ | ||
| 908 | /* stop lock indicator process */ | ||
| 909 | status = write16(state, SCU_RAM_GPIO__A, SCU_RAM_GPIO_HW_LOCK_IND_DISABLE); | ||
| 910 | if (status < 0) | ||
| 911 | goto error; | ||
| 912 | status = write16(state, SIO_TOP_COMM_KEY__A, 0xFABA); | ||
| 913 | if (status < 0) | ||
| 914 | goto error; | ||
| 915 | status = read16(state, SIO_PDR_OHW_CFG__A, &sioPdrOhwCfg); | ||
| 916 | if (status < 0) | ||
| 917 | goto error; | ||
| 918 | status = write16(state, SIO_TOP_COMM_KEY__A, 0x0000); | ||
| 919 | if (status < 0) | ||
| 920 | goto error; | ||
| 921 | |||
| 922 | switch ((sioPdrOhwCfg & SIO_PDR_OHW_CFG_FREF_SEL__M)) { | ||
| 923 | case 0: | ||
| 924 | /* ignore (bypass ?) */ | ||
| 925 | break; | ||
| 926 | case 1: | ||
| 927 | /* 27 MHz */ | ||
| 928 | state->m_oscClockFreq = 27000; | ||
| 929 | break; | ||
| 930 | case 2: | ||
| 931 | /* 20.25 MHz */ | ||
| 932 | state->m_oscClockFreq = 20250; | ||
| 933 | break; | ||
| 934 | case 3: | ||
| 935 | /* 4 MHz */ | ||
| 936 | state->m_oscClockFreq = 20250; | ||
| 937 | break; | ||
| 938 | default: | ||
| 939 | printk(KERN_ERR "drxk: Clock Frequency is unkonwn\n"); | ||
| 940 | return -EINVAL; | ||
| 941 | } | ||
| 942 | /* | ||
| 943 | Determine device capabilities | ||
| 944 | Based on pinning v14 | ||
| 945 | */ | ||
| 946 | status = read32(state, SIO_TOP_JTAGID_LO__A, &sioTopJtagidLo); | ||
| 947 | if (status < 0) | ||
| 948 | goto error; | ||
| 949 | /* driver 0.9.0 */ | ||
| 950 | switch ((sioTopJtagidLo >> 29) & 0xF) { | ||
| 951 | case 0: | ||
| 952 | state->m_deviceSpin = DRXK_SPIN_A1; | ||
| 953 | spin = "A1"; | ||
| 954 | break; | ||
| 955 | case 2: | ||
| 956 | state->m_deviceSpin = DRXK_SPIN_A2; | ||
| 957 | spin = "A2"; | ||
| 958 | break; | ||
| 959 | case 3: | ||
| 960 | state->m_deviceSpin = DRXK_SPIN_A3; | ||
| 961 | spin = "A3"; | ||
| 962 | break; | ||
| 963 | default: | ||
| 964 | state->m_deviceSpin = DRXK_SPIN_UNKNOWN; | ||
| 965 | status = -EINVAL; | ||
| 966 | printk(KERN_ERR "drxk: Spin unknown\n"); | ||
| 967 | goto error2; | ||
| 968 | } | ||
| 969 | switch ((sioTopJtagidLo >> 12) & 0xFF) { | ||
| 970 | case 0x13: | ||
| 971 | /* typeId = DRX3913K_TYPE_ID */ | ||
| 972 | state->m_hasLNA = false; | ||
| 973 | state->m_hasOOB = false; | ||
| 974 | state->m_hasATV = false; | ||
| 975 | state->m_hasAudio = false; | ||
| 976 | state->m_hasDVBT = true; | ||
| 977 | state->m_hasDVBC = true; | ||
| 978 | state->m_hasSAWSW = true; | ||
| 979 | state->m_hasGPIO2 = false; | ||
| 980 | state->m_hasGPIO1 = false; | ||
| 981 | state->m_hasIRQN = false; | ||
| 982 | break; | ||
| 983 | case 0x15: | ||
| 984 | /* typeId = DRX3915K_TYPE_ID */ | ||
| 985 | state->m_hasLNA = false; | ||
| 986 | state->m_hasOOB = false; | ||
| 987 | state->m_hasATV = true; | ||
| 988 | state->m_hasAudio = false; | ||
| 989 | state->m_hasDVBT = true; | ||
| 990 | state->m_hasDVBC = false; | ||
| 991 | state->m_hasSAWSW = true; | ||
| 992 | state->m_hasGPIO2 = true; | ||
| 993 | state->m_hasGPIO1 = true; | ||
| 994 | state->m_hasIRQN = false; | ||
| 995 | break; | ||
| 996 | case 0x16: | ||
| 997 | /* typeId = DRX3916K_TYPE_ID */ | ||
| 998 | state->m_hasLNA = false; | ||
| 999 | state->m_hasOOB = false; | ||
| 1000 | state->m_hasATV = true; | ||
| 1001 | state->m_hasAudio = false; | ||
| 1002 | state->m_hasDVBT = true; | ||
| 1003 | state->m_hasDVBC = false; | ||
| 1004 | state->m_hasSAWSW = true; | ||
| 1005 | state->m_hasGPIO2 = true; | ||
| 1006 | state->m_hasGPIO1 = true; | ||
| 1007 | state->m_hasIRQN = false; | ||
| 1008 | break; | ||
| 1009 | case 0x18: | ||
| 1010 | /* typeId = DRX3918K_TYPE_ID */ | ||
| 1011 | state->m_hasLNA = false; | ||
| 1012 | state->m_hasOOB = false; | ||
| 1013 | state->m_hasATV = true; | ||
| 1014 | state->m_hasAudio = true; | ||
| 1015 | state->m_hasDVBT = true; | ||
| 1016 | state->m_hasDVBC = false; | ||
| 1017 | state->m_hasSAWSW = true; | ||
| 1018 | state->m_hasGPIO2 = true; | ||
| 1019 | state->m_hasGPIO1 = true; | ||
| 1020 | state->m_hasIRQN = false; | ||
| 1021 | break; | ||
| 1022 | case 0x21: | ||
| 1023 | /* typeId = DRX3921K_TYPE_ID */ | ||
| 1024 | state->m_hasLNA = false; | ||
| 1025 | state->m_hasOOB = false; | ||
| 1026 | state->m_hasATV = true; | ||
| 1027 | state->m_hasAudio = true; | ||
| 1028 | state->m_hasDVBT = true; | ||
| 1029 | state->m_hasDVBC = true; | ||
| 1030 | state->m_hasSAWSW = true; | ||
| 1031 | state->m_hasGPIO2 = true; | ||
| 1032 | state->m_hasGPIO1 = true; | ||
| 1033 | state->m_hasIRQN = false; | ||
| 1034 | break; | ||
| 1035 | case 0x23: | ||
| 1036 | /* typeId = DRX3923K_TYPE_ID */ | ||
| 1037 | state->m_hasLNA = false; | ||
| 1038 | state->m_hasOOB = false; | ||
| 1039 | state->m_hasATV = true; | ||
| 1040 | state->m_hasAudio = true; | ||
| 1041 | state->m_hasDVBT = true; | ||
| 1042 | state->m_hasDVBC = true; | ||
| 1043 | state->m_hasSAWSW = true; | ||
| 1044 | state->m_hasGPIO2 = true; | ||
| 1045 | state->m_hasGPIO1 = true; | ||
| 1046 | state->m_hasIRQN = false; | ||
| 1047 | break; | ||
| 1048 | case 0x25: | ||
| 1049 | /* typeId = DRX3925K_TYPE_ID */ | ||
| 1050 | state->m_hasLNA = false; | ||
| 1051 | state->m_hasOOB = false; | ||
| 1052 | state->m_hasATV = true; | ||
| 1053 | state->m_hasAudio = true; | ||
| 1054 | state->m_hasDVBT = true; | ||
| 1055 | state->m_hasDVBC = true; | ||
| 1056 | state->m_hasSAWSW = true; | ||
| 1057 | state->m_hasGPIO2 = true; | ||
| 1058 | state->m_hasGPIO1 = true; | ||
| 1059 | state->m_hasIRQN = false; | ||
| 1060 | break; | ||
| 1061 | case 0x26: | ||
| 1062 | /* typeId = DRX3926K_TYPE_ID */ | ||
| 1063 | state->m_hasLNA = false; | ||
| 1064 | state->m_hasOOB = false; | ||
| 1065 | state->m_hasATV = true; | ||
| 1066 | state->m_hasAudio = false; | ||
| 1067 | state->m_hasDVBT = true; | ||
| 1068 | state->m_hasDVBC = true; | ||
| 1069 | state->m_hasSAWSW = true; | ||
| 1070 | state->m_hasGPIO2 = true; | ||
| 1071 | state->m_hasGPIO1 = true; | ||
| 1072 | state->m_hasIRQN = false; | ||
| 1073 | break; | ||
| 1074 | default: | ||
| 1075 | printk(KERN_ERR "drxk: DeviceID 0x%02x not supported\n", | ||
| 1076 | ((sioTopJtagidLo >> 12) & 0xFF)); | ||
| 1077 | status = -EINVAL; | ||
| 1078 | goto error2; | ||
| 1079 | } | ||
| 1080 | |||
| 1081 | printk(KERN_INFO | ||
| 1082 | "drxk: detected a drx-39%02xk, spin %s, xtal %d.%03d MHz\n", | ||
| 1083 | ((sioTopJtagidLo >> 12) & 0xFF), spin, | ||
| 1084 | state->m_oscClockFreq / 1000, | ||
| 1085 | state->m_oscClockFreq % 1000); | ||
| 1086 | |||
| 1087 | error: | ||
| 1088 | if (status < 0) | ||
| 1089 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 1090 | |||
| 1091 | error2: | ||
| 1092 | return status; | ||
| 1093 | } | ||
| 1094 | |||
| 1095 | static int HI_Command(struct drxk_state *state, u16 cmd, u16 *pResult) | ||
| 1096 | { | ||
| 1097 | int status; | ||
| 1098 | bool powerdown_cmd; | ||
| 1099 | |||
| 1100 | dprintk(1, "\n"); | ||
| 1101 | |||
| 1102 | /* Write command */ | ||
| 1103 | status = write16(state, SIO_HI_RA_RAM_CMD__A, cmd); | ||
| 1104 | if (status < 0) | ||
| 1105 | goto error; | ||
| 1106 | if (cmd == SIO_HI_RA_RAM_CMD_RESET) | ||
| 1107 | msleep(1); | ||
| 1108 | |||
| 1109 | powerdown_cmd = | ||
| 1110 | (bool) ((cmd == SIO_HI_RA_RAM_CMD_CONFIG) && | ||
| 1111 | ((state->m_HICfgCtrl) & | ||
| 1112 | SIO_HI_RA_RAM_PAR_5_CFG_SLEEP__M) == | ||
| 1113 | SIO_HI_RA_RAM_PAR_5_CFG_SLEEP_ZZZ); | ||
| 1114 | if (powerdown_cmd == false) { | ||
| 1115 | /* Wait until command rdy */ | ||
| 1116 | u32 retryCount = 0; | ||
| 1117 | u16 waitCmd; | ||
| 1118 | |||
| 1119 | do { | ||
| 1120 | msleep(1); | ||
| 1121 | retryCount += 1; | ||
| 1122 | status = read16(state, SIO_HI_RA_RAM_CMD__A, | ||
| 1123 | &waitCmd); | ||
| 1124 | } while ((status < 0) && (retryCount < DRXK_MAX_RETRIES) | ||
| 1125 | && (waitCmd != 0)); | ||
| 1126 | if (status < 0) | ||
| 1127 | goto error; | ||
| 1128 | status = read16(state, SIO_HI_RA_RAM_RES__A, pResult); | ||
| 1129 | } | ||
| 1130 | error: | ||
| 1131 | if (status < 0) | ||
| 1132 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 1133 | |||
| 1134 | return status; | ||
| 1135 | } | ||
| 1136 | |||
| 1137 | static int HI_CfgCommand(struct drxk_state *state) | ||
| 1138 | { | ||
| 1139 | int status; | ||
| 1140 | |||
| 1141 | dprintk(1, "\n"); | ||
| 1142 | |||
| 1143 | mutex_lock(&state->mutex); | ||
| 1144 | |||
| 1145 | status = write16(state, SIO_HI_RA_RAM_PAR_6__A, state->m_HICfgTimeout); | ||
| 1146 | if (status < 0) | ||
| 1147 | goto error; | ||
| 1148 | status = write16(state, SIO_HI_RA_RAM_PAR_5__A, state->m_HICfgCtrl); | ||
| 1149 | if (status < 0) | ||
| 1150 | goto error; | ||
| 1151 | status = write16(state, SIO_HI_RA_RAM_PAR_4__A, state->m_HICfgWakeUpKey); | ||
| 1152 | if (status < 0) | ||
| 1153 | goto error; | ||
| 1154 | status = write16(state, SIO_HI_RA_RAM_PAR_3__A, state->m_HICfgBridgeDelay); | ||
| 1155 | if (status < 0) | ||
| 1156 | goto error; | ||
| 1157 | status = write16(state, SIO_HI_RA_RAM_PAR_2__A, state->m_HICfgTimingDiv); | ||
| 1158 | if (status < 0) | ||
| 1159 | goto error; | ||
| 1160 | status = write16(state, SIO_HI_RA_RAM_PAR_1__A, SIO_HI_RA_RAM_PAR_1_PAR1_SEC_KEY); | ||
| 1161 | if (status < 0) | ||
| 1162 | goto error; | ||
| 1163 | status = HI_Command(state, SIO_HI_RA_RAM_CMD_CONFIG, 0); | ||
| 1164 | if (status < 0) | ||
| 1165 | goto error; | ||
| 1166 | |||
| 1167 | state->m_HICfgCtrl &= ~SIO_HI_RA_RAM_PAR_5_CFG_SLEEP_ZZZ; | ||
| 1168 | error: | ||
| 1169 | mutex_unlock(&state->mutex); | ||
| 1170 | if (status < 0) | ||
| 1171 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 1172 | return status; | ||
| 1173 | } | ||
| 1174 | |||
| 1175 | static int InitHI(struct drxk_state *state) | ||
| 1176 | { | ||
| 1177 | dprintk(1, "\n"); | ||
| 1178 | |||
| 1179 | state->m_HICfgWakeUpKey = (state->demod_address << 1); | ||
| 1180 | state->m_HICfgTimeout = 0x96FF; | ||
| 1181 | /* port/bridge/power down ctrl */ | ||
| 1182 | state->m_HICfgCtrl = SIO_HI_RA_RAM_PAR_5_CFG_SLV0_SLAVE; | ||
| 1183 | |||
| 1184 | return HI_CfgCommand(state); | ||
| 1185 | } | ||
| 1186 | |||
| 1187 | static int MPEGTSConfigurePins(struct drxk_state *state, bool mpegEnable) | ||
| 1188 | { | ||
| 1189 | int status = -1; | ||
| 1190 | u16 sioPdrMclkCfg = 0; | ||
| 1191 | u16 sioPdrMdxCfg = 0; | ||
| 1192 | |||
| 1193 | dprintk(1, "\n"); | ||
| 1194 | |||
| 1195 | /* stop lock indicator process */ | ||
| 1196 | status = write16(state, SCU_RAM_GPIO__A, SCU_RAM_GPIO_HW_LOCK_IND_DISABLE); | ||
| 1197 | if (status < 0) | ||
| 1198 | goto error; | ||
| 1199 | |||
| 1200 | /* MPEG TS pad configuration */ | ||
| 1201 | status = write16(state, SIO_TOP_COMM_KEY__A, 0xFABA); | ||
| 1202 | if (status < 0) | ||
| 1203 | goto error; | ||
| 1204 | |||
| 1205 | if (mpegEnable == false) { | ||
| 1206 | /* Set MPEG TS pads to inputmode */ | ||
| 1207 | status = write16(state, SIO_PDR_MSTRT_CFG__A, 0x0000); | ||
| 1208 | if (status < 0) | ||
| 1209 | goto error; | ||
| 1210 | status = write16(state, SIO_PDR_MERR_CFG__A, 0x0000); | ||
| 1211 | if (status < 0) | ||
| 1212 | goto error; | ||
| 1213 | status = write16(state, SIO_PDR_MCLK_CFG__A, 0x0000); | ||
| 1214 | if (status < 0) | ||
| 1215 | goto error; | ||
| 1216 | status = write16(state, SIO_PDR_MVAL_CFG__A, 0x0000); | ||
| 1217 | if (status < 0) | ||
| 1218 | goto error; | ||
| 1219 | status = write16(state, SIO_PDR_MD0_CFG__A, 0x0000); | ||
| 1220 | if (status < 0) | ||
| 1221 | goto error; | ||
| 1222 | status = write16(state, SIO_PDR_MD1_CFG__A, 0x0000); | ||
| 1223 | if (status < 0) | ||
| 1224 | goto error; | ||
| 1225 | status = write16(state, SIO_PDR_MD2_CFG__A, 0x0000); | ||
| 1226 | if (status < 0) | ||
| 1227 | goto error; | ||
| 1228 | status = write16(state, SIO_PDR_MD3_CFG__A, 0x0000); | ||
| 1229 | if (status < 0) | ||
| 1230 | goto error; | ||
| 1231 | status = write16(state, SIO_PDR_MD4_CFG__A, 0x0000); | ||
| 1232 | if (status < 0) | ||
| 1233 | goto error; | ||
| 1234 | status = write16(state, SIO_PDR_MD5_CFG__A, 0x0000); | ||
| 1235 | if (status < 0) | ||
| 1236 | goto error; | ||
| 1237 | status = write16(state, SIO_PDR_MD6_CFG__A, 0x0000); | ||
| 1238 | if (status < 0) | ||
| 1239 | goto error; | ||
| 1240 | status = write16(state, SIO_PDR_MD7_CFG__A, 0x0000); | ||
| 1241 | if (status < 0) | ||
| 1242 | goto error; | ||
| 1243 | } else { | ||
| 1244 | /* Enable MPEG output */ | ||
| 1245 | sioPdrMdxCfg = | ||
| 1246 | ((state->m_TSDataStrength << | ||
| 1247 | SIO_PDR_MD0_CFG_DRIVE__B) | 0x0003); | ||
| 1248 | sioPdrMclkCfg = ((state->m_TSClockkStrength << | ||
| 1249 | SIO_PDR_MCLK_CFG_DRIVE__B) | | ||
| 1250 | 0x0003); | ||
| 1251 | |||
| 1252 | status = write16(state, SIO_PDR_MSTRT_CFG__A, sioPdrMdxCfg); | ||
| 1253 | if (status < 0) | ||
| 1254 | goto error; | ||
| 1255 | status = write16(state, SIO_PDR_MERR_CFG__A, 0x0000); /* Disable */ | ||
| 1256 | if (status < 0) | ||
| 1257 | goto error; | ||
| 1258 | status = write16(state, SIO_PDR_MVAL_CFG__A, 0x0000); /* Disable */ | ||
| 1259 | if (status < 0) | ||
| 1260 | goto error; | ||
| 1261 | if (state->m_enableParallel == true) { | ||
| 1262 | /* paralel -> enable MD1 to MD7 */ | ||
| 1263 | status = write16(state, SIO_PDR_MD1_CFG__A, sioPdrMdxCfg); | ||
| 1264 | if (status < 0) | ||
| 1265 | goto error; | ||
| 1266 | status = write16(state, SIO_PDR_MD2_CFG__A, sioPdrMdxCfg); | ||
| 1267 | if (status < 0) | ||
| 1268 | goto error; | ||
| 1269 | status = write16(state, SIO_PDR_MD3_CFG__A, sioPdrMdxCfg); | ||
| 1270 | if (status < 0) | ||
| 1271 | goto error; | ||
| 1272 | status = write16(state, SIO_PDR_MD4_CFG__A, sioPdrMdxCfg); | ||
| 1273 | if (status < 0) | ||
| 1274 | goto error; | ||
| 1275 | status = write16(state, SIO_PDR_MD5_CFG__A, sioPdrMdxCfg); | ||
| 1276 | if (status < 0) | ||
| 1277 | goto error; | ||
| 1278 | status = write16(state, SIO_PDR_MD6_CFG__A, sioPdrMdxCfg); | ||
| 1279 | if (status < 0) | ||
| 1280 | goto error; | ||
| 1281 | status = write16(state, SIO_PDR_MD7_CFG__A, sioPdrMdxCfg); | ||
| 1282 | if (status < 0) | ||
| 1283 | goto error; | ||
| 1284 | } else { | ||
| 1285 | sioPdrMdxCfg = ((state->m_TSDataStrength << | ||
| 1286 | SIO_PDR_MD0_CFG_DRIVE__B) | ||
| 1287 | | 0x0003); | ||
| 1288 | /* serial -> disable MD1 to MD7 */ | ||
| 1289 | status = write16(state, SIO_PDR_MD1_CFG__A, 0x0000); | ||
| 1290 | if (status < 0) | ||
| 1291 | goto error; | ||
| 1292 | status = write16(state, SIO_PDR_MD2_CFG__A, 0x0000); | ||
| 1293 | if (status < 0) | ||
| 1294 | goto error; | ||
| 1295 | status = write16(state, SIO_PDR_MD3_CFG__A, 0x0000); | ||
| 1296 | if (status < 0) | ||
| 1297 | goto error; | ||
| 1298 | status = write16(state, SIO_PDR_MD4_CFG__A, 0x0000); | ||
| 1299 | if (status < 0) | ||
| 1300 | goto error; | ||
| 1301 | status = write16(state, SIO_PDR_MD5_CFG__A, 0x0000); | ||
| 1302 | if (status < 0) | ||
| 1303 | goto error; | ||
| 1304 | status = write16(state, SIO_PDR_MD6_CFG__A, 0x0000); | ||
| 1305 | if (status < 0) | ||
| 1306 | goto error; | ||
| 1307 | status = write16(state, SIO_PDR_MD7_CFG__A, 0x0000); | ||
| 1308 | if (status < 0) | ||
| 1309 | goto error; | ||
| 1310 | } | ||
| 1311 | status = write16(state, SIO_PDR_MCLK_CFG__A, sioPdrMclkCfg); | ||
| 1312 | if (status < 0) | ||
| 1313 | goto error; | ||
| 1314 | status = write16(state, SIO_PDR_MD0_CFG__A, sioPdrMdxCfg); | ||
| 1315 | if (status < 0) | ||
| 1316 | goto error; | ||
| 1317 | } | ||
| 1318 | /* Enable MB output over MPEG pads and ctl input */ | ||
| 1319 | status = write16(state, SIO_PDR_MON_CFG__A, 0x0000); | ||
| 1320 | if (status < 0) | ||
| 1321 | goto error; | ||
| 1322 | /* Write nomagic word to enable pdr reg write */ | ||
| 1323 | status = write16(state, SIO_TOP_COMM_KEY__A, 0x0000); | ||
| 1324 | error: | ||
| 1325 | if (status < 0) | ||
| 1326 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 1327 | return status; | ||
| 1328 | } | ||
| 1329 | |||
| 1330 | static int MPEGTSDisable(struct drxk_state *state) | ||
| 1331 | { | ||
| 1332 | dprintk(1, "\n"); | ||
| 1333 | |||
| 1334 | return MPEGTSConfigurePins(state, false); | ||
| 1335 | } | ||
| 1336 | |||
| 1337 | static int BLChainCmd(struct drxk_state *state, | ||
| 1338 | u16 romOffset, u16 nrOfElements, u32 timeOut) | ||
| 1339 | { | ||
| 1340 | u16 blStatus = 0; | ||
| 1341 | int status; | ||
| 1342 | unsigned long end; | ||
| 1343 | |||
| 1344 | dprintk(1, "\n"); | ||
| 1345 | mutex_lock(&state->mutex); | ||
| 1346 | status = write16(state, SIO_BL_MODE__A, SIO_BL_MODE_CHAIN); | ||
| 1347 | if (status < 0) | ||
| 1348 | goto error; | ||
| 1349 | status = write16(state, SIO_BL_CHAIN_ADDR__A, romOffset); | ||
| 1350 | if (status < 0) | ||
| 1351 | goto error; | ||
| 1352 | status = write16(state, SIO_BL_CHAIN_LEN__A, nrOfElements); | ||
| 1353 | if (status < 0) | ||
| 1354 | goto error; | ||
| 1355 | status = write16(state, SIO_BL_ENABLE__A, SIO_BL_ENABLE_ON); | ||
| 1356 | if (status < 0) | ||
| 1357 | goto error; | ||
| 1358 | |||
| 1359 | end = jiffies + msecs_to_jiffies(timeOut); | ||
| 1360 | do { | ||
| 1361 | msleep(1); | ||
| 1362 | status = read16(state, SIO_BL_STATUS__A, &blStatus); | ||
| 1363 | if (status < 0) | ||
| 1364 | goto error; | ||
| 1365 | } while ((blStatus == 0x1) && | ||
| 1366 | ((time_is_after_jiffies(end)))); | ||
| 1367 | |||
| 1368 | if (blStatus == 0x1) { | ||
| 1369 | printk(KERN_ERR "drxk: SIO not ready\n"); | ||
| 1370 | status = -EINVAL; | ||
| 1371 | goto error2; | ||
| 1372 | } | ||
| 1373 | error: | ||
| 1374 | if (status < 0) | ||
| 1375 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 1376 | error2: | ||
| 1377 | mutex_unlock(&state->mutex); | ||
| 1378 | return status; | ||
| 1379 | } | ||
| 1380 | |||
| 1381 | |||
| 1382 | static int DownloadMicrocode(struct drxk_state *state, | ||
| 1383 | const u8 pMCImage[], u32 Length) | ||
| 1384 | { | ||
| 1385 | const u8 *pSrc = pMCImage; | ||
| 1386 | u16 Flags; | ||
| 1387 | u16 Drain; | ||
| 1388 | u32 Address; | ||
| 1389 | u16 nBlocks; | ||
| 1390 | u16 BlockSize; | ||
| 1391 | u16 BlockCRC; | ||
| 1392 | u32 offset = 0; | ||
| 1393 | u32 i; | ||
| 1394 | int status = 0; | ||
| 1395 | |||
| 1396 | dprintk(1, "\n"); | ||
| 1397 | |||
| 1398 | /* down the drain (we don care about MAGIC_WORD) */ | ||
| 1399 | Drain = (pSrc[0] << 8) | pSrc[1]; | ||
| 1400 | pSrc += sizeof(u16); | ||
| 1401 | offset += sizeof(u16); | ||
| 1402 | nBlocks = (pSrc[0] << 8) | pSrc[1]; | ||
| 1403 | pSrc += sizeof(u16); | ||
| 1404 | offset += sizeof(u16); | ||
| 1405 | |||
| 1406 | for (i = 0; i < nBlocks; i += 1) { | ||
| 1407 | Address = (pSrc[0] << 24) | (pSrc[1] << 16) | | ||
| 1408 | (pSrc[2] << 8) | pSrc[3]; | ||
| 1409 | pSrc += sizeof(u32); | ||
| 1410 | offset += sizeof(u32); | ||
| 1411 | |||
| 1412 | BlockSize = ((pSrc[0] << 8) | pSrc[1]) * sizeof(u16); | ||
| 1413 | pSrc += sizeof(u16); | ||
| 1414 | offset += sizeof(u16); | ||
| 1415 | |||
| 1416 | Flags = (pSrc[0] << 8) | pSrc[1]; | ||
| 1417 | pSrc += sizeof(u16); | ||
| 1418 | offset += sizeof(u16); | ||
| 1419 | |||
| 1420 | BlockCRC = (pSrc[0] << 8) | pSrc[1]; | ||
| 1421 | pSrc += sizeof(u16); | ||
| 1422 | offset += sizeof(u16); | ||
| 1423 | |||
| 1424 | if (offset + BlockSize > Length) { | ||
| 1425 | printk(KERN_ERR "drxk: Firmware is corrupted.\n"); | ||
| 1426 | return -EINVAL; | ||
| 1427 | } | ||
| 1428 | |||
| 1429 | status = write_block(state, Address, BlockSize, pSrc); | ||
| 1430 | if (status < 0) { | ||
| 1431 | printk(KERN_ERR "drxk: Error %d while loading firmware\n", status); | ||
| 1432 | break; | ||
| 1433 | } | ||
| 1434 | pSrc += BlockSize; | ||
| 1435 | offset += BlockSize; | ||
| 1436 | } | ||
| 1437 | return status; | ||
| 1438 | } | ||
| 1439 | |||
| 1440 | static int DVBTEnableOFDMTokenRing(struct drxk_state *state, bool enable) | ||
| 1441 | { | ||
| 1442 | int status; | ||
| 1443 | u16 data = 0; | ||
| 1444 | u16 desiredCtrl = SIO_OFDM_SH_OFDM_RING_ENABLE_ON; | ||
| 1445 | u16 desiredStatus = SIO_OFDM_SH_OFDM_RING_STATUS_ENABLED; | ||
| 1446 | unsigned long end; | ||
| 1447 | |||
| 1448 | dprintk(1, "\n"); | ||
| 1449 | |||
| 1450 | if (enable == false) { | ||
| 1451 | desiredCtrl = SIO_OFDM_SH_OFDM_RING_ENABLE_OFF; | ||
| 1452 | desiredStatus = SIO_OFDM_SH_OFDM_RING_STATUS_DOWN; | ||
| 1453 | } | ||
| 1454 | |||
| 1455 | status = read16(state, SIO_OFDM_SH_OFDM_RING_STATUS__A, &data); | ||
| 1456 | if (status >= 0 && data == desiredStatus) { | ||
| 1457 | /* tokenring already has correct status */ | ||
| 1458 | return status; | ||
| 1459 | } | ||
| 1460 | /* Disable/enable dvbt tokenring bridge */ | ||
| 1461 | status = write16(state, SIO_OFDM_SH_OFDM_RING_ENABLE__A, desiredCtrl); | ||
| 1462 | |||
| 1463 | end = jiffies + msecs_to_jiffies(DRXK_OFDM_TR_SHUTDOWN_TIMEOUT); | ||
| 1464 | do { | ||
| 1465 | status = read16(state, SIO_OFDM_SH_OFDM_RING_STATUS__A, &data); | ||
| 1466 | if ((status >= 0 && data == desiredStatus) || time_is_after_jiffies(end)) | ||
| 1467 | break; | ||
| 1468 | msleep(1); | ||
| 1469 | } while (1); | ||
| 1470 | if (data != desiredStatus) { | ||
| 1471 | printk(KERN_ERR "drxk: SIO not ready\n"); | ||
| 1472 | return -EINVAL; | ||
| 1473 | } | ||
| 1474 | return status; | ||
| 1475 | } | ||
| 1476 | |||
| 1477 | static int MPEGTSStop(struct drxk_state *state) | ||
| 1478 | { | ||
| 1479 | int status = 0; | ||
| 1480 | u16 fecOcSncMode = 0; | ||
| 1481 | u16 fecOcIprMode = 0; | ||
| 1482 | |||
| 1483 | dprintk(1, "\n"); | ||
| 1484 | |||
| 1485 | /* Gracefull shutdown (byte boundaries) */ | ||
| 1486 | status = read16(state, FEC_OC_SNC_MODE__A, &fecOcSncMode); | ||
| 1487 | if (status < 0) | ||
| 1488 | goto error; | ||
| 1489 | fecOcSncMode |= FEC_OC_SNC_MODE_SHUTDOWN__M; | ||
| 1490 | status = write16(state, FEC_OC_SNC_MODE__A, fecOcSncMode); | ||
| 1491 | if (status < 0) | ||
| 1492 | goto error; | ||
| 1493 | |||
| 1494 | /* Suppress MCLK during absence of data */ | ||
| 1495 | status = read16(state, FEC_OC_IPR_MODE__A, &fecOcIprMode); | ||
| 1496 | if (status < 0) | ||
| 1497 | goto error; | ||
| 1498 | fecOcIprMode |= FEC_OC_IPR_MODE_MCLK_DIS_DAT_ABS__M; | ||
| 1499 | status = write16(state, FEC_OC_IPR_MODE__A, fecOcIprMode); | ||
| 1500 | |||
| 1501 | error: | ||
| 1502 | if (status < 0) | ||
| 1503 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 1504 | |||
| 1505 | return status; | ||
| 1506 | } | ||
| 1507 | |||
| 1508 | static int scu_command(struct drxk_state *state, | ||
| 1509 | u16 cmd, u8 parameterLen, | ||
| 1510 | u16 *parameter, u8 resultLen, u16 *result) | ||
| 1511 | { | ||
| 1512 | #if (SCU_RAM_PARAM_0__A - SCU_RAM_PARAM_15__A) != 15 | ||
| 1513 | #error DRXK register mapping no longer compatible with this routine! | ||
| 1514 | #endif | ||
| 1515 | u16 curCmd = 0; | ||
| 1516 | int status = -EINVAL; | ||
| 1517 | unsigned long end; | ||
| 1518 | u8 buffer[34]; | ||
| 1519 | int cnt = 0, ii; | ||
| 1520 | const char *p; | ||
| 1521 | char errname[30]; | ||
| 1522 | |||
| 1523 | dprintk(1, "\n"); | ||
| 1524 | |||
| 1525 | if ((cmd == 0) || ((parameterLen > 0) && (parameter == NULL)) || | ||
| 1526 | ((resultLen > 0) && (result == NULL))) | ||
| 1527 | goto error; | ||
| 1528 | |||
| 1529 | mutex_lock(&state->mutex); | ||
| 1530 | |||
| 1531 | /* assume that the command register is ready | ||
| 1532 | since it is checked afterwards */ | ||
| 1533 | for (ii = parameterLen - 1; ii >= 0; ii -= 1) { | ||
| 1534 | buffer[cnt++] = (parameter[ii] & 0xFF); | ||
| 1535 | buffer[cnt++] = ((parameter[ii] >> 8) & 0xFF); | ||
| 1536 | } | ||
| 1537 | buffer[cnt++] = (cmd & 0xFF); | ||
| 1538 | buffer[cnt++] = ((cmd >> 8) & 0xFF); | ||
| 1539 | |||
| 1540 | write_block(state, SCU_RAM_PARAM_0__A - | ||
| 1541 | (parameterLen - 1), cnt, buffer); | ||
| 1542 | /* Wait until SCU has processed command */ | ||
| 1543 | end = jiffies + msecs_to_jiffies(DRXK_MAX_WAITTIME); | ||
| 1544 | do { | ||
| 1545 | msleep(1); | ||
| 1546 | status = read16(state, SCU_RAM_COMMAND__A, &curCmd); | ||
| 1547 | if (status < 0) | ||
| 1548 | goto error; | ||
| 1549 | } while (!(curCmd == DRX_SCU_READY) && (time_is_after_jiffies(end))); | ||
| 1550 | if (curCmd != DRX_SCU_READY) { | ||
| 1551 | printk(KERN_ERR "drxk: SCU not ready\n"); | ||
| 1552 | status = -EIO; | ||
| 1553 | goto error2; | ||
| 1554 | } | ||
| 1555 | /* read results */ | ||
| 1556 | if ((resultLen > 0) && (result != NULL)) { | ||
| 1557 | s16 err; | ||
| 1558 | int ii; | ||
| 1559 | |||
| 1560 | for (ii = resultLen - 1; ii >= 0; ii -= 1) { | ||
| 1561 | status = read16(state, SCU_RAM_PARAM_0__A - ii, &result[ii]); | ||
| 1562 | if (status < 0) | ||
| 1563 | goto error; | ||
| 1564 | } | ||
| 1565 | |||
| 1566 | /* Check if an error was reported by SCU */ | ||
| 1567 | err = (s16)result[0]; | ||
| 1568 | if (err >= 0) | ||
| 1569 | goto error; | ||
| 1570 | |||
| 1571 | /* check for the known error codes */ | ||
| 1572 | switch (err) { | ||
| 1573 | case SCU_RESULT_UNKCMD: | ||
| 1574 | p = "SCU_RESULT_UNKCMD"; | ||
| 1575 | break; | ||
| 1576 | case SCU_RESULT_UNKSTD: | ||
| 1577 | p = "SCU_RESULT_UNKSTD"; | ||
| 1578 | break; | ||
| 1579 | case SCU_RESULT_SIZE: | ||
| 1580 | p = "SCU_RESULT_SIZE"; | ||
| 1581 | break; | ||
| 1582 | case SCU_RESULT_INVPAR: | ||
| 1583 | p = "SCU_RESULT_INVPAR"; | ||
| 1584 | break; | ||
| 1585 | default: /* Other negative values are errors */ | ||
| 1586 | sprintf(errname, "ERROR: %d\n", err); | ||
| 1587 | p = errname; | ||
| 1588 | } | ||
| 1589 | printk(KERN_ERR "drxk: %s while sending cmd 0x%04x with params:", p, cmd); | ||
| 1590 | print_hex_dump_bytes("drxk: ", DUMP_PREFIX_NONE, buffer, cnt); | ||
| 1591 | status = -EINVAL; | ||
| 1592 | goto error2; | ||
| 1593 | } | ||
| 1594 | |||
| 1595 | error: | ||
| 1596 | if (status < 0) | ||
| 1597 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 1598 | error2: | ||
| 1599 | mutex_unlock(&state->mutex); | ||
| 1600 | return status; | ||
| 1601 | } | ||
| 1602 | |||
| 1603 | static int SetIqmAf(struct drxk_state *state, bool active) | ||
| 1604 | { | ||
| 1605 | u16 data = 0; | ||
| 1606 | int status; | ||
| 1607 | |||
| 1608 | dprintk(1, "\n"); | ||
| 1609 | |||
| 1610 | /* Configure IQM */ | ||
| 1611 | status = read16(state, IQM_AF_STDBY__A, &data); | ||
| 1612 | if (status < 0) | ||
| 1613 | goto error; | ||
| 1614 | |||
| 1615 | if (!active) { | ||
| 1616 | data |= (IQM_AF_STDBY_STDBY_ADC_STANDBY | ||
| 1617 | | IQM_AF_STDBY_STDBY_AMP_STANDBY | ||
| 1618 | | IQM_AF_STDBY_STDBY_PD_STANDBY | ||
| 1619 | | IQM_AF_STDBY_STDBY_TAGC_IF_STANDBY | ||
| 1620 | | IQM_AF_STDBY_STDBY_TAGC_RF_STANDBY); | ||
| 1621 | } else { | ||
| 1622 | data &= ((~IQM_AF_STDBY_STDBY_ADC_STANDBY) | ||
| 1623 | & (~IQM_AF_STDBY_STDBY_AMP_STANDBY) | ||
| 1624 | & (~IQM_AF_STDBY_STDBY_PD_STANDBY) | ||
| 1625 | & (~IQM_AF_STDBY_STDBY_TAGC_IF_STANDBY) | ||
| 1626 | & (~IQM_AF_STDBY_STDBY_TAGC_RF_STANDBY) | ||
| 1627 | ); | ||
| 1628 | } | ||
| 1629 | status = write16(state, IQM_AF_STDBY__A, data); | ||
| 1630 | |||
| 1631 | error: | ||
| 1632 | if (status < 0) | ||
| 1633 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 1634 | return status; | ||
| 1635 | } | ||
| 1636 | |||
| 1637 | static int CtrlPowerMode(struct drxk_state *state, enum DRXPowerMode *mode) | ||
| 1638 | { | ||
| 1639 | int status = 0; | ||
| 1640 | u16 sioCcPwdMode = 0; | ||
| 1641 | |||
| 1642 | dprintk(1, "\n"); | ||
| 1643 | |||
| 1644 | /* Check arguments */ | ||
| 1645 | if (mode == NULL) | ||
| 1646 | return -EINVAL; | ||
| 1647 | |||
| 1648 | switch (*mode) { | ||
| 1649 | case DRX_POWER_UP: | ||
| 1650 | sioCcPwdMode = SIO_CC_PWD_MODE_LEVEL_NONE; | ||
| 1651 | break; | ||
| 1652 | case DRXK_POWER_DOWN_OFDM: | ||
| 1653 | sioCcPwdMode = SIO_CC_PWD_MODE_LEVEL_OFDM; | ||
| 1654 | break; | ||
| 1655 | case DRXK_POWER_DOWN_CORE: | ||
| 1656 | sioCcPwdMode = SIO_CC_PWD_MODE_LEVEL_CLOCK; | ||
| 1657 | break; | ||
| 1658 | case DRXK_POWER_DOWN_PLL: | ||
| 1659 | sioCcPwdMode = SIO_CC_PWD_MODE_LEVEL_PLL; | ||
| 1660 | break; | ||
| 1661 | case DRX_POWER_DOWN: | ||
| 1662 | sioCcPwdMode = SIO_CC_PWD_MODE_LEVEL_OSC; | ||
| 1663 | break; | ||
| 1664 | default: | ||
| 1665 | /* Unknow sleep mode */ | ||
| 1666 | return -EINVAL; | ||
| 1667 | } | ||
| 1668 | |||
| 1669 | /* If already in requested power mode, do nothing */ | ||
| 1670 | if (state->m_currentPowerMode == *mode) | ||
| 1671 | return 0; | ||
| 1672 | |||
| 1673 | /* For next steps make sure to start from DRX_POWER_UP mode */ | ||
| 1674 | if (state->m_currentPowerMode != DRX_POWER_UP) { | ||
| 1675 | status = PowerUpDevice(state); | ||
| 1676 | if (status < 0) | ||
| 1677 | goto error; | ||
| 1678 | status = DVBTEnableOFDMTokenRing(state, true); | ||
| 1679 | if (status < 0) | ||
| 1680 | goto error; | ||
| 1681 | } | ||
| 1682 | |||
| 1683 | if (*mode == DRX_POWER_UP) { | ||
| 1684 | /* Restore analog & pin configuartion */ | ||
| 1685 | } else { | ||
| 1686 | /* Power down to requested mode */ | ||
| 1687 | /* Backup some register settings */ | ||
| 1688 | /* Set pins with possible pull-ups connected | ||
| 1689 | to them in input mode */ | ||
| 1690 | /* Analog power down */ | ||
| 1691 | /* ADC power down */ | ||
| 1692 | /* Power down device */ | ||
| 1693 | /* stop all comm_exec */ | ||
| 1694 | /* Stop and power down previous standard */ | ||
| 1695 | switch (state->m_OperationMode) { | ||
| 1696 | case OM_DVBT: | ||
| 1697 | status = MPEGTSStop(state); | ||
| 1698 | if (status < 0) | ||
| 1699 | goto error; | ||
| 1700 | status = PowerDownDVBT(state, false); | ||
| 1701 | if (status < 0) | ||
| 1702 | goto error; | ||
| 1703 | break; | ||
| 1704 | case OM_QAM_ITU_A: | ||
| 1705 | case OM_QAM_ITU_C: | ||
| 1706 | status = MPEGTSStop(state); | ||
| 1707 | if (status < 0) | ||
| 1708 | goto error; | ||
| 1709 | status = PowerDownQAM(state); | ||
| 1710 | if (status < 0) | ||
| 1711 | goto error; | ||
| 1712 | break; | ||
| 1713 | default: | ||
| 1714 | break; | ||
| 1715 | } | ||
| 1716 | status = DVBTEnableOFDMTokenRing(state, false); | ||
| 1717 | if (status < 0) | ||
| 1718 | goto error; | ||
| 1719 | status = write16(state, SIO_CC_PWD_MODE__A, sioCcPwdMode); | ||
| 1720 | if (status < 0) | ||
| 1721 | goto error; | ||
| 1722 | status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY); | ||
| 1723 | if (status < 0) | ||
| 1724 | goto error; | ||
| 1725 | |||
| 1726 | if (*mode != DRXK_POWER_DOWN_OFDM) { | ||
| 1727 | state->m_HICfgCtrl |= | ||
| 1728 | SIO_HI_RA_RAM_PAR_5_CFG_SLEEP_ZZZ; | ||
| 1729 | status = HI_CfgCommand(state); | ||
| 1730 | if (status < 0) | ||
| 1731 | goto error; | ||
| 1732 | } | ||
| 1733 | } | ||
| 1734 | state->m_currentPowerMode = *mode; | ||
| 1735 | |||
| 1736 | error: | ||
| 1737 | if (status < 0) | ||
| 1738 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 1739 | |||
| 1740 | return status; | ||
| 1741 | } | ||
| 1742 | |||
| 1743 | static int PowerDownDVBT(struct drxk_state *state, bool setPowerMode) | ||
| 1744 | { | ||
| 1745 | enum DRXPowerMode powerMode = DRXK_POWER_DOWN_OFDM; | ||
| 1746 | u16 cmdResult = 0; | ||
| 1747 | u16 data = 0; | ||
| 1748 | int status; | ||
| 1749 | |||
| 1750 | dprintk(1, "\n"); | ||
| 1751 | |||
| 1752 | status = read16(state, SCU_COMM_EXEC__A, &data); | ||
| 1753 | if (status < 0) | ||
| 1754 | goto error; | ||
| 1755 | if (data == SCU_COMM_EXEC_ACTIVE) { | ||
| 1756 | /* Send OFDM stop command */ | ||
| 1757 | status = scu_command(state, SCU_RAM_COMMAND_STANDARD_OFDM | SCU_RAM_COMMAND_CMD_DEMOD_STOP, 0, NULL, 1, &cmdResult); | ||
| 1758 | if (status < 0) | ||
| 1759 | goto error; | ||
| 1760 | /* Send OFDM reset command */ | ||
| 1761 | status = scu_command(state, SCU_RAM_COMMAND_STANDARD_OFDM | SCU_RAM_COMMAND_CMD_DEMOD_RESET, 0, NULL, 1, &cmdResult); | ||
| 1762 | if (status < 0) | ||
| 1763 | goto error; | ||
| 1764 | } | ||
| 1765 | |||
| 1766 | /* Reset datapath for OFDM, processors first */ | ||
| 1767 | status = write16(state, OFDM_SC_COMM_EXEC__A, OFDM_SC_COMM_EXEC_STOP); | ||
| 1768 | if (status < 0) | ||
| 1769 | goto error; | ||
| 1770 | status = write16(state, OFDM_LC_COMM_EXEC__A, OFDM_LC_COMM_EXEC_STOP); | ||
| 1771 | if (status < 0) | ||
| 1772 | goto error; | ||
| 1773 | status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_STOP); | ||
| 1774 | if (status < 0) | ||
| 1775 | goto error; | ||
| 1776 | |||
| 1777 | /* powerdown AFE */ | ||
| 1778 | status = SetIqmAf(state, false); | ||
| 1779 | if (status < 0) | ||
| 1780 | goto error; | ||
| 1781 | |||
| 1782 | /* powerdown to OFDM mode */ | ||
| 1783 | if (setPowerMode) { | ||
| 1784 | status = CtrlPowerMode(state, &powerMode); | ||
| 1785 | if (status < 0) | ||
| 1786 | goto error; | ||
| 1787 | } | ||
| 1788 | error: | ||
| 1789 | if (status < 0) | ||
| 1790 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 1791 | return status; | ||
| 1792 | } | ||
| 1793 | |||
| 1794 | static int SetOperationMode(struct drxk_state *state, | ||
| 1795 | enum OperationMode oMode) | ||
| 1796 | { | ||
| 1797 | int status = 0; | ||
| 1798 | |||
| 1799 | dprintk(1, "\n"); | ||
| 1800 | /* | ||
| 1801 | Stop and power down previous standard | ||
| 1802 | TODO investigate total power down instead of partial | ||
| 1803 | power down depending on "previous" standard. | ||
| 1804 | */ | ||
| 1805 | |||
| 1806 | /* disable HW lock indicator */ | ||
| 1807 | status = write16(state, SCU_RAM_GPIO__A, SCU_RAM_GPIO_HW_LOCK_IND_DISABLE); | ||
| 1808 | if (status < 0) | ||
| 1809 | goto error; | ||
| 1810 | |||
| 1811 | /* Device is already at the required mode */ | ||
| 1812 | if (state->m_OperationMode == oMode) | ||
| 1813 | return 0; | ||
| 1814 | |||
| 1815 | switch (state->m_OperationMode) { | ||
| 1816 | /* OM_NONE was added for start up */ | ||
| 1817 | case OM_NONE: | ||
| 1818 | break; | ||
| 1819 | case OM_DVBT: | ||
| 1820 | status = MPEGTSStop(state); | ||
| 1821 | if (status < 0) | ||
| 1822 | goto error; | ||
| 1823 | status = PowerDownDVBT(state, true); | ||
| 1824 | if (status < 0) | ||
| 1825 | goto error; | ||
| 1826 | state->m_OperationMode = OM_NONE; | ||
| 1827 | break; | ||
| 1828 | case OM_QAM_ITU_A: /* fallthrough */ | ||
| 1829 | case OM_QAM_ITU_C: | ||
| 1830 | status = MPEGTSStop(state); | ||
| 1831 | if (status < 0) | ||
| 1832 | goto error; | ||
| 1833 | status = PowerDownQAM(state); | ||
| 1834 | if (status < 0) | ||
| 1835 | goto error; | ||
| 1836 | state->m_OperationMode = OM_NONE; | ||
| 1837 | break; | ||
| 1838 | case OM_QAM_ITU_B: | ||
| 1839 | default: | ||
| 1840 | status = -EINVAL; | ||
| 1841 | goto error; | ||
| 1842 | } | ||
| 1843 | |||
| 1844 | /* | ||
| 1845 | Power up new standard | ||
| 1846 | */ | ||
| 1847 | switch (oMode) { | ||
| 1848 | case OM_DVBT: | ||
| 1849 | state->m_OperationMode = oMode; | ||
| 1850 | status = SetDVBTStandard(state, oMode); | ||
| 1851 | if (status < 0) | ||
| 1852 | goto error; | ||
| 1853 | break; | ||
| 1854 | case OM_QAM_ITU_A: /* fallthrough */ | ||
| 1855 | case OM_QAM_ITU_C: | ||
| 1856 | state->m_OperationMode = oMode; | ||
| 1857 | status = SetQAMStandard(state, oMode); | ||
| 1858 | if (status < 0) | ||
| 1859 | goto error; | ||
| 1860 | break; | ||
| 1861 | case OM_QAM_ITU_B: | ||
| 1862 | default: | ||
| 1863 | status = -EINVAL; | ||
| 1864 | } | ||
| 1865 | error: | ||
| 1866 | if (status < 0) | ||
| 1867 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 1868 | return status; | ||
| 1869 | } | ||
| 1870 | |||
| 1871 | static int Start(struct drxk_state *state, s32 offsetFreq, | ||
| 1872 | s32 IntermediateFrequency) | ||
| 1873 | { | ||
| 1874 | int status = -EINVAL; | ||
| 1875 | |||
| 1876 | u16 IFreqkHz; | ||
| 1877 | s32 OffsetkHz = offsetFreq / 1000; | ||
| 1878 | |||
| 1879 | dprintk(1, "\n"); | ||
| 1880 | if (state->m_DrxkState != DRXK_STOPPED && | ||
| 1881 | state->m_DrxkState != DRXK_DTV_STARTED) | ||
| 1882 | goto error; | ||
| 1883 | |||
| 1884 | state->m_bMirrorFreqSpect = (state->param.inversion == INVERSION_ON); | ||
| 1885 | |||
| 1886 | if (IntermediateFrequency < 0) { | ||
| 1887 | state->m_bMirrorFreqSpect = !state->m_bMirrorFreqSpect; | ||
| 1888 | IntermediateFrequency = -IntermediateFrequency; | ||
| 1889 | } | ||
| 1890 | |||
| 1891 | switch (state->m_OperationMode) { | ||
| 1892 | case OM_QAM_ITU_A: | ||
| 1893 | case OM_QAM_ITU_C: | ||
| 1894 | IFreqkHz = (IntermediateFrequency / 1000); | ||
| 1895 | status = SetQAM(state, IFreqkHz, OffsetkHz); | ||
| 1896 | if (status < 0) | ||
| 1897 | goto error; | ||
| 1898 | state->m_DrxkState = DRXK_DTV_STARTED; | ||
| 1899 | break; | ||
| 1900 | case OM_DVBT: | ||
| 1901 | IFreqkHz = (IntermediateFrequency / 1000); | ||
| 1902 | status = MPEGTSStop(state); | ||
| 1903 | if (status < 0) | ||
| 1904 | goto error; | ||
| 1905 | status = SetDVBT(state, IFreqkHz, OffsetkHz); | ||
| 1906 | if (status < 0) | ||
| 1907 | goto error; | ||
| 1908 | status = DVBTStart(state); | ||
| 1909 | if (status < 0) | ||
| 1910 | goto error; | ||
| 1911 | state->m_DrxkState = DRXK_DTV_STARTED; | ||
| 1912 | break; | ||
| 1913 | default: | ||
| 1914 | break; | ||
| 1915 | } | ||
| 1916 | error: | ||
| 1917 | if (status < 0) | ||
| 1918 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 1919 | return status; | ||
| 1920 | } | ||
| 1921 | |||
| 1922 | static int ShutDown(struct drxk_state *state) | ||
| 1923 | { | ||
| 1924 | dprintk(1, "\n"); | ||
| 1925 | |||
| 1926 | MPEGTSStop(state); | ||
| 1927 | return 0; | ||
| 1928 | } | ||
| 1929 | |||
| 1930 | static int GetLockStatus(struct drxk_state *state, u32 *pLockStatus, | ||
| 1931 | u32 Time) | ||
| 1932 | { | ||
| 1933 | int status = -EINVAL; | ||
| 1934 | |||
| 1935 | dprintk(1, "\n"); | ||
| 1936 | |||
| 1937 | if (pLockStatus == NULL) | ||
| 1938 | goto error; | ||
| 1939 | |||
| 1940 | *pLockStatus = NOT_LOCKED; | ||
| 1941 | |||
| 1942 | /* define the SCU command code */ | ||
| 1943 | switch (state->m_OperationMode) { | ||
| 1944 | case OM_QAM_ITU_A: | ||
| 1945 | case OM_QAM_ITU_B: | ||
| 1946 | case OM_QAM_ITU_C: | ||
| 1947 | status = GetQAMLockStatus(state, pLockStatus); | ||
| 1948 | break; | ||
| 1949 | case OM_DVBT: | ||
| 1950 | status = GetDVBTLockStatus(state, pLockStatus); | ||
| 1951 | break; | ||
| 1952 | default: | ||
| 1953 | break; | ||
| 1954 | } | ||
| 1955 | error: | ||
| 1956 | if (status < 0) | ||
| 1957 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 1958 | return status; | ||
| 1959 | } | ||
| 1960 | |||
| 1961 | static int MPEGTSStart(struct drxk_state *state) | ||
| 1962 | { | ||
| 1963 | int status; | ||
| 1964 | |||
| 1965 | u16 fecOcSncMode = 0; | ||
| 1966 | |||
| 1967 | /* Allow OC to sync again */ | ||
| 1968 | status = read16(state, FEC_OC_SNC_MODE__A, &fecOcSncMode); | ||
| 1969 | if (status < 0) | ||
| 1970 | goto error; | ||
| 1971 | fecOcSncMode &= ~FEC_OC_SNC_MODE_SHUTDOWN__M; | ||
| 1972 | status = write16(state, FEC_OC_SNC_MODE__A, fecOcSncMode); | ||
| 1973 | if (status < 0) | ||
| 1974 | goto error; | ||
| 1975 | status = write16(state, FEC_OC_SNC_UNLOCK__A, 1); | ||
| 1976 | error: | ||
| 1977 | if (status < 0) | ||
| 1978 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 1979 | return status; | ||
| 1980 | } | ||
| 1981 | |||
| 1982 | static int MPEGTSDtoInit(struct drxk_state *state) | ||
| 1983 | { | ||
| 1984 | int status; | ||
| 1985 | |||
| 1986 | dprintk(1, "\n"); | ||
| 1987 | |||
| 1988 | /* Rate integration settings */ | ||
| 1989 | status = write16(state, FEC_OC_RCN_CTL_STEP_LO__A, 0x0000); | ||
| 1990 | if (status < 0) | ||
| 1991 | goto error; | ||
| 1992 | status = write16(state, FEC_OC_RCN_CTL_STEP_HI__A, 0x000C); | ||
| 1993 | if (status < 0) | ||
| 1994 | goto error; | ||
| 1995 | status = write16(state, FEC_OC_RCN_GAIN__A, 0x000A); | ||
| 1996 | if (status < 0) | ||
| 1997 | goto error; | ||
| 1998 | status = write16(state, FEC_OC_AVR_PARM_A__A, 0x0008); | ||
| 1999 | if (status < 0) | ||
| 2000 | goto error; | ||
| 2001 | status = write16(state, FEC_OC_AVR_PARM_B__A, 0x0006); | ||
| 2002 | if (status < 0) | ||
| 2003 | goto error; | ||
| 2004 | status = write16(state, FEC_OC_TMD_HI_MARGIN__A, 0x0680); | ||
| 2005 | if (status < 0) | ||
| 2006 | goto error; | ||
| 2007 | status = write16(state, FEC_OC_TMD_LO_MARGIN__A, 0x0080); | ||
| 2008 | if (status < 0) | ||
| 2009 | goto error; | ||
| 2010 | status = write16(state, FEC_OC_TMD_COUNT__A, 0x03F4); | ||
| 2011 | if (status < 0) | ||
| 2012 | goto error; | ||
| 2013 | |||
| 2014 | /* Additional configuration */ | ||
| 2015 | status = write16(state, FEC_OC_OCR_INVERT__A, 0); | ||
| 2016 | if (status < 0) | ||
| 2017 | goto error; | ||
| 2018 | status = write16(state, FEC_OC_SNC_LWM__A, 2); | ||
| 2019 | if (status < 0) | ||
| 2020 | goto error; | ||
| 2021 | status = write16(state, FEC_OC_SNC_HWM__A, 12); | ||
| 2022 | error: | ||
| 2023 | if (status < 0) | ||
| 2024 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 2025 | |||
| 2026 | return status; | ||
| 2027 | } | ||
| 2028 | |||
| 2029 | static int MPEGTSDtoSetup(struct drxk_state *state, | ||
| 2030 | enum OperationMode oMode) | ||
| 2031 | { | ||
| 2032 | int status; | ||
| 2033 | |||
| 2034 | u16 fecOcRegMode = 0; /* FEC_OC_MODE register value */ | ||
| 2035 | u16 fecOcRegIprMode = 0; /* FEC_OC_IPR_MODE register value */ | ||
| 2036 | u16 fecOcDtoMode = 0; /* FEC_OC_IPR_INVERT register value */ | ||
| 2037 | u16 fecOcFctMode = 0; /* FEC_OC_IPR_INVERT register value */ | ||
| 2038 | u16 fecOcDtoPeriod = 2; /* FEC_OC_IPR_INVERT register value */ | ||
| 2039 | u16 fecOcDtoBurstLen = 188; /* FEC_OC_IPR_INVERT register value */ | ||
| 2040 | u32 fecOcRcnCtlRate = 0; /* FEC_OC_IPR_INVERT register value */ | ||
| 2041 | u16 fecOcTmdMode = 0; | ||
| 2042 | u16 fecOcTmdIntUpdRate = 0; | ||
| 2043 | u32 maxBitRate = 0; | ||
| 2044 | bool staticCLK = false; | ||
| 2045 | |||
| 2046 | dprintk(1, "\n"); | ||
| 2047 | |||
| 2048 | /* Check insertion of the Reed-Solomon parity bytes */ | ||
| 2049 | status = read16(state, FEC_OC_MODE__A, &fecOcRegMode); | ||
| 2050 | if (status < 0) | ||
| 2051 | goto error; | ||
| 2052 | status = read16(state, FEC_OC_IPR_MODE__A, &fecOcRegIprMode); | ||
| 2053 | if (status < 0) | ||
| 2054 | goto error; | ||
| 2055 | fecOcRegMode &= (~FEC_OC_MODE_PARITY__M); | ||
| 2056 | fecOcRegIprMode &= (~FEC_OC_IPR_MODE_MVAL_DIS_PAR__M); | ||
| 2057 | if (state->m_insertRSByte == true) { | ||
| 2058 | /* enable parity symbol forward */ | ||
| 2059 | fecOcRegMode |= FEC_OC_MODE_PARITY__M; | ||
| 2060 | /* MVAL disable during parity bytes */ | ||
| 2061 | fecOcRegIprMode |= FEC_OC_IPR_MODE_MVAL_DIS_PAR__M; | ||
| 2062 | /* TS burst length to 204 */ | ||
| 2063 | fecOcDtoBurstLen = 204; | ||
| 2064 | } | ||
| 2065 | |||
| 2066 | /* Check serial or parrallel output */ | ||
| 2067 | fecOcRegIprMode &= (~(FEC_OC_IPR_MODE_SERIAL__M)); | ||
| 2068 | if (state->m_enableParallel == false) { | ||
| 2069 | /* MPEG data output is serial -> set ipr_mode[0] */ | ||
| 2070 | fecOcRegIprMode |= FEC_OC_IPR_MODE_SERIAL__M; | ||
| 2071 | } | ||
| 2072 | |||
| 2073 | switch (oMode) { | ||
| 2074 | case OM_DVBT: | ||
| 2075 | maxBitRate = state->m_DVBTBitrate; | ||
| 2076 | fecOcTmdMode = 3; | ||
| 2077 | fecOcRcnCtlRate = 0xC00000; | ||
| 2078 | staticCLK = state->m_DVBTStaticCLK; | ||
| 2079 | break; | ||
| 2080 | case OM_QAM_ITU_A: /* fallthrough */ | ||
| 2081 | case OM_QAM_ITU_C: | ||
| 2082 | fecOcTmdMode = 0x0004; | ||
| 2083 | fecOcRcnCtlRate = 0xD2B4EE; /* good for >63 Mb/s */ | ||
| 2084 | maxBitRate = state->m_DVBCBitrate; | ||
| 2085 | staticCLK = state->m_DVBCStaticCLK; | ||
| 2086 | break; | ||
| 2087 | default: | ||
| 2088 | status = -EINVAL; | ||
| 2089 | } /* switch (standard) */ | ||
| 2090 | if (status < 0) | ||
| 2091 | goto error; | ||
| 2092 | |||
| 2093 | /* Configure DTO's */ | ||
| 2094 | if (staticCLK) { | ||
| 2095 | u32 bitRate = 0; | ||
| 2096 | |||
| 2097 | /* Rational DTO for MCLK source (static MCLK rate), | ||
| 2098 | Dynamic DTO for optimal grouping | ||
| 2099 | (avoid intra-packet gaps), | ||
| 2100 | DTO offset enable to sync TS burst with MSTRT */ | ||
| 2101 | fecOcDtoMode = (FEC_OC_DTO_MODE_DYNAMIC__M | | ||
| 2102 | FEC_OC_DTO_MODE_OFFSET_ENABLE__M); | ||
| 2103 | fecOcFctMode = (FEC_OC_FCT_MODE_RAT_ENA__M | | ||
| 2104 | FEC_OC_FCT_MODE_VIRT_ENA__M); | ||
| 2105 | |||
| 2106 | /* Check user defined bitrate */ | ||
| 2107 | bitRate = maxBitRate; | ||
| 2108 | if (bitRate > 75900000UL) { /* max is 75.9 Mb/s */ | ||
| 2109 | bitRate = 75900000UL; | ||
| 2110 | } | ||
| 2111 | /* Rational DTO period: | ||
| 2112 | dto_period = (Fsys / bitrate) - 2 | ||
| 2113 | |||
| 2114 | Result should be floored, | ||
| 2115 | to make sure >= requested bitrate | ||
| 2116 | */ | ||
| 2117 | fecOcDtoPeriod = (u16) (((state->m_sysClockFreq) | ||
| 2118 | * 1000) / bitRate); | ||
| 2119 | if (fecOcDtoPeriod <= 2) | ||
| 2120 | fecOcDtoPeriod = 0; | ||
| 2121 | else | ||
| 2122 | fecOcDtoPeriod -= 2; | ||
| 2123 | fecOcTmdIntUpdRate = 8; | ||
| 2124 | } else { | ||
| 2125 | /* (commonAttr->staticCLK == false) => dynamic mode */ | ||
| 2126 | fecOcDtoMode = FEC_OC_DTO_MODE_DYNAMIC__M; | ||
| 2127 | fecOcFctMode = FEC_OC_FCT_MODE__PRE; | ||
| 2128 | fecOcTmdIntUpdRate = 5; | ||
| 2129 | } | ||
| 2130 | |||
| 2131 | /* Write appropriate registers with requested configuration */ | ||
| 2132 | status = write16(state, FEC_OC_DTO_BURST_LEN__A, fecOcDtoBurstLen); | ||
| 2133 | if (status < 0) | ||
| 2134 | goto error; | ||
| 2135 | status = write16(state, FEC_OC_DTO_PERIOD__A, fecOcDtoPeriod); | ||
| 2136 | if (status < 0) | ||
| 2137 | goto error; | ||
| 2138 | status = write16(state, FEC_OC_DTO_MODE__A, fecOcDtoMode); | ||
| 2139 | if (status < 0) | ||
| 2140 | goto error; | ||
| 2141 | status = write16(state, FEC_OC_FCT_MODE__A, fecOcFctMode); | ||
| 2142 | if (status < 0) | ||
| 2143 | goto error; | ||
| 2144 | status = write16(state, FEC_OC_MODE__A, fecOcRegMode); | ||
| 2145 | if (status < 0) | ||
| 2146 | goto error; | ||
| 2147 | status = write16(state, FEC_OC_IPR_MODE__A, fecOcRegIprMode); | ||
| 2148 | if (status < 0) | ||
| 2149 | goto error; | ||
| 2150 | |||
| 2151 | /* Rate integration settings */ | ||
| 2152 | status = write32(state, FEC_OC_RCN_CTL_RATE_LO__A, fecOcRcnCtlRate); | ||
| 2153 | if (status < 0) | ||
| 2154 | goto error; | ||
| 2155 | status = write16(state, FEC_OC_TMD_INT_UPD_RATE__A, fecOcTmdIntUpdRate); | ||
| 2156 | if (status < 0) | ||
| 2157 | goto error; | ||
| 2158 | status = write16(state, FEC_OC_TMD_MODE__A, fecOcTmdMode); | ||
| 2159 | error: | ||
| 2160 | if (status < 0) | ||
| 2161 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 2162 | return status; | ||
| 2163 | } | ||
| 2164 | |||
| 2165 | static int MPEGTSConfigurePolarity(struct drxk_state *state) | ||
| 2166 | { | ||
| 2167 | u16 fecOcRegIprInvert = 0; | ||
| 2168 | |||
| 2169 | /* Data mask for the output data byte */ | ||
| 2170 | u16 InvertDataMask = | ||
| 2171 | FEC_OC_IPR_INVERT_MD7__M | FEC_OC_IPR_INVERT_MD6__M | | ||
| 2172 | FEC_OC_IPR_INVERT_MD5__M | FEC_OC_IPR_INVERT_MD4__M | | ||
| 2173 | FEC_OC_IPR_INVERT_MD3__M | FEC_OC_IPR_INVERT_MD2__M | | ||
| 2174 | FEC_OC_IPR_INVERT_MD1__M | FEC_OC_IPR_INVERT_MD0__M; | ||
| 2175 | |||
| 2176 | dprintk(1, "\n"); | ||
| 2177 | |||
| 2178 | /* Control selective inversion of output bits */ | ||
| 2179 | fecOcRegIprInvert &= (~(InvertDataMask)); | ||
| 2180 | if (state->m_invertDATA == true) | ||
| 2181 | fecOcRegIprInvert |= InvertDataMask; | ||
| 2182 | fecOcRegIprInvert &= (~(FEC_OC_IPR_INVERT_MERR__M)); | ||
| 2183 | if (state->m_invertERR == true) | ||
| 2184 | fecOcRegIprInvert |= FEC_OC_IPR_INVERT_MERR__M; | ||
| 2185 | fecOcRegIprInvert &= (~(FEC_OC_IPR_INVERT_MSTRT__M)); | ||
| 2186 | if (state->m_invertSTR == true) | ||
| 2187 | fecOcRegIprInvert |= FEC_OC_IPR_INVERT_MSTRT__M; | ||
| 2188 | fecOcRegIprInvert &= (~(FEC_OC_IPR_INVERT_MVAL__M)); | ||
| 2189 | if (state->m_invertVAL == true) | ||
| 2190 | fecOcRegIprInvert |= FEC_OC_IPR_INVERT_MVAL__M; | ||
| 2191 | fecOcRegIprInvert &= (~(FEC_OC_IPR_INVERT_MCLK__M)); | ||
| 2192 | if (state->m_invertCLK == true) | ||
| 2193 | fecOcRegIprInvert |= FEC_OC_IPR_INVERT_MCLK__M; | ||
| 2194 | |||
| 2195 | return write16(state, FEC_OC_IPR_INVERT__A, fecOcRegIprInvert); | ||
| 2196 | } | ||
| 2197 | |||
| 2198 | #define SCU_RAM_AGC_KI_INV_RF_POL__M 0x4000 | ||
| 2199 | |||
| 2200 | static int SetAgcRf(struct drxk_state *state, | ||
| 2201 | struct SCfgAgc *pAgcCfg, bool isDTV) | ||
| 2202 | { | ||
| 2203 | int status = -EINVAL; | ||
| 2204 | u16 data = 0; | ||
| 2205 | struct SCfgAgc *pIfAgcSettings; | ||
| 2206 | |||
| 2207 | dprintk(1, "\n"); | ||
| 2208 | |||
| 2209 | if (pAgcCfg == NULL) | ||
| 2210 | goto error; | ||
| 2211 | |||
| 2212 | switch (pAgcCfg->ctrlMode) { | ||
| 2213 | case DRXK_AGC_CTRL_AUTO: | ||
| 2214 | /* Enable RF AGC DAC */ | ||
| 2215 | status = read16(state, IQM_AF_STDBY__A, &data); | ||
| 2216 | if (status < 0) | ||
| 2217 | goto error; | ||
| 2218 | data &= ~IQM_AF_STDBY_STDBY_TAGC_RF_STANDBY; | ||
| 2219 | status = write16(state, IQM_AF_STDBY__A, data); | ||
| 2220 | if (status < 0) | ||
| 2221 | goto error; | ||
| 2222 | status = read16(state, SCU_RAM_AGC_CONFIG__A, &data); | ||
| 2223 | if (status < 0) | ||
| 2224 | goto error; | ||
| 2225 | |||
| 2226 | /* Enable SCU RF AGC loop */ | ||
| 2227 | data &= ~SCU_RAM_AGC_CONFIG_DISABLE_RF_AGC__M; | ||
| 2228 | |||
| 2229 | /* Polarity */ | ||
| 2230 | if (state->m_RfAgcPol) | ||
| 2231 | data |= SCU_RAM_AGC_CONFIG_INV_RF_POL__M; | ||
| 2232 | else | ||
| 2233 | data &= ~SCU_RAM_AGC_CONFIG_INV_RF_POL__M; | ||
| 2234 | status = write16(state, SCU_RAM_AGC_CONFIG__A, data); | ||
| 2235 | if (status < 0) | ||
| 2236 | goto error; | ||
| 2237 | |||
| 2238 | /* Set speed (using complementary reduction value) */ | ||
| 2239 | status = read16(state, SCU_RAM_AGC_KI_RED__A, &data); | ||
| 2240 | if (status < 0) | ||
| 2241 | goto error; | ||
| 2242 | |||
| 2243 | data &= ~SCU_RAM_AGC_KI_RED_RAGC_RED__M; | ||
| 2244 | data |= (~(pAgcCfg->speed << | ||
| 2245 | SCU_RAM_AGC_KI_RED_RAGC_RED__B) | ||
| 2246 | & SCU_RAM_AGC_KI_RED_RAGC_RED__M); | ||
| 2247 | |||
| 2248 | status = write16(state, SCU_RAM_AGC_KI_RED__A, data); | ||
| 2249 | if (status < 0) | ||
| 2250 | goto error; | ||
| 2251 | |||
| 2252 | if (IsDVBT(state)) | ||
| 2253 | pIfAgcSettings = &state->m_dvbtIfAgcCfg; | ||
| 2254 | else if (IsQAM(state)) | ||
| 2255 | pIfAgcSettings = &state->m_qamIfAgcCfg; | ||
| 2256 | else | ||
| 2257 | pIfAgcSettings = &state->m_atvIfAgcCfg; | ||
| 2258 | if (pIfAgcSettings == NULL) { | ||
| 2259 | status = -EINVAL; | ||
| 2260 | goto error; | ||
| 2261 | } | ||
| 2262 | |||
| 2263 | /* Set TOP, only if IF-AGC is in AUTO mode */ | ||
| 2264 | if (pIfAgcSettings->ctrlMode == DRXK_AGC_CTRL_AUTO) | ||
| 2265 | status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MAX__A, pAgcCfg->top); | ||
| 2266 | if (status < 0) | ||
| 2267 | goto error; | ||
| 2268 | |||
| 2269 | /* Cut-Off current */ | ||
| 2270 | status = write16(state, SCU_RAM_AGC_RF_IACCU_HI_CO__A, pAgcCfg->cutOffCurrent); | ||
| 2271 | if (status < 0) | ||
| 2272 | goto error; | ||
| 2273 | |||
| 2274 | /* Max. output level */ | ||
| 2275 | status = write16(state, SCU_RAM_AGC_RF_MAX__A, pAgcCfg->maxOutputLevel); | ||
| 2276 | if (status < 0) | ||
| 2277 | goto error; | ||
| 2278 | |||
| 2279 | break; | ||
| 2280 | |||
| 2281 | case DRXK_AGC_CTRL_USER: | ||
| 2282 | /* Enable RF AGC DAC */ | ||
| 2283 | status = read16(state, IQM_AF_STDBY__A, &data); | ||
| 2284 | if (status < 0) | ||
| 2285 | goto error; | ||
| 2286 | data &= ~IQM_AF_STDBY_STDBY_TAGC_RF_STANDBY; | ||
| 2287 | status = write16(state, IQM_AF_STDBY__A, data); | ||
| 2288 | if (status < 0) | ||
| 2289 | goto error; | ||
| 2290 | |||
| 2291 | /* Disable SCU RF AGC loop */ | ||
| 2292 | status = read16(state, SCU_RAM_AGC_CONFIG__A, &data); | ||
| 2293 | if (status < 0) | ||
| 2294 | goto error; | ||
| 2295 | data |= SCU_RAM_AGC_CONFIG_DISABLE_RF_AGC__M; | ||
| 2296 | if (state->m_RfAgcPol) | ||
| 2297 | data |= SCU_RAM_AGC_CONFIG_INV_RF_POL__M; | ||
| 2298 | else | ||
| 2299 | data &= ~SCU_RAM_AGC_CONFIG_INV_RF_POL__M; | ||
| 2300 | status = write16(state, SCU_RAM_AGC_CONFIG__A, data); | ||
| 2301 | if (status < 0) | ||
| 2302 | goto error; | ||
| 2303 | |||
| 2304 | /* SCU c.o.c. to 0, enabling full control range */ | ||
| 2305 | status = write16(state, SCU_RAM_AGC_RF_IACCU_HI_CO__A, 0); | ||
| 2306 | if (status < 0) | ||
| 2307 | goto error; | ||
| 2308 | |||
| 2309 | /* Write value to output pin */ | ||
| 2310 | status = write16(state, SCU_RAM_AGC_RF_IACCU_HI__A, pAgcCfg->outputLevel); | ||
| 2311 | if (status < 0) | ||
| 2312 | goto error; | ||
| 2313 | break; | ||
| 2314 | |||
| 2315 | case DRXK_AGC_CTRL_OFF: | ||
| 2316 | /* Disable RF AGC DAC */ | ||
| 2317 | status = read16(state, IQM_AF_STDBY__A, &data); | ||
| 2318 | if (status < 0) | ||
| 2319 | goto error; | ||
| 2320 | data |= IQM_AF_STDBY_STDBY_TAGC_RF_STANDBY; | ||
| 2321 | status = write16(state, IQM_AF_STDBY__A, data); | ||
| 2322 | if (status < 0) | ||
| 2323 | goto error; | ||
| 2324 | |||
| 2325 | /* Disable SCU RF AGC loop */ | ||
| 2326 | status = read16(state, SCU_RAM_AGC_CONFIG__A, &data); | ||
| 2327 | if (status < 0) | ||
| 2328 | goto error; | ||
| 2329 | data |= SCU_RAM_AGC_CONFIG_DISABLE_RF_AGC__M; | ||
| 2330 | status = write16(state, SCU_RAM_AGC_CONFIG__A, data); | ||
| 2331 | if (status < 0) | ||
| 2332 | goto error; | ||
| 2333 | break; | ||
| 2334 | |||
| 2335 | default: | ||
| 2336 | status = -EINVAL; | ||
| 2337 | |||
| 2338 | } | ||
| 2339 | error: | ||
| 2340 | if (status < 0) | ||
| 2341 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 2342 | return status; | ||
| 2343 | } | ||
| 2344 | |||
| 2345 | #define SCU_RAM_AGC_KI_INV_IF_POL__M 0x2000 | ||
| 2346 | |||
| 2347 | static int SetAgcIf(struct drxk_state *state, | ||
| 2348 | struct SCfgAgc *pAgcCfg, bool isDTV) | ||
| 2349 | { | ||
| 2350 | u16 data = 0; | ||
| 2351 | int status = 0; | ||
| 2352 | struct SCfgAgc *pRfAgcSettings; | ||
| 2353 | |||
| 2354 | dprintk(1, "\n"); | ||
| 2355 | |||
| 2356 | switch (pAgcCfg->ctrlMode) { | ||
| 2357 | case DRXK_AGC_CTRL_AUTO: | ||
| 2358 | |||
| 2359 | /* Enable IF AGC DAC */ | ||
| 2360 | status = read16(state, IQM_AF_STDBY__A, &data); | ||
| 2361 | if (status < 0) | ||
| 2362 | goto error; | ||
| 2363 | data &= ~IQM_AF_STDBY_STDBY_TAGC_IF_STANDBY; | ||
| 2364 | status = write16(state, IQM_AF_STDBY__A, data); | ||
| 2365 | if (status < 0) | ||
| 2366 | goto error; | ||
| 2367 | |||
| 2368 | status = read16(state, SCU_RAM_AGC_CONFIG__A, &data); | ||
| 2369 | if (status < 0) | ||
| 2370 | goto error; | ||
| 2371 | |||
| 2372 | /* Enable SCU IF AGC loop */ | ||
| 2373 | data &= ~SCU_RAM_AGC_CONFIG_DISABLE_IF_AGC__M; | ||
| 2374 | |||
| 2375 | /* Polarity */ | ||
| 2376 | if (state->m_IfAgcPol) | ||
| 2377 | data |= SCU_RAM_AGC_CONFIG_INV_IF_POL__M; | ||
| 2378 | else | ||
| 2379 | data &= ~SCU_RAM_AGC_CONFIG_INV_IF_POL__M; | ||
| 2380 | status = write16(state, SCU_RAM_AGC_CONFIG__A, data); | ||
| 2381 | if (status < 0) | ||
| 2382 | goto error; | ||
| 2383 | |||
| 2384 | /* Set speed (using complementary reduction value) */ | ||
| 2385 | status = read16(state, SCU_RAM_AGC_KI_RED__A, &data); | ||
| 2386 | if (status < 0) | ||
| 2387 | goto error; | ||
| 2388 | data &= ~SCU_RAM_AGC_KI_RED_IAGC_RED__M; | ||
| 2389 | data |= (~(pAgcCfg->speed << | ||
| 2390 | SCU_RAM_AGC_KI_RED_IAGC_RED__B) | ||
| 2391 | & SCU_RAM_AGC_KI_RED_IAGC_RED__M); | ||
| 2392 | |||
| 2393 | status = write16(state, SCU_RAM_AGC_KI_RED__A, data); | ||
| 2394 | if (status < 0) | ||
| 2395 | goto error; | ||
| 2396 | |||
| 2397 | if (IsQAM(state)) | ||
| 2398 | pRfAgcSettings = &state->m_qamRfAgcCfg; | ||
| 2399 | else | ||
| 2400 | pRfAgcSettings = &state->m_atvRfAgcCfg; | ||
| 2401 | if (pRfAgcSettings == NULL) | ||
| 2402 | return -1; | ||
| 2403 | /* Restore TOP */ | ||
| 2404 | status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MAX__A, pRfAgcSettings->top); | ||
| 2405 | if (status < 0) | ||
| 2406 | goto error; | ||
| 2407 | break; | ||
| 2408 | |||
| 2409 | case DRXK_AGC_CTRL_USER: | ||
| 2410 | |||
| 2411 | /* Enable IF AGC DAC */ | ||
| 2412 | status = read16(state, IQM_AF_STDBY__A, &data); | ||
| 2413 | if (status < 0) | ||
| 2414 | goto error; | ||
| 2415 | data &= ~IQM_AF_STDBY_STDBY_TAGC_IF_STANDBY; | ||
| 2416 | status = write16(state, IQM_AF_STDBY__A, data); | ||
| 2417 | if (status < 0) | ||
| 2418 | goto error; | ||
| 2419 | |||
| 2420 | status = read16(state, SCU_RAM_AGC_CONFIG__A, &data); | ||
| 2421 | if (status < 0) | ||
| 2422 | goto error; | ||
| 2423 | |||
| 2424 | /* Disable SCU IF AGC loop */ | ||
| 2425 | data |= SCU_RAM_AGC_CONFIG_DISABLE_IF_AGC__M; | ||
| 2426 | |||
| 2427 | /* Polarity */ | ||
| 2428 | if (state->m_IfAgcPol) | ||
| 2429 | data |= SCU_RAM_AGC_CONFIG_INV_IF_POL__M; | ||
| 2430 | else | ||
| 2431 | data &= ~SCU_RAM_AGC_CONFIG_INV_IF_POL__M; | ||
| 2432 | status = write16(state, SCU_RAM_AGC_CONFIG__A, data); | ||
| 2433 | if (status < 0) | ||
| 2434 | goto error; | ||
| 2435 | |||
| 2436 | /* Write value to output pin */ | ||
| 2437 | status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MAX__A, pAgcCfg->outputLevel); | ||
| 2438 | if (status < 0) | ||
| 2439 | goto error; | ||
| 2440 | break; | ||
| 2441 | |||
| 2442 | case DRXK_AGC_CTRL_OFF: | ||
| 2443 | |||
| 2444 | /* Disable If AGC DAC */ | ||
| 2445 | status = read16(state, IQM_AF_STDBY__A, &data); | ||
| 2446 | if (status < 0) | ||
| 2447 | goto error; | ||
| 2448 | data |= IQM_AF_STDBY_STDBY_TAGC_IF_STANDBY; | ||
| 2449 | status = write16(state, IQM_AF_STDBY__A, data); | ||
| 2450 | if (status < 0) | ||
| 2451 | goto error; | ||
| 2452 | |||
| 2453 | /* Disable SCU IF AGC loop */ | ||
| 2454 | status = read16(state, SCU_RAM_AGC_CONFIG__A, &data); | ||
| 2455 | if (status < 0) | ||
| 2456 | goto error; | ||
| 2457 | data |= SCU_RAM_AGC_CONFIG_DISABLE_IF_AGC__M; | ||
| 2458 | status = write16(state, SCU_RAM_AGC_CONFIG__A, data); | ||
| 2459 | if (status < 0) | ||
| 2460 | goto error; | ||
| 2461 | break; | ||
| 2462 | } /* switch (agcSettingsIf->ctrlMode) */ | ||
| 2463 | |||
| 2464 | /* always set the top to support | ||
| 2465 | configurations without if-loop */ | ||
| 2466 | status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MIN__A, pAgcCfg->top); | ||
| 2467 | error: | ||
| 2468 | if (status < 0) | ||
| 2469 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 2470 | return status; | ||
| 2471 | } | ||
| 2472 | |||
| 2473 | static int ReadIFAgc(struct drxk_state *state, u32 *pValue) | ||
| 2474 | { | ||
| 2475 | u16 agcDacLvl; | ||
| 2476 | int status; | ||
| 2477 | u16 Level = 0; | ||
| 2478 | |||
| 2479 | dprintk(1, "\n"); | ||
| 2480 | |||
| 2481 | status = read16(state, IQM_AF_AGC_IF__A, &agcDacLvl); | ||
| 2482 | if (status < 0) { | ||
| 2483 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 2484 | return status; | ||
| 2485 | } | ||
| 2486 | |||
| 2487 | *pValue = 0; | ||
| 2488 | |||
| 2489 | if (agcDacLvl > DRXK_AGC_DAC_OFFSET) | ||
| 2490 | Level = agcDacLvl - DRXK_AGC_DAC_OFFSET; | ||
| 2491 | if (Level < 14000) | ||
| 2492 | *pValue = (14000 - Level) / 4; | ||
| 2493 | else | ||
| 2494 | *pValue = 0; | ||
| 2495 | |||
| 2496 | return status; | ||
| 2497 | } | ||
| 2498 | |||
| 2499 | static int GetQAMSignalToNoise(struct drxk_state *state, | ||
| 2500 | s32 *pSignalToNoise) | ||
| 2501 | { | ||
| 2502 | int status = 0; | ||
| 2503 | u16 qamSlErrPower = 0; /* accum. error between | ||
| 2504 | raw and sliced symbols */ | ||
| 2505 | u32 qamSlSigPower = 0; /* used for MER, depends of | ||
| 2506 | QAM constellation */ | ||
| 2507 | u32 qamSlMer = 0; /* QAM MER */ | ||
| 2508 | |||
| 2509 | dprintk(1, "\n"); | ||
| 2510 | |||
| 2511 | /* MER calculation */ | ||
| 2512 | |||
| 2513 | /* get the register value needed for MER */ | ||
| 2514 | status = read16(state, QAM_SL_ERR_POWER__A, &qamSlErrPower); | ||
| 2515 | if (status < 0) { | ||
| 2516 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 2517 | return -EINVAL; | ||
| 2518 | } | ||
| 2519 | |||
| 2520 | switch (state->param.u.qam.modulation) { | ||
| 2521 | case QAM_16: | ||
| 2522 | qamSlSigPower = DRXK_QAM_SL_SIG_POWER_QAM16 << 2; | ||
| 2523 | break; | ||
| 2524 | case QAM_32: | ||
| 2525 | qamSlSigPower = DRXK_QAM_SL_SIG_POWER_QAM32 << 2; | ||
| 2526 | break; | ||
| 2527 | case QAM_64: | ||
| 2528 | qamSlSigPower = DRXK_QAM_SL_SIG_POWER_QAM64 << 2; | ||
| 2529 | break; | ||
| 2530 | case QAM_128: | ||
| 2531 | qamSlSigPower = DRXK_QAM_SL_SIG_POWER_QAM128 << 2; | ||
| 2532 | break; | ||
| 2533 | default: | ||
| 2534 | case QAM_256: | ||
| 2535 | qamSlSigPower = DRXK_QAM_SL_SIG_POWER_QAM256 << 2; | ||
| 2536 | break; | ||
| 2537 | } | ||
| 2538 | |||
| 2539 | if (qamSlErrPower > 0) { | ||
| 2540 | qamSlMer = Log10Times100(qamSlSigPower) - | ||
| 2541 | Log10Times100((u32) qamSlErrPower); | ||
| 2542 | } | ||
| 2543 | *pSignalToNoise = qamSlMer; | ||
| 2544 | |||
| 2545 | return status; | ||
| 2546 | } | ||
| 2547 | |||
| 2548 | static int GetDVBTSignalToNoise(struct drxk_state *state, | ||
| 2549 | s32 *pSignalToNoise) | ||
| 2550 | { | ||
| 2551 | int status; | ||
| 2552 | u16 regData = 0; | ||
| 2553 | u32 EqRegTdSqrErrI = 0; | ||
| 2554 | u32 EqRegTdSqrErrQ = 0; | ||
| 2555 | u16 EqRegTdSqrErrExp = 0; | ||
| 2556 | u16 EqRegTdTpsPwrOfs = 0; | ||
| 2557 | u16 EqRegTdReqSmbCnt = 0; | ||
| 2558 | u32 tpsCnt = 0; | ||
| 2559 | u32 SqrErrIQ = 0; | ||
| 2560 | u32 a = 0; | ||
| 2561 | u32 b = 0; | ||
| 2562 | u32 c = 0; | ||
| 2563 | u32 iMER = 0; | ||
| 2564 | u16 transmissionParams = 0; | ||
| 2565 | |||
| 2566 | dprintk(1, "\n"); | ||
| 2567 | |||
| 2568 | status = read16(state, OFDM_EQ_TOP_TD_TPS_PWR_OFS__A, &EqRegTdTpsPwrOfs); | ||
| 2569 | if (status < 0) | ||
| 2570 | goto error; | ||
| 2571 | status = read16(state, OFDM_EQ_TOP_TD_REQ_SMB_CNT__A, &EqRegTdReqSmbCnt); | ||
| 2572 | if (status < 0) | ||
| 2573 | goto error; | ||
| 2574 | status = read16(state, OFDM_EQ_TOP_TD_SQR_ERR_EXP__A, &EqRegTdSqrErrExp); | ||
| 2575 | if (status < 0) | ||
| 2576 | goto error; | ||
| 2577 | status = read16(state, OFDM_EQ_TOP_TD_SQR_ERR_I__A, ®Data); | ||
| 2578 | if (status < 0) | ||
| 2579 | goto error; | ||
| 2580 | /* Extend SQR_ERR_I operational range */ | ||
| 2581 | EqRegTdSqrErrI = (u32) regData; | ||
| 2582 | if ((EqRegTdSqrErrExp > 11) && | ||
| 2583 | (EqRegTdSqrErrI < 0x00000FFFUL)) { | ||
| 2584 | EqRegTdSqrErrI += 0x00010000UL; | ||
| 2585 | } | ||
| 2586 | status = read16(state, OFDM_EQ_TOP_TD_SQR_ERR_Q__A, ®Data); | ||
| 2587 | if (status < 0) | ||
| 2588 | goto error; | ||
| 2589 | /* Extend SQR_ERR_Q operational range */ | ||
| 2590 | EqRegTdSqrErrQ = (u32) regData; | ||
| 2591 | if ((EqRegTdSqrErrExp > 11) && | ||
| 2592 | (EqRegTdSqrErrQ < 0x00000FFFUL)) | ||
| 2593 | EqRegTdSqrErrQ += 0x00010000UL; | ||
| 2594 | |||
| 2595 | status = read16(state, OFDM_SC_RA_RAM_OP_PARAM__A, &transmissionParams); | ||
| 2596 | if (status < 0) | ||
| 2597 | goto error; | ||
| 2598 | |||
| 2599 | /* Check input data for MER */ | ||
| 2600 | |||
| 2601 | /* MER calculation (in 0.1 dB) without math.h */ | ||
| 2602 | if ((EqRegTdTpsPwrOfs == 0) || (EqRegTdReqSmbCnt == 0)) | ||
| 2603 | iMER = 0; | ||
| 2604 | else if ((EqRegTdSqrErrI + EqRegTdSqrErrQ) == 0) { | ||
| 2605 | /* No error at all, this must be the HW reset value | ||
| 2606 | * Apparently no first measurement yet | ||
| 2607 | * Set MER to 0.0 */ | ||
| 2608 | iMER = 0; | ||
| 2609 | } else { | ||
| 2610 | SqrErrIQ = (EqRegTdSqrErrI + EqRegTdSqrErrQ) << | ||
| 2611 | EqRegTdSqrErrExp; | ||
| 2612 | if ((transmissionParams & | ||
| 2613 | OFDM_SC_RA_RAM_OP_PARAM_MODE__M) | ||
| 2614 | == OFDM_SC_RA_RAM_OP_PARAM_MODE_2K) | ||
| 2615 | tpsCnt = 17; | ||
| 2616 | else | ||
| 2617 | tpsCnt = 68; | ||
| 2618 | |||
| 2619 | /* IMER = 100 * log10 (x) | ||
| 2620 | where x = (EqRegTdTpsPwrOfs^2 * | ||
| 2621 | EqRegTdReqSmbCnt * tpsCnt)/SqrErrIQ | ||
| 2622 | |||
| 2623 | => IMER = a + b -c | ||
| 2624 | where a = 100 * log10 (EqRegTdTpsPwrOfs^2) | ||
| 2625 | b = 100 * log10 (EqRegTdReqSmbCnt * tpsCnt) | ||
| 2626 | c = 100 * log10 (SqrErrIQ) | ||
| 2627 | */ | ||
| 2628 | |||
| 2629 | /* log(x) x = 9bits * 9bits->18 bits */ | ||
| 2630 | a = Log10Times100(EqRegTdTpsPwrOfs * | ||
| 2631 | EqRegTdTpsPwrOfs); | ||
| 2632 | /* log(x) x = 16bits * 7bits->23 bits */ | ||
| 2633 | b = Log10Times100(EqRegTdReqSmbCnt * tpsCnt); | ||
| 2634 | /* log(x) x = (16bits + 16bits) << 15 ->32 bits */ | ||
| 2635 | c = Log10Times100(SqrErrIQ); | ||
| 2636 | |||
| 2637 | iMER = a + b; | ||
| 2638 | /* No negative MER, clip to zero */ | ||
| 2639 | if (iMER > c) | ||
| 2640 | iMER -= c; | ||
| 2641 | else | ||
| 2642 | iMER = 0; | ||
| 2643 | } | ||
| 2644 | *pSignalToNoise = iMER; | ||
| 2645 | |||
| 2646 | error: | ||
| 2647 | if (status < 0) | ||
| 2648 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 2649 | return status; | ||
| 2650 | } | ||
| 2651 | |||
| 2652 | static int GetSignalToNoise(struct drxk_state *state, s32 *pSignalToNoise) | ||
| 2653 | { | ||
| 2654 | dprintk(1, "\n"); | ||
| 2655 | |||
| 2656 | *pSignalToNoise = 0; | ||
| 2657 | switch (state->m_OperationMode) { | ||
| 2658 | case OM_DVBT: | ||
| 2659 | return GetDVBTSignalToNoise(state, pSignalToNoise); | ||
| 2660 | case OM_QAM_ITU_A: | ||
| 2661 | case OM_QAM_ITU_C: | ||
| 2662 | return GetQAMSignalToNoise(state, pSignalToNoise); | ||
| 2663 | default: | ||
| 2664 | break; | ||
| 2665 | } | ||
| 2666 | return 0; | ||
| 2667 | } | ||
| 2668 | |||
| 2669 | #if 0 | ||
| 2670 | static int GetDVBTQuality(struct drxk_state *state, s32 *pQuality) | ||
| 2671 | { | ||
| 2672 | /* SNR Values for quasi errorfree reception rom Nordig 2.2 */ | ||
| 2673 | int status = 0; | ||
| 2674 | |||
| 2675 | dprintk(1, "\n"); | ||
| 2676 | |||
| 2677 | static s32 QE_SN[] = { | ||
| 2678 | 51, /* QPSK 1/2 */ | ||
| 2679 | 69, /* QPSK 2/3 */ | ||
| 2680 | 79, /* QPSK 3/4 */ | ||
| 2681 | 89, /* QPSK 5/6 */ | ||
| 2682 | 97, /* QPSK 7/8 */ | ||
| 2683 | 108, /* 16-QAM 1/2 */ | ||
| 2684 | 131, /* 16-QAM 2/3 */ | ||
| 2685 | 146, /* 16-QAM 3/4 */ | ||
| 2686 | 156, /* 16-QAM 5/6 */ | ||
| 2687 | 160, /* 16-QAM 7/8 */ | ||
| 2688 | 165, /* 64-QAM 1/2 */ | ||
| 2689 | 187, /* 64-QAM 2/3 */ | ||
| 2690 | 202, /* 64-QAM 3/4 */ | ||
| 2691 | 216, /* 64-QAM 5/6 */ | ||
| 2692 | 225, /* 64-QAM 7/8 */ | ||
| 2693 | }; | ||
| 2694 | |||
| 2695 | *pQuality = 0; | ||
| 2696 | |||
| 2697 | do { | ||
| 2698 | s32 SignalToNoise = 0; | ||
| 2699 | u16 Constellation = 0; | ||
| 2700 | u16 CodeRate = 0; | ||
| 2701 | u32 SignalToNoiseRel; | ||
| 2702 | u32 BERQuality; | ||
| 2703 | |||
| 2704 | status = GetDVBTSignalToNoise(state, &SignalToNoise); | ||
| 2705 | if (status < 0) | ||
| 2706 | break; | ||
| 2707 | status = read16(state, OFDM_EQ_TOP_TD_TPS_CONST__A, &Constellation); | ||
| 2708 | if (status < 0) | ||
| 2709 | break; | ||
| 2710 | Constellation &= OFDM_EQ_TOP_TD_TPS_CONST__M; | ||
| 2711 | |||
| 2712 | status = read16(state, OFDM_EQ_TOP_TD_TPS_CODE_HP__A, &CodeRate); | ||
| 2713 | if (status < 0) | ||
| 2714 | break; | ||
| 2715 | CodeRate &= OFDM_EQ_TOP_TD_TPS_CODE_HP__M; | ||
| 2716 | |||
| 2717 | if (Constellation > OFDM_EQ_TOP_TD_TPS_CONST_64QAM || | ||
| 2718 | CodeRate > OFDM_EQ_TOP_TD_TPS_CODE_LP_7_8) | ||
| 2719 | break; | ||
| 2720 | SignalToNoiseRel = SignalToNoise - | ||
| 2721 | QE_SN[Constellation * 5 + CodeRate]; | ||
| 2722 | BERQuality = 100; | ||
| 2723 | |||
| 2724 | if (SignalToNoiseRel < -70) | ||
| 2725 | *pQuality = 0; | ||
| 2726 | else if (SignalToNoiseRel < 30) | ||
| 2727 | *pQuality = ((SignalToNoiseRel + 70) * | ||
| 2728 | BERQuality) / 100; | ||
| 2729 | else | ||
| 2730 | *pQuality = BERQuality; | ||
| 2731 | } while (0); | ||
| 2732 | return 0; | ||
| 2733 | }; | ||
| 2734 | |||
| 2735 | static int GetDVBCQuality(struct drxk_state *state, s32 *pQuality) | ||
| 2736 | { | ||
| 2737 | int status = 0; | ||
| 2738 | *pQuality = 0; | ||
| 2739 | |||
| 2740 | dprintk(1, "\n"); | ||
| 2741 | |||
| 2742 | do { | ||
| 2743 | u32 SignalToNoise = 0; | ||
| 2744 | u32 BERQuality = 100; | ||
| 2745 | u32 SignalToNoiseRel = 0; | ||
| 2746 | |||
| 2747 | status = GetQAMSignalToNoise(state, &SignalToNoise); | ||
| 2748 | if (status < 0) | ||
| 2749 | break; | ||
| 2750 | |||
| 2751 | switch (state->param.u.qam.modulation) { | ||
| 2752 | case QAM_16: | ||
| 2753 | SignalToNoiseRel = SignalToNoise - 200; | ||
| 2754 | break; | ||
| 2755 | case QAM_32: | ||
| 2756 | SignalToNoiseRel = SignalToNoise - 230; | ||
| 2757 | break; /* Not in NorDig */ | ||
| 2758 | case QAM_64: | ||
| 2759 | SignalToNoiseRel = SignalToNoise - 260; | ||
| 2760 | break; | ||
| 2761 | case QAM_128: | ||
| 2762 | SignalToNoiseRel = SignalToNoise - 290; | ||
| 2763 | break; | ||
| 2764 | default: | ||
| 2765 | case QAM_256: | ||
| 2766 | SignalToNoiseRel = SignalToNoise - 320; | ||
| 2767 | break; | ||
| 2768 | } | ||
| 2769 | |||
| 2770 | if (SignalToNoiseRel < -70) | ||
| 2771 | *pQuality = 0; | ||
| 2772 | else if (SignalToNoiseRel < 30) | ||
| 2773 | *pQuality = ((SignalToNoiseRel + 70) * | ||
| 2774 | BERQuality) / 100; | ||
| 2775 | else | ||
| 2776 | *pQuality = BERQuality; | ||
| 2777 | } while (0); | ||
| 2778 | |||
| 2779 | return status; | ||
| 2780 | } | ||
| 2781 | |||
| 2782 | static int GetQuality(struct drxk_state *state, s32 *pQuality) | ||
| 2783 | { | ||
| 2784 | dprintk(1, "\n"); | ||
| 2785 | |||
| 2786 | switch (state->m_OperationMode) { | ||
| 2787 | case OM_DVBT: | ||
| 2788 | return GetDVBTQuality(state, pQuality); | ||
| 2789 | case OM_QAM_ITU_A: | ||
| 2790 | return GetDVBCQuality(state, pQuality); | ||
| 2791 | default: | ||
| 2792 | break; | ||
| 2793 | } | ||
| 2794 | |||
| 2795 | return 0; | ||
| 2796 | } | ||
| 2797 | #endif | ||
| 2798 | |||
| 2799 | /* Free data ram in SIO HI */ | ||
| 2800 | #define SIO_HI_RA_RAM_USR_BEGIN__A 0x420040 | ||
| 2801 | #define SIO_HI_RA_RAM_USR_END__A 0x420060 | ||
| 2802 | |||
| 2803 | #define DRXK_HI_ATOMIC_BUF_START (SIO_HI_RA_RAM_USR_BEGIN__A) | ||
| 2804 | #define DRXK_HI_ATOMIC_BUF_END (SIO_HI_RA_RAM_USR_BEGIN__A + 7) | ||
| 2805 | #define DRXK_HI_ATOMIC_READ SIO_HI_RA_RAM_PAR_3_ACP_RW_READ | ||
| 2806 | #define DRXK_HI_ATOMIC_WRITE SIO_HI_RA_RAM_PAR_3_ACP_RW_WRITE | ||
| 2807 | |||
| 2808 | #define DRXDAP_FASI_ADDR2BLOCK(addr) (((addr) >> 22) & 0x3F) | ||
| 2809 | #define DRXDAP_FASI_ADDR2BANK(addr) (((addr) >> 16) & 0x3F) | ||
| 2810 | #define DRXDAP_FASI_ADDR2OFFSET(addr) ((addr) & 0x7FFF) | ||
| 2811 | |||
| 2812 | static int ConfigureI2CBridge(struct drxk_state *state, bool bEnableBridge) | ||
| 2813 | { | ||
| 2814 | int status = -EINVAL; | ||
| 2815 | |||
| 2816 | dprintk(1, "\n"); | ||
| 2817 | |||
| 2818 | if (state->m_DrxkState == DRXK_UNINITIALIZED) | ||
| 2819 | goto error; | ||
| 2820 | if (state->m_DrxkState == DRXK_POWERED_DOWN) | ||
| 2821 | goto error; | ||
| 2822 | |||
| 2823 | if (state->no_i2c_bridge) | ||
| 2824 | return 0; | ||
| 2825 | |||
| 2826 | status = write16(state, SIO_HI_RA_RAM_PAR_1__A, SIO_HI_RA_RAM_PAR_1_PAR1_SEC_KEY); | ||
| 2827 | if (status < 0) | ||
| 2828 | goto error; | ||
| 2829 | if (bEnableBridge) { | ||
| 2830 | status = write16(state, SIO_HI_RA_RAM_PAR_2__A, SIO_HI_RA_RAM_PAR_2_BRD_CFG_CLOSED); | ||
| 2831 | if (status < 0) | ||
| 2832 | goto error; | ||
| 2833 | } else { | ||
| 2834 | status = write16(state, SIO_HI_RA_RAM_PAR_2__A, SIO_HI_RA_RAM_PAR_2_BRD_CFG_OPEN); | ||
| 2835 | if (status < 0) | ||
| 2836 | goto error; | ||
| 2837 | } | ||
| 2838 | |||
| 2839 | status = HI_Command(state, SIO_HI_RA_RAM_CMD_BRDCTRL, 0); | ||
| 2840 | |||
| 2841 | error: | ||
| 2842 | if (status < 0) | ||
| 2843 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 2844 | return status; | ||
| 2845 | } | ||
| 2846 | |||
| 2847 | static int SetPreSaw(struct drxk_state *state, | ||
| 2848 | struct SCfgPreSaw *pPreSawCfg) | ||
| 2849 | { | ||
| 2850 | int status = -EINVAL; | ||
| 2851 | |||
| 2852 | dprintk(1, "\n"); | ||
| 2853 | |||
| 2854 | if ((pPreSawCfg == NULL) | ||
| 2855 | || (pPreSawCfg->reference > IQM_AF_PDREF__M)) | ||
| 2856 | goto error; | ||
| 2857 | |||
| 2858 | status = write16(state, IQM_AF_PDREF__A, pPreSawCfg->reference); | ||
| 2859 | error: | ||
| 2860 | if (status < 0) | ||
| 2861 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 2862 | return status; | ||
| 2863 | } | ||
| 2864 | |||
| 2865 | static int BLDirectCmd(struct drxk_state *state, u32 targetAddr, | ||
| 2866 | u16 romOffset, u16 nrOfElements, u32 timeOut) | ||
| 2867 | { | ||
| 2868 | u16 blStatus = 0; | ||
| 2869 | u16 offset = (u16) ((targetAddr >> 0) & 0x00FFFF); | ||
| 2870 | u16 blockbank = (u16) ((targetAddr >> 16) & 0x000FFF); | ||
| 2871 | int status; | ||
| 2872 | unsigned long end; | ||
| 2873 | |||
| 2874 | dprintk(1, "\n"); | ||
| 2875 | |||
| 2876 | mutex_lock(&state->mutex); | ||
| 2877 | status = write16(state, SIO_BL_MODE__A, SIO_BL_MODE_DIRECT); | ||
| 2878 | if (status < 0) | ||
| 2879 | goto error; | ||
| 2880 | status = write16(state, SIO_BL_TGT_HDR__A, blockbank); | ||
| 2881 | if (status < 0) | ||
| 2882 | goto error; | ||
| 2883 | status = write16(state, SIO_BL_TGT_ADDR__A, offset); | ||
| 2884 | if (status < 0) | ||
| 2885 | goto error; | ||
| 2886 | status = write16(state, SIO_BL_SRC_ADDR__A, romOffset); | ||
| 2887 | if (status < 0) | ||
| 2888 | goto error; | ||
| 2889 | status = write16(state, SIO_BL_SRC_LEN__A, nrOfElements); | ||
| 2890 | if (status < 0) | ||
| 2891 | goto error; | ||
| 2892 | status = write16(state, SIO_BL_ENABLE__A, SIO_BL_ENABLE_ON); | ||
| 2893 | if (status < 0) | ||
| 2894 | goto error; | ||
| 2895 | |||
| 2896 | end = jiffies + msecs_to_jiffies(timeOut); | ||
| 2897 | do { | ||
| 2898 | status = read16(state, SIO_BL_STATUS__A, &blStatus); | ||
| 2899 | if (status < 0) | ||
| 2900 | goto error; | ||
| 2901 | } while ((blStatus == 0x1) && time_is_after_jiffies(end)); | ||
| 2902 | if (blStatus == 0x1) { | ||
| 2903 | printk(KERN_ERR "drxk: SIO not ready\n"); | ||
| 2904 | status = -EINVAL; | ||
| 2905 | goto error2; | ||
| 2906 | } | ||
| 2907 | error: | ||
| 2908 | if (status < 0) | ||
| 2909 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 2910 | error2: | ||
| 2911 | mutex_unlock(&state->mutex); | ||
| 2912 | return status; | ||
| 2913 | |||
| 2914 | } | ||
| 2915 | |||
| 2916 | static int ADCSyncMeasurement(struct drxk_state *state, u16 *count) | ||
| 2917 | { | ||
| 2918 | u16 data = 0; | ||
| 2919 | int status; | ||
| 2920 | |||
| 2921 | dprintk(1, "\n"); | ||
| 2922 | |||
| 2923 | /* Start measurement */ | ||
| 2924 | status = write16(state, IQM_AF_COMM_EXEC__A, IQM_AF_COMM_EXEC_ACTIVE); | ||
| 2925 | if (status < 0) | ||
| 2926 | goto error; | ||
| 2927 | status = write16(state, IQM_AF_START_LOCK__A, 1); | ||
| 2928 | if (status < 0) | ||
| 2929 | goto error; | ||
| 2930 | |||
| 2931 | *count = 0; | ||
| 2932 | status = read16(state, IQM_AF_PHASE0__A, &data); | ||
| 2933 | if (status < 0) | ||
| 2934 | goto error; | ||
| 2935 | if (data == 127) | ||
| 2936 | *count = *count + 1; | ||
| 2937 | status = read16(state, IQM_AF_PHASE1__A, &data); | ||
| 2938 | if (status < 0) | ||
| 2939 | goto error; | ||
| 2940 | if (data == 127) | ||
| 2941 | *count = *count + 1; | ||
| 2942 | status = read16(state, IQM_AF_PHASE2__A, &data); | ||
| 2943 | if (status < 0) | ||
| 2944 | goto error; | ||
| 2945 | if (data == 127) | ||
| 2946 | *count = *count + 1; | ||
| 2947 | |||
| 2948 | error: | ||
| 2949 | if (status < 0) | ||
| 2950 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 2951 | return status; | ||
| 2952 | } | ||
| 2953 | |||
| 2954 | static int ADCSynchronization(struct drxk_state *state) | ||
| 2955 | { | ||
| 2956 | u16 count = 0; | ||
| 2957 | int status; | ||
| 2958 | |||
| 2959 | dprintk(1, "\n"); | ||
| 2960 | |||
| 2961 | status = ADCSyncMeasurement(state, &count); | ||
| 2962 | if (status < 0) | ||
| 2963 | goto error; | ||
| 2964 | |||
| 2965 | if (count == 1) { | ||
| 2966 | /* Try sampling on a diffrent edge */ | ||
| 2967 | u16 clkNeg = 0; | ||
| 2968 | |||
| 2969 | status = read16(state, IQM_AF_CLKNEG__A, &clkNeg); | ||
| 2970 | if (status < 0) | ||
| 2971 | goto error; | ||
| 2972 | if ((clkNeg | IQM_AF_CLKNEG_CLKNEGDATA__M) == | ||
| 2973 | IQM_AF_CLKNEG_CLKNEGDATA_CLK_ADC_DATA_POS) { | ||
| 2974 | clkNeg &= (~(IQM_AF_CLKNEG_CLKNEGDATA__M)); | ||
| 2975 | clkNeg |= | ||
| 2976 | IQM_AF_CLKNEG_CLKNEGDATA_CLK_ADC_DATA_NEG; | ||
| 2977 | } else { | ||
| 2978 | clkNeg &= (~(IQM_AF_CLKNEG_CLKNEGDATA__M)); | ||
| 2979 | clkNeg |= | ||
| 2980 | IQM_AF_CLKNEG_CLKNEGDATA_CLK_ADC_DATA_POS; | ||
| 2981 | } | ||
| 2982 | status = write16(state, IQM_AF_CLKNEG__A, clkNeg); | ||
| 2983 | if (status < 0) | ||
| 2984 | goto error; | ||
| 2985 | status = ADCSyncMeasurement(state, &count); | ||
| 2986 | if (status < 0) | ||
| 2987 | goto error; | ||
| 2988 | } | ||
| 2989 | |||
| 2990 | if (count < 2) | ||
| 2991 | status = -EINVAL; | ||
| 2992 | error: | ||
| 2993 | if (status < 0) | ||
| 2994 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 2995 | return status; | ||
| 2996 | } | ||
| 2997 | |||
| 2998 | static int SetFrequencyShifter(struct drxk_state *state, | ||
| 2999 | u16 intermediateFreqkHz, | ||
| 3000 | s32 tunerFreqOffset, bool isDTV) | ||
| 3001 | { | ||
| 3002 | bool selectPosImage = false; | ||
| 3003 | u32 rfFreqResidual = tunerFreqOffset; | ||
| 3004 | u32 fmFrequencyShift = 0; | ||
| 3005 | bool tunerMirror = !state->m_bMirrorFreqSpect; | ||
| 3006 | u32 adcFreq; | ||
| 3007 | bool adcFlip; | ||
| 3008 | int status; | ||
| 3009 | u32 ifFreqActual; | ||
| 3010 | u32 samplingFrequency = (u32) (state->m_sysClockFreq / 3); | ||
| 3011 | u32 frequencyShift; | ||
| 3012 | bool imageToSelect; | ||
| 3013 | |||
| 3014 | dprintk(1, "\n"); | ||
| 3015 | |||
| 3016 | /* | ||
| 3017 | Program frequency shifter | ||
| 3018 | No need to account for mirroring on RF | ||
| 3019 | */ | ||
| 3020 | if (isDTV) { | ||
| 3021 | if ((state->m_OperationMode == OM_QAM_ITU_A) || | ||
| 3022 | (state->m_OperationMode == OM_QAM_ITU_C) || | ||
| 3023 | (state->m_OperationMode == OM_DVBT)) | ||
| 3024 | selectPosImage = true; | ||
| 3025 | else | ||
| 3026 | selectPosImage = false; | ||
| 3027 | } | ||
| 3028 | if (tunerMirror) | ||
| 3029 | /* tuner doesn't mirror */ | ||
| 3030 | ifFreqActual = intermediateFreqkHz + | ||
| 3031 | rfFreqResidual + fmFrequencyShift; | ||
| 3032 | else | ||
| 3033 | /* tuner mirrors */ | ||
| 3034 | ifFreqActual = intermediateFreqkHz - | ||
| 3035 | rfFreqResidual - fmFrequencyShift; | ||
| 3036 | if (ifFreqActual > samplingFrequency / 2) { | ||
| 3037 | /* adc mirrors */ | ||
| 3038 | adcFreq = samplingFrequency - ifFreqActual; | ||
| 3039 | adcFlip = true; | ||
| 3040 | } else { | ||
| 3041 | /* adc doesn't mirror */ | ||
| 3042 | adcFreq = ifFreqActual; | ||
| 3043 | adcFlip = false; | ||
| 3044 | } | ||
| 3045 | |||
| 3046 | frequencyShift = adcFreq; | ||
| 3047 | imageToSelect = state->m_rfmirror ^ tunerMirror ^ | ||
| 3048 | adcFlip ^ selectPosImage; | ||
| 3049 | state->m_IqmFsRateOfs = | ||
| 3050 | Frac28a((frequencyShift), samplingFrequency); | ||
| 3051 | |||
| 3052 | if (imageToSelect) | ||
| 3053 | state->m_IqmFsRateOfs = ~state->m_IqmFsRateOfs + 1; | ||
| 3054 | |||
| 3055 | /* Program frequency shifter with tuner offset compensation */ | ||
| 3056 | /* frequencyShift += tunerFreqOffset; TODO */ | ||
| 3057 | status = write32(state, IQM_FS_RATE_OFS_LO__A, | ||
| 3058 | state->m_IqmFsRateOfs); | ||
| 3059 | if (status < 0) | ||
| 3060 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 3061 | return status; | ||
| 3062 | } | ||
| 3063 | |||
| 3064 | static int InitAGC(struct drxk_state *state, bool isDTV) | ||
| 3065 | { | ||
| 3066 | u16 ingainTgt = 0; | ||
| 3067 | u16 ingainTgtMin = 0; | ||
| 3068 | u16 ingainTgtMax = 0; | ||
| 3069 | u16 clpCyclen = 0; | ||
| 3070 | u16 clpSumMin = 0; | ||
| 3071 | u16 clpDirTo = 0; | ||
| 3072 | u16 snsSumMin = 0; | ||
| 3073 | u16 snsSumMax = 0; | ||
| 3074 | u16 clpSumMax = 0; | ||
| 3075 | u16 snsDirTo = 0; | ||
| 3076 | u16 kiInnergainMin = 0; | ||
| 3077 | u16 ifIaccuHiTgt = 0; | ||
| 3078 | u16 ifIaccuHiTgtMin = 0; | ||
| 3079 | u16 ifIaccuHiTgtMax = 0; | ||
| 3080 | u16 data = 0; | ||
| 3081 | u16 fastClpCtrlDelay = 0; | ||
| 3082 | u16 clpCtrlMode = 0; | ||
| 3083 | int status = 0; | ||
| 3084 | |||
| 3085 | dprintk(1, "\n"); | ||
| 3086 | |||
| 3087 | /* Common settings */ | ||
| 3088 | snsSumMax = 1023; | ||
| 3089 | ifIaccuHiTgtMin = 2047; | ||
| 3090 | clpCyclen = 500; | ||
| 3091 | clpSumMax = 1023; | ||
| 3092 | |||
| 3093 | /* AGCInit() not available for DVBT; init done in microcode */ | ||
| 3094 | if (!IsQAM(state)) { | ||
| 3095 | printk(KERN_ERR "drxk: %s: mode %d is not DVB-C\n", __func__, state->m_OperationMode); | ||
| 3096 | return -EINVAL; | ||
| 3097 | } | ||
| 3098 | |||
| 3099 | /* FIXME: Analog TV AGC require different settings */ | ||
| 3100 | |||
| 3101 | /* Standard specific settings */ | ||
| 3102 | clpSumMin = 8; | ||
| 3103 | clpDirTo = (u16) -9; | ||
| 3104 | clpCtrlMode = 0; | ||
| 3105 | snsSumMin = 8; | ||
| 3106 | snsDirTo = (u16) -9; | ||
| 3107 | kiInnergainMin = (u16) -1030; | ||
| 3108 | ifIaccuHiTgtMax = 0x2380; | ||
| 3109 | ifIaccuHiTgt = 0x2380; | ||
| 3110 | ingainTgtMin = 0x0511; | ||
| 3111 | ingainTgt = 0x0511; | ||
| 3112 | ingainTgtMax = 5119; | ||
| 3113 | fastClpCtrlDelay = state->m_qamIfAgcCfg.FastClipCtrlDelay; | ||
| 3114 | |||
| 3115 | status = write16(state, SCU_RAM_AGC_FAST_CLP_CTRL_DELAY__A, fastClpCtrlDelay); | ||
| 3116 | if (status < 0) | ||
| 3117 | goto error; | ||
| 3118 | |||
| 3119 | status = write16(state, SCU_RAM_AGC_CLP_CTRL_MODE__A, clpCtrlMode); | ||
| 3120 | if (status < 0) | ||
| 3121 | goto error; | ||
| 3122 | status = write16(state, SCU_RAM_AGC_INGAIN_TGT__A, ingainTgt); | ||
| 3123 | if (status < 0) | ||
| 3124 | goto error; | ||
| 3125 | status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MIN__A, ingainTgtMin); | ||
| 3126 | if (status < 0) | ||
| 3127 | goto error; | ||
| 3128 | status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MAX__A, ingainTgtMax); | ||
| 3129 | if (status < 0) | ||
| 3130 | goto error; | ||
| 3131 | status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MIN__A, ifIaccuHiTgtMin); | ||
| 3132 | if (status < 0) | ||
| 3133 | goto error; | ||
| 3134 | status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MAX__A, ifIaccuHiTgtMax); | ||
| 3135 | if (status < 0) | ||
| 3136 | goto error; | ||
| 3137 | status = write16(state, SCU_RAM_AGC_IF_IACCU_HI__A, 0); | ||
| 3138 | if (status < 0) | ||
| 3139 | goto error; | ||
| 3140 | status = write16(state, SCU_RAM_AGC_IF_IACCU_LO__A, 0); | ||
| 3141 | if (status < 0) | ||
| 3142 | goto error; | ||
| 3143 | status = write16(state, SCU_RAM_AGC_RF_IACCU_HI__A, 0); | ||
| 3144 | if (status < 0) | ||
| 3145 | goto error; | ||
| 3146 | status = write16(state, SCU_RAM_AGC_RF_IACCU_LO__A, 0); | ||
| 3147 | if (status < 0) | ||
| 3148 | goto error; | ||
| 3149 | status = write16(state, SCU_RAM_AGC_CLP_SUM_MAX__A, clpSumMax); | ||
| 3150 | if (status < 0) | ||
| 3151 | goto error; | ||
| 3152 | status = write16(state, SCU_RAM_AGC_SNS_SUM_MAX__A, snsSumMax); | ||
| 3153 | if (status < 0) | ||
| 3154 | goto error; | ||
| 3155 | |||
| 3156 | status = write16(state, SCU_RAM_AGC_KI_INNERGAIN_MIN__A, kiInnergainMin); | ||
| 3157 | if (status < 0) | ||
| 3158 | goto error; | ||
| 3159 | status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT__A, ifIaccuHiTgt); | ||
| 3160 | if (status < 0) | ||
| 3161 | goto error; | ||
| 3162 | status = write16(state, SCU_RAM_AGC_CLP_CYCLEN__A, clpCyclen); | ||
| 3163 | if (status < 0) | ||
| 3164 | goto error; | ||
| 3165 | |||
| 3166 | status = write16(state, SCU_RAM_AGC_RF_SNS_DEV_MAX__A, 1023); | ||
| 3167 | if (status < 0) | ||
| 3168 | goto error; | ||
| 3169 | status = write16(state, SCU_RAM_AGC_RF_SNS_DEV_MIN__A, (u16) -1023); | ||
| 3170 | if (status < 0) | ||
| 3171 | goto error; | ||
| 3172 | status = write16(state, SCU_RAM_AGC_FAST_SNS_CTRL_DELAY__A, 50); | ||
| 3173 | if (status < 0) | ||
| 3174 | goto error; | ||
| 3175 | |||
| 3176 | status = write16(state, SCU_RAM_AGC_KI_MAXMINGAIN_TH__A, 20); | ||
| 3177 | if (status < 0) | ||
| 3178 | goto error; | ||
| 3179 | status = write16(state, SCU_RAM_AGC_CLP_SUM_MIN__A, clpSumMin); | ||
| 3180 | if (status < 0) | ||
| 3181 | goto error; | ||
| 3182 | status = write16(state, SCU_RAM_AGC_SNS_SUM_MIN__A, snsSumMin); | ||
| 3183 | if (status < 0) | ||
| 3184 | goto error; | ||
| 3185 | status = write16(state, SCU_RAM_AGC_CLP_DIR_TO__A, clpDirTo); | ||
| 3186 | if (status < 0) | ||
| 3187 | goto error; | ||
| 3188 | status = write16(state, SCU_RAM_AGC_SNS_DIR_TO__A, snsDirTo); | ||
| 3189 | if (status < 0) | ||
| 3190 | goto error; | ||
| 3191 | status = write16(state, SCU_RAM_AGC_KI_MINGAIN__A, 0x7fff); | ||
| 3192 | if (status < 0) | ||
| 3193 | goto error; | ||
| 3194 | status = write16(state, SCU_RAM_AGC_KI_MAXGAIN__A, 0x0); | ||
| 3195 | if (status < 0) | ||
| 3196 | goto error; | ||
| 3197 | status = write16(state, SCU_RAM_AGC_KI_MIN__A, 0x0117); | ||
| 3198 | if (status < 0) | ||
| 3199 | goto error; | ||
| 3200 | status = write16(state, SCU_RAM_AGC_KI_MAX__A, 0x0657); | ||
| 3201 | if (status < 0) | ||
| 3202 | goto error; | ||
| 3203 | status = write16(state, SCU_RAM_AGC_CLP_SUM__A, 0); | ||
| 3204 | if (status < 0) | ||
| 3205 | goto error; | ||
| 3206 | status = write16(state, SCU_RAM_AGC_CLP_CYCCNT__A, 0); | ||
| 3207 | if (status < 0) | ||
| 3208 | goto error; | ||
| 3209 | status = write16(state, SCU_RAM_AGC_CLP_DIR_WD__A, 0); | ||
| 3210 | if (status < 0) | ||
| 3211 | goto error; | ||
| 3212 | status = write16(state, SCU_RAM_AGC_CLP_DIR_STP__A, 1); | ||
| 3213 | if (status < 0) | ||
| 3214 | goto error; | ||
| 3215 | status = write16(state, SCU_RAM_AGC_SNS_SUM__A, 0); | ||
| 3216 | if (status < 0) | ||
| 3217 | goto error; | ||
| 3218 | status = write16(state, SCU_RAM_AGC_SNS_CYCCNT__A, 0); | ||
| 3219 | if (status < 0) | ||
| 3220 | goto error; | ||
| 3221 | status = write16(state, SCU_RAM_AGC_SNS_DIR_WD__A, 0); | ||
| 3222 | if (status < 0) | ||
| 3223 | goto error; | ||
| 3224 | status = write16(state, SCU_RAM_AGC_SNS_DIR_STP__A, 1); | ||
| 3225 | if (status < 0) | ||
| 3226 | goto error; | ||
| 3227 | status = write16(state, SCU_RAM_AGC_SNS_CYCLEN__A, 500); | ||
| 3228 | if (status < 0) | ||
| 3229 | goto error; | ||
| 3230 | status = write16(state, SCU_RAM_AGC_KI_CYCLEN__A, 500); | ||
| 3231 | if (status < 0) | ||
| 3232 | goto error; | ||
| 3233 | |||
| 3234 | /* Initialize inner-loop KI gain factors */ | ||
| 3235 | status = read16(state, SCU_RAM_AGC_KI__A, &data); | ||
| 3236 | if (status < 0) | ||
| 3237 | goto error; | ||
| 3238 | |||
| 3239 | data = 0x0657; | ||
| 3240 | data &= ~SCU_RAM_AGC_KI_RF__M; | ||
| 3241 | data |= (DRXK_KI_RAGC_QAM << SCU_RAM_AGC_KI_RF__B); | ||
| 3242 | data &= ~SCU_RAM_AGC_KI_IF__M; | ||
| 3243 | data |= (DRXK_KI_IAGC_QAM << SCU_RAM_AGC_KI_IF__B); | ||
| 3244 | |||
| 3245 | status = write16(state, SCU_RAM_AGC_KI__A, data); | ||
| 3246 | error: | ||
| 3247 | if (status < 0) | ||
| 3248 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 3249 | return status; | ||
| 3250 | } | ||
| 3251 | |||
| 3252 | static int DVBTQAMGetAccPktErr(struct drxk_state *state, u16 *packetErr) | ||
| 3253 | { | ||
| 3254 | int status; | ||
| 3255 | |||
| 3256 | dprintk(1, "\n"); | ||
| 3257 | if (packetErr == NULL) | ||
| 3258 | status = write16(state, SCU_RAM_FEC_ACCUM_PKT_FAILURES__A, 0); | ||
| 3259 | else | ||
| 3260 | status = read16(state, SCU_RAM_FEC_ACCUM_PKT_FAILURES__A, packetErr); | ||
| 3261 | if (status < 0) | ||
| 3262 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 3263 | return status; | ||
| 3264 | } | ||
| 3265 | |||
| 3266 | static int DVBTScCommand(struct drxk_state *state, | ||
| 3267 | u16 cmd, u16 subcmd, | ||
| 3268 | u16 param0, u16 param1, u16 param2, | ||
| 3269 | u16 param3, u16 param4) | ||
| 3270 | { | ||
| 3271 | u16 curCmd = 0; | ||
| 3272 | u16 errCode = 0; | ||
| 3273 | u16 retryCnt = 0; | ||
| 3274 | u16 scExec = 0; | ||
| 3275 | int status; | ||
| 3276 | |||
| 3277 | dprintk(1, "\n"); | ||
| 3278 | status = read16(state, OFDM_SC_COMM_EXEC__A, &scExec); | ||
| 3279 | if (scExec != 1) { | ||
| 3280 | /* SC is not running */ | ||
| 3281 | status = -EINVAL; | ||
| 3282 | } | ||
| 3283 | if (status < 0) | ||
| 3284 | goto error; | ||
| 3285 | |||
| 3286 | /* Wait until sc is ready to receive command */ | ||
| 3287 | retryCnt = 0; | ||
| 3288 | do { | ||
| 3289 | msleep(1); | ||
| 3290 | status = read16(state, OFDM_SC_RA_RAM_CMD__A, &curCmd); | ||
| 3291 | retryCnt++; | ||
| 3292 | } while ((curCmd != 0) && (retryCnt < DRXK_MAX_RETRIES)); | ||
| 3293 | if (retryCnt >= DRXK_MAX_RETRIES && (status < 0)) | ||
| 3294 | goto error; | ||
| 3295 | |||
| 3296 | /* Write sub-command */ | ||
| 3297 | switch (cmd) { | ||
| 3298 | /* All commands using sub-cmd */ | ||
| 3299 | case OFDM_SC_RA_RAM_CMD_PROC_START: | ||
| 3300 | case OFDM_SC_RA_RAM_CMD_SET_PREF_PARAM: | ||
| 3301 | case OFDM_SC_RA_RAM_CMD_PROGRAM_PARAM: | ||
| 3302 | status = write16(state, OFDM_SC_RA_RAM_CMD_ADDR__A, subcmd); | ||
| 3303 | if (status < 0) | ||
| 3304 | goto error; | ||
| 3305 | break; | ||
| 3306 | default: | ||
| 3307 | /* Do nothing */ | ||
| 3308 | break; | ||
| 3309 | } | ||
| 3310 | |||
| 3311 | /* Write needed parameters and the command */ | ||
| 3312 | switch (cmd) { | ||
| 3313 | /* All commands using 5 parameters */ | ||
| 3314 | /* All commands using 4 parameters */ | ||
| 3315 | /* All commands using 3 parameters */ | ||
| 3316 | /* All commands using 2 parameters */ | ||
| 3317 | case OFDM_SC_RA_RAM_CMD_PROC_START: | ||
| 3318 | case OFDM_SC_RA_RAM_CMD_SET_PREF_PARAM: | ||
| 3319 | case OFDM_SC_RA_RAM_CMD_PROGRAM_PARAM: | ||
| 3320 | status = write16(state, OFDM_SC_RA_RAM_PARAM1__A, param1); | ||
| 3321 | /* All commands using 1 parameters */ | ||
| 3322 | case OFDM_SC_RA_RAM_CMD_SET_ECHO_TIMING: | ||
| 3323 | case OFDM_SC_RA_RAM_CMD_USER_IO: | ||
| 3324 | status = write16(state, OFDM_SC_RA_RAM_PARAM0__A, param0); | ||
| 3325 | /* All commands using 0 parameters */ | ||
| 3326 | case OFDM_SC_RA_RAM_CMD_GET_OP_PARAM: | ||
| 3327 | case OFDM_SC_RA_RAM_CMD_NULL: | ||
| 3328 | /* Write command */ | ||
| 3329 | status = write16(state, OFDM_SC_RA_RAM_CMD__A, cmd); | ||
| 3330 | break; | ||
| 3331 | default: | ||
| 3332 | /* Unknown command */ | ||
| 3333 | status = -EINVAL; | ||
| 3334 | } | ||
| 3335 | if (status < 0) | ||
| 3336 | goto error; | ||
| 3337 | |||
| 3338 | /* Wait until sc is ready processing command */ | ||
| 3339 | retryCnt = 0; | ||
| 3340 | do { | ||
| 3341 | msleep(1); | ||
| 3342 | status = read16(state, OFDM_SC_RA_RAM_CMD__A, &curCmd); | ||
| 3343 | retryCnt++; | ||
| 3344 | } while ((curCmd != 0) && (retryCnt < DRXK_MAX_RETRIES)); | ||
| 3345 | if (retryCnt >= DRXK_MAX_RETRIES && (status < 0)) | ||
| 3346 | goto error; | ||
| 3347 | |||
| 3348 | /* Check for illegal cmd */ | ||
| 3349 | status = read16(state, OFDM_SC_RA_RAM_CMD_ADDR__A, &errCode); | ||
| 3350 | if (errCode == 0xFFFF) { | ||
| 3351 | /* illegal command */ | ||
| 3352 | status = -EINVAL; | ||
| 3353 | } | ||
| 3354 | if (status < 0) | ||
| 3355 | goto error; | ||
| 3356 | |||
| 3357 | /* Retreive results parameters from SC */ | ||
| 3358 | switch (cmd) { | ||
| 3359 | /* All commands yielding 5 results */ | ||
| 3360 | /* All commands yielding 4 results */ | ||
| 3361 | /* All commands yielding 3 results */ | ||
| 3362 | /* All commands yielding 2 results */ | ||
| 3363 | /* All commands yielding 1 result */ | ||
| 3364 | case OFDM_SC_RA_RAM_CMD_USER_IO: | ||
| 3365 | case OFDM_SC_RA_RAM_CMD_GET_OP_PARAM: | ||
| 3366 | status = read16(state, OFDM_SC_RA_RAM_PARAM0__A, &(param0)); | ||
| 3367 | /* All commands yielding 0 results */ | ||
| 3368 | case OFDM_SC_RA_RAM_CMD_SET_ECHO_TIMING: | ||
| 3369 | case OFDM_SC_RA_RAM_CMD_SET_TIMER: | ||
| 3370 | case OFDM_SC_RA_RAM_CMD_PROC_START: | ||
| 3371 | case OFDM_SC_RA_RAM_CMD_SET_PREF_PARAM: | ||
| 3372 | case OFDM_SC_RA_RAM_CMD_PROGRAM_PARAM: | ||
| 3373 | case OFDM_SC_RA_RAM_CMD_NULL: | ||
| 3374 | break; | ||
| 3375 | default: | ||
| 3376 | /* Unknown command */ | ||
| 3377 | status = -EINVAL; | ||
| 3378 | break; | ||
| 3379 | } /* switch (cmd->cmd) */ | ||
| 3380 | error: | ||
| 3381 | if (status < 0) | ||
| 3382 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 3383 | return status; | ||
| 3384 | } | ||
| 3385 | |||
| 3386 | static int PowerUpDVBT(struct drxk_state *state) | ||
| 3387 | { | ||
| 3388 | enum DRXPowerMode powerMode = DRX_POWER_UP; | ||
| 3389 | int status; | ||
| 3390 | |||
| 3391 | dprintk(1, "\n"); | ||
| 3392 | status = CtrlPowerMode(state, &powerMode); | ||
| 3393 | if (status < 0) | ||
| 3394 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 3395 | return status; | ||
| 3396 | } | ||
| 3397 | |||
| 3398 | static int DVBTCtrlSetIncEnable(struct drxk_state *state, bool *enabled) | ||
| 3399 | { | ||
| 3400 | int status; | ||
| 3401 | |||
| 3402 | dprintk(1, "\n"); | ||
| 3403 | if (*enabled == true) | ||
| 3404 | status = write16(state, IQM_CF_BYPASSDET__A, 0); | ||
| 3405 | else | ||
| 3406 | status = write16(state, IQM_CF_BYPASSDET__A, 1); | ||
| 3407 | if (status < 0) | ||
| 3408 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 3409 | return status; | ||
| 3410 | } | ||
| 3411 | |||
| 3412 | #define DEFAULT_FR_THRES_8K 4000 | ||
| 3413 | static int DVBTCtrlSetFrEnable(struct drxk_state *state, bool *enabled) | ||
| 3414 | { | ||
| 3415 | |||
| 3416 | int status; | ||
| 3417 | |||
| 3418 | dprintk(1, "\n"); | ||
| 3419 | if (*enabled == true) { | ||
| 3420 | /* write mask to 1 */ | ||
| 3421 | status = write16(state, OFDM_SC_RA_RAM_FR_THRES_8K__A, | ||
| 3422 | DEFAULT_FR_THRES_8K); | ||
| 3423 | } else { | ||
| 3424 | /* write mask to 0 */ | ||
| 3425 | status = write16(state, OFDM_SC_RA_RAM_FR_THRES_8K__A, 0); | ||
| 3426 | } | ||
| 3427 | if (status < 0) | ||
| 3428 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 3429 | |||
| 3430 | return status; | ||
| 3431 | } | ||
| 3432 | |||
| 3433 | static int DVBTCtrlSetEchoThreshold(struct drxk_state *state, | ||
| 3434 | struct DRXKCfgDvbtEchoThres_t *echoThres) | ||
| 3435 | { | ||
| 3436 | u16 data = 0; | ||
| 3437 | int status; | ||
| 3438 | |||
| 3439 | dprintk(1, "\n"); | ||
| 3440 | status = read16(state, OFDM_SC_RA_RAM_ECHO_THRES__A, &data); | ||
| 3441 | if (status < 0) | ||
| 3442 | goto error; | ||
| 3443 | |||
| 3444 | switch (echoThres->fftMode) { | ||
| 3445 | case DRX_FFTMODE_2K: | ||
| 3446 | data &= ~OFDM_SC_RA_RAM_ECHO_THRES_2K__M; | ||
| 3447 | data |= ((echoThres->threshold << | ||
| 3448 | OFDM_SC_RA_RAM_ECHO_THRES_2K__B) | ||
| 3449 | & (OFDM_SC_RA_RAM_ECHO_THRES_2K__M)); | ||
| 3450 | break; | ||
| 3451 | case DRX_FFTMODE_8K: | ||
| 3452 | data &= ~OFDM_SC_RA_RAM_ECHO_THRES_8K__M; | ||
| 3453 | data |= ((echoThres->threshold << | ||
| 3454 | OFDM_SC_RA_RAM_ECHO_THRES_8K__B) | ||
| 3455 | & (OFDM_SC_RA_RAM_ECHO_THRES_8K__M)); | ||
| 3456 | break; | ||
| 3457 | default: | ||
| 3458 | return -EINVAL; | ||
| 3459 | } | ||
| 3460 | |||
| 3461 | status = write16(state, OFDM_SC_RA_RAM_ECHO_THRES__A, data); | ||
| 3462 | error: | ||
| 3463 | if (status < 0) | ||
| 3464 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 3465 | return status; | ||
| 3466 | } | ||
| 3467 | |||
| 3468 | static int DVBTCtrlSetSqiSpeed(struct drxk_state *state, | ||
| 3469 | enum DRXKCfgDvbtSqiSpeed *speed) | ||
| 3470 | { | ||
| 3471 | int status = -EINVAL; | ||
| 3472 | |||
| 3473 | dprintk(1, "\n"); | ||
| 3474 | |||
| 3475 | switch (*speed) { | ||
| 3476 | case DRXK_DVBT_SQI_SPEED_FAST: | ||
| 3477 | case DRXK_DVBT_SQI_SPEED_MEDIUM: | ||
| 3478 | case DRXK_DVBT_SQI_SPEED_SLOW: | ||
| 3479 | break; | ||
| 3480 | default: | ||
| 3481 | goto error; | ||
| 3482 | } | ||
| 3483 | status = write16(state, SCU_RAM_FEC_PRE_RS_BER_FILTER_SH__A, | ||
| 3484 | (u16) *speed); | ||
| 3485 | error: | ||
| 3486 | if (status < 0) | ||
| 3487 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 3488 | return status; | ||
| 3489 | } | ||
| 3490 | |||
| 3491 | /*============================================================================*/ | ||
| 3492 | |||
| 3493 | /** | ||
| 3494 | * \brief Activate DVBT specific presets | ||
| 3495 | * \param demod instance of demodulator. | ||
| 3496 | * \return DRXStatus_t. | ||
| 3497 | * | ||
| 3498 | * Called in DVBTSetStandard | ||
| 3499 | * | ||
| 3500 | */ | ||
| 3501 | static int DVBTActivatePresets(struct drxk_state *state) | ||
| 3502 | { | ||
| 3503 | int status; | ||
| 3504 | bool setincenable = false; | ||
| 3505 | bool setfrenable = true; | ||
| 3506 | |||
| 3507 | struct DRXKCfgDvbtEchoThres_t echoThres2k = { 0, DRX_FFTMODE_2K }; | ||
| 3508 | struct DRXKCfgDvbtEchoThres_t echoThres8k = { 0, DRX_FFTMODE_8K }; | ||
| 3509 | |||
| 3510 | dprintk(1, "\n"); | ||
| 3511 | status = DVBTCtrlSetIncEnable(state, &setincenable); | ||
| 3512 | if (status < 0) | ||
| 3513 | goto error; | ||
| 3514 | status = DVBTCtrlSetFrEnable(state, &setfrenable); | ||
| 3515 | if (status < 0) | ||
| 3516 | goto error; | ||
| 3517 | status = DVBTCtrlSetEchoThreshold(state, &echoThres2k); | ||
| 3518 | if (status < 0) | ||
| 3519 | goto error; | ||
| 3520 | status = DVBTCtrlSetEchoThreshold(state, &echoThres8k); | ||
| 3521 | if (status < 0) | ||
| 3522 | goto error; | ||
| 3523 | status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MAX__A, state->m_dvbtIfAgcCfg.IngainTgtMax); | ||
| 3524 | error: | ||
| 3525 | if (status < 0) | ||
| 3526 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 3527 | return status; | ||
| 3528 | } | ||
| 3529 | |||
| 3530 | /*============================================================================*/ | ||
| 3531 | |||
| 3532 | /** | ||
| 3533 | * \brief Initialize channelswitch-independent settings for DVBT. | ||
| 3534 | * \param demod instance of demodulator. | ||
| 3535 | * \return DRXStatus_t. | ||
| 3536 | * | ||
| 3537 | * For ROM code channel filter taps are loaded from the bootloader. For microcode | ||
| 3538 | * the DVB-T taps from the drxk_filters.h are used. | ||
| 3539 | */ | ||
| 3540 | static int SetDVBTStandard(struct drxk_state *state, | ||
| 3541 | enum OperationMode oMode) | ||
| 3542 | { | ||
| 3543 | u16 cmdResult = 0; | ||
| 3544 | u16 data = 0; | ||
| 3545 | int status; | ||
| 3546 | |||
| 3547 | dprintk(1, "\n"); | ||
| 3548 | |||
| 3549 | PowerUpDVBT(state); | ||
| 3550 | /* added antenna switch */ | ||
| 3551 | SwitchAntennaToDVBT(state); | ||
| 3552 | /* send OFDM reset command */ | ||
| 3553 | status = scu_command(state, SCU_RAM_COMMAND_STANDARD_OFDM | SCU_RAM_COMMAND_CMD_DEMOD_RESET, 0, NULL, 1, &cmdResult); | ||
| 3554 | if (status < 0) | ||
| 3555 | goto error; | ||
| 3556 | |||
| 3557 | /* send OFDM setenv command */ | ||
| 3558 | status = scu_command(state, SCU_RAM_COMMAND_STANDARD_OFDM | SCU_RAM_COMMAND_CMD_DEMOD_SET_ENV, 0, NULL, 1, &cmdResult); | ||
| 3559 | if (status < 0) | ||
| 3560 | goto error; | ||
| 3561 | |||
| 3562 | /* reset datapath for OFDM, processors first */ | ||
| 3563 | status = write16(state, OFDM_SC_COMM_EXEC__A, OFDM_SC_COMM_EXEC_STOP); | ||
| 3564 | if (status < 0) | ||
| 3565 | goto error; | ||
| 3566 | status = write16(state, OFDM_LC_COMM_EXEC__A, OFDM_LC_COMM_EXEC_STOP); | ||
| 3567 | if (status < 0) | ||
| 3568 | goto error; | ||
| 3569 | status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_STOP); | ||
| 3570 | if (status < 0) | ||
| 3571 | goto error; | ||
| 3572 | |||
| 3573 | /* IQM setup */ | ||
| 3574 | /* synchronize on ofdstate->m_festart */ | ||
| 3575 | status = write16(state, IQM_AF_UPD_SEL__A, 1); | ||
| 3576 | if (status < 0) | ||
| 3577 | goto error; | ||
| 3578 | /* window size for clipping ADC detection */ | ||
| 3579 | status = write16(state, IQM_AF_CLP_LEN__A, 0); | ||
| 3580 | if (status < 0) | ||
| 3581 | goto error; | ||
| 3582 | /* window size for for sense pre-SAW detection */ | ||
| 3583 | status = write16(state, IQM_AF_SNS_LEN__A, 0); | ||
| 3584 | if (status < 0) | ||
| 3585 | goto error; | ||
| 3586 | /* sense threshold for sense pre-SAW detection */ | ||
| 3587 | status = write16(state, IQM_AF_AMUX__A, IQM_AF_AMUX_SIGNAL2ADC); | ||
| 3588 | if (status < 0) | ||
| 3589 | goto error; | ||
| 3590 | status = SetIqmAf(state, true); | ||
| 3591 | if (status < 0) | ||
| 3592 | goto error; | ||
| 3593 | |||
| 3594 | status = write16(state, IQM_AF_AGC_RF__A, 0); | ||
| 3595 | if (status < 0) | ||
| 3596 | goto error; | ||
| 3597 | |||
| 3598 | /* Impulse noise cruncher setup */ | ||
| 3599 | status = write16(state, IQM_AF_INC_LCT__A, 0); /* crunch in IQM_CF */ | ||
| 3600 | if (status < 0) | ||
| 3601 | goto error; | ||
| 3602 | status = write16(state, IQM_CF_DET_LCT__A, 0); /* detect in IQM_CF */ | ||
| 3603 | if (status < 0) | ||
| 3604 | goto error; | ||
| 3605 | status = write16(state, IQM_CF_WND_LEN__A, 3); /* peak detector window length */ | ||
| 3606 | if (status < 0) | ||
| 3607 | goto error; | ||
| 3608 | |||
| 3609 | status = write16(state, IQM_RC_STRETCH__A, 16); | ||
| 3610 | if (status < 0) | ||
| 3611 | goto error; | ||
| 3612 | status = write16(state, IQM_CF_OUT_ENA__A, 0x4); /* enable output 2 */ | ||
| 3613 | if (status < 0) | ||
| 3614 | goto error; | ||
| 3615 | status = write16(state, IQM_CF_DS_ENA__A, 0x4); /* decimate output 2 */ | ||
| 3616 | if (status < 0) | ||
| 3617 | goto error; | ||
| 3618 | status = write16(state, IQM_CF_SCALE__A, 1600); | ||
| 3619 | if (status < 0) | ||
| 3620 | goto error; | ||
| 3621 | status = write16(state, IQM_CF_SCALE_SH__A, 0); | ||
| 3622 | if (status < 0) | ||
| 3623 | goto error; | ||
| 3624 | |||
| 3625 | /* virtual clipping threshold for clipping ADC detection */ | ||
| 3626 | status = write16(state, IQM_AF_CLP_TH__A, 448); | ||
| 3627 | if (status < 0) | ||
| 3628 | goto error; | ||
| 3629 | status = write16(state, IQM_CF_DATATH__A, 495); /* crunching threshold */ | ||
| 3630 | if (status < 0) | ||
| 3631 | goto error; | ||
| 3632 | |||
| 3633 | status = BLChainCmd(state, DRXK_BL_ROM_OFFSET_TAPS_DVBT, DRXK_BLCC_NR_ELEMENTS_TAPS, DRXK_BLC_TIMEOUT); | ||
| 3634 | if (status < 0) | ||
| 3635 | goto error; | ||
| 3636 | |||
| 3637 | status = write16(state, IQM_CF_PKDTH__A, 2); /* peak detector threshold */ | ||
| 3638 | if (status < 0) | ||
| 3639 | goto error; | ||
| 3640 | status = write16(state, IQM_CF_POW_MEAS_LEN__A, 2); | ||
| 3641 | if (status < 0) | ||
| 3642 | goto error; | ||
| 3643 | /* enable power measurement interrupt */ | ||
| 3644 | status = write16(state, IQM_CF_COMM_INT_MSK__A, 1); | ||
| 3645 | if (status < 0) | ||
| 3646 | goto error; | ||
| 3647 | status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_ACTIVE); | ||
| 3648 | if (status < 0) | ||
| 3649 | goto error; | ||
| 3650 | |||
| 3651 | /* IQM will not be reset from here, sync ADC and update/init AGC */ | ||
| 3652 | status = ADCSynchronization(state); | ||
| 3653 | if (status < 0) | ||
| 3654 | goto error; | ||
| 3655 | status = SetPreSaw(state, &state->m_dvbtPreSawCfg); | ||
| 3656 | if (status < 0) | ||
| 3657 | goto error; | ||
| 3658 | |||
| 3659 | /* Halt SCU to enable safe non-atomic accesses */ | ||
| 3660 | status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_HOLD); | ||
| 3661 | if (status < 0) | ||
| 3662 | goto error; | ||
| 3663 | |||
| 3664 | status = SetAgcRf(state, &state->m_dvbtRfAgcCfg, true); | ||
| 3665 | if (status < 0) | ||
| 3666 | goto error; | ||
| 3667 | status = SetAgcIf(state, &state->m_dvbtIfAgcCfg, true); | ||
| 3668 | if (status < 0) | ||
| 3669 | goto error; | ||
| 3670 | |||
| 3671 | /* Set Noise Estimation notch width and enable DC fix */ | ||
| 3672 | status = read16(state, OFDM_SC_RA_RAM_CONFIG__A, &data); | ||
| 3673 | if (status < 0) | ||
| 3674 | goto error; | ||
| 3675 | data |= OFDM_SC_RA_RAM_CONFIG_NE_FIX_ENABLE__M; | ||
| 3676 | status = write16(state, OFDM_SC_RA_RAM_CONFIG__A, data); | ||
| 3677 | if (status < 0) | ||
| 3678 | goto error; | ||
| 3679 | |||
| 3680 | /* Activate SCU to enable SCU commands */ | ||
| 3681 | status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); | ||
| 3682 | if (status < 0) | ||
| 3683 | goto error; | ||
| 3684 | |||
| 3685 | if (!state->m_DRXK_A3_ROM_CODE) { | ||
| 3686 | /* AGCInit() is not done for DVBT, so set agcFastClipCtrlDelay */ | ||
| 3687 | status = write16(state, SCU_RAM_AGC_FAST_CLP_CTRL_DELAY__A, state->m_dvbtIfAgcCfg.FastClipCtrlDelay); | ||
| 3688 | if (status < 0) | ||
| 3689 | goto error; | ||
| 3690 | } | ||
| 3691 | |||
| 3692 | /* OFDM_SC setup */ | ||
| 3693 | #ifdef COMPILE_FOR_NONRT | ||
| 3694 | status = write16(state, OFDM_SC_RA_RAM_BE_OPT_DELAY__A, 1); | ||
| 3695 | if (status < 0) | ||
| 3696 | goto error; | ||
| 3697 | status = write16(state, OFDM_SC_RA_RAM_BE_OPT_INIT_DELAY__A, 2); | ||
| 3698 | if (status < 0) | ||
| 3699 | goto error; | ||
| 3700 | #endif | ||
| 3701 | |||
| 3702 | /* FEC setup */ | ||
| 3703 | status = write16(state, FEC_DI_INPUT_CTL__A, 1); /* OFDM input */ | ||
| 3704 | if (status < 0) | ||
| 3705 | goto error; | ||
| 3706 | |||
| 3707 | |||
| 3708 | #ifdef COMPILE_FOR_NONRT | ||
| 3709 | status = write16(state, FEC_RS_MEASUREMENT_PERIOD__A, 0x400); | ||
| 3710 | if (status < 0) | ||
| 3711 | goto error; | ||
| 3712 | #else | ||
| 3713 | status = write16(state, FEC_RS_MEASUREMENT_PERIOD__A, 0x1000); | ||
| 3714 | if (status < 0) | ||
| 3715 | goto error; | ||
| 3716 | #endif | ||
| 3717 | status = write16(state, FEC_RS_MEASUREMENT_PRESCALE__A, 0x0001); | ||
| 3718 | if (status < 0) | ||
| 3719 | goto error; | ||
| 3720 | |||
| 3721 | /* Setup MPEG bus */ | ||
| 3722 | status = MPEGTSDtoSetup(state, OM_DVBT); | ||
| 3723 | if (status < 0) | ||
| 3724 | goto error; | ||
| 3725 | /* Set DVBT Presets */ | ||
| 3726 | status = DVBTActivatePresets(state); | ||
| 3727 | if (status < 0) | ||
| 3728 | goto error; | ||
| 3729 | |||
| 3730 | error: | ||
| 3731 | if (status < 0) | ||
| 3732 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 3733 | return status; | ||
| 3734 | } | ||
| 3735 | |||
| 3736 | /*============================================================================*/ | ||
| 3737 | /** | ||
| 3738 | * \brief Start dvbt demodulating for channel. | ||
| 3739 | * \param demod instance of demodulator. | ||
| 3740 | * \return DRXStatus_t. | ||
| 3741 | */ | ||
| 3742 | static int DVBTStart(struct drxk_state *state) | ||
| 3743 | { | ||
| 3744 | u16 param1; | ||
| 3745 | int status; | ||
| 3746 | /* DRXKOfdmScCmd_t scCmd; */ | ||
| 3747 | |||
| 3748 | dprintk(1, "\n"); | ||
| 3749 | /* Start correct processes to get in lock */ | ||
| 3750 | /* DRXK: OFDM_SC_RA_RAM_PROC_LOCKTRACK is no longer in mapfile! */ | ||
| 3751 | param1 = OFDM_SC_RA_RAM_LOCKTRACK_MIN; | ||
| 3752 | status = DVBTScCommand(state, OFDM_SC_RA_RAM_CMD_PROC_START, 0, OFDM_SC_RA_RAM_SW_EVENT_RUN_NMASK__M, param1, 0, 0, 0); | ||
| 3753 | if (status < 0) | ||
| 3754 | goto error; | ||
| 3755 | /* Start FEC OC */ | ||
| 3756 | status = MPEGTSStart(state); | ||
| 3757 | if (status < 0) | ||
| 3758 | goto error; | ||
| 3759 | status = write16(state, FEC_COMM_EXEC__A, FEC_COMM_EXEC_ACTIVE); | ||
| 3760 | if (status < 0) | ||
| 3761 | goto error; | ||
| 3762 | error: | ||
| 3763 | if (status < 0) | ||
| 3764 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 3765 | return status; | ||
| 3766 | } | ||
| 3767 | |||
| 3768 | |||
| 3769 | /*============================================================================*/ | ||
| 3770 | |||
| 3771 | /** | ||
| 3772 | * \brief Set up dvbt demodulator for channel. | ||
| 3773 | * \param demod instance of demodulator. | ||
| 3774 | * \return DRXStatus_t. | ||
| 3775 | * // original DVBTSetChannel() | ||
| 3776 | */ | ||
| 3777 | static int SetDVBT(struct drxk_state *state, u16 IntermediateFreqkHz, | ||
| 3778 | s32 tunerFreqOffset) | ||
| 3779 | { | ||
| 3780 | u16 cmdResult = 0; | ||
| 3781 | u16 transmissionParams = 0; | ||
| 3782 | u16 operationMode = 0; | ||
| 3783 | u32 iqmRcRateOfs = 0; | ||
| 3784 | u32 bandwidth = 0; | ||
| 3785 | u16 param1; | ||
| 3786 | int status; | ||
| 3787 | |||
| 3788 | dprintk(1, "IF =%d, TFO = %d\n", IntermediateFreqkHz, tunerFreqOffset); | ||
| 3789 | |||
| 3790 | status = scu_command(state, SCU_RAM_COMMAND_STANDARD_OFDM | SCU_RAM_COMMAND_CMD_DEMOD_STOP, 0, NULL, 1, &cmdResult); | ||
| 3791 | if (status < 0) | ||
| 3792 | goto error; | ||
| 3793 | |||
| 3794 | /* Halt SCU to enable safe non-atomic accesses */ | ||
| 3795 | status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_HOLD); | ||
| 3796 | if (status < 0) | ||
| 3797 | goto error; | ||
| 3798 | |||
| 3799 | /* Stop processors */ | ||
| 3800 | status = write16(state, OFDM_SC_COMM_EXEC__A, OFDM_SC_COMM_EXEC_STOP); | ||
| 3801 | if (status < 0) | ||
| 3802 | goto error; | ||
| 3803 | status = write16(state, OFDM_LC_COMM_EXEC__A, OFDM_LC_COMM_EXEC_STOP); | ||
| 3804 | if (status < 0) | ||
| 3805 | goto error; | ||
| 3806 | |||
| 3807 | /* Mandatory fix, always stop CP, required to set spl offset back to | ||
| 3808 | hardware default (is set to 0 by ucode during pilot detection */ | ||
| 3809 | status = write16(state, OFDM_CP_COMM_EXEC__A, OFDM_CP_COMM_EXEC_STOP); | ||
| 3810 | if (status < 0) | ||
| 3811 | goto error; | ||
| 3812 | |||
| 3813 | /*== Write channel settings to device =====================================*/ | ||
| 3814 | |||
| 3815 | /* mode */ | ||
| 3816 | switch (state->param.u.ofdm.transmission_mode) { | ||
| 3817 | case TRANSMISSION_MODE_AUTO: | ||
| 3818 | default: | ||
| 3819 | operationMode |= OFDM_SC_RA_RAM_OP_AUTO_MODE__M; | ||
| 3820 | /* fall through , try first guess DRX_FFTMODE_8K */ | ||
| 3821 | case TRANSMISSION_MODE_8K: | ||
| 3822 | transmissionParams |= OFDM_SC_RA_RAM_OP_PARAM_MODE_8K; | ||
| 3823 | break; | ||
| 3824 | case TRANSMISSION_MODE_2K: | ||
| 3825 | transmissionParams |= OFDM_SC_RA_RAM_OP_PARAM_MODE_2K; | ||
| 3826 | break; | ||
| 3827 | } | ||
| 3828 | |||
| 3829 | /* guard */ | ||
| 3830 | switch (state->param.u.ofdm.guard_interval) { | ||
| 3831 | default: | ||
| 3832 | case GUARD_INTERVAL_AUTO: | ||
| 3833 | operationMode |= OFDM_SC_RA_RAM_OP_AUTO_GUARD__M; | ||
| 3834 | /* fall through , try first guess DRX_GUARD_1DIV4 */ | ||
| 3835 | case GUARD_INTERVAL_1_4: | ||
| 3836 | transmissionParams |= OFDM_SC_RA_RAM_OP_PARAM_GUARD_4; | ||
| 3837 | break; | ||
| 3838 | case GUARD_INTERVAL_1_32: | ||
| 3839 | transmissionParams |= OFDM_SC_RA_RAM_OP_PARAM_GUARD_32; | ||
| 3840 | break; | ||
| 3841 | case GUARD_INTERVAL_1_16: | ||
| 3842 | transmissionParams |= OFDM_SC_RA_RAM_OP_PARAM_GUARD_16; | ||
| 3843 | break; | ||
| 3844 | case GUARD_INTERVAL_1_8: | ||
| 3845 | transmissionParams |= OFDM_SC_RA_RAM_OP_PARAM_GUARD_8; | ||
| 3846 | break; | ||
| 3847 | } | ||
| 3848 | |||
| 3849 | /* hierarchy */ | ||
| 3850 | switch (state->param.u.ofdm.hierarchy_information) { | ||
| 3851 | case HIERARCHY_AUTO: | ||
| 3852 | case HIERARCHY_NONE: | ||
| 3853 | default: | ||
| 3854 | operationMode |= OFDM_SC_RA_RAM_OP_AUTO_HIER__M; | ||
| 3855 | /* fall through , try first guess SC_RA_RAM_OP_PARAM_HIER_NO */ | ||
| 3856 | /* transmissionParams |= OFDM_SC_RA_RAM_OP_PARAM_HIER_NO; */ | ||
| 3857 | /* break; */ | ||
| 3858 | case HIERARCHY_1: | ||
| 3859 | transmissionParams |= OFDM_SC_RA_RAM_OP_PARAM_HIER_A1; | ||
| 3860 | break; | ||
| 3861 | case HIERARCHY_2: | ||
| 3862 | transmissionParams |= OFDM_SC_RA_RAM_OP_PARAM_HIER_A2; | ||
| 3863 | break; | ||
| 3864 | case HIERARCHY_4: | ||
| 3865 | transmissionParams |= OFDM_SC_RA_RAM_OP_PARAM_HIER_A4; | ||
| 3866 | break; | ||
| 3867 | } | ||
| 3868 | |||
| 3869 | |||
| 3870 | /* constellation */ | ||
| 3871 | switch (state->param.u.ofdm.constellation) { | ||
| 3872 | case QAM_AUTO: | ||
| 3873 | default: | ||
| 3874 | operationMode |= OFDM_SC_RA_RAM_OP_AUTO_CONST__M; | ||
| 3875 | /* fall through , try first guess DRX_CONSTELLATION_QAM64 */ | ||
| 3876 | case QAM_64: | ||
| 3877 | transmissionParams |= OFDM_SC_RA_RAM_OP_PARAM_CONST_QAM64; | ||
| 3878 | break; | ||
| 3879 | case QPSK: | ||
| 3880 | transmissionParams |= OFDM_SC_RA_RAM_OP_PARAM_CONST_QPSK; | ||
| 3881 | break; | ||
| 3882 | case QAM_16: | ||
| 3883 | transmissionParams |= OFDM_SC_RA_RAM_OP_PARAM_CONST_QAM16; | ||
| 3884 | break; | ||
| 3885 | } | ||
| 3886 | #if 0 | ||
| 3887 | /* No hierachical channels support in BDA */ | ||
| 3888 | /* Priority (only for hierarchical channels) */ | ||
| 3889 | switch (channel->priority) { | ||
| 3890 | case DRX_PRIORITY_LOW: | ||
| 3891 | transmissionParams |= OFDM_SC_RA_RAM_OP_PARAM_PRIO_LO; | ||
| 3892 | WR16(devAddr, OFDM_EC_SB_PRIOR__A, | ||
| 3893 | OFDM_EC_SB_PRIOR_LO); | ||
| 3894 | break; | ||
| 3895 | case DRX_PRIORITY_HIGH: | ||
| 3896 | transmissionParams |= OFDM_SC_RA_RAM_OP_PARAM_PRIO_HI; | ||
| 3897 | WR16(devAddr, OFDM_EC_SB_PRIOR__A, | ||
| 3898 | OFDM_EC_SB_PRIOR_HI)); | ||
| 3899 | break; | ||
| 3900 | case DRX_PRIORITY_UNKNOWN: /* fall through */ | ||
| 3901 | default: | ||
| 3902 | status = -EINVAL; | ||
| 3903 | goto error; | ||
| 3904 | } | ||
| 3905 | #else | ||
| 3906 | /* Set Priorty high */ | ||
| 3907 | transmissionParams |= OFDM_SC_RA_RAM_OP_PARAM_PRIO_HI; | ||
| 3908 | status = write16(state, OFDM_EC_SB_PRIOR__A, OFDM_EC_SB_PRIOR_HI); | ||
| 3909 | if (status < 0) | ||
| 3910 | goto error; | ||
| 3911 | #endif | ||
| 3912 | |||
| 3913 | /* coderate */ | ||
| 3914 | switch (state->param.u.ofdm.code_rate_HP) { | ||
| 3915 | case FEC_AUTO: | ||
| 3916 | default: | ||
| 3917 | operationMode |= OFDM_SC_RA_RAM_OP_AUTO_RATE__M; | ||
| 3918 | /* fall through , try first guess DRX_CODERATE_2DIV3 */ | ||
| 3919 | case FEC_2_3: | ||
| 3920 | transmissionParams |= OFDM_SC_RA_RAM_OP_PARAM_RATE_2_3; | ||
| 3921 | break; | ||
| 3922 | case FEC_1_2: | ||
| 3923 | transmissionParams |= OFDM_SC_RA_RAM_OP_PARAM_RATE_1_2; | ||
| 3924 | break; | ||
| 3925 | case FEC_3_4: | ||
| 3926 | transmissionParams |= OFDM_SC_RA_RAM_OP_PARAM_RATE_3_4; | ||
| 3927 | break; | ||
| 3928 | case FEC_5_6: | ||
| 3929 | transmissionParams |= OFDM_SC_RA_RAM_OP_PARAM_RATE_5_6; | ||
| 3930 | break; | ||
| 3931 | case FEC_7_8: | ||
| 3932 | transmissionParams |= OFDM_SC_RA_RAM_OP_PARAM_RATE_7_8; | ||
| 3933 | break; | ||
| 3934 | } | ||
| 3935 | |||
| 3936 | /* SAW filter selection: normaly not necesarry, but if wanted | ||
| 3937 | the application can select a SAW filter via the driver by using UIOs */ | ||
| 3938 | /* First determine real bandwidth (Hz) */ | ||
| 3939 | /* Also set delay for impulse noise cruncher */ | ||
| 3940 | /* Also set parameters for EC_OC fix, note EC_OC_REG_TMD_HIL_MAR is changed | ||
| 3941 | by SC for fix for some 8K,1/8 guard but is restored by InitEC and ResetEC | ||
| 3942 | functions */ | ||
| 3943 | switch (state->param.u.ofdm.bandwidth) { | ||
| 3944 | case BANDWIDTH_AUTO: | ||
| 3945 | case BANDWIDTH_8_MHZ: | ||
| 3946 | bandwidth = DRXK_BANDWIDTH_8MHZ_IN_HZ; | ||
| 3947 | status = write16(state, OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A, 3052); | ||
| 3948 | if (status < 0) | ||
| 3949 | goto error; | ||
| 3950 | /* cochannel protection for PAL 8 MHz */ | ||
| 3951 | status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_LEFT__A, 7); | ||
| 3952 | if (status < 0) | ||
| 3953 | goto error; | ||
| 3954 | status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_RIGHT__A, 7); | ||
| 3955 | if (status < 0) | ||
| 3956 | goto error; | ||
| 3957 | status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_LEFT__A, 7); | ||
| 3958 | if (status < 0) | ||
| 3959 | goto error; | ||
| 3960 | status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_RIGHT__A, 1); | ||
| 3961 | if (status < 0) | ||
| 3962 | goto error; | ||
| 3963 | break; | ||
| 3964 | case BANDWIDTH_7_MHZ: | ||
| 3965 | bandwidth = DRXK_BANDWIDTH_7MHZ_IN_HZ; | ||
| 3966 | status = write16(state, OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A, 3491); | ||
| 3967 | if (status < 0) | ||
| 3968 | goto error; | ||
| 3969 | /* cochannel protection for PAL 7 MHz */ | ||
| 3970 | status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_LEFT__A, 8); | ||
| 3971 | if (status < 0) | ||
| 3972 | goto error; | ||
| 3973 | status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_RIGHT__A, 8); | ||
| 3974 | if (status < 0) | ||
| 3975 | goto error; | ||
| 3976 | status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_LEFT__A, 4); | ||
| 3977 | if (status < 0) | ||
| 3978 | goto error; | ||
| 3979 | status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_RIGHT__A, 1); | ||
| 3980 | if (status < 0) | ||
| 3981 | goto error; | ||
| 3982 | break; | ||
| 3983 | case BANDWIDTH_6_MHZ: | ||
| 3984 | bandwidth = DRXK_BANDWIDTH_6MHZ_IN_HZ; | ||
| 3985 | status = write16(state, OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A, 4073); | ||
| 3986 | if (status < 0) | ||
| 3987 | goto error; | ||
| 3988 | /* cochannel protection for NTSC 6 MHz */ | ||
| 3989 | status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_LEFT__A, 19); | ||
| 3990 | if (status < 0) | ||
| 3991 | goto error; | ||
| 3992 | status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_RIGHT__A, 19); | ||
| 3993 | if (status < 0) | ||
| 3994 | goto error; | ||
| 3995 | status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_LEFT__A, 14); | ||
| 3996 | if (status < 0) | ||
| 3997 | goto error; | ||
| 3998 | status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_RIGHT__A, 1); | ||
| 3999 | if (status < 0) | ||
| 4000 | goto error; | ||
| 4001 | break; | ||
| 4002 | default: | ||
| 4003 | status = -EINVAL; | ||
| 4004 | goto error; | ||
| 4005 | } | ||
| 4006 | |||
| 4007 | if (iqmRcRateOfs == 0) { | ||
| 4008 | /* Now compute IQM_RC_RATE_OFS | ||
| 4009 | (((SysFreq/BandWidth)/2)/2) -1) * 2^23) | ||
| 4010 | => | ||
| 4011 | ((SysFreq / BandWidth) * (2^21)) - (2^23) | ||
| 4012 | */ | ||
| 4013 | /* (SysFreq / BandWidth) * (2^28) */ | ||
| 4014 | /* assert (MAX(sysClk)/MIN(bandwidth) < 16) | ||
| 4015 | => assert(MAX(sysClk) < 16*MIN(bandwidth)) | ||
| 4016 | => assert(109714272 > 48000000) = true so Frac 28 can be used */ | ||
| 4017 | iqmRcRateOfs = Frac28a((u32) | ||
| 4018 | ((state->m_sysClockFreq * | ||
| 4019 | 1000) / 3), bandwidth); | ||
| 4020 | /* (SysFreq / BandWidth) * (2^21), rounding before truncating */ | ||
| 4021 | if ((iqmRcRateOfs & 0x7fL) >= 0x40) | ||
| 4022 | iqmRcRateOfs += 0x80L; | ||
| 4023 | iqmRcRateOfs = iqmRcRateOfs >> 7; | ||
| 4024 | /* ((SysFreq / BandWidth) * (2^21)) - (2^23) */ | ||
| 4025 | iqmRcRateOfs = iqmRcRateOfs - (1 << 23); | ||
| 4026 | } | ||
| 4027 | |||
| 4028 | iqmRcRateOfs &= | ||
| 4029 | ((((u32) IQM_RC_RATE_OFS_HI__M) << | ||
| 4030 | IQM_RC_RATE_OFS_LO__W) | IQM_RC_RATE_OFS_LO__M); | ||
| 4031 | status = write32(state, IQM_RC_RATE_OFS_LO__A, iqmRcRateOfs); | ||
| 4032 | if (status < 0) | ||
| 4033 | goto error; | ||
| 4034 | |||
| 4035 | /* Bandwidth setting done */ | ||
| 4036 | |||
| 4037 | #if 0 | ||
| 4038 | status = DVBTSetFrequencyShift(demod, channel, tunerOffset); | ||
| 4039 | if (status < 0) | ||
| 4040 | goto error; | ||
| 4041 | #endif | ||
| 4042 | status = SetFrequencyShifter(state, IntermediateFreqkHz, tunerFreqOffset, true); | ||
| 4043 | if (status < 0) | ||
| 4044 | goto error; | ||
| 4045 | |||
| 4046 | /*== Start SC, write channel settings to SC ===============================*/ | ||
| 4047 | |||
| 4048 | /* Activate SCU to enable SCU commands */ | ||
| 4049 | status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); | ||
| 4050 | if (status < 0) | ||
| 4051 | goto error; | ||
| 4052 | |||
| 4053 | /* Enable SC after setting all other parameters */ | ||
| 4054 | status = write16(state, OFDM_SC_COMM_STATE__A, 0); | ||
| 4055 | if (status < 0) | ||
| 4056 | goto error; | ||
| 4057 | status = write16(state, OFDM_SC_COMM_EXEC__A, 1); | ||
| 4058 | if (status < 0) | ||
| 4059 | goto error; | ||
| 4060 | |||
| 4061 | |||
| 4062 | status = scu_command(state, SCU_RAM_COMMAND_STANDARD_OFDM | SCU_RAM_COMMAND_CMD_DEMOD_START, 0, NULL, 1, &cmdResult); | ||
| 4063 | if (status < 0) | ||
| 4064 | goto error; | ||
| 4065 | |||
| 4066 | /* Write SC parameter registers, set all AUTO flags in operation mode */ | ||
| 4067 | param1 = (OFDM_SC_RA_RAM_OP_AUTO_MODE__M | | ||
| 4068 | OFDM_SC_RA_RAM_OP_AUTO_GUARD__M | | ||
| 4069 | OFDM_SC_RA_RAM_OP_AUTO_CONST__M | | ||
| 4070 | OFDM_SC_RA_RAM_OP_AUTO_HIER__M | | ||
| 4071 | OFDM_SC_RA_RAM_OP_AUTO_RATE__M); | ||
| 4072 | status = DVBTScCommand(state, OFDM_SC_RA_RAM_CMD_SET_PREF_PARAM, | ||
| 4073 | 0, transmissionParams, param1, 0, 0, 0); | ||
| 4074 | if (status < 0) | ||
| 4075 | goto error; | ||
| 4076 | |||
| 4077 | if (!state->m_DRXK_A3_ROM_CODE) | ||
| 4078 | status = DVBTCtrlSetSqiSpeed(state, &state->m_sqiSpeed); | ||
| 4079 | error: | ||
| 4080 | if (status < 0) | ||
| 4081 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 4082 | |||
| 4083 | return status; | ||
| 4084 | } | ||
| 4085 | |||
| 4086 | |||
| 4087 | /*============================================================================*/ | ||
| 4088 | |||
| 4089 | /** | ||
| 4090 | * \brief Retreive lock status . | ||
| 4091 | * \param demod Pointer to demodulator instance. | ||
| 4092 | * \param lockStat Pointer to lock status structure. | ||
| 4093 | * \return DRXStatus_t. | ||
| 4094 | * | ||
| 4095 | */ | ||
| 4096 | static int GetDVBTLockStatus(struct drxk_state *state, u32 *pLockStatus) | ||
| 4097 | { | ||
| 4098 | int status; | ||
| 4099 | const u16 mpeg_lock_mask = (OFDM_SC_RA_RAM_LOCK_MPEG__M | | ||
| 4100 | OFDM_SC_RA_RAM_LOCK_FEC__M); | ||
| 4101 | const u16 fec_lock_mask = (OFDM_SC_RA_RAM_LOCK_FEC__M); | ||
| 4102 | const u16 demod_lock_mask = OFDM_SC_RA_RAM_LOCK_DEMOD__M; | ||
| 4103 | |||
| 4104 | u16 ScRaRamLock = 0; | ||
| 4105 | u16 ScCommExec = 0; | ||
| 4106 | |||
| 4107 | dprintk(1, "\n"); | ||
| 4108 | |||
| 4109 | *pLockStatus = NOT_LOCKED; | ||
| 4110 | /* driver 0.9.0 */ | ||
| 4111 | /* Check if SC is running */ | ||
| 4112 | status = read16(state, OFDM_SC_COMM_EXEC__A, &ScCommExec); | ||
| 4113 | if (status < 0) | ||
| 4114 | goto end; | ||
| 4115 | if (ScCommExec == OFDM_SC_COMM_EXEC_STOP) | ||
| 4116 | goto end; | ||
| 4117 | |||
| 4118 | status = read16(state, OFDM_SC_RA_RAM_LOCK__A, &ScRaRamLock); | ||
| 4119 | if (status < 0) | ||
| 4120 | goto end; | ||
| 4121 | |||
| 4122 | if ((ScRaRamLock & mpeg_lock_mask) == mpeg_lock_mask) | ||
| 4123 | *pLockStatus = MPEG_LOCK; | ||
| 4124 | else if ((ScRaRamLock & fec_lock_mask) == fec_lock_mask) | ||
| 4125 | *pLockStatus = FEC_LOCK; | ||
| 4126 | else if ((ScRaRamLock & demod_lock_mask) == demod_lock_mask) | ||
| 4127 | *pLockStatus = DEMOD_LOCK; | ||
| 4128 | else if (ScRaRamLock & OFDM_SC_RA_RAM_LOCK_NODVBT__M) | ||
| 4129 | *pLockStatus = NEVER_LOCK; | ||
| 4130 | end: | ||
| 4131 | if (status < 0) | ||
| 4132 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 4133 | |||
| 4134 | return status; | ||
| 4135 | } | ||
| 4136 | |||
| 4137 | static int PowerUpQAM(struct drxk_state *state) | ||
| 4138 | { | ||
| 4139 | enum DRXPowerMode powerMode = DRXK_POWER_DOWN_OFDM; | ||
| 4140 | int status; | ||
| 4141 | |||
| 4142 | dprintk(1, "\n"); | ||
| 4143 | status = CtrlPowerMode(state, &powerMode); | ||
| 4144 | if (status < 0) | ||
| 4145 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 4146 | |||
| 4147 | return status; | ||
| 4148 | } | ||
| 4149 | |||
| 4150 | |||
| 4151 | /** Power Down QAM */ | ||
| 4152 | static int PowerDownQAM(struct drxk_state *state) | ||
| 4153 | { | ||
| 4154 | u16 data = 0; | ||
| 4155 | u16 cmdResult; | ||
| 4156 | int status = 0; | ||
| 4157 | |||
| 4158 | dprintk(1, "\n"); | ||
| 4159 | status = read16(state, SCU_COMM_EXEC__A, &data); | ||
| 4160 | if (status < 0) | ||
| 4161 | goto error; | ||
| 4162 | if (data == SCU_COMM_EXEC_ACTIVE) { | ||
| 4163 | /* | ||
| 4164 | STOP demodulator | ||
| 4165 | QAM and HW blocks | ||
| 4166 | */ | ||
| 4167 | /* stop all comstate->m_exec */ | ||
| 4168 | status = write16(state, QAM_COMM_EXEC__A, QAM_COMM_EXEC_STOP); | ||
| 4169 | if (status < 0) | ||
| 4170 | goto error; | ||
| 4171 | status = scu_command(state, SCU_RAM_COMMAND_STANDARD_QAM | SCU_RAM_COMMAND_CMD_DEMOD_STOP, 0, NULL, 1, &cmdResult); | ||
| 4172 | if (status < 0) | ||
| 4173 | goto error; | ||
| 4174 | } | ||
| 4175 | /* powerdown AFE */ | ||
| 4176 | status = SetIqmAf(state, false); | ||
| 4177 | |||
| 4178 | error: | ||
| 4179 | if (status < 0) | ||
| 4180 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 4181 | |||
| 4182 | return status; | ||
| 4183 | } | ||
| 4184 | |||
| 4185 | /*============================================================================*/ | ||
| 4186 | |||
| 4187 | /** | ||
| 4188 | * \brief Setup of the QAM Measurement intervals for signal quality | ||
| 4189 | * \param demod instance of demod. | ||
| 4190 | * \param constellation current constellation. | ||
| 4191 | * \return DRXStatus_t. | ||
| 4192 | * | ||
| 4193 | * NOTE: | ||
| 4194 | * Take into account that for certain settings the errorcounters can overflow. | ||
| 4195 | * The implementation does not check this. | ||
| 4196 | * | ||
| 4197 | */ | ||
| 4198 | static int SetQAMMeasurement(struct drxk_state *state, | ||
| 4199 | enum EDrxkConstellation constellation, | ||
| 4200 | u32 symbolRate) | ||
| 4201 | { | ||
| 4202 | u32 fecBitsDesired = 0; /* BER accounting period */ | ||
| 4203 | u32 fecRsPeriodTotal = 0; /* Total period */ | ||
| 4204 | u16 fecRsPrescale = 0; /* ReedSolomon Measurement Prescale */ | ||
| 4205 | u16 fecRsPeriod = 0; /* Value for corresponding I2C register */ | ||
| 4206 | int status = 0; | ||
| 4207 | |||
| 4208 | dprintk(1, "\n"); | ||
| 4209 | |||
| 4210 | fecRsPrescale = 1; | ||
| 4211 | /* fecBitsDesired = symbolRate [kHz] * | ||
| 4212 | FrameLenght [ms] * | ||
| 4213 | (constellation + 1) * | ||
| 4214 | SyncLoss (== 1) * | ||
| 4215 | ViterbiLoss (==1) | ||
| 4216 | */ | ||
| 4217 | switch (constellation) { | ||
| 4218 | case DRX_CONSTELLATION_QAM16: | ||
| 4219 | fecBitsDesired = 4 * symbolRate; | ||
| 4220 | break; | ||
| 4221 | case DRX_CONSTELLATION_QAM32: | ||
| 4222 | fecBitsDesired = 5 * symbolRate; | ||
| 4223 | break; | ||
| 4224 | case DRX_CONSTELLATION_QAM64: | ||
| 4225 | fecBitsDesired = 6 * symbolRate; | ||
| 4226 | break; | ||
| 4227 | case DRX_CONSTELLATION_QAM128: | ||
| 4228 | fecBitsDesired = 7 * symbolRate; | ||
| 4229 | break; | ||
| 4230 | case DRX_CONSTELLATION_QAM256: | ||
| 4231 | fecBitsDesired = 8 * symbolRate; | ||
| 4232 | break; | ||
| 4233 | default: | ||
| 4234 | status = -EINVAL; | ||
| 4235 | } | ||
| 4236 | if (status < 0) | ||
| 4237 | goto error; | ||
| 4238 | |||
| 4239 | fecBitsDesired /= 1000; /* symbolRate [Hz] -> symbolRate [kHz] */ | ||
| 4240 | fecBitsDesired *= 500; /* meas. period [ms] */ | ||
| 4241 | |||
| 4242 | /* Annex A/C: bits/RsPeriod = 204 * 8 = 1632 */ | ||
| 4243 | /* fecRsPeriodTotal = fecBitsDesired / 1632 */ | ||
| 4244 | fecRsPeriodTotal = (fecBitsDesired / 1632UL) + 1; /* roughly ceil */ | ||
| 4245 | |||
| 4246 | /* fecRsPeriodTotal = fecRsPrescale * fecRsPeriod */ | ||
| 4247 | fecRsPrescale = 1 + (u16) (fecRsPeriodTotal >> 16); | ||
| 4248 | if (fecRsPrescale == 0) { | ||
| 4249 | /* Divide by zero (though impossible) */ | ||
| 4250 | status = -EINVAL; | ||
| 4251 | if (status < 0) | ||
| 4252 | goto error; | ||
| 4253 | } | ||
| 4254 | fecRsPeriod = | ||
| 4255 | ((u16) fecRsPeriodTotal + | ||
| 4256 | (fecRsPrescale >> 1)) / fecRsPrescale; | ||
| 4257 | |||
| 4258 | /* write corresponding registers */ | ||
| 4259 | status = write16(state, FEC_RS_MEASUREMENT_PERIOD__A, fecRsPeriod); | ||
| 4260 | if (status < 0) | ||
| 4261 | goto error; | ||
| 4262 | status = write16(state, FEC_RS_MEASUREMENT_PRESCALE__A, fecRsPrescale); | ||
| 4263 | if (status < 0) | ||
| 4264 | goto error; | ||
| 4265 | status = write16(state, FEC_OC_SNC_FAIL_PERIOD__A, fecRsPeriod); | ||
| 4266 | error: | ||
| 4267 | if (status < 0) | ||
| 4268 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 4269 | return status; | ||
| 4270 | } | ||
| 4271 | |||
| 4272 | static int SetQAM16(struct drxk_state *state) | ||
| 4273 | { | ||
| 4274 | int status = 0; | ||
| 4275 | |||
| 4276 | dprintk(1, "\n"); | ||
| 4277 | /* QAM Equalizer Setup */ | ||
| 4278 | /* Equalizer */ | ||
| 4279 | status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 13517); | ||
| 4280 | if (status < 0) | ||
| 4281 | goto error; | ||
| 4282 | status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 13517); | ||
| 4283 | if (status < 0) | ||
| 4284 | goto error; | ||
| 4285 | status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 13517); | ||
| 4286 | if (status < 0) | ||
| 4287 | goto error; | ||
| 4288 | status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 13517); | ||
| 4289 | if (status < 0) | ||
| 4290 | goto error; | ||
| 4291 | status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 13517); | ||
| 4292 | if (status < 0) | ||
| 4293 | goto error; | ||
| 4294 | status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 13517); | ||
| 4295 | if (status < 0) | ||
| 4296 | goto error; | ||
| 4297 | /* Decision Feedback Equalizer */ | ||
| 4298 | status = write16(state, QAM_DQ_QUAL_FUN0__A, 2); | ||
| 4299 | if (status < 0) | ||
| 4300 | goto error; | ||
| 4301 | status = write16(state, QAM_DQ_QUAL_FUN1__A, 2); | ||
| 4302 | if (status < 0) | ||
| 4303 | goto error; | ||
| 4304 | status = write16(state, QAM_DQ_QUAL_FUN2__A, 2); | ||
| 4305 | if (status < 0) | ||
| 4306 | goto error; | ||
| 4307 | status = write16(state, QAM_DQ_QUAL_FUN3__A, 2); | ||
| 4308 | if (status < 0) | ||
| 4309 | goto error; | ||
| 4310 | status = write16(state, QAM_DQ_QUAL_FUN4__A, 2); | ||
| 4311 | if (status < 0) | ||
| 4312 | goto error; | ||
| 4313 | status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); | ||
| 4314 | if (status < 0) | ||
| 4315 | goto error; | ||
| 4316 | |||
| 4317 | status = write16(state, QAM_SY_SYNC_HWM__A, 5); | ||
| 4318 | if (status < 0) | ||
| 4319 | goto error; | ||
| 4320 | status = write16(state, QAM_SY_SYNC_AWM__A, 4); | ||
| 4321 | if (status < 0) | ||
| 4322 | goto error; | ||
| 4323 | status = write16(state, QAM_SY_SYNC_LWM__A, 3); | ||
| 4324 | if (status < 0) | ||
| 4325 | goto error; | ||
| 4326 | |||
| 4327 | /* QAM Slicer Settings */ | ||
| 4328 | status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A, DRXK_QAM_SL_SIG_POWER_QAM16); | ||
| 4329 | if (status < 0) | ||
| 4330 | goto error; | ||
| 4331 | |||
| 4332 | /* QAM Loop Controller Coeficients */ | ||
| 4333 | status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); | ||
| 4334 | if (status < 0) | ||
| 4335 | goto error; | ||
| 4336 | status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); | ||
| 4337 | if (status < 0) | ||
| 4338 | goto error; | ||
| 4339 | status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12); | ||
| 4340 | if (status < 0) | ||
| 4341 | goto error; | ||
| 4342 | status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24); | ||
| 4343 | if (status < 0) | ||
| 4344 | goto error; | ||
| 4345 | status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); | ||
| 4346 | if (status < 0) | ||
| 4347 | goto error; | ||
| 4348 | status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); | ||
| 4349 | if (status < 0) | ||
| 4350 | goto error; | ||
| 4351 | status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); | ||
| 4352 | if (status < 0) | ||
| 4353 | goto error; | ||
| 4354 | status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); | ||
| 4355 | if (status < 0) | ||
| 4356 | goto error; | ||
| 4357 | |||
| 4358 | status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5); | ||
| 4359 | if (status < 0) | ||
| 4360 | goto error; | ||
| 4361 | status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 20); | ||
| 4362 | if (status < 0) | ||
| 4363 | goto error; | ||
| 4364 | status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 80); | ||
| 4365 | if (status < 0) | ||
| 4366 | goto error; | ||
| 4367 | status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5); | ||
| 4368 | if (status < 0) | ||
| 4369 | goto error; | ||
| 4370 | status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 20); | ||
| 4371 | if (status < 0) | ||
| 4372 | goto error; | ||
| 4373 | status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 50); | ||
| 4374 | if (status < 0) | ||
| 4375 | goto error; | ||
| 4376 | status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16); | ||
| 4377 | if (status < 0) | ||
| 4378 | goto error; | ||
| 4379 | status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 16); | ||
| 4380 | if (status < 0) | ||
| 4381 | goto error; | ||
| 4382 | status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 32); | ||
| 4383 | if (status < 0) | ||
| 4384 | goto error; | ||
| 4385 | status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5); | ||
| 4386 | if (status < 0) | ||
| 4387 | goto error; | ||
| 4388 | status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10); | ||
| 4389 | if (status < 0) | ||
| 4390 | goto error; | ||
| 4391 | status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 10); | ||
| 4392 | if (status < 0) | ||
| 4393 | goto error; | ||
| 4394 | |||
| 4395 | |||
| 4396 | /* QAM State Machine (FSM) Thresholds */ | ||
| 4397 | |||
| 4398 | status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 140); | ||
| 4399 | if (status < 0) | ||
| 4400 | goto error; | ||
| 4401 | status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 50); | ||
| 4402 | if (status < 0) | ||
| 4403 | goto error; | ||
| 4404 | status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 95); | ||
| 4405 | if (status < 0) | ||
| 4406 | goto error; | ||
| 4407 | status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 120); | ||
| 4408 | if (status < 0) | ||
| 4409 | goto error; | ||
| 4410 | status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 230); | ||
| 4411 | if (status < 0) | ||
| 4412 | goto error; | ||
| 4413 | status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 105); | ||
| 4414 | if (status < 0) | ||
| 4415 | goto error; | ||
| 4416 | |||
| 4417 | status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40); | ||
| 4418 | if (status < 0) | ||
| 4419 | goto error; | ||
| 4420 | status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 4); | ||
| 4421 | if (status < 0) | ||
| 4422 | goto error; | ||
| 4423 | status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 24); | ||
| 4424 | if (status < 0) | ||
| 4425 | goto error; | ||
| 4426 | |||
| 4427 | |||
| 4428 | /* QAM FSM Tracking Parameters */ | ||
| 4429 | |||
| 4430 | status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 16); | ||
| 4431 | if (status < 0) | ||
| 4432 | goto error; | ||
| 4433 | status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 220); | ||
| 4434 | if (status < 0) | ||
| 4435 | goto error; | ||
| 4436 | status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) 25); | ||
| 4437 | if (status < 0) | ||
| 4438 | goto error; | ||
| 4439 | status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) 6); | ||
| 4440 | if (status < 0) | ||
| 4441 | goto error; | ||
| 4442 | status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) -24); | ||
| 4443 | if (status < 0) | ||
| 4444 | goto error; | ||
| 4445 | status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) -65); | ||
| 4446 | if (status < 0) | ||
| 4447 | goto error; | ||
| 4448 | status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -127); | ||
| 4449 | if (status < 0) | ||
| 4450 | goto error; | ||
| 4451 | |||
| 4452 | error: | ||
| 4453 | if (status < 0) | ||
| 4454 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 4455 | return status; | ||
| 4456 | } | ||
| 4457 | |||
| 4458 | /*============================================================================*/ | ||
| 4459 | |||
| 4460 | /** | ||
| 4461 | * \brief QAM32 specific setup | ||
| 4462 | * \param demod instance of demod. | ||
| 4463 | * \return DRXStatus_t. | ||
| 4464 | */ | ||
| 4465 | static int SetQAM32(struct drxk_state *state) | ||
| 4466 | { | ||
| 4467 | int status = 0; | ||
| 4468 | |||
| 4469 | dprintk(1, "\n"); | ||
| 4470 | |||
| 4471 | /* QAM Equalizer Setup */ | ||
| 4472 | /* Equalizer */ | ||
| 4473 | status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 6707); | ||
| 4474 | if (status < 0) | ||
| 4475 | goto error; | ||
| 4476 | status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 6707); | ||
| 4477 | if (status < 0) | ||
| 4478 | goto error; | ||
| 4479 | status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 6707); | ||
| 4480 | if (status < 0) | ||
| 4481 | goto error; | ||
| 4482 | status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 6707); | ||
| 4483 | if (status < 0) | ||
| 4484 | goto error; | ||
| 4485 | status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 6707); | ||
| 4486 | if (status < 0) | ||
| 4487 | goto error; | ||
| 4488 | status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 6707); | ||
| 4489 | if (status < 0) | ||
| 4490 | goto error; | ||
| 4491 | |||
| 4492 | /* Decision Feedback Equalizer */ | ||
| 4493 | status = write16(state, QAM_DQ_QUAL_FUN0__A, 3); | ||
| 4494 | if (status < 0) | ||
| 4495 | goto error; | ||
| 4496 | status = write16(state, QAM_DQ_QUAL_FUN1__A, 3); | ||
| 4497 | if (status < 0) | ||
| 4498 | goto error; | ||
| 4499 | status = write16(state, QAM_DQ_QUAL_FUN2__A, 3); | ||
| 4500 | if (status < 0) | ||
| 4501 | goto error; | ||
| 4502 | status = write16(state, QAM_DQ_QUAL_FUN3__A, 3); | ||
| 4503 | if (status < 0) | ||
| 4504 | goto error; | ||
| 4505 | status = write16(state, QAM_DQ_QUAL_FUN4__A, 3); | ||
| 4506 | if (status < 0) | ||
| 4507 | goto error; | ||
| 4508 | status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); | ||
| 4509 | if (status < 0) | ||
| 4510 | goto error; | ||
| 4511 | |||
| 4512 | status = write16(state, QAM_SY_SYNC_HWM__A, 6); | ||
| 4513 | if (status < 0) | ||
| 4514 | goto error; | ||
| 4515 | status = write16(state, QAM_SY_SYNC_AWM__A, 5); | ||
| 4516 | if (status < 0) | ||
| 4517 | goto error; | ||
| 4518 | status = write16(state, QAM_SY_SYNC_LWM__A, 3); | ||
| 4519 | if (status < 0) | ||
| 4520 | goto error; | ||
| 4521 | |||
| 4522 | /* QAM Slicer Settings */ | ||
| 4523 | |||
| 4524 | status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A, DRXK_QAM_SL_SIG_POWER_QAM32); | ||
| 4525 | if (status < 0) | ||
| 4526 | goto error; | ||
| 4527 | |||
| 4528 | |||
| 4529 | /* QAM Loop Controller Coeficients */ | ||
| 4530 | |||
| 4531 | status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); | ||
| 4532 | if (status < 0) | ||
| 4533 | goto error; | ||
| 4534 | status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); | ||
| 4535 | if (status < 0) | ||
| 4536 | goto error; | ||
| 4537 | status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12); | ||
| 4538 | if (status < 0) | ||
| 4539 | goto error; | ||
| 4540 | status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24); | ||
| 4541 | if (status < 0) | ||
| 4542 | goto error; | ||
| 4543 | status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); | ||
| 4544 | if (status < 0) | ||
| 4545 | goto error; | ||
| 4546 | status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); | ||
| 4547 | if (status < 0) | ||
| 4548 | goto error; | ||
| 4549 | status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); | ||
| 4550 | if (status < 0) | ||
| 4551 | goto error; | ||
| 4552 | status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); | ||
| 4553 | if (status < 0) | ||
| 4554 | goto error; | ||
| 4555 | |||
| 4556 | status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5); | ||
| 4557 | if (status < 0) | ||
| 4558 | goto error; | ||
| 4559 | status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 20); | ||
| 4560 | if (status < 0) | ||
| 4561 | goto error; | ||
| 4562 | status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 80); | ||
| 4563 | if (status < 0) | ||
| 4564 | goto error; | ||
| 4565 | status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5); | ||
| 4566 | if (status < 0) | ||
| 4567 | goto error; | ||
| 4568 | status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 20); | ||
| 4569 | if (status < 0) | ||
| 4570 | goto error; | ||
| 4571 | status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 50); | ||
| 4572 | if (status < 0) | ||
| 4573 | goto error; | ||
| 4574 | status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16); | ||
| 4575 | if (status < 0) | ||
| 4576 | goto error; | ||
| 4577 | status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 16); | ||
| 4578 | if (status < 0) | ||
| 4579 | goto error; | ||
| 4580 | status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 16); | ||
| 4581 | if (status < 0) | ||
| 4582 | goto error; | ||
| 4583 | status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5); | ||
| 4584 | if (status < 0) | ||
| 4585 | goto error; | ||
| 4586 | status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10); | ||
| 4587 | if (status < 0) | ||
| 4588 | goto error; | ||
| 4589 | status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 0); | ||
| 4590 | if (status < 0) | ||
| 4591 | goto error; | ||
| 4592 | |||
| 4593 | |||
| 4594 | /* QAM State Machine (FSM) Thresholds */ | ||
| 4595 | |||
| 4596 | status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 90); | ||
| 4597 | if (status < 0) | ||
| 4598 | goto error; | ||
| 4599 | status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 50); | ||
| 4600 | if (status < 0) | ||
| 4601 | goto error; | ||
| 4602 | status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 80); | ||
| 4603 | if (status < 0) | ||
| 4604 | goto error; | ||
| 4605 | status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 100); | ||
| 4606 | if (status < 0) | ||
| 4607 | goto error; | ||
| 4608 | status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 170); | ||
| 4609 | if (status < 0) | ||
| 4610 | goto error; | ||
| 4611 | status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 100); | ||
| 4612 | if (status < 0) | ||
| 4613 | goto error; | ||
| 4614 | |||
| 4615 | status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40); | ||
| 4616 | if (status < 0) | ||
| 4617 | goto error; | ||
| 4618 | status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 4); | ||
| 4619 | if (status < 0) | ||
| 4620 | goto error; | ||
| 4621 | status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 10); | ||
| 4622 | if (status < 0) | ||
| 4623 | goto error; | ||
| 4624 | |||
| 4625 | |||
| 4626 | /* QAM FSM Tracking Parameters */ | ||
| 4627 | |||
| 4628 | status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 12); | ||
| 4629 | if (status < 0) | ||
| 4630 | goto error; | ||
| 4631 | status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 140); | ||
| 4632 | if (status < 0) | ||
| 4633 | goto error; | ||
| 4634 | status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) -8); | ||
| 4635 | if (status < 0) | ||
| 4636 | goto error; | ||
| 4637 | status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) -16); | ||
| 4638 | if (status < 0) | ||
| 4639 | goto error; | ||
| 4640 | status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) -26); | ||
| 4641 | if (status < 0) | ||
| 4642 | goto error; | ||
| 4643 | status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) -56); | ||
| 4644 | if (status < 0) | ||
| 4645 | goto error; | ||
| 4646 | status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -86); | ||
| 4647 | error: | ||
| 4648 | if (status < 0) | ||
| 4649 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 4650 | return status; | ||
| 4651 | } | ||
| 4652 | |||
| 4653 | /*============================================================================*/ | ||
| 4654 | |||
| 4655 | /** | ||
| 4656 | * \brief QAM64 specific setup | ||
| 4657 | * \param demod instance of demod. | ||
| 4658 | * \return DRXStatus_t. | ||
| 4659 | */ | ||
| 4660 | static int SetQAM64(struct drxk_state *state) | ||
| 4661 | { | ||
| 4662 | int status = 0; | ||
| 4663 | |||
| 4664 | dprintk(1, "\n"); | ||
| 4665 | /* QAM Equalizer Setup */ | ||
| 4666 | /* Equalizer */ | ||
| 4667 | status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 13336); | ||
| 4668 | if (status < 0) | ||
| 4669 | goto error; | ||
| 4670 | status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 12618); | ||
| 4671 | if (status < 0) | ||
| 4672 | goto error; | ||
| 4673 | status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 11988); | ||
| 4674 | if (status < 0) | ||
| 4675 | goto error; | ||
| 4676 | status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 13809); | ||
| 4677 | if (status < 0) | ||
| 4678 | goto error; | ||
| 4679 | status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 13809); | ||
| 4680 | if (status < 0) | ||
| 4681 | goto error; | ||
| 4682 | status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 15609); | ||
| 4683 | if (status < 0) | ||
| 4684 | goto error; | ||
| 4685 | |||
| 4686 | /* Decision Feedback Equalizer */ | ||
| 4687 | status = write16(state, QAM_DQ_QUAL_FUN0__A, 4); | ||
| 4688 | if (status < 0) | ||
| 4689 | goto error; | ||
| 4690 | status = write16(state, QAM_DQ_QUAL_FUN1__A, 4); | ||
| 4691 | if (status < 0) | ||
| 4692 | goto error; | ||
| 4693 | status = write16(state, QAM_DQ_QUAL_FUN2__A, 4); | ||
| 4694 | if (status < 0) | ||
| 4695 | goto error; | ||
| 4696 | status = write16(state, QAM_DQ_QUAL_FUN3__A, 4); | ||
| 4697 | if (status < 0) | ||
| 4698 | goto error; | ||
| 4699 | status = write16(state, QAM_DQ_QUAL_FUN4__A, 3); | ||
| 4700 | if (status < 0) | ||
| 4701 | goto error; | ||
| 4702 | status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); | ||
| 4703 | if (status < 0) | ||
| 4704 | goto error; | ||
| 4705 | |||
| 4706 | status = write16(state, QAM_SY_SYNC_HWM__A, 5); | ||
| 4707 | if (status < 0) | ||
| 4708 | goto error; | ||
| 4709 | status = write16(state, QAM_SY_SYNC_AWM__A, 4); | ||
| 4710 | if (status < 0) | ||
| 4711 | goto error; | ||
| 4712 | status = write16(state, QAM_SY_SYNC_LWM__A, 3); | ||
| 4713 | if (status < 0) | ||
| 4714 | goto error; | ||
| 4715 | |||
| 4716 | /* QAM Slicer Settings */ | ||
| 4717 | status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A, DRXK_QAM_SL_SIG_POWER_QAM64); | ||
| 4718 | if (status < 0) | ||
| 4719 | goto error; | ||
| 4720 | |||
| 4721 | |||
| 4722 | /* QAM Loop Controller Coeficients */ | ||
| 4723 | |||
| 4724 | status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); | ||
| 4725 | if (status < 0) | ||
| 4726 | goto error; | ||
| 4727 | status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); | ||
| 4728 | if (status < 0) | ||
| 4729 | goto error; | ||
| 4730 | status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12); | ||
| 4731 | if (status < 0) | ||
| 4732 | goto error; | ||
| 4733 | status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24); | ||
| 4734 | if (status < 0) | ||
| 4735 | goto error; | ||
| 4736 | status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); | ||
| 4737 | if (status < 0) | ||
| 4738 | goto error; | ||
| 4739 | status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); | ||
| 4740 | if (status < 0) | ||
| 4741 | goto error; | ||
| 4742 | status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); | ||
| 4743 | if (status < 0) | ||
| 4744 | goto error; | ||
| 4745 | status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); | ||
| 4746 | if (status < 0) | ||
| 4747 | goto error; | ||
| 4748 | |||
| 4749 | status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5); | ||
| 4750 | if (status < 0) | ||
| 4751 | goto error; | ||
| 4752 | status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 30); | ||
| 4753 | if (status < 0) | ||
| 4754 | goto error; | ||
| 4755 | status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 100); | ||
| 4756 | if (status < 0) | ||
| 4757 | goto error; | ||
| 4758 | status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5); | ||
| 4759 | if (status < 0) | ||
| 4760 | goto error; | ||
| 4761 | status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 30); | ||
| 4762 | if (status < 0) | ||
| 4763 | goto error; | ||
| 4764 | status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 50); | ||
| 4765 | if (status < 0) | ||
| 4766 | goto error; | ||
| 4767 | status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16); | ||
| 4768 | if (status < 0) | ||
| 4769 | goto error; | ||
| 4770 | status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 25); | ||
| 4771 | if (status < 0) | ||
| 4772 | goto error; | ||
| 4773 | status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 48); | ||
| 4774 | if (status < 0) | ||
| 4775 | goto error; | ||
| 4776 | status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5); | ||
| 4777 | if (status < 0) | ||
| 4778 | goto error; | ||
| 4779 | status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10); | ||
| 4780 | if (status < 0) | ||
| 4781 | goto error; | ||
| 4782 | status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 10); | ||
| 4783 | if (status < 0) | ||
| 4784 | goto error; | ||
| 4785 | |||
| 4786 | |||
| 4787 | /* QAM State Machine (FSM) Thresholds */ | ||
| 4788 | |||
| 4789 | status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 100); | ||
| 4790 | if (status < 0) | ||
| 4791 | goto error; | ||
| 4792 | status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 60); | ||
| 4793 | if (status < 0) | ||
| 4794 | goto error; | ||
| 4795 | status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 80); | ||
| 4796 | if (status < 0) | ||
| 4797 | goto error; | ||
| 4798 | status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 110); | ||
| 4799 | if (status < 0) | ||
| 4800 | goto error; | ||
| 4801 | status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 200); | ||
| 4802 | if (status < 0) | ||
| 4803 | goto error; | ||
| 4804 | status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 95); | ||
| 4805 | if (status < 0) | ||
| 4806 | goto error; | ||
| 4807 | |||
| 4808 | status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40); | ||
| 4809 | if (status < 0) | ||
| 4810 | goto error; | ||
| 4811 | status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 4); | ||
| 4812 | if (status < 0) | ||
| 4813 | goto error; | ||
| 4814 | status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 15); | ||
| 4815 | if (status < 0) | ||
| 4816 | goto error; | ||
| 4817 | |||
| 4818 | |||
| 4819 | /* QAM FSM Tracking Parameters */ | ||
| 4820 | |||
| 4821 | status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 12); | ||
| 4822 | if (status < 0) | ||
| 4823 | goto error; | ||
| 4824 | status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 141); | ||
| 4825 | if (status < 0) | ||
| 4826 | goto error; | ||
| 4827 | status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) 7); | ||
| 4828 | if (status < 0) | ||
| 4829 | goto error; | ||
| 4830 | status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) 0); | ||
| 4831 | if (status < 0) | ||
| 4832 | goto error; | ||
| 4833 | status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) -15); | ||
| 4834 | if (status < 0) | ||
| 4835 | goto error; | ||
| 4836 | status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) -45); | ||
| 4837 | if (status < 0) | ||
| 4838 | goto error; | ||
| 4839 | status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -80); | ||
| 4840 | error: | ||
| 4841 | if (status < 0) | ||
| 4842 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 4843 | |||
| 4844 | return status; | ||
| 4845 | } | ||
| 4846 | |||
| 4847 | /*============================================================================*/ | ||
| 4848 | |||
| 4849 | /** | ||
| 4850 | * \brief QAM128 specific setup | ||
| 4851 | * \param demod: instance of demod. | ||
| 4852 | * \return DRXStatus_t. | ||
| 4853 | */ | ||
| 4854 | static int SetQAM128(struct drxk_state *state) | ||
| 4855 | { | ||
| 4856 | int status = 0; | ||
| 4857 | |||
| 4858 | dprintk(1, "\n"); | ||
| 4859 | /* QAM Equalizer Setup */ | ||
| 4860 | /* Equalizer */ | ||
| 4861 | status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 6564); | ||
| 4862 | if (status < 0) | ||
| 4863 | goto error; | ||
| 4864 | status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 6598); | ||
| 4865 | if (status < 0) | ||
| 4866 | goto error; | ||
| 4867 | status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 6394); | ||
| 4868 | if (status < 0) | ||
| 4869 | goto error; | ||
| 4870 | status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 6409); | ||
| 4871 | if (status < 0) | ||
| 4872 | goto error; | ||
| 4873 | status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 6656); | ||
| 4874 | if (status < 0) | ||
| 4875 | goto error; | ||
| 4876 | status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 7238); | ||
| 4877 | if (status < 0) | ||
| 4878 | goto error; | ||
| 4879 | |||
| 4880 | /* Decision Feedback Equalizer */ | ||
| 4881 | status = write16(state, QAM_DQ_QUAL_FUN0__A, 6); | ||
| 4882 | if (status < 0) | ||
| 4883 | goto error; | ||
| 4884 | status = write16(state, QAM_DQ_QUAL_FUN1__A, 6); | ||
| 4885 | if (status < 0) | ||
| 4886 | goto error; | ||
| 4887 | status = write16(state, QAM_DQ_QUAL_FUN2__A, 6); | ||
| 4888 | if (status < 0) | ||
| 4889 | goto error; | ||
| 4890 | status = write16(state, QAM_DQ_QUAL_FUN3__A, 6); | ||
| 4891 | if (status < 0) | ||
| 4892 | goto error; | ||
| 4893 | status = write16(state, QAM_DQ_QUAL_FUN4__A, 5); | ||
| 4894 | if (status < 0) | ||
| 4895 | goto error; | ||
| 4896 | status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); | ||
| 4897 | if (status < 0) | ||
| 4898 | goto error; | ||
| 4899 | |||
| 4900 | status = write16(state, QAM_SY_SYNC_HWM__A, 6); | ||
| 4901 | if (status < 0) | ||
| 4902 | goto error; | ||
| 4903 | status = write16(state, QAM_SY_SYNC_AWM__A, 5); | ||
| 4904 | if (status < 0) | ||
| 4905 | goto error; | ||
| 4906 | status = write16(state, QAM_SY_SYNC_LWM__A, 3); | ||
| 4907 | if (status < 0) | ||
| 4908 | goto error; | ||
| 4909 | |||
| 4910 | |||
| 4911 | /* QAM Slicer Settings */ | ||
| 4912 | |||
| 4913 | status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A, DRXK_QAM_SL_SIG_POWER_QAM128); | ||
| 4914 | if (status < 0) | ||
| 4915 | goto error; | ||
| 4916 | |||
| 4917 | |||
| 4918 | /* QAM Loop Controller Coeficients */ | ||
| 4919 | |||
| 4920 | status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); | ||
| 4921 | if (status < 0) | ||
| 4922 | goto error; | ||
| 4923 | status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); | ||
| 4924 | if (status < 0) | ||
| 4925 | goto error; | ||
| 4926 | status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12); | ||
| 4927 | if (status < 0) | ||
| 4928 | goto error; | ||
| 4929 | status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24); | ||
| 4930 | if (status < 0) | ||
| 4931 | goto error; | ||
| 4932 | status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); | ||
| 4933 | if (status < 0) | ||
| 4934 | goto error; | ||
| 4935 | status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); | ||
| 4936 | if (status < 0) | ||
| 4937 | goto error; | ||
| 4938 | status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); | ||
| 4939 | if (status < 0) | ||
| 4940 | goto error; | ||
| 4941 | status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); | ||
| 4942 | if (status < 0) | ||
| 4943 | goto error; | ||
| 4944 | |||
| 4945 | status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5); | ||
| 4946 | if (status < 0) | ||
| 4947 | goto error; | ||
| 4948 | status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 40); | ||
| 4949 | if (status < 0) | ||
| 4950 | goto error; | ||
| 4951 | status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 120); | ||
| 4952 | if (status < 0) | ||
| 4953 | goto error; | ||
| 4954 | status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5); | ||
| 4955 | if (status < 0) | ||
| 4956 | goto error; | ||
| 4957 | status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 40); | ||
| 4958 | if (status < 0) | ||
| 4959 | goto error; | ||
| 4960 | status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 60); | ||
| 4961 | if (status < 0) | ||
| 4962 | goto error; | ||
| 4963 | status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16); | ||
| 4964 | if (status < 0) | ||
| 4965 | goto error; | ||
| 4966 | status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 25); | ||
| 4967 | if (status < 0) | ||
| 4968 | goto error; | ||
| 4969 | status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 64); | ||
| 4970 | if (status < 0) | ||
| 4971 | goto error; | ||
| 4972 | status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5); | ||
| 4973 | if (status < 0) | ||
| 4974 | goto error; | ||
| 4975 | status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10); | ||
| 4976 | if (status < 0) | ||
| 4977 | goto error; | ||
| 4978 | status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 0); | ||
| 4979 | if (status < 0) | ||
| 4980 | goto error; | ||
| 4981 | |||
| 4982 | |||
| 4983 | /* QAM State Machine (FSM) Thresholds */ | ||
| 4984 | |||
| 4985 | status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 50); | ||
| 4986 | if (status < 0) | ||
| 4987 | goto error; | ||
| 4988 | status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 60); | ||
| 4989 | if (status < 0) | ||
| 4990 | goto error; | ||
| 4991 | status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 80); | ||
| 4992 | if (status < 0) | ||
| 4993 | goto error; | ||
| 4994 | status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 100); | ||
| 4995 | if (status < 0) | ||
| 4996 | goto error; | ||
| 4997 | status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 140); | ||
| 4998 | if (status < 0) | ||
| 4999 | goto error; | ||
| 5000 | status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 100); | ||
| 5001 | if (status < 0) | ||
| 5002 | goto error; | ||
| 5003 | |||
| 5004 | status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40); | ||
| 5005 | if (status < 0) | ||
| 5006 | goto error; | ||
| 5007 | status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 5); | ||
| 5008 | if (status < 0) | ||
| 5009 | goto error; | ||
| 5010 | |||
| 5011 | status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 12); | ||
| 5012 | if (status < 0) | ||
| 5013 | goto error; | ||
| 5014 | |||
| 5015 | /* QAM FSM Tracking Parameters */ | ||
| 5016 | |||
| 5017 | status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 8); | ||
| 5018 | if (status < 0) | ||
| 5019 | goto error; | ||
| 5020 | status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 65); | ||
| 5021 | if (status < 0) | ||
| 5022 | goto error; | ||
| 5023 | status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) 5); | ||
| 5024 | if (status < 0) | ||
| 5025 | goto error; | ||
| 5026 | status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) 3); | ||
| 5027 | if (status < 0) | ||
| 5028 | goto error; | ||
| 5029 | status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) -1); | ||
| 5030 | if (status < 0) | ||
| 5031 | goto error; | ||
| 5032 | status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) -12); | ||
| 5033 | if (status < 0) | ||
| 5034 | goto error; | ||
| 5035 | status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -23); | ||
| 5036 | error: | ||
| 5037 | if (status < 0) | ||
| 5038 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 5039 | |||
| 5040 | return status; | ||
| 5041 | } | ||
| 5042 | |||
| 5043 | /*============================================================================*/ | ||
| 5044 | |||
| 5045 | /** | ||
| 5046 | * \brief QAM256 specific setup | ||
| 5047 | * \param demod: instance of demod. | ||
| 5048 | * \return DRXStatus_t. | ||
| 5049 | */ | ||
| 5050 | static int SetQAM256(struct drxk_state *state) | ||
| 5051 | { | ||
| 5052 | int status = 0; | ||
| 5053 | |||
| 5054 | dprintk(1, "\n"); | ||
| 5055 | /* QAM Equalizer Setup */ | ||
| 5056 | /* Equalizer */ | ||
| 5057 | status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 11502); | ||
| 5058 | if (status < 0) | ||
| 5059 | goto error; | ||
| 5060 | status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 12084); | ||
| 5061 | if (status < 0) | ||
| 5062 | goto error; | ||
| 5063 | status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 12543); | ||
| 5064 | if (status < 0) | ||
| 5065 | goto error; | ||
| 5066 | status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 12931); | ||
| 5067 | if (status < 0) | ||
| 5068 | goto error; | ||
| 5069 | status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 13629); | ||
| 5070 | if (status < 0) | ||
| 5071 | goto error; | ||
| 5072 | status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 15385); | ||
| 5073 | if (status < 0) | ||
| 5074 | goto error; | ||
| 5075 | |||
| 5076 | /* Decision Feedback Equalizer */ | ||
| 5077 | status = write16(state, QAM_DQ_QUAL_FUN0__A, 8); | ||
| 5078 | if (status < 0) | ||
| 5079 | goto error; | ||
| 5080 | status = write16(state, QAM_DQ_QUAL_FUN1__A, 8); | ||
| 5081 | if (status < 0) | ||
| 5082 | goto error; | ||
| 5083 | status = write16(state, QAM_DQ_QUAL_FUN2__A, 8); | ||
| 5084 | if (status < 0) | ||
| 5085 | goto error; | ||
| 5086 | status = write16(state, QAM_DQ_QUAL_FUN3__A, 8); | ||
| 5087 | if (status < 0) | ||
| 5088 | goto error; | ||
| 5089 | status = write16(state, QAM_DQ_QUAL_FUN4__A, 6); | ||
| 5090 | if (status < 0) | ||
| 5091 | goto error; | ||
| 5092 | status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); | ||
| 5093 | if (status < 0) | ||
| 5094 | goto error; | ||
| 5095 | |||
| 5096 | status = write16(state, QAM_SY_SYNC_HWM__A, 5); | ||
| 5097 | if (status < 0) | ||
| 5098 | goto error; | ||
| 5099 | status = write16(state, QAM_SY_SYNC_AWM__A, 4); | ||
| 5100 | if (status < 0) | ||
| 5101 | goto error; | ||
| 5102 | status = write16(state, QAM_SY_SYNC_LWM__A, 3); | ||
| 5103 | if (status < 0) | ||
| 5104 | goto error; | ||
| 5105 | |||
| 5106 | /* QAM Slicer Settings */ | ||
| 5107 | |||
| 5108 | status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A, DRXK_QAM_SL_SIG_POWER_QAM256); | ||
| 5109 | if (status < 0) | ||
| 5110 | goto error; | ||
| 5111 | |||
| 5112 | |||
| 5113 | /* QAM Loop Controller Coeficients */ | ||
| 5114 | |||
| 5115 | status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); | ||
| 5116 | if (status < 0) | ||
| 5117 | goto error; | ||
| 5118 | status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); | ||
| 5119 | if (status < 0) | ||
| 5120 | goto error; | ||
| 5121 | status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12); | ||
| 5122 | if (status < 0) | ||
| 5123 | goto error; | ||
| 5124 | status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24); | ||
| 5125 | if (status < 0) | ||
| 5126 | goto error; | ||
| 5127 | status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); | ||
| 5128 | if (status < 0) | ||
| 5129 | goto error; | ||
| 5130 | status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); | ||
| 5131 | if (status < 0) | ||
| 5132 | goto error; | ||
| 5133 | status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); | ||
| 5134 | if (status < 0) | ||
| 5135 | goto error; | ||
| 5136 | status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); | ||
| 5137 | if (status < 0) | ||
| 5138 | goto error; | ||
| 5139 | |||
| 5140 | status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5); | ||
| 5141 | if (status < 0) | ||
| 5142 | goto error; | ||
| 5143 | status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 50); | ||
| 5144 | if (status < 0) | ||
| 5145 | goto error; | ||
| 5146 | status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 250); | ||
| 5147 | if (status < 0) | ||
| 5148 | goto error; | ||
| 5149 | status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5); | ||
| 5150 | if (status < 0) | ||
| 5151 | goto error; | ||
| 5152 | status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 50); | ||
| 5153 | if (status < 0) | ||
| 5154 | goto error; | ||
| 5155 | status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 125); | ||
| 5156 | if (status < 0) | ||
| 5157 | goto error; | ||
| 5158 | status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16); | ||
| 5159 | if (status < 0) | ||
| 5160 | goto error; | ||
| 5161 | status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 25); | ||
| 5162 | if (status < 0) | ||
| 5163 | goto error; | ||
| 5164 | status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 48); | ||
| 5165 | if (status < 0) | ||
| 5166 | goto error; | ||
| 5167 | status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5); | ||
| 5168 | if (status < 0) | ||
| 5169 | goto error; | ||
| 5170 | status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10); | ||
| 5171 | if (status < 0) | ||
| 5172 | goto error; | ||
| 5173 | status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 10); | ||
| 5174 | if (status < 0) | ||
| 5175 | goto error; | ||
| 5176 | |||
| 5177 | |||
| 5178 | /* QAM State Machine (FSM) Thresholds */ | ||
| 5179 | |||
| 5180 | status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 50); | ||
| 5181 | if (status < 0) | ||
| 5182 | goto error; | ||
| 5183 | status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 60); | ||
| 5184 | if (status < 0) | ||
| 5185 | goto error; | ||
| 5186 | status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 80); | ||
| 5187 | if (status < 0) | ||
| 5188 | goto error; | ||
| 5189 | status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 100); | ||
| 5190 | if (status < 0) | ||
| 5191 | goto error; | ||
| 5192 | status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 150); | ||
| 5193 | if (status < 0) | ||
| 5194 | goto error; | ||
| 5195 | status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 110); | ||
| 5196 | if (status < 0) | ||
| 5197 | goto error; | ||
| 5198 | |||
| 5199 | status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40); | ||
| 5200 | if (status < 0) | ||
| 5201 | goto error; | ||
| 5202 | status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 4); | ||
| 5203 | if (status < 0) | ||
| 5204 | goto error; | ||
| 5205 | status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 12); | ||
| 5206 | if (status < 0) | ||
| 5207 | goto error; | ||
| 5208 | |||
| 5209 | |||
| 5210 | /* QAM FSM Tracking Parameters */ | ||
| 5211 | |||
| 5212 | status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 8); | ||
| 5213 | if (status < 0) | ||
| 5214 | goto error; | ||
| 5215 | status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 74); | ||
| 5216 | if (status < 0) | ||
| 5217 | goto error; | ||
| 5218 | status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) 18); | ||
| 5219 | if (status < 0) | ||
| 5220 | goto error; | ||
| 5221 | status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) 13); | ||
| 5222 | if (status < 0) | ||
| 5223 | goto error; | ||
| 5224 | status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) 7); | ||
| 5225 | if (status < 0) | ||
| 5226 | goto error; | ||
| 5227 | status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) 0); | ||
| 5228 | if (status < 0) | ||
| 5229 | goto error; | ||
| 5230 | status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -8); | ||
| 5231 | error: | ||
| 5232 | if (status < 0) | ||
| 5233 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 5234 | return status; | ||
| 5235 | } | ||
| 5236 | |||
| 5237 | |||
| 5238 | /*============================================================================*/ | ||
| 5239 | /** | ||
| 5240 | * \brief Reset QAM block. | ||
| 5241 | * \param demod: instance of demod. | ||
| 5242 | * \param channel: pointer to channel data. | ||
| 5243 | * \return DRXStatus_t. | ||
| 5244 | */ | ||
| 5245 | static int QAMResetQAM(struct drxk_state *state) | ||
| 5246 | { | ||
| 5247 | int status; | ||
| 5248 | u16 cmdResult; | ||
| 5249 | |||
| 5250 | dprintk(1, "\n"); | ||
| 5251 | /* Stop QAM comstate->m_exec */ | ||
| 5252 | status = write16(state, QAM_COMM_EXEC__A, QAM_COMM_EXEC_STOP); | ||
| 5253 | if (status < 0) | ||
| 5254 | goto error; | ||
| 5255 | |||
| 5256 | status = scu_command(state, SCU_RAM_COMMAND_STANDARD_QAM | SCU_RAM_COMMAND_CMD_DEMOD_RESET, 0, NULL, 1, &cmdResult); | ||
| 5257 | error: | ||
| 5258 | if (status < 0) | ||
| 5259 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 5260 | return status; | ||
| 5261 | } | ||
| 5262 | |||
| 5263 | /*============================================================================*/ | ||
| 5264 | |||
| 5265 | /** | ||
| 5266 | * \brief Set QAM symbolrate. | ||
| 5267 | * \param demod: instance of demod. | ||
| 5268 | * \param channel: pointer to channel data. | ||
| 5269 | * \return DRXStatus_t. | ||
| 5270 | */ | ||
| 5271 | static int QAMSetSymbolrate(struct drxk_state *state) | ||
| 5272 | { | ||
| 5273 | u32 adcFrequency = 0; | ||
| 5274 | u32 symbFreq = 0; | ||
| 5275 | u32 iqmRcRate = 0; | ||
| 5276 | u16 ratesel = 0; | ||
| 5277 | u32 lcSymbRate = 0; | ||
| 5278 | int status; | ||
| 5279 | |||
| 5280 | dprintk(1, "\n"); | ||
| 5281 | /* Select & calculate correct IQM rate */ | ||
| 5282 | adcFrequency = (state->m_sysClockFreq * 1000) / 3; | ||
| 5283 | ratesel = 0; | ||
| 5284 | /* printk(KERN_DEBUG "drxk: SR %d\n", state->param.u.qam.symbol_rate); */ | ||
| 5285 | if (state->param.u.qam.symbol_rate <= 1188750) | ||
| 5286 | ratesel = 3; | ||
| 5287 | else if (state->param.u.qam.symbol_rate <= 2377500) | ||
| 5288 | ratesel = 2; | ||
| 5289 | else if (state->param.u.qam.symbol_rate <= 4755000) | ||
| 5290 | ratesel = 1; | ||
| 5291 | status = write16(state, IQM_FD_RATESEL__A, ratesel); | ||
| 5292 | if (status < 0) | ||
| 5293 | goto error; | ||
| 5294 | |||
| 5295 | /* | ||
| 5296 | IqmRcRate = ((Fadc / (symbolrate * (4<<ratesel))) - 1) * (1<<23) | ||
| 5297 | */ | ||
| 5298 | symbFreq = state->param.u.qam.symbol_rate * (1 << ratesel); | ||
| 5299 | if (symbFreq == 0) { | ||
| 5300 | /* Divide by zero */ | ||
| 5301 | status = -EINVAL; | ||
| 5302 | goto error; | ||
| 5303 | } | ||
| 5304 | iqmRcRate = (adcFrequency / symbFreq) * (1 << 21) + | ||
| 5305 | (Frac28a((adcFrequency % symbFreq), symbFreq) >> 7) - | ||
| 5306 | (1 << 23); | ||
| 5307 | status = write32(state, IQM_RC_RATE_OFS_LO__A, iqmRcRate); | ||
| 5308 | if (status < 0) | ||
| 5309 | goto error; | ||
| 5310 | state->m_iqmRcRate = iqmRcRate; | ||
| 5311 | /* | ||
| 5312 | LcSymbFreq = round (.125 * symbolrate / adcFreq * (1<<15)) | ||
| 5313 | */ | ||
| 5314 | symbFreq = state->param.u.qam.symbol_rate; | ||
| 5315 | if (adcFrequency == 0) { | ||
| 5316 | /* Divide by zero */ | ||
| 5317 | status = -EINVAL; | ||
| 5318 | goto error; | ||
| 5319 | } | ||
| 5320 | lcSymbRate = (symbFreq / adcFrequency) * (1 << 12) + | ||
| 5321 | (Frac28a((symbFreq % adcFrequency), adcFrequency) >> | ||
| 5322 | 16); | ||
| 5323 | if (lcSymbRate > 511) | ||
| 5324 | lcSymbRate = 511; | ||
| 5325 | status = write16(state, QAM_LC_SYMBOL_FREQ__A, (u16) lcSymbRate); | ||
| 5326 | |||
| 5327 | error: | ||
| 5328 | if (status < 0) | ||
| 5329 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 5330 | return status; | ||
| 5331 | } | ||
| 5332 | |||
| 5333 | /*============================================================================*/ | ||
| 5334 | |||
| 5335 | /** | ||
| 5336 | * \brief Get QAM lock status. | ||
| 5337 | * \param demod: instance of demod. | ||
| 5338 | * \param channel: pointer to channel data. | ||
| 5339 | * \return DRXStatus_t. | ||
| 5340 | */ | ||
| 5341 | |||
| 5342 | static int GetQAMLockStatus(struct drxk_state *state, u32 *pLockStatus) | ||
| 5343 | { | ||
| 5344 | int status; | ||
| 5345 | u16 Result[2] = { 0, 0 }; | ||
| 5346 | |||
| 5347 | dprintk(1, "\n"); | ||
| 5348 | *pLockStatus = NOT_LOCKED; | ||
| 5349 | status = scu_command(state, | ||
| 5350 | SCU_RAM_COMMAND_STANDARD_QAM | | ||
| 5351 | SCU_RAM_COMMAND_CMD_DEMOD_GET_LOCK, 0, NULL, 2, | ||
| 5352 | Result); | ||
| 5353 | if (status < 0) | ||
| 5354 | printk(KERN_ERR "drxk: %s status = %08x\n", __func__, status); | ||
| 5355 | |||
| 5356 | if (Result[1] < SCU_RAM_QAM_LOCKED_LOCKED_DEMOD_LOCKED) { | ||
| 5357 | /* 0x0000 NOT LOCKED */ | ||
| 5358 | } else if (Result[1] < SCU_RAM_QAM_LOCKED_LOCKED_LOCKED) { | ||
| 5359 | /* 0x4000 DEMOD LOCKED */ | ||
| 5360 | *pLockStatus = DEMOD_LOCK; | ||
| 5361 | } else if (Result[1] < SCU_RAM_QAM_LOCKED_LOCKED_NEVER_LOCK) { | ||
| 5362 | /* 0x8000 DEMOD + FEC LOCKED (system lock) */ | ||
| 5363 | *pLockStatus = MPEG_LOCK; | ||
| 5364 | } else { | ||
| 5365 | /* 0xC000 NEVER LOCKED */ | ||
| 5366 | /* (system will never be able to lock to the signal) */ | ||
| 5367 | /* TODO: check this, intermediate & standard specific lock states are not | ||
| 5368 | taken into account here */ | ||
| 5369 | *pLockStatus = NEVER_LOCK; | ||
| 5370 | } | ||
| 5371 | return status; | ||
| 5372 | } | ||
| 5373 | |||
| 5374 | #define QAM_MIRROR__M 0x03 | ||
| 5375 | #define QAM_MIRROR_NORMAL 0x00 | ||
| 5376 | #define QAM_MIRRORED 0x01 | ||
| 5377 | #define QAM_MIRROR_AUTO_ON 0x02 | ||
| 5378 | #define QAM_LOCKRANGE__M 0x10 | ||
| 5379 | #define QAM_LOCKRANGE_NORMAL 0x10 | ||
| 5380 | |||
| 5381 | static int SetQAM(struct drxk_state *state, u16 IntermediateFreqkHz, | ||
| 5382 | s32 tunerFreqOffset) | ||
| 5383 | { | ||
| 5384 | int status; | ||
| 5385 | u16 setParamParameters[4] = { 0, 0, 0, 0 }; | ||
| 5386 | u16 cmdResult; | ||
| 5387 | |||
| 5388 | dprintk(1, "\n"); | ||
| 5389 | /* | ||
| 5390 | * STEP 1: reset demodulator | ||
| 5391 | * resets FEC DI and FEC RS | ||
| 5392 | * resets QAM block | ||
| 5393 | * resets SCU variables | ||
| 5394 | */ | ||
| 5395 | status = write16(state, FEC_DI_COMM_EXEC__A, FEC_DI_COMM_EXEC_STOP); | ||
| 5396 | if (status < 0) | ||
| 5397 | goto error; | ||
| 5398 | status = write16(state, FEC_RS_COMM_EXEC__A, FEC_RS_COMM_EXEC_STOP); | ||
| 5399 | if (status < 0) | ||
| 5400 | goto error; | ||
| 5401 | status = QAMResetQAM(state); | ||
| 5402 | if (status < 0) | ||
| 5403 | goto error; | ||
| 5404 | |||
| 5405 | /* | ||
| 5406 | * STEP 2: configure demodulator | ||
| 5407 | * -set params; resets IQM,QAM,FEC HW; initializes some | ||
| 5408 | * SCU variables | ||
| 5409 | */ | ||
| 5410 | status = QAMSetSymbolrate(state); | ||
| 5411 | if (status < 0) | ||
| 5412 | goto error; | ||
| 5413 | |||
| 5414 | /* Set params */ | ||
| 5415 | switch (state->param.u.qam.modulation) { | ||
| 5416 | case QAM_256: | ||
| 5417 | state->m_Constellation = DRX_CONSTELLATION_QAM256; | ||
| 5418 | break; | ||
| 5419 | case QAM_AUTO: | ||
| 5420 | case QAM_64: | ||
| 5421 | state->m_Constellation = DRX_CONSTELLATION_QAM64; | ||
| 5422 | break; | ||
| 5423 | case QAM_16: | ||
| 5424 | state->m_Constellation = DRX_CONSTELLATION_QAM16; | ||
| 5425 | break; | ||
| 5426 | case QAM_32: | ||
| 5427 | state->m_Constellation = DRX_CONSTELLATION_QAM32; | ||
| 5428 | break; | ||
| 5429 | case QAM_128: | ||
| 5430 | state->m_Constellation = DRX_CONSTELLATION_QAM128; | ||
| 5431 | break; | ||
| 5432 | default: | ||
| 5433 | status = -EINVAL; | ||
| 5434 | break; | ||
| 5435 | } | ||
| 5436 | if (status < 0) | ||
| 5437 | goto error; | ||
| 5438 | setParamParameters[0] = state->m_Constellation; /* constellation */ | ||
| 5439 | setParamParameters[1] = DRXK_QAM_I12_J17; /* interleave mode */ | ||
| 5440 | if (state->m_OperationMode == OM_QAM_ITU_C) | ||
| 5441 | setParamParameters[2] = QAM_TOP_ANNEX_C; | ||
| 5442 | else | ||
| 5443 | setParamParameters[2] = QAM_TOP_ANNEX_A; | ||
| 5444 | setParamParameters[3] |= (QAM_MIRROR_AUTO_ON); | ||
| 5445 | /* Env parameters */ | ||
| 5446 | /* check for LOCKRANGE Extented */ | ||
| 5447 | /* setParamParameters[3] |= QAM_LOCKRANGE_NORMAL; */ | ||
| 5448 | |||
| 5449 | status = scu_command(state, SCU_RAM_COMMAND_STANDARD_QAM | SCU_RAM_COMMAND_CMD_DEMOD_SET_PARAM, 4, setParamParameters, 1, &cmdResult); | ||
| 5450 | if (status < 0) { | ||
| 5451 | /* Fall-back to the simpler call */ | ||
| 5452 | if (state->m_OperationMode == OM_QAM_ITU_C) | ||
| 5453 | setParamParameters[0] = QAM_TOP_ANNEX_C; | ||
| 5454 | else | ||
| 5455 | setParamParameters[0] = QAM_TOP_ANNEX_A; | ||
| 5456 | status = scu_command(state, SCU_RAM_COMMAND_STANDARD_QAM | SCU_RAM_COMMAND_CMD_DEMOD_SET_ENV, 1, setParamParameters, 1, &cmdResult); | ||
| 5457 | if (status < 0) | ||
| 5458 | goto error; | ||
| 5459 | |||
| 5460 | setParamParameters[0] = state->m_Constellation; /* constellation */ | ||
| 5461 | setParamParameters[1] = DRXK_QAM_I12_J17; /* interleave mode */ | ||
| 5462 | status = scu_command(state, SCU_RAM_COMMAND_STANDARD_QAM | SCU_RAM_COMMAND_CMD_DEMOD_SET_PARAM, 2, setParamParameters, 1, &cmdResult); | ||
| 5463 | } | ||
| 5464 | if (status < 0) | ||
| 5465 | goto error; | ||
| 5466 | |||
| 5467 | /* | ||
| 5468 | * STEP 3: enable the system in a mode where the ADC provides valid | ||
| 5469 | * signal setup constellation independent registers | ||
| 5470 | */ | ||
| 5471 | #if 0 | ||
| 5472 | status = SetFrequency(channel, tunerFreqOffset)); | ||
| 5473 | if (status < 0) | ||
| 5474 | goto error; | ||
| 5475 | #endif | ||
| 5476 | status = SetFrequencyShifter(state, IntermediateFreqkHz, tunerFreqOffset, true); | ||
| 5477 | if (status < 0) | ||
| 5478 | goto error; | ||
| 5479 | |||
| 5480 | /* Setup BER measurement */ | ||
| 5481 | status = SetQAMMeasurement(state, state->m_Constellation, state->param.u. qam.symbol_rate); | ||
| 5482 | if (status < 0) | ||
| 5483 | goto error; | ||
| 5484 | |||
| 5485 | /* Reset default values */ | ||
| 5486 | status = write16(state, IQM_CF_SCALE_SH__A, IQM_CF_SCALE_SH__PRE); | ||
| 5487 | if (status < 0) | ||
| 5488 | goto error; | ||
| 5489 | status = write16(state, QAM_SY_TIMEOUT__A, QAM_SY_TIMEOUT__PRE); | ||
| 5490 | if (status < 0) | ||
| 5491 | goto error; | ||
| 5492 | |||
| 5493 | /* Reset default LC values */ | ||
| 5494 | status = write16(state, QAM_LC_RATE_LIMIT__A, 3); | ||
| 5495 | if (status < 0) | ||
| 5496 | goto error; | ||
| 5497 | status = write16(state, QAM_LC_LPF_FACTORP__A, 4); | ||
| 5498 | if (status < 0) | ||
| 5499 | goto error; | ||
| 5500 | status = write16(state, QAM_LC_LPF_FACTORI__A, 4); | ||
| 5501 | if (status < 0) | ||
| 5502 | goto error; | ||
| 5503 | status = write16(state, QAM_LC_MODE__A, 7); | ||
| 5504 | if (status < 0) | ||
| 5505 | goto error; | ||
| 5506 | |||
| 5507 | status = write16(state, QAM_LC_QUAL_TAB0__A, 1); | ||
| 5508 | if (status < 0) | ||
| 5509 | goto error; | ||
| 5510 | status = write16(state, QAM_LC_QUAL_TAB1__A, 1); | ||
| 5511 | if (status < 0) | ||
| 5512 | goto error; | ||
| 5513 | status = write16(state, QAM_LC_QUAL_TAB2__A, 1); | ||
| 5514 | if (status < 0) | ||
| 5515 | goto error; | ||
| 5516 | status = write16(state, QAM_LC_QUAL_TAB3__A, 1); | ||
| 5517 | if (status < 0) | ||
| 5518 | goto error; | ||
| 5519 | status = write16(state, QAM_LC_QUAL_TAB4__A, 2); | ||
| 5520 | if (status < 0) | ||
| 5521 | goto error; | ||
| 5522 | status = write16(state, QAM_LC_QUAL_TAB5__A, 2); | ||
| 5523 | if (status < 0) | ||
| 5524 | goto error; | ||
| 5525 | status = write16(state, QAM_LC_QUAL_TAB6__A, 2); | ||
| 5526 | if (status < 0) | ||
| 5527 | goto error; | ||
| 5528 | status = write16(state, QAM_LC_QUAL_TAB8__A, 2); | ||
| 5529 | if (status < 0) | ||
| 5530 | goto error; | ||
| 5531 | status = write16(state, QAM_LC_QUAL_TAB9__A, 2); | ||
| 5532 | if (status < 0) | ||
| 5533 | goto error; | ||
| 5534 | status = write16(state, QAM_LC_QUAL_TAB10__A, 2); | ||
| 5535 | if (status < 0) | ||
| 5536 | goto error; | ||
| 5537 | status = write16(state, QAM_LC_QUAL_TAB12__A, 2); | ||
| 5538 | if (status < 0) | ||
| 5539 | goto error; | ||
| 5540 | status = write16(state, QAM_LC_QUAL_TAB15__A, 3); | ||
| 5541 | if (status < 0) | ||
| 5542 | goto error; | ||
| 5543 | status = write16(state, QAM_LC_QUAL_TAB16__A, 3); | ||
| 5544 | if (status < 0) | ||
| 5545 | goto error; | ||
| 5546 | status = write16(state, QAM_LC_QUAL_TAB20__A, 4); | ||
| 5547 | if (status < 0) | ||
| 5548 | goto error; | ||
| 5549 | status = write16(state, QAM_LC_QUAL_TAB25__A, 4); | ||
| 5550 | if (status < 0) | ||
| 5551 | goto error; | ||
| 5552 | |||
| 5553 | /* Mirroring, QAM-block starting point not inverted */ | ||
| 5554 | status = write16(state, QAM_SY_SP_INV__A, QAM_SY_SP_INV_SPECTRUM_INV_DIS); | ||
| 5555 | if (status < 0) | ||
| 5556 | goto error; | ||
| 5557 | |||
| 5558 | /* Halt SCU to enable safe non-atomic accesses */ | ||
| 5559 | status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_HOLD); | ||
| 5560 | if (status < 0) | ||
| 5561 | goto error; | ||
| 5562 | |||
| 5563 | /* STEP 4: constellation specific setup */ | ||
| 5564 | switch (state->param.u.qam.modulation) { | ||
| 5565 | case QAM_16: | ||
| 5566 | status = SetQAM16(state); | ||
| 5567 | break; | ||
| 5568 | case QAM_32: | ||
| 5569 | status = SetQAM32(state); | ||
| 5570 | break; | ||
| 5571 | case QAM_AUTO: | ||
| 5572 | case QAM_64: | ||
| 5573 | status = SetQAM64(state); | ||
| 5574 | break; | ||
| 5575 | case QAM_128: | ||
| 5576 | status = SetQAM128(state); | ||
| 5577 | break; | ||
| 5578 | case QAM_256: | ||
| 5579 | status = SetQAM256(state); | ||
| 5580 | break; | ||
| 5581 | default: | ||
| 5582 | status = -EINVAL; | ||
| 5583 | break; | ||
| 5584 | } | ||
| 5585 | if (status < 0) | ||
| 5586 | goto error; | ||
| 5587 | |||
| 5588 | /* Activate SCU to enable SCU commands */ | ||
| 5589 | status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); | ||
| 5590 | if (status < 0) | ||
| 5591 | goto error; | ||
| 5592 | |||
| 5593 | /* Re-configure MPEG output, requires knowledge of channel bitrate */ | ||
| 5594 | /* extAttr->currentChannel.constellation = channel->constellation; */ | ||
| 5595 | /* extAttr->currentChannel.symbolrate = channel->symbolrate; */ | ||
| 5596 | status = MPEGTSDtoSetup(state, state->m_OperationMode); | ||
| 5597 | if (status < 0) | ||
| 5598 | goto error; | ||
| 5599 | |||
| 5600 | /* Start processes */ | ||
| 5601 | status = MPEGTSStart(state); | ||
| 5602 | if (status < 0) | ||
| 5603 | goto error; | ||
| 5604 | status = write16(state, FEC_COMM_EXEC__A, FEC_COMM_EXEC_ACTIVE); | ||
| 5605 | if (status < 0) | ||
| 5606 | goto error; | ||
| 5607 | status = write16(state, QAM_COMM_EXEC__A, QAM_COMM_EXEC_ACTIVE); | ||
| 5608 | if (status < 0) | ||
| 5609 | goto error; | ||
| 5610 | status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_ACTIVE); | ||
| 5611 | if (status < 0) | ||
| 5612 | goto error; | ||
| 5613 | |||
| 5614 | /* STEP 5: start QAM demodulator (starts FEC, QAM and IQM HW) */ | ||
| 5615 | status = scu_command(state, SCU_RAM_COMMAND_STANDARD_QAM | SCU_RAM_COMMAND_CMD_DEMOD_START, 0, NULL, 1, &cmdResult); | ||
| 5616 | if (status < 0) | ||
| 5617 | goto error; | ||
| 5618 | |||
| 5619 | /* update global DRXK data container */ | ||
| 5620 | /*? extAttr->qamInterleaveMode = DRXK_QAM_I12_J17; */ | ||
| 5621 | |||
| 5622 | error: | ||
| 5623 | if (status < 0) | ||
| 5624 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 5625 | return status; | ||
| 5626 | } | ||
| 5627 | |||
| 5628 | static int SetQAMStandard(struct drxk_state *state, | ||
| 5629 | enum OperationMode oMode) | ||
| 5630 | { | ||
| 5631 | int status; | ||
| 5632 | #ifdef DRXK_QAM_TAPS | ||
| 5633 | #define DRXK_QAMA_TAPS_SELECT | ||
| 5634 | #include "drxk_filters.h" | ||
| 5635 | #undef DRXK_QAMA_TAPS_SELECT | ||
| 5636 | #endif | ||
| 5637 | |||
| 5638 | dprintk(1, "\n"); | ||
| 5639 | |||
| 5640 | /* added antenna switch */ | ||
| 5641 | SwitchAntennaToQAM(state); | ||
| 5642 | |||
| 5643 | /* Ensure correct power-up mode */ | ||
| 5644 | status = PowerUpQAM(state); | ||
| 5645 | if (status < 0) | ||
| 5646 | goto error; | ||
| 5647 | /* Reset QAM block */ | ||
| 5648 | status = QAMResetQAM(state); | ||
| 5649 | if (status < 0) | ||
| 5650 | goto error; | ||
| 5651 | |||
| 5652 | /* Setup IQM */ | ||
| 5653 | |||
| 5654 | status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_STOP); | ||
| 5655 | if (status < 0) | ||
| 5656 | goto error; | ||
| 5657 | status = write16(state, IQM_AF_AMUX__A, IQM_AF_AMUX_SIGNAL2ADC); | ||
| 5658 | if (status < 0) | ||
| 5659 | goto error; | ||
| 5660 | |||
| 5661 | /* Upload IQM Channel Filter settings by | ||
| 5662 | boot loader from ROM table */ | ||
| 5663 | switch (oMode) { | ||
| 5664 | case OM_QAM_ITU_A: | ||
| 5665 | status = BLChainCmd(state, DRXK_BL_ROM_OFFSET_TAPS_ITU_A, DRXK_BLCC_NR_ELEMENTS_TAPS, DRXK_BLC_TIMEOUT); | ||
| 5666 | break; | ||
| 5667 | case OM_QAM_ITU_C: | ||
| 5668 | status = BLDirectCmd(state, IQM_CF_TAP_RE0__A, DRXK_BL_ROM_OFFSET_TAPS_ITU_C, DRXK_BLDC_NR_ELEMENTS_TAPS, DRXK_BLC_TIMEOUT); | ||
| 5669 | if (status < 0) | ||
| 5670 | goto error; | ||
| 5671 | status = BLDirectCmd(state, IQM_CF_TAP_IM0__A, DRXK_BL_ROM_OFFSET_TAPS_ITU_C, DRXK_BLDC_NR_ELEMENTS_TAPS, DRXK_BLC_TIMEOUT); | ||
| 5672 | break; | ||
| 5673 | default: | ||
| 5674 | status = -EINVAL; | ||
| 5675 | } | ||
| 5676 | if (status < 0) | ||
| 5677 | goto error; | ||
| 5678 | |||
| 5679 | status = write16(state, IQM_CF_OUT_ENA__A, (1 << IQM_CF_OUT_ENA_QAM__B)); | ||
| 5680 | if (status < 0) | ||
| 5681 | goto error; | ||
| 5682 | status = write16(state, IQM_CF_SYMMETRIC__A, 0); | ||
| 5683 | if (status < 0) | ||
| 5684 | goto error; | ||
| 5685 | status = write16(state, IQM_CF_MIDTAP__A, ((1 << IQM_CF_MIDTAP_RE__B) | (1 << IQM_CF_MIDTAP_IM__B))); | ||
| 5686 | if (status < 0) | ||
| 5687 | goto error; | ||
| 5688 | |||
| 5689 | status = write16(state, IQM_RC_STRETCH__A, 21); | ||
| 5690 | if (status < 0) | ||
| 5691 | goto error; | ||
| 5692 | status = write16(state, IQM_AF_CLP_LEN__A, 0); | ||
| 5693 | if (status < 0) | ||
| 5694 | goto error; | ||
| 5695 | status = write16(state, IQM_AF_CLP_TH__A, 448); | ||
| 5696 | if (status < 0) | ||
| 5697 | goto error; | ||
| 5698 | status = write16(state, IQM_AF_SNS_LEN__A, 0); | ||
| 5699 | if (status < 0) | ||
| 5700 | goto error; | ||
| 5701 | status = write16(state, IQM_CF_POW_MEAS_LEN__A, 0); | ||
| 5702 | if (status < 0) | ||
| 5703 | goto error; | ||
| 5704 | |||
| 5705 | status = write16(state, IQM_FS_ADJ_SEL__A, 1); | ||
| 5706 | if (status < 0) | ||
| 5707 | goto error; | ||
| 5708 | status = write16(state, IQM_RC_ADJ_SEL__A, 1); | ||
| 5709 | if (status < 0) | ||
| 5710 | goto error; | ||
| 5711 | status = write16(state, IQM_CF_ADJ_SEL__A, 1); | ||
| 5712 | if (status < 0) | ||
| 5713 | goto error; | ||
| 5714 | status = write16(state, IQM_AF_UPD_SEL__A, 0); | ||
| 5715 | if (status < 0) | ||
| 5716 | goto error; | ||
| 5717 | |||
| 5718 | /* IQM Impulse Noise Processing Unit */ | ||
| 5719 | status = write16(state, IQM_CF_CLP_VAL__A, 500); | ||
| 5720 | if (status < 0) | ||
| 5721 | goto error; | ||
| 5722 | status = write16(state, IQM_CF_DATATH__A, 1000); | ||
| 5723 | if (status < 0) | ||
| 5724 | goto error; | ||
| 5725 | status = write16(state, IQM_CF_BYPASSDET__A, 1); | ||
| 5726 | if (status < 0) | ||
| 5727 | goto error; | ||
| 5728 | status = write16(state, IQM_CF_DET_LCT__A, 0); | ||
| 5729 | if (status < 0) | ||
| 5730 | goto error; | ||
| 5731 | status = write16(state, IQM_CF_WND_LEN__A, 1); | ||
| 5732 | if (status < 0) | ||
| 5733 | goto error; | ||
| 5734 | status = write16(state, IQM_CF_PKDTH__A, 1); | ||
| 5735 | if (status < 0) | ||
| 5736 | goto error; | ||
| 5737 | status = write16(state, IQM_AF_INC_BYPASS__A, 1); | ||
| 5738 | if (status < 0) | ||
| 5739 | goto error; | ||
| 5740 | |||
| 5741 | /* turn on IQMAF. Must be done before setAgc**() */ | ||
| 5742 | status = SetIqmAf(state, true); | ||
| 5743 | if (status < 0) | ||
| 5744 | goto error; | ||
| 5745 | status = write16(state, IQM_AF_START_LOCK__A, 0x01); | ||
| 5746 | if (status < 0) | ||
| 5747 | goto error; | ||
| 5748 | |||
| 5749 | /* IQM will not be reset from here, sync ADC and update/init AGC */ | ||
| 5750 | status = ADCSynchronization(state); | ||
| 5751 | if (status < 0) | ||
| 5752 | goto error; | ||
| 5753 | |||
| 5754 | /* Set the FSM step period */ | ||
| 5755 | status = write16(state, SCU_RAM_QAM_FSM_STEP_PERIOD__A, 2000); | ||
| 5756 | if (status < 0) | ||
| 5757 | goto error; | ||
| 5758 | |||
| 5759 | /* Halt SCU to enable safe non-atomic accesses */ | ||
| 5760 | status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_HOLD); | ||
| 5761 | if (status < 0) | ||
| 5762 | goto error; | ||
| 5763 | |||
| 5764 | /* No more resets of the IQM, current standard correctly set => | ||
| 5765 | now AGCs can be configured. */ | ||
| 5766 | |||
| 5767 | status = InitAGC(state, true); | ||
| 5768 | if (status < 0) | ||
| 5769 | goto error; | ||
| 5770 | status = SetPreSaw(state, &(state->m_qamPreSawCfg)); | ||
| 5771 | if (status < 0) | ||
| 5772 | goto error; | ||
| 5773 | |||
| 5774 | /* Configure AGC's */ | ||
| 5775 | status = SetAgcRf(state, &(state->m_qamRfAgcCfg), true); | ||
| 5776 | if (status < 0) | ||
| 5777 | goto error; | ||
| 5778 | status = SetAgcIf(state, &(state->m_qamIfAgcCfg), true); | ||
| 5779 | if (status < 0) | ||
| 5780 | goto error; | ||
| 5781 | |||
| 5782 | /* Activate SCU to enable SCU commands */ | ||
| 5783 | status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); | ||
| 5784 | error: | ||
| 5785 | if (status < 0) | ||
| 5786 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 5787 | return status; | ||
| 5788 | } | ||
| 5789 | |||
| 5790 | static int WriteGPIO(struct drxk_state *state) | ||
| 5791 | { | ||
| 5792 | int status; | ||
| 5793 | u16 value = 0; | ||
| 5794 | |||
| 5795 | dprintk(1, "\n"); | ||
| 5796 | /* stop lock indicator process */ | ||
| 5797 | status = write16(state, SCU_RAM_GPIO__A, SCU_RAM_GPIO_HW_LOCK_IND_DISABLE); | ||
| 5798 | if (status < 0) | ||
| 5799 | goto error; | ||
| 5800 | |||
| 5801 | /* Write magic word to enable pdr reg write */ | ||
| 5802 | status = write16(state, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY); | ||
| 5803 | if (status < 0) | ||
| 5804 | goto error; | ||
| 5805 | |||
| 5806 | if (state->m_hasSAWSW) { | ||
| 5807 | if (state->UIO_mask & 0x0001) { /* UIO-1 */ | ||
| 5808 | /* write to io pad configuration register - output mode */ | ||
| 5809 | status = write16(state, SIO_PDR_SMA_TX_CFG__A, state->m_GPIOCfg); | ||
| 5810 | if (status < 0) | ||
| 5811 | goto error; | ||
| 5812 | |||
| 5813 | /* use corresponding bit in io data output registar */ | ||
| 5814 | status = read16(state, SIO_PDR_UIO_OUT_LO__A, &value); | ||
| 5815 | if (status < 0) | ||
| 5816 | goto error; | ||
| 5817 | if ((state->m_GPIO & 0x0001) == 0) | ||
| 5818 | value &= 0x7FFF; /* write zero to 15th bit - 1st UIO */ | ||
| 5819 | else | ||
| 5820 | value |= 0x8000; /* write one to 15th bit - 1st UIO */ | ||
| 5821 | /* write back to io data output register */ | ||
| 5822 | status = write16(state, SIO_PDR_UIO_OUT_LO__A, value); | ||
| 5823 | if (status < 0) | ||
| 5824 | goto error; | ||
| 5825 | } | ||
| 5826 | if (state->UIO_mask & 0x0002) { /* UIO-2 */ | ||
| 5827 | /* write to io pad configuration register - output mode */ | ||
| 5828 | status = write16(state, SIO_PDR_SMA_TX_CFG__A, state->m_GPIOCfg); | ||
| 5829 | if (status < 0) | ||
| 5830 | goto error; | ||
| 5831 | |||
| 5832 | /* use corresponding bit in io data output registar */ | ||
| 5833 | status = read16(state, SIO_PDR_UIO_OUT_LO__A, &value); | ||
| 5834 | if (status < 0) | ||
| 5835 | goto error; | ||
| 5836 | if ((state->m_GPIO & 0x0002) == 0) | ||
| 5837 | value &= 0xBFFF; /* write zero to 14th bit - 2st UIO */ | ||
| 5838 | else | ||
| 5839 | value |= 0x4000; /* write one to 14th bit - 2st UIO */ | ||
| 5840 | /* write back to io data output register */ | ||
| 5841 | status = write16(state, SIO_PDR_UIO_OUT_LO__A, value); | ||
| 5842 | if (status < 0) | ||
| 5843 | goto error; | ||
| 5844 | } | ||
| 5845 | if (state->UIO_mask & 0x0004) { /* UIO-3 */ | ||
| 5846 | /* write to io pad configuration register - output mode */ | ||
| 5847 | status = write16(state, SIO_PDR_SMA_TX_CFG__A, state->m_GPIOCfg); | ||
| 5848 | if (status < 0) | ||
| 5849 | goto error; | ||
| 5850 | |||
| 5851 | /* use corresponding bit in io data output registar */ | ||
| 5852 | status = read16(state, SIO_PDR_UIO_OUT_LO__A, &value); | ||
| 5853 | if (status < 0) | ||
| 5854 | goto error; | ||
| 5855 | if ((state->m_GPIO & 0x0004) == 0) | ||
| 5856 | value &= 0xFFFB; /* write zero to 2nd bit - 3rd UIO */ | ||
| 5857 | else | ||
| 5858 | value |= 0x0004; /* write one to 2nd bit - 3rd UIO */ | ||
| 5859 | /* write back to io data output register */ | ||
| 5860 | status = write16(state, SIO_PDR_UIO_OUT_LO__A, value); | ||
| 5861 | if (status < 0) | ||
| 5862 | goto error; | ||
| 5863 | } | ||
| 5864 | } | ||
| 5865 | /* Write magic word to disable pdr reg write */ | ||
| 5866 | status = write16(state, SIO_TOP_COMM_KEY__A, 0x0000); | ||
| 5867 | error: | ||
| 5868 | if (status < 0) | ||
| 5869 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 5870 | return status; | ||
| 5871 | } | ||
| 5872 | |||
| 5873 | static int SwitchAntennaToQAM(struct drxk_state *state) | ||
| 5874 | { | ||
| 5875 | int status = 0; | ||
| 5876 | bool gpio_state; | ||
| 5877 | |||
| 5878 | dprintk(1, "\n"); | ||
| 5879 | |||
| 5880 | if (!state->antenna_gpio) | ||
| 5881 | return 0; | ||
| 5882 | |||
| 5883 | gpio_state = state->m_GPIO & state->antenna_gpio; | ||
| 5884 | |||
| 5885 | if (state->antenna_dvbt ^ gpio_state) { | ||
| 5886 | /* Antenna is on DVB-T mode. Switch */ | ||
| 5887 | if (state->antenna_dvbt) | ||
| 5888 | state->m_GPIO &= ~state->antenna_gpio; | ||
| 5889 | else | ||
| 5890 | state->m_GPIO |= state->antenna_gpio; | ||
| 5891 | status = WriteGPIO(state); | ||
| 5892 | } | ||
| 5893 | if (status < 0) | ||
| 5894 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 5895 | return status; | ||
| 5896 | } | ||
| 5897 | |||
| 5898 | static int SwitchAntennaToDVBT(struct drxk_state *state) | ||
| 5899 | { | ||
| 5900 | int status = 0; | ||
| 5901 | bool gpio_state; | ||
| 5902 | |||
| 5903 | dprintk(1, "\n"); | ||
| 5904 | |||
| 5905 | if (!state->antenna_gpio) | ||
| 5906 | return 0; | ||
| 5907 | |||
| 5908 | gpio_state = state->m_GPIO & state->antenna_gpio; | ||
| 5909 | |||
| 5910 | if (!(state->antenna_dvbt ^ gpio_state)) { | ||
| 5911 | /* Antenna is on DVB-C mode. Switch */ | ||
| 5912 | if (state->antenna_dvbt) | ||
| 5913 | state->m_GPIO |= state->antenna_gpio; | ||
| 5914 | else | ||
| 5915 | state->m_GPIO &= ~state->antenna_gpio; | ||
| 5916 | status = WriteGPIO(state); | ||
| 5917 | } | ||
| 5918 | if (status < 0) | ||
| 5919 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 5920 | return status; | ||
| 5921 | } | ||
| 5922 | |||
| 5923 | |||
| 5924 | static int PowerDownDevice(struct drxk_state *state) | ||
| 5925 | { | ||
| 5926 | /* Power down to requested mode */ | ||
| 5927 | /* Backup some register settings */ | ||
| 5928 | /* Set pins with possible pull-ups connected to them in input mode */ | ||
| 5929 | /* Analog power down */ | ||
| 5930 | /* ADC power down */ | ||
| 5931 | /* Power down device */ | ||
| 5932 | int status; | ||
| 5933 | |||
| 5934 | dprintk(1, "\n"); | ||
| 5935 | if (state->m_bPDownOpenBridge) { | ||
| 5936 | /* Open I2C bridge before power down of DRXK */ | ||
| 5937 | status = ConfigureI2CBridge(state, true); | ||
| 5938 | if (status < 0) | ||
| 5939 | goto error; | ||
| 5940 | } | ||
| 5941 | /* driver 0.9.0 */ | ||
| 5942 | status = DVBTEnableOFDMTokenRing(state, false); | ||
| 5943 | if (status < 0) | ||
| 5944 | goto error; | ||
| 5945 | |||
| 5946 | status = write16(state, SIO_CC_PWD_MODE__A, SIO_CC_PWD_MODE_LEVEL_CLOCK); | ||
| 5947 | if (status < 0) | ||
| 5948 | goto error; | ||
| 5949 | status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY); | ||
| 5950 | if (status < 0) | ||
| 5951 | goto error; | ||
| 5952 | state->m_HICfgCtrl |= SIO_HI_RA_RAM_PAR_5_CFG_SLEEP_ZZZ; | ||
| 5953 | status = HI_CfgCommand(state); | ||
| 5954 | error: | ||
| 5955 | if (status < 0) | ||
| 5956 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 5957 | |||
| 5958 | return status; | ||
| 5959 | } | ||
| 5960 | |||
| 5961 | static int load_microcode(struct drxk_state *state, const char *mc_name) | ||
| 5962 | { | ||
| 5963 | const struct firmware *fw = NULL; | ||
| 5964 | int err = 0; | ||
| 5965 | |||
| 5966 | dprintk(1, "\n"); | ||
| 5967 | |||
| 5968 | err = request_firmware(&fw, mc_name, state->i2c->dev.parent); | ||
| 5969 | if (err < 0) { | ||
| 5970 | printk(KERN_ERR | ||
| 5971 | "drxk: Could not load firmware file %s.\n", mc_name); | ||
| 5972 | printk(KERN_INFO | ||
| 5973 | "drxk: Copy %s to your hotplug directory!\n", mc_name); | ||
| 5974 | return err; | ||
| 5975 | } | ||
| 5976 | err = DownloadMicrocode(state, fw->data, fw->size); | ||
| 5977 | release_firmware(fw); | ||
| 5978 | return err; | ||
| 5979 | } | ||
| 5980 | |||
| 5981 | static int init_drxk(struct drxk_state *state) | ||
| 5982 | { | ||
| 5983 | int status = 0; | ||
| 5984 | enum DRXPowerMode powerMode = DRXK_POWER_DOWN_OFDM; | ||
| 5985 | u16 driverVersion; | ||
| 5986 | |||
| 5987 | dprintk(1, "\n"); | ||
| 5988 | if ((state->m_DrxkState == DRXK_UNINITIALIZED)) { | ||
| 5989 | status = PowerUpDevice(state); | ||
| 5990 | if (status < 0) | ||
| 5991 | goto error; | ||
| 5992 | status = DRXX_Open(state); | ||
| 5993 | if (status < 0) | ||
| 5994 | goto error; | ||
| 5995 | /* Soft reset of OFDM-, sys- and osc-clockdomain */ | ||
| 5996 | status = write16(state, SIO_CC_SOFT_RST__A, SIO_CC_SOFT_RST_OFDM__M | SIO_CC_SOFT_RST_SYS__M | SIO_CC_SOFT_RST_OSC__M); | ||
| 5997 | if (status < 0) | ||
| 5998 | goto error; | ||
| 5999 | status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY); | ||
| 6000 | if (status < 0) | ||
| 6001 | goto error; | ||
| 6002 | /* TODO is this needed, if yes how much delay in worst case scenario */ | ||
| 6003 | msleep(1); | ||
| 6004 | state->m_DRXK_A3_PATCH_CODE = true; | ||
| 6005 | status = GetDeviceCapabilities(state); | ||
| 6006 | if (status < 0) | ||
| 6007 | goto error; | ||
| 6008 | |||
| 6009 | /* Bridge delay, uses oscilator clock */ | ||
| 6010 | /* Delay = (delay (nano seconds) * oscclk (kHz))/ 1000 */ | ||
| 6011 | /* SDA brdige delay */ | ||
| 6012 | state->m_HICfgBridgeDelay = | ||
| 6013 | (u16) ((state->m_oscClockFreq / 1000) * | ||
| 6014 | HI_I2C_BRIDGE_DELAY) / 1000; | ||
| 6015 | /* Clipping */ | ||
| 6016 | if (state->m_HICfgBridgeDelay > | ||
| 6017 | SIO_HI_RA_RAM_PAR_3_CFG_DBL_SDA__M) { | ||
| 6018 | state->m_HICfgBridgeDelay = | ||
| 6019 | SIO_HI_RA_RAM_PAR_3_CFG_DBL_SDA__M; | ||
| 6020 | } | ||
| 6021 | /* SCL bridge delay, same as SDA for now */ | ||
| 6022 | state->m_HICfgBridgeDelay += | ||
| 6023 | state->m_HICfgBridgeDelay << | ||
| 6024 | SIO_HI_RA_RAM_PAR_3_CFG_DBL_SCL__B; | ||
| 6025 | |||
| 6026 | status = InitHI(state); | ||
| 6027 | if (status < 0) | ||
| 6028 | goto error; | ||
| 6029 | /* disable various processes */ | ||
| 6030 | #if NOA1ROM | ||
| 6031 | if (!(state->m_DRXK_A1_ROM_CODE) | ||
| 6032 | && !(state->m_DRXK_A2_ROM_CODE)) | ||
| 6033 | #endif | ||
| 6034 | { | ||
| 6035 | status = write16(state, SCU_RAM_GPIO__A, SCU_RAM_GPIO_HW_LOCK_IND_DISABLE); | ||
| 6036 | if (status < 0) | ||
| 6037 | goto error; | ||
| 6038 | } | ||
| 6039 | |||
| 6040 | /* disable MPEG port */ | ||
| 6041 | status = MPEGTSDisable(state); | ||
| 6042 | if (status < 0) | ||
| 6043 | goto error; | ||
| 6044 | |||
| 6045 | /* Stop AUD and SCU */ | ||
| 6046 | status = write16(state, AUD_COMM_EXEC__A, AUD_COMM_EXEC_STOP); | ||
| 6047 | if (status < 0) | ||
| 6048 | goto error; | ||
| 6049 | status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_STOP); | ||
| 6050 | if (status < 0) | ||
| 6051 | goto error; | ||
| 6052 | |||
| 6053 | /* enable token-ring bus through OFDM block for possible ucode upload */ | ||
| 6054 | status = write16(state, SIO_OFDM_SH_OFDM_RING_ENABLE__A, SIO_OFDM_SH_OFDM_RING_ENABLE_ON); | ||
| 6055 | if (status < 0) | ||
| 6056 | goto error; | ||
| 6057 | |||
| 6058 | /* include boot loader section */ | ||
| 6059 | status = write16(state, SIO_BL_COMM_EXEC__A, SIO_BL_COMM_EXEC_ACTIVE); | ||
| 6060 | if (status < 0) | ||
| 6061 | goto error; | ||
| 6062 | status = BLChainCmd(state, 0, 6, 100); | ||
| 6063 | if (status < 0) | ||
| 6064 | goto error; | ||
| 6065 | |||
| 6066 | if (!state->microcode_name) | ||
| 6067 | load_microcode(state, "drxk_a3.mc"); | ||
| 6068 | else | ||
| 6069 | load_microcode(state, state->microcode_name); | ||
| 6070 | |||
| 6071 | /* disable token-ring bus through OFDM block for possible ucode upload */ | ||
| 6072 | status = write16(state, SIO_OFDM_SH_OFDM_RING_ENABLE__A, SIO_OFDM_SH_OFDM_RING_ENABLE_OFF); | ||
| 6073 | if (status < 0) | ||
| 6074 | goto error; | ||
| 6075 | |||
| 6076 | /* Run SCU for a little while to initialize microcode version numbers */ | ||
| 6077 | status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); | ||
| 6078 | if (status < 0) | ||
| 6079 | goto error; | ||
| 6080 | status = DRXX_Open(state); | ||
| 6081 | if (status < 0) | ||
| 6082 | goto error; | ||
| 6083 | /* added for test */ | ||
| 6084 | msleep(30); | ||
| 6085 | |||
| 6086 | powerMode = DRXK_POWER_DOWN_OFDM; | ||
| 6087 | status = CtrlPowerMode(state, &powerMode); | ||
| 6088 | if (status < 0) | ||
| 6089 | goto error; | ||
| 6090 | |||
| 6091 | /* Stamp driver version number in SCU data RAM in BCD code | ||
| 6092 | Done to enable field application engineers to retreive drxdriver version | ||
| 6093 | via I2C from SCU RAM. | ||
| 6094 | Not using SCU command interface for SCU register access since no | ||
| 6095 | microcode may be present. | ||
| 6096 | */ | ||
| 6097 | driverVersion = | ||
| 6098 | (((DRXK_VERSION_MAJOR / 100) % 10) << 12) + | ||
| 6099 | (((DRXK_VERSION_MAJOR / 10) % 10) << 8) + | ||
| 6100 | ((DRXK_VERSION_MAJOR % 10) << 4) + | ||
| 6101 | (DRXK_VERSION_MINOR % 10); | ||
| 6102 | status = write16(state, SCU_RAM_DRIVER_VER_HI__A, driverVersion); | ||
| 6103 | if (status < 0) | ||
| 6104 | goto error; | ||
| 6105 | driverVersion = | ||
| 6106 | (((DRXK_VERSION_PATCH / 1000) % 10) << 12) + | ||
| 6107 | (((DRXK_VERSION_PATCH / 100) % 10) << 8) + | ||
| 6108 | (((DRXK_VERSION_PATCH / 10) % 10) << 4) + | ||
| 6109 | (DRXK_VERSION_PATCH % 10); | ||
| 6110 | status = write16(state, SCU_RAM_DRIVER_VER_LO__A, driverVersion); | ||
| 6111 | if (status < 0) | ||
| 6112 | goto error; | ||
| 6113 | |||
| 6114 | printk(KERN_INFO "DRXK driver version %d.%d.%d\n", | ||
| 6115 | DRXK_VERSION_MAJOR, DRXK_VERSION_MINOR, | ||
| 6116 | DRXK_VERSION_PATCH); | ||
| 6117 | |||
| 6118 | /* Dirty fix of default values for ROM/PATCH microcode | ||
| 6119 | Dirty because this fix makes it impossible to setup suitable values | ||
| 6120 | before calling DRX_Open. This solution requires changes to RF AGC speed | ||
| 6121 | to be done via the CTRL function after calling DRX_Open */ | ||
| 6122 | |||
| 6123 | /* m_dvbtRfAgcCfg.speed = 3; */ | ||
| 6124 | |||
| 6125 | /* Reset driver debug flags to 0 */ | ||
| 6126 | status = write16(state, SCU_RAM_DRIVER_DEBUG__A, 0); | ||
| 6127 | if (status < 0) | ||
| 6128 | goto error; | ||
| 6129 | /* driver 0.9.0 */ | ||
| 6130 | /* Setup FEC OC: | ||
| 6131 | NOTE: No more full FEC resets allowed afterwards!! */ | ||
| 6132 | status = write16(state, FEC_COMM_EXEC__A, FEC_COMM_EXEC_STOP); | ||
| 6133 | if (status < 0) | ||
| 6134 | goto error; | ||
| 6135 | /* MPEGTS functions are still the same */ | ||
| 6136 | status = MPEGTSDtoInit(state); | ||
| 6137 | if (status < 0) | ||
| 6138 | goto error; | ||
| 6139 | status = MPEGTSStop(state); | ||
| 6140 | if (status < 0) | ||
| 6141 | goto error; | ||
| 6142 | status = MPEGTSConfigurePolarity(state); | ||
| 6143 | if (status < 0) | ||
| 6144 | goto error; | ||
| 6145 | status = MPEGTSConfigurePins(state, state->m_enableMPEGOutput); | ||
| 6146 | if (status < 0) | ||
| 6147 | goto error; | ||
| 6148 | /* added: configure GPIO */ | ||
| 6149 | status = WriteGPIO(state); | ||
| 6150 | if (status < 0) | ||
| 6151 | goto error; | ||
| 6152 | |||
| 6153 | state->m_DrxkState = DRXK_STOPPED; | ||
| 6154 | |||
| 6155 | if (state->m_bPowerDown) { | ||
| 6156 | status = PowerDownDevice(state); | ||
| 6157 | if (status < 0) | ||
| 6158 | goto error; | ||
| 6159 | state->m_DrxkState = DRXK_POWERED_DOWN; | ||
| 6160 | } else | ||
| 6161 | state->m_DrxkState = DRXK_STOPPED; | ||
| 6162 | } | ||
| 6163 | error: | ||
| 6164 | if (status < 0) | ||
| 6165 | printk(KERN_ERR "drxk: Error %d on %s\n", status, __func__); | ||
| 6166 | |||
| 6167 | return status; | ||
| 6168 | } | ||
| 6169 | |||
| 6170 | static void drxk_c_release(struct dvb_frontend *fe) | ||
| 6171 | { | ||
| 6172 | struct drxk_state *state = fe->demodulator_priv; | ||
| 6173 | |||
| 6174 | dprintk(1, "\n"); | ||
| 6175 | kfree(state); | ||
| 6176 | } | ||
| 6177 | |||
| 6178 | static int drxk_c_init(struct dvb_frontend *fe) | ||
| 6179 | { | ||
| 6180 | struct drxk_state *state = fe->demodulator_priv; | ||
| 6181 | |||
| 6182 | dprintk(1, "\n"); | ||
| 6183 | if (mutex_trylock(&state->ctlock) == 0) | ||
| 6184 | return -EBUSY; | ||
| 6185 | SetOperationMode(state, OM_QAM_ITU_A); | ||
| 6186 | return 0; | ||
| 6187 | } | ||
| 6188 | |||
| 6189 | static int drxk_c_sleep(struct dvb_frontend *fe) | ||
| 6190 | { | ||
| 6191 | struct drxk_state *state = fe->demodulator_priv; | ||
| 6192 | |||
| 6193 | dprintk(1, "\n"); | ||
| 6194 | ShutDown(state); | ||
| 6195 | mutex_unlock(&state->ctlock); | ||
| 6196 | return 0; | ||
| 6197 | } | ||
| 6198 | |||
| 6199 | static int drxk_gate_ctrl(struct dvb_frontend *fe, int enable) | ||
| 6200 | { | ||
| 6201 | struct drxk_state *state = fe->demodulator_priv; | ||
| 6202 | |||
| 6203 | dprintk(1, "%s\n", enable ? "enable" : "disable"); | ||
| 6204 | return ConfigureI2CBridge(state, enable ? true : false); | ||
| 6205 | } | ||
| 6206 | |||
| 6207 | static int drxk_set_parameters(struct dvb_frontend *fe, | ||
| 6208 | struct dvb_frontend_parameters *p) | ||
| 6209 | { | ||
| 6210 | struct drxk_state *state = fe->demodulator_priv; | ||
| 6211 | u32 IF; | ||
| 6212 | |||
| 6213 | dprintk(1, "\n"); | ||
| 6214 | if (fe->ops.i2c_gate_ctrl) | ||
| 6215 | fe->ops.i2c_gate_ctrl(fe, 1); | ||
| 6216 | if (fe->ops.tuner_ops.set_params) | ||
| 6217 | fe->ops.tuner_ops.set_params(fe, p); | ||
| 6218 | if (fe->ops.i2c_gate_ctrl) | ||
| 6219 | fe->ops.i2c_gate_ctrl(fe, 0); | ||
| 6220 | state->param = *p; | ||
| 6221 | fe->ops.tuner_ops.get_frequency(fe, &IF); | ||
| 6222 | Start(state, 0, IF); | ||
| 6223 | |||
| 6224 | /* printk(KERN_DEBUG "drxk: %s IF=%d done\n", __func__, IF); */ | ||
| 6225 | |||
| 6226 | return 0; | ||
| 6227 | } | ||
| 6228 | |||
| 6229 | static int drxk_c_get_frontend(struct dvb_frontend *fe, | ||
| 6230 | struct dvb_frontend_parameters *p) | ||
| 6231 | { | ||
| 6232 | dprintk(1, "\n"); | ||
| 6233 | return 0; | ||
| 6234 | } | ||
| 6235 | |||
| 6236 | static int drxk_read_status(struct dvb_frontend *fe, fe_status_t *status) | ||
| 6237 | { | ||
| 6238 | struct drxk_state *state = fe->demodulator_priv; | ||
| 6239 | u32 stat; | ||
| 6240 | |||
| 6241 | dprintk(1, "\n"); | ||
| 6242 | *status = 0; | ||
| 6243 | GetLockStatus(state, &stat, 0); | ||
| 6244 | if (stat == MPEG_LOCK) | ||
| 6245 | *status |= 0x1f; | ||
| 6246 | if (stat == FEC_LOCK) | ||
| 6247 | *status |= 0x0f; | ||
| 6248 | if (stat == DEMOD_LOCK) | ||
| 6249 | *status |= 0x07; | ||
| 6250 | return 0; | ||
| 6251 | } | ||
| 6252 | |||
| 6253 | static int drxk_read_ber(struct dvb_frontend *fe, u32 *ber) | ||
| 6254 | { | ||
| 6255 | dprintk(1, "\n"); | ||
| 6256 | |||
| 6257 | *ber = 0; | ||
| 6258 | return 0; | ||
| 6259 | } | ||
| 6260 | |||
| 6261 | static int drxk_read_signal_strength(struct dvb_frontend *fe, | ||
| 6262 | u16 *strength) | ||
| 6263 | { | ||
| 6264 | struct drxk_state *state = fe->demodulator_priv; | ||
| 6265 | u32 val = 0; | ||
| 6266 | |||
| 6267 | dprintk(1, "\n"); | ||
| 6268 | ReadIFAgc(state, &val); | ||
| 6269 | *strength = val & 0xffff; | ||
| 6270 | return 0; | ||
| 6271 | } | ||
| 6272 | |||
| 6273 | static int drxk_read_snr(struct dvb_frontend *fe, u16 *snr) | ||
| 6274 | { | ||
| 6275 | struct drxk_state *state = fe->demodulator_priv; | ||
| 6276 | s32 snr2; | ||
| 6277 | |||
| 6278 | dprintk(1, "\n"); | ||
| 6279 | GetSignalToNoise(state, &snr2); | ||
| 6280 | *snr = snr2 & 0xffff; | ||
| 6281 | return 0; | ||
| 6282 | } | ||
| 6283 | |||
| 6284 | static int drxk_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks) | ||
| 6285 | { | ||
| 6286 | struct drxk_state *state = fe->demodulator_priv; | ||
| 6287 | u16 err; | ||
| 6288 | |||
| 6289 | dprintk(1, "\n"); | ||
| 6290 | DVBTQAMGetAccPktErr(state, &err); | ||
| 6291 | *ucblocks = (u32) err; | ||
| 6292 | return 0; | ||
| 6293 | } | ||
| 6294 | |||
| 6295 | static int drxk_c_get_tune_settings(struct dvb_frontend *fe, struct dvb_frontend_tune_settings | ||
| 6296 | *sets) | ||
| 6297 | { | ||
| 6298 | dprintk(1, "\n"); | ||
| 6299 | sets->min_delay_ms = 3000; | ||
| 6300 | sets->max_drift = 0; | ||
| 6301 | sets->step_size = 0; | ||
| 6302 | return 0; | ||
| 6303 | } | ||
| 6304 | |||
| 6305 | static void drxk_t_release(struct dvb_frontend *fe) | ||
| 6306 | { | ||
| 6307 | /* | ||
| 6308 | * There's nothing to release here, as the state struct | ||
| 6309 | * is already freed by drxk_c_release. | ||
| 6310 | */ | ||
| 6311 | } | ||
| 6312 | |||
| 6313 | static int drxk_t_init(struct dvb_frontend *fe) | ||
| 6314 | { | ||
| 6315 | struct drxk_state *state = fe->demodulator_priv; | ||
| 6316 | |||
| 6317 | dprintk(1, "\n"); | ||
| 6318 | if (mutex_trylock(&state->ctlock) == 0) | ||
| 6319 | return -EBUSY; | ||
| 6320 | SetOperationMode(state, OM_DVBT); | ||
| 6321 | return 0; | ||
| 6322 | } | ||
| 6323 | |||
| 6324 | static int drxk_t_sleep(struct dvb_frontend *fe) | ||
| 6325 | { | ||
| 6326 | struct drxk_state *state = fe->demodulator_priv; | ||
| 6327 | |||
| 6328 | dprintk(1, "\n"); | ||
| 6329 | mutex_unlock(&state->ctlock); | ||
| 6330 | return 0; | ||
| 6331 | } | ||
| 6332 | |||
| 6333 | static int drxk_t_get_frontend(struct dvb_frontend *fe, | ||
| 6334 | struct dvb_frontend_parameters *p) | ||
| 6335 | { | ||
| 6336 | dprintk(1, "\n"); | ||
| 6337 | |||
| 6338 | return 0; | ||
| 6339 | } | ||
| 6340 | |||
| 6341 | static struct dvb_frontend_ops drxk_c_ops = { | ||
| 6342 | .info = { | ||
| 6343 | .name = "DRXK DVB-C", | ||
| 6344 | .type = FE_QAM, | ||
| 6345 | .frequency_stepsize = 62500, | ||
| 6346 | .frequency_min = 47000000, | ||
| 6347 | .frequency_max = 862000000, | ||
| 6348 | .symbol_rate_min = 870000, | ||
| 6349 | .symbol_rate_max = 11700000, | ||
| 6350 | .caps = FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 | | ||
| 6351 | FE_CAN_QAM_128 | FE_CAN_QAM_256 | FE_CAN_FEC_AUTO}, | ||
| 6352 | .release = drxk_c_release, | ||
| 6353 | .init = drxk_c_init, | ||
| 6354 | .sleep = drxk_c_sleep, | ||
| 6355 | .i2c_gate_ctrl = drxk_gate_ctrl, | ||
| 6356 | |||
| 6357 | .set_frontend = drxk_set_parameters, | ||
| 6358 | .get_frontend = drxk_c_get_frontend, | ||
| 6359 | .get_tune_settings = drxk_c_get_tune_settings, | ||
| 6360 | |||
| 6361 | .read_status = drxk_read_status, | ||
| 6362 | .read_ber = drxk_read_ber, | ||
| 6363 | .read_signal_strength = drxk_read_signal_strength, | ||
| 6364 | .read_snr = drxk_read_snr, | ||
| 6365 | .read_ucblocks = drxk_read_ucblocks, | ||
| 6366 | }; | ||
| 6367 | |||
| 6368 | static struct dvb_frontend_ops drxk_t_ops = { | ||
| 6369 | .info = { | ||
| 6370 | .name = "DRXK DVB-T", | ||
| 6371 | .type = FE_OFDM, | ||
| 6372 | .frequency_min = 47125000, | ||
| 6373 | .frequency_max = 865000000, | ||
| 6374 | .frequency_stepsize = 166667, | ||
| 6375 | .frequency_tolerance = 0, | ||
| 6376 | .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | | ||
| 6377 | FE_CAN_FEC_3_4 | FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | | ||
| 6378 | FE_CAN_FEC_AUTO | | ||
| 6379 | FE_CAN_QAM_16 | FE_CAN_QAM_64 | | ||
| 6380 | FE_CAN_QAM_AUTO | | ||
| 6381 | FE_CAN_TRANSMISSION_MODE_AUTO | | ||
| 6382 | FE_CAN_GUARD_INTERVAL_AUTO | | ||
| 6383 | FE_CAN_HIERARCHY_AUTO | FE_CAN_RECOVER | FE_CAN_MUTE_TS}, | ||
| 6384 | .release = drxk_t_release, | ||
| 6385 | .init = drxk_t_init, | ||
| 6386 | .sleep = drxk_t_sleep, | ||
| 6387 | .i2c_gate_ctrl = drxk_gate_ctrl, | ||
| 6388 | |||
| 6389 | .set_frontend = drxk_set_parameters, | ||
| 6390 | .get_frontend = drxk_t_get_frontend, | ||
| 6391 | |||
| 6392 | .read_status = drxk_read_status, | ||
| 6393 | .read_ber = drxk_read_ber, | ||
| 6394 | .read_signal_strength = drxk_read_signal_strength, | ||
| 6395 | .read_snr = drxk_read_snr, | ||
| 6396 | .read_ucblocks = drxk_read_ucblocks, | ||
| 6397 | }; | ||
| 6398 | |||
| 6399 | struct dvb_frontend *drxk_attach(const struct drxk_config *config, | ||
| 6400 | struct i2c_adapter *i2c, | ||
| 6401 | struct dvb_frontend **fe_t) | ||
| 6402 | { | ||
| 6403 | struct drxk_state *state = NULL; | ||
| 6404 | u8 adr = config->adr; | ||
| 6405 | |||
| 6406 | dprintk(1, "\n"); | ||
| 6407 | state = kzalloc(sizeof(struct drxk_state), GFP_KERNEL); | ||
| 6408 | if (!state) | ||
| 6409 | return NULL; | ||
| 6410 | |||
| 6411 | state->i2c = i2c; | ||
| 6412 | state->demod_address = adr; | ||
| 6413 | state->single_master = config->single_master; | ||
| 6414 | state->microcode_name = config->microcode_name; | ||
| 6415 | state->no_i2c_bridge = config->no_i2c_bridge; | ||
| 6416 | state->antenna_gpio = config->antenna_gpio; | ||
| 6417 | state->antenna_dvbt = config->antenna_dvbt; | ||
| 6418 | |||
| 6419 | /* NOTE: as more UIO bits will be used, add them to the mask */ | ||
| 6420 | state->UIO_mask = config->antenna_gpio; | ||
| 6421 | |||
| 6422 | /* Default gpio to DVB-C */ | ||
| 6423 | if (!state->antenna_dvbt && state->antenna_gpio) | ||
| 6424 | state->m_GPIO |= state->antenna_gpio; | ||
| 6425 | else | ||
| 6426 | state->m_GPIO &= ~state->antenna_gpio; | ||
| 6427 | |||
| 6428 | mutex_init(&state->mutex); | ||
| 6429 | mutex_init(&state->ctlock); | ||
| 6430 | |||
| 6431 | memcpy(&state->c_frontend.ops, &drxk_c_ops, | ||
| 6432 | sizeof(struct dvb_frontend_ops)); | ||
| 6433 | memcpy(&state->t_frontend.ops, &drxk_t_ops, | ||
| 6434 | sizeof(struct dvb_frontend_ops)); | ||
| 6435 | state->c_frontend.demodulator_priv = state; | ||
| 6436 | state->t_frontend.demodulator_priv = state; | ||
| 6437 | |||
| 6438 | init_state(state); | ||
| 6439 | if (init_drxk(state) < 0) | ||
| 6440 | goto error; | ||
| 6441 | *fe_t = &state->t_frontend; | ||
| 6442 | |||
| 6443 | return &state->c_frontend; | ||
| 6444 | |||
| 6445 | error: | ||
| 6446 | printk(KERN_ERR "drxk: not found\n"); | ||
| 6447 | kfree(state); | ||
| 6448 | return NULL; | ||
| 6449 | } | ||
| 6450 | EXPORT_SYMBOL(drxk_attach); | ||
| 6451 | |||
| 6452 | MODULE_DESCRIPTION("DRX-K driver"); | ||
| 6453 | MODULE_AUTHOR("Ralph Metzler"); | ||
| 6454 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/media/dvb/frontends/drxk_hard.h b/drivers/media/dvb/frontends/drxk_hard.h new file mode 100644 index 000000000000..a05c32eecdcc --- /dev/null +++ b/drivers/media/dvb/frontends/drxk_hard.h | |||
| @@ -0,0 +1,348 @@ | |||
| 1 | #include "drxk_map.h" | ||
| 2 | |||
| 3 | #define DRXK_VERSION_MAJOR 0 | ||
| 4 | #define DRXK_VERSION_MINOR 9 | ||
| 5 | #define DRXK_VERSION_PATCH 4300 | ||
| 6 | |||
| 7 | #define HI_I2C_DELAY 42 | ||
| 8 | #define HI_I2C_BRIDGE_DELAY 350 | ||
| 9 | #define DRXK_MAX_RETRIES 100 | ||
| 10 | |||
| 11 | #define DRIVER_4400 1 | ||
| 12 | |||
| 13 | #define DRXX_JTAGID 0x039210D9 | ||
| 14 | #define DRXX_J_JTAGID 0x239310D9 | ||
| 15 | #define DRXX_K_JTAGID 0x039210D9 | ||
| 16 | |||
| 17 | #define DRX_UNKNOWN 254 | ||
| 18 | #define DRX_AUTO 255 | ||
| 19 | |||
| 20 | #define DRX_SCU_READY 0 | ||
| 21 | #define DRXK_MAX_WAITTIME (200) | ||
| 22 | #define SCU_RESULT_OK 0 | ||
| 23 | #define SCU_RESULT_SIZE -4 | ||
| 24 | #define SCU_RESULT_INVPAR -3 | ||
| 25 | #define SCU_RESULT_UNKSTD -2 | ||
| 26 | #define SCU_RESULT_UNKCMD -1 | ||
| 27 | |||
| 28 | #ifndef DRXK_OFDM_TR_SHUTDOWN_TIMEOUT | ||
| 29 | #define DRXK_OFDM_TR_SHUTDOWN_TIMEOUT (200) | ||
| 30 | #endif | ||
| 31 | |||
| 32 | #define DRXK_8VSB_MPEG_BIT_RATE 19392658UL /*bps*/ | ||
| 33 | #define DRXK_DVBT_MPEG_BIT_RATE 32000000UL /*bps*/ | ||
| 34 | #define DRXK_QAM16_MPEG_BIT_RATE 27000000UL /*bps*/ | ||
| 35 | #define DRXK_QAM32_MPEG_BIT_RATE 33000000UL /*bps*/ | ||
| 36 | #define DRXK_QAM64_MPEG_BIT_RATE 40000000UL /*bps*/ | ||
| 37 | #define DRXK_QAM128_MPEG_BIT_RATE 46000000UL /*bps*/ | ||
| 38 | #define DRXK_QAM256_MPEG_BIT_RATE 52000000UL /*bps*/ | ||
| 39 | #define DRXK_MAX_MPEG_BIT_RATE 52000000UL /*bps*/ | ||
| 40 | |||
| 41 | #define IQM_CF_OUT_ENA_OFDM__M 0x4 | ||
| 42 | #define IQM_FS_ADJ_SEL_B_QAM 0x1 | ||
| 43 | #define IQM_FS_ADJ_SEL_B_OFF 0x0 | ||
| 44 | #define IQM_FS_ADJ_SEL_B_VSB 0x2 | ||
| 45 | #define IQM_RC_ADJ_SEL_B_OFF 0x0 | ||
| 46 | #define IQM_RC_ADJ_SEL_B_QAM 0x1 | ||
| 47 | #define IQM_RC_ADJ_SEL_B_VSB 0x2 | ||
| 48 | |||
| 49 | enum OperationMode { | ||
| 50 | OM_NONE, | ||
| 51 | OM_QAM_ITU_A, | ||
| 52 | OM_QAM_ITU_B, | ||
| 53 | OM_QAM_ITU_C, | ||
| 54 | OM_DVBT | ||
| 55 | }; | ||
| 56 | |||
| 57 | enum DRXPowerMode { | ||
| 58 | DRX_POWER_UP = 0, | ||
| 59 | DRX_POWER_MODE_1, | ||
| 60 | DRX_POWER_MODE_2, | ||
| 61 | DRX_POWER_MODE_3, | ||
| 62 | DRX_POWER_MODE_4, | ||
| 63 | DRX_POWER_MODE_5, | ||
| 64 | DRX_POWER_MODE_6, | ||
| 65 | DRX_POWER_MODE_7, | ||
| 66 | DRX_POWER_MODE_8, | ||
| 67 | |||
| 68 | DRX_POWER_MODE_9, | ||
| 69 | DRX_POWER_MODE_10, | ||
| 70 | DRX_POWER_MODE_11, | ||
| 71 | DRX_POWER_MODE_12, | ||
| 72 | DRX_POWER_MODE_13, | ||
| 73 | DRX_POWER_MODE_14, | ||
| 74 | DRX_POWER_MODE_15, | ||
| 75 | DRX_POWER_MODE_16, | ||
| 76 | DRX_POWER_DOWN = 255 | ||
| 77 | }; | ||
| 78 | |||
| 79 | |||
| 80 | /** /brief Intermediate power mode for DRXK, power down OFDM clock domain */ | ||
| 81 | #ifndef DRXK_POWER_DOWN_OFDM | ||
| 82 | #define DRXK_POWER_DOWN_OFDM DRX_POWER_MODE_1 | ||
| 83 | #endif | ||
| 84 | |||
| 85 | /** /brief Intermediate power mode for DRXK, power down core (sysclk) */ | ||
| 86 | #ifndef DRXK_POWER_DOWN_CORE | ||
| 87 | #define DRXK_POWER_DOWN_CORE DRX_POWER_MODE_9 | ||
| 88 | #endif | ||
| 89 | |||
| 90 | /** /brief Intermediate power mode for DRXK, power down pll (only osc runs) */ | ||
| 91 | #ifndef DRXK_POWER_DOWN_PLL | ||
| 92 | #define DRXK_POWER_DOWN_PLL DRX_POWER_MODE_10 | ||
| 93 | #endif | ||
| 94 | |||
| 95 | |||
| 96 | enum AGC_CTRL_MODE { DRXK_AGC_CTRL_AUTO = 0, DRXK_AGC_CTRL_USER, DRXK_AGC_CTRL_OFF }; | ||
| 97 | enum EDrxkState { DRXK_UNINITIALIZED = 0, DRXK_STOPPED, DRXK_DTV_STARTED, DRXK_ATV_STARTED, DRXK_POWERED_DOWN }; | ||
| 98 | enum EDrxkCoefArrayIndex { | ||
| 99 | DRXK_COEF_IDX_MN = 0, | ||
| 100 | DRXK_COEF_IDX_FM , | ||
| 101 | DRXK_COEF_IDX_L , | ||
| 102 | DRXK_COEF_IDX_LP , | ||
| 103 | DRXK_COEF_IDX_BG , | ||
| 104 | DRXK_COEF_IDX_DK , | ||
| 105 | DRXK_COEF_IDX_I , | ||
| 106 | DRXK_COEF_IDX_MAX | ||
| 107 | }; | ||
| 108 | enum EDrxkSifAttenuation { | ||
| 109 | DRXK_SIF_ATTENUATION_0DB, | ||
| 110 | DRXK_SIF_ATTENUATION_3DB, | ||
| 111 | DRXK_SIF_ATTENUATION_6DB, | ||
| 112 | DRXK_SIF_ATTENUATION_9DB | ||
| 113 | }; | ||
| 114 | enum EDrxkConstellation { | ||
| 115 | DRX_CONSTELLATION_BPSK = 0, | ||
| 116 | DRX_CONSTELLATION_QPSK, | ||
| 117 | DRX_CONSTELLATION_PSK8, | ||
| 118 | DRX_CONSTELLATION_QAM16, | ||
| 119 | DRX_CONSTELLATION_QAM32, | ||
| 120 | DRX_CONSTELLATION_QAM64, | ||
| 121 | DRX_CONSTELLATION_QAM128, | ||
| 122 | DRX_CONSTELLATION_QAM256, | ||
| 123 | DRX_CONSTELLATION_QAM512, | ||
| 124 | DRX_CONSTELLATION_QAM1024, | ||
| 125 | DRX_CONSTELLATION_UNKNOWN = DRX_UNKNOWN, | ||
| 126 | DRX_CONSTELLATION_AUTO = DRX_AUTO | ||
| 127 | }; | ||
| 128 | enum EDrxkInterleaveMode { | ||
| 129 | DRXK_QAM_I12_J17 = 16, | ||
| 130 | DRXK_QAM_I_UNKNOWN = DRX_UNKNOWN | ||
| 131 | }; | ||
| 132 | enum { | ||
| 133 | DRXK_SPIN_A1 = 0, | ||
| 134 | DRXK_SPIN_A2, | ||
| 135 | DRXK_SPIN_A3, | ||
| 136 | DRXK_SPIN_UNKNOWN | ||
| 137 | }; | ||
| 138 | |||
| 139 | enum DRXKCfgDvbtSqiSpeed { | ||
| 140 | DRXK_DVBT_SQI_SPEED_FAST = 0, | ||
| 141 | DRXK_DVBT_SQI_SPEED_MEDIUM, | ||
| 142 | DRXK_DVBT_SQI_SPEED_SLOW, | ||
| 143 | DRXK_DVBT_SQI_SPEED_UNKNOWN = DRX_UNKNOWN | ||
| 144 | } ; | ||
| 145 | |||
| 146 | enum DRXFftmode_t { | ||
| 147 | DRX_FFTMODE_2K = 0, | ||
| 148 | DRX_FFTMODE_4K, | ||
| 149 | DRX_FFTMODE_8K, | ||
| 150 | DRX_FFTMODE_UNKNOWN = DRX_UNKNOWN, | ||
| 151 | DRX_FFTMODE_AUTO = DRX_AUTO | ||
| 152 | }; | ||
| 153 | |||
| 154 | enum DRXMPEGStrWidth_t { | ||
| 155 | DRX_MPEG_STR_WIDTH_1, | ||
| 156 | DRX_MPEG_STR_WIDTH_8 | ||
| 157 | }; | ||
| 158 | |||
| 159 | enum DRXQamLockRange_t { | ||
| 160 | DRX_QAM_LOCKRANGE_NORMAL, | ||
| 161 | DRX_QAM_LOCKRANGE_EXTENDED | ||
| 162 | }; | ||
| 163 | |||
| 164 | struct DRXKCfgDvbtEchoThres_t { | ||
| 165 | u16 threshold; | ||
| 166 | enum DRXFftmode_t fftMode; | ||
| 167 | } ; | ||
| 168 | |||
| 169 | struct SCfgAgc { | ||
| 170 | enum AGC_CTRL_MODE ctrlMode; /* off, user, auto */ | ||
| 171 | u16 outputLevel; /* range dependent on AGC */ | ||
| 172 | u16 minOutputLevel; /* range dependent on AGC */ | ||
| 173 | u16 maxOutputLevel; /* range dependent on AGC */ | ||
| 174 | u16 speed; /* range dependent on AGC */ | ||
| 175 | u16 top; /* rf-agc take over point */ | ||
| 176 | u16 cutOffCurrent; /* rf-agc is accelerated if output current | ||
| 177 | is below cut-off current */ | ||
| 178 | u16 IngainTgtMax; | ||
| 179 | u16 FastClipCtrlDelay; | ||
| 180 | }; | ||
| 181 | |||
| 182 | struct SCfgPreSaw { | ||
| 183 | u16 reference; /* pre SAW reference value, range 0 .. 31 */ | ||
| 184 | bool usePreSaw; /* TRUE algorithms must use pre SAW sense */ | ||
| 185 | }; | ||
| 186 | |||
| 187 | struct DRXKOfdmScCmd_t { | ||
| 188 | u16 cmd; /**< Command number */ | ||
| 189 | u16 subcmd; /**< Sub-command parameter*/ | ||
| 190 | u16 param0; /**< General purpous param */ | ||
| 191 | u16 param1; /**< General purpous param */ | ||
| 192 | u16 param2; /**< General purpous param */ | ||
| 193 | u16 param3; /**< General purpous param */ | ||
| 194 | u16 param4; /**< General purpous param */ | ||
| 195 | }; | ||
| 196 | |||
| 197 | struct drxk_state { | ||
| 198 | struct dvb_frontend c_frontend; | ||
| 199 | struct dvb_frontend t_frontend; | ||
| 200 | struct dvb_frontend_parameters param; | ||
| 201 | struct device *dev; | ||
| 202 | |||
| 203 | struct i2c_adapter *i2c; | ||
| 204 | u8 demod_address; | ||
| 205 | void *priv; | ||
| 206 | |||
| 207 | struct mutex mutex; | ||
| 208 | struct mutex ctlock; | ||
| 209 | |||
| 210 | u32 m_Instance; /**< Channel 1,2,3 or 4 */ | ||
| 211 | |||
| 212 | int m_ChunkSize; | ||
| 213 | u8 Chunk[256]; | ||
| 214 | |||
| 215 | bool m_hasLNA; | ||
| 216 | bool m_hasDVBT; | ||
| 217 | bool m_hasDVBC; | ||
| 218 | bool m_hasAudio; | ||
| 219 | bool m_hasATV; | ||
| 220 | bool m_hasOOB; | ||
| 221 | bool m_hasSAWSW; /**< TRUE if mat_tx is available */ | ||
| 222 | bool m_hasGPIO1; /**< TRUE if mat_rx is available */ | ||
| 223 | bool m_hasGPIO2; /**< TRUE if GPIO is available */ | ||
| 224 | bool m_hasIRQN; /**< TRUE if IRQN is available */ | ||
| 225 | u16 m_oscClockFreq; | ||
| 226 | u16 m_HICfgTimingDiv; | ||
| 227 | u16 m_HICfgBridgeDelay; | ||
| 228 | u16 m_HICfgWakeUpKey; | ||
| 229 | u16 m_HICfgTimeout; | ||
| 230 | u16 m_HICfgCtrl; | ||
| 231 | s32 m_sysClockFreq; /**< system clock frequency in kHz */ | ||
| 232 | |||
| 233 | enum EDrxkState m_DrxkState; /**< State of Drxk (init,stopped,started) */ | ||
| 234 | enum OperationMode m_OperationMode; /**< digital standards */ | ||
| 235 | struct SCfgAgc m_vsbRfAgcCfg; /**< settings for VSB RF-AGC */ | ||
| 236 | struct SCfgAgc m_vsbIfAgcCfg; /**< settings for VSB IF-AGC */ | ||
| 237 | u16 m_vsbPgaCfg; /**< settings for VSB PGA */ | ||
| 238 | struct SCfgPreSaw m_vsbPreSawCfg; /**< settings for pre SAW sense */ | ||
| 239 | s32 m_Quality83percent; /**< MER level (*0.1 dB) for 83% quality indication */ | ||
| 240 | s32 m_Quality93percent; /**< MER level (*0.1 dB) for 93% quality indication */ | ||
| 241 | bool m_smartAntInverted; | ||
| 242 | bool m_bDebugEnableBridge; | ||
| 243 | bool m_bPDownOpenBridge; /**< only open DRXK bridge before power-down once it has been accessed */ | ||
| 244 | bool m_bPowerDown; /**< Power down when not used */ | ||
| 245 | |||
| 246 | u32 m_IqmFsRateOfs; /**< frequency shift as written to DRXK register (28bit fixpoint) */ | ||
| 247 | |||
| 248 | bool m_enableMPEGOutput; /**< If TRUE, enable MPEG output */ | ||
| 249 | bool m_insertRSByte; /**< If TRUE, insert RS byte */ | ||
| 250 | bool m_enableParallel; /**< If TRUE, parallel out otherwise serial */ | ||
| 251 | bool m_invertDATA; /**< If TRUE, invert DATA signals */ | ||
| 252 | bool m_invertERR; /**< If TRUE, invert ERR signal */ | ||
| 253 | bool m_invertSTR; /**< If TRUE, invert STR signals */ | ||
| 254 | bool m_invertVAL; /**< If TRUE, invert VAL signals */ | ||
| 255 | bool m_invertCLK; /**< If TRUE, invert CLK signals */ | ||
| 256 | bool m_DVBCStaticCLK; | ||
| 257 | bool m_DVBTStaticCLK; /**< If TRUE, static MPEG clockrate will | ||
| 258 | be used, otherwise clockrate will | ||
| 259 | adapt to the bitrate of the TS */ | ||
| 260 | u32 m_DVBTBitrate; | ||
| 261 | u32 m_DVBCBitrate; | ||
| 262 | |||
| 263 | u8 m_TSDataStrength; | ||
| 264 | u8 m_TSClockkStrength; | ||
| 265 | |||
| 266 | enum DRXMPEGStrWidth_t m_widthSTR; /**< MPEG start width */ | ||
| 267 | u32 m_mpegTsStaticBitrate; /**< Maximum bitrate in b/s in case | ||
| 268 | static clockrate is selected */ | ||
| 269 | |||
| 270 | /* LARGE_INTEGER m_StartTime; */ /**< Contains the time of the last demod start */ | ||
| 271 | s32 m_MpegLockTimeOut; /**< WaitForLockStatus Timeout (counts from start time) */ | ||
| 272 | s32 m_DemodLockTimeOut; /**< WaitForLockStatus Timeout (counts from start time) */ | ||
| 273 | |||
| 274 | bool m_disableTEIhandling; | ||
| 275 | |||
| 276 | bool m_RfAgcPol; | ||
| 277 | bool m_IfAgcPol; | ||
| 278 | |||
| 279 | struct SCfgAgc m_atvRfAgcCfg; /**< settings for ATV RF-AGC */ | ||
| 280 | struct SCfgAgc m_atvIfAgcCfg; /**< settings for ATV IF-AGC */ | ||
| 281 | struct SCfgPreSaw m_atvPreSawCfg; /**< settings for ATV pre SAW sense */ | ||
| 282 | bool m_phaseCorrectionBypass; | ||
| 283 | s16 m_atvTopVidPeak; | ||
| 284 | u16 m_atvTopNoiseTh; | ||
| 285 | enum EDrxkSifAttenuation m_sifAttenuation; | ||
| 286 | bool m_enableCVBSOutput; | ||
| 287 | bool m_enableSIFOutput; | ||
| 288 | bool m_bMirrorFreqSpect; | ||
| 289 | enum EDrxkConstellation m_Constellation; /**< Constellation type of the channel */ | ||
| 290 | u32 m_CurrSymbolRate; /**< Current QAM symbol rate */ | ||
| 291 | struct SCfgAgc m_qamRfAgcCfg; /**< settings for QAM RF-AGC */ | ||
| 292 | struct SCfgAgc m_qamIfAgcCfg; /**< settings for QAM IF-AGC */ | ||
| 293 | u16 m_qamPgaCfg; /**< settings for QAM PGA */ | ||
| 294 | struct SCfgPreSaw m_qamPreSawCfg; /**< settings for QAM pre SAW sense */ | ||
| 295 | enum EDrxkInterleaveMode m_qamInterleaveMode; /**< QAM Interleave mode */ | ||
| 296 | u16 m_fecRsPlen; | ||
| 297 | u16 m_fecRsPrescale; | ||
| 298 | |||
| 299 | enum DRXKCfgDvbtSqiSpeed m_sqiSpeed; | ||
| 300 | |||
| 301 | u16 m_GPIO; | ||
| 302 | u16 m_GPIOCfg; | ||
| 303 | |||
| 304 | struct SCfgAgc m_dvbtRfAgcCfg; /**< settings for QAM RF-AGC */ | ||
| 305 | struct SCfgAgc m_dvbtIfAgcCfg; /**< settings for QAM IF-AGC */ | ||
| 306 | struct SCfgPreSaw m_dvbtPreSawCfg; /**< settings for QAM pre SAW sense */ | ||
| 307 | |||
| 308 | u16 m_agcFastClipCtrlDelay; | ||
| 309 | bool m_adcCompPassed; | ||
| 310 | u16 m_adcCompCoef[64]; | ||
| 311 | u16 m_adcState; | ||
| 312 | |||
| 313 | u8 *m_microcode; | ||
| 314 | int m_microcode_length; | ||
| 315 | bool m_DRXK_A1_PATCH_CODE; | ||
| 316 | bool m_DRXK_A1_ROM_CODE; | ||
| 317 | bool m_DRXK_A2_ROM_CODE; | ||
| 318 | bool m_DRXK_A3_ROM_CODE; | ||
| 319 | bool m_DRXK_A2_PATCH_CODE; | ||
| 320 | bool m_DRXK_A3_PATCH_CODE; | ||
| 321 | |||
| 322 | bool m_rfmirror; | ||
| 323 | u8 m_deviceSpin; | ||
| 324 | u32 m_iqmRcRate; | ||
| 325 | |||
| 326 | enum DRXPowerMode m_currentPowerMode; | ||
| 327 | |||
| 328 | /* | ||
| 329 | * Configurable parameters at the driver. They stores the values found | ||
| 330 | * at struct drxk_config. | ||
| 331 | */ | ||
| 332 | |||
| 333 | u16 UIO_mask; /* Bits used by UIO */ | ||
| 334 | |||
| 335 | bool single_master; | ||
| 336 | bool no_i2c_bridge; | ||
| 337 | bool antenna_dvbt; | ||
| 338 | u16 antenna_gpio; | ||
| 339 | |||
| 340 | const char *microcode_name; | ||
| 341 | }; | ||
| 342 | |||
| 343 | #define NEVER_LOCK 0 | ||
| 344 | #define NOT_LOCKED 1 | ||
| 345 | #define DEMOD_LOCK 2 | ||
| 346 | #define FEC_LOCK 3 | ||
| 347 | #define MPEG_LOCK 4 | ||
| 348 | |||
diff --git a/drivers/media/dvb/frontends/drxk_map.h b/drivers/media/dvb/frontends/drxk_map.h new file mode 100644 index 000000000000..9b11a8328869 --- /dev/null +++ b/drivers/media/dvb/frontends/drxk_map.h | |||
| @@ -0,0 +1,449 @@ | |||
| 1 | #define AUD_COMM_EXEC__A 0x1000000 | ||
| 2 | #define AUD_COMM_EXEC_STOP 0x0 | ||
| 3 | #define FEC_COMM_EXEC__A 0x1C00000 | ||
| 4 | #define FEC_COMM_EXEC_STOP 0x0 | ||
| 5 | #define FEC_COMM_EXEC_ACTIVE 0x1 | ||
| 6 | #define FEC_DI_COMM_EXEC__A 0x1C20000 | ||
| 7 | #define FEC_DI_COMM_EXEC_STOP 0x0 | ||
| 8 | #define FEC_DI_INPUT_CTL__A 0x1C20016 | ||
| 9 | #define FEC_RS_COMM_EXEC__A 0x1C30000 | ||
| 10 | #define FEC_RS_COMM_EXEC_STOP 0x0 | ||
| 11 | #define FEC_RS_MEASUREMENT_PERIOD__A 0x1C30012 | ||
| 12 | #define FEC_RS_MEASUREMENT_PRESCALE__A 0x1C30013 | ||
| 13 | #define FEC_OC_MODE__A 0x1C40011 | ||
| 14 | #define FEC_OC_MODE_PARITY__M 0x1 | ||
| 15 | #define FEC_OC_DTO_MODE__A 0x1C40014 | ||
| 16 | #define FEC_OC_DTO_MODE_DYNAMIC__M 0x1 | ||
| 17 | #define FEC_OC_DTO_MODE_OFFSET_ENABLE__M 0x4 | ||
| 18 | #define FEC_OC_DTO_PERIOD__A 0x1C40015 | ||
| 19 | #define FEC_OC_DTO_BURST_LEN__A 0x1C40018 | ||
| 20 | #define FEC_OC_FCT_MODE__A 0x1C4001A | ||
| 21 | #define FEC_OC_FCT_MODE__PRE 0x0 | ||
| 22 | #define FEC_OC_FCT_MODE_RAT_ENA__M 0x1 | ||
| 23 | #define FEC_OC_FCT_MODE_VIRT_ENA__M 0x2 | ||
| 24 | #define FEC_OC_TMD_MODE__A 0x1C4001E | ||
| 25 | #define FEC_OC_TMD_COUNT__A 0x1C4001F | ||
| 26 | #define FEC_OC_TMD_HI_MARGIN__A 0x1C40020 | ||
| 27 | #define FEC_OC_TMD_LO_MARGIN__A 0x1C40021 | ||
| 28 | #define FEC_OC_TMD_INT_UPD_RATE__A 0x1C40023 | ||
| 29 | #define FEC_OC_AVR_PARM_A__A 0x1C40026 | ||
| 30 | #define FEC_OC_AVR_PARM_B__A 0x1C40027 | ||
| 31 | #define FEC_OC_RCN_GAIN__A 0x1C4002E | ||
| 32 | #define FEC_OC_RCN_CTL_RATE_LO__A 0x1C40030 | ||
| 33 | #define FEC_OC_RCN_CTL_STEP_LO__A 0x1C40032 | ||
| 34 | #define FEC_OC_RCN_CTL_STEP_HI__A 0x1C40033 | ||
| 35 | #define FEC_OC_SNC_MODE__A 0x1C40040 | ||
| 36 | #define FEC_OC_SNC_MODE_SHUTDOWN__M 0x10 | ||
| 37 | #define FEC_OC_SNC_LWM__A 0x1C40041 | ||
| 38 | #define FEC_OC_SNC_HWM__A 0x1C40042 | ||
| 39 | #define FEC_OC_SNC_UNLOCK__A 0x1C40043 | ||
| 40 | #define FEC_OC_SNC_FAIL_PERIOD__A 0x1C40046 | ||
| 41 | #define FEC_OC_IPR_MODE__A 0x1C40048 | ||
| 42 | #define FEC_OC_IPR_MODE_SERIAL__M 0x1 | ||
| 43 | #define FEC_OC_IPR_MODE_MCLK_DIS_DAT_ABS__M 0x4 | ||
| 44 | #define FEC_OC_IPR_MODE_MVAL_DIS_PAR__M 0x10 | ||
| 45 | #define FEC_OC_IPR_INVERT__A 0x1C40049 | ||
| 46 | #define FEC_OC_IPR_INVERT_MD0__M 0x1 | ||
| 47 | #define FEC_OC_IPR_INVERT_MD1__M 0x2 | ||
| 48 | #define FEC_OC_IPR_INVERT_MD2__M 0x4 | ||
| 49 | #define FEC_OC_IPR_INVERT_MD3__M 0x8 | ||
| 50 | #define FEC_OC_IPR_INVERT_MD4__M 0x10 | ||
| 51 | #define FEC_OC_IPR_INVERT_MD5__M 0x20 | ||
| 52 | #define FEC_OC_IPR_INVERT_MD6__M 0x40 | ||
| 53 | #define FEC_OC_IPR_INVERT_MD7__M 0x80 | ||
| 54 | #define FEC_OC_IPR_INVERT_MERR__M 0x100 | ||
| 55 | #define FEC_OC_IPR_INVERT_MSTRT__M 0x200 | ||
| 56 | #define FEC_OC_IPR_INVERT_MVAL__M 0x400 | ||
| 57 | #define FEC_OC_IPR_INVERT_MCLK__M 0x800 | ||
| 58 | #define FEC_OC_OCR_INVERT__A 0x1C40052 | ||
| 59 | #define IQM_COMM_EXEC__A 0x1800000 | ||
| 60 | #define IQM_COMM_EXEC_B_STOP 0x0 | ||
| 61 | #define IQM_COMM_EXEC_B_ACTIVE 0x1 | ||
| 62 | #define IQM_FS_RATE_OFS_LO__A 0x1820010 | ||
| 63 | #define IQM_FS_ADJ_SEL__A 0x1820014 | ||
| 64 | #define IQM_FS_ADJ_SEL_B_OFF 0x0 | ||
| 65 | #define IQM_FS_ADJ_SEL_B_QAM 0x1 | ||
| 66 | #define IQM_FS_ADJ_SEL_B_VSB 0x2 | ||
| 67 | #define IQM_FD_RATESEL__A 0x1830010 | ||
| 68 | #define IQM_RC_RATE_OFS_LO__A 0x1840010 | ||
| 69 | #define IQM_RC_RATE_OFS_LO__W 16 | ||
| 70 | #define IQM_RC_RATE_OFS_LO__M 0xFFFF | ||
| 71 | #define IQM_RC_RATE_OFS_HI__M 0xFF | ||
| 72 | #define IQM_RC_ADJ_SEL__A 0x1840014 | ||
| 73 | #define IQM_RC_ADJ_SEL_B_OFF 0x0 | ||
| 74 | #define IQM_RC_ADJ_SEL_B_QAM 0x1 | ||
| 75 | #define IQM_RC_ADJ_SEL_B_VSB 0x2 | ||
| 76 | #define IQM_RC_STRETCH__A 0x1840016 | ||
| 77 | #define IQM_CF_COMM_INT_MSK__A 0x1860006 | ||
| 78 | #define IQM_CF_SYMMETRIC__A 0x1860010 | ||
| 79 | #define IQM_CF_MIDTAP__A 0x1860011 | ||
| 80 | #define IQM_CF_MIDTAP_RE__B 0 | ||
| 81 | #define IQM_CF_MIDTAP_IM__B 1 | ||
| 82 | #define IQM_CF_OUT_ENA__A 0x1860012 | ||
| 83 | #define IQM_CF_OUT_ENA_QAM__B 1 | ||
| 84 | #define IQM_CF_OUT_ENA_OFDM__M 0x4 | ||
| 85 | #define IQM_CF_ADJ_SEL__A 0x1860013 | ||
| 86 | #define IQM_CF_SCALE__A 0x1860014 | ||
| 87 | #define IQM_CF_SCALE_SH__A 0x1860015 | ||
| 88 | #define IQM_CF_SCALE_SH__PRE 0x0 | ||
| 89 | #define IQM_CF_POW_MEAS_LEN__A 0x1860017 | ||
| 90 | #define IQM_CF_DS_ENA__A 0x1860019 | ||
| 91 | #define IQM_CF_TAP_RE0__A 0x1860020 | ||
| 92 | #define IQM_CF_TAP_IM0__A 0x1860040 | ||
| 93 | #define IQM_CF_CLP_VAL__A 0x1860060 | ||
| 94 | #define IQM_CF_DATATH__A 0x1860061 | ||
| 95 | #define IQM_CF_PKDTH__A 0x1860062 | ||
| 96 | #define IQM_CF_WND_LEN__A 0x1860063 | ||
| 97 | #define IQM_CF_DET_LCT__A 0x1860064 | ||
| 98 | #define IQM_CF_BYPASSDET__A 0x1860067 | ||
| 99 | #define IQM_AF_COMM_EXEC__A 0x1870000 | ||
| 100 | #define IQM_AF_COMM_EXEC_ACTIVE 0x1 | ||
| 101 | #define IQM_AF_CLKNEG__A 0x1870012 | ||
| 102 | #define IQM_AF_CLKNEG_CLKNEGDATA__M 0x2 | ||
| 103 | #define IQM_AF_CLKNEG_CLKNEGDATA_CLK_ADC_DATA_POS 0x0 | ||
| 104 | #define IQM_AF_CLKNEG_CLKNEGDATA_CLK_ADC_DATA_NEG 0x2 | ||
| 105 | #define IQM_AF_START_LOCK__A 0x187001B | ||
| 106 | #define IQM_AF_PHASE0__A 0x187001C | ||
| 107 | #define IQM_AF_PHASE1__A 0x187001D | ||
| 108 | #define IQM_AF_PHASE2__A 0x187001E | ||
| 109 | #define IQM_AF_CLP_LEN__A 0x1870023 | ||
| 110 | #define IQM_AF_CLP_TH__A 0x1870024 | ||
| 111 | #define IQM_AF_SNS_LEN__A 0x1870026 | ||
| 112 | #define IQM_AF_AGC_IF__A 0x1870028 | ||
| 113 | #define IQM_AF_AGC_RF__A 0x1870029 | ||
| 114 | #define IQM_AF_PDREF__A 0x187002B | ||
| 115 | #define IQM_AF_PDREF__M 0x1F | ||
| 116 | #define IQM_AF_STDBY__A 0x187002C | ||
| 117 | #define IQM_AF_STDBY_STDBY_ADC_STANDBY 0x2 | ||
| 118 | #define IQM_AF_STDBY_STDBY_AMP_STANDBY 0x4 | ||
| 119 | #define IQM_AF_STDBY_STDBY_PD_STANDBY 0x8 | ||
| 120 | #define IQM_AF_STDBY_STDBY_TAGC_IF_STANDBY 0x10 | ||
| 121 | #define IQM_AF_STDBY_STDBY_TAGC_RF_STANDBY 0x20 | ||
| 122 | #define IQM_AF_AMUX__A 0x187002D | ||
| 123 | #define IQM_AF_AMUX_SIGNAL2ADC 0x1 | ||
| 124 | #define IQM_AF_UPD_SEL__A 0x187002F | ||
| 125 | #define IQM_AF_INC_LCT__A 0x1870034 | ||
| 126 | #define IQM_AF_INC_BYPASS__A 0x1870036 | ||
| 127 | #define OFDM_CP_COMM_EXEC__A 0x2800000 | ||
| 128 | #define OFDM_CP_COMM_EXEC_STOP 0x0 | ||
| 129 | #define OFDM_EC_SB_PRIOR__A 0x3410013 | ||
| 130 | #define OFDM_EC_SB_PRIOR_HI 0x0 | ||
| 131 | #define OFDM_EC_SB_PRIOR_LO 0x1 | ||
| 132 | #define OFDM_EQ_TOP_TD_TPS_CONST__A 0x3010054 | ||
| 133 | #define OFDM_EQ_TOP_TD_TPS_CONST__M 0x3 | ||
| 134 | #define OFDM_EQ_TOP_TD_TPS_CONST_64QAM 0x2 | ||
| 135 | #define OFDM_EQ_TOP_TD_TPS_CODE_HP__A 0x3010056 | ||
| 136 | #define OFDM_EQ_TOP_TD_TPS_CODE_HP__M 0x7 | ||
| 137 | #define OFDM_EQ_TOP_TD_TPS_CODE_LP_7_8 0x4 | ||
| 138 | #define OFDM_EQ_TOP_TD_SQR_ERR_I__A 0x301005E | ||
| 139 | #define OFDM_EQ_TOP_TD_SQR_ERR_Q__A 0x301005F | ||
| 140 | #define OFDM_EQ_TOP_TD_SQR_ERR_EXP__A 0x3010060 | ||
| 141 | #define OFDM_EQ_TOP_TD_REQ_SMB_CNT__A 0x3010061 | ||
| 142 | #define OFDM_EQ_TOP_TD_TPS_PWR_OFS__A 0x3010062 | ||
| 143 | #define OFDM_LC_COMM_EXEC__A 0x3800000 | ||
| 144 | #define OFDM_LC_COMM_EXEC_STOP 0x0 | ||
| 145 | #define OFDM_SC_COMM_EXEC__A 0x3C00000 | ||
| 146 | #define OFDM_SC_COMM_EXEC_STOP 0x0 | ||
| 147 | #define OFDM_SC_COMM_STATE__A 0x3C00001 | ||
| 148 | #define OFDM_SC_RA_RAM_PARAM0__A 0x3C20040 | ||
| 149 | #define OFDM_SC_RA_RAM_PARAM1__A 0x3C20041 | ||
| 150 | #define OFDM_SC_RA_RAM_CMD_ADDR__A 0x3C20042 | ||
| 151 | #define OFDM_SC_RA_RAM_CMD__A 0x3C20043 | ||
| 152 | #define OFDM_SC_RA_RAM_CMD_NULL 0x0 | ||
| 153 | #define OFDM_SC_RA_RAM_CMD_PROC_START 0x1 | ||
| 154 | #define OFDM_SC_RA_RAM_CMD_SET_PREF_PARAM 0x3 | ||
| 155 | #define OFDM_SC_RA_RAM_CMD_PROGRAM_PARAM 0x4 | ||
| 156 | #define OFDM_SC_RA_RAM_CMD_GET_OP_PARAM 0x5 | ||
| 157 | #define OFDM_SC_RA_RAM_CMD_USER_IO 0x6 | ||
| 158 | #define OFDM_SC_RA_RAM_CMD_SET_TIMER 0x7 | ||
| 159 | #define OFDM_SC_RA_RAM_CMD_SET_ECHO_TIMING 0x8 | ||
| 160 | #define OFDM_SC_RA_RAM_SW_EVENT_RUN_NMASK__M 0x1 | ||
| 161 | #define OFDM_SC_RA_RAM_LOCKTRACK_MIN 0x1 | ||
| 162 | #define OFDM_SC_RA_RAM_OP_PARAM__A 0x3C20048 | ||
| 163 | #define OFDM_SC_RA_RAM_OP_PARAM_MODE__M 0x3 | ||
| 164 | #define OFDM_SC_RA_RAM_OP_PARAM_MODE_2K 0x0 | ||
| 165 | #define OFDM_SC_RA_RAM_OP_PARAM_MODE_8K 0x1 | ||
| 166 | #define OFDM_SC_RA_RAM_OP_PARAM_GUARD_32 0x0 | ||
| 167 | #define OFDM_SC_RA_RAM_OP_PARAM_GUARD_16 0x4 | ||
| 168 | #define OFDM_SC_RA_RAM_OP_PARAM_GUARD_8 0x8 | ||
| 169 | #define OFDM_SC_RA_RAM_OP_PARAM_GUARD_4 0xC | ||
| 170 | #define OFDM_SC_RA_RAM_OP_PARAM_CONST_QPSK 0x0 | ||
| 171 | #define OFDM_SC_RA_RAM_OP_PARAM_CONST_QAM16 0x10 | ||
| 172 | #define OFDM_SC_RA_RAM_OP_PARAM_CONST_QAM64 0x20 | ||
| 173 | #define OFDM_SC_RA_RAM_OP_PARAM_HIER_NO 0x0 | ||
| 174 | #define OFDM_SC_RA_RAM_OP_PARAM_HIER_A1 0x40 | ||
| 175 | #define OFDM_SC_RA_RAM_OP_PARAM_HIER_A2 0x80 | ||
| 176 | #define OFDM_SC_RA_RAM_OP_PARAM_HIER_A4 0xC0 | ||
| 177 | #define OFDM_SC_RA_RAM_OP_PARAM_RATE_1_2 0x0 | ||
| 178 | #define OFDM_SC_RA_RAM_OP_PARAM_RATE_2_3 0x200 | ||
| 179 | #define OFDM_SC_RA_RAM_OP_PARAM_RATE_3_4 0x400 | ||
| 180 | #define OFDM_SC_RA_RAM_OP_PARAM_RATE_5_6 0x600 | ||
| 181 | #define OFDM_SC_RA_RAM_OP_PARAM_RATE_7_8 0x800 | ||
| 182 | #define OFDM_SC_RA_RAM_OP_PARAM_PRIO_HI 0x0 | ||
| 183 | #define OFDM_SC_RA_RAM_OP_PARAM_PRIO_LO 0x1000 | ||
| 184 | #define OFDM_SC_RA_RAM_OP_AUTO_MODE__M 0x1 | ||
| 185 | #define OFDM_SC_RA_RAM_OP_AUTO_GUARD__M 0x2 | ||
| 186 | #define OFDM_SC_RA_RAM_OP_AUTO_CONST__M 0x4 | ||
| 187 | #define OFDM_SC_RA_RAM_OP_AUTO_HIER__M 0x8 | ||
| 188 | #define OFDM_SC_RA_RAM_OP_AUTO_RATE__M 0x10 | ||
| 189 | #define OFDM_SC_RA_RAM_LOCK__A 0x3C2004B | ||
| 190 | #define OFDM_SC_RA_RAM_LOCK_DEMOD__M 0x1 | ||
| 191 | #define OFDM_SC_RA_RAM_LOCK_FEC__M 0x2 | ||
| 192 | #define OFDM_SC_RA_RAM_LOCK_MPEG__M 0x4 | ||
| 193 | #define OFDM_SC_RA_RAM_LOCK_NODVBT__M 0x8 | ||
| 194 | #define OFDM_SC_RA_RAM_BE_OPT_DELAY__A 0x3C2004D | ||
| 195 | #define OFDM_SC_RA_RAM_BE_OPT_INIT_DELAY__A 0x3C2004E | ||
| 196 | #define OFDM_SC_RA_RAM_ECHO_THRES__A 0x3C2004F | ||
| 197 | #define OFDM_SC_RA_RAM_ECHO_THRES_8K__B 0 | ||
| 198 | #define OFDM_SC_RA_RAM_ECHO_THRES_8K__M 0xFF | ||
| 199 | #define OFDM_SC_RA_RAM_ECHO_THRES_2K__B 8 | ||
| 200 | #define OFDM_SC_RA_RAM_ECHO_THRES_2K__M 0xFF00 | ||
| 201 | #define OFDM_SC_RA_RAM_CONFIG__A 0x3C20050 | ||
| 202 | #define OFDM_SC_RA_RAM_CONFIG_NE_FIX_ENABLE__M 0x800 | ||
| 203 | #define OFDM_SC_RA_RAM_FR_THRES_8K__A 0x3C2007D | ||
| 204 | #define OFDM_SC_RA_RAM_NI_INIT_2K_PER_LEFT__A 0x3C200E0 | ||
| 205 | #define OFDM_SC_RA_RAM_NI_INIT_2K_PER_RIGHT__A 0x3C200E1 | ||
| 206 | #define OFDM_SC_RA_RAM_NI_INIT_8K_PER_LEFT__A 0x3C200E3 | ||
| 207 | #define OFDM_SC_RA_RAM_NI_INIT_8K_PER_RIGHT__A 0x3C200E4 | ||
| 208 | #define OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A 0x3C200F8 | ||
| 209 | #define QAM_COMM_EXEC__A 0x1400000 | ||
| 210 | #define QAM_COMM_EXEC_STOP 0x0 | ||
| 211 | #define QAM_COMM_EXEC_ACTIVE 0x1 | ||
| 212 | #define QAM_TOP_ANNEX_A 0x0 | ||
| 213 | #define QAM_TOP_ANNEX_C 0x2 | ||
| 214 | #define QAM_SL_ERR_POWER__A 0x1430017 | ||
| 215 | #define QAM_DQ_QUAL_FUN0__A 0x1440018 | ||
| 216 | #define QAM_DQ_QUAL_FUN1__A 0x1440019 | ||
| 217 | #define QAM_DQ_QUAL_FUN2__A 0x144001A | ||
| 218 | #define QAM_DQ_QUAL_FUN3__A 0x144001B | ||
| 219 | #define QAM_DQ_QUAL_FUN4__A 0x144001C | ||
| 220 | #define QAM_DQ_QUAL_FUN5__A 0x144001D | ||
| 221 | #define QAM_LC_MODE__A 0x1450010 | ||
| 222 | #define QAM_LC_QUAL_TAB0__A 0x1450018 | ||
| 223 | #define QAM_LC_QUAL_TAB1__A 0x1450019 | ||
| 224 | #define QAM_LC_QUAL_TAB2__A 0x145001A | ||
| 225 | #define QAM_LC_QUAL_TAB3__A 0x145001B | ||
| 226 | #define QAM_LC_QUAL_TAB4__A 0x145001C | ||
| 227 | #define QAM_LC_QUAL_TAB5__A 0x145001D | ||
| 228 | #define QAM_LC_QUAL_TAB6__A 0x145001E | ||
| 229 | #define QAM_LC_QUAL_TAB8__A 0x145001F | ||
| 230 | #define QAM_LC_QUAL_TAB9__A 0x1450020 | ||
| 231 | #define QAM_LC_QUAL_TAB10__A 0x1450021 | ||
| 232 | #define QAM_LC_QUAL_TAB12__A 0x1450022 | ||
| 233 | #define QAM_LC_QUAL_TAB15__A 0x1450023 | ||
| 234 | #define QAM_LC_QUAL_TAB16__A 0x1450024 | ||
| 235 | #define QAM_LC_QUAL_TAB20__A 0x1450025 | ||
| 236 | #define QAM_LC_QUAL_TAB25__A 0x1450026 | ||
| 237 | #define QAM_LC_LPF_FACTORP__A 0x1450028 | ||
| 238 | #define QAM_LC_LPF_FACTORI__A 0x1450029 | ||
| 239 | #define QAM_LC_RATE_LIMIT__A 0x145002A | ||
| 240 | #define QAM_LC_SYMBOL_FREQ__A 0x145002B | ||
| 241 | #define QAM_SY_TIMEOUT__A 0x1470011 | ||
| 242 | #define QAM_SY_TIMEOUT__PRE 0x3A98 | ||
| 243 | #define QAM_SY_SYNC_LWM__A 0x1470012 | ||
| 244 | #define QAM_SY_SYNC_AWM__A 0x1470013 | ||
| 245 | #define QAM_SY_SYNC_HWM__A 0x1470014 | ||
| 246 | #define QAM_SY_SP_INV__A 0x1470017 | ||
| 247 | #define QAM_SY_SP_INV_SPECTRUM_INV_DIS 0x0 | ||
| 248 | #define SCU_COMM_EXEC__A 0x800000 | ||
| 249 | #define SCU_COMM_EXEC_STOP 0x0 | ||
| 250 | #define SCU_COMM_EXEC_ACTIVE 0x1 | ||
| 251 | #define SCU_COMM_EXEC_HOLD 0x2 | ||
| 252 | #define SCU_RAM_DRIVER_DEBUG__A 0x831EBF | ||
| 253 | #define SCU_RAM_QAM_FSM_STEP_PERIOD__A 0x831EC4 | ||
| 254 | #define SCU_RAM_GPIO__A 0x831EC7 | ||
| 255 | #define SCU_RAM_GPIO_HW_LOCK_IND_DISABLE 0x0 | ||
| 256 | #define SCU_RAM_AGC_CLP_CTRL_MODE__A 0x831EC8 | ||
| 257 | #define SCU_RAM_FEC_ACCUM_PKT_FAILURES__A 0x831ECB | ||
| 258 | #define SCU_RAM_FEC_PRE_RS_BER_FILTER_SH__A 0x831F05 | ||
| 259 | #define SCU_RAM_AGC_FAST_SNS_CTRL_DELAY__A 0x831F15 | ||
| 260 | #define SCU_RAM_AGC_KI_CYCLEN__A 0x831F17 | ||
| 261 | #define SCU_RAM_AGC_SNS_CYCLEN__A 0x831F18 | ||
| 262 | #define SCU_RAM_AGC_RF_SNS_DEV_MAX__A 0x831F19 | ||
| 263 | #define SCU_RAM_AGC_RF_SNS_DEV_MIN__A 0x831F1A | ||
| 264 | #define SCU_RAM_AGC_RF_MAX__A 0x831F1B | ||
| 265 | #define SCU_RAM_AGC_CONFIG__A 0x831F24 | ||
| 266 | #define SCU_RAM_AGC_CONFIG_DISABLE_RF_AGC__M 0x1 | ||
| 267 | #define SCU_RAM_AGC_CONFIG_DISABLE_IF_AGC__M 0x2 | ||
| 268 | #define SCU_RAM_AGC_CONFIG_INV_IF_POL__M 0x100 | ||
| 269 | #define SCU_RAM_AGC_CONFIG_INV_RF_POL__M 0x200 | ||
| 270 | #define SCU_RAM_AGC_KI__A 0x831F25 | ||
| 271 | #define SCU_RAM_AGC_KI_RF__B 4 | ||
| 272 | #define SCU_RAM_AGC_KI_RF__M 0xF0 | ||
| 273 | #define SCU_RAM_AGC_KI_IF__B 8 | ||
| 274 | #define SCU_RAM_AGC_KI_IF__M 0xF00 | ||
| 275 | #define SCU_RAM_AGC_KI_RED__A 0x831F26 | ||
| 276 | #define SCU_RAM_AGC_KI_RED_RAGC_RED__B 2 | ||
| 277 | #define SCU_RAM_AGC_KI_RED_RAGC_RED__M 0xC | ||
| 278 | #define SCU_RAM_AGC_KI_RED_IAGC_RED__B 4 | ||
| 279 | #define SCU_RAM_AGC_KI_RED_IAGC_RED__M 0x30 | ||
| 280 | #define SCU_RAM_AGC_KI_INNERGAIN_MIN__A 0x831F27 | ||
| 281 | #define SCU_RAM_AGC_KI_MINGAIN__A 0x831F28 | ||
| 282 | #define SCU_RAM_AGC_KI_MAXGAIN__A 0x831F29 | ||
| 283 | #define SCU_RAM_AGC_KI_MAXMINGAIN_TH__A 0x831F2A | ||
| 284 | #define SCU_RAM_AGC_KI_MIN__A 0x831F2B | ||
| 285 | #define SCU_RAM_AGC_KI_MAX__A 0x831F2C | ||
| 286 | #define SCU_RAM_AGC_CLP_SUM__A 0x831F2D | ||
| 287 | #define SCU_RAM_AGC_CLP_SUM_MIN__A 0x831F2E | ||
| 288 | #define SCU_RAM_AGC_CLP_SUM_MAX__A 0x831F2F | ||
| 289 | #define SCU_RAM_AGC_CLP_CYCLEN__A 0x831F30 | ||
| 290 | #define SCU_RAM_AGC_CLP_CYCCNT__A 0x831F31 | ||
| 291 | #define SCU_RAM_AGC_CLP_DIR_TO__A 0x831F32 | ||
| 292 | #define SCU_RAM_AGC_CLP_DIR_WD__A 0x831F33 | ||
| 293 | #define SCU_RAM_AGC_CLP_DIR_STP__A 0x831F34 | ||
| 294 | #define SCU_RAM_AGC_SNS_SUM__A 0x831F35 | ||
| 295 | #define SCU_RAM_AGC_SNS_SUM_MIN__A 0x831F36 | ||
| 296 | #define SCU_RAM_AGC_SNS_SUM_MAX__A 0x831F37 | ||
| 297 | #define SCU_RAM_AGC_SNS_CYCCNT__A 0x831F38 | ||
| 298 | #define SCU_RAM_AGC_SNS_DIR_TO__A 0x831F39 | ||
| 299 | #define SCU_RAM_AGC_SNS_DIR_WD__A 0x831F3A | ||
| 300 | #define SCU_RAM_AGC_SNS_DIR_STP__A 0x831F3B | ||
| 301 | #define SCU_RAM_AGC_INGAIN_TGT__A 0x831F3D | ||
| 302 | #define SCU_RAM_AGC_INGAIN_TGT_MIN__A 0x831F3E | ||
| 303 | #define SCU_RAM_AGC_INGAIN_TGT_MAX__A 0x831F3F | ||
| 304 | #define SCU_RAM_AGC_IF_IACCU_HI__A 0x831F40 | ||
| 305 | #define SCU_RAM_AGC_IF_IACCU_LO__A 0x831F41 | ||
| 306 | #define SCU_RAM_AGC_IF_IACCU_HI_TGT__A 0x831F42 | ||
| 307 | #define SCU_RAM_AGC_IF_IACCU_HI_TGT_MIN__A 0x831F43 | ||
| 308 | #define SCU_RAM_AGC_IF_IACCU_HI_TGT_MAX__A 0x831F44 | ||
| 309 | #define SCU_RAM_AGC_RF_IACCU_HI__A 0x831F45 | ||
| 310 | #define SCU_RAM_AGC_RF_IACCU_LO__A 0x831F46 | ||
| 311 | #define SCU_RAM_AGC_RF_IACCU_HI_CO__A 0x831F47 | ||
| 312 | #define SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A 0x831F84 | ||
| 313 | #define SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A 0x831F85 | ||
| 314 | #define SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A 0x831F86 | ||
| 315 | #define SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A 0x831F87 | ||
| 316 | #define SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A 0x831F88 | ||
| 317 | #define SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A 0x831F89 | ||
| 318 | #define SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A 0x831F8A | ||
| 319 | #define SCU_RAM_QAM_FSM_RTH__A 0x831F8E | ||
| 320 | #define SCU_RAM_QAM_FSM_FTH__A 0x831F8F | ||
| 321 | #define SCU_RAM_QAM_FSM_PTH__A 0x831F90 | ||
| 322 | #define SCU_RAM_QAM_FSM_MTH__A 0x831F91 | ||
| 323 | #define SCU_RAM_QAM_FSM_CTH__A 0x831F92 | ||
| 324 | #define SCU_RAM_QAM_FSM_QTH__A 0x831F93 | ||
| 325 | #define SCU_RAM_QAM_FSM_RATE_LIM__A 0x831F94 | ||
| 326 | #define SCU_RAM_QAM_FSM_FREQ_LIM__A 0x831F95 | ||
| 327 | #define SCU_RAM_QAM_FSM_COUNT_LIM__A 0x831F96 | ||
| 328 | #define SCU_RAM_QAM_LC_CA_COARSE__A 0x831F97 | ||
| 329 | #define SCU_RAM_QAM_LC_CA_FINE__A 0x831F99 | ||
| 330 | #define SCU_RAM_QAM_LC_CP_COARSE__A 0x831F9A | ||
| 331 | #define SCU_RAM_QAM_LC_CP_MEDIUM__A 0x831F9B | ||
| 332 | #define SCU_RAM_QAM_LC_CP_FINE__A 0x831F9C | ||
| 333 | #define SCU_RAM_QAM_LC_CI_COARSE__A 0x831F9D | ||
| 334 | #define SCU_RAM_QAM_LC_CI_MEDIUM__A 0x831F9E | ||
| 335 | #define SCU_RAM_QAM_LC_CI_FINE__A 0x831F9F | ||
| 336 | #define SCU_RAM_QAM_LC_EP_COARSE__A 0x831FA0 | ||
| 337 | #define SCU_RAM_QAM_LC_EP_MEDIUM__A 0x831FA1 | ||
| 338 | #define SCU_RAM_QAM_LC_EP_FINE__A 0x831FA2 | ||
| 339 | #define SCU_RAM_QAM_LC_EI_COARSE__A 0x831FA3 | ||
| 340 | #define SCU_RAM_QAM_LC_EI_MEDIUM__A 0x831FA4 | ||
| 341 | #define SCU_RAM_QAM_LC_EI_FINE__A 0x831FA5 | ||
| 342 | #define SCU_RAM_QAM_LC_CF_COARSE__A 0x831FA6 | ||
| 343 | #define SCU_RAM_QAM_LC_CF_MEDIUM__A 0x831FA7 | ||
| 344 | #define SCU_RAM_QAM_LC_CF_FINE__A 0x831FA8 | ||
| 345 | #define SCU_RAM_QAM_LC_CF1_COARSE__A 0x831FA9 | ||
| 346 | #define SCU_RAM_QAM_LC_CF1_MEDIUM__A 0x831FAA | ||
| 347 | #define SCU_RAM_QAM_LC_CF1_FINE__A 0x831FAB | ||
| 348 | #define SCU_RAM_QAM_SL_SIG_POWER__A 0x831FAC | ||
| 349 | #define SCU_RAM_QAM_EQ_CMA_RAD0__A 0x831FAD | ||
| 350 | #define SCU_RAM_QAM_EQ_CMA_RAD1__A 0x831FAE | ||
| 351 | #define SCU_RAM_QAM_EQ_CMA_RAD2__A 0x831FAF | ||
| 352 | #define SCU_RAM_QAM_EQ_CMA_RAD3__A 0x831FB0 | ||
| 353 | #define SCU_RAM_QAM_EQ_CMA_RAD4__A 0x831FB1 | ||
| 354 | #define SCU_RAM_QAM_EQ_CMA_RAD5__A 0x831FB2 | ||
| 355 | #define SCU_RAM_QAM_LOCKED_LOCKED_DEMOD_LOCKED 0x4000 | ||
| 356 | #define SCU_RAM_QAM_LOCKED_LOCKED_LOCKED 0x8000 | ||
| 357 | #define SCU_RAM_QAM_LOCKED_LOCKED_NEVER_LOCK 0xC000 | ||
| 358 | #define SCU_RAM_AGC_FAST_CLP_CTRL_DELAY__A 0x831FEA | ||
| 359 | #define SCU_RAM_DRIVER_VER_HI__A 0x831FEB | ||
| 360 | #define SCU_RAM_DRIVER_VER_LO__A 0x831FEC | ||
| 361 | #define SCU_RAM_PARAM_15__A 0x831FED | ||
| 362 | #define SCU_RAM_PARAM_0__A 0x831FFC | ||
| 363 | #define SCU_RAM_COMMAND__A 0x831FFD | ||
| 364 | #define SCU_RAM_COMMAND_CMD_DEMOD_RESET 0x1 | ||
| 365 | #define SCU_RAM_COMMAND_CMD_DEMOD_SET_ENV 0x2 | ||
| 366 | #define SCU_RAM_COMMAND_CMD_DEMOD_SET_PARAM 0x3 | ||
| 367 | #define SCU_RAM_COMMAND_CMD_DEMOD_START 0x4 | ||
| 368 | #define SCU_RAM_COMMAND_CMD_DEMOD_GET_LOCK 0x5 | ||
| 369 | #define SCU_RAM_COMMAND_CMD_DEMOD_STOP 0x9 | ||
| 370 | #define SCU_RAM_COMMAND_STANDARD_QAM 0x200 | ||
| 371 | #define SCU_RAM_COMMAND_STANDARD_OFDM 0x400 | ||
| 372 | #define SIO_TOP_COMM_KEY__A 0x41000F | ||
| 373 | #define SIO_TOP_COMM_KEY_KEY 0xFABA | ||
| 374 | #define SIO_TOP_JTAGID_LO__A 0x410012 | ||
| 375 | #define SIO_HI_RA_RAM_RES__A 0x420031 | ||
| 376 | #define SIO_HI_RA_RAM_CMD__A 0x420032 | ||
| 377 | #define SIO_HI_RA_RAM_CMD_RESET 0x2 | ||
| 378 | #define SIO_HI_RA_RAM_CMD_CONFIG 0x3 | ||
| 379 | #define SIO_HI_RA_RAM_CMD_BRDCTRL 0x7 | ||
| 380 | #define SIO_HI_RA_RAM_PAR_1__A 0x420033 | ||
| 381 | #define SIO_HI_RA_RAM_PAR_1_PAR1_SEC_KEY 0x3945 | ||
| 382 | #define SIO_HI_RA_RAM_PAR_2__A 0x420034 | ||
| 383 | #define SIO_HI_RA_RAM_PAR_2_CFG_DIV__M 0x7F | ||
| 384 | #define SIO_HI_RA_RAM_PAR_2_BRD_CFG_OPEN 0x0 | ||
| 385 | #define SIO_HI_RA_RAM_PAR_2_BRD_CFG_CLOSED 0x4 | ||
| 386 | #define SIO_HI_RA_RAM_PAR_3__A 0x420035 | ||
| 387 | #define SIO_HI_RA_RAM_PAR_3_CFG_DBL_SDA__M 0x7F | ||
| 388 | #define SIO_HI_RA_RAM_PAR_3_CFG_DBL_SCL__B 7 | ||
| 389 | #define SIO_HI_RA_RAM_PAR_3_ACP_RW_READ 0x0 | ||
| 390 | #define SIO_HI_RA_RAM_PAR_3_ACP_RW_WRITE 0x8 | ||
| 391 | #define SIO_HI_RA_RAM_PAR_4__A 0x420036 | ||
| 392 | #define SIO_HI_RA_RAM_PAR_5__A 0x420037 | ||
| 393 | #define SIO_HI_RA_RAM_PAR_5_CFG_SLV0_SLAVE 0x1 | ||
| 394 | #define SIO_HI_RA_RAM_PAR_5_CFG_SLEEP__M 0x8 | ||
| 395 | #define SIO_HI_RA_RAM_PAR_5_CFG_SLEEP_ZZZ 0x8 | ||
| 396 | #define SIO_HI_RA_RAM_PAR_6__A 0x420038 | ||
| 397 | #define SIO_CC_PLL_LOCK__A 0x450012 | ||
| 398 | #define SIO_CC_PWD_MODE__A 0x450015 | ||
| 399 | #define SIO_CC_PWD_MODE_LEVEL_NONE 0x0 | ||
| 400 | #define SIO_CC_PWD_MODE_LEVEL_OFDM 0x1 | ||
| 401 | #define SIO_CC_PWD_MODE_LEVEL_CLOCK 0x2 | ||
| 402 | #define SIO_CC_PWD_MODE_LEVEL_PLL 0x3 | ||
| 403 | #define SIO_CC_PWD_MODE_LEVEL_OSC 0x4 | ||
| 404 | #define SIO_CC_SOFT_RST__A 0x450016 | ||
| 405 | #define SIO_CC_SOFT_RST_OFDM__M 0x1 | ||
| 406 | #define SIO_CC_SOFT_RST_SYS__M 0x2 | ||
| 407 | #define SIO_CC_SOFT_RST_OSC__M 0x4 | ||
| 408 | #define SIO_CC_UPDATE__A 0x450017 | ||
| 409 | #define SIO_CC_UPDATE_KEY 0xFABA | ||
| 410 | #define SIO_OFDM_SH_OFDM_RING_ENABLE__A 0x470010 | ||
| 411 | #define SIO_OFDM_SH_OFDM_RING_ENABLE_OFF 0x0 | ||
| 412 | #define SIO_OFDM_SH_OFDM_RING_ENABLE_ON 0x1 | ||
| 413 | #define SIO_OFDM_SH_OFDM_RING_STATUS__A 0x470012 | ||
| 414 | #define SIO_OFDM_SH_OFDM_RING_STATUS_DOWN 0x0 | ||
| 415 | #define SIO_OFDM_SH_OFDM_RING_STATUS_ENABLED 0x1 | ||
| 416 | #define SIO_BL_COMM_EXEC__A 0x480000 | ||
| 417 | #define SIO_BL_COMM_EXEC_ACTIVE 0x1 | ||
| 418 | #define SIO_BL_STATUS__A 0x480010 | ||
| 419 | #define SIO_BL_MODE__A 0x480011 | ||
| 420 | #define SIO_BL_MODE_DIRECT 0x0 | ||
| 421 | #define SIO_BL_MODE_CHAIN 0x1 | ||
| 422 | #define SIO_BL_ENABLE__A 0x480012 | ||
| 423 | #define SIO_BL_ENABLE_ON 0x1 | ||
| 424 | #define SIO_BL_TGT_HDR__A 0x480014 | ||
| 425 | #define SIO_BL_TGT_ADDR__A 0x480015 | ||
| 426 | #define SIO_BL_SRC_ADDR__A 0x480016 | ||
| 427 | #define SIO_BL_SRC_LEN__A 0x480017 | ||
| 428 | #define SIO_BL_CHAIN_ADDR__A 0x480018 | ||
| 429 | #define SIO_BL_CHAIN_LEN__A 0x480019 | ||
| 430 | #define SIO_PDR_MON_CFG__A 0x7F0010 | ||
| 431 | #define SIO_PDR_UIO_IN_HI__A 0x7F0015 | ||
| 432 | #define SIO_PDR_UIO_OUT_LO__A 0x7F0016 | ||
| 433 | #define SIO_PDR_OHW_CFG__A 0x7F001F | ||
| 434 | #define SIO_PDR_OHW_CFG_FREF_SEL__M 0x3 | ||
| 435 | #define SIO_PDR_MSTRT_CFG__A 0x7F0025 | ||
| 436 | #define SIO_PDR_MERR_CFG__A 0x7F0026 | ||
| 437 | #define SIO_PDR_MCLK_CFG__A 0x7F0028 | ||
| 438 | #define SIO_PDR_MCLK_CFG_DRIVE__B 3 | ||
| 439 | #define SIO_PDR_MVAL_CFG__A 0x7F0029 | ||
| 440 | #define SIO_PDR_MD0_CFG__A 0x7F002A | ||
| 441 | #define SIO_PDR_MD0_CFG_DRIVE__B 3 | ||
| 442 | #define SIO_PDR_MD1_CFG__A 0x7F002B | ||
| 443 | #define SIO_PDR_MD2_CFG__A 0x7F002C | ||
| 444 | #define SIO_PDR_MD3_CFG__A 0x7F002D | ||
| 445 | #define SIO_PDR_MD4_CFG__A 0x7F002F | ||
| 446 | #define SIO_PDR_MD5_CFG__A 0x7F0030 | ||
| 447 | #define SIO_PDR_MD6_CFG__A 0x7F0031 | ||
| 448 | #define SIO_PDR_MD7_CFG__A 0x7F0032 | ||
| 449 | #define SIO_PDR_SMA_TX_CFG__A 0x7F0038 | ||
diff --git a/drivers/media/dvb/frontends/itd1000.c b/drivers/media/dvb/frontends/itd1000.c index f7a40a18777a..aa9ccb821fa5 100644 --- a/drivers/media/dvb/frontends/itd1000.c +++ b/drivers/media/dvb/frontends/itd1000.c | |||
| @@ -35,21 +35,18 @@ static int debug; | |||
| 35 | module_param(debug, int, 0644); | 35 | module_param(debug, int, 0644); |
| 36 | MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off)."); | 36 | MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off)."); |
| 37 | 37 | ||
| 38 | #define deb(args...) do { \ | 38 | #define itd_dbg(args...) do { \ |
| 39 | if (debug) { \ | 39 | if (debug) { \ |
| 40 | printk(KERN_DEBUG "ITD1000: " args);\ | 40 | printk(KERN_DEBUG "ITD1000: " args);\ |
| 41 | printk("\n"); \ | ||
| 42 | } \ | 41 | } \ |
| 43 | } while (0) | 42 | } while (0) |
| 44 | 43 | ||
| 45 | #define warn(args...) do { \ | 44 | #define itd_warn(args...) do { \ |
| 46 | printk(KERN_WARNING "ITD1000: " args); \ | 45 | printk(KERN_WARNING "ITD1000: " args); \ |
| 47 | printk("\n"); \ | ||
| 48 | } while (0) | 46 | } while (0) |
| 49 | 47 | ||
| 50 | #define info(args...) do { \ | 48 | #define itd_info(args...) do { \ |
| 51 | printk(KERN_INFO "ITD1000: " args); \ | 49 | printk(KERN_INFO "ITD1000: " args); \ |
| 52 | printk("\n"); \ | ||
| 53 | } while (0) | 50 | } while (0) |
| 54 | 51 | ||
| 55 | /* don't write more than one byte with flexcop behind */ | 52 | /* don't write more than one byte with flexcop behind */ |
| @@ -62,7 +59,7 @@ static int itd1000_write_regs(struct itd1000_state *state, u8 reg, u8 v[], u8 le | |||
| 62 | buf[0] = reg; | 59 | buf[0] = reg; |
| 63 | memcpy(&buf[1], v, len); | 60 | memcpy(&buf[1], v, len); |
| 64 | 61 | ||
| 65 | /* deb("wr %02x: %02x", reg, v[0]); */ | 62 | /* itd_dbg("wr %02x: %02x\n", reg, v[0]); */ |
| 66 | 63 | ||
| 67 | if (i2c_transfer(state->i2c, &msg, 1) != 1) { | 64 | if (i2c_transfer(state->i2c, &msg, 1) != 1) { |
| 68 | printk(KERN_WARNING "itd1000 I2C write failed\n"); | 65 | printk(KERN_WARNING "itd1000 I2C write failed\n"); |
| @@ -83,7 +80,7 @@ static int itd1000_read_reg(struct itd1000_state *state, u8 reg) | |||
| 83 | itd1000_write_regs(state, (reg - 1) & 0xff, &state->shadow[(reg - 1) & 0xff], 1); | 80 | itd1000_write_regs(state, (reg - 1) & 0xff, &state->shadow[(reg - 1) & 0xff], 1); |
| 84 | 81 | ||
| 85 | if (i2c_transfer(state->i2c, msg, 2) != 2) { | 82 | if (i2c_transfer(state->i2c, msg, 2) != 2) { |
| 86 | warn("itd1000 I2C read failed"); | 83 | itd_warn("itd1000 I2C read failed\n"); |
| 87 | return -EREMOTEIO; | 84 | return -EREMOTEIO; |
| 88 | } | 85 | } |
| 89 | return val; | 86 | return val; |
| @@ -127,14 +124,14 @@ static void itd1000_set_lpf_bw(struct itd1000_state *state, u32 symbol_rate) | |||
| 127 | u8 bbgvmin = itd1000_read_reg(state, BBGVMIN) & 0xf0; | 124 | u8 bbgvmin = itd1000_read_reg(state, BBGVMIN) & 0xf0; |
| 128 | u8 bw = itd1000_read_reg(state, BW) & 0xf0; | 125 | u8 bw = itd1000_read_reg(state, BW) & 0xf0; |
| 129 | 126 | ||
| 130 | deb("symbol_rate = %d", symbol_rate); | 127 | itd_dbg("symbol_rate = %d\n", symbol_rate); |
| 131 | 128 | ||
| 132 | /* not sure what is that ? - starting to download the table */ | 129 | /* not sure what is that ? - starting to download the table */ |
| 133 | itd1000_write_reg(state, CON1, con1 | (1 << 1)); | 130 | itd1000_write_reg(state, CON1, con1 | (1 << 1)); |
| 134 | 131 | ||
| 135 | for (i = 0; i < ARRAY_SIZE(itd1000_lpf_pga); i++) | 132 | for (i = 0; i < ARRAY_SIZE(itd1000_lpf_pga); i++) |
| 136 | if (symbol_rate < itd1000_lpf_pga[i].symbol_rate) { | 133 | if (symbol_rate < itd1000_lpf_pga[i].symbol_rate) { |
| 137 | deb("symrate: index: %d pgaext: %x, bbgvmin: %x", i, itd1000_lpf_pga[i].pgaext, itd1000_lpf_pga[i].bbgvmin); | 134 | itd_dbg("symrate: index: %d pgaext: %x, bbgvmin: %x\n", i, itd1000_lpf_pga[i].pgaext, itd1000_lpf_pga[i].bbgvmin); |
| 138 | itd1000_write_reg(state, PLLFH, pllfh | (itd1000_lpf_pga[i].pgaext << 4)); | 135 | itd1000_write_reg(state, PLLFH, pllfh | (itd1000_lpf_pga[i].pgaext << 4)); |
| 139 | itd1000_write_reg(state, BBGVMIN, bbgvmin | (itd1000_lpf_pga[i].bbgvmin)); | 136 | itd1000_write_reg(state, BBGVMIN, bbgvmin | (itd1000_lpf_pga[i].bbgvmin)); |
| 140 | itd1000_write_reg(state, BW, bw | (i & 0x0f)); | 137 | itd1000_write_reg(state, BW, bw | (i & 0x0f)); |
| @@ -182,7 +179,7 @@ static void itd1000_set_vco(struct itd1000_state *state, u32 freq_khz) | |||
| 182 | 179 | ||
| 183 | adcout = itd1000_read_reg(state, PLLLOCK) & 0x0f; | 180 | adcout = itd1000_read_reg(state, PLLLOCK) & 0x0f; |
| 184 | 181 | ||
| 185 | deb("VCO: %dkHz: %d -> ADCOUT: %d %02x", freq_khz, itd1000_vcorg[i].vcorg, adcout, vco_chp1_i2c); | 182 | itd_dbg("VCO: %dkHz: %d -> ADCOUT: %d %02x\n", freq_khz, itd1000_vcorg[i].vcorg, adcout, vco_chp1_i2c); |
| 186 | 183 | ||
| 187 | if (adcout > 13) { | 184 | if (adcout > 13) { |
| 188 | if (!(itd1000_vcorg[i].vcorg == 7 || itd1000_vcorg[i].vcorg == 15)) | 185 | if (!(itd1000_vcorg[i].vcorg == 7 || itd1000_vcorg[i].vcorg == 15)) |
| @@ -232,7 +229,7 @@ static void itd1000_set_lo(struct itd1000_state *state, u32 freq_khz) | |||
| 232 | pllf = (u32) tmp; | 229 | pllf = (u32) tmp; |
| 233 | 230 | ||
| 234 | state->frequency = ((plln * 1000) + (pllf * 1000)/1048576) * 2*FREF; | 231 | state->frequency = ((plln * 1000) + (pllf * 1000)/1048576) * 2*FREF; |
| 235 | deb("frequency: %dkHz (wanted) %dkHz (set), PLLF = %d, PLLN = %d", freq_khz, state->frequency, pllf, plln); | 232 | itd_dbg("frequency: %dkHz (wanted) %dkHz (set), PLLF = %d, PLLN = %d\n", freq_khz, state->frequency, pllf, plln); |
| 236 | 233 | ||
| 237 | itd1000_write_reg(state, PLLNH, 0x80); /* PLLNH */; | 234 | itd1000_write_reg(state, PLLNH, 0x80); /* PLLNH */; |
| 238 | itd1000_write_reg(state, PLLNL, plln & 0xff); | 235 | itd1000_write_reg(state, PLLNL, plln & 0xff); |
| @@ -242,7 +239,7 @@ static void itd1000_set_lo(struct itd1000_state *state, u32 freq_khz) | |||
| 242 | 239 | ||
| 243 | for (i = 0; i < ARRAY_SIZE(itd1000_fre_values); i++) { | 240 | for (i = 0; i < ARRAY_SIZE(itd1000_fre_values); i++) { |
| 244 | if (freq_khz <= itd1000_fre_values[i].freq) { | 241 | if (freq_khz <= itd1000_fre_values[i].freq) { |
| 245 | deb("fre_values: %d", i); | 242 | itd_dbg("fre_values: %d\n", i); |
| 246 | itd1000_write_reg(state, RFTR, itd1000_fre_values[i].values[0]); | 243 | itd1000_write_reg(state, RFTR, itd1000_fre_values[i].values[0]); |
| 247 | for (j = 0; j < 9; j++) | 244 | for (j = 0; j < 9; j++) |
| 248 | itd1000_write_reg(state, RFST1+j, itd1000_fre_values[i].values[j+1]); | 245 | itd1000_write_reg(state, RFST1+j, itd1000_fre_values[i].values[j+1]); |
| @@ -382,7 +379,7 @@ struct dvb_frontend *itd1000_attach(struct dvb_frontend *fe, struct i2c_adapter | |||
| 382 | kfree(state); | 379 | kfree(state); |
| 383 | return NULL; | 380 | return NULL; |
| 384 | } | 381 | } |
| 385 | info("successfully identified (ID: %d)", i); | 382 | itd_info("successfully identified (ID: %d)\n", i); |
| 386 | 383 | ||
| 387 | memset(state->shadow, 0xff, sizeof(state->shadow)); | 384 | memset(state->shadow, 0xff, sizeof(state->shadow)); |
| 388 | for (i = 0x65; i < 0x9c; i++) | 385 | for (i = 0x65; i < 0x9c; i++) |
diff --git a/drivers/media/dvb/frontends/nxt6000.c b/drivers/media/dvb/frontends/nxt6000.c index a763ec756f7f..6599b8fea9e9 100644 --- a/drivers/media/dvb/frontends/nxt6000.c +++ b/drivers/media/dvb/frontends/nxt6000.c | |||
| @@ -50,7 +50,7 @@ static int nxt6000_writereg(struct nxt6000_state* state, u8 reg, u8 data) | |||
| 50 | if ((ret = i2c_transfer(state->i2c, &msg, 1)) != 1) | 50 | if ((ret = i2c_transfer(state->i2c, &msg, 1)) != 1) |
| 51 | dprintk("nxt6000: nxt6000_write error (reg: 0x%02X, data: 0x%02X, ret: %d)\n", reg, data, ret); | 51 | dprintk("nxt6000: nxt6000_write error (reg: 0x%02X, data: 0x%02X, ret: %d)\n", reg, data, ret); |
| 52 | 52 | ||
| 53 | return (ret != 1) ? -EFAULT : 0; | 53 | return (ret != 1) ? -EIO : 0; |
| 54 | } | 54 | } |
| 55 | 55 | ||
| 56 | static u8 nxt6000_readreg(struct nxt6000_state* state, u8 reg) | 56 | static u8 nxt6000_readreg(struct nxt6000_state* state, u8 reg) |
diff --git a/drivers/media/dvb/frontends/s5h1420.c b/drivers/media/dvb/frontends/s5h1420.c index 17f8cdf8afef..3879d2e378aa 100644 --- a/drivers/media/dvb/frontends/s5h1420.c +++ b/drivers/media/dvb/frontends/s5h1420.c | |||
| @@ -634,7 +634,7 @@ static int s5h1420_set_frontend(struct dvb_frontend* fe, | |||
| 634 | struct s5h1420_state* state = fe->demodulator_priv; | 634 | struct s5h1420_state* state = fe->demodulator_priv; |
| 635 | int frequency_delta; | 635 | int frequency_delta; |
| 636 | struct dvb_frontend_tune_settings fesettings; | 636 | struct dvb_frontend_tune_settings fesettings; |
| 637 | uint8_t clock_settting; | 637 | uint8_t clock_setting; |
| 638 | 638 | ||
| 639 | dprintk("enter %s\n", __func__); | 639 | dprintk("enter %s\n", __func__); |
| 640 | 640 | ||
| @@ -684,19 +684,19 @@ static int s5h1420_set_frontend(struct dvb_frontend* fe, | |||
| 684 | switch (state->fclk) { | 684 | switch (state->fclk) { |
| 685 | default: | 685 | default: |
| 686 | case 88000000: | 686 | case 88000000: |
| 687 | clock_settting = 80; | 687 | clock_setting = 80; |
| 688 | break; | 688 | break; |
| 689 | case 86000000: | 689 | case 86000000: |
| 690 | clock_settting = 78; | 690 | clock_setting = 78; |
| 691 | break; | 691 | break; |
| 692 | case 80000000: | 692 | case 80000000: |
| 693 | clock_settting = 72; | 693 | clock_setting = 72; |
| 694 | break; | 694 | break; |
| 695 | case 59000000: | 695 | case 59000000: |
| 696 | clock_settting = 51; | 696 | clock_setting = 51; |
| 697 | break; | 697 | break; |
| 698 | case 44000000: | 698 | case 44000000: |
| 699 | clock_settting = 36; | 699 | clock_setting = 36; |
| 700 | break; | 700 | break; |
| 701 | } | 701 | } |
| 702 | dprintk("pll01: %d, ToneFreq: %d\n", state->fclk/1000000 - 8, (state->fclk + (TONE_FREQ * 32) - 1) / (TONE_FREQ * 32)); | 702 | dprintk("pll01: %d, ToneFreq: %d\n", state->fclk/1000000 - 8, (state->fclk + (TONE_FREQ * 32) - 1) / (TONE_FREQ * 32)); |
diff --git a/drivers/media/dvb/frontends/tda18271c2dd.c b/drivers/media/dvb/frontends/tda18271c2dd.c new file mode 100644 index 000000000000..0384e8da4f5e --- /dev/null +++ b/drivers/media/dvb/frontends/tda18271c2dd.c | |||
| @@ -0,0 +1,1251 @@ | |||
| 1 | /* | ||
| 2 | * tda18271c2dd: Driver for the TDA18271C2 tuner | ||
| 3 | * | ||
| 4 | * Copyright (C) 2010 Digital Devices GmbH | ||
| 5 | * | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or | ||
| 8 | * modify it under the terms of the GNU General Public License | ||
| 9 | * version 2 only, as published by the Free Software Foundation. | ||
| 10 | * | ||
| 11 | * | ||
| 12 | * This program is distributed in the hope that it will be useful, | ||
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 15 | * GNU General Public License for more details. | ||
| 16 | * | ||
| 17 | * | ||
| 18 | * You should have received a copy of the GNU General Public License | ||
| 19 | * along with this program; if not, write to the Free Software | ||
| 20 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA | ||
| 21 | * 02110-1301, USA | ||
| 22 | * Or, point your browser to http://www.gnu.org/copyleft/gpl.html | ||
| 23 | */ | ||
| 24 | |||
| 25 | #include <linux/kernel.h> | ||
| 26 | #include <linux/module.h> | ||
| 27 | #include <linux/moduleparam.h> | ||
| 28 | #include <linux/init.h> | ||
| 29 | #include <linux/delay.h> | ||
| 30 | #include <linux/firmware.h> | ||
| 31 | #include <linux/i2c.h> | ||
| 32 | #include <linux/version.h> | ||
| 33 | #include <asm/div64.h> | ||
| 34 | |||
| 35 | #include "dvb_frontend.h" | ||
| 36 | |||
| 37 | struct SStandardParam { | ||
| 38 | s32 m_IFFrequency; | ||
| 39 | u32 m_BandWidth; | ||
| 40 | u8 m_EP3_4_0; | ||
| 41 | u8 m_EB22; | ||
| 42 | }; | ||
| 43 | |||
| 44 | struct SMap { | ||
| 45 | u32 m_Frequency; | ||
| 46 | u8 m_Param; | ||
| 47 | }; | ||
| 48 | |||
| 49 | struct SMapI { | ||
| 50 | u32 m_Frequency; | ||
| 51 | s32 m_Param; | ||
| 52 | }; | ||
| 53 | |||
| 54 | struct SMap2 { | ||
| 55 | u32 m_Frequency; | ||
| 56 | u8 m_Param1; | ||
| 57 | u8 m_Param2; | ||
| 58 | }; | ||
| 59 | |||
| 60 | struct SRFBandMap { | ||
| 61 | u32 m_RF_max; | ||
| 62 | u32 m_RF1_Default; | ||
| 63 | u32 m_RF2_Default; | ||
| 64 | u32 m_RF3_Default; | ||
| 65 | }; | ||
| 66 | |||
| 67 | enum ERegister { | ||
| 68 | ID = 0, | ||
| 69 | TM, | ||
| 70 | PL, | ||
| 71 | EP1, EP2, EP3, EP4, EP5, | ||
| 72 | CPD, CD1, CD2, CD3, | ||
| 73 | MPD, MD1, MD2, MD3, | ||
| 74 | EB1, EB2, EB3, EB4, EB5, EB6, EB7, EB8, EB9, EB10, | ||
| 75 | EB11, EB12, EB13, EB14, EB15, EB16, EB17, EB18, EB19, EB20, | ||
| 76 | EB21, EB22, EB23, | ||
| 77 | NUM_REGS | ||
| 78 | }; | ||
| 79 | |||
| 80 | struct tda_state { | ||
| 81 | struct i2c_adapter *i2c; | ||
| 82 | u8 adr; | ||
| 83 | |||
| 84 | u32 m_Frequency; | ||
| 85 | u32 IF; | ||
| 86 | |||
| 87 | u8 m_IFLevelAnalog; | ||
| 88 | u8 m_IFLevelDigital; | ||
| 89 | u8 m_IFLevelDVBC; | ||
| 90 | u8 m_IFLevelDVBT; | ||
| 91 | |||
| 92 | u8 m_EP4; | ||
| 93 | u8 m_EP3_Standby; | ||
| 94 | |||
| 95 | bool m_bMaster; | ||
| 96 | |||
| 97 | s32 m_SettlingTime; | ||
| 98 | |||
| 99 | u8 m_Regs[NUM_REGS]; | ||
| 100 | |||
| 101 | /* Tracking filter settings for band 0..6 */ | ||
| 102 | u32 m_RF1[7]; | ||
| 103 | s32 m_RF_A1[7]; | ||
| 104 | s32 m_RF_B1[7]; | ||
| 105 | u32 m_RF2[7]; | ||
| 106 | s32 m_RF_A2[7]; | ||
| 107 | s32 m_RF_B2[7]; | ||
| 108 | u32 m_RF3[7]; | ||
| 109 | |||
| 110 | u8 m_TMValue_RFCal; /* Calibration temperatur */ | ||
| 111 | |||
| 112 | bool m_bFMInput; /* true to use Pin 8 for FM Radio */ | ||
| 113 | |||
| 114 | }; | ||
| 115 | |||
| 116 | static int PowerScan(struct tda_state *state, | ||
| 117 | u8 RFBand, u32 RF_in, | ||
| 118 | u32 *pRF_Out, bool *pbcal); | ||
| 119 | |||
| 120 | static int i2c_readn(struct i2c_adapter *adapter, u8 adr, u8 *data, int len) | ||
| 121 | { | ||
| 122 | struct i2c_msg msgs[1] = {{.addr = adr, .flags = I2C_M_RD, | ||
| 123 | .buf = data, .len = len} }; | ||
| 124 | return (i2c_transfer(adapter, msgs, 1) == 1) ? 0 : -1; | ||
| 125 | } | ||
| 126 | |||
| 127 | static int i2c_write(struct i2c_adapter *adap, u8 adr, u8 *data, int len) | ||
| 128 | { | ||
| 129 | struct i2c_msg msg = {.addr = adr, .flags = 0, | ||
| 130 | .buf = data, .len = len}; | ||
| 131 | |||
| 132 | if (i2c_transfer(adap, &msg, 1) != 1) { | ||
| 133 | printk(KERN_ERR "tda18271c2dd: i2c write error at addr %i\n", adr); | ||
| 134 | return -1; | ||
| 135 | } | ||
| 136 | return 0; | ||
| 137 | } | ||
| 138 | |||
| 139 | static int WriteRegs(struct tda_state *state, | ||
| 140 | u8 SubAddr, u8 *Regs, u16 nRegs) | ||
| 141 | { | ||
| 142 | u8 data[nRegs+1]; | ||
| 143 | |||
| 144 | data[0] = SubAddr; | ||
| 145 | memcpy(data + 1, Regs, nRegs); | ||
| 146 | return i2c_write(state->i2c, state->adr, data, nRegs+1); | ||
| 147 | } | ||
| 148 | |||
| 149 | static int WriteReg(struct tda_state *state, u8 SubAddr, u8 Reg) | ||
| 150 | { | ||
| 151 | u8 msg[2] = {SubAddr, Reg}; | ||
| 152 | |||
| 153 | return i2c_write(state->i2c, state->adr, msg, 2); | ||
| 154 | } | ||
| 155 | |||
| 156 | static int Read(struct tda_state *state, u8 * Regs) | ||
| 157 | { | ||
| 158 | return i2c_readn(state->i2c, state->adr, Regs, 16); | ||
| 159 | } | ||
| 160 | |||
| 161 | static int ReadExtented(struct tda_state *state, u8 * Regs) | ||
| 162 | { | ||
| 163 | return i2c_readn(state->i2c, state->adr, Regs, NUM_REGS); | ||
| 164 | } | ||
| 165 | |||
| 166 | static int UpdateRegs(struct tda_state *state, u8 RegFrom, u8 RegTo) | ||
| 167 | { | ||
| 168 | return WriteRegs(state, RegFrom, | ||
| 169 | &state->m_Regs[RegFrom], RegTo-RegFrom+1); | ||
| 170 | } | ||
| 171 | static int UpdateReg(struct tda_state *state, u8 Reg) | ||
| 172 | { | ||
| 173 | return WriteReg(state, Reg, state->m_Regs[Reg]); | ||
| 174 | } | ||
| 175 | |||
| 176 | #include "tda18271c2dd_maps.h" | ||
| 177 | |||
| 178 | static void reset(struct tda_state *state) | ||
| 179 | { | ||
| 180 | u32 ulIFLevelAnalog = 0; | ||
| 181 | u32 ulIFLevelDigital = 2; | ||
| 182 | u32 ulIFLevelDVBC = 7; | ||
| 183 | u32 ulIFLevelDVBT = 6; | ||
| 184 | u32 ulXTOut = 0; | ||
| 185 | u32 ulStandbyMode = 0x06; /* Send in stdb, but leave osc on */ | ||
| 186 | u32 ulSlave = 0; | ||
| 187 | u32 ulFMInput = 0; | ||
| 188 | u32 ulSettlingTime = 100; | ||
| 189 | |||
| 190 | state->m_Frequency = 0; | ||
| 191 | state->m_SettlingTime = 100; | ||
| 192 | state->m_IFLevelAnalog = (ulIFLevelAnalog & 0x07) << 2; | ||
| 193 | state->m_IFLevelDigital = (ulIFLevelDigital & 0x07) << 2; | ||
| 194 | state->m_IFLevelDVBC = (ulIFLevelDVBC & 0x07) << 2; | ||
| 195 | state->m_IFLevelDVBT = (ulIFLevelDVBT & 0x07) << 2; | ||
| 196 | |||
| 197 | state->m_EP4 = 0x20; | ||
| 198 | if (ulXTOut != 0) | ||
| 199 | state->m_EP4 |= 0x40; | ||
| 200 | |||
| 201 | state->m_EP3_Standby = ((ulStandbyMode & 0x07) << 5) | 0x0F; | ||
| 202 | state->m_bMaster = (ulSlave == 0); | ||
| 203 | |||
| 204 | state->m_SettlingTime = ulSettlingTime; | ||
| 205 | |||
| 206 | state->m_bFMInput = (ulFMInput == 2); | ||
| 207 | } | ||
| 208 | |||
| 209 | static bool SearchMap1(struct SMap Map[], | ||
| 210 | u32 Frequency, u8 *pParam) | ||
| 211 | { | ||
| 212 | int i = 0; | ||
| 213 | |||
| 214 | while ((Map[i].m_Frequency != 0) && (Frequency > Map[i].m_Frequency)) | ||
| 215 | i += 1; | ||
| 216 | if (Map[i].m_Frequency == 0) | ||
| 217 | return false; | ||
| 218 | *pParam = Map[i].m_Param; | ||
| 219 | return true; | ||
| 220 | } | ||
| 221 | |||
| 222 | static bool SearchMap2(struct SMapI Map[], | ||
| 223 | u32 Frequency, s32 *pParam) | ||
| 224 | { | ||
| 225 | int i = 0; | ||
| 226 | |||
| 227 | while ((Map[i].m_Frequency != 0) && | ||
| 228 | (Frequency > Map[i].m_Frequency)) | ||
| 229 | i += 1; | ||
| 230 | if (Map[i].m_Frequency == 0) | ||
| 231 | return false; | ||
| 232 | *pParam = Map[i].m_Param; | ||
| 233 | return true; | ||
| 234 | } | ||
| 235 | |||
| 236 | static bool SearchMap3(struct SMap2 Map[], u32 Frequency, | ||
| 237 | u8 *pParam1, u8 *pParam2) | ||
| 238 | { | ||
| 239 | int i = 0; | ||
| 240 | |||
| 241 | while ((Map[i].m_Frequency != 0) && | ||
| 242 | (Frequency > Map[i].m_Frequency)) | ||
| 243 | i += 1; | ||
| 244 | if (Map[i].m_Frequency == 0) | ||
| 245 | return false; | ||
| 246 | *pParam1 = Map[i].m_Param1; | ||
| 247 | *pParam2 = Map[i].m_Param2; | ||
| 248 | return true; | ||
| 249 | } | ||
| 250 | |||
| 251 | static bool SearchMap4(struct SRFBandMap Map[], | ||
| 252 | u32 Frequency, u8 *pRFBand) | ||
| 253 | { | ||
| 254 | int i = 0; | ||
| 255 | |||
| 256 | while (i < 7 && (Frequency > Map[i].m_RF_max)) | ||
| 257 | i += 1; | ||
| 258 | if (i == 7) | ||
| 259 | return false; | ||
| 260 | *pRFBand = i; | ||
| 261 | return true; | ||
| 262 | } | ||
| 263 | |||
| 264 | static int ThermometerRead(struct tda_state *state, u8 *pTM_Value) | ||
| 265 | { | ||
| 266 | int status = 0; | ||
| 267 | |||
| 268 | do { | ||
| 269 | u8 Regs[16]; | ||
| 270 | state->m_Regs[TM] |= 0x10; | ||
| 271 | status = UpdateReg(state, TM); | ||
| 272 | if (status < 0) | ||
| 273 | break; | ||
| 274 | status = Read(state, Regs); | ||
| 275 | if (status < 0) | ||
| 276 | break; | ||
| 277 | if (((Regs[TM] & 0x0F) == 0 && (Regs[TM] & 0x20) == 0x20) || | ||
| 278 | ((Regs[TM] & 0x0F) == 8 && (Regs[TM] & 0x20) == 0x00)) { | ||
| 279 | state->m_Regs[TM] ^= 0x20; | ||
| 280 | status = UpdateReg(state, TM); | ||
| 281 | if (status < 0) | ||
| 282 | break; | ||
| 283 | msleep(10); | ||
| 284 | status = Read(state, Regs); | ||
| 285 | if (status < 0) | ||
| 286 | break; | ||
| 287 | } | ||
| 288 | *pTM_Value = (Regs[TM] & 0x20) | ||
| 289 | ? m_Thermometer_Map_2[Regs[TM] & 0x0F] | ||
| 290 | : m_Thermometer_Map_1[Regs[TM] & 0x0F] ; | ||
| 291 | state->m_Regs[TM] &= ~0x10; /* Thermometer off */ | ||
| 292 | status = UpdateReg(state, TM); | ||
| 293 | if (status < 0) | ||
| 294 | break; | ||
| 295 | state->m_Regs[EP4] &= ~0x03; /* CAL_mode = 0 ????????? */ | ||
| 296 | status = UpdateReg(state, EP4); | ||
| 297 | if (status < 0) | ||
| 298 | break; | ||
| 299 | } while (0); | ||
| 300 | |||
| 301 | return status; | ||
| 302 | } | ||
| 303 | |||
| 304 | static int StandBy(struct tda_state *state) | ||
| 305 | { | ||
| 306 | int status = 0; | ||
| 307 | do { | ||
| 308 | state->m_Regs[EB12] &= ~0x20; /* PD_AGC1_Det = 0 */ | ||
| 309 | status = UpdateReg(state, EB12); | ||
| 310 | if (status < 0) | ||
| 311 | break; | ||
| 312 | state->m_Regs[EB18] &= ~0x83; /* AGC1_loop_off = 0, AGC1_Gain = 6 dB */ | ||
| 313 | status = UpdateReg(state, EB18); | ||
| 314 | if (status < 0) | ||
| 315 | break; | ||
| 316 | state->m_Regs[EB21] |= 0x03; /* AGC2_Gain = -6 dB */ | ||
| 317 | state->m_Regs[EP3] = state->m_EP3_Standby; | ||
| 318 | status = UpdateReg(state, EP3); | ||
| 319 | if (status < 0) | ||
| 320 | break; | ||
| 321 | state->m_Regs[EB23] &= ~0x06; /* ForceLP_Fc2_En = 0, LP_Fc[2] = 0 */ | ||
| 322 | status = UpdateRegs(state, EB21, EB23); | ||
| 323 | if (status < 0) | ||
| 324 | break; | ||
| 325 | } while (0); | ||
| 326 | return status; | ||
| 327 | } | ||
| 328 | |||
| 329 | static int CalcMainPLL(struct tda_state *state, u32 freq) | ||
| 330 | { | ||
| 331 | |||
| 332 | u8 PostDiv; | ||
| 333 | u8 Div; | ||
| 334 | u64 OscFreq; | ||
| 335 | u32 MainDiv; | ||
| 336 | |||
| 337 | if (!SearchMap3(m_Main_PLL_Map, freq, &PostDiv, &Div)) | ||
| 338 | return -EINVAL; | ||
| 339 | |||
| 340 | OscFreq = (u64) freq * (u64) Div; | ||
| 341 | OscFreq *= (u64) 16384; | ||
| 342 | do_div(OscFreq, (u64)16000000); | ||
| 343 | MainDiv = OscFreq; | ||
| 344 | |||
| 345 | state->m_Regs[MPD] = PostDiv & 0x77; | ||
| 346 | state->m_Regs[MD1] = ((MainDiv >> 16) & 0x7F); | ||
| 347 | state->m_Regs[MD2] = ((MainDiv >> 8) & 0xFF); | ||
| 348 | state->m_Regs[MD3] = (MainDiv & 0xFF); | ||
| 349 | |||
| 350 | return UpdateRegs(state, MPD, MD3); | ||
| 351 | } | ||
| 352 | |||
| 353 | static int CalcCalPLL(struct tda_state *state, u32 freq) | ||
| 354 | { | ||
| 355 | u8 PostDiv; | ||
| 356 | u8 Div; | ||
| 357 | u64 OscFreq; | ||
| 358 | u32 CalDiv; | ||
| 359 | |||
| 360 | if (!SearchMap3(m_Cal_PLL_Map, freq, &PostDiv, &Div)) | ||
| 361 | return -EINVAL; | ||
| 362 | |||
| 363 | OscFreq = (u64)freq * (u64)Div; | ||
| 364 | /* CalDiv = u32( OscFreq * 16384 / 16000000 ); */ | ||
| 365 | OscFreq *= (u64)16384; | ||
| 366 | do_div(OscFreq, (u64)16000000); | ||
| 367 | CalDiv = OscFreq; | ||
| 368 | |||
| 369 | state->m_Regs[CPD] = PostDiv; | ||
| 370 | state->m_Regs[CD1] = ((CalDiv >> 16) & 0xFF); | ||
| 371 | state->m_Regs[CD2] = ((CalDiv >> 8) & 0xFF); | ||
| 372 | state->m_Regs[CD3] = (CalDiv & 0xFF); | ||
| 373 | |||
| 374 | return UpdateRegs(state, CPD, CD3); | ||
| 375 | } | ||
| 376 | |||
| 377 | static int CalibrateRF(struct tda_state *state, | ||
| 378 | u8 RFBand, u32 freq, s32 *pCprog) | ||
| 379 | { | ||
| 380 | int status = 0; | ||
| 381 | u8 Regs[NUM_REGS]; | ||
| 382 | do { | ||
| 383 | u8 BP_Filter = 0; | ||
| 384 | u8 GainTaper = 0; | ||
| 385 | u8 RFC_K = 0; | ||
| 386 | u8 RFC_M = 0; | ||
| 387 | |||
| 388 | state->m_Regs[EP4] &= ~0x03; /* CAL_mode = 0 */ | ||
| 389 | status = UpdateReg(state, EP4); | ||
| 390 | if (status < 0) | ||
| 391 | break; | ||
| 392 | state->m_Regs[EB18] |= 0x03; /* AGC1_Gain = 3 */ | ||
| 393 | status = UpdateReg(state, EB18); | ||
| 394 | if (status < 0) | ||
| 395 | break; | ||
| 396 | |||
| 397 | /* Switching off LT (as datasheet says) causes calibration on C1 to fail */ | ||
| 398 | /* (Readout of Cprog is allways 255) */ | ||
| 399 | if (state->m_Regs[ID] != 0x83) /* C1: ID == 83, C2: ID == 84 */ | ||
| 400 | state->m_Regs[EP3] |= 0x40; /* SM_LT = 1 */ | ||
| 401 | |||
| 402 | if (!(SearchMap1(m_BP_Filter_Map, freq, &BP_Filter) && | ||
| 403 | SearchMap1(m_GainTaper_Map, freq, &GainTaper) && | ||
| 404 | SearchMap3(m_KM_Map, freq, &RFC_K, &RFC_M))) | ||
| 405 | return -EINVAL; | ||
| 406 | |||
| 407 | state->m_Regs[EP1] = (state->m_Regs[EP1] & ~0x07) | BP_Filter; | ||
| 408 | state->m_Regs[EP2] = (RFBand << 5) | GainTaper; | ||
| 409 | |||
| 410 | state->m_Regs[EB13] = (state->m_Regs[EB13] & ~0x7C) | (RFC_K << 4) | (RFC_M << 2); | ||
| 411 | |||
| 412 | status = UpdateRegs(state, EP1, EP3); | ||
| 413 | if (status < 0) | ||
| 414 | break; | ||
| 415 | status = UpdateReg(state, EB13); | ||
| 416 | if (status < 0) | ||
| 417 | break; | ||
| 418 | |||
| 419 | state->m_Regs[EB4] |= 0x20; /* LO_ForceSrce = 1 */ | ||
| 420 | status = UpdateReg(state, EB4); | ||
| 421 | if (status < 0) | ||
| 422 | break; | ||
| 423 | |||
| 424 | state->m_Regs[EB7] |= 0x20; /* CAL_ForceSrce = 1 */ | ||
| 425 | status = UpdateReg(state, EB7); | ||
| 426 | if (status < 0) | ||
| 427 | break; | ||
| 428 | |||
| 429 | state->m_Regs[EB14] = 0; /* RFC_Cprog = 0 */ | ||
| 430 | status = UpdateReg(state, EB14); | ||
| 431 | if (status < 0) | ||
| 432 | break; | ||
| 433 | |||
| 434 | state->m_Regs[EB20] &= ~0x20; /* ForceLock = 0; */ | ||
| 435 | status = UpdateReg(state, EB20); | ||
| 436 | if (status < 0) | ||
| 437 | break; | ||
| 438 | |||
| 439 | state->m_Regs[EP4] |= 0x03; /* CAL_Mode = 3 */ | ||
| 440 | status = UpdateRegs(state, EP4, EP5); | ||
| 441 | if (status < 0) | ||
| 442 | break; | ||
| 443 | |||
| 444 | status = CalcCalPLL(state, freq); | ||
| 445 | if (status < 0) | ||
| 446 | break; | ||
| 447 | status = CalcMainPLL(state, freq + 1000000); | ||
| 448 | if (status < 0) | ||
| 449 | break; | ||
| 450 | |||
| 451 | msleep(5); | ||
| 452 | status = UpdateReg(state, EP2); | ||
| 453 | if (status < 0) | ||
| 454 | break; | ||
| 455 | status = UpdateReg(state, EP1); | ||
| 456 | if (status < 0) | ||
| 457 | break; | ||
| 458 | status = UpdateReg(state, EP2); | ||
| 459 | if (status < 0) | ||
| 460 | break; | ||
| 461 | status = UpdateReg(state, EP1); | ||
| 462 | if (status < 0) | ||
| 463 | break; | ||
| 464 | |||
| 465 | state->m_Regs[EB4] &= ~0x20; /* LO_ForceSrce = 0 */ | ||
| 466 | status = UpdateReg(state, EB4); | ||
| 467 | if (status < 0) | ||
| 468 | break; | ||
| 469 | |||
| 470 | state->m_Regs[EB7] &= ~0x20; /* CAL_ForceSrce = 0 */ | ||
| 471 | status = UpdateReg(state, EB7); | ||
| 472 | if (status < 0) | ||
| 473 | break; | ||
| 474 | msleep(10); | ||
| 475 | |||
| 476 | state->m_Regs[EB20] |= 0x20; /* ForceLock = 1; */ | ||
| 477 | status = UpdateReg(state, EB20); | ||
| 478 | if (status < 0) | ||
| 479 | break; | ||
| 480 | msleep(60); | ||
| 481 | |||
| 482 | state->m_Regs[EP4] &= ~0x03; /* CAL_Mode = 0 */ | ||
| 483 | state->m_Regs[EP3] &= ~0x40; /* SM_LT = 0 */ | ||
| 484 | state->m_Regs[EB18] &= ~0x03; /* AGC1_Gain = 0 */ | ||
| 485 | status = UpdateReg(state, EB18); | ||
| 486 | if (status < 0) | ||
| 487 | break; | ||
| 488 | status = UpdateRegs(state, EP3, EP4); | ||
| 489 | if (status < 0) | ||
| 490 | break; | ||
| 491 | status = UpdateReg(state, EP1); | ||
| 492 | if (status < 0) | ||
| 493 | break; | ||
| 494 | |||
| 495 | status = ReadExtented(state, Regs); | ||
| 496 | if (status < 0) | ||
| 497 | break; | ||
| 498 | |||
| 499 | *pCprog = Regs[EB14]; | ||
| 500 | |||
| 501 | } while (0); | ||
| 502 | return status; | ||
| 503 | } | ||
| 504 | |||
| 505 | static int RFTrackingFiltersInit(struct tda_state *state, | ||
| 506 | u8 RFBand) | ||
| 507 | { | ||
| 508 | int status = 0; | ||
| 509 | |||
| 510 | u32 RF1 = m_RF_Band_Map[RFBand].m_RF1_Default; | ||
| 511 | u32 RF2 = m_RF_Band_Map[RFBand].m_RF2_Default; | ||
| 512 | u32 RF3 = m_RF_Band_Map[RFBand].m_RF3_Default; | ||
| 513 | bool bcal = false; | ||
| 514 | |||
| 515 | s32 Cprog_cal1 = 0; | ||
| 516 | s32 Cprog_table1 = 0; | ||
| 517 | s32 Cprog_cal2 = 0; | ||
| 518 | s32 Cprog_table2 = 0; | ||
| 519 | s32 Cprog_cal3 = 0; | ||
| 520 | s32 Cprog_table3 = 0; | ||
| 521 | |||
| 522 | state->m_RF_A1[RFBand] = 0; | ||
| 523 | state->m_RF_B1[RFBand] = 0; | ||
| 524 | state->m_RF_A2[RFBand] = 0; | ||
| 525 | state->m_RF_B2[RFBand] = 0; | ||
| 526 | |||
| 527 | do { | ||
| 528 | status = PowerScan(state, RFBand, RF1, &RF1, &bcal); | ||
| 529 | if (status < 0) | ||
| 530 | break; | ||
| 531 | if (bcal) { | ||
| 532 | status = CalibrateRF(state, RFBand, RF1, &Cprog_cal1); | ||
| 533 | if (status < 0) | ||
| 534 | break; | ||
| 535 | } | ||
| 536 | SearchMap2(m_RF_Cal_Map, RF1, &Cprog_table1); | ||
| 537 | if (!bcal) | ||
| 538 | Cprog_cal1 = Cprog_table1; | ||
| 539 | state->m_RF_B1[RFBand] = Cprog_cal1 - Cprog_table1; | ||
| 540 | /* state->m_RF_A1[RF_Band] = ???? */ | ||
| 541 | |||
| 542 | if (RF2 == 0) | ||
| 543 | break; | ||
| 544 | |||
| 545 | status = PowerScan(state, RFBand, RF2, &RF2, &bcal); | ||
| 546 | if (status < 0) | ||
| 547 | break; | ||
| 548 | if (bcal) { | ||
| 549 | status = CalibrateRF(state, RFBand, RF2, &Cprog_cal2); | ||
| 550 | if (status < 0) | ||
| 551 | break; | ||
| 552 | } | ||
| 553 | SearchMap2(m_RF_Cal_Map, RF2, &Cprog_table2); | ||
| 554 | if (!bcal) | ||
| 555 | Cprog_cal2 = Cprog_table2; | ||
| 556 | |||
| 557 | state->m_RF_A1[RFBand] = | ||
| 558 | (Cprog_cal2 - Cprog_table2 - Cprog_cal1 + Cprog_table1) / | ||
| 559 | ((s32)(RF2) - (s32)(RF1)); | ||
| 560 | |||
| 561 | if (RF3 == 0) | ||
| 562 | break; | ||
| 563 | |||
| 564 | status = PowerScan(state, RFBand, RF3, &RF3, &bcal); | ||
| 565 | if (status < 0) | ||
| 566 | break; | ||
| 567 | if (bcal) { | ||
| 568 | status = CalibrateRF(state, RFBand, RF3, &Cprog_cal3); | ||
| 569 | if (status < 0) | ||
| 570 | break; | ||
| 571 | } | ||
| 572 | SearchMap2(m_RF_Cal_Map, RF3, &Cprog_table3); | ||
| 573 | if (!bcal) | ||
| 574 | Cprog_cal3 = Cprog_table3; | ||
| 575 | state->m_RF_A2[RFBand] = (Cprog_cal3 - Cprog_table3 - Cprog_cal2 + Cprog_table2) / ((s32)(RF3) - (s32)(RF2)); | ||
| 576 | state->m_RF_B2[RFBand] = Cprog_cal2 - Cprog_table2; | ||
| 577 | |||
| 578 | } while (0); | ||
| 579 | |||
| 580 | state->m_RF1[RFBand] = RF1; | ||
| 581 | state->m_RF2[RFBand] = RF2; | ||
| 582 | state->m_RF3[RFBand] = RF3; | ||
| 583 | |||
| 584 | #if 0 | ||
| 585 | printk(KERN_ERR "tda18271c2dd: %s %d RF1 = %d A1 = %d B1 = %d RF2 = %d A2 = %d B2 = %d RF3 = %d\n", __func__, | ||
| 586 | RFBand, RF1, state->m_RF_A1[RFBand], state->m_RF_B1[RFBand], RF2, | ||
| 587 | state->m_RF_A2[RFBand], state->m_RF_B2[RFBand], RF3); | ||
| 588 | #endif | ||
| 589 | |||
| 590 | return status; | ||
| 591 | } | ||
| 592 | |||
| 593 | static int PowerScan(struct tda_state *state, | ||
| 594 | u8 RFBand, u32 RF_in, u32 *pRF_Out, bool *pbcal) | ||
| 595 | { | ||
| 596 | int status = 0; | ||
| 597 | do { | ||
| 598 | u8 Gain_Taper = 0; | ||
| 599 | s32 RFC_Cprog = 0; | ||
| 600 | u8 CID_Target = 0; | ||
| 601 | u8 CountLimit = 0; | ||
| 602 | u32 freq_MainPLL; | ||
| 603 | u8 Regs[NUM_REGS]; | ||
| 604 | u8 CID_Gain; | ||
| 605 | s32 Count = 0; | ||
| 606 | int sign = 1; | ||
| 607 | bool wait = false; | ||
| 608 | |||
| 609 | if (!(SearchMap2(m_RF_Cal_Map, RF_in, &RFC_Cprog) && | ||
| 610 | SearchMap1(m_GainTaper_Map, RF_in, &Gain_Taper) && | ||
| 611 | SearchMap3(m_CID_Target_Map, RF_in, &CID_Target, &CountLimit))) { | ||
| 612 | |||
| 613 | printk(KERN_ERR "tda18271c2dd: %s Search map failed\n", __func__); | ||
| 614 | return -EINVAL; | ||
| 615 | } | ||
| 616 | |||
| 617 | state->m_Regs[EP2] = (RFBand << 5) | Gain_Taper; | ||
| 618 | state->m_Regs[EB14] = (RFC_Cprog); | ||
| 619 | status = UpdateReg(state, EP2); | ||
| 620 | if (status < 0) | ||
| 621 | break; | ||
| 622 | status = UpdateReg(state, EB14); | ||
| 623 | if (status < 0) | ||
| 624 | break; | ||
| 625 | |||
| 626 | freq_MainPLL = RF_in + 1000000; | ||
| 627 | status = CalcMainPLL(state, freq_MainPLL); | ||
| 628 | if (status < 0) | ||
| 629 | break; | ||
| 630 | msleep(5); | ||
| 631 | state->m_Regs[EP4] = (state->m_Regs[EP4] & ~0x03) | 1; /* CAL_mode = 1 */ | ||
| 632 | status = UpdateReg(state, EP4); | ||
| 633 | if (status < 0) | ||
| 634 | break; | ||
| 635 | status = UpdateReg(state, EP2); /* Launch power measurement */ | ||
| 636 | if (status < 0) | ||
| 637 | break; | ||
| 638 | status = ReadExtented(state, Regs); | ||
| 639 | if (status < 0) | ||
| 640 | break; | ||
| 641 | CID_Gain = Regs[EB10] & 0x3F; | ||
| 642 | state->m_Regs[ID] = Regs[ID]; /* Chip version, (needed for C1 workarround in CalibrateRF) */ | ||
| 643 | |||
| 644 | *pRF_Out = RF_in; | ||
| 645 | |||
| 646 | while (CID_Gain < CID_Target) { | ||
| 647 | freq_MainPLL = RF_in + sign * Count + 1000000; | ||
| 648 | status = CalcMainPLL(state, freq_MainPLL); | ||
| 649 | if (status < 0) | ||
| 650 | break; | ||
| 651 | msleep(wait ? 5 : 1); | ||
| 652 | wait = false; | ||
| 653 | status = UpdateReg(state, EP2); /* Launch power measurement */ | ||
| 654 | if (status < 0) | ||
| 655 | break; | ||
| 656 | status = ReadExtented(state, Regs); | ||
| 657 | if (status < 0) | ||
| 658 | break; | ||
| 659 | CID_Gain = Regs[EB10] & 0x3F; | ||
| 660 | Count += 200000; | ||
| 661 | |||
| 662 | if (Count < CountLimit * 100000) | ||
| 663 | continue; | ||
| 664 | if (sign < 0) | ||
| 665 | break; | ||
| 666 | |||
| 667 | sign = -sign; | ||
| 668 | Count = 200000; | ||
| 669 | wait = true; | ||
| 670 | } | ||
| 671 | status = status; | ||
| 672 | if (status < 0) | ||
| 673 | break; | ||
| 674 | if (CID_Gain >= CID_Target) { | ||
| 675 | *pbcal = true; | ||
| 676 | *pRF_Out = freq_MainPLL - 1000000; | ||
| 677 | } else | ||
| 678 | *pbcal = false; | ||
| 679 | } while (0); | ||
| 680 | |||
| 681 | return status; | ||
| 682 | } | ||
| 683 | |||
| 684 | static int PowerScanInit(struct tda_state *state) | ||
| 685 | { | ||
| 686 | int status = 0; | ||
| 687 | do { | ||
| 688 | state->m_Regs[EP3] = (state->m_Regs[EP3] & ~0x1F) | 0x12; | ||
| 689 | state->m_Regs[EP4] = (state->m_Regs[EP4] & ~0x1F); /* If level = 0, Cal mode = 0 */ | ||
| 690 | status = UpdateRegs(state, EP3, EP4); | ||
| 691 | if (status < 0) | ||
| 692 | break; | ||
| 693 | state->m_Regs[EB18] = (state->m_Regs[EB18] & ~0x03); /* AGC 1 Gain = 0 */ | ||
| 694 | status = UpdateReg(state, EB18); | ||
| 695 | if (status < 0) | ||
| 696 | break; | ||
| 697 | state->m_Regs[EB21] = (state->m_Regs[EB21] & ~0x03); /* AGC 2 Gain = 0 (Datasheet = 3) */ | ||
| 698 | state->m_Regs[EB23] = (state->m_Regs[EB23] | 0x06); /* ForceLP_Fc2_En = 1, LPFc[2] = 1 */ | ||
| 699 | status = UpdateRegs(state, EB21, EB23); | ||
| 700 | if (status < 0) | ||
| 701 | break; | ||
| 702 | } while (0); | ||
| 703 | return status; | ||
| 704 | } | ||
| 705 | |||
| 706 | static int CalcRFFilterCurve(struct tda_state *state) | ||
| 707 | { | ||
| 708 | int status = 0; | ||
| 709 | do { | ||
| 710 | msleep(200); /* Temperature stabilisation */ | ||
| 711 | status = PowerScanInit(state); | ||
| 712 | if (status < 0) | ||
| 713 | break; | ||
| 714 | status = RFTrackingFiltersInit(state, 0); | ||
| 715 | if (status < 0) | ||
| 716 | break; | ||
| 717 | status = RFTrackingFiltersInit(state, 1); | ||
| 718 | if (status < 0) | ||
| 719 | break; | ||
| 720 | status = RFTrackingFiltersInit(state, 2); | ||
| 721 | if (status < 0) | ||
| 722 | break; | ||
| 723 | status = RFTrackingFiltersInit(state, 3); | ||
| 724 | if (status < 0) | ||
| 725 | break; | ||
| 726 | status = RFTrackingFiltersInit(state, 4); | ||
| 727 | if (status < 0) | ||
| 728 | break; | ||
| 729 | status = RFTrackingFiltersInit(state, 5); | ||
| 730 | if (status < 0) | ||
| 731 | break; | ||
| 732 | status = RFTrackingFiltersInit(state, 6); | ||
| 733 | if (status < 0) | ||
| 734 | break; | ||
| 735 | status = ThermometerRead(state, &state->m_TMValue_RFCal); /* also switches off Cal mode !!! */ | ||
| 736 | if (status < 0) | ||
| 737 | break; | ||
| 738 | } while (0); | ||
| 739 | |||
| 740 | return status; | ||
| 741 | } | ||
| 742 | |||
| 743 | static int FixedContentsI2CUpdate(struct tda_state *state) | ||
| 744 | { | ||
| 745 | static u8 InitRegs[] = { | ||
| 746 | 0x08, 0x80, 0xC6, | ||
| 747 | 0xDF, 0x16, 0x60, 0x80, | ||
| 748 | 0x80, 0x00, 0x00, 0x00, | ||
| 749 | 0x00, 0x00, 0x00, 0x00, | ||
| 750 | 0xFC, 0x01, 0x84, 0x41, | ||
| 751 | 0x01, 0x84, 0x40, 0x07, | ||
| 752 | 0x00, 0x00, 0x96, 0x3F, | ||
| 753 | 0xC1, 0x00, 0x8F, 0x00, | ||
| 754 | 0x00, 0x8C, 0x00, 0x20, | ||
| 755 | 0xB3, 0x48, 0xB0, | ||
| 756 | }; | ||
| 757 | int status = 0; | ||
| 758 | memcpy(&state->m_Regs[TM], InitRegs, EB23 - TM + 1); | ||
| 759 | do { | ||
| 760 | status = UpdateRegs(state, TM, EB23); | ||
| 761 | if (status < 0) | ||
| 762 | break; | ||
| 763 | |||
| 764 | /* AGC1 gain setup */ | ||
| 765 | state->m_Regs[EB17] = 0x00; | ||
| 766 | status = UpdateReg(state, EB17); | ||
| 767 | if (status < 0) | ||
| 768 | break; | ||
| 769 | state->m_Regs[EB17] = 0x03; | ||
| 770 | status = UpdateReg(state, EB17); | ||
| 771 | if (status < 0) | ||
| 772 | break; | ||
| 773 | state->m_Regs[EB17] = 0x43; | ||
| 774 | status = UpdateReg(state, EB17); | ||
| 775 | if (status < 0) | ||
| 776 | break; | ||
| 777 | state->m_Regs[EB17] = 0x4C; | ||
| 778 | status = UpdateReg(state, EB17); | ||
| 779 | if (status < 0) | ||
| 780 | break; | ||
| 781 | |||
| 782 | /* IRC Cal Low band */ | ||
| 783 | state->m_Regs[EP3] = 0x1F; | ||
| 784 | state->m_Regs[EP4] = 0x66; | ||
| 785 | state->m_Regs[EP5] = 0x81; | ||
| 786 | state->m_Regs[CPD] = 0xCC; | ||
| 787 | state->m_Regs[CD1] = 0x6C; | ||
| 788 | state->m_Regs[CD2] = 0x00; | ||
| 789 | state->m_Regs[CD3] = 0x00; | ||
| 790 | state->m_Regs[MPD] = 0xC5; | ||
| 791 | state->m_Regs[MD1] = 0x77; | ||
| 792 | state->m_Regs[MD2] = 0x08; | ||
| 793 | state->m_Regs[MD3] = 0x00; | ||
| 794 | status = UpdateRegs(state, EP2, MD3); /* diff between sw and datasheet (ep3-md3) */ | ||
| 795 | if (status < 0) | ||
| 796 | break; | ||
| 797 | |||
| 798 | #if 0 | ||
| 799 | state->m_Regs[EB4] = 0x61; /* missing in sw */ | ||
| 800 | status = UpdateReg(state, EB4); | ||
| 801 | if (status < 0) | ||
| 802 | break; | ||
| 803 | msleep(1); | ||
| 804 | state->m_Regs[EB4] = 0x41; | ||
| 805 | status = UpdateReg(state, EB4); | ||
| 806 | if (status < 0) | ||
| 807 | break; | ||
| 808 | #endif | ||
| 809 | |||
| 810 | msleep(5); | ||
| 811 | status = UpdateReg(state, EP1); | ||
| 812 | if (status < 0) | ||
| 813 | break; | ||
| 814 | msleep(5); | ||
| 815 | |||
| 816 | state->m_Regs[EP5] = 0x85; | ||
| 817 | state->m_Regs[CPD] = 0xCB; | ||
| 818 | state->m_Regs[CD1] = 0x66; | ||
| 819 | state->m_Regs[CD2] = 0x70; | ||
| 820 | status = UpdateRegs(state, EP3, CD3); | ||
| 821 | if (status < 0) | ||
| 822 | break; | ||
| 823 | msleep(5); | ||
| 824 | status = UpdateReg(state, EP2); | ||
| 825 | if (status < 0) | ||
| 826 | break; | ||
| 827 | msleep(30); | ||
| 828 | |||
| 829 | /* IRC Cal mid band */ | ||
| 830 | state->m_Regs[EP5] = 0x82; | ||
| 831 | state->m_Regs[CPD] = 0xA8; | ||
| 832 | state->m_Regs[CD2] = 0x00; | ||
| 833 | state->m_Regs[MPD] = 0xA1; /* Datasheet = 0xA9 */ | ||
| 834 | state->m_Regs[MD1] = 0x73; | ||
| 835 | state->m_Regs[MD2] = 0x1A; | ||
| 836 | status = UpdateRegs(state, EP3, MD3); | ||
| 837 | if (status < 0) | ||
| 838 | break; | ||
| 839 | |||
| 840 | msleep(5); | ||
| 841 | status = UpdateReg(state, EP1); | ||
| 842 | if (status < 0) | ||
| 843 | break; | ||
| 844 | msleep(5); | ||
| 845 | |||
| 846 | state->m_Regs[EP5] = 0x86; | ||
| 847 | state->m_Regs[CPD] = 0xA8; | ||
| 848 | state->m_Regs[CD1] = 0x66; | ||
| 849 | state->m_Regs[CD2] = 0xA0; | ||
| 850 | status = UpdateRegs(state, EP3, CD3); | ||
| 851 | if (status < 0) | ||
| 852 | break; | ||
| 853 | msleep(5); | ||
| 854 | status = UpdateReg(state, EP2); | ||
| 855 | if (status < 0) | ||
| 856 | break; | ||
| 857 | msleep(30); | ||
| 858 | |||
| 859 | /* IRC Cal high band */ | ||
| 860 | state->m_Regs[EP5] = 0x83; | ||
| 861 | state->m_Regs[CPD] = 0x98; | ||
| 862 | state->m_Regs[CD1] = 0x65; | ||
| 863 | state->m_Regs[CD2] = 0x00; | ||
| 864 | state->m_Regs[MPD] = 0x91; /* Datasheet = 0x91 */ | ||
| 865 | state->m_Regs[MD1] = 0x71; | ||
| 866 | state->m_Regs[MD2] = 0xCD; | ||
| 867 | status = UpdateRegs(state, EP3, MD3); | ||
| 868 | if (status < 0) | ||
| 869 | break; | ||
| 870 | msleep(5); | ||
| 871 | status = UpdateReg(state, EP1); | ||
| 872 | if (status < 0) | ||
| 873 | break; | ||
| 874 | msleep(5); | ||
| 875 | state->m_Regs[EP5] = 0x87; | ||
| 876 | state->m_Regs[CD1] = 0x65; | ||
| 877 | state->m_Regs[CD2] = 0x50; | ||
| 878 | status = UpdateRegs(state, EP3, CD3); | ||
| 879 | if (status < 0) | ||
| 880 | break; | ||
| 881 | msleep(5); | ||
| 882 | status = UpdateReg(state, EP2); | ||
| 883 | if (status < 0) | ||
| 884 | break; | ||
| 885 | msleep(30); | ||
| 886 | |||
| 887 | /* Back to normal */ | ||
| 888 | state->m_Regs[EP4] = 0x64; | ||
| 889 | status = UpdateReg(state, EP4); | ||
| 890 | if (status < 0) | ||
| 891 | break; | ||
| 892 | status = UpdateReg(state, EP1); | ||
| 893 | if (status < 0) | ||
| 894 | break; | ||
| 895 | |||
| 896 | } while (0); | ||
| 897 | return status; | ||
| 898 | } | ||
| 899 | |||
| 900 | static int InitCal(struct tda_state *state) | ||
| 901 | { | ||
| 902 | int status = 0; | ||
| 903 | |||
| 904 | do { | ||
| 905 | status = FixedContentsI2CUpdate(state); | ||
| 906 | if (status < 0) | ||
| 907 | break; | ||
| 908 | status = CalcRFFilterCurve(state); | ||
| 909 | if (status < 0) | ||
| 910 | break; | ||
| 911 | status = StandBy(state); | ||
| 912 | if (status < 0) | ||
| 913 | break; | ||
| 914 | /* m_bInitDone = true; */ | ||
| 915 | } while (0); | ||
| 916 | return status; | ||
| 917 | }; | ||
| 918 | |||
| 919 | static int RFTrackingFiltersCorrection(struct tda_state *state, | ||
| 920 | u32 Frequency) | ||
| 921 | { | ||
| 922 | int status = 0; | ||
| 923 | s32 Cprog_table; | ||
| 924 | u8 RFBand; | ||
| 925 | u8 dCoverdT; | ||
| 926 | |||
| 927 | if (!SearchMap2(m_RF_Cal_Map, Frequency, &Cprog_table) || | ||
| 928 | !SearchMap4(m_RF_Band_Map, Frequency, &RFBand) || | ||
| 929 | !SearchMap1(m_RF_Cal_DC_Over_DT_Map, Frequency, &dCoverdT)) | ||
| 930 | |||
| 931 | return -EINVAL; | ||
| 932 | |||
| 933 | do { | ||
| 934 | u8 TMValue_Current; | ||
| 935 | u32 RF1 = state->m_RF1[RFBand]; | ||
| 936 | u32 RF2 = state->m_RF1[RFBand]; | ||
| 937 | u32 RF3 = state->m_RF1[RFBand]; | ||
| 938 | s32 RF_A1 = state->m_RF_A1[RFBand]; | ||
| 939 | s32 RF_B1 = state->m_RF_B1[RFBand]; | ||
| 940 | s32 RF_A2 = state->m_RF_A2[RFBand]; | ||
| 941 | s32 RF_B2 = state->m_RF_B2[RFBand]; | ||
| 942 | s32 Capprox = 0; | ||
| 943 | int TComp; | ||
| 944 | |||
| 945 | state->m_Regs[EP3] &= ~0xE0; /* Power up */ | ||
| 946 | status = UpdateReg(state, EP3); | ||
| 947 | if (status < 0) | ||
| 948 | break; | ||
| 949 | |||
| 950 | status = ThermometerRead(state, &TMValue_Current); | ||
| 951 | if (status < 0) | ||
| 952 | break; | ||
| 953 | |||
| 954 | if (RF3 == 0 || Frequency < RF2) | ||
| 955 | Capprox = RF_A1 * ((s32)(Frequency) - (s32)(RF1)) + RF_B1 + Cprog_table; | ||
| 956 | else | ||
| 957 | Capprox = RF_A2 * ((s32)(Frequency) - (s32)(RF2)) + RF_B2 + Cprog_table; | ||
| 958 | |||
| 959 | TComp = (int)(dCoverdT) * ((int)(TMValue_Current) - (int)(state->m_TMValue_RFCal))/1000; | ||
| 960 | |||
| 961 | Capprox += TComp; | ||
| 962 | |||
| 963 | if (Capprox < 0) | ||
| 964 | Capprox = 0; | ||
| 965 | else if (Capprox > 255) | ||
| 966 | Capprox = 255; | ||
| 967 | |||
| 968 | |||
| 969 | /* TODO Temperature compensation. There is defenitely a scale factor */ | ||
| 970 | /* missing in the datasheet, so leave it out for now. */ | ||
| 971 | state->m_Regs[EB14] = Capprox; | ||
| 972 | |||
| 973 | status = UpdateReg(state, EB14); | ||
| 974 | if (status < 0) | ||
| 975 | break; | ||
| 976 | |||
| 977 | } while (0); | ||
| 978 | return status; | ||
| 979 | } | ||
| 980 | |||
| 981 | static int ChannelConfiguration(struct tda_state *state, | ||
| 982 | u32 Frequency, int Standard) | ||
| 983 | { | ||
| 984 | |||
| 985 | s32 IntermediateFrequency = m_StandardTable[Standard].m_IFFrequency; | ||
| 986 | int status = 0; | ||
| 987 | |||
| 988 | u8 BP_Filter = 0; | ||
| 989 | u8 RF_Band = 0; | ||
| 990 | u8 GainTaper = 0; | ||
| 991 | u8 IR_Meas = 0; | ||
| 992 | |||
| 993 | state->IF = IntermediateFrequency; | ||
| 994 | /* printk("tda18271c2dd: %s Freq = %d Standard = %d IF = %d\n", __func__, Frequency, Standard, IntermediateFrequency); */ | ||
| 995 | /* get values from tables */ | ||
| 996 | |||
| 997 | if (!(SearchMap1(m_BP_Filter_Map, Frequency, &BP_Filter) && | ||
| 998 | SearchMap1(m_GainTaper_Map, Frequency, &GainTaper) && | ||
| 999 | SearchMap1(m_IR_Meas_Map, Frequency, &IR_Meas) && | ||
| 1000 | SearchMap4(m_RF_Band_Map, Frequency, &RF_Band))) { | ||
| 1001 | |||
| 1002 | printk(KERN_ERR "tda18271c2dd: %s SearchMap failed\n", __func__); | ||
| 1003 | return -EINVAL; | ||
| 1004 | } | ||
| 1005 | |||
| 1006 | do { | ||
| 1007 | state->m_Regs[EP3] = (state->m_Regs[EP3] & ~0x1F) | m_StandardTable[Standard].m_EP3_4_0; | ||
| 1008 | state->m_Regs[EP3] &= ~0x04; /* switch RFAGC to high speed mode */ | ||
| 1009 | |||
| 1010 | /* m_EP4 default for XToutOn, CAL_Mode (0) */ | ||
| 1011 | state->m_Regs[EP4] = state->m_EP4 | ((Standard > HF_AnalogMax) ? state->m_IFLevelDigital : state->m_IFLevelAnalog); | ||
| 1012 | /* state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelDigital; */ | ||
| 1013 | if (Standard <= HF_AnalogMax) | ||
| 1014 | state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelAnalog; | ||
| 1015 | else if (Standard <= HF_ATSC) | ||
| 1016 | state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelDVBT; | ||
| 1017 | else if (Standard <= HF_DVBC) | ||
| 1018 | state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelDVBC; | ||
| 1019 | else | ||
| 1020 | state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelDigital; | ||
| 1021 | |||
| 1022 | if ((Standard == HF_FM_Radio) && state->m_bFMInput) | ||
| 1023 | state->m_Regs[EP4] |= 80; | ||
| 1024 | |||
| 1025 | state->m_Regs[MPD] &= ~0x80; | ||
| 1026 | if (Standard > HF_AnalogMax) | ||
| 1027 | state->m_Regs[MPD] |= 0x80; /* Add IF_notch for digital */ | ||
| 1028 | |||
| 1029 | state->m_Regs[EB22] = m_StandardTable[Standard].m_EB22; | ||
| 1030 | |||
| 1031 | /* Note: This is missing from flowchart in TDA18271 specification ( 1.5 MHz cutoff for FM ) */ | ||
| 1032 | if (Standard == HF_FM_Radio) | ||
| 1033 | state->m_Regs[EB23] |= 0x06; /* ForceLP_Fc2_En = 1, LPFc[2] = 1 */ | ||
| 1034 | else | ||
| 1035 | state->m_Regs[EB23] &= ~0x06; /* ForceLP_Fc2_En = 0, LPFc[2] = 0 */ | ||
| 1036 | |||
| 1037 | status = UpdateRegs(state, EB22, EB23); | ||
| 1038 | if (status < 0) | ||
| 1039 | break; | ||
| 1040 | |||
| 1041 | state->m_Regs[EP1] = (state->m_Regs[EP1] & ~0x07) | 0x40 | BP_Filter; /* Dis_Power_level = 1, Filter */ | ||
| 1042 | state->m_Regs[EP5] = (state->m_Regs[EP5] & ~0x07) | IR_Meas; | ||
| 1043 | state->m_Regs[EP2] = (RF_Band << 5) | GainTaper; | ||
| 1044 | |||
| 1045 | state->m_Regs[EB1] = (state->m_Regs[EB1] & ~0x07) | | ||
| 1046 | (state->m_bMaster ? 0x04 : 0x00); /* CALVCO_FortLOn = MS */ | ||
| 1047 | /* AGC1_always_master = 0 */ | ||
| 1048 | /* AGC_firstn = 0 */ | ||
| 1049 | status = UpdateReg(state, EB1); | ||
| 1050 | if (status < 0) | ||
| 1051 | break; | ||
| 1052 | |||
| 1053 | if (state->m_bMaster) { | ||
| 1054 | status = CalcMainPLL(state, Frequency + IntermediateFrequency); | ||
| 1055 | if (status < 0) | ||
| 1056 | break; | ||
| 1057 | status = UpdateRegs(state, TM, EP5); | ||
| 1058 | if (status < 0) | ||
| 1059 | break; | ||
| 1060 | state->m_Regs[EB4] |= 0x20; /* LO_forceSrce = 1 */ | ||
| 1061 | status = UpdateReg(state, EB4); | ||
| 1062 | if (status < 0) | ||
| 1063 | break; | ||
| 1064 | msleep(1); | ||
| 1065 | state->m_Regs[EB4] &= ~0x20; /* LO_forceSrce = 0 */ | ||
| 1066 | status = UpdateReg(state, EB4); | ||
| 1067 | if (status < 0) | ||
| 1068 | break; | ||
| 1069 | } else { | ||
| 1070 | u8 PostDiv = 0; | ||
| 1071 | u8 Div; | ||
| 1072 | status = CalcCalPLL(state, Frequency + IntermediateFrequency); | ||
| 1073 | if (status < 0) | ||
| 1074 | break; | ||
| 1075 | |||
| 1076 | SearchMap3(m_Cal_PLL_Map, Frequency + IntermediateFrequency, &PostDiv, &Div); | ||
| 1077 | state->m_Regs[MPD] = (state->m_Regs[MPD] & ~0x7F) | (PostDiv & 0x77); | ||
| 1078 | status = UpdateReg(state, MPD); | ||
| 1079 | if (status < 0) | ||
| 1080 | break; | ||
| 1081 | status = UpdateRegs(state, TM, EP5); | ||
| 1082 | if (status < 0) | ||
| 1083 | break; | ||
| 1084 | |||
| 1085 | state->m_Regs[EB7] |= 0x20; /* CAL_forceSrce = 1 */ | ||
| 1086 | status = UpdateReg(state, EB7); | ||
| 1087 | if (status < 0) | ||
| 1088 | break; | ||
| 1089 | msleep(1); | ||
| 1090 | state->m_Regs[EB7] &= ~0x20; /* CAL_forceSrce = 0 */ | ||
| 1091 | status = UpdateReg(state, EB7); | ||
| 1092 | if (status < 0) | ||
| 1093 | break; | ||
| 1094 | } | ||
| 1095 | msleep(20); | ||
| 1096 | if (Standard != HF_FM_Radio) | ||
| 1097 | state->m_Regs[EP3] |= 0x04; /* RFAGC to normal mode */ | ||
| 1098 | status = UpdateReg(state, EP3); | ||
| 1099 | if (status < 0) | ||
| 1100 | break; | ||
| 1101 | |||
| 1102 | } while (0); | ||
| 1103 | return status; | ||
| 1104 | } | ||
| 1105 | |||
| 1106 | static int sleep(struct dvb_frontend *fe) | ||
| 1107 | { | ||
| 1108 | struct tda_state *state = fe->tuner_priv; | ||
| 1109 | |||
| 1110 | StandBy(state); | ||
| 1111 | return 0; | ||
| 1112 | } | ||
| 1113 | |||
| 1114 | static int init(struct dvb_frontend *fe) | ||
| 1115 | { | ||
| 1116 | return 0; | ||
| 1117 | } | ||
| 1118 | |||
| 1119 | static int release(struct dvb_frontend *fe) | ||
| 1120 | { | ||
| 1121 | kfree(fe->tuner_priv); | ||
| 1122 | fe->tuner_priv = NULL; | ||
| 1123 | return 0; | ||
| 1124 | } | ||
| 1125 | |||
| 1126 | /* | ||
| 1127 | * As defined on EN 300 429 Annex A and on ITU-T J.83 annex A, the DVB-C | ||
| 1128 | * roll-off factor is 0.15. | ||
| 1129 | * According with the specs, the amount of the needed bandwith is given by: | ||
| 1130 | * Bw = Symbol_rate * (1 + 0.15) | ||
| 1131 | * As such, the maximum symbol rate supported by 6 MHz is | ||
| 1132 | * max_symbol_rate = 6 MHz / 1.15 = 5217391 Bauds | ||
| 1133 | *NOTE: For ITU-T J.83 Annex C, the roll-off factor is 0.13. So: | ||
| 1134 | * max_symbol_rate = 6 MHz / 1.13 = 5309735 Baud | ||
| 1135 | * That means that an adjustment is needed for Japan, | ||
| 1136 | * but, as currently DRX-K is hardcoded to Annex A, let's stick | ||
| 1137 | * with 0.15 roll-off factor. | ||
| 1138 | */ | ||
| 1139 | #define MAX_SYMBOL_RATE_6MHz 5217391 | ||
| 1140 | |||
| 1141 | static int set_params(struct dvb_frontend *fe, | ||
| 1142 | struct dvb_frontend_parameters *params) | ||
| 1143 | { | ||
| 1144 | struct tda_state *state = fe->tuner_priv; | ||
| 1145 | int status = 0; | ||
| 1146 | int Standard; | ||
| 1147 | |||
| 1148 | state->m_Frequency = params->frequency; | ||
| 1149 | |||
| 1150 | if (fe->ops.info.type == FE_OFDM) | ||
| 1151 | switch (params->u.ofdm.bandwidth) { | ||
| 1152 | case BANDWIDTH_6_MHZ: | ||
| 1153 | Standard = HF_DVBT_6MHZ; | ||
| 1154 | break; | ||
| 1155 | case BANDWIDTH_7_MHZ: | ||
| 1156 | Standard = HF_DVBT_7MHZ; | ||
| 1157 | break; | ||
| 1158 | default: | ||
| 1159 | case BANDWIDTH_8_MHZ: | ||
| 1160 | Standard = HF_DVBT_8MHZ; | ||
| 1161 | break; | ||
| 1162 | } | ||
| 1163 | else if (fe->ops.info.type == FE_QAM) { | ||
| 1164 | if (params->u.qam.symbol_rate <= MAX_SYMBOL_RATE_6MHz) | ||
| 1165 | Standard = HF_DVBC_6MHZ; | ||
| 1166 | else | ||
| 1167 | Standard = HF_DVBC_8MHZ; | ||
| 1168 | } else | ||
| 1169 | return -EINVAL; | ||
| 1170 | do { | ||
| 1171 | status = RFTrackingFiltersCorrection(state, params->frequency); | ||
| 1172 | if (status < 0) | ||
| 1173 | break; | ||
| 1174 | status = ChannelConfiguration(state, params->frequency, Standard); | ||
| 1175 | if (status < 0) | ||
| 1176 | break; | ||
| 1177 | |||
| 1178 | msleep(state->m_SettlingTime); /* Allow AGC's to settle down */ | ||
| 1179 | } while (0); | ||
| 1180 | return status; | ||
| 1181 | } | ||
| 1182 | |||
| 1183 | #if 0 | ||
| 1184 | static int GetSignalStrength(s32 *pSignalStrength, u32 RFAgc, u32 IFAgc) | ||
| 1185 | { | ||
| 1186 | if (IFAgc < 500) { | ||
| 1187 | /* Scale this from 0 to 50000 */ | ||
| 1188 | *pSignalStrength = IFAgc * 100; | ||
| 1189 | } else { | ||
| 1190 | /* Scale range 500-1500 to 50000-80000 */ | ||
| 1191 | *pSignalStrength = 50000 + (IFAgc - 500) * 30; | ||
| 1192 | } | ||
| 1193 | |||
| 1194 | return 0; | ||
| 1195 | } | ||
| 1196 | #endif | ||
| 1197 | |||
| 1198 | static int get_frequency(struct dvb_frontend *fe, u32 *frequency) | ||
| 1199 | { | ||
| 1200 | struct tda_state *state = fe->tuner_priv; | ||
| 1201 | |||
| 1202 | *frequency = state->IF; | ||
| 1203 | return 0; | ||
| 1204 | } | ||
| 1205 | |||
| 1206 | static int get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth) | ||
| 1207 | { | ||
| 1208 | /* struct tda_state *state = fe->tuner_priv; */ | ||
| 1209 | /* *bandwidth = priv->bandwidth; */ | ||
| 1210 | return 0; | ||
| 1211 | } | ||
| 1212 | |||
| 1213 | |||
| 1214 | static struct dvb_tuner_ops tuner_ops = { | ||
| 1215 | .info = { | ||
| 1216 | .name = "NXP TDA18271C2D", | ||
| 1217 | .frequency_min = 47125000, | ||
| 1218 | .frequency_max = 865000000, | ||
| 1219 | .frequency_step = 62500 | ||
| 1220 | }, | ||
| 1221 | .init = init, | ||
| 1222 | .sleep = sleep, | ||
| 1223 | .set_params = set_params, | ||
| 1224 | .release = release, | ||
| 1225 | .get_frequency = get_frequency, | ||
| 1226 | .get_bandwidth = get_bandwidth, | ||
| 1227 | }; | ||
| 1228 | |||
| 1229 | struct dvb_frontend *tda18271c2dd_attach(struct dvb_frontend *fe, | ||
| 1230 | struct i2c_adapter *i2c, u8 adr) | ||
| 1231 | { | ||
| 1232 | struct tda_state *state; | ||
| 1233 | |||
| 1234 | state = kzalloc(sizeof(struct tda_state), GFP_KERNEL); | ||
| 1235 | if (!state) | ||
| 1236 | return NULL; | ||
| 1237 | |||
| 1238 | fe->tuner_priv = state; | ||
| 1239 | state->adr = adr; | ||
| 1240 | state->i2c = i2c; | ||
| 1241 | memcpy(&fe->ops.tuner_ops, &tuner_ops, sizeof(struct dvb_tuner_ops)); | ||
| 1242 | reset(state); | ||
| 1243 | InitCal(state); | ||
| 1244 | |||
| 1245 | return fe; | ||
| 1246 | } | ||
| 1247 | EXPORT_SYMBOL_GPL(tda18271c2dd_attach); | ||
| 1248 | |||
| 1249 | MODULE_DESCRIPTION("TDA18271C2 driver"); | ||
| 1250 | MODULE_AUTHOR("DD"); | ||
| 1251 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/media/dvb/frontends/tda18271c2dd.h b/drivers/media/dvb/frontends/tda18271c2dd.h new file mode 100644 index 000000000000..1389c74e12ce --- /dev/null +++ b/drivers/media/dvb/frontends/tda18271c2dd.h | |||
| @@ -0,0 +1,16 @@ | |||
| 1 | #ifndef _TDA18271C2DD_H_ | ||
| 2 | #define _TDA18271C2DD_H_ | ||
| 3 | #if defined(CONFIG_DVB_TDA18271C2DD) || (defined(CONFIG_DVB_TDA18271C2DD_MODULE) \ | ||
| 4 | && defined(MODULE)) | ||
| 5 | struct dvb_frontend *tda18271c2dd_attach(struct dvb_frontend *fe, | ||
| 6 | struct i2c_adapter *i2c, u8 adr); | ||
| 7 | #else | ||
| 8 | static inline struct dvb_frontend *tda18271c2dd_attach(struct dvb_frontend *fe, | ||
| 9 | struct i2c_adapter *i2c, u8 adr) | ||
| 10 | { | ||
| 11 | printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); | ||
| 12 | return NULL; | ||
| 13 | } | ||
| 14 | #endif | ||
| 15 | |||
| 16 | #endif | ||
diff --git a/drivers/media/dvb/frontends/tda18271c2dd_maps.h b/drivers/media/dvb/frontends/tda18271c2dd_maps.h new file mode 100644 index 000000000000..b87661b9df14 --- /dev/null +++ b/drivers/media/dvb/frontends/tda18271c2dd_maps.h | |||
| @@ -0,0 +1,814 @@ | |||
| 1 | enum HF_S { | ||
| 2 | HF_None = 0, HF_B, HF_DK, HF_G, HF_I, HF_L, HF_L1, HF_MN, HF_FM_Radio, | ||
| 3 | HF_AnalogMax, HF_DVBT_6MHZ, HF_DVBT_7MHZ, HF_DVBT_8MHZ, | ||
| 4 | HF_DVBT, HF_ATSC, HF_DVBC_6MHZ, HF_DVBC_7MHZ, | ||
| 5 | HF_DVBC_8MHZ, HF_DVBC | ||
| 6 | }; | ||
| 7 | |||
| 8 | struct SStandardParam m_StandardTable[] = { | ||
| 9 | { 0, 0, 0x00, 0x00 }, /* HF_None */ | ||
| 10 | { 6000000, 7000000, 0x1D, 0x2C }, /* HF_B, */ | ||
| 11 | { 6900000, 8000000, 0x1E, 0x2C }, /* HF_DK, */ | ||
| 12 | { 7100000, 8000000, 0x1E, 0x2C }, /* HF_G, */ | ||
| 13 | { 7250000, 8000000, 0x1E, 0x2C }, /* HF_I, */ | ||
| 14 | { 6900000, 8000000, 0x1E, 0x2C }, /* HF_L, */ | ||
| 15 | { 1250000, 8000000, 0x1E, 0x2C }, /* HF_L1, */ | ||
| 16 | { 5400000, 6000000, 0x1C, 0x2C }, /* HF_MN, */ | ||
| 17 | { 1250000, 500000, 0x18, 0x2C }, /* HF_FM_Radio, */ | ||
| 18 | { 0, 0, 0x00, 0x00 }, /* HF_AnalogMax (Unused) */ | ||
| 19 | { 3300000, 6000000, 0x1C, 0x58 }, /* HF_DVBT_6MHZ */ | ||
| 20 | { 3500000, 7000000, 0x1C, 0x37 }, /* HF_DVBT_7MHZ */ | ||
| 21 | { 4000000, 8000000, 0x1D, 0x37 }, /* HF_DVBT_8MHZ */ | ||
| 22 | { 0, 0, 0x00, 0x00 }, /* HF_DVBT (Unused) */ | ||
| 23 | { 5000000, 6000000, 0x1C, 0x37 }, /* HF_ATSC (center = 3.25 MHz) */ | ||
| 24 | { 4000000, 6000000, 0x1D, 0x58 }, /* HF_DVBC_6MHZ (Chicago) */ | ||
| 25 | { 4500000, 7000000, 0x1E, 0x37 }, /* HF_DVBC_7MHZ (not documented by NXP) */ | ||
| 26 | { 5000000, 8000000, 0x1F, 0x37 }, /* HF_DVBC_8MHZ */ | ||
| 27 | { 0, 0, 0x00, 0x00 }, /* HF_DVBC (Unused) */ | ||
| 28 | }; | ||
| 29 | |||
| 30 | struct SMap m_BP_Filter_Map[] = { | ||
| 31 | { 62000000, 0x00 }, | ||
| 32 | { 84000000, 0x01 }, | ||
| 33 | { 100000000, 0x02 }, | ||
| 34 | { 140000000, 0x03 }, | ||
| 35 | { 170000000, 0x04 }, | ||
| 36 | { 180000000, 0x05 }, | ||
| 37 | { 865000000, 0x06 }, | ||
| 38 | { 0, 0x00 }, /* Table End */ | ||
| 39 | }; | ||
| 40 | |||
| 41 | static struct SMapI m_RF_Cal_Map[] = { | ||
| 42 | { 41000000, 0x0F }, | ||
| 43 | { 43000000, 0x1C }, | ||
| 44 | { 45000000, 0x2F }, | ||
| 45 | { 46000000, 0x39 }, | ||
| 46 | { 47000000, 0x40 }, | ||
| 47 | { 47900000, 0x50 }, | ||
| 48 | { 49100000, 0x16 }, | ||
| 49 | { 50000000, 0x18 }, | ||
| 50 | { 51000000, 0x20 }, | ||
| 51 | { 53000000, 0x28 }, | ||
| 52 | { 55000000, 0x2B }, | ||
| 53 | { 56000000, 0x32 }, | ||
| 54 | { 57000000, 0x35 }, | ||
| 55 | { 58000000, 0x3E }, | ||
| 56 | { 59000000, 0x43 }, | ||
| 57 | { 60000000, 0x4E }, | ||
| 58 | { 61100000, 0x55 }, | ||
| 59 | { 63000000, 0x0F }, | ||
| 60 | { 64000000, 0x11 }, | ||
| 61 | { 65000000, 0x12 }, | ||
| 62 | { 66000000, 0x15 }, | ||
| 63 | { 67000000, 0x16 }, | ||
| 64 | { 68000000, 0x17 }, | ||
| 65 | { 70000000, 0x19 }, | ||
| 66 | { 71000000, 0x1C }, | ||
| 67 | { 72000000, 0x1D }, | ||
| 68 | { 73000000, 0x1F }, | ||
| 69 | { 74000000, 0x20 }, | ||
| 70 | { 75000000, 0x21 }, | ||
| 71 | { 76000000, 0x24 }, | ||
| 72 | { 77000000, 0x25 }, | ||
| 73 | { 78000000, 0x27 }, | ||
| 74 | { 80000000, 0x28 }, | ||
| 75 | { 81000000, 0x29 }, | ||
| 76 | { 82000000, 0x2D }, | ||
| 77 | { 83000000, 0x2E }, | ||
| 78 | { 84000000, 0x2F }, | ||
| 79 | { 85000000, 0x31 }, | ||
| 80 | { 86000000, 0x33 }, | ||
| 81 | { 87000000, 0x34 }, | ||
| 82 | { 88000000, 0x35 }, | ||
| 83 | { 89000000, 0x37 }, | ||
| 84 | { 90000000, 0x38 }, | ||
| 85 | { 91000000, 0x39 }, | ||
| 86 | { 93000000, 0x3C }, | ||
| 87 | { 94000000, 0x3E }, | ||
| 88 | { 95000000, 0x3F }, | ||
| 89 | { 96000000, 0x40 }, | ||
| 90 | { 97000000, 0x42 }, | ||
| 91 | { 99000000, 0x45 }, | ||
| 92 | { 100000000, 0x46 }, | ||
| 93 | { 102000000, 0x48 }, | ||
| 94 | { 103000000, 0x4A }, | ||
| 95 | { 105000000, 0x4D }, | ||
| 96 | { 106000000, 0x4E }, | ||
| 97 | { 107000000, 0x50 }, | ||
| 98 | { 108000000, 0x51 }, | ||
| 99 | { 110000000, 0x54 }, | ||
| 100 | { 111000000, 0x56 }, | ||
| 101 | { 112000000, 0x57 }, | ||
| 102 | { 113000000, 0x58 }, | ||
| 103 | { 114000000, 0x59 }, | ||
| 104 | { 115000000, 0x5C }, | ||
| 105 | { 116000000, 0x5D }, | ||
| 106 | { 117000000, 0x5F }, | ||
| 107 | { 119000000, 0x60 }, | ||
| 108 | { 120000000, 0x64 }, | ||
| 109 | { 121000000, 0x65 }, | ||
| 110 | { 122000000, 0x66 }, | ||
| 111 | { 123000000, 0x68 }, | ||
| 112 | { 124000000, 0x69 }, | ||
| 113 | { 125000000, 0x6C }, | ||
| 114 | { 126000000, 0x6D }, | ||
| 115 | { 127000000, 0x6E }, | ||
| 116 | { 128000000, 0x70 }, | ||
| 117 | { 129000000, 0x71 }, | ||
| 118 | { 130000000, 0x75 }, | ||
| 119 | { 131000000, 0x77 }, | ||
| 120 | { 132000000, 0x78 }, | ||
| 121 | { 133000000, 0x7B }, | ||
| 122 | { 134000000, 0x7E }, | ||
| 123 | { 135000000, 0x81 }, | ||
| 124 | { 136000000, 0x82 }, | ||
| 125 | { 137000000, 0x87 }, | ||
| 126 | { 138000000, 0x88 }, | ||
| 127 | { 139000000, 0x8D }, | ||
| 128 | { 140000000, 0x8E }, | ||
| 129 | { 141000000, 0x91 }, | ||
| 130 | { 142000000, 0x95 }, | ||
| 131 | { 143000000, 0x9A }, | ||
| 132 | { 144000000, 0x9D }, | ||
| 133 | { 145000000, 0xA1 }, | ||
| 134 | { 146000000, 0xA2 }, | ||
| 135 | { 147000000, 0xA4 }, | ||
| 136 | { 148000000, 0xA9 }, | ||
| 137 | { 149000000, 0xAE }, | ||
| 138 | { 150000000, 0xB0 }, | ||
| 139 | { 151000000, 0xB1 }, | ||
| 140 | { 152000000, 0xB7 }, | ||
| 141 | { 152600000, 0xBD }, | ||
| 142 | { 154000000, 0x20 }, | ||
| 143 | { 155000000, 0x22 }, | ||
| 144 | { 156000000, 0x24 }, | ||
| 145 | { 157000000, 0x25 }, | ||
| 146 | { 158000000, 0x27 }, | ||
| 147 | { 159000000, 0x29 }, | ||
| 148 | { 160000000, 0x2C }, | ||
| 149 | { 161000000, 0x2D }, | ||
| 150 | { 163000000, 0x2E }, | ||
| 151 | { 164000000, 0x2F }, | ||
| 152 | { 164700000, 0x30 }, | ||
| 153 | { 166000000, 0x11 }, | ||
| 154 | { 167000000, 0x12 }, | ||
| 155 | { 168000000, 0x13 }, | ||
| 156 | { 169000000, 0x14 }, | ||
| 157 | { 170000000, 0x15 }, | ||
| 158 | { 172000000, 0x16 }, | ||
| 159 | { 173000000, 0x17 }, | ||
| 160 | { 174000000, 0x18 }, | ||
| 161 | { 175000000, 0x1A }, | ||
| 162 | { 176000000, 0x1B }, | ||
| 163 | { 178000000, 0x1D }, | ||
| 164 | { 179000000, 0x1E }, | ||
| 165 | { 180000000, 0x1F }, | ||
| 166 | { 181000000, 0x20 }, | ||
| 167 | { 182000000, 0x21 }, | ||
| 168 | { 183000000, 0x22 }, | ||
| 169 | { 184000000, 0x24 }, | ||
| 170 | { 185000000, 0x25 }, | ||
| 171 | { 186000000, 0x26 }, | ||
| 172 | { 187000000, 0x27 }, | ||
| 173 | { 188000000, 0x29 }, | ||
| 174 | { 189000000, 0x2A }, | ||
| 175 | { 190000000, 0x2C }, | ||
| 176 | { 191000000, 0x2D }, | ||
| 177 | { 192000000, 0x2E }, | ||
| 178 | { 193000000, 0x2F }, | ||
| 179 | { 194000000, 0x30 }, | ||
| 180 | { 195000000, 0x33 }, | ||
| 181 | { 196000000, 0x35 }, | ||
| 182 | { 198000000, 0x36 }, | ||
| 183 | { 200000000, 0x38 }, | ||
| 184 | { 201000000, 0x3C }, | ||
| 185 | { 202000000, 0x3D }, | ||
| 186 | { 203500000, 0x3E }, | ||
| 187 | { 206000000, 0x0E }, | ||
| 188 | { 208000000, 0x0F }, | ||
| 189 | { 212000000, 0x10 }, | ||
| 190 | { 216000000, 0x11 }, | ||
| 191 | { 217000000, 0x12 }, | ||
| 192 | { 218000000, 0x13 }, | ||
| 193 | { 220000000, 0x14 }, | ||
| 194 | { 222000000, 0x15 }, | ||
| 195 | { 225000000, 0x16 }, | ||
| 196 | { 228000000, 0x17 }, | ||
| 197 | { 231000000, 0x18 }, | ||
| 198 | { 234000000, 0x19 }, | ||
| 199 | { 235000000, 0x1A }, | ||
| 200 | { 236000000, 0x1B }, | ||
| 201 | { 237000000, 0x1C }, | ||
| 202 | { 240000000, 0x1D }, | ||
| 203 | { 242000000, 0x1E }, | ||
| 204 | { 244000000, 0x1F }, | ||
| 205 | { 247000000, 0x20 }, | ||
| 206 | { 249000000, 0x21 }, | ||
| 207 | { 252000000, 0x22 }, | ||
| 208 | { 253000000, 0x23 }, | ||
| 209 | { 254000000, 0x24 }, | ||
| 210 | { 256000000, 0x25 }, | ||
| 211 | { 259000000, 0x26 }, | ||
| 212 | { 262000000, 0x27 }, | ||
| 213 | { 264000000, 0x28 }, | ||
| 214 | { 267000000, 0x29 }, | ||
| 215 | { 269000000, 0x2A }, | ||
| 216 | { 271000000, 0x2B }, | ||
| 217 | { 273000000, 0x2C }, | ||
| 218 | { 275000000, 0x2D }, | ||
| 219 | { 277000000, 0x2E }, | ||
| 220 | { 279000000, 0x2F }, | ||
| 221 | { 282000000, 0x30 }, | ||
| 222 | { 284000000, 0x31 }, | ||
| 223 | { 286000000, 0x32 }, | ||
| 224 | { 287000000, 0x33 }, | ||
| 225 | { 290000000, 0x34 }, | ||
| 226 | { 293000000, 0x35 }, | ||
| 227 | { 295000000, 0x36 }, | ||
| 228 | { 297000000, 0x37 }, | ||
| 229 | { 300000000, 0x38 }, | ||
| 230 | { 303000000, 0x39 }, | ||
| 231 | { 305000000, 0x3A }, | ||
| 232 | { 306000000, 0x3B }, | ||
| 233 | { 307000000, 0x3C }, | ||
| 234 | { 310000000, 0x3D }, | ||
| 235 | { 312000000, 0x3E }, | ||
| 236 | { 315000000, 0x3F }, | ||
| 237 | { 318000000, 0x40 }, | ||
| 238 | { 320000000, 0x41 }, | ||
| 239 | { 323000000, 0x42 }, | ||
| 240 | { 324000000, 0x43 }, | ||
| 241 | { 325000000, 0x44 }, | ||
| 242 | { 327000000, 0x45 }, | ||
| 243 | { 331000000, 0x46 }, | ||
| 244 | { 334000000, 0x47 }, | ||
| 245 | { 337000000, 0x48 }, | ||
| 246 | { 339000000, 0x49 }, | ||
| 247 | { 340000000, 0x4A }, | ||
| 248 | { 341000000, 0x4B }, | ||
| 249 | { 343000000, 0x4C }, | ||
| 250 | { 345000000, 0x4D }, | ||
| 251 | { 349000000, 0x4E }, | ||
| 252 | { 352000000, 0x4F }, | ||
| 253 | { 353000000, 0x50 }, | ||
| 254 | { 355000000, 0x51 }, | ||
| 255 | { 357000000, 0x52 }, | ||
| 256 | { 359000000, 0x53 }, | ||
| 257 | { 361000000, 0x54 }, | ||
| 258 | { 362000000, 0x55 }, | ||
| 259 | { 364000000, 0x56 }, | ||
| 260 | { 368000000, 0x57 }, | ||
| 261 | { 370000000, 0x58 }, | ||
| 262 | { 372000000, 0x59 }, | ||
| 263 | { 375000000, 0x5A }, | ||
| 264 | { 376000000, 0x5B }, | ||
| 265 | { 377000000, 0x5C }, | ||
| 266 | { 379000000, 0x5D }, | ||
| 267 | { 382000000, 0x5E }, | ||
| 268 | { 384000000, 0x5F }, | ||
| 269 | { 385000000, 0x60 }, | ||
| 270 | { 386000000, 0x61 }, | ||
| 271 | { 388000000, 0x62 }, | ||
| 272 | { 390000000, 0x63 }, | ||
| 273 | { 393000000, 0x64 }, | ||
| 274 | { 394000000, 0x65 }, | ||
| 275 | { 396000000, 0x66 }, | ||
| 276 | { 397000000, 0x67 }, | ||
| 277 | { 398000000, 0x68 }, | ||
| 278 | { 400000000, 0x69 }, | ||
| 279 | { 402000000, 0x6A }, | ||
| 280 | { 403000000, 0x6B }, | ||
| 281 | { 407000000, 0x6C }, | ||
| 282 | { 408000000, 0x6D }, | ||
| 283 | { 409000000, 0x6E }, | ||
| 284 | { 410000000, 0x6F }, | ||
| 285 | { 411000000, 0x70 }, | ||
| 286 | { 412000000, 0x71 }, | ||
| 287 | { 413000000, 0x72 }, | ||
| 288 | { 414000000, 0x73 }, | ||
| 289 | { 417000000, 0x74 }, | ||
| 290 | { 418000000, 0x75 }, | ||
| 291 | { 420000000, 0x76 }, | ||
| 292 | { 422000000, 0x77 }, | ||
| 293 | { 423000000, 0x78 }, | ||
| 294 | { 424000000, 0x79 }, | ||
| 295 | { 427000000, 0x7A }, | ||
| 296 | { 428000000, 0x7B }, | ||
| 297 | { 429000000, 0x7D }, | ||
| 298 | { 432000000, 0x7F }, | ||
| 299 | { 434000000, 0x80 }, | ||
| 300 | { 435000000, 0x81 }, | ||
| 301 | { 436000000, 0x83 }, | ||
| 302 | { 437000000, 0x84 }, | ||
| 303 | { 438000000, 0x85 }, | ||
| 304 | { 439000000, 0x86 }, | ||
| 305 | { 440000000, 0x87 }, | ||
| 306 | { 441000000, 0x88 }, | ||
| 307 | { 442000000, 0x89 }, | ||
| 308 | { 445000000, 0x8A }, | ||
| 309 | { 446000000, 0x8B }, | ||
| 310 | { 447000000, 0x8C }, | ||
| 311 | { 448000000, 0x8E }, | ||
| 312 | { 449000000, 0x8F }, | ||
| 313 | { 450000000, 0x90 }, | ||
| 314 | { 452000000, 0x91 }, | ||
| 315 | { 453000000, 0x93 }, | ||
| 316 | { 454000000, 0x94 }, | ||
| 317 | { 456000000, 0x96 }, | ||
| 318 | { 457800000, 0x98 }, | ||
| 319 | { 461000000, 0x11 }, | ||
| 320 | { 468000000, 0x12 }, | ||
| 321 | { 472000000, 0x13 }, | ||
| 322 | { 473000000, 0x14 }, | ||
| 323 | { 474000000, 0x15 }, | ||
| 324 | { 481000000, 0x16 }, | ||
| 325 | { 486000000, 0x17 }, | ||
| 326 | { 491000000, 0x18 }, | ||
| 327 | { 498000000, 0x19 }, | ||
| 328 | { 499000000, 0x1A }, | ||
| 329 | { 501000000, 0x1B }, | ||
| 330 | { 506000000, 0x1C }, | ||
| 331 | { 511000000, 0x1D }, | ||
| 332 | { 516000000, 0x1E }, | ||
| 333 | { 520000000, 0x1F }, | ||
| 334 | { 521000000, 0x20 }, | ||
| 335 | { 525000000, 0x21 }, | ||
| 336 | { 529000000, 0x22 }, | ||
| 337 | { 533000000, 0x23 }, | ||
| 338 | { 539000000, 0x24 }, | ||
| 339 | { 541000000, 0x25 }, | ||
| 340 | { 547000000, 0x26 }, | ||
| 341 | { 549000000, 0x27 }, | ||
| 342 | { 551000000, 0x28 }, | ||
| 343 | { 556000000, 0x29 }, | ||
| 344 | { 561000000, 0x2A }, | ||
| 345 | { 563000000, 0x2B }, | ||
| 346 | { 565000000, 0x2C }, | ||
| 347 | { 569000000, 0x2D }, | ||
| 348 | { 571000000, 0x2E }, | ||
| 349 | { 577000000, 0x2F }, | ||
| 350 | { 580000000, 0x30 }, | ||
| 351 | { 582000000, 0x31 }, | ||
| 352 | { 584000000, 0x32 }, | ||
| 353 | { 588000000, 0x33 }, | ||
| 354 | { 591000000, 0x34 }, | ||
| 355 | { 596000000, 0x35 }, | ||
| 356 | { 598000000, 0x36 }, | ||
| 357 | { 603000000, 0x37 }, | ||
| 358 | { 604000000, 0x38 }, | ||
| 359 | { 606000000, 0x39 }, | ||
| 360 | { 612000000, 0x3A }, | ||
| 361 | { 615000000, 0x3B }, | ||
| 362 | { 617000000, 0x3C }, | ||
| 363 | { 621000000, 0x3D }, | ||
| 364 | { 622000000, 0x3E }, | ||
| 365 | { 625000000, 0x3F }, | ||
| 366 | { 632000000, 0x40 }, | ||
| 367 | { 633000000, 0x41 }, | ||
| 368 | { 634000000, 0x42 }, | ||
| 369 | { 642000000, 0x43 }, | ||
| 370 | { 643000000, 0x44 }, | ||
| 371 | { 647000000, 0x45 }, | ||
| 372 | { 650000000, 0x46 }, | ||
| 373 | { 652000000, 0x47 }, | ||
| 374 | { 657000000, 0x48 }, | ||
| 375 | { 661000000, 0x49 }, | ||
| 376 | { 662000000, 0x4A }, | ||
| 377 | { 665000000, 0x4B }, | ||
| 378 | { 667000000, 0x4C }, | ||
| 379 | { 670000000, 0x4D }, | ||
| 380 | { 673000000, 0x4E }, | ||
| 381 | { 676000000, 0x4F }, | ||
| 382 | { 677000000, 0x50 }, | ||
| 383 | { 681000000, 0x51 }, | ||
| 384 | { 683000000, 0x52 }, | ||
| 385 | { 686000000, 0x53 }, | ||
| 386 | { 688000000, 0x54 }, | ||
| 387 | { 689000000, 0x55 }, | ||
| 388 | { 691000000, 0x56 }, | ||
| 389 | { 695000000, 0x57 }, | ||
| 390 | { 698000000, 0x58 }, | ||
| 391 | { 703000000, 0x59 }, | ||
| 392 | { 704000000, 0x5A }, | ||
| 393 | { 705000000, 0x5B }, | ||
| 394 | { 707000000, 0x5C }, | ||
| 395 | { 710000000, 0x5D }, | ||
| 396 | { 712000000, 0x5E }, | ||
| 397 | { 717000000, 0x5F }, | ||
| 398 | { 718000000, 0x60 }, | ||
| 399 | { 721000000, 0x61 }, | ||
| 400 | { 722000000, 0x62 }, | ||
| 401 | { 723000000, 0x63 }, | ||
| 402 | { 725000000, 0x64 }, | ||
| 403 | { 727000000, 0x65 }, | ||
| 404 | { 730000000, 0x66 }, | ||
| 405 | { 732000000, 0x67 }, | ||
| 406 | { 735000000, 0x68 }, | ||
| 407 | { 740000000, 0x69 }, | ||
| 408 | { 741000000, 0x6A }, | ||
| 409 | { 742000000, 0x6B }, | ||
| 410 | { 743000000, 0x6C }, | ||
| 411 | { 745000000, 0x6D }, | ||
| 412 | { 747000000, 0x6E }, | ||
| 413 | { 748000000, 0x6F }, | ||
| 414 | { 750000000, 0x70 }, | ||
| 415 | { 752000000, 0x71 }, | ||
| 416 | { 754000000, 0x72 }, | ||
| 417 | { 757000000, 0x73 }, | ||
| 418 | { 758000000, 0x74 }, | ||
| 419 | { 760000000, 0x75 }, | ||
| 420 | { 763000000, 0x76 }, | ||
| 421 | { 764000000, 0x77 }, | ||
| 422 | { 766000000, 0x78 }, | ||
| 423 | { 767000000, 0x79 }, | ||
| 424 | { 768000000, 0x7A }, | ||
| 425 | { 773000000, 0x7B }, | ||
| 426 | { 774000000, 0x7C }, | ||
| 427 | { 776000000, 0x7D }, | ||
| 428 | { 777000000, 0x7E }, | ||
| 429 | { 778000000, 0x7F }, | ||
| 430 | { 779000000, 0x80 }, | ||
| 431 | { 781000000, 0x81 }, | ||
| 432 | { 783000000, 0x82 }, | ||
| 433 | { 784000000, 0x83 }, | ||
| 434 | { 785000000, 0x84 }, | ||
| 435 | { 786000000, 0x85 }, | ||
| 436 | { 793000000, 0x86 }, | ||
| 437 | { 794000000, 0x87 }, | ||
| 438 | { 795000000, 0x88 }, | ||
| 439 | { 797000000, 0x89 }, | ||
| 440 | { 799000000, 0x8A }, | ||
| 441 | { 801000000, 0x8B }, | ||
| 442 | { 802000000, 0x8C }, | ||
| 443 | { 803000000, 0x8D }, | ||
| 444 | { 804000000, 0x8E }, | ||
| 445 | { 810000000, 0x90 }, | ||
| 446 | { 811000000, 0x91 }, | ||
| 447 | { 812000000, 0x92 }, | ||
| 448 | { 814000000, 0x93 }, | ||
| 449 | { 816000000, 0x94 }, | ||
| 450 | { 817000000, 0x96 }, | ||
| 451 | { 818000000, 0x97 }, | ||
| 452 | { 820000000, 0x98 }, | ||
| 453 | { 821000000, 0x99 }, | ||
| 454 | { 822000000, 0x9A }, | ||
| 455 | { 828000000, 0x9B }, | ||
| 456 | { 829000000, 0x9D }, | ||
| 457 | { 830000000, 0x9F }, | ||
| 458 | { 831000000, 0xA0 }, | ||
| 459 | { 833000000, 0xA1 }, | ||
| 460 | { 835000000, 0xA2 }, | ||
| 461 | { 836000000, 0xA3 }, | ||
| 462 | { 837000000, 0xA4 }, | ||
| 463 | { 838000000, 0xA6 }, | ||
| 464 | { 840000000, 0xA8 }, | ||
| 465 | { 842000000, 0xA9 }, | ||
| 466 | { 845000000, 0xAA }, | ||
| 467 | { 846000000, 0xAB }, | ||
| 468 | { 847000000, 0xAD }, | ||
| 469 | { 848000000, 0xAE }, | ||
| 470 | { 852000000, 0xAF }, | ||
| 471 | { 853000000, 0xB0 }, | ||
| 472 | { 858000000, 0xB1 }, | ||
| 473 | { 860000000, 0xB2 }, | ||
| 474 | { 861000000, 0xB3 }, | ||
| 475 | { 862000000, 0xB4 }, | ||
| 476 | { 863000000, 0xB6 }, | ||
| 477 | { 864000000, 0xB8 }, | ||
| 478 | { 865000000, 0xB9 }, | ||
| 479 | { 0, 0x00 }, /* Table End */ | ||
| 480 | }; | ||
| 481 | |||
| 482 | |||
| 483 | static struct SMap2 m_KM_Map[] = { | ||
| 484 | { 47900000, 3, 2 }, | ||
| 485 | { 61100000, 3, 1 }, | ||
| 486 | { 350000000, 3, 0 }, | ||
| 487 | { 720000000, 2, 1 }, | ||
| 488 | { 865000000, 3, 3 }, | ||
| 489 | { 0, 0x00 }, /* Table End */ | ||
| 490 | }; | ||
| 491 | |||
| 492 | static struct SMap2 m_Main_PLL_Map[] = { | ||
| 493 | { 33125000, 0x57, 0xF0 }, | ||
| 494 | { 35500000, 0x56, 0xE0 }, | ||
| 495 | { 38188000, 0x55, 0xD0 }, | ||
| 496 | { 41375000, 0x54, 0xC0 }, | ||
| 497 | { 45125000, 0x53, 0xB0 }, | ||
| 498 | { 49688000, 0x52, 0xA0 }, | ||
| 499 | { 55188000, 0x51, 0x90 }, | ||
| 500 | { 62125000, 0x50, 0x80 }, | ||
| 501 | { 66250000, 0x47, 0x78 }, | ||
| 502 | { 71000000, 0x46, 0x70 }, | ||
| 503 | { 76375000, 0x45, 0x68 }, | ||
| 504 | { 82750000, 0x44, 0x60 }, | ||
| 505 | { 90250000, 0x43, 0x58 }, | ||
| 506 | { 99375000, 0x42, 0x50 }, | ||
| 507 | { 110375000, 0x41, 0x48 }, | ||
| 508 | { 124250000, 0x40, 0x40 }, | ||
| 509 | { 132500000, 0x37, 0x3C }, | ||
| 510 | { 142000000, 0x36, 0x38 }, | ||
| 511 | { 152750000, 0x35, 0x34 }, | ||
| 512 | { 165500000, 0x34, 0x30 }, | ||
| 513 | { 180500000, 0x33, 0x2C }, | ||
| 514 | { 198750000, 0x32, 0x28 }, | ||
| 515 | { 220750000, 0x31, 0x24 }, | ||
| 516 | { 248500000, 0x30, 0x20 }, | ||
| 517 | { 265000000, 0x27, 0x1E }, | ||
| 518 | { 284000000, 0x26, 0x1C }, | ||
| 519 | { 305500000, 0x25, 0x1A }, | ||
| 520 | { 331000000, 0x24, 0x18 }, | ||
| 521 | { 361000000, 0x23, 0x16 }, | ||
| 522 | { 397500000, 0x22, 0x14 }, | ||
| 523 | { 441500000, 0x21, 0x12 }, | ||
| 524 | { 497000000, 0x20, 0x10 }, | ||
| 525 | { 530000000, 0x17, 0x0F }, | ||
| 526 | { 568000000, 0x16, 0x0E }, | ||
| 527 | { 611000000, 0x15, 0x0D }, | ||
| 528 | { 662000000, 0x14, 0x0C }, | ||
| 529 | { 722000000, 0x13, 0x0B }, | ||
| 530 | { 795000000, 0x12, 0x0A }, | ||
| 531 | { 883000000, 0x11, 0x09 }, | ||
| 532 | { 994000000, 0x10, 0x08 }, | ||
| 533 | { 0, 0x00, 0x00 }, /* Table End */ | ||
| 534 | }; | ||
| 535 | |||
| 536 | static struct SMap2 m_Cal_PLL_Map[] = { | ||
| 537 | { 33813000, 0xDD, 0xD0 }, | ||
| 538 | { 36625000, 0xDC, 0xC0 }, | ||
| 539 | { 39938000, 0xDB, 0xB0 }, | ||
| 540 | { 43938000, 0xDA, 0xA0 }, | ||
| 541 | { 48813000, 0xD9, 0x90 }, | ||
| 542 | { 54938000, 0xD8, 0x80 }, | ||
| 543 | { 62813000, 0xD3, 0x70 }, | ||
| 544 | { 67625000, 0xCD, 0x68 }, | ||
| 545 | { 73250000, 0xCC, 0x60 }, | ||
| 546 | { 79875000, 0xCB, 0x58 }, | ||
| 547 | { 87875000, 0xCA, 0x50 }, | ||
| 548 | { 97625000, 0xC9, 0x48 }, | ||
| 549 | { 109875000, 0xC8, 0x40 }, | ||
| 550 | { 125625000, 0xC3, 0x38 }, | ||
| 551 | { 135250000, 0xBD, 0x34 }, | ||
| 552 | { 146500000, 0xBC, 0x30 }, | ||
| 553 | { 159750000, 0xBB, 0x2C }, | ||
| 554 | { 175750000, 0xBA, 0x28 }, | ||
| 555 | { 195250000, 0xB9, 0x24 }, | ||
| 556 | { 219750000, 0xB8, 0x20 }, | ||
| 557 | { 251250000, 0xB3, 0x1C }, | ||
| 558 | { 270500000, 0xAD, 0x1A }, | ||
| 559 | { 293000000, 0xAC, 0x18 }, | ||
| 560 | { 319500000, 0xAB, 0x16 }, | ||
| 561 | { 351500000, 0xAA, 0x14 }, | ||
| 562 | { 390500000, 0xA9, 0x12 }, | ||
| 563 | { 439500000, 0xA8, 0x10 }, | ||
| 564 | { 502500000, 0xA3, 0x0E }, | ||
| 565 | { 541000000, 0x9D, 0x0D }, | ||
| 566 | { 586000000, 0x9C, 0x0C }, | ||
| 567 | { 639000000, 0x9B, 0x0B }, | ||
| 568 | { 703000000, 0x9A, 0x0A }, | ||
| 569 | { 781000000, 0x99, 0x09 }, | ||
| 570 | { 879000000, 0x98, 0x08 }, | ||
| 571 | { 0, 0x00, 0x00 }, /* Table End */ | ||
| 572 | }; | ||
| 573 | |||
| 574 | static struct SMap m_GainTaper_Map[] = { | ||
| 575 | { 45400000, 0x1F }, | ||
| 576 | { 45800000, 0x1E }, | ||
| 577 | { 46200000, 0x1D }, | ||
| 578 | { 46700000, 0x1C }, | ||
| 579 | { 47100000, 0x1B }, | ||
| 580 | { 47500000, 0x1A }, | ||
| 581 | { 47900000, 0x19 }, | ||
| 582 | { 49600000, 0x17 }, | ||
| 583 | { 51200000, 0x16 }, | ||
| 584 | { 52900000, 0x15 }, | ||
| 585 | { 54500000, 0x14 }, | ||
| 586 | { 56200000, 0x13 }, | ||
| 587 | { 57800000, 0x12 }, | ||
| 588 | { 59500000, 0x11 }, | ||
| 589 | { 61100000, 0x10 }, | ||
| 590 | { 67600000, 0x0D }, | ||
| 591 | { 74200000, 0x0C }, | ||
| 592 | { 80700000, 0x0B }, | ||
| 593 | { 87200000, 0x0A }, | ||
| 594 | { 93800000, 0x09 }, | ||
| 595 | { 100300000, 0x08 }, | ||
| 596 | { 106900000, 0x07 }, | ||
| 597 | { 113400000, 0x06 }, | ||
| 598 | { 119900000, 0x05 }, | ||
| 599 | { 126500000, 0x04 }, | ||
| 600 | { 133000000, 0x03 }, | ||
| 601 | { 139500000, 0x02 }, | ||
| 602 | { 146100000, 0x01 }, | ||
| 603 | { 152600000, 0x00 }, | ||
| 604 | { 154300000, 0x1F }, | ||
| 605 | { 156100000, 0x1E }, | ||
| 606 | { 157800000, 0x1D }, | ||
| 607 | { 159500000, 0x1C }, | ||
| 608 | { 161200000, 0x1B }, | ||
| 609 | { 163000000, 0x1A }, | ||
| 610 | { 164700000, 0x19 }, | ||
| 611 | { 170200000, 0x17 }, | ||
| 612 | { 175800000, 0x16 }, | ||
| 613 | { 181300000, 0x15 }, | ||
| 614 | { 186900000, 0x14 }, | ||
| 615 | { 192400000, 0x13 }, | ||
| 616 | { 198000000, 0x12 }, | ||
| 617 | { 203500000, 0x11 }, | ||
| 618 | { 216200000, 0x14 }, | ||
| 619 | { 228900000, 0x13 }, | ||
| 620 | { 241600000, 0x12 }, | ||
| 621 | { 254400000, 0x11 }, | ||
| 622 | { 267100000, 0x10 }, | ||
| 623 | { 279800000, 0x0F }, | ||
| 624 | { 292500000, 0x0E }, | ||
| 625 | { 305200000, 0x0D }, | ||
| 626 | { 317900000, 0x0C }, | ||
| 627 | { 330700000, 0x0B }, | ||
| 628 | { 343400000, 0x0A }, | ||
| 629 | { 356100000, 0x09 }, | ||
| 630 | { 368800000, 0x08 }, | ||
| 631 | { 381500000, 0x07 }, | ||
| 632 | { 394200000, 0x06 }, | ||
| 633 | { 406900000, 0x05 }, | ||
| 634 | { 419700000, 0x04 }, | ||
| 635 | { 432400000, 0x03 }, | ||
| 636 | { 445100000, 0x02 }, | ||
| 637 | { 457800000, 0x01 }, | ||
| 638 | { 476300000, 0x19 }, | ||
| 639 | { 494800000, 0x18 }, | ||
| 640 | { 513300000, 0x17 }, | ||
| 641 | { 531800000, 0x16 }, | ||
| 642 | { 550300000, 0x15 }, | ||
| 643 | { 568900000, 0x14 }, | ||
| 644 | { 587400000, 0x13 }, | ||
| 645 | { 605900000, 0x12 }, | ||
| 646 | { 624400000, 0x11 }, | ||
| 647 | { 642900000, 0x10 }, | ||
| 648 | { 661400000, 0x0F }, | ||
| 649 | { 679900000, 0x0E }, | ||
| 650 | { 698400000, 0x0D }, | ||
| 651 | { 716900000, 0x0C }, | ||
| 652 | { 735400000, 0x0B }, | ||
| 653 | { 753900000, 0x0A }, | ||
| 654 | { 772500000, 0x09 }, | ||
| 655 | { 791000000, 0x08 }, | ||
| 656 | { 809500000, 0x07 }, | ||
| 657 | { 828000000, 0x06 }, | ||
| 658 | { 846500000, 0x05 }, | ||
| 659 | { 865000000, 0x04 }, | ||
| 660 | { 0, 0x00 }, /* Table End */ | ||
| 661 | }; | ||
| 662 | |||
| 663 | static struct SMap m_RF_Cal_DC_Over_DT_Map[] = { | ||
| 664 | { 47900000, 0x00 }, | ||
| 665 | { 55000000, 0x00 }, | ||
| 666 | { 61100000, 0x0A }, | ||
| 667 | { 64000000, 0x0A }, | ||
| 668 | { 82000000, 0x14 }, | ||
| 669 | { 84000000, 0x19 }, | ||
| 670 | { 119000000, 0x1C }, | ||
| 671 | { 124000000, 0x20 }, | ||
| 672 | { 129000000, 0x2A }, | ||
| 673 | { 134000000, 0x32 }, | ||
| 674 | { 139000000, 0x39 }, | ||
| 675 | { 144000000, 0x3E }, | ||
| 676 | { 149000000, 0x3F }, | ||
| 677 | { 152600000, 0x40 }, | ||
| 678 | { 154000000, 0x40 }, | ||
| 679 | { 164700000, 0x41 }, | ||
| 680 | { 203500000, 0x32 }, | ||
| 681 | { 353000000, 0x19 }, | ||
| 682 | { 356000000, 0x1A }, | ||
| 683 | { 359000000, 0x1B }, | ||
| 684 | { 363000000, 0x1C }, | ||
| 685 | { 366000000, 0x1D }, | ||
| 686 | { 369000000, 0x1E }, | ||
| 687 | { 373000000, 0x1F }, | ||
| 688 | { 376000000, 0x20 }, | ||
| 689 | { 379000000, 0x21 }, | ||
| 690 | { 383000000, 0x22 }, | ||
| 691 | { 386000000, 0x23 }, | ||
| 692 | { 389000000, 0x24 }, | ||
| 693 | { 393000000, 0x25 }, | ||
| 694 | { 396000000, 0x26 }, | ||
| 695 | { 399000000, 0x27 }, | ||
| 696 | { 402000000, 0x28 }, | ||
| 697 | { 404000000, 0x29 }, | ||
| 698 | { 407000000, 0x2A }, | ||
| 699 | { 409000000, 0x2B }, | ||
| 700 | { 412000000, 0x2C }, | ||
| 701 | { 414000000, 0x2D }, | ||
| 702 | { 417000000, 0x2E }, | ||
| 703 | { 419000000, 0x2F }, | ||
| 704 | { 422000000, 0x30 }, | ||
| 705 | { 424000000, 0x31 }, | ||
| 706 | { 427000000, 0x32 }, | ||
| 707 | { 429000000, 0x33 }, | ||
| 708 | { 432000000, 0x34 }, | ||
| 709 | { 434000000, 0x35 }, | ||
| 710 | { 437000000, 0x36 }, | ||
| 711 | { 439000000, 0x37 }, | ||
| 712 | { 442000000, 0x38 }, | ||
| 713 | { 444000000, 0x39 }, | ||
| 714 | { 447000000, 0x3A }, | ||
| 715 | { 449000000, 0x3B }, | ||
| 716 | { 457800000, 0x3C }, | ||
| 717 | { 465000000, 0x0F }, | ||
| 718 | { 477000000, 0x12 }, | ||
| 719 | { 483000000, 0x14 }, | ||
| 720 | { 502000000, 0x19 }, | ||
| 721 | { 508000000, 0x1B }, | ||
| 722 | { 519000000, 0x1C }, | ||
| 723 | { 522000000, 0x1D }, | ||
| 724 | { 524000000, 0x1E }, | ||
| 725 | { 534000000, 0x1F }, | ||
| 726 | { 549000000, 0x20 }, | ||
| 727 | { 554000000, 0x22 }, | ||
| 728 | { 584000000, 0x24 }, | ||
| 729 | { 589000000, 0x26 }, | ||
| 730 | { 658000000, 0x27 }, | ||
| 731 | { 664000000, 0x2C }, | ||
| 732 | { 669000000, 0x2D }, | ||
| 733 | { 699000000, 0x2E }, | ||
| 734 | { 704000000, 0x30 }, | ||
| 735 | { 709000000, 0x31 }, | ||
| 736 | { 714000000, 0x32 }, | ||
| 737 | { 724000000, 0x33 }, | ||
| 738 | { 729000000, 0x36 }, | ||
| 739 | { 739000000, 0x38 }, | ||
| 740 | { 744000000, 0x39 }, | ||
| 741 | { 749000000, 0x3B }, | ||
| 742 | { 754000000, 0x3C }, | ||
| 743 | { 759000000, 0x3D }, | ||
| 744 | { 764000000, 0x3E }, | ||
| 745 | { 769000000, 0x3F }, | ||
| 746 | { 774000000, 0x40 }, | ||
| 747 | { 779000000, 0x41 }, | ||
| 748 | { 784000000, 0x43 }, | ||
| 749 | { 789000000, 0x46 }, | ||
| 750 | { 794000000, 0x48 }, | ||
| 751 | { 799000000, 0x4B }, | ||
| 752 | { 804000000, 0x4F }, | ||
| 753 | { 809000000, 0x54 }, | ||
| 754 | { 814000000, 0x59 }, | ||
| 755 | { 819000000, 0x5D }, | ||
| 756 | { 824000000, 0x61 }, | ||
| 757 | { 829000000, 0x68 }, | ||
| 758 | { 834000000, 0x6E }, | ||
| 759 | { 839000000, 0x75 }, | ||
| 760 | { 844000000, 0x7E }, | ||
| 761 | { 849000000, 0x82 }, | ||
| 762 | { 854000000, 0x84 }, | ||
| 763 | { 859000000, 0x8F }, | ||
| 764 | { 865000000, 0x9A }, | ||
| 765 | { 0, 0x00 }, /* Table End */ | ||
| 766 | }; | ||
| 767 | |||
| 768 | |||
| 769 | static struct SMap m_IR_Meas_Map[] = { | ||
| 770 | { 200000000, 0x05 }, | ||
| 771 | { 400000000, 0x06 }, | ||
| 772 | { 865000000, 0x07 }, | ||
| 773 | { 0, 0x00 }, /* Table End */ | ||
| 774 | }; | ||
| 775 | |||
| 776 | static struct SMap2 m_CID_Target_Map[] = { | ||
| 777 | { 46000000, 0x04, 18 }, | ||
| 778 | { 52200000, 0x0A, 15 }, | ||
| 779 | { 70100000, 0x01, 40 }, | ||
| 780 | { 136800000, 0x18, 40 }, | ||
| 781 | { 156700000, 0x18, 40 }, | ||
| 782 | { 186250000, 0x0A, 40 }, | ||
| 783 | { 230000000, 0x0A, 40 }, | ||
| 784 | { 345000000, 0x18, 40 }, | ||
| 785 | { 426000000, 0x0E, 40 }, | ||
| 786 | { 489500000, 0x1E, 40 }, | ||
| 787 | { 697500000, 0x32, 40 }, | ||
| 788 | { 842000000, 0x3A, 40 }, | ||
| 789 | { 0, 0x00, 0 }, /* Table End */ | ||
| 790 | }; | ||
| 791 | |||
| 792 | static struct SRFBandMap m_RF_Band_Map[7] = { | ||
| 793 | { 47900000, 46000000, 0, 0}, | ||
| 794 | { 61100000, 52200000, 0, 0}, | ||
| 795 | { 152600000, 70100000, 136800000, 0}, | ||
| 796 | { 164700000, 156700000, 0, 0}, | ||
| 797 | { 203500000, 186250000, 0, 0}, | ||
| 798 | { 457800000, 230000000, 345000000, 426000000}, | ||
| 799 | { 865000000, 489500000, 697500000, 842000000}, | ||
| 800 | }; | ||
| 801 | |||
| 802 | u8 m_Thermometer_Map_1[16] = { | ||
| 803 | 60, 62, 66, 64, | ||
| 804 | 74, 72, 68, 70, | ||
| 805 | 90, 88, 84, 86, | ||
| 806 | 76, 78, 82, 80, | ||
| 807 | }; | ||
| 808 | |||
| 809 | u8 m_Thermometer_Map_2[16] = { | ||
| 810 | 92, 94, 98, 96, | ||
| 811 | 106, 104, 100, 102, | ||
| 812 | 122, 120, 116, 118, | ||
| 813 | 108, 110, 114, 112, | ||
| 814 | }; | ||
diff --git a/drivers/media/dvb/ngene/Kconfig b/drivers/media/dvb/ngene/Kconfig index cec242b7c00d..64c84702ba5c 100644 --- a/drivers/media/dvb/ngene/Kconfig +++ b/drivers/media/dvb/ngene/Kconfig | |||
| @@ -5,6 +5,8 @@ config DVB_NGENE | |||
| 5 | select DVB_STV6110x if !DVB_FE_CUSTOMISE | 5 | select DVB_STV6110x if !DVB_FE_CUSTOMISE |
| 6 | select DVB_STV090x if !DVB_FE_CUSTOMISE | 6 | select DVB_STV090x if !DVB_FE_CUSTOMISE |
| 7 | select DVB_LGDT330X if !DVB_FE_CUSTOMISE | 7 | select DVB_LGDT330X if !DVB_FE_CUSTOMISE |
| 8 | select DVB_DRXK if !DVB_FE_CUSTOMISE | ||
| 9 | select DVB_TDA18271C2DD if !DVB_FE_CUSTOMISE | ||
| 8 | select MEDIA_TUNER_MT2131 if !MEDIA_TUNER_CUSTOMISE | 10 | select MEDIA_TUNER_MT2131 if !MEDIA_TUNER_CUSTOMISE |
| 9 | ---help--- | 11 | ---help--- |
| 10 | Support for Micronas PCI express cards with nGene bridge. | 12 | Support for Micronas PCI express cards with nGene bridge. |
diff --git a/drivers/media/dvb/ngene/ngene-cards.c b/drivers/media/dvb/ngene/ngene-cards.c index fcf4be901ec8..056419228363 100644 --- a/drivers/media/dvb/ngene/ngene-cards.c +++ b/drivers/media/dvb/ngene/ngene-cards.c | |||
| @@ -40,6 +40,8 @@ | |||
| 40 | #include "lnbh24.h" | 40 | #include "lnbh24.h" |
| 41 | #include "lgdt330x.h" | 41 | #include "lgdt330x.h" |
| 42 | #include "mt2131.h" | 42 | #include "mt2131.h" |
| 43 | #include "tda18271c2dd.h" | ||
| 44 | #include "drxk.h" | ||
| 43 | 45 | ||
| 44 | 46 | ||
| 45 | /****************************************************************************/ | 47 | /****************************************************************************/ |
| @@ -83,6 +85,49 @@ static int tuner_attach_stv6110(struct ngene_channel *chan) | |||
| 83 | } | 85 | } |
| 84 | 86 | ||
| 85 | 87 | ||
| 88 | static int drxk_gate_ctrl(struct dvb_frontend *fe, int enable) | ||
| 89 | { | ||
| 90 | struct ngene_channel *chan = fe->sec_priv; | ||
| 91 | int status; | ||
| 92 | |||
| 93 | if (enable) { | ||
| 94 | down(&chan->dev->pll_mutex); | ||
| 95 | status = chan->gate_ctrl(fe, 1); | ||
| 96 | } else { | ||
| 97 | status = chan->gate_ctrl(fe, 0); | ||
| 98 | up(&chan->dev->pll_mutex); | ||
| 99 | } | ||
| 100 | return status; | ||
| 101 | } | ||
| 102 | |||
| 103 | static int tuner_attach_tda18271(struct ngene_channel *chan) | ||
| 104 | { | ||
| 105 | struct i2c_adapter *i2c; | ||
| 106 | struct dvb_frontend *fe; | ||
| 107 | |||
| 108 | i2c = &chan->dev->channel[0].i2c_adapter; | ||
| 109 | if (chan->fe->ops.i2c_gate_ctrl) | ||
| 110 | chan->fe->ops.i2c_gate_ctrl(chan->fe, 1); | ||
| 111 | fe = dvb_attach(tda18271c2dd_attach, chan->fe, i2c, 0x60); | ||
| 112 | if (chan->fe->ops.i2c_gate_ctrl) | ||
| 113 | chan->fe->ops.i2c_gate_ctrl(chan->fe, 0); | ||
| 114 | if (!fe) { | ||
| 115 | printk(KERN_ERR "No TDA18271 found!\n"); | ||
| 116 | return -ENODEV; | ||
| 117 | } | ||
| 118 | |||
| 119 | return 0; | ||
| 120 | } | ||
| 121 | |||
| 122 | static int tuner_attach_probe(struct ngene_channel *chan) | ||
| 123 | { | ||
| 124 | if (chan->demod_type == 0) | ||
| 125 | return tuner_attach_stv6110(chan); | ||
| 126 | if (chan->demod_type == 1) | ||
| 127 | return tuner_attach_tda18271(chan); | ||
| 128 | return -EINVAL; | ||
| 129 | } | ||
| 130 | |||
| 86 | static int demod_attach_stv0900(struct ngene_channel *chan) | 131 | static int demod_attach_stv0900(struct ngene_channel *chan) |
| 87 | { | 132 | { |
| 88 | struct i2c_adapter *i2c; | 133 | struct i2c_adapter *i2c; |
| @@ -130,6 +175,60 @@ static void cineS2_tuner_i2c_lock(struct dvb_frontend *fe, int lock) | |||
| 130 | up(&chan->dev->pll_mutex); | 175 | up(&chan->dev->pll_mutex); |
| 131 | } | 176 | } |
| 132 | 177 | ||
| 178 | static int i2c_read(struct i2c_adapter *adapter, u8 adr, u8 *val) | ||
| 179 | { | ||
| 180 | struct i2c_msg msgs[1] = {{.addr = adr, .flags = I2C_M_RD, | ||
| 181 | .buf = val, .len = 1 } }; | ||
| 182 | return (i2c_transfer(adapter, msgs, 1) == 1) ? 0 : -1; | ||
| 183 | } | ||
| 184 | |||
| 185 | static int i2c_read_reg16(struct i2c_adapter *adapter, u8 adr, | ||
| 186 | u16 reg, u8 *val) | ||
| 187 | { | ||
| 188 | u8 msg[2] = {reg>>8, reg&0xff}; | ||
| 189 | struct i2c_msg msgs[2] = {{.addr = adr, .flags = 0, | ||
| 190 | .buf = msg, .len = 2}, | ||
| 191 | {.addr = adr, .flags = I2C_M_RD, | ||
| 192 | .buf = val, .len = 1} }; | ||
| 193 | return (i2c_transfer(adapter, msgs, 2) == 2) ? 0 : -1; | ||
| 194 | } | ||
| 195 | |||
| 196 | static int port_has_stv0900(struct i2c_adapter *i2c, int port) | ||
| 197 | { | ||
| 198 | u8 val; | ||
| 199 | if (i2c_read_reg16(i2c, 0x68+port/2, 0xf100, &val) < 0) | ||
| 200 | return 0; | ||
| 201 | return 1; | ||
| 202 | } | ||
| 203 | |||
| 204 | static int port_has_drxk(struct i2c_adapter *i2c, int port) | ||
| 205 | { | ||
| 206 | u8 val; | ||
| 207 | |||
| 208 | if (i2c_read(i2c, 0x29+port, &val) < 0) | ||
| 209 | return 0; | ||
| 210 | return 1; | ||
| 211 | } | ||
| 212 | |||
| 213 | static int demod_attach_drxk(struct ngene_channel *chan, | ||
| 214 | struct i2c_adapter *i2c) | ||
| 215 | { | ||
| 216 | struct drxk_config config; | ||
| 217 | |||
| 218 | memset(&config, 0, sizeof(config)); | ||
| 219 | config.adr = 0x29 + (chan->number ^ 2); | ||
| 220 | |||
| 221 | chan->fe = dvb_attach(drxk_attach, &config, i2c, &chan->fe2); | ||
| 222 | if (!chan->fe) { | ||
| 223 | printk(KERN_ERR "No DRXK found!\n"); | ||
| 224 | return -ENODEV; | ||
| 225 | } | ||
| 226 | chan->fe->sec_priv = chan; | ||
| 227 | chan->gate_ctrl = chan->fe->ops.i2c_gate_ctrl; | ||
| 228 | chan->fe->ops.i2c_gate_ctrl = drxk_gate_ctrl; | ||
| 229 | return 0; | ||
| 230 | } | ||
| 231 | |||
| 133 | static int cineS2_probe(struct ngene_channel *chan) | 232 | static int cineS2_probe(struct ngene_channel *chan) |
| 134 | { | 233 | { |
| 135 | struct i2c_adapter *i2c; | 234 | struct i2c_adapter *i2c; |
| @@ -144,43 +243,42 @@ static int cineS2_probe(struct ngene_channel *chan) | |||
| 144 | else | 243 | else |
| 145 | i2c = &chan->dev->channel[1].i2c_adapter; | 244 | i2c = &chan->dev->channel[1].i2c_adapter; |
| 146 | 245 | ||
| 147 | fe_conf = chan->dev->card_info->fe_config[chan->number]; | 246 | if (port_has_stv0900(i2c, chan->number)) { |
| 148 | i2c_msg.addr = fe_conf->address; | 247 | chan->demod_type = 0; |
| 149 | 248 | fe_conf = chan->dev->card_info->fe_config[chan->number]; | |
| 150 | /* probe demod */ | 249 | /* demod found, attach it */ |
| 151 | i2c_msg.len = 2; | 250 | rc = demod_attach_stv0900(chan); |
| 152 | buf[0] = 0xf1; | 251 | if (rc < 0 || chan->number < 2) |
| 153 | buf[1] = 0x00; | 252 | return rc; |
| 154 | rc = i2c_transfer(i2c, &i2c_msg, 1); | 253 | |
| 155 | if (rc != 1) | 254 | /* demod #2: reprogram outputs DPN1 & DPN2 */ |
| 156 | return -ENODEV; | 255 | i2c_msg.addr = fe_conf->address; |
| 157 | 256 | i2c_msg.len = 3; | |
| 158 | /* demod found, attach it */ | 257 | buf[0] = 0xf1; |
| 159 | rc = demod_attach_stv0900(chan); | 258 | switch (chan->number) { |
| 160 | if (rc < 0 || chan->number < 2) | 259 | case 2: |
| 161 | return rc; | 260 | buf[1] = 0x5c; |
| 162 | 261 | buf[2] = 0xc2; | |
| 163 | /* demod #2: reprogram outputs DPN1 & DPN2 */ | 262 | break; |
| 164 | i2c_msg.len = 3; | 263 | case 3: |
| 165 | buf[0] = 0xf1; | 264 | buf[1] = 0x61; |
| 166 | switch (chan->number) { | 265 | buf[2] = 0xcc; |
| 167 | case 2: | 266 | break; |
| 168 | buf[1] = 0x5c; | 267 | default: |
| 169 | buf[2] = 0xc2; | 268 | return -ENODEV; |
| 170 | break; | 269 | } |
| 171 | case 3: | 270 | rc = i2c_transfer(i2c, &i2c_msg, 1); |
| 172 | buf[1] = 0x61; | 271 | if (rc != 1) { |
| 173 | buf[2] = 0xcc; | 272 | printk(KERN_ERR DEVICE_NAME ": could not setup DPNx\n"); |
| 174 | break; | 273 | return -EIO; |
| 175 | default: | 274 | } |
| 275 | } else if (port_has_drxk(i2c, chan->number^2)) { | ||
| 276 | chan->demod_type = 1; | ||
| 277 | demod_attach_drxk(chan, i2c); | ||
| 278 | } else { | ||
| 279 | printk(KERN_ERR "No demod found on chan %d\n", chan->number); | ||
| 176 | return -ENODEV; | 280 | return -ENODEV; |
| 177 | } | 281 | } |
| 178 | rc = i2c_transfer(i2c, &i2c_msg, 1); | ||
| 179 | if (rc != 1) { | ||
| 180 | printk(KERN_ERR DEVICE_NAME ": could not setup DPNx\n"); | ||
| 181 | return -EIO; | ||
| 182 | } | ||
| 183 | |||
| 184 | return 0; | 282 | return 0; |
| 185 | } | 283 | } |
| 186 | 284 | ||
| @@ -306,7 +404,7 @@ static struct ngene_info ngene_info_satixS2v2 = { | |||
| 306 | .io_type = {NGENE_IO_TSIN, NGENE_IO_TSIN, NGENE_IO_TSIN, NGENE_IO_TSIN, | 404 | .io_type = {NGENE_IO_TSIN, NGENE_IO_TSIN, NGENE_IO_TSIN, NGENE_IO_TSIN, |
| 307 | NGENE_IO_TSOUT}, | 405 | NGENE_IO_TSOUT}, |
| 308 | .demod_attach = {demod_attach_stv0900, demod_attach_stv0900, cineS2_probe, cineS2_probe}, | 406 | .demod_attach = {demod_attach_stv0900, demod_attach_stv0900, cineS2_probe, cineS2_probe}, |
| 309 | .tuner_attach = {tuner_attach_stv6110, tuner_attach_stv6110, tuner_attach_stv6110, tuner_attach_stv6110}, | 407 | .tuner_attach = {tuner_attach_stv6110, tuner_attach_stv6110, tuner_attach_probe, tuner_attach_probe}, |
| 310 | .fe_config = {&fe_cineS2, &fe_cineS2, &fe_cineS2_2, &fe_cineS2_2}, | 408 | .fe_config = {&fe_cineS2, &fe_cineS2, &fe_cineS2_2, &fe_cineS2_2}, |
| 311 | .tuner_config = {&tuner_cineS2_0, &tuner_cineS2_1, &tuner_cineS2_0, &tuner_cineS2_1}, | 409 | .tuner_config = {&tuner_cineS2_0, &tuner_cineS2_1, &tuner_cineS2_0, &tuner_cineS2_1}, |
| 312 | .lnb = {0x0a, 0x08, 0x0b, 0x09}, | 410 | .lnb = {0x0a, 0x08, 0x0b, 0x09}, |
| @@ -321,7 +419,7 @@ static struct ngene_info ngene_info_cineS2v5 = { | |||
| 321 | .io_type = {NGENE_IO_TSIN, NGENE_IO_TSIN, NGENE_IO_TSIN, NGENE_IO_TSIN, | 419 | .io_type = {NGENE_IO_TSIN, NGENE_IO_TSIN, NGENE_IO_TSIN, NGENE_IO_TSIN, |
| 322 | NGENE_IO_TSOUT}, | 420 | NGENE_IO_TSOUT}, |
| 323 | .demod_attach = {demod_attach_stv0900, demod_attach_stv0900, cineS2_probe, cineS2_probe}, | 421 | .demod_attach = {demod_attach_stv0900, demod_attach_stv0900, cineS2_probe, cineS2_probe}, |
| 324 | .tuner_attach = {tuner_attach_stv6110, tuner_attach_stv6110, tuner_attach_stv6110, tuner_attach_stv6110}, | 422 | .tuner_attach = {tuner_attach_stv6110, tuner_attach_stv6110, tuner_attach_probe, tuner_attach_probe}, |
| 325 | .fe_config = {&fe_cineS2, &fe_cineS2, &fe_cineS2_2, &fe_cineS2_2}, | 423 | .fe_config = {&fe_cineS2, &fe_cineS2, &fe_cineS2_2, &fe_cineS2_2}, |
| 326 | .tuner_config = {&tuner_cineS2_0, &tuner_cineS2_1, &tuner_cineS2_0, &tuner_cineS2_1}, | 424 | .tuner_config = {&tuner_cineS2_0, &tuner_cineS2_1, &tuner_cineS2_0, &tuner_cineS2_1}, |
| 327 | .lnb = {0x0a, 0x08, 0x0b, 0x09}, | 425 | .lnb = {0x0a, 0x08, 0x0b, 0x09}, |
| @@ -331,13 +429,13 @@ static struct ngene_info ngene_info_cineS2v5 = { | |||
| 331 | }; | 429 | }; |
| 332 | 430 | ||
| 333 | 431 | ||
| 334 | static struct ngene_info ngene_info_duoFlexS2 = { | 432 | static struct ngene_info ngene_info_duoFlex = { |
| 335 | .type = NGENE_SIDEWINDER, | 433 | .type = NGENE_SIDEWINDER, |
| 336 | .name = "Digital Devices DuoFlex S2 miniPCIe", | 434 | .name = "Digital Devices DuoFlex PCIe or miniPCIe", |
| 337 | .io_type = {NGENE_IO_TSIN, NGENE_IO_TSIN, NGENE_IO_TSIN, NGENE_IO_TSIN, | 435 | .io_type = {NGENE_IO_TSIN, NGENE_IO_TSIN, NGENE_IO_TSIN, NGENE_IO_TSIN, |
| 338 | NGENE_IO_TSOUT}, | 436 | NGENE_IO_TSOUT}, |
| 339 | .demod_attach = {cineS2_probe, cineS2_probe, cineS2_probe, cineS2_probe}, | 437 | .demod_attach = {cineS2_probe, cineS2_probe, cineS2_probe, cineS2_probe}, |
| 340 | .tuner_attach = {tuner_attach_stv6110, tuner_attach_stv6110, tuner_attach_stv6110, tuner_attach_stv6110}, | 438 | .tuner_attach = {tuner_attach_probe, tuner_attach_probe, tuner_attach_probe, tuner_attach_probe}, |
| 341 | .fe_config = {&fe_cineS2, &fe_cineS2, &fe_cineS2_2, &fe_cineS2_2}, | 439 | .fe_config = {&fe_cineS2, &fe_cineS2, &fe_cineS2_2, &fe_cineS2_2}, |
| 342 | .tuner_config = {&tuner_cineS2_0, &tuner_cineS2_1, &tuner_cineS2_0, &tuner_cineS2_1}, | 440 | .tuner_config = {&tuner_cineS2_0, &tuner_cineS2_1, &tuner_cineS2_0, &tuner_cineS2_1}, |
| 343 | .lnb = {0x0a, 0x08, 0x0b, 0x09}, | 441 | .lnb = {0x0a, 0x08, 0x0b, 0x09}, |
| @@ -385,8 +483,8 @@ static const struct pci_device_id ngene_id_tbl[] __devinitdata = { | |||
| 385 | NGENE_ID(0x18c3, 0xdb01, ngene_info_satixS2), | 483 | NGENE_ID(0x18c3, 0xdb01, ngene_info_satixS2), |
| 386 | NGENE_ID(0x18c3, 0xdb02, ngene_info_satixS2v2), | 484 | NGENE_ID(0x18c3, 0xdb02, ngene_info_satixS2v2), |
| 387 | NGENE_ID(0x18c3, 0xdd00, ngene_info_cineS2v5), | 485 | NGENE_ID(0x18c3, 0xdd00, ngene_info_cineS2v5), |
| 388 | NGENE_ID(0x18c3, 0xdd10, ngene_info_duoFlexS2), | 486 | NGENE_ID(0x18c3, 0xdd10, ngene_info_duoFlex), |
| 389 | NGENE_ID(0x18c3, 0xdd20, ngene_info_duoFlexS2), | 487 | NGENE_ID(0x18c3, 0xdd20, ngene_info_duoFlex), |
| 390 | NGENE_ID(0x1461, 0x062e, ngene_info_m780), | 488 | NGENE_ID(0x1461, 0x062e, ngene_info_m780), |
| 391 | {0} | 489 | {0} |
| 392 | }; | 490 | }; |
diff --git a/drivers/media/dvb/ngene/ngene-core.c b/drivers/media/dvb/ngene/ngene-core.c index 6927c726ce35..f129a9303f80 100644 --- a/drivers/media/dvb/ngene/ngene-core.c +++ b/drivers/media/dvb/ngene/ngene-core.c | |||
| @@ -41,7 +41,7 @@ | |||
| 41 | 41 | ||
| 42 | #include "ngene.h" | 42 | #include "ngene.h" |
| 43 | 43 | ||
| 44 | static int one_adapter = 1; | 44 | static int one_adapter; |
| 45 | module_param(one_adapter, int, 0444); | 45 | module_param(one_adapter, int, 0444); |
| 46 | MODULE_PARM_DESC(one_adapter, "Use only one adapter."); | 46 | MODULE_PARM_DESC(one_adapter, "Use only one adapter."); |
| 47 | 47 | ||
| @@ -461,7 +461,7 @@ static u8 TSFeatureDecoderSetup[8 * 5] = { | |||
| 461 | 0x42, 0x00, 0x00, 0x02, 0x02, 0xbc, 0x00, 0x00, | 461 | 0x42, 0x00, 0x00, 0x02, 0x02, 0xbc, 0x00, 0x00, |
| 462 | 0x40, 0x06, 0x00, 0x02, 0x02, 0xbc, 0x00, 0x00, /* DRXH */ | 462 | 0x40, 0x06, 0x00, 0x02, 0x02, 0xbc, 0x00, 0x00, /* DRXH */ |
| 463 | 0x71, 0x07, 0x00, 0x02, 0x02, 0xbc, 0x00, 0x00, /* DRXHser */ | 463 | 0x71, 0x07, 0x00, 0x02, 0x02, 0xbc, 0x00, 0x00, /* DRXHser */ |
| 464 | 0x72, 0x06, 0x00, 0x02, 0x02, 0xbc, 0x00, 0x00, /* S2ser */ | 464 | 0x72, 0x00, 0x00, 0x02, 0x02, 0xbc, 0x00, 0x00, /* S2ser */ |
| 465 | 0x40, 0x07, 0x00, 0x02, 0x02, 0xbc, 0x00, 0x00, /* LGDT3303 */ | 465 | 0x40, 0x07, 0x00, 0x02, 0x02, 0xbc, 0x00, 0x00, /* LGDT3303 */ |
| 466 | }; | 466 | }; |
| 467 | 467 | ||
| @@ -507,7 +507,7 @@ void FillTSBuffer(void *Buffer, int Length, u32 Flags) | |||
| 507 | { | 507 | { |
| 508 | u32 *ptr = Buffer; | 508 | u32 *ptr = Buffer; |
| 509 | 509 | ||
| 510 | memset(Buffer, 0xff, Length); | 510 | memset(Buffer, TS_FILLER, Length); |
| 511 | while (Length > 0) { | 511 | while (Length > 0) { |
| 512 | if (Flags & DF_SWAP32) | 512 | if (Flags & DF_SWAP32) |
| 513 | *ptr = 0x471FFF10; | 513 | *ptr = 0x471FFF10; |
| @@ -1443,6 +1443,9 @@ static void release_channel(struct ngene_channel *chan) | |||
| 1443 | chan->ci_dev = NULL; | 1443 | chan->ci_dev = NULL; |
| 1444 | } | 1444 | } |
| 1445 | 1445 | ||
| 1446 | if (chan->fe2) | ||
| 1447 | dvb_unregister_frontend(chan->fe2); | ||
| 1448 | |||
| 1446 | if (chan->fe) { | 1449 | if (chan->fe) { |
| 1447 | dvb_unregister_frontend(chan->fe); | 1450 | dvb_unregister_frontend(chan->fe); |
| 1448 | dvb_frontend_detach(chan->fe); | 1451 | dvb_frontend_detach(chan->fe); |
| @@ -1534,6 +1537,14 @@ static int init_channel(struct ngene_channel *chan) | |||
| 1534 | goto err; | 1537 | goto err; |
| 1535 | chan->has_demux = true; | 1538 | chan->has_demux = true; |
| 1536 | } | 1539 | } |
| 1540 | if (chan->fe2) { | ||
| 1541 | if (dvb_register_frontend(adapter, chan->fe2) < 0) | ||
| 1542 | goto err; | ||
| 1543 | chan->fe2->tuner_priv = chan->fe->tuner_priv; | ||
| 1544 | memcpy(&chan->fe2->ops.tuner_ops, | ||
| 1545 | &chan->fe->ops.tuner_ops, | ||
| 1546 | sizeof(struct dvb_tuner_ops)); | ||
| 1547 | } | ||
| 1537 | 1548 | ||
| 1538 | if (chan->has_demux) { | 1549 | if (chan->has_demux) { |
| 1539 | ret = my_dvb_dmx_ts_card_init(dvbdemux, "SW demux", | 1550 | ret = my_dvb_dmx_ts_card_init(dvbdemux, "SW demux", |
| @@ -1571,11 +1582,18 @@ static int init_channels(struct ngene *dev) | |||
| 1571 | return 0; | 1582 | return 0; |
| 1572 | } | 1583 | } |
| 1573 | 1584 | ||
| 1585 | static struct cxd2099_cfg cxd_cfg = { | ||
| 1586 | .bitrate = 62000, | ||
| 1587 | .adr = 0x40, | ||
| 1588 | .polarity = 0, | ||
| 1589 | .clock_mode = 0, | ||
| 1590 | }; | ||
| 1591 | |||
| 1574 | static void cxd_attach(struct ngene *dev) | 1592 | static void cxd_attach(struct ngene *dev) |
| 1575 | { | 1593 | { |
| 1576 | struct ngene_ci *ci = &dev->ci; | 1594 | struct ngene_ci *ci = &dev->ci; |
| 1577 | 1595 | ||
| 1578 | ci->en = cxd2099_attach(0x40, dev, &dev->channel[0].i2c_adapter); | 1596 | ci->en = cxd2099_attach(&cxd_cfg, dev, &dev->channel[0].i2c_adapter); |
| 1579 | ci->dev = dev; | 1597 | ci->dev = dev; |
| 1580 | return; | 1598 | return; |
| 1581 | } | 1599 | } |
diff --git a/drivers/media/dvb/ngene/ngene-dvb.c b/drivers/media/dvb/ngene/ngene-dvb.c index 0b4943233166..fcb16a615aab 100644 --- a/drivers/media/dvb/ngene/ngene-dvb.c +++ b/drivers/media/dvb/ngene/ngene-dvb.c | |||
| @@ -118,6 +118,16 @@ static void swap_buffer(u32 *p, u32 len) | |||
| 118 | } | 118 | } |
| 119 | } | 119 | } |
| 120 | 120 | ||
| 121 | /* start of filler packet */ | ||
| 122 | static u8 fill_ts[] = { 0x47, 0x1f, 0xff, 0x10, TS_FILLER }; | ||
| 123 | |||
| 124 | /* #define DEBUG_CI_XFER */ | ||
| 125 | #ifdef DEBUG_CI_XFER | ||
| 126 | static u32 ok; | ||
| 127 | static u32 overflow; | ||
| 128 | static u32 stripped; | ||
| 129 | #endif | ||
| 130 | |||
| 121 | void *tsin_exchange(void *priv, void *buf, u32 len, u32 clock, u32 flags) | 131 | void *tsin_exchange(void *priv, void *buf, u32 len, u32 clock, u32 flags) |
| 122 | { | 132 | { |
| 123 | struct ngene_channel *chan = priv; | 133 | struct ngene_channel *chan = priv; |
| @@ -126,21 +136,41 @@ void *tsin_exchange(void *priv, void *buf, u32 len, u32 clock, u32 flags) | |||
| 126 | 136 | ||
| 127 | if (flags & DF_SWAP32) | 137 | if (flags & DF_SWAP32) |
| 128 | swap_buffer(buf, len); | 138 | swap_buffer(buf, len); |
| 139 | |||
| 129 | if (dev->ci.en && chan->number == 2) { | 140 | if (dev->ci.en && chan->number == 2) { |
| 130 | if (dvb_ringbuffer_free(&dev->tsin_rbuf) > len) { | 141 | while (len >= 188) { |
| 131 | dvb_ringbuffer_write(&dev->tsin_rbuf, buf, len); | 142 | if (memcmp(buf, fill_ts, sizeof fill_ts) != 0) { |
| 132 | wake_up_interruptible(&dev->tsin_rbuf.queue); | 143 | if (dvb_ringbuffer_free(&dev->tsin_rbuf) >= 188) { |
| 144 | dvb_ringbuffer_write(&dev->tsin_rbuf, buf, 188); | ||
| 145 | wake_up(&dev->tsin_rbuf.queue); | ||
| 146 | #ifdef DEBUG_CI_XFER | ||
| 147 | ok++; | ||
| 148 | #endif | ||
| 149 | } | ||
| 150 | #ifdef DEBUG_CI_XFER | ||
| 151 | else | ||
| 152 | overflow++; | ||
| 153 | #endif | ||
| 154 | } | ||
| 155 | #ifdef DEBUG_CI_XFER | ||
| 156 | else | ||
| 157 | stripped++; | ||
| 158 | |||
| 159 | if (ok % 100 == 0 && overflow) | ||
| 160 | printk(KERN_WARNING "%s: ok %u overflow %u dropped %u\n", __func__, ok, overflow, stripped); | ||
| 161 | #endif | ||
| 162 | buf += 188; | ||
| 163 | len -= 188; | ||
| 133 | } | 164 | } |
| 134 | return 0; | 165 | return NULL; |
| 135 | } | 166 | } |
| 136 | if (chan->users > 0) { | 167 | |
| 168 | if (chan->users > 0) | ||
| 137 | dvb_dmx_swfilter(&chan->demux, buf, len); | 169 | dvb_dmx_swfilter(&chan->demux, buf, len); |
| 138 | } | 170 | |
| 139 | return NULL; | 171 | return NULL; |
| 140 | } | 172 | } |
| 141 | 173 | ||
| 142 | u8 fill_ts[188] = { 0x47, 0x1f, 0xff, 0x10 }; | ||
| 143 | |||
| 144 | void *tsout_exchange(void *priv, void *buf, u32 len, u32 clock, u32 flags) | 174 | void *tsout_exchange(void *priv, void *buf, u32 len, u32 clock, u32 flags) |
| 145 | { | 175 | { |
| 146 | struct ngene_channel *chan = priv; | 176 | struct ngene_channel *chan = priv; |
diff --git a/drivers/media/dvb/ngene/ngene.h b/drivers/media/dvb/ngene/ngene.h index 40fce9e3ae66..5443dc0caea5 100644 --- a/drivers/media/dvb/ngene/ngene.h +++ b/drivers/media/dvb/ngene/ngene.h | |||
| @@ -641,8 +641,11 @@ struct ngene_channel { | |||
| 641 | int mode; | 641 | int mode; |
| 642 | bool has_adapter; | 642 | bool has_adapter; |
| 643 | bool has_demux; | 643 | bool has_demux; |
| 644 | int demod_type; | ||
| 645 | int (*gate_ctrl)(struct dvb_frontend *, int); | ||
| 644 | 646 | ||
| 645 | struct dvb_frontend *fe; | 647 | struct dvb_frontend *fe; |
| 648 | struct dvb_frontend *fe2; | ||
| 646 | struct dmxdev dmxdev; | 649 | struct dmxdev dmxdev; |
| 647 | struct dvb_demux demux; | 650 | struct dvb_demux demux; |
| 648 | struct dvb_net dvbnet; | 651 | struct dvb_net dvbnet; |
| @@ -786,6 +789,8 @@ struct ngene { | |||
| 786 | u8 uart_rbuf[UART_RBUF_LEN]; | 789 | u8 uart_rbuf[UART_RBUF_LEN]; |
| 787 | int uart_rp, uart_wp; | 790 | int uart_rp, uart_wp; |
| 788 | 791 | ||
| 792 | #define TS_FILLER 0x6f | ||
| 793 | |||
| 789 | u8 *tsout_buf; | 794 | u8 *tsout_buf; |
| 790 | #define TSOUT_BUF_SIZE (512*188*8) | 795 | #define TSOUT_BUF_SIZE (512*188*8) |
| 791 | struct dvb_ringbuffer tsout_rbuf; | 796 | struct dvb_ringbuffer tsout_rbuf; |
| @@ -852,7 +857,7 @@ struct ngene_info { | |||
| 852 | }; | 857 | }; |
| 853 | 858 | ||
| 854 | #ifdef NGENE_V4L | 859 | #ifdef NGENE_V4L |
| 855 | struct ngene_format{ | 860 | struct ngene_format { |
| 856 | char *name; | 861 | char *name; |
| 857 | int fourcc; /* video4linux 2 */ | 862 | int fourcc; /* video4linux 2 */ |
| 858 | int btformat; /* BT848_COLOR_FMT_* */ | 863 | int btformat; /* BT848_COLOR_FMT_* */ |
diff --git a/drivers/media/dvb/siano/smscoreapi.c b/drivers/media/dvb/siano/smscoreapi.c index 78765ed28063..7331e8450d1a 100644 --- a/drivers/media/dvb/siano/smscoreapi.c +++ b/drivers/media/dvb/siano/smscoreapi.c | |||
| @@ -1147,7 +1147,7 @@ static int smscore_validate_client(struct smscore_device_t *coredev, | |||
| 1147 | 1147 | ||
| 1148 | if (!client) { | 1148 | if (!client) { |
| 1149 | sms_err("bad parameter."); | 1149 | sms_err("bad parameter."); |
| 1150 | return -EFAULT; | 1150 | return -EINVAL; |
| 1151 | } | 1151 | } |
| 1152 | registered_client = smscore_find_client(coredev, data_type, id); | 1152 | registered_client = smscore_find_client(coredev, data_type, id); |
| 1153 | if (registered_client == client) | 1153 | if (registered_client == client) |
diff --git a/drivers/media/dvb/siano/smscoreapi.h b/drivers/media/dvb/siano/smscoreapi.h index 8ecadecaa9d0..c592ae090397 100644 --- a/drivers/media/dvb/siano/smscoreapi.h +++ b/drivers/media/dvb/siano/smscoreapi.h | |||
| @@ -22,7 +22,6 @@ along with this program. If not, see <http://www.gnu.org/licenses/>. | |||
| 22 | #ifndef __SMS_CORE_API_H__ | 22 | #ifndef __SMS_CORE_API_H__ |
| 23 | #define __SMS_CORE_API_H__ | 23 | #define __SMS_CORE_API_H__ |
| 24 | 24 | ||
| 25 | #include <linux/version.h> | ||
| 26 | #include <linux/device.h> | 25 | #include <linux/device.h> |
| 27 | #include <linux/list.h> | 26 | #include <linux/list.h> |
| 28 | #include <linux/mm.h> | 27 | #include <linux/mm.h> |
diff --git a/drivers/media/radio/dsbr100.c b/drivers/media/radio/dsbr100.c index 3d8cc425fa6b..25e58cbf35f0 100644 --- a/drivers/media/radio/dsbr100.c +++ b/drivers/media/radio/dsbr100.c | |||
| @@ -102,10 +102,7 @@ | |||
| 102 | /* | 102 | /* |
| 103 | * Version Information | 103 | * Version Information |
| 104 | */ | 104 | */ |
| 105 | #include <linux/version.h> /* for KERNEL_VERSION MACRO */ | 105 | #define DRIVER_VERSION "0.4.7" |
| 106 | |||
| 107 | #define DRIVER_VERSION "v0.46" | ||
| 108 | #define RADIO_VERSION KERNEL_VERSION(0, 4, 6) | ||
| 109 | 106 | ||
| 110 | #define DRIVER_AUTHOR "Markus Demleitner <msdemlei@tucana.harvard.edu>" | 107 | #define DRIVER_AUTHOR "Markus Demleitner <msdemlei@tucana.harvard.edu>" |
| 111 | #define DRIVER_DESC "D-Link DSB-R100 USB FM radio driver" | 108 | #define DRIVER_DESC "D-Link DSB-R100 USB FM radio driver" |
| @@ -335,7 +332,6 @@ static int vidioc_querycap(struct file *file, void *priv, | |||
| 335 | strlcpy(v->driver, "dsbr100", sizeof(v->driver)); | 332 | strlcpy(v->driver, "dsbr100", sizeof(v->driver)); |
| 336 | strlcpy(v->card, "D-Link R-100 USB FM Radio", sizeof(v->card)); | 333 | strlcpy(v->card, "D-Link R-100 USB FM Radio", sizeof(v->card)); |
| 337 | usb_make_path(radio->usbdev, v->bus_info, sizeof(v->bus_info)); | 334 | usb_make_path(radio->usbdev, v->bus_info, sizeof(v->bus_info)); |
| 338 | v->version = RADIO_VERSION; | ||
| 339 | v->capabilities = V4L2_CAP_TUNER; | 335 | v->capabilities = V4L2_CAP_TUNER; |
| 340 | return 0; | 336 | return 0; |
| 341 | } | 337 | } |
| @@ -647,3 +643,4 @@ module_exit (dsbr100_exit); | |||
| 647 | MODULE_AUTHOR( DRIVER_AUTHOR ); | 643 | MODULE_AUTHOR( DRIVER_AUTHOR ); |
| 648 | MODULE_DESCRIPTION( DRIVER_DESC ); | 644 | MODULE_DESCRIPTION( DRIVER_DESC ); |
| 649 | MODULE_LICENSE("GPL"); | 645 | MODULE_LICENSE("GPL"); |
| 646 | MODULE_VERSION(DRIVER_VERSION); | ||
diff --git a/drivers/media/radio/radio-aimslab.c b/drivers/media/radio/radio-aimslab.c index 4ce10dbeadd8..1c3f8440a55c 100644 --- a/drivers/media/radio/radio-aimslab.c +++ b/drivers/media/radio/radio-aimslab.c | |||
| @@ -33,7 +33,6 @@ | |||
| 33 | #include <linux/ioport.h> /* request_region */ | 33 | #include <linux/ioport.h> /* request_region */ |
| 34 | #include <linux/delay.h> /* msleep */ | 34 | #include <linux/delay.h> /* msleep */ |
| 35 | #include <linux/videodev2.h> /* kernel radio structs */ | 35 | #include <linux/videodev2.h> /* kernel radio structs */ |
| 36 | #include <linux/version.h> /* for KERNEL_VERSION MACRO */ | ||
| 37 | #include <linux/io.h> /* outb, outb_p */ | 36 | #include <linux/io.h> /* outb, outb_p */ |
| 38 | #include <media/v4l2-device.h> | 37 | #include <media/v4l2-device.h> |
| 39 | #include <media/v4l2-ioctl.h> | 38 | #include <media/v4l2-ioctl.h> |
| @@ -41,6 +40,7 @@ | |||
| 41 | MODULE_AUTHOR("M.Kirkwood"); | 40 | MODULE_AUTHOR("M.Kirkwood"); |
| 42 | MODULE_DESCRIPTION("A driver for the RadioTrack/RadioReveal radio card."); | 41 | MODULE_DESCRIPTION("A driver for the RadioTrack/RadioReveal radio card."); |
| 43 | MODULE_LICENSE("GPL"); | 42 | MODULE_LICENSE("GPL"); |
| 43 | MODULE_VERSION("0.0.3"); | ||
| 44 | 44 | ||
| 45 | #ifndef CONFIG_RADIO_RTRACK_PORT | 45 | #ifndef CONFIG_RADIO_RTRACK_PORT |
| 46 | #define CONFIG_RADIO_RTRACK_PORT -1 | 46 | #define CONFIG_RADIO_RTRACK_PORT -1 |
| @@ -53,8 +53,6 @@ module_param(io, int, 0); | |||
| 53 | MODULE_PARM_DESC(io, "I/O address of the RadioTrack card (0x20f or 0x30f)"); | 53 | MODULE_PARM_DESC(io, "I/O address of the RadioTrack card (0x20f or 0x30f)"); |
| 54 | module_param(radio_nr, int, 0); | 54 | module_param(radio_nr, int, 0); |
| 55 | 55 | ||
| 56 | #define RADIO_VERSION KERNEL_VERSION(0, 0, 2) | ||
| 57 | |||
| 58 | struct rtrack | 56 | struct rtrack |
| 59 | { | 57 | { |
| 60 | struct v4l2_device v4l2_dev; | 58 | struct v4l2_device v4l2_dev; |
| @@ -223,7 +221,6 @@ static int vidioc_querycap(struct file *file, void *priv, | |||
| 223 | strlcpy(v->driver, "radio-aimslab", sizeof(v->driver)); | 221 | strlcpy(v->driver, "radio-aimslab", sizeof(v->driver)); |
| 224 | strlcpy(v->card, "RadioTrack", sizeof(v->card)); | 222 | strlcpy(v->card, "RadioTrack", sizeof(v->card)); |
| 225 | strlcpy(v->bus_info, "ISA", sizeof(v->bus_info)); | 223 | strlcpy(v->bus_info, "ISA", sizeof(v->bus_info)); |
| 226 | v->version = RADIO_VERSION; | ||
| 227 | v->capabilities = V4L2_CAP_TUNER | V4L2_CAP_RADIO; | 224 | v->capabilities = V4L2_CAP_TUNER | V4L2_CAP_RADIO; |
| 228 | return 0; | 225 | return 0; |
| 229 | } | 226 | } |
diff --git a/drivers/media/radio/radio-aztech.c b/drivers/media/radio/radio-aztech.c index dd8a6ab0d437..eed7b0840734 100644 --- a/drivers/media/radio/radio-aztech.c +++ b/drivers/media/radio/radio-aztech.c | |||
| @@ -30,7 +30,6 @@ | |||
| 30 | #include <linux/ioport.h> /* request_region */ | 30 | #include <linux/ioport.h> /* request_region */ |
| 31 | #include <linux/delay.h> /* udelay */ | 31 | #include <linux/delay.h> /* udelay */ |
| 32 | #include <linux/videodev2.h> /* kernel radio structs */ | 32 | #include <linux/videodev2.h> /* kernel radio structs */ |
| 33 | #include <linux/version.h> /* for KERNEL_VERSION MACRO */ | ||
| 34 | #include <linux/io.h> /* outb, outb_p */ | 33 | #include <linux/io.h> /* outb, outb_p */ |
| 35 | #include <media/v4l2-device.h> | 34 | #include <media/v4l2-device.h> |
| 36 | #include <media/v4l2-ioctl.h> | 35 | #include <media/v4l2-ioctl.h> |
| @@ -38,6 +37,7 @@ | |||
| 38 | MODULE_AUTHOR("Russell Kroll, Quay Lu, Donald Song, Jason Lewis, Scott McGrath, William McGrath"); | 37 | MODULE_AUTHOR("Russell Kroll, Quay Lu, Donald Song, Jason Lewis, Scott McGrath, William McGrath"); |
| 39 | MODULE_DESCRIPTION("A driver for the Aztech radio card."); | 38 | MODULE_DESCRIPTION("A driver for the Aztech radio card."); |
| 40 | MODULE_LICENSE("GPL"); | 39 | MODULE_LICENSE("GPL"); |
| 40 | MODULE_VERSION("0.0.3"); | ||
| 41 | 41 | ||
| 42 | /* acceptable ports: 0x350 (JP3 shorted), 0x358 (JP3 open) */ | 42 | /* acceptable ports: 0x350 (JP3 shorted), 0x358 (JP3 open) */ |
| 43 | 43 | ||
| @@ -53,8 +53,6 @@ module_param(io, int, 0); | |||
| 53 | module_param(radio_nr, int, 0); | 53 | module_param(radio_nr, int, 0); |
| 54 | MODULE_PARM_DESC(io, "I/O address of the Aztech card (0x350 or 0x358)"); | 54 | MODULE_PARM_DESC(io, "I/O address of the Aztech card (0x350 or 0x358)"); |
| 55 | 55 | ||
| 56 | #define RADIO_VERSION KERNEL_VERSION(0, 0, 2) | ||
| 57 | |||
| 58 | struct aztech | 56 | struct aztech |
| 59 | { | 57 | { |
| 60 | struct v4l2_device v4l2_dev; | 58 | struct v4l2_device v4l2_dev; |
| @@ -188,7 +186,6 @@ static int vidioc_querycap(struct file *file, void *priv, | |||
| 188 | strlcpy(v->driver, "radio-aztech", sizeof(v->driver)); | 186 | strlcpy(v->driver, "radio-aztech", sizeof(v->driver)); |
| 189 | strlcpy(v->card, "Aztech Radio", sizeof(v->card)); | 187 | strlcpy(v->card, "Aztech Radio", sizeof(v->card)); |
| 190 | strlcpy(v->bus_info, "ISA", sizeof(v->bus_info)); | 188 | strlcpy(v->bus_info, "ISA", sizeof(v->bus_info)); |
| 191 | v->version = RADIO_VERSION; | ||
| 192 | v->capabilities = V4L2_CAP_TUNER | V4L2_CAP_RADIO; | 189 | v->capabilities = V4L2_CAP_TUNER | V4L2_CAP_RADIO; |
| 193 | return 0; | 190 | return 0; |
| 194 | } | 191 | } |
diff --git a/drivers/media/radio/radio-cadet.c b/drivers/media/radio/radio-cadet.c index bc9ad0897c55..16a089fad909 100644 --- a/drivers/media/radio/radio-cadet.c +++ b/drivers/media/radio/radio-cadet.c | |||
| @@ -30,7 +30,6 @@ | |||
| 30 | * Changed API to V4L2 | 30 | * Changed API to V4L2 |
| 31 | */ | 31 | */ |
| 32 | 32 | ||
| 33 | #include <linux/version.h> | ||
| 34 | #include <linux/module.h> /* Modules */ | 33 | #include <linux/module.h> /* Modules */ |
| 35 | #include <linux/init.h> /* Initdata */ | 34 | #include <linux/init.h> /* Initdata */ |
| 36 | #include <linux/ioport.h> /* request_region */ | 35 | #include <linux/ioport.h> /* request_region */ |
| @@ -46,6 +45,7 @@ | |||
| 46 | MODULE_AUTHOR("Fred Gleason, Russell Kroll, Quay Lu, Donald Song, Jason Lewis, Scott McGrath, William McGrath"); | 45 | MODULE_AUTHOR("Fred Gleason, Russell Kroll, Quay Lu, Donald Song, Jason Lewis, Scott McGrath, William McGrath"); |
| 47 | MODULE_DESCRIPTION("A driver for the ADS Cadet AM/FM/RDS radio card."); | 46 | MODULE_DESCRIPTION("A driver for the ADS Cadet AM/FM/RDS radio card."); |
| 48 | MODULE_LICENSE("GPL"); | 47 | MODULE_LICENSE("GPL"); |
| 48 | MODULE_VERSION("0.3.4"); | ||
| 49 | 49 | ||
| 50 | static int io = -1; /* default to isapnp activation */ | 50 | static int io = -1; /* default to isapnp activation */ |
| 51 | static int radio_nr = -1; | 51 | static int radio_nr = -1; |
| @@ -54,8 +54,6 @@ module_param(io, int, 0); | |||
| 54 | MODULE_PARM_DESC(io, "I/O address of Cadet card (0x330,0x332,0x334,0x336,0x338,0x33a,0x33c,0x33e)"); | 54 | MODULE_PARM_DESC(io, "I/O address of Cadet card (0x330,0x332,0x334,0x336,0x338,0x33a,0x33c,0x33e)"); |
| 55 | module_param(radio_nr, int, 0); | 55 | module_param(radio_nr, int, 0); |
| 56 | 56 | ||
| 57 | #define CADET_VERSION KERNEL_VERSION(0, 3, 3) | ||
| 58 | |||
| 59 | #define RDS_BUFFER 256 | 57 | #define RDS_BUFFER 256 |
| 60 | #define RDS_RX_FLAG 1 | 58 | #define RDS_RX_FLAG 1 |
| 61 | #define MBS_RX_FLAG 2 | 59 | #define MBS_RX_FLAG 2 |
| @@ -361,7 +359,6 @@ static int vidioc_querycap(struct file *file, void *priv, | |||
| 361 | strlcpy(v->driver, "ADS Cadet", sizeof(v->driver)); | 359 | strlcpy(v->driver, "ADS Cadet", sizeof(v->driver)); |
| 362 | strlcpy(v->card, "ADS Cadet", sizeof(v->card)); | 360 | strlcpy(v->card, "ADS Cadet", sizeof(v->card)); |
| 363 | strlcpy(v->bus_info, "ISA", sizeof(v->bus_info)); | 361 | strlcpy(v->bus_info, "ISA", sizeof(v->bus_info)); |
| 364 | v->version = CADET_VERSION; | ||
| 365 | v->capabilities = V4L2_CAP_TUNER | V4L2_CAP_RADIO | | 362 | v->capabilities = V4L2_CAP_TUNER | V4L2_CAP_RADIO | |
| 366 | V4L2_CAP_READWRITE | V4L2_CAP_RDS_CAPTURE; | 363 | V4L2_CAP_READWRITE | V4L2_CAP_RDS_CAPTURE; |
| 367 | return 0; | 364 | return 0; |
diff --git a/drivers/media/radio/radio-gemtek.c b/drivers/media/radio/radio-gemtek.c index 259936422e49..edadc8449a3d 100644 --- a/drivers/media/radio/radio-gemtek.c +++ b/drivers/media/radio/radio-gemtek.c | |||
| @@ -21,21 +21,19 @@ | |||
| 21 | #include <linux/ioport.h> /* request_region */ | 21 | #include <linux/ioport.h> /* request_region */ |
| 22 | #include <linux/delay.h> /* udelay */ | 22 | #include <linux/delay.h> /* udelay */ |
| 23 | #include <linux/videodev2.h> /* kernel radio structs */ | 23 | #include <linux/videodev2.h> /* kernel radio structs */ |
| 24 | #include <linux/version.h> /* for KERNEL_VERSION MACRO */ | ||
| 25 | #include <linux/mutex.h> | 24 | #include <linux/mutex.h> |
| 26 | #include <linux/io.h> /* outb, outb_p */ | 25 | #include <linux/io.h> /* outb, outb_p */ |
| 27 | #include <media/v4l2-ioctl.h> | 26 | #include <media/v4l2-ioctl.h> |
| 28 | #include <media/v4l2-device.h> | 27 | #include <media/v4l2-device.h> |
| 29 | 28 | ||
| 30 | #define RADIO_VERSION KERNEL_VERSION(0, 0, 3) | ||
| 31 | |||
| 32 | /* | 29 | /* |
| 33 | * Module info. | 30 | * Module info. |
| 34 | */ | 31 | */ |
| 35 | 32 | ||
| 36 | MODULE_AUTHOR("Jonas Munsin, Pekka Seppänen <pexu@kapsi.fi>"); | 33 | MODULE_AUTHOR("Jonas Munsin, Pekka Seppänen <pexu@kapsi.fi>"); |
| 37 | MODULE_DESCRIPTION("A driver for the GemTek Radio card."); | 34 | MODULE_DESCRIPTION("A driver for the GemTek Radio card."); |
| 38 | MODULE_LICENSE("GPL"); | 35 | MODULE_LICENSE("GPL"); |
| 36 | MODULE_VERSION("0.0.4"); | ||
| 39 | 37 | ||
| 40 | /* | 38 | /* |
| 41 | * Module params. | 39 | * Module params. |
| @@ -387,7 +385,6 @@ static int vidioc_querycap(struct file *file, void *priv, | |||
| 387 | strlcpy(v->driver, "radio-gemtek", sizeof(v->driver)); | 385 | strlcpy(v->driver, "radio-gemtek", sizeof(v->driver)); |
| 388 | strlcpy(v->card, "GemTek", sizeof(v->card)); | 386 | strlcpy(v->card, "GemTek", sizeof(v->card)); |
| 389 | strlcpy(v->bus_info, "ISA", sizeof(v->bus_info)); | 387 | strlcpy(v->bus_info, "ISA", sizeof(v->bus_info)); |
| 390 | v->version = RADIO_VERSION; | ||
| 391 | v->capabilities = V4L2_CAP_TUNER | V4L2_CAP_RADIO; | 388 | v->capabilities = V4L2_CAP_TUNER | V4L2_CAP_RADIO; |
| 392 | return 0; | 389 | return 0; |
| 393 | } | 390 | } |
diff --git a/drivers/media/radio/radio-maxiradio.c b/drivers/media/radio/radio-maxiradio.c index e83e84003025..f872a54cf3d9 100644 --- a/drivers/media/radio/radio-maxiradio.c +++ b/drivers/media/radio/radio-maxiradio.c | |||
| @@ -40,15 +40,18 @@ | |||
| 40 | #include <linux/mutex.h> | 40 | #include <linux/mutex.h> |
| 41 | #include <linux/pci.h> | 41 | #include <linux/pci.h> |
| 42 | #include <linux/videodev2.h> | 42 | #include <linux/videodev2.h> |
| 43 | #include <linux/version.h> /* for KERNEL_VERSION MACRO */ | ||
| 44 | #include <linux/io.h> | 43 | #include <linux/io.h> |
| 45 | #include <linux/slab.h> | 44 | #include <linux/slab.h> |
| 46 | #include <media/v4l2-device.h> | 45 | #include <media/v4l2-device.h> |
| 47 | #include <media/v4l2-ioctl.h> | 46 | #include <media/v4l2-ioctl.h> |
| 48 | 47 | ||
| 48 | #define DRIVER_VERSION "0.7.8" | ||
| 49 | |||
| 50 | |||
| 49 | MODULE_AUTHOR("Dimitromanolakis Apostolos, apdim@grecian.net"); | 51 | MODULE_AUTHOR("Dimitromanolakis Apostolos, apdim@grecian.net"); |
| 50 | MODULE_DESCRIPTION("Radio driver for the Guillemot Maxi Radio FM2000 radio."); | 52 | MODULE_DESCRIPTION("Radio driver for the Guillemot Maxi Radio FM2000 radio."); |
| 51 | MODULE_LICENSE("GPL"); | 53 | MODULE_LICENSE("GPL"); |
| 54 | MODULE_VERSION(DRIVER_VERSION); | ||
| 52 | 55 | ||
| 53 | static int radio_nr = -1; | 56 | static int radio_nr = -1; |
| 54 | module_param(radio_nr, int, 0); | 57 | module_param(radio_nr, int, 0); |
| @@ -58,10 +61,6 @@ static int debug; | |||
| 58 | module_param(debug, int, 0644); | 61 | module_param(debug, int, 0644); |
| 59 | MODULE_PARM_DESC(debug, "activates debug info"); | 62 | MODULE_PARM_DESC(debug, "activates debug info"); |
| 60 | 63 | ||
| 61 | #define DRIVER_VERSION "0.77" | ||
| 62 | |||
| 63 | #define RADIO_VERSION KERNEL_VERSION(0, 7, 7) | ||
| 64 | |||
| 65 | #define dprintk(dev, num, fmt, arg...) \ | 64 | #define dprintk(dev, num, fmt, arg...) \ |
| 66 | v4l2_dbg(num, debug, &dev->v4l2_dev, fmt, ## arg) | 65 | v4l2_dbg(num, debug, &dev->v4l2_dev, fmt, ## arg) |
| 67 | 66 | ||
| @@ -195,7 +194,6 @@ static int vidioc_querycap(struct file *file, void *priv, | |||
| 195 | strlcpy(v->driver, "radio-maxiradio", sizeof(v->driver)); | 194 | strlcpy(v->driver, "radio-maxiradio", sizeof(v->driver)); |
| 196 | strlcpy(v->card, "Maxi Radio FM2000 radio", sizeof(v->card)); | 195 | strlcpy(v->card, "Maxi Radio FM2000 radio", sizeof(v->card)); |
| 197 | snprintf(v->bus_info, sizeof(v->bus_info), "PCI:%s", pci_name(dev->pdev)); | 196 | snprintf(v->bus_info, sizeof(v->bus_info), "PCI:%s", pci_name(dev->pdev)); |
| 198 | v->version = RADIO_VERSION; | ||
| 199 | v->capabilities = V4L2_CAP_TUNER | V4L2_CAP_RADIO; | 197 | v->capabilities = V4L2_CAP_TUNER | V4L2_CAP_RADIO; |
| 200 | return 0; | 198 | return 0; |
| 201 | } | 199 | } |
diff --git a/drivers/media/radio/radio-mr800.c b/drivers/media/radio/radio-mr800.c index b3a635b95820..1742bd8110bd 100644 --- a/drivers/media/radio/radio-mr800.c +++ b/drivers/media/radio/radio-mr800.c | |||
| @@ -63,18 +63,17 @@ | |||
| 63 | #include <media/v4l2-device.h> | 63 | #include <media/v4l2-device.h> |
| 64 | #include <media/v4l2-ioctl.h> | 64 | #include <media/v4l2-ioctl.h> |
| 65 | #include <linux/usb.h> | 65 | #include <linux/usb.h> |
| 66 | #include <linux/version.h> /* for KERNEL_VERSION MACRO */ | ||
| 67 | #include <linux/mutex.h> | 66 | #include <linux/mutex.h> |
| 68 | 67 | ||
| 69 | /* driver and module definitions */ | 68 | /* driver and module definitions */ |
| 70 | #define DRIVER_AUTHOR "Alexey Klimov <klimov.linux@gmail.com>" | 69 | #define DRIVER_AUTHOR "Alexey Klimov <klimov.linux@gmail.com>" |
| 71 | #define DRIVER_DESC "AverMedia MR 800 USB FM radio driver" | 70 | #define DRIVER_DESC "AverMedia MR 800 USB FM radio driver" |
| 72 | #define DRIVER_VERSION "0.11" | 71 | #define DRIVER_VERSION "0.1.2" |
| 73 | #define RADIO_VERSION KERNEL_VERSION(0, 1, 1) | ||
| 74 | 72 | ||
| 75 | MODULE_AUTHOR(DRIVER_AUTHOR); | 73 | MODULE_AUTHOR(DRIVER_AUTHOR); |
| 76 | MODULE_DESCRIPTION(DRIVER_DESC); | 74 | MODULE_DESCRIPTION(DRIVER_DESC); |
| 77 | MODULE_LICENSE("GPL"); | 75 | MODULE_LICENSE("GPL"); |
| 76 | MODULE_VERSION(DRIVER_VERSION); | ||
| 78 | 77 | ||
| 79 | #define USB_AMRADIO_VENDOR 0x07ca | 78 | #define USB_AMRADIO_VENDOR 0x07ca |
| 80 | #define USB_AMRADIO_PRODUCT 0xb800 | 79 | #define USB_AMRADIO_PRODUCT 0xb800 |
| @@ -301,7 +300,6 @@ static int vidioc_querycap(struct file *file, void *priv, | |||
| 301 | strlcpy(v->driver, "radio-mr800", sizeof(v->driver)); | 300 | strlcpy(v->driver, "radio-mr800", sizeof(v->driver)); |
| 302 | strlcpy(v->card, "AverMedia MR 800 USB FM Radio", sizeof(v->card)); | 301 | strlcpy(v->card, "AverMedia MR 800 USB FM Radio", sizeof(v->card)); |
| 303 | usb_make_path(radio->usbdev, v->bus_info, sizeof(v->bus_info)); | 302 | usb_make_path(radio->usbdev, v->bus_info, sizeof(v->bus_info)); |
| 304 | v->version = RADIO_VERSION; | ||
| 305 | v->capabilities = V4L2_CAP_TUNER; | 303 | v->capabilities = V4L2_CAP_TUNER; |
| 306 | return 0; | 304 | return 0; |
| 307 | } | 305 | } |
diff --git a/drivers/media/radio/radio-rtrack2.c b/drivers/media/radio/radio-rtrack2.c index 8d6ea591bd18..3628be617ee9 100644 --- a/drivers/media/radio/radio-rtrack2.c +++ b/drivers/media/radio/radio-rtrack2.c | |||
| @@ -15,7 +15,6 @@ | |||
| 15 | #include <linux/delay.h> /* udelay */ | 15 | #include <linux/delay.h> /* udelay */ |
| 16 | #include <linux/videodev2.h> /* kernel radio structs */ | 16 | #include <linux/videodev2.h> /* kernel radio structs */ |
| 17 | #include <linux/mutex.h> | 17 | #include <linux/mutex.h> |
| 18 | #include <linux/version.h> /* for KERNEL_VERSION MACRO */ | ||
| 19 | #include <linux/io.h> /* outb, outb_p */ | 18 | #include <linux/io.h> /* outb, outb_p */ |
| 20 | #include <media/v4l2-device.h> | 19 | #include <media/v4l2-device.h> |
| 21 | #include <media/v4l2-ioctl.h> | 20 | #include <media/v4l2-ioctl.h> |
| @@ -23,6 +22,7 @@ | |||
| 23 | MODULE_AUTHOR("Ben Pfaff"); | 22 | MODULE_AUTHOR("Ben Pfaff"); |
| 24 | MODULE_DESCRIPTION("A driver for the RadioTrack II radio card."); | 23 | MODULE_DESCRIPTION("A driver for the RadioTrack II radio card."); |
| 25 | MODULE_LICENSE("GPL"); | 24 | MODULE_LICENSE("GPL"); |
| 25 | MODULE_VERSION("0.0.3"); | ||
| 26 | 26 | ||
| 27 | #ifndef CONFIG_RADIO_RTRACK2_PORT | 27 | #ifndef CONFIG_RADIO_RTRACK2_PORT |
| 28 | #define CONFIG_RADIO_RTRACK2_PORT -1 | 28 | #define CONFIG_RADIO_RTRACK2_PORT -1 |
| @@ -35,8 +35,6 @@ module_param(io, int, 0); | |||
| 35 | MODULE_PARM_DESC(io, "I/O address of the RadioTrack card (0x20c or 0x30c)"); | 35 | MODULE_PARM_DESC(io, "I/O address of the RadioTrack card (0x20c or 0x30c)"); |
| 36 | module_param(radio_nr, int, 0); | 36 | module_param(radio_nr, int, 0); |
| 37 | 37 | ||
| 38 | #define RADIO_VERSION KERNEL_VERSION(0, 0, 2) | ||
| 39 | |||
| 40 | struct rtrack2 | 38 | struct rtrack2 |
| 41 | { | 39 | { |
| 42 | struct v4l2_device v4l2_dev; | 40 | struct v4l2_device v4l2_dev; |
| @@ -121,7 +119,6 @@ static int vidioc_querycap(struct file *file, void *priv, | |||
| 121 | strlcpy(v->driver, "radio-rtrack2", sizeof(v->driver)); | 119 | strlcpy(v->driver, "radio-rtrack2", sizeof(v->driver)); |
| 122 | strlcpy(v->card, "RadioTrack II", sizeof(v->card)); | 120 | strlcpy(v->card, "RadioTrack II", sizeof(v->card)); |
| 123 | strlcpy(v->bus_info, "ISA", sizeof(v->bus_info)); | 121 | strlcpy(v->bus_info, "ISA", sizeof(v->bus_info)); |
| 124 | v->version = RADIO_VERSION; | ||
| 125 | v->capabilities = V4L2_CAP_TUNER | V4L2_CAP_RADIO; | 122 | v->capabilities = V4L2_CAP_TUNER | V4L2_CAP_RADIO; |
| 126 | return 0; | 123 | return 0; |
| 127 | } | 124 | } |
diff --git a/drivers/media/radio/radio-sf16fmi.c b/drivers/media/radio/radio-sf16fmi.c index b5a5f89e238a..22c5743bf9db 100644 --- a/drivers/media/radio/radio-sf16fmi.c +++ b/drivers/media/radio/radio-sf16fmi.c | |||
| @@ -16,7 +16,6 @@ | |||
| 16 | * Converted to V4L2 API by Mauro Carvalho Chehab <mchehab@infradead.org> | 16 | * Converted to V4L2 API by Mauro Carvalho Chehab <mchehab@infradead.org> |
| 17 | */ | 17 | */ |
| 18 | 18 | ||
| 19 | #include <linux/version.h> | ||
| 20 | #include <linux/kernel.h> /* __setup */ | 19 | #include <linux/kernel.h> /* __setup */ |
| 21 | #include <linux/module.h> /* Modules */ | 20 | #include <linux/module.h> /* Modules */ |
| 22 | #include <linux/init.h> /* Initdata */ | 21 | #include <linux/init.h> /* Initdata */ |
| @@ -32,6 +31,7 @@ | |||
| 32 | MODULE_AUTHOR("Petr Vandrovec, vandrove@vc.cvut.cz and M. Kirkwood"); | 31 | MODULE_AUTHOR("Petr Vandrovec, vandrove@vc.cvut.cz and M. Kirkwood"); |
| 33 | MODULE_DESCRIPTION("A driver for the SF16-FMI and SF16-FMP radio."); | 32 | MODULE_DESCRIPTION("A driver for the SF16-FMI and SF16-FMP radio."); |
| 34 | MODULE_LICENSE("GPL"); | 33 | MODULE_LICENSE("GPL"); |
| 34 | MODULE_VERSION("0.0.3"); | ||
| 35 | 35 | ||
| 36 | static int io = -1; | 36 | static int io = -1; |
| 37 | static int radio_nr = -1; | 37 | static int radio_nr = -1; |
| @@ -40,8 +40,6 @@ module_param(io, int, 0); | |||
| 40 | MODULE_PARM_DESC(io, "I/O address of the SF16-FMI or SF16-FMP card (0x284 or 0x384)"); | 40 | MODULE_PARM_DESC(io, "I/O address of the SF16-FMI or SF16-FMP card (0x284 or 0x384)"); |
| 41 | module_param(radio_nr, int, 0); | 41 | module_param(radio_nr, int, 0); |
| 42 | 42 | ||
| 43 | #define RADIO_VERSION KERNEL_VERSION(0, 0, 2) | ||
| 44 | |||
| 45 | struct fmi | 43 | struct fmi |
| 46 | { | 44 | { |
| 47 | struct v4l2_device v4l2_dev; | 45 | struct v4l2_device v4l2_dev; |
| @@ -134,7 +132,6 @@ static int vidioc_querycap(struct file *file, void *priv, | |||
| 134 | strlcpy(v->driver, "radio-sf16fmi", sizeof(v->driver)); | 132 | strlcpy(v->driver, "radio-sf16fmi", sizeof(v->driver)); |
| 135 | strlcpy(v->card, "SF16-FMx radio", sizeof(v->card)); | 133 | strlcpy(v->card, "SF16-FMx radio", sizeof(v->card)); |
| 136 | strlcpy(v->bus_info, "ISA", sizeof(v->bus_info)); | 134 | strlcpy(v->bus_info, "ISA", sizeof(v->bus_info)); |
| 137 | v->version = RADIO_VERSION; | ||
| 138 | v->capabilities = V4L2_CAP_TUNER | V4L2_CAP_RADIO; | 135 | v->capabilities = V4L2_CAP_TUNER | V4L2_CAP_RADIO; |
| 139 | return 0; | 136 | return 0; |
| 140 | } | 137 | } |
diff --git a/drivers/media/radio/radio-sf16fmr2.c b/drivers/media/radio/radio-sf16fmr2.c index 87bad7678d92..2dd485996ba8 100644 --- a/drivers/media/radio/radio-sf16fmr2.c +++ b/drivers/media/radio/radio-sf16fmr2.c | |||
| @@ -1,441 +1,209 @@ | |||
| 1 | /* SF16FMR2 radio driver for Linux radio support | 1 | /* SF16-FMR2 radio driver for Linux |
| 2 | * heavily based on fmi driver... | 2 | * Copyright (c) 2011 Ondrej Zary |
| 3 | * (c) 2000-2002 Ziglio Frediano, freddy77@angelfire.com | ||
| 4 | * | 3 | * |
| 5 | * Notes on the hardware | 4 | * Original driver was (c) 2000-2002 Ziglio Frediano, freddy77@angelfire.com |
| 6 | * | 5 | * but almost nothing remained here after conversion to generic TEA575x |
| 7 | * Frequency control is done digitally -- ie out(port,encodefreq(95.8)); | 6 | * implementation |
| 8 | * No volume control - only mute/unmute - you have to use line volume | ||
| 9 | * | ||
| 10 | * For read stereo/mono you must wait 0.1 sec after set frequency and | ||
| 11 | * card unmuted so I set frequency on unmute | ||
| 12 | * Signal handling seem to work only on autoscanning (not implemented) | ||
| 13 | * | ||
| 14 | * Converted to V4L2 API by Mauro Carvalho Chehab <mchehab@infradead.org> | ||
| 15 | */ | 7 | */ |
| 16 | 8 | ||
| 9 | #include <linux/delay.h> | ||
| 17 | #include <linux/module.h> /* Modules */ | 10 | #include <linux/module.h> /* Modules */ |
| 18 | #include <linux/init.h> /* Initdata */ | 11 | #include <linux/init.h> /* Initdata */ |
| 19 | #include <linux/ioport.h> /* request_region */ | 12 | #include <linux/ioport.h> /* request_region */ |
| 20 | #include <linux/delay.h> /* udelay */ | ||
| 21 | #include <linux/videodev2.h> /* kernel radio structs */ | ||
| 22 | #include <linux/mutex.h> | ||
| 23 | #include <linux/version.h> /* for KERNEL_VERSION MACRO */ | ||
| 24 | #include <linux/io.h> /* outb, outb_p */ | 13 | #include <linux/io.h> /* outb, outb_p */ |
| 25 | #include <media/v4l2-device.h> | 14 | #include <sound/tea575x-tuner.h> |
| 26 | #include <media/v4l2-ioctl.h> | ||
| 27 | 15 | ||
| 28 | MODULE_AUTHOR("Ziglio Frediano, freddy77@angelfire.com"); | 16 | MODULE_AUTHOR("Ondrej Zary"); |
| 29 | MODULE_DESCRIPTION("A driver for the SF16FMR2 radio."); | 17 | MODULE_DESCRIPTION("MediaForte SF16-FMR2 FM radio card driver"); |
| 30 | MODULE_LICENSE("GPL"); | 18 | MODULE_LICENSE("GPL"); |
| 31 | 19 | ||
| 32 | static int io = 0x384; | 20 | struct fmr2 { |
| 33 | static int radio_nr = -1; | ||
| 34 | |||
| 35 | module_param(io, int, 0); | ||
| 36 | MODULE_PARM_DESC(io, "I/O address of the SF16FMR2 card (should be 0x384, if do not work try 0x284)"); | ||
| 37 | module_param(radio_nr, int, 0); | ||
| 38 | |||
| 39 | #define RADIO_VERSION KERNEL_VERSION(0,0,2) | ||
| 40 | |||
| 41 | #define AUD_VOL_INDEX 1 | ||
| 42 | |||
| 43 | #undef DEBUG | ||
| 44 | //#define DEBUG 1 | ||
| 45 | |||
| 46 | #ifdef DEBUG | ||
| 47 | # define debug_print(s) printk s | ||
| 48 | #else | ||
| 49 | # define debug_print(s) | ||
| 50 | #endif | ||
| 51 | |||
| 52 | /* this should be static vars for module size */ | ||
| 53 | struct fmr2 | ||
| 54 | { | ||
| 55 | struct v4l2_device v4l2_dev; | ||
| 56 | struct video_device vdev; | ||
| 57 | struct mutex lock; | ||
| 58 | int io; | 21 | int io; |
| 59 | int curvol; /* 0-15 */ | 22 | struct snd_tea575x tea; |
| 60 | int mute; | 23 | struct v4l2_ctrl *volume; |
| 61 | int stereo; /* card is producing stereo audio */ | 24 | struct v4l2_ctrl *balance; |
| 62 | unsigned long curfreq; /* freq in kHz */ | ||
| 63 | int card_type; | ||
| 64 | }; | 25 | }; |
| 65 | 26 | ||
| 27 | /* the port is hardwired so no need to support multiple cards */ | ||
| 28 | #define FMR2_PORT 0x384 | ||
| 66 | static struct fmr2 fmr2_card; | 29 | static struct fmr2 fmr2_card; |
| 67 | 30 | ||
| 68 | /* hw precision is 12.5 kHz | 31 | /* TEA575x tuner pins */ |
| 69 | * It is only useful to give freq in interval of 200 (=0.0125Mhz), | 32 | #define STR_DATA (1 << 0) |
| 70 | * other bits will be truncated | 33 | #define STR_CLK (1 << 1) |
| 71 | */ | 34 | #define STR_WREN (1 << 2) |
| 72 | #define RSF16_ENCODE(x) ((x) / 200 + 856) | 35 | #define STR_MOST (1 << 3) |
| 73 | #define RSF16_MINFREQ (87 * 16000) | 36 | /* PT2254A/TC9154A volume control pins */ |
| 74 | #define RSF16_MAXFREQ (108 * 16000) | 37 | #define PT_ST (1 << 4) |
| 75 | 38 | #define PT_CK (1 << 5) | |
| 76 | static inline void wait(int n, int io) | 39 | #define PT_DATA (1 << 6) |
| 77 | { | 40 | /* volume control presence pin */ |
| 78 | for (; n; --n) | 41 | #define FMR2_HASVOL (1 << 7) |
| 79 | inb(io); | ||
| 80 | } | ||
| 81 | |||
| 82 | static void outbits(int bits, unsigned int data, int nWait, int io) | ||
| 83 | { | ||
| 84 | int bit; | ||
| 85 | |||
| 86 | for (; --bits >= 0;) { | ||
| 87 | bit = (data >> bits) & 1; | ||
| 88 | outb(bit, io); | ||
| 89 | wait(nWait, io); | ||
| 90 | outb(bit | 2, io); | ||
| 91 | wait(nWait, io); | ||
| 92 | outb(bit, io); | ||
| 93 | wait(nWait, io); | ||
| 94 | } | ||
| 95 | } | ||
| 96 | |||
| 97 | static inline void fmr2_mute(int io) | ||
| 98 | { | ||
| 99 | outb(0x00, io); | ||
| 100 | wait(4, io); | ||
| 101 | } | ||
| 102 | |||
| 103 | static inline void fmr2_unmute(int io) | ||
| 104 | { | ||
| 105 | outb(0x04, io); | ||
| 106 | wait(4, io); | ||
| 107 | } | ||
| 108 | |||
| 109 | static inline int fmr2_stereo_mode(int io) | ||
| 110 | { | ||
| 111 | int n = inb(io); | ||
| 112 | |||
| 113 | outb(6, io); | ||
| 114 | inb(io); | ||
| 115 | n = ((n >> 3) & 1) ^ 1; | ||
| 116 | debug_print((KERN_DEBUG "stereo: %d\n", n)); | ||
| 117 | return n; | ||
| 118 | } | ||
| 119 | |||
| 120 | static int fmr2_product_info(struct fmr2 *dev) | ||
| 121 | { | ||
| 122 | int n = inb(dev->io); | ||
| 123 | |||
| 124 | n &= 0xC1; | ||
| 125 | if (n == 0) { | ||
| 126 | /* this should support volume set */ | ||
| 127 | dev->card_type = 12; | ||
| 128 | return 0; | ||
| 129 | } | ||
| 130 | /* not volume (mine is 11) */ | ||
| 131 | dev->card_type = (n == 128) ? 11 : 0; | ||
| 132 | return n; | ||
| 133 | } | ||
| 134 | 42 | ||
| 135 | static inline int fmr2_getsigstr(struct fmr2 *dev) | 43 | static void fmr2_tea575x_set_pins(struct snd_tea575x *tea, u8 pins) |
| 136 | { | 44 | { |
| 137 | /* !!! works only if scanning freq */ | 45 | struct fmr2 *fmr2 = tea->private_data; |
| 138 | int res = 0xffff; | 46 | u8 bits = 0; |
| 139 | |||
| 140 | outb(5, dev->io); | ||
| 141 | wait(4, dev->io); | ||
| 142 | if (!(inb(dev->io) & 1)) | ||
| 143 | res = 0; | ||
| 144 | debug_print((KERN_DEBUG "signal: %d\n", res)); | ||
| 145 | return res; | ||
| 146 | } | ||
| 147 | |||
| 148 | /* set frequency and unmute card */ | ||
| 149 | static int fmr2_setfreq(struct fmr2 *dev) | ||
| 150 | { | ||
| 151 | unsigned long freq = dev->curfreq; | ||
| 152 | |||
| 153 | fmr2_mute(dev->io); | ||
| 154 | |||
| 155 | /* 0x42 for mono output | ||
| 156 | * 0x102 forward scanning | ||
| 157 | * 0x182 scansione avanti | ||
| 158 | */ | ||
| 159 | outbits(9, 0x2, 3, dev->io); | ||
| 160 | outbits(16, RSF16_ENCODE(freq), 2, dev->io); | ||
| 161 | |||
| 162 | fmr2_unmute(dev->io); | ||
| 163 | 47 | ||
| 164 | /* wait 0.11 sec */ | 48 | bits |= (pins & TEA575X_DATA) ? STR_DATA : 0; |
| 165 | msleep(110); | 49 | bits |= (pins & TEA575X_CLK) ? STR_CLK : 0; |
| 50 | /* WRITE_ENABLE is inverted, DATA must be high during read */ | ||
| 51 | bits |= (pins & TEA575X_WREN) ? 0 : STR_WREN | STR_DATA; | ||
| 166 | 52 | ||
| 167 | /* NOTE if mute this stop radio | 53 | outb(bits, fmr2->io); |
| 168 | you must set freq on unmute */ | ||
| 169 | dev->stereo = fmr2_stereo_mode(dev->io); | ||
| 170 | return 0; | ||
| 171 | } | ||
| 172 | |||
| 173 | /* !!! not tested, in my card this doesn't work !!! */ | ||
| 174 | static int fmr2_setvolume(struct fmr2 *dev) | ||
| 175 | { | ||
| 176 | int vol[16] = { 0x021, 0x084, 0x090, 0x104, | ||
| 177 | 0x110, 0x204, 0x210, 0x402, | ||
| 178 | 0x404, 0x408, 0x410, 0x801, | ||
| 179 | 0x802, 0x804, 0x808, 0x810 }; | ||
| 180 | int i, a; | ||
| 181 | int n = vol[dev->curvol & 0x0f]; | ||
| 182 | |||
| 183 | if (dev->card_type != 11) | ||
| 184 | return 1; | ||
| 185 | |||
| 186 | for (i = 12; --i >= 0; ) { | ||
| 187 | a = ((n >> i) & 1) << 6; /* if (a==0) a = 0; else a = 0x40; */ | ||
| 188 | outb(a | 4, dev->io); | ||
| 189 | wait(4, dev->io); | ||
| 190 | outb(a | 0x24, dev->io); | ||
| 191 | wait(4, dev->io); | ||
| 192 | outb(a | 4, dev->io); | ||
| 193 | wait(4, dev->io); | ||
| 194 | } | ||
| 195 | for (i = 6; --i >= 0; ) { | ||
| 196 | a = ((0x18 >> i) & 1) << 6; | ||
| 197 | outb(a | 4, dev->io); | ||
| 198 | wait(4, dev->io); | ||
| 199 | outb(a | 0x24, dev->io); | ||
| 200 | wait(4, dev->io); | ||
| 201 | outb(a | 4, dev->io); | ||
| 202 | wait(4, dev->io); | ||
| 203 | } | ||
| 204 | wait(4, dev->io); | ||
| 205 | outb(0x14, dev->io); | ||
| 206 | return 0; | ||
| 207 | } | 54 | } |
| 208 | 55 | ||
| 209 | static int vidioc_querycap(struct file *file, void *priv, | 56 | static u8 fmr2_tea575x_get_pins(struct snd_tea575x *tea) |
| 210 | struct v4l2_capability *v) | ||
| 211 | { | 57 | { |
| 212 | strlcpy(v->driver, "radio-sf16fmr2", sizeof(v->driver)); | 58 | struct fmr2 *fmr2 = tea->private_data; |
| 213 | strlcpy(v->card, "SF16-FMR2 radio", sizeof(v->card)); | 59 | u8 bits = inb(fmr2->io); |
| 214 | strlcpy(v->bus_info, "ISA", sizeof(v->bus_info)); | ||
| 215 | v->version = RADIO_VERSION; | ||
| 216 | v->capabilities = V4L2_CAP_TUNER | V4L2_CAP_RADIO; | ||
| 217 | return 0; | ||
| 218 | } | ||
| 219 | |||
| 220 | static int vidioc_g_tuner(struct file *file, void *priv, | ||
| 221 | struct v4l2_tuner *v) | ||
| 222 | { | ||
| 223 | struct fmr2 *fmr2 = video_drvdata(file); | ||
| 224 | |||
| 225 | if (v->index > 0) | ||
| 226 | return -EINVAL; | ||
| 227 | 60 | ||
| 228 | strlcpy(v->name, "FM", sizeof(v->name)); | 61 | return (bits & STR_DATA) ? TEA575X_DATA : 0 | |
| 229 | v->type = V4L2_TUNER_RADIO; | 62 | (bits & STR_MOST) ? TEA575X_MOST : 0; |
| 230 | |||
| 231 | v->rangelow = RSF16_MINFREQ; | ||
| 232 | v->rangehigh = RSF16_MAXFREQ; | ||
| 233 | v->rxsubchans = fmr2->stereo ? V4L2_TUNER_SUB_STEREO : | ||
| 234 | V4L2_TUNER_SUB_MONO; | ||
| 235 | v->capability = V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_LOW; | ||
| 236 | v->audmode = V4L2_TUNER_MODE_STEREO; | ||
| 237 | mutex_lock(&fmr2->lock); | ||
| 238 | v->signal = fmr2_getsigstr(fmr2); | ||
| 239 | mutex_unlock(&fmr2->lock); | ||
| 240 | return 0; | ||
| 241 | } | 63 | } |
| 242 | 64 | ||
| 243 | static int vidioc_s_tuner(struct file *file, void *priv, | 65 | static void fmr2_tea575x_set_direction(struct snd_tea575x *tea, bool output) |
| 244 | struct v4l2_tuner *v) | ||
| 245 | { | 66 | { |
| 246 | return v->index ? -EINVAL : 0; | ||
| 247 | } | 67 | } |
| 248 | 68 | ||
| 249 | static int vidioc_s_frequency(struct file *file, void *priv, | 69 | static struct snd_tea575x_ops fmr2_tea_ops = { |
| 250 | struct v4l2_frequency *f) | 70 | .set_pins = fmr2_tea575x_set_pins, |
| 251 | { | 71 | .get_pins = fmr2_tea575x_get_pins, |
| 252 | struct fmr2 *fmr2 = video_drvdata(file); | 72 | .set_direction = fmr2_tea575x_set_direction, |
| 73 | }; | ||
| 253 | 74 | ||
| 254 | if (f->tuner != 0 || f->type != V4L2_TUNER_RADIO) | 75 | /* TC9154A/PT2254A volume control */ |
| 255 | return -EINVAL; | 76 | |
| 256 | if (f->frequency < RSF16_MINFREQ || | 77 | /* 18-bit shift register bit definitions */ |
| 257 | f->frequency > RSF16_MAXFREQ) | 78 | #define TC9154A_ATT_MAJ_0DB (1 << 0) |
| 258 | return -EINVAL; | 79 | #define TC9154A_ATT_MAJ_10DB (1 << 1) |
| 259 | /* rounding in steps of 200 to match the freq | 80 | #define TC9154A_ATT_MAJ_20DB (1 << 2) |
| 260 | that will be used */ | 81 | #define TC9154A_ATT_MAJ_30DB (1 << 3) |
| 261 | fmr2->curfreq = (f->frequency / 200) * 200; | 82 | #define TC9154A_ATT_MAJ_40DB (1 << 4) |
| 262 | 83 | #define TC9154A_ATT_MAJ_50DB (1 << 5) | |
| 263 | /* set card freq (if not muted) */ | 84 | #define TC9154A_ATT_MAJ_60DB (1 << 6) |
| 264 | if (fmr2->curvol && !fmr2->mute) { | 85 | |
| 265 | mutex_lock(&fmr2->lock); | 86 | #define TC9154A_ATT_MIN_0DB (1 << 7) |
| 266 | fmr2_setfreq(fmr2); | 87 | #define TC9154A_ATT_MIN_2DB (1 << 8) |
| 267 | mutex_unlock(&fmr2->lock); | 88 | #define TC9154A_ATT_MIN_4DB (1 << 9) |
| 89 | #define TC9154A_ATT_MIN_6DB (1 << 10) | ||
| 90 | #define TC9154A_ATT_MIN_8DB (1 << 11) | ||
| 91 | /* bit 12 is ignored */ | ||
| 92 | #define TC9154A_CHANNEL_LEFT (1 << 13) | ||
| 93 | #define TC9154A_CHANNEL_RIGHT (1 << 14) | ||
| 94 | /* bits 15, 16, 17 must be 0 */ | ||
| 95 | |||
| 96 | #define TC9154A_ATT_MAJ(x) (1 << x) | ||
| 97 | #define TC9154A_ATT_MIN(x) (1 << (7 + x)) | ||
| 98 | |||
| 99 | static void tc9154a_set_pins(struct fmr2 *fmr2, u8 pins) | ||
| 100 | { | ||
| 101 | if (!fmr2->tea.mute) | ||
| 102 | pins |= STR_WREN; | ||
| 103 | |||
| 104 | outb(pins, fmr2->io); | ||
| 105 | } | ||
| 106 | |||
| 107 | static void tc9154a_set_attenuation(struct fmr2 *fmr2, int att, u32 channel) | ||
| 108 | { | ||
| 109 | int i; | ||
| 110 | u32 reg; | ||
| 111 | u8 bit; | ||
| 112 | |||
| 113 | reg = TC9154A_ATT_MAJ(att / 10) | TC9154A_ATT_MIN((att % 10) / 2); | ||
| 114 | reg |= channel; | ||
| 115 | /* write 18-bit shift register, LSB first */ | ||
| 116 | for (i = 0; i < 18; i++) { | ||
| 117 | bit = reg & (1 << i) ? PT_DATA : 0; | ||
| 118 | tc9154a_set_pins(fmr2, bit); | ||
| 119 | udelay(5); | ||
| 120 | tc9154a_set_pins(fmr2, bit | PT_CK); | ||
| 121 | udelay(5); | ||
| 122 | tc9154a_set_pins(fmr2, bit); | ||
| 268 | } | 123 | } |
| 269 | return 0; | ||
| 270 | } | ||
| 271 | |||
| 272 | static int vidioc_g_frequency(struct file *file, void *priv, | ||
| 273 | struct v4l2_frequency *f) | ||
| 274 | { | ||
| 275 | struct fmr2 *fmr2 = video_drvdata(file); | ||
| 276 | |||
| 277 | if (f->tuner != 0) | ||
| 278 | return -EINVAL; | ||
| 279 | f->type = V4L2_TUNER_RADIO; | ||
| 280 | f->frequency = fmr2->curfreq; | ||
| 281 | return 0; | ||
| 282 | } | ||
| 283 | 124 | ||
| 284 | static int vidioc_queryctrl(struct file *file, void *priv, | 125 | /* latch register data */ |
| 285 | struct v4l2_queryctrl *qc) | 126 | udelay(5); |
| 286 | { | 127 | tc9154a_set_pins(fmr2, PT_ST); |
| 287 | struct fmr2 *fmr2 = video_drvdata(file); | 128 | udelay(5); |
| 288 | 129 | tc9154a_set_pins(fmr2, 0); | |
| 289 | switch (qc->id) { | ||
| 290 | case V4L2_CID_AUDIO_MUTE: | ||
| 291 | return v4l2_ctrl_query_fill(qc, 0, 1, 1, 1); | ||
| 292 | case V4L2_CID_AUDIO_VOLUME: | ||
| 293 | /* Only card_type == 11 implements volume */ | ||
| 294 | if (fmr2->card_type == 11) | ||
| 295 | return v4l2_ctrl_query_fill(qc, 0, 15, 1, 0); | ||
| 296 | return v4l2_ctrl_query_fill(qc, 0, 1, 1, 0); | ||
| 297 | } | ||
| 298 | return -EINVAL; | ||
| 299 | } | 130 | } |
| 300 | 131 | ||
| 301 | static int vidioc_g_ctrl(struct file *file, void *priv, | 132 | static int fmr2_s_ctrl(struct v4l2_ctrl *ctrl) |
| 302 | struct v4l2_control *ctrl) | ||
| 303 | { | 133 | { |
| 304 | struct fmr2 *fmr2 = video_drvdata(file); | 134 | struct snd_tea575x *tea = container_of(ctrl->handler, struct snd_tea575x, ctrl_handler); |
| 135 | struct fmr2 *fmr2 = tea->private_data; | ||
| 136 | int volume, balance, left, right; | ||
| 305 | 137 | ||
| 306 | switch (ctrl->id) { | 138 | switch (ctrl->id) { |
| 307 | case V4L2_CID_AUDIO_MUTE: | ||
| 308 | ctrl->value = fmr2->mute; | ||
| 309 | return 0; | ||
| 310 | case V4L2_CID_AUDIO_VOLUME: | 139 | case V4L2_CID_AUDIO_VOLUME: |
| 311 | ctrl->value = fmr2->curvol; | 140 | volume = ctrl->val; |
| 312 | return 0; | 141 | balance = fmr2->balance->cur.val; |
| 313 | } | ||
| 314 | return -EINVAL; | ||
| 315 | } | ||
| 316 | |||
| 317 | static int vidioc_s_ctrl(struct file *file, void *priv, | ||
| 318 | struct v4l2_control *ctrl) | ||
| 319 | { | ||
| 320 | struct fmr2 *fmr2 = video_drvdata(file); | ||
| 321 | |||
| 322 | switch (ctrl->id) { | ||
| 323 | case V4L2_CID_AUDIO_MUTE: | ||
| 324 | fmr2->mute = ctrl->value; | ||
| 325 | break; | 142 | break; |
| 326 | case V4L2_CID_AUDIO_VOLUME: | 143 | case V4L2_CID_AUDIO_BALANCE: |
| 327 | fmr2->curvol = ctrl->value; | 144 | balance = ctrl->val; |
| 145 | volume = fmr2->volume->cur.val; | ||
| 328 | break; | 146 | break; |
| 329 | default: | 147 | default: |
| 330 | return -EINVAL; | 148 | return -EINVAL; |
| 331 | } | 149 | } |
| 332 | 150 | ||
| 333 | #ifdef DEBUG | 151 | left = right = volume; |
| 334 | if (fmr2->curvol && !fmr2->mute) | 152 | if (balance < 0) |
| 335 | printk(KERN_DEBUG "unmute\n"); | 153 | right = max(0, right + balance); |
| 336 | else | 154 | if (balance > 0) |
| 337 | printk(KERN_DEBUG "mute\n"); | 155 | left = max(0, left - balance); |
| 338 | #endif | ||
| 339 | |||
| 340 | mutex_lock(&fmr2->lock); | ||
| 341 | if (fmr2->curvol && !fmr2->mute) { | ||
| 342 | fmr2_setvolume(fmr2); | ||
| 343 | /* Set frequency and unmute card */ | ||
| 344 | fmr2_setfreq(fmr2); | ||
| 345 | } else | ||
| 346 | fmr2_mute(fmr2->io); | ||
| 347 | mutex_unlock(&fmr2->lock); | ||
| 348 | return 0; | ||
| 349 | } | ||
| 350 | |||
| 351 | static int vidioc_g_input(struct file *filp, void *priv, unsigned int *i) | ||
| 352 | { | ||
| 353 | *i = 0; | ||
| 354 | return 0; | ||
| 355 | } | ||
| 356 | 156 | ||
| 357 | static int vidioc_s_input(struct file *filp, void *priv, unsigned int i) | 157 | tc9154a_set_attenuation(fmr2, abs(left - 68), TC9154A_CHANNEL_LEFT); |
| 358 | { | 158 | tc9154a_set_attenuation(fmr2, abs(right - 68), TC9154A_CHANNEL_RIGHT); |
| 359 | return i ? -EINVAL : 0; | ||
| 360 | } | ||
| 361 | 159 | ||
| 362 | static int vidioc_g_audio(struct file *file, void *priv, | ||
| 363 | struct v4l2_audio *a) | ||
| 364 | { | ||
| 365 | a->index = 0; | ||
| 366 | strlcpy(a->name, "Radio", sizeof(a->name)); | ||
| 367 | a->capability = V4L2_AUDCAP_STEREO; | ||
| 368 | return 0; | 160 | return 0; |
| 369 | } | 161 | } |
| 370 | 162 | ||
| 371 | static int vidioc_s_audio(struct file *file, void *priv, | 163 | static const struct v4l2_ctrl_ops fmr2_ctrl_ops = { |
| 372 | struct v4l2_audio *a) | 164 | .s_ctrl = fmr2_s_ctrl, |
| 165 | }; | ||
| 166 | |||
| 167 | static int fmr2_tea_ext_init(struct snd_tea575x *tea) | ||
| 373 | { | 168 | { |
| 374 | return a->index ? -EINVAL : 0; | 169 | struct fmr2 *fmr2 = tea->private_data; |
| 375 | } | ||
| 376 | 170 | ||
| 377 | static const struct v4l2_file_operations fmr2_fops = { | 171 | if (inb(fmr2->io) & FMR2_HASVOL) { |
| 378 | .owner = THIS_MODULE, | 172 | fmr2->volume = v4l2_ctrl_new_std(&tea->ctrl_handler, &fmr2_ctrl_ops, V4L2_CID_AUDIO_VOLUME, 0, 68, 2, 56); |
| 379 | .unlocked_ioctl = video_ioctl2, | 173 | fmr2->balance = v4l2_ctrl_new_std(&tea->ctrl_handler, &fmr2_ctrl_ops, V4L2_CID_AUDIO_BALANCE, -68, 68, 2, 0); |
| 380 | }; | 174 | if (tea->ctrl_handler.error) { |
| 175 | printk(KERN_ERR "radio-sf16fmr2: can't initialize contrls\n"); | ||
| 176 | return tea->ctrl_handler.error; | ||
| 177 | } | ||
| 178 | } | ||
| 381 | 179 | ||
| 382 | static const struct v4l2_ioctl_ops fmr2_ioctl_ops = { | 180 | return 0; |
| 383 | .vidioc_querycap = vidioc_querycap, | 181 | } |
| 384 | .vidioc_g_tuner = vidioc_g_tuner, | ||
| 385 | .vidioc_s_tuner = vidioc_s_tuner, | ||
| 386 | .vidioc_g_audio = vidioc_g_audio, | ||
| 387 | .vidioc_s_audio = vidioc_s_audio, | ||
| 388 | .vidioc_g_input = vidioc_g_input, | ||
| 389 | .vidioc_s_input = vidioc_s_input, | ||
| 390 | .vidioc_g_frequency = vidioc_g_frequency, | ||
| 391 | .vidioc_s_frequency = vidioc_s_frequency, | ||
| 392 | .vidioc_queryctrl = vidioc_queryctrl, | ||
| 393 | .vidioc_g_ctrl = vidioc_g_ctrl, | ||
| 394 | .vidioc_s_ctrl = vidioc_s_ctrl, | ||
| 395 | }; | ||
| 396 | 182 | ||
| 397 | static int __init fmr2_init(void) | 183 | static int __init fmr2_init(void) |
| 398 | { | 184 | { |
| 399 | struct fmr2 *fmr2 = &fmr2_card; | 185 | struct fmr2 *fmr2 = &fmr2_card; |
| 400 | struct v4l2_device *v4l2_dev = &fmr2->v4l2_dev; | ||
| 401 | int res; | ||
| 402 | 186 | ||
| 403 | strlcpy(v4l2_dev->name, "sf16fmr2", sizeof(v4l2_dev->name)); | 187 | fmr2->io = FMR2_PORT; |
| 404 | fmr2->io = io; | ||
| 405 | fmr2->stereo = 1; | ||
| 406 | mutex_init(&fmr2->lock); | ||
| 407 | 188 | ||
| 408 | if (!request_region(fmr2->io, 2, "sf16fmr2")) { | 189 | if (!request_region(fmr2->io, 2, "SF16-FMR2")) { |
| 409 | v4l2_err(v4l2_dev, "request_region failed!\n"); | 190 | printk(KERN_ERR "radio-sf16fmr2: I/O port 0x%x already in use\n", fmr2->io); |
| 410 | return -EBUSY; | 191 | return -EBUSY; |
| 411 | } | 192 | } |
| 412 | 193 | ||
| 413 | res = v4l2_device_register(NULL, v4l2_dev); | 194 | fmr2->tea.private_data = fmr2; |
| 414 | if (res < 0) { | 195 | fmr2->tea.ops = &fmr2_tea_ops; |
| 415 | release_region(fmr2->io, 2); | 196 | fmr2->tea.ext_init = fmr2_tea_ext_init; |
| 416 | v4l2_err(v4l2_dev, "Could not register v4l2_device\n"); | 197 | strlcpy(fmr2->tea.card, "SF16-FMR2", sizeof(fmr2->tea.card)); |
| 417 | return res; | 198 | strcpy(fmr2->tea.bus_info, "ISA"); |
| 418 | } | ||
| 419 | 199 | ||
| 420 | strlcpy(fmr2->vdev.name, v4l2_dev->name, sizeof(fmr2->vdev.name)); | 200 | if (snd_tea575x_init(&fmr2->tea)) { |
| 421 | fmr2->vdev.v4l2_dev = v4l2_dev; | 201 | printk(KERN_ERR "radio-sf16fmr2: Unable to detect TEA575x tuner\n"); |
| 422 | fmr2->vdev.fops = &fmr2_fops; | ||
| 423 | fmr2->vdev.ioctl_ops = &fmr2_ioctl_ops; | ||
| 424 | fmr2->vdev.release = video_device_release_empty; | ||
| 425 | video_set_drvdata(&fmr2->vdev, fmr2); | ||
| 426 | |||
| 427 | /* mute card - prevents noisy bootups */ | ||
| 428 | fmr2_mute(fmr2->io); | ||
| 429 | fmr2_product_info(fmr2); | ||
| 430 | |||
| 431 | if (video_register_device(&fmr2->vdev, VFL_TYPE_RADIO, radio_nr) < 0) { | ||
| 432 | v4l2_device_unregister(v4l2_dev); | ||
| 433 | release_region(fmr2->io, 2); | 202 | release_region(fmr2->io, 2); |
| 434 | return -EINVAL; | 203 | return -ENODEV; |
| 435 | } | 204 | } |
| 436 | 205 | ||
| 437 | v4l2_info(v4l2_dev, "SF16FMR2 radio card driver at 0x%x.\n", fmr2->io); | 206 | printk(KERN_INFO "radio-sf16fmr2: SF16-FMR2 radio card at 0x%x.\n", fmr2->io); |
| 438 | debug_print((KERN_DEBUG "card_type %d\n", fmr2->card_type)); | ||
| 439 | return 0; | 207 | return 0; |
| 440 | } | 208 | } |
| 441 | 209 | ||
| @@ -443,22 +211,9 @@ static void __exit fmr2_exit(void) | |||
| 443 | { | 211 | { |
| 444 | struct fmr2 *fmr2 = &fmr2_card; | 212 | struct fmr2 *fmr2 = &fmr2_card; |
| 445 | 213 | ||
| 446 | video_unregister_device(&fmr2->vdev); | 214 | snd_tea575x_exit(&fmr2->tea); |
| 447 | v4l2_device_unregister(&fmr2->v4l2_dev); | ||
| 448 | release_region(fmr2->io, 2); | 215 | release_region(fmr2->io, 2); |
| 449 | } | 216 | } |
| 450 | 217 | ||
| 451 | module_init(fmr2_init); | 218 | module_init(fmr2_init); |
| 452 | module_exit(fmr2_exit); | 219 | module_exit(fmr2_exit); |
| 453 | |||
| 454 | #ifndef MODULE | ||
| 455 | |||
| 456 | static int __init fmr2_setup_io(char *str) | ||
| 457 | { | ||
| 458 | get_option(&str, &io); | ||
| 459 | return 1; | ||
| 460 | } | ||
| 461 | |||
| 462 | __setup("sf16fmr2=", fmr2_setup_io); | ||
| 463 | |||
| 464 | #endif | ||
diff --git a/drivers/media/radio/radio-tea5764.c b/drivers/media/radio/radio-tea5764.c index 0e71d816c725..95ddcc4845d3 100644 --- a/drivers/media/radio/radio-tea5764.c +++ b/drivers/media/radio/radio-tea5764.c | |||
| @@ -39,10 +39,8 @@ | |||
| 39 | #include <linux/i2c.h> /* I2C */ | 39 | #include <linux/i2c.h> /* I2C */ |
| 40 | #include <media/v4l2-common.h> | 40 | #include <media/v4l2-common.h> |
| 41 | #include <media/v4l2-ioctl.h> | 41 | #include <media/v4l2-ioctl.h> |
| 42 | #include <linux/version.h> /* for KERNEL_VERSION MACRO */ | ||
| 43 | 42 | ||
| 44 | #define DRIVER_VERSION "v0.01" | 43 | #define DRIVER_VERSION "0.0.2" |
| 45 | #define RADIO_VERSION KERNEL_VERSION(0, 0, 1) | ||
| 46 | 44 | ||
| 47 | #define DRIVER_AUTHOR "Fabio Belavenuto <belavenuto@gmail.com>" | 45 | #define DRIVER_AUTHOR "Fabio Belavenuto <belavenuto@gmail.com>" |
| 48 | #define DRIVER_DESC "A driver for the TEA5764 radio chip for EZX Phones." | 46 | #define DRIVER_DESC "A driver for the TEA5764 radio chip for EZX Phones." |
| @@ -300,7 +298,6 @@ static int vidioc_querycap(struct file *file, void *priv, | |||
| 300 | strlcpy(v->card, dev->name, sizeof(v->card)); | 298 | strlcpy(v->card, dev->name, sizeof(v->card)); |
| 301 | snprintf(v->bus_info, sizeof(v->bus_info), | 299 | snprintf(v->bus_info, sizeof(v->bus_info), |
| 302 | "I2C:%s", dev_name(&dev->dev)); | 300 | "I2C:%s", dev_name(&dev->dev)); |
| 303 | v->version = RADIO_VERSION; | ||
| 304 | v->capabilities = V4L2_CAP_TUNER | V4L2_CAP_RADIO; | 301 | v->capabilities = V4L2_CAP_TUNER | V4L2_CAP_RADIO; |
| 305 | return 0; | 302 | return 0; |
| 306 | } | 303 | } |
| @@ -595,8 +592,9 @@ static void __exit tea5764_exit(void) | |||
| 595 | MODULE_AUTHOR(DRIVER_AUTHOR); | 592 | MODULE_AUTHOR(DRIVER_AUTHOR); |
| 596 | MODULE_DESCRIPTION(DRIVER_DESC); | 593 | MODULE_DESCRIPTION(DRIVER_DESC); |
| 597 | MODULE_LICENSE("GPL"); | 594 | MODULE_LICENSE("GPL"); |
| 595 | MODULE_VERSION(DRIVER_VERSION); | ||
| 598 | 596 | ||
| 599 | module_param(use_xtal, int, 1); | 597 | module_param(use_xtal, int, 0); |
| 600 | MODULE_PARM_DESC(use_xtal, "Chip have a xtal connected in board"); | 598 | MODULE_PARM_DESC(use_xtal, "Chip have a xtal connected in board"); |
| 601 | module_param(radio_nr, int, 0); | 599 | module_param(radio_nr, int, 0); |
| 602 | MODULE_PARM_DESC(radio_nr, "video4linux device number to use"); | 600 | MODULE_PARM_DESC(radio_nr, "video4linux device number to use"); |
diff --git a/drivers/media/radio/radio-terratec.c b/drivers/media/radio/radio-terratec.c index a32663917059..f2ed9cc3cf3b 100644 --- a/drivers/media/radio/radio-terratec.c +++ b/drivers/media/radio/radio-terratec.c | |||
| @@ -29,7 +29,6 @@ | |||
| 29 | #include <linux/ioport.h> /* request_region */ | 29 | #include <linux/ioport.h> /* request_region */ |
| 30 | #include <linux/videodev2.h> /* kernel radio structs */ | 30 | #include <linux/videodev2.h> /* kernel radio structs */ |
| 31 | #include <linux/mutex.h> | 31 | #include <linux/mutex.h> |
| 32 | #include <linux/version.h> /* for KERNEL_VERSION MACRO */ | ||
| 33 | #include <linux/io.h> /* outb, outb_p */ | 32 | #include <linux/io.h> /* outb, outb_p */ |
| 34 | #include <media/v4l2-device.h> | 33 | #include <media/v4l2-device.h> |
| 35 | #include <media/v4l2-ioctl.h> | 34 | #include <media/v4l2-ioctl.h> |
| @@ -37,6 +36,7 @@ | |||
| 37 | MODULE_AUTHOR("R.OFFERMANNS & others"); | 36 | MODULE_AUTHOR("R.OFFERMANNS & others"); |
| 38 | MODULE_DESCRIPTION("A driver for the TerraTec ActiveRadio Standalone radio card."); | 37 | MODULE_DESCRIPTION("A driver for the TerraTec ActiveRadio Standalone radio card."); |
| 39 | MODULE_LICENSE("GPL"); | 38 | MODULE_LICENSE("GPL"); |
| 39 | MODULE_VERSION("0.0.3"); | ||
| 40 | 40 | ||
| 41 | #ifndef CONFIG_RADIO_TERRATEC_PORT | 41 | #ifndef CONFIG_RADIO_TERRATEC_PORT |
| 42 | #define CONFIG_RADIO_TERRATEC_PORT 0x590 | 42 | #define CONFIG_RADIO_TERRATEC_PORT 0x590 |
| @@ -49,8 +49,6 @@ module_param(io, int, 0); | |||
| 49 | MODULE_PARM_DESC(io, "I/O address of the TerraTec ActiveRadio card (0x590 or 0x591)"); | 49 | MODULE_PARM_DESC(io, "I/O address of the TerraTec ActiveRadio card (0x590 or 0x591)"); |
| 50 | module_param(radio_nr, int, 0); | 50 | module_param(radio_nr, int, 0); |
| 51 | 51 | ||
| 52 | #define RADIO_VERSION KERNEL_VERSION(0, 0, 2) | ||
| 53 | |||
| 54 | static struct v4l2_queryctrl radio_qctrl[] = { | 52 | static struct v4l2_queryctrl radio_qctrl[] = { |
| 55 | { | 53 | { |
| 56 | .id = V4L2_CID_AUDIO_MUTE, | 54 | .id = V4L2_CID_AUDIO_MUTE, |
| @@ -205,7 +203,6 @@ static int vidioc_querycap(struct file *file, void *priv, | |||
| 205 | strlcpy(v->driver, "radio-terratec", sizeof(v->driver)); | 203 | strlcpy(v->driver, "radio-terratec", sizeof(v->driver)); |
| 206 | strlcpy(v->card, "ActiveRadio", sizeof(v->card)); | 204 | strlcpy(v->card, "ActiveRadio", sizeof(v->card)); |
| 207 | strlcpy(v->bus_info, "ISA", sizeof(v->bus_info)); | 205 | strlcpy(v->bus_info, "ISA", sizeof(v->bus_info)); |
| 208 | v->version = RADIO_VERSION; | ||
| 209 | v->capabilities = V4L2_CAP_TUNER | V4L2_CAP_RADIO; | 206 | v->capabilities = V4L2_CAP_TUNER | V4L2_CAP_RADIO; |
| 210 | return 0; | 207 | return 0; |
| 211 | } | 208 | } |
diff --git a/drivers/media/radio/radio-timb.c b/drivers/media/radio/radio-timb.c index a185610b376b..f17b540d68a5 100644 --- a/drivers/media/radio/radio-timb.c +++ b/drivers/media/radio/radio-timb.c | |||
| @@ -16,7 +16,6 @@ | |||
| 16 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | 16 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 17 | */ | 17 | */ |
| 18 | 18 | ||
| 19 | #include <linux/version.h> | ||
| 20 | #include <linux/io.h> | 19 | #include <linux/io.h> |
| 21 | #include <media/v4l2-ioctl.h> | 20 | #include <media/v4l2-ioctl.h> |
| 22 | #include <media/v4l2-device.h> | 21 | #include <media/v4l2-device.h> |
| @@ -44,7 +43,6 @@ static int timbradio_vidioc_querycap(struct file *file, void *priv, | |||
| 44 | strlcpy(v->driver, DRIVER_NAME, sizeof(v->driver)); | 43 | strlcpy(v->driver, DRIVER_NAME, sizeof(v->driver)); |
| 45 | strlcpy(v->card, "Timberdale Radio", sizeof(v->card)); | 44 | strlcpy(v->card, "Timberdale Radio", sizeof(v->card)); |
| 46 | snprintf(v->bus_info, sizeof(v->bus_info), "platform:"DRIVER_NAME); | 45 | snprintf(v->bus_info, sizeof(v->bus_info), "platform:"DRIVER_NAME); |
| 47 | v->version = KERNEL_VERSION(0, 0, 1); | ||
| 48 | v->capabilities = V4L2_CAP_TUNER | V4L2_CAP_RADIO; | 46 | v->capabilities = V4L2_CAP_TUNER | V4L2_CAP_RADIO; |
| 49 | return 0; | 47 | return 0; |
| 50 | } | 48 | } |
| @@ -245,4 +243,5 @@ module_exit(timbradio_exit); | |||
| 245 | MODULE_DESCRIPTION("Timberdale Radio driver"); | 243 | MODULE_DESCRIPTION("Timberdale Radio driver"); |
| 246 | MODULE_AUTHOR("Mocean Laboratories <info@mocean-labs.com>"); | 244 | MODULE_AUTHOR("Mocean Laboratories <info@mocean-labs.com>"); |
| 247 | MODULE_LICENSE("GPL v2"); | 245 | MODULE_LICENSE("GPL v2"); |
| 246 | MODULE_VERSION("0.0.2"); | ||
| 248 | MODULE_ALIAS("platform:"DRIVER_NAME); | 247 | MODULE_ALIAS("platform:"DRIVER_NAME); |
diff --git a/drivers/media/radio/radio-trust.c b/drivers/media/radio/radio-trust.c index 22fa9cc28abe..b3f45a019d82 100644 --- a/drivers/media/radio/radio-trust.c +++ b/drivers/media/radio/radio-trust.c | |||
| @@ -19,7 +19,6 @@ | |||
| 19 | #include <linux/module.h> | 19 | #include <linux/module.h> |
| 20 | #include <linux/init.h> | 20 | #include <linux/init.h> |
| 21 | #include <linux/ioport.h> | 21 | #include <linux/ioport.h> |
| 22 | #include <linux/version.h> /* for KERNEL_VERSION MACRO */ | ||
| 23 | #include <linux/videodev2.h> | 22 | #include <linux/videodev2.h> |
| 24 | #include <linux/io.h> | 23 | #include <linux/io.h> |
| 25 | #include <media/v4l2-device.h> | 24 | #include <media/v4l2-device.h> |
| @@ -28,6 +27,7 @@ | |||
| 28 | MODULE_AUTHOR("Eric Lammerts, Russell Kroll, Quay Lu, Donald Song, Jason Lewis, Scott McGrath, William McGrath"); | 27 | MODULE_AUTHOR("Eric Lammerts, Russell Kroll, Quay Lu, Donald Song, Jason Lewis, Scott McGrath, William McGrath"); |
| 29 | MODULE_DESCRIPTION("A driver for the Trust FM Radio card."); | 28 | MODULE_DESCRIPTION("A driver for the Trust FM Radio card."); |
| 30 | MODULE_LICENSE("GPL"); | 29 | MODULE_LICENSE("GPL"); |
| 30 | MODULE_VERSION("0.0.3"); | ||
| 31 | 31 | ||
| 32 | /* acceptable ports: 0x350 (JP3 shorted), 0x358 (JP3 open) */ | 32 | /* acceptable ports: 0x350 (JP3 shorted), 0x358 (JP3 open) */ |
| 33 | 33 | ||
| @@ -42,8 +42,6 @@ module_param(io, int, 0); | |||
| 42 | MODULE_PARM_DESC(io, "I/O address of the Trust FM Radio card (0x350 or 0x358)"); | 42 | MODULE_PARM_DESC(io, "I/O address of the Trust FM Radio card (0x350 or 0x358)"); |
| 43 | module_param(radio_nr, int, 0); | 43 | module_param(radio_nr, int, 0); |
| 44 | 44 | ||
| 45 | #define RADIO_VERSION KERNEL_VERSION(0, 0, 2) | ||
| 46 | |||
| 47 | struct trust { | 45 | struct trust { |
| 48 | struct v4l2_device v4l2_dev; | 46 | struct v4l2_device v4l2_dev; |
| 49 | struct video_device vdev; | 47 | struct video_device vdev; |
| @@ -196,7 +194,6 @@ static int vidioc_querycap(struct file *file, void *priv, | |||
| 196 | strlcpy(v->driver, "radio-trust", sizeof(v->driver)); | 194 | strlcpy(v->driver, "radio-trust", sizeof(v->driver)); |
| 197 | strlcpy(v->card, "Trust FM Radio", sizeof(v->card)); | 195 | strlcpy(v->card, "Trust FM Radio", sizeof(v->card)); |
| 198 | strlcpy(v->bus_info, "ISA", sizeof(v->bus_info)); | 196 | strlcpy(v->bus_info, "ISA", sizeof(v->bus_info)); |
| 199 | v->version = RADIO_VERSION; | ||
| 200 | v->capabilities = V4L2_CAP_TUNER | V4L2_CAP_RADIO; | 197 | v->capabilities = V4L2_CAP_TUNER | V4L2_CAP_RADIO; |
| 201 | return 0; | 198 | return 0; |
| 202 | } | 199 | } |
diff --git a/drivers/media/radio/radio-typhoon.c b/drivers/media/radio/radio-typhoon.c index 8dbbf08f2207..398726abc0c8 100644 --- a/drivers/media/radio/radio-typhoon.c +++ b/drivers/media/radio/radio-typhoon.c | |||
| @@ -31,15 +31,17 @@ | |||
| 31 | #include <linux/module.h> /* Modules */ | 31 | #include <linux/module.h> /* Modules */ |
| 32 | #include <linux/init.h> /* Initdata */ | 32 | #include <linux/init.h> /* Initdata */ |
| 33 | #include <linux/ioport.h> /* request_region */ | 33 | #include <linux/ioport.h> /* request_region */ |
| 34 | #include <linux/version.h> /* for KERNEL_VERSION MACRO */ | ||
| 35 | #include <linux/videodev2.h> /* kernel radio structs */ | 34 | #include <linux/videodev2.h> /* kernel radio structs */ |
| 36 | #include <linux/io.h> /* outb, outb_p */ | 35 | #include <linux/io.h> /* outb, outb_p */ |
| 37 | #include <media/v4l2-device.h> | 36 | #include <media/v4l2-device.h> |
| 38 | #include <media/v4l2-ioctl.h> | 37 | #include <media/v4l2-ioctl.h> |
| 39 | 38 | ||
| 39 | #define DRIVER_VERSION "0.1.2" | ||
| 40 | |||
| 40 | MODULE_AUTHOR("Dr. Henrik Seidel"); | 41 | MODULE_AUTHOR("Dr. Henrik Seidel"); |
| 41 | MODULE_DESCRIPTION("A driver for the Typhoon radio card (a.k.a. EcoRadio)."); | 42 | MODULE_DESCRIPTION("A driver for the Typhoon radio card (a.k.a. EcoRadio)."); |
| 42 | MODULE_LICENSE("GPL"); | 43 | MODULE_LICENSE("GPL"); |
| 44 | MODULE_VERSION(DRIVER_VERSION); | ||
| 43 | 45 | ||
| 44 | #ifndef CONFIG_RADIO_TYPHOON_PORT | 46 | #ifndef CONFIG_RADIO_TYPHOON_PORT |
| 45 | #define CONFIG_RADIO_TYPHOON_PORT -1 | 47 | #define CONFIG_RADIO_TYPHOON_PORT -1 |
| @@ -61,9 +63,7 @@ static unsigned long mutefreq = CONFIG_RADIO_TYPHOON_MUTEFREQ; | |||
| 61 | module_param(mutefreq, ulong, 0); | 63 | module_param(mutefreq, ulong, 0); |
| 62 | MODULE_PARM_DESC(mutefreq, "Frequency used when muting the card (in kHz)"); | 64 | MODULE_PARM_DESC(mutefreq, "Frequency used when muting the card (in kHz)"); |
| 63 | 65 | ||
| 64 | #define RADIO_VERSION KERNEL_VERSION(0, 1, 1) | 66 | #define BANNER "Typhoon Radio Card driver v" DRIVER_VERSION "\n" |
| 65 | |||
| 66 | #define BANNER "Typhoon Radio Card driver v0.1.1\n" | ||
| 67 | 67 | ||
| 68 | struct typhoon { | 68 | struct typhoon { |
| 69 | struct v4l2_device v4l2_dev; | 69 | struct v4l2_device v4l2_dev; |
| @@ -171,7 +171,6 @@ static int vidioc_querycap(struct file *file, void *priv, | |||
| 171 | strlcpy(v->driver, "radio-typhoon", sizeof(v->driver)); | 171 | strlcpy(v->driver, "radio-typhoon", sizeof(v->driver)); |
| 172 | strlcpy(v->card, "Typhoon Radio", sizeof(v->card)); | 172 | strlcpy(v->card, "Typhoon Radio", sizeof(v->card)); |
| 173 | strlcpy(v->bus_info, "ISA", sizeof(v->bus_info)); | 173 | strlcpy(v->bus_info, "ISA", sizeof(v->bus_info)); |
| 174 | v->version = RADIO_VERSION; | ||
| 175 | v->capabilities = V4L2_CAP_TUNER | V4L2_CAP_RADIO; | 174 | v->capabilities = V4L2_CAP_TUNER | V4L2_CAP_RADIO; |
| 176 | return 0; | 175 | return 0; |
| 177 | } | 176 | } |
diff --git a/drivers/media/radio/radio-wl1273.c b/drivers/media/radio/radio-wl1273.c index 459f7272d326..46cacf845049 100644 --- a/drivers/media/radio/radio-wl1273.c +++ b/drivers/media/radio/radio-wl1273.c | |||
| @@ -1382,7 +1382,7 @@ static int wl1273_fm_g_volatile_ctrl(struct v4l2_ctrl *ctrl) | |||
| 1382 | 1382 | ||
| 1383 | switch (ctrl->id) { | 1383 | switch (ctrl->id) { |
| 1384 | case V4L2_CID_TUNE_ANTENNA_CAPACITOR: | 1384 | case V4L2_CID_TUNE_ANTENNA_CAPACITOR: |
| 1385 | ctrl->cur.val = wl1273_fm_get_tx_ctune(radio); | 1385 | ctrl->val = wl1273_fm_get_tx_ctune(radio); |
| 1386 | break; | 1386 | break; |
| 1387 | 1387 | ||
| 1388 | default: | 1388 | default: |
diff --git a/drivers/media/radio/radio-zoltrix.c b/drivers/media/radio/radio-zoltrix.c index af99c5bd88c1..f5613b948203 100644 --- a/drivers/media/radio/radio-zoltrix.c +++ b/drivers/media/radio/radio-zoltrix.c | |||
| @@ -35,7 +35,6 @@ | |||
| 35 | #include <linux/delay.h> /* udelay, msleep */ | 35 | #include <linux/delay.h> /* udelay, msleep */ |
| 36 | #include <linux/videodev2.h> /* kernel radio structs */ | 36 | #include <linux/videodev2.h> /* kernel radio structs */ |
| 37 | #include <linux/mutex.h> | 37 | #include <linux/mutex.h> |
| 38 | #include <linux/version.h> /* for KERNEL_VERSION MACRO */ | ||
| 39 | #include <linux/io.h> /* outb, outb_p */ | 38 | #include <linux/io.h> /* outb, outb_p */ |
| 40 | #include <media/v4l2-device.h> | 39 | #include <media/v4l2-device.h> |
| 41 | #include <media/v4l2-ioctl.h> | 40 | #include <media/v4l2-ioctl.h> |
| @@ -43,6 +42,7 @@ | |||
| 43 | MODULE_AUTHOR("C.van Schaik"); | 42 | MODULE_AUTHOR("C.van Schaik"); |
| 44 | MODULE_DESCRIPTION("A driver for the Zoltrix Radio Plus."); | 43 | MODULE_DESCRIPTION("A driver for the Zoltrix Radio Plus."); |
| 45 | MODULE_LICENSE("GPL"); | 44 | MODULE_LICENSE("GPL"); |
| 45 | MODULE_VERSION("0.0.3"); | ||
| 46 | 46 | ||
| 47 | #ifndef CONFIG_RADIO_ZOLTRIX_PORT | 47 | #ifndef CONFIG_RADIO_ZOLTRIX_PORT |
| 48 | #define CONFIG_RADIO_ZOLTRIX_PORT -1 | 48 | #define CONFIG_RADIO_ZOLTRIX_PORT -1 |
| @@ -55,8 +55,6 @@ module_param(io, int, 0); | |||
| 55 | MODULE_PARM_DESC(io, "I/O address of the Zoltrix Radio Plus (0x20c or 0x30c)"); | 55 | MODULE_PARM_DESC(io, "I/O address of the Zoltrix Radio Plus (0x20c or 0x30c)"); |
| 56 | module_param(radio_nr, int, 0); | 56 | module_param(radio_nr, int, 0); |
| 57 | 57 | ||
| 58 | #define RADIO_VERSION KERNEL_VERSION(0, 0, 2) | ||
| 59 | |||
| 60 | struct zoltrix { | 58 | struct zoltrix { |
| 61 | struct v4l2_device v4l2_dev; | 59 | struct v4l2_device v4l2_dev; |
| 62 | struct video_device vdev; | 60 | struct video_device vdev; |
| @@ -228,7 +226,6 @@ static int vidioc_querycap(struct file *file, void *priv, | |||
| 228 | strlcpy(v->driver, "radio-zoltrix", sizeof(v->driver)); | 226 | strlcpy(v->driver, "radio-zoltrix", sizeof(v->driver)); |
| 229 | strlcpy(v->card, "Zoltrix Radio", sizeof(v->card)); | 227 | strlcpy(v->card, "Zoltrix Radio", sizeof(v->card)); |
| 230 | strlcpy(v->bus_info, "ISA", sizeof(v->bus_info)); | 228 | strlcpy(v->bus_info, "ISA", sizeof(v->bus_info)); |
| 231 | v->version = RADIO_VERSION; | ||
| 232 | v->capabilities = V4L2_CAP_TUNER | V4L2_CAP_RADIO; | 229 | v->capabilities = V4L2_CAP_TUNER | V4L2_CAP_RADIO; |
| 233 | return 0; | 230 | return 0; |
| 234 | } | 231 | } |
diff --git a/drivers/media/radio/si470x/radio-si470x-i2c.c b/drivers/media/radio/si470x/radio-si470x-i2c.c index a2a67772c42c..fd3541b0e91c 100644 --- a/drivers/media/radio/si470x/radio-si470x-i2c.c +++ b/drivers/media/radio/si470x/radio-si470x-i2c.c | |||
| @@ -24,10 +24,9 @@ | |||
| 24 | 24 | ||
| 25 | /* driver definitions */ | 25 | /* driver definitions */ |
| 26 | #define DRIVER_AUTHOR "Joonyoung Shim <jy0922.shim@samsung.com>"; | 26 | #define DRIVER_AUTHOR "Joonyoung Shim <jy0922.shim@samsung.com>"; |
| 27 | #define DRIVER_KERNEL_VERSION KERNEL_VERSION(1, 0, 1) | ||
| 28 | #define DRIVER_CARD "Silicon Labs Si470x FM Radio Receiver" | 27 | #define DRIVER_CARD "Silicon Labs Si470x FM Radio Receiver" |
| 29 | #define DRIVER_DESC "I2C radio driver for Si470x FM Radio Receivers" | 28 | #define DRIVER_DESC "I2C radio driver for Si470x FM Radio Receivers" |
| 30 | #define DRIVER_VERSION "1.0.1" | 29 | #define DRIVER_VERSION "1.0.2" |
| 31 | 30 | ||
| 32 | /* kernel includes */ | 31 | /* kernel includes */ |
| 33 | #include <linux/i2c.h> | 32 | #include <linux/i2c.h> |
| @@ -248,7 +247,6 @@ int si470x_vidioc_querycap(struct file *file, void *priv, | |||
| 248 | { | 247 | { |
| 249 | strlcpy(capability->driver, DRIVER_NAME, sizeof(capability->driver)); | 248 | strlcpy(capability->driver, DRIVER_NAME, sizeof(capability->driver)); |
| 250 | strlcpy(capability->card, DRIVER_CARD, sizeof(capability->card)); | 249 | strlcpy(capability->card, DRIVER_CARD, sizeof(capability->card)); |
| 251 | capability->version = DRIVER_KERNEL_VERSION; | ||
| 252 | capability->capabilities = V4L2_CAP_HW_FREQ_SEEK | | 250 | capability->capabilities = V4L2_CAP_HW_FREQ_SEEK | |
| 253 | V4L2_CAP_TUNER | V4L2_CAP_RADIO; | 251 | V4L2_CAP_TUNER | V4L2_CAP_RADIO; |
| 254 | 252 | ||
diff --git a/drivers/media/radio/si470x/radio-si470x-usb.c b/drivers/media/radio/si470x/radio-si470x-usb.c index 392e84fe90ef..4cf537043f99 100644 --- a/drivers/media/radio/si470x/radio-si470x-usb.c +++ b/drivers/media/radio/si470x/radio-si470x-usb.c | |||
| @@ -29,7 +29,6 @@ | |||
| 29 | 29 | ||
| 30 | /* driver definitions */ | 30 | /* driver definitions */ |
| 31 | #define DRIVER_AUTHOR "Tobias Lorenz <tobias.lorenz@gmx.net>" | 31 | #define DRIVER_AUTHOR "Tobias Lorenz <tobias.lorenz@gmx.net>" |
| 32 | #define DRIVER_KERNEL_VERSION KERNEL_VERSION(1, 0, 10) | ||
| 33 | #define DRIVER_CARD "Silicon Labs Si470x FM Radio Receiver" | 32 | #define DRIVER_CARD "Silicon Labs Si470x FM Radio Receiver" |
| 34 | #define DRIVER_DESC "USB radio driver for Si470x FM Radio Receivers" | 33 | #define DRIVER_DESC "USB radio driver for Si470x FM Radio Receivers" |
| 35 | #define DRIVER_VERSION "1.0.10" | 34 | #define DRIVER_VERSION "1.0.10" |
| @@ -626,7 +625,6 @@ int si470x_vidioc_querycap(struct file *file, void *priv, | |||
| 626 | strlcpy(capability->card, DRIVER_CARD, sizeof(capability->card)); | 625 | strlcpy(capability->card, DRIVER_CARD, sizeof(capability->card)); |
| 627 | usb_make_path(radio->usbdev, capability->bus_info, | 626 | usb_make_path(radio->usbdev, capability->bus_info, |
| 628 | sizeof(capability->bus_info)); | 627 | sizeof(capability->bus_info)); |
| 629 | capability->version = DRIVER_KERNEL_VERSION; | ||
| 630 | capability->capabilities = V4L2_CAP_HW_FREQ_SEEK | | 628 | capability->capabilities = V4L2_CAP_HW_FREQ_SEEK | |
| 631 | V4L2_CAP_TUNER | V4L2_CAP_RADIO | V4L2_CAP_RDS_CAPTURE; | 629 | V4L2_CAP_TUNER | V4L2_CAP_RADIO | V4L2_CAP_RDS_CAPTURE; |
| 632 | 630 | ||
| @@ -699,7 +697,7 @@ static int si470x_usb_driver_probe(struct usb_interface *intf, | |||
| 699 | radio->videodev = video_device_alloc(); | 697 | radio->videodev = video_device_alloc(); |
| 700 | if (!radio->videodev) { | 698 | if (!radio->videodev) { |
| 701 | retval = -ENOMEM; | 699 | retval = -ENOMEM; |
| 702 | goto err_intbuffer; | 700 | goto err_urb; |
| 703 | } | 701 | } |
| 704 | memcpy(radio->videodev, &si470x_viddev_template, | 702 | memcpy(radio->videodev, &si470x_viddev_template, |
| 705 | sizeof(si470x_viddev_template)); | 703 | sizeof(si470x_viddev_template)); |
| @@ -790,6 +788,8 @@ err_all: | |||
| 790 | kfree(radio->buffer); | 788 | kfree(radio->buffer); |
| 791 | err_video: | 789 | err_video: |
| 792 | video_device_release(radio->videodev); | 790 | video_device_release(radio->videodev); |
| 791 | err_urb: | ||
| 792 | usb_free_urb(radio->int_in_urb); | ||
| 793 | err_intbuffer: | 793 | err_intbuffer: |
| 794 | kfree(radio->int_in_buffer); | 794 | kfree(radio->int_in_buffer); |
| 795 | err_radio: | 795 | err_radio: |
diff --git a/drivers/media/radio/si470x/radio-si470x.h b/drivers/media/radio/si470x/radio-si470x.h index 68da001b09dc..f300a55ed85c 100644 --- a/drivers/media/radio/si470x/radio-si470x.h +++ b/drivers/media/radio/si470x/radio-si470x.h | |||
| @@ -32,7 +32,6 @@ | |||
| 32 | #include <linux/sched.h> | 32 | #include <linux/sched.h> |
| 33 | #include <linux/slab.h> | 33 | #include <linux/slab.h> |
| 34 | #include <linux/input.h> | 34 | #include <linux/input.h> |
| 35 | #include <linux/version.h> | ||
| 36 | #include <linux/videodev2.h> | 35 | #include <linux/videodev2.h> |
| 37 | #include <linux/mutex.h> | 36 | #include <linux/mutex.h> |
| 38 | #include <media/v4l2-common.h> | 37 | #include <media/v4l2-common.h> |
diff --git a/drivers/media/radio/wl128x/fmdrv.h b/drivers/media/radio/wl128x/fmdrv.h index 1a45a5d847b0..d84ad9dad323 100644 --- a/drivers/media/radio/wl128x/fmdrv.h +++ b/drivers/media/radio/wl128x/fmdrv.h | |||
| @@ -28,14 +28,11 @@ | |||
| 28 | #include <sound/core.h> | 28 | #include <sound/core.h> |
| 29 | #include <sound/initval.h> | 29 | #include <sound/initval.h> |
| 30 | #include <linux/timer.h> | 30 | #include <linux/timer.h> |
| 31 | #include <linux/version.h> | ||
| 32 | #include <media/v4l2-ioctl.h> | 31 | #include <media/v4l2-ioctl.h> |
| 33 | #include <media/v4l2-common.h> | 32 | #include <media/v4l2-common.h> |
| 34 | #include <media/v4l2-ctrls.h> | 33 | #include <media/v4l2-ctrls.h> |
| 35 | 34 | ||
| 36 | #define FM_DRV_VERSION "0.10" | 35 | #define FM_DRV_VERSION "0.1.1" |
| 37 | /* Should match with FM_DRV_VERSION */ | ||
| 38 | #define FM_DRV_RADIO_VERSION KERNEL_VERSION(0, 0, 1) | ||
| 39 | #define FM_DRV_NAME "ti_fmdrv" | 36 | #define FM_DRV_NAME "ti_fmdrv" |
| 40 | #define FM_DRV_CARD_SHORT_NAME "TI FM Radio" | 37 | #define FM_DRV_CARD_SHORT_NAME "TI FM Radio" |
| 41 | #define FM_DRV_CARD_LONG_NAME "Texas Instruments FM Radio" | 38 | #define FM_DRV_CARD_LONG_NAME "Texas Instruments FM Radio" |
diff --git a/drivers/media/radio/wl128x/fmdrv_v4l2.c b/drivers/media/radio/wl128x/fmdrv_v4l2.c index 87010724f914..8c0e19276970 100644 --- a/drivers/media/radio/wl128x/fmdrv_v4l2.c +++ b/drivers/media/radio/wl128x/fmdrv_v4l2.c | |||
| @@ -175,7 +175,6 @@ static int fm_v4l2_vidioc_querycap(struct file *file, void *priv, | |||
| 175 | strlcpy(capability->card, FM_DRV_CARD_SHORT_NAME, | 175 | strlcpy(capability->card, FM_DRV_CARD_SHORT_NAME, |
| 176 | sizeof(capability->card)); | 176 | sizeof(capability->card)); |
| 177 | sprintf(capability->bus_info, "UART"); | 177 | sprintf(capability->bus_info, "UART"); |
| 178 | capability->version = FM_DRV_RADIO_VERSION; | ||
| 179 | capability->capabilities = V4L2_CAP_HW_FREQ_SEEK | V4L2_CAP_TUNER | | 178 | capability->capabilities = V4L2_CAP_HW_FREQ_SEEK | V4L2_CAP_TUNER | |
| 180 | V4L2_CAP_RADIO | V4L2_CAP_MODULATOR | | 179 | V4L2_CAP_RADIO | V4L2_CAP_MODULATOR | |
| 181 | V4L2_CAP_AUDIO | V4L2_CAP_READWRITE | | 180 | V4L2_CAP_AUDIO | V4L2_CAP_READWRITE | |
| @@ -191,7 +190,7 @@ static int fm_g_volatile_ctrl(struct v4l2_ctrl *ctrl) | |||
| 191 | 190 | ||
| 192 | switch (ctrl->id) { | 191 | switch (ctrl->id) { |
| 193 | case V4L2_CID_TUNE_ANTENNA_CAPACITOR: | 192 | case V4L2_CID_TUNE_ANTENNA_CAPACITOR: |
| 194 | ctrl->cur.val = fm_tx_get_tune_cap_val(fmdev); | 193 | ctrl->val = fm_tx_get_tune_cap_val(fmdev); |
| 195 | break; | 194 | break; |
| 196 | default: | 195 | default: |
| 197 | fmwarn("%s: Unknown IOCTL: %d\n", __func__, ctrl->id); | 196 | fmwarn("%s: Unknown IOCTL: %d\n", __func__, ctrl->id); |
diff --git a/drivers/media/rc/Kconfig b/drivers/media/rc/Kconfig index 7d4bbc226d06..899f783d92fb 100644 --- a/drivers/media/rc/Kconfig +++ b/drivers/media/rc/Kconfig | |||
| @@ -87,6 +87,17 @@ config IR_RC5_SZ_DECODER | |||
| 87 | uses an IR protocol that is almost standard RC-5, but not quite, | 87 | uses an IR protocol that is almost standard RC-5, but not quite, |
| 88 | as it uses an additional bit). | 88 | as it uses an additional bit). |
| 89 | 89 | ||
| 90 | config IR_MCE_KBD_DECODER | ||
| 91 | tristate "Enable IR raw decoder for the MCE keyboard/mouse protocol" | ||
| 92 | depends on RC_CORE | ||
| 93 | select BITREVERSE | ||
| 94 | default y | ||
| 95 | |||
| 96 | ---help--- | ||
| 97 | Enable this option if you have a Microsoft Remote Keyboard for | ||
| 98 | Windows Media Center Edition, which you would like to use with | ||
| 99 | a raw IR receiver in your system. | ||
| 100 | |||
| 90 | config IR_LIRC_CODEC | 101 | config IR_LIRC_CODEC |
| 91 | tristate "Enable IR to LIRC bridge" | 102 | tristate "Enable IR to LIRC bridge" |
| 92 | depends on RC_CORE | 103 | depends on RC_CORE |
diff --git a/drivers/media/rc/Makefile b/drivers/media/rc/Makefile index 52830e5f4eaa..f224db027c41 100644 --- a/drivers/media/rc/Makefile +++ b/drivers/media/rc/Makefile | |||
| @@ -10,6 +10,7 @@ obj-$(CONFIG_IR_RC6_DECODER) += ir-rc6-decoder.o | |||
| 10 | obj-$(CONFIG_IR_JVC_DECODER) += ir-jvc-decoder.o | 10 | obj-$(CONFIG_IR_JVC_DECODER) += ir-jvc-decoder.o |
| 11 | obj-$(CONFIG_IR_SONY_DECODER) += ir-sony-decoder.o | 11 | obj-$(CONFIG_IR_SONY_DECODER) += ir-sony-decoder.o |
| 12 | obj-$(CONFIG_IR_RC5_SZ_DECODER) += ir-rc5-sz-decoder.o | 12 | obj-$(CONFIG_IR_RC5_SZ_DECODER) += ir-rc5-sz-decoder.o |
| 13 | obj-$(CONFIG_IR_MCE_KBD_DECODER) += ir-mce_kbd-decoder.o | ||
| 13 | obj-$(CONFIG_IR_LIRC_CODEC) += ir-lirc-codec.o | 14 | obj-$(CONFIG_IR_LIRC_CODEC) += ir-lirc-codec.o |
| 14 | 15 | ||
| 15 | # stand-alone IR receivers/transmitters | 16 | # stand-alone IR receivers/transmitters |
diff --git a/drivers/media/rc/ene_ir.c b/drivers/media/rc/ene_ir.c index a43ed6c41bfc..2b9c2569d74a 100644 --- a/drivers/media/rc/ene_ir.c +++ b/drivers/media/rc/ene_ir.c | |||
| @@ -953,13 +953,13 @@ static void ene_set_idle(struct rc_dev *rdev, bool idle) | |||
| 953 | } | 953 | } |
| 954 | 954 | ||
| 955 | /* outside interface: transmit */ | 955 | /* outside interface: transmit */ |
| 956 | static int ene_transmit(struct rc_dev *rdev, int *buf, u32 n) | 956 | static int ene_transmit(struct rc_dev *rdev, unsigned *buf, unsigned n) |
| 957 | { | 957 | { |
| 958 | struct ene_device *dev = rdev->priv; | 958 | struct ene_device *dev = rdev->priv; |
| 959 | unsigned long flags; | 959 | unsigned long flags; |
| 960 | 960 | ||
| 961 | dev->tx_buffer = buf; | 961 | dev->tx_buffer = buf; |
| 962 | dev->tx_len = n / sizeof(int); | 962 | dev->tx_len = n; |
| 963 | dev->tx_pos = 0; | 963 | dev->tx_pos = 0; |
| 964 | dev->tx_reg = 0; | 964 | dev->tx_reg = 0; |
| 965 | dev->tx_done = 0; | 965 | dev->tx_done = 0; |
diff --git a/drivers/media/rc/ene_ir.h b/drivers/media/rc/ene_ir.h index 337a41d4450b..017c209cdf8a 100644 --- a/drivers/media/rc/ene_ir.h +++ b/drivers/media/rc/ene_ir.h | |||
| @@ -235,7 +235,7 @@ struct ene_device { | |||
| 235 | bool tx_sample_pulse; /* current sample is pulse */ | 235 | bool tx_sample_pulse; /* current sample is pulse */ |
| 236 | 236 | ||
| 237 | /* TX buffer */ | 237 | /* TX buffer */ |
| 238 | int *tx_buffer; /* input samples buffer*/ | 238 | unsigned *tx_buffer; /* input samples buffer*/ |
| 239 | int tx_pos; /* position in that bufer */ | 239 | int tx_pos; /* position in that bufer */ |
| 240 | int tx_len; /* current len of tx buffer */ | 240 | int tx_len; /* current len of tx buffer */ |
| 241 | int tx_done; /* done transmitting */ | 241 | int tx_done; /* done transmitting */ |
diff --git a/drivers/media/rc/ir-lirc-codec.c b/drivers/media/rc/ir-lirc-codec.c index 1c5cc65ea1e1..e5eeec4da76e 100644 --- a/drivers/media/rc/ir-lirc-codec.c +++ b/drivers/media/rc/ir-lirc-codec.c | |||
| @@ -103,19 +103,19 @@ static ssize_t ir_lirc_transmit_ir(struct file *file, const char *buf, | |||
| 103 | { | 103 | { |
| 104 | struct lirc_codec *lirc; | 104 | struct lirc_codec *lirc; |
| 105 | struct rc_dev *dev; | 105 | struct rc_dev *dev; |
| 106 | int *txbuf; /* buffer with values to transmit */ | 106 | unsigned int *txbuf; /* buffer with values to transmit */ |
| 107 | int ret = 0; | 107 | ssize_t ret = 0; |
| 108 | size_t count; | 108 | size_t count; |
| 109 | 109 | ||
| 110 | lirc = lirc_get_pdata(file); | 110 | lirc = lirc_get_pdata(file); |
| 111 | if (!lirc) | 111 | if (!lirc) |
| 112 | return -EFAULT; | 112 | return -EFAULT; |
| 113 | 113 | ||
| 114 | if (n % sizeof(int)) | 114 | if (n < sizeof(unsigned) || n % sizeof(unsigned)) |
| 115 | return -EINVAL; | 115 | return -EINVAL; |
| 116 | 116 | ||
| 117 | count = n / sizeof(int); | 117 | count = n / sizeof(unsigned); |
| 118 | if (count > LIRCBUF_SIZE || count % 2 == 0 || n % sizeof(int) != 0) | 118 | if (count > LIRCBUF_SIZE || count % 2 == 0) |
| 119 | return -EINVAL; | 119 | return -EINVAL; |
| 120 | 120 | ||
| 121 | txbuf = memdup_user(buf, n); | 121 | txbuf = memdup_user(buf, n); |
| @@ -129,7 +129,10 @@ static ssize_t ir_lirc_transmit_ir(struct file *file, const char *buf, | |||
| 129 | } | 129 | } |
| 130 | 130 | ||
| 131 | if (dev->tx_ir) | 131 | if (dev->tx_ir) |
| 132 | ret = dev->tx_ir(dev, txbuf, (u32)n); | 132 | ret = dev->tx_ir(dev, txbuf, count); |
| 133 | |||
| 134 | if (ret > 0) | ||
| 135 | ret *= sizeof(unsigned); | ||
| 133 | 136 | ||
| 134 | out: | 137 | out: |
| 135 | kfree(txbuf); | 138 | kfree(txbuf); |
diff --git a/drivers/media/rc/ir-mce_kbd-decoder.c b/drivers/media/rc/ir-mce_kbd-decoder.c new file mode 100644 index 000000000000..3784ebf80ec7 --- /dev/null +++ b/drivers/media/rc/ir-mce_kbd-decoder.c | |||
| @@ -0,0 +1,449 @@ | |||
| 1 | /* ir-mce_kbd-decoder.c - A decoder for the RC6-ish keyboard/mouse IR protocol | ||
| 2 | * used by the Microsoft Remote Keyboard for Windows Media Center Edition, | ||
| 3 | * referred to by Microsoft's Windows Media Center remote specification docs | ||
| 4 | * as "an internal protocol called MCIR-2". | ||
| 5 | * | ||
| 6 | * Copyright (C) 2011 by Jarod Wilson <jarod@redhat.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License as published by | ||
| 10 | * the Free Software Foundation version 2 of the License. | ||
| 11 | * | ||
| 12 | * This program is distributed in the hope that it will be useful, | ||
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 15 | * GNU General Public License for more details. | ||
| 16 | */ | ||
| 17 | #include <linux/module.h> | ||
| 18 | |||
| 19 | #include "rc-core-priv.h" | ||
| 20 | |||
| 21 | /* | ||
| 22 | * This decoder currently supports: | ||
| 23 | * - MCIR-2 29-bit IR signals used for mouse movement and buttons | ||
| 24 | * - MCIR-2 32-bit IR signals used for standard keyboard keys | ||
| 25 | * | ||
| 26 | * The media keys on the keyboard send RC-6 signals that are inditinguishable | ||
| 27 | * from the keys of the same name on the stock MCE remote, and will be handled | ||
| 28 | * by the standard RC-6 decoder, and be made available to the system via the | ||
| 29 | * input device for the remote, rather than the keyboard/mouse one. | ||
| 30 | */ | ||
| 31 | |||
| 32 | #define MCIR2_UNIT 333333 /* ns */ | ||
| 33 | #define MCIR2_HEADER_NBITS 5 | ||
| 34 | #define MCIR2_MOUSE_NBITS 29 | ||
| 35 | #define MCIR2_KEYBOARD_NBITS 32 | ||
| 36 | #define MCIR2_PREFIX_PULSE (8 * MCIR2_UNIT) | ||
| 37 | #define MCIR2_PREFIX_SPACE (1 * MCIR2_UNIT) | ||
| 38 | #define MCIR2_MAX_LEN (3 * MCIR2_UNIT) | ||
| 39 | #define MCIR2_BIT_START (1 * MCIR2_UNIT) | ||
| 40 | #define MCIR2_BIT_END (1 * MCIR2_UNIT) | ||
| 41 | #define MCIR2_BIT_0 (1 * MCIR2_UNIT) | ||
| 42 | #define MCIR2_BIT_SET (2 * MCIR2_UNIT) | ||
| 43 | #define MCIR2_MODE_MASK 0xf /* for the header bits */ | ||
| 44 | #define MCIR2_KEYBOARD_HEADER 0x4 | ||
| 45 | #define MCIR2_MOUSE_HEADER 0x1 | ||
| 46 | #define MCIR2_MASK_KEYS_START 0xe0 | ||
| 47 | |||
| 48 | enum mce_kbd_mode { | ||
| 49 | MCIR2_MODE_KEYBOARD, | ||
| 50 | MCIR2_MODE_MOUSE, | ||
| 51 | MCIR2_MODE_UNKNOWN, | ||
| 52 | }; | ||
| 53 | |||
| 54 | enum mce_kbd_state { | ||
| 55 | STATE_INACTIVE, | ||
| 56 | STATE_HEADER_BIT_START, | ||
| 57 | STATE_HEADER_BIT_END, | ||
| 58 | STATE_BODY_BIT_START, | ||
| 59 | STATE_BODY_BIT_END, | ||
| 60 | STATE_FINISHED, | ||
| 61 | }; | ||
| 62 | |||
| 63 | static unsigned char kbd_keycodes[256] = { | ||
| 64 | KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_A, | ||
| 65 | KEY_B, KEY_C, KEY_D, KEY_E, KEY_F, | ||
| 66 | KEY_G, KEY_H, KEY_I, KEY_J, KEY_K, | ||
| 67 | KEY_L, KEY_M, KEY_N, KEY_O, KEY_P, | ||
| 68 | KEY_Q, KEY_R, KEY_S, KEY_T, KEY_U, | ||
| 69 | KEY_V, KEY_W, KEY_X, KEY_Y, KEY_Z, | ||
| 70 | KEY_1, KEY_2, KEY_3, KEY_4, KEY_5, | ||
| 71 | KEY_6, KEY_7, KEY_8, KEY_9, KEY_0, | ||
| 72 | KEY_ENTER, KEY_ESC, KEY_BACKSPACE, KEY_TAB, KEY_SPACE, | ||
| 73 | KEY_MINUS, KEY_EQUAL, KEY_LEFTBRACE, KEY_RIGHTBRACE, KEY_BACKSLASH, | ||
| 74 | KEY_RESERVED, KEY_SEMICOLON, KEY_APOSTROPHE, KEY_GRAVE, KEY_COMMA, | ||
| 75 | KEY_DOT, KEY_SLASH, KEY_CAPSLOCK, KEY_F1, KEY_F2, | ||
| 76 | KEY_F3, KEY_F4, KEY_F5, KEY_F6, KEY_F7, | ||
| 77 | KEY_F8, KEY_F9, KEY_F10, KEY_F11, KEY_F12, | ||
| 78 | KEY_SYSRQ, KEY_SCROLLLOCK, KEY_PAUSE, KEY_INSERT, KEY_HOME, | ||
| 79 | KEY_PAGEUP, KEY_DELETE, KEY_END, KEY_PAGEDOWN, KEY_RIGHT, | ||
| 80 | KEY_LEFT, KEY_DOWN, KEY_UP, KEY_NUMLOCK, KEY_KPSLASH, | ||
| 81 | KEY_KPASTERISK, KEY_KPMINUS, KEY_KPPLUS, KEY_KPENTER, KEY_KP1, | ||
| 82 | KEY_KP2, KEY_KP3, KEY_KP4, KEY_KP5, KEY_KP6, | ||
| 83 | KEY_KP7, KEY_KP8, KEY_KP9, KEY_KP0, KEY_KPDOT, | ||
| 84 | KEY_102ND, KEY_COMPOSE, KEY_POWER, KEY_KPEQUAL, KEY_F13, | ||
| 85 | KEY_F14, KEY_F15, KEY_F16, KEY_F17, KEY_F18, | ||
| 86 | KEY_F19, KEY_F20, KEY_F21, KEY_F22, KEY_F23, | ||
| 87 | KEY_F24, KEY_OPEN, KEY_HELP, KEY_PROPS, KEY_FRONT, | ||
| 88 | KEY_STOP, KEY_AGAIN, KEY_UNDO, KEY_CUT, KEY_COPY, | ||
| 89 | KEY_PASTE, KEY_FIND, KEY_MUTE, KEY_VOLUMEUP, KEY_VOLUMEDOWN, | ||
| 90 | KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_KPCOMMA, KEY_RESERVED, | ||
| 91 | KEY_RO, KEY_KATAKANAHIRAGANA, KEY_YEN, KEY_HENKAN, KEY_MUHENKAN, | ||
| 92 | KEY_KPJPCOMMA, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_HANGUEL, | ||
| 93 | KEY_HANJA, KEY_KATAKANA, KEY_HIRAGANA, KEY_ZENKAKUHANKAKU, KEY_RESERVED, | ||
| 94 | KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, | ||
| 95 | KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, | ||
| 96 | KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, | ||
| 97 | KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, | ||
| 98 | KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, | ||
| 99 | KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, | ||
| 100 | KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, | ||
| 101 | KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, | ||
| 102 | KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, | ||
| 103 | KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, | ||
| 104 | KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, | ||
| 105 | KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, | ||
| 106 | KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, | ||
| 107 | KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, | ||
| 108 | KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, KEY_LEFTCTRL, | ||
| 109 | KEY_LEFTSHIFT, KEY_LEFTALT, KEY_LEFTMETA, KEY_RIGHTCTRL, KEY_RIGHTSHIFT, | ||
| 110 | KEY_RIGHTALT, KEY_RIGHTMETA, KEY_PLAYPAUSE, KEY_STOPCD, KEY_PREVIOUSSONG, | ||
| 111 | KEY_NEXTSONG, KEY_EJECTCD, KEY_VOLUMEUP, KEY_VOLUMEDOWN, KEY_MUTE, | ||
| 112 | KEY_WWW, KEY_BACK, KEY_FORWARD, KEY_STOP, KEY_FIND, | ||
| 113 | KEY_SCROLLUP, KEY_SCROLLDOWN, KEY_EDIT, KEY_SLEEP, KEY_COFFEE, | ||
| 114 | KEY_REFRESH, KEY_CALC, KEY_RESERVED, KEY_RESERVED, KEY_RESERVED, | ||
| 115 | KEY_RESERVED | ||
| 116 | }; | ||
| 117 | |||
| 118 | static void mce_kbd_rx_timeout(unsigned long data) | ||
| 119 | { | ||
| 120 | struct mce_kbd_dec *mce_kbd = (struct mce_kbd_dec *)data; | ||
| 121 | int i; | ||
| 122 | unsigned char maskcode; | ||
| 123 | |||
| 124 | IR_dprintk(2, "timer callback clearing all keys\n"); | ||
| 125 | |||
| 126 | for (i = 0; i < 7; i++) { | ||
| 127 | maskcode = kbd_keycodes[MCIR2_MASK_KEYS_START + i]; | ||
| 128 | input_report_key(mce_kbd->idev, maskcode, 0); | ||
| 129 | } | ||
| 130 | |||
| 131 | for (i = 0; i < MCIR2_MASK_KEYS_START; i++) | ||
| 132 | input_report_key(mce_kbd->idev, kbd_keycodes[i], 0); | ||
| 133 | } | ||
| 134 | |||
| 135 | static enum mce_kbd_mode mce_kbd_mode(struct mce_kbd_dec *data) | ||
| 136 | { | ||
| 137 | switch (data->header & MCIR2_MODE_MASK) { | ||
| 138 | case MCIR2_KEYBOARD_HEADER: | ||
| 139 | return MCIR2_MODE_KEYBOARD; | ||
| 140 | case MCIR2_MOUSE_HEADER: | ||
| 141 | return MCIR2_MODE_MOUSE; | ||
| 142 | default: | ||
| 143 | return MCIR2_MODE_UNKNOWN; | ||
| 144 | } | ||
| 145 | } | ||
| 146 | |||
| 147 | static void ir_mce_kbd_process_keyboard_data(struct input_dev *idev, | ||
| 148 | u32 scancode) | ||
| 149 | { | ||
| 150 | u8 keydata = (scancode >> 8) & 0xff; | ||
| 151 | u8 shiftmask = scancode & 0xff; | ||
| 152 | unsigned char keycode, maskcode; | ||
| 153 | int i, keystate; | ||
| 154 | |||
| 155 | IR_dprintk(1, "keyboard: keydata = 0x%02x, shiftmask = 0x%02x\n", | ||
| 156 | keydata, shiftmask); | ||
| 157 | |||
| 158 | for (i = 0; i < 7; i++) { | ||
| 159 | maskcode = kbd_keycodes[MCIR2_MASK_KEYS_START + i]; | ||
| 160 | if (shiftmask & (1 << i)) | ||
| 161 | keystate = 1; | ||
| 162 | else | ||
| 163 | keystate = 0; | ||
| 164 | input_report_key(idev, maskcode, keystate); | ||
| 165 | } | ||
| 166 | |||
| 167 | if (keydata) { | ||
| 168 | keycode = kbd_keycodes[keydata]; | ||
| 169 | input_report_key(idev, keycode, 1); | ||
| 170 | } else { | ||
| 171 | for (i = 0; i < MCIR2_MASK_KEYS_START; i++) | ||
| 172 | input_report_key(idev, kbd_keycodes[i], 0); | ||
| 173 | } | ||
| 174 | } | ||
| 175 | |||
| 176 | static void ir_mce_kbd_process_mouse_data(struct input_dev *idev, u32 scancode) | ||
| 177 | { | ||
| 178 | /* raw mouse coordinates */ | ||
| 179 | u8 xdata = (scancode >> 7) & 0x7f; | ||
| 180 | u8 ydata = (scancode >> 14) & 0x7f; | ||
| 181 | int x, y; | ||
| 182 | /* mouse buttons */ | ||
| 183 | bool right = scancode & 0x40; | ||
| 184 | bool left = scancode & 0x20; | ||
| 185 | |||
| 186 | if (xdata & 0x40) | ||
| 187 | x = -((~xdata & 0x7f) + 1); | ||
| 188 | else | ||
| 189 | x = xdata; | ||
| 190 | |||
| 191 | if (ydata & 0x40) | ||
| 192 | y = -((~ydata & 0x7f) + 1); | ||
| 193 | else | ||
| 194 | y = ydata; | ||
| 195 | |||
| 196 | IR_dprintk(1, "mouse: x = %d, y = %d, btns = %s%s\n", | ||
| 197 | x, y, left ? "L" : "", right ? "R" : ""); | ||
| 198 | |||
| 199 | input_report_rel(idev, REL_X, x); | ||
| 200 | input_report_rel(idev, REL_Y, y); | ||
| 201 | |||
| 202 | input_report_key(idev, BTN_LEFT, left); | ||
| 203 | input_report_key(idev, BTN_RIGHT, right); | ||
| 204 | } | ||
| 205 | |||
| 206 | /** | ||
| 207 | * ir_mce_kbd_decode() - Decode one mce_kbd pulse or space | ||
| 208 | * @dev: the struct rc_dev descriptor of the device | ||
| 209 | * @ev: the struct ir_raw_event descriptor of the pulse/space | ||
| 210 | * | ||
| 211 | * This function returns -EINVAL if the pulse violates the state machine | ||
| 212 | */ | ||
| 213 | static int ir_mce_kbd_decode(struct rc_dev *dev, struct ir_raw_event ev) | ||
| 214 | { | ||
| 215 | struct mce_kbd_dec *data = &dev->raw->mce_kbd; | ||
| 216 | u32 scancode; | ||
| 217 | unsigned long delay; | ||
| 218 | |||
| 219 | if (!(dev->raw->enabled_protocols & RC_TYPE_MCE_KBD)) | ||
| 220 | return 0; | ||
| 221 | |||
| 222 | if (!is_timing_event(ev)) { | ||
| 223 | if (ev.reset) | ||
| 224 | data->state = STATE_INACTIVE; | ||
| 225 | return 0; | ||
| 226 | } | ||
| 227 | |||
| 228 | if (!geq_margin(ev.duration, MCIR2_UNIT, MCIR2_UNIT / 2)) | ||
| 229 | goto out; | ||
| 230 | |||
| 231 | again: | ||
| 232 | IR_dprintk(2, "started at state %i (%uus %s)\n", | ||
| 233 | data->state, TO_US(ev.duration), TO_STR(ev.pulse)); | ||
| 234 | |||
| 235 | if (!geq_margin(ev.duration, MCIR2_UNIT, MCIR2_UNIT / 2)) | ||
| 236 | return 0; | ||
| 237 | |||
| 238 | switch (data->state) { | ||
| 239 | |||
| 240 | case STATE_INACTIVE: | ||
| 241 | if (!ev.pulse) | ||
| 242 | break; | ||
| 243 | |||
| 244 | /* Note: larger margin on first pulse since each MCIR2_UNIT | ||
| 245 | is quite short and some hardware takes some time to | ||
| 246 | adjust to the signal */ | ||
| 247 | if (!eq_margin(ev.duration, MCIR2_PREFIX_PULSE, MCIR2_UNIT)) | ||
| 248 | break; | ||
| 249 | |||
| 250 | data->state = STATE_HEADER_BIT_START; | ||
| 251 | data->count = 0; | ||
| 252 | data->header = 0; | ||
| 253 | return 0; | ||
| 254 | |||
| 255 | case STATE_HEADER_BIT_START: | ||
| 256 | if (geq_margin(ev.duration, MCIR2_MAX_LEN, MCIR2_UNIT / 2)) | ||
| 257 | break; | ||
| 258 | |||
| 259 | data->header <<= 1; | ||
| 260 | if (ev.pulse) | ||
| 261 | data->header |= 1; | ||
| 262 | data->count++; | ||
| 263 | data->state = STATE_HEADER_BIT_END; | ||
| 264 | return 0; | ||
| 265 | |||
| 266 | case STATE_HEADER_BIT_END: | ||
| 267 | if (!is_transition(&ev, &dev->raw->prev_ev)) | ||
| 268 | break; | ||
| 269 | |||
| 270 | decrease_duration(&ev, MCIR2_BIT_END); | ||
| 271 | |||
| 272 | if (data->count != MCIR2_HEADER_NBITS) { | ||
| 273 | data->state = STATE_HEADER_BIT_START; | ||
| 274 | goto again; | ||
| 275 | } | ||
| 276 | |||
| 277 | switch (mce_kbd_mode(data)) { | ||
| 278 | case MCIR2_MODE_KEYBOARD: | ||
| 279 | data->wanted_bits = MCIR2_KEYBOARD_NBITS; | ||
| 280 | break; | ||
| 281 | case MCIR2_MODE_MOUSE: | ||
| 282 | data->wanted_bits = MCIR2_MOUSE_NBITS; | ||
| 283 | break; | ||
| 284 | default: | ||
| 285 | IR_dprintk(1, "not keyboard or mouse data\n"); | ||
| 286 | goto out; | ||
| 287 | } | ||
| 288 | |||
| 289 | data->count = 0; | ||
| 290 | data->body = 0; | ||
| 291 | data->state = STATE_BODY_BIT_START; | ||
| 292 | goto again; | ||
| 293 | |||
| 294 | case STATE_BODY_BIT_START: | ||
| 295 | if (geq_margin(ev.duration, MCIR2_MAX_LEN, MCIR2_UNIT / 2)) | ||
| 296 | break; | ||
| 297 | |||
| 298 | data->body <<= 1; | ||
| 299 | if (ev.pulse) | ||
| 300 | data->body |= 1; | ||
| 301 | data->count++; | ||
| 302 | data->state = STATE_BODY_BIT_END; | ||
| 303 | return 0; | ||
| 304 | |||
| 305 | case STATE_BODY_BIT_END: | ||
| 306 | if (!is_transition(&ev, &dev->raw->prev_ev)) | ||
| 307 | break; | ||
| 308 | |||
| 309 | if (data->count == data->wanted_bits) | ||
| 310 | data->state = STATE_FINISHED; | ||
| 311 | else | ||
| 312 | data->state = STATE_BODY_BIT_START; | ||
| 313 | |||
| 314 | decrease_duration(&ev, MCIR2_BIT_END); | ||
| 315 | goto again; | ||
| 316 | |||
| 317 | case STATE_FINISHED: | ||
| 318 | if (ev.pulse) | ||
| 319 | break; | ||
| 320 | |||
| 321 | switch (data->wanted_bits) { | ||
| 322 | case MCIR2_KEYBOARD_NBITS: | ||
| 323 | scancode = data->body & 0xffff; | ||
| 324 | IR_dprintk(1, "keyboard data 0x%08x\n", data->body); | ||
| 325 | if (dev->timeout) | ||
| 326 | delay = usecs_to_jiffies(dev->timeout / 1000); | ||
| 327 | else | ||
| 328 | delay = msecs_to_jiffies(100); | ||
| 329 | mod_timer(&data->rx_timeout, jiffies + delay); | ||
| 330 | /* Pass data to keyboard buffer parser */ | ||
| 331 | ir_mce_kbd_process_keyboard_data(data->idev, scancode); | ||
| 332 | break; | ||
| 333 | case MCIR2_MOUSE_NBITS: | ||
| 334 | scancode = data->body & 0x1fffff; | ||
| 335 | IR_dprintk(1, "mouse data 0x%06x\n", scancode); | ||
| 336 | /* Pass data to mouse buffer parser */ | ||
| 337 | ir_mce_kbd_process_mouse_data(data->idev, scancode); | ||
| 338 | break; | ||
| 339 | default: | ||
| 340 | IR_dprintk(1, "not keyboard or mouse data\n"); | ||
| 341 | goto out; | ||
| 342 | } | ||
| 343 | |||
| 344 | data->state = STATE_INACTIVE; | ||
| 345 | input_sync(data->idev); | ||
| 346 | return 0; | ||
| 347 | } | ||
| 348 | |||
| 349 | out: | ||
| 350 | IR_dprintk(1, "failed at state %i (%uus %s)\n", | ||
| 351 | data->state, TO_US(ev.duration), TO_STR(ev.pulse)); | ||
| 352 | data->state = STATE_INACTIVE; | ||
| 353 | input_sync(data->idev); | ||
| 354 | return -EINVAL; | ||
| 355 | } | ||
| 356 | |||
| 357 | static int ir_mce_kbd_register(struct rc_dev *dev) | ||
| 358 | { | ||
| 359 | struct mce_kbd_dec *mce_kbd = &dev->raw->mce_kbd; | ||
| 360 | struct input_dev *idev; | ||
| 361 | int i, ret; | ||
| 362 | |||
| 363 | idev = input_allocate_device(); | ||
| 364 | if (!idev) | ||
| 365 | return -ENOMEM; | ||
| 366 | |||
| 367 | snprintf(mce_kbd->name, sizeof(mce_kbd->name), | ||
| 368 | "MCE IR Keyboard/Mouse (%s)", dev->driver_name); | ||
| 369 | strlcat(mce_kbd->phys, "/input0", sizeof(mce_kbd->phys)); | ||
| 370 | |||
| 371 | idev->name = mce_kbd->name; | ||
| 372 | idev->phys = mce_kbd->phys; | ||
| 373 | |||
| 374 | /* Keyboard bits */ | ||
| 375 | set_bit(EV_KEY, idev->evbit); | ||
| 376 | set_bit(EV_REP, idev->evbit); | ||
| 377 | for (i = 0; i < sizeof(kbd_keycodes); i++) | ||
| 378 | set_bit(kbd_keycodes[i], idev->keybit); | ||
| 379 | |||
| 380 | /* Mouse bits */ | ||
| 381 | set_bit(EV_REL, idev->evbit); | ||
| 382 | set_bit(REL_X, idev->relbit); | ||
| 383 | set_bit(REL_Y, idev->relbit); | ||
| 384 | set_bit(BTN_LEFT, idev->keybit); | ||
| 385 | set_bit(BTN_RIGHT, idev->keybit); | ||
| 386 | |||
| 387 | /* Report scancodes too */ | ||
| 388 | set_bit(EV_MSC, idev->evbit); | ||
| 389 | set_bit(MSC_SCAN, idev->mscbit); | ||
| 390 | |||
| 391 | setup_timer(&mce_kbd->rx_timeout, mce_kbd_rx_timeout, | ||
| 392 | (unsigned long)mce_kbd); | ||
| 393 | |||
| 394 | input_set_drvdata(idev, mce_kbd); | ||
| 395 | |||
| 396 | #if 0 | ||
| 397 | /* Adding this reference means two input devices are associated with | ||
| 398 | * this rc-core device, which ir-keytable doesn't cope with yet */ | ||
| 399 | idev->dev.parent = &dev->dev; | ||
| 400 | #endif | ||
| 401 | |||
| 402 | ret = input_register_device(idev); | ||
| 403 | if (ret < 0) { | ||
| 404 | input_free_device(idev); | ||
| 405 | return -EIO; | ||
| 406 | } | ||
| 407 | |||
| 408 | mce_kbd->idev = idev; | ||
| 409 | |||
| 410 | return 0; | ||
| 411 | } | ||
| 412 | |||
| 413 | static int ir_mce_kbd_unregister(struct rc_dev *dev) | ||
| 414 | { | ||
| 415 | struct mce_kbd_dec *mce_kbd = &dev->raw->mce_kbd; | ||
| 416 | struct input_dev *idev = mce_kbd->idev; | ||
| 417 | |||
| 418 | del_timer_sync(&mce_kbd->rx_timeout); | ||
| 419 | input_unregister_device(idev); | ||
| 420 | |||
| 421 | return 0; | ||
| 422 | } | ||
| 423 | |||
| 424 | static struct ir_raw_handler mce_kbd_handler = { | ||
| 425 | .protocols = RC_TYPE_MCE_KBD, | ||
| 426 | .decode = ir_mce_kbd_decode, | ||
| 427 | .raw_register = ir_mce_kbd_register, | ||
| 428 | .raw_unregister = ir_mce_kbd_unregister, | ||
| 429 | }; | ||
| 430 | |||
| 431 | static int __init ir_mce_kbd_decode_init(void) | ||
| 432 | { | ||
| 433 | ir_raw_handler_register(&mce_kbd_handler); | ||
| 434 | |||
| 435 | printk(KERN_INFO "IR MCE Keyboard/mouse protocol handler initialized\n"); | ||
| 436 | return 0; | ||
| 437 | } | ||
| 438 | |||
| 439 | static void __exit ir_mce_kbd_decode_exit(void) | ||
| 440 | { | ||
| 441 | ir_raw_handler_unregister(&mce_kbd_handler); | ||
| 442 | } | ||
| 443 | |||
| 444 | module_init(ir_mce_kbd_decode_init); | ||
| 445 | module_exit(ir_mce_kbd_decode_exit); | ||
| 446 | |||
| 447 | MODULE_LICENSE("GPL"); | ||
| 448 | MODULE_AUTHOR("Jarod Wilson <jarod@redhat.com>"); | ||
| 449 | MODULE_DESCRIPTION("MCE Keyboard/mouse IR protocol decoder"); | ||
diff --git a/drivers/media/rc/ir-raw.c b/drivers/media/rc/ir-raw.c index 423ed45d6c55..27808bb59eba 100644 --- a/drivers/media/rc/ir-raw.c +++ b/drivers/media/rc/ir-raw.c | |||
| @@ -355,6 +355,7 @@ static void init_decoders(struct work_struct *work) | |||
| 355 | load_rc6_decode(); | 355 | load_rc6_decode(); |
| 356 | load_jvc_decode(); | 356 | load_jvc_decode(); |
| 357 | load_sony_decode(); | 357 | load_sony_decode(); |
| 358 | load_mce_kbd_decode(); | ||
| 358 | load_lirc_codec(); | 359 | load_lirc_codec(); |
| 359 | 360 | ||
| 360 | /* If needed, we may later add some init code. In this case, | 361 | /* If needed, we may later add some init code. In this case, |
diff --git a/drivers/media/rc/ite-cir.c b/drivers/media/rc/ite-cir.c index d20168fe4c40..682009d76cdf 100644 --- a/drivers/media/rc/ite-cir.c +++ b/drivers/media/rc/ite-cir.c | |||
| @@ -382,7 +382,7 @@ static int ite_set_tx_duty_cycle(struct rc_dev *rcdev, u32 duty_cycle) | |||
| 382 | /* transmit out IR pulses; what you get here is a batch of alternating | 382 | /* transmit out IR pulses; what you get here is a batch of alternating |
| 383 | * pulse/space/pulse/space lengths that we should write out completely through | 383 | * pulse/space/pulse/space lengths that we should write out completely through |
| 384 | * the FIFO, blocking on a full FIFO */ | 384 | * the FIFO, blocking on a full FIFO */ |
| 385 | static int ite_tx_ir(struct rc_dev *rcdev, int *txbuf, u32 n) | 385 | static int ite_tx_ir(struct rc_dev *rcdev, unsigned *txbuf, unsigned n) |
| 386 | { | 386 | { |
| 387 | unsigned long flags; | 387 | unsigned long flags; |
| 388 | struct ite_dev *dev = rcdev->priv; | 388 | struct ite_dev *dev = rcdev->priv; |
| @@ -398,9 +398,6 @@ static int ite_tx_ir(struct rc_dev *rcdev, int *txbuf, u32 n) | |||
| 398 | /* clear the array just in case */ | 398 | /* clear the array just in case */ |
| 399 | memset(last_sent, 0, ARRAY_SIZE(last_sent)); | 399 | memset(last_sent, 0, ARRAY_SIZE(last_sent)); |
| 400 | 400 | ||
| 401 | /* n comes in bytes; convert to ints */ | ||
| 402 | n /= sizeof(int); | ||
| 403 | |||
| 404 | spin_lock_irqsave(&dev->lock, flags); | 401 | spin_lock_irqsave(&dev->lock, flags); |
| 405 | 402 | ||
| 406 | /* let everybody know we're now transmitting */ | 403 | /* let everybody know we're now transmitting */ |
diff --git a/drivers/media/rc/keymaps/rc-rc6-mce.c b/drivers/media/rc/keymaps/rc-rc6-mce.c index 01b69bcc8666..c3907e211d39 100644 --- a/drivers/media/rc/keymaps/rc-rc6-mce.c +++ b/drivers/media/rc/keymaps/rc-rc6-mce.c | |||
| @@ -29,7 +29,7 @@ static struct rc_map_table rc6_mce[] = { | |||
| 29 | 29 | ||
| 30 | { 0x800f040a, KEY_DELETE }, | 30 | { 0x800f040a, KEY_DELETE }, |
| 31 | { 0x800f040b, KEY_ENTER }, | 31 | { 0x800f040b, KEY_ENTER }, |
| 32 | { 0x800f040c, KEY_POWER }, /* PC Power */ | 32 | { 0x800f040c, KEY_SLEEP }, /* Formerly PC Power */ |
| 33 | { 0x800f040d, KEY_MEDIA }, /* Windows MCE button */ | 33 | { 0x800f040d, KEY_MEDIA }, /* Windows MCE button */ |
| 34 | { 0x800f040e, KEY_MUTE }, | 34 | { 0x800f040e, KEY_MUTE }, |
| 35 | { 0x800f040f, KEY_INFO }, | 35 | { 0x800f040f, KEY_INFO }, |
| @@ -44,7 +44,6 @@ static struct rc_map_table rc6_mce[] = { | |||
| 44 | { 0x800f0416, KEY_PLAY }, | 44 | { 0x800f0416, KEY_PLAY }, |
| 45 | { 0x800f0417, KEY_RECORD }, | 45 | { 0x800f0417, KEY_RECORD }, |
| 46 | { 0x800f0418, KEY_PAUSE }, | 46 | { 0x800f0418, KEY_PAUSE }, |
| 47 | { 0x800f046e, KEY_PLAYPAUSE }, | ||
| 48 | { 0x800f0419, KEY_STOP }, | 47 | { 0x800f0419, KEY_STOP }, |
| 49 | { 0x800f041a, KEY_NEXT }, | 48 | { 0x800f041a, KEY_NEXT }, |
| 50 | { 0x800f041b, KEY_PREVIOUS }, | 49 | { 0x800f041b, KEY_PREVIOUS }, |
diff --git a/drivers/media/rc/mceusb.c b/drivers/media/rc/mceusb.c index ec972dc25790..85ff9a1ffb39 100644 --- a/drivers/media/rc/mceusb.c +++ b/drivers/media/rc/mceusb.c | |||
| @@ -692,20 +692,18 @@ static void mce_flush_rx_buffer(struct mceusb_dev *ir, int size) | |||
| 692 | } | 692 | } |
| 693 | 693 | ||
| 694 | /* Send data out the IR blaster port(s) */ | 694 | /* Send data out the IR blaster port(s) */ |
| 695 | static int mceusb_tx_ir(struct rc_dev *dev, int *txbuf, u32 n) | 695 | static int mceusb_tx_ir(struct rc_dev *dev, unsigned *txbuf, unsigned count) |
| 696 | { | 696 | { |
| 697 | struct mceusb_dev *ir = dev->priv; | 697 | struct mceusb_dev *ir = dev->priv; |
| 698 | int i, ret = 0; | 698 | int i, ret = 0; |
| 699 | int count, cmdcount = 0; | 699 | int cmdcount = 0; |
| 700 | unsigned char *cmdbuf; /* MCE command buffer */ | 700 | unsigned char *cmdbuf; /* MCE command buffer */ |
| 701 | long signal_duration = 0; /* Singnal length in us */ | 701 | long signal_duration = 0; /* Singnal length in us */ |
| 702 | struct timeval start_time, end_time; | 702 | struct timeval start_time, end_time; |
| 703 | 703 | ||
| 704 | do_gettimeofday(&start_time); | 704 | do_gettimeofday(&start_time); |
| 705 | 705 | ||
| 706 | count = n / sizeof(int); | 706 | cmdbuf = kzalloc(sizeof(unsigned) * MCE_CMDBUF_SIZE, GFP_KERNEL); |
| 707 | |||
| 708 | cmdbuf = kzalloc(sizeof(int) * MCE_CMDBUF_SIZE, GFP_KERNEL); | ||
| 709 | if (!cmdbuf) | 707 | if (!cmdbuf) |
| 710 | return -ENOMEM; | 708 | return -ENOMEM; |
| 711 | 709 | ||
| @@ -774,7 +772,7 @@ static int mceusb_tx_ir(struct rc_dev *dev, int *txbuf, u32 n) | |||
| 774 | 772 | ||
| 775 | out: | 773 | out: |
| 776 | kfree(cmdbuf); | 774 | kfree(cmdbuf); |
| 777 | return ret ? ret : n; | 775 | return ret ? ret : count; |
| 778 | } | 776 | } |
| 779 | 777 | ||
| 780 | /* Sets active IR outputs -- mce devices typically have two */ | 778 | /* Sets active IR outputs -- mce devices typically have two */ |
diff --git a/drivers/media/rc/nuvoton-cir.c b/drivers/media/rc/nuvoton-cir.c index ce595f9ab4c7..eae05b500476 100644 --- a/drivers/media/rc/nuvoton-cir.c +++ b/drivers/media/rc/nuvoton-cir.c | |||
| @@ -546,24 +546,18 @@ static int nvt_set_tx_carrier(struct rc_dev *dev, u32 carrier) | |||
| 546 | * number may larger than TXFCONT (0xff). So in interrupt_handler, it has to | 546 | * number may larger than TXFCONT (0xff). So in interrupt_handler, it has to |
| 547 | * set TXFCONT as 0xff, until buf_count less than 0xff. | 547 | * set TXFCONT as 0xff, until buf_count less than 0xff. |
| 548 | */ | 548 | */ |
| 549 | static int nvt_tx_ir(struct rc_dev *dev, int *txbuf, u32 n) | 549 | static int nvt_tx_ir(struct rc_dev *dev, unsigned *txbuf, unsigned n) |
| 550 | { | 550 | { |
| 551 | struct nvt_dev *nvt = dev->priv; | 551 | struct nvt_dev *nvt = dev->priv; |
| 552 | unsigned long flags; | 552 | unsigned long flags; |
| 553 | size_t cur_count; | ||
| 554 | unsigned int i; | 553 | unsigned int i; |
| 555 | u8 iren; | 554 | u8 iren; |
| 556 | int ret; | 555 | int ret; |
| 557 | 556 | ||
| 558 | spin_lock_irqsave(&nvt->tx.lock, flags); | 557 | spin_lock_irqsave(&nvt->tx.lock, flags); |
| 559 | 558 | ||
| 560 | if (n >= TX_BUF_LEN) { | 559 | ret = min((unsigned)(TX_BUF_LEN / sizeof(unsigned)), n); |
| 561 | nvt->tx.buf_count = cur_count = TX_BUF_LEN; | 560 | nvt->tx.buf_count = (ret * sizeof(unsigned)); |
| 562 | ret = TX_BUF_LEN; | ||
| 563 | } else { | ||
| 564 | nvt->tx.buf_count = cur_count = n; | ||
| 565 | ret = n; | ||
| 566 | } | ||
| 567 | 561 | ||
| 568 | memcpy(nvt->tx.buf, txbuf, nvt->tx.buf_count); | 562 | memcpy(nvt->tx.buf, txbuf, nvt->tx.buf_count); |
| 569 | 563 | ||
diff --git a/drivers/media/rc/rc-core-priv.h b/drivers/media/rc/rc-core-priv.h index 873b38789751..04c2c722b6ec 100644 --- a/drivers/media/rc/rc-core-priv.h +++ b/drivers/media/rc/rc-core-priv.h | |||
| @@ -84,6 +84,17 @@ struct ir_raw_event_ctrl { | |||
| 84 | unsigned count; | 84 | unsigned count; |
| 85 | unsigned wanted_bits; | 85 | unsigned wanted_bits; |
| 86 | } rc5_sz; | 86 | } rc5_sz; |
| 87 | struct mce_kbd_dec { | ||
| 88 | struct input_dev *idev; | ||
| 89 | struct timer_list rx_timeout; | ||
| 90 | char name[64]; | ||
| 91 | char phys[64]; | ||
| 92 | int state; | ||
| 93 | u8 header; | ||
| 94 | u32 body; | ||
| 95 | unsigned count; | ||
| 96 | unsigned wanted_bits; | ||
| 97 | } mce_kbd; | ||
| 87 | struct lirc_codec { | 98 | struct lirc_codec { |
| 88 | struct rc_dev *dev; | 99 | struct rc_dev *dev; |
| 89 | struct lirc_driver *drv; | 100 | struct lirc_driver *drv; |
| @@ -182,6 +193,13 @@ void ir_raw_init(void); | |||
| 182 | #define load_sony_decode() 0 | 193 | #define load_sony_decode() 0 |
| 183 | #endif | 194 | #endif |
| 184 | 195 | ||
| 196 | /* from ir-mce_kbd-decoder.c */ | ||
| 197 | #ifdef CONFIG_IR_MCE_KBD_DECODER_MODULE | ||
| 198 | #define load_mce_kbd_decode() request_module("ir-mce_kbd-decoder") | ||
| 199 | #else | ||
| 200 | #define load_mce_kbd_decode() 0 | ||
| 201 | #endif | ||
| 202 | |||
| 185 | /* from ir-lirc-codec.c */ | 203 | /* from ir-lirc-codec.c */ |
| 186 | #ifdef CONFIG_IR_LIRC_CODEC_MODULE | 204 | #ifdef CONFIG_IR_LIRC_CODEC_MODULE |
| 187 | #define load_lirc_codec() request_module("ir-lirc-codec") | 205 | #define load_lirc_codec() request_module("ir-lirc-codec") |
diff --git a/drivers/media/rc/rc-loopback.c b/drivers/media/rc/rc-loopback.c index cc846b2619cf..efc6a514348a 100644 --- a/drivers/media/rc/rc-loopback.c +++ b/drivers/media/rc/rc-loopback.c | |||
| @@ -101,21 +101,14 @@ static int loop_set_rx_carrier_range(struct rc_dev *dev, u32 min, u32 max) | |||
| 101 | return 0; | 101 | return 0; |
| 102 | } | 102 | } |
| 103 | 103 | ||
| 104 | static int loop_tx_ir(struct rc_dev *dev, int *txbuf, u32 n) | 104 | static int loop_tx_ir(struct rc_dev *dev, unsigned *txbuf, unsigned count) |
| 105 | { | 105 | { |
| 106 | struct loopback_dev *lodev = dev->priv; | 106 | struct loopback_dev *lodev = dev->priv; |
| 107 | u32 rxmask; | 107 | u32 rxmask; |
| 108 | unsigned count; | ||
| 109 | unsigned total_duration = 0; | 108 | unsigned total_duration = 0; |
| 110 | unsigned i; | 109 | unsigned i; |
| 111 | DEFINE_IR_RAW_EVENT(rawir); | 110 | DEFINE_IR_RAW_EVENT(rawir); |
| 112 | 111 | ||
| 113 | if (n == 0 || n % sizeof(int)) { | ||
| 114 | dprintk("invalid tx buffer size\n"); | ||
| 115 | return -EINVAL; | ||
| 116 | } | ||
| 117 | |||
| 118 | count = n / sizeof(int); | ||
| 119 | for (i = 0; i < count; i++) | 112 | for (i = 0; i < count; i++) |
| 120 | total_duration += abs(txbuf[i]); | 113 | total_duration += abs(txbuf[i]); |
| 121 | 114 | ||
| @@ -142,7 +135,7 @@ static int loop_tx_ir(struct rc_dev *dev, int *txbuf, u32 n) | |||
| 142 | 135 | ||
| 143 | for (i = 0; i < count; i++) { | 136 | for (i = 0; i < count; i++) { |
| 144 | rawir.pulse = i % 2 ? false : true; | 137 | rawir.pulse = i % 2 ? false : true; |
| 145 | rawir.duration = abs(txbuf[i]) * 1000; | 138 | rawir.duration = txbuf[i] * 1000; |
| 146 | if (rawir.duration) | 139 | if (rawir.duration) |
| 147 | ir_raw_event_store_with_filter(dev, &rawir); | 140 | ir_raw_event_store_with_filter(dev, &rawir); |
| 148 | } | 141 | } |
| @@ -158,7 +151,7 @@ out: | |||
| 158 | /* Lirc expects this function to take as long as the total duration */ | 151 | /* Lirc expects this function to take as long as the total duration */ |
| 159 | set_current_state(TASK_INTERRUPTIBLE); | 152 | set_current_state(TASK_INTERRUPTIBLE); |
| 160 | schedule_timeout(usecs_to_jiffies(total_duration)); | 153 | schedule_timeout(usecs_to_jiffies(total_duration)); |
| 161 | return n; | 154 | return count; |
| 162 | } | 155 | } |
| 163 | 156 | ||
| 164 | static void loop_set_idle(struct rc_dev *dev, bool enable) | 157 | static void loop_set_idle(struct rc_dev *dev, bool enable) |
diff --git a/drivers/media/rc/rc-main.c b/drivers/media/rc/rc-main.c index 3186ac7c2c10..51a23f48bc7d 100644 --- a/drivers/media/rc/rc-main.c +++ b/drivers/media/rc/rc-main.c | |||
| @@ -735,6 +735,7 @@ static struct { | |||
| 735 | { RC_TYPE_JVC, "jvc" }, | 735 | { RC_TYPE_JVC, "jvc" }, |
| 736 | { RC_TYPE_SONY, "sony" }, | 736 | { RC_TYPE_SONY, "sony" }, |
| 737 | { RC_TYPE_RC5_SZ, "rc-5-sz" }, | 737 | { RC_TYPE_RC5_SZ, "rc-5-sz" }, |
| 738 | { RC_TYPE_MCE_KBD, "mce_kbd" }, | ||
| 738 | { RC_TYPE_LIRC, "lirc" }, | 739 | { RC_TYPE_LIRC, "lirc" }, |
| 739 | { RC_TYPE_OTHER, "other" }, | 740 | { RC_TYPE_OTHER, "other" }, |
| 740 | }; | 741 | }; |
| @@ -1099,7 +1100,6 @@ int rc_register_device(struct rc_dev *dev) | |||
| 1099 | if (rc < 0) | 1100 | if (rc < 0) |
| 1100 | goto out_input; | 1101 | goto out_input; |
| 1101 | } | 1102 | } |
| 1102 | mutex_unlock(&dev->lock); | ||
| 1103 | 1103 | ||
| 1104 | if (dev->change_protocol) { | 1104 | if (dev->change_protocol) { |
| 1105 | rc = dev->change_protocol(dev, rc_map->rc_type); | 1105 | rc = dev->change_protocol(dev, rc_map->rc_type); |
| @@ -1107,6 +1107,8 @@ int rc_register_device(struct rc_dev *dev) | |||
| 1107 | goto out_raw; | 1107 | goto out_raw; |
| 1108 | } | 1108 | } |
| 1109 | 1109 | ||
| 1110 | mutex_unlock(&dev->lock); | ||
| 1111 | |||
| 1110 | IR_dprintk(1, "Registered rc%ld (driver: %s, remote: %s, mode %s)\n", | 1112 | IR_dprintk(1, "Registered rc%ld (driver: %s, remote: %s, mode %s)\n", |
| 1111 | dev->devno, | 1113 | dev->devno, |
| 1112 | dev->driver_name ? dev->driver_name : "unknown", | 1114 | dev->driver_name ? dev->driver_name : "unknown", |
diff --git a/drivers/media/rc/redrat3.c b/drivers/media/rc/redrat3.c index 5147767ccb78..a16604477917 100644 --- a/drivers/media/rc/redrat3.c +++ b/drivers/media/rc/redrat3.c | |||
| @@ -205,6 +205,7 @@ struct redrat3_dev { | |||
| 205 | 205 | ||
| 206 | /* rx signal timeout timer */ | 206 | /* rx signal timeout timer */ |
| 207 | struct timer_list rx_timeout; | 207 | struct timer_list rx_timeout; |
| 208 | u32 hw_timeout; | ||
| 208 | 209 | ||
| 209 | /* Is the device currently receiving? */ | 210 | /* Is the device currently receiving? */ |
| 210 | bool recv_in_progress; | 211 | bool recv_in_progress; |
| @@ -414,20 +415,10 @@ static u32 redrat3_us_to_len(u32 microsec) | |||
| 414 | 415 | ||
| 415 | } | 416 | } |
| 416 | 417 | ||
| 417 | /* timer callback to send long trailing space on receive timeout */ | 418 | /* timer callback to send reset event */ |
| 418 | static void redrat3_rx_timeout(unsigned long data) | 419 | static void redrat3_rx_timeout(unsigned long data) |
| 419 | { | 420 | { |
| 420 | struct redrat3_dev *rr3 = (struct redrat3_dev *)data; | 421 | struct redrat3_dev *rr3 = (struct redrat3_dev *)data; |
| 421 | DEFINE_IR_RAW_EVENT(rawir); | ||
| 422 | |||
| 423 | rawir.pulse = false; | ||
| 424 | rawir.duration = rr3->rc->timeout; | ||
| 425 | rr3_dbg(rr3->dev, "storing trailing space with duration %d\n", | ||
| 426 | rawir.duration); | ||
| 427 | ir_raw_event_store_with_filter(rr3->rc, &rawir); | ||
| 428 | |||
| 429 | rr3_dbg(rr3->dev, "calling ir_raw_event_handle\n"); | ||
| 430 | ir_raw_event_handle(rr3->rc); | ||
| 431 | 422 | ||
| 432 | rr3_dbg(rr3->dev, "calling ir_raw_event_reset\n"); | 423 | rr3_dbg(rr3->dev, "calling ir_raw_event_reset\n"); |
| 433 | ir_raw_event_reset(rr3->rc); | 424 | ir_raw_event_reset(rr3->rc); |
| @@ -438,7 +429,7 @@ static void redrat3_process_ir_data(struct redrat3_dev *rr3) | |||
| 438 | DEFINE_IR_RAW_EVENT(rawir); | 429 | DEFINE_IR_RAW_EVENT(rawir); |
| 439 | struct redrat3_signal_header header; | 430 | struct redrat3_signal_header header; |
| 440 | struct device *dev; | 431 | struct device *dev; |
| 441 | int i; | 432 | int i, trailer = 0; |
| 442 | unsigned long delay; | 433 | unsigned long delay; |
| 443 | u32 mod_freq, single_len; | 434 | u32 mod_freq, single_len; |
| 444 | u16 *len_vals; | 435 | u16 *len_vals; |
| @@ -464,7 +455,8 @@ static void redrat3_process_ir_data(struct redrat3_dev *rr3) | |||
| 464 | if (!(header.length >= RR3_HEADER_LENGTH)) | 455 | if (!(header.length >= RR3_HEADER_LENGTH)) |
| 465 | dev_warn(dev, "read returned less than rr3 header len\n"); | 456 | dev_warn(dev, "read returned less than rr3 header len\n"); |
| 466 | 457 | ||
| 467 | delay = usecs_to_jiffies(rr3->rc->timeout / 1000); | 458 | /* Make sure we reset the IR kfifo after a bit of inactivity */ |
| 459 | delay = usecs_to_jiffies(rr3->hw_timeout); | ||
| 468 | mod_timer(&rr3->rx_timeout, jiffies + delay); | 460 | mod_timer(&rr3->rx_timeout, jiffies + delay); |
| 469 | 461 | ||
| 470 | memcpy(&tmp32, sig_data + RR3_PAUSE_OFFSET, sizeof(tmp32)); | 462 | memcpy(&tmp32, sig_data + RR3_PAUSE_OFFSET, sizeof(tmp32)); |
| @@ -506,9 +498,6 @@ static void redrat3_process_ir_data(struct redrat3_dev *rr3) | |||
| 506 | u16 val = len_vals[data_vals[i]]; | 498 | u16 val = len_vals[data_vals[i]]; |
| 507 | single_len = redrat3_len_to_us((u32)be16_to_cpu(val)); | 499 | single_len = redrat3_len_to_us((u32)be16_to_cpu(val)); |
| 508 | 500 | ||
| 509 | /* cap the value to IR_MAX_DURATION */ | ||
| 510 | single_len &= IR_MAX_DURATION; | ||
| 511 | |||
| 512 | /* we should always get pulse/space/pulse/space samples */ | 501 | /* we should always get pulse/space/pulse/space samples */ |
| 513 | if (i % 2) | 502 | if (i % 2) |
| 514 | rawir.pulse = false; | 503 | rawir.pulse = false; |
| @@ -516,6 +505,12 @@ static void redrat3_process_ir_data(struct redrat3_dev *rr3) | |||
| 516 | rawir.pulse = true; | 505 | rawir.pulse = true; |
| 517 | 506 | ||
| 518 | rawir.duration = US_TO_NS(single_len); | 507 | rawir.duration = US_TO_NS(single_len); |
| 508 | /* Save initial pulse length to fudge trailer */ | ||
| 509 | if (i == 0) | ||
| 510 | trailer = rawir.duration; | ||
| 511 | /* cap the value to IR_MAX_DURATION */ | ||
| 512 | rawir.duration &= IR_MAX_DURATION; | ||
| 513 | |||
| 519 | rr3_dbg(dev, "storing %s with duration %d (i: %d)\n", | 514 | rr3_dbg(dev, "storing %s with duration %d (i: %d)\n", |
| 520 | rawir.pulse ? "pulse" : "space", rawir.duration, i); | 515 | rawir.pulse ? "pulse" : "space", rawir.duration, i); |
| 521 | ir_raw_event_store_with_filter(rr3->rc, &rawir); | 516 | ir_raw_event_store_with_filter(rr3->rc, &rawir); |
| @@ -525,7 +520,10 @@ static void redrat3_process_ir_data(struct redrat3_dev *rr3) | |||
| 525 | if (i % 2) { | 520 | if (i % 2) { |
| 526 | rawir.pulse = false; | 521 | rawir.pulse = false; |
| 527 | /* this duration is made up, and may not be ideal... */ | 522 | /* this duration is made up, and may not be ideal... */ |
| 528 | rawir.duration = rr3->rc->timeout / 2; | 523 | if (trailer < US_TO_NS(1000)) |
| 524 | rawir.duration = US_TO_NS(2800); | ||
| 525 | else | ||
| 526 | rawir.duration = trailer; | ||
| 529 | rr3_dbg(dev, "storing trailing space with duration %d\n", | 527 | rr3_dbg(dev, "storing trailing space with duration %d\n", |
| 530 | rawir.duration); | 528 | rawir.duration); |
| 531 | ir_raw_event_store_with_filter(rr3->rc, &rawir); | 529 | ir_raw_event_store_with_filter(rr3->rc, &rawir); |
| @@ -629,36 +627,31 @@ static inline void redrat3_delete(struct redrat3_dev *rr3, | |||
| 629 | kfree(rr3); | 627 | kfree(rr3); |
| 630 | } | 628 | } |
| 631 | 629 | ||
| 632 | static u32 redrat3_get_timeout(struct device *dev, | 630 | static u32 redrat3_get_timeout(struct redrat3_dev *rr3) |
| 633 | struct rc_dev *rc, struct usb_device *udev) | ||
| 634 | { | 631 | { |
| 635 | u32 *tmp; | 632 | u32 *tmp; |
| 636 | u32 timeout = MS_TO_NS(150); /* a sane default, if things go haywire */ | 633 | u32 timeout = MS_TO_US(150); /* a sane default, if things go haywire */ |
| 637 | int len, ret, pipe; | 634 | int len, ret, pipe; |
| 638 | 635 | ||
| 639 | len = sizeof(*tmp); | 636 | len = sizeof(*tmp); |
| 640 | tmp = kzalloc(len, GFP_KERNEL); | 637 | tmp = kzalloc(len, GFP_KERNEL); |
| 641 | if (!tmp) { | 638 | if (!tmp) { |
| 642 | dev_warn(dev, "Memory allocation faillure\n"); | 639 | dev_warn(rr3->dev, "Memory allocation faillure\n"); |
| 643 | return timeout; | 640 | return timeout; |
| 644 | } | 641 | } |
| 645 | 642 | ||
| 646 | pipe = usb_rcvctrlpipe(udev, 0); | 643 | pipe = usb_rcvctrlpipe(rr3->udev, 0); |
| 647 | ret = usb_control_msg(udev, pipe, RR3_GET_IR_PARAM, | 644 | ret = usb_control_msg(rr3->udev, pipe, RR3_GET_IR_PARAM, |
| 648 | USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN, | 645 | USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN, |
| 649 | RR3_IR_IO_SIG_TIMEOUT, 0, tmp, len, HZ * 5); | 646 | RR3_IR_IO_SIG_TIMEOUT, 0, tmp, len, HZ * 5); |
| 650 | if (ret != len) { | 647 | if (ret != len) { |
| 651 | dev_warn(dev, "Failed to read timeout from hardware\n"); | 648 | dev_warn(rr3->dev, "Failed to read timeout from hardware\n"); |
| 652 | return timeout; | 649 | return timeout; |
| 653 | } | 650 | } |
| 654 | 651 | ||
| 655 | timeout = US_TO_NS(redrat3_len_to_us(be32_to_cpu(*tmp))); | 652 | timeout = redrat3_len_to_us(be32_to_cpu(*tmp)); |
| 656 | if (timeout < rc->min_timeout) | ||
| 657 | timeout = rc->min_timeout; | ||
| 658 | else if (timeout > rc->max_timeout) | ||
| 659 | timeout = rc->max_timeout; | ||
| 660 | 653 | ||
| 661 | rr3_dbg(dev, "Got timeout of %d ms\n", timeout / (1000 * 1000)); | 654 | rr3_dbg(rr3->dev, "Got timeout of %d ms\n", timeout / 1000); |
| 662 | return timeout; | 655 | return timeout; |
| 663 | } | 656 | } |
| 664 | 657 | ||
| @@ -1110,9 +1103,7 @@ static struct rc_dev *redrat3_init_rc_dev(struct redrat3_dev *rr3) | |||
| 1110 | rc->priv = rr3; | 1103 | rc->priv = rr3; |
| 1111 | rc->driver_type = RC_DRIVER_IR_RAW; | 1104 | rc->driver_type = RC_DRIVER_IR_RAW; |
| 1112 | rc->allowed_protos = RC_TYPE_ALL; | 1105 | rc->allowed_protos = RC_TYPE_ALL; |
| 1113 | rc->min_timeout = MS_TO_NS(RR3_RX_MIN_TIMEOUT); | 1106 | rc->timeout = US_TO_NS(2750); |
| 1114 | rc->max_timeout = MS_TO_NS(RR3_RX_MAX_TIMEOUT); | ||
| 1115 | rc->timeout = redrat3_get_timeout(dev, rc, rr3->udev); | ||
| 1116 | rc->tx_ir = redrat3_transmit_ir; | 1107 | rc->tx_ir = redrat3_transmit_ir; |
| 1117 | rc->s_tx_carrier = redrat3_set_tx_carrier; | 1108 | rc->s_tx_carrier = redrat3_set_tx_carrier; |
| 1118 | rc->driver_name = DRIVER_NAME; | 1109 | rc->driver_name = DRIVER_NAME; |
| @@ -1186,7 +1177,7 @@ static int __devinit redrat3_dev_probe(struct usb_interface *intf, | |||
| 1186 | rr3 = kzalloc(sizeof(*rr3), GFP_KERNEL); | 1177 | rr3 = kzalloc(sizeof(*rr3), GFP_KERNEL); |
| 1187 | if (rr3 == NULL) { | 1178 | if (rr3 == NULL) { |
| 1188 | dev_err(dev, "Memory allocation failure\n"); | 1179 | dev_err(dev, "Memory allocation failure\n"); |
| 1189 | goto error; | 1180 | goto no_endpoints; |
| 1190 | } | 1181 | } |
| 1191 | 1182 | ||
| 1192 | rr3->dev = &intf->dev; | 1183 | rr3->dev = &intf->dev; |
| @@ -1242,6 +1233,9 @@ static int __devinit redrat3_dev_probe(struct usb_interface *intf, | |||
| 1242 | if (retval < 0) | 1233 | if (retval < 0) |
| 1243 | goto error; | 1234 | goto error; |
| 1244 | 1235 | ||
| 1236 | /* store current hardware timeout, in us, will use for kfifo resets */ | ||
| 1237 | rr3->hw_timeout = redrat3_get_timeout(rr3); | ||
| 1238 | |||
| 1245 | /* default.. will get overridden by any sends with a freq defined */ | 1239 | /* default.. will get overridden by any sends with a freq defined */ |
| 1246 | rr3->carrier = 38000; | 1240 | rr3->carrier = 38000; |
| 1247 | 1241 | ||
| @@ -1280,6 +1274,7 @@ static void __devexit redrat3_dev_disconnect(struct usb_interface *intf) | |||
| 1280 | 1274 | ||
| 1281 | usb_set_intfdata(intf, NULL); | 1275 | usb_set_intfdata(intf, NULL); |
| 1282 | rc_unregister_device(rr3->rc); | 1276 | rc_unregister_device(rr3->rc); |
| 1277 | del_timer_sync(&rr3->rx_timeout); | ||
| 1283 | redrat3_delete(rr3, udev); | 1278 | redrat3_delete(rr3, udev); |
| 1284 | 1279 | ||
| 1285 | rr3_ftr(&intf->dev, "RedRat3 IR Transceiver now disconnected\n"); | 1280 | rr3_ftr(&intf->dev, "RedRat3 IR Transceiver now disconnected\n"); |
diff --git a/drivers/media/rc/winbond-cir.c b/drivers/media/rc/winbond-cir.c index 5d06b899e859..bec8abc965f7 100644 --- a/drivers/media/rc/winbond-cir.c +++ b/drivers/media/rc/winbond-cir.c | |||
| @@ -6,8 +6,8 @@ | |||
| 6 | * could probably support others (Winbond WEC102X, NatSemi, etc) | 6 | * could probably support others (Winbond WEC102X, NatSemi, etc) |
| 7 | * with minor modifications. | 7 | * with minor modifications. |
| 8 | * | 8 | * |
| 9 | * Original Author: David Härdeman <david@hardeman.nu> | 9 | * Original Author: David Härdeman <david@hardeman.nu> |
| 10 | * Copyright (C) 2009 - 2010 David Härdeman <david@hardeman.nu> | 10 | * Copyright (C) 2009 - 2011 David Härdeman <david@hardeman.nu> |
| 11 | * | 11 | * |
| 12 | * Dedicated to my daughter Matilda, without whose loving attention this | 12 | * Dedicated to my daughter Matilda, without whose loving attention this |
| 13 | * driver would have been finished in half the time and with a fraction | 13 | * driver would have been finished in half the time and with a fraction |
| @@ -577,16 +577,12 @@ wbcir_txmask(struct rc_dev *dev, u32 mask) | |||
| 577 | } | 577 | } |
| 578 | 578 | ||
| 579 | static int | 579 | static int |
| 580 | wbcir_tx(struct rc_dev *dev, int *buf, u32 bufsize) | 580 | wbcir_tx(struct rc_dev *dev, unsigned *buf, unsigned count) |
| 581 | { | 581 | { |
| 582 | struct wbcir_data *data = dev->priv; | 582 | struct wbcir_data *data = dev->priv; |
| 583 | u32 count; | ||
| 584 | unsigned i; | 583 | unsigned i; |
| 585 | unsigned long flags; | 584 | unsigned long flags; |
| 586 | 585 | ||
| 587 | /* bufsize has been sanity checked by the caller */ | ||
| 588 | count = bufsize / sizeof(int); | ||
| 589 | |||
| 590 | /* Not sure if this is possible, but better safe than sorry */ | 586 | /* Not sure if this is possible, but better safe than sorry */ |
| 591 | spin_lock_irqsave(&data->spinlock, flags); | 587 | spin_lock_irqsave(&data->spinlock, flags); |
| 592 | if (data->txstate != WBCIR_TXSTATE_INACTIVE) { | 588 | if (data->txstate != WBCIR_TXSTATE_INACTIVE) { |
| @@ -876,18 +872,8 @@ wbcir_init_hw(struct wbcir_data *data) | |||
| 876 | /* prescaler 1.0, tx/rx fifo lvl 16 */ | 872 | /* prescaler 1.0, tx/rx fifo lvl 16 */ |
| 877 | outb(0x30, data->sbase + WBCIR_REG_SP3_EXCR2); | 873 | outb(0x30, data->sbase + WBCIR_REG_SP3_EXCR2); |
| 878 | 874 | ||
| 879 | /* Set baud divisor to generate one byte per bit/cell */ | 875 | /* Set baud divisor to sample every 10 us */ |
| 880 | switch (protocol) { | 876 | outb(0x0F, data->sbase + WBCIR_REG_SP3_BGDL); |
| 881 | case IR_PROTOCOL_RC5: | ||
| 882 | outb(0xA7, data->sbase + WBCIR_REG_SP3_BGDL); | ||
| 883 | break; | ||
| 884 | case IR_PROTOCOL_RC6: | ||
| 885 | outb(0x53, data->sbase + WBCIR_REG_SP3_BGDL); | ||
| 886 | break; | ||
| 887 | case IR_PROTOCOL_NEC: | ||
| 888 | outb(0x69, data->sbase + WBCIR_REG_SP3_BGDL); | ||
| 889 | break; | ||
| 890 | } | ||
| 891 | outb(0x00, data->sbase + WBCIR_REG_SP3_BGDH); | 877 | outb(0x00, data->sbase + WBCIR_REG_SP3_BGDH); |
| 892 | 878 | ||
| 893 | /* Set CEIR mode */ | 879 | /* Set CEIR mode */ |
| @@ -896,9 +882,9 @@ wbcir_init_hw(struct wbcir_data *data) | |||
| 896 | inb(data->sbase + WBCIR_REG_SP3_LSR); /* Clear LSR */ | 882 | inb(data->sbase + WBCIR_REG_SP3_LSR); /* Clear LSR */ |
| 897 | inb(data->sbase + WBCIR_REG_SP3_MSR); /* Clear MSR */ | 883 | inb(data->sbase + WBCIR_REG_SP3_MSR); /* Clear MSR */ |
| 898 | 884 | ||
| 899 | /* Disable RX demod, run-length encoding/decoding, set freq span */ | 885 | /* Disable RX demod, enable run-length enc/dec, set freq span */ |
| 900 | wbcir_select_bank(data, WBCIR_BANK_7); | 886 | wbcir_select_bank(data, WBCIR_BANK_7); |
| 901 | outb(0x10, data->sbase + WBCIR_REG_SP3_RCCFG); | 887 | outb(0x90, data->sbase + WBCIR_REG_SP3_RCCFG); |
| 902 | 888 | ||
| 903 | /* Disable timer */ | 889 | /* Disable timer */ |
| 904 | wbcir_select_bank(data, WBCIR_BANK_4); | 890 | wbcir_select_bank(data, WBCIR_BANK_4); |
diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig index bb53de7fe408..f574dc012cad 100644 --- a/drivers/media/video/Kconfig +++ b/drivers/media/video/Kconfig | |||
| @@ -489,6 +489,15 @@ config VIDEO_TCM825X | |||
| 489 | This is a driver for the Toshiba TCM825x VGA camera sensor. | 489 | This is a driver for the Toshiba TCM825x VGA camera sensor. |
| 490 | It is used for example in Nokia N800. | 490 | It is used for example in Nokia N800. |
| 491 | 491 | ||
| 492 | comment "Flash devices" | ||
| 493 | |||
| 494 | config VIDEO_ADP1653 | ||
| 495 | tristate "ADP1653 flash support" | ||
| 496 | depends on I2C && VIDEO_V4L2 && MEDIA_CONTROLLER | ||
| 497 | ---help--- | ||
| 498 | This is a driver for the ADP1653 flash controller. It is used for | ||
| 499 | example in Nokia N900. | ||
| 500 | |||
| 492 | comment "Video improvement chips" | 501 | comment "Video improvement chips" |
| 493 | 502 | ||
| 494 | config VIDEO_UPD64031A | 503 | config VIDEO_UPD64031A |
| @@ -707,6 +716,8 @@ source "drivers/media/video/cx18/Kconfig" | |||
| 707 | 716 | ||
| 708 | source "drivers/media/video/saa7164/Kconfig" | 717 | source "drivers/media/video/saa7164/Kconfig" |
| 709 | 718 | ||
| 719 | source "drivers/media/video/marvell-ccic/Kconfig" | ||
| 720 | |||
| 710 | config VIDEO_M32R_AR | 721 | config VIDEO_M32R_AR |
| 711 | tristate "AR devices" | 722 | tristate "AR devices" |
| 712 | depends on M32R && VIDEO_V4L2 | 723 | depends on M32R && VIDEO_V4L2 |
| @@ -726,15 +737,6 @@ config VIDEO_M32R_AR_M64278 | |||
| 726 | To compile this driver as a module, choose M here: the | 737 | To compile this driver as a module, choose M here: the |
| 727 | module will be called arv. | 738 | module will be called arv. |
| 728 | 739 | ||
| 729 | config VIDEO_CAFE_CCIC | ||
| 730 | tristate "Marvell 88ALP01 (Cafe) CMOS Camera Controller support" | ||
| 731 | depends on PCI && I2C && VIDEO_V4L2 | ||
| 732 | select VIDEO_OV7670 | ||
| 733 | ---help--- | ||
| 734 | This is a video4linux2 driver for the Marvell 88ALP01 integrated | ||
| 735 | CMOS camera controller. This is the controller found on first- | ||
| 736 | generation OLPC systems. | ||
| 737 | |||
| 738 | config VIDEO_SR030PC30 | 740 | config VIDEO_SR030PC30 |
| 739 | tristate "SR030PC30 VGA camera sensor support" | 741 | tristate "SR030PC30 VGA camera sensor support" |
| 740 | depends on I2C && VIDEO_V4L2 | 742 | depends on I2C && VIDEO_V4L2 |
| @@ -846,6 +848,12 @@ config SOC_CAMERA_OV2640 | |||
| 846 | help | 848 | help |
| 847 | This is a ov2640 camera driver | 849 | This is a ov2640 camera driver |
| 848 | 850 | ||
| 851 | config SOC_CAMERA_OV5642 | ||
| 852 | tristate "ov5642 camera support" | ||
| 853 | depends on SOC_CAMERA && I2C | ||
| 854 | help | ||
| 855 | This is a V4L2 camera driver for the OmniVision OV5642 sensor | ||
| 856 | |||
| 849 | config SOC_CAMERA_OV6650 | 857 | config SOC_CAMERA_OV6650 |
| 850 | tristate "ov6650 sensor support" | 858 | tristate "ov6650 sensor support" |
| 851 | depends on SOC_CAMERA && I2C | 859 | depends on SOC_CAMERA && I2C |
| @@ -952,6 +960,14 @@ config VIDEO_SAMSUNG_S5P_FIMC | |||
| 952 | To compile this driver as a module, choose M here: the | 960 | To compile this driver as a module, choose M here: the |
| 953 | module will be called s5p-fimc. | 961 | module will be called s5p-fimc. |
| 954 | 962 | ||
| 963 | config VIDEO_ATMEL_ISI | ||
| 964 | tristate "ATMEL Image Sensor Interface (ISI) support" | ||
| 965 | depends on VIDEO_DEV && SOC_CAMERA && ARCH_AT91 | ||
| 966 | select VIDEOBUF2_DMA_CONTIG | ||
| 967 | ---help--- | ||
| 968 | This module makes the ATMEL Image Sensor Interface available | ||
| 969 | as a v4l2 device. | ||
| 970 | |||
| 955 | config VIDEO_S5P_MIPI_CSIS | 971 | config VIDEO_S5P_MIPI_CSIS |
| 956 | tristate "Samsung S5P and EXYNOS4 MIPI CSI receiver driver" | 972 | tristate "Samsung S5P and EXYNOS4 MIPI CSI receiver driver" |
| 957 | depends on VIDEO_V4L2 && PM_RUNTIME && PLAT_S5P && VIDEO_V4L2_SUBDEV_API | 973 | depends on VIDEO_V4L2 && PM_RUNTIME && PLAT_S5P && VIDEO_V4L2_SUBDEV_API |
| @@ -961,6 +977,8 @@ config VIDEO_S5P_MIPI_CSIS | |||
| 961 | To compile this driver as a module, choose M here: the | 977 | To compile this driver as a module, choose M here: the |
| 962 | module will be called s5p-csis. | 978 | module will be called s5p-csis. |
| 963 | 979 | ||
| 980 | source "drivers/media/video/s5p-tv/Kconfig" | ||
| 981 | |||
| 964 | # | 982 | # |
| 965 | # USB Multimedia device configuration | 983 | # USB Multimedia device configuration |
| 966 | # | 984 | # |
| @@ -1056,4 +1074,12 @@ config VIDEO_MEM2MEM_TESTDEV | |||
| 1056 | framework. | 1074 | framework. |
| 1057 | 1075 | ||
| 1058 | 1076 | ||
| 1077 | config VIDEO_SAMSUNG_S5P_MFC | ||
| 1078 | tristate "Samsung S5P MFC 5.1 Video Codec" | ||
| 1079 | depends on VIDEO_DEV && VIDEO_V4L2 && PLAT_S5P | ||
| 1080 | select VIDEOBUF2_DMA_CONTIG | ||
| 1081 | default n | ||
| 1082 | help | ||
| 1083 | MFC 5.1 driver for V4L2. | ||
| 1084 | |||
| 1059 | endif # V4L_MEM2MEM_DRIVERS | 1085 | endif # V4L_MEM2MEM_DRIVERS |
diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile index f0fecd6f6a33..272390072aef 100644 --- a/drivers/media/video/Makefile +++ b/drivers/media/video/Makefile | |||
| @@ -70,6 +70,7 @@ obj-$(CONFIG_VIDEO_MT9V032) += mt9v032.o | |||
| 70 | obj-$(CONFIG_VIDEO_SR030PC30) += sr030pc30.o | 70 | obj-$(CONFIG_VIDEO_SR030PC30) += sr030pc30.o |
| 71 | obj-$(CONFIG_VIDEO_NOON010PC30) += noon010pc30.o | 71 | obj-$(CONFIG_VIDEO_NOON010PC30) += noon010pc30.o |
| 72 | obj-$(CONFIG_VIDEO_M5MOLS) += m5mols/ | 72 | obj-$(CONFIG_VIDEO_M5MOLS) += m5mols/ |
| 73 | obj-$(CONFIG_VIDEO_ADP1653) += adp1653.o | ||
| 73 | 74 | ||
| 74 | obj-$(CONFIG_SOC_CAMERA_IMX074) += imx074.o | 75 | obj-$(CONFIG_SOC_CAMERA_IMX074) += imx074.o |
| 75 | obj-$(CONFIG_SOC_CAMERA_MT9M001) += mt9m001.o | 76 | obj-$(CONFIG_SOC_CAMERA_MT9M001) += mt9m001.o |
| @@ -78,6 +79,7 @@ obj-$(CONFIG_SOC_CAMERA_MT9T031) += mt9t031.o | |||
| 78 | obj-$(CONFIG_SOC_CAMERA_MT9T112) += mt9t112.o | 79 | obj-$(CONFIG_SOC_CAMERA_MT9T112) += mt9t112.o |
| 79 | obj-$(CONFIG_SOC_CAMERA_MT9V022) += mt9v022.o | 80 | obj-$(CONFIG_SOC_CAMERA_MT9V022) += mt9v022.o |
| 80 | obj-$(CONFIG_SOC_CAMERA_OV2640) += ov2640.o | 81 | obj-$(CONFIG_SOC_CAMERA_OV2640) += ov2640.o |
| 82 | obj-$(CONFIG_SOC_CAMERA_OV5642) += ov5642.o | ||
| 81 | obj-$(CONFIG_SOC_CAMERA_OV6650) += ov6650.o | 83 | obj-$(CONFIG_SOC_CAMERA_OV6650) += ov6650.o |
| 82 | obj-$(CONFIG_SOC_CAMERA_OV772X) += ov772x.o | 84 | obj-$(CONFIG_SOC_CAMERA_OV772X) += ov772x.o |
| 83 | obj-$(CONFIG_SOC_CAMERA_OV9640) += ov9640.o | 85 | obj-$(CONFIG_SOC_CAMERA_OV9640) += ov9640.o |
| @@ -127,7 +129,8 @@ obj-$(CONFIG_VIDEO_M32R_AR_M64278) += arv.o | |||
| 127 | 129 | ||
| 128 | obj-$(CONFIG_VIDEO_CX2341X) += cx2341x.o | 130 | obj-$(CONFIG_VIDEO_CX2341X) += cx2341x.o |
| 129 | 131 | ||
| 130 | obj-$(CONFIG_VIDEO_CAFE_CCIC) += cafe_ccic.o | 132 | obj-$(CONFIG_VIDEO_CAFE_CCIC) += marvell-ccic/ |
| 133 | obj-$(CONFIG_VIDEO_MMP_CAMERA) += marvell-ccic/ | ||
| 131 | 134 | ||
| 132 | obj-$(CONFIG_VIDEO_VIA_CAMERA) += via-camera.o | 135 | obj-$(CONFIG_VIDEO_VIA_CAMERA) += via-camera.o |
| 133 | 136 | ||
| @@ -166,8 +169,11 @@ obj-$(CONFIG_VIDEO_PXA27x) += pxa_camera.o | |||
| 166 | obj-$(CONFIG_VIDEO_SH_MOBILE_CSI2) += sh_mobile_csi2.o | 169 | obj-$(CONFIG_VIDEO_SH_MOBILE_CSI2) += sh_mobile_csi2.o |
| 167 | obj-$(CONFIG_VIDEO_SH_MOBILE_CEU) += sh_mobile_ceu_camera.o | 170 | obj-$(CONFIG_VIDEO_SH_MOBILE_CEU) += sh_mobile_ceu_camera.o |
| 168 | obj-$(CONFIG_VIDEO_OMAP1) += omap1_camera.o | 171 | obj-$(CONFIG_VIDEO_OMAP1) += omap1_camera.o |
| 172 | obj-$(CONFIG_VIDEO_ATMEL_ISI) += atmel-isi.o | ||
| 169 | 173 | ||
| 170 | obj-$(CONFIG_VIDEO_SAMSUNG_S5P_FIMC) += s5p-fimc/ | 174 | obj-$(CONFIG_VIDEO_SAMSUNG_S5P_FIMC) += s5p-fimc/ |
| 175 | obj-$(CONFIG_VIDEO_SAMSUNG_S5P_MFC) += s5p-mfc/ | ||
| 176 | obj-$(CONFIG_VIDEO_SAMSUNG_S5P_TV) += s5p-tv/ | ||
| 171 | 177 | ||
| 172 | obj-$(CONFIG_ARCH_DAVINCI) += davinci/ | 178 | obj-$(CONFIG_ARCH_DAVINCI) += davinci/ |
| 173 | 179 | ||
diff --git a/drivers/media/video/adp1653.c b/drivers/media/video/adp1653.c new file mode 100644 index 000000000000..be7befd60947 --- /dev/null +++ b/drivers/media/video/adp1653.c | |||
| @@ -0,0 +1,491 @@ | |||
| 1 | /* | ||
| 2 | * drivers/media/video/adp1653.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 2008--2011 Nokia Corporation | ||
| 5 | * | ||
| 6 | * Contact: Sakari Ailus <sakari.ailus@maxwell.research.nokia.com> | ||
| 7 | * | ||
| 8 | * Contributors: | ||
| 9 | * Sakari Ailus <sakari.ailus@maxwell.research.nokia.com> | ||
| 10 | * Tuukka Toivonen <tuukkat76@gmail.com> | ||
| 11 | * | ||
| 12 | * This program is free software; you can redistribute it and/or | ||
| 13 | * modify it under the terms of the GNU General Public License | ||
| 14 | * version 2 as published by the Free Software Foundation. | ||
| 15 | * | ||
| 16 | * This program is distributed in the hope that it will be useful, but | ||
| 17 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
| 19 | * General Public License for more details. | ||
| 20 | * | ||
| 21 | * You should have received a copy of the GNU General Public License | ||
| 22 | * along with this program; if not, write to the Free Software | ||
| 23 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | ||
| 24 | * 02110-1301 USA | ||
| 25 | * | ||
| 26 | * TODO: | ||
| 27 | * - fault interrupt handling | ||
| 28 | * - hardware strobe | ||
| 29 | * - power doesn't need to be ON if all lights are off | ||
| 30 | * | ||
| 31 | */ | ||
| 32 | |||
| 33 | #include <linux/delay.h> | ||
| 34 | #include <linux/i2c.h> | ||
| 35 | #include <linux/slab.h> | ||
| 36 | #include <linux/version.h> | ||
| 37 | #include <media/adp1653.h> | ||
| 38 | #include <media/v4l2-device.h> | ||
| 39 | |||
| 40 | #define TIMEOUT_MAX 820000 | ||
| 41 | #define TIMEOUT_STEP 54600 | ||
| 42 | #define TIMEOUT_MIN (TIMEOUT_MAX - ADP1653_REG_CONFIG_TMR_SET_MAX \ | ||
| 43 | * TIMEOUT_STEP) | ||
| 44 | #define TIMEOUT_US_TO_CODE(t) ((TIMEOUT_MAX + (TIMEOUT_STEP / 2) - (t)) \ | ||
| 45 | / TIMEOUT_STEP) | ||
| 46 | #define TIMEOUT_CODE_TO_US(c) (TIMEOUT_MAX - (c) * TIMEOUT_STEP) | ||
| 47 | |||
| 48 | /* Write values into ADP1653 registers. */ | ||
| 49 | static int adp1653_update_hw(struct adp1653_flash *flash) | ||
| 50 | { | ||
| 51 | struct i2c_client *client = v4l2_get_subdevdata(&flash->subdev); | ||
| 52 | u8 out_sel; | ||
| 53 | u8 config = 0; | ||
| 54 | int rval; | ||
| 55 | |||
| 56 | out_sel = ADP1653_INDICATOR_INTENSITY_uA_TO_REG( | ||
| 57 | flash->indicator_intensity->val) | ||
| 58 | << ADP1653_REG_OUT_SEL_ILED_SHIFT; | ||
| 59 | |||
| 60 | switch (flash->led_mode->val) { | ||
| 61 | case V4L2_FLASH_LED_MODE_NONE: | ||
| 62 | break; | ||
| 63 | case V4L2_FLASH_LED_MODE_FLASH: | ||
| 64 | /* Flash mode, light on with strobe, duration from timer */ | ||
| 65 | config = ADP1653_REG_CONFIG_TMR_CFG; | ||
| 66 | config |= TIMEOUT_US_TO_CODE(flash->flash_timeout->val) | ||
| 67 | << ADP1653_REG_CONFIG_TMR_SET_SHIFT; | ||
| 68 | break; | ||
| 69 | case V4L2_FLASH_LED_MODE_TORCH: | ||
| 70 | /* Torch mode, light immediately on, duration indefinite */ | ||
| 71 | out_sel |= ADP1653_FLASH_INTENSITY_mA_TO_REG( | ||
| 72 | flash->torch_intensity->val) | ||
| 73 | << ADP1653_REG_OUT_SEL_HPLED_SHIFT; | ||
| 74 | break; | ||
| 75 | } | ||
| 76 | |||
| 77 | rval = i2c_smbus_write_byte_data(client, ADP1653_REG_OUT_SEL, out_sel); | ||
| 78 | if (rval < 0) | ||
| 79 | return rval; | ||
| 80 | |||
| 81 | rval = i2c_smbus_write_byte_data(client, ADP1653_REG_CONFIG, config); | ||
| 82 | if (rval < 0) | ||
| 83 | return rval; | ||
| 84 | |||
| 85 | return 0; | ||
| 86 | } | ||
| 87 | |||
| 88 | static int adp1653_get_fault(struct adp1653_flash *flash) | ||
| 89 | { | ||
| 90 | struct i2c_client *client = v4l2_get_subdevdata(&flash->subdev); | ||
| 91 | int fault; | ||
| 92 | int rval; | ||
| 93 | |||
| 94 | fault = i2c_smbus_read_byte_data(client, ADP1653_REG_FAULT); | ||
| 95 | if (IS_ERR_VALUE(fault)) | ||
| 96 | return fault; | ||
| 97 | |||
| 98 | flash->fault |= fault; | ||
| 99 | |||
| 100 | if (!flash->fault) | ||
| 101 | return 0; | ||
| 102 | |||
| 103 | /* Clear faults. */ | ||
| 104 | rval = i2c_smbus_write_byte_data(client, ADP1653_REG_OUT_SEL, 0); | ||
| 105 | if (IS_ERR_VALUE(rval)) | ||
| 106 | return rval; | ||
| 107 | |||
| 108 | flash->led_mode->val = V4L2_FLASH_LED_MODE_NONE; | ||
| 109 | |||
| 110 | rval = adp1653_update_hw(flash); | ||
| 111 | if (IS_ERR_VALUE(rval)) | ||
| 112 | return rval; | ||
| 113 | |||
| 114 | return flash->fault; | ||
| 115 | } | ||
| 116 | |||
| 117 | static int adp1653_strobe(struct adp1653_flash *flash, int enable) | ||
| 118 | { | ||
| 119 | struct i2c_client *client = v4l2_get_subdevdata(&flash->subdev); | ||
| 120 | u8 out_sel = ADP1653_INDICATOR_INTENSITY_uA_TO_REG( | ||
| 121 | flash->indicator_intensity->val) | ||
| 122 | << ADP1653_REG_OUT_SEL_ILED_SHIFT; | ||
| 123 | int rval; | ||
| 124 | |||
| 125 | if (flash->led_mode->val != V4L2_FLASH_LED_MODE_FLASH) | ||
| 126 | return -EBUSY; | ||
| 127 | |||
| 128 | if (!enable) | ||
| 129 | return i2c_smbus_write_byte_data(client, ADP1653_REG_OUT_SEL, | ||
| 130 | out_sel); | ||
| 131 | |||
| 132 | out_sel |= ADP1653_FLASH_INTENSITY_mA_TO_REG( | ||
| 133 | flash->flash_intensity->val) | ||
| 134 | << ADP1653_REG_OUT_SEL_HPLED_SHIFT; | ||
| 135 | rval = i2c_smbus_write_byte_data(client, ADP1653_REG_OUT_SEL, out_sel); | ||
| 136 | if (rval) | ||
| 137 | return rval; | ||
| 138 | |||
| 139 | /* Software strobe using i2c */ | ||
| 140 | rval = i2c_smbus_write_byte_data(client, ADP1653_REG_SW_STROBE, | ||
| 141 | ADP1653_REG_SW_STROBE_SW_STROBE); | ||
| 142 | if (rval) | ||
| 143 | return rval; | ||
| 144 | return i2c_smbus_write_byte_data(client, ADP1653_REG_SW_STROBE, 0); | ||
| 145 | } | ||
| 146 | |||
| 147 | /* -------------------------------------------------------------------------- | ||
| 148 | * V4L2 controls | ||
| 149 | */ | ||
| 150 | |||
| 151 | static int adp1653_get_ctrl(struct v4l2_ctrl *ctrl) | ||
| 152 | { | ||
| 153 | struct adp1653_flash *flash = | ||
| 154 | container_of(ctrl->handler, struct adp1653_flash, ctrls); | ||
| 155 | int rval; | ||
| 156 | |||
| 157 | rval = adp1653_get_fault(flash); | ||
| 158 | if (IS_ERR_VALUE(rval)) | ||
| 159 | return rval; | ||
| 160 | |||
| 161 | ctrl->cur.val = 0; | ||
| 162 | |||
| 163 | if (flash->fault & ADP1653_REG_FAULT_FLT_SCP) | ||
| 164 | ctrl->cur.val |= V4L2_FLASH_FAULT_SHORT_CIRCUIT; | ||
| 165 | if (flash->fault & ADP1653_REG_FAULT_FLT_OT) | ||
| 166 | ctrl->cur.val |= V4L2_FLASH_FAULT_OVER_TEMPERATURE; | ||
| 167 | if (flash->fault & ADP1653_REG_FAULT_FLT_TMR) | ||
| 168 | ctrl->cur.val |= V4L2_FLASH_FAULT_TIMEOUT; | ||
| 169 | if (flash->fault & ADP1653_REG_FAULT_FLT_OV) | ||
| 170 | ctrl->cur.val |= V4L2_FLASH_FAULT_OVER_VOLTAGE; | ||
| 171 | |||
| 172 | flash->fault = 0; | ||
| 173 | |||
| 174 | return 0; | ||
| 175 | } | ||
| 176 | |||
| 177 | static int adp1653_set_ctrl(struct v4l2_ctrl *ctrl) | ||
| 178 | { | ||
| 179 | struct adp1653_flash *flash = | ||
| 180 | container_of(ctrl->handler, struct adp1653_flash, ctrls); | ||
| 181 | int rval; | ||
| 182 | |||
| 183 | rval = adp1653_get_fault(flash); | ||
| 184 | if (IS_ERR_VALUE(rval)) | ||
| 185 | return rval; | ||
| 186 | if ((rval & (ADP1653_REG_FAULT_FLT_SCP | | ||
| 187 | ADP1653_REG_FAULT_FLT_OT | | ||
| 188 | ADP1653_REG_FAULT_FLT_OV)) && | ||
| 189 | (ctrl->id == V4L2_CID_FLASH_STROBE || | ||
| 190 | ctrl->id == V4L2_CID_FLASH_TORCH_INTENSITY || | ||
| 191 | ctrl->id == V4L2_CID_FLASH_LED_MODE)) | ||
| 192 | return -EBUSY; | ||
| 193 | |||
| 194 | switch (ctrl->id) { | ||
| 195 | case V4L2_CID_FLASH_STROBE: | ||
| 196 | return adp1653_strobe(flash, 1); | ||
| 197 | case V4L2_CID_FLASH_STROBE_STOP: | ||
| 198 | return adp1653_strobe(flash, 0); | ||
| 199 | } | ||
| 200 | |||
| 201 | return adp1653_update_hw(flash); | ||
| 202 | } | ||
| 203 | |||
| 204 | static const struct v4l2_ctrl_ops adp1653_ctrl_ops = { | ||
| 205 | .g_volatile_ctrl = adp1653_get_ctrl, | ||
| 206 | .s_ctrl = adp1653_set_ctrl, | ||
| 207 | }; | ||
| 208 | |||
| 209 | static int adp1653_init_controls(struct adp1653_flash *flash) | ||
| 210 | { | ||
| 211 | struct v4l2_ctrl *fault; | ||
| 212 | |||
| 213 | v4l2_ctrl_handler_init(&flash->ctrls, 9); | ||
| 214 | |||
| 215 | flash->led_mode = | ||
| 216 | v4l2_ctrl_new_std_menu(&flash->ctrls, &adp1653_ctrl_ops, | ||
| 217 | V4L2_CID_FLASH_LED_MODE, | ||
| 218 | V4L2_FLASH_LED_MODE_TORCH, ~0x7, 0); | ||
| 219 | v4l2_ctrl_new_std_menu(&flash->ctrls, &adp1653_ctrl_ops, | ||
| 220 | V4L2_CID_FLASH_STROBE_SOURCE, | ||
| 221 | V4L2_FLASH_STROBE_SOURCE_SOFTWARE, ~0x1, 0); | ||
| 222 | v4l2_ctrl_new_std(&flash->ctrls, &adp1653_ctrl_ops, | ||
| 223 | V4L2_CID_FLASH_STROBE, 0, 0, 0, 0); | ||
| 224 | v4l2_ctrl_new_std(&flash->ctrls, &adp1653_ctrl_ops, | ||
| 225 | V4L2_CID_FLASH_STROBE_STOP, 0, 0, 0, 0); | ||
| 226 | flash->flash_timeout = | ||
| 227 | v4l2_ctrl_new_std(&flash->ctrls, &adp1653_ctrl_ops, | ||
| 228 | V4L2_CID_FLASH_TIMEOUT, TIMEOUT_MIN, | ||
| 229 | flash->platform_data->max_flash_timeout, | ||
| 230 | TIMEOUT_STEP, | ||
| 231 | flash->platform_data->max_flash_timeout); | ||
| 232 | flash->flash_intensity = | ||
| 233 | v4l2_ctrl_new_std(&flash->ctrls, &adp1653_ctrl_ops, | ||
| 234 | V4L2_CID_FLASH_INTENSITY, | ||
| 235 | ADP1653_FLASH_INTENSITY_MIN, | ||
| 236 | flash->platform_data->max_flash_intensity, | ||
| 237 | 1, flash->platform_data->max_flash_intensity); | ||
| 238 | flash->torch_intensity = | ||
| 239 | v4l2_ctrl_new_std(&flash->ctrls, &adp1653_ctrl_ops, | ||
| 240 | V4L2_CID_FLASH_TORCH_INTENSITY, | ||
| 241 | ADP1653_TORCH_INTENSITY_MIN, | ||
| 242 | flash->platform_data->max_torch_intensity, | ||
| 243 | ADP1653_FLASH_INTENSITY_STEP, | ||
| 244 | flash->platform_data->max_torch_intensity); | ||
| 245 | flash->indicator_intensity = | ||
| 246 | v4l2_ctrl_new_std(&flash->ctrls, &adp1653_ctrl_ops, | ||
| 247 | V4L2_CID_FLASH_INDICATOR_INTENSITY, | ||
| 248 | ADP1653_INDICATOR_INTENSITY_MIN, | ||
| 249 | flash->platform_data->max_indicator_intensity, | ||
| 250 | ADP1653_INDICATOR_INTENSITY_STEP, | ||
| 251 | ADP1653_INDICATOR_INTENSITY_MIN); | ||
| 252 | fault = v4l2_ctrl_new_std(&flash->ctrls, &adp1653_ctrl_ops, | ||
| 253 | V4L2_CID_FLASH_FAULT, 0, | ||
| 254 | V4L2_FLASH_FAULT_OVER_VOLTAGE | ||
| 255 | | V4L2_FLASH_FAULT_OVER_TEMPERATURE | ||
| 256 | | V4L2_FLASH_FAULT_SHORT_CIRCUIT, 0, 0); | ||
| 257 | |||
| 258 | if (flash->ctrls.error) | ||
| 259 | return flash->ctrls.error; | ||
| 260 | |||
| 261 | fault->is_volatile = 1; | ||
| 262 | |||
| 263 | flash->subdev.ctrl_handler = &flash->ctrls; | ||
| 264 | return 0; | ||
| 265 | } | ||
| 266 | |||
| 267 | /* -------------------------------------------------------------------------- | ||
| 268 | * V4L2 subdev operations | ||
| 269 | */ | ||
| 270 | |||
| 271 | static int | ||
| 272 | adp1653_init_device(struct adp1653_flash *flash) | ||
| 273 | { | ||
| 274 | struct i2c_client *client = v4l2_get_subdevdata(&flash->subdev); | ||
| 275 | int rval; | ||
| 276 | |||
| 277 | /* Clear FAULT register by writing zero to OUT_SEL */ | ||
| 278 | rval = i2c_smbus_write_byte_data(client, ADP1653_REG_OUT_SEL, 0); | ||
| 279 | if (rval < 0) { | ||
| 280 | dev_err(&client->dev, "failed writing fault register\n"); | ||
| 281 | return -EIO; | ||
| 282 | } | ||
| 283 | |||
| 284 | mutex_lock(&flash->ctrls.lock); | ||
| 285 | /* Reset faults before reading new ones. */ | ||
| 286 | flash->fault = 0; | ||
| 287 | rval = adp1653_get_fault(flash); | ||
| 288 | mutex_unlock(&flash->ctrls.lock); | ||
| 289 | if (rval > 0) { | ||
| 290 | dev_err(&client->dev, "faults detected: 0x%1.1x\n", rval); | ||
| 291 | return -EIO; | ||
| 292 | } | ||
| 293 | |||
| 294 | mutex_lock(&flash->ctrls.lock); | ||
| 295 | rval = adp1653_update_hw(flash); | ||
| 296 | mutex_unlock(&flash->ctrls.lock); | ||
| 297 | if (rval) { | ||
| 298 | dev_err(&client->dev, | ||
| 299 | "adp1653_update_hw failed at %s\n", __func__); | ||
| 300 | return -EIO; | ||
| 301 | } | ||
| 302 | |||
| 303 | return 0; | ||
| 304 | } | ||
| 305 | |||
| 306 | static int | ||
| 307 | __adp1653_set_power(struct adp1653_flash *flash, int on) | ||
| 308 | { | ||
| 309 | int ret; | ||
| 310 | |||
| 311 | ret = flash->platform_data->power(&flash->subdev, on); | ||
| 312 | if (ret < 0) | ||
| 313 | return ret; | ||
| 314 | |||
| 315 | if (!on) | ||
| 316 | return 0; | ||
| 317 | |||
| 318 | ret = adp1653_init_device(flash); | ||
| 319 | if (ret < 0) | ||
| 320 | flash->platform_data->power(&flash->subdev, 0); | ||
| 321 | |||
| 322 | return ret; | ||
| 323 | } | ||
| 324 | |||
| 325 | static int | ||
| 326 | adp1653_set_power(struct v4l2_subdev *subdev, int on) | ||
| 327 | { | ||
| 328 | struct adp1653_flash *flash = to_adp1653_flash(subdev); | ||
| 329 | int ret = 0; | ||
| 330 | |||
| 331 | mutex_lock(&flash->power_lock); | ||
| 332 | |||
| 333 | /* If the power count is modified from 0 to != 0 or from != 0 to 0, | ||
| 334 | * update the power state. | ||
| 335 | */ | ||
| 336 | if (flash->power_count == !on) { | ||
| 337 | ret = __adp1653_set_power(flash, !!on); | ||
| 338 | if (ret < 0) | ||
| 339 | goto done; | ||
| 340 | } | ||
| 341 | |||
| 342 | /* Update the power count. */ | ||
| 343 | flash->power_count += on ? 1 : -1; | ||
| 344 | WARN_ON(flash->power_count < 0); | ||
| 345 | |||
| 346 | done: | ||
| 347 | mutex_unlock(&flash->power_lock); | ||
| 348 | return ret; | ||
| 349 | } | ||
| 350 | |||
| 351 | static int adp1653_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) | ||
| 352 | { | ||
| 353 | return adp1653_set_power(sd, 1); | ||
| 354 | } | ||
| 355 | |||
| 356 | static int adp1653_close(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) | ||
| 357 | { | ||
| 358 | return adp1653_set_power(sd, 0); | ||
| 359 | } | ||
| 360 | |||
| 361 | static const struct v4l2_subdev_core_ops adp1653_core_ops = { | ||
| 362 | .s_power = adp1653_set_power, | ||
| 363 | }; | ||
| 364 | |||
| 365 | static const struct v4l2_subdev_ops adp1653_ops = { | ||
| 366 | .core = &adp1653_core_ops, | ||
| 367 | }; | ||
| 368 | |||
| 369 | static const struct v4l2_subdev_internal_ops adp1653_internal_ops = { | ||
| 370 | .open = adp1653_open, | ||
| 371 | .close = adp1653_close, | ||
| 372 | }; | ||
| 373 | |||
| 374 | /* -------------------------------------------------------------------------- | ||
| 375 | * I2C driver | ||
| 376 | */ | ||
| 377 | #ifdef CONFIG_PM | ||
| 378 | |||
| 379 | static int adp1653_suspend(struct device *dev) | ||
| 380 | { | ||
| 381 | struct i2c_client *client = to_i2c_client(dev); | ||
| 382 | struct v4l2_subdev *subdev = i2c_get_clientdata(client); | ||
| 383 | struct adp1653_flash *flash = to_adp1653_flash(subdev); | ||
| 384 | |||
| 385 | if (!flash->power_count) | ||
| 386 | return 0; | ||
| 387 | |||
| 388 | return __adp1653_set_power(flash, 0); | ||
| 389 | } | ||
| 390 | |||
| 391 | static int adp1653_resume(struct device *dev) | ||
| 392 | { | ||
| 393 | struct i2c_client *client = to_i2c_client(dev); | ||
| 394 | struct v4l2_subdev *subdev = i2c_get_clientdata(client); | ||
| 395 | struct adp1653_flash *flash = to_adp1653_flash(subdev); | ||
| 396 | |||
| 397 | if (!flash->power_count) | ||
| 398 | return 0; | ||
| 399 | |||
| 400 | return __adp1653_set_power(flash, 1); | ||
| 401 | } | ||
| 402 | |||
| 403 | #else | ||
| 404 | |||
| 405 | #define adp1653_suspend NULL | ||
| 406 | #define adp1653_resume NULL | ||
| 407 | |||
| 408 | #endif /* CONFIG_PM */ | ||
| 409 | |||
| 410 | static int adp1653_probe(struct i2c_client *client, | ||
| 411 | const struct i2c_device_id *devid) | ||
| 412 | { | ||
| 413 | struct adp1653_flash *flash; | ||
| 414 | int ret; | ||
| 415 | |||
| 416 | flash = kzalloc(sizeof(*flash), GFP_KERNEL); | ||
| 417 | if (flash == NULL) | ||
| 418 | return -ENOMEM; | ||
| 419 | |||
| 420 | flash->platform_data = client->dev.platform_data; | ||
| 421 | |||
| 422 | mutex_init(&flash->power_lock); | ||
| 423 | |||
| 424 | v4l2_i2c_subdev_init(&flash->subdev, client, &adp1653_ops); | ||
| 425 | flash->subdev.internal_ops = &adp1653_internal_ops; | ||
| 426 | flash->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; | ||
| 427 | |||
| 428 | adp1653_init_controls(flash); | ||
| 429 | |||
| 430 | ret = media_entity_init(&flash->subdev.entity, 0, NULL, 0); | ||
| 431 | if (ret < 0) | ||
| 432 | kfree(flash); | ||
| 433 | |||
| 434 | return ret; | ||
| 435 | } | ||
| 436 | |||
| 437 | static int __exit adp1653_remove(struct i2c_client *client) | ||
| 438 | { | ||
| 439 | struct v4l2_subdev *subdev = i2c_get_clientdata(client); | ||
| 440 | struct adp1653_flash *flash = to_adp1653_flash(subdev); | ||
| 441 | |||
| 442 | v4l2_device_unregister_subdev(&flash->subdev); | ||
| 443 | v4l2_ctrl_handler_free(&flash->ctrls); | ||
| 444 | media_entity_cleanup(&flash->subdev.entity); | ||
| 445 | kfree(flash); | ||
| 446 | return 0; | ||
| 447 | } | ||
| 448 | |||
| 449 | static const struct i2c_device_id adp1653_id_table[] = { | ||
| 450 | { ADP1653_NAME, 0 }, | ||
| 451 | { } | ||
| 452 | }; | ||
| 453 | MODULE_DEVICE_TABLE(i2c, adp1653_id_table); | ||
| 454 | |||
| 455 | static struct dev_pm_ops adp1653_pm_ops = { | ||
| 456 | .suspend = adp1653_suspend, | ||
| 457 | .resume = adp1653_resume, | ||
| 458 | }; | ||
| 459 | |||
| 460 | static struct i2c_driver adp1653_i2c_driver = { | ||
| 461 | .driver = { | ||
| 462 | .name = ADP1653_NAME, | ||
| 463 | .pm = &adp1653_pm_ops, | ||
| 464 | }, | ||
| 465 | .probe = adp1653_probe, | ||
| 466 | .remove = __exit_p(adp1653_remove), | ||
| 467 | .id_table = adp1653_id_table, | ||
| 468 | }; | ||
| 469 | |||
| 470 | static int __init adp1653_init(void) | ||
| 471 | { | ||
| 472 | int rval; | ||
| 473 | |||
| 474 | rval = i2c_add_driver(&adp1653_i2c_driver); | ||
| 475 | if (rval) | ||
| 476 | printk(KERN_ALERT "%s: failed at i2c_add_driver\n", __func__); | ||
| 477 | |||
| 478 | return rval; | ||
| 479 | } | ||
| 480 | |||
| 481 | static void __exit adp1653_exit(void) | ||
| 482 | { | ||
| 483 | i2c_del_driver(&adp1653_i2c_driver); | ||
| 484 | } | ||
| 485 | |||
| 486 | module_init(adp1653_init); | ||
| 487 | module_exit(adp1653_exit); | ||
| 488 | |||
| 489 | MODULE_AUTHOR("Sakari Ailus <sakari.ailus@nokia.com>"); | ||
| 490 | MODULE_DESCRIPTION("Analog Devices ADP1653 LED flash driver"); | ||
| 491 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/media/video/arv.c b/drivers/media/video/arv.c index f989f2820d88..b6ed44aebe30 100644 --- a/drivers/media/video/arv.c +++ b/drivers/media/video/arv.c | |||
| @@ -27,7 +27,6 @@ | |||
| 27 | #include <linux/slab.h> | 27 | #include <linux/slab.h> |
| 28 | #include <linux/mm.h> | 28 | #include <linux/mm.h> |
| 29 | #include <linux/sched.h> | 29 | #include <linux/sched.h> |
| 30 | #include <linux/version.h> | ||
| 31 | #include <linux/videodev2.h> | 30 | #include <linux/videodev2.h> |
| 32 | #include <media/v4l2-common.h> | 31 | #include <media/v4l2-common.h> |
| 33 | #include <media/v4l2-device.h> | 32 | #include <media/v4l2-device.h> |
| @@ -54,7 +53,7 @@ | |||
| 54 | */ | 53 | */ |
| 55 | #define USE_INT 0 /* Don't modify */ | 54 | #define USE_INT 0 /* Don't modify */ |
| 56 | 55 | ||
| 57 | #define VERSION "0.04" | 56 | #define VERSION "0.0.5" |
| 58 | 57 | ||
| 59 | #define ar_inl(addr) inl((unsigned long)(addr)) | 58 | #define ar_inl(addr) inl((unsigned long)(addr)) |
| 60 | #define ar_outl(val, addr) outl((unsigned long)(val), (unsigned long)(addr)) | 59 | #define ar_outl(val, addr) outl((unsigned long)(val), (unsigned long)(addr)) |
| @@ -404,7 +403,6 @@ static int ar_querycap(struct file *file, void *priv, | |||
| 404 | strlcpy(vcap->driver, ar->vdev.name, sizeof(vcap->driver)); | 403 | strlcpy(vcap->driver, ar->vdev.name, sizeof(vcap->driver)); |
| 405 | strlcpy(vcap->card, "Colour AR VGA", sizeof(vcap->card)); | 404 | strlcpy(vcap->card, "Colour AR VGA", sizeof(vcap->card)); |
| 406 | strlcpy(vcap->bus_info, "Platform", sizeof(vcap->bus_info)); | 405 | strlcpy(vcap->bus_info, "Platform", sizeof(vcap->bus_info)); |
| 407 | vcap->version = KERNEL_VERSION(0, 0, 4); | ||
| 408 | vcap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE; | 406 | vcap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE; |
| 409 | return 0; | 407 | return 0; |
| 410 | } | 408 | } |
| @@ -879,3 +877,4 @@ module_exit(ar_cleanup_module); | |||
| 879 | MODULE_AUTHOR("Takeo Takahashi <takahashi.takeo@renesas.com>"); | 877 | MODULE_AUTHOR("Takeo Takahashi <takahashi.takeo@renesas.com>"); |
| 880 | MODULE_DESCRIPTION("Colour AR M64278(VGA) for Video4Linux"); | 878 | MODULE_DESCRIPTION("Colour AR M64278(VGA) for Video4Linux"); |
| 881 | MODULE_LICENSE("GPL"); | 879 | MODULE_LICENSE("GPL"); |
| 880 | MODULE_VERSION(VERSION); | ||
diff --git a/drivers/media/video/atmel-isi.c b/drivers/media/video/atmel-isi.c new file mode 100644 index 000000000000..7b89f00501b8 --- /dev/null +++ b/drivers/media/video/atmel-isi.c | |||
| @@ -0,0 +1,1048 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (c) 2011 Atmel Corporation | ||
| 3 | * Josh Wu, <josh.wu@atmel.com> | ||
| 4 | * | ||
| 5 | * Based on previous work by Lars Haring, <lars.haring@atmel.com> | ||
| 6 | * and Sedji Gaouaou | ||
| 7 | * Based on the bttv driver for Bt848 with respective copyright holders | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify | ||
| 10 | * it under the terms of the GNU General Public License version 2 as | ||
| 11 | * published by the Free Software Foundation. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <linux/clk.h> | ||
| 15 | #include <linux/completion.h> | ||
| 16 | #include <linux/delay.h> | ||
| 17 | #include <linux/fs.h> | ||
| 18 | #include <linux/init.h> | ||
| 19 | #include <linux/interrupt.h> | ||
| 20 | #include <linux/kernel.h> | ||
| 21 | #include <linux/module.h> | ||
| 22 | #include <linux/platform_device.h> | ||
| 23 | #include <linux/slab.h> | ||
| 24 | |||
| 25 | #include <media/atmel-isi.h> | ||
| 26 | #include <media/soc_camera.h> | ||
| 27 | #include <media/soc_mediabus.h> | ||
| 28 | #include <media/videobuf2-dma-contig.h> | ||
| 29 | |||
| 30 | #define MAX_BUFFER_NUM 32 | ||
| 31 | #define MAX_SUPPORT_WIDTH 2048 | ||
| 32 | #define MAX_SUPPORT_HEIGHT 2048 | ||
| 33 | #define VID_LIMIT_BYTES (16 * 1024 * 1024) | ||
| 34 | #define MIN_FRAME_RATE 15 | ||
| 35 | #define FRAME_INTERVAL_MILLI_SEC (1000 / MIN_FRAME_RATE) | ||
| 36 | |||
| 37 | /* ISI states */ | ||
| 38 | enum { | ||
| 39 | ISI_STATE_IDLE = 0, | ||
| 40 | ISI_STATE_READY, | ||
| 41 | ISI_STATE_WAIT_SOF, | ||
| 42 | }; | ||
| 43 | |||
| 44 | /* Frame buffer descriptor */ | ||
| 45 | struct fbd { | ||
| 46 | /* Physical address of the frame buffer */ | ||
| 47 | u32 fb_address; | ||
| 48 | /* DMA Control Register(only in HISI2) */ | ||
| 49 | u32 dma_ctrl; | ||
| 50 | /* Physical address of the next fbd */ | ||
| 51 | u32 next_fbd_address; | ||
| 52 | }; | ||
| 53 | |||
| 54 | static void set_dma_ctrl(struct fbd *fb_desc, u32 ctrl) | ||
| 55 | { | ||
| 56 | fb_desc->dma_ctrl = ctrl; | ||
| 57 | } | ||
| 58 | |||
| 59 | struct isi_dma_desc { | ||
| 60 | struct list_head list; | ||
| 61 | struct fbd *p_fbd; | ||
| 62 | u32 fbd_phys; | ||
| 63 | }; | ||
| 64 | |||
| 65 | /* Frame buffer data */ | ||
| 66 | struct frame_buffer { | ||
| 67 | struct vb2_buffer vb; | ||
| 68 | struct isi_dma_desc *p_dma_desc; | ||
| 69 | struct list_head list; | ||
| 70 | }; | ||
| 71 | |||
| 72 | struct atmel_isi { | ||
| 73 | /* Protects the access of variables shared with the ISR */ | ||
| 74 | spinlock_t lock; | ||
| 75 | void __iomem *regs; | ||
| 76 | |||
| 77 | int sequence; | ||
| 78 | /* State of the ISI module in capturing mode */ | ||
| 79 | int state; | ||
| 80 | |||
| 81 | /* Wait queue for waiting for SOF */ | ||
| 82 | wait_queue_head_t vsync_wq; | ||
| 83 | |||
| 84 | struct vb2_alloc_ctx *alloc_ctx; | ||
| 85 | |||
| 86 | /* Allocate descriptors for dma buffer use */ | ||
| 87 | struct fbd *p_fb_descriptors; | ||
| 88 | u32 fb_descriptors_phys; | ||
| 89 | struct list_head dma_desc_head; | ||
| 90 | struct isi_dma_desc dma_desc[MAX_BUFFER_NUM]; | ||
| 91 | |||
| 92 | struct completion complete; | ||
| 93 | struct clk *pclk; | ||
| 94 | unsigned int irq; | ||
| 95 | |||
| 96 | struct isi_platform_data *pdata; | ||
| 97 | |||
| 98 | struct list_head video_buffer_list; | ||
| 99 | struct frame_buffer *active; | ||
| 100 | |||
| 101 | struct soc_camera_device *icd; | ||
| 102 | struct soc_camera_host soc_host; | ||
| 103 | }; | ||
| 104 | |||
| 105 | static void isi_writel(struct atmel_isi *isi, u32 reg, u32 val) | ||
| 106 | { | ||
| 107 | writel(val, isi->regs + reg); | ||
| 108 | } | ||
| 109 | static u32 isi_readl(struct atmel_isi *isi, u32 reg) | ||
| 110 | { | ||
| 111 | return readl(isi->regs + reg); | ||
| 112 | } | ||
| 113 | |||
| 114 | static int configure_geometry(struct atmel_isi *isi, u32 width, | ||
| 115 | u32 height, enum v4l2_mbus_pixelcode code) | ||
| 116 | { | ||
| 117 | u32 cfg2, cr; | ||
| 118 | |||
| 119 | switch (code) { | ||
| 120 | /* YUV, including grey */ | ||
| 121 | case V4L2_MBUS_FMT_Y8_1X8: | ||
| 122 | cr = ISI_CFG2_GRAYSCALE; | ||
| 123 | break; | ||
| 124 | case V4L2_MBUS_FMT_UYVY8_2X8: | ||
| 125 | cr = ISI_CFG2_YCC_SWAP_MODE_3; | ||
| 126 | break; | ||
| 127 | case V4L2_MBUS_FMT_VYUY8_2X8: | ||
| 128 | cr = ISI_CFG2_YCC_SWAP_MODE_2; | ||
| 129 | break; | ||
| 130 | case V4L2_MBUS_FMT_YUYV8_2X8: | ||
| 131 | cr = ISI_CFG2_YCC_SWAP_MODE_1; | ||
| 132 | break; | ||
| 133 | case V4L2_MBUS_FMT_YVYU8_2X8: | ||
| 134 | cr = ISI_CFG2_YCC_SWAP_DEFAULT; | ||
| 135 | break; | ||
| 136 | /* RGB, TODO */ | ||
| 137 | default: | ||
| 138 | return -EINVAL; | ||
| 139 | } | ||
| 140 | |||
| 141 | isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS); | ||
| 142 | |||
| 143 | cfg2 = isi_readl(isi, ISI_CFG2); | ||
| 144 | cfg2 |= cr; | ||
| 145 | /* Set width */ | ||
| 146 | cfg2 &= ~(ISI_CFG2_IM_HSIZE_MASK); | ||
| 147 | cfg2 |= ((width - 1) << ISI_CFG2_IM_HSIZE_OFFSET) & | ||
| 148 | ISI_CFG2_IM_HSIZE_MASK; | ||
| 149 | /* Set height */ | ||
| 150 | cfg2 &= ~(ISI_CFG2_IM_VSIZE_MASK); | ||
| 151 | cfg2 |= ((height - 1) << ISI_CFG2_IM_VSIZE_OFFSET) | ||
| 152 | & ISI_CFG2_IM_VSIZE_MASK; | ||
| 153 | isi_writel(isi, ISI_CFG2, cfg2); | ||
| 154 | |||
| 155 | return 0; | ||
| 156 | } | ||
| 157 | |||
| 158 | static irqreturn_t atmel_isi_handle_streaming(struct atmel_isi *isi) | ||
| 159 | { | ||
| 160 | if (isi->active) { | ||
| 161 | struct vb2_buffer *vb = &isi->active->vb; | ||
| 162 | struct frame_buffer *buf = isi->active; | ||
| 163 | |||
| 164 | list_del_init(&buf->list); | ||
| 165 | do_gettimeofday(&vb->v4l2_buf.timestamp); | ||
| 166 | vb->v4l2_buf.sequence = isi->sequence++; | ||
| 167 | vb2_buffer_done(vb, VB2_BUF_STATE_DONE); | ||
| 168 | } | ||
| 169 | |||
| 170 | if (list_empty(&isi->video_buffer_list)) { | ||
| 171 | isi->active = NULL; | ||
| 172 | } else { | ||
| 173 | /* start next dma frame. */ | ||
| 174 | isi->active = list_entry(isi->video_buffer_list.next, | ||
| 175 | struct frame_buffer, list); | ||
| 176 | isi_writel(isi, ISI_DMA_C_DSCR, | ||
| 177 | isi->active->p_dma_desc->fbd_phys); | ||
| 178 | isi_writel(isi, ISI_DMA_C_CTRL, | ||
| 179 | ISI_DMA_CTRL_FETCH | ISI_DMA_CTRL_DONE); | ||
| 180 | isi_writel(isi, ISI_DMA_CHER, ISI_DMA_CHSR_C_CH); | ||
| 181 | } | ||
| 182 | return IRQ_HANDLED; | ||
| 183 | } | ||
| 184 | |||
| 185 | /* ISI interrupt service routine */ | ||
| 186 | static irqreturn_t isi_interrupt(int irq, void *dev_id) | ||
| 187 | { | ||
| 188 | struct atmel_isi *isi = dev_id; | ||
| 189 | u32 status, mask, pending; | ||
| 190 | irqreturn_t ret = IRQ_NONE; | ||
| 191 | |||
| 192 | spin_lock(&isi->lock); | ||
| 193 | |||
| 194 | status = isi_readl(isi, ISI_STATUS); | ||
| 195 | mask = isi_readl(isi, ISI_INTMASK); | ||
| 196 | pending = status & mask; | ||
| 197 | |||
| 198 | if (pending & ISI_CTRL_SRST) { | ||
| 199 | complete(&isi->complete); | ||
| 200 | isi_writel(isi, ISI_INTDIS, ISI_CTRL_SRST); | ||
| 201 | ret = IRQ_HANDLED; | ||
| 202 | } else if (pending & ISI_CTRL_DIS) { | ||
| 203 | complete(&isi->complete); | ||
| 204 | isi_writel(isi, ISI_INTDIS, ISI_CTRL_DIS); | ||
| 205 | ret = IRQ_HANDLED; | ||
| 206 | } else { | ||
| 207 | if ((pending & ISI_SR_VSYNC) && | ||
| 208 | (isi->state == ISI_STATE_IDLE)) { | ||
| 209 | isi->state = ISI_STATE_READY; | ||
| 210 | wake_up_interruptible(&isi->vsync_wq); | ||
| 211 | ret = IRQ_HANDLED; | ||
| 212 | } | ||
| 213 | if (likely(pending & ISI_SR_CXFR_DONE)) | ||
| 214 | ret = atmel_isi_handle_streaming(isi); | ||
| 215 | } | ||
| 216 | |||
| 217 | spin_unlock(&isi->lock); | ||
| 218 | return ret; | ||
| 219 | } | ||
| 220 | |||
| 221 | #define WAIT_ISI_RESET 1 | ||
| 222 | #define WAIT_ISI_DISABLE 0 | ||
| 223 | static int atmel_isi_wait_status(struct atmel_isi *isi, int wait_reset) | ||
| 224 | { | ||
| 225 | unsigned long timeout; | ||
| 226 | /* | ||
| 227 | * The reset or disable will only succeed if we have a | ||
| 228 | * pixel clock from the camera. | ||
| 229 | */ | ||
| 230 | init_completion(&isi->complete); | ||
| 231 | |||
| 232 | if (wait_reset) { | ||
| 233 | isi_writel(isi, ISI_INTEN, ISI_CTRL_SRST); | ||
| 234 | isi_writel(isi, ISI_CTRL, ISI_CTRL_SRST); | ||
| 235 | } else { | ||
| 236 | isi_writel(isi, ISI_INTEN, ISI_CTRL_DIS); | ||
| 237 | isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS); | ||
| 238 | } | ||
| 239 | |||
| 240 | timeout = wait_for_completion_timeout(&isi->complete, | ||
| 241 | msecs_to_jiffies(100)); | ||
| 242 | if (timeout == 0) | ||
| 243 | return -ETIMEDOUT; | ||
| 244 | |||
| 245 | return 0; | ||
| 246 | } | ||
| 247 | |||
| 248 | /* ------------------------------------------------------------------ | ||
| 249 | Videobuf operations | ||
| 250 | ------------------------------------------------------------------*/ | ||
| 251 | static int queue_setup(struct vb2_queue *vq, unsigned int *nbuffers, | ||
| 252 | unsigned int *nplanes, unsigned long sizes[], | ||
| 253 | void *alloc_ctxs[]) | ||
| 254 | { | ||
| 255 | struct soc_camera_device *icd = soc_camera_from_vb2q(vq); | ||
| 256 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); | ||
| 257 | struct atmel_isi *isi = ici->priv; | ||
| 258 | unsigned long size; | ||
| 259 | int ret, bytes_per_line; | ||
| 260 | |||
| 261 | /* Reset ISI */ | ||
| 262 | ret = atmel_isi_wait_status(isi, WAIT_ISI_RESET); | ||
| 263 | if (ret < 0) { | ||
| 264 | dev_err(icd->parent, "Reset ISI timed out\n"); | ||
| 265 | return ret; | ||
| 266 | } | ||
| 267 | /* Disable all interrupts */ | ||
| 268 | isi_writel(isi, ISI_INTDIS, ~0UL); | ||
| 269 | |||
| 270 | bytes_per_line = soc_mbus_bytes_per_line(icd->user_width, | ||
| 271 | icd->current_fmt->host_fmt); | ||
| 272 | |||
| 273 | if (bytes_per_line < 0) | ||
| 274 | return bytes_per_line; | ||
| 275 | |||
| 276 | size = bytes_per_line * icd->user_height; | ||
| 277 | |||
| 278 | if (!*nbuffers || *nbuffers > MAX_BUFFER_NUM) | ||
| 279 | *nbuffers = MAX_BUFFER_NUM; | ||
| 280 | |||
| 281 | if (size * *nbuffers > VID_LIMIT_BYTES) | ||
| 282 | *nbuffers = VID_LIMIT_BYTES / size; | ||
| 283 | |||
| 284 | *nplanes = 1; | ||
| 285 | sizes[0] = size; | ||
| 286 | alloc_ctxs[0] = isi->alloc_ctx; | ||
| 287 | |||
| 288 | isi->sequence = 0; | ||
| 289 | isi->active = NULL; | ||
| 290 | |||
| 291 | dev_dbg(icd->parent, "%s, count=%d, size=%ld\n", __func__, | ||
| 292 | *nbuffers, size); | ||
| 293 | |||
| 294 | return 0; | ||
| 295 | } | ||
| 296 | |||
| 297 | static int buffer_init(struct vb2_buffer *vb) | ||
| 298 | { | ||
| 299 | struct frame_buffer *buf = container_of(vb, struct frame_buffer, vb); | ||
| 300 | |||
| 301 | buf->p_dma_desc = NULL; | ||
| 302 | INIT_LIST_HEAD(&buf->list); | ||
| 303 | |||
| 304 | return 0; | ||
| 305 | } | ||
| 306 | |||
| 307 | static int buffer_prepare(struct vb2_buffer *vb) | ||
| 308 | { | ||
| 309 | struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue); | ||
| 310 | struct frame_buffer *buf = container_of(vb, struct frame_buffer, vb); | ||
| 311 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); | ||
| 312 | struct atmel_isi *isi = ici->priv; | ||
| 313 | unsigned long size; | ||
| 314 | struct isi_dma_desc *desc; | ||
| 315 | int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width, | ||
| 316 | icd->current_fmt->host_fmt); | ||
| 317 | |||
| 318 | if (bytes_per_line < 0) | ||
| 319 | return bytes_per_line; | ||
| 320 | |||
| 321 | size = bytes_per_line * icd->user_height; | ||
| 322 | |||
| 323 | if (vb2_plane_size(vb, 0) < size) { | ||
| 324 | dev_err(icd->parent, "%s data will not fit into plane (%lu < %lu)\n", | ||
| 325 | __func__, vb2_plane_size(vb, 0), size); | ||
| 326 | return -EINVAL; | ||
| 327 | } | ||
| 328 | |||
| 329 | vb2_set_plane_payload(&buf->vb, 0, size); | ||
| 330 | |||
| 331 | if (!buf->p_dma_desc) { | ||
| 332 | if (list_empty(&isi->dma_desc_head)) { | ||
| 333 | dev_err(icd->parent, "Not enough dma descriptors.\n"); | ||
| 334 | return -EINVAL; | ||
| 335 | } else { | ||
| 336 | /* Get an available descriptor */ | ||
| 337 | desc = list_entry(isi->dma_desc_head.next, | ||
| 338 | struct isi_dma_desc, list); | ||
| 339 | /* Delete the descriptor since now it is used */ | ||
| 340 | list_del_init(&desc->list); | ||
| 341 | |||
| 342 | /* Initialize the dma descriptor */ | ||
| 343 | desc->p_fbd->fb_address = | ||
| 344 | vb2_dma_contig_plane_paddr(vb, 0); | ||
| 345 | desc->p_fbd->next_fbd_address = 0; | ||
| 346 | set_dma_ctrl(desc->p_fbd, ISI_DMA_CTRL_WB); | ||
| 347 | |||
| 348 | buf->p_dma_desc = desc; | ||
| 349 | } | ||
| 350 | } | ||
| 351 | return 0; | ||
| 352 | } | ||
| 353 | |||
| 354 | static void buffer_cleanup(struct vb2_buffer *vb) | ||
| 355 | { | ||
| 356 | struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue); | ||
| 357 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); | ||
| 358 | struct atmel_isi *isi = ici->priv; | ||
| 359 | struct frame_buffer *buf = container_of(vb, struct frame_buffer, vb); | ||
| 360 | |||
| 361 | /* This descriptor is available now and we add to head list */ | ||
| 362 | if (buf->p_dma_desc) | ||
| 363 | list_add(&buf->p_dma_desc->list, &isi->dma_desc_head); | ||
| 364 | } | ||
| 365 | |||
| 366 | static void start_dma(struct atmel_isi *isi, struct frame_buffer *buffer) | ||
| 367 | { | ||
| 368 | u32 ctrl, cfg1; | ||
| 369 | |||
| 370 | cfg1 = isi_readl(isi, ISI_CFG1); | ||
| 371 | /* Enable irq: cxfr for the codec path, pxfr for the preview path */ | ||
| 372 | isi_writel(isi, ISI_INTEN, | ||
| 373 | ISI_SR_CXFR_DONE | ISI_SR_PXFR_DONE); | ||
| 374 | |||
| 375 | /* Check if already in a frame */ | ||
| 376 | if (isi_readl(isi, ISI_STATUS) & ISI_CTRL_CDC) { | ||
| 377 | dev_err(isi->icd->parent, "Already in frame handling.\n"); | ||
| 378 | return; | ||
| 379 | } | ||
| 380 | |||
| 381 | isi_writel(isi, ISI_DMA_C_DSCR, buffer->p_dma_desc->fbd_phys); | ||
| 382 | isi_writel(isi, ISI_DMA_C_CTRL, ISI_DMA_CTRL_FETCH | ISI_DMA_CTRL_DONE); | ||
| 383 | isi_writel(isi, ISI_DMA_CHER, ISI_DMA_CHSR_C_CH); | ||
| 384 | |||
| 385 | /* Enable linked list */ | ||
| 386 | cfg1 |= isi->pdata->frate | ISI_CFG1_DISCR; | ||
| 387 | |||
| 388 | /* Enable codec path and ISI */ | ||
| 389 | ctrl = ISI_CTRL_CDC | ISI_CTRL_EN; | ||
| 390 | isi_writel(isi, ISI_CTRL, ctrl); | ||
| 391 | isi_writel(isi, ISI_CFG1, cfg1); | ||
| 392 | } | ||
| 393 | |||
| 394 | static void buffer_queue(struct vb2_buffer *vb) | ||
| 395 | { | ||
| 396 | struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue); | ||
| 397 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); | ||
| 398 | struct atmel_isi *isi = ici->priv; | ||
| 399 | struct frame_buffer *buf = container_of(vb, struct frame_buffer, vb); | ||
| 400 | unsigned long flags = 0; | ||
| 401 | |||
| 402 | spin_lock_irqsave(&isi->lock, flags); | ||
| 403 | list_add_tail(&buf->list, &isi->video_buffer_list); | ||
| 404 | |||
| 405 | if (isi->active == NULL) { | ||
| 406 | isi->active = buf; | ||
| 407 | start_dma(isi, buf); | ||
| 408 | } | ||
| 409 | spin_unlock_irqrestore(&isi->lock, flags); | ||
| 410 | } | ||
| 411 | |||
| 412 | static int start_streaming(struct vb2_queue *vq) | ||
| 413 | { | ||
| 414 | struct soc_camera_device *icd = soc_camera_from_vb2q(vq); | ||
| 415 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); | ||
| 416 | struct atmel_isi *isi = ici->priv; | ||
| 417 | |||
| 418 | u32 sr = 0; | ||
| 419 | int ret; | ||
| 420 | |||
| 421 | spin_lock_irq(&isi->lock); | ||
| 422 | isi->state = ISI_STATE_IDLE; | ||
| 423 | /* Clear any pending SOF interrupt */ | ||
| 424 | sr = isi_readl(isi, ISI_STATUS); | ||
| 425 | /* Enable VSYNC interrupt for SOF */ | ||
| 426 | isi_writel(isi, ISI_INTEN, ISI_SR_VSYNC); | ||
| 427 | isi_writel(isi, ISI_CTRL, ISI_CTRL_EN); | ||
| 428 | spin_unlock_irq(&isi->lock); | ||
| 429 | |||
| 430 | dev_dbg(icd->parent, "Waiting for SOF\n"); | ||
| 431 | ret = wait_event_interruptible(isi->vsync_wq, | ||
| 432 | isi->state != ISI_STATE_IDLE); | ||
| 433 | if (ret) | ||
| 434 | return ret; | ||
| 435 | |||
| 436 | if (isi->state != ISI_STATE_READY) | ||
| 437 | return -EIO; | ||
| 438 | |||
| 439 | spin_lock_irq(&isi->lock); | ||
| 440 | isi->state = ISI_STATE_WAIT_SOF; | ||
| 441 | isi_writel(isi, ISI_INTDIS, ISI_SR_VSYNC); | ||
| 442 | spin_unlock_irq(&isi->lock); | ||
| 443 | |||
| 444 | return 0; | ||
| 445 | } | ||
| 446 | |||
| 447 | /* abort streaming and wait for last buffer */ | ||
| 448 | static int stop_streaming(struct vb2_queue *vq) | ||
| 449 | { | ||
| 450 | struct soc_camera_device *icd = soc_camera_from_vb2q(vq); | ||
| 451 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); | ||
| 452 | struct atmel_isi *isi = ici->priv; | ||
| 453 | struct frame_buffer *buf, *node; | ||
| 454 | int ret = 0; | ||
| 455 | unsigned long timeout; | ||
| 456 | |||
| 457 | spin_lock_irq(&isi->lock); | ||
| 458 | isi->active = NULL; | ||
| 459 | /* Release all active buffers */ | ||
| 460 | list_for_each_entry_safe(buf, node, &isi->video_buffer_list, list) { | ||
| 461 | list_del_init(&buf->list); | ||
| 462 | vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR); | ||
| 463 | } | ||
| 464 | spin_unlock_irq(&isi->lock); | ||
| 465 | |||
| 466 | timeout = jiffies + FRAME_INTERVAL_MILLI_SEC * HZ; | ||
| 467 | /* Wait until the end of the current frame. */ | ||
| 468 | while ((isi_readl(isi, ISI_STATUS) & ISI_CTRL_CDC) && | ||
| 469 | time_before(jiffies, timeout)) | ||
| 470 | msleep(1); | ||
| 471 | |||
| 472 | if (time_after(jiffies, timeout)) { | ||
| 473 | dev_err(icd->parent, | ||
| 474 | "Timeout waiting for finishing codec request\n"); | ||
| 475 | return -ETIMEDOUT; | ||
| 476 | } | ||
| 477 | |||
| 478 | /* Disable interrupts */ | ||
| 479 | isi_writel(isi, ISI_INTDIS, | ||
| 480 | ISI_SR_CXFR_DONE | ISI_SR_PXFR_DONE); | ||
| 481 | |||
| 482 | /* Disable ISI and wait for it is done */ | ||
| 483 | ret = atmel_isi_wait_status(isi, WAIT_ISI_DISABLE); | ||
| 484 | if (ret < 0) | ||
| 485 | dev_err(icd->parent, "Disable ISI timed out\n"); | ||
| 486 | |||
| 487 | return ret; | ||
| 488 | } | ||
| 489 | |||
| 490 | static struct vb2_ops isi_video_qops = { | ||
| 491 | .queue_setup = queue_setup, | ||
| 492 | .buf_init = buffer_init, | ||
| 493 | .buf_prepare = buffer_prepare, | ||
| 494 | .buf_cleanup = buffer_cleanup, | ||
| 495 | .buf_queue = buffer_queue, | ||
| 496 | .start_streaming = start_streaming, | ||
| 497 | .stop_streaming = stop_streaming, | ||
| 498 | .wait_prepare = soc_camera_unlock, | ||
| 499 | .wait_finish = soc_camera_lock, | ||
| 500 | }; | ||
| 501 | |||
| 502 | /* ------------------------------------------------------------------ | ||
| 503 | SOC camera operations for the device | ||
| 504 | ------------------------------------------------------------------*/ | ||
| 505 | static int isi_camera_init_videobuf(struct vb2_queue *q, | ||
| 506 | struct soc_camera_device *icd) | ||
| 507 | { | ||
| 508 | q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | ||
| 509 | q->io_modes = VB2_MMAP; | ||
| 510 | q->drv_priv = icd; | ||
| 511 | q->buf_struct_size = sizeof(struct frame_buffer); | ||
| 512 | q->ops = &isi_video_qops; | ||
| 513 | q->mem_ops = &vb2_dma_contig_memops; | ||
| 514 | |||
| 515 | return vb2_queue_init(q); | ||
| 516 | } | ||
| 517 | |||
| 518 | static int isi_camera_set_fmt(struct soc_camera_device *icd, | ||
| 519 | struct v4l2_format *f) | ||
| 520 | { | ||
| 521 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); | ||
| 522 | struct atmel_isi *isi = ici->priv; | ||
| 523 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | ||
| 524 | const struct soc_camera_format_xlate *xlate; | ||
| 525 | struct v4l2_pix_format *pix = &f->fmt.pix; | ||
| 526 | struct v4l2_mbus_framefmt mf; | ||
| 527 | int ret; | ||
| 528 | |||
| 529 | xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat); | ||
| 530 | if (!xlate) { | ||
| 531 | dev_warn(icd->parent, "Format %x not found\n", | ||
| 532 | pix->pixelformat); | ||
| 533 | return -EINVAL; | ||
| 534 | } | ||
| 535 | |||
| 536 | dev_dbg(icd->parent, "Plan to set format %dx%d\n", | ||
| 537 | pix->width, pix->height); | ||
| 538 | |||
| 539 | mf.width = pix->width; | ||
| 540 | mf.height = pix->height; | ||
| 541 | mf.field = pix->field; | ||
| 542 | mf.colorspace = pix->colorspace; | ||
| 543 | mf.code = xlate->code; | ||
| 544 | |||
| 545 | ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf); | ||
| 546 | if (ret < 0) | ||
| 547 | return ret; | ||
| 548 | |||
| 549 | if (mf.code != xlate->code) | ||
| 550 | return -EINVAL; | ||
| 551 | |||
| 552 | ret = configure_geometry(isi, pix->width, pix->height, xlate->code); | ||
| 553 | if (ret < 0) | ||
| 554 | return ret; | ||
| 555 | |||
| 556 | pix->width = mf.width; | ||
| 557 | pix->height = mf.height; | ||
| 558 | pix->field = mf.field; | ||
| 559 | pix->colorspace = mf.colorspace; | ||
| 560 | icd->current_fmt = xlate; | ||
| 561 | |||
| 562 | dev_dbg(icd->parent, "Finally set format %dx%d\n", | ||
| 563 | pix->width, pix->height); | ||
| 564 | |||
| 565 | return ret; | ||
| 566 | } | ||
| 567 | |||
| 568 | static int isi_camera_try_fmt(struct soc_camera_device *icd, | ||
| 569 | struct v4l2_format *f) | ||
| 570 | { | ||
| 571 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | ||
| 572 | const struct soc_camera_format_xlate *xlate; | ||
| 573 | struct v4l2_pix_format *pix = &f->fmt.pix; | ||
| 574 | struct v4l2_mbus_framefmt mf; | ||
| 575 | u32 pixfmt = pix->pixelformat; | ||
| 576 | int ret; | ||
| 577 | |||
| 578 | xlate = soc_camera_xlate_by_fourcc(icd, pixfmt); | ||
| 579 | if (pixfmt && !xlate) { | ||
| 580 | dev_warn(icd->parent, "Format %x not found\n", pixfmt); | ||
| 581 | return -EINVAL; | ||
| 582 | } | ||
| 583 | |||
| 584 | /* limit to Atmel ISI hardware capabilities */ | ||
| 585 | if (pix->height > MAX_SUPPORT_HEIGHT) | ||
| 586 | pix->height = MAX_SUPPORT_HEIGHT; | ||
| 587 | if (pix->width > MAX_SUPPORT_WIDTH) | ||
| 588 | pix->width = MAX_SUPPORT_WIDTH; | ||
| 589 | |||
| 590 | /* limit to sensor capabilities */ | ||
| 591 | mf.width = pix->width; | ||
| 592 | mf.height = pix->height; | ||
| 593 | mf.field = pix->field; | ||
| 594 | mf.colorspace = pix->colorspace; | ||
| 595 | mf.code = xlate->code; | ||
| 596 | |||
| 597 | ret = v4l2_subdev_call(sd, video, try_mbus_fmt, &mf); | ||
| 598 | if (ret < 0) | ||
| 599 | return ret; | ||
| 600 | |||
| 601 | pix->width = mf.width; | ||
| 602 | pix->height = mf.height; | ||
| 603 | pix->colorspace = mf.colorspace; | ||
| 604 | |||
| 605 | switch (mf.field) { | ||
| 606 | case V4L2_FIELD_ANY: | ||
| 607 | pix->field = V4L2_FIELD_NONE; | ||
| 608 | break; | ||
| 609 | case V4L2_FIELD_NONE: | ||
| 610 | break; | ||
| 611 | default: | ||
| 612 | dev_err(icd->parent, "Field type %d unsupported.\n", | ||
| 613 | mf.field); | ||
| 614 | ret = -EINVAL; | ||
| 615 | } | ||
| 616 | |||
| 617 | return ret; | ||
| 618 | } | ||
| 619 | |||
| 620 | static const struct soc_mbus_pixelfmt isi_camera_formats[] = { | ||
| 621 | { | ||
| 622 | .fourcc = V4L2_PIX_FMT_YUYV, | ||
| 623 | .name = "Packed YUV422 16 bit", | ||
| 624 | .bits_per_sample = 8, | ||
| 625 | .packing = SOC_MBUS_PACKING_2X8_PADHI, | ||
| 626 | .order = SOC_MBUS_ORDER_LE, | ||
| 627 | }, | ||
| 628 | }; | ||
| 629 | |||
| 630 | /* This will be corrected as we get more formats */ | ||
| 631 | static bool isi_camera_packing_supported(const struct soc_mbus_pixelfmt *fmt) | ||
| 632 | { | ||
| 633 | return fmt->packing == SOC_MBUS_PACKING_NONE || | ||
| 634 | (fmt->bits_per_sample == 8 && | ||
| 635 | fmt->packing == SOC_MBUS_PACKING_2X8_PADHI) || | ||
| 636 | (fmt->bits_per_sample > 8 && | ||
| 637 | fmt->packing == SOC_MBUS_PACKING_EXTEND16); | ||
| 638 | } | ||
| 639 | |||
| 640 | static unsigned long make_bus_param(struct atmel_isi *isi) | ||
| 641 | { | ||
| 642 | unsigned long flags; | ||
| 643 | /* | ||
| 644 | * Platform specified synchronization and pixel clock polarities are | ||
| 645 | * only a recommendation and are only used during probing. Atmel ISI | ||
| 646 | * camera interface only works in master mode, i.e., uses HSYNC and | ||
| 647 | * VSYNC signals from the sensor | ||
| 648 | */ | ||
| 649 | flags = SOCAM_MASTER | | ||
| 650 | SOCAM_HSYNC_ACTIVE_HIGH | | ||
| 651 | SOCAM_HSYNC_ACTIVE_LOW | | ||
| 652 | SOCAM_VSYNC_ACTIVE_HIGH | | ||
| 653 | SOCAM_VSYNC_ACTIVE_LOW | | ||
| 654 | SOCAM_PCLK_SAMPLE_RISING | | ||
| 655 | SOCAM_PCLK_SAMPLE_FALLING | | ||
| 656 | SOCAM_DATA_ACTIVE_HIGH; | ||
| 657 | |||
| 658 | if (isi->pdata->data_width_flags & ISI_DATAWIDTH_10) | ||
| 659 | flags |= SOCAM_DATAWIDTH_10; | ||
| 660 | |||
| 661 | if (isi->pdata->data_width_flags & ISI_DATAWIDTH_8) | ||
| 662 | flags |= SOCAM_DATAWIDTH_8; | ||
| 663 | |||
| 664 | if (flags & SOCAM_DATAWIDTH_MASK) | ||
| 665 | return flags; | ||
| 666 | |||
| 667 | return 0; | ||
| 668 | } | ||
| 669 | |||
| 670 | static int isi_camera_try_bus_param(struct soc_camera_device *icd, | ||
| 671 | unsigned char buswidth) | ||
| 672 | { | ||
| 673 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); | ||
| 674 | struct atmel_isi *isi = ici->priv; | ||
| 675 | unsigned long camera_flags; | ||
| 676 | int ret; | ||
| 677 | |||
| 678 | camera_flags = icd->ops->query_bus_param(icd); | ||
| 679 | ret = soc_camera_bus_param_compatible(camera_flags, | ||
| 680 | make_bus_param(isi)); | ||
| 681 | if (!ret) | ||
| 682 | return -EINVAL; | ||
| 683 | return 0; | ||
| 684 | } | ||
| 685 | |||
| 686 | |||
| 687 | static int isi_camera_get_formats(struct soc_camera_device *icd, | ||
| 688 | unsigned int idx, | ||
| 689 | struct soc_camera_format_xlate *xlate) | ||
| 690 | { | ||
| 691 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | ||
| 692 | int formats = 0, ret; | ||
| 693 | /* sensor format */ | ||
| 694 | enum v4l2_mbus_pixelcode code; | ||
| 695 | /* soc camera host format */ | ||
| 696 | const struct soc_mbus_pixelfmt *fmt; | ||
| 697 | |||
| 698 | ret = v4l2_subdev_call(sd, video, enum_mbus_fmt, idx, &code); | ||
| 699 | if (ret < 0) | ||
| 700 | /* No more formats */ | ||
| 701 | return 0; | ||
| 702 | |||
| 703 | fmt = soc_mbus_get_fmtdesc(code); | ||
| 704 | if (!fmt) { | ||
| 705 | dev_err(icd->parent, | ||
| 706 | "Invalid format code #%u: %d\n", idx, code); | ||
| 707 | return 0; | ||
| 708 | } | ||
| 709 | |||
| 710 | /* This also checks support for the requested bits-per-sample */ | ||
| 711 | ret = isi_camera_try_bus_param(icd, fmt->bits_per_sample); | ||
| 712 | if (ret < 0) { | ||
| 713 | dev_err(icd->parent, | ||
| 714 | "Fail to try the bus parameters.\n"); | ||
| 715 | return 0; | ||
| 716 | } | ||
| 717 | |||
| 718 | switch (code) { | ||
| 719 | case V4L2_MBUS_FMT_UYVY8_2X8: | ||
| 720 | case V4L2_MBUS_FMT_VYUY8_2X8: | ||
| 721 | case V4L2_MBUS_FMT_YUYV8_2X8: | ||
| 722 | case V4L2_MBUS_FMT_YVYU8_2X8: | ||
| 723 | formats++; | ||
| 724 | if (xlate) { | ||
| 725 | xlate->host_fmt = &isi_camera_formats[0]; | ||
| 726 | xlate->code = code; | ||
| 727 | xlate++; | ||
| 728 | dev_dbg(icd->parent, "Providing format %s using code %d\n", | ||
| 729 | isi_camera_formats[0].name, code); | ||
| 730 | } | ||
| 731 | break; | ||
| 732 | default: | ||
| 733 | if (!isi_camera_packing_supported(fmt)) | ||
| 734 | return 0; | ||
| 735 | if (xlate) | ||
| 736 | dev_dbg(icd->parent, | ||
| 737 | "Providing format %s in pass-through mode\n", | ||
| 738 | fmt->name); | ||
| 739 | } | ||
| 740 | |||
| 741 | /* Generic pass-through */ | ||
| 742 | formats++; | ||
| 743 | if (xlate) { | ||
| 744 | xlate->host_fmt = fmt; | ||
| 745 | xlate->code = code; | ||
| 746 | xlate++; | ||
| 747 | } | ||
| 748 | |||
| 749 | return formats; | ||
| 750 | } | ||
| 751 | |||
| 752 | /* Called with .video_lock held */ | ||
| 753 | static int isi_camera_add_device(struct soc_camera_device *icd) | ||
| 754 | { | ||
| 755 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); | ||
| 756 | struct atmel_isi *isi = ici->priv; | ||
| 757 | int ret; | ||
| 758 | |||
| 759 | if (isi->icd) | ||
| 760 | return -EBUSY; | ||
| 761 | |||
| 762 | ret = clk_enable(isi->pclk); | ||
| 763 | if (ret) | ||
| 764 | return ret; | ||
| 765 | |||
| 766 | isi->icd = icd; | ||
| 767 | dev_dbg(icd->parent, "Atmel ISI Camera driver attached to camera %d\n", | ||
| 768 | icd->devnum); | ||
| 769 | return 0; | ||
| 770 | } | ||
| 771 | /* Called with .video_lock held */ | ||
| 772 | static void isi_camera_remove_device(struct soc_camera_device *icd) | ||
| 773 | { | ||
| 774 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); | ||
| 775 | struct atmel_isi *isi = ici->priv; | ||
| 776 | |||
| 777 | BUG_ON(icd != isi->icd); | ||
| 778 | |||
| 779 | clk_disable(isi->pclk); | ||
| 780 | isi->icd = NULL; | ||
| 781 | |||
| 782 | dev_dbg(icd->parent, "Atmel ISI Camera driver detached from camera %d\n", | ||
| 783 | icd->devnum); | ||
| 784 | } | ||
| 785 | |||
| 786 | static unsigned int isi_camera_poll(struct file *file, poll_table *pt) | ||
| 787 | { | ||
| 788 | struct soc_camera_device *icd = file->private_data; | ||
| 789 | |||
| 790 | return vb2_poll(&icd->vb2_vidq, file, pt); | ||
| 791 | } | ||
| 792 | |||
| 793 | static int isi_camera_querycap(struct soc_camera_host *ici, | ||
| 794 | struct v4l2_capability *cap) | ||
| 795 | { | ||
| 796 | strcpy(cap->driver, "atmel-isi"); | ||
| 797 | strcpy(cap->card, "Atmel Image Sensor Interface"); | ||
| 798 | cap->capabilities = (V4L2_CAP_VIDEO_CAPTURE | | ||
| 799 | V4L2_CAP_STREAMING); | ||
| 800 | return 0; | ||
| 801 | } | ||
| 802 | |||
| 803 | static int isi_camera_set_bus_param(struct soc_camera_device *icd, u32 pixfmt) | ||
| 804 | { | ||
| 805 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); | ||
| 806 | struct atmel_isi *isi = ici->priv; | ||
| 807 | unsigned long bus_flags, camera_flags, common_flags; | ||
| 808 | int ret; | ||
| 809 | u32 cfg1 = 0; | ||
| 810 | |||
| 811 | camera_flags = icd->ops->query_bus_param(icd); | ||
| 812 | |||
| 813 | bus_flags = make_bus_param(isi); | ||
| 814 | common_flags = soc_camera_bus_param_compatible(camera_flags, bus_flags); | ||
| 815 | dev_dbg(icd->parent, "Flags cam: 0x%lx host: 0x%lx common: 0x%lx\n", | ||
| 816 | camera_flags, bus_flags, common_flags); | ||
| 817 | if (!common_flags) | ||
| 818 | return -EINVAL; | ||
| 819 | |||
| 820 | /* Make choises, based on platform preferences */ | ||
| 821 | if ((common_flags & SOCAM_HSYNC_ACTIVE_HIGH) && | ||
| 822 | (common_flags & SOCAM_HSYNC_ACTIVE_LOW)) { | ||
| 823 | if (isi->pdata->hsync_act_low) | ||
| 824 | common_flags &= ~SOCAM_HSYNC_ACTIVE_HIGH; | ||
| 825 | else | ||
| 826 | common_flags &= ~SOCAM_HSYNC_ACTIVE_LOW; | ||
| 827 | } | ||
| 828 | |||
| 829 | if ((common_flags & SOCAM_VSYNC_ACTIVE_HIGH) && | ||
| 830 | (common_flags & SOCAM_VSYNC_ACTIVE_LOW)) { | ||
| 831 | if (isi->pdata->vsync_act_low) | ||
| 832 | common_flags &= ~SOCAM_VSYNC_ACTIVE_HIGH; | ||
| 833 | else | ||
| 834 | common_flags &= ~SOCAM_VSYNC_ACTIVE_LOW; | ||
| 835 | } | ||
| 836 | |||
| 837 | if ((common_flags & SOCAM_PCLK_SAMPLE_RISING) && | ||
| 838 | (common_flags & SOCAM_PCLK_SAMPLE_FALLING)) { | ||
| 839 | if (isi->pdata->pclk_act_falling) | ||
| 840 | common_flags &= ~SOCAM_PCLK_SAMPLE_RISING; | ||
| 841 | else | ||
| 842 | common_flags &= ~SOCAM_PCLK_SAMPLE_FALLING; | ||
| 843 | } | ||
| 844 | |||
| 845 | ret = icd->ops->set_bus_param(icd, common_flags); | ||
| 846 | if (ret < 0) { | ||
| 847 | dev_dbg(icd->parent, "Camera set_bus_param(%lx) returned %d\n", | ||
| 848 | common_flags, ret); | ||
| 849 | return ret; | ||
| 850 | } | ||
| 851 | |||
| 852 | /* set bus param for ISI */ | ||
| 853 | if (common_flags & SOCAM_HSYNC_ACTIVE_LOW) | ||
| 854 | cfg1 |= ISI_CFG1_HSYNC_POL_ACTIVE_LOW; | ||
| 855 | if (common_flags & SOCAM_VSYNC_ACTIVE_LOW) | ||
| 856 | cfg1 |= ISI_CFG1_VSYNC_POL_ACTIVE_LOW; | ||
| 857 | if (common_flags & SOCAM_PCLK_SAMPLE_FALLING) | ||
| 858 | cfg1 |= ISI_CFG1_PIXCLK_POL_ACTIVE_FALLING; | ||
| 859 | |||
| 860 | if (isi->pdata->has_emb_sync) | ||
| 861 | cfg1 |= ISI_CFG1_EMB_SYNC; | ||
| 862 | if (isi->pdata->isi_full_mode) | ||
| 863 | cfg1 |= ISI_CFG1_FULL_MODE; | ||
| 864 | |||
| 865 | isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS); | ||
| 866 | isi_writel(isi, ISI_CFG1, cfg1); | ||
| 867 | |||
| 868 | return 0; | ||
| 869 | } | ||
| 870 | |||
| 871 | static struct soc_camera_host_ops isi_soc_camera_host_ops = { | ||
| 872 | .owner = THIS_MODULE, | ||
| 873 | .add = isi_camera_add_device, | ||
| 874 | .remove = isi_camera_remove_device, | ||
| 875 | .set_fmt = isi_camera_set_fmt, | ||
| 876 | .try_fmt = isi_camera_try_fmt, | ||
| 877 | .get_formats = isi_camera_get_formats, | ||
| 878 | .init_videobuf2 = isi_camera_init_videobuf, | ||
| 879 | .poll = isi_camera_poll, | ||
| 880 | .querycap = isi_camera_querycap, | ||
| 881 | .set_bus_param = isi_camera_set_bus_param, | ||
| 882 | }; | ||
| 883 | |||
| 884 | /* -----------------------------------------------------------------------*/ | ||
| 885 | static int __devexit atmel_isi_remove(struct platform_device *pdev) | ||
| 886 | { | ||
| 887 | struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev); | ||
| 888 | struct atmel_isi *isi = container_of(soc_host, | ||
| 889 | struct atmel_isi, soc_host); | ||
| 890 | |||
| 891 | free_irq(isi->irq, isi); | ||
| 892 | soc_camera_host_unregister(soc_host); | ||
| 893 | vb2_dma_contig_cleanup_ctx(isi->alloc_ctx); | ||
| 894 | dma_free_coherent(&pdev->dev, | ||
| 895 | sizeof(struct fbd) * MAX_BUFFER_NUM, | ||
| 896 | isi->p_fb_descriptors, | ||
| 897 | isi->fb_descriptors_phys); | ||
| 898 | |||
| 899 | iounmap(isi->regs); | ||
| 900 | clk_put(isi->pclk); | ||
| 901 | kfree(isi); | ||
| 902 | |||
| 903 | return 0; | ||
| 904 | } | ||
| 905 | |||
| 906 | static int __devinit atmel_isi_probe(struct platform_device *pdev) | ||
| 907 | { | ||
| 908 | unsigned int irq; | ||
| 909 | struct atmel_isi *isi; | ||
| 910 | struct clk *pclk; | ||
| 911 | struct resource *regs; | ||
| 912 | int ret, i; | ||
| 913 | struct device *dev = &pdev->dev; | ||
| 914 | struct soc_camera_host *soc_host; | ||
| 915 | struct isi_platform_data *pdata; | ||
| 916 | |||
| 917 | pdata = dev->platform_data; | ||
| 918 | if (!pdata || !pdata->data_width_flags) { | ||
| 919 | dev_err(&pdev->dev, | ||
| 920 | "No config available for Atmel ISI\n"); | ||
| 921 | return -EINVAL; | ||
| 922 | } | ||
| 923 | |||
| 924 | regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
| 925 | if (!regs) | ||
| 926 | return -ENXIO; | ||
| 927 | |||
| 928 | pclk = clk_get(&pdev->dev, "isi_clk"); | ||
| 929 | if (IS_ERR(pclk)) | ||
| 930 | return PTR_ERR(pclk); | ||
| 931 | |||
| 932 | isi = kzalloc(sizeof(struct atmel_isi), GFP_KERNEL); | ||
| 933 | if (!isi) { | ||
| 934 | ret = -ENOMEM; | ||
| 935 | dev_err(&pdev->dev, "Can't allocate interface!\n"); | ||
| 936 | goto err_alloc_isi; | ||
| 937 | } | ||
| 938 | |||
| 939 | isi->pclk = pclk; | ||
| 940 | isi->pdata = pdata; | ||
| 941 | isi->active = NULL; | ||
| 942 | spin_lock_init(&isi->lock); | ||
| 943 | init_waitqueue_head(&isi->vsync_wq); | ||
| 944 | INIT_LIST_HEAD(&isi->video_buffer_list); | ||
| 945 | INIT_LIST_HEAD(&isi->dma_desc_head); | ||
| 946 | |||
| 947 | isi->p_fb_descriptors = dma_alloc_coherent(&pdev->dev, | ||
| 948 | sizeof(struct fbd) * MAX_BUFFER_NUM, | ||
| 949 | &isi->fb_descriptors_phys, | ||
| 950 | GFP_KERNEL); | ||
| 951 | if (!isi->p_fb_descriptors) { | ||
| 952 | ret = -ENOMEM; | ||
| 953 | dev_err(&pdev->dev, "Can't allocate descriptors!\n"); | ||
| 954 | goto err_alloc_descriptors; | ||
| 955 | } | ||
| 956 | |||
| 957 | for (i = 0; i < MAX_BUFFER_NUM; i++) { | ||
| 958 | isi->dma_desc[i].p_fbd = isi->p_fb_descriptors + i; | ||
| 959 | isi->dma_desc[i].fbd_phys = isi->fb_descriptors_phys + | ||
| 960 | i * sizeof(struct fbd); | ||
| 961 | list_add(&isi->dma_desc[i].list, &isi->dma_desc_head); | ||
| 962 | } | ||
| 963 | |||
| 964 | isi->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev); | ||
| 965 | if (IS_ERR(isi->alloc_ctx)) { | ||
| 966 | ret = PTR_ERR(isi->alloc_ctx); | ||
| 967 | goto err_alloc_ctx; | ||
| 968 | } | ||
| 969 | |||
| 970 | isi->regs = ioremap(regs->start, resource_size(regs)); | ||
| 971 | if (!isi->regs) { | ||
| 972 | ret = -ENOMEM; | ||
| 973 | goto err_ioremap; | ||
| 974 | } | ||
| 975 | |||
| 976 | isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS); | ||
| 977 | |||
| 978 | irq = platform_get_irq(pdev, 0); | ||
| 979 | if (irq < 0) { | ||
| 980 | ret = irq; | ||
| 981 | goto err_req_irq; | ||
| 982 | } | ||
| 983 | |||
| 984 | ret = request_irq(irq, isi_interrupt, 0, "isi", isi); | ||
| 985 | if (ret) { | ||
| 986 | dev_err(&pdev->dev, "Unable to request irq %d\n", irq); | ||
| 987 | goto err_req_irq; | ||
| 988 | } | ||
| 989 | isi->irq = irq; | ||
| 990 | |||
| 991 | soc_host = &isi->soc_host; | ||
| 992 | soc_host->drv_name = "isi-camera"; | ||
| 993 | soc_host->ops = &isi_soc_camera_host_ops; | ||
| 994 | soc_host->priv = isi; | ||
| 995 | soc_host->v4l2_dev.dev = &pdev->dev; | ||
| 996 | soc_host->nr = pdev->id; | ||
| 997 | |||
| 998 | ret = soc_camera_host_register(soc_host); | ||
| 999 | if (ret) { | ||
| 1000 | dev_err(&pdev->dev, "Unable to register soc camera host\n"); | ||
| 1001 | goto err_register_soc_camera_host; | ||
| 1002 | } | ||
| 1003 | return 0; | ||
| 1004 | |||
| 1005 | err_register_soc_camera_host: | ||
| 1006 | free_irq(isi->irq, isi); | ||
| 1007 | err_req_irq: | ||
| 1008 | iounmap(isi->regs); | ||
| 1009 | err_ioremap: | ||
| 1010 | vb2_dma_contig_cleanup_ctx(isi->alloc_ctx); | ||
| 1011 | err_alloc_ctx: | ||
| 1012 | dma_free_coherent(&pdev->dev, | ||
| 1013 | sizeof(struct fbd) * MAX_BUFFER_NUM, | ||
| 1014 | isi->p_fb_descriptors, | ||
| 1015 | isi->fb_descriptors_phys); | ||
| 1016 | err_alloc_descriptors: | ||
| 1017 | kfree(isi); | ||
| 1018 | err_alloc_isi: | ||
| 1019 | clk_put(isi->pclk); | ||
| 1020 | |||
| 1021 | return ret; | ||
| 1022 | } | ||
| 1023 | |||
| 1024 | static struct platform_driver atmel_isi_driver = { | ||
| 1025 | .probe = atmel_isi_probe, | ||
| 1026 | .remove = __devexit_p(atmel_isi_remove), | ||
| 1027 | .driver = { | ||
| 1028 | .name = "atmel_isi", | ||
| 1029 | .owner = THIS_MODULE, | ||
| 1030 | }, | ||
| 1031 | }; | ||
| 1032 | |||
| 1033 | static int __init atmel_isi_init_module(void) | ||
| 1034 | { | ||
| 1035 | return platform_driver_probe(&atmel_isi_driver, &atmel_isi_probe); | ||
| 1036 | } | ||
| 1037 | |||
| 1038 | static void __exit atmel_isi_exit(void) | ||
| 1039 | { | ||
| 1040 | platform_driver_unregister(&atmel_isi_driver); | ||
| 1041 | } | ||
| 1042 | module_init(atmel_isi_init_module); | ||
| 1043 | module_exit(atmel_isi_exit); | ||
| 1044 | |||
| 1045 | MODULE_AUTHOR("Josh Wu <josh.wu@atmel.com>"); | ||
| 1046 | MODULE_DESCRIPTION("The V4L2 driver for Atmel Linux"); | ||
| 1047 | MODULE_LICENSE("GPL"); | ||
| 1048 | MODULE_SUPPORTED_DEVICE("video"); | ||
diff --git a/drivers/media/video/au0828/au0828-core.c b/drivers/media/video/au0828/au0828-core.c index ca342e4c61fc..1e4ce5068ec2 100644 --- a/drivers/media/video/au0828/au0828-core.c +++ b/drivers/media/video/au0828/au0828-core.c | |||
| @@ -292,3 +292,4 @@ module_exit(au0828_exit); | |||
| 292 | MODULE_DESCRIPTION("Driver for Auvitek AU0828 based products"); | 292 | MODULE_DESCRIPTION("Driver for Auvitek AU0828 based products"); |
| 293 | MODULE_AUTHOR("Steven Toth <stoth@linuxtv.org>"); | 293 | MODULE_AUTHOR("Steven Toth <stoth@linuxtv.org>"); |
| 294 | MODULE_LICENSE("GPL"); | 294 | MODULE_LICENSE("GPL"); |
| 295 | MODULE_VERSION("0.0.2"); | ||
diff --git a/drivers/media/video/au0828/au0828-video.c b/drivers/media/video/au0828/au0828-video.c index c03eb29a9ee6..0b3e481ffe8c 100644 --- a/drivers/media/video/au0828/au0828-video.c +++ b/drivers/media/video/au0828/au0828-video.c | |||
| @@ -33,7 +33,6 @@ | |||
| 33 | #include <linux/init.h> | 33 | #include <linux/init.h> |
| 34 | #include <linux/device.h> | 34 | #include <linux/device.h> |
| 35 | #include <linux/suspend.h> | 35 | #include <linux/suspend.h> |
| 36 | #include <linux/version.h> | ||
| 37 | #include <media/v4l2-common.h> | 36 | #include <media/v4l2-common.h> |
| 38 | #include <media/v4l2-ioctl.h> | 37 | #include <media/v4l2-ioctl.h> |
| 39 | #include <media/v4l2-chip-ident.h> | 38 | #include <media/v4l2-chip-ident.h> |
| @@ -43,8 +42,6 @@ | |||
| 43 | 42 | ||
| 44 | static DEFINE_MUTEX(au0828_sysfs_lock); | 43 | static DEFINE_MUTEX(au0828_sysfs_lock); |
| 45 | 44 | ||
| 46 | #define AU0828_VERSION_CODE KERNEL_VERSION(0, 0, 1) | ||
| 47 | |||
| 48 | /* ------------------------------------------------------------------ | 45 | /* ------------------------------------------------------------------ |
| 49 | Videobuf operations | 46 | Videobuf operations |
| 50 | ------------------------------------------------------------------*/ | 47 | ------------------------------------------------------------------*/ |
| @@ -1254,8 +1251,6 @@ static int vidioc_querycap(struct file *file, void *priv, | |||
| 1254 | strlcpy(cap->card, dev->board.name, sizeof(cap->card)); | 1251 | strlcpy(cap->card, dev->board.name, sizeof(cap->card)); |
| 1255 | strlcpy(cap->bus_info, dev->v4l2_dev.name, sizeof(cap->bus_info)); | 1252 | strlcpy(cap->bus_info, dev->v4l2_dev.name, sizeof(cap->bus_info)); |
| 1256 | 1253 | ||
| 1257 | cap->version = AU0828_VERSION_CODE; | ||
| 1258 | |||
| 1259 | /*set the device capabilities */ | 1254 | /*set the device capabilities */ |
| 1260 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | | 1255 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | |
| 1261 | V4L2_CAP_VBI_CAPTURE | | 1256 | V4L2_CAP_VBI_CAPTURE | |
diff --git a/drivers/media/video/bt8xx/bttv-cards.c b/drivers/media/video/bt8xx/bttv-cards.c index 3c9e6c7e7b52..5b15f63bf065 100644 --- a/drivers/media/video/bt8xx/bttv-cards.c +++ b/drivers/media/video/bt8xx/bttv-cards.c | |||
| @@ -2892,13 +2892,10 @@ void __devinit bttv_idcard(struct bttv *btv) | |||
| 2892 | { | 2892 | { |
| 2893 | unsigned int gpiobits; | 2893 | unsigned int gpiobits; |
| 2894 | int i,type; | 2894 | int i,type; |
| 2895 | unsigned short tmp; | ||
| 2896 | 2895 | ||
| 2897 | /* read PCI subsystem ID */ | 2896 | /* read PCI subsystem ID */ |
| 2898 | pci_read_config_word(btv->c.pci, PCI_SUBSYSTEM_ID, &tmp); | 2897 | btv->cardid = btv->c.pci->subsystem_device << 16; |
| 2899 | btv->cardid = tmp << 16; | 2898 | btv->cardid |= btv->c.pci->subsystem_vendor; |
| 2900 | pci_read_config_word(btv->c.pci, PCI_SUBSYSTEM_VENDOR_ID, &tmp); | ||
| 2901 | btv->cardid |= tmp; | ||
| 2902 | 2899 | ||
| 2903 | if (0 != btv->cardid && 0xffffffff != btv->cardid) { | 2900 | if (0 != btv->cardid && 0xffffffff != btv->cardid) { |
| 2904 | /* look for the card */ | 2901 | /* look for the card */ |
diff --git a/drivers/media/video/bt8xx/bttv-driver.c b/drivers/media/video/bt8xx/bttv-driver.c index 834a48394bce..14444de67d5e 100644 --- a/drivers/media/video/bt8xx/bttv-driver.c +++ b/drivers/media/video/bt8xx/bttv-driver.c | |||
| @@ -57,6 +57,7 @@ | |||
| 57 | 57 | ||
| 58 | #include <media/saa6588.h> | 58 | #include <media/saa6588.h> |
| 59 | 59 | ||
| 60 | #define BTTV_VERSION "0.9.19" | ||
| 60 | 61 | ||
| 61 | unsigned int bttv_num; /* number of Bt848s in use */ | 62 | unsigned int bttv_num; /* number of Bt848s in use */ |
| 62 | struct bttv *bttvs[BTTV_MAX]; | 63 | struct bttv *bttvs[BTTV_MAX]; |
| @@ -163,6 +164,7 @@ MODULE_PARM_DESC(radio_nr, "radio device numbers"); | |||
| 163 | MODULE_DESCRIPTION("bttv - v4l/v4l2 driver module for bt848/878 based cards"); | 164 | MODULE_DESCRIPTION("bttv - v4l/v4l2 driver module for bt848/878 based cards"); |
| 164 | MODULE_AUTHOR("Ralph Metzler & Marcus Metzler & Gerd Knorr"); | 165 | MODULE_AUTHOR("Ralph Metzler & Marcus Metzler & Gerd Knorr"); |
| 165 | MODULE_LICENSE("GPL"); | 166 | MODULE_LICENSE("GPL"); |
| 167 | MODULE_VERSION(BTTV_VERSION); | ||
| 166 | 168 | ||
| 167 | /* ----------------------------------------------------------------------- */ | 169 | /* ----------------------------------------------------------------------- */ |
| 168 | /* sysfs */ | 170 | /* sysfs */ |
| @@ -2616,7 +2618,6 @@ static int bttv_querycap(struct file *file, void *priv, | |||
| 2616 | strlcpy(cap->card, btv->video_dev->name, sizeof(cap->card)); | 2618 | strlcpy(cap->card, btv->video_dev->name, sizeof(cap->card)); |
| 2617 | snprintf(cap->bus_info, sizeof(cap->bus_info), | 2619 | snprintf(cap->bus_info, sizeof(cap->bus_info), |
| 2618 | "PCI:%s", pci_name(btv->c.pci)); | 2620 | "PCI:%s", pci_name(btv->c.pci)); |
| 2619 | cap->version = BTTV_VERSION_CODE; | ||
| 2620 | cap->capabilities = | 2621 | cap->capabilities = |
| 2621 | V4L2_CAP_VIDEO_CAPTURE | | 2622 | V4L2_CAP_VIDEO_CAPTURE | |
| 2622 | V4L2_CAP_VBI_CAPTURE | | 2623 | V4L2_CAP_VBI_CAPTURE | |
| @@ -3416,7 +3417,6 @@ static int radio_querycap(struct file *file, void *priv, | |||
| 3416 | strcpy(cap->driver, "bttv"); | 3417 | strcpy(cap->driver, "bttv"); |
| 3417 | strlcpy(cap->card, btv->radio_dev->name, sizeof(cap->card)); | 3418 | strlcpy(cap->card, btv->radio_dev->name, sizeof(cap->card)); |
| 3418 | sprintf(cap->bus_info, "PCI:%s", pci_name(btv->c.pci)); | 3419 | sprintf(cap->bus_info, "PCI:%s", pci_name(btv->c.pci)); |
| 3419 | cap->version = BTTV_VERSION_CODE; | ||
| 3420 | cap->capabilities = V4L2_CAP_TUNER; | 3420 | cap->capabilities = V4L2_CAP_TUNER; |
| 3421 | 3421 | ||
| 3422 | return 0; | 3422 | return 0; |
| @@ -4585,14 +4585,8 @@ static int __init bttv_init_module(void) | |||
| 4585 | 4585 | ||
| 4586 | bttv_num = 0; | 4586 | bttv_num = 0; |
| 4587 | 4587 | ||
| 4588 | printk(KERN_INFO "bttv: driver version %d.%d.%d loaded\n", | 4588 | printk(KERN_INFO "bttv: driver version %s loaded\n", |
| 4589 | (BTTV_VERSION_CODE >> 16) & 0xff, | 4589 | BTTV_VERSION); |
| 4590 | (BTTV_VERSION_CODE >> 8) & 0xff, | ||
| 4591 | BTTV_VERSION_CODE & 0xff); | ||
| 4592 | #ifdef SNAPSHOT | ||
| 4593 | printk(KERN_INFO "bttv: snapshot date %04d-%02d-%02d\n", | ||
| 4594 | SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100); | ||
| 4595 | #endif | ||
| 4596 | if (gbuffers < 2 || gbuffers > VIDEO_MAX_FRAME) | 4590 | if (gbuffers < 2 || gbuffers > VIDEO_MAX_FRAME) |
| 4597 | gbuffers = 2; | 4591 | gbuffers = 2; |
| 4598 | if (gbufsize > BTTV_MAX_FBUF) | 4592 | if (gbufsize > BTTV_MAX_FBUF) |
diff --git a/drivers/media/video/bt8xx/bttvp.h b/drivers/media/video/bt8xx/bttvp.h index 9b776faf0741..318edf2830b4 100644 --- a/drivers/media/video/bt8xx/bttvp.h +++ b/drivers/media/video/bt8xx/bttvp.h | |||
| @@ -25,9 +25,6 @@ | |||
| 25 | #ifndef _BTTVP_H_ | 25 | #ifndef _BTTVP_H_ |
| 26 | #define _BTTVP_H_ | 26 | #define _BTTVP_H_ |
| 27 | 27 | ||
| 28 | #include <linux/version.h> | ||
| 29 | #define BTTV_VERSION_CODE KERNEL_VERSION(0,9,18) | ||
| 30 | |||
| 31 | #include <linux/types.h> | 28 | #include <linux/types.h> |
| 32 | #include <linux/wait.h> | 29 | #include <linux/wait.h> |
| 33 | #include <linux/i2c.h> | 30 | #include <linux/i2c.h> |
diff --git a/drivers/media/video/bw-qcam.c b/drivers/media/video/bw-qcam.c index c1193506131c..f09df9dffaae 100644 --- a/drivers/media/video/bw-qcam.c +++ b/drivers/media/video/bw-qcam.c | |||
| @@ -71,7 +71,6 @@ OTHER DEALINGS IN THE SOFTWARE. | |||
| 71 | #include <linux/mm.h> | 71 | #include <linux/mm.h> |
| 72 | #include <linux/parport.h> | 72 | #include <linux/parport.h> |
| 73 | #include <linux/sched.h> | 73 | #include <linux/sched.h> |
| 74 | #include <linux/version.h> | ||
| 75 | #include <linux/videodev2.h> | 74 | #include <linux/videodev2.h> |
| 76 | #include <linux/mutex.h> | 75 | #include <linux/mutex.h> |
| 77 | #include <asm/uaccess.h> | 76 | #include <asm/uaccess.h> |
| @@ -647,7 +646,6 @@ static int qcam_querycap(struct file *file, void *priv, | |||
| 647 | strlcpy(vcap->driver, qcam->v4l2_dev.name, sizeof(vcap->driver)); | 646 | strlcpy(vcap->driver, qcam->v4l2_dev.name, sizeof(vcap->driver)); |
| 648 | strlcpy(vcap->card, "B&W Quickcam", sizeof(vcap->card)); | 647 | strlcpy(vcap->card, "B&W Quickcam", sizeof(vcap->card)); |
| 649 | strlcpy(vcap->bus_info, "parport", sizeof(vcap->bus_info)); | 648 | strlcpy(vcap->bus_info, "parport", sizeof(vcap->bus_info)); |
| 650 | vcap->version = KERNEL_VERSION(0, 0, 2); | ||
| 651 | vcap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE; | 649 | vcap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE; |
| 652 | return 0; | 650 | return 0; |
| 653 | } | 651 | } |
| @@ -895,6 +893,7 @@ static struct qcam *qcam_init(struct parport *port) | |||
| 895 | 893 | ||
| 896 | if (v4l2_device_register(NULL, v4l2_dev) < 0) { | 894 | if (v4l2_device_register(NULL, v4l2_dev) < 0) { |
| 897 | v4l2_err(v4l2_dev, "Could not register v4l2_device\n"); | 895 | v4l2_err(v4l2_dev, "Could not register v4l2_device\n"); |
| 896 | kfree(qcam); | ||
| 898 | return NULL; | 897 | return NULL; |
| 899 | } | 898 | } |
| 900 | 899 | ||
| @@ -1092,3 +1091,4 @@ module_init(init_bw_qcams); | |||
| 1092 | module_exit(exit_bw_qcams); | 1091 | module_exit(exit_bw_qcams); |
| 1093 | 1092 | ||
| 1094 | MODULE_LICENSE("GPL"); | 1093 | MODULE_LICENSE("GPL"); |
| 1094 | MODULE_VERSION("0.0.3"); | ||
diff --git a/drivers/media/video/c-qcam.c b/drivers/media/video/c-qcam.c index 24fc00965a12..cd8ff0473184 100644 --- a/drivers/media/video/c-qcam.c +++ b/drivers/media/video/c-qcam.c | |||
| @@ -35,7 +35,6 @@ | |||
| 35 | #include <linux/sched.h> | 35 | #include <linux/sched.h> |
| 36 | #include <linux/mutex.h> | 36 | #include <linux/mutex.h> |
| 37 | #include <linux/jiffies.h> | 37 | #include <linux/jiffies.h> |
| 38 | #include <linux/version.h> | ||
| 39 | #include <linux/videodev2.h> | 38 | #include <linux/videodev2.h> |
| 40 | #include <asm/uaccess.h> | 39 | #include <asm/uaccess.h> |
| 41 | #include <media/v4l2-device.h> | 40 | #include <media/v4l2-device.h> |
| @@ -517,7 +516,6 @@ static int qcam_querycap(struct file *file, void *priv, | |||
| 517 | strlcpy(vcap->driver, qcam->v4l2_dev.name, sizeof(vcap->driver)); | 516 | strlcpy(vcap->driver, qcam->v4l2_dev.name, sizeof(vcap->driver)); |
| 518 | strlcpy(vcap->card, "Color Quickcam", sizeof(vcap->card)); | 517 | strlcpy(vcap->card, "Color Quickcam", sizeof(vcap->card)); |
| 519 | strlcpy(vcap->bus_info, "parport", sizeof(vcap->bus_info)); | 518 | strlcpy(vcap->bus_info, "parport", sizeof(vcap->bus_info)); |
| 520 | vcap->version = KERNEL_VERSION(0, 0, 3); | ||
| 521 | vcap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE; | 519 | vcap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE; |
| 522 | return 0; | 520 | return 0; |
| 523 | } | 521 | } |
| @@ -752,6 +750,7 @@ static struct qcam *qcam_init(struct parport *port) | |||
| 752 | 750 | ||
| 753 | if (v4l2_device_register(NULL, v4l2_dev) < 0) { | 751 | if (v4l2_device_register(NULL, v4l2_dev) < 0) { |
| 754 | v4l2_err(v4l2_dev, "Could not register v4l2_device\n"); | 752 | v4l2_err(v4l2_dev, "Could not register v4l2_device\n"); |
| 753 | kfree(qcam); | ||
| 755 | return NULL; | 754 | return NULL; |
| 756 | } | 755 | } |
| 757 | 756 | ||
| @@ -886,6 +885,7 @@ static void __exit cqcam_cleanup(void) | |||
| 886 | MODULE_AUTHOR("Philip Blundell <philb@gnu.org>"); | 885 | MODULE_AUTHOR("Philip Blundell <philb@gnu.org>"); |
| 887 | MODULE_DESCRIPTION(BANNER); | 886 | MODULE_DESCRIPTION(BANNER); |
| 888 | MODULE_LICENSE("GPL"); | 887 | MODULE_LICENSE("GPL"); |
| 888 | MODULE_VERSION("0.0.4"); | ||
| 889 | 889 | ||
| 890 | module_init(cqcam_init); | 890 | module_init(cqcam_init); |
| 891 | module_exit(cqcam_cleanup); | 891 | module_exit(cqcam_cleanup); |
diff --git a/drivers/media/video/cafe_ccic-regs.h b/drivers/media/video/cafe_ccic-regs.h deleted file mode 100644 index 8e2a87cdc791..000000000000 --- a/drivers/media/video/cafe_ccic-regs.h +++ /dev/null | |||
| @@ -1,166 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * Register definitions for the m88alp01 camera interface. Offsets in bytes | ||
| 3 | * as given in the spec. | ||
| 4 | * | ||
| 5 | * Copyright 2006 One Laptop Per Child Association, Inc. | ||
| 6 | * | ||
| 7 | * Written by Jonathan Corbet, corbet@lwn.net. | ||
| 8 | * | ||
| 9 | * This file may be distributed under the terms of the GNU General | ||
| 10 | * Public License, version 2. | ||
| 11 | */ | ||
| 12 | #define REG_Y0BAR 0x00 | ||
| 13 | #define REG_Y1BAR 0x04 | ||
| 14 | #define REG_Y2BAR 0x08 | ||
| 15 | /* ... */ | ||
| 16 | |||
| 17 | #define REG_IMGPITCH 0x24 /* Image pitch register */ | ||
| 18 | #define IMGP_YP_SHFT 2 /* Y pitch params */ | ||
| 19 | #define IMGP_YP_MASK 0x00003ffc /* Y pitch field */ | ||
| 20 | #define IMGP_UVP_SHFT 18 /* UV pitch (planar) */ | ||
| 21 | #define IMGP_UVP_MASK 0x3ffc0000 | ||
| 22 | #define REG_IRQSTATRAW 0x28 /* RAW IRQ Status */ | ||
| 23 | #define IRQ_EOF0 0x00000001 /* End of frame 0 */ | ||
| 24 | #define IRQ_EOF1 0x00000002 /* End of frame 1 */ | ||
| 25 | #define IRQ_EOF2 0x00000004 /* End of frame 2 */ | ||
| 26 | #define IRQ_SOF0 0x00000008 /* Start of frame 0 */ | ||
| 27 | #define IRQ_SOF1 0x00000010 /* Start of frame 1 */ | ||
| 28 | #define IRQ_SOF2 0x00000020 /* Start of frame 2 */ | ||
| 29 | #define IRQ_OVERFLOW 0x00000040 /* FIFO overflow */ | ||
| 30 | #define IRQ_TWSIW 0x00010000 /* TWSI (smbus) write */ | ||
| 31 | #define IRQ_TWSIR 0x00020000 /* TWSI read */ | ||
| 32 | #define IRQ_TWSIE 0x00040000 /* TWSI error */ | ||
| 33 | #define TWSIIRQS (IRQ_TWSIW|IRQ_TWSIR|IRQ_TWSIE) | ||
| 34 | #define FRAMEIRQS (IRQ_EOF0|IRQ_EOF1|IRQ_EOF2|IRQ_SOF0|IRQ_SOF1|IRQ_SOF2) | ||
| 35 | #define ALLIRQS (TWSIIRQS|FRAMEIRQS|IRQ_OVERFLOW) | ||
| 36 | #define REG_IRQMASK 0x2c /* IRQ mask - same bits as IRQSTAT */ | ||
| 37 | #define REG_IRQSTAT 0x30 /* IRQ status / clear */ | ||
| 38 | |||
| 39 | #define REG_IMGSIZE 0x34 /* Image size */ | ||
| 40 | #define IMGSZ_V_MASK 0x1fff0000 | ||
| 41 | #define IMGSZ_V_SHIFT 16 | ||
| 42 | #define IMGSZ_H_MASK 0x00003fff | ||
| 43 | #define REG_IMGOFFSET 0x38 /* IMage offset */ | ||
| 44 | |||
| 45 | #define REG_CTRL0 0x3c /* Control 0 */ | ||
| 46 | #define C0_ENABLE 0x00000001 /* Makes the whole thing go */ | ||
| 47 | |||
| 48 | /* Mask for all the format bits */ | ||
| 49 | #define C0_DF_MASK 0x00fffffc /* Bits 2-23 */ | ||
| 50 | |||
| 51 | /* RGB ordering */ | ||
| 52 | #define C0_RGB4_RGBX 0x00000000 | ||
| 53 | #define C0_RGB4_XRGB 0x00000004 | ||
| 54 | #define C0_RGB4_BGRX 0x00000008 | ||
| 55 | #define C0_RGB4_XBGR 0x0000000c | ||
| 56 | #define C0_RGB5_RGGB 0x00000000 | ||
| 57 | #define C0_RGB5_GRBG 0x00000004 | ||
| 58 | #define C0_RGB5_GBRG 0x00000008 | ||
| 59 | #define C0_RGB5_BGGR 0x0000000c | ||
| 60 | |||
| 61 | /* Spec has two fields for DIN and DOUT, but they must match, so | ||
| 62 | combine them here. */ | ||
| 63 | #define C0_DF_YUV 0x00000000 /* Data is YUV */ | ||
| 64 | #define C0_DF_RGB 0x000000a0 /* ... RGB */ | ||
| 65 | #define C0_DF_BAYER 0x00000140 /* ... Bayer */ | ||
| 66 | /* 8-8-8 must be missing from the below - ask */ | ||
| 67 | #define C0_RGBF_565 0x00000000 | ||
| 68 | #define C0_RGBF_444 0x00000800 | ||
| 69 | #define C0_RGB_BGR 0x00001000 /* Blue comes first */ | ||
| 70 | #define C0_YUV_PLANAR 0x00000000 /* YUV 422 planar format */ | ||
| 71 | #define C0_YUV_PACKED 0x00008000 /* YUV 422 packed */ | ||
| 72 | #define C0_YUV_420PL 0x0000a000 /* YUV 420 planar */ | ||
| 73 | /* Think that 420 packed must be 111 - ask */ | ||
| 74 | #define C0_YUVE_YUYV 0x00000000 /* Y1CbY0Cr */ | ||
| 75 | #define C0_YUVE_YVYU 0x00010000 /* Y1CrY0Cb */ | ||
| 76 | #define C0_YUVE_VYUY 0x00020000 /* CrY1CbY0 */ | ||
| 77 | #define C0_YUVE_UYVY 0x00030000 /* CbY1CrY0 */ | ||
| 78 | #define C0_YUVE_XYUV 0x00000000 /* 420: .YUV */ | ||
| 79 | #define C0_YUVE_XYVU 0x00010000 /* 420: .YVU */ | ||
| 80 | #define C0_YUVE_XUVY 0x00020000 /* 420: .UVY */ | ||
| 81 | #define C0_YUVE_XVUY 0x00030000 /* 420: .VUY */ | ||
| 82 | /* Bayer bits 18,19 if needed */ | ||
| 83 | #define C0_HPOL_LOW 0x01000000 /* HSYNC polarity active low */ | ||
| 84 | #define C0_VPOL_LOW 0x02000000 /* VSYNC polarity active low */ | ||
| 85 | #define C0_VCLK_LOW 0x04000000 /* VCLK on falling edge */ | ||
| 86 | #define C0_DOWNSCALE 0x08000000 /* Enable downscaler */ | ||
| 87 | #define C0_SIFM_MASK 0xc0000000 /* SIF mode bits */ | ||
| 88 | #define C0_SIF_HVSYNC 0x00000000 /* Use H/VSYNC */ | ||
| 89 | #define CO_SOF_NOSYNC 0x40000000 /* Use inband active signaling */ | ||
| 90 | |||
| 91 | |||
| 92 | #define REG_CTRL1 0x40 /* Control 1 */ | ||
| 93 | #define C1_444ALPHA 0x00f00000 /* Alpha field in RGB444 */ | ||
| 94 | #define C1_ALPHA_SHFT 20 | ||
| 95 | #define C1_DMAB32 0x00000000 /* 32-byte DMA burst */ | ||
| 96 | #define C1_DMAB16 0x02000000 /* 16-byte DMA burst */ | ||
| 97 | #define C1_DMAB64 0x04000000 /* 64-byte DMA burst */ | ||
| 98 | #define C1_DMAB_MASK 0x06000000 | ||
| 99 | #define C1_TWOBUFS 0x08000000 /* Use only two DMA buffers */ | ||
| 100 | #define C1_PWRDWN 0x10000000 /* Power down */ | ||
| 101 | |||
| 102 | #define REG_CLKCTRL 0x88 /* Clock control */ | ||
| 103 | #define CLK_DIV_MASK 0x0000ffff /* Upper bits RW "reserved" */ | ||
| 104 | |||
| 105 | #define REG_GPR 0xb4 /* General purpose register. This | ||
| 106 | controls inputs to the power and reset | ||
| 107 | pins on the OV7670 used with OLPC; | ||
| 108 | other deployments could differ. */ | ||
| 109 | #define GPR_C1EN 0x00000020 /* Pad 1 (power down) enable */ | ||
| 110 | #define GPR_C0EN 0x00000010 /* Pad 0 (reset) enable */ | ||
| 111 | #define GPR_C1 0x00000002 /* Control 1 value */ | ||
| 112 | /* | ||
| 113 | * Control 0 is wired to reset on OLPC machines. For ov7x sensors, | ||
| 114 | * it is active low, for 0v6x, instead, it's active high. What | ||
| 115 | * fun. | ||
| 116 | */ | ||
| 117 | #define GPR_C0 0x00000001 /* Control 0 value */ | ||
| 118 | |||
| 119 | #define REG_TWSIC0 0xb8 /* TWSI (smbus) control 0 */ | ||
| 120 | #define TWSIC0_EN 0x00000001 /* TWSI enable */ | ||
| 121 | #define TWSIC0_MODE 0x00000002 /* 1 = 16-bit, 0 = 8-bit */ | ||
| 122 | #define TWSIC0_SID 0x000003fc /* Slave ID */ | ||
| 123 | #define TWSIC0_SID_SHIFT 2 | ||
| 124 | #define TWSIC0_CLKDIV 0x0007fc00 /* Clock divider */ | ||
| 125 | #define TWSIC0_MASKACK 0x00400000 /* Mask ack from sensor */ | ||
| 126 | #define TWSIC0_OVMAGIC 0x00800000 /* Make it work on OV sensors */ | ||
| 127 | |||
| 128 | #define REG_TWSIC1 0xbc /* TWSI control 1 */ | ||
| 129 | #define TWSIC1_DATA 0x0000ffff /* Data to/from camchip */ | ||
| 130 | #define TWSIC1_ADDR 0x00ff0000 /* Address (register) */ | ||
| 131 | #define TWSIC1_ADDR_SHIFT 16 | ||
| 132 | #define TWSIC1_READ 0x01000000 /* Set for read op */ | ||
| 133 | #define TWSIC1_WSTAT 0x02000000 /* Write status */ | ||
| 134 | #define TWSIC1_RVALID 0x04000000 /* Read data valid */ | ||
| 135 | #define TWSIC1_ERROR 0x08000000 /* Something screwed up */ | ||
| 136 | |||
| 137 | |||
| 138 | #define REG_UBAR 0xc4 /* Upper base address register */ | ||
| 139 | |||
| 140 | /* | ||
| 141 | * Here's the weird global control registers which are said to live | ||
| 142 | * way up here. | ||
| 143 | */ | ||
| 144 | #define REG_GL_CSR 0x3004 /* Control/status register */ | ||
| 145 | #define GCSR_SRS 0x00000001 /* SW Reset set */ | ||
| 146 | #define GCSR_SRC 0x00000002 /* SW Reset clear */ | ||
| 147 | #define GCSR_MRS 0x00000004 /* Master reset set */ | ||
| 148 | #define GCSR_MRC 0x00000008 /* HW Reset clear */ | ||
| 149 | #define GCSR_CCIC_EN 0x00004000 /* CCIC Clock enable */ | ||
| 150 | #define REG_GL_IMASK 0x300c /* Interrupt mask register */ | ||
| 151 | #define GIMSK_CCIC_EN 0x00000004 /* CCIC Interrupt enable */ | ||
| 152 | |||
| 153 | #define REG_GL_FCR 0x3038 /* GPIO functional control register */ | ||
| 154 | #define GFCR_GPIO_ON 0x08 /* Camera GPIO enabled */ | ||
| 155 | #define REG_GL_GPIOR 0x315c /* GPIO register */ | ||
| 156 | #define GGPIO_OUT 0x80000 /* GPIO output */ | ||
| 157 | #define GGPIO_VAL 0x00008 /* Output pin value */ | ||
| 158 | |||
| 159 | #define REG_LEN REG_GL_IMASK + 4 | ||
| 160 | |||
| 161 | |||
| 162 | /* | ||
| 163 | * Useful stuff that probably belongs somewhere global. | ||
| 164 | */ | ||
| 165 | #define VGA_WIDTH 640 | ||
| 166 | #define VGA_HEIGHT 480 | ||
diff --git a/drivers/media/video/cafe_ccic.c b/drivers/media/video/cafe_ccic.c deleted file mode 100644 index 664703398493..000000000000 --- a/drivers/media/video/cafe_ccic.c +++ /dev/null | |||
| @@ -1,2267 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * A driver for the CMOS camera controller in the Marvell 88ALP01 "cafe" | ||
| 3 | * multifunction chip. Currently works with the Omnivision OV7670 | ||
| 4 | * sensor. | ||
| 5 | * | ||
| 6 | * The data sheet for this device can be found at: | ||
| 7 | * http://www.marvell.com/products/pc_connectivity/88alp01/ | ||
| 8 | * | ||
| 9 | * Copyright 2006 One Laptop Per Child Association, Inc. | ||
| 10 | * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net> | ||
| 11 | * | ||
| 12 | * Written by Jonathan Corbet, corbet@lwn.net. | ||
| 13 | * | ||
| 14 | * v4l2_device/v4l2_subdev conversion by: | ||
| 15 | * Copyright (C) 2009 Hans Verkuil <hverkuil@xs4all.nl> | ||
| 16 | * | ||
| 17 | * Note: this conversion is untested! Please contact the linux-media | ||
| 18 | * mailinglist if you can test this, together with the test results. | ||
| 19 | * | ||
| 20 | * This file may be distributed under the terms of the GNU General | ||
| 21 | * Public License, version 2. | ||
| 22 | */ | ||
| 23 | |||
| 24 | #include <linux/kernel.h> | ||
| 25 | #include <linux/module.h> | ||
| 26 | #include <linux/init.h> | ||
| 27 | #include <linux/fs.h> | ||
| 28 | #include <linux/dmi.h> | ||
| 29 | #include <linux/mm.h> | ||
| 30 | #include <linux/pci.h> | ||
| 31 | #include <linux/i2c.h> | ||
| 32 | #include <linux/interrupt.h> | ||
| 33 | #include <linux/spinlock.h> | ||
| 34 | #include <linux/videodev2.h> | ||
| 35 | #include <linux/slab.h> | ||
| 36 | #include <media/v4l2-device.h> | ||
| 37 | #include <media/v4l2-ioctl.h> | ||
| 38 | #include <media/v4l2-chip-ident.h> | ||
| 39 | #include <linux/device.h> | ||
| 40 | #include <linux/wait.h> | ||
| 41 | #include <linux/list.h> | ||
| 42 | #include <linux/dma-mapping.h> | ||
| 43 | #include <linux/delay.h> | ||
| 44 | #include <linux/jiffies.h> | ||
| 45 | #include <linux/vmalloc.h> | ||
| 46 | |||
| 47 | #include <asm/uaccess.h> | ||
| 48 | #include <asm/io.h> | ||
| 49 | |||
| 50 | #include "ov7670.h" | ||
| 51 | #include "cafe_ccic-regs.h" | ||
| 52 | |||
| 53 | #define CAFE_VERSION 0x000002 | ||
| 54 | |||
| 55 | |||
| 56 | /* | ||
| 57 | * Parameters. | ||
| 58 | */ | ||
| 59 | MODULE_AUTHOR("Jonathan Corbet <corbet@lwn.net>"); | ||
| 60 | MODULE_DESCRIPTION("Marvell 88ALP01 CMOS Camera Controller driver"); | ||
| 61 | MODULE_LICENSE("GPL"); | ||
| 62 | MODULE_SUPPORTED_DEVICE("Video"); | ||
| 63 | |||
| 64 | /* | ||
| 65 | * Internal DMA buffer management. Since the controller cannot do S/G I/O, | ||
| 66 | * we must have physically contiguous buffers to bring frames into. | ||
| 67 | * These parameters control how many buffers we use, whether we | ||
| 68 | * allocate them at load time (better chance of success, but nails down | ||
| 69 | * memory) or when somebody tries to use the camera (riskier), and, | ||
| 70 | * for load-time allocation, how big they should be. | ||
| 71 | * | ||
| 72 | * The controller can cycle through three buffers. We could use | ||
| 73 | * more by flipping pointers around, but it probably makes little | ||
| 74 | * sense. | ||
| 75 | */ | ||
| 76 | |||
| 77 | #define MAX_DMA_BUFS 3 | ||
| 78 | static int alloc_bufs_at_read; | ||
| 79 | module_param(alloc_bufs_at_read, bool, 0444); | ||
| 80 | MODULE_PARM_DESC(alloc_bufs_at_read, | ||
| 81 | "Non-zero value causes DMA buffers to be allocated when the " | ||
| 82 | "video capture device is read, rather than at module load " | ||
| 83 | "time. This saves memory, but decreases the chances of " | ||
| 84 | "successfully getting those buffers."); | ||
| 85 | |||
| 86 | static int n_dma_bufs = 3; | ||
| 87 | module_param(n_dma_bufs, uint, 0644); | ||
| 88 | MODULE_PARM_DESC(n_dma_bufs, | ||
| 89 | "The number of DMA buffers to allocate. Can be either two " | ||
| 90 | "(saves memory, makes timing tighter) or three."); | ||
| 91 | |||
| 92 | static int dma_buf_size = VGA_WIDTH * VGA_HEIGHT * 2; /* Worst case */ | ||
| 93 | module_param(dma_buf_size, uint, 0444); | ||
| 94 | MODULE_PARM_DESC(dma_buf_size, | ||
| 95 | "The size of the allocated DMA buffers. If actual operating " | ||
| 96 | "parameters require larger buffers, an attempt to reallocate " | ||
| 97 | "will be made."); | ||
| 98 | |||
| 99 | static int min_buffers = 1; | ||
| 100 | module_param(min_buffers, uint, 0644); | ||
| 101 | MODULE_PARM_DESC(min_buffers, | ||
| 102 | "The minimum number of streaming I/O buffers we are willing " | ||
| 103 | "to work with."); | ||
| 104 | |||
| 105 | static int max_buffers = 10; | ||
| 106 | module_param(max_buffers, uint, 0644); | ||
| 107 | MODULE_PARM_DESC(max_buffers, | ||
| 108 | "The maximum number of streaming I/O buffers an application " | ||
| 109 | "will be allowed to allocate. These buffers are big and live " | ||
| 110 | "in vmalloc space."); | ||
| 111 | |||
| 112 | static int flip; | ||
| 113 | module_param(flip, bool, 0444); | ||
| 114 | MODULE_PARM_DESC(flip, | ||
| 115 | "If set, the sensor will be instructed to flip the image " | ||
| 116 | "vertically."); | ||
| 117 | |||
| 118 | |||
| 119 | enum cafe_state { | ||
| 120 | S_NOTREADY, /* Not yet initialized */ | ||
| 121 | S_IDLE, /* Just hanging around */ | ||
| 122 | S_FLAKED, /* Some sort of problem */ | ||
| 123 | S_SINGLEREAD, /* In read() */ | ||
| 124 | S_SPECREAD, /* Speculative read (for future read()) */ | ||
| 125 | S_STREAMING /* Streaming data */ | ||
| 126 | }; | ||
| 127 | |||
| 128 | /* | ||
| 129 | * Tracking of streaming I/O buffers. | ||
| 130 | */ | ||
| 131 | struct cafe_sio_buffer { | ||
| 132 | struct list_head list; | ||
| 133 | struct v4l2_buffer v4lbuf; | ||
| 134 | char *buffer; /* Where it lives in kernel space */ | ||
| 135 | int mapcount; | ||
| 136 | struct cafe_camera *cam; | ||
| 137 | }; | ||
| 138 | |||
| 139 | /* | ||
| 140 | * A description of one of our devices. | ||
| 141 | * Locking: controlled by s_mutex. Certain fields, however, require | ||
| 142 | * the dev_lock spinlock; they are marked as such by comments. | ||
| 143 | * dev_lock is also required for access to device registers. | ||
| 144 | */ | ||
| 145 | struct cafe_camera | ||
| 146 | { | ||
| 147 | struct v4l2_device v4l2_dev; | ||
| 148 | enum cafe_state state; | ||
| 149 | unsigned long flags; /* Buffer status, mainly (dev_lock) */ | ||
| 150 | int users; /* How many open FDs */ | ||
| 151 | struct file *owner; /* Who has data access (v4l2) */ | ||
| 152 | |||
| 153 | /* | ||
| 154 | * Subsystem structures. | ||
| 155 | */ | ||
| 156 | struct pci_dev *pdev; | ||
| 157 | struct video_device vdev; | ||
| 158 | struct i2c_adapter i2c_adapter; | ||
| 159 | struct v4l2_subdev *sensor; | ||
| 160 | unsigned short sensor_addr; | ||
| 161 | |||
| 162 | unsigned char __iomem *regs; | ||
| 163 | struct list_head dev_list; /* link to other devices */ | ||
| 164 | |||
| 165 | /* DMA buffers */ | ||
| 166 | unsigned int nbufs; /* How many are alloc'd */ | ||
| 167 | int next_buf; /* Next to consume (dev_lock) */ | ||
| 168 | unsigned int dma_buf_size; /* allocated size */ | ||
| 169 | void *dma_bufs[MAX_DMA_BUFS]; /* Internal buffer addresses */ | ||
| 170 | dma_addr_t dma_handles[MAX_DMA_BUFS]; /* Buffer bus addresses */ | ||
| 171 | unsigned int specframes; /* Unconsumed spec frames (dev_lock) */ | ||
| 172 | unsigned int sequence; /* Frame sequence number */ | ||
| 173 | unsigned int buf_seq[MAX_DMA_BUFS]; /* Sequence for individual buffers */ | ||
| 174 | |||
| 175 | /* Streaming buffers */ | ||
| 176 | unsigned int n_sbufs; /* How many we have */ | ||
| 177 | struct cafe_sio_buffer *sb_bufs; /* The array of housekeeping structs */ | ||
| 178 | struct list_head sb_avail; /* Available for data (we own) (dev_lock) */ | ||
| 179 | struct list_head sb_full; /* With data (user space owns) (dev_lock) */ | ||
| 180 | struct tasklet_struct s_tasklet; | ||
| 181 | |||
| 182 | /* Current operating parameters */ | ||
| 183 | u32 sensor_type; /* Currently ov7670 only */ | ||
| 184 | struct v4l2_pix_format pix_format; | ||
| 185 | enum v4l2_mbus_pixelcode mbus_code; | ||
| 186 | |||
| 187 | /* Locks */ | ||
| 188 | struct mutex s_mutex; /* Access to this structure */ | ||
| 189 | spinlock_t dev_lock; /* Access to device */ | ||
| 190 | |||
| 191 | /* Misc */ | ||
| 192 | wait_queue_head_t smbus_wait; /* Waiting on i2c events */ | ||
| 193 | wait_queue_head_t iowait; /* Waiting on frame data */ | ||
| 194 | }; | ||
| 195 | |||
| 196 | /* | ||
| 197 | * Status flags. Always manipulated with bit operations. | ||
| 198 | */ | ||
| 199 | #define CF_BUF0_VALID 0 /* Buffers valid - first three */ | ||
| 200 | #define CF_BUF1_VALID 1 | ||
| 201 | #define CF_BUF2_VALID 2 | ||
| 202 | #define CF_DMA_ACTIVE 3 /* A frame is incoming */ | ||
| 203 | #define CF_CONFIG_NEEDED 4 /* Must configure hardware */ | ||
| 204 | |||
| 205 | #define sensor_call(cam, o, f, args...) \ | ||
| 206 | v4l2_subdev_call(cam->sensor, o, f, ##args) | ||
| 207 | |||
| 208 | static inline struct cafe_camera *to_cam(struct v4l2_device *dev) | ||
| 209 | { | ||
| 210 | return container_of(dev, struct cafe_camera, v4l2_dev); | ||
| 211 | } | ||
| 212 | |||
| 213 | static struct cafe_format_struct { | ||
| 214 | __u8 *desc; | ||
| 215 | __u32 pixelformat; | ||
| 216 | int bpp; /* Bytes per pixel */ | ||
| 217 | enum v4l2_mbus_pixelcode mbus_code; | ||
| 218 | } cafe_formats[] = { | ||
| 219 | { | ||
| 220 | .desc = "YUYV 4:2:2", | ||
| 221 | .pixelformat = V4L2_PIX_FMT_YUYV, | ||
| 222 | .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8, | ||
| 223 | .bpp = 2, | ||
| 224 | }, | ||
| 225 | { | ||
| 226 | .desc = "RGB 444", | ||
| 227 | .pixelformat = V4L2_PIX_FMT_RGB444, | ||
| 228 | .mbus_code = V4L2_MBUS_FMT_RGB444_2X8_PADHI_LE, | ||
| 229 | .bpp = 2, | ||
| 230 | }, | ||
| 231 | { | ||
| 232 | .desc = "RGB 565", | ||
| 233 | .pixelformat = V4L2_PIX_FMT_RGB565, | ||
| 234 | .mbus_code = V4L2_MBUS_FMT_RGB565_2X8_LE, | ||
| 235 | .bpp = 2, | ||
| 236 | }, | ||
| 237 | { | ||
| 238 | .desc = "Raw RGB Bayer", | ||
| 239 | .pixelformat = V4L2_PIX_FMT_SBGGR8, | ||
| 240 | .mbus_code = V4L2_MBUS_FMT_SBGGR8_1X8, | ||
| 241 | .bpp = 1 | ||
| 242 | }, | ||
| 243 | }; | ||
| 244 | #define N_CAFE_FMTS ARRAY_SIZE(cafe_formats) | ||
| 245 | |||
| 246 | static struct cafe_format_struct *cafe_find_format(u32 pixelformat) | ||
| 247 | { | ||
| 248 | unsigned i; | ||
| 249 | |||
| 250 | for (i = 0; i < N_CAFE_FMTS; i++) | ||
| 251 | if (cafe_formats[i].pixelformat == pixelformat) | ||
| 252 | return cafe_formats + i; | ||
| 253 | /* Not found? Then return the first format. */ | ||
| 254 | return cafe_formats; | ||
| 255 | } | ||
| 256 | |||
| 257 | /* | ||
| 258 | * Start over with DMA buffers - dev_lock needed. | ||
| 259 | */ | ||
| 260 | static void cafe_reset_buffers(struct cafe_camera *cam) | ||
| 261 | { | ||
| 262 | int i; | ||
| 263 | |||
| 264 | cam->next_buf = -1; | ||
| 265 | for (i = 0; i < cam->nbufs; i++) | ||
| 266 | clear_bit(i, &cam->flags); | ||
| 267 | cam->specframes = 0; | ||
| 268 | } | ||
| 269 | |||
| 270 | static inline int cafe_needs_config(struct cafe_camera *cam) | ||
| 271 | { | ||
| 272 | return test_bit(CF_CONFIG_NEEDED, &cam->flags); | ||
| 273 | } | ||
| 274 | |||
| 275 | static void cafe_set_config_needed(struct cafe_camera *cam, int needed) | ||
| 276 | { | ||
| 277 | if (needed) | ||
| 278 | set_bit(CF_CONFIG_NEEDED, &cam->flags); | ||
| 279 | else | ||
| 280 | clear_bit(CF_CONFIG_NEEDED, &cam->flags); | ||
| 281 | } | ||
| 282 | |||
| 283 | |||
| 284 | |||
| 285 | |||
| 286 | /* | ||
| 287 | * Debugging and related. | ||
| 288 | */ | ||
| 289 | #define cam_err(cam, fmt, arg...) \ | ||
| 290 | dev_err(&(cam)->pdev->dev, fmt, ##arg); | ||
| 291 | #define cam_warn(cam, fmt, arg...) \ | ||
| 292 | dev_warn(&(cam)->pdev->dev, fmt, ##arg); | ||
| 293 | #define cam_dbg(cam, fmt, arg...) \ | ||
| 294 | dev_dbg(&(cam)->pdev->dev, fmt, ##arg); | ||
| 295 | |||
| 296 | |||
| 297 | /* ---------------------------------------------------------------------*/ | ||
| 298 | |||
| 299 | /* | ||
| 300 | * Device register I/O | ||
| 301 | */ | ||
| 302 | static inline void cafe_reg_write(struct cafe_camera *cam, unsigned int reg, | ||
| 303 | unsigned int val) | ||
| 304 | { | ||
| 305 | iowrite32(val, cam->regs + reg); | ||
| 306 | } | ||
| 307 | |||
| 308 | static inline unsigned int cafe_reg_read(struct cafe_camera *cam, | ||
| 309 | unsigned int reg) | ||
| 310 | { | ||
| 311 | return ioread32(cam->regs + reg); | ||
| 312 | } | ||
| 313 | |||
| 314 | |||
| 315 | static inline void cafe_reg_write_mask(struct cafe_camera *cam, unsigned int reg, | ||
| 316 | unsigned int val, unsigned int mask) | ||
| 317 | { | ||
| 318 | unsigned int v = cafe_reg_read(cam, reg); | ||
| 319 | |||
| 320 | v = (v & ~mask) | (val & mask); | ||
| 321 | cafe_reg_write(cam, reg, v); | ||
| 322 | } | ||
| 323 | |||
| 324 | static inline void cafe_reg_clear_bit(struct cafe_camera *cam, | ||
| 325 | unsigned int reg, unsigned int val) | ||
| 326 | { | ||
| 327 | cafe_reg_write_mask(cam, reg, 0, val); | ||
| 328 | } | ||
| 329 | |||
| 330 | static inline void cafe_reg_set_bit(struct cafe_camera *cam, | ||
| 331 | unsigned int reg, unsigned int val) | ||
| 332 | { | ||
| 333 | cafe_reg_write_mask(cam, reg, val, val); | ||
| 334 | } | ||
| 335 | |||
| 336 | |||
| 337 | |||
| 338 | /* -------------------------------------------------------------------- */ | ||
| 339 | /* | ||
| 340 | * The I2C/SMBUS interface to the camera itself starts here. The | ||
| 341 | * controller handles SMBUS itself, presenting a relatively simple register | ||
| 342 | * interface; all we have to do is to tell it where to route the data. | ||
| 343 | */ | ||
| 344 | #define CAFE_SMBUS_TIMEOUT (HZ) /* generous */ | ||
| 345 | |||
| 346 | static int cafe_smbus_write_done(struct cafe_camera *cam) | ||
| 347 | { | ||
| 348 | unsigned long flags; | ||
| 349 | int c1; | ||
| 350 | |||
| 351 | /* | ||
| 352 | * We must delay after the interrupt, or the controller gets confused | ||
| 353 | * and never does give us good status. Fortunately, we don't do this | ||
| 354 | * often. | ||
| 355 | */ | ||
| 356 | udelay(20); | ||
| 357 | spin_lock_irqsave(&cam->dev_lock, flags); | ||
| 358 | c1 = cafe_reg_read(cam, REG_TWSIC1); | ||
| 359 | spin_unlock_irqrestore(&cam->dev_lock, flags); | ||
| 360 | return (c1 & (TWSIC1_WSTAT|TWSIC1_ERROR)) != TWSIC1_WSTAT; | ||
| 361 | } | ||
| 362 | |||
| 363 | static int cafe_smbus_write_data(struct cafe_camera *cam, | ||
| 364 | u16 addr, u8 command, u8 value) | ||
| 365 | { | ||
| 366 | unsigned int rval; | ||
| 367 | unsigned long flags; | ||
| 368 | |||
| 369 | spin_lock_irqsave(&cam->dev_lock, flags); | ||
| 370 | rval = TWSIC0_EN | ((addr << TWSIC0_SID_SHIFT) & TWSIC0_SID); | ||
| 371 | rval |= TWSIC0_OVMAGIC; /* Make OV sensors work */ | ||
| 372 | /* | ||
| 373 | * Marvell sez set clkdiv to all 1's for now. | ||
| 374 | */ | ||
| 375 | rval |= TWSIC0_CLKDIV; | ||
| 376 | cafe_reg_write(cam, REG_TWSIC0, rval); | ||
| 377 | (void) cafe_reg_read(cam, REG_TWSIC1); /* force write */ | ||
| 378 | rval = value | ((command << TWSIC1_ADDR_SHIFT) & TWSIC1_ADDR); | ||
| 379 | cafe_reg_write(cam, REG_TWSIC1, rval); | ||
| 380 | spin_unlock_irqrestore(&cam->dev_lock, flags); | ||
| 381 | |||
| 382 | /* Unfortunately, reading TWSIC1 too soon after sending a command | ||
| 383 | * causes the device to die. | ||
| 384 | * Use a busy-wait because we often send a large quantity of small | ||
| 385 | * commands at-once; using msleep() would cause a lot of context | ||
| 386 | * switches which take longer than 2ms, resulting in a noticeable | ||
| 387 | * boot-time and capture-start delays. | ||
| 388 | */ | ||
| 389 | mdelay(2); | ||
| 390 | |||
| 391 | /* | ||
| 392 | * Another sad fact is that sometimes, commands silently complete but | ||
| 393 | * cafe_smbus_write_done() never becomes aware of this. | ||
| 394 | * This happens at random and appears to possible occur with any | ||
| 395 | * command. | ||
| 396 | * We don't understand why this is. We work around this issue | ||
| 397 | * with the timeout in the wait below, assuming that all commands | ||
| 398 | * complete within the timeout. | ||
| 399 | */ | ||
| 400 | wait_event_timeout(cam->smbus_wait, cafe_smbus_write_done(cam), | ||
| 401 | CAFE_SMBUS_TIMEOUT); | ||
| 402 | |||
| 403 | spin_lock_irqsave(&cam->dev_lock, flags); | ||
| 404 | rval = cafe_reg_read(cam, REG_TWSIC1); | ||
| 405 | spin_unlock_irqrestore(&cam->dev_lock, flags); | ||
| 406 | |||
| 407 | if (rval & TWSIC1_WSTAT) { | ||
| 408 | cam_err(cam, "SMBUS write (%02x/%02x/%02x) timed out\n", addr, | ||
| 409 | command, value); | ||
| 410 | return -EIO; | ||
| 411 | } | ||
| 412 | if (rval & TWSIC1_ERROR) { | ||
| 413 | cam_err(cam, "SMBUS write (%02x/%02x/%02x) error\n", addr, | ||
| 414 | command, value); | ||
| 415 | return -EIO; | ||
| 416 | } | ||
| 417 | return 0; | ||
| 418 | } | ||
| 419 | |||
| 420 | |||
| 421 | |||
| 422 | static int cafe_smbus_read_done(struct cafe_camera *cam) | ||
| 423 | { | ||
| 424 | unsigned long flags; | ||
| 425 | int c1; | ||
| 426 | |||
| 427 | /* | ||
| 428 | * We must delay after the interrupt, or the controller gets confused | ||
| 429 | * and never does give us good status. Fortunately, we don't do this | ||
| 430 | * often. | ||
| 431 | */ | ||
| 432 | udelay(20); | ||
| 433 | spin_lock_irqsave(&cam->dev_lock, flags); | ||
| 434 | c1 = cafe_reg_read(cam, REG_TWSIC1); | ||
| 435 | spin_unlock_irqrestore(&cam->dev_lock, flags); | ||
| 436 | return c1 & (TWSIC1_RVALID|TWSIC1_ERROR); | ||
| 437 | } | ||
| 438 | |||
| 439 | |||
| 440 | |||
| 441 | static int cafe_smbus_read_data(struct cafe_camera *cam, | ||
| 442 | u16 addr, u8 command, u8 *value) | ||
| 443 | { | ||
| 444 | unsigned int rval; | ||
| 445 | unsigned long flags; | ||
| 446 | |||
| 447 | spin_lock_irqsave(&cam->dev_lock, flags); | ||
| 448 | rval = TWSIC0_EN | ((addr << TWSIC0_SID_SHIFT) & TWSIC0_SID); | ||
| 449 | rval |= TWSIC0_OVMAGIC; /* Make OV sensors work */ | ||
| 450 | /* | ||
| 451 | * Marvel sez set clkdiv to all 1's for now. | ||
| 452 | */ | ||
| 453 | rval |= TWSIC0_CLKDIV; | ||
| 454 | cafe_reg_write(cam, REG_TWSIC0, rval); | ||
| 455 | (void) cafe_reg_read(cam, REG_TWSIC1); /* force write */ | ||
| 456 | rval = TWSIC1_READ | ((command << TWSIC1_ADDR_SHIFT) & TWSIC1_ADDR); | ||
| 457 | cafe_reg_write(cam, REG_TWSIC1, rval); | ||
| 458 | spin_unlock_irqrestore(&cam->dev_lock, flags); | ||
| 459 | |||
| 460 | wait_event_timeout(cam->smbus_wait, | ||
| 461 | cafe_smbus_read_done(cam), CAFE_SMBUS_TIMEOUT); | ||
| 462 | spin_lock_irqsave(&cam->dev_lock, flags); | ||
| 463 | rval = cafe_reg_read(cam, REG_TWSIC1); | ||
| 464 | spin_unlock_irqrestore(&cam->dev_lock, flags); | ||
| 465 | |||
| 466 | if (rval & TWSIC1_ERROR) { | ||
| 467 | cam_err(cam, "SMBUS read (%02x/%02x) error\n", addr, command); | ||
| 468 | return -EIO; | ||
| 469 | } | ||
| 470 | if (! (rval & TWSIC1_RVALID)) { | ||
| 471 | cam_err(cam, "SMBUS read (%02x/%02x) timed out\n", addr, | ||
| 472 | command); | ||
| 473 | return -EIO; | ||
| 474 | } | ||
| 475 | *value = rval & 0xff; | ||
| 476 | return 0; | ||
| 477 | } | ||
| 478 | |||
| 479 | /* | ||
| 480 | * Perform a transfer over SMBUS. This thing is called under | ||
| 481 | * the i2c bus lock, so we shouldn't race with ourselves... | ||
| 482 | */ | ||
| 483 | static int cafe_smbus_xfer(struct i2c_adapter *adapter, u16 addr, | ||
| 484 | unsigned short flags, char rw, u8 command, | ||
| 485 | int size, union i2c_smbus_data *data) | ||
| 486 | { | ||
| 487 | struct v4l2_device *v4l2_dev = i2c_get_adapdata(adapter); | ||
| 488 | struct cafe_camera *cam = to_cam(v4l2_dev); | ||
| 489 | int ret = -EINVAL; | ||
| 490 | |||
| 491 | /* | ||
| 492 | * This interface would appear to only do byte data ops. OK | ||
| 493 | * it can do word too, but the cam chip has no use for that. | ||
| 494 | */ | ||
| 495 | if (size != I2C_SMBUS_BYTE_DATA) { | ||
| 496 | cam_err(cam, "funky xfer size %d\n", size); | ||
| 497 | return -EINVAL; | ||
| 498 | } | ||
| 499 | |||
| 500 | if (rw == I2C_SMBUS_WRITE) | ||
| 501 | ret = cafe_smbus_write_data(cam, addr, command, data->byte); | ||
| 502 | else if (rw == I2C_SMBUS_READ) | ||
| 503 | ret = cafe_smbus_read_data(cam, addr, command, &data->byte); | ||
| 504 | return ret; | ||
| 505 | } | ||
| 506 | |||
| 507 | |||
| 508 | static void cafe_smbus_enable_irq(struct cafe_camera *cam) | ||
| 509 | { | ||
| 510 | unsigned long flags; | ||
| 511 | |||
| 512 | spin_lock_irqsave(&cam->dev_lock, flags); | ||
| 513 | cafe_reg_set_bit(cam, REG_IRQMASK, TWSIIRQS); | ||
| 514 | spin_unlock_irqrestore(&cam->dev_lock, flags); | ||
| 515 | } | ||
| 516 | |||
| 517 | static u32 cafe_smbus_func(struct i2c_adapter *adapter) | ||
| 518 | { | ||
| 519 | return I2C_FUNC_SMBUS_READ_BYTE_DATA | | ||
| 520 | I2C_FUNC_SMBUS_WRITE_BYTE_DATA; | ||
| 521 | } | ||
| 522 | |||
| 523 | static struct i2c_algorithm cafe_smbus_algo = { | ||
| 524 | .smbus_xfer = cafe_smbus_xfer, | ||
| 525 | .functionality = cafe_smbus_func | ||
| 526 | }; | ||
| 527 | |||
| 528 | /* Somebody is on the bus */ | ||
| 529 | static void cafe_ctlr_stop_dma(struct cafe_camera *cam); | ||
| 530 | static void cafe_ctlr_power_down(struct cafe_camera *cam); | ||
| 531 | |||
| 532 | static int cafe_smbus_setup(struct cafe_camera *cam) | ||
| 533 | { | ||
| 534 | struct i2c_adapter *adap = &cam->i2c_adapter; | ||
| 535 | int ret; | ||
| 536 | |||
| 537 | cafe_smbus_enable_irq(cam); | ||
| 538 | adap->owner = THIS_MODULE; | ||
| 539 | adap->algo = &cafe_smbus_algo; | ||
| 540 | strcpy(adap->name, "cafe_ccic"); | ||
| 541 | adap->dev.parent = &cam->pdev->dev; | ||
| 542 | i2c_set_adapdata(adap, &cam->v4l2_dev); | ||
| 543 | ret = i2c_add_adapter(adap); | ||
| 544 | if (ret) | ||
| 545 | printk(KERN_ERR "Unable to register cafe i2c adapter\n"); | ||
| 546 | return ret; | ||
| 547 | } | ||
| 548 | |||
| 549 | static void cafe_smbus_shutdown(struct cafe_camera *cam) | ||
| 550 | { | ||
| 551 | i2c_del_adapter(&cam->i2c_adapter); | ||
| 552 | } | ||
| 553 | |||
| 554 | |||
| 555 | /* ------------------------------------------------------------------- */ | ||
| 556 | /* | ||
| 557 | * Deal with the controller. | ||
| 558 | */ | ||
| 559 | |||
| 560 | /* | ||
| 561 | * Do everything we think we need to have the interface operating | ||
| 562 | * according to the desired format. | ||
| 563 | */ | ||
| 564 | static void cafe_ctlr_dma(struct cafe_camera *cam) | ||
| 565 | { | ||
| 566 | /* | ||
| 567 | * Store the first two Y buffers (we aren't supporting | ||
| 568 | * planar formats for now, so no UV bufs). Then either | ||
| 569 | * set the third if it exists, or tell the controller | ||
| 570 | * to just use two. | ||
| 571 | */ | ||
| 572 | cafe_reg_write(cam, REG_Y0BAR, cam->dma_handles[0]); | ||
| 573 | cafe_reg_write(cam, REG_Y1BAR, cam->dma_handles[1]); | ||
| 574 | if (cam->nbufs > 2) { | ||
| 575 | cafe_reg_write(cam, REG_Y2BAR, cam->dma_handles[2]); | ||
| 576 | cafe_reg_clear_bit(cam, REG_CTRL1, C1_TWOBUFS); | ||
| 577 | } | ||
| 578 | else | ||
| 579 | cafe_reg_set_bit(cam, REG_CTRL1, C1_TWOBUFS); | ||
| 580 | cafe_reg_write(cam, REG_UBAR, 0); /* 32 bits only for now */ | ||
| 581 | } | ||
| 582 | |||
| 583 | static void cafe_ctlr_image(struct cafe_camera *cam) | ||
| 584 | { | ||
| 585 | int imgsz; | ||
| 586 | struct v4l2_pix_format *fmt = &cam->pix_format; | ||
| 587 | |||
| 588 | imgsz = ((fmt->height << IMGSZ_V_SHIFT) & IMGSZ_V_MASK) | | ||
| 589 | (fmt->bytesperline & IMGSZ_H_MASK); | ||
| 590 | cafe_reg_write(cam, REG_IMGSIZE, imgsz); | ||
| 591 | cafe_reg_write(cam, REG_IMGOFFSET, 0); | ||
| 592 | /* YPITCH just drops the last two bits */ | ||
| 593 | cafe_reg_write_mask(cam, REG_IMGPITCH, fmt->bytesperline, | ||
| 594 | IMGP_YP_MASK); | ||
| 595 | /* | ||
| 596 | * Tell the controller about the image format we are using. | ||
| 597 | */ | ||
| 598 | switch (cam->pix_format.pixelformat) { | ||
| 599 | case V4L2_PIX_FMT_YUYV: | ||
| 600 | cafe_reg_write_mask(cam, REG_CTRL0, | ||
| 601 | C0_DF_YUV|C0_YUV_PACKED|C0_YUVE_YUYV, | ||
| 602 | C0_DF_MASK); | ||
| 603 | break; | ||
| 604 | |||
| 605 | case V4L2_PIX_FMT_RGB444: | ||
| 606 | cafe_reg_write_mask(cam, REG_CTRL0, | ||
| 607 | C0_DF_RGB|C0_RGBF_444|C0_RGB4_XRGB, | ||
| 608 | C0_DF_MASK); | ||
| 609 | /* Alpha value? */ | ||
| 610 | break; | ||
| 611 | |||
| 612 | case V4L2_PIX_FMT_RGB565: | ||
| 613 | cafe_reg_write_mask(cam, REG_CTRL0, | ||
| 614 | C0_DF_RGB|C0_RGBF_565|C0_RGB5_BGGR, | ||
| 615 | C0_DF_MASK); | ||
| 616 | break; | ||
| 617 | |||
| 618 | default: | ||
| 619 | cam_err(cam, "Unknown format %x\n", cam->pix_format.pixelformat); | ||
| 620 | break; | ||
| 621 | } | ||
| 622 | /* | ||
| 623 | * Make sure it knows we want to use hsync/vsync. | ||
| 624 | */ | ||
| 625 | cafe_reg_write_mask(cam, REG_CTRL0, C0_SIF_HVSYNC, | ||
| 626 | C0_SIFM_MASK); | ||
| 627 | } | ||
| 628 | |||
| 629 | |||
| 630 | /* | ||
| 631 | * Configure the controller for operation; caller holds the | ||
| 632 | * device mutex. | ||
| 633 | */ | ||
| 634 | static int cafe_ctlr_configure(struct cafe_camera *cam) | ||
| 635 | { | ||
| 636 | unsigned long flags; | ||
| 637 | |||
| 638 | spin_lock_irqsave(&cam->dev_lock, flags); | ||
| 639 | cafe_ctlr_dma(cam); | ||
| 640 | cafe_ctlr_image(cam); | ||
| 641 | cafe_set_config_needed(cam, 0); | ||
| 642 | spin_unlock_irqrestore(&cam->dev_lock, flags); | ||
| 643 | return 0; | ||
| 644 | } | ||
| 645 | |||
| 646 | static void cafe_ctlr_irq_enable(struct cafe_camera *cam) | ||
| 647 | { | ||
| 648 | /* | ||
| 649 | * Clear any pending interrupts, since we do not | ||
| 650 | * expect to have I/O active prior to enabling. | ||
| 651 | */ | ||
| 652 | cafe_reg_write(cam, REG_IRQSTAT, FRAMEIRQS); | ||
| 653 | cafe_reg_set_bit(cam, REG_IRQMASK, FRAMEIRQS); | ||
| 654 | } | ||
| 655 | |||
| 656 | static void cafe_ctlr_irq_disable(struct cafe_camera *cam) | ||
| 657 | { | ||
| 658 | cafe_reg_clear_bit(cam, REG_IRQMASK, FRAMEIRQS); | ||
| 659 | } | ||
| 660 | |||
| 661 | /* | ||
| 662 | * Make the controller start grabbing images. Everything must | ||
| 663 | * be set up before doing this. | ||
| 664 | */ | ||
| 665 | static void cafe_ctlr_start(struct cafe_camera *cam) | ||
| 666 | { | ||
| 667 | /* set_bit performs a read, so no other barrier should be | ||
| 668 | needed here */ | ||
| 669 | cafe_reg_set_bit(cam, REG_CTRL0, C0_ENABLE); | ||
| 670 | } | ||
| 671 | |||
| 672 | static void cafe_ctlr_stop(struct cafe_camera *cam) | ||
| 673 | { | ||
| 674 | cafe_reg_clear_bit(cam, REG_CTRL0, C0_ENABLE); | ||
| 675 | } | ||
| 676 | |||
| 677 | static void cafe_ctlr_init(struct cafe_camera *cam) | ||
| 678 | { | ||
| 679 | unsigned long flags; | ||
| 680 | |||
| 681 | spin_lock_irqsave(&cam->dev_lock, flags); | ||
| 682 | /* | ||
| 683 | * Added magic to bring up the hardware on the B-Test board | ||
| 684 | */ | ||
| 685 | cafe_reg_write(cam, 0x3038, 0x8); | ||
| 686 | cafe_reg_write(cam, 0x315c, 0x80008); | ||
| 687 | /* | ||
| 688 | * Go through the dance needed to wake the device up. | ||
| 689 | * Note that these registers are global and shared | ||
| 690 | * with the NAND and SD devices. Interaction between the | ||
| 691 | * three still needs to be examined. | ||
| 692 | */ | ||
| 693 | cafe_reg_write(cam, REG_GL_CSR, GCSR_SRS|GCSR_MRS); /* Needed? */ | ||
| 694 | cafe_reg_write(cam, REG_GL_CSR, GCSR_SRC|GCSR_MRC); | ||
| 695 | cafe_reg_write(cam, REG_GL_CSR, GCSR_SRC|GCSR_MRS); | ||
| 696 | /* | ||
| 697 | * Here we must wait a bit for the controller to come around. | ||
| 698 | */ | ||
| 699 | spin_unlock_irqrestore(&cam->dev_lock, flags); | ||
| 700 | msleep(5); | ||
| 701 | spin_lock_irqsave(&cam->dev_lock, flags); | ||
| 702 | |||
| 703 | cafe_reg_write(cam, REG_GL_CSR, GCSR_CCIC_EN|GCSR_SRC|GCSR_MRC); | ||
| 704 | cafe_reg_set_bit(cam, REG_GL_IMASK, GIMSK_CCIC_EN); | ||
| 705 | /* | ||
| 706 | * Make sure it's not powered down. | ||
| 707 | */ | ||
| 708 | cafe_reg_clear_bit(cam, REG_CTRL1, C1_PWRDWN); | ||
| 709 | /* | ||
| 710 | * Turn off the enable bit. It sure should be off anyway, | ||
| 711 | * but it's good to be sure. | ||
| 712 | */ | ||
| 713 | cafe_reg_clear_bit(cam, REG_CTRL0, C0_ENABLE); | ||
| 714 | /* | ||
| 715 | * Mask all interrupts. | ||
| 716 | */ | ||
| 717 | cafe_reg_write(cam, REG_IRQMASK, 0); | ||
| 718 | /* | ||
| 719 | * Clock the sensor appropriately. Controller clock should | ||
| 720 | * be 48MHz, sensor "typical" value is half that. | ||
| 721 | */ | ||
| 722 | cafe_reg_write_mask(cam, REG_CLKCTRL, 2, CLK_DIV_MASK); | ||
| 723 | spin_unlock_irqrestore(&cam->dev_lock, flags); | ||
| 724 | } | ||
| 725 | |||
| 726 | |||
| 727 | /* | ||
| 728 | * Stop the controller, and don't return until we're really sure that no | ||
| 729 | * further DMA is going on. | ||
| 730 | */ | ||
| 731 | static void cafe_ctlr_stop_dma(struct cafe_camera *cam) | ||
| 732 | { | ||
| 733 | unsigned long flags; | ||
| 734 | |||
| 735 | /* | ||
| 736 | * Theory: stop the camera controller (whether it is operating | ||
| 737 | * or not). Delay briefly just in case we race with the SOF | ||
| 738 | * interrupt, then wait until no DMA is active. | ||
| 739 | */ | ||
| 740 | spin_lock_irqsave(&cam->dev_lock, flags); | ||
| 741 | cafe_ctlr_stop(cam); | ||
| 742 | spin_unlock_irqrestore(&cam->dev_lock, flags); | ||
| 743 | mdelay(1); | ||
| 744 | wait_event_timeout(cam->iowait, | ||
| 745 | !test_bit(CF_DMA_ACTIVE, &cam->flags), HZ); | ||
| 746 | if (test_bit(CF_DMA_ACTIVE, &cam->flags)) | ||
| 747 | cam_err(cam, "Timeout waiting for DMA to end\n"); | ||
| 748 | /* This would be bad news - what now? */ | ||
| 749 | spin_lock_irqsave(&cam->dev_lock, flags); | ||
| 750 | cam->state = S_IDLE; | ||
| 751 | cafe_ctlr_irq_disable(cam); | ||
| 752 | spin_unlock_irqrestore(&cam->dev_lock, flags); | ||
| 753 | } | ||
| 754 | |||
| 755 | /* | ||
| 756 | * Power up and down. | ||
| 757 | */ | ||
| 758 | static void cafe_ctlr_power_up(struct cafe_camera *cam) | ||
| 759 | { | ||
| 760 | unsigned long flags; | ||
| 761 | |||
| 762 | spin_lock_irqsave(&cam->dev_lock, flags); | ||
| 763 | cafe_reg_clear_bit(cam, REG_CTRL1, C1_PWRDWN); | ||
| 764 | /* | ||
| 765 | * Part one of the sensor dance: turn the global | ||
| 766 | * GPIO signal on. | ||
| 767 | */ | ||
| 768 | cafe_reg_write(cam, REG_GL_FCR, GFCR_GPIO_ON); | ||
| 769 | cafe_reg_write(cam, REG_GL_GPIOR, GGPIO_OUT|GGPIO_VAL); | ||
| 770 | /* | ||
| 771 | * Put the sensor into operational mode (assumes OLPC-style | ||
| 772 | * wiring). Control 0 is reset - set to 1 to operate. | ||
| 773 | * Control 1 is power down, set to 0 to operate. | ||
| 774 | */ | ||
| 775 | cafe_reg_write(cam, REG_GPR, GPR_C1EN|GPR_C0EN); /* pwr up, reset */ | ||
| 776 | /* mdelay(1); */ /* Marvell says 1ms will do it */ | ||
| 777 | cafe_reg_write(cam, REG_GPR, GPR_C1EN|GPR_C0EN|GPR_C0); | ||
| 778 | /* mdelay(1); */ /* Enough? */ | ||
| 779 | spin_unlock_irqrestore(&cam->dev_lock, flags); | ||
| 780 | msleep(5); /* Just to be sure */ | ||
| 781 | } | ||
| 782 | |||
| 783 | static void cafe_ctlr_power_down(struct cafe_camera *cam) | ||
| 784 | { | ||
| 785 | unsigned long flags; | ||
| 786 | |||
| 787 | spin_lock_irqsave(&cam->dev_lock, flags); | ||
| 788 | cafe_reg_write(cam, REG_GPR, GPR_C1EN|GPR_C0EN|GPR_C1); | ||
| 789 | cafe_reg_write(cam, REG_GL_FCR, GFCR_GPIO_ON); | ||
| 790 | cafe_reg_write(cam, REG_GL_GPIOR, GGPIO_OUT); | ||
| 791 | cafe_reg_set_bit(cam, REG_CTRL1, C1_PWRDWN); | ||
| 792 | spin_unlock_irqrestore(&cam->dev_lock, flags); | ||
| 793 | } | ||
| 794 | |||
| 795 | /* -------------------------------------------------------------------- */ | ||
| 796 | /* | ||
| 797 | * Communications with the sensor. | ||
| 798 | */ | ||
| 799 | |||
| 800 | static int __cafe_cam_reset(struct cafe_camera *cam) | ||
| 801 | { | ||
| 802 | return sensor_call(cam, core, reset, 0); | ||
| 803 | } | ||
| 804 | |||
| 805 | /* | ||
| 806 | * We have found the sensor on the i2c. Let's try to have a | ||
| 807 | * conversation. | ||
| 808 | */ | ||
| 809 | static int cafe_cam_init(struct cafe_camera *cam) | ||
| 810 | { | ||
| 811 | struct v4l2_dbg_chip_ident chip; | ||
| 812 | int ret; | ||
| 813 | |||
| 814 | mutex_lock(&cam->s_mutex); | ||
| 815 | if (cam->state != S_NOTREADY) | ||
| 816 | cam_warn(cam, "Cam init with device in funky state %d", | ||
| 817 | cam->state); | ||
| 818 | ret = __cafe_cam_reset(cam); | ||
| 819 | if (ret) | ||
| 820 | goto out; | ||
| 821 | chip.ident = V4L2_IDENT_NONE; | ||
| 822 | chip.match.type = V4L2_CHIP_MATCH_I2C_ADDR; | ||
| 823 | chip.match.addr = cam->sensor_addr; | ||
| 824 | ret = sensor_call(cam, core, g_chip_ident, &chip); | ||
| 825 | if (ret) | ||
| 826 | goto out; | ||
| 827 | cam->sensor_type = chip.ident; | ||
| 828 | if (cam->sensor_type != V4L2_IDENT_OV7670) { | ||
| 829 | cam_err(cam, "Unsupported sensor type 0x%x", cam->sensor_type); | ||
| 830 | ret = -EINVAL; | ||
| 831 | goto out; | ||
| 832 | } | ||
| 833 | /* Get/set parameters? */ | ||
| 834 | ret = 0; | ||
| 835 | cam->state = S_IDLE; | ||
| 836 | out: | ||
| 837 | cafe_ctlr_power_down(cam); | ||
| 838 | mutex_unlock(&cam->s_mutex); | ||
| 839 | return ret; | ||
| 840 | } | ||
| 841 | |||
| 842 | /* | ||
| 843 | * Configure the sensor to match the parameters we have. Caller should | ||
| 844 | * hold s_mutex | ||
| 845 | */ | ||
| 846 | static int cafe_cam_set_flip(struct cafe_camera *cam) | ||
| 847 | { | ||
| 848 | struct v4l2_control ctrl; | ||
| 849 | |||
| 850 | memset(&ctrl, 0, sizeof(ctrl)); | ||
| 851 | ctrl.id = V4L2_CID_VFLIP; | ||
| 852 | ctrl.value = flip; | ||
| 853 | return sensor_call(cam, core, s_ctrl, &ctrl); | ||
| 854 | } | ||
| 855 | |||
| 856 | |||
| 857 | static int cafe_cam_configure(struct cafe_camera *cam) | ||
| 858 | { | ||
| 859 | struct v4l2_mbus_framefmt mbus_fmt; | ||
| 860 | int ret; | ||
| 861 | |||
| 862 | v4l2_fill_mbus_format(&mbus_fmt, &cam->pix_format, cam->mbus_code); | ||
| 863 | ret = sensor_call(cam, core, init, 0); | ||
| 864 | if (ret == 0) | ||
| 865 | ret = sensor_call(cam, video, s_mbus_fmt, &mbus_fmt); | ||
| 866 | /* | ||
| 867 | * OV7670 does weird things if flip is set *before* format... | ||
| 868 | */ | ||
| 869 | ret += cafe_cam_set_flip(cam); | ||
| 870 | return ret; | ||
| 871 | } | ||
| 872 | |||
| 873 | /* -------------------------------------------------------------------- */ | ||
| 874 | /* | ||
| 875 | * DMA buffer management. These functions need s_mutex held. | ||
| 876 | */ | ||
| 877 | |||
| 878 | /* FIXME: this is inefficient as hell, since dma_alloc_coherent just | ||
| 879 | * does a get_free_pages() call, and we waste a good chunk of an orderN | ||
| 880 | * allocation. Should try to allocate the whole set in one chunk. | ||
| 881 | */ | ||
| 882 | static int cafe_alloc_dma_bufs(struct cafe_camera *cam, int loadtime) | ||
| 883 | { | ||
| 884 | int i; | ||
| 885 | |||
| 886 | cafe_set_config_needed(cam, 1); | ||
| 887 | if (loadtime) | ||
| 888 | cam->dma_buf_size = dma_buf_size; | ||
| 889 | else | ||
| 890 | cam->dma_buf_size = cam->pix_format.sizeimage; | ||
| 891 | if (n_dma_bufs > 3) | ||
| 892 | n_dma_bufs = 3; | ||
| 893 | |||
| 894 | cam->nbufs = 0; | ||
| 895 | for (i = 0; i < n_dma_bufs; i++) { | ||
| 896 | cam->dma_bufs[i] = dma_alloc_coherent(&cam->pdev->dev, | ||
| 897 | cam->dma_buf_size, cam->dma_handles + i, | ||
| 898 | GFP_KERNEL); | ||
| 899 | if (cam->dma_bufs[i] == NULL) { | ||
| 900 | cam_warn(cam, "Failed to allocate DMA buffer\n"); | ||
| 901 | break; | ||
| 902 | } | ||
| 903 | /* For debug, remove eventually */ | ||
| 904 | memset(cam->dma_bufs[i], 0xcc, cam->dma_buf_size); | ||
| 905 | (cam->nbufs)++; | ||
| 906 | } | ||
| 907 | |||
| 908 | switch (cam->nbufs) { | ||
| 909 | case 1: | ||
| 910 | dma_free_coherent(&cam->pdev->dev, cam->dma_buf_size, | ||
| 911 | cam->dma_bufs[0], cam->dma_handles[0]); | ||
| 912 | cam->nbufs = 0; | ||
| 913 | case 0: | ||
| 914 | cam_err(cam, "Insufficient DMA buffers, cannot operate\n"); | ||
| 915 | return -ENOMEM; | ||
| 916 | |||
| 917 | case 2: | ||
| 918 | if (n_dma_bufs > 2) | ||
| 919 | cam_warn(cam, "Will limp along with only 2 buffers\n"); | ||
| 920 | break; | ||
| 921 | } | ||
| 922 | return 0; | ||
| 923 | } | ||
| 924 | |||
| 925 | static void cafe_free_dma_bufs(struct cafe_camera *cam) | ||
| 926 | { | ||
| 927 | int i; | ||
| 928 | |||
| 929 | for (i = 0; i < cam->nbufs; i++) { | ||
| 930 | dma_free_coherent(&cam->pdev->dev, cam->dma_buf_size, | ||
| 931 | cam->dma_bufs[i], cam->dma_handles[i]); | ||
| 932 | cam->dma_bufs[i] = NULL; | ||
| 933 | } | ||
| 934 | cam->nbufs = 0; | ||
| 935 | } | ||
| 936 | |||
| 937 | |||
| 938 | |||
| 939 | |||
| 940 | |||
| 941 | /* ----------------------------------------------------------------------- */ | ||
| 942 | /* | ||
| 943 | * Here starts the V4L2 interface code. | ||
| 944 | */ | ||
| 945 | |||
| 946 | /* | ||
| 947 | * Read an image from the device. | ||
| 948 | */ | ||
| 949 | static ssize_t cafe_deliver_buffer(struct cafe_camera *cam, | ||
| 950 | char __user *buffer, size_t len, loff_t *pos) | ||
| 951 | { | ||
| 952 | int bufno; | ||
| 953 | unsigned long flags; | ||
| 954 | |||
| 955 | spin_lock_irqsave(&cam->dev_lock, flags); | ||
| 956 | if (cam->next_buf < 0) { | ||
| 957 | cam_err(cam, "deliver_buffer: No next buffer\n"); | ||
| 958 | spin_unlock_irqrestore(&cam->dev_lock, flags); | ||
| 959 | return -EIO; | ||
| 960 | } | ||
| 961 | bufno = cam->next_buf; | ||
| 962 | clear_bit(bufno, &cam->flags); | ||
| 963 | if (++(cam->next_buf) >= cam->nbufs) | ||
| 964 | cam->next_buf = 0; | ||
| 965 | if (! test_bit(cam->next_buf, &cam->flags)) | ||
| 966 | cam->next_buf = -1; | ||
| 967 | cam->specframes = 0; | ||
| 968 | spin_unlock_irqrestore(&cam->dev_lock, flags); | ||
| 969 | |||
| 970 | if (len > cam->pix_format.sizeimage) | ||
| 971 | len = cam->pix_format.sizeimage; | ||
| 972 | if (copy_to_user(buffer, cam->dma_bufs[bufno], len)) | ||
| 973 | return -EFAULT; | ||
| 974 | (*pos) += len; | ||
| 975 | return len; | ||
| 976 | } | ||
| 977 | |||
| 978 | /* | ||
| 979 | * Get everything ready, and start grabbing frames. | ||
| 980 | */ | ||
| 981 | static int cafe_read_setup(struct cafe_camera *cam, enum cafe_state state) | ||
| 982 | { | ||
| 983 | int ret; | ||
| 984 | unsigned long flags; | ||
| 985 | |||
| 986 | /* | ||
| 987 | * Configuration. If we still don't have DMA buffers, | ||
| 988 | * make one last, desperate attempt. | ||
| 989 | */ | ||
| 990 | if (cam->nbufs == 0) | ||
| 991 | if (cafe_alloc_dma_bufs(cam, 0)) | ||
| 992 | return -ENOMEM; | ||
| 993 | |||
| 994 | if (cafe_needs_config(cam)) { | ||
| 995 | cafe_cam_configure(cam); | ||
| 996 | ret = cafe_ctlr_configure(cam); | ||
| 997 | if (ret) | ||
| 998 | return ret; | ||
| 999 | } | ||
| 1000 | |||
| 1001 | /* | ||
| 1002 | * Turn it loose. | ||
| 1003 | */ | ||
| 1004 | spin_lock_irqsave(&cam->dev_lock, flags); | ||
| 1005 | cafe_reset_buffers(cam); | ||
| 1006 | cafe_ctlr_irq_enable(cam); | ||
| 1007 | cam->state = state; | ||
| 1008 | cafe_ctlr_start(cam); | ||
| 1009 | spin_unlock_irqrestore(&cam->dev_lock, flags); | ||
| 1010 | return 0; | ||
| 1011 | } | ||
| 1012 | |||
| 1013 | |||
| 1014 | static ssize_t cafe_v4l_read(struct file *filp, | ||
| 1015 | char __user *buffer, size_t len, loff_t *pos) | ||
| 1016 | { | ||
| 1017 | struct cafe_camera *cam = filp->private_data; | ||
| 1018 | int ret = 0; | ||
| 1019 | |||
| 1020 | /* | ||
| 1021 | * Perhaps we're in speculative read mode and already | ||
| 1022 | * have data? | ||
| 1023 | */ | ||
| 1024 | mutex_lock(&cam->s_mutex); | ||
| 1025 | if (cam->state == S_SPECREAD) { | ||
| 1026 | if (cam->next_buf >= 0) { | ||
| 1027 | ret = cafe_deliver_buffer(cam, buffer, len, pos); | ||
| 1028 | if (ret != 0) | ||
| 1029 | goto out_unlock; | ||
| 1030 | } | ||
| 1031 | } else if (cam->state == S_FLAKED || cam->state == S_NOTREADY) { | ||
| 1032 | ret = -EIO; | ||
| 1033 | goto out_unlock; | ||
| 1034 | } else if (cam->state != S_IDLE) { | ||
| 1035 | ret = -EBUSY; | ||
| 1036 | goto out_unlock; | ||
| 1037 | } | ||
| 1038 | |||
| 1039 | /* | ||
| 1040 | * v4l2: multiple processes can open the device, but only | ||
| 1041 | * one gets to grab data from it. | ||
| 1042 | */ | ||
| 1043 | if (cam->owner && cam->owner != filp) { | ||
| 1044 | ret = -EBUSY; | ||
| 1045 | goto out_unlock; | ||
| 1046 | } | ||
| 1047 | cam->owner = filp; | ||
| 1048 | |||
| 1049 | /* | ||
| 1050 | * Do setup if need be. | ||
| 1051 | */ | ||
| 1052 | if (cam->state != S_SPECREAD) { | ||
| 1053 | ret = cafe_read_setup(cam, S_SINGLEREAD); | ||
| 1054 | if (ret) | ||
| 1055 | goto out_unlock; | ||
| 1056 | } | ||
| 1057 | /* | ||
| 1058 | * Wait for something to happen. This should probably | ||
| 1059 | * be interruptible (FIXME). | ||
| 1060 | */ | ||
| 1061 | wait_event_timeout(cam->iowait, cam->next_buf >= 0, HZ); | ||
| 1062 | if (cam->next_buf < 0) { | ||
| 1063 | cam_err(cam, "read() operation timed out\n"); | ||
| 1064 | cafe_ctlr_stop_dma(cam); | ||
| 1065 | ret = -EIO; | ||
| 1066 | goto out_unlock; | ||
| 1067 | } | ||
| 1068 | /* | ||
| 1069 | * Give them their data and we should be done. | ||
| 1070 | */ | ||
| 1071 | ret = cafe_deliver_buffer(cam, buffer, len, pos); | ||
| 1072 | |||
| 1073 | out_unlock: | ||
| 1074 | mutex_unlock(&cam->s_mutex); | ||
| 1075 | return ret; | ||
| 1076 | } | ||
| 1077 | |||
| 1078 | |||
| 1079 | |||
| 1080 | |||
| 1081 | |||
| 1082 | |||
| 1083 | |||
| 1084 | |||
| 1085 | /* | ||
| 1086 | * Streaming I/O support. | ||
| 1087 | */ | ||
| 1088 | |||
| 1089 | |||
| 1090 | |||
| 1091 | static int cafe_vidioc_streamon(struct file *filp, void *priv, | ||
| 1092 | enum v4l2_buf_type type) | ||
| 1093 | { | ||
| 1094 | struct cafe_camera *cam = filp->private_data; | ||
| 1095 | int ret = -EINVAL; | ||
| 1096 | |||
| 1097 | if (type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | ||
| 1098 | goto out; | ||
| 1099 | mutex_lock(&cam->s_mutex); | ||
| 1100 | if (cam->state != S_IDLE || cam->n_sbufs == 0) | ||
| 1101 | goto out_unlock; | ||
| 1102 | |||
| 1103 | cam->sequence = 0; | ||
| 1104 | ret = cafe_read_setup(cam, S_STREAMING); | ||
| 1105 | |||
| 1106 | out_unlock: | ||
| 1107 | mutex_unlock(&cam->s_mutex); | ||
| 1108 | out: | ||
| 1109 | return ret; | ||
| 1110 | } | ||
| 1111 | |||
| 1112 | |||
| 1113 | static int cafe_vidioc_streamoff(struct file *filp, void *priv, | ||
| 1114 | enum v4l2_buf_type type) | ||
| 1115 | { | ||
| 1116 | struct cafe_camera *cam = filp->private_data; | ||
| 1117 | int ret = -EINVAL; | ||
| 1118 | |||
| 1119 | if (type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | ||
| 1120 | goto out; | ||
| 1121 | mutex_lock(&cam->s_mutex); | ||
| 1122 | if (cam->state != S_STREAMING) | ||
| 1123 | goto out_unlock; | ||
| 1124 | |||
| 1125 | cafe_ctlr_stop_dma(cam); | ||
| 1126 | ret = 0; | ||
| 1127 | |||
| 1128 | out_unlock: | ||
| 1129 | mutex_unlock(&cam->s_mutex); | ||
| 1130 | out: | ||
| 1131 | return ret; | ||
| 1132 | } | ||
| 1133 | |||
| 1134 | |||
| 1135 | |||
| 1136 | static int cafe_setup_siobuf(struct cafe_camera *cam, int index) | ||
| 1137 | { | ||
| 1138 | struct cafe_sio_buffer *buf = cam->sb_bufs + index; | ||
| 1139 | |||
| 1140 | INIT_LIST_HEAD(&buf->list); | ||
| 1141 | buf->v4lbuf.length = PAGE_ALIGN(cam->pix_format.sizeimage); | ||
| 1142 | buf->buffer = vmalloc_user(buf->v4lbuf.length); | ||
| 1143 | if (buf->buffer == NULL) | ||
| 1144 | return -ENOMEM; | ||
| 1145 | buf->mapcount = 0; | ||
| 1146 | buf->cam = cam; | ||
| 1147 | |||
| 1148 | buf->v4lbuf.index = index; | ||
| 1149 | buf->v4lbuf.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | ||
| 1150 | buf->v4lbuf.field = V4L2_FIELD_NONE; | ||
| 1151 | buf->v4lbuf.memory = V4L2_MEMORY_MMAP; | ||
| 1152 | /* | ||
| 1153 | * Offset: must be 32-bit even on a 64-bit system. videobuf-dma-sg | ||
| 1154 | * just uses the length times the index, but the spec warns | ||
| 1155 | * against doing just that - vma merging problems. So we | ||
| 1156 | * leave a gap between each pair of buffers. | ||
| 1157 | */ | ||
| 1158 | buf->v4lbuf.m.offset = 2*index*buf->v4lbuf.length; | ||
| 1159 | return 0; | ||
| 1160 | } | ||
| 1161 | |||
| 1162 | static int cafe_free_sio_buffers(struct cafe_camera *cam) | ||
| 1163 | { | ||
| 1164 | int i; | ||
| 1165 | |||
| 1166 | /* | ||
| 1167 | * If any buffers are mapped, we cannot free them at all. | ||
| 1168 | */ | ||
| 1169 | for (i = 0; i < cam->n_sbufs; i++) | ||
| 1170 | if (cam->sb_bufs[i].mapcount > 0) | ||
| 1171 | return -EBUSY; | ||
| 1172 | /* | ||
| 1173 | * OK, let's do it. | ||
| 1174 | */ | ||
| 1175 | for (i = 0; i < cam->n_sbufs; i++) | ||
| 1176 | vfree(cam->sb_bufs[i].buffer); | ||
| 1177 | cam->n_sbufs = 0; | ||
| 1178 | kfree(cam->sb_bufs); | ||
| 1179 | cam->sb_bufs = NULL; | ||
| 1180 | INIT_LIST_HEAD(&cam->sb_avail); | ||
| 1181 | INIT_LIST_HEAD(&cam->sb_full); | ||
| 1182 | return 0; | ||
| 1183 | } | ||
| 1184 | |||
| 1185 | |||
| 1186 | |||
| 1187 | static int cafe_vidioc_reqbufs(struct file *filp, void *priv, | ||
| 1188 | struct v4l2_requestbuffers *req) | ||
| 1189 | { | ||
| 1190 | struct cafe_camera *cam = filp->private_data; | ||
| 1191 | int ret = 0; /* Silence warning */ | ||
| 1192 | |||
| 1193 | /* | ||
| 1194 | * Make sure it's something we can do. User pointers could be | ||
| 1195 | * implemented without great pain, but that's not been done yet. | ||
| 1196 | */ | ||
| 1197 | if (req->memory != V4L2_MEMORY_MMAP) | ||
| 1198 | return -EINVAL; | ||
| 1199 | /* | ||
| 1200 | * If they ask for zero buffers, they really want us to stop streaming | ||
| 1201 | * (if it's happening) and free everything. Should we check owner? | ||
| 1202 | */ | ||
| 1203 | mutex_lock(&cam->s_mutex); | ||
| 1204 | if (req->count == 0) { | ||
| 1205 | if (cam->state == S_STREAMING) | ||
| 1206 | cafe_ctlr_stop_dma(cam); | ||
| 1207 | ret = cafe_free_sio_buffers (cam); | ||
| 1208 | goto out; | ||
| 1209 | } | ||
| 1210 | /* | ||
| 1211 | * Device needs to be idle and working. We *could* try to do the | ||
| 1212 | * right thing in S_SPECREAD by shutting things down, but it | ||
| 1213 | * probably doesn't matter. | ||
| 1214 | */ | ||
| 1215 | if (cam->state != S_IDLE || (cam->owner && cam->owner != filp)) { | ||
| 1216 | ret = -EBUSY; | ||
| 1217 | goto out; | ||
| 1218 | } | ||
| 1219 | cam->owner = filp; | ||
| 1220 | |||
| 1221 | if (req->count < min_buffers) | ||
| 1222 | req->count = min_buffers; | ||
| 1223 | else if (req->count > max_buffers) | ||
| 1224 | req->count = max_buffers; | ||
| 1225 | if (cam->n_sbufs > 0) { | ||
| 1226 | ret = cafe_free_sio_buffers(cam); | ||
| 1227 | if (ret) | ||
| 1228 | goto out; | ||
| 1229 | } | ||
| 1230 | |||
| 1231 | cam->sb_bufs = kzalloc(req->count*sizeof(struct cafe_sio_buffer), | ||
| 1232 | GFP_KERNEL); | ||
| 1233 | if (cam->sb_bufs == NULL) { | ||
| 1234 | ret = -ENOMEM; | ||
| 1235 | goto out; | ||
| 1236 | } | ||
| 1237 | for (cam->n_sbufs = 0; cam->n_sbufs < req->count; (cam->n_sbufs++)) { | ||
| 1238 | ret = cafe_setup_siobuf(cam, cam->n_sbufs); | ||
| 1239 | if (ret) | ||
| 1240 | break; | ||
| 1241 | } | ||
| 1242 | |||
| 1243 | if (cam->n_sbufs == 0) /* no luck at all - ret already set */ | ||
| 1244 | kfree(cam->sb_bufs); | ||
| 1245 | req->count = cam->n_sbufs; /* In case of partial success */ | ||
| 1246 | |||
| 1247 | out: | ||
| 1248 | mutex_unlock(&cam->s_mutex); | ||
| 1249 | return ret; | ||
| 1250 | } | ||
| 1251 | |||
| 1252 | |||
| 1253 | static int cafe_vidioc_querybuf(struct file *filp, void *priv, | ||
| 1254 | struct v4l2_buffer *buf) | ||
| 1255 | { | ||
| 1256 | struct cafe_camera *cam = filp->private_data; | ||
| 1257 | int ret = -EINVAL; | ||
| 1258 | |||
| 1259 | mutex_lock(&cam->s_mutex); | ||
| 1260 | if (buf->index >= cam->n_sbufs) | ||
| 1261 | goto out; | ||
| 1262 | *buf = cam->sb_bufs[buf->index].v4lbuf; | ||
| 1263 | ret = 0; | ||
| 1264 | out: | ||
| 1265 | mutex_unlock(&cam->s_mutex); | ||
| 1266 | return ret; | ||
| 1267 | } | ||
| 1268 | |||
| 1269 | static int cafe_vidioc_qbuf(struct file *filp, void *priv, | ||
| 1270 | struct v4l2_buffer *buf) | ||
| 1271 | { | ||
| 1272 | struct cafe_camera *cam = filp->private_data; | ||
| 1273 | struct cafe_sio_buffer *sbuf; | ||
| 1274 | int ret = -EINVAL; | ||
| 1275 | unsigned long flags; | ||
| 1276 | |||
| 1277 | mutex_lock(&cam->s_mutex); | ||
| 1278 | if (buf->index >= cam->n_sbufs) | ||
| 1279 | goto out; | ||
| 1280 | sbuf = cam->sb_bufs + buf->index; | ||
| 1281 | if (sbuf->v4lbuf.flags & V4L2_BUF_FLAG_QUEUED) { | ||
| 1282 | ret = 0; /* Already queued?? */ | ||
| 1283 | goto out; | ||
| 1284 | } | ||
| 1285 | if (sbuf->v4lbuf.flags & V4L2_BUF_FLAG_DONE) { | ||
| 1286 | /* Spec doesn't say anything, seems appropriate tho */ | ||
| 1287 | ret = -EBUSY; | ||
| 1288 | goto out; | ||
| 1289 | } | ||
| 1290 | sbuf->v4lbuf.flags |= V4L2_BUF_FLAG_QUEUED; | ||
| 1291 | spin_lock_irqsave(&cam->dev_lock, flags); | ||
| 1292 | list_add(&sbuf->list, &cam->sb_avail); | ||
| 1293 | spin_unlock_irqrestore(&cam->dev_lock, flags); | ||
| 1294 | ret = 0; | ||
| 1295 | out: | ||
| 1296 | mutex_unlock(&cam->s_mutex); | ||
| 1297 | return ret; | ||
| 1298 | } | ||
| 1299 | |||
| 1300 | static int cafe_vidioc_dqbuf(struct file *filp, void *priv, | ||
| 1301 | struct v4l2_buffer *buf) | ||
| 1302 | { | ||
| 1303 | struct cafe_camera *cam = filp->private_data; | ||
| 1304 | struct cafe_sio_buffer *sbuf; | ||
| 1305 | int ret = -EINVAL; | ||
| 1306 | unsigned long flags; | ||
| 1307 | |||
| 1308 | mutex_lock(&cam->s_mutex); | ||
| 1309 | if (cam->state != S_STREAMING) | ||
| 1310 | goto out_unlock; | ||
| 1311 | if (list_empty(&cam->sb_full) && filp->f_flags & O_NONBLOCK) { | ||
| 1312 | ret = -EAGAIN; | ||
| 1313 | goto out_unlock; | ||
| 1314 | } | ||
| 1315 | |||
| 1316 | while (list_empty(&cam->sb_full) && cam->state == S_STREAMING) { | ||
| 1317 | mutex_unlock(&cam->s_mutex); | ||
| 1318 | if (wait_event_interruptible(cam->iowait, | ||
| 1319 | !list_empty(&cam->sb_full))) { | ||
| 1320 | ret = -ERESTARTSYS; | ||
| 1321 | goto out; | ||
| 1322 | } | ||
| 1323 | mutex_lock(&cam->s_mutex); | ||
| 1324 | } | ||
| 1325 | |||
| 1326 | if (cam->state != S_STREAMING) | ||
| 1327 | ret = -EINTR; | ||
| 1328 | else { | ||
| 1329 | spin_lock_irqsave(&cam->dev_lock, flags); | ||
| 1330 | /* Should probably recheck !list_empty() here */ | ||
| 1331 | sbuf = list_entry(cam->sb_full.next, | ||
| 1332 | struct cafe_sio_buffer, list); | ||
| 1333 | list_del_init(&sbuf->list); | ||
| 1334 | spin_unlock_irqrestore(&cam->dev_lock, flags); | ||
| 1335 | sbuf->v4lbuf.flags &= ~V4L2_BUF_FLAG_DONE; | ||
| 1336 | *buf = sbuf->v4lbuf; | ||
| 1337 | ret = 0; | ||
| 1338 | } | ||
| 1339 | |||
| 1340 | out_unlock: | ||
| 1341 | mutex_unlock(&cam->s_mutex); | ||
| 1342 | out: | ||
| 1343 | return ret; | ||
| 1344 | } | ||
| 1345 | |||
| 1346 | |||
| 1347 | |||
| 1348 | static void cafe_v4l_vm_open(struct vm_area_struct *vma) | ||
| 1349 | { | ||
| 1350 | struct cafe_sio_buffer *sbuf = vma->vm_private_data; | ||
| 1351 | /* | ||
| 1352 | * Locking: done under mmap_sem, so we don't need to | ||
| 1353 | * go back to the camera lock here. | ||
| 1354 | */ | ||
| 1355 | sbuf->mapcount++; | ||
| 1356 | } | ||
| 1357 | |||
| 1358 | |||
| 1359 | static void cafe_v4l_vm_close(struct vm_area_struct *vma) | ||
| 1360 | { | ||
| 1361 | struct cafe_sio_buffer *sbuf = vma->vm_private_data; | ||
| 1362 | |||
| 1363 | mutex_lock(&sbuf->cam->s_mutex); | ||
| 1364 | sbuf->mapcount--; | ||
| 1365 | /* Docs say we should stop I/O too... */ | ||
| 1366 | if (sbuf->mapcount == 0) | ||
| 1367 | sbuf->v4lbuf.flags &= ~V4L2_BUF_FLAG_MAPPED; | ||
| 1368 | mutex_unlock(&sbuf->cam->s_mutex); | ||
| 1369 | } | ||
| 1370 | |||
| 1371 | static const struct vm_operations_struct cafe_v4l_vm_ops = { | ||
| 1372 | .open = cafe_v4l_vm_open, | ||
| 1373 | .close = cafe_v4l_vm_close | ||
| 1374 | }; | ||
| 1375 | |||
| 1376 | |||
| 1377 | static int cafe_v4l_mmap(struct file *filp, struct vm_area_struct *vma) | ||
| 1378 | { | ||
| 1379 | struct cafe_camera *cam = filp->private_data; | ||
| 1380 | unsigned long offset = vma->vm_pgoff << PAGE_SHIFT; | ||
| 1381 | int ret = -EINVAL; | ||
| 1382 | int i; | ||
| 1383 | struct cafe_sio_buffer *sbuf = NULL; | ||
| 1384 | |||
| 1385 | if (! (vma->vm_flags & VM_WRITE) || ! (vma->vm_flags & VM_SHARED)) | ||
| 1386 | return -EINVAL; | ||
| 1387 | /* | ||
| 1388 | * Find the buffer they are looking for. | ||
| 1389 | */ | ||
| 1390 | mutex_lock(&cam->s_mutex); | ||
| 1391 | for (i = 0; i < cam->n_sbufs; i++) | ||
| 1392 | if (cam->sb_bufs[i].v4lbuf.m.offset == offset) { | ||
| 1393 | sbuf = cam->sb_bufs + i; | ||
| 1394 | break; | ||
| 1395 | } | ||
| 1396 | if (sbuf == NULL) | ||
| 1397 | goto out; | ||
| 1398 | |||
| 1399 | ret = remap_vmalloc_range(vma, sbuf->buffer, 0); | ||
| 1400 | if (ret) | ||
| 1401 | goto out; | ||
| 1402 | vma->vm_flags |= VM_DONTEXPAND; | ||
| 1403 | vma->vm_private_data = sbuf; | ||
| 1404 | vma->vm_ops = &cafe_v4l_vm_ops; | ||
| 1405 | sbuf->v4lbuf.flags |= V4L2_BUF_FLAG_MAPPED; | ||
| 1406 | cafe_v4l_vm_open(vma); | ||
| 1407 | ret = 0; | ||
| 1408 | out: | ||
| 1409 | mutex_unlock(&cam->s_mutex); | ||
| 1410 | return ret; | ||
| 1411 | } | ||
| 1412 | |||
| 1413 | |||
| 1414 | |||
| 1415 | static int cafe_v4l_open(struct file *filp) | ||
| 1416 | { | ||
| 1417 | struct cafe_camera *cam = video_drvdata(filp); | ||
| 1418 | |||
| 1419 | filp->private_data = cam; | ||
| 1420 | |||
| 1421 | mutex_lock(&cam->s_mutex); | ||
| 1422 | if (cam->users == 0) { | ||
| 1423 | cafe_ctlr_power_up(cam); | ||
| 1424 | __cafe_cam_reset(cam); | ||
| 1425 | cafe_set_config_needed(cam, 1); | ||
| 1426 | /* FIXME make sure this is complete */ | ||
| 1427 | } | ||
| 1428 | (cam->users)++; | ||
| 1429 | mutex_unlock(&cam->s_mutex); | ||
| 1430 | return 0; | ||
| 1431 | } | ||
| 1432 | |||
| 1433 | |||
| 1434 | static int cafe_v4l_release(struct file *filp) | ||
| 1435 | { | ||
| 1436 | struct cafe_camera *cam = filp->private_data; | ||
| 1437 | |||
| 1438 | mutex_lock(&cam->s_mutex); | ||
| 1439 | (cam->users)--; | ||
| 1440 | if (filp == cam->owner) { | ||
| 1441 | cafe_ctlr_stop_dma(cam); | ||
| 1442 | cafe_free_sio_buffers(cam); | ||
| 1443 | cam->owner = NULL; | ||
| 1444 | } | ||
| 1445 | if (cam->users == 0) { | ||
| 1446 | cafe_ctlr_power_down(cam); | ||
| 1447 | if (alloc_bufs_at_read) | ||
| 1448 | cafe_free_dma_bufs(cam); | ||
| 1449 | } | ||
| 1450 | mutex_unlock(&cam->s_mutex); | ||
| 1451 | return 0; | ||
| 1452 | } | ||
| 1453 | |||
| 1454 | |||
| 1455 | |||
| 1456 | static unsigned int cafe_v4l_poll(struct file *filp, | ||
| 1457 | struct poll_table_struct *pt) | ||
| 1458 | { | ||
| 1459 | struct cafe_camera *cam = filp->private_data; | ||
| 1460 | |||
| 1461 | poll_wait(filp, &cam->iowait, pt); | ||
| 1462 | if (cam->next_buf >= 0) | ||
| 1463 | return POLLIN | POLLRDNORM; | ||
| 1464 | return 0; | ||
| 1465 | } | ||
| 1466 | |||
| 1467 | |||
| 1468 | |||
| 1469 | static int cafe_vidioc_queryctrl(struct file *filp, void *priv, | ||
| 1470 | struct v4l2_queryctrl *qc) | ||
| 1471 | { | ||
| 1472 | struct cafe_camera *cam = priv; | ||
| 1473 | int ret; | ||
| 1474 | |||
| 1475 | mutex_lock(&cam->s_mutex); | ||
| 1476 | ret = sensor_call(cam, core, queryctrl, qc); | ||
| 1477 | mutex_unlock(&cam->s_mutex); | ||
| 1478 | return ret; | ||
| 1479 | } | ||
| 1480 | |||
| 1481 | |||
| 1482 | static int cafe_vidioc_g_ctrl(struct file *filp, void *priv, | ||
| 1483 | struct v4l2_control *ctrl) | ||
| 1484 | { | ||
| 1485 | struct cafe_camera *cam = priv; | ||
| 1486 | int ret; | ||
| 1487 | |||
| 1488 | mutex_lock(&cam->s_mutex); | ||
| 1489 | ret = sensor_call(cam, core, g_ctrl, ctrl); | ||
| 1490 | mutex_unlock(&cam->s_mutex); | ||
| 1491 | return ret; | ||
| 1492 | } | ||
| 1493 | |||
| 1494 | |||
| 1495 | static int cafe_vidioc_s_ctrl(struct file *filp, void *priv, | ||
| 1496 | struct v4l2_control *ctrl) | ||
| 1497 | { | ||
| 1498 | struct cafe_camera *cam = priv; | ||
| 1499 | int ret; | ||
| 1500 | |||
| 1501 | mutex_lock(&cam->s_mutex); | ||
| 1502 | ret = sensor_call(cam, core, s_ctrl, ctrl); | ||
| 1503 | mutex_unlock(&cam->s_mutex); | ||
| 1504 | return ret; | ||
| 1505 | } | ||
| 1506 | |||
| 1507 | |||
| 1508 | |||
| 1509 | |||
| 1510 | |||
| 1511 | static int cafe_vidioc_querycap(struct file *file, void *priv, | ||
| 1512 | struct v4l2_capability *cap) | ||
| 1513 | { | ||
| 1514 | strcpy(cap->driver, "cafe_ccic"); | ||
| 1515 | strcpy(cap->card, "cafe_ccic"); | ||
| 1516 | cap->version = CAFE_VERSION; | ||
| 1517 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | | ||
| 1518 | V4L2_CAP_READWRITE | V4L2_CAP_STREAMING; | ||
| 1519 | return 0; | ||
| 1520 | } | ||
| 1521 | |||
| 1522 | |||
| 1523 | /* | ||
| 1524 | * The default format we use until somebody says otherwise. | ||
| 1525 | */ | ||
| 1526 | static const struct v4l2_pix_format cafe_def_pix_format = { | ||
| 1527 | .width = VGA_WIDTH, | ||
| 1528 | .height = VGA_HEIGHT, | ||
| 1529 | .pixelformat = V4L2_PIX_FMT_YUYV, | ||
| 1530 | .field = V4L2_FIELD_NONE, | ||
| 1531 | .bytesperline = VGA_WIDTH*2, | ||
| 1532 | .sizeimage = VGA_WIDTH*VGA_HEIGHT*2, | ||
| 1533 | }; | ||
| 1534 | |||
| 1535 | static const enum v4l2_mbus_pixelcode cafe_def_mbus_code = | ||
| 1536 | V4L2_MBUS_FMT_YUYV8_2X8; | ||
| 1537 | |||
| 1538 | static int cafe_vidioc_enum_fmt_vid_cap(struct file *filp, | ||
| 1539 | void *priv, struct v4l2_fmtdesc *fmt) | ||
| 1540 | { | ||
| 1541 | if (fmt->index >= N_CAFE_FMTS) | ||
| 1542 | return -EINVAL; | ||
| 1543 | strlcpy(fmt->description, cafe_formats[fmt->index].desc, | ||
| 1544 | sizeof(fmt->description)); | ||
| 1545 | fmt->pixelformat = cafe_formats[fmt->index].pixelformat; | ||
| 1546 | return 0; | ||
| 1547 | } | ||
| 1548 | |||
| 1549 | static int cafe_vidioc_try_fmt_vid_cap(struct file *filp, void *priv, | ||
| 1550 | struct v4l2_format *fmt) | ||
| 1551 | { | ||
| 1552 | struct cafe_camera *cam = priv; | ||
| 1553 | struct cafe_format_struct *f; | ||
| 1554 | struct v4l2_pix_format *pix = &fmt->fmt.pix; | ||
| 1555 | struct v4l2_mbus_framefmt mbus_fmt; | ||
| 1556 | int ret; | ||
| 1557 | |||
| 1558 | f = cafe_find_format(pix->pixelformat); | ||
| 1559 | pix->pixelformat = f->pixelformat; | ||
| 1560 | v4l2_fill_mbus_format(&mbus_fmt, pix, f->mbus_code); | ||
| 1561 | mutex_lock(&cam->s_mutex); | ||
| 1562 | ret = sensor_call(cam, video, try_mbus_fmt, &mbus_fmt); | ||
| 1563 | mutex_unlock(&cam->s_mutex); | ||
| 1564 | v4l2_fill_pix_format(pix, &mbus_fmt); | ||
| 1565 | pix->bytesperline = pix->width * f->bpp; | ||
| 1566 | pix->sizeimage = pix->height * pix->bytesperline; | ||
| 1567 | return ret; | ||
| 1568 | } | ||
| 1569 | |||
| 1570 | static int cafe_vidioc_s_fmt_vid_cap(struct file *filp, void *priv, | ||
| 1571 | struct v4l2_format *fmt) | ||
| 1572 | { | ||
| 1573 | struct cafe_camera *cam = priv; | ||
| 1574 | struct cafe_format_struct *f; | ||
| 1575 | int ret; | ||
| 1576 | |||
| 1577 | /* | ||
| 1578 | * Can't do anything if the device is not idle | ||
| 1579 | * Also can't if there are streaming buffers in place. | ||
| 1580 | */ | ||
| 1581 | if (cam->state != S_IDLE || cam->n_sbufs > 0) | ||
| 1582 | return -EBUSY; | ||
| 1583 | |||
| 1584 | f = cafe_find_format(fmt->fmt.pix.pixelformat); | ||
| 1585 | |||
| 1586 | /* | ||
| 1587 | * See if the formatting works in principle. | ||
| 1588 | */ | ||
| 1589 | ret = cafe_vidioc_try_fmt_vid_cap(filp, priv, fmt); | ||
| 1590 | if (ret) | ||
| 1591 | return ret; | ||
| 1592 | /* | ||
| 1593 | * Now we start to change things for real, so let's do it | ||
| 1594 | * under lock. | ||
| 1595 | */ | ||
| 1596 | mutex_lock(&cam->s_mutex); | ||
| 1597 | cam->pix_format = fmt->fmt.pix; | ||
| 1598 | cam->mbus_code = f->mbus_code; | ||
| 1599 | |||
| 1600 | /* | ||
| 1601 | * Make sure we have appropriate DMA buffers. | ||
| 1602 | */ | ||
| 1603 | ret = -ENOMEM; | ||
| 1604 | if (cam->nbufs > 0 && cam->dma_buf_size < cam->pix_format.sizeimage) | ||
| 1605 | cafe_free_dma_bufs(cam); | ||
| 1606 | if (cam->nbufs == 0) { | ||
| 1607 | if (cafe_alloc_dma_bufs(cam, 0)) | ||
| 1608 | goto out; | ||
| 1609 | } | ||
| 1610 | /* | ||
| 1611 | * It looks like this might work, so let's program the sensor. | ||
| 1612 | */ | ||
| 1613 | ret = cafe_cam_configure(cam); | ||
| 1614 | if (! ret) | ||
| 1615 | ret = cafe_ctlr_configure(cam); | ||
| 1616 | out: | ||
| 1617 | mutex_unlock(&cam->s_mutex); | ||
| 1618 | return ret; | ||
| 1619 | } | ||
| 1620 | |||
| 1621 | /* | ||
| 1622 | * Return our stored notion of how the camera is/should be configured. | ||
| 1623 | * The V4l2 spec wants us to be smarter, and actually get this from | ||
| 1624 | * the camera (and not mess with it at open time). Someday. | ||
| 1625 | */ | ||
| 1626 | static int cafe_vidioc_g_fmt_vid_cap(struct file *filp, void *priv, | ||
| 1627 | struct v4l2_format *f) | ||
| 1628 | { | ||
| 1629 | struct cafe_camera *cam = priv; | ||
| 1630 | |||
| 1631 | f->fmt.pix = cam->pix_format; | ||
| 1632 | return 0; | ||
| 1633 | } | ||
| 1634 | |||
| 1635 | /* | ||
| 1636 | * We only have one input - the sensor - so minimize the nonsense here. | ||
| 1637 | */ | ||
| 1638 | static int cafe_vidioc_enum_input(struct file *filp, void *priv, | ||
| 1639 | struct v4l2_input *input) | ||
| 1640 | { | ||
| 1641 | if (input->index != 0) | ||
| 1642 | return -EINVAL; | ||
| 1643 | |||
| 1644 | input->type = V4L2_INPUT_TYPE_CAMERA; | ||
| 1645 | input->std = V4L2_STD_ALL; /* Not sure what should go here */ | ||
| 1646 | strcpy(input->name, "Camera"); | ||
| 1647 | return 0; | ||
| 1648 | } | ||
| 1649 | |||
| 1650 | static int cafe_vidioc_g_input(struct file *filp, void *priv, unsigned int *i) | ||
| 1651 | { | ||
| 1652 | *i = 0; | ||
| 1653 | return 0; | ||
| 1654 | } | ||
| 1655 | |||
| 1656 | static int cafe_vidioc_s_input(struct file *filp, void *priv, unsigned int i) | ||
| 1657 | { | ||
| 1658 | if (i != 0) | ||
| 1659 | return -EINVAL; | ||
| 1660 | return 0; | ||
| 1661 | } | ||
| 1662 | |||
| 1663 | /* from vivi.c */ | ||
| 1664 | static int cafe_vidioc_s_std(struct file *filp, void *priv, v4l2_std_id *a) | ||
| 1665 | { | ||
| 1666 | return 0; | ||
| 1667 | } | ||
| 1668 | |||
| 1669 | /* | ||
| 1670 | * G/S_PARM. Most of this is done by the sensor, but we are | ||
| 1671 | * the level which controls the number of read buffers. | ||
| 1672 | */ | ||
| 1673 | static int cafe_vidioc_g_parm(struct file *filp, void *priv, | ||
| 1674 | struct v4l2_streamparm *parms) | ||
| 1675 | { | ||
| 1676 | struct cafe_camera *cam = priv; | ||
| 1677 | int ret; | ||
| 1678 | |||
| 1679 | mutex_lock(&cam->s_mutex); | ||
| 1680 | ret = sensor_call(cam, video, g_parm, parms); | ||
| 1681 | mutex_unlock(&cam->s_mutex); | ||
| 1682 | parms->parm.capture.readbuffers = n_dma_bufs; | ||
| 1683 | return ret; | ||
| 1684 | } | ||
| 1685 | |||
| 1686 | static int cafe_vidioc_s_parm(struct file *filp, void *priv, | ||
| 1687 | struct v4l2_streamparm *parms) | ||
| 1688 | { | ||
| 1689 | struct cafe_camera *cam = priv; | ||
| 1690 | int ret; | ||
| 1691 | |||
| 1692 | mutex_lock(&cam->s_mutex); | ||
| 1693 | ret = sensor_call(cam, video, s_parm, parms); | ||
| 1694 | mutex_unlock(&cam->s_mutex); | ||
| 1695 | parms->parm.capture.readbuffers = n_dma_bufs; | ||
| 1696 | return ret; | ||
| 1697 | } | ||
| 1698 | |||
| 1699 | static int cafe_vidioc_g_chip_ident(struct file *file, void *priv, | ||
| 1700 | struct v4l2_dbg_chip_ident *chip) | ||
| 1701 | { | ||
| 1702 | struct cafe_camera *cam = priv; | ||
| 1703 | |||
| 1704 | chip->ident = V4L2_IDENT_NONE; | ||
| 1705 | chip->revision = 0; | ||
| 1706 | if (v4l2_chip_match_host(&chip->match)) { | ||
| 1707 | chip->ident = V4L2_IDENT_CAFE; | ||
| 1708 | return 0; | ||
| 1709 | } | ||
| 1710 | return sensor_call(cam, core, g_chip_ident, chip); | ||
| 1711 | } | ||
| 1712 | |||
| 1713 | static int cafe_vidioc_enum_framesizes(struct file *filp, void *priv, | ||
| 1714 | struct v4l2_frmsizeenum *sizes) | ||
| 1715 | { | ||
| 1716 | struct cafe_camera *cam = priv; | ||
| 1717 | int ret; | ||
| 1718 | |||
| 1719 | mutex_lock(&cam->s_mutex); | ||
| 1720 | ret = sensor_call(cam, video, enum_framesizes, sizes); | ||
| 1721 | mutex_unlock(&cam->s_mutex); | ||
| 1722 | return ret; | ||
| 1723 | } | ||
| 1724 | |||
| 1725 | static int cafe_vidioc_enum_frameintervals(struct file *filp, void *priv, | ||
| 1726 | struct v4l2_frmivalenum *interval) | ||
| 1727 | { | ||
| 1728 | struct cafe_camera *cam = priv; | ||
| 1729 | int ret; | ||
| 1730 | |||
| 1731 | mutex_lock(&cam->s_mutex); | ||
| 1732 | ret = sensor_call(cam, video, enum_frameintervals, interval); | ||
| 1733 | mutex_unlock(&cam->s_mutex); | ||
| 1734 | return ret; | ||
| 1735 | } | ||
| 1736 | |||
| 1737 | #ifdef CONFIG_VIDEO_ADV_DEBUG | ||
| 1738 | static int cafe_vidioc_g_register(struct file *file, void *priv, | ||
| 1739 | struct v4l2_dbg_register *reg) | ||
| 1740 | { | ||
| 1741 | struct cafe_camera *cam = priv; | ||
| 1742 | |||
| 1743 | if (v4l2_chip_match_host(®->match)) { | ||
| 1744 | reg->val = cafe_reg_read(cam, reg->reg); | ||
| 1745 | reg->size = 4; | ||
| 1746 | return 0; | ||
| 1747 | } | ||
| 1748 | return sensor_call(cam, core, g_register, reg); | ||
| 1749 | } | ||
| 1750 | |||
| 1751 | static int cafe_vidioc_s_register(struct file *file, void *priv, | ||
| 1752 | struct v4l2_dbg_register *reg) | ||
| 1753 | { | ||
| 1754 | struct cafe_camera *cam = priv; | ||
| 1755 | |||
| 1756 | if (v4l2_chip_match_host(®->match)) { | ||
| 1757 | cafe_reg_write(cam, reg->reg, reg->val); | ||
| 1758 | return 0; | ||
| 1759 | } | ||
| 1760 | return sensor_call(cam, core, s_register, reg); | ||
| 1761 | } | ||
| 1762 | #endif | ||
| 1763 | |||
| 1764 | /* | ||
| 1765 | * This template device holds all of those v4l2 methods; we | ||
| 1766 | * clone it for specific real devices. | ||
| 1767 | */ | ||
| 1768 | |||
| 1769 | static const struct v4l2_file_operations cafe_v4l_fops = { | ||
| 1770 | .owner = THIS_MODULE, | ||
| 1771 | .open = cafe_v4l_open, | ||
| 1772 | .release = cafe_v4l_release, | ||
| 1773 | .read = cafe_v4l_read, | ||
| 1774 | .poll = cafe_v4l_poll, | ||
| 1775 | .mmap = cafe_v4l_mmap, | ||
| 1776 | .unlocked_ioctl = video_ioctl2, | ||
| 1777 | }; | ||
| 1778 | |||
| 1779 | static const struct v4l2_ioctl_ops cafe_v4l_ioctl_ops = { | ||
| 1780 | .vidioc_querycap = cafe_vidioc_querycap, | ||
| 1781 | .vidioc_enum_fmt_vid_cap = cafe_vidioc_enum_fmt_vid_cap, | ||
| 1782 | .vidioc_try_fmt_vid_cap = cafe_vidioc_try_fmt_vid_cap, | ||
| 1783 | .vidioc_s_fmt_vid_cap = cafe_vidioc_s_fmt_vid_cap, | ||
| 1784 | .vidioc_g_fmt_vid_cap = cafe_vidioc_g_fmt_vid_cap, | ||
| 1785 | .vidioc_enum_input = cafe_vidioc_enum_input, | ||
| 1786 | .vidioc_g_input = cafe_vidioc_g_input, | ||
| 1787 | .vidioc_s_input = cafe_vidioc_s_input, | ||
| 1788 | .vidioc_s_std = cafe_vidioc_s_std, | ||
| 1789 | .vidioc_reqbufs = cafe_vidioc_reqbufs, | ||
| 1790 | .vidioc_querybuf = cafe_vidioc_querybuf, | ||
| 1791 | .vidioc_qbuf = cafe_vidioc_qbuf, | ||
| 1792 | .vidioc_dqbuf = cafe_vidioc_dqbuf, | ||
| 1793 | .vidioc_streamon = cafe_vidioc_streamon, | ||
| 1794 | .vidioc_streamoff = cafe_vidioc_streamoff, | ||
| 1795 | .vidioc_queryctrl = cafe_vidioc_queryctrl, | ||
| 1796 | .vidioc_g_ctrl = cafe_vidioc_g_ctrl, | ||
| 1797 | .vidioc_s_ctrl = cafe_vidioc_s_ctrl, | ||
| 1798 | .vidioc_g_parm = cafe_vidioc_g_parm, | ||
| 1799 | .vidioc_s_parm = cafe_vidioc_s_parm, | ||
| 1800 | .vidioc_enum_framesizes = cafe_vidioc_enum_framesizes, | ||
| 1801 | .vidioc_enum_frameintervals = cafe_vidioc_enum_frameintervals, | ||
| 1802 | .vidioc_g_chip_ident = cafe_vidioc_g_chip_ident, | ||
| 1803 | #ifdef CONFIG_VIDEO_ADV_DEBUG | ||
| 1804 | .vidioc_g_register = cafe_vidioc_g_register, | ||
| 1805 | .vidioc_s_register = cafe_vidioc_s_register, | ||
| 1806 | #endif | ||
| 1807 | }; | ||
| 1808 | |||
| 1809 | static struct video_device cafe_v4l_template = { | ||
| 1810 | .name = "cafe", | ||
| 1811 | .tvnorms = V4L2_STD_NTSC_M, | ||
| 1812 | .current_norm = V4L2_STD_NTSC_M, /* make mplayer happy */ | ||
| 1813 | |||
| 1814 | .fops = &cafe_v4l_fops, | ||
| 1815 | .ioctl_ops = &cafe_v4l_ioctl_ops, | ||
| 1816 | .release = video_device_release_empty, | ||
| 1817 | }; | ||
| 1818 | |||
| 1819 | |||
| 1820 | /* ---------------------------------------------------------------------- */ | ||
| 1821 | /* | ||
| 1822 | * Interrupt handler stuff | ||
| 1823 | */ | ||
| 1824 | |||
| 1825 | |||
| 1826 | |||
| 1827 | static void cafe_frame_tasklet(unsigned long data) | ||
| 1828 | { | ||
| 1829 | struct cafe_camera *cam = (struct cafe_camera *) data; | ||
| 1830 | int i; | ||
| 1831 | unsigned long flags; | ||
| 1832 | struct cafe_sio_buffer *sbuf; | ||
| 1833 | |||
| 1834 | spin_lock_irqsave(&cam->dev_lock, flags); | ||
| 1835 | for (i = 0; i < cam->nbufs; i++) { | ||
| 1836 | int bufno = cam->next_buf; | ||
| 1837 | if (bufno < 0) { /* "will never happen" */ | ||
| 1838 | cam_err(cam, "No valid bufs in tasklet!\n"); | ||
| 1839 | break; | ||
| 1840 | } | ||
| 1841 | if (++(cam->next_buf) >= cam->nbufs) | ||
| 1842 | cam->next_buf = 0; | ||
| 1843 | if (! test_bit(bufno, &cam->flags)) | ||
| 1844 | continue; | ||
| 1845 | if (list_empty(&cam->sb_avail)) | ||
| 1846 | break; /* Leave it valid, hope for better later */ | ||
| 1847 | clear_bit(bufno, &cam->flags); | ||
| 1848 | sbuf = list_entry(cam->sb_avail.next, | ||
| 1849 | struct cafe_sio_buffer, list); | ||
| 1850 | /* | ||
| 1851 | * Drop the lock during the big copy. This *should* be safe... | ||
| 1852 | */ | ||
| 1853 | spin_unlock_irqrestore(&cam->dev_lock, flags); | ||
| 1854 | memcpy(sbuf->buffer, cam->dma_bufs[bufno], | ||
| 1855 | cam->pix_format.sizeimage); | ||
| 1856 | sbuf->v4lbuf.bytesused = cam->pix_format.sizeimage; | ||
| 1857 | sbuf->v4lbuf.sequence = cam->buf_seq[bufno]; | ||
| 1858 | sbuf->v4lbuf.flags &= ~V4L2_BUF_FLAG_QUEUED; | ||
| 1859 | sbuf->v4lbuf.flags |= V4L2_BUF_FLAG_DONE; | ||
| 1860 | spin_lock_irqsave(&cam->dev_lock, flags); | ||
| 1861 | list_move_tail(&sbuf->list, &cam->sb_full); | ||
| 1862 | } | ||
| 1863 | if (! list_empty(&cam->sb_full)) | ||
| 1864 | wake_up(&cam->iowait); | ||
| 1865 | spin_unlock_irqrestore(&cam->dev_lock, flags); | ||
| 1866 | } | ||
| 1867 | |||
| 1868 | |||
| 1869 | |||
| 1870 | static void cafe_frame_complete(struct cafe_camera *cam, int frame) | ||
| 1871 | { | ||
| 1872 | /* | ||
| 1873 | * Basic frame housekeeping. | ||
| 1874 | */ | ||
| 1875 | if (test_bit(frame, &cam->flags) && printk_ratelimit()) | ||
| 1876 | cam_err(cam, "Frame overrun on %d, frames lost\n", frame); | ||
| 1877 | set_bit(frame, &cam->flags); | ||
| 1878 | clear_bit(CF_DMA_ACTIVE, &cam->flags); | ||
| 1879 | if (cam->next_buf < 0) | ||
| 1880 | cam->next_buf = frame; | ||
| 1881 | cam->buf_seq[frame] = ++(cam->sequence); | ||
| 1882 | |||
| 1883 | switch (cam->state) { | ||
| 1884 | /* | ||
| 1885 | * If in single read mode, try going speculative. | ||
| 1886 | */ | ||
| 1887 | case S_SINGLEREAD: | ||
| 1888 | cam->state = S_SPECREAD; | ||
| 1889 | cam->specframes = 0; | ||
| 1890 | wake_up(&cam->iowait); | ||
| 1891 | break; | ||
| 1892 | |||
| 1893 | /* | ||
| 1894 | * If we are already doing speculative reads, and nobody is | ||
| 1895 | * reading them, just stop. | ||
| 1896 | */ | ||
| 1897 | case S_SPECREAD: | ||
| 1898 | if (++(cam->specframes) >= cam->nbufs) { | ||
| 1899 | cafe_ctlr_stop(cam); | ||
| 1900 | cafe_ctlr_irq_disable(cam); | ||
| 1901 | cam->state = S_IDLE; | ||
| 1902 | } | ||
| 1903 | wake_up(&cam->iowait); | ||
| 1904 | break; | ||
| 1905 | /* | ||
| 1906 | * For the streaming case, we defer the real work to the | ||
| 1907 | * camera tasklet. | ||
| 1908 | * | ||
| 1909 | * FIXME: if the application is not consuming the buffers, | ||
| 1910 | * we should eventually put things on hold and restart in | ||
| 1911 | * vidioc_dqbuf(). | ||
| 1912 | */ | ||
| 1913 | case S_STREAMING: | ||
| 1914 | tasklet_schedule(&cam->s_tasklet); | ||
| 1915 | break; | ||
| 1916 | |||
| 1917 | default: | ||
| 1918 | cam_err(cam, "Frame interrupt in non-operational state\n"); | ||
| 1919 | break; | ||
| 1920 | } | ||
| 1921 | } | ||
| 1922 | |||
| 1923 | |||
| 1924 | |||
| 1925 | |||
| 1926 | static void cafe_frame_irq(struct cafe_camera *cam, unsigned int irqs) | ||
| 1927 | { | ||
| 1928 | unsigned int frame; | ||
| 1929 | |||
| 1930 | cafe_reg_write(cam, REG_IRQSTAT, FRAMEIRQS); /* Clear'em all */ | ||
| 1931 | /* | ||
| 1932 | * Handle any frame completions. There really should | ||
| 1933 | * not be more than one of these, or we have fallen | ||
| 1934 | * far behind. | ||
| 1935 | */ | ||
| 1936 | for (frame = 0; frame < cam->nbufs; frame++) | ||
| 1937 | if (irqs & (IRQ_EOF0 << frame)) | ||
| 1938 | cafe_frame_complete(cam, frame); | ||
| 1939 | /* | ||
| 1940 | * If a frame starts, note that we have DMA active. This | ||
| 1941 | * code assumes that we won't get multiple frame interrupts | ||
| 1942 | * at once; may want to rethink that. | ||
| 1943 | */ | ||
| 1944 | if (irqs & (IRQ_SOF0 | IRQ_SOF1 | IRQ_SOF2)) | ||
| 1945 | set_bit(CF_DMA_ACTIVE, &cam->flags); | ||
| 1946 | } | ||
| 1947 | |||
| 1948 | |||
| 1949 | |||
| 1950 | static irqreturn_t cafe_irq(int irq, void *data) | ||
| 1951 | { | ||
| 1952 | struct cafe_camera *cam = data; | ||
| 1953 | unsigned int irqs; | ||
| 1954 | |||
| 1955 | spin_lock(&cam->dev_lock); | ||
| 1956 | irqs = cafe_reg_read(cam, REG_IRQSTAT); | ||
| 1957 | if ((irqs & ALLIRQS) == 0) { | ||
| 1958 | spin_unlock(&cam->dev_lock); | ||
| 1959 | return IRQ_NONE; | ||
| 1960 | } | ||
| 1961 | if (irqs & FRAMEIRQS) | ||
| 1962 | cafe_frame_irq(cam, irqs); | ||
| 1963 | if (irqs & TWSIIRQS) { | ||
| 1964 | cafe_reg_write(cam, REG_IRQSTAT, TWSIIRQS); | ||
| 1965 | wake_up(&cam->smbus_wait); | ||
| 1966 | } | ||
| 1967 | spin_unlock(&cam->dev_lock); | ||
| 1968 | return IRQ_HANDLED; | ||
| 1969 | } | ||
| 1970 | |||
| 1971 | |||
| 1972 | /* -------------------------------------------------------------------------- */ | ||
| 1973 | /* | ||
| 1974 | * PCI interface stuff. | ||
| 1975 | */ | ||
| 1976 | |||
| 1977 | static const struct dmi_system_id olpc_xo1_dmi[] = { | ||
| 1978 | { | ||
| 1979 | .matches = { | ||
| 1980 | DMI_MATCH(DMI_SYS_VENDOR, "OLPC"), | ||
| 1981 | DMI_MATCH(DMI_PRODUCT_NAME, "XO"), | ||
| 1982 | DMI_MATCH(DMI_PRODUCT_VERSION, "1"), | ||
| 1983 | }, | ||
| 1984 | }, | ||
| 1985 | { } | ||
| 1986 | }; | ||
| 1987 | |||
| 1988 | static int cafe_pci_probe(struct pci_dev *pdev, | ||
| 1989 | const struct pci_device_id *id) | ||
| 1990 | { | ||
| 1991 | int ret; | ||
| 1992 | struct cafe_camera *cam; | ||
| 1993 | struct ov7670_config sensor_cfg = { | ||
| 1994 | /* This controller only does SMBUS */ | ||
| 1995 | .use_smbus = true, | ||
| 1996 | |||
| 1997 | /* | ||
| 1998 | * Exclude QCIF mode, because it only captures a tiny portion | ||
| 1999 | * of the sensor FOV | ||
| 2000 | */ | ||
| 2001 | .min_width = 320, | ||
| 2002 | .min_height = 240, | ||
| 2003 | }; | ||
| 2004 | struct i2c_board_info ov7670_info = { | ||
| 2005 | .type = "ov7670", | ||
| 2006 | .addr = 0x42, | ||
| 2007 | .platform_data = &sensor_cfg, | ||
| 2008 | }; | ||
| 2009 | |||
| 2010 | /* | ||
| 2011 | * Start putting together one of our big camera structures. | ||
| 2012 | */ | ||
| 2013 | ret = -ENOMEM; | ||
| 2014 | cam = kzalloc(sizeof(struct cafe_camera), GFP_KERNEL); | ||
| 2015 | if (cam == NULL) | ||
| 2016 | goto out; | ||
| 2017 | ret = v4l2_device_register(&pdev->dev, &cam->v4l2_dev); | ||
| 2018 | if (ret) | ||
| 2019 | goto out_free; | ||
| 2020 | |||
| 2021 | mutex_init(&cam->s_mutex); | ||
| 2022 | spin_lock_init(&cam->dev_lock); | ||
| 2023 | cam->state = S_NOTREADY; | ||
| 2024 | cafe_set_config_needed(cam, 1); | ||
| 2025 | init_waitqueue_head(&cam->smbus_wait); | ||
| 2026 | init_waitqueue_head(&cam->iowait); | ||
| 2027 | cam->pdev = pdev; | ||
| 2028 | cam->pix_format = cafe_def_pix_format; | ||
| 2029 | cam->mbus_code = cafe_def_mbus_code; | ||
| 2030 | INIT_LIST_HEAD(&cam->dev_list); | ||
| 2031 | INIT_LIST_HEAD(&cam->sb_avail); | ||
| 2032 | INIT_LIST_HEAD(&cam->sb_full); | ||
| 2033 | tasklet_init(&cam->s_tasklet, cafe_frame_tasklet, (unsigned long) cam); | ||
| 2034 | /* | ||
| 2035 | * Get set up on the PCI bus. | ||
| 2036 | */ | ||
| 2037 | ret = pci_enable_device(pdev); | ||
| 2038 | if (ret) | ||
| 2039 | goto out_unreg; | ||
| 2040 | pci_set_master(pdev); | ||
| 2041 | |||
| 2042 | ret = -EIO; | ||
| 2043 | cam->regs = pci_iomap(pdev, 0, 0); | ||
| 2044 | if (! cam->regs) { | ||
| 2045 | printk(KERN_ERR "Unable to ioremap cafe-ccic regs\n"); | ||
| 2046 | goto out_unreg; | ||
| 2047 | } | ||
| 2048 | ret = request_irq(pdev->irq, cafe_irq, IRQF_SHARED, "cafe-ccic", cam); | ||
| 2049 | if (ret) | ||
| 2050 | goto out_iounmap; | ||
| 2051 | /* | ||
| 2052 | * Initialize the controller and leave it powered up. It will | ||
| 2053 | * stay that way until the sensor driver shows up. | ||
| 2054 | */ | ||
| 2055 | cafe_ctlr_init(cam); | ||
| 2056 | cafe_ctlr_power_up(cam); | ||
| 2057 | /* | ||
| 2058 | * Set up I2C/SMBUS communications. We have to drop the mutex here | ||
| 2059 | * because the sensor could attach in this call chain, leading to | ||
| 2060 | * unsightly deadlocks. | ||
| 2061 | */ | ||
| 2062 | ret = cafe_smbus_setup(cam); | ||
| 2063 | if (ret) | ||
| 2064 | goto out_freeirq; | ||
| 2065 | |||
| 2066 | /* Apply XO-1 clock speed */ | ||
| 2067 | if (dmi_check_system(olpc_xo1_dmi)) | ||
| 2068 | sensor_cfg.clock_speed = 45; | ||
| 2069 | |||
| 2070 | cam->sensor_addr = ov7670_info.addr; | ||
| 2071 | cam->sensor = v4l2_i2c_new_subdev_board(&cam->v4l2_dev, &cam->i2c_adapter, | ||
| 2072 | &ov7670_info, NULL); | ||
| 2073 | if (cam->sensor == NULL) { | ||
| 2074 | ret = -ENODEV; | ||
| 2075 | goto out_smbus; | ||
| 2076 | } | ||
| 2077 | |||
| 2078 | ret = cafe_cam_init(cam); | ||
| 2079 | if (ret) | ||
| 2080 | goto out_smbus; | ||
| 2081 | |||
| 2082 | /* | ||
| 2083 | * Get the v4l2 setup done. | ||
| 2084 | */ | ||
| 2085 | mutex_lock(&cam->s_mutex); | ||
| 2086 | cam->vdev = cafe_v4l_template; | ||
| 2087 | cam->vdev.debug = 0; | ||
| 2088 | /* cam->vdev.debug = V4L2_DEBUG_IOCTL_ARG;*/ | ||
| 2089 | cam->vdev.v4l2_dev = &cam->v4l2_dev; | ||
| 2090 | ret = video_register_device(&cam->vdev, VFL_TYPE_GRABBER, -1); | ||
| 2091 | if (ret) | ||
| 2092 | goto out_unlock; | ||
| 2093 | video_set_drvdata(&cam->vdev, cam); | ||
| 2094 | |||
| 2095 | /* | ||
| 2096 | * If so requested, try to get our DMA buffers now. | ||
| 2097 | */ | ||
| 2098 | if (!alloc_bufs_at_read) { | ||
| 2099 | if (cafe_alloc_dma_bufs(cam, 1)) | ||
| 2100 | cam_warn(cam, "Unable to alloc DMA buffers at load" | ||
| 2101 | " will try again later."); | ||
| 2102 | } | ||
| 2103 | |||
| 2104 | mutex_unlock(&cam->s_mutex); | ||
| 2105 | return 0; | ||
| 2106 | |||
| 2107 | out_unlock: | ||
| 2108 | mutex_unlock(&cam->s_mutex); | ||
| 2109 | out_smbus: | ||
| 2110 | cafe_smbus_shutdown(cam); | ||
| 2111 | out_freeirq: | ||
| 2112 | cafe_ctlr_power_down(cam); | ||
| 2113 | free_irq(pdev->irq, cam); | ||
| 2114 | out_iounmap: | ||
| 2115 | pci_iounmap(pdev, cam->regs); | ||
| 2116 | out_free: | ||
| 2117 | v4l2_device_unregister(&cam->v4l2_dev); | ||
| 2118 | out_unreg: | ||
| 2119 | kfree(cam); | ||
| 2120 | out: | ||
| 2121 | return ret; | ||
| 2122 | } | ||
| 2123 | |||
| 2124 | |||
| 2125 | /* | ||
| 2126 | * Shut down an initialized device | ||
| 2127 | */ | ||
| 2128 | static void cafe_shutdown(struct cafe_camera *cam) | ||
| 2129 | { | ||
| 2130 | /* FIXME: Make sure we take care of everything here */ | ||
| 2131 | if (cam->n_sbufs > 0) | ||
| 2132 | /* What if they are still mapped? Shouldn't be, but... */ | ||
| 2133 | cafe_free_sio_buffers(cam); | ||
| 2134 | cafe_ctlr_stop_dma(cam); | ||
| 2135 | cafe_ctlr_power_down(cam); | ||
| 2136 | cafe_smbus_shutdown(cam); | ||
| 2137 | cafe_free_dma_bufs(cam); | ||
| 2138 | free_irq(cam->pdev->irq, cam); | ||
| 2139 | pci_iounmap(cam->pdev, cam->regs); | ||
| 2140 | video_unregister_device(&cam->vdev); | ||
| 2141 | } | ||
| 2142 | |||
| 2143 | |||
| 2144 | static void cafe_pci_remove(struct pci_dev *pdev) | ||
| 2145 | { | ||
| 2146 | struct v4l2_device *v4l2_dev = dev_get_drvdata(&pdev->dev); | ||
| 2147 | struct cafe_camera *cam = to_cam(v4l2_dev); | ||
| 2148 | |||
| 2149 | if (cam == NULL) { | ||
| 2150 | printk(KERN_WARNING "pci_remove on unknown pdev %p\n", pdev); | ||
| 2151 | return; | ||
| 2152 | } | ||
| 2153 | mutex_lock(&cam->s_mutex); | ||
| 2154 | if (cam->users > 0) | ||
| 2155 | cam_warn(cam, "Removing a device with users!\n"); | ||
| 2156 | cafe_shutdown(cam); | ||
| 2157 | v4l2_device_unregister(&cam->v4l2_dev); | ||
| 2158 | kfree(cam); | ||
| 2159 | /* No unlock - it no longer exists */ | ||
| 2160 | } | ||
| 2161 | |||
| 2162 | |||
| 2163 | #ifdef CONFIG_PM | ||
| 2164 | /* | ||
| 2165 | * Basic power management. | ||
| 2166 | */ | ||
| 2167 | static int cafe_pci_suspend(struct pci_dev *pdev, pm_message_t state) | ||
| 2168 | { | ||
| 2169 | struct v4l2_device *v4l2_dev = dev_get_drvdata(&pdev->dev); | ||
| 2170 | struct cafe_camera *cam = to_cam(v4l2_dev); | ||
| 2171 | int ret; | ||
| 2172 | enum cafe_state cstate; | ||
| 2173 | |||
| 2174 | ret = pci_save_state(pdev); | ||
| 2175 | if (ret) | ||
| 2176 | return ret; | ||
| 2177 | cstate = cam->state; /* HACK - stop_dma sets to idle */ | ||
| 2178 | cafe_ctlr_stop_dma(cam); | ||
| 2179 | cafe_ctlr_power_down(cam); | ||
| 2180 | pci_disable_device(pdev); | ||
| 2181 | cam->state = cstate; | ||
| 2182 | return 0; | ||
| 2183 | } | ||
| 2184 | |||
| 2185 | |||
| 2186 | static int cafe_pci_resume(struct pci_dev *pdev) | ||
| 2187 | { | ||
| 2188 | struct v4l2_device *v4l2_dev = dev_get_drvdata(&pdev->dev); | ||
| 2189 | struct cafe_camera *cam = to_cam(v4l2_dev); | ||
| 2190 | int ret = 0; | ||
| 2191 | |||
| 2192 | pci_restore_state(pdev); | ||
| 2193 | ret = pci_enable_device(pdev); | ||
| 2194 | |||
| 2195 | if (ret) { | ||
| 2196 | cam_warn(cam, "Unable to re-enable device on resume!\n"); | ||
| 2197 | return ret; | ||
| 2198 | } | ||
| 2199 | cafe_ctlr_init(cam); | ||
| 2200 | |||
| 2201 | mutex_lock(&cam->s_mutex); | ||
| 2202 | if (cam->users > 0) { | ||
| 2203 | cafe_ctlr_power_up(cam); | ||
| 2204 | __cafe_cam_reset(cam); | ||
| 2205 | } else { | ||
| 2206 | cafe_ctlr_power_down(cam); | ||
| 2207 | } | ||
| 2208 | mutex_unlock(&cam->s_mutex); | ||
| 2209 | |||
| 2210 | set_bit(CF_CONFIG_NEEDED, &cam->flags); | ||
| 2211 | if (cam->state == S_SPECREAD) | ||
| 2212 | cam->state = S_IDLE; /* Don't bother restarting */ | ||
| 2213 | else if (cam->state == S_SINGLEREAD || cam->state == S_STREAMING) | ||
| 2214 | ret = cafe_read_setup(cam, cam->state); | ||
| 2215 | return ret; | ||
| 2216 | } | ||
| 2217 | |||
| 2218 | #endif /* CONFIG_PM */ | ||
| 2219 | |||
| 2220 | |||
| 2221 | static struct pci_device_id cafe_ids[] = { | ||
| 2222 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, | ||
| 2223 | PCI_DEVICE_ID_MARVELL_88ALP01_CCIC) }, | ||
| 2224 | { 0, } | ||
| 2225 | }; | ||
| 2226 | |||
| 2227 | MODULE_DEVICE_TABLE(pci, cafe_ids); | ||
| 2228 | |||
| 2229 | static struct pci_driver cafe_pci_driver = { | ||
| 2230 | .name = "cafe1000-ccic", | ||
| 2231 | .id_table = cafe_ids, | ||
| 2232 | .probe = cafe_pci_probe, | ||
| 2233 | .remove = cafe_pci_remove, | ||
| 2234 | #ifdef CONFIG_PM | ||
| 2235 | .suspend = cafe_pci_suspend, | ||
| 2236 | .resume = cafe_pci_resume, | ||
| 2237 | #endif | ||
| 2238 | }; | ||
| 2239 | |||
| 2240 | |||
| 2241 | |||
| 2242 | |||
| 2243 | static int __init cafe_init(void) | ||
| 2244 | { | ||
| 2245 | int ret; | ||
| 2246 | |||
| 2247 | printk(KERN_NOTICE "Marvell M88ALP01 'CAFE' Camera Controller version %d\n", | ||
| 2248 | CAFE_VERSION); | ||
| 2249 | ret = pci_register_driver(&cafe_pci_driver); | ||
| 2250 | if (ret) { | ||
| 2251 | printk(KERN_ERR "Unable to register cafe_ccic driver\n"); | ||
| 2252 | goto out; | ||
| 2253 | } | ||
| 2254 | ret = 0; | ||
| 2255 | |||
| 2256 | out: | ||
| 2257 | return ret; | ||
| 2258 | } | ||
| 2259 | |||
| 2260 | |||
| 2261 | static void __exit cafe_exit(void) | ||
| 2262 | { | ||
| 2263 | pci_unregister_driver(&cafe_pci_driver); | ||
| 2264 | } | ||
| 2265 | |||
| 2266 | module_init(cafe_init); | ||
| 2267 | module_exit(cafe_exit); | ||
diff --git a/drivers/media/video/cpia2/cpia2.h b/drivers/media/video/cpia2/cpia2.h index 6d6d1843791c..ab252188981b 100644 --- a/drivers/media/video/cpia2/cpia2.h +++ b/drivers/media/video/cpia2/cpia2.h | |||
| @@ -31,7 +31,6 @@ | |||
| 31 | #ifndef __CPIA2_H__ | 31 | #ifndef __CPIA2_H__ |
| 32 | #define __CPIA2_H__ | 32 | #define __CPIA2_H__ |
| 33 | 33 | ||
| 34 | #include <linux/version.h> | ||
| 35 | #include <linux/videodev2.h> | 34 | #include <linux/videodev2.h> |
| 36 | #include <media/v4l2-common.h> | 35 | #include <media/v4l2-common.h> |
| 37 | #include <linux/usb.h> | 36 | #include <linux/usb.h> |
| @@ -43,10 +42,6 @@ | |||
| 43 | /* define for verbose debug output */ | 42 | /* define for verbose debug output */ |
| 44 | //#define _CPIA2_DEBUG_ | 43 | //#define _CPIA2_DEBUG_ |
| 45 | 44 | ||
| 46 | #define CPIA2_MAJ_VER 3 | ||
| 47 | #define CPIA2_MIN_VER 0 | ||
| 48 | #define CPIA2_PATCH_VER 0 | ||
| 49 | |||
| 50 | /*** | 45 | /*** |
| 51 | * Image defines | 46 | * Image defines |
| 52 | ***/ | 47 | ***/ |
diff --git a/drivers/media/video/cpia2/cpia2_v4l.c b/drivers/media/video/cpia2/cpia2_v4l.c index 40eb6326e48a..077eb1db80a1 100644 --- a/drivers/media/video/cpia2/cpia2_v4l.c +++ b/drivers/media/video/cpia2/cpia2_v4l.c | |||
| @@ -29,8 +29,7 @@ | |||
| 29 | * Alan Cox <alan@lxorguk.ukuu.org.uk> | 29 | * Alan Cox <alan@lxorguk.ukuu.org.uk> |
| 30 | ****************************************************************************/ | 30 | ****************************************************************************/ |
| 31 | 31 | ||
| 32 | #include <linux/version.h> | 32 | #define CPIA_VERSION "3.0.1" |
| 33 | |||
| 34 | 33 | ||
| 35 | #include <linux/module.h> | 34 | #include <linux/module.h> |
| 36 | #include <linux/time.h> | 35 | #include <linux/time.h> |
| @@ -80,6 +79,7 @@ MODULE_AUTHOR("Steve Miller (STMicroelectronics) <steve.miller@st.com>"); | |||
| 80 | MODULE_DESCRIPTION("V4L-driver for STMicroelectronics CPiA2 based cameras"); | 79 | MODULE_DESCRIPTION("V4L-driver for STMicroelectronics CPiA2 based cameras"); |
| 81 | MODULE_SUPPORTED_DEVICE("video"); | 80 | MODULE_SUPPORTED_DEVICE("video"); |
| 82 | MODULE_LICENSE("GPL"); | 81 | MODULE_LICENSE("GPL"); |
| 82 | MODULE_VERSION(CPIA_VERSION); | ||
| 83 | 83 | ||
| 84 | #define ABOUT "V4L-Driver for Vision CPiA2 based cameras" | 84 | #define ABOUT "V4L-Driver for Vision CPiA2 based cameras" |
| 85 | 85 | ||
| @@ -465,9 +465,6 @@ static int cpia2_querycap(struct file *file, void *fh, struct v4l2_capability *v | |||
| 465 | if (usb_make_path(cam->dev, vc->bus_info, sizeof(vc->bus_info)) <0) | 465 | if (usb_make_path(cam->dev, vc->bus_info, sizeof(vc->bus_info)) <0) |
| 466 | memset(vc->bus_info,0, sizeof(vc->bus_info)); | 466 | memset(vc->bus_info,0, sizeof(vc->bus_info)); |
| 467 | 467 | ||
| 468 | vc->version = KERNEL_VERSION(CPIA2_MAJ_VER, CPIA2_MIN_VER, | ||
| 469 | CPIA2_PATCH_VER); | ||
| 470 | |||
| 471 | vc->capabilities = V4L2_CAP_VIDEO_CAPTURE | | 468 | vc->capabilities = V4L2_CAP_VIDEO_CAPTURE | |
| 472 | V4L2_CAP_READWRITE | | 469 | V4L2_CAP_READWRITE | |
| 473 | V4L2_CAP_STREAMING; | 470 | V4L2_CAP_STREAMING; |
| @@ -1558,8 +1555,8 @@ static void __init check_parameters(void) | |||
| 1558 | *****************************************************************************/ | 1555 | *****************************************************************************/ |
| 1559 | static int __init cpia2_init(void) | 1556 | static int __init cpia2_init(void) |
| 1560 | { | 1557 | { |
| 1561 | LOG("%s v%d.%d.%d\n", | 1558 | LOG("%s v%s\n", |
| 1562 | ABOUT, CPIA2_MAJ_VER, CPIA2_MIN_VER, CPIA2_PATCH_VER); | 1559 | ABOUT, CPIA_VERSION); |
| 1563 | check_parameters(); | 1560 | check_parameters(); |
| 1564 | cpia2_usb_init(); | 1561 | cpia2_usb_init(); |
| 1565 | return 0; | 1562 | return 0; |
| @@ -1579,4 +1576,3 @@ static void __exit cpia2_exit(void) | |||
| 1579 | 1576 | ||
| 1580 | module_init(cpia2_init); | 1577 | module_init(cpia2_init); |
| 1581 | module_exit(cpia2_exit); | 1578 | module_exit(cpia2_exit); |
| 1582 | |||
diff --git a/drivers/media/video/cx18/cx18-alsa-main.c b/drivers/media/video/cx18/cx18-alsa-main.c index d50d69da387b..a1e6c2a32478 100644 --- a/drivers/media/video/cx18/cx18-alsa-main.c +++ b/drivers/media/video/cx18/cx18-alsa-main.c | |||
| @@ -192,6 +192,7 @@ static int snd_cx18_init(struct v4l2_device *v4l2_dev) | |||
| 192 | err_exit_free: | 192 | err_exit_free: |
| 193 | if (sc != NULL) | 193 | if (sc != NULL) |
| 194 | snd_card_free(sc); | 194 | snd_card_free(sc); |
| 195 | kfree(cxsc); | ||
| 195 | err_exit: | 196 | err_exit: |
| 196 | return ret; | 197 | return ret; |
| 197 | } | 198 | } |
diff --git a/drivers/media/video/cx18/cx18-driver.h b/drivers/media/video/cx18/cx18-driver.h index 086427288de8..183420723060 100644 --- a/drivers/media/video/cx18/cx18-driver.h +++ b/drivers/media/video/cx18/cx18-driver.h | |||
| @@ -25,7 +25,6 @@ | |||
| 25 | #ifndef CX18_DRIVER_H | 25 | #ifndef CX18_DRIVER_H |
| 26 | #define CX18_DRIVER_H | 26 | #define CX18_DRIVER_H |
| 27 | 27 | ||
| 28 | #include <linux/version.h> | ||
| 29 | #include <linux/module.h> | 28 | #include <linux/module.h> |
| 30 | #include <linux/moduleparam.h> | 29 | #include <linux/moduleparam.h> |
| 31 | #include <linux/init.h> | 30 | #include <linux/init.h> |
diff --git a/drivers/media/video/cx18/cx18-ioctl.c b/drivers/media/video/cx18/cx18-ioctl.c index e80134f52ef5..afe0a29e7200 100644 --- a/drivers/media/video/cx18/cx18-ioctl.c +++ b/drivers/media/video/cx18/cx18-ioctl.c | |||
| @@ -469,7 +469,6 @@ static int cx18_querycap(struct file *file, void *fh, | |||
| 469 | strlcpy(vcap->card, cx->card_name, sizeof(vcap->card)); | 469 | strlcpy(vcap->card, cx->card_name, sizeof(vcap->card)); |
| 470 | snprintf(vcap->bus_info, sizeof(vcap->bus_info), | 470 | snprintf(vcap->bus_info, sizeof(vcap->bus_info), |
| 471 | "PCI:%s", pci_name(cx->pci_dev)); | 471 | "PCI:%s", pci_name(cx->pci_dev)); |
| 472 | vcap->version = CX18_DRIVER_VERSION; /* version */ | ||
| 473 | vcap->capabilities = cx->v4l2_cap; /* capabilities */ | 472 | vcap->capabilities = cx->v4l2_cap; /* capabilities */ |
| 474 | return 0; | 473 | return 0; |
| 475 | } | 474 | } |
diff --git a/drivers/media/video/cx18/cx18-version.h b/drivers/media/video/cx18/cx18-version.h index cd189b6bbe20..fed48b6bb67b 100644 --- a/drivers/media/video/cx18/cx18-version.h +++ b/drivers/media/video/cx18/cx18-version.h | |||
| @@ -23,12 +23,6 @@ | |||
| 23 | #define CX18_VERSION_H | 23 | #define CX18_VERSION_H |
| 24 | 24 | ||
| 25 | #define CX18_DRIVER_NAME "cx18" | 25 | #define CX18_DRIVER_NAME "cx18" |
| 26 | #define CX18_DRIVER_VERSION_MAJOR 1 | 26 | #define CX18_VERSION "1.5.1" |
| 27 | #define CX18_DRIVER_VERSION_MINOR 5 | ||
| 28 | #define CX18_DRIVER_VERSION_PATCHLEVEL 0 | ||
| 29 | |||
| 30 | #define CX18_VERSION __stringify(CX18_DRIVER_VERSION_MAJOR) "." __stringify(CX18_DRIVER_VERSION_MINOR) "." __stringify(CX18_DRIVER_VERSION_PATCHLEVEL) | ||
| 31 | #define CX18_DRIVER_VERSION KERNEL_VERSION(CX18_DRIVER_VERSION_MAJOR, \ | ||
| 32 | CX18_DRIVER_VERSION_MINOR, CX18_DRIVER_VERSION_PATCHLEVEL) | ||
| 33 | 27 | ||
| 34 | #endif | 28 | #endif |
diff --git a/drivers/media/video/cx231xx/cx231xx-avcore.c b/drivers/media/video/cx231xx/cx231xx-avcore.c index 8d7813415760..53ff26e7abf7 100644 --- a/drivers/media/video/cx231xx/cx231xx-avcore.c +++ b/drivers/media/video/cx231xx/cx231xx-avcore.c | |||
| @@ -355,6 +355,8 @@ int cx231xx_afe_update_power_control(struct cx231xx *dev, | |||
| 355 | case CX231XX_BOARD_HAUPPAUGE_EXETER: | 355 | case CX231XX_BOARD_HAUPPAUGE_EXETER: |
| 356 | case CX231XX_BOARD_HAUPPAUGE_USBLIVE2: | 356 | case CX231XX_BOARD_HAUPPAUGE_USBLIVE2: |
| 357 | case CX231XX_BOARD_PV_PLAYTV_USB_HYBRID: | 357 | case CX231XX_BOARD_PV_PLAYTV_USB_HYBRID: |
| 358 | case CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL: | ||
| 359 | case CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC: | ||
| 358 | if (avmode == POLARIS_AVMODE_ANALOGT_TV) { | 360 | if (avmode == POLARIS_AVMODE_ANALOGT_TV) { |
| 359 | while (afe_power_status != (FLD_PWRDN_TUNING_BIAS | | 361 | while (afe_power_status != (FLD_PWRDN_TUNING_BIAS | |
| 360 | FLD_PWRDN_ENABLE_PLL)) { | 362 | FLD_PWRDN_ENABLE_PLL)) { |
| @@ -1733,6 +1735,8 @@ int cx231xx_dif_set_standard(struct cx231xx *dev, u32 standard) | |||
| 1733 | break; | 1735 | break; |
| 1734 | case CX231XX_BOARD_CNXT_RDE_253S: | 1736 | case CX231XX_BOARD_CNXT_RDE_253S: |
| 1735 | case CX231XX_BOARD_CNXT_RDU_253S: | 1737 | case CX231XX_BOARD_CNXT_RDU_253S: |
| 1738 | case CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL: | ||
| 1739 | case CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC: | ||
| 1736 | func_mode = 0x01; | 1740 | func_mode = 0x01; |
| 1737 | break; | 1741 | break; |
| 1738 | default: | 1742 | default: |
diff --git a/drivers/media/video/cx231xx/cx231xx-cards.c b/drivers/media/video/cx231xx/cx231xx-cards.c index 22703815a31f..53dae2a8272d 100644 --- a/drivers/media/video/cx231xx/cx231xx-cards.c +++ b/drivers/media/video/cx231xx/cx231xx-cards.c | |||
| @@ -387,6 +387,7 @@ struct cx231xx_board cx231xx_boards[] = { | |||
| 387 | .norm = V4L2_STD_NTSC, | 387 | .norm = V4L2_STD_NTSC, |
| 388 | .no_alt_vanc = 1, | 388 | .no_alt_vanc = 1, |
| 389 | .external_av = 1, | 389 | .external_av = 1, |
| 390 | .dont_use_port_3 = 1, | ||
| 390 | .input = {{ | 391 | .input = {{ |
| 391 | .type = CX231XX_VMUX_COMPOSITE1, | 392 | .type = CX231XX_VMUX_COMPOSITE1, |
| 392 | .vmux = CX231XX_VIN_2_1, | 393 | .vmux = CX231XX_VIN_2_1, |
| @@ -532,6 +533,76 @@ struct cx231xx_board cx231xx_boards[] = { | |||
| 532 | .gpio = NULL, | 533 | .gpio = NULL, |
| 533 | } }, | 534 | } }, |
| 534 | }, | 535 | }, |
| 536 | [CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL] = { | ||
| 537 | .name = "Hauppauge WinTV USB2 FM (PAL)", | ||
| 538 | .tuner_type = TUNER_NXP_TDA18271, | ||
| 539 | .tuner_addr = 0x60, | ||
| 540 | .tuner_gpio = RDE250_XCV_TUNER, | ||
| 541 | .tuner_sif_gpio = 0x05, | ||
| 542 | .tuner_scl_gpio = 0x1a, | ||
| 543 | .tuner_sda_gpio = 0x1b, | ||
| 544 | .decoder = CX231XX_AVDECODER, | ||
| 545 | .output_mode = OUT_MODE_VIP11, | ||
| 546 | .ctl_pin_status_mask = 0xFFFFFFC4, | ||
| 547 | .agc_analog_digital_select_gpio = 0x0c, | ||
| 548 | .gpio_pin_status_mask = 0x4001000, | ||
| 549 | .tuner_i2c_master = 1, | ||
| 550 | .norm = V4L2_STD_PAL, | ||
| 551 | |||
| 552 | .input = {{ | ||
| 553 | .type = CX231XX_VMUX_TELEVISION, | ||
| 554 | .vmux = CX231XX_VIN_3_1, | ||
| 555 | .amux = CX231XX_AMUX_VIDEO, | ||
| 556 | .gpio = NULL, | ||
| 557 | }, { | ||
| 558 | .type = CX231XX_VMUX_COMPOSITE1, | ||
| 559 | .vmux = CX231XX_VIN_2_1, | ||
| 560 | .amux = CX231XX_AMUX_LINE_IN, | ||
| 561 | .gpio = NULL, | ||
| 562 | }, { | ||
| 563 | .type = CX231XX_VMUX_SVIDEO, | ||
| 564 | .vmux = CX231XX_VIN_1_1 | | ||
| 565 | (CX231XX_VIN_1_2 << 8) | | ||
| 566 | CX25840_SVIDEO_ON, | ||
| 567 | .amux = CX231XX_AMUX_LINE_IN, | ||
| 568 | .gpio = NULL, | ||
| 569 | } }, | ||
| 570 | }, | ||
| 571 | [CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC] = { | ||
| 572 | .name = "Hauppauge WinTV USB2 FM (NTSC)", | ||
| 573 | .tuner_type = TUNER_NXP_TDA18271, | ||
| 574 | .tuner_addr = 0x60, | ||
| 575 | .tuner_gpio = RDE250_XCV_TUNER, | ||
| 576 | .tuner_sif_gpio = 0x05, | ||
| 577 | .tuner_scl_gpio = 0x1a, | ||
| 578 | .tuner_sda_gpio = 0x1b, | ||
| 579 | .decoder = CX231XX_AVDECODER, | ||
| 580 | .output_mode = OUT_MODE_VIP11, | ||
| 581 | .ctl_pin_status_mask = 0xFFFFFFC4, | ||
| 582 | .agc_analog_digital_select_gpio = 0x0c, | ||
| 583 | .gpio_pin_status_mask = 0x4001000, | ||
| 584 | .tuner_i2c_master = 1, | ||
| 585 | .norm = V4L2_STD_NTSC, | ||
| 586 | |||
| 587 | .input = {{ | ||
| 588 | .type = CX231XX_VMUX_TELEVISION, | ||
| 589 | .vmux = CX231XX_VIN_3_1, | ||
| 590 | .amux = CX231XX_AMUX_VIDEO, | ||
| 591 | .gpio = NULL, | ||
| 592 | }, { | ||
| 593 | .type = CX231XX_VMUX_COMPOSITE1, | ||
| 594 | .vmux = CX231XX_VIN_2_1, | ||
| 595 | .amux = CX231XX_AMUX_LINE_IN, | ||
| 596 | .gpio = NULL, | ||
| 597 | }, { | ||
| 598 | .type = CX231XX_VMUX_SVIDEO, | ||
| 599 | .vmux = CX231XX_VIN_1_1 | | ||
| 600 | (CX231XX_VIN_1_2 << 8) | | ||
| 601 | CX25840_SVIDEO_ON, | ||
| 602 | .amux = CX231XX_AMUX_LINE_IN, | ||
| 603 | .gpio = NULL, | ||
| 604 | } }, | ||
| 605 | }, | ||
| 535 | }; | 606 | }; |
| 536 | const unsigned int cx231xx_bcount = ARRAY_SIZE(cx231xx_boards); | 607 | const unsigned int cx231xx_bcount = ARRAY_SIZE(cx231xx_boards); |
| 537 | 608 | ||
| @@ -553,6 +624,10 @@ struct usb_device_id cx231xx_id_table[] = { | |||
| 553 | .driver_info = CX231XX_BOARD_CNXT_RDE_250}, | 624 | .driver_info = CX231XX_BOARD_CNXT_RDE_250}, |
| 554 | {USB_DEVICE(0x0572, 0x58A0), | 625 | {USB_DEVICE(0x0572, 0x58A0), |
| 555 | .driver_info = CX231XX_BOARD_CNXT_RDU_250}, | 626 | .driver_info = CX231XX_BOARD_CNXT_RDU_250}, |
| 627 | {USB_DEVICE(0x2040, 0xb110), | ||
| 628 | .driver_info = CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL}, | ||
| 629 | {USB_DEVICE(0x2040, 0xb111), | ||
| 630 | .driver_info = CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC}, | ||
| 556 | {USB_DEVICE(0x2040, 0xb120), | 631 | {USB_DEVICE(0x2040, 0xb120), |
| 557 | .driver_info = CX231XX_BOARD_HAUPPAUGE_EXETER}, | 632 | .driver_info = CX231XX_BOARD_HAUPPAUGE_EXETER}, |
| 558 | {USB_DEVICE(0x2040, 0xb140), | 633 | {USB_DEVICE(0x2040, 0xb140), |
| @@ -1051,6 +1126,9 @@ static int cx231xx_usb_probe(struct usb_interface *interface, | |||
| 1051 | if (assoc_desc->bFirstInterface != ifnum) { | 1126 | if (assoc_desc->bFirstInterface != ifnum) { |
| 1052 | cx231xx_err(DRIVER_NAME ": Not found " | 1127 | cx231xx_err(DRIVER_NAME ": Not found " |
| 1053 | "matching IAD interface\n"); | 1128 | "matching IAD interface\n"); |
| 1129 | cx231xx_devused &= ~(1 << nr); | ||
| 1130 | kfree(dev); | ||
| 1131 | dev = NULL; | ||
| 1054 | return -ENODEV; | 1132 | return -ENODEV; |
| 1055 | } | 1133 | } |
| 1056 | 1134 | ||
diff --git a/drivers/media/video/cx231xx/cx231xx-core.c b/drivers/media/video/cx231xx/cx231xx-core.c index abe500feb7dd..d4457f9488ee 100644 --- a/drivers/media/video/cx231xx/cx231xx-core.c +++ b/drivers/media/video/cx231xx/cx231xx-core.c | |||
| @@ -742,6 +742,8 @@ int cx231xx_set_mode(struct cx231xx *dev, enum cx231xx_mode set_mode) | |||
| 742 | case CX231XX_BOARD_CNXT_RDU_253S: | 742 | case CX231XX_BOARD_CNXT_RDU_253S: |
| 743 | case CX231XX_BOARD_HAUPPAUGE_EXETER: | 743 | case CX231XX_BOARD_HAUPPAUGE_EXETER: |
| 744 | case CX231XX_BOARD_PV_PLAYTV_USB_HYBRID: | 744 | case CX231XX_BOARD_PV_PLAYTV_USB_HYBRID: |
| 745 | case CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL: | ||
| 746 | case CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC: | ||
| 745 | errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 0); | 747 | errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 0); |
| 746 | break; | 748 | break; |
| 747 | default: | 749 | default: |
| @@ -1381,6 +1383,8 @@ int cx231xx_dev_init(struct cx231xx *dev) | |||
| 1381 | case CX231XX_BOARD_CNXT_RDU_253S: | 1383 | case CX231XX_BOARD_CNXT_RDU_253S: |
| 1382 | case CX231XX_BOARD_HAUPPAUGE_EXETER: | 1384 | case CX231XX_BOARD_HAUPPAUGE_EXETER: |
| 1383 | case CX231XX_BOARD_PV_PLAYTV_USB_HYBRID: | 1385 | case CX231XX_BOARD_PV_PLAYTV_USB_HYBRID: |
| 1386 | case CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL: | ||
| 1387 | case CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC: | ||
| 1384 | errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 0); | 1388 | errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 0); |
| 1385 | break; | 1389 | break; |
| 1386 | default: | 1390 | default: |
diff --git a/drivers/media/video/cx231xx/cx231xx-video.c b/drivers/media/video/cx231xx/cx231xx-video.c index a69c24d8db06..6e81f970dc7d 100644 --- a/drivers/media/video/cx231xx/cx231xx-video.c +++ b/drivers/media/video/cx231xx/cx231xx-video.c | |||
| @@ -29,7 +29,6 @@ | |||
| 29 | #include <linux/bitmap.h> | 29 | #include <linux/bitmap.h> |
| 30 | #include <linux/usb.h> | 30 | #include <linux/usb.h> |
| 31 | #include <linux/i2c.h> | 31 | #include <linux/i2c.h> |
| 32 | #include <linux/version.h> | ||
| 33 | #include <linux/mm.h> | 32 | #include <linux/mm.h> |
| 34 | #include <linux/mutex.h> | 33 | #include <linux/mutex.h> |
| 35 | #include <linux/slab.h> | 34 | #include <linux/slab.h> |
| @@ -45,7 +44,7 @@ | |||
| 45 | #include "cx231xx.h" | 44 | #include "cx231xx.h" |
| 46 | #include "cx231xx-vbi.h" | 45 | #include "cx231xx-vbi.h" |
| 47 | 46 | ||
| 48 | #define CX231XX_VERSION_CODE KERNEL_VERSION(0, 0, 1) | 47 | #define CX231XX_VERSION "0.0.2" |
| 49 | 48 | ||
| 50 | #define DRIVER_AUTHOR "Srinivasa Deevi <srinivasa.deevi@conexant.com>" | 49 | #define DRIVER_AUTHOR "Srinivasa Deevi <srinivasa.deevi@conexant.com>" |
| 51 | #define DRIVER_DESC "Conexant cx231xx based USB video device driver" | 50 | #define DRIVER_DESC "Conexant cx231xx based USB video device driver" |
| @@ -70,6 +69,7 @@ do {\ | |||
| 70 | MODULE_AUTHOR(DRIVER_AUTHOR); | 69 | MODULE_AUTHOR(DRIVER_AUTHOR); |
| 71 | MODULE_DESCRIPTION(DRIVER_DESC); | 70 | MODULE_DESCRIPTION(DRIVER_DESC); |
| 72 | MODULE_LICENSE("GPL"); | 71 | MODULE_LICENSE("GPL"); |
| 72 | MODULE_VERSION(CX231XX_VERSION); | ||
| 73 | 73 | ||
| 74 | static unsigned int card[] = {[0 ... (CX231XX_MAXBOARDS - 1)] = UNSET }; | 74 | static unsigned int card[] = {[0 ... (CX231XX_MAXBOARDS - 1)] = UNSET }; |
| 75 | static unsigned int video_nr[] = {[0 ... (CX231XX_MAXBOARDS - 1)] = UNSET }; | 75 | static unsigned int video_nr[] = {[0 ... (CX231XX_MAXBOARDS - 1)] = UNSET }; |
| @@ -1179,7 +1179,8 @@ static int vidioc_enum_input(struct file *file, void *priv, | |||
| 1179 | { | 1179 | { |
| 1180 | struct cx231xx_fh *fh = priv; | 1180 | struct cx231xx_fh *fh = priv; |
| 1181 | struct cx231xx *dev = fh->dev; | 1181 | struct cx231xx *dev = fh->dev; |
| 1182 | unsigned int n; | 1182 | u32 gen_stat; |
| 1183 | unsigned int ret, n; | ||
| 1183 | 1184 | ||
| 1184 | n = i->index; | 1185 | n = i->index; |
| 1185 | if (n >= MAX_CX231XX_INPUT) | 1186 | if (n >= MAX_CX231XX_INPUT) |
| @@ -1198,6 +1199,18 @@ static int vidioc_enum_input(struct file *file, void *priv, | |||
| 1198 | 1199 | ||
| 1199 | i->std = dev->vdev->tvnorms; | 1200 | i->std = dev->vdev->tvnorms; |
| 1200 | 1201 | ||
| 1202 | /* If they are asking about the active input, read signal status */ | ||
| 1203 | if (n == dev->video_input) { | ||
| 1204 | ret = cx231xx_read_i2c_data(dev, VID_BLK_I2C_ADDRESS, | ||
| 1205 | GEN_STAT, 2, &gen_stat, 4); | ||
| 1206 | if (ret > 0) { | ||
| 1207 | if ((gen_stat & FLD_VPRES) == 0x00) | ||
| 1208 | i->status |= V4L2_IN_ST_NO_SIGNAL; | ||
| 1209 | if ((gen_stat & FLD_HLOCK) == 0x00) | ||
| 1210 | i->status |= V4L2_IN_ST_NO_H_LOCK; | ||
| 1211 | } | ||
| 1212 | } | ||
| 1213 | |||
| 1201 | return 0; | 1214 | return 0; |
| 1202 | } | 1215 | } |
| 1203 | 1216 | ||
| @@ -1869,8 +1882,6 @@ static int vidioc_querycap(struct file *file, void *priv, | |||
| 1869 | strlcpy(cap->card, cx231xx_boards[dev->model].name, sizeof(cap->card)); | 1882 | strlcpy(cap->card, cx231xx_boards[dev->model].name, sizeof(cap->card)); |
| 1870 | usb_make_path(dev->udev, cap->bus_info, sizeof(cap->bus_info)); | 1883 | usb_make_path(dev->udev, cap->bus_info, sizeof(cap->bus_info)); |
| 1871 | 1884 | ||
| 1872 | cap->version = CX231XX_VERSION_CODE; | ||
| 1873 | |||
| 1874 | cap->capabilities = V4L2_CAP_VBI_CAPTURE | | 1885 | cap->capabilities = V4L2_CAP_VBI_CAPTURE | |
| 1875 | #if 0 | 1886 | #if 0 |
| 1876 | V4L2_CAP_SLICED_VBI_CAPTURE | | 1887 | V4L2_CAP_SLICED_VBI_CAPTURE | |
| @@ -2057,7 +2068,6 @@ static int radio_querycap(struct file *file, void *priv, | |||
| 2057 | strlcpy(cap->card, cx231xx_boards[dev->model].name, sizeof(cap->card)); | 2068 | strlcpy(cap->card, cx231xx_boards[dev->model].name, sizeof(cap->card)); |
| 2058 | usb_make_path(dev->udev, cap->bus_info, sizeof(cap->bus_info)); | 2069 | usb_make_path(dev->udev, cap->bus_info, sizeof(cap->bus_info)); |
| 2059 | 2070 | ||
| 2060 | cap->version = CX231XX_VERSION_CODE; | ||
| 2061 | cap->capabilities = V4L2_CAP_TUNER; | 2071 | cap->capabilities = V4L2_CAP_TUNER; |
| 2062 | return 0; | 2072 | return 0; |
| 2063 | } | 2073 | } |
| @@ -2570,11 +2580,8 @@ int cx231xx_register_analog_devices(struct cx231xx *dev) | |||
| 2570 | { | 2580 | { |
| 2571 | int ret; | 2581 | int ret; |
| 2572 | 2582 | ||
| 2573 | cx231xx_info("%s: v4l2 driver version %d.%d.%d\n", | 2583 | cx231xx_info("%s: v4l2 driver version %s\n", |
| 2574 | dev->name, | 2584 | dev->name, CX231XX_VERSION); |
| 2575 | (CX231XX_VERSION_CODE >> 16) & 0xff, | ||
| 2576 | (CX231XX_VERSION_CODE >> 8) & 0xff, | ||
| 2577 | CX231XX_VERSION_CODE & 0xff); | ||
| 2578 | 2585 | ||
| 2579 | /* set default norm */ | 2586 | /* set default norm */ |
| 2580 | /*dev->norm = cx231xx_video_template.current_norm; */ | 2587 | /*dev->norm = cx231xx_video_template.current_norm; */ |
diff --git a/drivers/media/video/cx231xx/cx231xx.h b/drivers/media/video/cx231xx/cx231xx.h index 46dd84067816..2000bc64c497 100644 --- a/drivers/media/video/cx231xx/cx231xx.h +++ b/drivers/media/video/cx231xx/cx231xx.h | |||
| @@ -43,7 +43,7 @@ | |||
| 43 | #include "cx231xx-conf-reg.h" | 43 | #include "cx231xx-conf-reg.h" |
| 44 | 44 | ||
| 45 | #define DRIVER_NAME "cx231xx" | 45 | #define DRIVER_NAME "cx231xx" |
| 46 | #define PWR_SLEEP_INTERVAL 5 | 46 | #define PWR_SLEEP_INTERVAL 10 |
| 47 | 47 | ||
| 48 | /* I2C addresses for control block in Cx231xx */ | 48 | /* I2C addresses for control block in Cx231xx */ |
| 49 | #define AFE_DEVICE_ADDRESS 0x60 | 49 | #define AFE_DEVICE_ADDRESS 0x60 |
| @@ -67,6 +67,8 @@ | |||
| 67 | #define CX231XX_BOARD_PV_XCAPTURE_USB 11 | 67 | #define CX231XX_BOARD_PV_XCAPTURE_USB 11 |
| 68 | #define CX231XX_BOARD_KWORLD_UB430_USB_HYBRID 12 | 68 | #define CX231XX_BOARD_KWORLD_UB430_USB_HYBRID 12 |
| 69 | #define CX231XX_BOARD_ICONBIT_U100 13 | 69 | #define CX231XX_BOARD_ICONBIT_U100 13 |
| 70 | #define CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL 14 | ||
| 71 | #define CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC 15 | ||
| 70 | 72 | ||
| 71 | /* Limits minimum and default number of buffers */ | 73 | /* Limits minimum and default number of buffers */ |
| 72 | #define CX231XX_MIN_BUF 4 | 74 | #define CX231XX_MIN_BUF 4 |
| @@ -112,7 +114,6 @@ | |||
| 112 | V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \ | 114 | V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \ |
| 113 | V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \ | 115 | V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \ |
| 114 | V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK) | 116 | V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK) |
| 115 | #define CX231xx_VERSION_CODE KERNEL_VERSION(0, 0, 2) | ||
| 116 | 117 | ||
| 117 | #define SLEEP_S5H1432 30 | 118 | #define SLEEP_S5H1432 30 |
| 118 | #define CX23417_OSC_EN 8 | 119 | #define CX23417_OSC_EN 8 |
diff --git a/drivers/media/video/cx23885/altera-ci.c b/drivers/media/video/cx23885/altera-ci.c index 678539b2acfa..1fa8927f0d36 100644 --- a/drivers/media/video/cx23885/altera-ci.c +++ b/drivers/media/video/cx23885/altera-ci.c | |||
| @@ -52,7 +52,6 @@ | |||
| 52 | * | DATA7| DATA6| DATA5| DATA4| DATA3| DATA2| DATA1| DATA0| | 52 | * | DATA7| DATA6| DATA5| DATA4| DATA3| DATA2| DATA1| DATA0| |
| 53 | * +-------+-------+-------+-------+-------+-------+-------+-------+ | 53 | * +-------+-------+-------+-------+-------+-------+-------+-------+ |
| 54 | */ | 54 | */ |
| 55 | #include <linux/version.h> | ||
| 56 | #include <media/videobuf-dma-sg.h> | 55 | #include <media/videobuf-dma-sg.h> |
| 57 | #include <media/videobuf-dvb.h> | 56 | #include <media/videobuf-dvb.h> |
| 58 | #include "altera-ci.h" | 57 | #include "altera-ci.h" |
diff --git a/drivers/media/video/cx23885/cx23885-417.c b/drivers/media/video/cx23885/cx23885-417.c index 9a98dc55f657..67c4a59bd882 100644 --- a/drivers/media/video/cx23885/cx23885-417.c +++ b/drivers/media/video/cx23885/cx23885-417.c | |||
| @@ -1359,7 +1359,6 @@ static int vidioc_querycap(struct file *file, void *priv, | |||
| 1359 | strlcpy(cap->card, cx23885_boards[tsport->dev->board].name, | 1359 | strlcpy(cap->card, cx23885_boards[tsport->dev->board].name, |
| 1360 | sizeof(cap->card)); | 1360 | sizeof(cap->card)); |
| 1361 | sprintf(cap->bus_info, "PCI:%s", pci_name(dev->pci)); | 1361 | sprintf(cap->bus_info, "PCI:%s", pci_name(dev->pci)); |
| 1362 | cap->version = CX23885_VERSION_CODE; | ||
| 1363 | cap->capabilities = | 1362 | cap->capabilities = |
| 1364 | V4L2_CAP_VIDEO_CAPTURE | | 1363 | V4L2_CAP_VIDEO_CAPTURE | |
| 1365 | V4L2_CAP_READWRITE | | 1364 | V4L2_CAP_READWRITE | |
diff --git a/drivers/media/video/cx23885/cx23885-cards.c b/drivers/media/video/cx23885/cx23885-cards.c index 934185cca758..76b7563de39c 100644 --- a/drivers/media/video/cx23885/cx23885-cards.c +++ b/drivers/media/video/cx23885/cx23885-cards.c | |||
| @@ -29,11 +29,17 @@ | |||
| 29 | #include "../../../staging/altera-stapl/altera.h" | 29 | #include "../../../staging/altera-stapl/altera.h" |
| 30 | #include "cx23885.h" | 30 | #include "cx23885.h" |
| 31 | #include "tuner-xc2028.h" | 31 | #include "tuner-xc2028.h" |
| 32 | #include "netup-eeprom.h" | ||
| 32 | #include "netup-init.h" | 33 | #include "netup-init.h" |
| 33 | #include "altera-ci.h" | 34 | #include "altera-ci.h" |
| 35 | #include "xc4000.h" | ||
| 34 | #include "xc5000.h" | 36 | #include "xc5000.h" |
| 35 | #include "cx23888-ir.h" | 37 | #include "cx23888-ir.h" |
| 36 | 38 | ||
| 39 | static unsigned int netup_card_rev = 1; | ||
| 40 | module_param(netup_card_rev, int, 0644); | ||
| 41 | MODULE_PARM_DESC(netup_card_rev, | ||
| 42 | "NetUP Dual DVB-T/C CI card revision"); | ||
| 37 | static unsigned int enable_885_ir; | 43 | static unsigned int enable_885_ir; |
| 38 | module_param(enable_885_ir, int, 0644); | 44 | module_param(enable_885_ir, int, 0644); |
| 39 | MODULE_PARM_DESC(enable_885_ir, | 45 | MODULE_PARM_DESC(enable_885_ir, |
| @@ -175,6 +181,34 @@ struct cx23885_board cx23885_boards[] = { | |||
| 175 | .name = "Leadtek Winfast PxDVR3200 H", | 181 | .name = "Leadtek Winfast PxDVR3200 H", |
| 176 | .portc = CX23885_MPEG_DVB, | 182 | .portc = CX23885_MPEG_DVB, |
| 177 | }, | 183 | }, |
| 184 | [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000] = { | ||
| 185 | .name = "Leadtek Winfast PxDVR3200 H XC4000", | ||
| 186 | .porta = CX23885_ANALOG_VIDEO, | ||
| 187 | .portc = CX23885_MPEG_DVB, | ||
| 188 | .tuner_type = TUNER_XC4000, | ||
| 189 | .tuner_addr = 0x61, | ||
| 190 | .radio_type = TUNER_XC4000, | ||
| 191 | .radio_addr = 0x61, | ||
| 192 | .input = {{ | ||
| 193 | .type = CX23885_VMUX_TELEVISION, | ||
| 194 | .vmux = CX25840_VIN2_CH1 | | ||
| 195 | CX25840_VIN5_CH2 | | ||
| 196 | CX25840_NONE0_CH3, | ||
| 197 | }, { | ||
| 198 | .type = CX23885_VMUX_COMPOSITE1, | ||
| 199 | .vmux = CX25840_COMPOSITE1, | ||
| 200 | }, { | ||
| 201 | .type = CX23885_VMUX_SVIDEO, | ||
| 202 | .vmux = CX25840_SVIDEO_LUMA3 | | ||
| 203 | CX25840_SVIDEO_CHROMA4, | ||
| 204 | }, { | ||
| 205 | .type = CX23885_VMUX_COMPONENT, | ||
| 206 | .vmux = CX25840_VIN7_CH1 | | ||
| 207 | CX25840_VIN6_CH2 | | ||
| 208 | CX25840_VIN8_CH3 | | ||
| 209 | CX25840_COMPONENT_ON, | ||
| 210 | } }, | ||
| 211 | }, | ||
| 178 | [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = { | 212 | [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = { |
| 179 | .name = "Compro VideoMate E650F", | 213 | .name = "Compro VideoMate E650F", |
| 180 | .portc = CX23885_MPEG_DVB, | 214 | .portc = CX23885_MPEG_DVB, |
| @@ -433,6 +467,10 @@ struct cx23885_subid cx23885_subids[] = { | |||
| 433 | .subdevice = 0x6681, | 467 | .subdevice = 0x6681, |
| 434 | .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H, | 468 | .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H, |
| 435 | }, { | 469 | }, { |
| 470 | .subvendor = 0x107d, | ||
| 471 | .subdevice = 0x6f39, | ||
| 472 | .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000, | ||
| 473 | }, { | ||
| 436 | .subvendor = 0x185b, | 474 | .subvendor = 0x185b, |
| 437 | .subdevice = 0xe800, | 475 | .subdevice = 0xe800, |
| 438 | .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F, | 476 | .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F, |
| @@ -749,6 +787,7 @@ int cx23885_tuner_callback(void *priv, int component, int command, int arg) | |||
| 749 | case CX23885_BOARD_HAUPPAUGE_HVR1500: | 787 | case CX23885_BOARD_HAUPPAUGE_HVR1500: |
| 750 | case CX23885_BOARD_HAUPPAUGE_HVR1500Q: | 788 | case CX23885_BOARD_HAUPPAUGE_HVR1500Q: |
| 751 | case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: | 789 | case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: |
| 790 | case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000: | ||
| 752 | case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: | 791 | case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: |
| 753 | case CX23885_BOARD_COMPRO_VIDEOMATE_E800: | 792 | case CX23885_BOARD_COMPRO_VIDEOMATE_E800: |
| 754 | case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200: | 793 | case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200: |
| @@ -909,6 +948,7 @@ void cx23885_gpio_setup(struct cx23885_dev *dev) | |||
| 909 | cx_set(GP0_IO, 0x000f000f); | 948 | cx_set(GP0_IO, 0x000f000f); |
| 910 | break; | 949 | break; |
| 911 | case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: | 950 | case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: |
| 951 | case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000: | ||
| 912 | case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: | 952 | case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: |
| 913 | case CX23885_BOARD_COMPRO_VIDEOMATE_E800: | 953 | case CX23885_BOARD_COMPRO_VIDEOMATE_E800: |
| 914 | case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200: | 954 | case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200: |
| @@ -1097,12 +1137,19 @@ int cx23885_ir_init(struct cx23885_dev *dev) | |||
| 1097 | case CX23885_BOARD_HAUPPAUGE_HVR1800: | 1137 | case CX23885_BOARD_HAUPPAUGE_HVR1800: |
| 1098 | case CX23885_BOARD_HAUPPAUGE_HVR1200: | 1138 | case CX23885_BOARD_HAUPPAUGE_HVR1200: |
| 1099 | case CX23885_BOARD_HAUPPAUGE_HVR1400: | 1139 | case CX23885_BOARD_HAUPPAUGE_HVR1400: |
| 1100 | case CX23885_BOARD_HAUPPAUGE_HVR1270: | ||
| 1101 | case CX23885_BOARD_HAUPPAUGE_HVR1275: | 1140 | case CX23885_BOARD_HAUPPAUGE_HVR1275: |
| 1102 | case CX23885_BOARD_HAUPPAUGE_HVR1255: | 1141 | case CX23885_BOARD_HAUPPAUGE_HVR1255: |
| 1103 | case CX23885_BOARD_HAUPPAUGE_HVR1210: | 1142 | case CX23885_BOARD_HAUPPAUGE_HVR1210: |
| 1104 | /* FIXME: Implement me */ | 1143 | /* FIXME: Implement me */ |
| 1105 | break; | 1144 | break; |
| 1145 | case CX23885_BOARD_HAUPPAUGE_HVR1270: | ||
| 1146 | ret = cx23888_ir_probe(dev); | ||
| 1147 | if (ret) | ||
| 1148 | break; | ||
| 1149 | dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR); | ||
| 1150 | v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config, | ||
| 1151 | ir_rx_pin_cfg_count, ir_rx_pin_cfg); | ||
| 1152 | break; | ||
| 1106 | case CX23885_BOARD_HAUPPAUGE_HVR1850: | 1153 | case CX23885_BOARD_HAUPPAUGE_HVR1850: |
| 1107 | case CX23885_BOARD_HAUPPAUGE_HVR1290: | 1154 | case CX23885_BOARD_HAUPPAUGE_HVR1290: |
| 1108 | ret = cx23888_ir_probe(dev); | 1155 | ret = cx23888_ir_probe(dev); |
| @@ -1156,6 +1203,7 @@ int cx23885_ir_init(struct cx23885_dev *dev) | |||
| 1156 | void cx23885_ir_fini(struct cx23885_dev *dev) | 1203 | void cx23885_ir_fini(struct cx23885_dev *dev) |
| 1157 | { | 1204 | { |
| 1158 | switch (dev->board) { | 1205 | switch (dev->board) { |
| 1206 | case CX23885_BOARD_HAUPPAUGE_HVR1270: | ||
| 1159 | case CX23885_BOARD_HAUPPAUGE_HVR1850: | 1207 | case CX23885_BOARD_HAUPPAUGE_HVR1850: |
| 1160 | case CX23885_BOARD_HAUPPAUGE_HVR1290: | 1208 | case CX23885_BOARD_HAUPPAUGE_HVR1290: |
| 1161 | cx23885_irq_remove(dev, PCI_MSK_IR); | 1209 | cx23885_irq_remove(dev, PCI_MSK_IR); |
| @@ -1199,6 +1247,7 @@ int netup_jtag_io(void *device, int tms, int tdi, int read_tdo) | |||
| 1199 | void cx23885_ir_pci_int_enable(struct cx23885_dev *dev) | 1247 | void cx23885_ir_pci_int_enable(struct cx23885_dev *dev) |
| 1200 | { | 1248 | { |
| 1201 | switch (dev->board) { | 1249 | switch (dev->board) { |
| 1250 | case CX23885_BOARD_HAUPPAUGE_HVR1270: | ||
| 1202 | case CX23885_BOARD_HAUPPAUGE_HVR1850: | 1251 | case CX23885_BOARD_HAUPPAUGE_HVR1850: |
| 1203 | case CX23885_BOARD_HAUPPAUGE_HVR1290: | 1252 | case CX23885_BOARD_HAUPPAUGE_HVR1290: |
| 1204 | if (dev->sd_ir) | 1253 | if (dev->sd_ir) |
| @@ -1325,6 +1374,7 @@ void cx23885_card_setup(struct cx23885_dev *dev) | |||
| 1325 | case CX23885_BOARD_HAUPPAUGE_HVR1700: | 1374 | case CX23885_BOARD_HAUPPAUGE_HVR1700: |
| 1326 | case CX23885_BOARD_HAUPPAUGE_HVR1400: | 1375 | case CX23885_BOARD_HAUPPAUGE_HVR1400: |
| 1327 | case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: | 1376 | case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: |
| 1377 | case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000: | ||
| 1328 | case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: | 1378 | case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: |
| 1329 | case CX23885_BOARD_HAUPPAUGE_HVR1270: | 1379 | case CX23885_BOARD_HAUPPAUGE_HVR1270: |
| 1330 | case CX23885_BOARD_HAUPPAUGE_HVR1275: | 1380 | case CX23885_BOARD_HAUPPAUGE_HVR1275: |
| @@ -1353,10 +1403,12 @@ void cx23885_card_setup(struct cx23885_dev *dev) | |||
| 1353 | case CX23885_BOARD_HAUPPAUGE_HVR1800lp: | 1403 | case CX23885_BOARD_HAUPPAUGE_HVR1800lp: |
| 1354 | case CX23885_BOARD_HAUPPAUGE_HVR1700: | 1404 | case CX23885_BOARD_HAUPPAUGE_HVR1700: |
| 1355 | case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: | 1405 | case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: |
| 1406 | case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000: | ||
| 1356 | case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: | 1407 | case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: |
| 1357 | case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: | 1408 | case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: |
| 1358 | case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: | 1409 | case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: |
| 1359 | case CX23885_BOARD_COMPRO_VIDEOMATE_E800: | 1410 | case CX23885_BOARD_COMPRO_VIDEOMATE_E800: |
| 1411 | case CX23885_BOARD_HAUPPAUGE_HVR1270: | ||
| 1360 | case CX23885_BOARD_HAUPPAUGE_HVR1850: | 1412 | case CX23885_BOARD_HAUPPAUGE_HVR1850: |
| 1361 | case CX23885_BOARD_MYGICA_X8506: | 1413 | case CX23885_BOARD_MYGICA_X8506: |
| 1362 | case CX23885_BOARD_MAGICPRO_PROHDTVE2: | 1414 | case CX23885_BOARD_MAGICPRO_PROHDTVE2: |
| @@ -1383,6 +1435,7 @@ void cx23885_card_setup(struct cx23885_dev *dev) | |||
| 1383 | const struct firmware *fw; | 1435 | const struct firmware *fw; |
| 1384 | const char *filename = "dvb-netup-altera-01.fw"; | 1436 | const char *filename = "dvb-netup-altera-01.fw"; |
| 1385 | char *action = "configure"; | 1437 | char *action = "configure"; |
| 1438 | static struct netup_card_info cinfo; | ||
| 1386 | struct altera_config netup_config = { | 1439 | struct altera_config netup_config = { |
| 1387 | .dev = dev, | 1440 | .dev = dev, |
| 1388 | .action = action, | 1441 | .action = action, |
| @@ -1391,6 +1444,21 @@ void cx23885_card_setup(struct cx23885_dev *dev) | |||
| 1391 | 1444 | ||
| 1392 | netup_initialize(dev); | 1445 | netup_initialize(dev); |
| 1393 | 1446 | ||
| 1447 | netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo); | ||
| 1448 | if (netup_card_rev) | ||
| 1449 | cinfo.rev = netup_card_rev; | ||
| 1450 | |||
| 1451 | switch (cinfo.rev) { | ||
| 1452 | case 0x4: | ||
| 1453 | filename = "dvb-netup-altera-04.fw"; | ||
| 1454 | break; | ||
| 1455 | default: | ||
| 1456 | filename = "dvb-netup-altera-01.fw"; | ||
| 1457 | break; | ||
| 1458 | } | ||
| 1459 | printk(KERN_INFO "NetUP card rev=0x%x fw_filename=%s\n", | ||
| 1460 | cinfo.rev, filename); | ||
| 1461 | |||
| 1394 | ret = request_firmware(&fw, filename, &dev->pci->dev); | 1462 | ret = request_firmware(&fw, filename, &dev->pci->dev); |
| 1395 | if (ret != 0) | 1463 | if (ret != 0) |
| 1396 | printk(KERN_ERR "did not find the firmware file. (%s) " | 1464 | printk(KERN_ERR "did not find the firmware file. (%s) " |
diff --git a/drivers/media/video/cx23885/cx23885-core.c b/drivers/media/video/cx23885/cx23885-core.c index 419777a832ee..ee41a8882f58 100644 --- a/drivers/media/video/cx23885/cx23885-core.c +++ b/drivers/media/video/cx23885/cx23885-core.c | |||
| @@ -42,6 +42,7 @@ | |||
| 42 | MODULE_DESCRIPTION("Driver for cx23885 based TV cards"); | 42 | MODULE_DESCRIPTION("Driver for cx23885 based TV cards"); |
| 43 | MODULE_AUTHOR("Steven Toth <stoth@linuxtv.org>"); | 43 | MODULE_AUTHOR("Steven Toth <stoth@linuxtv.org>"); |
| 44 | MODULE_LICENSE("GPL"); | 44 | MODULE_LICENSE("GPL"); |
| 45 | MODULE_VERSION(CX23885_VERSION); | ||
| 45 | 46 | ||
| 46 | static unsigned int debug; | 47 | static unsigned int debug; |
| 47 | module_param(debug, int, 0644); | 48 | module_param(debug, int, 0644); |
| @@ -2147,14 +2148,8 @@ static struct pci_driver cx23885_pci_driver = { | |||
| 2147 | 2148 | ||
| 2148 | static int __init cx23885_init(void) | 2149 | static int __init cx23885_init(void) |
| 2149 | { | 2150 | { |
| 2150 | printk(KERN_INFO "cx23885 driver version %d.%d.%d loaded\n", | 2151 | printk(KERN_INFO "cx23885 driver version %s loaded\n", |
| 2151 | (CX23885_VERSION_CODE >> 16) & 0xff, | 2152 | CX23885_VERSION); |
| 2152 | (CX23885_VERSION_CODE >> 8) & 0xff, | ||
| 2153 | CX23885_VERSION_CODE & 0xff); | ||
| 2154 | #ifdef SNAPSHOT | ||
| 2155 | printk(KERN_INFO "cx23885: snapshot date %04d-%02d-%02d\n", | ||
| 2156 | SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100); | ||
| 2157 | #endif | ||
| 2158 | return pci_register_driver(&cx23885_pci_driver); | 2153 | return pci_register_driver(&cx23885_pci_driver); |
| 2159 | } | 2154 | } |
| 2160 | 2155 | ||
| @@ -2165,5 +2160,3 @@ static void __exit cx23885_fini(void) | |||
| 2165 | 2160 | ||
| 2166 | module_init(cx23885_init); | 2161 | module_init(cx23885_init); |
| 2167 | module_exit(cx23885_fini); | 2162 | module_exit(cx23885_fini); |
| 2168 | |||
| 2169 | /* ----------------------------------------------------------- */ | ||
diff --git a/drivers/media/video/cx23885/cx23885-dvb.c b/drivers/media/video/cx23885/cx23885-dvb.c index 3c315f94cc85..aa83f07b1b0f 100644 --- a/drivers/media/video/cx23885/cx23885-dvb.c +++ b/drivers/media/video/cx23885/cx23885-dvb.c | |||
| @@ -37,6 +37,7 @@ | |||
| 37 | #include "tda8290.h" | 37 | #include "tda8290.h" |
| 38 | #include "tda18271.h" | 38 | #include "tda18271.h" |
| 39 | #include "lgdt330x.h" | 39 | #include "lgdt330x.h" |
| 40 | #include "xc4000.h" | ||
| 40 | #include "xc5000.h" | 41 | #include "xc5000.h" |
| 41 | #include "max2165.h" | 42 | #include "max2165.h" |
| 42 | #include "tda10048.h" | 43 | #include "tda10048.h" |
| @@ -921,6 +922,26 @@ static int dvb_register(struct cx23885_tsport *port) | |||
| 921 | fe->ops.tuner_ops.set_config(fe, &ctl); | 922 | fe->ops.tuner_ops.set_config(fe, &ctl); |
| 922 | } | 923 | } |
| 923 | break; | 924 | break; |
| 925 | case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000: | ||
| 926 | i2c_bus = &dev->i2c_bus[0]; | ||
| 927 | |||
| 928 | fe0->dvb.frontend = dvb_attach(zl10353_attach, | ||
| 929 | &dvico_fusionhdtv_xc3028, | ||
| 930 | &i2c_bus->i2c_adap); | ||
| 931 | if (fe0->dvb.frontend != NULL) { | ||
| 932 | struct dvb_frontend *fe; | ||
| 933 | struct xc4000_config cfg = { | ||
| 934 | .i2c_address = 0x61, | ||
| 935 | .default_pm = 0, | ||
| 936 | .dvb_amplitude = 134, | ||
| 937 | .set_smoothedcvbs = 1, | ||
| 938 | .if_khz = 4560 | ||
| 939 | }; | ||
| 940 | |||
| 941 | fe = dvb_attach(xc4000_attach, fe0->dvb.frontend, | ||
| 942 | &dev->i2c_bus[1].i2c_adap, &cfg); | ||
| 943 | } | ||
| 944 | break; | ||
| 924 | case CX23885_BOARD_TBS_6920: | 945 | case CX23885_BOARD_TBS_6920: |
| 925 | i2c_bus = &dev->i2c_bus[1]; | 946 | i2c_bus = &dev->i2c_bus[1]; |
| 926 | 947 | ||
| @@ -1249,7 +1270,7 @@ int cx23885_dvb_unregister(struct cx23885_tsport *port) | |||
| 1249 | * implement MFE support. | 1270 | * implement MFE support. |
| 1250 | */ | 1271 | */ |
| 1251 | fe0 = videobuf_dvb_get_frontend(&port->frontends, 1); | 1272 | fe0 = videobuf_dvb_get_frontend(&port->frontends, 1); |
| 1252 | if (fe0->dvb.frontend) | 1273 | if (fe0 && fe0->dvb.frontend) |
| 1253 | videobuf_dvb_unregister_bus(&port->frontends); | 1274 | videobuf_dvb_unregister_bus(&port->frontends); |
| 1254 | 1275 | ||
| 1255 | switch (port->dev->board) { | 1276 | switch (port->dev->board) { |
diff --git a/drivers/media/video/cx23885/cx23885-input.c b/drivers/media/video/cx23885/cx23885-input.c index e97cafd83984..ce765e3f77bd 100644 --- a/drivers/media/video/cx23885/cx23885-input.c +++ b/drivers/media/video/cx23885/cx23885-input.c | |||
| @@ -82,6 +82,7 @@ void cx23885_input_rx_work_handler(struct cx23885_dev *dev, u32 events) | |||
| 82 | return; | 82 | return; |
| 83 | 83 | ||
| 84 | switch (dev->board) { | 84 | switch (dev->board) { |
| 85 | case CX23885_BOARD_HAUPPAUGE_HVR1270: | ||
| 85 | case CX23885_BOARD_HAUPPAUGE_HVR1850: | 86 | case CX23885_BOARD_HAUPPAUGE_HVR1850: |
| 86 | case CX23885_BOARD_HAUPPAUGE_HVR1290: | 87 | case CX23885_BOARD_HAUPPAUGE_HVR1290: |
| 87 | case CX23885_BOARD_TEVII_S470: | 88 | case CX23885_BOARD_TEVII_S470: |
| @@ -133,6 +134,7 @@ static int cx23885_input_ir_start(struct cx23885_dev *dev) | |||
| 133 | 134 | ||
| 134 | v4l2_subdev_call(dev->sd_ir, ir, rx_g_parameters, ¶ms); | 135 | v4l2_subdev_call(dev->sd_ir, ir, rx_g_parameters, ¶ms); |
| 135 | switch (dev->board) { | 136 | switch (dev->board) { |
| 137 | case CX23885_BOARD_HAUPPAUGE_HVR1270: | ||
| 136 | case CX23885_BOARD_HAUPPAUGE_HVR1850: | 138 | case CX23885_BOARD_HAUPPAUGE_HVR1850: |
| 137 | case CX23885_BOARD_HAUPPAUGE_HVR1290: | 139 | case CX23885_BOARD_HAUPPAUGE_HVR1290: |
| 138 | case CX23885_BOARD_HAUPPAUGE_HVR1250: | 140 | case CX23885_BOARD_HAUPPAUGE_HVR1250: |
| @@ -229,6 +231,9 @@ static void cx23885_input_ir_stop(struct cx23885_dev *dev) | |||
| 229 | v4l2_subdev_call(dev->sd_ir, ir, rx_s_parameters, ¶ms); | 231 | v4l2_subdev_call(dev->sd_ir, ir, rx_s_parameters, ¶ms); |
| 230 | v4l2_subdev_call(dev->sd_ir, ir, rx_g_parameters, ¶ms); | 232 | v4l2_subdev_call(dev->sd_ir, ir, rx_g_parameters, ¶ms); |
| 231 | } | 233 | } |
| 234 | flush_work_sync(&dev->cx25840_work); | ||
| 235 | flush_work_sync(&dev->ir_rx_work); | ||
| 236 | flush_work_sync(&dev->ir_tx_work); | ||
| 232 | } | 237 | } |
| 233 | 238 | ||
| 234 | static void cx23885_input_ir_close(struct rc_dev *rc) | 239 | static void cx23885_input_ir_close(struct rc_dev *rc) |
| @@ -257,6 +262,7 @@ int cx23885_input_init(struct cx23885_dev *dev) | |||
| 257 | return -ENODEV; | 262 | return -ENODEV; |
| 258 | 263 | ||
| 259 | switch (dev->board) { | 264 | switch (dev->board) { |
| 265 | case CX23885_BOARD_HAUPPAUGE_HVR1270: | ||
| 260 | case CX23885_BOARD_HAUPPAUGE_HVR1850: | 266 | case CX23885_BOARD_HAUPPAUGE_HVR1850: |
| 261 | case CX23885_BOARD_HAUPPAUGE_HVR1290: | 267 | case CX23885_BOARD_HAUPPAUGE_HVR1290: |
| 262 | case CX23885_BOARD_HAUPPAUGE_HVR1250: | 268 | case CX23885_BOARD_HAUPPAUGE_HVR1250: |
diff --git a/drivers/media/video/cx23885/cx23885-video.c b/drivers/media/video/cx23885/cx23885-video.c index ee57f6bedbe3..896bb32dbf03 100644 --- a/drivers/media/video/cx23885/cx23885-video.c +++ b/drivers/media/video/cx23885/cx23885-video.c | |||
| @@ -1000,7 +1000,6 @@ static int vidioc_querycap(struct file *file, void *priv, | |||
| 1000 | strlcpy(cap->card, cx23885_boards[dev->board].name, | 1000 | strlcpy(cap->card, cx23885_boards[dev->board].name, |
| 1001 | sizeof(cap->card)); | 1001 | sizeof(cap->card)); |
| 1002 | sprintf(cap->bus_info, "PCIe:%s", pci_name(dev->pci)); | 1002 | sprintf(cap->bus_info, "PCIe:%s", pci_name(dev->pci)); |
| 1003 | cap->version = CX23885_VERSION_CODE; | ||
| 1004 | cap->capabilities = | 1003 | cap->capabilities = |
| 1005 | V4L2_CAP_VIDEO_CAPTURE | | 1004 | V4L2_CAP_VIDEO_CAPTURE | |
| 1006 | V4L2_CAP_READWRITE | | 1005 | V4L2_CAP_READWRITE | |
diff --git a/drivers/media/video/cx23885/cx23885.h b/drivers/media/video/cx23885/cx23885.h index c186473fc570..d86bc0b1317b 100644 --- a/drivers/media/video/cx23885/cx23885.h +++ b/drivers/media/video/cx23885/cx23885.h | |||
| @@ -36,10 +36,9 @@ | |||
| 36 | #include "cx23885-reg.h" | 36 | #include "cx23885-reg.h" |
| 37 | #include "media/cx2341x.h" | 37 | #include "media/cx2341x.h" |
| 38 | 38 | ||
| 39 | #include <linux/version.h> | ||
| 40 | #include <linux/mutex.h> | 39 | #include <linux/mutex.h> |
| 41 | 40 | ||
| 42 | #define CX23885_VERSION_CODE KERNEL_VERSION(0, 0, 2) | 41 | #define CX23885_VERSION "0.0.3" |
| 43 | 42 | ||
| 44 | #define UNSET (-1U) | 43 | #define UNSET (-1U) |
| 45 | 44 | ||
| @@ -86,6 +85,7 @@ | |||
| 86 | #define CX23885_BOARD_LEADTEK_WINFAST_PXTV1200 28 | 85 | #define CX23885_BOARD_LEADTEK_WINFAST_PXTV1200 28 |
| 87 | #define CX23885_BOARD_GOTVIEW_X5_3D_HYBRID 29 | 86 | #define CX23885_BOARD_GOTVIEW_X5_3D_HYBRID 29 |
| 88 | #define CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF 30 | 87 | #define CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF 30 |
| 88 | #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000 31 | ||
| 89 | 89 | ||
| 90 | #define GPIO_0 0x00000001 | 90 | #define GPIO_0 0x00000001 |
| 91 | #define GPIO_1 0x00000002 | 91 | #define GPIO_1 0x00000002 |
diff --git a/drivers/media/video/cx88/cx88-alsa.c b/drivers/media/video/cx88/cx88-alsa.c index 423c1af8a782..68d1240f493c 100644 --- a/drivers/media/video/cx88/cx88-alsa.c +++ b/drivers/media/video/cx88/cx88-alsa.c | |||
| @@ -113,6 +113,8 @@ MODULE_DESCRIPTION("ALSA driver module for cx2388x based TV cards"); | |||
| 113 | MODULE_AUTHOR("Ricardo Cerqueira"); | 113 | MODULE_AUTHOR("Ricardo Cerqueira"); |
| 114 | MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@infradead.org>"); | 114 | MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@infradead.org>"); |
| 115 | MODULE_LICENSE("GPL"); | 115 | MODULE_LICENSE("GPL"); |
| 116 | MODULE_VERSION(CX88_VERSION); | ||
| 117 | |||
| 116 | MODULE_SUPPORTED_DEVICE("{{Conexant,23881}," | 118 | MODULE_SUPPORTED_DEVICE("{{Conexant,23881}," |
| 117 | "{{Conexant,23882}," | 119 | "{{Conexant,23882}," |
| 118 | "{{Conexant,23883}"); | 120 | "{{Conexant,23883}"); |
| @@ -973,14 +975,8 @@ static struct pci_driver cx88_audio_pci_driver = { | |||
| 973 | */ | 975 | */ |
| 974 | static int __init cx88_audio_init(void) | 976 | static int __init cx88_audio_init(void) |
| 975 | { | 977 | { |
| 976 | printk(KERN_INFO "cx2388x alsa driver version %d.%d.%d loaded\n", | 978 | printk(KERN_INFO "cx2388x alsa driver version %s loaded\n", |
| 977 | (CX88_VERSION_CODE >> 16) & 0xff, | 979 | CX88_VERSION); |
| 978 | (CX88_VERSION_CODE >> 8) & 0xff, | ||
| 979 | CX88_VERSION_CODE & 0xff); | ||
| 980 | #ifdef SNAPSHOT | ||
| 981 | printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n", | ||
| 982 | SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100); | ||
| 983 | #endif | ||
| 984 | return pci_register_driver(&cx88_audio_pci_driver); | 980 | return pci_register_driver(&cx88_audio_pci_driver); |
| 985 | } | 981 | } |
| 986 | 982 | ||
| @@ -994,10 +990,3 @@ static void __exit cx88_audio_fini(void) | |||
| 994 | 990 | ||
| 995 | module_init(cx88_audio_init); | 991 | module_init(cx88_audio_init); |
| 996 | module_exit(cx88_audio_fini); | 992 | module_exit(cx88_audio_fini); |
| 997 | |||
| 998 | /* ----------------------------------------------------------- */ | ||
| 999 | /* | ||
| 1000 | * Local variables: | ||
| 1001 | * c-basic-offset: 8 | ||
| 1002 | * End: | ||
| 1003 | */ | ||
diff --git a/drivers/media/video/cx88/cx88-blackbird.c b/drivers/media/video/cx88/cx88-blackbird.c index 11e49bbc4a66..e46446a449c0 100644 --- a/drivers/media/video/cx88/cx88-blackbird.c +++ b/drivers/media/video/cx88/cx88-blackbird.c | |||
| @@ -42,6 +42,7 @@ | |||
| 42 | MODULE_DESCRIPTION("driver for cx2388x/cx23416 based mpeg encoder cards"); | 42 | MODULE_DESCRIPTION("driver for cx2388x/cx23416 based mpeg encoder cards"); |
| 43 | MODULE_AUTHOR("Jelle Foks <jelle@foks.us>, Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); | 43 | MODULE_AUTHOR("Jelle Foks <jelle@foks.us>, Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); |
| 44 | MODULE_LICENSE("GPL"); | 44 | MODULE_LICENSE("GPL"); |
| 45 | MODULE_VERSION(CX88_VERSION); | ||
| 45 | 46 | ||
| 46 | static unsigned int mpegbufs = 32; | 47 | static unsigned int mpegbufs = 32; |
| 47 | module_param(mpegbufs,int,0644); | 48 | module_param(mpegbufs,int,0644); |
| @@ -730,7 +731,6 @@ static int vidioc_querycap (struct file *file, void *priv, | |||
| 730 | strcpy(cap->driver, "cx88_blackbird"); | 731 | strcpy(cap->driver, "cx88_blackbird"); |
| 731 | strlcpy(cap->card, core->board.name, sizeof(cap->card)); | 732 | strlcpy(cap->card, core->board.name, sizeof(cap->card)); |
| 732 | sprintf(cap->bus_info,"PCI:%s",pci_name(dev->pci)); | 733 | sprintf(cap->bus_info,"PCI:%s",pci_name(dev->pci)); |
| 733 | cap->version = CX88_VERSION_CODE; | ||
| 734 | cap->capabilities = | 734 | cap->capabilities = |
| 735 | V4L2_CAP_VIDEO_CAPTURE | | 735 | V4L2_CAP_VIDEO_CAPTURE | |
| 736 | V4L2_CAP_READWRITE | | 736 | V4L2_CAP_READWRITE | |
| @@ -1368,14 +1368,8 @@ static struct cx8802_driver cx8802_blackbird_driver = { | |||
| 1368 | 1368 | ||
| 1369 | static int __init blackbird_init(void) | 1369 | static int __init blackbird_init(void) |
| 1370 | { | 1370 | { |
| 1371 | printk(KERN_INFO "cx2388x blackbird driver version %d.%d.%d loaded\n", | 1371 | printk(KERN_INFO "cx2388x blackbird driver version %s loaded\n", |
| 1372 | (CX88_VERSION_CODE >> 16) & 0xff, | 1372 | CX88_VERSION); |
| 1373 | (CX88_VERSION_CODE >> 8) & 0xff, | ||
| 1374 | CX88_VERSION_CODE & 0xff); | ||
| 1375 | #ifdef SNAPSHOT | ||
| 1376 | printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n", | ||
| 1377 | SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100); | ||
| 1378 | #endif | ||
| 1379 | return cx8802_register_driver(&cx8802_blackbird_driver); | 1373 | return cx8802_register_driver(&cx8802_blackbird_driver); |
| 1380 | } | 1374 | } |
| 1381 | 1375 | ||
| @@ -1389,11 +1383,3 @@ module_exit(blackbird_fini); | |||
| 1389 | 1383 | ||
| 1390 | module_param_named(video_debug,cx8802_mpeg_template.debug, int, 0644); | 1384 | module_param_named(video_debug,cx8802_mpeg_template.debug, int, 0644); |
| 1391 | MODULE_PARM_DESC(debug,"enable debug messages [video]"); | 1385 | MODULE_PARM_DESC(debug,"enable debug messages [video]"); |
| 1392 | |||
| 1393 | /* ----------------------------------------------------------- */ | ||
| 1394 | /* | ||
| 1395 | * Local variables: | ||
| 1396 | * c-basic-offset: 8 | ||
| 1397 | * End: | ||
| 1398 | * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off | ||
| 1399 | */ | ||
diff --git a/drivers/media/video/cx88/cx88-cards.c b/drivers/media/video/cx88/cx88-cards.c index 27222c92b603..0d719faafd8a 100644 --- a/drivers/media/video/cx88/cx88-cards.c +++ b/drivers/media/video/cx88/cx88-cards.c | |||
| @@ -28,6 +28,7 @@ | |||
| 28 | 28 | ||
| 29 | #include "cx88.h" | 29 | #include "cx88.h" |
| 30 | #include "tea5767.h" | 30 | #include "tea5767.h" |
| 31 | #include "xc4000.h" | ||
| 31 | 32 | ||
| 32 | static unsigned int tuner[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET }; | 33 | static unsigned int tuner[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET }; |
| 33 | static unsigned int radio[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET }; | 34 | static unsigned int radio[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET }; |
| @@ -2119,6 +2120,99 @@ static const struct cx88_board cx88_boards[] = { | |||
| 2119 | }, | 2120 | }, |
| 2120 | .mpeg = CX88_MPEG_DVB, | 2121 | .mpeg = CX88_MPEG_DVB, |
| 2121 | }, | 2122 | }, |
| 2123 | [CX88_BOARD_WINFAST_DTV1800H_XC4000] = { | ||
| 2124 | .name = "Leadtek WinFast DTV1800 H (XC4000)", | ||
| 2125 | .tuner_type = TUNER_XC4000, | ||
| 2126 | .radio_type = TUNER_XC4000, | ||
| 2127 | .tuner_addr = 0x61, | ||
| 2128 | .radio_addr = 0x61, | ||
| 2129 | /* | ||
| 2130 | * GPIO setting | ||
| 2131 | * | ||
| 2132 | * 2: mute (0=off,1=on) | ||
| 2133 | * 12: tuner reset pin | ||
| 2134 | * 13: audio source (0=tuner audio,1=line in) | ||
| 2135 | * 14: FM (0=on,1=off ???) | ||
| 2136 | */ | ||
| 2137 | .input = {{ | ||
| 2138 | .type = CX88_VMUX_TELEVISION, | ||
| 2139 | .vmux = 0, | ||
| 2140 | .gpio0 = 0x0400, /* pin 2 = 0 */ | ||
| 2141 | .gpio1 = 0x6040, /* pin 13 = 0, pin 14 = 1 */ | ||
| 2142 | .gpio2 = 0x0000, | ||
| 2143 | }, { | ||
| 2144 | .type = CX88_VMUX_COMPOSITE1, | ||
| 2145 | .vmux = 1, | ||
| 2146 | .gpio0 = 0x0400, /* pin 2 = 0 */ | ||
| 2147 | .gpio1 = 0x6060, /* pin 13 = 1, pin 14 = 1 */ | ||
| 2148 | .gpio2 = 0x0000, | ||
| 2149 | }, { | ||
| 2150 | .type = CX88_VMUX_SVIDEO, | ||
| 2151 | .vmux = 2, | ||
| 2152 | .gpio0 = 0x0400, /* pin 2 = 0 */ | ||
| 2153 | .gpio1 = 0x6060, /* pin 13 = 1, pin 14 = 1 */ | ||
| 2154 | .gpio2 = 0x0000, | ||
| 2155 | }}, | ||
| 2156 | .radio = { | ||
| 2157 | .type = CX88_RADIO, | ||
| 2158 | .gpio0 = 0x0400, /* pin 2 = 0 */ | ||
| 2159 | .gpio1 = 0x6000, /* pin 13 = 0, pin 14 = 0 */ | ||
| 2160 | .gpio2 = 0x0000, | ||
| 2161 | }, | ||
| 2162 | .mpeg = CX88_MPEG_DVB, | ||
| 2163 | }, | ||
| 2164 | [CX88_BOARD_WINFAST_DTV2000H_PLUS] = { | ||
| 2165 | .name = "Leadtek WinFast DTV2000 H PLUS", | ||
| 2166 | .tuner_type = TUNER_XC4000, | ||
| 2167 | .radio_type = TUNER_XC4000, | ||
| 2168 | .tuner_addr = 0x61, | ||
| 2169 | .radio_addr = 0x61, | ||
| 2170 | /* | ||
| 2171 | * GPIO | ||
| 2172 | * 2: 1: mute audio | ||
| 2173 | * 12: 0: reset XC4000 | ||
| 2174 | * 13: 1: audio input is line in (0: tuner) | ||
| 2175 | * 14: 0: FM radio | ||
| 2176 | * 16: 0: RF input is cable | ||
| 2177 | */ | ||
| 2178 | .input = {{ | ||
| 2179 | .type = CX88_VMUX_TELEVISION, | ||
| 2180 | .vmux = 0, | ||
| 2181 | .gpio0 = 0x0403, | ||
| 2182 | .gpio1 = 0xF0D7, | ||
| 2183 | .gpio2 = 0x0101, | ||
| 2184 | .gpio3 = 0x0000, | ||
| 2185 | }, { | ||
| 2186 | .type = CX88_VMUX_CABLE, | ||
| 2187 | .vmux = 0, | ||
| 2188 | .gpio0 = 0x0403, | ||
| 2189 | .gpio1 = 0xF0D7, | ||
| 2190 | .gpio2 = 0x0100, | ||
| 2191 | .gpio3 = 0x0000, | ||
| 2192 | }, { | ||
| 2193 | .type = CX88_VMUX_COMPOSITE1, | ||
| 2194 | .vmux = 1, | ||
| 2195 | .gpio0 = 0x0403, /* was 0x0407 */ | ||
| 2196 | .gpio1 = 0xF0F7, | ||
| 2197 | .gpio2 = 0x0101, | ||
| 2198 | .gpio3 = 0x0000, | ||
| 2199 | }, { | ||
| 2200 | .type = CX88_VMUX_SVIDEO, | ||
| 2201 | .vmux = 2, | ||
| 2202 | .gpio0 = 0x0403, /* was 0x0407 */ | ||
| 2203 | .gpio1 = 0xF0F7, | ||
| 2204 | .gpio2 = 0x0101, | ||
| 2205 | .gpio3 = 0x0000, | ||
| 2206 | }}, | ||
| 2207 | .radio = { | ||
| 2208 | .type = CX88_RADIO, | ||
| 2209 | .gpio0 = 0x0403, | ||
| 2210 | .gpio1 = 0xF097, | ||
| 2211 | .gpio2 = 0x0100, | ||
| 2212 | .gpio3 = 0x0000, | ||
| 2213 | }, | ||
| 2214 | .mpeg = CX88_MPEG_DVB, | ||
| 2215 | }, | ||
| 2122 | [CX88_BOARD_PROF_7301] = { | 2216 | [CX88_BOARD_PROF_7301] = { |
| 2123 | .name = "Prof 7301 DVB-S/S2", | 2217 | .name = "Prof 7301 DVB-S/S2", |
| 2124 | .tuner_type = UNSET, | 2218 | .tuner_type = UNSET, |
| @@ -2581,6 +2675,15 @@ static const struct cx88_subid cx88_subids[] = { | |||
| 2581 | .subdevice = 0x6654, | 2675 | .subdevice = 0x6654, |
| 2582 | .card = CX88_BOARD_WINFAST_DTV1800H, | 2676 | .card = CX88_BOARD_WINFAST_DTV1800H, |
| 2583 | }, { | 2677 | }, { |
| 2678 | /* WinFast DTV1800 H with XC4000 tuner */ | ||
| 2679 | .subvendor = 0x107d, | ||
| 2680 | .subdevice = 0x6f38, | ||
| 2681 | .card = CX88_BOARD_WINFAST_DTV1800H_XC4000, | ||
| 2682 | }, { | ||
| 2683 | .subvendor = 0x107d, | ||
| 2684 | .subdevice = 0x6f42, | ||
| 2685 | .card = CX88_BOARD_WINFAST_DTV2000H_PLUS, | ||
| 2686 | }, { | ||
| 2584 | /* PVR2000 PAL Model [107d:6630] */ | 2687 | /* PVR2000 PAL Model [107d:6630] */ |
| 2585 | .subvendor = 0x107d, | 2688 | .subvendor = 0x107d, |
| 2586 | .subdevice = 0x6630, | 2689 | .subdevice = 0x6630, |
| @@ -2846,6 +2949,23 @@ static int cx88_xc3028_winfast1800h_callback(struct cx88_core *core, | |||
| 2846 | return -EINVAL; | 2949 | return -EINVAL; |
| 2847 | } | 2950 | } |
| 2848 | 2951 | ||
| 2952 | static int cx88_xc4000_winfast2000h_plus_callback(struct cx88_core *core, | ||
| 2953 | int command, int arg) | ||
| 2954 | { | ||
| 2955 | switch (command) { | ||
| 2956 | case XC4000_TUNER_RESET: | ||
| 2957 | /* GPIO 12 (xc4000 tuner reset) */ | ||
| 2958 | cx_set(MO_GP1_IO, 0x1010); | ||
| 2959 | mdelay(50); | ||
| 2960 | cx_clear(MO_GP1_IO, 0x10); | ||
| 2961 | mdelay(75); | ||
| 2962 | cx_set(MO_GP1_IO, 0x10); | ||
| 2963 | mdelay(75); | ||
| 2964 | return 0; | ||
| 2965 | } | ||
| 2966 | return -EINVAL; | ||
| 2967 | } | ||
| 2968 | |||
| 2849 | /* ------------------------------------------------------------------- */ | 2969 | /* ------------------------------------------------------------------- */ |
| 2850 | /* some Divco specific stuff */ | 2970 | /* some Divco specific stuff */ |
| 2851 | static int cx88_pv_8000gt_callback(struct cx88_core *core, | 2971 | static int cx88_pv_8000gt_callback(struct cx88_core *core, |
| @@ -2948,6 +3068,19 @@ static int cx88_xc2028_tuner_callback(struct cx88_core *core, | |||
| 2948 | return -EINVAL; | 3068 | return -EINVAL; |
| 2949 | } | 3069 | } |
| 2950 | 3070 | ||
| 3071 | static int cx88_xc4000_tuner_callback(struct cx88_core *core, | ||
| 3072 | int command, int arg) | ||
| 3073 | { | ||
| 3074 | /* Board-specific callbacks */ | ||
| 3075 | switch (core->boardnr) { | ||
| 3076 | case CX88_BOARD_WINFAST_DTV1800H_XC4000: | ||
| 3077 | case CX88_BOARD_WINFAST_DTV2000H_PLUS: | ||
| 3078 | return cx88_xc4000_winfast2000h_plus_callback(core, | ||
| 3079 | command, arg); | ||
| 3080 | } | ||
| 3081 | return -EINVAL; | ||
| 3082 | } | ||
| 3083 | |||
| 2951 | /* ----------------------------------------------------------------------- */ | 3084 | /* ----------------------------------------------------------------------- */ |
| 2952 | /* Tuner callback function. Currently only needed for the Pinnacle * | 3085 | /* Tuner callback function. Currently only needed for the Pinnacle * |
| 2953 | * PCTV HD 800i with an xc5000 sillicon tuner. This is used for both * | 3086 | * PCTV HD 800i with an xc5000 sillicon tuner. This is used for both * |
| @@ -3022,6 +3155,9 @@ int cx88_tuner_callback(void *priv, int component, int command, int arg) | |||
| 3022 | case TUNER_XC2028: | 3155 | case TUNER_XC2028: |
| 3023 | info_printk(core, "Calling XC2028/3028 callback\n"); | 3156 | info_printk(core, "Calling XC2028/3028 callback\n"); |
| 3024 | return cx88_xc2028_tuner_callback(core, command, arg); | 3157 | return cx88_xc2028_tuner_callback(core, command, arg); |
| 3158 | case TUNER_XC4000: | ||
| 3159 | info_printk(core, "Calling XC4000 callback\n"); | ||
| 3160 | return cx88_xc4000_tuner_callback(core, command, arg); | ||
| 3025 | case TUNER_XC5000: | 3161 | case TUNER_XC5000: |
| 3026 | info_printk(core, "Calling XC5000 callback\n"); | 3162 | info_printk(core, "Calling XC5000 callback\n"); |
| 3027 | return cx88_xc5000_tuner_callback(core, command, arg); | 3163 | return cx88_xc5000_tuner_callback(core, command, arg); |
| @@ -3109,13 +3245,13 @@ static void cx88_card_setup_pre_i2c(struct cx88_core *core) | |||
| 3109 | 3245 | ||
| 3110 | case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL: | 3246 | case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL: |
| 3111 | case CX88_BOARD_WINFAST_DTV1800H: | 3247 | case CX88_BOARD_WINFAST_DTV1800H: |
| 3112 | /* GPIO 12 (xc3028 tuner reset) */ | 3248 | cx88_xc3028_winfast1800h_callback(core, XC2028_TUNER_RESET, 0); |
| 3113 | cx_set(MO_GP1_IO, 0x1010); | 3249 | break; |
| 3114 | mdelay(50); | 3250 | |
| 3115 | cx_clear(MO_GP1_IO, 0x10); | 3251 | case CX88_BOARD_WINFAST_DTV1800H_XC4000: |
| 3116 | mdelay(50); | 3252 | case CX88_BOARD_WINFAST_DTV2000H_PLUS: |
| 3117 | cx_set(MO_GP1_IO, 0x10); | 3253 | cx88_xc4000_winfast2000h_plus_callback(core, |
| 3118 | mdelay(50); | 3254 | XC4000_TUNER_RESET, 0); |
| 3119 | break; | 3255 | break; |
| 3120 | 3256 | ||
| 3121 | case CX88_BOARD_TWINHAN_VP1027_DVBS: | 3257 | case CX88_BOARD_TWINHAN_VP1027_DVBS: |
diff --git a/drivers/media/video/cx88/cx88-core.c b/drivers/media/video/cx88/cx88-core.c index 2e145f0a5fd9..fbcaa1c5b09d 100644 --- a/drivers/media/video/cx88/cx88-core.c +++ b/drivers/media/video/cx88/cx88-core.c | |||
| @@ -636,6 +636,9 @@ int cx88_reset(struct cx88_core *core) | |||
| 636 | cx_write(MO_PCI_INTSTAT, 0xFFFFFFFF); // Clear PCI int | 636 | cx_write(MO_PCI_INTSTAT, 0xFFFFFFFF); // Clear PCI int |
| 637 | cx_write(MO_INT1_STAT, 0xFFFFFFFF); // Clear RISC int | 637 | cx_write(MO_INT1_STAT, 0xFFFFFFFF); // Clear RISC int |
| 638 | 638 | ||
| 639 | /* set default notch filter */ | ||
| 640 | cx_andor(MO_HTOTAL, 0x1800, (HLNotchFilter4xFsc << 11)); | ||
| 641 | |||
| 639 | /* Reset on-board parts */ | 642 | /* Reset on-board parts */ |
| 640 | cx_write(MO_SRST_IO, 0); | 643 | cx_write(MO_SRST_IO, 0); |
| 641 | msleep(10); | 644 | msleep(10); |
| @@ -759,8 +762,8 @@ int cx88_set_scale(struct cx88_core *core, unsigned int width, unsigned int heig | |||
| 759 | if (nocomb) | 762 | if (nocomb) |
| 760 | value |= (3 << 5); // disable comb filter | 763 | value |= (3 << 5); // disable comb filter |
| 761 | 764 | ||
| 762 | cx_write(MO_FILTER_EVEN, value); | 765 | cx_andor(MO_FILTER_EVEN, 0x7ffc7f, value); /* preserve PEAKEN, PSEL */ |
| 763 | cx_write(MO_FILTER_ODD, value); | 766 | cx_andor(MO_FILTER_ODD, 0x7ffc7f, value); |
| 764 | dprintk(1,"set_scale: filter 0x%04x\n", value); | 767 | dprintk(1,"set_scale: filter 0x%04x\n", value); |
| 765 | 768 | ||
| 766 | return 0; | 769 | return 0; |
| @@ -994,10 +997,10 @@ int cx88_set_tvnorm(struct cx88_core *core, v4l2_std_id norm) | |||
| 994 | // htotal | 997 | // htotal |
| 995 | tmp64 = norm_htotal(norm) * (u64)vdec_clock; | 998 | tmp64 = norm_htotal(norm) * (u64)vdec_clock; |
| 996 | do_div(tmp64, fsc8); | 999 | do_div(tmp64, fsc8); |
| 997 | htotal = (u32)tmp64 | (HLNotchFilter4xFsc << 11); | 1000 | htotal = (u32)tmp64; |
| 998 | dprintk(1,"set_tvnorm: MO_HTOTAL 0x%08x [old=0x%08x,htotal=%d]\n", | 1001 | dprintk(1,"set_tvnorm: MO_HTOTAL 0x%08x [old=0x%08x,htotal=%d]\n", |
| 999 | htotal, cx_read(MO_HTOTAL), (u32)tmp64); | 1002 | htotal, cx_read(MO_HTOTAL), (u32)tmp64); |
| 1000 | cx_write(MO_HTOTAL, htotal); | 1003 | cx_andor(MO_HTOTAL, 0x07ff, htotal); |
| 1001 | 1004 | ||
| 1002 | // vbi stuff, set vbi offset to 10 (for 20 Clk*2 pixels), this makes | 1005 | // vbi stuff, set vbi offset to 10 (for 20 Clk*2 pixels), this makes |
| 1003 | // the effective vbi offset ~244 samples, the same as the Bt8x8 | 1006 | // the effective vbi offset ~244 samples, the same as the Bt8x8 |
diff --git a/drivers/media/video/cx88/cx88-dvb.c b/drivers/media/video/cx88/cx88-dvb.c index c69df7ebb6a7..cf3d33ab541b 100644 --- a/drivers/media/video/cx88/cx88-dvb.c +++ b/drivers/media/video/cx88/cx88-dvb.c | |||
| @@ -41,6 +41,7 @@ | |||
| 41 | #include "or51132.h" | 41 | #include "or51132.h" |
| 42 | #include "lgdt330x.h" | 42 | #include "lgdt330x.h" |
| 43 | #include "s5h1409.h" | 43 | #include "s5h1409.h" |
| 44 | #include "xc4000.h" | ||
| 44 | #include "xc5000.h" | 45 | #include "xc5000.h" |
| 45 | #include "nxt200x.h" | 46 | #include "nxt200x.h" |
| 46 | #include "cx24123.h" | 47 | #include "cx24123.h" |
| @@ -63,6 +64,7 @@ MODULE_DESCRIPTION("driver for cx2388x based DVB cards"); | |||
| 63 | MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>"); | 64 | MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>"); |
| 64 | MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); | 65 | MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); |
| 65 | MODULE_LICENSE("GPL"); | 66 | MODULE_LICENSE("GPL"); |
| 67 | MODULE_VERSION(CX88_VERSION); | ||
| 66 | 68 | ||
| 67 | static unsigned int debug; | 69 | static unsigned int debug; |
| 68 | module_param(debug, int, 0644); | 70 | module_param(debug, int, 0644); |
| @@ -605,6 +607,39 @@ static int attach_xc3028(u8 addr, struct cx8802_dev *dev) | |||
| 605 | return 0; | 607 | return 0; |
| 606 | } | 608 | } |
| 607 | 609 | ||
| 610 | static int attach_xc4000(struct cx8802_dev *dev, struct xc4000_config *cfg) | ||
| 611 | { | ||
| 612 | struct dvb_frontend *fe; | ||
| 613 | struct videobuf_dvb_frontend *fe0 = NULL; | ||
| 614 | |||
| 615 | /* Get the first frontend */ | ||
| 616 | fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1); | ||
| 617 | if (!fe0) | ||
| 618 | return -EINVAL; | ||
| 619 | |||
| 620 | if (!fe0->dvb.frontend) { | ||
| 621 | printk(KERN_ERR "%s/2: dvb frontend not attached. " | ||
| 622 | "Can't attach xc4000\n", | ||
| 623 | dev->core->name); | ||
| 624 | return -EINVAL; | ||
| 625 | } | ||
| 626 | |||
| 627 | fe = dvb_attach(xc4000_attach, fe0->dvb.frontend, &dev->core->i2c_adap, | ||
| 628 | cfg); | ||
| 629 | if (!fe) { | ||
| 630 | printk(KERN_ERR "%s/2: xc4000 attach failed\n", | ||
| 631 | dev->core->name); | ||
| 632 | dvb_frontend_detach(fe0->dvb.frontend); | ||
| 633 | dvb_unregister_frontend(fe0->dvb.frontend); | ||
| 634 | fe0->dvb.frontend = NULL; | ||
| 635 | return -EINVAL; | ||
| 636 | } | ||
| 637 | |||
| 638 | printk(KERN_INFO "%s/2: xc4000 attached\n", dev->core->name); | ||
| 639 | |||
| 640 | return 0; | ||
| 641 | } | ||
| 642 | |||
| 608 | static int cx24116_set_ts_param(struct dvb_frontend *fe, | 643 | static int cx24116_set_ts_param(struct dvb_frontend *fe, |
| 609 | int is_punctured) | 644 | int is_punctured) |
| 610 | { | 645 | { |
| @@ -1294,7 +1329,25 @@ static int dvb_register(struct cx8802_dev *dev) | |||
| 1294 | goto frontend_detach; | 1329 | goto frontend_detach; |
| 1295 | } | 1330 | } |
| 1296 | break; | 1331 | break; |
| 1297 | case CX88_BOARD_GENIATECH_X8000_MT: | 1332 | case CX88_BOARD_WINFAST_DTV1800H_XC4000: |
| 1333 | case CX88_BOARD_WINFAST_DTV2000H_PLUS: | ||
| 1334 | fe0->dvb.frontend = dvb_attach(zl10353_attach, | ||
| 1335 | &cx88_pinnacle_hybrid_pctv, | ||
| 1336 | &core->i2c_adap); | ||
| 1337 | if (fe0->dvb.frontend) { | ||
| 1338 | struct xc4000_config cfg = { | ||
| 1339 | .i2c_address = 0x61, | ||
| 1340 | .default_pm = 0, | ||
| 1341 | .dvb_amplitude = 134, | ||
| 1342 | .set_smoothedcvbs = 1, | ||
| 1343 | .if_khz = 4560 | ||
| 1344 | }; | ||
| 1345 | fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL; | ||
| 1346 | if (attach_xc4000(dev, &cfg) < 0) | ||
| 1347 | goto frontend_detach; | ||
| 1348 | } | ||
| 1349 | break; | ||
| 1350 | case CX88_BOARD_GENIATECH_X8000_MT: | ||
| 1298 | dev->ts_gen_cntrl = 0x00; | 1351 | dev->ts_gen_cntrl = 0x00; |
| 1299 | 1352 | ||
| 1300 | fe0->dvb.frontend = dvb_attach(zl10353_attach, | 1353 | fe0->dvb.frontend = dvb_attach(zl10353_attach, |
| @@ -1577,6 +1630,11 @@ static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv) | |||
| 1577 | udelay(1000); | 1630 | udelay(1000); |
| 1578 | break; | 1631 | break; |
| 1579 | 1632 | ||
| 1633 | case CX88_BOARD_WINFAST_DTV2000H_PLUS: | ||
| 1634 | /* set RF input to AIR for DVB-T (GPIO 16) */ | ||
| 1635 | cx_write(MO_GP2_IO, 0x0101); | ||
| 1636 | break; | ||
| 1637 | |||
| 1580 | default: | 1638 | default: |
| 1581 | err = -ENODEV; | 1639 | err = -ENODEV; |
| 1582 | } | 1640 | } |
| @@ -1692,14 +1750,8 @@ static struct cx8802_driver cx8802_dvb_driver = { | |||
| 1692 | 1750 | ||
| 1693 | static int __init dvb_init(void) | 1751 | static int __init dvb_init(void) |
| 1694 | { | 1752 | { |
| 1695 | printk(KERN_INFO "cx88/2: cx2388x dvb driver version %d.%d.%d loaded\n", | 1753 | printk(KERN_INFO "cx88/2: cx2388x dvb driver version %s loaded\n", |
| 1696 | (CX88_VERSION_CODE >> 16) & 0xff, | 1754 | CX88_VERSION); |
| 1697 | (CX88_VERSION_CODE >> 8) & 0xff, | ||
| 1698 | CX88_VERSION_CODE & 0xff); | ||
| 1699 | #ifdef SNAPSHOT | ||
| 1700 | printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n", | ||
| 1701 | SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100); | ||
| 1702 | #endif | ||
| 1703 | return cx8802_register_driver(&cx8802_dvb_driver); | 1755 | return cx8802_register_driver(&cx8802_dvb_driver); |
| 1704 | } | 1756 | } |
| 1705 | 1757 | ||
| @@ -1710,10 +1762,3 @@ static void __exit dvb_fini(void) | |||
| 1710 | 1762 | ||
| 1711 | module_init(dvb_init); | 1763 | module_init(dvb_init); |
| 1712 | module_exit(dvb_fini); | 1764 | module_exit(dvb_fini); |
| 1713 | |||
| 1714 | /* | ||
| 1715 | * Local variables: | ||
| 1716 | * c-basic-offset: 8 | ||
| 1717 | * compile-command: "make DVB=1" | ||
| 1718 | * End: | ||
| 1719 | */ | ||
diff --git a/drivers/media/video/cx88/cx88-input.c b/drivers/media/video/cx88/cx88-input.c index 3f442003623d..e614201b5ed3 100644 --- a/drivers/media/video/cx88/cx88-input.c +++ b/drivers/media/video/cx88/cx88-input.c | |||
| @@ -100,6 +100,8 @@ static void cx88_ir_handle_key(struct cx88_IR *ir) | |||
| 100 | break; | 100 | break; |
| 101 | case CX88_BOARD_WINFAST_DTV1000: | 101 | case CX88_BOARD_WINFAST_DTV1000: |
| 102 | case CX88_BOARD_WINFAST_DTV1800H: | 102 | case CX88_BOARD_WINFAST_DTV1800H: |
| 103 | case CX88_BOARD_WINFAST_DTV1800H_XC4000: | ||
| 104 | case CX88_BOARD_WINFAST_DTV2000H_PLUS: | ||
| 103 | case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL: | 105 | case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL: |
| 104 | gpio = (gpio & 0x6ff) | ((cx_read(MO_GP1_IO) << 8) & 0x900); | 106 | gpio = (gpio & 0x6ff) | ((cx_read(MO_GP1_IO) << 8) & 0x900); |
| 105 | auxgpio = gpio; | 107 | auxgpio = gpio; |
| @@ -289,6 +291,8 @@ int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci) | |||
| 289 | case CX88_BOARD_WINFAST_DTV2000H: | 291 | case CX88_BOARD_WINFAST_DTV2000H: |
| 290 | case CX88_BOARD_WINFAST_DTV2000H_J: | 292 | case CX88_BOARD_WINFAST_DTV2000H_J: |
| 291 | case CX88_BOARD_WINFAST_DTV1800H: | 293 | case CX88_BOARD_WINFAST_DTV1800H: |
| 294 | case CX88_BOARD_WINFAST_DTV1800H_XC4000: | ||
| 295 | case CX88_BOARD_WINFAST_DTV2000H_PLUS: | ||
| 292 | ir_codes = RC_MAP_WINFAST; | 296 | ir_codes = RC_MAP_WINFAST; |
| 293 | ir->gpio_addr = MO_GP0_IO; | 297 | ir->gpio_addr = MO_GP0_IO; |
| 294 | ir->mask_keycode = 0x8f8; | 298 | ir->mask_keycode = 0x8f8; |
diff --git a/drivers/media/video/cx88/cx88-mpeg.c b/drivers/media/video/cx88/cx88-mpeg.c index 1a7b983f8297..cd5386ee210c 100644 --- a/drivers/media/video/cx88/cx88-mpeg.c +++ b/drivers/media/video/cx88/cx88-mpeg.c | |||
| @@ -39,6 +39,7 @@ MODULE_AUTHOR("Jelle Foks <jelle@foks.us>"); | |||
| 39 | MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>"); | 39 | MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>"); |
| 40 | MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); | 40 | MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); |
| 41 | MODULE_LICENSE("GPL"); | 41 | MODULE_LICENSE("GPL"); |
| 42 | MODULE_VERSION(CX88_VERSION); | ||
| 42 | 43 | ||
| 43 | static unsigned int debug; | 44 | static unsigned int debug; |
| 44 | module_param(debug,int,0644); | 45 | module_param(debug,int,0644); |
| @@ -613,13 +614,17 @@ static int cx8802_request_acquire(struct cx8802_driver *drv) | |||
| 613 | core->active_type_id != drv->type_id) | 614 | core->active_type_id != drv->type_id) |
| 614 | return -EBUSY; | 615 | return -EBUSY; |
| 615 | 616 | ||
| 616 | core->input = 0; | 617 | if (drv->type_id == CX88_MPEG_DVB) { |
| 617 | for (i = 0; | 618 | /* When switching to DVB, always set the input to the tuner */ |
| 618 | i < (sizeof(core->board.input) / sizeof(struct cx88_input)); | 619 | core->last_analog_input = core->input; |
| 619 | i++) { | 620 | core->input = 0; |
| 620 | if (core->board.input[i].type == CX88_VMUX_DVB) { | 621 | for (i = 0; |
| 621 | core->input = i; | 622 | i < (sizeof(core->board.input) / sizeof(struct cx88_input)); |
| 622 | break; | 623 | i++) { |
| 624 | if (core->board.input[i].type == CX88_VMUX_DVB) { | ||
| 625 | core->input = i; | ||
| 626 | break; | ||
| 627 | } | ||
| 623 | } | 628 | } |
| 624 | } | 629 | } |
| 625 | 630 | ||
| @@ -644,6 +649,12 @@ static int cx8802_request_release(struct cx8802_driver *drv) | |||
| 644 | 649 | ||
| 645 | if (drv->advise_release && --core->active_ref == 0) | 650 | if (drv->advise_release && --core->active_ref == 0) |
| 646 | { | 651 | { |
| 652 | if (drv->type_id == CX88_MPEG_DVB) { | ||
| 653 | /* If the DVB driver is releasing, reset the input | ||
| 654 | state to the last configured analog input */ | ||
| 655 | core->input = core->last_analog_input; | ||
| 656 | } | ||
| 657 | |||
| 647 | drv->advise_release(drv); | 658 | drv->advise_release(drv); |
| 648 | core->active_type_id = CX88_BOARD_NONE; | 659 | core->active_type_id = CX88_BOARD_NONE; |
| 649 | mpeg_dbg(1,"%s() Post release GPIO=%x\n", __func__, cx_read(MO_GP0_IO)); | 660 | mpeg_dbg(1,"%s() Post release GPIO=%x\n", __func__, cx_read(MO_GP0_IO)); |
| @@ -890,14 +901,8 @@ static struct pci_driver cx8802_pci_driver = { | |||
| 890 | 901 | ||
| 891 | static int __init cx8802_init(void) | 902 | static int __init cx8802_init(void) |
| 892 | { | 903 | { |
| 893 | printk(KERN_INFO "cx88/2: cx2388x MPEG-TS Driver Manager version %d.%d.%d loaded\n", | 904 | printk(KERN_INFO "cx88/2: cx2388x MPEG-TS Driver Manager version %s loaded\n", |
| 894 | (CX88_VERSION_CODE >> 16) & 0xff, | 905 | CX88_VERSION); |
| 895 | (CX88_VERSION_CODE >> 8) & 0xff, | ||
| 896 | CX88_VERSION_CODE & 0xff); | ||
| 897 | #ifdef SNAPSHOT | ||
| 898 | printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n", | ||
| 899 | SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100); | ||
| 900 | #endif | ||
| 901 | return pci_register_driver(&cx8802_pci_driver); | 906 | return pci_register_driver(&cx8802_pci_driver); |
| 902 | } | 907 | } |
| 903 | 908 | ||
diff --git a/drivers/media/video/cx88/cx88-video.c b/drivers/media/video/cx88/cx88-video.c index cef4f282e5aa..60d28fdd7791 100644 --- a/drivers/media/video/cx88/cx88-video.c +++ b/drivers/media/video/cx88/cx88-video.c | |||
| @@ -45,6 +45,7 @@ | |||
| 45 | MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards"); | 45 | MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards"); |
| 46 | MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); | 46 | MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); |
| 47 | MODULE_LICENSE("GPL"); | 47 | MODULE_LICENSE("GPL"); |
| 48 | MODULE_VERSION(CX88_VERSION); | ||
| 48 | 49 | ||
| 49 | /* ------------------------------------------------------------------ */ | 50 | /* ------------------------------------------------------------------ */ |
| 50 | 51 | ||
| @@ -220,7 +221,23 @@ static const struct cx88_ctrl cx8800_ctls[] = { | |||
| 220 | .reg = MO_UV_SATURATION, | 221 | .reg = MO_UV_SATURATION, |
| 221 | .mask = 0x00ff, | 222 | .mask = 0x00ff, |
| 222 | .shift = 0, | 223 | .shift = 0, |
| 223 | },{ | 224 | }, { |
| 225 | .v = { | ||
| 226 | .id = V4L2_CID_SHARPNESS, | ||
| 227 | .name = "Sharpness", | ||
| 228 | .minimum = 0, | ||
| 229 | .maximum = 4, | ||
| 230 | .step = 1, | ||
| 231 | .default_value = 0x0, | ||
| 232 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 233 | }, | ||
| 234 | .off = 0, | ||
| 235 | /* NOTE: the value is converted and written to both even | ||
| 236 | and odd registers in the code */ | ||
| 237 | .reg = MO_FILTER_ODD, | ||
| 238 | .mask = 7 << 7, | ||
| 239 | .shift = 7, | ||
| 240 | }, { | ||
| 224 | .v = { | 241 | .v = { |
| 225 | .id = V4L2_CID_CHROMA_AGC, | 242 | .id = V4L2_CID_CHROMA_AGC, |
| 226 | .name = "Chroma AGC", | 243 | .name = "Chroma AGC", |
| @@ -245,6 +262,20 @@ static const struct cx88_ctrl cx8800_ctls[] = { | |||
| 245 | .mask = 1 << 9, | 262 | .mask = 1 << 9, |
| 246 | .shift = 9, | 263 | .shift = 9, |
| 247 | }, { | 264 | }, { |
| 265 | .v = { | ||
| 266 | .id = V4L2_CID_BAND_STOP_FILTER, | ||
| 267 | .name = "Notch filter", | ||
| 268 | .minimum = 0, | ||
| 269 | .maximum = 3, | ||
| 270 | .step = 1, | ||
| 271 | .default_value = 0x0, | ||
| 272 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 273 | }, | ||
| 274 | .off = 0, | ||
| 275 | .reg = MO_HTOTAL, | ||
| 276 | .mask = 3 << 11, | ||
| 277 | .shift = 11, | ||
| 278 | }, { | ||
| 248 | /* --- audio --- */ | 279 | /* --- audio --- */ |
| 249 | .v = { | 280 | .v = { |
| 250 | .id = V4L2_CID_AUDIO_MUTE, | 281 | .id = V4L2_CID_AUDIO_MUTE, |
| @@ -300,8 +331,10 @@ const u32 cx88_user_ctrls[] = { | |||
| 300 | V4L2_CID_AUDIO_VOLUME, | 331 | V4L2_CID_AUDIO_VOLUME, |
| 301 | V4L2_CID_AUDIO_BALANCE, | 332 | V4L2_CID_AUDIO_BALANCE, |
| 302 | V4L2_CID_AUDIO_MUTE, | 333 | V4L2_CID_AUDIO_MUTE, |
| 334 | V4L2_CID_SHARPNESS, | ||
| 303 | V4L2_CID_CHROMA_AGC, | 335 | V4L2_CID_CHROMA_AGC, |
| 304 | V4L2_CID_COLOR_KILLER, | 336 | V4L2_CID_COLOR_KILLER, |
| 337 | V4L2_CID_BAND_STOP_FILTER, | ||
| 305 | 0 | 338 | 0 |
| 306 | }; | 339 | }; |
| 307 | EXPORT_SYMBOL(cx88_user_ctrls); | 340 | EXPORT_SYMBOL(cx88_user_ctrls); |
| @@ -962,6 +995,10 @@ int cx88_get_control (struct cx88_core *core, struct v4l2_control *ctl) | |||
| 962 | case V4L2_CID_AUDIO_VOLUME: | 995 | case V4L2_CID_AUDIO_VOLUME: |
| 963 | ctl->value = 0x3f - (value & 0x3f); | 996 | ctl->value = 0x3f - (value & 0x3f); |
| 964 | break; | 997 | break; |
| 998 | case V4L2_CID_SHARPNESS: | ||
| 999 | ctl->value = ((value & 0x0200) ? (((value & 0x0180) >> 7) + 1) | ||
| 1000 | : 0); | ||
| 1001 | break; | ||
| 965 | default: | 1002 | default: |
| 966 | ctl->value = ((value + (c->off << c->shift)) & c->mask) >> c->shift; | 1003 | ctl->value = ((value + (c->off << c->shift)) & c->mask) >> c->shift; |
| 967 | break; | 1004 | break; |
| @@ -1039,6 +1076,12 @@ int cx88_set_control(struct cx88_core *core, struct v4l2_control *ctl) | |||
| 1039 | } | 1076 | } |
| 1040 | mask=0xffff; | 1077 | mask=0xffff; |
| 1041 | break; | 1078 | break; |
| 1079 | case V4L2_CID_SHARPNESS: | ||
| 1080 | /* 0b000, 0b100, 0b101, 0b110, or 0b111 */ | ||
| 1081 | value = (ctl->value < 1 ? 0 : ((ctl->value + 3) << 7)); | ||
| 1082 | /* needs to be set for both fields */ | ||
| 1083 | cx_andor(MO_FILTER_EVEN, mask, value); | ||
| 1084 | break; | ||
| 1042 | case V4L2_CID_CHROMA_AGC: | 1085 | case V4L2_CID_CHROMA_AGC: |
| 1043 | /* Do not allow chroma AGC to be enabled for SECAM */ | 1086 | /* Do not allow chroma AGC to be enabled for SECAM */ |
| 1044 | value = ((ctl->value - c->off) << c->shift) & c->mask; | 1087 | value = ((ctl->value - c->off) << c->shift) & c->mask; |
| @@ -1161,7 +1204,6 @@ static int vidioc_querycap (struct file *file, void *priv, | |||
| 1161 | strcpy(cap->driver, "cx8800"); | 1204 | strcpy(cap->driver, "cx8800"); |
| 1162 | strlcpy(cap->card, core->board.name, sizeof(cap->card)); | 1205 | strlcpy(cap->card, core->board.name, sizeof(cap->card)); |
| 1163 | sprintf(cap->bus_info,"PCI:%s",pci_name(dev->pci)); | 1206 | sprintf(cap->bus_info,"PCI:%s",pci_name(dev->pci)); |
| 1164 | cap->version = CX88_VERSION_CODE; | ||
| 1165 | cap->capabilities = | 1207 | cap->capabilities = |
| 1166 | V4L2_CAP_VIDEO_CAPTURE | | 1208 | V4L2_CAP_VIDEO_CAPTURE | |
| 1167 | V4L2_CAP_READWRITE | | 1209 | V4L2_CAP_READWRITE | |
| @@ -1480,7 +1522,6 @@ static int radio_querycap (struct file *file, void *priv, | |||
| 1480 | strcpy(cap->driver, "cx8800"); | 1522 | strcpy(cap->driver, "cx8800"); |
| 1481 | strlcpy(cap->card, core->board.name, sizeof(cap->card)); | 1523 | strlcpy(cap->card, core->board.name, sizeof(cap->card)); |
| 1482 | sprintf(cap->bus_info,"PCI:%s", pci_name(dev->pci)); | 1524 | sprintf(cap->bus_info,"PCI:%s", pci_name(dev->pci)); |
| 1483 | cap->version = CX88_VERSION_CODE; | ||
| 1484 | cap->capabilities = V4L2_CAP_TUNER; | 1525 | cap->capabilities = V4L2_CAP_TUNER; |
| 1485 | return 0; | 1526 | return 0; |
| 1486 | } | 1527 | } |
| @@ -2139,14 +2180,8 @@ static struct pci_driver cx8800_pci_driver = { | |||
| 2139 | 2180 | ||
| 2140 | static int __init cx8800_init(void) | 2181 | static int __init cx8800_init(void) |
| 2141 | { | 2182 | { |
| 2142 | printk(KERN_INFO "cx88/0: cx2388x v4l2 driver version %d.%d.%d loaded\n", | 2183 | printk(KERN_INFO "cx88/0: cx2388x v4l2 driver version %s loaded\n", |
| 2143 | (CX88_VERSION_CODE >> 16) & 0xff, | 2184 | CX88_VERSION); |
| 2144 | (CX88_VERSION_CODE >> 8) & 0xff, | ||
| 2145 | CX88_VERSION_CODE & 0xff); | ||
| 2146 | #ifdef SNAPSHOT | ||
| 2147 | printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n", | ||
| 2148 | SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100); | ||
| 2149 | #endif | ||
| 2150 | return pci_register_driver(&cx8800_pci_driver); | 2185 | return pci_register_driver(&cx8800_pci_driver); |
| 2151 | } | 2186 | } |
| 2152 | 2187 | ||
| @@ -2157,11 +2192,3 @@ static void __exit cx8800_fini(void) | |||
| 2157 | 2192 | ||
| 2158 | module_init(cx8800_init); | 2193 | module_init(cx8800_init); |
| 2159 | module_exit(cx8800_fini); | 2194 | module_exit(cx8800_fini); |
| 2160 | |||
| 2161 | /* ----------------------------------------------------------- */ | ||
| 2162 | /* | ||
| 2163 | * Local variables: | ||
| 2164 | * c-basic-offset: 8 | ||
| 2165 | * End: | ||
| 2166 | * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off | ||
| 2167 | */ | ||
diff --git a/drivers/media/video/cx88/cx88.h b/drivers/media/video/cx88/cx88.h index a399a8b086ba..fa8d307e1a3d 100644 --- a/drivers/media/video/cx88/cx88.h +++ b/drivers/media/video/cx88/cx88.h | |||
| @@ -39,9 +39,9 @@ | |||
| 39 | #include "cx88-reg.h" | 39 | #include "cx88-reg.h" |
| 40 | #include "tuner-xc2028.h" | 40 | #include "tuner-xc2028.h" |
| 41 | 41 | ||
| 42 | #include <linux/version.h> | ||
| 43 | #include <linux/mutex.h> | 42 | #include <linux/mutex.h> |
| 44 | #define CX88_VERSION_CODE KERNEL_VERSION(0, 0, 8) | 43 | |
| 44 | #define CX88_VERSION "0.0.9" | ||
| 45 | 45 | ||
| 46 | #define UNSET (-1U) | 46 | #define UNSET (-1U) |
| 47 | 47 | ||
| @@ -242,6 +242,8 @@ extern const struct sram_channel const cx88_sram_channels[]; | |||
| 242 | #define CX88_BOARD_SAMSUNG_SMT_7020 84 | 242 | #define CX88_BOARD_SAMSUNG_SMT_7020 84 |
| 243 | #define CX88_BOARD_TWINHAN_VP1027_DVBS 85 | 243 | #define CX88_BOARD_TWINHAN_VP1027_DVBS 85 |
| 244 | #define CX88_BOARD_TEVII_S464 86 | 244 | #define CX88_BOARD_TEVII_S464 86 |
| 245 | #define CX88_BOARD_WINFAST_DTV2000H_PLUS 87 | ||
| 246 | #define CX88_BOARD_WINFAST_DTV1800H_XC4000 88 | ||
| 245 | 247 | ||
| 246 | enum cx88_itype { | 248 | enum cx88_itype { |
| 247 | CX88_VMUX_COMPOSITE1 = 1, | 249 | CX88_VMUX_COMPOSITE1 = 1, |
| @@ -375,6 +377,7 @@ struct cx88_core { | |||
| 375 | u32 audiomode_manual; | 377 | u32 audiomode_manual; |
| 376 | u32 audiomode_current; | 378 | u32 audiomode_current; |
| 377 | u32 input; | 379 | u32 input; |
| 380 | u32 last_analog_input; | ||
| 378 | u32 astat; | 381 | u32 astat; |
| 379 | u32 use_nicam; | 382 | u32 use_nicam; |
| 380 | unsigned long last_change; | 383 | unsigned long last_change; |
diff --git a/drivers/media/video/davinci/Kconfig b/drivers/media/video/davinci/Kconfig index 6b1954035649..60a456ebdc7c 100644 --- a/drivers/media/video/davinci/Kconfig +++ b/drivers/media/video/davinci/Kconfig | |||
| @@ -91,3 +91,26 @@ config VIDEO_ISIF | |||
| 91 | 91 | ||
| 92 | To compile this driver as a module, choose M here: the | 92 | To compile this driver as a module, choose M here: the |
| 93 | module will be called vpfe. | 93 | module will be called vpfe. |
| 94 | |||
| 95 | config VIDEO_DM644X_VPBE | ||
| 96 | tristate "DM644X VPBE HW module" | ||
| 97 | depends on ARCH_DAVINCI_DM644x | ||
| 98 | select VIDEO_VPSS_SYSTEM | ||
| 99 | select VIDEOBUF_DMA_CONTIG | ||
| 100 | help | ||
| 101 | Enables VPBE modules used for display on a DM644x | ||
| 102 | SoC. | ||
| 103 | |||
| 104 | To compile this driver as a module, choose M here: the | ||
| 105 | module will be called vpbe. | ||
| 106 | |||
| 107 | |||
| 108 | config VIDEO_VPBE_DISPLAY | ||
| 109 | tristate "VPBE V4L2 Display driver" | ||
| 110 | depends on ARCH_DAVINCI_DM644x | ||
| 111 | select VIDEO_DM644X_VPBE | ||
| 112 | help | ||
| 113 | Enables VPBE V4L2 Display driver on a DM644x device | ||
| 114 | |||
| 115 | To compile this driver as a module, choose M here: the | ||
| 116 | module will be called vpbe_display. | ||
diff --git a/drivers/media/video/davinci/Makefile b/drivers/media/video/davinci/Makefile index a37955745aaa..ae7dafb689ab 100644 --- a/drivers/media/video/davinci/Makefile +++ b/drivers/media/video/davinci/Makefile | |||
| @@ -16,3 +16,5 @@ obj-$(CONFIG_VIDEO_VPFE_CAPTURE) += vpfe_capture.o | |||
| 16 | obj-$(CONFIG_VIDEO_DM6446_CCDC) += dm644x_ccdc.o | 16 | obj-$(CONFIG_VIDEO_DM6446_CCDC) += dm644x_ccdc.o |
| 17 | obj-$(CONFIG_VIDEO_DM355_CCDC) += dm355_ccdc.o | 17 | obj-$(CONFIG_VIDEO_DM355_CCDC) += dm355_ccdc.o |
| 18 | obj-$(CONFIG_VIDEO_ISIF) += isif.o | 18 | obj-$(CONFIG_VIDEO_ISIF) += isif.o |
| 19 | obj-$(CONFIG_VIDEO_DM644X_VPBE) += vpbe.o vpbe_osd.o vpbe_venc.o | ||
| 20 | obj-$(CONFIG_VIDEO_VPBE_DISPLAY) += vpbe_display.o | ||
diff --git a/drivers/media/video/davinci/vpbe.c b/drivers/media/video/davinci/vpbe.c new file mode 100644 index 000000000000..d773d30de221 --- /dev/null +++ b/drivers/media/video/davinci/vpbe.c | |||
| @@ -0,0 +1,864 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2010 Texas Instruments Inc | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or modify | ||
| 5 | * it under the terms of the GNU General Public License as published by | ||
| 6 | * the Free Software Foundation version 2. | ||
| 7 | * | ||
| 8 | * This program is distributed in the hope that it will be useful, | ||
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 11 | * GNU General Public License for more details. | ||
| 12 | * | ||
| 13 | * You should have received a copy of the GNU General Public License | ||
| 14 | * along with this program; if not, write to the Free Software | ||
| 15 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 16 | */ | ||
| 17 | #include <linux/kernel.h> | ||
| 18 | #include <linux/init.h> | ||
| 19 | #include <linux/module.h> | ||
| 20 | #include <linux/errno.h> | ||
| 21 | #include <linux/fs.h> | ||
| 22 | #include <linux/string.h> | ||
| 23 | #include <linux/wait.h> | ||
| 24 | #include <linux/time.h> | ||
| 25 | #include <linux/platform_device.h> | ||
| 26 | #include <linux/io.h> | ||
| 27 | #include <linux/slab.h> | ||
| 28 | #include <linux/clk.h> | ||
| 29 | #include <linux/err.h> | ||
| 30 | |||
| 31 | #include <media/v4l2-device.h> | ||
| 32 | #include <media/davinci/vpbe_types.h> | ||
| 33 | #include <media/davinci/vpbe.h> | ||
| 34 | #include <media/davinci/vpss.h> | ||
| 35 | #include <media/davinci/vpbe_venc.h> | ||
| 36 | |||
| 37 | #define VPBE_DEFAULT_OUTPUT "Composite" | ||
| 38 | #define VPBE_DEFAULT_MODE "ntsc" | ||
| 39 | |||
| 40 | static char *def_output = VPBE_DEFAULT_OUTPUT; | ||
| 41 | static char *def_mode = VPBE_DEFAULT_MODE; | ||
| 42 | static int debug; | ||
| 43 | |||
| 44 | module_param(def_output, charp, S_IRUGO); | ||
| 45 | module_param(def_mode, charp, S_IRUGO); | ||
| 46 | module_param(debug, int, 0644); | ||
| 47 | |||
| 48 | MODULE_PARM_DESC(def_output, "vpbe output name (default:Composite)"); | ||
| 49 | MODULE_PARM_DESC(def_mode, "vpbe output mode name (default:ntsc"); | ||
| 50 | MODULE_PARM_DESC(debug, "Debug level 0-1"); | ||
| 51 | |||
| 52 | MODULE_DESCRIPTION("TI DMXXX VPBE Display controller"); | ||
| 53 | MODULE_LICENSE("GPL"); | ||
| 54 | MODULE_AUTHOR("Texas Instruments"); | ||
| 55 | |||
| 56 | /** | ||
| 57 | * vpbe_current_encoder_info - Get config info for current encoder | ||
| 58 | * @vpbe_dev - vpbe device ptr | ||
| 59 | * | ||
| 60 | * Return ptr to current encoder config info | ||
| 61 | */ | ||
| 62 | static struct encoder_config_info* | ||
| 63 | vpbe_current_encoder_info(struct vpbe_device *vpbe_dev) | ||
| 64 | { | ||
| 65 | struct vpbe_config *cfg = vpbe_dev->cfg; | ||
| 66 | int index = vpbe_dev->current_sd_index; | ||
| 67 | |||
| 68 | return ((index == 0) ? &cfg->venc : | ||
| 69 | &cfg->ext_encoders[index-1]); | ||
| 70 | } | ||
| 71 | |||
| 72 | /** | ||
| 73 | * vpbe_find_encoder_sd_index - Given a name find encoder sd index | ||
| 74 | * | ||
| 75 | * @vpbe_config - ptr to vpbe cfg | ||
| 76 | * @output_index - index used by application | ||
| 77 | * | ||
| 78 | * Return sd index of the encoder | ||
| 79 | */ | ||
| 80 | static int vpbe_find_encoder_sd_index(struct vpbe_config *cfg, | ||
| 81 | int index) | ||
| 82 | { | ||
| 83 | char *encoder_name = cfg->outputs[index].subdev_name; | ||
| 84 | int i; | ||
| 85 | |||
| 86 | /* Venc is always first */ | ||
| 87 | if (!strcmp(encoder_name, cfg->venc.module_name)) | ||
| 88 | return 0; | ||
| 89 | |||
| 90 | for (i = 0; i < cfg->num_ext_encoders; i++) { | ||
| 91 | if (!strcmp(encoder_name, | ||
| 92 | cfg->ext_encoders[i].module_name)) | ||
| 93 | return i+1; | ||
| 94 | } | ||
| 95 | |||
| 96 | return -EINVAL; | ||
| 97 | } | ||
| 98 | |||
| 99 | /** | ||
| 100 | * vpbe_g_cropcap - Get crop capabilities of the display | ||
| 101 | * @vpbe_dev - vpbe device ptr | ||
| 102 | * @cropcap - cropcap is a ptr to struct v4l2_cropcap | ||
| 103 | * | ||
| 104 | * Update the crop capabilities in crop cap for current | ||
| 105 | * mode | ||
| 106 | */ | ||
| 107 | static int vpbe_g_cropcap(struct vpbe_device *vpbe_dev, | ||
| 108 | struct v4l2_cropcap *cropcap) | ||
| 109 | { | ||
| 110 | if (NULL == cropcap) | ||
| 111 | return -EINVAL; | ||
| 112 | cropcap->bounds.left = 0; | ||
| 113 | cropcap->bounds.top = 0; | ||
| 114 | cropcap->bounds.width = vpbe_dev->current_timings.xres; | ||
| 115 | cropcap->bounds.height = vpbe_dev->current_timings.yres; | ||
| 116 | cropcap->defrect = cropcap->bounds; | ||
| 117 | |||
| 118 | return 0; | ||
| 119 | } | ||
| 120 | |||
| 121 | /** | ||
| 122 | * vpbe_enum_outputs - enumerate outputs | ||
| 123 | * @vpbe_dev - vpbe device ptr | ||
| 124 | * @output - ptr to v4l2_output structure | ||
| 125 | * | ||
| 126 | * Enumerates the outputs available at the vpbe display | ||
| 127 | * returns the status, -EINVAL if end of output list | ||
| 128 | */ | ||
| 129 | static int vpbe_enum_outputs(struct vpbe_device *vpbe_dev, | ||
| 130 | struct v4l2_output *output) | ||
| 131 | { | ||
| 132 | struct vpbe_config *cfg = vpbe_dev->cfg; | ||
| 133 | int temp_index = output->index; | ||
| 134 | |||
| 135 | if (temp_index >= cfg->num_outputs) | ||
| 136 | return -EINVAL; | ||
| 137 | |||
| 138 | *output = cfg->outputs[temp_index].output; | ||
| 139 | output->index = temp_index; | ||
| 140 | |||
| 141 | return 0; | ||
| 142 | } | ||
| 143 | |||
| 144 | static int vpbe_get_mode_info(struct vpbe_device *vpbe_dev, char *mode) | ||
| 145 | { | ||
| 146 | struct vpbe_config *cfg = vpbe_dev->cfg; | ||
| 147 | struct vpbe_enc_mode_info var; | ||
| 148 | int curr_output = vpbe_dev->current_out_index; | ||
| 149 | int i; | ||
| 150 | |||
| 151 | if (NULL == mode) | ||
| 152 | return -EINVAL; | ||
| 153 | |||
| 154 | for (i = 0; i < cfg->outputs[curr_output].num_modes; i++) { | ||
| 155 | var = cfg->outputs[curr_output].modes[i]; | ||
| 156 | if (!strcmp(mode, var.name)) { | ||
| 157 | vpbe_dev->current_timings = var; | ||
| 158 | return 0; | ||
| 159 | } | ||
| 160 | } | ||
| 161 | |||
| 162 | return -EINVAL; | ||
| 163 | } | ||
| 164 | |||
| 165 | static int vpbe_get_current_mode_info(struct vpbe_device *vpbe_dev, | ||
| 166 | struct vpbe_enc_mode_info *mode_info) | ||
| 167 | { | ||
| 168 | if (NULL == mode_info) | ||
| 169 | return -EINVAL; | ||
| 170 | |||
| 171 | *mode_info = vpbe_dev->current_timings; | ||
| 172 | |||
| 173 | return 0; | ||
| 174 | } | ||
| 175 | |||
| 176 | static int vpbe_get_dv_preset_info(struct vpbe_device *vpbe_dev, | ||
| 177 | unsigned int dv_preset) | ||
| 178 | { | ||
| 179 | struct vpbe_config *cfg = vpbe_dev->cfg; | ||
| 180 | struct vpbe_enc_mode_info var; | ||
| 181 | int curr_output = vpbe_dev->current_out_index; | ||
| 182 | int i; | ||
| 183 | |||
| 184 | for (i = 0; i < vpbe_dev->cfg->outputs[curr_output].num_modes; i++) { | ||
| 185 | var = cfg->outputs[curr_output].modes[i]; | ||
| 186 | if ((var.timings_type & VPBE_ENC_DV_PRESET) && | ||
| 187 | (var.timings.dv_preset == dv_preset)) { | ||
| 188 | vpbe_dev->current_timings = var; | ||
| 189 | return 0; | ||
| 190 | } | ||
| 191 | } | ||
| 192 | |||
| 193 | return -EINVAL; | ||
| 194 | } | ||
| 195 | |||
| 196 | /* Get std by std id */ | ||
| 197 | static int vpbe_get_std_info(struct vpbe_device *vpbe_dev, | ||
| 198 | v4l2_std_id std_id) | ||
| 199 | { | ||
| 200 | struct vpbe_config *cfg = vpbe_dev->cfg; | ||
| 201 | struct vpbe_enc_mode_info var; | ||
| 202 | int curr_output = vpbe_dev->current_out_index; | ||
| 203 | int i; | ||
| 204 | |||
| 205 | for (i = 0; i < vpbe_dev->cfg->outputs[curr_output].num_modes; i++) { | ||
| 206 | var = cfg->outputs[curr_output].modes[i]; | ||
| 207 | if ((var.timings_type & VPBE_ENC_STD) && | ||
| 208 | (var.timings.std_id & std_id)) { | ||
| 209 | vpbe_dev->current_timings = var; | ||
| 210 | return 0; | ||
| 211 | } | ||
| 212 | } | ||
| 213 | |||
| 214 | return -EINVAL; | ||
| 215 | } | ||
| 216 | |||
| 217 | static int vpbe_get_std_info_by_name(struct vpbe_device *vpbe_dev, | ||
| 218 | char *std_name) | ||
| 219 | { | ||
| 220 | struct vpbe_config *cfg = vpbe_dev->cfg; | ||
| 221 | struct vpbe_enc_mode_info var; | ||
| 222 | int curr_output = vpbe_dev->current_out_index; | ||
| 223 | int i; | ||
| 224 | |||
| 225 | for (i = 0; i < vpbe_dev->cfg->outputs[curr_output].num_modes; i++) { | ||
| 226 | var = cfg->outputs[curr_output].modes[i]; | ||
| 227 | if (!strcmp(var.name, std_name)) { | ||
| 228 | vpbe_dev->current_timings = var; | ||
| 229 | return 0; | ||
| 230 | } | ||
| 231 | } | ||
| 232 | |||
| 233 | return -EINVAL; | ||
| 234 | } | ||
| 235 | |||
| 236 | /** | ||
| 237 | * vpbe_set_output - Set output | ||
| 238 | * @vpbe_dev - vpbe device ptr | ||
| 239 | * @index - index of output | ||
| 240 | * | ||
| 241 | * Set vpbe output to the output specified by the index | ||
| 242 | */ | ||
| 243 | static int vpbe_set_output(struct vpbe_device *vpbe_dev, int index) | ||
| 244 | { | ||
| 245 | struct encoder_config_info *curr_enc_info = | ||
| 246 | vpbe_current_encoder_info(vpbe_dev); | ||
| 247 | struct vpbe_config *cfg = vpbe_dev->cfg; | ||
| 248 | int enc_out_index; | ||
| 249 | int sd_index; | ||
| 250 | int ret = 0; | ||
| 251 | |||
| 252 | if (index >= cfg->num_outputs) | ||
| 253 | return -EINVAL; | ||
| 254 | |||
| 255 | mutex_lock(&vpbe_dev->lock); | ||
| 256 | |||
| 257 | sd_index = vpbe_dev->current_sd_index; | ||
| 258 | enc_out_index = cfg->outputs[index].output.index; | ||
| 259 | /* | ||
| 260 | * Currently we switch the encoder based on output selected | ||
| 261 | * by the application. If media controller is implemented later | ||
| 262 | * there is will be an API added to setup_link between venc | ||
| 263 | * and external encoder. So in that case below comparison always | ||
| 264 | * match and encoder will not be switched. But if application | ||
| 265 | * chose not to use media controller, then this provides current | ||
| 266 | * way of switching encoder at the venc output. | ||
| 267 | */ | ||
| 268 | if (strcmp(curr_enc_info->module_name, | ||
| 269 | cfg->outputs[index].subdev_name)) { | ||
| 270 | /* Need to switch the encoder at the output */ | ||
| 271 | sd_index = vpbe_find_encoder_sd_index(cfg, index); | ||
| 272 | if (sd_index < 0) { | ||
| 273 | ret = -EINVAL; | ||
| 274 | goto out; | ||
| 275 | } | ||
| 276 | |||
| 277 | if (ret) | ||
| 278 | goto out; | ||
| 279 | } | ||
| 280 | |||
| 281 | /* Set output at the encoder */ | ||
| 282 | ret = v4l2_subdev_call(vpbe_dev->encoders[sd_index], video, | ||
| 283 | s_routing, 0, enc_out_index, 0); | ||
| 284 | if (ret) | ||
| 285 | goto out; | ||
| 286 | |||
| 287 | /* | ||
| 288 | * It is assumed that venc or extenal encoder will set a default | ||
| 289 | * mode in the sub device. For external encoder or LCD pannel output, | ||
| 290 | * we also need to set up the lcd port for the required mode. So setup | ||
| 291 | * the lcd port for the default mode that is configured in the board | ||
| 292 | * arch/arm/mach-davinci/board-dm355-evm.setup file for the external | ||
| 293 | * encoder. | ||
| 294 | */ | ||
| 295 | ret = vpbe_get_mode_info(vpbe_dev, | ||
| 296 | cfg->outputs[index].default_mode); | ||
| 297 | if (!ret) { | ||
| 298 | struct osd_state *osd_device = vpbe_dev->osd_device; | ||
| 299 | |||
| 300 | osd_device->ops.set_left_margin(osd_device, | ||
| 301 | vpbe_dev->current_timings.left_margin); | ||
| 302 | osd_device->ops.set_top_margin(osd_device, | ||
| 303 | vpbe_dev->current_timings.upper_margin); | ||
| 304 | vpbe_dev->current_sd_index = sd_index; | ||
| 305 | vpbe_dev->current_out_index = index; | ||
| 306 | } | ||
| 307 | out: | ||
| 308 | mutex_unlock(&vpbe_dev->lock); | ||
| 309 | return ret; | ||
| 310 | } | ||
| 311 | |||
| 312 | static int vpbe_set_default_output(struct vpbe_device *vpbe_dev) | ||
| 313 | { | ||
| 314 | struct vpbe_config *cfg = vpbe_dev->cfg; | ||
| 315 | int ret = 0; | ||
| 316 | int i; | ||
| 317 | |||
| 318 | for (i = 0; i < cfg->num_outputs; i++) { | ||
| 319 | if (!strcmp(def_output, | ||
| 320 | cfg->outputs[i].output.name)) { | ||
| 321 | ret = vpbe_set_output(vpbe_dev, i); | ||
| 322 | if (!ret) | ||
| 323 | vpbe_dev->current_out_index = i; | ||
| 324 | return ret; | ||
| 325 | } | ||
| 326 | } | ||
| 327 | return ret; | ||
| 328 | } | ||
| 329 | |||
| 330 | /** | ||
| 331 | * vpbe_get_output - Get output | ||
| 332 | * @vpbe_dev - vpbe device ptr | ||
| 333 | * | ||
| 334 | * return current vpbe output to the the index | ||
| 335 | */ | ||
| 336 | static unsigned int vpbe_get_output(struct vpbe_device *vpbe_dev) | ||
| 337 | { | ||
| 338 | return vpbe_dev->current_out_index; | ||
| 339 | } | ||
| 340 | |||
| 341 | /** | ||
| 342 | * vpbe_s_dv_preset - Set the given preset timings in the encoder | ||
| 343 | * | ||
| 344 | * Sets the preset if supported by the current encoder. Return the status. | ||
| 345 | * 0 - success & -EINVAL on error | ||
| 346 | */ | ||
| 347 | static int vpbe_s_dv_preset(struct vpbe_device *vpbe_dev, | ||
| 348 | struct v4l2_dv_preset *dv_preset) | ||
| 349 | { | ||
| 350 | struct vpbe_config *cfg = vpbe_dev->cfg; | ||
| 351 | int out_index = vpbe_dev->current_out_index; | ||
| 352 | int sd_index = vpbe_dev->current_sd_index; | ||
| 353 | int ret; | ||
| 354 | |||
| 355 | |||
| 356 | if (!(cfg->outputs[out_index].output.capabilities & | ||
| 357 | V4L2_OUT_CAP_PRESETS)) | ||
| 358 | return -EINVAL; | ||
| 359 | |||
| 360 | ret = vpbe_get_dv_preset_info(vpbe_dev, dv_preset->preset); | ||
| 361 | |||
| 362 | if (ret) | ||
| 363 | return ret; | ||
| 364 | |||
| 365 | mutex_lock(&vpbe_dev->lock); | ||
| 366 | |||
| 367 | |||
| 368 | ret = v4l2_subdev_call(vpbe_dev->encoders[sd_index], video, | ||
| 369 | s_dv_preset, dv_preset); | ||
| 370 | /* set the lcd controller output for the given mode */ | ||
| 371 | if (!ret) { | ||
| 372 | struct osd_state *osd_device = vpbe_dev->osd_device; | ||
| 373 | |||
| 374 | osd_device->ops.set_left_margin(osd_device, | ||
| 375 | vpbe_dev->current_timings.left_margin); | ||
| 376 | osd_device->ops.set_top_margin(osd_device, | ||
| 377 | vpbe_dev->current_timings.upper_margin); | ||
| 378 | } | ||
| 379 | mutex_unlock(&vpbe_dev->lock); | ||
| 380 | |||
| 381 | return ret; | ||
| 382 | } | ||
| 383 | |||
| 384 | /** | ||
| 385 | * vpbe_g_dv_preset - Get the preset in the current encoder | ||
| 386 | * | ||
| 387 | * Get the preset in the current encoder. Return the status. 0 - success | ||
| 388 | * -EINVAL on error | ||
| 389 | */ | ||
| 390 | static int vpbe_g_dv_preset(struct vpbe_device *vpbe_dev, | ||
| 391 | struct v4l2_dv_preset *dv_preset) | ||
| 392 | { | ||
| 393 | if (vpbe_dev->current_timings.timings_type & | ||
| 394 | VPBE_ENC_DV_PRESET) { | ||
| 395 | dv_preset->preset = vpbe_dev->current_timings.timings.dv_preset; | ||
| 396 | return 0; | ||
| 397 | } | ||
| 398 | |||
| 399 | return -EINVAL; | ||
| 400 | } | ||
| 401 | |||
| 402 | /** | ||
| 403 | * vpbe_enum_dv_presets - Enumerate the dv presets in the current encoder | ||
| 404 | * | ||
| 405 | * Get the preset in the current encoder. Return the status. 0 - success | ||
| 406 | * -EINVAL on error | ||
| 407 | */ | ||
| 408 | static int vpbe_enum_dv_presets(struct vpbe_device *vpbe_dev, | ||
| 409 | struct v4l2_dv_enum_preset *preset_info) | ||
| 410 | { | ||
| 411 | struct vpbe_config *cfg = vpbe_dev->cfg; | ||
| 412 | int out_index = vpbe_dev->current_out_index; | ||
| 413 | struct vpbe_output *output = &cfg->outputs[out_index]; | ||
| 414 | int j = 0; | ||
| 415 | int i; | ||
| 416 | |||
| 417 | if (!(output->output.capabilities & V4L2_OUT_CAP_PRESETS)) | ||
| 418 | return -EINVAL; | ||
| 419 | |||
| 420 | for (i = 0; i < output->num_modes; i++) { | ||
| 421 | if (output->modes[i].timings_type == VPBE_ENC_DV_PRESET) { | ||
| 422 | if (j == preset_info->index) | ||
| 423 | break; | ||
| 424 | j++; | ||
| 425 | } | ||
| 426 | } | ||
| 427 | |||
| 428 | if (i == output->num_modes) | ||
| 429 | return -EINVAL; | ||
| 430 | |||
| 431 | return v4l_fill_dv_preset_info(output->modes[i].timings.dv_preset, | ||
| 432 | preset_info); | ||
| 433 | } | ||
| 434 | |||
| 435 | /** | ||
| 436 | * vpbe_s_std - Set the given standard in the encoder | ||
| 437 | * | ||
| 438 | * Sets the standard if supported by the current encoder. Return the status. | ||
| 439 | * 0 - success & -EINVAL on error | ||
| 440 | */ | ||
| 441 | static int vpbe_s_std(struct vpbe_device *vpbe_dev, v4l2_std_id *std_id) | ||
| 442 | { | ||
| 443 | struct vpbe_config *cfg = vpbe_dev->cfg; | ||
| 444 | int out_index = vpbe_dev->current_out_index; | ||
| 445 | int sd_index = vpbe_dev->current_sd_index; | ||
| 446 | int ret; | ||
| 447 | |||
| 448 | if (!(cfg->outputs[out_index].output.capabilities & | ||
| 449 | V4L2_OUT_CAP_STD)) | ||
| 450 | return -EINVAL; | ||
| 451 | |||
| 452 | ret = vpbe_get_std_info(vpbe_dev, *std_id); | ||
| 453 | if (ret) | ||
| 454 | return ret; | ||
| 455 | |||
| 456 | mutex_lock(&vpbe_dev->lock); | ||
| 457 | |||
| 458 | ret = v4l2_subdev_call(vpbe_dev->encoders[sd_index], video, | ||
| 459 | s_std_output, *std_id); | ||
| 460 | /* set the lcd controller output for the given mode */ | ||
| 461 | if (!ret) { | ||
| 462 | struct osd_state *osd_device = vpbe_dev->osd_device; | ||
| 463 | |||
| 464 | osd_device->ops.set_left_margin(osd_device, | ||
| 465 | vpbe_dev->current_timings.left_margin); | ||
| 466 | osd_device->ops.set_top_margin(osd_device, | ||
| 467 | vpbe_dev->current_timings.upper_margin); | ||
| 468 | } | ||
| 469 | mutex_unlock(&vpbe_dev->lock); | ||
| 470 | |||
| 471 | return ret; | ||
| 472 | } | ||
| 473 | |||
| 474 | /** | ||
| 475 | * vpbe_g_std - Get the standard in the current encoder | ||
| 476 | * | ||
| 477 | * Get the standard in the current encoder. Return the status. 0 - success | ||
| 478 | * -EINVAL on error | ||
| 479 | */ | ||
| 480 | static int vpbe_g_std(struct vpbe_device *vpbe_dev, v4l2_std_id *std_id) | ||
| 481 | { | ||
| 482 | struct vpbe_enc_mode_info cur_timings = vpbe_dev->current_timings; | ||
| 483 | |||
| 484 | if (cur_timings.timings_type & VPBE_ENC_STD) { | ||
| 485 | *std_id = cur_timings.timings.std_id; | ||
| 486 | return 0; | ||
| 487 | } | ||
| 488 | |||
| 489 | return -EINVAL; | ||
| 490 | } | ||
| 491 | |||
| 492 | /** | ||
| 493 | * vpbe_set_mode - Set mode in the current encoder using mode info | ||
| 494 | * | ||
| 495 | * Use the mode string to decide what timings to set in the encoder | ||
| 496 | * This is typically useful when fbset command is used to change the current | ||
| 497 | * timings by specifying a string to indicate the timings. | ||
| 498 | */ | ||
| 499 | static int vpbe_set_mode(struct vpbe_device *vpbe_dev, | ||
| 500 | struct vpbe_enc_mode_info *mode_info) | ||
| 501 | { | ||
| 502 | struct vpbe_enc_mode_info *preset_mode = NULL; | ||
| 503 | struct vpbe_config *cfg = vpbe_dev->cfg; | ||
| 504 | struct v4l2_dv_preset dv_preset; | ||
| 505 | struct osd_state *osd_device; | ||
| 506 | int out_index = vpbe_dev->current_out_index; | ||
| 507 | int ret = 0; | ||
| 508 | int i; | ||
| 509 | |||
| 510 | if ((NULL == mode_info) || (NULL == mode_info->name)) | ||
| 511 | return -EINVAL; | ||
| 512 | |||
| 513 | for (i = 0; i < cfg->outputs[out_index].num_modes; i++) { | ||
| 514 | if (!strcmp(mode_info->name, | ||
| 515 | cfg->outputs[out_index].modes[i].name)) { | ||
| 516 | preset_mode = &cfg->outputs[out_index].modes[i]; | ||
| 517 | /* | ||
| 518 | * it may be one of the 3 timings type. Check and | ||
| 519 | * invoke right API | ||
| 520 | */ | ||
| 521 | if (preset_mode->timings_type & VPBE_ENC_STD) | ||
| 522 | return vpbe_s_std(vpbe_dev, | ||
| 523 | &preset_mode->timings.std_id); | ||
| 524 | if (preset_mode->timings_type & VPBE_ENC_DV_PRESET) { | ||
| 525 | dv_preset.preset = | ||
| 526 | preset_mode->timings.dv_preset; | ||
| 527 | return vpbe_s_dv_preset(vpbe_dev, &dv_preset); | ||
| 528 | } | ||
| 529 | } | ||
| 530 | } | ||
| 531 | |||
| 532 | /* Only custom timing should reach here */ | ||
| 533 | if (preset_mode == NULL) | ||
| 534 | return -EINVAL; | ||
| 535 | |||
| 536 | mutex_lock(&vpbe_dev->lock); | ||
| 537 | |||
| 538 | osd_device = vpbe_dev->osd_device; | ||
| 539 | vpbe_dev->current_timings = *preset_mode; | ||
| 540 | osd_device->ops.set_left_margin(osd_device, | ||
| 541 | vpbe_dev->current_timings.left_margin); | ||
| 542 | osd_device->ops.set_top_margin(osd_device, | ||
| 543 | vpbe_dev->current_timings.upper_margin); | ||
| 544 | |||
| 545 | mutex_unlock(&vpbe_dev->lock); | ||
| 546 | |||
| 547 | return ret; | ||
| 548 | } | ||
| 549 | |||
| 550 | static int vpbe_set_default_mode(struct vpbe_device *vpbe_dev) | ||
| 551 | { | ||
| 552 | int ret; | ||
| 553 | |||
| 554 | ret = vpbe_get_std_info_by_name(vpbe_dev, def_mode); | ||
| 555 | if (ret) | ||
| 556 | return ret; | ||
| 557 | |||
| 558 | /* set the default mode in the encoder */ | ||
| 559 | return vpbe_set_mode(vpbe_dev, &vpbe_dev->current_timings); | ||
| 560 | } | ||
| 561 | |||
| 562 | static int platform_device_get(struct device *dev, void *data) | ||
| 563 | { | ||
| 564 | struct platform_device *pdev = to_platform_device(dev); | ||
| 565 | struct vpbe_device *vpbe_dev = data; | ||
| 566 | |||
| 567 | if (strcmp("vpbe-osd", pdev->name) == 0) | ||
| 568 | vpbe_dev->osd_device = platform_get_drvdata(pdev); | ||
| 569 | |||
| 570 | return 0; | ||
| 571 | } | ||
| 572 | |||
| 573 | /** | ||
| 574 | * vpbe_initialize() - Initialize the vpbe display controller | ||
| 575 | * @vpbe_dev - vpbe device ptr | ||
| 576 | * | ||
| 577 | * Master frame buffer device drivers calls this to initialize vpbe | ||
| 578 | * display controller. This will then registers v4l2 device and the sub | ||
| 579 | * devices and sets a current encoder sub device for display. v4l2 display | ||
| 580 | * device driver is the master and frame buffer display device driver is | ||
| 581 | * the slave. Frame buffer display driver checks the initialized during | ||
| 582 | * probe and exit if not initialized. Returns status. | ||
| 583 | */ | ||
| 584 | static int vpbe_initialize(struct device *dev, struct vpbe_device *vpbe_dev) | ||
| 585 | { | ||
| 586 | struct encoder_config_info *enc_info; | ||
| 587 | struct v4l2_subdev **enc_subdev; | ||
| 588 | struct osd_state *osd_device; | ||
| 589 | struct i2c_adapter *i2c_adap; | ||
| 590 | int output_index; | ||
| 591 | int num_encoders; | ||
| 592 | int ret = 0; | ||
| 593 | int err; | ||
| 594 | int i; | ||
| 595 | |||
| 596 | /* | ||
| 597 | * v4l2 abd FBDev frame buffer devices will get the vpbe_dev pointer | ||
| 598 | * from the platform device by iteration of platform drivers and | ||
| 599 | * matching with device name | ||
| 600 | */ | ||
| 601 | if (NULL == vpbe_dev || NULL == dev) { | ||
| 602 | printk(KERN_ERR "Null device pointers.\n"); | ||
| 603 | return -ENODEV; | ||
| 604 | } | ||
| 605 | |||
| 606 | if (vpbe_dev->initialized) | ||
| 607 | return 0; | ||
| 608 | |||
| 609 | mutex_lock(&vpbe_dev->lock); | ||
| 610 | |||
| 611 | if (strcmp(vpbe_dev->cfg->module_name, "dm644x-vpbe-display") != 0) { | ||
| 612 | /* We have dac clock available for platform */ | ||
| 613 | vpbe_dev->dac_clk = clk_get(vpbe_dev->pdev, "vpss_dac"); | ||
| 614 | if (IS_ERR(vpbe_dev->dac_clk)) { | ||
| 615 | ret = PTR_ERR(vpbe_dev->dac_clk); | ||
| 616 | goto vpbe_unlock; | ||
| 617 | } | ||
| 618 | if (clk_enable(vpbe_dev->dac_clk)) { | ||
| 619 | ret = -ENODEV; | ||
| 620 | goto vpbe_unlock; | ||
| 621 | } | ||
| 622 | } | ||
| 623 | |||
| 624 | /* first enable vpss clocks */ | ||
| 625 | vpss_enable_clock(VPSS_VPBE_CLOCK, 1); | ||
| 626 | |||
| 627 | /* First register a v4l2 device */ | ||
| 628 | ret = v4l2_device_register(dev, &vpbe_dev->v4l2_dev); | ||
| 629 | if (ret) { | ||
| 630 | v4l2_err(dev->driver, | ||
| 631 | "Unable to register v4l2 device.\n"); | ||
| 632 | goto vpbe_fail_clock; | ||
| 633 | } | ||
| 634 | v4l2_info(&vpbe_dev->v4l2_dev, "vpbe v4l2 device registered\n"); | ||
| 635 | |||
| 636 | err = bus_for_each_dev(&platform_bus_type, NULL, vpbe_dev, | ||
| 637 | platform_device_get); | ||
| 638 | if (err < 0) | ||
| 639 | return err; | ||
| 640 | |||
| 641 | vpbe_dev->venc = venc_sub_dev_init(&vpbe_dev->v4l2_dev, | ||
| 642 | vpbe_dev->cfg->venc.module_name); | ||
| 643 | /* register venc sub device */ | ||
| 644 | if (vpbe_dev->venc == NULL) { | ||
| 645 | v4l2_err(&vpbe_dev->v4l2_dev, | ||
| 646 | "vpbe unable to init venc sub device\n"); | ||
| 647 | ret = -ENODEV; | ||
| 648 | goto vpbe_fail_v4l2_device; | ||
| 649 | } | ||
| 650 | /* initialize osd device */ | ||
| 651 | osd_device = vpbe_dev->osd_device; | ||
| 652 | |||
| 653 | if (NULL != osd_device->ops.initialize) { | ||
| 654 | err = osd_device->ops.initialize(osd_device); | ||
| 655 | if (err) { | ||
| 656 | v4l2_err(&vpbe_dev->v4l2_dev, | ||
| 657 | "unable to initialize the OSD device"); | ||
| 658 | err = -ENOMEM; | ||
| 659 | goto vpbe_fail_v4l2_device; | ||
| 660 | } | ||
| 661 | } | ||
| 662 | |||
| 663 | /* | ||
| 664 | * Register any external encoders that are configured. At index 0 we | ||
| 665 | * store venc sd index. | ||
| 666 | */ | ||
| 667 | num_encoders = vpbe_dev->cfg->num_ext_encoders + 1; | ||
| 668 | vpbe_dev->encoders = kmalloc( | ||
| 669 | sizeof(struct v4l2_subdev *)*num_encoders, | ||
| 670 | GFP_KERNEL); | ||
| 671 | if (NULL == vpbe_dev->encoders) { | ||
| 672 | v4l2_err(&vpbe_dev->v4l2_dev, | ||
| 673 | "unable to allocate memory for encoders sub devices"); | ||
| 674 | ret = -ENOMEM; | ||
| 675 | goto vpbe_fail_v4l2_device; | ||
| 676 | } | ||
| 677 | |||
| 678 | i2c_adap = i2c_get_adapter(vpbe_dev->cfg->i2c_adapter_id); | ||
| 679 | for (i = 0; i < (vpbe_dev->cfg->num_ext_encoders + 1); i++) { | ||
| 680 | if (i == 0) { | ||
| 681 | /* venc is at index 0 */ | ||
| 682 | enc_subdev = &vpbe_dev->encoders[i]; | ||
| 683 | *enc_subdev = vpbe_dev->venc; | ||
| 684 | continue; | ||
| 685 | } | ||
| 686 | enc_info = &vpbe_dev->cfg->ext_encoders[i]; | ||
| 687 | if (enc_info->is_i2c) { | ||
| 688 | enc_subdev = &vpbe_dev->encoders[i]; | ||
| 689 | *enc_subdev = v4l2_i2c_new_subdev_board( | ||
| 690 | &vpbe_dev->v4l2_dev, i2c_adap, | ||
| 691 | &enc_info->board_info, NULL); | ||
| 692 | if (*enc_subdev) | ||
| 693 | v4l2_info(&vpbe_dev->v4l2_dev, | ||
| 694 | "v4l2 sub device %s registered\n", | ||
| 695 | enc_info->module_name); | ||
| 696 | else { | ||
| 697 | v4l2_err(&vpbe_dev->v4l2_dev, "encoder %s" | ||
| 698 | " failed to register", | ||
| 699 | enc_info->module_name); | ||
| 700 | ret = -ENODEV; | ||
| 701 | goto vpbe_fail_sd_register; | ||
| 702 | } | ||
| 703 | } else | ||
| 704 | v4l2_warn(&vpbe_dev->v4l2_dev, "non-i2c encoders" | ||
| 705 | " currently not supported"); | ||
| 706 | } | ||
| 707 | |||
| 708 | /* set the current encoder and output to that of venc by default */ | ||
| 709 | vpbe_dev->current_sd_index = 0; | ||
| 710 | vpbe_dev->current_out_index = 0; | ||
| 711 | output_index = 0; | ||
| 712 | |||
| 713 | mutex_unlock(&vpbe_dev->lock); | ||
| 714 | |||
| 715 | printk(KERN_NOTICE "Setting default output to %s\n", def_output); | ||
| 716 | ret = vpbe_set_default_output(vpbe_dev); | ||
| 717 | if (ret) { | ||
| 718 | v4l2_err(&vpbe_dev->v4l2_dev, "Failed to set default output %s", | ||
| 719 | def_output); | ||
| 720 | return ret; | ||
| 721 | } | ||
| 722 | |||
| 723 | printk(KERN_NOTICE "Setting default mode to %s\n", def_mode); | ||
| 724 | ret = vpbe_set_default_mode(vpbe_dev); | ||
| 725 | if (ret) { | ||
| 726 | v4l2_err(&vpbe_dev->v4l2_dev, "Failed to set default mode %s", | ||
| 727 | def_mode); | ||
| 728 | return ret; | ||
| 729 | } | ||
| 730 | vpbe_dev->initialized = 1; | ||
| 731 | /* TBD handling of bootargs for default output and mode */ | ||
| 732 | return 0; | ||
| 733 | |||
| 734 | vpbe_fail_sd_register: | ||
| 735 | kfree(vpbe_dev->encoders); | ||
| 736 | vpbe_fail_v4l2_device: | ||
| 737 | v4l2_device_unregister(&vpbe_dev->v4l2_dev); | ||
| 738 | vpbe_fail_clock: | ||
| 739 | if (strcmp(vpbe_dev->cfg->module_name, "dm644x-vpbe-display") != 0) | ||
| 740 | clk_put(vpbe_dev->dac_clk); | ||
| 741 | vpbe_unlock: | ||
| 742 | mutex_unlock(&vpbe_dev->lock); | ||
| 743 | return ret; | ||
| 744 | } | ||
| 745 | |||
| 746 | /** | ||
| 747 | * vpbe_deinitialize() - de-initialize the vpbe display controller | ||
| 748 | * @dev - Master and slave device ptr | ||
| 749 | * | ||
| 750 | * vpbe_master and slave frame buffer devices calls this to de-initialize | ||
| 751 | * the display controller. It is called when master and slave device | ||
| 752 | * driver modules are removed and no longer requires the display controller. | ||
| 753 | */ | ||
| 754 | static void vpbe_deinitialize(struct device *dev, struct vpbe_device *vpbe_dev) | ||
| 755 | { | ||
| 756 | v4l2_device_unregister(&vpbe_dev->v4l2_dev); | ||
| 757 | if (strcmp(vpbe_dev->cfg->module_name, "dm644x-vpbe-display") != 0) | ||
| 758 | clk_put(vpbe_dev->dac_clk); | ||
| 759 | |||
| 760 | kfree(vpbe_dev->encoders); | ||
| 761 | vpbe_dev->initialized = 0; | ||
| 762 | /* disable vpss clocks */ | ||
| 763 | vpss_enable_clock(VPSS_VPBE_CLOCK, 0); | ||
| 764 | } | ||
| 765 | |||
| 766 | static struct vpbe_device_ops vpbe_dev_ops = { | ||
| 767 | .g_cropcap = vpbe_g_cropcap, | ||
| 768 | .enum_outputs = vpbe_enum_outputs, | ||
| 769 | .set_output = vpbe_set_output, | ||
| 770 | .get_output = vpbe_get_output, | ||
| 771 | .s_dv_preset = vpbe_s_dv_preset, | ||
| 772 | .g_dv_preset = vpbe_g_dv_preset, | ||
| 773 | .enum_dv_presets = vpbe_enum_dv_presets, | ||
| 774 | .s_std = vpbe_s_std, | ||
| 775 | .g_std = vpbe_g_std, | ||
| 776 | .initialize = vpbe_initialize, | ||
| 777 | .deinitialize = vpbe_deinitialize, | ||
| 778 | .get_mode_info = vpbe_get_current_mode_info, | ||
| 779 | .set_mode = vpbe_set_mode, | ||
| 780 | }; | ||
| 781 | |||
| 782 | static __devinit int vpbe_probe(struct platform_device *pdev) | ||
| 783 | { | ||
| 784 | struct vpbe_device *vpbe_dev; | ||
| 785 | struct vpbe_config *cfg; | ||
| 786 | int ret = -EINVAL; | ||
| 787 | |||
| 788 | if (pdev->dev.platform_data == NULL) { | ||
| 789 | v4l2_err(pdev->dev.driver, "No platform data\n"); | ||
| 790 | return -ENODEV; | ||
| 791 | } | ||
| 792 | cfg = pdev->dev.platform_data; | ||
| 793 | |||
| 794 | if (!cfg->module_name[0] || | ||
| 795 | !cfg->osd.module_name[0] || | ||
| 796 | !cfg->venc.module_name[0]) { | ||
| 797 | v4l2_err(pdev->dev.driver, "vpbe display module names not" | ||
| 798 | " defined\n"); | ||
| 799 | return ret; | ||
| 800 | } | ||
| 801 | |||
| 802 | vpbe_dev = kzalloc(sizeof(*vpbe_dev), GFP_KERNEL); | ||
| 803 | if (vpbe_dev == NULL) { | ||
| 804 | v4l2_err(pdev->dev.driver, "Unable to allocate memory" | ||
| 805 | " for vpbe_device\n"); | ||
| 806 | return -ENOMEM; | ||
| 807 | } | ||
| 808 | vpbe_dev->cfg = cfg; | ||
| 809 | vpbe_dev->ops = vpbe_dev_ops; | ||
| 810 | vpbe_dev->pdev = &pdev->dev; | ||
| 811 | |||
| 812 | if (cfg->outputs->num_modes > 0) | ||
| 813 | vpbe_dev->current_timings = vpbe_dev->cfg->outputs[0].modes[0]; | ||
| 814 | else | ||
| 815 | return -ENODEV; | ||
| 816 | |||
| 817 | /* set the driver data in platform device */ | ||
| 818 | platform_set_drvdata(pdev, vpbe_dev); | ||
| 819 | mutex_init(&vpbe_dev->lock); | ||
| 820 | |||
| 821 | return 0; | ||
| 822 | } | ||
| 823 | |||
| 824 | static int vpbe_remove(struct platform_device *device) | ||
| 825 | { | ||
| 826 | struct vpbe_device *vpbe_dev = platform_get_drvdata(device); | ||
| 827 | |||
| 828 | kfree(vpbe_dev); | ||
| 829 | |||
| 830 | return 0; | ||
| 831 | } | ||
| 832 | |||
| 833 | static struct platform_driver vpbe_driver = { | ||
| 834 | .driver = { | ||
| 835 | .name = "vpbe_controller", | ||
| 836 | .owner = THIS_MODULE, | ||
| 837 | }, | ||
| 838 | .probe = vpbe_probe, | ||
| 839 | .remove = vpbe_remove, | ||
| 840 | }; | ||
| 841 | |||
| 842 | /** | ||
| 843 | * vpbe_init: initialize the vpbe driver | ||
| 844 | * | ||
| 845 | * This function registers device and driver to the kernel | ||
| 846 | */ | ||
| 847 | static __init int vpbe_init(void) | ||
| 848 | { | ||
| 849 | return platform_driver_register(&vpbe_driver); | ||
| 850 | } | ||
| 851 | |||
| 852 | /** | ||
| 853 | * vpbe_cleanup : cleanup function for vpbe driver | ||
| 854 | * | ||
| 855 | * This will un-registers the device and driver to the kernel | ||
| 856 | */ | ||
| 857 | static void vpbe_cleanup(void) | ||
| 858 | { | ||
| 859 | platform_driver_unregister(&vpbe_driver); | ||
| 860 | } | ||
| 861 | |||
| 862 | /* Function for module initialization and cleanup */ | ||
| 863 | module_init(vpbe_init); | ||
| 864 | module_exit(vpbe_cleanup); | ||
diff --git a/drivers/media/video/davinci/vpbe_display.c b/drivers/media/video/davinci/vpbe_display.c new file mode 100644 index 000000000000..7f1d83a6d575 --- /dev/null +++ b/drivers/media/video/davinci/vpbe_display.c | |||
| @@ -0,0 +1,1860 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or | ||
| 5 | * modify it under the terms of the GNU General Public License as | ||
| 6 | * published by the Free Software Foundation version 2. | ||
| 7 | * | ||
| 8 | * This program is distributed WITHOUT ANY WARRANTY of any | ||
| 9 | * kind, whether express or implied; without even the implied warranty | ||
| 10 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 11 | * GNU General Public License for more details. | ||
| 12 | */ | ||
| 13 | #include <linux/kernel.h> | ||
| 14 | #include <linux/init.h> | ||
| 15 | #include <linux/module.h> | ||
| 16 | #include <linux/errno.h> | ||
| 17 | #include <linux/interrupt.h> | ||
| 18 | #include <linux/string.h> | ||
| 19 | #include <linux/wait.h> | ||
| 20 | #include <linux/time.h> | ||
| 21 | #include <linux/platform_device.h> | ||
| 22 | #include <linux/irq.h> | ||
| 23 | #include <linux/mm.h> | ||
| 24 | #include <linux/mutex.h> | ||
| 25 | #include <linux/videodev2.h> | ||
| 26 | #include <linux/slab.h> | ||
| 27 | |||
| 28 | #include <asm/pgtable.h> | ||
| 29 | #include <mach/cputype.h> | ||
| 30 | |||
| 31 | #include <media/v4l2-dev.h> | ||
| 32 | #include <media/v4l2-common.h> | ||
| 33 | #include <media/v4l2-ioctl.h> | ||
| 34 | #include <media/v4l2-device.h> | ||
| 35 | #include <media/davinci/vpbe_display.h> | ||
| 36 | #include <media/davinci/vpbe_types.h> | ||
| 37 | #include <media/davinci/vpbe.h> | ||
| 38 | #include <media/davinci/vpbe_venc.h> | ||
| 39 | #include <media/davinci/vpbe_osd.h> | ||
| 40 | #include "vpbe_venc_regs.h" | ||
| 41 | |||
| 42 | #define VPBE_DISPLAY_DRIVER "vpbe-v4l2" | ||
| 43 | |||
| 44 | static int debug; | ||
| 45 | |||
| 46 | #define VPBE_DISPLAY_SD_BUF_SIZE (720*576*2) | ||
| 47 | #define VPBE_DEFAULT_NUM_BUFS 3 | ||
| 48 | |||
| 49 | module_param(debug, int, 0644); | ||
| 50 | |||
| 51 | static int venc_is_second_field(struct vpbe_display *disp_dev) | ||
| 52 | { | ||
| 53 | struct vpbe_device *vpbe_dev = disp_dev->vpbe_dev; | ||
| 54 | int ret; | ||
| 55 | int val; | ||
| 56 | |||
| 57 | ret = v4l2_subdev_call(vpbe_dev->venc, | ||
| 58 | core, | ||
| 59 | ioctl, | ||
| 60 | VENC_GET_FLD, | ||
| 61 | &val); | ||
| 62 | if (ret < 0) { | ||
| 63 | v4l2_err(&vpbe_dev->v4l2_dev, | ||
| 64 | "Error in getting Field ID 0\n"); | ||
| 65 | } | ||
| 66 | return val; | ||
| 67 | } | ||
| 68 | |||
| 69 | static void vpbe_isr_even_field(struct vpbe_display *disp_obj, | ||
| 70 | struct vpbe_layer *layer) | ||
| 71 | { | ||
| 72 | struct timespec timevalue; | ||
| 73 | |||
| 74 | if (layer->cur_frm == layer->next_frm) | ||
| 75 | return; | ||
| 76 | ktime_get_ts(&timevalue); | ||
| 77 | layer->cur_frm->ts.tv_sec = timevalue.tv_sec; | ||
| 78 | layer->cur_frm->ts.tv_usec = timevalue.tv_nsec / NSEC_PER_USEC; | ||
| 79 | layer->cur_frm->state = VIDEOBUF_DONE; | ||
| 80 | wake_up_interruptible(&layer->cur_frm->done); | ||
| 81 | /* Make cur_frm pointing to next_frm */ | ||
| 82 | layer->cur_frm = layer->next_frm; | ||
| 83 | } | ||
| 84 | |||
| 85 | static void vpbe_isr_odd_field(struct vpbe_display *disp_obj, | ||
| 86 | struct vpbe_layer *layer) | ||
| 87 | { | ||
| 88 | struct osd_state *osd_device = disp_obj->osd_device; | ||
| 89 | unsigned long addr; | ||
| 90 | |||
| 91 | spin_lock(&disp_obj->dma_queue_lock); | ||
| 92 | if (list_empty(&layer->dma_queue) || | ||
| 93 | (layer->cur_frm != layer->next_frm)) { | ||
| 94 | spin_unlock(&disp_obj->dma_queue_lock); | ||
| 95 | return; | ||
| 96 | } | ||
| 97 | /* | ||
| 98 | * one field is displayed configure | ||
| 99 | * the next frame if it is available | ||
| 100 | * otherwise hold on current frame | ||
| 101 | * Get next from the buffer queue | ||
| 102 | */ | ||
| 103 | layer->next_frm = list_entry( | ||
| 104 | layer->dma_queue.next, | ||
| 105 | struct videobuf_buffer, | ||
| 106 | queue); | ||
| 107 | /* Remove that from the buffer queue */ | ||
| 108 | list_del(&layer->next_frm->queue); | ||
| 109 | spin_unlock(&disp_obj->dma_queue_lock); | ||
| 110 | /* Mark state of the frame to active */ | ||
| 111 | layer->next_frm->state = VIDEOBUF_ACTIVE; | ||
| 112 | addr = videobuf_to_dma_contig(layer->next_frm); | ||
| 113 | osd_device->ops.start_layer(osd_device, | ||
| 114 | layer->layer_info.id, | ||
| 115 | addr, | ||
| 116 | disp_obj->cbcr_ofst); | ||
| 117 | } | ||
| 118 | |||
| 119 | /* interrupt service routine */ | ||
| 120 | static irqreturn_t venc_isr(int irq, void *arg) | ||
| 121 | { | ||
| 122 | struct vpbe_display *disp_dev = (struct vpbe_display *)arg; | ||
| 123 | struct vpbe_layer *layer; | ||
| 124 | static unsigned last_event; | ||
| 125 | unsigned event = 0; | ||
| 126 | int fid; | ||
| 127 | int i; | ||
| 128 | |||
| 129 | if ((NULL == arg) || (NULL == disp_dev->dev[0])) | ||
| 130 | return IRQ_HANDLED; | ||
| 131 | |||
| 132 | if (venc_is_second_field(disp_dev)) | ||
| 133 | event |= VENC_SECOND_FIELD; | ||
| 134 | else | ||
| 135 | event |= VENC_FIRST_FIELD; | ||
| 136 | |||
| 137 | if (event == (last_event & ~VENC_END_OF_FRAME)) { | ||
| 138 | /* | ||
| 139 | * If the display is non-interlaced, then we need to flag the | ||
| 140 | * end-of-frame event at every interrupt regardless of the | ||
| 141 | * value of the FIDST bit. We can conclude that the display is | ||
| 142 | * non-interlaced if the value of the FIDST bit is unchanged | ||
| 143 | * from the previous interrupt. | ||
| 144 | */ | ||
| 145 | event |= VENC_END_OF_FRAME; | ||
| 146 | } else if (event == VENC_SECOND_FIELD) { | ||
| 147 | /* end-of-frame for interlaced display */ | ||
| 148 | event |= VENC_END_OF_FRAME; | ||
| 149 | } | ||
| 150 | last_event = event; | ||
| 151 | |||
| 152 | for (i = 0; i < VPBE_DISPLAY_MAX_DEVICES; i++) { | ||
| 153 | layer = disp_dev->dev[i]; | ||
| 154 | /* If streaming is started in this layer */ | ||
| 155 | if (!layer->started) | ||
| 156 | continue; | ||
| 157 | |||
| 158 | if (layer->layer_first_int) { | ||
| 159 | layer->layer_first_int = 0; | ||
| 160 | continue; | ||
| 161 | } | ||
| 162 | /* Check the field format */ | ||
| 163 | if ((V4L2_FIELD_NONE == layer->pix_fmt.field) && | ||
| 164 | (event & VENC_END_OF_FRAME)) { | ||
| 165 | /* Progressive mode */ | ||
| 166 | |||
| 167 | vpbe_isr_even_field(disp_dev, layer); | ||
| 168 | vpbe_isr_odd_field(disp_dev, layer); | ||
| 169 | } else { | ||
| 170 | /* Interlaced mode */ | ||
| 171 | |||
| 172 | layer->field_id ^= 1; | ||
| 173 | if (event & VENC_FIRST_FIELD) | ||
| 174 | fid = 0; | ||
| 175 | else | ||
| 176 | fid = 1; | ||
| 177 | |||
| 178 | /* | ||
| 179 | * If field id does not match with store | ||
| 180 | * field id | ||
| 181 | */ | ||
| 182 | if (fid != layer->field_id) { | ||
| 183 | /* Make them in sync */ | ||
| 184 | layer->field_id = fid; | ||
| 185 | continue; | ||
| 186 | } | ||
| 187 | /* | ||
| 188 | * device field id and local field id are | ||
| 189 | * in sync. If this is even field | ||
| 190 | */ | ||
| 191 | if (0 == fid) | ||
| 192 | vpbe_isr_even_field(disp_dev, layer); | ||
| 193 | else /* odd field */ | ||
| 194 | vpbe_isr_odd_field(disp_dev, layer); | ||
| 195 | } | ||
| 196 | } | ||
| 197 | |||
| 198 | return IRQ_HANDLED; | ||
| 199 | } | ||
| 200 | |||
| 201 | /* | ||
| 202 | * vpbe_buffer_prepare() | ||
| 203 | * This is the callback function called from videobuf_qbuf() function | ||
| 204 | * the buffer is prepared and user space virtual address is converted into | ||
| 205 | * physical address | ||
| 206 | */ | ||
| 207 | static int vpbe_buffer_prepare(struct videobuf_queue *q, | ||
| 208 | struct videobuf_buffer *vb, | ||
| 209 | enum v4l2_field field) | ||
| 210 | { | ||
| 211 | struct vpbe_fh *fh = q->priv_data; | ||
| 212 | struct vpbe_layer *layer = fh->layer; | ||
| 213 | struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev; | ||
| 214 | unsigned long addr; | ||
| 215 | int ret; | ||
| 216 | |||
| 217 | v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, | ||
| 218 | "vpbe_buffer_prepare\n"); | ||
| 219 | |||
| 220 | /* If buffer is not initialized, initialize it */ | ||
| 221 | if (VIDEOBUF_NEEDS_INIT == vb->state) { | ||
| 222 | vb->width = layer->pix_fmt.width; | ||
| 223 | vb->height = layer->pix_fmt.height; | ||
| 224 | vb->size = layer->pix_fmt.sizeimage; | ||
| 225 | vb->field = field; | ||
| 226 | |||
| 227 | ret = videobuf_iolock(q, vb, NULL); | ||
| 228 | if (ret < 0) { | ||
| 229 | v4l2_err(&vpbe_dev->v4l2_dev, "Failed to map \ | ||
| 230 | user address\n"); | ||
| 231 | return -EINVAL; | ||
| 232 | } | ||
| 233 | |||
| 234 | addr = videobuf_to_dma_contig(vb); | ||
| 235 | |||
| 236 | if (q->streaming) { | ||
| 237 | if (!IS_ALIGNED(addr, 8)) { | ||
| 238 | v4l2_err(&vpbe_dev->v4l2_dev, | ||
| 239 | "buffer_prepare:offset is \ | ||
| 240 | not aligned to 32 bytes\n"); | ||
| 241 | return -EINVAL; | ||
| 242 | } | ||
| 243 | } | ||
| 244 | vb->state = VIDEOBUF_PREPARED; | ||
| 245 | } | ||
| 246 | return 0; | ||
| 247 | } | ||
| 248 | |||
| 249 | /* | ||
| 250 | * vpbe_buffer_setup() | ||
| 251 | * This function allocates memory for the buffers | ||
| 252 | */ | ||
| 253 | static int vpbe_buffer_setup(struct videobuf_queue *q, | ||
| 254 | unsigned int *count, | ||
| 255 | unsigned int *size) | ||
| 256 | { | ||
| 257 | /* Get the file handle object and layer object */ | ||
| 258 | struct vpbe_fh *fh = q->priv_data; | ||
| 259 | struct vpbe_layer *layer = fh->layer; | ||
| 260 | struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev; | ||
| 261 | |||
| 262 | v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "vpbe_buffer_setup\n"); | ||
| 263 | |||
| 264 | *size = layer->pix_fmt.sizeimage; | ||
| 265 | |||
| 266 | /* Store number of buffers allocated in numbuffer member */ | ||
| 267 | if (*count < VPBE_DEFAULT_NUM_BUFS) | ||
| 268 | *count = layer->numbuffers = VPBE_DEFAULT_NUM_BUFS; | ||
| 269 | |||
| 270 | return 0; | ||
| 271 | } | ||
| 272 | |||
| 273 | /* | ||
| 274 | * vpbe_buffer_queue() | ||
| 275 | * This function adds the buffer to DMA queue | ||
| 276 | */ | ||
| 277 | static void vpbe_buffer_queue(struct videobuf_queue *q, | ||
| 278 | struct videobuf_buffer *vb) | ||
| 279 | { | ||
| 280 | /* Get the file handle object and layer object */ | ||
| 281 | struct vpbe_fh *fh = q->priv_data; | ||
| 282 | struct vpbe_layer *layer = fh->layer; | ||
| 283 | struct vpbe_display *disp = fh->disp_dev; | ||
| 284 | struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev; | ||
| 285 | unsigned long flags; | ||
| 286 | |||
| 287 | v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, | ||
| 288 | "vpbe_buffer_queue\n"); | ||
| 289 | |||
| 290 | /* add the buffer to the DMA queue */ | ||
| 291 | spin_lock_irqsave(&disp->dma_queue_lock, flags); | ||
| 292 | list_add_tail(&vb->queue, &layer->dma_queue); | ||
| 293 | spin_unlock_irqrestore(&disp->dma_queue_lock, flags); | ||
| 294 | /* Change state of the buffer */ | ||
| 295 | vb->state = VIDEOBUF_QUEUED; | ||
| 296 | } | ||
| 297 | |||
| 298 | /* | ||
| 299 | * vpbe_buffer_release() | ||
| 300 | * This function is called from the videobuf layer to free memory allocated to | ||
| 301 | * the buffers | ||
| 302 | */ | ||
| 303 | static void vpbe_buffer_release(struct videobuf_queue *q, | ||
| 304 | struct videobuf_buffer *vb) | ||
| 305 | { | ||
| 306 | /* Get the file handle object and layer object */ | ||
| 307 | struct vpbe_fh *fh = q->priv_data; | ||
| 308 | struct vpbe_layer *layer = fh->layer; | ||
| 309 | struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev; | ||
| 310 | |||
| 311 | v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, | ||
| 312 | "vpbe_buffer_release\n"); | ||
| 313 | |||
| 314 | if (V4L2_MEMORY_USERPTR != layer->memory) | ||
| 315 | videobuf_dma_contig_free(q, vb); | ||
| 316 | |||
| 317 | vb->state = VIDEOBUF_NEEDS_INIT; | ||
| 318 | } | ||
| 319 | |||
| 320 | static struct videobuf_queue_ops video_qops = { | ||
| 321 | .buf_setup = vpbe_buffer_setup, | ||
| 322 | .buf_prepare = vpbe_buffer_prepare, | ||
| 323 | .buf_queue = vpbe_buffer_queue, | ||
| 324 | .buf_release = vpbe_buffer_release, | ||
| 325 | }; | ||
| 326 | |||
| 327 | static | ||
| 328 | struct vpbe_layer* | ||
| 329 | _vpbe_display_get_other_win_layer(struct vpbe_display *disp_dev, | ||
| 330 | struct vpbe_layer *layer) | ||
| 331 | { | ||
| 332 | enum vpbe_display_device_id thiswin, otherwin; | ||
| 333 | thiswin = layer->device_id; | ||
| 334 | |||
| 335 | otherwin = (thiswin == VPBE_DISPLAY_DEVICE_0) ? | ||
| 336 | VPBE_DISPLAY_DEVICE_1 : VPBE_DISPLAY_DEVICE_0; | ||
| 337 | return disp_dev->dev[otherwin]; | ||
| 338 | } | ||
| 339 | |||
| 340 | static int vpbe_set_osd_display_params(struct vpbe_display *disp_dev, | ||
| 341 | struct vpbe_layer *layer) | ||
| 342 | { | ||
| 343 | struct osd_layer_config *cfg = &layer->layer_info.config; | ||
| 344 | struct osd_state *osd_device = disp_dev->osd_device; | ||
| 345 | struct vpbe_device *vpbe_dev = disp_dev->vpbe_dev; | ||
| 346 | unsigned long addr; | ||
| 347 | int ret; | ||
| 348 | |||
| 349 | addr = videobuf_to_dma_contig(layer->cur_frm); | ||
| 350 | /* Set address in the display registers */ | ||
| 351 | osd_device->ops.start_layer(osd_device, | ||
| 352 | layer->layer_info.id, | ||
| 353 | addr, | ||
| 354 | disp_dev->cbcr_ofst); | ||
| 355 | |||
| 356 | ret = osd_device->ops.enable_layer(osd_device, | ||
| 357 | layer->layer_info.id, 0); | ||
| 358 | if (ret < 0) { | ||
| 359 | v4l2_err(&vpbe_dev->v4l2_dev, | ||
| 360 | "Error in enabling osd window layer 0\n"); | ||
| 361 | return -1; | ||
| 362 | } | ||
| 363 | |||
| 364 | /* Enable the window */ | ||
| 365 | layer->layer_info.enable = 1; | ||
| 366 | if (cfg->pixfmt == PIXFMT_NV12) { | ||
| 367 | struct vpbe_layer *otherlayer = | ||
| 368 | _vpbe_display_get_other_win_layer(disp_dev, layer); | ||
| 369 | |||
| 370 | ret = osd_device->ops.enable_layer(osd_device, | ||
| 371 | otherlayer->layer_info.id, 1); | ||
| 372 | if (ret < 0) { | ||
| 373 | v4l2_err(&vpbe_dev->v4l2_dev, | ||
| 374 | "Error in enabling osd window layer 1\n"); | ||
| 375 | return -1; | ||
| 376 | } | ||
| 377 | otherlayer->layer_info.enable = 1; | ||
| 378 | } | ||
| 379 | return 0; | ||
| 380 | } | ||
| 381 | |||
| 382 | static void | ||
| 383 | vpbe_disp_calculate_scale_factor(struct vpbe_display *disp_dev, | ||
| 384 | struct vpbe_layer *layer, | ||
| 385 | int expected_xsize, int expected_ysize) | ||
| 386 | { | ||
| 387 | struct display_layer_info *layer_info = &layer->layer_info; | ||
| 388 | struct v4l2_pix_format *pixfmt = &layer->pix_fmt; | ||
| 389 | struct osd_layer_config *cfg = &layer->layer_info.config; | ||
| 390 | struct vpbe_device *vpbe_dev = disp_dev->vpbe_dev; | ||
| 391 | int calculated_xsize; | ||
| 392 | int h_exp = 0; | ||
| 393 | int v_exp = 0; | ||
| 394 | int h_scale; | ||
| 395 | int v_scale; | ||
| 396 | |||
| 397 | v4l2_std_id standard_id = vpbe_dev->current_timings.timings.std_id; | ||
| 398 | |||
| 399 | /* | ||
| 400 | * Application initially set the image format. Current display | ||
| 401 | * size is obtained from the vpbe display controller. expected_xsize | ||
| 402 | * and expected_ysize are set through S_CROP ioctl. Based on this, | ||
| 403 | * driver will calculate the scale factors for vertical and | ||
| 404 | * horizontal direction so that the image is displayed scaled | ||
| 405 | * and expanded. Application uses expansion to display the image | ||
| 406 | * in a square pixel. Otherwise it is displayed using displays | ||
| 407 | * pixel aspect ratio.It is expected that application chooses | ||
| 408 | * the crop coordinates for cropped or scaled display. if crop | ||
| 409 | * size is less than the image size, it is displayed cropped or | ||
| 410 | * it is displayed scaled and/or expanded. | ||
| 411 | * | ||
| 412 | * to begin with, set the crop window same as expected. Later we | ||
| 413 | * will override with scaled window size | ||
| 414 | */ | ||
| 415 | |||
| 416 | cfg->xsize = pixfmt->width; | ||
| 417 | cfg->ysize = pixfmt->height; | ||
| 418 | layer_info->h_zoom = ZOOM_X1; /* no horizontal zoom */ | ||
| 419 | layer_info->v_zoom = ZOOM_X1; /* no horizontal zoom */ | ||
| 420 | layer_info->h_exp = H_EXP_OFF; /* no horizontal zoom */ | ||
| 421 | layer_info->v_exp = V_EXP_OFF; /* no horizontal zoom */ | ||
| 422 | |||
| 423 | if (pixfmt->width < expected_xsize) { | ||
| 424 | h_scale = vpbe_dev->current_timings.xres / pixfmt->width; | ||
| 425 | if (h_scale < 2) | ||
| 426 | h_scale = 1; | ||
| 427 | else if (h_scale >= 4) | ||
| 428 | h_scale = 4; | ||
| 429 | else | ||
| 430 | h_scale = 2; | ||
| 431 | cfg->xsize *= h_scale; | ||
| 432 | if (cfg->xsize < expected_xsize) { | ||
| 433 | if ((standard_id & V4L2_STD_525_60) || | ||
| 434 | (standard_id & V4L2_STD_625_50)) { | ||
| 435 | calculated_xsize = (cfg->xsize * | ||
| 436 | VPBE_DISPLAY_H_EXP_RATIO_N) / | ||
| 437 | VPBE_DISPLAY_H_EXP_RATIO_D; | ||
| 438 | if (calculated_xsize <= expected_xsize) { | ||
| 439 | h_exp = 1; | ||
| 440 | cfg->xsize = calculated_xsize; | ||
| 441 | } | ||
| 442 | } | ||
| 443 | } | ||
| 444 | if (h_scale == 2) | ||
| 445 | layer_info->h_zoom = ZOOM_X2; | ||
| 446 | else if (h_scale == 4) | ||
| 447 | layer_info->h_zoom = ZOOM_X4; | ||
| 448 | if (h_exp) | ||
| 449 | layer_info->h_exp = H_EXP_9_OVER_8; | ||
| 450 | } else { | ||
| 451 | /* no scaling, only cropping. Set display area to crop area */ | ||
| 452 | cfg->xsize = expected_xsize; | ||
| 453 | } | ||
| 454 | |||
| 455 | if (pixfmt->height < expected_ysize) { | ||
| 456 | v_scale = expected_ysize / pixfmt->height; | ||
| 457 | if (v_scale < 2) | ||
| 458 | v_scale = 1; | ||
| 459 | else if (v_scale >= 4) | ||
| 460 | v_scale = 4; | ||
| 461 | else | ||
| 462 | v_scale = 2; | ||
| 463 | cfg->ysize *= v_scale; | ||
| 464 | if (cfg->ysize < expected_ysize) { | ||
| 465 | if ((standard_id & V4L2_STD_625_50)) { | ||
| 466 | calculated_xsize = (cfg->ysize * | ||
| 467 | VPBE_DISPLAY_V_EXP_RATIO_N) / | ||
| 468 | VPBE_DISPLAY_V_EXP_RATIO_D; | ||
| 469 | if (calculated_xsize <= expected_ysize) { | ||
| 470 | v_exp = 1; | ||
| 471 | cfg->ysize = calculated_xsize; | ||
| 472 | } | ||
| 473 | } | ||
| 474 | } | ||
| 475 | if (v_scale == 2) | ||
| 476 | layer_info->v_zoom = ZOOM_X2; | ||
| 477 | else if (v_scale == 4) | ||
| 478 | layer_info->v_zoom = ZOOM_X4; | ||
| 479 | if (v_exp) | ||
| 480 | layer_info->h_exp = V_EXP_6_OVER_5; | ||
| 481 | } else { | ||
| 482 | /* no scaling, only cropping. Set display area to crop area */ | ||
| 483 | cfg->ysize = expected_ysize; | ||
| 484 | } | ||
| 485 | v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, | ||
| 486 | "crop display xsize = %d, ysize = %d\n", | ||
| 487 | cfg->xsize, cfg->ysize); | ||
| 488 | } | ||
| 489 | |||
| 490 | static void vpbe_disp_adj_position(struct vpbe_display *disp_dev, | ||
| 491 | struct vpbe_layer *layer, | ||
| 492 | int top, int left) | ||
| 493 | { | ||
| 494 | struct osd_layer_config *cfg = &layer->layer_info.config; | ||
| 495 | struct vpbe_device *vpbe_dev = disp_dev->vpbe_dev; | ||
| 496 | |||
| 497 | cfg->xpos = min((unsigned int)left, | ||
| 498 | vpbe_dev->current_timings.xres - cfg->xsize); | ||
| 499 | cfg->ypos = min((unsigned int)top, | ||
| 500 | vpbe_dev->current_timings.yres - cfg->ysize); | ||
| 501 | |||
| 502 | v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, | ||
| 503 | "new xpos = %d, ypos = %d\n", | ||
| 504 | cfg->xpos, cfg->ypos); | ||
| 505 | } | ||
| 506 | |||
| 507 | static void vpbe_disp_check_window_params(struct vpbe_display *disp_dev, | ||
| 508 | struct v4l2_rect *c) | ||
| 509 | { | ||
| 510 | struct vpbe_device *vpbe_dev = disp_dev->vpbe_dev; | ||
| 511 | |||
| 512 | if ((c->width == 0) || | ||
| 513 | ((c->width + c->left) > vpbe_dev->current_timings.xres)) | ||
| 514 | c->width = vpbe_dev->current_timings.xres - c->left; | ||
| 515 | |||
| 516 | if ((c->height == 0) || ((c->height + c->top) > | ||
| 517 | vpbe_dev->current_timings.yres)) | ||
| 518 | c->height = vpbe_dev->current_timings.yres - c->top; | ||
| 519 | |||
| 520 | /* window height must be even for interlaced display */ | ||
| 521 | if (vpbe_dev->current_timings.interlaced) | ||
| 522 | c->height &= (~0x01); | ||
| 523 | |||
| 524 | } | ||
| 525 | |||
| 526 | /** | ||
| 527 | * vpbe_try_format() | ||
| 528 | * If user application provides width and height, and have bytesperline set | ||
| 529 | * to zero, driver calculates bytesperline and sizeimage based on hardware | ||
| 530 | * limits. | ||
| 531 | */ | ||
| 532 | static int vpbe_try_format(struct vpbe_display *disp_dev, | ||
| 533 | struct v4l2_pix_format *pixfmt, int check) | ||
| 534 | { | ||
| 535 | struct vpbe_device *vpbe_dev = disp_dev->vpbe_dev; | ||
| 536 | int min_height = 1; | ||
| 537 | int min_width = 32; | ||
| 538 | int max_height; | ||
| 539 | int max_width; | ||
| 540 | int bpp; | ||
| 541 | |||
| 542 | if ((pixfmt->pixelformat != V4L2_PIX_FMT_UYVY) && | ||
| 543 | (pixfmt->pixelformat != V4L2_PIX_FMT_NV12)) | ||
| 544 | /* choose default as V4L2_PIX_FMT_UYVY */ | ||
| 545 | pixfmt->pixelformat = V4L2_PIX_FMT_UYVY; | ||
| 546 | |||
| 547 | /* Check the field format */ | ||
| 548 | if ((pixfmt->field != V4L2_FIELD_INTERLACED) && | ||
| 549 | (pixfmt->field != V4L2_FIELD_NONE)) { | ||
| 550 | if (vpbe_dev->current_timings.interlaced) | ||
| 551 | pixfmt->field = V4L2_FIELD_INTERLACED; | ||
| 552 | else | ||
| 553 | pixfmt->field = V4L2_FIELD_NONE; | ||
| 554 | } | ||
| 555 | |||
| 556 | if (pixfmt->field == V4L2_FIELD_INTERLACED) | ||
| 557 | min_height = 2; | ||
| 558 | |||
| 559 | if (pixfmt->pixelformat == V4L2_PIX_FMT_NV12) | ||
| 560 | bpp = 1; | ||
| 561 | else | ||
| 562 | bpp = 2; | ||
| 563 | |||
| 564 | max_width = vpbe_dev->current_timings.xres; | ||
| 565 | max_height = vpbe_dev->current_timings.yres; | ||
| 566 | |||
| 567 | min_width /= bpp; | ||
| 568 | |||
| 569 | if (!pixfmt->width || (pixfmt->width < min_width) || | ||
| 570 | (pixfmt->width > max_width)) { | ||
| 571 | pixfmt->width = vpbe_dev->current_timings.xres; | ||
| 572 | } | ||
| 573 | |||
| 574 | if (!pixfmt->height || (pixfmt->height < min_height) || | ||
| 575 | (pixfmt->height > max_height)) { | ||
| 576 | pixfmt->height = vpbe_dev->current_timings.yres; | ||
| 577 | } | ||
| 578 | |||
| 579 | if (pixfmt->bytesperline < (pixfmt->width * bpp)) | ||
| 580 | pixfmt->bytesperline = pixfmt->width * bpp; | ||
| 581 | |||
| 582 | /* Make the bytesperline 32 byte aligned */ | ||
| 583 | pixfmt->bytesperline = ((pixfmt->width * bpp + 31) & ~31); | ||
| 584 | |||
| 585 | if (pixfmt->pixelformat == V4L2_PIX_FMT_NV12) | ||
| 586 | pixfmt->sizeimage = pixfmt->bytesperline * pixfmt->height + | ||
| 587 | (pixfmt->bytesperline * pixfmt->height >> 1); | ||
| 588 | else | ||
| 589 | pixfmt->sizeimage = pixfmt->bytesperline * pixfmt->height; | ||
| 590 | |||
| 591 | return 0; | ||
| 592 | } | ||
| 593 | |||
| 594 | static int vpbe_display_g_priority(struct file *file, void *priv, | ||
| 595 | enum v4l2_priority *p) | ||
| 596 | { | ||
| 597 | struct vpbe_fh *fh = file->private_data; | ||
| 598 | struct vpbe_layer *layer = fh->layer; | ||
| 599 | |||
| 600 | *p = v4l2_prio_max(&layer->prio); | ||
| 601 | |||
| 602 | return 0; | ||
| 603 | } | ||
| 604 | |||
| 605 | static int vpbe_display_s_priority(struct file *file, void *priv, | ||
| 606 | enum v4l2_priority p) | ||
| 607 | { | ||
| 608 | struct vpbe_fh *fh = file->private_data; | ||
| 609 | struct vpbe_layer *layer = fh->layer; | ||
| 610 | int ret; | ||
| 611 | |||
| 612 | ret = v4l2_prio_change(&layer->prio, &fh->prio, p); | ||
| 613 | |||
| 614 | return ret; | ||
| 615 | } | ||
| 616 | |||
| 617 | static int vpbe_display_querycap(struct file *file, void *priv, | ||
| 618 | struct v4l2_capability *cap) | ||
| 619 | { | ||
| 620 | struct vpbe_fh *fh = file->private_data; | ||
| 621 | struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev; | ||
| 622 | |||
| 623 | cap->version = VPBE_DISPLAY_VERSION_CODE; | ||
| 624 | cap->capabilities = V4L2_CAP_VIDEO_OUTPUT | V4L2_CAP_STREAMING; | ||
| 625 | strlcpy(cap->driver, VPBE_DISPLAY_DRIVER, sizeof(cap->driver)); | ||
| 626 | strlcpy(cap->bus_info, "platform", sizeof(cap->bus_info)); | ||
| 627 | strlcpy(cap->card, vpbe_dev->cfg->module_name, sizeof(cap->card)); | ||
| 628 | |||
| 629 | return 0; | ||
| 630 | } | ||
| 631 | |||
| 632 | static int vpbe_display_s_crop(struct file *file, void *priv, | ||
| 633 | struct v4l2_crop *crop) | ||
| 634 | { | ||
| 635 | struct vpbe_fh *fh = file->private_data; | ||
| 636 | struct vpbe_layer *layer = fh->layer; | ||
| 637 | struct vpbe_display *disp_dev = fh->disp_dev; | ||
| 638 | struct vpbe_device *vpbe_dev = disp_dev->vpbe_dev; | ||
| 639 | struct osd_layer_config *cfg = &layer->layer_info.config; | ||
| 640 | struct osd_state *osd_device = disp_dev->osd_device; | ||
| 641 | struct v4l2_rect *rect = &crop->c; | ||
| 642 | int ret; | ||
| 643 | |||
| 644 | v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, | ||
| 645 | "VIDIOC_S_CROP, layer id = %d\n", layer->device_id); | ||
| 646 | |||
| 647 | if (crop->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) { | ||
| 648 | v4l2_err(&vpbe_dev->v4l2_dev, "Invalid buf type\n"); | ||
| 649 | return -EINVAL; | ||
| 650 | } | ||
| 651 | |||
| 652 | if (rect->top < 0) | ||
| 653 | rect->top = 0; | ||
| 654 | if (rect->left < 0) | ||
| 655 | rect->left = 0; | ||
| 656 | |||
| 657 | vpbe_disp_check_window_params(disp_dev, rect); | ||
| 658 | |||
| 659 | osd_device->ops.get_layer_config(osd_device, | ||
| 660 | layer->layer_info.id, cfg); | ||
| 661 | |||
| 662 | vpbe_disp_calculate_scale_factor(disp_dev, layer, | ||
| 663 | rect->width, | ||
| 664 | rect->height); | ||
| 665 | vpbe_disp_adj_position(disp_dev, layer, rect->top, | ||
| 666 | rect->left); | ||
| 667 | ret = osd_device->ops.set_layer_config(osd_device, | ||
| 668 | layer->layer_info.id, cfg); | ||
| 669 | if (ret < 0) { | ||
| 670 | v4l2_err(&vpbe_dev->v4l2_dev, | ||
| 671 | "Error in set layer config:\n"); | ||
| 672 | return -EINVAL; | ||
| 673 | } | ||
| 674 | |||
| 675 | /* apply zooming and h or v expansion */ | ||
| 676 | osd_device->ops.set_zoom(osd_device, | ||
| 677 | layer->layer_info.id, | ||
| 678 | layer->layer_info.h_zoom, | ||
| 679 | layer->layer_info.v_zoom); | ||
| 680 | ret = osd_device->ops.set_vid_expansion(osd_device, | ||
| 681 | layer->layer_info.h_exp, | ||
| 682 | layer->layer_info.v_exp); | ||
| 683 | if (ret < 0) { | ||
| 684 | v4l2_err(&vpbe_dev->v4l2_dev, | ||
| 685 | "Error in set vid expansion:\n"); | ||
| 686 | return -EINVAL; | ||
| 687 | } | ||
| 688 | |||
| 689 | if ((layer->layer_info.h_zoom != ZOOM_X1) || | ||
| 690 | (layer->layer_info.v_zoom != ZOOM_X1) || | ||
| 691 | (layer->layer_info.h_exp != H_EXP_OFF) || | ||
| 692 | (layer->layer_info.v_exp != V_EXP_OFF)) | ||
| 693 | /* Enable expansion filter */ | ||
| 694 | osd_device->ops.set_interpolation_filter(osd_device, 1); | ||
| 695 | else | ||
| 696 | osd_device->ops.set_interpolation_filter(osd_device, 0); | ||
| 697 | |||
| 698 | return 0; | ||
| 699 | } | ||
| 700 | |||
| 701 | static int vpbe_display_g_crop(struct file *file, void *priv, | ||
| 702 | struct v4l2_crop *crop) | ||
| 703 | { | ||
| 704 | struct vpbe_fh *fh = file->private_data; | ||
| 705 | struct vpbe_layer *layer = fh->layer; | ||
| 706 | struct osd_layer_config *cfg = &layer->layer_info.config; | ||
| 707 | struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev; | ||
| 708 | struct osd_state *osd_device = fh->disp_dev->osd_device; | ||
| 709 | struct v4l2_rect *rect = &crop->c; | ||
| 710 | int ret; | ||
| 711 | |||
| 712 | v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, | ||
| 713 | "VIDIOC_G_CROP, layer id = %d\n", | ||
| 714 | layer->device_id); | ||
| 715 | |||
| 716 | if (crop->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) { | ||
| 717 | v4l2_err(&vpbe_dev->v4l2_dev, "Invalid buf type\n"); | ||
| 718 | ret = -EINVAL; | ||
| 719 | } | ||
| 720 | osd_device->ops.get_layer_config(osd_device, | ||
| 721 | layer->layer_info.id, cfg); | ||
| 722 | rect->top = cfg->ypos; | ||
| 723 | rect->left = cfg->xpos; | ||
| 724 | rect->width = cfg->xsize; | ||
| 725 | rect->height = cfg->ysize; | ||
| 726 | |||
| 727 | return 0; | ||
| 728 | } | ||
| 729 | |||
| 730 | static int vpbe_display_cropcap(struct file *file, void *priv, | ||
| 731 | struct v4l2_cropcap *cropcap) | ||
| 732 | { | ||
| 733 | struct vpbe_fh *fh = file->private_data; | ||
| 734 | struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev; | ||
| 735 | |||
| 736 | v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "VIDIOC_CROPCAP ioctl\n"); | ||
| 737 | |||
| 738 | cropcap->type = V4L2_BUF_TYPE_VIDEO_OUTPUT; | ||
| 739 | cropcap->bounds.left = 0; | ||
| 740 | cropcap->bounds.top = 0; | ||
| 741 | cropcap->bounds.width = vpbe_dev->current_timings.xres; | ||
| 742 | cropcap->bounds.height = vpbe_dev->current_timings.yres; | ||
| 743 | cropcap->pixelaspect = vpbe_dev->current_timings.aspect; | ||
| 744 | cropcap->defrect = cropcap->bounds; | ||
| 745 | return 0; | ||
| 746 | } | ||
| 747 | |||
| 748 | static int vpbe_display_g_fmt(struct file *file, void *priv, | ||
| 749 | struct v4l2_format *fmt) | ||
| 750 | { | ||
| 751 | struct vpbe_fh *fh = file->private_data; | ||
| 752 | struct vpbe_layer *layer = fh->layer; | ||
| 753 | struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev; | ||
| 754 | |||
| 755 | v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, | ||
| 756 | "VIDIOC_G_FMT, layer id = %d\n", | ||
| 757 | layer->device_id); | ||
| 758 | |||
| 759 | /* If buffer type is video output */ | ||
| 760 | if (V4L2_BUF_TYPE_VIDEO_OUTPUT != fmt->type) { | ||
| 761 | v4l2_err(&vpbe_dev->v4l2_dev, "invalid type\n"); | ||
| 762 | return -EINVAL; | ||
| 763 | } | ||
| 764 | /* Fill in the information about format */ | ||
| 765 | fmt->fmt.pix = layer->pix_fmt; | ||
| 766 | |||
| 767 | return 0; | ||
| 768 | } | ||
| 769 | |||
| 770 | static int vpbe_display_enum_fmt(struct file *file, void *priv, | ||
| 771 | struct v4l2_fmtdesc *fmt) | ||
| 772 | { | ||
| 773 | struct vpbe_fh *fh = file->private_data; | ||
| 774 | struct vpbe_layer *layer = fh->layer; | ||
| 775 | struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev; | ||
| 776 | unsigned int index = 0; | ||
| 777 | |||
| 778 | v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, | ||
| 779 | "VIDIOC_ENUM_FMT, layer id = %d\n", | ||
| 780 | layer->device_id); | ||
| 781 | if (fmt->index > 1) { | ||
| 782 | v4l2_err(&vpbe_dev->v4l2_dev, "Invalid format index\n"); | ||
| 783 | return -EINVAL; | ||
| 784 | } | ||
| 785 | |||
| 786 | /* Fill in the information about format */ | ||
| 787 | index = fmt->index; | ||
| 788 | memset(fmt, 0, sizeof(*fmt)); | ||
| 789 | fmt->index = index; | ||
| 790 | fmt->type = V4L2_BUF_TYPE_VIDEO_OUTPUT; | ||
| 791 | if (index == 0) { | ||
| 792 | strcpy(fmt->description, "YUV 4:2:2 - UYVY"); | ||
| 793 | fmt->pixelformat = V4L2_PIX_FMT_UYVY; | ||
| 794 | } else { | ||
| 795 | strcpy(fmt->description, "Y/CbCr 4:2:0"); | ||
| 796 | fmt->pixelformat = V4L2_PIX_FMT_NV12; | ||
| 797 | } | ||
| 798 | |||
| 799 | return 0; | ||
| 800 | } | ||
| 801 | |||
| 802 | static int vpbe_display_s_fmt(struct file *file, void *priv, | ||
| 803 | struct v4l2_format *fmt) | ||
| 804 | { | ||
| 805 | struct vpbe_fh *fh = file->private_data; | ||
| 806 | struct vpbe_layer *layer = fh->layer; | ||
| 807 | struct vpbe_display *disp_dev = fh->disp_dev; | ||
| 808 | struct vpbe_device *vpbe_dev = disp_dev->vpbe_dev; | ||
| 809 | struct osd_layer_config *cfg = &layer->layer_info.config; | ||
| 810 | struct v4l2_pix_format *pixfmt = &fmt->fmt.pix; | ||
| 811 | struct osd_state *osd_device = disp_dev->osd_device; | ||
| 812 | int ret; | ||
| 813 | |||
| 814 | v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, | ||
| 815 | "VIDIOC_S_FMT, layer id = %d\n", | ||
| 816 | layer->device_id); | ||
| 817 | |||
| 818 | /* If streaming is started, return error */ | ||
| 819 | if (layer->started) { | ||
| 820 | v4l2_err(&vpbe_dev->v4l2_dev, "Streaming is started\n"); | ||
| 821 | return -EBUSY; | ||
| 822 | } | ||
| 823 | if (V4L2_BUF_TYPE_VIDEO_OUTPUT != fmt->type) { | ||
| 824 | v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "invalid type\n"); | ||
| 825 | return -EINVAL; | ||
| 826 | } | ||
| 827 | /* Check for valid pixel format */ | ||
| 828 | ret = vpbe_try_format(disp_dev, pixfmt, 1); | ||
| 829 | if (ret) | ||
| 830 | return ret; | ||
| 831 | |||
| 832 | /* YUV420 is requested, check availability of the | ||
| 833 | other video window */ | ||
| 834 | |||
| 835 | layer->pix_fmt = *pixfmt; | ||
| 836 | |||
| 837 | /* Get osd layer config */ | ||
| 838 | osd_device->ops.get_layer_config(osd_device, | ||
| 839 | layer->layer_info.id, cfg); | ||
| 840 | /* Store the pixel format in the layer object */ | ||
| 841 | cfg->xsize = pixfmt->width; | ||
| 842 | cfg->ysize = pixfmt->height; | ||
| 843 | cfg->line_length = pixfmt->bytesperline; | ||
| 844 | cfg->ypos = 0; | ||
| 845 | cfg->xpos = 0; | ||
| 846 | cfg->interlaced = vpbe_dev->current_timings.interlaced; | ||
| 847 | |||
| 848 | if (V4L2_PIX_FMT_UYVY == pixfmt->pixelformat) | ||
| 849 | cfg->pixfmt = PIXFMT_YCbCrI; | ||
| 850 | |||
| 851 | /* Change of the default pixel format for both video windows */ | ||
| 852 | if (V4L2_PIX_FMT_NV12 == pixfmt->pixelformat) { | ||
| 853 | struct vpbe_layer *otherlayer; | ||
| 854 | cfg->pixfmt = PIXFMT_NV12; | ||
| 855 | otherlayer = _vpbe_display_get_other_win_layer(disp_dev, | ||
| 856 | layer); | ||
| 857 | otherlayer->layer_info.config.pixfmt = PIXFMT_NV12; | ||
| 858 | } | ||
| 859 | |||
| 860 | /* Set the layer config in the osd window */ | ||
| 861 | ret = osd_device->ops.set_layer_config(osd_device, | ||
| 862 | layer->layer_info.id, cfg); | ||
| 863 | if (ret < 0) { | ||
| 864 | v4l2_err(&vpbe_dev->v4l2_dev, | ||
| 865 | "Error in S_FMT params:\n"); | ||
| 866 | return -EINVAL; | ||
| 867 | } | ||
| 868 | |||
| 869 | /* Readback and fill the local copy of current pix format */ | ||
| 870 | osd_device->ops.get_layer_config(osd_device, | ||
| 871 | layer->layer_info.id, cfg); | ||
| 872 | |||
| 873 | return 0; | ||
| 874 | } | ||
| 875 | |||
| 876 | static int vpbe_display_try_fmt(struct file *file, void *priv, | ||
| 877 | struct v4l2_format *fmt) | ||
| 878 | { | ||
| 879 | struct vpbe_fh *fh = file->private_data; | ||
| 880 | struct vpbe_display *disp_dev = fh->disp_dev; | ||
| 881 | struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev; | ||
| 882 | struct v4l2_pix_format *pixfmt = &fmt->fmt.pix; | ||
| 883 | |||
| 884 | v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "VIDIOC_TRY_FMT\n"); | ||
| 885 | |||
| 886 | if (V4L2_BUF_TYPE_VIDEO_OUTPUT != fmt->type) { | ||
| 887 | v4l2_err(&vpbe_dev->v4l2_dev, "invalid type\n"); | ||
| 888 | return -EINVAL; | ||
| 889 | } | ||
| 890 | |||
| 891 | /* Check for valid field format */ | ||
| 892 | return vpbe_try_format(disp_dev, pixfmt, 0); | ||
| 893 | |||
| 894 | } | ||
| 895 | |||
| 896 | /** | ||
| 897 | * vpbe_display_s_std - Set the given standard in the encoder | ||
| 898 | * | ||
| 899 | * Sets the standard if supported by the current encoder. Return the status. | ||
| 900 | * 0 - success & -EINVAL on error | ||
| 901 | */ | ||
| 902 | static int vpbe_display_s_std(struct file *file, void *priv, | ||
| 903 | v4l2_std_id *std_id) | ||
| 904 | { | ||
| 905 | struct vpbe_fh *fh = priv; | ||
| 906 | struct vpbe_layer *layer = fh->layer; | ||
| 907 | struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev; | ||
| 908 | int ret; | ||
| 909 | |||
| 910 | v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "VIDIOC_S_STD\n"); | ||
| 911 | |||
| 912 | /* If streaming is started, return error */ | ||
| 913 | if (layer->started) { | ||
| 914 | v4l2_err(&vpbe_dev->v4l2_dev, "Streaming is started\n"); | ||
| 915 | return -EBUSY; | ||
| 916 | } | ||
| 917 | if (NULL != vpbe_dev->ops.s_std) { | ||
| 918 | ret = vpbe_dev->ops.s_std(vpbe_dev, std_id); | ||
| 919 | if (ret) { | ||
| 920 | v4l2_err(&vpbe_dev->v4l2_dev, | ||
| 921 | "Failed to set standard for sub devices\n"); | ||
| 922 | return -EINVAL; | ||
| 923 | } | ||
| 924 | } else { | ||
| 925 | return -EINVAL; | ||
| 926 | } | ||
| 927 | |||
| 928 | return 0; | ||
| 929 | } | ||
| 930 | |||
| 931 | /** | ||
| 932 | * vpbe_display_g_std - Get the standard in the current encoder | ||
| 933 | * | ||
| 934 | * Get the standard in the current encoder. Return the status. 0 - success | ||
| 935 | * -EINVAL on error | ||
| 936 | */ | ||
| 937 | static int vpbe_display_g_std(struct file *file, void *priv, | ||
| 938 | v4l2_std_id *std_id) | ||
| 939 | { | ||
| 940 | struct vpbe_fh *fh = priv; | ||
| 941 | struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev; | ||
| 942 | |||
| 943 | v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "VIDIOC_G_STD\n"); | ||
| 944 | |||
| 945 | /* Get the standard from the current encoder */ | ||
| 946 | if (vpbe_dev->current_timings.timings_type & VPBE_ENC_STD) { | ||
| 947 | *std_id = vpbe_dev->current_timings.timings.std_id; | ||
| 948 | return 0; | ||
| 949 | } | ||
| 950 | |||
| 951 | return -EINVAL; | ||
| 952 | } | ||
| 953 | |||
| 954 | /** | ||
| 955 | * vpbe_display_enum_output - enumerate outputs | ||
| 956 | * | ||
| 957 | * Enumerates the outputs available at the vpbe display | ||
| 958 | * returns the status, -EINVAL if end of output list | ||
| 959 | */ | ||
| 960 | static int vpbe_display_enum_output(struct file *file, void *priv, | ||
| 961 | struct v4l2_output *output) | ||
| 962 | { | ||
| 963 | struct vpbe_fh *fh = priv; | ||
| 964 | struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev; | ||
| 965 | int ret; | ||
| 966 | |||
| 967 | v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "VIDIOC_ENUM_OUTPUT\n"); | ||
| 968 | |||
| 969 | /* Enumerate outputs */ | ||
| 970 | |||
| 971 | if (NULL == vpbe_dev->ops.enum_outputs) | ||
| 972 | return -EINVAL; | ||
| 973 | |||
| 974 | ret = vpbe_dev->ops.enum_outputs(vpbe_dev, output); | ||
| 975 | if (ret) { | ||
| 976 | v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, | ||
| 977 | "Failed to enumerate outputs\n"); | ||
| 978 | return -EINVAL; | ||
| 979 | } | ||
| 980 | |||
| 981 | return 0; | ||
| 982 | } | ||
| 983 | |||
| 984 | /** | ||
| 985 | * vpbe_display_s_output - Set output to | ||
| 986 | * the output specified by the index | ||
| 987 | */ | ||
| 988 | static int vpbe_display_s_output(struct file *file, void *priv, | ||
| 989 | unsigned int i) | ||
| 990 | { | ||
| 991 | struct vpbe_fh *fh = priv; | ||
| 992 | struct vpbe_layer *layer = fh->layer; | ||
| 993 | struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev; | ||
| 994 | int ret; | ||
| 995 | |||
| 996 | v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "VIDIOC_S_OUTPUT\n"); | ||
| 997 | /* If streaming is started, return error */ | ||
| 998 | if (layer->started) { | ||
| 999 | v4l2_err(&vpbe_dev->v4l2_dev, "Streaming is started\n"); | ||
| 1000 | return -EBUSY; | ||
| 1001 | } | ||
| 1002 | if (NULL == vpbe_dev->ops.set_output) | ||
| 1003 | return -EINVAL; | ||
| 1004 | |||
| 1005 | ret = vpbe_dev->ops.set_output(vpbe_dev, i); | ||
| 1006 | if (ret) { | ||
| 1007 | v4l2_err(&vpbe_dev->v4l2_dev, | ||
| 1008 | "Failed to set output for sub devices\n"); | ||
| 1009 | return -EINVAL; | ||
| 1010 | } | ||
| 1011 | |||
| 1012 | return 0; | ||
| 1013 | } | ||
| 1014 | |||
| 1015 | /** | ||
| 1016 | * vpbe_display_g_output - Get output from subdevice | ||
| 1017 | * for a given by the index | ||
| 1018 | */ | ||
| 1019 | static int vpbe_display_g_output(struct file *file, void *priv, | ||
| 1020 | unsigned int *i) | ||
| 1021 | { | ||
| 1022 | struct vpbe_fh *fh = priv; | ||
| 1023 | struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev; | ||
| 1024 | |||
| 1025 | v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "VIDIOC_G_OUTPUT\n"); | ||
| 1026 | /* Get the standard from the current encoder */ | ||
| 1027 | *i = vpbe_dev->current_out_index; | ||
| 1028 | |||
| 1029 | return 0; | ||
| 1030 | } | ||
| 1031 | |||
| 1032 | /** | ||
| 1033 | * vpbe_display_enum_dv_presets - Enumerate the dv presets | ||
| 1034 | * | ||
| 1035 | * enum the preset in the current encoder. Return the status. 0 - success | ||
| 1036 | * -EINVAL on error | ||
| 1037 | */ | ||
| 1038 | static int | ||
| 1039 | vpbe_display_enum_dv_presets(struct file *file, void *priv, | ||
| 1040 | struct v4l2_dv_enum_preset *preset) | ||
| 1041 | { | ||
| 1042 | struct vpbe_fh *fh = priv; | ||
| 1043 | struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev; | ||
| 1044 | int ret; | ||
| 1045 | |||
| 1046 | v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "VIDIOC_ENUM_DV_PRESETS\n"); | ||
| 1047 | |||
| 1048 | /* Enumerate outputs */ | ||
| 1049 | if (NULL == vpbe_dev->ops.enum_dv_presets) | ||
| 1050 | return -EINVAL; | ||
| 1051 | |||
| 1052 | ret = vpbe_dev->ops.enum_dv_presets(vpbe_dev, preset); | ||
| 1053 | if (ret) { | ||
| 1054 | v4l2_err(&vpbe_dev->v4l2_dev, | ||
| 1055 | "Failed to enumerate dv presets info\n"); | ||
| 1056 | return -EINVAL; | ||
| 1057 | } | ||
| 1058 | |||
| 1059 | return 0; | ||
| 1060 | } | ||
| 1061 | |||
| 1062 | /** | ||
| 1063 | * vpbe_display_s_dv_preset - Set the dv presets | ||
| 1064 | * | ||
| 1065 | * Set the preset in the current encoder. Return the status. 0 - success | ||
| 1066 | * -EINVAL on error | ||
| 1067 | */ | ||
| 1068 | static int | ||
| 1069 | vpbe_display_s_dv_preset(struct file *file, void *priv, | ||
| 1070 | struct v4l2_dv_preset *preset) | ||
| 1071 | { | ||
| 1072 | struct vpbe_fh *fh = priv; | ||
| 1073 | struct vpbe_layer *layer = fh->layer; | ||
| 1074 | struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev; | ||
| 1075 | int ret; | ||
| 1076 | |||
| 1077 | v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "VIDIOC_S_DV_PRESETS\n"); | ||
| 1078 | |||
| 1079 | |||
| 1080 | /* If streaming is started, return error */ | ||
| 1081 | if (layer->started) { | ||
| 1082 | v4l2_err(&vpbe_dev->v4l2_dev, "Streaming is started\n"); | ||
| 1083 | return -EBUSY; | ||
| 1084 | } | ||
| 1085 | |||
| 1086 | /* Set the given standard in the encoder */ | ||
| 1087 | if (NULL != vpbe_dev->ops.s_dv_preset) | ||
| 1088 | return -EINVAL; | ||
| 1089 | |||
| 1090 | ret = vpbe_dev->ops.s_dv_preset(vpbe_dev, preset); | ||
| 1091 | if (ret) { | ||
| 1092 | v4l2_err(&vpbe_dev->v4l2_dev, | ||
| 1093 | "Failed to set the dv presets info\n"); | ||
| 1094 | return -EINVAL; | ||
| 1095 | } | ||
| 1096 | /* set the current norm to zero to be consistent. If STD is used | ||
| 1097 | * v4l2 layer will set the norm properly on successful s_std call | ||
| 1098 | */ | ||
| 1099 | layer->video_dev.current_norm = 0; | ||
| 1100 | |||
| 1101 | return 0; | ||
| 1102 | } | ||
| 1103 | |||
| 1104 | /** | ||
| 1105 | * vpbe_display_g_dv_preset - Set the dv presets | ||
| 1106 | * | ||
| 1107 | * Get the preset in the current encoder. Return the status. 0 - success | ||
| 1108 | * -EINVAL on error | ||
| 1109 | */ | ||
| 1110 | static int | ||
| 1111 | vpbe_display_g_dv_preset(struct file *file, void *priv, | ||
| 1112 | struct v4l2_dv_preset *dv_preset) | ||
| 1113 | { | ||
| 1114 | struct vpbe_fh *fh = priv; | ||
| 1115 | struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev; | ||
| 1116 | |||
| 1117 | v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "VIDIOC_G_DV_PRESETS\n"); | ||
| 1118 | |||
| 1119 | /* Get the given standard in the encoder */ | ||
| 1120 | |||
| 1121 | if (vpbe_dev->current_timings.timings_type & | ||
| 1122 | VPBE_ENC_DV_PRESET) { | ||
| 1123 | dv_preset->preset = | ||
| 1124 | vpbe_dev->current_timings.timings.dv_preset; | ||
| 1125 | } else { | ||
| 1126 | return -EINVAL; | ||
| 1127 | } | ||
| 1128 | |||
| 1129 | return 0; | ||
| 1130 | } | ||
| 1131 | |||
| 1132 | static int vpbe_display_streamoff(struct file *file, void *priv, | ||
| 1133 | enum v4l2_buf_type buf_type) | ||
| 1134 | { | ||
| 1135 | struct vpbe_fh *fh = file->private_data; | ||
| 1136 | struct vpbe_layer *layer = fh->layer; | ||
| 1137 | struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev; | ||
| 1138 | struct osd_state *osd_device = fh->disp_dev->osd_device; | ||
| 1139 | int ret; | ||
| 1140 | |||
| 1141 | v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, | ||
| 1142 | "VIDIOC_STREAMOFF,layer id = %d\n", | ||
| 1143 | layer->device_id); | ||
| 1144 | |||
| 1145 | if (V4L2_BUF_TYPE_VIDEO_OUTPUT != buf_type) { | ||
| 1146 | v4l2_err(&vpbe_dev->v4l2_dev, "Invalid buffer type\n"); | ||
| 1147 | return -EINVAL; | ||
| 1148 | } | ||
| 1149 | |||
| 1150 | /* If io is allowed for this file handle, return error */ | ||
| 1151 | if (!fh->io_allowed) { | ||
| 1152 | v4l2_err(&vpbe_dev->v4l2_dev, "No io_allowed\n"); | ||
| 1153 | return -EACCES; | ||
| 1154 | } | ||
| 1155 | |||
| 1156 | /* If streaming is not started, return error */ | ||
| 1157 | if (!layer->started) { | ||
| 1158 | v4l2_err(&vpbe_dev->v4l2_dev, "streaming not started in layer" | ||
| 1159 | " id = %d\n", layer->device_id); | ||
| 1160 | return -EINVAL; | ||
| 1161 | } | ||
| 1162 | |||
| 1163 | osd_device->ops.disable_layer(osd_device, | ||
| 1164 | layer->layer_info.id); | ||
| 1165 | layer->started = 0; | ||
| 1166 | ret = videobuf_streamoff(&layer->buffer_queue); | ||
| 1167 | |||
| 1168 | return ret; | ||
| 1169 | } | ||
| 1170 | |||
| 1171 | static int vpbe_display_streamon(struct file *file, void *priv, | ||
| 1172 | enum v4l2_buf_type buf_type) | ||
| 1173 | { | ||
| 1174 | struct vpbe_fh *fh = file->private_data; | ||
| 1175 | struct vpbe_layer *layer = fh->layer; | ||
| 1176 | struct vpbe_display *disp_dev = fh->disp_dev; | ||
| 1177 | struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev; | ||
| 1178 | struct osd_state *osd_device = disp_dev->osd_device; | ||
| 1179 | int ret; | ||
| 1180 | |||
| 1181 | osd_device->ops.disable_layer(osd_device, | ||
| 1182 | layer->layer_info.id); | ||
| 1183 | |||
| 1184 | v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "VIDIOC_STREAMON, layerid=%d\n", | ||
| 1185 | layer->device_id); | ||
| 1186 | |||
| 1187 | if (V4L2_BUF_TYPE_VIDEO_OUTPUT != buf_type) { | ||
| 1188 | v4l2_err(&vpbe_dev->v4l2_dev, "Invalid buffer type\n"); | ||
| 1189 | return -EINVAL; | ||
| 1190 | } | ||
| 1191 | |||
| 1192 | /* If file handle is not allowed IO, return error */ | ||
| 1193 | if (!fh->io_allowed) { | ||
| 1194 | v4l2_err(&vpbe_dev->v4l2_dev, "No io_allowed\n"); | ||
| 1195 | return -EACCES; | ||
| 1196 | } | ||
| 1197 | /* If Streaming is already started, return error */ | ||
| 1198 | if (layer->started) { | ||
| 1199 | v4l2_err(&vpbe_dev->v4l2_dev, "layer is already streaming\n"); | ||
| 1200 | return -EBUSY; | ||
| 1201 | } | ||
| 1202 | |||
| 1203 | /* | ||
| 1204 | * Call videobuf_streamon to start streaming | ||
| 1205 | * in videobuf | ||
| 1206 | */ | ||
| 1207 | ret = videobuf_streamon(&layer->buffer_queue); | ||
| 1208 | if (ret) { | ||
| 1209 | v4l2_err(&vpbe_dev->v4l2_dev, | ||
| 1210 | "error in videobuf_streamon\n"); | ||
| 1211 | return ret; | ||
| 1212 | } | ||
| 1213 | /* If buffer queue is empty, return error */ | ||
| 1214 | if (list_empty(&layer->dma_queue)) { | ||
| 1215 | v4l2_err(&vpbe_dev->v4l2_dev, "buffer queue is empty\n"); | ||
| 1216 | goto streamoff; | ||
| 1217 | } | ||
| 1218 | /* Get the next frame from the buffer queue */ | ||
| 1219 | layer->next_frm = layer->cur_frm = list_entry(layer->dma_queue.next, | ||
| 1220 | struct videobuf_buffer, queue); | ||
| 1221 | /* Remove buffer from the buffer queue */ | ||
| 1222 | list_del(&layer->cur_frm->queue); | ||
| 1223 | /* Mark state of the current frame to active */ | ||
| 1224 | layer->cur_frm->state = VIDEOBUF_ACTIVE; | ||
| 1225 | /* Initialize field_id and started member */ | ||
| 1226 | layer->field_id = 0; | ||
| 1227 | |||
| 1228 | /* Set parameters in OSD and VENC */ | ||
| 1229 | ret = vpbe_set_osd_display_params(disp_dev, layer); | ||
| 1230 | if (ret < 0) | ||
| 1231 | goto streamoff; | ||
| 1232 | |||
| 1233 | /* | ||
| 1234 | * if request format is yuv420 semiplanar, need to | ||
| 1235 | * enable both video windows | ||
| 1236 | */ | ||
| 1237 | layer->started = 1; | ||
| 1238 | |||
| 1239 | layer->layer_first_int = 1; | ||
| 1240 | |||
| 1241 | return ret; | ||
| 1242 | streamoff: | ||
| 1243 | ret = videobuf_streamoff(&layer->buffer_queue); | ||
| 1244 | return ret; | ||
| 1245 | } | ||
| 1246 | |||
| 1247 | static int vpbe_display_dqbuf(struct file *file, void *priv, | ||
| 1248 | struct v4l2_buffer *buf) | ||
| 1249 | { | ||
| 1250 | struct vpbe_fh *fh = file->private_data; | ||
| 1251 | struct vpbe_layer *layer = fh->layer; | ||
| 1252 | struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev; | ||
| 1253 | int ret; | ||
| 1254 | |||
| 1255 | v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, | ||
| 1256 | "VIDIOC_DQBUF, layer id = %d\n", | ||
| 1257 | layer->device_id); | ||
| 1258 | |||
| 1259 | if (V4L2_BUF_TYPE_VIDEO_OUTPUT != buf->type) { | ||
| 1260 | v4l2_err(&vpbe_dev->v4l2_dev, "Invalid buffer type\n"); | ||
| 1261 | return -EINVAL; | ||
| 1262 | } | ||
| 1263 | /* If this file handle is not allowed to do IO, return error */ | ||
| 1264 | if (!fh->io_allowed) { | ||
| 1265 | v4l2_err(&vpbe_dev->v4l2_dev, "No io_allowed\n"); | ||
| 1266 | return -EACCES; | ||
| 1267 | } | ||
| 1268 | if (file->f_flags & O_NONBLOCK) | ||
| 1269 | /* Call videobuf_dqbuf for non blocking mode */ | ||
| 1270 | ret = videobuf_dqbuf(&layer->buffer_queue, buf, 1); | ||
| 1271 | else | ||
| 1272 | /* Call videobuf_dqbuf for blocking mode */ | ||
| 1273 | ret = videobuf_dqbuf(&layer->buffer_queue, buf, 0); | ||
| 1274 | |||
| 1275 | return ret; | ||
| 1276 | } | ||
| 1277 | |||
| 1278 | static int vpbe_display_qbuf(struct file *file, void *priv, | ||
| 1279 | struct v4l2_buffer *p) | ||
| 1280 | { | ||
| 1281 | struct vpbe_fh *fh = file->private_data; | ||
| 1282 | struct vpbe_layer *layer = fh->layer; | ||
| 1283 | struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev; | ||
| 1284 | |||
| 1285 | v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, | ||
| 1286 | "VIDIOC_QBUF, layer id = %d\n", | ||
| 1287 | layer->device_id); | ||
| 1288 | |||
| 1289 | if (V4L2_BUF_TYPE_VIDEO_OUTPUT != p->type) { | ||
| 1290 | v4l2_err(&vpbe_dev->v4l2_dev, "Invalid buffer type\n"); | ||
| 1291 | return -EINVAL; | ||
| 1292 | } | ||
| 1293 | |||
| 1294 | /* If this file handle is not allowed to do IO, return error */ | ||
| 1295 | if (!fh->io_allowed) { | ||
| 1296 | v4l2_err(&vpbe_dev->v4l2_dev, "No io_allowed\n"); | ||
| 1297 | return -EACCES; | ||
| 1298 | } | ||
| 1299 | |||
| 1300 | return videobuf_qbuf(&layer->buffer_queue, p); | ||
| 1301 | } | ||
| 1302 | |||
| 1303 | static int vpbe_display_querybuf(struct file *file, void *priv, | ||
| 1304 | struct v4l2_buffer *buf) | ||
| 1305 | { | ||
| 1306 | struct vpbe_fh *fh = file->private_data; | ||
| 1307 | struct vpbe_layer *layer = fh->layer; | ||
| 1308 | struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev; | ||
| 1309 | int ret; | ||
| 1310 | |||
| 1311 | v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, | ||
| 1312 | "VIDIOC_QUERYBUF, layer id = %d\n", | ||
| 1313 | layer->device_id); | ||
| 1314 | |||
| 1315 | if (V4L2_BUF_TYPE_VIDEO_OUTPUT != buf->type) { | ||
| 1316 | v4l2_err(&vpbe_dev->v4l2_dev, "Invalid buffer type\n"); | ||
| 1317 | return -EINVAL; | ||
| 1318 | } | ||
| 1319 | |||
| 1320 | /* Call videobuf_querybuf to get information */ | ||
| 1321 | ret = videobuf_querybuf(&layer->buffer_queue, buf); | ||
| 1322 | |||
| 1323 | return ret; | ||
| 1324 | } | ||
| 1325 | |||
| 1326 | static int vpbe_display_reqbufs(struct file *file, void *priv, | ||
| 1327 | struct v4l2_requestbuffers *req_buf) | ||
| 1328 | { | ||
| 1329 | struct vpbe_fh *fh = file->private_data; | ||
| 1330 | struct vpbe_layer *layer = fh->layer; | ||
| 1331 | struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev; | ||
| 1332 | int ret; | ||
| 1333 | |||
| 1334 | v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "vpbe_display_reqbufs\n"); | ||
| 1335 | |||
| 1336 | if (V4L2_BUF_TYPE_VIDEO_OUTPUT != req_buf->type) { | ||
| 1337 | v4l2_err(&vpbe_dev->v4l2_dev, "Invalid buffer type\n"); | ||
| 1338 | return -EINVAL; | ||
| 1339 | } | ||
| 1340 | |||
| 1341 | /* If io users of the layer is not zero, return error */ | ||
| 1342 | if (0 != layer->io_usrs) { | ||
| 1343 | v4l2_err(&vpbe_dev->v4l2_dev, "not IO user\n"); | ||
| 1344 | return -EBUSY; | ||
| 1345 | } | ||
| 1346 | /* Initialize videobuf queue as per the buffer type */ | ||
| 1347 | videobuf_queue_dma_contig_init(&layer->buffer_queue, | ||
| 1348 | &video_qops, | ||
| 1349 | vpbe_dev->pdev, | ||
| 1350 | &layer->irqlock, | ||
| 1351 | V4L2_BUF_TYPE_VIDEO_OUTPUT, | ||
| 1352 | layer->pix_fmt.field, | ||
| 1353 | sizeof(struct videobuf_buffer), | ||
| 1354 | fh, NULL); | ||
| 1355 | |||
| 1356 | /* Set io allowed member of file handle to TRUE */ | ||
| 1357 | fh->io_allowed = 1; | ||
| 1358 | /* Increment io usrs member of layer object to 1 */ | ||
| 1359 | layer->io_usrs = 1; | ||
| 1360 | /* Store type of memory requested in layer object */ | ||
| 1361 | layer->memory = req_buf->memory; | ||
| 1362 | /* Initialize buffer queue */ | ||
| 1363 | INIT_LIST_HEAD(&layer->dma_queue); | ||
| 1364 | /* Allocate buffers */ | ||
| 1365 | ret = videobuf_reqbufs(&layer->buffer_queue, req_buf); | ||
| 1366 | |||
| 1367 | return ret; | ||
| 1368 | } | ||
| 1369 | |||
| 1370 | /* | ||
| 1371 | * vpbe_display_mmap() | ||
| 1372 | * It is used to map kernel space buffers into user spaces | ||
| 1373 | */ | ||
| 1374 | static int vpbe_display_mmap(struct file *filep, struct vm_area_struct *vma) | ||
| 1375 | { | ||
| 1376 | /* Get the layer object and file handle object */ | ||
| 1377 | struct vpbe_fh *fh = filep->private_data; | ||
| 1378 | struct vpbe_layer *layer = fh->layer; | ||
| 1379 | struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev; | ||
| 1380 | |||
| 1381 | v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "vpbe_display_mmap\n"); | ||
| 1382 | |||
| 1383 | return videobuf_mmap_mapper(&layer->buffer_queue, vma); | ||
| 1384 | } | ||
| 1385 | |||
| 1386 | /* vpbe_display_poll(): It is used for select/poll system call | ||
| 1387 | */ | ||
| 1388 | static unsigned int vpbe_display_poll(struct file *filep, poll_table *wait) | ||
| 1389 | { | ||
| 1390 | struct vpbe_fh *fh = filep->private_data; | ||
| 1391 | struct vpbe_layer *layer = fh->layer; | ||
| 1392 | struct vpbe_device *vpbe_dev = fh->disp_dev->vpbe_dev; | ||
| 1393 | unsigned int err = 0; | ||
| 1394 | |||
| 1395 | v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "vpbe_display_poll\n"); | ||
| 1396 | if (layer->started) | ||
| 1397 | err = videobuf_poll_stream(filep, &layer->buffer_queue, wait); | ||
| 1398 | return err; | ||
| 1399 | } | ||
| 1400 | |||
| 1401 | /* | ||
| 1402 | * vpbe_display_open() | ||
| 1403 | * It creates object of file handle structure and stores it in private_data | ||
| 1404 | * member of filepointer | ||
| 1405 | */ | ||
| 1406 | static int vpbe_display_open(struct file *file) | ||
| 1407 | { | ||
| 1408 | struct vpbe_fh *fh = NULL; | ||
| 1409 | struct vpbe_layer *layer = video_drvdata(file); | ||
| 1410 | struct vpbe_display *disp_dev = layer->disp_dev; | ||
| 1411 | struct vpbe_device *vpbe_dev = disp_dev->vpbe_dev; | ||
| 1412 | struct osd_state *osd_device = disp_dev->osd_device; | ||
| 1413 | int err; | ||
| 1414 | |||
| 1415 | /* Allocate memory for the file handle object */ | ||
| 1416 | fh = kmalloc(sizeof(struct vpbe_fh), GFP_KERNEL); | ||
| 1417 | if (fh == NULL) { | ||
| 1418 | v4l2_err(&vpbe_dev->v4l2_dev, | ||
| 1419 | "unable to allocate memory for file handle object\n"); | ||
| 1420 | return -ENOMEM; | ||
| 1421 | } | ||
| 1422 | v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, | ||
| 1423 | "vpbe display open plane = %d\n", | ||
| 1424 | layer->device_id); | ||
| 1425 | |||
| 1426 | /* store pointer to fh in private_data member of filep */ | ||
| 1427 | file->private_data = fh; | ||
| 1428 | fh->layer = layer; | ||
| 1429 | fh->disp_dev = disp_dev; | ||
| 1430 | |||
| 1431 | if (!layer->usrs) { | ||
| 1432 | |||
| 1433 | /* First claim the layer for this device */ | ||
| 1434 | err = osd_device->ops.request_layer(osd_device, | ||
| 1435 | layer->layer_info.id); | ||
| 1436 | if (err < 0) { | ||
| 1437 | /* Couldn't get layer */ | ||
| 1438 | v4l2_err(&vpbe_dev->v4l2_dev, | ||
| 1439 | "Display Manager failed to allocate layer\n"); | ||
| 1440 | kfree(fh); | ||
| 1441 | return -EINVAL; | ||
| 1442 | } | ||
| 1443 | } | ||
| 1444 | /* Increment layer usrs counter */ | ||
| 1445 | layer->usrs++; | ||
| 1446 | /* Set io_allowed member to false */ | ||
| 1447 | fh->io_allowed = 0; | ||
| 1448 | /* Initialize priority of this instance to default priority */ | ||
| 1449 | fh->prio = V4L2_PRIORITY_UNSET; | ||
| 1450 | v4l2_prio_open(&layer->prio, &fh->prio); | ||
| 1451 | v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, | ||
| 1452 | "vpbe display device opened successfully\n"); | ||
| 1453 | return 0; | ||
| 1454 | } | ||
| 1455 | |||
| 1456 | /* | ||
| 1457 | * vpbe_display_release() | ||
| 1458 | * This function deletes buffer queue, frees the buffers and the davinci | ||
| 1459 | * display file * handle | ||
| 1460 | */ | ||
| 1461 | static int vpbe_display_release(struct file *file) | ||
| 1462 | { | ||
| 1463 | /* Get the layer object and file handle object */ | ||
| 1464 | struct vpbe_fh *fh = file->private_data; | ||
| 1465 | struct vpbe_layer *layer = fh->layer; | ||
| 1466 | struct osd_layer_config *cfg = &layer->layer_info.config; | ||
| 1467 | struct vpbe_display *disp_dev = fh->disp_dev; | ||
| 1468 | struct vpbe_device *vpbe_dev = disp_dev->vpbe_dev; | ||
| 1469 | struct osd_state *osd_device = disp_dev->osd_device; | ||
| 1470 | |||
| 1471 | v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "vpbe_display_release\n"); | ||
| 1472 | |||
| 1473 | /* if this instance is doing IO */ | ||
| 1474 | if (fh->io_allowed) { | ||
| 1475 | /* Reset io_usrs member of layer object */ | ||
| 1476 | layer->io_usrs = 0; | ||
| 1477 | |||
| 1478 | osd_device->ops.disable_layer(osd_device, | ||
| 1479 | layer->layer_info.id); | ||
| 1480 | layer->started = 0; | ||
| 1481 | /* Free buffers allocated */ | ||
| 1482 | videobuf_queue_cancel(&layer->buffer_queue); | ||
| 1483 | videobuf_mmap_free(&layer->buffer_queue); | ||
| 1484 | } | ||
| 1485 | |||
| 1486 | /* Decrement layer usrs counter */ | ||
| 1487 | layer->usrs--; | ||
| 1488 | /* If this file handle has initialize encoder device, reset it */ | ||
| 1489 | if (!layer->usrs) { | ||
| 1490 | if (cfg->pixfmt == PIXFMT_NV12) { | ||
| 1491 | struct vpbe_layer *otherlayer; | ||
| 1492 | otherlayer = | ||
| 1493 | _vpbe_display_get_other_win_layer(disp_dev, layer); | ||
| 1494 | osd_device->ops.disable_layer(osd_device, | ||
| 1495 | otherlayer->layer_info.id); | ||
| 1496 | osd_device->ops.release_layer(osd_device, | ||
| 1497 | otherlayer->layer_info.id); | ||
| 1498 | } | ||
| 1499 | osd_device->ops.disable_layer(osd_device, | ||
| 1500 | layer->layer_info.id); | ||
| 1501 | osd_device->ops.release_layer(osd_device, | ||
| 1502 | layer->layer_info.id); | ||
| 1503 | } | ||
| 1504 | /* Close the priority */ | ||
| 1505 | v4l2_prio_close(&layer->prio, fh->prio); | ||
| 1506 | file->private_data = NULL; | ||
| 1507 | |||
| 1508 | /* Free memory allocated to file handle object */ | ||
| 1509 | kfree(fh); | ||
| 1510 | |||
| 1511 | disp_dev->cbcr_ofst = 0; | ||
| 1512 | |||
| 1513 | return 0; | ||
| 1514 | } | ||
| 1515 | |||
| 1516 | #ifdef CONFIG_VIDEO_ADV_DEBUG | ||
| 1517 | static int vpbe_display_g_register(struct file *file, void *priv, | ||
| 1518 | struct v4l2_dbg_register *reg) | ||
| 1519 | { | ||
| 1520 | struct v4l2_dbg_match *match = ®->match; | ||
| 1521 | |||
| 1522 | if (match->type >= 2) { | ||
| 1523 | v4l2_subdev_call(vpbe_dev->venc, | ||
| 1524 | core, | ||
| 1525 | g_register, | ||
| 1526 | reg); | ||
| 1527 | } | ||
| 1528 | |||
| 1529 | return 0; | ||
| 1530 | } | ||
| 1531 | |||
| 1532 | static int vpbe_display_s_register(struct file *file, void *priv, | ||
| 1533 | struct v4l2_dbg_register *reg) | ||
| 1534 | { | ||
| 1535 | return 0; | ||
| 1536 | } | ||
| 1537 | #endif | ||
| 1538 | |||
| 1539 | /* vpbe capture ioctl operations */ | ||
| 1540 | static const struct v4l2_ioctl_ops vpbe_ioctl_ops = { | ||
| 1541 | .vidioc_querycap = vpbe_display_querycap, | ||
| 1542 | .vidioc_g_fmt_vid_out = vpbe_display_g_fmt, | ||
| 1543 | .vidioc_enum_fmt_vid_out = vpbe_display_enum_fmt, | ||
| 1544 | .vidioc_s_fmt_vid_out = vpbe_display_s_fmt, | ||
| 1545 | .vidioc_try_fmt_vid_out = vpbe_display_try_fmt, | ||
| 1546 | .vidioc_reqbufs = vpbe_display_reqbufs, | ||
| 1547 | .vidioc_querybuf = vpbe_display_querybuf, | ||
| 1548 | .vidioc_qbuf = vpbe_display_qbuf, | ||
| 1549 | .vidioc_dqbuf = vpbe_display_dqbuf, | ||
| 1550 | .vidioc_streamon = vpbe_display_streamon, | ||
| 1551 | .vidioc_streamoff = vpbe_display_streamoff, | ||
| 1552 | .vidioc_cropcap = vpbe_display_cropcap, | ||
| 1553 | .vidioc_g_crop = vpbe_display_g_crop, | ||
| 1554 | .vidioc_s_crop = vpbe_display_s_crop, | ||
| 1555 | .vidioc_g_priority = vpbe_display_g_priority, | ||
| 1556 | .vidioc_s_priority = vpbe_display_s_priority, | ||
| 1557 | .vidioc_s_std = vpbe_display_s_std, | ||
| 1558 | .vidioc_g_std = vpbe_display_g_std, | ||
| 1559 | .vidioc_enum_output = vpbe_display_enum_output, | ||
| 1560 | .vidioc_s_output = vpbe_display_s_output, | ||
| 1561 | .vidioc_g_output = vpbe_display_g_output, | ||
| 1562 | .vidioc_s_dv_preset = vpbe_display_s_dv_preset, | ||
| 1563 | .vidioc_g_dv_preset = vpbe_display_g_dv_preset, | ||
| 1564 | .vidioc_enum_dv_presets = vpbe_display_enum_dv_presets, | ||
| 1565 | #ifdef CONFIG_VIDEO_ADV_DEBUG | ||
| 1566 | .vidioc_g_register = vpbe_display_g_register, | ||
| 1567 | .vidioc_s_register = vpbe_display_s_register, | ||
| 1568 | #endif | ||
| 1569 | }; | ||
| 1570 | |||
| 1571 | static struct v4l2_file_operations vpbe_fops = { | ||
| 1572 | .owner = THIS_MODULE, | ||
| 1573 | .open = vpbe_display_open, | ||
| 1574 | .release = vpbe_display_release, | ||
| 1575 | .unlocked_ioctl = video_ioctl2, | ||
| 1576 | .mmap = vpbe_display_mmap, | ||
| 1577 | .poll = vpbe_display_poll | ||
| 1578 | }; | ||
| 1579 | |||
| 1580 | static int vpbe_device_get(struct device *dev, void *data) | ||
| 1581 | { | ||
| 1582 | struct platform_device *pdev = to_platform_device(dev); | ||
| 1583 | struct vpbe_display *vpbe_disp = data; | ||
| 1584 | |||
| 1585 | if (strcmp("vpbe_controller", pdev->name) == 0) | ||
| 1586 | vpbe_disp->vpbe_dev = platform_get_drvdata(pdev); | ||
| 1587 | |||
| 1588 | if (strcmp("vpbe-osd", pdev->name) == 0) | ||
| 1589 | vpbe_disp->osd_device = platform_get_drvdata(pdev); | ||
| 1590 | |||
| 1591 | return 0; | ||
| 1592 | } | ||
| 1593 | |||
| 1594 | static __devinit int init_vpbe_layer(int i, struct vpbe_display *disp_dev, | ||
| 1595 | struct platform_device *pdev) | ||
| 1596 | { | ||
| 1597 | struct vpbe_layer *vpbe_display_layer = NULL; | ||
| 1598 | struct video_device *vbd = NULL; | ||
| 1599 | |||
| 1600 | /* Allocate memory for four plane display objects */ | ||
| 1601 | |||
| 1602 | disp_dev->dev[i] = | ||
| 1603 | kzalloc(sizeof(struct vpbe_layer), GFP_KERNEL); | ||
| 1604 | |||
| 1605 | /* If memory allocation fails, return error */ | ||
| 1606 | if (!disp_dev->dev[i]) { | ||
| 1607 | printk(KERN_ERR "ran out of memory\n"); | ||
| 1608 | return -ENOMEM; | ||
| 1609 | } | ||
| 1610 | spin_lock_init(&disp_dev->dev[i]->irqlock); | ||
| 1611 | mutex_init(&disp_dev->dev[i]->opslock); | ||
| 1612 | |||
| 1613 | /* Get the pointer to the layer object */ | ||
| 1614 | vpbe_display_layer = disp_dev->dev[i]; | ||
| 1615 | vbd = &vpbe_display_layer->video_dev; | ||
| 1616 | /* Initialize field of video device */ | ||
| 1617 | vbd->release = video_device_release_empty; | ||
| 1618 | vbd->fops = &vpbe_fops; | ||
| 1619 | vbd->ioctl_ops = &vpbe_ioctl_ops; | ||
| 1620 | vbd->minor = -1; | ||
| 1621 | vbd->v4l2_dev = &disp_dev->vpbe_dev->v4l2_dev; | ||
| 1622 | vbd->lock = &vpbe_display_layer->opslock; | ||
| 1623 | |||
| 1624 | if (disp_dev->vpbe_dev->current_timings.timings_type & | ||
| 1625 | VPBE_ENC_STD) { | ||
| 1626 | vbd->tvnorms = (V4L2_STD_525_60 | V4L2_STD_625_50); | ||
| 1627 | vbd->current_norm = | ||
| 1628 | disp_dev->vpbe_dev-> | ||
| 1629 | current_timings.timings.std_id; | ||
| 1630 | } else | ||
| 1631 | vbd->current_norm = 0; | ||
| 1632 | |||
| 1633 | snprintf(vbd->name, sizeof(vbd->name), | ||
| 1634 | "DaVinci_VPBE Display_DRIVER_V%d.%d.%d", | ||
| 1635 | (VPBE_DISPLAY_VERSION_CODE >> 16) & 0xff, | ||
| 1636 | (VPBE_DISPLAY_VERSION_CODE >> 8) & 0xff, | ||
| 1637 | (VPBE_DISPLAY_VERSION_CODE) & 0xff); | ||
| 1638 | |||
| 1639 | vpbe_display_layer->device_id = i; | ||
| 1640 | |||
| 1641 | vpbe_display_layer->layer_info.id = | ||
| 1642 | ((i == VPBE_DISPLAY_DEVICE_0) ? WIN_VID0 : WIN_VID1); | ||
| 1643 | |||
| 1644 | /* Initialize prio member of layer object */ | ||
| 1645 | v4l2_prio_init(&vpbe_display_layer->prio); | ||
| 1646 | |||
| 1647 | return 0; | ||
| 1648 | } | ||
| 1649 | |||
| 1650 | static __devinit int register_device(struct vpbe_layer *vpbe_display_layer, | ||
| 1651 | struct vpbe_display *disp_dev, | ||
| 1652 | struct platform_device *pdev) { | ||
| 1653 | int err; | ||
| 1654 | |||
| 1655 | v4l2_info(&disp_dev->vpbe_dev->v4l2_dev, | ||
| 1656 | "Trying to register VPBE display device.\n"); | ||
| 1657 | v4l2_info(&disp_dev->vpbe_dev->v4l2_dev, | ||
| 1658 | "layer=%x,layer->video_dev=%x\n", | ||
| 1659 | (int)vpbe_display_layer, | ||
| 1660 | (int)&vpbe_display_layer->video_dev); | ||
| 1661 | |||
| 1662 | err = video_register_device(&vpbe_display_layer->video_dev, | ||
| 1663 | VFL_TYPE_GRABBER, | ||
| 1664 | -1); | ||
| 1665 | if (err) | ||
| 1666 | return -ENODEV; | ||
| 1667 | |||
| 1668 | vpbe_display_layer->disp_dev = disp_dev; | ||
| 1669 | /* set the driver data in platform device */ | ||
| 1670 | platform_set_drvdata(pdev, disp_dev); | ||
| 1671 | video_set_drvdata(&vpbe_display_layer->video_dev, | ||
| 1672 | vpbe_display_layer); | ||
| 1673 | |||
| 1674 | return 0; | ||
| 1675 | } | ||
| 1676 | |||
| 1677 | |||
| 1678 | |||
| 1679 | /* | ||
| 1680 | * vpbe_display_probe() | ||
| 1681 | * This function creates device entries by register itself to the V4L2 driver | ||
| 1682 | * and initializes fields of each layer objects | ||
| 1683 | */ | ||
| 1684 | static __devinit int vpbe_display_probe(struct platform_device *pdev) | ||
| 1685 | { | ||
| 1686 | struct vpbe_layer *vpbe_display_layer; | ||
| 1687 | struct vpbe_display *disp_dev; | ||
| 1688 | struct resource *res = NULL; | ||
| 1689 | int k; | ||
| 1690 | int i; | ||
| 1691 | int err; | ||
| 1692 | int irq; | ||
| 1693 | |||
| 1694 | printk(KERN_DEBUG "vpbe_display_probe\n"); | ||
| 1695 | /* Allocate memory for vpbe_display */ | ||
| 1696 | disp_dev = kzalloc(sizeof(struct vpbe_display), GFP_KERNEL); | ||
| 1697 | if (!disp_dev) { | ||
| 1698 | printk(KERN_ERR "ran out of memory\n"); | ||
| 1699 | return -ENOMEM; | ||
| 1700 | } | ||
| 1701 | |||
| 1702 | spin_lock_init(&disp_dev->dma_queue_lock); | ||
| 1703 | /* | ||
| 1704 | * Scan all the platform devices to find the vpbe | ||
| 1705 | * controller device and get the vpbe_dev object | ||
| 1706 | */ | ||
| 1707 | err = bus_for_each_dev(&platform_bus_type, NULL, disp_dev, | ||
| 1708 | vpbe_device_get); | ||
| 1709 | if (err < 0) | ||
| 1710 | return err; | ||
| 1711 | /* Initialize the vpbe display controller */ | ||
| 1712 | if (NULL != disp_dev->vpbe_dev->ops.initialize) { | ||
| 1713 | err = disp_dev->vpbe_dev->ops.initialize(&pdev->dev, | ||
| 1714 | disp_dev->vpbe_dev); | ||
| 1715 | if (err) { | ||
| 1716 | v4l2_err(&disp_dev->vpbe_dev->v4l2_dev, | ||
| 1717 | "Error initing vpbe\n"); | ||
| 1718 | err = -ENOMEM; | ||
| 1719 | goto probe_out; | ||
| 1720 | } | ||
| 1721 | } | ||
| 1722 | |||
| 1723 | for (i = 0; i < VPBE_DISPLAY_MAX_DEVICES; i++) { | ||
| 1724 | if (init_vpbe_layer(i, disp_dev, pdev)) { | ||
| 1725 | err = -ENODEV; | ||
| 1726 | goto probe_out; | ||
| 1727 | } | ||
| 1728 | } | ||
| 1729 | |||
| 1730 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | ||
| 1731 | if (!res) { | ||
| 1732 | v4l2_err(&disp_dev->vpbe_dev->v4l2_dev, | ||
| 1733 | "Unable to get VENC interrupt resource\n"); | ||
| 1734 | err = -ENODEV; | ||
| 1735 | goto probe_out; | ||
| 1736 | } | ||
| 1737 | |||
| 1738 | irq = res->start; | ||
| 1739 | if (request_irq(irq, venc_isr, IRQF_DISABLED, VPBE_DISPLAY_DRIVER, | ||
| 1740 | disp_dev)) { | ||
| 1741 | v4l2_err(&disp_dev->vpbe_dev->v4l2_dev, | ||
| 1742 | "Unable to request interrupt\n"); | ||
| 1743 | err = -ENODEV; | ||
| 1744 | goto probe_out; | ||
| 1745 | } | ||
| 1746 | |||
| 1747 | for (i = 0; i < VPBE_DISPLAY_MAX_DEVICES; i++) { | ||
| 1748 | if (register_device(disp_dev->dev[i], disp_dev, pdev)) { | ||
| 1749 | err = -ENODEV; | ||
| 1750 | goto probe_out; | ||
| 1751 | } | ||
| 1752 | } | ||
| 1753 | |||
| 1754 | printk(KERN_DEBUG "Successfully completed the probing of vpbe v4l2 device\n"); | ||
| 1755 | return 0; | ||
| 1756 | |||
| 1757 | probe_out: | ||
| 1758 | free_irq(res->start, disp_dev); | ||
| 1759 | for (k = 0; k < VPBE_DISPLAY_MAX_DEVICES; k++) { | ||
| 1760 | /* Get the pointer to the layer object */ | ||
| 1761 | vpbe_display_layer = disp_dev->dev[k]; | ||
| 1762 | /* Unregister video device */ | ||
| 1763 | if (vpbe_display_layer) { | ||
| 1764 | video_unregister_device( | ||
| 1765 | &vpbe_display_layer->video_dev); | ||
| 1766 | kfree(disp_dev->dev[k]); | ||
| 1767 | } | ||
| 1768 | } | ||
| 1769 | kfree(disp_dev); | ||
| 1770 | return err; | ||
| 1771 | } | ||
| 1772 | |||
| 1773 | /* | ||
| 1774 | * vpbe_display_remove() | ||
| 1775 | * It un-register hardware layer from V4L2 driver | ||
| 1776 | */ | ||
| 1777 | static int vpbe_display_remove(struct platform_device *pdev) | ||
| 1778 | { | ||
| 1779 | struct vpbe_layer *vpbe_display_layer; | ||
| 1780 | struct vpbe_display *disp_dev = platform_get_drvdata(pdev); | ||
| 1781 | struct vpbe_device *vpbe_dev = disp_dev->vpbe_dev; | ||
| 1782 | struct resource *res; | ||
| 1783 | int i; | ||
| 1784 | |||
| 1785 | v4l2_dbg(1, debug, &vpbe_dev->v4l2_dev, "vpbe_display_remove\n"); | ||
| 1786 | |||
| 1787 | /* unregister irq */ | ||
| 1788 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | ||
| 1789 | free_irq(res->start, disp_dev); | ||
| 1790 | |||
| 1791 | /* deinitialize the vpbe display controller */ | ||
| 1792 | if (NULL != vpbe_dev->ops.deinitialize) | ||
| 1793 | vpbe_dev->ops.deinitialize(&pdev->dev, vpbe_dev); | ||
| 1794 | /* un-register device */ | ||
| 1795 | for (i = 0; i < VPBE_DISPLAY_MAX_DEVICES; i++) { | ||
| 1796 | /* Get the pointer to the layer object */ | ||
| 1797 | vpbe_display_layer = disp_dev->dev[i]; | ||
| 1798 | /* Unregister video device */ | ||
| 1799 | video_unregister_device(&vpbe_display_layer->video_dev); | ||
| 1800 | |||
| 1801 | } | ||
| 1802 | for (i = 0; i < VPBE_DISPLAY_MAX_DEVICES; i++) { | ||
| 1803 | kfree(disp_dev->dev[i]); | ||
| 1804 | disp_dev->dev[i] = NULL; | ||
| 1805 | } | ||
| 1806 | |||
| 1807 | return 0; | ||
| 1808 | } | ||
| 1809 | |||
| 1810 | static struct platform_driver vpbe_display_driver = { | ||
| 1811 | .driver = { | ||
| 1812 | .name = VPBE_DISPLAY_DRIVER, | ||
| 1813 | .owner = THIS_MODULE, | ||
| 1814 | .bus = &platform_bus_type, | ||
| 1815 | }, | ||
| 1816 | .probe = vpbe_display_probe, | ||
| 1817 | .remove = __devexit_p(vpbe_display_remove), | ||
| 1818 | }; | ||
| 1819 | |||
| 1820 | /* | ||
| 1821 | * vpbe_display_init() | ||
| 1822 | * This function registers device and driver to the kernel, requests irq | ||
| 1823 | * handler and allocates memory for layer objects | ||
| 1824 | */ | ||
| 1825 | static __devinit int vpbe_display_init(void) | ||
| 1826 | { | ||
| 1827 | int err; | ||
| 1828 | |||
| 1829 | printk(KERN_DEBUG "vpbe_display_init\n"); | ||
| 1830 | |||
| 1831 | /* Register driver to the kernel */ | ||
| 1832 | err = platform_driver_register(&vpbe_display_driver); | ||
| 1833 | if (0 != err) | ||
| 1834 | return err; | ||
| 1835 | |||
| 1836 | printk(KERN_DEBUG "vpbe_display_init:" | ||
| 1837 | "VPBE V4L2 Display Driver V1.0 loaded\n"); | ||
| 1838 | return 0; | ||
| 1839 | } | ||
| 1840 | |||
| 1841 | /* | ||
| 1842 | * vpbe_display_cleanup() | ||
| 1843 | * This function un-registers device and driver to the kernel, frees requested | ||
| 1844 | * irq handler and de-allocates memory allocated for layer objects. | ||
| 1845 | */ | ||
| 1846 | static void vpbe_display_cleanup(void) | ||
| 1847 | { | ||
| 1848 | printk(KERN_DEBUG "vpbe_display_cleanup\n"); | ||
| 1849 | |||
| 1850 | /* platform driver unregister */ | ||
| 1851 | platform_driver_unregister(&vpbe_display_driver); | ||
| 1852 | } | ||
| 1853 | |||
| 1854 | /* Function for module initialization and cleanup */ | ||
| 1855 | module_init(vpbe_display_init); | ||
| 1856 | module_exit(vpbe_display_cleanup); | ||
| 1857 | |||
| 1858 | MODULE_DESCRIPTION("TI DM644x/DM355/DM365 VPBE Display controller"); | ||
| 1859 | MODULE_LICENSE("GPL"); | ||
| 1860 | MODULE_AUTHOR("Texas Instruments"); | ||
diff --git a/drivers/media/video/davinci/vpbe_osd.c b/drivers/media/video/davinci/vpbe_osd.c new file mode 100644 index 000000000000..5352884998f5 --- /dev/null +++ b/drivers/media/video/davinci/vpbe_osd.c | |||
| @@ -0,0 +1,1231 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2007-2010 Texas Instruments Inc | ||
| 3 | * Copyright (C) 2007 MontaVista Software, Inc. | ||
| 4 | * | ||
| 5 | * Andy Lowe (alowe@mvista.com), MontaVista Software | ||
| 6 | * - Initial version | ||
| 7 | * Murali Karicheri (mkaricheri@gmail.com), Texas Instruments Ltd. | ||
| 8 | * - ported to sub device interface | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License as published by | ||
| 12 | * the Free Software Foundation version 2. | ||
| 13 | * | ||
| 14 | * This program is distributed in the hope that it will be useful, | ||
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 17 | * GNU General Public License for more details. | ||
| 18 | * | ||
| 19 | * You should have received a copy of the GNU General Public License | ||
| 20 | * along with this program; if not, write to the Free Software | ||
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 22 | * | ||
| 23 | */ | ||
| 24 | #include <linux/module.h> | ||
| 25 | #include <linux/kernel.h> | ||
| 26 | #include <linux/interrupt.h> | ||
| 27 | #include <linux/platform_device.h> | ||
| 28 | #include <linux/clk.h> | ||
| 29 | #include <linux/slab.h> | ||
| 30 | |||
| 31 | #include <mach/io.h> | ||
| 32 | #include <mach/cputype.h> | ||
| 33 | #include <mach/hardware.h> | ||
| 34 | |||
| 35 | #include <media/davinci/vpss.h> | ||
| 36 | #include <media/v4l2-device.h> | ||
| 37 | #include <media/davinci/vpbe_types.h> | ||
| 38 | #include <media/davinci/vpbe_osd.h> | ||
| 39 | |||
| 40 | #include <linux/io.h> | ||
| 41 | #include "vpbe_osd_regs.h" | ||
| 42 | |||
| 43 | #define MODULE_NAME VPBE_OSD_SUBDEV_NAME | ||
| 44 | |||
| 45 | /* register access routines */ | ||
| 46 | static inline u32 osd_read(struct osd_state *sd, u32 offset) | ||
| 47 | { | ||
| 48 | struct osd_state *osd = sd; | ||
| 49 | |||
| 50 | return readl(osd->osd_base + offset); | ||
| 51 | } | ||
| 52 | |||
| 53 | static inline u32 osd_write(struct osd_state *sd, u32 val, u32 offset) | ||
| 54 | { | ||
| 55 | struct osd_state *osd = sd; | ||
| 56 | |||
| 57 | writel(val, osd->osd_base + offset); | ||
| 58 | |||
| 59 | return val; | ||
| 60 | } | ||
| 61 | |||
| 62 | static inline u32 osd_set(struct osd_state *sd, u32 mask, u32 offset) | ||
| 63 | { | ||
| 64 | struct osd_state *osd = sd; | ||
| 65 | |||
| 66 | u32 addr = osd->osd_base + offset; | ||
| 67 | u32 val = readl(addr) | mask; | ||
| 68 | |||
| 69 | writel(val, addr); | ||
| 70 | |||
| 71 | return val; | ||
| 72 | } | ||
| 73 | |||
| 74 | static inline u32 osd_clear(struct osd_state *sd, u32 mask, u32 offset) | ||
| 75 | { | ||
| 76 | struct osd_state *osd = sd; | ||
| 77 | |||
| 78 | u32 addr = osd->osd_base + offset; | ||
| 79 | u32 val = readl(addr) & ~mask; | ||
| 80 | |||
| 81 | writel(val, addr); | ||
| 82 | |||
| 83 | return val; | ||
| 84 | } | ||
| 85 | |||
| 86 | static inline u32 osd_modify(struct osd_state *sd, u32 mask, u32 val, | ||
| 87 | u32 offset) | ||
| 88 | { | ||
| 89 | struct osd_state *osd = sd; | ||
| 90 | |||
| 91 | u32 addr = osd->osd_base + offset; | ||
| 92 | u32 new_val = (readl(addr) & ~mask) | (val & mask); | ||
| 93 | |||
| 94 | writel(new_val, addr); | ||
| 95 | |||
| 96 | return new_val; | ||
| 97 | } | ||
| 98 | |||
| 99 | /* define some macros for layer and pixfmt classification */ | ||
| 100 | #define is_osd_win(layer) (((layer) == WIN_OSD0) || ((layer) == WIN_OSD1)) | ||
| 101 | #define is_vid_win(layer) (((layer) == WIN_VID0) || ((layer) == WIN_VID1)) | ||
| 102 | #define is_rgb_pixfmt(pixfmt) \ | ||
| 103 | (((pixfmt) == PIXFMT_RGB565) || ((pixfmt) == PIXFMT_RGB888)) | ||
| 104 | #define is_yc_pixfmt(pixfmt) \ | ||
| 105 | (((pixfmt) == PIXFMT_YCbCrI) || ((pixfmt) == PIXFMT_YCrCbI) || \ | ||
| 106 | ((pixfmt) == PIXFMT_NV12)) | ||
| 107 | #define MAX_WIN_SIZE OSD_VIDWIN0XP_V0X | ||
| 108 | #define MAX_LINE_LENGTH (OSD_VIDWIN0OFST_V0LO << 5) | ||
| 109 | |||
| 110 | /** | ||
| 111 | * _osd_dm6446_vid0_pingpong() - field inversion fix for DM6446 | ||
| 112 | * @sd - ptr to struct osd_state | ||
| 113 | * @field_inversion - inversion flag | ||
| 114 | * @fb_base_phys - frame buffer address | ||
| 115 | * @lconfig - ptr to layer config | ||
| 116 | * | ||
| 117 | * This routine implements a workaround for the field signal inversion silicon | ||
| 118 | * erratum described in Advisory 1.3.8 for the DM6446. The fb_base_phys and | ||
| 119 | * lconfig parameters apply to the vid0 window. This routine should be called | ||
| 120 | * whenever the vid0 layer configuration or start address is modified, or when | ||
| 121 | * the OSD field inversion setting is modified. | ||
| 122 | * Returns: 1 if the ping-pong buffers need to be toggled in the vsync isr, or | ||
| 123 | * 0 otherwise | ||
| 124 | */ | ||
| 125 | static int _osd_dm6446_vid0_pingpong(struct osd_state *sd, | ||
| 126 | int field_inversion, | ||
| 127 | unsigned long fb_base_phys, | ||
| 128 | const struct osd_layer_config *lconfig) | ||
| 129 | { | ||
| 130 | struct osd_platform_data *pdata; | ||
| 131 | |||
| 132 | pdata = (struct osd_platform_data *)sd->dev->platform_data; | ||
| 133 | if (pdata->field_inv_wa_enable) { | ||
| 134 | |||
| 135 | if (!field_inversion || !lconfig->interlaced) { | ||
| 136 | osd_write(sd, fb_base_phys & ~0x1F, OSD_VIDWIN0ADR); | ||
| 137 | osd_write(sd, fb_base_phys & ~0x1F, OSD_PPVWIN0ADR); | ||
| 138 | osd_modify(sd, OSD_MISCCTL_PPSW | OSD_MISCCTL_PPRV, 0, | ||
| 139 | OSD_MISCCTL); | ||
| 140 | return 0; | ||
| 141 | } else { | ||
| 142 | unsigned miscctl = OSD_MISCCTL_PPRV; | ||
| 143 | |||
| 144 | osd_write(sd, | ||
| 145 | (fb_base_phys & ~0x1F) - lconfig->line_length, | ||
| 146 | OSD_VIDWIN0ADR); | ||
| 147 | osd_write(sd, | ||
| 148 | (fb_base_phys & ~0x1F) + lconfig->line_length, | ||
| 149 | OSD_PPVWIN0ADR); | ||
| 150 | osd_modify(sd, | ||
| 151 | OSD_MISCCTL_PPSW | OSD_MISCCTL_PPRV, miscctl, | ||
| 152 | OSD_MISCCTL); | ||
| 153 | |||
| 154 | return 1; | ||
| 155 | } | ||
| 156 | } | ||
| 157 | |||
| 158 | return 0; | ||
| 159 | } | ||
| 160 | |||
| 161 | static void _osd_set_field_inversion(struct osd_state *sd, int enable) | ||
| 162 | { | ||
| 163 | unsigned fsinv = 0; | ||
| 164 | |||
| 165 | if (enable) | ||
| 166 | fsinv = OSD_MODE_FSINV; | ||
| 167 | |||
| 168 | osd_modify(sd, OSD_MODE_FSINV, fsinv, OSD_MODE); | ||
| 169 | } | ||
| 170 | |||
| 171 | static void _osd_set_blink_attribute(struct osd_state *sd, int enable, | ||
| 172 | enum osd_blink_interval blink) | ||
| 173 | { | ||
| 174 | u32 osdatrmd = 0; | ||
| 175 | |||
| 176 | if (enable) { | ||
| 177 | osdatrmd |= OSD_OSDATRMD_BLNK; | ||
| 178 | osdatrmd |= blink << OSD_OSDATRMD_BLNKINT_SHIFT; | ||
| 179 | } | ||
| 180 | /* caller must ensure that OSD1 is configured in attribute mode */ | ||
| 181 | osd_modify(sd, OSD_OSDATRMD_BLNKINT | OSD_OSDATRMD_BLNK, osdatrmd, | ||
| 182 | OSD_OSDATRMD); | ||
| 183 | } | ||
| 184 | |||
| 185 | static void _osd_set_rom_clut(struct osd_state *sd, | ||
| 186 | enum osd_rom_clut rom_clut) | ||
| 187 | { | ||
| 188 | if (rom_clut == ROM_CLUT0) | ||
| 189 | osd_clear(sd, OSD_MISCCTL_RSEL, OSD_MISCCTL); | ||
| 190 | else | ||
| 191 | osd_set(sd, OSD_MISCCTL_RSEL, OSD_MISCCTL); | ||
| 192 | } | ||
| 193 | |||
| 194 | static void _osd_set_palette_map(struct osd_state *sd, | ||
| 195 | enum osd_win_layer osdwin, | ||
| 196 | unsigned char pixel_value, | ||
| 197 | unsigned char clut_index, | ||
| 198 | enum osd_pix_format pixfmt) | ||
| 199 | { | ||
| 200 | static const int map_2bpp[] = { 0, 5, 10, 15 }; | ||
| 201 | static const int map_1bpp[] = { 0, 15 }; | ||
| 202 | int bmp_offset; | ||
| 203 | int bmp_shift; | ||
| 204 | int bmp_mask; | ||
| 205 | int bmp_reg; | ||
| 206 | |||
| 207 | switch (pixfmt) { | ||
| 208 | case PIXFMT_1BPP: | ||
| 209 | bmp_reg = map_1bpp[pixel_value & 0x1]; | ||
| 210 | break; | ||
| 211 | case PIXFMT_2BPP: | ||
| 212 | bmp_reg = map_2bpp[pixel_value & 0x3]; | ||
| 213 | break; | ||
| 214 | case PIXFMT_4BPP: | ||
| 215 | bmp_reg = pixel_value & 0xf; | ||
| 216 | break; | ||
| 217 | default: | ||
| 218 | return; | ||
| 219 | } | ||
| 220 | |||
| 221 | switch (osdwin) { | ||
| 222 | case OSDWIN_OSD0: | ||
| 223 | bmp_offset = OSD_W0BMP01 + (bmp_reg >> 1) * sizeof(u32); | ||
| 224 | break; | ||
| 225 | case OSDWIN_OSD1: | ||
| 226 | bmp_offset = OSD_W1BMP01 + (bmp_reg >> 1) * sizeof(u32); | ||
| 227 | break; | ||
| 228 | default: | ||
| 229 | return; | ||
| 230 | } | ||
| 231 | |||
| 232 | if (bmp_reg & 1) { | ||
| 233 | bmp_shift = 8; | ||
| 234 | bmp_mask = 0xff << 8; | ||
| 235 | } else { | ||
| 236 | bmp_shift = 0; | ||
| 237 | bmp_mask = 0xff; | ||
| 238 | } | ||
| 239 | |||
| 240 | osd_modify(sd, bmp_mask, clut_index << bmp_shift, bmp_offset); | ||
| 241 | } | ||
| 242 | |||
| 243 | static void _osd_set_rec601_attenuation(struct osd_state *sd, | ||
| 244 | enum osd_win_layer osdwin, int enable) | ||
| 245 | { | ||
| 246 | switch (osdwin) { | ||
| 247 | case OSDWIN_OSD0: | ||
| 248 | osd_modify(sd, OSD_OSDWIN0MD_ATN0E, | ||
| 249 | enable ? OSD_OSDWIN0MD_ATN0E : 0, | ||
| 250 | OSD_OSDWIN0MD); | ||
| 251 | break; | ||
| 252 | case OSDWIN_OSD1: | ||
| 253 | osd_modify(sd, OSD_OSDWIN1MD_ATN1E, | ||
| 254 | enable ? OSD_OSDWIN1MD_ATN1E : 0, | ||
| 255 | OSD_OSDWIN1MD); | ||
| 256 | break; | ||
| 257 | } | ||
| 258 | } | ||
| 259 | |||
| 260 | static void _osd_set_blending_factor(struct osd_state *sd, | ||
| 261 | enum osd_win_layer osdwin, | ||
| 262 | enum osd_blending_factor blend) | ||
| 263 | { | ||
| 264 | switch (osdwin) { | ||
| 265 | case OSDWIN_OSD0: | ||
| 266 | osd_modify(sd, OSD_OSDWIN0MD_BLND0, | ||
| 267 | blend << OSD_OSDWIN0MD_BLND0_SHIFT, OSD_OSDWIN0MD); | ||
| 268 | break; | ||
| 269 | case OSDWIN_OSD1: | ||
| 270 | osd_modify(sd, OSD_OSDWIN1MD_BLND1, | ||
| 271 | blend << OSD_OSDWIN1MD_BLND1_SHIFT, OSD_OSDWIN1MD); | ||
| 272 | break; | ||
| 273 | } | ||
| 274 | } | ||
| 275 | |||
| 276 | static void _osd_enable_color_key(struct osd_state *sd, | ||
| 277 | enum osd_win_layer osdwin, | ||
| 278 | unsigned colorkey, | ||
| 279 | enum osd_pix_format pixfmt) | ||
| 280 | { | ||
| 281 | switch (pixfmt) { | ||
| 282 | case PIXFMT_RGB565: | ||
| 283 | osd_write(sd, colorkey & OSD_TRANSPVAL_RGBTRANS, | ||
| 284 | OSD_TRANSPVAL); | ||
| 285 | break; | ||
| 286 | default: | ||
| 287 | break; | ||
| 288 | } | ||
| 289 | |||
| 290 | switch (osdwin) { | ||
| 291 | case OSDWIN_OSD0: | ||
| 292 | osd_set(sd, OSD_OSDWIN0MD_TE0, OSD_OSDWIN0MD); | ||
| 293 | break; | ||
| 294 | case OSDWIN_OSD1: | ||
| 295 | osd_set(sd, OSD_OSDWIN1MD_TE1, OSD_OSDWIN1MD); | ||
| 296 | break; | ||
| 297 | } | ||
| 298 | } | ||
| 299 | |||
| 300 | static void _osd_disable_color_key(struct osd_state *sd, | ||
| 301 | enum osd_win_layer osdwin) | ||
| 302 | { | ||
| 303 | switch (osdwin) { | ||
| 304 | case OSDWIN_OSD0: | ||
| 305 | osd_clear(sd, OSD_OSDWIN0MD_TE0, OSD_OSDWIN0MD); | ||
| 306 | break; | ||
| 307 | case OSDWIN_OSD1: | ||
| 308 | osd_clear(sd, OSD_OSDWIN1MD_TE1, OSD_OSDWIN1MD); | ||
| 309 | break; | ||
| 310 | } | ||
| 311 | } | ||
| 312 | |||
| 313 | static void _osd_set_osd_clut(struct osd_state *sd, | ||
| 314 | enum osd_win_layer osdwin, | ||
| 315 | enum osd_clut clut) | ||
| 316 | { | ||
| 317 | u32 winmd = 0; | ||
| 318 | |||
| 319 | switch (osdwin) { | ||
| 320 | case OSDWIN_OSD0: | ||
| 321 | if (clut == RAM_CLUT) | ||
| 322 | winmd |= OSD_OSDWIN0MD_CLUTS0; | ||
| 323 | osd_modify(sd, OSD_OSDWIN0MD_CLUTS0, winmd, OSD_OSDWIN0MD); | ||
| 324 | break; | ||
| 325 | case OSDWIN_OSD1: | ||
| 326 | if (clut == RAM_CLUT) | ||
| 327 | winmd |= OSD_OSDWIN1MD_CLUTS1; | ||
| 328 | osd_modify(sd, OSD_OSDWIN1MD_CLUTS1, winmd, OSD_OSDWIN1MD); | ||
| 329 | break; | ||
| 330 | } | ||
| 331 | } | ||
| 332 | |||
| 333 | static void _osd_set_zoom(struct osd_state *sd, enum osd_layer layer, | ||
| 334 | enum osd_zoom_factor h_zoom, | ||
| 335 | enum osd_zoom_factor v_zoom) | ||
| 336 | { | ||
| 337 | u32 winmd = 0; | ||
| 338 | |||
| 339 | switch (layer) { | ||
| 340 | case WIN_OSD0: | ||
| 341 | winmd |= (h_zoom << OSD_OSDWIN0MD_OHZ0_SHIFT); | ||
| 342 | winmd |= (v_zoom << OSD_OSDWIN0MD_OVZ0_SHIFT); | ||
| 343 | osd_modify(sd, OSD_OSDWIN0MD_OHZ0 | OSD_OSDWIN0MD_OVZ0, winmd, | ||
| 344 | OSD_OSDWIN0MD); | ||
| 345 | break; | ||
| 346 | case WIN_VID0: | ||
| 347 | winmd |= (h_zoom << OSD_VIDWINMD_VHZ0_SHIFT); | ||
| 348 | winmd |= (v_zoom << OSD_VIDWINMD_VVZ0_SHIFT); | ||
| 349 | osd_modify(sd, OSD_VIDWINMD_VHZ0 | OSD_VIDWINMD_VVZ0, winmd, | ||
| 350 | OSD_VIDWINMD); | ||
| 351 | break; | ||
| 352 | case WIN_OSD1: | ||
| 353 | winmd |= (h_zoom << OSD_OSDWIN1MD_OHZ1_SHIFT); | ||
| 354 | winmd |= (v_zoom << OSD_OSDWIN1MD_OVZ1_SHIFT); | ||
| 355 | osd_modify(sd, OSD_OSDWIN1MD_OHZ1 | OSD_OSDWIN1MD_OVZ1, winmd, | ||
| 356 | OSD_OSDWIN1MD); | ||
| 357 | break; | ||
| 358 | case WIN_VID1: | ||
| 359 | winmd |= (h_zoom << OSD_VIDWINMD_VHZ1_SHIFT); | ||
| 360 | winmd |= (v_zoom << OSD_VIDWINMD_VVZ1_SHIFT); | ||
| 361 | osd_modify(sd, OSD_VIDWINMD_VHZ1 | OSD_VIDWINMD_VVZ1, winmd, | ||
| 362 | OSD_VIDWINMD); | ||
| 363 | break; | ||
| 364 | } | ||
| 365 | } | ||
| 366 | |||
| 367 | static void _osd_disable_layer(struct osd_state *sd, enum osd_layer layer) | ||
| 368 | { | ||
| 369 | switch (layer) { | ||
| 370 | case WIN_OSD0: | ||
| 371 | osd_clear(sd, OSD_OSDWIN0MD_OACT0, OSD_OSDWIN0MD); | ||
| 372 | break; | ||
| 373 | case WIN_VID0: | ||
| 374 | osd_clear(sd, OSD_VIDWINMD_ACT0, OSD_VIDWINMD); | ||
| 375 | break; | ||
| 376 | case WIN_OSD1: | ||
| 377 | /* disable attribute mode as well as disabling the window */ | ||
| 378 | osd_clear(sd, OSD_OSDWIN1MD_OASW | OSD_OSDWIN1MD_OACT1, | ||
| 379 | OSD_OSDWIN1MD); | ||
| 380 | break; | ||
| 381 | case WIN_VID1: | ||
| 382 | osd_clear(sd, OSD_VIDWINMD_ACT1, OSD_VIDWINMD); | ||
| 383 | break; | ||
| 384 | } | ||
| 385 | } | ||
| 386 | |||
| 387 | static void osd_disable_layer(struct osd_state *sd, enum osd_layer layer) | ||
| 388 | { | ||
| 389 | struct osd_state *osd = sd; | ||
| 390 | struct osd_window_state *win = &osd->win[layer]; | ||
| 391 | unsigned long flags; | ||
| 392 | |||
| 393 | spin_lock_irqsave(&osd->lock, flags); | ||
| 394 | |||
| 395 | if (!win->is_enabled) { | ||
| 396 | spin_unlock_irqrestore(&osd->lock, flags); | ||
| 397 | return; | ||
| 398 | } | ||
| 399 | win->is_enabled = 0; | ||
| 400 | |||
| 401 | _osd_disable_layer(sd, layer); | ||
| 402 | |||
| 403 | spin_unlock_irqrestore(&osd->lock, flags); | ||
| 404 | } | ||
| 405 | |||
| 406 | static void _osd_enable_attribute_mode(struct osd_state *sd) | ||
| 407 | { | ||
| 408 | /* enable attribute mode for OSD1 */ | ||
| 409 | osd_set(sd, OSD_OSDWIN1MD_OASW, OSD_OSDWIN1MD); | ||
| 410 | } | ||
| 411 | |||
| 412 | static void _osd_enable_layer(struct osd_state *sd, enum osd_layer layer) | ||
| 413 | { | ||
| 414 | switch (layer) { | ||
| 415 | case WIN_OSD0: | ||
| 416 | osd_set(sd, OSD_OSDWIN0MD_OACT0, OSD_OSDWIN0MD); | ||
| 417 | break; | ||
| 418 | case WIN_VID0: | ||
| 419 | osd_set(sd, OSD_VIDWINMD_ACT0, OSD_VIDWINMD); | ||
| 420 | break; | ||
| 421 | case WIN_OSD1: | ||
| 422 | /* enable OSD1 and disable attribute mode */ | ||
| 423 | osd_modify(sd, OSD_OSDWIN1MD_OASW | OSD_OSDWIN1MD_OACT1, | ||
| 424 | OSD_OSDWIN1MD_OACT1, OSD_OSDWIN1MD); | ||
| 425 | break; | ||
| 426 | case WIN_VID1: | ||
| 427 | osd_set(sd, OSD_VIDWINMD_ACT1, OSD_VIDWINMD); | ||
| 428 | break; | ||
| 429 | } | ||
| 430 | } | ||
| 431 | |||
| 432 | static int osd_enable_layer(struct osd_state *sd, enum osd_layer layer, | ||
| 433 | int otherwin) | ||
| 434 | { | ||
| 435 | struct osd_state *osd = sd; | ||
| 436 | struct osd_window_state *win = &osd->win[layer]; | ||
| 437 | struct osd_layer_config *cfg = &win->lconfig; | ||
| 438 | unsigned long flags; | ||
| 439 | |||
| 440 | spin_lock_irqsave(&osd->lock, flags); | ||
| 441 | |||
| 442 | /* | ||
| 443 | * use otherwin flag to know this is the other vid window | ||
| 444 | * in YUV420 mode, if is, skip this check | ||
| 445 | */ | ||
| 446 | if (!otherwin && (!win->is_allocated || | ||
| 447 | !win->fb_base_phys || | ||
| 448 | !cfg->line_length || | ||
| 449 | !cfg->xsize || | ||
| 450 | !cfg->ysize)) { | ||
| 451 | spin_unlock_irqrestore(&osd->lock, flags); | ||
| 452 | return -1; | ||
| 453 | } | ||
| 454 | |||
| 455 | if (win->is_enabled) { | ||
| 456 | spin_unlock_irqrestore(&osd->lock, flags); | ||
| 457 | return 0; | ||
| 458 | } | ||
| 459 | win->is_enabled = 1; | ||
| 460 | |||
| 461 | if (cfg->pixfmt != PIXFMT_OSD_ATTR) | ||
| 462 | _osd_enable_layer(sd, layer); | ||
| 463 | else { | ||
| 464 | _osd_enable_attribute_mode(sd); | ||
| 465 | _osd_set_blink_attribute(sd, osd->is_blinking, osd->blink); | ||
| 466 | } | ||
| 467 | |||
| 468 | spin_unlock_irqrestore(&osd->lock, flags); | ||
| 469 | |||
| 470 | return 0; | ||
| 471 | } | ||
| 472 | |||
| 473 | static void _osd_start_layer(struct osd_state *sd, enum osd_layer layer, | ||
| 474 | unsigned long fb_base_phys, | ||
| 475 | unsigned long cbcr_ofst) | ||
| 476 | { | ||
| 477 | switch (layer) { | ||
| 478 | case WIN_OSD0: | ||
| 479 | osd_write(sd, fb_base_phys & ~0x1F, OSD_OSDWIN0ADR); | ||
| 480 | break; | ||
| 481 | case WIN_VID0: | ||
| 482 | osd_write(sd, fb_base_phys & ~0x1F, OSD_VIDWIN0ADR); | ||
| 483 | break; | ||
| 484 | case WIN_OSD1: | ||
| 485 | osd_write(sd, fb_base_phys & ~0x1F, OSD_OSDWIN1ADR); | ||
| 486 | break; | ||
| 487 | case WIN_VID1: | ||
| 488 | osd_write(sd, fb_base_phys & ~0x1F, OSD_VIDWIN1ADR); | ||
| 489 | break; | ||
| 490 | } | ||
| 491 | } | ||
| 492 | |||
| 493 | static void osd_start_layer(struct osd_state *sd, enum osd_layer layer, | ||
| 494 | unsigned long fb_base_phys, | ||
| 495 | unsigned long cbcr_ofst) | ||
| 496 | { | ||
| 497 | struct osd_state *osd = sd; | ||
| 498 | struct osd_window_state *win = &osd->win[layer]; | ||
| 499 | struct osd_layer_config *cfg = &win->lconfig; | ||
| 500 | unsigned long flags; | ||
| 501 | |||
| 502 | spin_lock_irqsave(&osd->lock, flags); | ||
| 503 | |||
| 504 | win->fb_base_phys = fb_base_phys & ~0x1F; | ||
| 505 | _osd_start_layer(sd, layer, fb_base_phys, cbcr_ofst); | ||
| 506 | |||
| 507 | if (layer == WIN_VID0) { | ||
| 508 | osd->pingpong = | ||
| 509 | _osd_dm6446_vid0_pingpong(sd, osd->field_inversion, | ||
| 510 | win->fb_base_phys, | ||
| 511 | cfg); | ||
| 512 | } | ||
| 513 | |||
| 514 | spin_unlock_irqrestore(&osd->lock, flags); | ||
| 515 | } | ||
| 516 | |||
| 517 | static void osd_get_layer_config(struct osd_state *sd, enum osd_layer layer, | ||
| 518 | struct osd_layer_config *lconfig) | ||
| 519 | { | ||
| 520 | struct osd_state *osd = sd; | ||
| 521 | struct osd_window_state *win = &osd->win[layer]; | ||
| 522 | unsigned long flags; | ||
| 523 | |||
| 524 | spin_lock_irqsave(&osd->lock, flags); | ||
| 525 | |||
| 526 | *lconfig = win->lconfig; | ||
| 527 | |||
| 528 | spin_unlock_irqrestore(&osd->lock, flags); | ||
| 529 | } | ||
| 530 | |||
| 531 | /** | ||
| 532 | * try_layer_config() - Try a specific configuration for the layer | ||
| 533 | * @sd - ptr to struct osd_state | ||
| 534 | * @layer - layer to configure | ||
| 535 | * @lconfig - layer configuration to try | ||
| 536 | * | ||
| 537 | * If the requested lconfig is completely rejected and the value of lconfig on | ||
| 538 | * exit is the current lconfig, then try_layer_config() returns 1. Otherwise, | ||
| 539 | * try_layer_config() returns 0. A return value of 0 does not necessarily mean | ||
| 540 | * that the value of lconfig on exit is identical to the value of lconfig on | ||
| 541 | * entry, but merely that it represents a change from the current lconfig. | ||
| 542 | */ | ||
| 543 | static int try_layer_config(struct osd_state *sd, enum osd_layer layer, | ||
| 544 | struct osd_layer_config *lconfig) | ||
| 545 | { | ||
| 546 | struct osd_state *osd = sd; | ||
| 547 | struct osd_window_state *win = &osd->win[layer]; | ||
| 548 | int bad_config; | ||
| 549 | |||
| 550 | /* verify that the pixel format is compatible with the layer */ | ||
| 551 | switch (lconfig->pixfmt) { | ||
| 552 | case PIXFMT_1BPP: | ||
| 553 | case PIXFMT_2BPP: | ||
| 554 | case PIXFMT_4BPP: | ||
| 555 | case PIXFMT_8BPP: | ||
| 556 | case PIXFMT_RGB565: | ||
| 557 | bad_config = !is_osd_win(layer); | ||
| 558 | break; | ||
| 559 | case PIXFMT_YCbCrI: | ||
| 560 | case PIXFMT_YCrCbI: | ||
| 561 | bad_config = !is_vid_win(layer); | ||
| 562 | break; | ||
| 563 | case PIXFMT_RGB888: | ||
| 564 | bad_config = !is_vid_win(layer); | ||
| 565 | break; | ||
| 566 | case PIXFMT_NV12: | ||
| 567 | bad_config = 1; | ||
| 568 | break; | ||
| 569 | case PIXFMT_OSD_ATTR: | ||
| 570 | bad_config = (layer != WIN_OSD1); | ||
| 571 | break; | ||
| 572 | default: | ||
| 573 | bad_config = 1; | ||
| 574 | break; | ||
| 575 | } | ||
| 576 | if (bad_config) { | ||
| 577 | /* | ||
| 578 | * The requested pixel format is incompatible with the layer, | ||
| 579 | * so keep the current layer configuration. | ||
| 580 | */ | ||
| 581 | *lconfig = win->lconfig; | ||
| 582 | return bad_config; | ||
| 583 | } | ||
| 584 | |||
| 585 | /* DM6446: */ | ||
| 586 | /* only one OSD window at a time can use RGB pixel formats */ | ||
| 587 | if (is_osd_win(layer) && is_rgb_pixfmt(lconfig->pixfmt)) { | ||
| 588 | enum osd_pix_format pixfmt; | ||
| 589 | if (layer == WIN_OSD0) | ||
| 590 | pixfmt = osd->win[WIN_OSD1].lconfig.pixfmt; | ||
| 591 | else | ||
| 592 | pixfmt = osd->win[WIN_OSD0].lconfig.pixfmt; | ||
| 593 | |||
| 594 | if (is_rgb_pixfmt(pixfmt)) { | ||
| 595 | /* | ||
| 596 | * The other OSD window is already configured for an | ||
| 597 | * RGB, so keep the current layer configuration. | ||
| 598 | */ | ||
| 599 | *lconfig = win->lconfig; | ||
| 600 | return 1; | ||
| 601 | } | ||
| 602 | } | ||
| 603 | |||
| 604 | /* DM6446: only one video window at a time can use RGB888 */ | ||
| 605 | if (is_vid_win(layer) && lconfig->pixfmt == PIXFMT_RGB888) { | ||
| 606 | enum osd_pix_format pixfmt; | ||
| 607 | |||
| 608 | if (layer == WIN_VID0) | ||
| 609 | pixfmt = osd->win[WIN_VID1].lconfig.pixfmt; | ||
| 610 | else | ||
| 611 | pixfmt = osd->win[WIN_VID0].lconfig.pixfmt; | ||
| 612 | |||
| 613 | if (pixfmt == PIXFMT_RGB888) { | ||
| 614 | /* | ||
| 615 | * The other video window is already configured for | ||
| 616 | * RGB888, so keep the current layer configuration. | ||
| 617 | */ | ||
| 618 | *lconfig = win->lconfig; | ||
| 619 | return 1; | ||
| 620 | } | ||
| 621 | } | ||
| 622 | |||
| 623 | /* window dimensions must be non-zero */ | ||
| 624 | if (!lconfig->line_length || !lconfig->xsize || !lconfig->ysize) { | ||
| 625 | *lconfig = win->lconfig; | ||
| 626 | return 1; | ||
| 627 | } | ||
| 628 | |||
| 629 | /* round line_length up to a multiple of 32 */ | ||
| 630 | lconfig->line_length = ((lconfig->line_length + 31) / 32) * 32; | ||
| 631 | lconfig->line_length = | ||
| 632 | min(lconfig->line_length, (unsigned)MAX_LINE_LENGTH); | ||
| 633 | lconfig->xsize = min(lconfig->xsize, (unsigned)MAX_WIN_SIZE); | ||
| 634 | lconfig->ysize = min(lconfig->ysize, (unsigned)MAX_WIN_SIZE); | ||
| 635 | lconfig->xpos = min(lconfig->xpos, (unsigned)MAX_WIN_SIZE); | ||
| 636 | lconfig->ypos = min(lconfig->ypos, (unsigned)MAX_WIN_SIZE); | ||
| 637 | lconfig->interlaced = (lconfig->interlaced != 0); | ||
| 638 | if (lconfig->interlaced) { | ||
| 639 | /* ysize and ypos must be even for interlaced displays */ | ||
| 640 | lconfig->ysize &= ~1; | ||
| 641 | lconfig->ypos &= ~1; | ||
| 642 | } | ||
| 643 | |||
| 644 | return 0; | ||
| 645 | } | ||
| 646 | |||
| 647 | static void _osd_disable_vid_rgb888(struct osd_state *sd) | ||
| 648 | { | ||
| 649 | /* | ||
| 650 | * The DM6446 supports RGB888 pixel format in a single video window. | ||
| 651 | * This routine disables RGB888 pixel format for both video windows. | ||
| 652 | * The caller must ensure that neither video window is currently | ||
| 653 | * configured for RGB888 pixel format. | ||
| 654 | */ | ||
| 655 | osd_clear(sd, OSD_MISCCTL_RGBEN, OSD_MISCCTL); | ||
| 656 | } | ||
| 657 | |||
| 658 | static void _osd_enable_vid_rgb888(struct osd_state *sd, | ||
| 659 | enum osd_layer layer) | ||
| 660 | { | ||
| 661 | /* | ||
| 662 | * The DM6446 supports RGB888 pixel format in a single video window. | ||
| 663 | * This routine enables RGB888 pixel format for the specified video | ||
| 664 | * window. The caller must ensure that the other video window is not | ||
| 665 | * currently configured for RGB888 pixel format, as this routine will | ||
| 666 | * disable RGB888 pixel format for the other window. | ||
| 667 | */ | ||
| 668 | if (layer == WIN_VID0) { | ||
| 669 | osd_modify(sd, OSD_MISCCTL_RGBEN | OSD_MISCCTL_RGBWIN, | ||
| 670 | OSD_MISCCTL_RGBEN, OSD_MISCCTL); | ||
| 671 | } else if (layer == WIN_VID1) { | ||
| 672 | osd_modify(sd, OSD_MISCCTL_RGBEN | OSD_MISCCTL_RGBWIN, | ||
| 673 | OSD_MISCCTL_RGBEN | OSD_MISCCTL_RGBWIN, | ||
| 674 | OSD_MISCCTL); | ||
| 675 | } | ||
| 676 | } | ||
| 677 | |||
| 678 | static void _osd_set_cbcr_order(struct osd_state *sd, | ||
| 679 | enum osd_pix_format pixfmt) | ||
| 680 | { | ||
| 681 | /* | ||
| 682 | * The caller must ensure that all windows using YC pixfmt use the same | ||
| 683 | * Cb/Cr order. | ||
| 684 | */ | ||
| 685 | if (pixfmt == PIXFMT_YCbCrI) | ||
| 686 | osd_clear(sd, OSD_MODE_CS, OSD_MODE); | ||
| 687 | else if (pixfmt == PIXFMT_YCrCbI) | ||
| 688 | osd_set(sd, OSD_MODE_CS, OSD_MODE); | ||
| 689 | } | ||
| 690 | |||
| 691 | static void _osd_set_layer_config(struct osd_state *sd, enum osd_layer layer, | ||
| 692 | const struct osd_layer_config *lconfig) | ||
| 693 | { | ||
| 694 | u32 winmd = 0, winmd_mask = 0, bmw = 0; | ||
| 695 | |||
| 696 | _osd_set_cbcr_order(sd, lconfig->pixfmt); | ||
| 697 | |||
| 698 | switch (layer) { | ||
| 699 | case WIN_OSD0: | ||
| 700 | winmd_mask |= OSD_OSDWIN0MD_RGB0E; | ||
| 701 | if (lconfig->pixfmt == PIXFMT_RGB565) | ||
| 702 | winmd |= OSD_OSDWIN0MD_RGB0E; | ||
| 703 | |||
| 704 | winmd_mask |= OSD_OSDWIN0MD_BMW0 | OSD_OSDWIN0MD_OFF0; | ||
| 705 | |||
| 706 | switch (lconfig->pixfmt) { | ||
| 707 | case PIXFMT_1BPP: | ||
| 708 | bmw = 0; | ||
| 709 | break; | ||
| 710 | case PIXFMT_2BPP: | ||
| 711 | bmw = 1; | ||
| 712 | break; | ||
| 713 | case PIXFMT_4BPP: | ||
| 714 | bmw = 2; | ||
| 715 | break; | ||
| 716 | case PIXFMT_8BPP: | ||
| 717 | bmw = 3; | ||
| 718 | break; | ||
| 719 | default: | ||
| 720 | break; | ||
| 721 | } | ||
| 722 | winmd |= (bmw << OSD_OSDWIN0MD_BMW0_SHIFT); | ||
| 723 | |||
| 724 | if (lconfig->interlaced) | ||
| 725 | winmd |= OSD_OSDWIN0MD_OFF0; | ||
| 726 | |||
| 727 | osd_modify(sd, winmd_mask, winmd, OSD_OSDWIN0MD); | ||
| 728 | osd_write(sd, lconfig->line_length >> 5, OSD_OSDWIN0OFST); | ||
| 729 | osd_write(sd, lconfig->xpos, OSD_OSDWIN0XP); | ||
| 730 | osd_write(sd, lconfig->xsize, OSD_OSDWIN0XL); | ||
| 731 | if (lconfig->interlaced) { | ||
| 732 | osd_write(sd, lconfig->ypos >> 1, OSD_OSDWIN0YP); | ||
| 733 | osd_write(sd, lconfig->ysize >> 1, OSD_OSDWIN0YL); | ||
| 734 | } else { | ||
| 735 | osd_write(sd, lconfig->ypos, OSD_OSDWIN0YP); | ||
| 736 | osd_write(sd, lconfig->ysize, OSD_OSDWIN0YL); | ||
| 737 | } | ||
| 738 | break; | ||
| 739 | case WIN_VID0: | ||
| 740 | winmd_mask |= OSD_VIDWINMD_VFF0; | ||
| 741 | if (lconfig->interlaced) | ||
| 742 | winmd |= OSD_VIDWINMD_VFF0; | ||
| 743 | |||
| 744 | osd_modify(sd, winmd_mask, winmd, OSD_VIDWINMD); | ||
| 745 | osd_write(sd, lconfig->line_length >> 5, OSD_VIDWIN0OFST); | ||
| 746 | osd_write(sd, lconfig->xpos, OSD_VIDWIN0XP); | ||
| 747 | osd_write(sd, lconfig->xsize, OSD_VIDWIN0XL); | ||
| 748 | /* | ||
| 749 | * For YUV420P format the register contents are | ||
| 750 | * duplicated in both VID registers | ||
| 751 | */ | ||
| 752 | if (lconfig->interlaced) { | ||
| 753 | osd_write(sd, lconfig->ypos >> 1, OSD_VIDWIN0YP); | ||
| 754 | osd_write(sd, lconfig->ysize >> 1, OSD_VIDWIN0YL); | ||
| 755 | } else { | ||
| 756 | osd_write(sd, lconfig->ypos, OSD_VIDWIN0YP); | ||
| 757 | osd_write(sd, lconfig->ysize, OSD_VIDWIN0YL); | ||
| 758 | } | ||
| 759 | break; | ||
| 760 | case WIN_OSD1: | ||
| 761 | /* | ||
| 762 | * The caller must ensure that OSD1 is disabled prior to | ||
| 763 | * switching from a normal mode to attribute mode or from | ||
| 764 | * attribute mode to a normal mode. | ||
| 765 | */ | ||
| 766 | if (lconfig->pixfmt == PIXFMT_OSD_ATTR) { | ||
| 767 | winmd_mask |= | ||
| 768 | OSD_OSDWIN1MD_ATN1E | OSD_OSDWIN1MD_RGB1E | | ||
| 769 | OSD_OSDWIN1MD_CLUTS1 | | ||
| 770 | OSD_OSDWIN1MD_BLND1 | OSD_OSDWIN1MD_TE1; | ||
| 771 | } else { | ||
| 772 | winmd_mask |= OSD_OSDWIN1MD_RGB1E; | ||
| 773 | if (lconfig->pixfmt == PIXFMT_RGB565) | ||
| 774 | winmd |= OSD_OSDWIN1MD_RGB1E; | ||
| 775 | |||
| 776 | winmd_mask |= OSD_OSDWIN1MD_BMW1; | ||
| 777 | switch (lconfig->pixfmt) { | ||
| 778 | case PIXFMT_1BPP: | ||
| 779 | bmw = 0; | ||
| 780 | break; | ||
| 781 | case PIXFMT_2BPP: | ||
| 782 | bmw = 1; | ||
| 783 | break; | ||
| 784 | case PIXFMT_4BPP: | ||
| 785 | bmw = 2; | ||
| 786 | break; | ||
| 787 | case PIXFMT_8BPP: | ||
| 788 | bmw = 3; | ||
| 789 | break; | ||
| 790 | default: | ||
| 791 | break; | ||
| 792 | } | ||
| 793 | winmd |= (bmw << OSD_OSDWIN1MD_BMW1_SHIFT); | ||
| 794 | } | ||
| 795 | |||
| 796 | winmd_mask |= OSD_OSDWIN1MD_OFF1; | ||
| 797 | if (lconfig->interlaced) | ||
| 798 | winmd |= OSD_OSDWIN1MD_OFF1; | ||
| 799 | |||
| 800 | osd_modify(sd, winmd_mask, winmd, OSD_OSDWIN1MD); | ||
| 801 | osd_write(sd, lconfig->line_length >> 5, OSD_OSDWIN1OFST); | ||
| 802 | osd_write(sd, lconfig->xpos, OSD_OSDWIN1XP); | ||
| 803 | osd_write(sd, lconfig->xsize, OSD_OSDWIN1XL); | ||
| 804 | if (lconfig->interlaced) { | ||
| 805 | osd_write(sd, lconfig->ypos >> 1, OSD_OSDWIN1YP); | ||
| 806 | osd_write(sd, lconfig->ysize >> 1, OSD_OSDWIN1YL); | ||
| 807 | } else { | ||
| 808 | osd_write(sd, lconfig->ypos, OSD_OSDWIN1YP); | ||
| 809 | osd_write(sd, lconfig->ysize, OSD_OSDWIN1YL); | ||
| 810 | } | ||
| 811 | break; | ||
| 812 | case WIN_VID1: | ||
| 813 | winmd_mask |= OSD_VIDWINMD_VFF1; | ||
| 814 | if (lconfig->interlaced) | ||
| 815 | winmd |= OSD_VIDWINMD_VFF1; | ||
| 816 | |||
| 817 | osd_modify(sd, winmd_mask, winmd, OSD_VIDWINMD); | ||
| 818 | osd_write(sd, lconfig->line_length >> 5, OSD_VIDWIN1OFST); | ||
| 819 | osd_write(sd, lconfig->xpos, OSD_VIDWIN1XP); | ||
| 820 | osd_write(sd, lconfig->xsize, OSD_VIDWIN1XL); | ||
| 821 | /* | ||
| 822 | * For YUV420P format the register contents are | ||
| 823 | * duplicated in both VID registers | ||
| 824 | */ | ||
| 825 | osd_modify(sd, OSD_MISCCTL_S420D, ~OSD_MISCCTL_S420D, | ||
| 826 | OSD_MISCCTL); | ||
| 827 | |||
| 828 | if (lconfig->interlaced) { | ||
| 829 | osd_write(sd, lconfig->ypos >> 1, OSD_VIDWIN1YP); | ||
| 830 | osd_write(sd, lconfig->ysize >> 1, OSD_VIDWIN1YL); | ||
| 831 | } else { | ||
| 832 | osd_write(sd, lconfig->ypos, OSD_VIDWIN1YP); | ||
| 833 | osd_write(sd, lconfig->ysize, OSD_VIDWIN1YL); | ||
| 834 | } | ||
| 835 | break; | ||
| 836 | } | ||
| 837 | } | ||
| 838 | |||
| 839 | static int osd_set_layer_config(struct osd_state *sd, enum osd_layer layer, | ||
| 840 | struct osd_layer_config *lconfig) | ||
| 841 | { | ||
| 842 | struct osd_state *osd = sd; | ||
| 843 | struct osd_window_state *win = &osd->win[layer]; | ||
| 844 | struct osd_layer_config *cfg = &win->lconfig; | ||
| 845 | unsigned long flags; | ||
| 846 | int reject_config; | ||
| 847 | |||
| 848 | spin_lock_irqsave(&osd->lock, flags); | ||
| 849 | |||
| 850 | reject_config = try_layer_config(sd, layer, lconfig); | ||
| 851 | if (reject_config) { | ||
| 852 | spin_unlock_irqrestore(&osd->lock, flags); | ||
| 853 | return reject_config; | ||
| 854 | } | ||
| 855 | |||
| 856 | /* update the current Cb/Cr order */ | ||
| 857 | if (is_yc_pixfmt(lconfig->pixfmt)) | ||
| 858 | osd->yc_pixfmt = lconfig->pixfmt; | ||
| 859 | |||
| 860 | /* | ||
| 861 | * If we are switching OSD1 from normal mode to attribute mode or from | ||
| 862 | * attribute mode to normal mode, then we must disable the window. | ||
| 863 | */ | ||
| 864 | if (layer == WIN_OSD1) { | ||
| 865 | if (((lconfig->pixfmt == PIXFMT_OSD_ATTR) && | ||
| 866 | (cfg->pixfmt != PIXFMT_OSD_ATTR)) || | ||
| 867 | ((lconfig->pixfmt != PIXFMT_OSD_ATTR) && | ||
| 868 | (cfg->pixfmt == PIXFMT_OSD_ATTR))) { | ||
| 869 | win->is_enabled = 0; | ||
| 870 | _osd_disable_layer(sd, layer); | ||
| 871 | } | ||
| 872 | } | ||
| 873 | |||
| 874 | _osd_set_layer_config(sd, layer, lconfig); | ||
| 875 | |||
| 876 | if (layer == WIN_OSD1) { | ||
| 877 | struct osd_osdwin_state *osdwin_state = | ||
| 878 | &osd->osdwin[OSDWIN_OSD1]; | ||
| 879 | |||
| 880 | if ((lconfig->pixfmt != PIXFMT_OSD_ATTR) && | ||
| 881 | (cfg->pixfmt == PIXFMT_OSD_ATTR)) { | ||
| 882 | /* | ||
| 883 | * We just switched OSD1 from attribute mode to normal | ||
| 884 | * mode, so we must initialize the CLUT select, the | ||
| 885 | * blend factor, transparency colorkey enable, and | ||
| 886 | * attenuation enable (DM6446 only) bits in the | ||
| 887 | * OSDWIN1MD register. | ||
| 888 | */ | ||
| 889 | _osd_set_osd_clut(sd, OSDWIN_OSD1, | ||
| 890 | osdwin_state->clut); | ||
| 891 | _osd_set_blending_factor(sd, OSDWIN_OSD1, | ||
| 892 | osdwin_state->blend); | ||
| 893 | if (osdwin_state->colorkey_blending) { | ||
| 894 | _osd_enable_color_key(sd, OSDWIN_OSD1, | ||
| 895 | osdwin_state-> | ||
| 896 | colorkey, | ||
| 897 | lconfig->pixfmt); | ||
| 898 | } else | ||
| 899 | _osd_disable_color_key(sd, OSDWIN_OSD1); | ||
| 900 | _osd_set_rec601_attenuation(sd, OSDWIN_OSD1, | ||
| 901 | osdwin_state-> | ||
| 902 | rec601_attenuation); | ||
| 903 | } else if ((lconfig->pixfmt == PIXFMT_OSD_ATTR) && | ||
| 904 | (cfg->pixfmt != PIXFMT_OSD_ATTR)) { | ||
| 905 | /* | ||
| 906 | * We just switched OSD1 from normal mode to attribute | ||
| 907 | * mode, so we must initialize the blink enable and | ||
| 908 | * blink interval bits in the OSDATRMD register. | ||
| 909 | */ | ||
| 910 | _osd_set_blink_attribute(sd, osd->is_blinking, | ||
| 911 | osd->blink); | ||
| 912 | } | ||
| 913 | } | ||
| 914 | |||
| 915 | /* | ||
| 916 | * If we just switched to a 1-, 2-, or 4-bits-per-pixel bitmap format | ||
| 917 | * then configure a default palette map. | ||
| 918 | */ | ||
| 919 | if ((lconfig->pixfmt != cfg->pixfmt) && | ||
| 920 | ((lconfig->pixfmt == PIXFMT_1BPP) || | ||
| 921 | (lconfig->pixfmt == PIXFMT_2BPP) || | ||
| 922 | (lconfig->pixfmt == PIXFMT_4BPP))) { | ||
| 923 | enum osd_win_layer osdwin = | ||
| 924 | ((layer == WIN_OSD0) ? OSDWIN_OSD0 : OSDWIN_OSD1); | ||
| 925 | struct osd_osdwin_state *osdwin_state = | ||
| 926 | &osd->osdwin[osdwin]; | ||
| 927 | unsigned char clut_index; | ||
| 928 | unsigned char clut_entries = 0; | ||
| 929 | |||
| 930 | switch (lconfig->pixfmt) { | ||
| 931 | case PIXFMT_1BPP: | ||
| 932 | clut_entries = 2; | ||
| 933 | break; | ||
| 934 | case PIXFMT_2BPP: | ||
| 935 | clut_entries = 4; | ||
| 936 | break; | ||
| 937 | case PIXFMT_4BPP: | ||
| 938 | clut_entries = 16; | ||
| 939 | break; | ||
| 940 | default: | ||
| 941 | break; | ||
| 942 | } | ||
| 943 | /* | ||
| 944 | * The default palette map maps the pixel value to the clut | ||
| 945 | * index, i.e. pixel value 0 maps to clut entry 0, pixel value | ||
| 946 | * 1 maps to clut entry 1, etc. | ||
| 947 | */ | ||
| 948 | for (clut_index = 0; clut_index < 16; clut_index++) { | ||
| 949 | osdwin_state->palette_map[clut_index] = clut_index; | ||
| 950 | if (clut_index < clut_entries) { | ||
| 951 | _osd_set_palette_map(sd, osdwin, clut_index, | ||
| 952 | clut_index, | ||
| 953 | lconfig->pixfmt); | ||
| 954 | } | ||
| 955 | } | ||
| 956 | } | ||
| 957 | |||
| 958 | *cfg = *lconfig; | ||
| 959 | /* DM6446: configure the RGB888 enable and window selection */ | ||
| 960 | if (osd->win[WIN_VID0].lconfig.pixfmt == PIXFMT_RGB888) | ||
| 961 | _osd_enable_vid_rgb888(sd, WIN_VID0); | ||
| 962 | else if (osd->win[WIN_VID1].lconfig.pixfmt == PIXFMT_RGB888) | ||
| 963 | _osd_enable_vid_rgb888(sd, WIN_VID1); | ||
| 964 | else | ||
| 965 | _osd_disable_vid_rgb888(sd); | ||
| 966 | |||
| 967 | if (layer == WIN_VID0) { | ||
| 968 | osd->pingpong = | ||
| 969 | _osd_dm6446_vid0_pingpong(sd, osd->field_inversion, | ||
| 970 | win->fb_base_phys, | ||
| 971 | cfg); | ||
| 972 | } | ||
| 973 | |||
| 974 | spin_unlock_irqrestore(&osd->lock, flags); | ||
| 975 | |||
| 976 | return 0; | ||
| 977 | } | ||
| 978 | |||
| 979 | static void osd_init_layer(struct osd_state *sd, enum osd_layer layer) | ||
| 980 | { | ||
| 981 | struct osd_state *osd = sd; | ||
| 982 | struct osd_window_state *win = &osd->win[layer]; | ||
| 983 | enum osd_win_layer osdwin; | ||
| 984 | struct osd_osdwin_state *osdwin_state; | ||
| 985 | struct osd_layer_config *cfg = &win->lconfig; | ||
| 986 | unsigned long flags; | ||
| 987 | |||
| 988 | spin_lock_irqsave(&osd->lock, flags); | ||
| 989 | |||
| 990 | win->is_enabled = 0; | ||
| 991 | _osd_disable_layer(sd, layer); | ||
| 992 | |||
| 993 | win->h_zoom = ZOOM_X1; | ||
| 994 | win->v_zoom = ZOOM_X1; | ||
| 995 | _osd_set_zoom(sd, layer, win->h_zoom, win->v_zoom); | ||
| 996 | |||
| 997 | win->fb_base_phys = 0; | ||
| 998 | _osd_start_layer(sd, layer, win->fb_base_phys, 0); | ||
| 999 | |||
| 1000 | cfg->line_length = 0; | ||
| 1001 | cfg->xsize = 0; | ||
| 1002 | cfg->ysize = 0; | ||
| 1003 | cfg->xpos = 0; | ||
| 1004 | cfg->ypos = 0; | ||
| 1005 | cfg->interlaced = 0; | ||
| 1006 | switch (layer) { | ||
| 1007 | case WIN_OSD0: | ||
| 1008 | case WIN_OSD1: | ||
| 1009 | osdwin = (layer == WIN_OSD0) ? OSDWIN_OSD0 : OSDWIN_OSD1; | ||
| 1010 | osdwin_state = &osd->osdwin[osdwin]; | ||
| 1011 | /* | ||
| 1012 | * Other code relies on the fact that OSD windows default to a | ||
| 1013 | * bitmap pixel format when they are deallocated, so don't | ||
| 1014 | * change this default pixel format. | ||
| 1015 | */ | ||
| 1016 | cfg->pixfmt = PIXFMT_8BPP; | ||
| 1017 | _osd_set_layer_config(sd, layer, cfg); | ||
| 1018 | osdwin_state->clut = RAM_CLUT; | ||
| 1019 | _osd_set_osd_clut(sd, osdwin, osdwin_state->clut); | ||
| 1020 | osdwin_state->colorkey_blending = 0; | ||
| 1021 | _osd_disable_color_key(sd, osdwin); | ||
| 1022 | osdwin_state->blend = OSD_8_VID_0; | ||
| 1023 | _osd_set_blending_factor(sd, osdwin, osdwin_state->blend); | ||
| 1024 | osdwin_state->rec601_attenuation = 0; | ||
| 1025 | _osd_set_rec601_attenuation(sd, osdwin, | ||
| 1026 | osdwin_state-> | ||
| 1027 | rec601_attenuation); | ||
| 1028 | if (osdwin == OSDWIN_OSD1) { | ||
| 1029 | osd->is_blinking = 0; | ||
| 1030 | osd->blink = BLINK_X1; | ||
| 1031 | } | ||
| 1032 | break; | ||
| 1033 | case WIN_VID0: | ||
| 1034 | case WIN_VID1: | ||
| 1035 | cfg->pixfmt = osd->yc_pixfmt; | ||
| 1036 | _osd_set_layer_config(sd, layer, cfg); | ||
| 1037 | break; | ||
| 1038 | } | ||
| 1039 | |||
| 1040 | spin_unlock_irqrestore(&osd->lock, flags); | ||
| 1041 | } | ||
| 1042 | |||
| 1043 | static void osd_release_layer(struct osd_state *sd, enum osd_layer layer) | ||
| 1044 | { | ||
| 1045 | struct osd_state *osd = sd; | ||
| 1046 | struct osd_window_state *win = &osd->win[layer]; | ||
| 1047 | unsigned long flags; | ||
| 1048 | |||
| 1049 | spin_lock_irqsave(&osd->lock, flags); | ||
| 1050 | |||
| 1051 | if (!win->is_allocated) { | ||
| 1052 | spin_unlock_irqrestore(&osd->lock, flags); | ||
| 1053 | return; | ||
| 1054 | } | ||
| 1055 | |||
| 1056 | spin_unlock_irqrestore(&osd->lock, flags); | ||
| 1057 | osd_init_layer(sd, layer); | ||
| 1058 | spin_lock_irqsave(&osd->lock, flags); | ||
| 1059 | |||
| 1060 | win->is_allocated = 0; | ||
| 1061 | |||
| 1062 | spin_unlock_irqrestore(&osd->lock, flags); | ||
| 1063 | } | ||
| 1064 | |||
| 1065 | static int osd_request_layer(struct osd_state *sd, enum osd_layer layer) | ||
| 1066 | { | ||
| 1067 | struct osd_state *osd = sd; | ||
| 1068 | struct osd_window_state *win = &osd->win[layer]; | ||
| 1069 | unsigned long flags; | ||
| 1070 | |||
| 1071 | spin_lock_irqsave(&osd->lock, flags); | ||
| 1072 | |||
| 1073 | if (win->is_allocated) { | ||
| 1074 | spin_unlock_irqrestore(&osd->lock, flags); | ||
| 1075 | return -1; | ||
| 1076 | } | ||
| 1077 | win->is_allocated = 1; | ||
| 1078 | |||
| 1079 | spin_unlock_irqrestore(&osd->lock, flags); | ||
| 1080 | |||
| 1081 | return 0; | ||
| 1082 | } | ||
| 1083 | |||
| 1084 | static void _osd_init(struct osd_state *sd) | ||
| 1085 | { | ||
| 1086 | osd_write(sd, 0, OSD_MODE); | ||
| 1087 | osd_write(sd, 0, OSD_VIDWINMD); | ||
| 1088 | osd_write(sd, 0, OSD_OSDWIN0MD); | ||
| 1089 | osd_write(sd, 0, OSD_OSDWIN1MD); | ||
| 1090 | osd_write(sd, 0, OSD_RECTCUR); | ||
| 1091 | osd_write(sd, 0, OSD_MISCCTL); | ||
| 1092 | } | ||
| 1093 | |||
| 1094 | static void osd_set_left_margin(struct osd_state *sd, u32 val) | ||
| 1095 | { | ||
| 1096 | osd_write(sd, val, OSD_BASEPX); | ||
| 1097 | } | ||
| 1098 | |||
| 1099 | static void osd_set_top_margin(struct osd_state *sd, u32 val) | ||
| 1100 | { | ||
| 1101 | osd_write(sd, val, OSD_BASEPY); | ||
| 1102 | } | ||
| 1103 | |||
| 1104 | static int osd_initialize(struct osd_state *osd) | ||
| 1105 | { | ||
| 1106 | if (osd == NULL) | ||
| 1107 | return -ENODEV; | ||
| 1108 | _osd_init(osd); | ||
| 1109 | |||
| 1110 | /* set default Cb/Cr order */ | ||
| 1111 | osd->yc_pixfmt = PIXFMT_YCbCrI; | ||
| 1112 | |||
| 1113 | _osd_set_field_inversion(osd, osd->field_inversion); | ||
| 1114 | _osd_set_rom_clut(osd, osd->rom_clut); | ||
| 1115 | |||
| 1116 | osd_init_layer(osd, WIN_OSD0); | ||
| 1117 | osd_init_layer(osd, WIN_VID0); | ||
| 1118 | osd_init_layer(osd, WIN_OSD1); | ||
| 1119 | osd_init_layer(osd, WIN_VID1); | ||
| 1120 | |||
| 1121 | return 0; | ||
| 1122 | } | ||
| 1123 | |||
| 1124 | static const struct vpbe_osd_ops osd_ops = { | ||
| 1125 | .initialize = osd_initialize, | ||
| 1126 | .request_layer = osd_request_layer, | ||
| 1127 | .release_layer = osd_release_layer, | ||
| 1128 | .enable_layer = osd_enable_layer, | ||
| 1129 | .disable_layer = osd_disable_layer, | ||
| 1130 | .set_layer_config = osd_set_layer_config, | ||
| 1131 | .get_layer_config = osd_get_layer_config, | ||
| 1132 | .start_layer = osd_start_layer, | ||
| 1133 | .set_left_margin = osd_set_left_margin, | ||
| 1134 | .set_top_margin = osd_set_top_margin, | ||
| 1135 | }; | ||
| 1136 | |||
| 1137 | static int osd_probe(struct platform_device *pdev) | ||
| 1138 | { | ||
| 1139 | struct osd_platform_data *pdata; | ||
| 1140 | struct osd_state *osd; | ||
| 1141 | struct resource *res; | ||
| 1142 | int ret = 0; | ||
| 1143 | |||
| 1144 | osd = kzalloc(sizeof(struct osd_state), GFP_KERNEL); | ||
| 1145 | if (osd == NULL) | ||
| 1146 | return -ENOMEM; | ||
| 1147 | |||
| 1148 | osd->dev = &pdev->dev; | ||
| 1149 | pdata = (struct osd_platform_data *)pdev->dev.platform_data; | ||
| 1150 | osd->vpbe_type = (enum vpbe_version)pdata->vpbe_type; | ||
| 1151 | if (NULL == pdev->dev.platform_data) { | ||
| 1152 | dev_err(osd->dev, "No platform data defined for OSD" | ||
| 1153 | " sub device\n"); | ||
| 1154 | ret = -ENOENT; | ||
| 1155 | goto free_mem; | ||
| 1156 | } | ||
| 1157 | |||
| 1158 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
| 1159 | if (!res) { | ||
| 1160 | dev_err(osd->dev, "Unable to get OSD register address map\n"); | ||
| 1161 | ret = -ENODEV; | ||
| 1162 | goto free_mem; | ||
| 1163 | } | ||
| 1164 | osd->osd_base_phys = res->start; | ||
| 1165 | osd->osd_size = res->end - res->start + 1; | ||
| 1166 | if (!request_mem_region(osd->osd_base_phys, osd->osd_size, | ||
| 1167 | MODULE_NAME)) { | ||
| 1168 | dev_err(osd->dev, "Unable to reserve OSD MMIO region\n"); | ||
| 1169 | ret = -ENODEV; | ||
| 1170 | goto free_mem; | ||
| 1171 | } | ||
| 1172 | osd->osd_base = (unsigned long)ioremap_nocache(res->start, | ||
| 1173 | osd->osd_size); | ||
| 1174 | if (!osd->osd_base) { | ||
| 1175 | dev_err(osd->dev, "Unable to map the OSD region\n"); | ||
| 1176 | ret = -ENODEV; | ||
| 1177 | goto release_mem_region; | ||
| 1178 | } | ||
| 1179 | spin_lock_init(&osd->lock); | ||
| 1180 | osd->ops = osd_ops; | ||
| 1181 | platform_set_drvdata(pdev, osd); | ||
| 1182 | dev_notice(osd->dev, "OSD sub device probe success\n"); | ||
| 1183 | return ret; | ||
| 1184 | |||
| 1185 | release_mem_region: | ||
| 1186 | release_mem_region(osd->osd_base_phys, osd->osd_size); | ||
| 1187 | free_mem: | ||
| 1188 | kfree(osd); | ||
| 1189 | return ret; | ||
| 1190 | } | ||
| 1191 | |||
| 1192 | static int osd_remove(struct platform_device *pdev) | ||
| 1193 | { | ||
| 1194 | struct osd_state *osd = platform_get_drvdata(pdev); | ||
| 1195 | |||
| 1196 | iounmap((void *)osd->osd_base); | ||
| 1197 | release_mem_region(osd->osd_base_phys, osd->osd_size); | ||
| 1198 | kfree(osd); | ||
| 1199 | return 0; | ||
| 1200 | } | ||
| 1201 | |||
| 1202 | static struct platform_driver osd_driver = { | ||
| 1203 | .probe = osd_probe, | ||
| 1204 | .remove = osd_remove, | ||
| 1205 | .driver = { | ||
| 1206 | .name = MODULE_NAME, | ||
| 1207 | .owner = THIS_MODULE, | ||
| 1208 | }, | ||
| 1209 | }; | ||
| 1210 | |||
| 1211 | static int osd_init(void) | ||
| 1212 | { | ||
| 1213 | if (platform_driver_register(&osd_driver)) { | ||
| 1214 | printk(KERN_ERR "Unable to register davinci osd driver\n"); | ||
| 1215 | return -ENODEV; | ||
| 1216 | } | ||
| 1217 | |||
| 1218 | return 0; | ||
| 1219 | } | ||
| 1220 | |||
| 1221 | static void osd_exit(void) | ||
| 1222 | { | ||
| 1223 | platform_driver_unregister(&osd_driver); | ||
| 1224 | } | ||
| 1225 | |||
| 1226 | module_init(osd_init); | ||
| 1227 | module_exit(osd_exit); | ||
| 1228 | |||
| 1229 | MODULE_LICENSE("GPL"); | ||
| 1230 | MODULE_DESCRIPTION("DaVinci OSD Manager Driver"); | ||
| 1231 | MODULE_AUTHOR("Texas Instruments"); | ||
diff --git a/drivers/media/video/davinci/vpbe_osd_regs.h b/drivers/media/video/davinci/vpbe_osd_regs.h new file mode 100644 index 000000000000..584520f3af60 --- /dev/null +++ b/drivers/media/video/davinci/vpbe_osd_regs.h | |||
| @@ -0,0 +1,364 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2006-2010 Texas Instruments Inc | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or modify | ||
| 5 | * it under the terms of the GNU General Public License as published by | ||
| 6 | * the Free Software Foundation version 2. | ||
| 7 | * | ||
| 8 | * This program is distributed in the hope that it will be useful, | ||
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 11 | * GNU General Public License for more details. | ||
| 12 | * | ||
| 13 | * You should have received a copy of the GNU General Public License | ||
| 14 | * along with this program; if not, write to the Free Software | ||
| 15 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 16 | */ | ||
| 17 | #ifndef _VPBE_OSD_REGS_H | ||
| 18 | #define _VPBE_OSD_REGS_H | ||
| 19 | |||
| 20 | /* VPBE Global Registers */ | ||
| 21 | #define VPBE_PID 0x0 | ||
| 22 | #define VPBE_PCR 0x4 | ||
| 23 | |||
| 24 | /* VPSS CLock Registers */ | ||
| 25 | #define VPSSCLK_PID 0x00 | ||
| 26 | #define VPSSCLK_CLKCTRL 0x04 | ||
| 27 | |||
| 28 | /* VPSS Buffer Logic Registers */ | ||
| 29 | #define VPSSBL_PID 0x00 | ||
| 30 | #define VPSSBL_PCR 0x04 | ||
| 31 | #define VPSSBL_BCR 0x08 | ||
| 32 | #define VPSSBL_INTSTAT 0x0C | ||
| 33 | #define VPSSBL_INTSEL 0x10 | ||
| 34 | #define VPSSBL_EVTSEL 0x14 | ||
| 35 | #define VPSSBL_MEMCTRL 0x18 | ||
| 36 | #define VPSSBL_CCDCMUX 0x1C | ||
| 37 | |||
| 38 | /* DM365 ISP5 system configuration */ | ||
| 39 | #define ISP5_PID 0x0 | ||
| 40 | #define ISP5_PCCR 0x4 | ||
| 41 | #define ISP5_BCR 0x8 | ||
| 42 | #define ISP5_INTSTAT 0xC | ||
| 43 | #define ISP5_INTSEL1 0x10 | ||
| 44 | #define ISP5_INTSEL2 0x14 | ||
| 45 | #define ISP5_INTSEL3 0x18 | ||
| 46 | #define ISP5_EVTSEL 0x1c | ||
| 47 | #define ISP5_CCDCMUX 0x20 | ||
| 48 | |||
| 49 | /* VPBE On-Screen Display Subsystem Registers (OSD) */ | ||
| 50 | #define OSD_MODE 0x00 | ||
| 51 | #define OSD_VIDWINMD 0x04 | ||
| 52 | #define OSD_OSDWIN0MD 0x08 | ||
| 53 | #define OSD_OSDWIN1MD 0x0C | ||
| 54 | #define OSD_OSDATRMD 0x0C | ||
| 55 | #define OSD_RECTCUR 0x10 | ||
| 56 | #define OSD_VIDWIN0OFST 0x18 | ||
| 57 | #define OSD_VIDWIN1OFST 0x1C | ||
| 58 | #define OSD_OSDWIN0OFST 0x20 | ||
| 59 | #define OSD_OSDWIN1OFST 0x24 | ||
| 60 | #define OSD_VIDWINADH 0x28 | ||
| 61 | #define OSD_VIDWIN0ADL 0x2C | ||
| 62 | #define OSD_VIDWIN0ADR 0x2C | ||
| 63 | #define OSD_VIDWIN1ADL 0x30 | ||
| 64 | #define OSD_VIDWIN1ADR 0x30 | ||
| 65 | #define OSD_OSDWINADH 0x34 | ||
| 66 | #define OSD_OSDWIN0ADL 0x38 | ||
| 67 | #define OSD_OSDWIN0ADR 0x38 | ||
| 68 | #define OSD_OSDWIN1ADL 0x3C | ||
| 69 | #define OSD_OSDWIN1ADR 0x3C | ||
| 70 | #define OSD_BASEPX 0x40 | ||
| 71 | #define OSD_BASEPY 0x44 | ||
| 72 | #define OSD_VIDWIN0XP 0x48 | ||
| 73 | #define OSD_VIDWIN0YP 0x4C | ||
| 74 | #define OSD_VIDWIN0XL 0x50 | ||
| 75 | #define OSD_VIDWIN0YL 0x54 | ||
| 76 | #define OSD_VIDWIN1XP 0x58 | ||
| 77 | #define OSD_VIDWIN1YP 0x5C | ||
| 78 | #define OSD_VIDWIN1XL 0x60 | ||
| 79 | #define OSD_VIDWIN1YL 0x64 | ||
| 80 | #define OSD_OSDWIN0XP 0x68 | ||
| 81 | #define OSD_OSDWIN0YP 0x6C | ||
| 82 | #define OSD_OSDWIN0XL 0x70 | ||
| 83 | #define OSD_OSDWIN0YL 0x74 | ||
| 84 | #define OSD_OSDWIN1XP 0x78 | ||
| 85 | #define OSD_OSDWIN1YP 0x7C | ||
| 86 | #define OSD_OSDWIN1XL 0x80 | ||
| 87 | #define OSD_OSDWIN1YL 0x84 | ||
| 88 | #define OSD_CURXP 0x88 | ||
| 89 | #define OSD_CURYP 0x8C | ||
| 90 | #define OSD_CURXL 0x90 | ||
| 91 | #define OSD_CURYL 0x94 | ||
| 92 | #define OSD_W0BMP01 0xA0 | ||
| 93 | #define OSD_W0BMP23 0xA4 | ||
| 94 | #define OSD_W0BMP45 0xA8 | ||
| 95 | #define OSD_W0BMP67 0xAC | ||
| 96 | #define OSD_W0BMP89 0xB0 | ||
| 97 | #define OSD_W0BMPAB 0xB4 | ||
| 98 | #define OSD_W0BMPCD 0xB8 | ||
| 99 | #define OSD_W0BMPEF 0xBC | ||
| 100 | #define OSD_W1BMP01 0xC0 | ||
| 101 | #define OSD_W1BMP23 0xC4 | ||
| 102 | #define OSD_W1BMP45 0xC8 | ||
| 103 | #define OSD_W1BMP67 0xCC | ||
| 104 | #define OSD_W1BMP89 0xD0 | ||
| 105 | #define OSD_W1BMPAB 0xD4 | ||
| 106 | #define OSD_W1BMPCD 0xD8 | ||
| 107 | #define OSD_W1BMPEF 0xDC | ||
| 108 | #define OSD_VBNDRY 0xE0 | ||
| 109 | #define OSD_EXTMODE 0xE4 | ||
| 110 | #define OSD_MISCCTL 0xE8 | ||
| 111 | #define OSD_CLUTRAMYCB 0xEC | ||
| 112 | #define OSD_CLUTRAMCR 0xF0 | ||
| 113 | #define OSD_TRANSPVAL 0xF4 | ||
| 114 | #define OSD_TRANSPVALL 0xF4 | ||
| 115 | #define OSD_TRANSPVALU 0xF8 | ||
| 116 | #define OSD_TRANSPBMPIDX 0xFC | ||
| 117 | #define OSD_PPVWIN0ADR 0xFC | ||
| 118 | |||
| 119 | /* bit definitions */ | ||
| 120 | #define VPBE_PCR_VENC_DIV (1 << 1) | ||
| 121 | #define VPBE_PCR_CLK_OFF (1 << 0) | ||
| 122 | |||
| 123 | #define VPSSBL_INTSTAT_HSSIINT (1 << 14) | ||
| 124 | #define VPSSBL_INTSTAT_CFALDINT (1 << 13) | ||
| 125 | #define VPSSBL_INTSTAT_IPIPE_INT5 (1 << 12) | ||
| 126 | #define VPSSBL_INTSTAT_IPIPE_INT4 (1 << 11) | ||
| 127 | #define VPSSBL_INTSTAT_IPIPE_INT3 (1 << 10) | ||
| 128 | #define VPSSBL_INTSTAT_IPIPE_INT2 (1 << 9) | ||
| 129 | #define VPSSBL_INTSTAT_IPIPE_INT1 (1 << 8) | ||
| 130 | #define VPSSBL_INTSTAT_IPIPE_INT0 (1 << 7) | ||
| 131 | #define VPSSBL_INTSTAT_IPIPEIFINT (1 << 6) | ||
| 132 | #define VPSSBL_INTSTAT_OSDINT (1 << 5) | ||
| 133 | #define VPSSBL_INTSTAT_VENCINT (1 << 4) | ||
| 134 | #define VPSSBL_INTSTAT_H3AINT (1 << 3) | ||
| 135 | #define VPSSBL_INTSTAT_CCDC_VDINT2 (1 << 2) | ||
| 136 | #define VPSSBL_INTSTAT_CCDC_VDINT1 (1 << 1) | ||
| 137 | #define VPSSBL_INTSTAT_CCDC_VDINT0 (1 << 0) | ||
| 138 | |||
| 139 | /* DM365 ISP5 bit definitions */ | ||
| 140 | #define ISP5_INTSTAT_VENCINT (1 << 21) | ||
| 141 | #define ISP5_INTSTAT_OSDINT (1 << 20) | ||
| 142 | |||
| 143 | /* VMOD TVTYP options for HDMD=0 */ | ||
| 144 | #define SDTV_NTSC 0 | ||
| 145 | #define SDTV_PAL 1 | ||
| 146 | /* VMOD TVTYP options for HDMD=1 */ | ||
| 147 | #define HDTV_525P 0 | ||
| 148 | #define HDTV_625P 1 | ||
| 149 | #define HDTV_1080I 2 | ||
| 150 | #define HDTV_720P 3 | ||
| 151 | |||
| 152 | #define OSD_MODE_CS (1 << 15) | ||
| 153 | #define OSD_MODE_OVRSZ (1 << 14) | ||
| 154 | #define OSD_MODE_OHRSZ (1 << 13) | ||
| 155 | #define OSD_MODE_EF (1 << 12) | ||
| 156 | #define OSD_MODE_VVRSZ (1 << 11) | ||
| 157 | #define OSD_MODE_VHRSZ (1 << 10) | ||
| 158 | #define OSD_MODE_FSINV (1 << 9) | ||
| 159 | #define OSD_MODE_BCLUT (1 << 8) | ||
| 160 | #define OSD_MODE_CABG_SHIFT 0 | ||
| 161 | #define OSD_MODE_CABG (0xff << 0) | ||
| 162 | |||
| 163 | #define OSD_VIDWINMD_VFINV (1 << 15) | ||
| 164 | #define OSD_VIDWINMD_V1EFC (1 << 14) | ||
| 165 | #define OSD_VIDWINMD_VHZ1_SHIFT 12 | ||
| 166 | #define OSD_VIDWINMD_VHZ1 (3 << 12) | ||
| 167 | #define OSD_VIDWINMD_VVZ1_SHIFT 10 | ||
| 168 | #define OSD_VIDWINMD_VVZ1 (3 << 10) | ||
| 169 | #define OSD_VIDWINMD_VFF1 (1 << 9) | ||
| 170 | #define OSD_VIDWINMD_ACT1 (1 << 8) | ||
| 171 | #define OSD_VIDWINMD_V0EFC (1 << 6) | ||
| 172 | #define OSD_VIDWINMD_VHZ0_SHIFT 4 | ||
| 173 | #define OSD_VIDWINMD_VHZ0 (3 << 4) | ||
| 174 | #define OSD_VIDWINMD_VVZ0_SHIFT 2 | ||
| 175 | #define OSD_VIDWINMD_VVZ0 (3 << 2) | ||
| 176 | #define OSD_VIDWINMD_VFF0 (1 << 1) | ||
| 177 | #define OSD_VIDWINMD_ACT0 (1 << 0) | ||
| 178 | |||
| 179 | #define OSD_OSDWIN0MD_ATN0E (1 << 14) | ||
| 180 | #define OSD_OSDWIN0MD_RGB0E (1 << 13) | ||
| 181 | #define OSD_OSDWIN0MD_BMP0MD_SHIFT 13 | ||
| 182 | #define OSD_OSDWIN0MD_BMP0MD (3 << 13) | ||
| 183 | #define OSD_OSDWIN0MD_CLUTS0 (1 << 12) | ||
| 184 | #define OSD_OSDWIN0MD_OHZ0_SHIFT 10 | ||
| 185 | #define OSD_OSDWIN0MD_OHZ0 (3 << 10) | ||
| 186 | #define OSD_OSDWIN0MD_OVZ0_SHIFT 8 | ||
| 187 | #define OSD_OSDWIN0MD_OVZ0 (3 << 8) | ||
| 188 | #define OSD_OSDWIN0MD_BMW0_SHIFT 6 | ||
| 189 | #define OSD_OSDWIN0MD_BMW0 (3 << 6) | ||
| 190 | #define OSD_OSDWIN0MD_BLND0_SHIFT 3 | ||
| 191 | #define OSD_OSDWIN0MD_BLND0 (7 << 3) | ||
| 192 | #define OSD_OSDWIN0MD_TE0 (1 << 2) | ||
| 193 | #define OSD_OSDWIN0MD_OFF0 (1 << 1) | ||
| 194 | #define OSD_OSDWIN0MD_OACT0 (1 << 0) | ||
| 195 | |||
| 196 | #define OSD_OSDWIN1MD_OASW (1 << 15) | ||
| 197 | #define OSD_OSDWIN1MD_ATN1E (1 << 14) | ||
| 198 | #define OSD_OSDWIN1MD_RGB1E (1 << 13) | ||
| 199 | #define OSD_OSDWIN1MD_BMP1MD_SHIFT 13 | ||
| 200 | #define OSD_OSDWIN1MD_BMP1MD (3 << 13) | ||
| 201 | #define OSD_OSDWIN1MD_CLUTS1 (1 << 12) | ||
| 202 | #define OSD_OSDWIN1MD_OHZ1_SHIFT 10 | ||
| 203 | #define OSD_OSDWIN1MD_OHZ1 (3 << 10) | ||
| 204 | #define OSD_OSDWIN1MD_OVZ1_SHIFT 8 | ||
| 205 | #define OSD_OSDWIN1MD_OVZ1 (3 << 8) | ||
| 206 | #define OSD_OSDWIN1MD_BMW1_SHIFT 6 | ||
| 207 | #define OSD_OSDWIN1MD_BMW1 (3 << 6) | ||
| 208 | #define OSD_OSDWIN1MD_BLND1_SHIFT 3 | ||
| 209 | #define OSD_OSDWIN1MD_BLND1 (7 << 3) | ||
| 210 | #define OSD_OSDWIN1MD_TE1 (1 << 2) | ||
| 211 | #define OSD_OSDWIN1MD_OFF1 (1 << 1) | ||
| 212 | #define OSD_OSDWIN1MD_OACT1 (1 << 0) | ||
| 213 | |||
| 214 | #define OSD_OSDATRMD_OASW (1 << 15) | ||
| 215 | #define OSD_OSDATRMD_OHZA_SHIFT 10 | ||
| 216 | #define OSD_OSDATRMD_OHZA (3 << 10) | ||
| 217 | #define OSD_OSDATRMD_OVZA_SHIFT 8 | ||
| 218 | #define OSD_OSDATRMD_OVZA (3 << 8) | ||
| 219 | #define OSD_OSDATRMD_BLNKINT_SHIFT 6 | ||
| 220 | #define OSD_OSDATRMD_BLNKINT (3 << 6) | ||
| 221 | #define OSD_OSDATRMD_OFFA (1 << 1) | ||
| 222 | #define OSD_OSDATRMD_BLNK (1 << 0) | ||
| 223 | |||
| 224 | #define OSD_RECTCUR_RCAD_SHIFT 8 | ||
| 225 | #define OSD_RECTCUR_RCAD (0xff << 8) | ||
| 226 | #define OSD_RECTCUR_CLUTSR (1 << 7) | ||
| 227 | #define OSD_RECTCUR_RCHW_SHIFT 4 | ||
| 228 | #define OSD_RECTCUR_RCHW (7 << 4) | ||
| 229 | #define OSD_RECTCUR_RCVW_SHIFT 1 | ||
| 230 | #define OSD_RECTCUR_RCVW (7 << 1) | ||
| 231 | #define OSD_RECTCUR_RCACT (1 << 0) | ||
| 232 | |||
| 233 | #define OSD_VIDWIN0OFST_V0LO (0x1ff << 0) | ||
| 234 | |||
| 235 | #define OSD_VIDWIN1OFST_V1LO (0x1ff << 0) | ||
| 236 | |||
| 237 | #define OSD_OSDWIN0OFST_O0LO (0x1ff << 0) | ||
| 238 | |||
| 239 | #define OSD_OSDWIN1OFST_O1LO (0x1ff << 0) | ||
| 240 | |||
| 241 | #define OSD_WINOFST_AH_SHIFT 9 | ||
| 242 | |||
| 243 | #define OSD_VIDWIN0OFST_V0AH (0xf << 9) | ||
| 244 | #define OSD_VIDWIN1OFST_V1AH (0xf << 9) | ||
| 245 | #define OSD_OSDWIN0OFST_O0AH (0xf << 9) | ||
| 246 | #define OSD_OSDWIN1OFST_O1AH (0xf << 9) | ||
| 247 | |||
| 248 | #define OSD_VIDWINADH_V1AH_SHIFT 8 | ||
| 249 | #define OSD_VIDWINADH_V1AH (0x7f << 8) | ||
| 250 | #define OSD_VIDWINADH_V0AH_SHIFT 0 | ||
| 251 | #define OSD_VIDWINADH_V0AH (0x7f << 0) | ||
| 252 | |||
| 253 | #define OSD_VIDWIN0ADL_V0AL (0xffff << 0) | ||
| 254 | |||
| 255 | #define OSD_VIDWIN1ADL_V1AL (0xffff << 0) | ||
| 256 | |||
| 257 | #define OSD_OSDWINADH_O1AH_SHIFT 8 | ||
| 258 | #define OSD_OSDWINADH_O1AH (0x7f << 8) | ||
| 259 | #define OSD_OSDWINADH_O0AH_SHIFT 0 | ||
| 260 | #define OSD_OSDWINADH_O0AH (0x7f << 0) | ||
| 261 | |||
| 262 | #define OSD_OSDWIN0ADL_O0AL (0xffff << 0) | ||
| 263 | |||
| 264 | #define OSD_OSDWIN1ADL_O1AL (0xffff << 0) | ||
| 265 | |||
| 266 | #define OSD_BASEPX_BPX (0x3ff << 0) | ||
| 267 | |||
| 268 | #define OSD_BASEPY_BPY (0x1ff << 0) | ||
| 269 | |||
| 270 | #define OSD_VIDWIN0XP_V0X (0x7ff << 0) | ||
| 271 | |||
| 272 | #define OSD_VIDWIN0YP_V0Y (0x7ff << 0) | ||
| 273 | |||
| 274 | #define OSD_VIDWIN0XL_V0W (0x7ff << 0) | ||
| 275 | |||
| 276 | #define OSD_VIDWIN0YL_V0H (0x7ff << 0) | ||
| 277 | |||
| 278 | #define OSD_VIDWIN1XP_V1X (0x7ff << 0) | ||
| 279 | |||
| 280 | #define OSD_VIDWIN1YP_V1Y (0x7ff << 0) | ||
| 281 | |||
| 282 | #define OSD_VIDWIN1XL_V1W (0x7ff << 0) | ||
| 283 | |||
| 284 | #define OSD_VIDWIN1YL_V1H (0x7ff << 0) | ||
| 285 | |||
| 286 | #define OSD_OSDWIN0XP_W0X (0x7ff << 0) | ||
| 287 | |||
| 288 | #define OSD_OSDWIN0YP_W0Y (0x7ff << 0) | ||
| 289 | |||
| 290 | #define OSD_OSDWIN0XL_W0W (0x7ff << 0) | ||
| 291 | |||
| 292 | #define OSD_OSDWIN0YL_W0H (0x7ff << 0) | ||
| 293 | |||
| 294 | #define OSD_OSDWIN1XP_W1X (0x7ff << 0) | ||
| 295 | |||
| 296 | #define OSD_OSDWIN1YP_W1Y (0x7ff << 0) | ||
| 297 | |||
| 298 | #define OSD_OSDWIN1XL_W1W (0x7ff << 0) | ||
| 299 | |||
| 300 | #define OSD_OSDWIN1YL_W1H (0x7ff << 0) | ||
| 301 | |||
| 302 | #define OSD_CURXP_RCSX (0x7ff << 0) | ||
| 303 | |||
| 304 | #define OSD_CURYP_RCSY (0x7ff << 0) | ||
| 305 | |||
| 306 | #define OSD_CURXL_RCSW (0x7ff << 0) | ||
| 307 | |||
| 308 | #define OSD_CURYL_RCSH (0x7ff << 0) | ||
| 309 | |||
| 310 | #define OSD_EXTMODE_EXPMDSEL (1 << 15) | ||
| 311 | #define OSD_EXTMODE_SCRNHEXP_SHIFT 13 | ||
| 312 | #define OSD_EXTMODE_SCRNHEXP (3 << 13) | ||
| 313 | #define OSD_EXTMODE_SCRNVEXP (1 << 12) | ||
| 314 | #define OSD_EXTMODE_OSD1BLDCHR (1 << 11) | ||
| 315 | #define OSD_EXTMODE_OSD0BLDCHR (1 << 10) | ||
| 316 | #define OSD_EXTMODE_ATNOSD1EN (1 << 9) | ||
| 317 | #define OSD_EXTMODE_ATNOSD0EN (1 << 8) | ||
| 318 | #define OSD_EXTMODE_OSDHRSZ15 (1 << 7) | ||
| 319 | #define OSD_EXTMODE_VIDHRSZ15 (1 << 6) | ||
| 320 | #define OSD_EXTMODE_ZMFILV1HEN (1 << 5) | ||
| 321 | #define OSD_EXTMODE_ZMFILV1VEN (1 << 4) | ||
| 322 | #define OSD_EXTMODE_ZMFILV0HEN (1 << 3) | ||
| 323 | #define OSD_EXTMODE_ZMFILV0VEN (1 << 2) | ||
| 324 | #define OSD_EXTMODE_EXPFILHEN (1 << 1) | ||
| 325 | #define OSD_EXTMODE_EXPFILVEN (1 << 0) | ||
| 326 | |||
| 327 | #define OSD_MISCCTL_BLDSEL (1 << 15) | ||
| 328 | #define OSD_MISCCTL_S420D (1 << 14) | ||
| 329 | #define OSD_MISCCTL_BMAPT (1 << 13) | ||
| 330 | #define OSD_MISCCTL_DM365M (1 << 12) | ||
| 331 | #define OSD_MISCCTL_RGBEN (1 << 7) | ||
| 332 | #define OSD_MISCCTL_RGBWIN (1 << 6) | ||
| 333 | #define OSD_MISCCTL_DMANG (1 << 6) | ||
| 334 | #define OSD_MISCCTL_TMON (1 << 5) | ||
| 335 | #define OSD_MISCCTL_RSEL (1 << 4) | ||
| 336 | #define OSD_MISCCTL_CPBSY (1 << 3) | ||
| 337 | #define OSD_MISCCTL_PPSW (1 << 2) | ||
| 338 | #define OSD_MISCCTL_PPRV (1 << 1) | ||
| 339 | |||
| 340 | #define OSD_CLUTRAMYCB_Y_SHIFT 8 | ||
| 341 | #define OSD_CLUTRAMYCB_Y (0xff << 8) | ||
| 342 | #define OSD_CLUTRAMYCB_CB_SHIFT 0 | ||
| 343 | #define OSD_CLUTRAMYCB_CB (0xff << 0) | ||
| 344 | |||
| 345 | #define OSD_CLUTRAMCR_CR_SHIFT 8 | ||
| 346 | #define OSD_CLUTRAMCR_CR (0xff << 8) | ||
| 347 | #define OSD_CLUTRAMCR_CADDR_SHIFT 0 | ||
| 348 | #define OSD_CLUTRAMCR_CADDR (0xff << 0) | ||
| 349 | |||
| 350 | #define OSD_TRANSPVAL_RGBTRANS (0xffff << 0) | ||
| 351 | |||
| 352 | #define OSD_TRANSPVALL_RGBL (0xffff << 0) | ||
| 353 | |||
| 354 | #define OSD_TRANSPVALU_Y_SHIFT 8 | ||
| 355 | #define OSD_TRANSPVALU_Y (0xff << 8) | ||
| 356 | #define OSD_TRANSPVALU_RGBU_SHIFT 0 | ||
| 357 | #define OSD_TRANSPVALU_RGBU (0xff << 0) | ||
| 358 | |||
| 359 | #define OSD_TRANSPBMPIDX_BMP1_SHIFT 8 | ||
| 360 | #define OSD_TRANSPBMPIDX_BMP1 (0xff << 8) | ||
| 361 | #define OSD_TRANSPBMPIDX_BMP0_SHIFT 0 | ||
| 362 | #define OSD_TRANSPBMPIDX_BMP0 0xff | ||
| 363 | |||
| 364 | #endif /* _DAVINCI_VPBE_H_ */ | ||
diff --git a/drivers/media/video/davinci/vpbe_venc.c b/drivers/media/video/davinci/vpbe_venc.c new file mode 100644 index 000000000000..03a3e5c65ee7 --- /dev/null +++ b/drivers/media/video/davinci/vpbe_venc.c | |||
| @@ -0,0 +1,566 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2010 Texas Instruments Inc | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or modify | ||
| 5 | * it under the terms of the GNU General Public License as published by | ||
| 6 | * the Free Software Foundation version 2. | ||
| 7 | * | ||
| 8 | * This program is distributed in the hope that it will be useful, | ||
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 11 | * GNU General Public License for more details. | ||
| 12 | * | ||
| 13 | * You should have received a copy of the GNU General Public License | ||
| 14 | * along with this program; if not, write to the Free Software | ||
| 15 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 16 | */ | ||
| 17 | #include <linux/module.h> | ||
| 18 | #include <linux/kernel.h> | ||
| 19 | #include <linux/init.h> | ||
| 20 | #include <linux/ctype.h> | ||
| 21 | #include <linux/delay.h> | ||
| 22 | #include <linux/device.h> | ||
| 23 | #include <linux/interrupt.h> | ||
| 24 | #include <linux/platform_device.h> | ||
| 25 | #include <linux/videodev2.h> | ||
| 26 | #include <linux/slab.h> | ||
| 27 | |||
| 28 | #include <mach/hardware.h> | ||
| 29 | #include <mach/mux.h> | ||
| 30 | #include <mach/io.h> | ||
| 31 | #include <mach/i2c.h> | ||
| 32 | |||
| 33 | #include <linux/io.h> | ||
| 34 | |||
| 35 | #include <media/davinci/vpbe_types.h> | ||
| 36 | #include <media/davinci/vpbe_venc.h> | ||
| 37 | #include <media/davinci/vpss.h> | ||
| 38 | #include <media/v4l2-device.h> | ||
| 39 | |||
| 40 | #include "vpbe_venc_regs.h" | ||
| 41 | |||
| 42 | #define MODULE_NAME VPBE_VENC_SUBDEV_NAME | ||
| 43 | |||
| 44 | static int debug = 2; | ||
| 45 | module_param(debug, int, 0644); | ||
| 46 | MODULE_PARM_DESC(debug, "Debug level 0-2"); | ||
| 47 | |||
| 48 | struct venc_state { | ||
| 49 | struct v4l2_subdev sd; | ||
| 50 | struct venc_callback *callback; | ||
| 51 | struct venc_platform_data *pdata; | ||
| 52 | struct device *pdev; | ||
| 53 | u32 output; | ||
| 54 | v4l2_std_id std; | ||
| 55 | spinlock_t lock; | ||
| 56 | void __iomem *venc_base; | ||
| 57 | void __iomem *vdaccfg_reg; | ||
| 58 | }; | ||
| 59 | |||
| 60 | static inline struct venc_state *to_state(struct v4l2_subdev *sd) | ||
| 61 | { | ||
| 62 | return container_of(sd, struct venc_state, sd); | ||
| 63 | } | ||
| 64 | |||
| 65 | static inline u32 venc_read(struct v4l2_subdev *sd, u32 offset) | ||
| 66 | { | ||
| 67 | struct venc_state *venc = to_state(sd); | ||
| 68 | |||
| 69 | return readl(venc->venc_base + offset); | ||
| 70 | } | ||
| 71 | |||
| 72 | static inline u32 venc_write(struct v4l2_subdev *sd, u32 offset, u32 val) | ||
| 73 | { | ||
| 74 | struct venc_state *venc = to_state(sd); | ||
| 75 | |||
| 76 | writel(val, (venc->venc_base + offset)); | ||
| 77 | |||
| 78 | return val; | ||
| 79 | } | ||
| 80 | |||
| 81 | static inline u32 venc_modify(struct v4l2_subdev *sd, u32 offset, | ||
| 82 | u32 val, u32 mask) | ||
| 83 | { | ||
| 84 | u32 new_val = (venc_read(sd, offset) & ~mask) | (val & mask); | ||
| 85 | |||
| 86 | venc_write(sd, offset, new_val); | ||
| 87 | |||
| 88 | return new_val; | ||
| 89 | } | ||
| 90 | |||
| 91 | static inline u32 vdaccfg_write(struct v4l2_subdev *sd, u32 val) | ||
| 92 | { | ||
| 93 | struct venc_state *venc = to_state(sd); | ||
| 94 | |||
| 95 | writel(val, venc->vdaccfg_reg); | ||
| 96 | |||
| 97 | val = readl(venc->vdaccfg_reg); | ||
| 98 | |||
| 99 | return val; | ||
| 100 | } | ||
| 101 | |||
| 102 | /* This function sets the dac of the VPBE for various outputs | ||
| 103 | */ | ||
| 104 | static int venc_set_dac(struct v4l2_subdev *sd, u32 out_index) | ||
| 105 | { | ||
| 106 | switch (out_index) { | ||
| 107 | case 0: | ||
| 108 | v4l2_dbg(debug, 1, sd, "Setting output to Composite\n"); | ||
| 109 | venc_write(sd, VENC_DACSEL, 0); | ||
| 110 | break; | ||
| 111 | case 1: | ||
| 112 | v4l2_dbg(debug, 1, sd, "Setting output to S-Video\n"); | ||
| 113 | venc_write(sd, VENC_DACSEL, 0x210); | ||
| 114 | break; | ||
| 115 | case 2: | ||
| 116 | venc_write(sd, VENC_DACSEL, 0x543); | ||
| 117 | break; | ||
| 118 | default: | ||
| 119 | return -EINVAL; | ||
| 120 | } | ||
| 121 | |||
| 122 | return 0; | ||
| 123 | } | ||
| 124 | |||
| 125 | static void venc_enabledigitaloutput(struct v4l2_subdev *sd, int benable) | ||
| 126 | { | ||
| 127 | v4l2_dbg(debug, 2, sd, "venc_enabledigitaloutput\n"); | ||
| 128 | |||
| 129 | if (benable) { | ||
| 130 | venc_write(sd, VENC_VMOD, 0); | ||
| 131 | venc_write(sd, VENC_CVBS, 0); | ||
| 132 | venc_write(sd, VENC_LCDOUT, 0); | ||
| 133 | venc_write(sd, VENC_HSPLS, 0); | ||
| 134 | venc_write(sd, VENC_HSTART, 0); | ||
| 135 | venc_write(sd, VENC_HVALID, 0); | ||
| 136 | venc_write(sd, VENC_HINT, 0); | ||
| 137 | venc_write(sd, VENC_VSPLS, 0); | ||
| 138 | venc_write(sd, VENC_VSTART, 0); | ||
| 139 | venc_write(sd, VENC_VVALID, 0); | ||
| 140 | venc_write(sd, VENC_VINT, 0); | ||
| 141 | venc_write(sd, VENC_YCCCTL, 0); | ||
| 142 | venc_write(sd, VENC_DACSEL, 0); | ||
| 143 | |||
| 144 | } else { | ||
| 145 | venc_write(sd, VENC_VMOD, 0); | ||
| 146 | /* disable VCLK output pin enable */ | ||
| 147 | venc_write(sd, VENC_VIDCTL, 0x141); | ||
| 148 | |||
| 149 | /* Disable output sync pins */ | ||
| 150 | venc_write(sd, VENC_SYNCCTL, 0); | ||
| 151 | |||
| 152 | /* Disable DCLOCK */ | ||
| 153 | venc_write(sd, VENC_DCLKCTL, 0); | ||
| 154 | venc_write(sd, VENC_DRGBX1, 0x0000057C); | ||
| 155 | |||
| 156 | /* Disable LCD output control (accepting default polarity) */ | ||
| 157 | venc_write(sd, VENC_LCDOUT, 0); | ||
| 158 | venc_write(sd, VENC_CMPNT, 0x100); | ||
| 159 | venc_write(sd, VENC_HSPLS, 0); | ||
| 160 | venc_write(sd, VENC_HINT, 0); | ||
| 161 | venc_write(sd, VENC_HSTART, 0); | ||
| 162 | venc_write(sd, VENC_HVALID, 0); | ||
| 163 | |||
| 164 | venc_write(sd, VENC_VSPLS, 0); | ||
| 165 | venc_write(sd, VENC_VINT, 0); | ||
| 166 | venc_write(sd, VENC_VSTART, 0); | ||
| 167 | venc_write(sd, VENC_VVALID, 0); | ||
| 168 | |||
| 169 | venc_write(sd, VENC_HSDLY, 0); | ||
| 170 | venc_write(sd, VENC_VSDLY, 0); | ||
| 171 | |||
| 172 | venc_write(sd, VENC_YCCCTL, 0); | ||
| 173 | venc_write(sd, VENC_VSTARTA, 0); | ||
| 174 | |||
| 175 | /* Set OSD clock and OSD Sync Adavance registers */ | ||
| 176 | venc_write(sd, VENC_OSDCLK0, 1); | ||
| 177 | venc_write(sd, VENC_OSDCLK1, 2); | ||
| 178 | } | ||
| 179 | } | ||
| 180 | |||
| 181 | /* | ||
| 182 | * setting NTSC mode | ||
| 183 | */ | ||
| 184 | static int venc_set_ntsc(struct v4l2_subdev *sd) | ||
| 185 | { | ||
| 186 | struct venc_state *venc = to_state(sd); | ||
| 187 | struct venc_platform_data *pdata = venc->pdata; | ||
| 188 | |||
| 189 | v4l2_dbg(debug, 2, sd, "venc_set_ntsc\n"); | ||
| 190 | |||
| 191 | /* Setup clock at VPSS & VENC for SD */ | ||
| 192 | vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 1); | ||
| 193 | if (pdata->setup_clock(VPBE_ENC_STD, V4L2_STD_525_60) < 0) | ||
| 194 | return -EINVAL; | ||
| 195 | |||
| 196 | venc_enabledigitaloutput(sd, 0); | ||
| 197 | |||
| 198 | /* to set VENC CLK DIV to 1 - final clock is 54 MHz */ | ||
| 199 | venc_modify(sd, VENC_VIDCTL, 0, 1 << 1); | ||
| 200 | /* Set REC656 Mode */ | ||
| 201 | venc_write(sd, VENC_YCCCTL, 0x1); | ||
| 202 | venc_modify(sd, VENC_VDPRO, 0, VENC_VDPRO_DAFRQ); | ||
| 203 | venc_modify(sd, VENC_VDPRO, 0, VENC_VDPRO_DAUPS); | ||
| 204 | |||
| 205 | venc_write(sd, VENC_VMOD, 0); | ||
| 206 | venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT), | ||
| 207 | VENC_VMOD_VIE); | ||
| 208 | venc_modify(sd, VENC_VMOD, (0 << VENC_VMOD_VMD), VENC_VMOD_VMD); | ||
| 209 | venc_modify(sd, VENC_VMOD, (0 << VENC_VMOD_TVTYP_SHIFT), | ||
| 210 | VENC_VMOD_TVTYP); | ||
| 211 | venc_write(sd, VENC_DACTST, 0x0); | ||
| 212 | venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC); | ||
| 213 | |||
| 214 | return 0; | ||
| 215 | } | ||
| 216 | |||
| 217 | /* | ||
| 218 | * setting PAL mode | ||
| 219 | */ | ||
| 220 | static int venc_set_pal(struct v4l2_subdev *sd) | ||
| 221 | { | ||
| 222 | struct venc_state *venc = to_state(sd); | ||
| 223 | |||
| 224 | v4l2_dbg(debug, 2, sd, "venc_set_pal\n"); | ||
| 225 | |||
| 226 | /* Setup clock at VPSS & VENC for SD */ | ||
| 227 | vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 1); | ||
| 228 | if (venc->pdata->setup_clock(VPBE_ENC_STD, V4L2_STD_625_50) < 0) | ||
| 229 | return -EINVAL; | ||
| 230 | |||
| 231 | venc_enabledigitaloutput(sd, 0); | ||
| 232 | |||
| 233 | /* to set VENC CLK DIV to 1 - final clock is 54 MHz */ | ||
| 234 | venc_modify(sd, VENC_VIDCTL, 0, 1 << 1); | ||
| 235 | /* Set REC656 Mode */ | ||
| 236 | venc_write(sd, VENC_YCCCTL, 0x1); | ||
| 237 | |||
| 238 | venc_modify(sd, VENC_SYNCCTL, 1 << VENC_SYNCCTL_OVD_SHIFT, | ||
| 239 | VENC_SYNCCTL_OVD); | ||
| 240 | venc_write(sd, VENC_VMOD, 0); | ||
| 241 | venc_modify(sd, VENC_VMOD, | ||
| 242 | (1 << VENC_VMOD_VIE_SHIFT), | ||
| 243 | VENC_VMOD_VIE); | ||
| 244 | venc_modify(sd, VENC_VMOD, | ||
| 245 | (0 << VENC_VMOD_VMD), VENC_VMOD_VMD); | ||
| 246 | venc_modify(sd, VENC_VMOD, | ||
| 247 | (1 << VENC_VMOD_TVTYP_SHIFT), | ||
| 248 | VENC_VMOD_TVTYP); | ||
| 249 | venc_write(sd, VENC_DACTST, 0x0); | ||
| 250 | venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC); | ||
| 251 | |||
| 252 | return 0; | ||
| 253 | } | ||
| 254 | |||
| 255 | /* | ||
| 256 | * venc_set_480p59_94 | ||
| 257 | * | ||
| 258 | * This function configures the video encoder to EDTV(525p) component setting. | ||
| 259 | */ | ||
| 260 | static int venc_set_480p59_94(struct v4l2_subdev *sd) | ||
| 261 | { | ||
| 262 | struct venc_state *venc = to_state(sd); | ||
| 263 | struct venc_platform_data *pdata = venc->pdata; | ||
| 264 | |||
| 265 | v4l2_dbg(debug, 2, sd, "venc_set_480p59_94\n"); | ||
| 266 | |||
| 267 | /* Setup clock at VPSS & VENC for SD */ | ||
| 268 | if (pdata->setup_clock(VPBE_ENC_DV_PRESET, V4L2_DV_480P59_94) < 0) | ||
| 269 | return -EINVAL; | ||
| 270 | |||
| 271 | venc_enabledigitaloutput(sd, 0); | ||
| 272 | |||
| 273 | venc_write(sd, VENC_OSDCLK0, 0); | ||
| 274 | venc_write(sd, VENC_OSDCLK1, 1); | ||
| 275 | venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAFRQ, | ||
| 276 | VENC_VDPRO_DAFRQ); | ||
| 277 | venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAUPS, | ||
| 278 | VENC_VDPRO_DAUPS); | ||
| 279 | venc_write(sd, VENC_VMOD, 0); | ||
| 280 | venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT), | ||
| 281 | VENC_VMOD_VIE); | ||
| 282 | venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD); | ||
| 283 | venc_modify(sd, VENC_VMOD, (HDTV_525P << VENC_VMOD_TVTYP_SHIFT), | ||
| 284 | VENC_VMOD_TVTYP); | ||
| 285 | venc_modify(sd, VENC_VMOD, VENC_VMOD_VDMD_YCBCR8 << | ||
| 286 | VENC_VMOD_VDMD_SHIFT, VENC_VMOD_VDMD); | ||
| 287 | |||
| 288 | venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC); | ||
| 289 | |||
| 290 | return 0; | ||
| 291 | } | ||
| 292 | |||
| 293 | /* | ||
| 294 | * venc_set_625p | ||
| 295 | * | ||
| 296 | * This function configures the video encoder to HDTV(625p) component setting | ||
| 297 | */ | ||
| 298 | static int venc_set_576p50(struct v4l2_subdev *sd) | ||
| 299 | { | ||
| 300 | struct venc_state *venc = to_state(sd); | ||
| 301 | struct venc_platform_data *pdata = venc->pdata; | ||
| 302 | |||
| 303 | v4l2_dbg(debug, 2, sd, "venc_set_576p50\n"); | ||
| 304 | |||
| 305 | /* Setup clock at VPSS & VENC for SD */ | ||
| 306 | if (pdata->setup_clock(VPBE_ENC_DV_PRESET, V4L2_DV_576P50) < 0) | ||
| 307 | return -EINVAL; | ||
| 308 | |||
| 309 | venc_enabledigitaloutput(sd, 0); | ||
| 310 | |||
| 311 | venc_write(sd, VENC_OSDCLK0, 0); | ||
| 312 | venc_write(sd, VENC_OSDCLK1, 1); | ||
| 313 | |||
| 314 | venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAFRQ, | ||
| 315 | VENC_VDPRO_DAFRQ); | ||
| 316 | venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAUPS, | ||
| 317 | VENC_VDPRO_DAUPS); | ||
| 318 | |||
| 319 | venc_write(sd, VENC_VMOD, 0); | ||
| 320 | venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT), | ||
| 321 | VENC_VMOD_VIE); | ||
| 322 | venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD); | ||
| 323 | venc_modify(sd, VENC_VMOD, (HDTV_625P << VENC_VMOD_TVTYP_SHIFT), | ||
| 324 | VENC_VMOD_TVTYP); | ||
| 325 | |||
| 326 | venc_modify(sd, VENC_VMOD, VENC_VMOD_VDMD_YCBCR8 << | ||
| 327 | VENC_VMOD_VDMD_SHIFT, VENC_VMOD_VDMD); | ||
| 328 | venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC); | ||
| 329 | |||
| 330 | return 0; | ||
| 331 | } | ||
| 332 | |||
| 333 | static int venc_s_std_output(struct v4l2_subdev *sd, v4l2_std_id norm) | ||
| 334 | { | ||
| 335 | v4l2_dbg(debug, 1, sd, "venc_s_std_output\n"); | ||
| 336 | |||
| 337 | if (norm & V4L2_STD_525_60) | ||
| 338 | return venc_set_ntsc(sd); | ||
| 339 | else if (norm & V4L2_STD_625_50) | ||
| 340 | return venc_set_pal(sd); | ||
| 341 | |||
| 342 | return -EINVAL; | ||
| 343 | } | ||
| 344 | |||
| 345 | static int venc_s_dv_preset(struct v4l2_subdev *sd, | ||
| 346 | struct v4l2_dv_preset *dv_preset) | ||
| 347 | { | ||
| 348 | v4l2_dbg(debug, 1, sd, "venc_s_dv_preset\n"); | ||
| 349 | |||
| 350 | if (dv_preset->preset == V4L2_DV_576P50) | ||
| 351 | return venc_set_576p50(sd); | ||
| 352 | else if (dv_preset->preset == V4L2_DV_480P59_94) | ||
| 353 | return venc_set_480p59_94(sd); | ||
| 354 | |||
| 355 | return -EINVAL; | ||
| 356 | } | ||
| 357 | |||
| 358 | static int venc_s_routing(struct v4l2_subdev *sd, u32 input, u32 output, | ||
| 359 | u32 config) | ||
| 360 | { | ||
| 361 | struct venc_state *venc = to_state(sd); | ||
| 362 | int ret; | ||
| 363 | |||
| 364 | v4l2_dbg(debug, 1, sd, "venc_s_routing\n"); | ||
| 365 | |||
| 366 | ret = venc_set_dac(sd, output); | ||
| 367 | if (!ret) | ||
| 368 | venc->output = output; | ||
| 369 | |||
| 370 | return ret; | ||
| 371 | } | ||
| 372 | |||
| 373 | static long venc_ioctl(struct v4l2_subdev *sd, | ||
| 374 | unsigned int cmd, | ||
| 375 | void *arg) | ||
| 376 | { | ||
| 377 | u32 val; | ||
| 378 | |||
| 379 | switch (cmd) { | ||
| 380 | case VENC_GET_FLD: | ||
| 381 | val = venc_read(sd, VENC_VSTAT); | ||
| 382 | *((int *)arg) = ((val & VENC_VSTAT_FIDST) == | ||
| 383 | VENC_VSTAT_FIDST); | ||
| 384 | break; | ||
| 385 | default: | ||
| 386 | v4l2_err(sd, "Wrong IOCTL cmd\n"); | ||
| 387 | break; | ||
| 388 | } | ||
| 389 | |||
| 390 | return 0; | ||
| 391 | } | ||
| 392 | |||
| 393 | static const struct v4l2_subdev_core_ops venc_core_ops = { | ||
| 394 | .ioctl = venc_ioctl, | ||
| 395 | }; | ||
| 396 | |||
| 397 | static const struct v4l2_subdev_video_ops venc_video_ops = { | ||
| 398 | .s_routing = venc_s_routing, | ||
| 399 | .s_std_output = venc_s_std_output, | ||
| 400 | .s_dv_preset = venc_s_dv_preset, | ||
| 401 | }; | ||
| 402 | |||
| 403 | static const struct v4l2_subdev_ops venc_ops = { | ||
| 404 | .core = &venc_core_ops, | ||
| 405 | .video = &venc_video_ops, | ||
| 406 | }; | ||
| 407 | |||
| 408 | static int venc_initialize(struct v4l2_subdev *sd) | ||
| 409 | { | ||
| 410 | struct venc_state *venc = to_state(sd); | ||
| 411 | int ret; | ||
| 412 | |||
| 413 | /* Set default to output to composite and std to NTSC */ | ||
| 414 | venc->output = 0; | ||
| 415 | venc->std = V4L2_STD_525_60; | ||
| 416 | |||
| 417 | ret = venc_s_routing(sd, 0, venc->output, 0); | ||
| 418 | if (ret < 0) { | ||
| 419 | v4l2_err(sd, "Error setting output during init\n"); | ||
| 420 | return -EINVAL; | ||
| 421 | } | ||
| 422 | |||
| 423 | ret = venc_s_std_output(sd, venc->std); | ||
| 424 | if (ret < 0) { | ||
| 425 | v4l2_err(sd, "Error setting std during init\n"); | ||
| 426 | return -EINVAL; | ||
| 427 | } | ||
| 428 | |||
| 429 | return ret; | ||
| 430 | } | ||
| 431 | |||
| 432 | static int venc_device_get(struct device *dev, void *data) | ||
| 433 | { | ||
| 434 | struct platform_device *pdev = to_platform_device(dev); | ||
| 435 | struct venc_state **venc = data; | ||
| 436 | |||
| 437 | if (strcmp(MODULE_NAME, pdev->name) == 0) | ||
| 438 | *venc = platform_get_drvdata(pdev); | ||
| 439 | |||
| 440 | return 0; | ||
| 441 | } | ||
| 442 | |||
| 443 | struct v4l2_subdev *venc_sub_dev_init(struct v4l2_device *v4l2_dev, | ||
| 444 | const char *venc_name) | ||
| 445 | { | ||
| 446 | struct venc_state *venc; | ||
| 447 | int err; | ||
| 448 | |||
| 449 | err = bus_for_each_dev(&platform_bus_type, NULL, &venc, | ||
| 450 | venc_device_get); | ||
| 451 | if (venc == NULL) | ||
| 452 | return NULL; | ||
| 453 | |||
| 454 | v4l2_subdev_init(&venc->sd, &venc_ops); | ||
| 455 | |||
| 456 | strcpy(venc->sd.name, venc_name); | ||
| 457 | if (v4l2_device_register_subdev(v4l2_dev, &venc->sd) < 0) { | ||
| 458 | v4l2_err(v4l2_dev, | ||
| 459 | "vpbe unable to register venc sub device\n"); | ||
| 460 | return NULL; | ||
| 461 | } | ||
| 462 | if (venc_initialize(&venc->sd)) { | ||
| 463 | v4l2_err(v4l2_dev, | ||
| 464 | "vpbe venc initialization failed\n"); | ||
| 465 | return NULL; | ||
| 466 | } | ||
| 467 | |||
| 468 | return &venc->sd; | ||
| 469 | } | ||
| 470 | EXPORT_SYMBOL(venc_sub_dev_init); | ||
| 471 | |||
| 472 | static int venc_probe(struct platform_device *pdev) | ||
| 473 | { | ||
| 474 | struct venc_state *venc; | ||
| 475 | struct resource *res; | ||
| 476 | int ret; | ||
| 477 | |||
| 478 | venc = kzalloc(sizeof(struct venc_state), GFP_KERNEL); | ||
| 479 | if (venc == NULL) | ||
| 480 | return -ENOMEM; | ||
| 481 | |||
| 482 | venc->pdev = &pdev->dev; | ||
| 483 | venc->pdata = pdev->dev.platform_data; | ||
| 484 | if (NULL == venc->pdata) { | ||
| 485 | dev_err(venc->pdev, "Unable to get platform data for" | ||
| 486 | " VENC sub device"); | ||
| 487 | ret = -ENOENT; | ||
| 488 | goto free_mem; | ||
| 489 | } | ||
| 490 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
| 491 | if (!res) { | ||
| 492 | dev_err(venc->pdev, | ||
| 493 | "Unable to get VENC register address map\n"); | ||
| 494 | ret = -ENODEV; | ||
| 495 | goto free_mem; | ||
| 496 | } | ||
| 497 | |||
| 498 | if (!request_mem_region(res->start, resource_size(res), "venc")) { | ||
| 499 | dev_err(venc->pdev, "Unable to reserve VENC MMIO region\n"); | ||
| 500 | ret = -ENODEV; | ||
| 501 | goto free_mem; | ||
| 502 | } | ||
| 503 | |||
| 504 | venc->venc_base = ioremap_nocache(res->start, resource_size(res)); | ||
| 505 | if (!venc->venc_base) { | ||
| 506 | dev_err(venc->pdev, "Unable to map VENC IO space\n"); | ||
| 507 | ret = -ENODEV; | ||
| 508 | goto release_venc_mem_region; | ||
| 509 | } | ||
| 510 | |||
| 511 | spin_lock_init(&venc->lock); | ||
| 512 | platform_set_drvdata(pdev, venc); | ||
| 513 | dev_notice(venc->pdev, "VENC sub device probe success\n"); | ||
| 514 | return 0; | ||
| 515 | |||
| 516 | release_venc_mem_region: | ||
| 517 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
| 518 | release_mem_region(res->start, resource_size(res)); | ||
| 519 | free_mem: | ||
| 520 | kfree(venc); | ||
| 521 | return ret; | ||
| 522 | } | ||
| 523 | |||
| 524 | static int venc_remove(struct platform_device *pdev) | ||
| 525 | { | ||
| 526 | struct venc_state *venc = platform_get_drvdata(pdev); | ||
| 527 | struct resource *res; | ||
| 528 | |||
| 529 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
| 530 | iounmap((void *)venc->venc_base); | ||
| 531 | release_mem_region(res->start, resource_size(res)); | ||
| 532 | kfree(venc); | ||
| 533 | |||
| 534 | return 0; | ||
| 535 | } | ||
| 536 | |||
| 537 | static struct platform_driver venc_driver = { | ||
| 538 | .probe = venc_probe, | ||
| 539 | .remove = venc_remove, | ||
| 540 | .driver = { | ||
| 541 | .name = MODULE_NAME, | ||
| 542 | .owner = THIS_MODULE, | ||
| 543 | }, | ||
| 544 | }; | ||
| 545 | |||
| 546 | static int venc_init(void) | ||
| 547 | { | ||
| 548 | if (platform_driver_register(&venc_driver)) { | ||
| 549 | printk(KERN_ERR "Unable to register venc driver\n"); | ||
| 550 | return -ENODEV; | ||
| 551 | } | ||
| 552 | return 0; | ||
| 553 | } | ||
| 554 | |||
| 555 | static void venc_exit(void) | ||
| 556 | { | ||
| 557 | platform_driver_unregister(&venc_driver); | ||
| 558 | return; | ||
| 559 | } | ||
| 560 | |||
| 561 | module_init(venc_init); | ||
| 562 | module_exit(venc_exit); | ||
| 563 | |||
| 564 | MODULE_LICENSE("GPL"); | ||
| 565 | MODULE_DESCRIPTION("VPBE VENC Driver"); | ||
| 566 | MODULE_AUTHOR("Texas Instruments"); | ||
diff --git a/drivers/media/video/davinci/vpbe_venc_regs.h b/drivers/media/video/davinci/vpbe_venc_regs.h new file mode 100644 index 000000000000..947cb1510776 --- /dev/null +++ b/drivers/media/video/davinci/vpbe_venc_regs.h | |||
| @@ -0,0 +1,177 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2006-2010 Texas Instruments Inc | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or modify | ||
| 5 | * it under the terms of the GNU General Public License as published by | ||
| 6 | * the Free Software Foundation version 2.. | ||
| 7 | * | ||
| 8 | * This program is distributed in the hope that it will be useful, | ||
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 11 | * GNU General Public License for more details. | ||
| 12 | * | ||
| 13 | * You should have received a copy of the GNU General Public License | ||
| 14 | * along with this program; if not, write to the Free Software | ||
| 15 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 16 | */ | ||
| 17 | #ifndef _VPBE_VENC_REGS_H | ||
| 18 | #define _VPBE_VENC_REGS_H | ||
| 19 | |||
| 20 | /* VPBE Video Encoder / Digital LCD Subsystem Registers (VENC) */ | ||
| 21 | #define VENC_VMOD 0x00 | ||
| 22 | #define VENC_VIDCTL 0x04 | ||
| 23 | #define VENC_VDPRO 0x08 | ||
| 24 | #define VENC_SYNCCTL 0x0C | ||
| 25 | #define VENC_HSPLS 0x10 | ||
| 26 | #define VENC_VSPLS 0x14 | ||
| 27 | #define VENC_HINT 0x18 | ||
| 28 | #define VENC_HSTART 0x1C | ||
| 29 | #define VENC_HVALID 0x20 | ||
| 30 | #define VENC_VINT 0x24 | ||
| 31 | #define VENC_VSTART 0x28 | ||
| 32 | #define VENC_VVALID 0x2C | ||
| 33 | #define VENC_HSDLY 0x30 | ||
| 34 | #define VENC_VSDLY 0x34 | ||
| 35 | #define VENC_YCCCTL 0x38 | ||
| 36 | #define VENC_RGBCTL 0x3C | ||
| 37 | #define VENC_RGBCLP 0x40 | ||
| 38 | #define VENC_LINECTL 0x44 | ||
| 39 | #define VENC_CULLLINE 0x48 | ||
| 40 | #define VENC_LCDOUT 0x4C | ||
| 41 | #define VENC_BRTS 0x50 | ||
| 42 | #define VENC_BRTW 0x54 | ||
| 43 | #define VENC_ACCTL 0x58 | ||
| 44 | #define VENC_PWMP 0x5C | ||
| 45 | #define VENC_PWMW 0x60 | ||
| 46 | #define VENC_DCLKCTL 0x64 | ||
| 47 | #define VENC_DCLKPTN0 0x68 | ||
| 48 | #define VENC_DCLKPTN1 0x6C | ||
| 49 | #define VENC_DCLKPTN2 0x70 | ||
| 50 | #define VENC_DCLKPTN3 0x74 | ||
| 51 | #define VENC_DCLKPTN0A 0x78 | ||
| 52 | #define VENC_DCLKPTN1A 0x7C | ||
| 53 | #define VENC_DCLKPTN2A 0x80 | ||
| 54 | #define VENC_DCLKPTN3A 0x84 | ||
| 55 | #define VENC_DCLKHS 0x88 | ||
| 56 | #define VENC_DCLKHSA 0x8C | ||
| 57 | #define VENC_DCLKHR 0x90 | ||
| 58 | #define VENC_DCLKVS 0x94 | ||
| 59 | #define VENC_DCLKVR 0x98 | ||
| 60 | #define VENC_CAPCTL 0x9C | ||
| 61 | #define VENC_CAPDO 0xA0 | ||
| 62 | #define VENC_CAPDE 0xA4 | ||
| 63 | #define VENC_ATR0 0xA8 | ||
| 64 | #define VENC_ATR1 0xAC | ||
| 65 | #define VENC_ATR2 0xB0 | ||
| 66 | #define VENC_VSTAT 0xB8 | ||
| 67 | #define VENC_RAMADR 0xBC | ||
| 68 | #define VENC_RAMPORT 0xC0 | ||
| 69 | #define VENC_DACTST 0xC4 | ||
| 70 | #define VENC_YCOLVL 0xC8 | ||
| 71 | #define VENC_SCPROG 0xCC | ||
| 72 | #define VENC_CVBS 0xDC | ||
| 73 | #define VENC_CMPNT 0xE0 | ||
| 74 | #define VENC_ETMG0 0xE4 | ||
| 75 | #define VENC_ETMG1 0xE8 | ||
| 76 | #define VENC_ETMG2 0xEC | ||
| 77 | #define VENC_ETMG3 0xF0 | ||
| 78 | #define VENC_DACSEL 0xF4 | ||
| 79 | #define VENC_ARGBX0 0x100 | ||
| 80 | #define VENC_ARGBX1 0x104 | ||
| 81 | #define VENC_ARGBX2 0x108 | ||
| 82 | #define VENC_ARGBX3 0x10C | ||
| 83 | #define VENC_ARGBX4 0x110 | ||
| 84 | #define VENC_DRGBX0 0x114 | ||
| 85 | #define VENC_DRGBX1 0x118 | ||
| 86 | #define VENC_DRGBX2 0x11C | ||
| 87 | #define VENC_DRGBX3 0x120 | ||
| 88 | #define VENC_DRGBX4 0x124 | ||
| 89 | #define VENC_VSTARTA 0x128 | ||
| 90 | #define VENC_OSDCLK0 0x12C | ||
| 91 | #define VENC_OSDCLK1 0x130 | ||
| 92 | #define VENC_HVLDCL0 0x134 | ||
| 93 | #define VENC_HVLDCL1 0x138 | ||
| 94 | #define VENC_OSDHADV 0x13C | ||
| 95 | #define VENC_CLKCTL 0x140 | ||
| 96 | #define VENC_GAMCTL 0x144 | ||
| 97 | #define VENC_XHINTVL 0x174 | ||
| 98 | |||
| 99 | /* bit definitions */ | ||
| 100 | #define VPBE_PCR_VENC_DIV (1 << 1) | ||
| 101 | #define VPBE_PCR_CLK_OFF (1 << 0) | ||
| 102 | |||
| 103 | #define VENC_VMOD_VDMD_SHIFT 12 | ||
| 104 | #define VENC_VMOD_VDMD_YCBCR16 0 | ||
| 105 | #define VENC_VMOD_VDMD_YCBCR8 1 | ||
| 106 | #define VENC_VMOD_VDMD_RGB666 2 | ||
| 107 | #define VENC_VMOD_VDMD_RGB8 3 | ||
| 108 | #define VENC_VMOD_VDMD_EPSON 4 | ||
| 109 | #define VENC_VMOD_VDMD_CASIO 5 | ||
| 110 | #define VENC_VMOD_VDMD_UDISPQVGA 6 | ||
| 111 | #define VENC_VMOD_VDMD_STNLCD 7 | ||
| 112 | #define VENC_VMOD_VIE_SHIFT 1 | ||
| 113 | #define VENC_VMOD_VDMD (7 << 12) | ||
| 114 | #define VENC_VMOD_ITLCL (1 << 11) | ||
| 115 | #define VENC_VMOD_ITLC (1 << 10) | ||
| 116 | #define VENC_VMOD_NSIT (1 << 9) | ||
| 117 | #define VENC_VMOD_HDMD (1 << 8) | ||
| 118 | #define VENC_VMOD_TVTYP_SHIFT 6 | ||
| 119 | #define VENC_VMOD_TVTYP (3 << 6) | ||
| 120 | #define VENC_VMOD_SLAVE (1 << 5) | ||
| 121 | #define VENC_VMOD_VMD (1 << 4) | ||
| 122 | #define VENC_VMOD_BLNK (1 << 3) | ||
| 123 | #define VENC_VMOD_VIE (1 << 1) | ||
| 124 | #define VENC_VMOD_VENC (1 << 0) | ||
| 125 | |||
| 126 | /* VMOD TVTYP options for HDMD=0 */ | ||
| 127 | #define SDTV_NTSC 0 | ||
| 128 | #define SDTV_PAL 1 | ||
| 129 | /* VMOD TVTYP options for HDMD=1 */ | ||
| 130 | #define HDTV_525P 0 | ||
| 131 | #define HDTV_625P 1 | ||
| 132 | #define HDTV_1080I 2 | ||
| 133 | #define HDTV_720P 3 | ||
| 134 | |||
| 135 | #define VENC_VIDCTL_VCLKP (1 << 14) | ||
| 136 | #define VENC_VIDCTL_VCLKE_SHIFT 13 | ||
| 137 | #define VENC_VIDCTL_VCLKE (1 << 13) | ||
| 138 | #define VENC_VIDCTL_VCLKZ_SHIFT 12 | ||
| 139 | #define VENC_VIDCTL_VCLKZ (1 << 12) | ||
| 140 | #define VENC_VIDCTL_SYDIR_SHIFT 8 | ||
| 141 | #define VENC_VIDCTL_SYDIR (1 << 8) | ||
| 142 | #define VENC_VIDCTL_DOMD_SHIFT 4 | ||
| 143 | #define VENC_VIDCTL_DOMD (3 << 4) | ||
| 144 | #define VENC_VIDCTL_YCDIR_SHIFT 0 | ||
| 145 | #define VENC_VIDCTL_YCDIR (1 << 0) | ||
| 146 | |||
| 147 | #define VENC_VDPRO_ATYCC_SHIFT 5 | ||
| 148 | #define VENC_VDPRO_ATYCC (1 << 5) | ||
| 149 | #define VENC_VDPRO_ATCOM_SHIFT 4 | ||
| 150 | #define VENC_VDPRO_ATCOM (1 << 4) | ||
| 151 | #define VENC_VDPRO_DAFRQ (1 << 3) | ||
| 152 | #define VENC_VDPRO_DAUPS (1 << 2) | ||
| 153 | #define VENC_VDPRO_CUPS (1 << 1) | ||
| 154 | #define VENC_VDPRO_YUPS (1 << 0) | ||
| 155 | |||
| 156 | #define VENC_SYNCCTL_VPL_SHIFT 3 | ||
| 157 | #define VENC_SYNCCTL_VPL (1 << 3) | ||
| 158 | #define VENC_SYNCCTL_HPL_SHIFT 2 | ||
| 159 | #define VENC_SYNCCTL_HPL (1 << 2) | ||
| 160 | #define VENC_SYNCCTL_SYEV_SHIFT 1 | ||
| 161 | #define VENC_SYNCCTL_SYEV (1 << 1) | ||
| 162 | #define VENC_SYNCCTL_SYEH_SHIFT 0 | ||
| 163 | #define VENC_SYNCCTL_SYEH (1 << 0) | ||
| 164 | #define VENC_SYNCCTL_OVD_SHIFT 14 | ||
| 165 | #define VENC_SYNCCTL_OVD (1 << 14) | ||
| 166 | |||
| 167 | #define VENC_DCLKCTL_DCKEC_SHIFT 11 | ||
| 168 | #define VENC_DCLKCTL_DCKEC (1 << 11) | ||
| 169 | #define VENC_DCLKCTL_DCKPW_SHIFT 0 | ||
| 170 | #define VENC_DCLKCTL_DCKPW (0x3f << 0) | ||
| 171 | |||
| 172 | #define VENC_VSTAT_FIDST (1 << 4) | ||
| 173 | |||
| 174 | #define VENC_CMPNT_MRGB_SHIFT 14 | ||
| 175 | #define VENC_CMPNT_MRGB (1 << 14) | ||
| 176 | |||
| 177 | #endif /* _VPBE_VENC_REGS_H */ | ||
diff --git a/drivers/media/video/davinci/vpif_capture.c b/drivers/media/video/davinci/vpif_capture.c index d93ad74a34c5..49e4deb50043 100644 --- a/drivers/media/video/davinci/vpif_capture.c +++ b/drivers/media/video/davinci/vpif_capture.c | |||
| @@ -33,7 +33,6 @@ | |||
| 33 | #include <linux/i2c.h> | 33 | #include <linux/i2c.h> |
| 34 | #include <linux/platform_device.h> | 34 | #include <linux/platform_device.h> |
| 35 | #include <linux/io.h> | 35 | #include <linux/io.h> |
| 36 | #include <linux/version.h> | ||
| 37 | #include <linux/slab.h> | 36 | #include <linux/slab.h> |
| 38 | #include <media/v4l2-device.h> | 37 | #include <media/v4l2-device.h> |
| 39 | #include <media/v4l2-ioctl.h> | 38 | #include <media/v4l2-ioctl.h> |
| @@ -44,6 +43,7 @@ | |||
| 44 | 43 | ||
| 45 | MODULE_DESCRIPTION("TI DaVinci VPIF Capture driver"); | 44 | MODULE_DESCRIPTION("TI DaVinci VPIF Capture driver"); |
| 46 | MODULE_LICENSE("GPL"); | 45 | MODULE_LICENSE("GPL"); |
| 46 | MODULE_VERSION(VPIF_CAPTURE_VERSION); | ||
| 47 | 47 | ||
| 48 | #define vpif_err(fmt, arg...) v4l2_err(&vpif_obj.v4l2_dev, fmt, ## arg) | 48 | #define vpif_err(fmt, arg...) v4l2_err(&vpif_obj.v4l2_dev, fmt, ## arg) |
| 49 | #define vpif_dbg(level, debug, fmt, arg...) \ | 49 | #define vpif_dbg(level, debug, fmt, arg...) \ |
| @@ -1677,7 +1677,6 @@ static int vpif_querycap(struct file *file, void *priv, | |||
| 1677 | { | 1677 | { |
| 1678 | struct vpif_capture_config *config = vpif_dev->platform_data; | 1678 | struct vpif_capture_config *config = vpif_dev->platform_data; |
| 1679 | 1679 | ||
| 1680 | cap->version = VPIF_CAPTURE_VERSION_CODE; | ||
| 1681 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING; | 1680 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING; |
| 1682 | strlcpy(cap->driver, "vpif capture", sizeof(cap->driver)); | 1681 | strlcpy(cap->driver, "vpif capture", sizeof(cap->driver)); |
| 1683 | strlcpy(cap->bus_info, "DM646x Platform", sizeof(cap->bus_info)); | 1682 | strlcpy(cap->bus_info, "DM646x Platform", sizeof(cap->bus_info)); |
| @@ -2211,10 +2210,8 @@ static __init int vpif_probe(struct platform_device *pdev) | |||
| 2211 | vfd->v4l2_dev = &vpif_obj.v4l2_dev; | 2210 | vfd->v4l2_dev = &vpif_obj.v4l2_dev; |
| 2212 | vfd->release = video_device_release; | 2211 | vfd->release = video_device_release; |
| 2213 | snprintf(vfd->name, sizeof(vfd->name), | 2212 | snprintf(vfd->name, sizeof(vfd->name), |
| 2214 | "DM646x_VPIFCapture_DRIVER_V%d.%d.%d", | 2213 | "DM646x_VPIFCapture_DRIVER_V%s", |
| 2215 | (VPIF_CAPTURE_VERSION_CODE >> 16) & 0xff, | 2214 | VPIF_CAPTURE_VERSION); |
| 2216 | (VPIF_CAPTURE_VERSION_CODE >> 8) & 0xff, | ||
| 2217 | (VPIF_CAPTURE_VERSION_CODE) & 0xff); | ||
| 2218 | /* Set video_dev to the video device */ | 2215 | /* Set video_dev to the video device */ |
| 2219 | ch->video_dev = vfd; | 2216 | ch->video_dev = vfd; |
| 2220 | } | 2217 | } |
diff --git a/drivers/media/video/davinci/vpif_capture.h b/drivers/media/video/davinci/vpif_capture.h index 7a4196dfdce1..064550f5ce4a 100644 --- a/drivers/media/video/davinci/vpif_capture.h +++ b/drivers/media/video/davinci/vpif_capture.h | |||
| @@ -23,7 +23,6 @@ | |||
| 23 | 23 | ||
| 24 | /* Header files */ | 24 | /* Header files */ |
| 25 | #include <linux/videodev2.h> | 25 | #include <linux/videodev2.h> |
| 26 | #include <linux/version.h> | ||
| 27 | #include <media/v4l2-common.h> | 26 | #include <media/v4l2-common.h> |
| 28 | #include <media/v4l2-device.h> | 27 | #include <media/v4l2-device.h> |
| 29 | #include <media/videobuf-core.h> | 28 | #include <media/videobuf-core.h> |
| @@ -33,11 +32,7 @@ | |||
| 33 | #include "vpif.h" | 32 | #include "vpif.h" |
| 34 | 33 | ||
| 35 | /* Macros */ | 34 | /* Macros */ |
| 36 | #define VPIF_MAJOR_RELEASE 0 | 35 | #define VPIF_CAPTURE_VERSION "0.0.2" |
| 37 | #define VPIF_MINOR_RELEASE 0 | ||
| 38 | #define VPIF_BUILD 1 | ||
| 39 | #define VPIF_CAPTURE_VERSION_CODE ((VPIF_MAJOR_RELEASE << 16) | \ | ||
| 40 | (VPIF_MINOR_RELEASE << 8) | VPIF_BUILD) | ||
| 41 | 36 | ||
| 42 | #define VPIF_VALID_FIELD(field) (((V4L2_FIELD_ANY == field) || \ | 37 | #define VPIF_VALID_FIELD(field) (((V4L2_FIELD_ANY == field) || \ |
| 43 | (V4L2_FIELD_NONE == field)) || \ | 38 | (V4L2_FIELD_NONE == field)) || \ |
diff --git a/drivers/media/video/davinci/vpif_display.c b/drivers/media/video/davinci/vpif_display.c index cdf659abdc2a..286f02910044 100644 --- a/drivers/media/video/davinci/vpif_display.c +++ b/drivers/media/video/davinci/vpif_display.c | |||
| @@ -29,7 +29,6 @@ | |||
| 29 | #include <linux/i2c.h> | 29 | #include <linux/i2c.h> |
| 30 | #include <linux/platform_device.h> | 30 | #include <linux/platform_device.h> |
| 31 | #include <linux/io.h> | 31 | #include <linux/io.h> |
| 32 | #include <linux/version.h> | ||
| 33 | #include <linux/slab.h> | 32 | #include <linux/slab.h> |
| 34 | 33 | ||
| 35 | #include <asm/irq.h> | 34 | #include <asm/irq.h> |
| @@ -47,6 +46,7 @@ | |||
| 47 | 46 | ||
| 48 | MODULE_DESCRIPTION("TI DaVinci VPIF Display driver"); | 47 | MODULE_DESCRIPTION("TI DaVinci VPIF Display driver"); |
| 49 | MODULE_LICENSE("GPL"); | 48 | MODULE_LICENSE("GPL"); |
| 49 | MODULE_VERSION(VPIF_DISPLAY_VERSION); | ||
| 50 | 50 | ||
| 51 | #define DM646X_V4L2_STD (V4L2_STD_525_60 | V4L2_STD_625_50) | 51 | #define DM646X_V4L2_STD (V4L2_STD_525_60 | V4L2_STD_625_50) |
| 52 | 52 | ||
| @@ -701,7 +701,6 @@ static int vpif_querycap(struct file *file, void *priv, | |||
| 701 | { | 701 | { |
| 702 | struct vpif_display_config *config = vpif_dev->platform_data; | 702 | struct vpif_display_config *config = vpif_dev->platform_data; |
| 703 | 703 | ||
| 704 | cap->version = VPIF_DISPLAY_VERSION_CODE; | ||
| 705 | cap->capabilities = V4L2_CAP_VIDEO_OUTPUT | V4L2_CAP_STREAMING; | 704 | cap->capabilities = V4L2_CAP_VIDEO_OUTPUT | V4L2_CAP_STREAMING; |
| 706 | strlcpy(cap->driver, "vpif display", sizeof(cap->driver)); | 705 | strlcpy(cap->driver, "vpif display", sizeof(cap->driver)); |
| 707 | strlcpy(cap->bus_info, "Platform", sizeof(cap->bus_info)); | 706 | strlcpy(cap->bus_info, "Platform", sizeof(cap->bus_info)); |
| @@ -1740,10 +1739,8 @@ static __init int vpif_probe(struct platform_device *pdev) | |||
| 1740 | vfd->v4l2_dev = &vpif_obj.v4l2_dev; | 1739 | vfd->v4l2_dev = &vpif_obj.v4l2_dev; |
| 1741 | vfd->release = video_device_release; | 1740 | vfd->release = video_device_release; |
| 1742 | snprintf(vfd->name, sizeof(vfd->name), | 1741 | snprintf(vfd->name, sizeof(vfd->name), |
| 1743 | "DM646x_VPIFDisplay_DRIVER_V%d.%d.%d", | 1742 | "DM646x_VPIFDisplay_DRIVER_V%s", |
| 1744 | (VPIF_DISPLAY_VERSION_CODE >> 16) & 0xff, | 1743 | VPIF_DISPLAY_VERSION); |
| 1745 | (VPIF_DISPLAY_VERSION_CODE >> 8) & 0xff, | ||
| 1746 | (VPIF_DISPLAY_VERSION_CODE) & 0xff); | ||
| 1747 | 1744 | ||
| 1748 | /* Set video_dev to the video device */ | 1745 | /* Set video_dev to the video device */ |
| 1749 | ch->video_dev = vfd; | 1746 | ch->video_dev = vfd; |
diff --git a/drivers/media/video/davinci/vpif_display.h b/drivers/media/video/davinci/vpif_display.h index b53aaa883075..5d1936dafed2 100644 --- a/drivers/media/video/davinci/vpif_display.h +++ b/drivers/media/video/davinci/vpif_display.h | |||
| @@ -18,7 +18,6 @@ | |||
| 18 | 18 | ||
| 19 | /* Header files */ | 19 | /* Header files */ |
| 20 | #include <linux/videodev2.h> | 20 | #include <linux/videodev2.h> |
| 21 | #include <linux/version.h> | ||
| 22 | #include <media/v4l2-common.h> | 21 | #include <media/v4l2-common.h> |
| 23 | #include <media/v4l2-device.h> | 22 | #include <media/v4l2-device.h> |
| 24 | #include <media/videobuf-core.h> | 23 | #include <media/videobuf-core.h> |
| @@ -27,12 +26,7 @@ | |||
| 27 | #include "vpif.h" | 26 | #include "vpif.h" |
| 28 | 27 | ||
| 29 | /* Macros */ | 28 | /* Macros */ |
| 30 | #define VPIF_MAJOR_RELEASE (0) | 29 | #define VPIF_DISPLAY_VERSION "0.0.2" |
| 31 | #define VPIF_MINOR_RELEASE (0) | ||
| 32 | #define VPIF_BUILD (1) | ||
| 33 | |||
| 34 | #define VPIF_DISPLAY_VERSION_CODE \ | ||
| 35 | ((VPIF_MAJOR_RELEASE << 16) | (VPIF_MINOR_RELEASE << 8) | VPIF_BUILD) | ||
| 36 | 30 | ||
| 37 | #define VPIF_VALID_FIELD(field) \ | 31 | #define VPIF_VALID_FIELD(field) \ |
| 38 | (((V4L2_FIELD_ANY == field) || (V4L2_FIELD_NONE == field)) || \ | 32 | (((V4L2_FIELD_ANY == field) || (V4L2_FIELD_NONE == field)) || \ |
diff --git a/drivers/media/video/em28xx/Kconfig b/drivers/media/video/em28xx/Kconfig index 3cb78f26df90..281ee427c2ab 100644 --- a/drivers/media/video/em28xx/Kconfig +++ b/drivers/media/video/em28xx/Kconfig | |||
| @@ -3,7 +3,6 @@ config VIDEO_EM28XX | |||
| 3 | depends on VIDEO_DEV && I2C | 3 | depends on VIDEO_DEV && I2C |
| 4 | select VIDEO_TUNER | 4 | select VIDEO_TUNER |
| 5 | select VIDEO_TVEEPROM | 5 | select VIDEO_TVEEPROM |
| 6 | depends on RC_CORE | ||
| 7 | select VIDEOBUF_VMALLOC | 6 | select VIDEOBUF_VMALLOC |
| 8 | select VIDEO_SAA711X if VIDEO_HELPER_CHIPS_AUTO | 7 | select VIDEO_SAA711X if VIDEO_HELPER_CHIPS_AUTO |
| 9 | select VIDEO_TVP5150 if VIDEO_HELPER_CHIPS_AUTO | 8 | select VIDEO_TVP5150 if VIDEO_HELPER_CHIPS_AUTO |
| @@ -40,7 +39,18 @@ config VIDEO_EM28XX_DVB | |||
| 40 | select DVB_S921 if !DVB_FE_CUSTOMISE | 39 | select DVB_S921 if !DVB_FE_CUSTOMISE |
| 41 | select DVB_DRXD if !DVB_FE_CUSTOMISE | 40 | select DVB_DRXD if !DVB_FE_CUSTOMISE |
| 42 | select DVB_CXD2820R if !DVB_FE_CUSTOMISE | 41 | select DVB_CXD2820R if !DVB_FE_CUSTOMISE |
| 42 | select DVB_DRXK if !DVB_FE_CUSTOMISE | ||
| 43 | select DVB_TDA18271C2DD if !DVB_FE_CUSTOMISE | ||
| 43 | select VIDEOBUF_DVB | 44 | select VIDEOBUF_DVB |
| 44 | ---help--- | 45 | ---help--- |
| 45 | This adds support for DVB cards based on the | 46 | This adds support for DVB cards based on the |
| 46 | Empiatech em28xx chips. | 47 | Empiatech em28xx chips. |
| 48 | |||
| 49 | config VIDEO_EM28XX_RC | ||
| 50 | bool "EM28XX Remote Controller support" | ||
| 51 | depends on RC_CORE | ||
| 52 | depends on VIDEO_EM28XX | ||
| 53 | depends on !(RC_CORE=m && VIDEO_EM28XX=y) | ||
| 54 | default y | ||
| 55 | ---help--- | ||
| 56 | Enables Remote Controller support on em28xx driver. | ||
diff --git a/drivers/media/video/em28xx/Makefile b/drivers/media/video/em28xx/Makefile index d0f093d1d0df..38aaa004f57d 100644 --- a/drivers/media/video/em28xx/Makefile +++ b/drivers/media/video/em28xx/Makefile | |||
| @@ -1,5 +1,7 @@ | |||
| 1 | em28xx-objs := em28xx-video.o em28xx-i2c.o em28xx-cards.o em28xx-core.o \ | 1 | em28xx-y := em28xx-video.o em28xx-i2c.o em28xx-cards.o |
| 2 | em28xx-input.o em28xx-vbi.o | 2 | em28xx-y += em28xx-core.o em28xx-vbi.o |
| 3 | |||
| 4 | em28xx-$(CONFIG_VIDEO_EM28XX_RC) += em28xx-input.o | ||
| 3 | 5 | ||
| 4 | em28xx-alsa-objs := em28xx-audio.o | 6 | em28xx-alsa-objs := em28xx-audio.o |
| 5 | 7 | ||
diff --git a/drivers/media/video/em28xx/em28xx-audio.c b/drivers/media/video/em28xx/em28xx-audio.c index 3c48a72eb7de..cff0768afbf5 100644 --- a/drivers/media/video/em28xx/em28xx-audio.c +++ b/drivers/media/video/em28xx/em28xx-audio.c | |||
| @@ -3,9 +3,9 @@ | |||
| 3 | * | 3 | * |
| 4 | * Copyright (C) 2006 Markus Rechberger <mrechberger@gmail.com> | 4 | * Copyright (C) 2006 Markus Rechberger <mrechberger@gmail.com> |
| 5 | * | 5 | * |
| 6 | * Copyright (C) 2007 Mauro Carvalho Chehab <mchehab@infradead.org> | 6 | * Copyright (C) 2007-2011 Mauro Carvalho Chehab <mchehab@redhat.com> |
| 7 | * - Port to work with the in-kernel driver | 7 | * - Port to work with the in-kernel driver |
| 8 | * - Several cleanups | 8 | * - Cleanups, fixes, alsa-controls, etc. |
| 9 | * | 9 | * |
| 10 | * This driver is based on my previous au600 usb pstn audio driver | 10 | * This driver is based on my previous au600 usb pstn audio driver |
| 11 | * and inherits all the copyrights | 11 | * and inherits all the copyrights |
| @@ -41,6 +41,7 @@ | |||
| 41 | #include <sound/info.h> | 41 | #include <sound/info.h> |
| 42 | #include <sound/initval.h> | 42 | #include <sound/initval.h> |
| 43 | #include <sound/control.h> | 43 | #include <sound/control.h> |
| 44 | #include <sound/tlv.h> | ||
| 44 | #include <media/v4l2-common.h> | 45 | #include <media/v4l2-common.h> |
| 45 | #include "em28xx.h" | 46 | #include "em28xx.h" |
| 46 | 47 | ||
| @@ -212,9 +213,12 @@ static int em28xx_init_audio_isoc(struct em28xx *dev) | |||
| 212 | for (i = 0; i < EM28XX_AUDIO_BUFS; i++) { | 213 | for (i = 0; i < EM28XX_AUDIO_BUFS; i++) { |
| 213 | errCode = usb_submit_urb(dev->adev.urb[i], GFP_ATOMIC); | 214 | errCode = usb_submit_urb(dev->adev.urb[i], GFP_ATOMIC); |
| 214 | if (errCode) { | 215 | if (errCode) { |
| 216 | em28xx_errdev("submit of audio urb failed\n"); | ||
| 215 | em28xx_deinit_isoc_audio(dev); | 217 | em28xx_deinit_isoc_audio(dev); |
| 218 | atomic_set(&dev->stream_started, 0); | ||
| 216 | return errCode; | 219 | return errCode; |
| 217 | } | 220 | } |
| 221 | |||
| 218 | } | 222 | } |
| 219 | 223 | ||
| 220 | return 0; | 224 | return 0; |
| @@ -245,6 +249,7 @@ static struct snd_pcm_hardware snd_em28xx_hw_capture = { | |||
| 245 | .info = SNDRV_PCM_INFO_BLOCK_TRANSFER | | 249 | .info = SNDRV_PCM_INFO_BLOCK_TRANSFER | |
| 246 | SNDRV_PCM_INFO_MMAP | | 250 | SNDRV_PCM_INFO_MMAP | |
| 247 | SNDRV_PCM_INFO_INTERLEAVED | | 251 | SNDRV_PCM_INFO_INTERLEAVED | |
| 252 | SNDRV_PCM_INFO_BATCH | | ||
| 248 | SNDRV_PCM_INFO_MMAP_VALID, | 253 | SNDRV_PCM_INFO_MMAP_VALID, |
| 249 | 254 | ||
| 250 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | 255 | .formats = SNDRV_PCM_FMTBIT_S16_LE, |
| @@ -276,24 +281,27 @@ static int snd_em28xx_capture_open(struct snd_pcm_substream *substream) | |||
| 276 | return -ENODEV; | 281 | return -ENODEV; |
| 277 | } | 282 | } |
| 278 | 283 | ||
| 279 | /* Sets volume, mute, etc */ | 284 | runtime->hw = snd_em28xx_hw_capture; |
| 285 | if ((dev->alt == 0 || dev->audio_ifnum) && dev->adev.users == 0) { | ||
| 286 | if (dev->audio_ifnum) | ||
| 287 | dev->alt = 1; | ||
| 288 | else | ||
| 289 | dev->alt = 7; | ||
| 280 | 290 | ||
| 281 | dev->mute = 0; | 291 | dprintk("changing alternate number on interface %d to %d\n", |
| 282 | mutex_lock(&dev->lock); | 292 | dev->audio_ifnum, dev->alt); |
| 283 | ret = em28xx_audio_analog_set(dev); | 293 | usb_set_interface(dev->udev, dev->audio_ifnum, dev->alt); |
| 284 | if (ret < 0) | ||
| 285 | goto err; | ||
| 286 | 294 | ||
| 287 | runtime->hw = snd_em28xx_hw_capture; | 295 | /* Sets volume, mute, etc */ |
| 288 | if (dev->alt == 0 && dev->adev.users == 0) { | 296 | dev->mute = 0; |
| 289 | int errCode; | 297 | mutex_lock(&dev->lock); |
| 290 | dev->alt = 7; | 298 | ret = em28xx_audio_analog_set(dev); |
| 291 | dprintk("changing alternate number to 7\n"); | 299 | if (ret < 0) |
| 292 | errCode = usb_set_interface(dev->udev, 0, 7); | 300 | goto err; |
| 293 | } | ||
| 294 | 301 | ||
| 295 | dev->adev.users++; | 302 | dev->adev.users++; |
| 296 | mutex_unlock(&dev->lock); | 303 | mutex_unlock(&dev->lock); |
| 304 | } | ||
| 297 | 305 | ||
| 298 | snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS); | 306 | snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS); |
| 299 | dev->adev.capture_pcm_substream = substream; | 307 | dev->adev.capture_pcm_substream = substream; |
| @@ -342,6 +350,8 @@ static int snd_em28xx_hw_capture_params(struct snd_pcm_substream *substream, | |||
| 342 | 350 | ||
| 343 | ret = snd_pcm_alloc_vmalloc_buffer(substream, | 351 | ret = snd_pcm_alloc_vmalloc_buffer(substream, |
| 344 | params_buffer_bytes(hw_params)); | 352 | params_buffer_bytes(hw_params)); |
| 353 | if (ret < 0) | ||
| 354 | return ret; | ||
| 345 | format = params_format(hw_params); | 355 | format = params_format(hw_params); |
| 346 | rate = params_rate(hw_params); | 356 | rate = params_rate(hw_params); |
| 347 | channels = params_channels(hw_params); | 357 | channels = params_channels(hw_params); |
| @@ -393,20 +403,24 @@ static int snd_em28xx_capture_trigger(struct snd_pcm_substream *substream, | |||
| 393 | int cmd) | 403 | int cmd) |
| 394 | { | 404 | { |
| 395 | struct em28xx *dev = snd_pcm_substream_chip(substream); | 405 | struct em28xx *dev = snd_pcm_substream_chip(substream); |
| 396 | int retval; | 406 | int retval = 0; |
| 397 | 407 | ||
| 398 | switch (cmd) { | 408 | switch (cmd) { |
| 409 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */ | ||
| 410 | case SNDRV_PCM_TRIGGER_RESUME: /* fall through */ | ||
| 399 | case SNDRV_PCM_TRIGGER_START: | 411 | case SNDRV_PCM_TRIGGER_START: |
| 400 | atomic_set(&dev->stream_started, 1); | 412 | atomic_set(&dev->stream_started, 1); |
| 401 | break; | 413 | break; |
| 414 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */ | ||
| 415 | case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */ | ||
| 402 | case SNDRV_PCM_TRIGGER_STOP: | 416 | case SNDRV_PCM_TRIGGER_STOP: |
| 403 | atomic_set(&dev->stream_started, 1); | 417 | atomic_set(&dev->stream_started, 0); |
| 404 | break; | 418 | break; |
| 405 | default: | 419 | default: |
| 406 | retval = -EINVAL; | 420 | retval = -EINVAL; |
| 407 | } | 421 | } |
| 408 | schedule_work(&dev->wq_trigger); | 422 | schedule_work(&dev->wq_trigger); |
| 409 | return 0; | 423 | return retval; |
| 410 | } | 424 | } |
| 411 | 425 | ||
| 412 | static snd_pcm_uframes_t snd_em28xx_capture_pointer(struct snd_pcm_substream | 426 | static snd_pcm_uframes_t snd_em28xx_capture_pointer(struct snd_pcm_substream |
| @@ -432,6 +446,179 @@ static struct page *snd_pcm_get_vmalloc_page(struct snd_pcm_substream *subs, | |||
| 432 | return vmalloc_to_page(pageptr); | 446 | return vmalloc_to_page(pageptr); |
| 433 | } | 447 | } |
| 434 | 448 | ||
| 449 | /* | ||
| 450 | * AC97 volume control support | ||
| 451 | */ | ||
| 452 | static int em28xx_vol_info(struct snd_kcontrol *kcontrol, | ||
| 453 | struct snd_ctl_elem_info *info) | ||
| 454 | { | ||
| 455 | info->type = SNDRV_CTL_ELEM_TYPE_INTEGER; | ||
| 456 | info->count = 2; | ||
| 457 | info->value.integer.min = 0; | ||
| 458 | info->value.integer.max = 0x1f; | ||
| 459 | |||
| 460 | return 0; | ||
| 461 | } | ||
| 462 | |||
| 463 | static int em28xx_vol_put(struct snd_kcontrol *kcontrol, | ||
| 464 | struct snd_ctl_elem_value *value) | ||
| 465 | { | ||
| 466 | struct em28xx *dev = snd_kcontrol_chip(kcontrol); | ||
| 467 | u16 val = (0x1f - (value->value.integer.value[0] & 0x1f)) | | ||
| 468 | (0x1f - (value->value.integer.value[1] & 0x1f)) << 8; | ||
| 469 | int rc; | ||
| 470 | |||
| 471 | mutex_lock(&dev->lock); | ||
| 472 | rc = em28xx_read_ac97(dev, kcontrol->private_value); | ||
| 473 | if (rc < 0) | ||
| 474 | goto err; | ||
| 475 | |||
| 476 | val |= rc & 0x8000; /* Preserve the mute flag */ | ||
| 477 | |||
| 478 | rc = em28xx_write_ac97(dev, kcontrol->private_value, val); | ||
| 479 | if (rc < 0) | ||
| 480 | goto err; | ||
| 481 | |||
| 482 | dprintk("%sleft vol %d, right vol %d (0x%04x) to ac97 volume control 0x%04x\n", | ||
| 483 | (val & 0x8000) ? "muted " : "", | ||
| 484 | 0x1f - ((val >> 8) & 0x1f), 0x1f - (val & 0x1f), | ||
| 485 | val, (int)kcontrol->private_value); | ||
| 486 | |||
| 487 | err: | ||
| 488 | mutex_unlock(&dev->lock); | ||
| 489 | return rc; | ||
| 490 | } | ||
| 491 | |||
| 492 | static int em28xx_vol_get(struct snd_kcontrol *kcontrol, | ||
| 493 | struct snd_ctl_elem_value *value) | ||
| 494 | { | ||
| 495 | struct em28xx *dev = snd_kcontrol_chip(kcontrol); | ||
| 496 | int val; | ||
| 497 | |||
| 498 | mutex_lock(&dev->lock); | ||
| 499 | val = em28xx_read_ac97(dev, kcontrol->private_value); | ||
| 500 | mutex_unlock(&dev->lock); | ||
| 501 | if (val < 0) | ||
| 502 | return val; | ||
| 503 | |||
| 504 | dprintk("%sleft vol %d, right vol %d (0x%04x) from ac97 volume control 0x%04x\n", | ||
| 505 | (val & 0x8000) ? "muted " : "", | ||
| 506 | 0x1f - ((val >> 8) & 0x1f), 0x1f - (val & 0x1f), | ||
| 507 | val, (int)kcontrol->private_value); | ||
| 508 | |||
| 509 | value->value.integer.value[0] = 0x1f - (val & 0x1f); | ||
| 510 | value->value.integer.value[1] = 0x1f - ((val << 8) & 0x1f); | ||
| 511 | |||
| 512 | return 0; | ||
| 513 | } | ||
| 514 | |||
| 515 | static int em28xx_vol_put_mute(struct snd_kcontrol *kcontrol, | ||
| 516 | struct snd_ctl_elem_value *value) | ||
| 517 | { | ||
| 518 | struct em28xx *dev = snd_kcontrol_chip(kcontrol); | ||
| 519 | u16 val = value->value.integer.value[0]; | ||
| 520 | int rc; | ||
| 521 | |||
| 522 | mutex_lock(&dev->lock); | ||
| 523 | rc = em28xx_read_ac97(dev, kcontrol->private_value); | ||
| 524 | if (rc < 0) | ||
| 525 | goto err; | ||
| 526 | |||
| 527 | if (val) | ||
| 528 | rc &= 0x1f1f; | ||
| 529 | else | ||
| 530 | rc |= 0x8000; | ||
| 531 | |||
| 532 | rc = em28xx_write_ac97(dev, kcontrol->private_value, rc); | ||
| 533 | if (rc < 0) | ||
| 534 | goto err; | ||
| 535 | |||
| 536 | dprintk("%sleft vol %d, right vol %d (0x%04x) to ac97 volume control 0x%04x\n", | ||
| 537 | (val & 0x8000) ? "muted " : "", | ||
| 538 | 0x1f - ((val >> 8) & 0x1f), 0x1f - (val & 0x1f), | ||
| 539 | val, (int)kcontrol->private_value); | ||
| 540 | |||
| 541 | err: | ||
| 542 | mutex_unlock(&dev->lock); | ||
| 543 | return rc; | ||
| 544 | } | ||
| 545 | |||
| 546 | static int em28xx_vol_get_mute(struct snd_kcontrol *kcontrol, | ||
| 547 | struct snd_ctl_elem_value *value) | ||
| 548 | { | ||
| 549 | struct em28xx *dev = snd_kcontrol_chip(kcontrol); | ||
| 550 | int val; | ||
| 551 | |||
| 552 | mutex_lock(&dev->lock); | ||
| 553 | val = em28xx_read_ac97(dev, kcontrol->private_value); | ||
| 554 | mutex_unlock(&dev->lock); | ||
| 555 | if (val < 0) | ||
| 556 | return val; | ||
| 557 | |||
| 558 | if (val & 0x8000) | ||
| 559 | value->value.integer.value[0] = 0; | ||
| 560 | else | ||
| 561 | value->value.integer.value[0] = 1; | ||
| 562 | |||
| 563 | dprintk("%sleft vol %d, right vol %d (0x%04x) from ac97 volume control 0x%04x\n", | ||
| 564 | (val & 0x8000) ? "muted " : "", | ||
| 565 | 0x1f - ((val >> 8) & 0x1f), 0x1f - (val & 0x1f), | ||
| 566 | val, (int)kcontrol->private_value); | ||
| 567 | |||
| 568 | return 0; | ||
| 569 | } | ||
| 570 | |||
| 571 | static const DECLARE_TLV_DB_SCALE(em28xx_db_scale, -3450, 150, 0); | ||
| 572 | |||
| 573 | static int em28xx_cvol_new(struct snd_card *card, struct em28xx *dev, | ||
| 574 | char *name, int id) | ||
| 575 | { | ||
| 576 | int err; | ||
| 577 | char ctl_name[44]; | ||
| 578 | struct snd_kcontrol *kctl; | ||
| 579 | struct snd_kcontrol_new tmp; | ||
| 580 | |||
| 581 | memset (&tmp, 0, sizeof(tmp)); | ||
| 582 | tmp.iface = SNDRV_CTL_ELEM_IFACE_MIXER, | ||
| 583 | tmp.private_value = id, | ||
| 584 | tmp.name = ctl_name, | ||
| 585 | |||
| 586 | /* Add Mute Control */ | ||
| 587 | sprintf(ctl_name, "%s Switch", name); | ||
| 588 | tmp.get = em28xx_vol_get_mute; | ||
| 589 | tmp.put = em28xx_vol_put_mute; | ||
| 590 | tmp.info = snd_ctl_boolean_mono_info; | ||
| 591 | kctl = snd_ctl_new1(&tmp, dev); | ||
| 592 | err = snd_ctl_add(card, kctl); | ||
| 593 | if (err < 0) | ||
| 594 | return err; | ||
| 595 | dprintk("Added control %s for ac97 volume control 0x%04x\n", | ||
| 596 | ctl_name, id); | ||
| 597 | |||
| 598 | memset (&tmp, 0, sizeof(tmp)); | ||
| 599 | tmp.iface = SNDRV_CTL_ELEM_IFACE_MIXER, | ||
| 600 | tmp.private_value = id, | ||
| 601 | tmp.name = ctl_name, | ||
| 602 | |||
| 603 | /* Add Volume Control */ | ||
| 604 | sprintf(ctl_name, "%s Volume", name); | ||
| 605 | tmp.get = em28xx_vol_get; | ||
| 606 | tmp.put = em28xx_vol_put; | ||
| 607 | tmp.info = em28xx_vol_info; | ||
| 608 | tmp.tlv.p = em28xx_db_scale, | ||
| 609 | kctl = snd_ctl_new1(&tmp, dev); | ||
| 610 | err = snd_ctl_add(card, kctl); | ||
| 611 | if (err < 0) | ||
| 612 | return err; | ||
| 613 | dprintk("Added control %s for ac97 volume control 0x%04x\n", | ||
| 614 | ctl_name, id); | ||
| 615 | |||
| 616 | return 0; | ||
| 617 | } | ||
| 618 | |||
| 619 | /* | ||
| 620 | * register/unregister code and data | ||
| 621 | */ | ||
| 435 | static struct snd_pcm_ops snd_em28xx_pcm_capture = { | 622 | static struct snd_pcm_ops snd_em28xx_pcm_capture = { |
| 436 | .open = snd_em28xx_capture_open, | 623 | .open = snd_em28xx_capture_open, |
| 437 | .close = snd_em28xx_pcm_close, | 624 | .close = snd_em28xx_pcm_close, |
| @@ -452,17 +639,17 @@ static int em28xx_audio_init(struct em28xx *dev) | |||
| 452 | static int devnr; | 639 | static int devnr; |
| 453 | int err; | 640 | int err; |
| 454 | 641 | ||
| 455 | if (dev->has_alsa_audio != 1) { | 642 | if (!dev->has_alsa_audio || dev->audio_ifnum < 0) { |
| 456 | /* This device does not support the extension (in this case | 643 | /* This device does not support the extension (in this case |
| 457 | the device is expecting the snd-usb-audio module or | 644 | the device is expecting the snd-usb-audio module or |
| 458 | doesn't have analog audio support at all) */ | 645 | doesn't have analog audio support at all) */ |
| 459 | return 0; | 646 | return 0; |
| 460 | } | 647 | } |
| 461 | 648 | ||
| 462 | printk(KERN_INFO "em28xx-audio.c: probing for em28x1 " | 649 | printk(KERN_INFO "em28xx-audio.c: probing for em28xx Audio Vendor Class\n"); |
| 463 | "non standard usbaudio\n"); | ||
| 464 | printk(KERN_INFO "em28xx-audio.c: Copyright (C) 2006 Markus " | 650 | printk(KERN_INFO "em28xx-audio.c: Copyright (C) 2006 Markus " |
| 465 | "Rechberger\n"); | 651 | "Rechberger\n"); |
| 652 | printk(KERN_INFO "em28xx-audio.c: Copyright (C) 2007-2011 Mauro Carvalho Chehab\n"); | ||
| 466 | 653 | ||
| 467 | err = snd_card_create(index[devnr], "Em28xx Audio", THIS_MODULE, 0, | 654 | err = snd_card_create(index[devnr], "Em28xx Audio", THIS_MODULE, 0, |
| 468 | &card); | 655 | &card); |
| @@ -488,6 +675,22 @@ static int em28xx_audio_init(struct em28xx *dev) | |||
| 488 | 675 | ||
| 489 | INIT_WORK(&dev->wq_trigger, audio_trigger); | 676 | INIT_WORK(&dev->wq_trigger, audio_trigger); |
| 490 | 677 | ||
| 678 | if (dev->audio_mode.ac97 != EM28XX_NO_AC97) { | ||
| 679 | em28xx_cvol_new(card, dev, "Video", AC97_VIDEO_VOL); | ||
| 680 | em28xx_cvol_new(card, dev, "Line In", AC97_LINEIN_VOL); | ||
| 681 | em28xx_cvol_new(card, dev, "Phone", AC97_PHONE_VOL); | ||
| 682 | em28xx_cvol_new(card, dev, "Microphone", AC97_PHONE_VOL); | ||
| 683 | em28xx_cvol_new(card, dev, "CD", AC97_CD_VOL); | ||
| 684 | em28xx_cvol_new(card, dev, "AUX", AC97_AUX_VOL); | ||
| 685 | em28xx_cvol_new(card, dev, "PCM", AC97_PCM_OUT_VOL); | ||
| 686 | |||
| 687 | em28xx_cvol_new(card, dev, "Master", AC97_MASTER_VOL); | ||
| 688 | em28xx_cvol_new(card, dev, "Line", AC97_LINE_LEVEL_VOL); | ||
| 689 | em28xx_cvol_new(card, dev, "Mono", AC97_MASTER_MONO_VOL); | ||
| 690 | em28xx_cvol_new(card, dev, "LFE", AC97_LFE_MASTER_VOL); | ||
| 691 | em28xx_cvol_new(card, dev, "Surround", AC97_SURR_MASTER_VOL); | ||
| 692 | } | ||
| 693 | |||
| 491 | err = snd_card_register(card); | 694 | err = snd_card_register(card); |
| 492 | if (err < 0) { | 695 | if (err < 0) { |
| 493 | snd_card_free(card); | 696 | snd_card_free(card); |
| @@ -538,7 +741,7 @@ static void __exit em28xx_alsa_unregister(void) | |||
| 538 | 741 | ||
| 539 | MODULE_LICENSE("GPL"); | 742 | MODULE_LICENSE("GPL"); |
| 540 | MODULE_AUTHOR("Markus Rechberger <mrechberger@gmail.com>"); | 743 | MODULE_AUTHOR("Markus Rechberger <mrechberger@gmail.com>"); |
| 541 | MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@infradead.org>"); | 744 | MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>"); |
| 542 | MODULE_DESCRIPTION("Em28xx Audio driver"); | 745 | MODULE_DESCRIPTION("Em28xx Audio driver"); |
| 543 | 746 | ||
| 544 | module_init(em28xx_alsa_register); | 747 | module_init(em28xx_alsa_register); |
diff --git a/drivers/media/video/em28xx/em28xx-cards.c b/drivers/media/video/em28xx/em28xx-cards.c index 4e37375decf5..3e3959fee419 100644 --- a/drivers/media/video/em28xx/em28xx-cards.c +++ b/drivers/media/video/em28xx/em28xx-cards.c | |||
| @@ -289,7 +289,7 @@ static struct em28xx_reg_seq leadership_reset[] = { | |||
| 289 | { -1, -1, -1, -1}, | 289 | { -1, -1, -1, -1}, |
| 290 | }; | 290 | }; |
| 291 | 291 | ||
| 292 | /* 2013:024f PCTV Systems nanoStick T2 290e | 292 | /* 2013:024f PCTV nanoStick T2 290e |
| 293 | * GPIO_6 - demod reset | 293 | * GPIO_6 - demod reset |
| 294 | * GPIO_7 - LED | 294 | * GPIO_7 - LED |
| 295 | */ | 295 | */ |
| @@ -300,6 +300,23 @@ static struct em28xx_reg_seq pctv_290e[] = { | |||
| 300 | {-1, -1, -1, -1}, | 300 | {-1, -1, -1, -1}, |
| 301 | }; | 301 | }; |
| 302 | 302 | ||
| 303 | #if 0 | ||
| 304 | static struct em28xx_reg_seq terratec_h5_gpio[] = { | ||
| 305 | {EM28XX_R08_GPIO, 0xff, 0xff, 10}, | ||
| 306 | {EM2874_R80_GPIO, 0xf6, 0xff, 100}, | ||
| 307 | {EM2874_R80_GPIO, 0xf2, 0xff, 50}, | ||
| 308 | {EM2874_R80_GPIO, 0xf6, 0xff, 50}, | ||
| 309 | { -1, -1, -1, -1}, | ||
| 310 | }; | ||
| 311 | |||
| 312 | static struct em28xx_reg_seq terratec_h5_digital[] = { | ||
| 313 | {EM2874_R80_GPIO, 0xf6, 0xff, 10}, | ||
| 314 | {EM2874_R80_GPIO, 0xe6, 0xff, 100}, | ||
| 315 | {EM2874_R80_GPIO, 0xa6, 0xff, 10}, | ||
| 316 | { -1, -1, -1, -1}, | ||
| 317 | }; | ||
| 318 | #endif | ||
| 319 | |||
| 303 | /* | 320 | /* |
| 304 | * Board definitions | 321 | * Board definitions |
| 305 | */ | 322 | */ |
| @@ -843,6 +860,19 @@ struct em28xx_board em28xx_boards[] = { | |||
| 843 | .gpio = terratec_cinergy_USB_XS_FR_analog, | 860 | .gpio = terratec_cinergy_USB_XS_FR_analog, |
| 844 | } }, | 861 | } }, |
| 845 | }, | 862 | }, |
| 863 | [EM2884_BOARD_TERRATEC_H5] = { | ||
| 864 | .name = "Terratec Cinergy H5", | ||
| 865 | .has_dvb = 1, | ||
| 866 | #if 0 | ||
| 867 | .tuner_type = TUNER_PHILIPS_TDA8290, | ||
| 868 | .tuner_addr = 0x41, | ||
| 869 | .dvb_gpio = terratec_h5_digital, /* FIXME: probably wrong */ | ||
| 870 | .tuner_gpio = terratec_h5_gpio, | ||
| 871 | #endif | ||
| 872 | .i2c_speed = EM2874_I2C_SECONDARY_BUS_SELECT | | ||
| 873 | EM28XX_I2C_CLK_WAIT_ENABLE | | ||
| 874 | EM28XX_I2C_FREQ_400_KHZ, | ||
| 875 | }, | ||
| 846 | [EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900] = { | 876 | [EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900] = { |
| 847 | .name = "Hauppauge WinTV HVR 900", | 877 | .name = "Hauppauge WinTV HVR 900", |
| 848 | .tda9887_conf = TDA9887_PRESENT, | 878 | .tda9887_conf = TDA9887_PRESENT, |
| @@ -1259,7 +1289,7 @@ struct em28xx_board em28xx_boards[] = { | |||
| 1259 | } }, | 1289 | } }, |
| 1260 | }, | 1290 | }, |
| 1261 | 1291 | ||
| 1262 | [EM2874_LEADERSHIP_ISDBT] = { | 1292 | [EM2874_BOARD_LEADERSHIP_ISDBT] = { |
| 1263 | .i2c_speed = EM2874_I2C_SECONDARY_BUS_SELECT | | 1293 | .i2c_speed = EM2874_I2C_SECONDARY_BUS_SELECT | |
| 1264 | EM28XX_I2C_CLK_WAIT_ENABLE | | 1294 | EM28XX_I2C_CLK_WAIT_ENABLE | |
| 1265 | EM28XX_I2C_FREQ_100_KHZ, | 1295 | EM28XX_I2C_FREQ_100_KHZ, |
| @@ -1319,7 +1349,6 @@ struct em28xx_board em28xx_boards[] = { | |||
| 1319 | }, | 1349 | }, |
| 1320 | [EM2880_BOARD_KWORLD_DVB_305U] = { | 1350 | [EM2880_BOARD_KWORLD_DVB_305U] = { |
| 1321 | .name = "KWorld DVB-T 305U", | 1351 | .name = "KWorld DVB-T 305U", |
| 1322 | .valid = EM28XX_BOARD_NOT_VALIDATED, | ||
| 1323 | .tuner_type = TUNER_XC2028, | 1352 | .tuner_type = TUNER_XC2028, |
| 1324 | .tuner_gpio = default_tuner_gpio, | 1353 | .tuner_gpio = default_tuner_gpio, |
| 1325 | .decoder = EM28XX_TVP5150, | 1354 | .decoder = EM28XX_TVP5150, |
| @@ -1770,16 +1799,16 @@ struct em28xx_board em28xx_boards[] = { | |||
| 1770 | .dvb_gpio = kworld_a340_digital, | 1799 | .dvb_gpio = kworld_a340_digital, |
| 1771 | .tuner_gpio = default_tuner_gpio, | 1800 | .tuner_gpio = default_tuner_gpio, |
| 1772 | }, | 1801 | }, |
| 1773 | /* 2013:024f PCTV Systems nanoStick T2 290e. | 1802 | /* 2013:024f PCTV nanoStick T2 290e. |
| 1774 | * Empia EM28174, Sony CXD2820R and NXP TDA18271HD/C2 */ | 1803 | * Empia EM28174, Sony CXD2820R and NXP TDA18271HD/C2 */ |
| 1775 | [EM28174_BOARD_PCTV_290E] = { | 1804 | [EM28174_BOARD_PCTV_290E] = { |
| 1805 | .name = "PCTV nanoStick T2 290e", | ||
| 1776 | .i2c_speed = EM2874_I2C_SECONDARY_BUS_SELECT | | 1806 | .i2c_speed = EM2874_I2C_SECONDARY_BUS_SELECT | |
| 1777 | EM28XX_I2C_CLK_WAIT_ENABLE | EM28XX_I2C_FREQ_100_KHZ, | 1807 | EM28XX_I2C_CLK_WAIT_ENABLE | EM28XX_I2C_FREQ_100_KHZ, |
| 1778 | .xclk = EM28XX_XCLK_FREQUENCY_12MHZ, | ||
| 1779 | .name = "PCTV Systems nanoStick T2 290e", | ||
| 1780 | .tuner_type = TUNER_ABSENT, | 1808 | .tuner_type = TUNER_ABSENT, |
| 1781 | .tuner_gpio = pctv_290e, | 1809 | .tuner_gpio = pctv_290e, |
| 1782 | .has_dvb = 1, | 1810 | .has_dvb = 1, |
| 1811 | .ir_codes = RC_MAP_PINNACLE_PCTV_HD, | ||
| 1783 | }, | 1812 | }, |
| 1784 | }; | 1813 | }; |
| 1785 | const unsigned int em28xx_bcount = ARRAY_SIZE(em28xx_boards); | 1814 | const unsigned int em28xx_bcount = ARRAY_SIZE(em28xx_boards); |
| @@ -1855,8 +1884,10 @@ struct usb_device_id em28xx_id_table[] = { | |||
| 1855 | { USB_DEVICE(0x0ccd, 0x0042), | 1884 | { USB_DEVICE(0x0ccd, 0x0042), |
| 1856 | .driver_info = EM2882_BOARD_TERRATEC_HYBRID_XS }, | 1885 | .driver_info = EM2882_BOARD_TERRATEC_HYBRID_XS }, |
| 1857 | { USB_DEVICE(0x0ccd, 0x0043), | 1886 | { USB_DEVICE(0x0ccd, 0x0043), |
| 1858 | .driver_info = EM2870_BOARD_TERRATEC_XS }, | 1887 | .driver_info = EM2884_BOARD_TERRATEC_H5 }, |
| 1859 | { USB_DEVICE(0x0ccd, 0x0047), | 1888 | { USB_DEVICE(0x0ccd, 0x10a2), /* Rev. 1 */ |
| 1889 | .driver_info = EM2884_BOARD_TERRATEC_H5 }, | ||
| 1890 | { USB_DEVICE(0x0ccd, 0x10ad), /* Rev. 2 */ | ||
| 1860 | .driver_info = EM2880_BOARD_TERRATEC_PRODIGY_XS }, | 1891 | .driver_info = EM2880_BOARD_TERRATEC_PRODIGY_XS }, |
| 1861 | { USB_DEVICE(0x0ccd, 0x0084), | 1892 | { USB_DEVICE(0x0ccd, 0x0084), |
| 1862 | .driver_info = EM2860_BOARD_TERRATEC_AV350 }, | 1893 | .driver_info = EM2860_BOARD_TERRATEC_AV350 }, |
| @@ -1937,7 +1968,7 @@ static struct em28xx_hash_table em28xx_i2c_hash[] = { | |||
| 1937 | {0x77800080, EM2860_BOARD_TVP5150_REFERENCE_DESIGN, TUNER_ABSENT}, | 1968 | {0x77800080, EM2860_BOARD_TVP5150_REFERENCE_DESIGN, TUNER_ABSENT}, |
| 1938 | {0xc51200e3, EM2820_BOARD_GADMEI_TVR200, TUNER_LG_PAL_NEW_TAPC}, | 1969 | {0xc51200e3, EM2820_BOARD_GADMEI_TVR200, TUNER_LG_PAL_NEW_TAPC}, |
| 1939 | {0x4ba50080, EM2861_BOARD_GADMEI_UTV330PLUS, TUNER_TNF_5335MF}, | 1970 | {0x4ba50080, EM2861_BOARD_GADMEI_UTV330PLUS, TUNER_TNF_5335MF}, |
| 1940 | {0x6b800080, EM2874_LEADERSHIP_ISDBT, TUNER_ABSENT}, | 1971 | {0x6b800080, EM2874_BOARD_LEADERSHIP_ISDBT, TUNER_ABSENT}, |
| 1941 | }; | 1972 | }; |
| 1942 | 1973 | ||
| 1943 | /* I2C possible address to saa7115, tvp5150, msp3400, tvaudio */ | 1974 | /* I2C possible address to saa7115, tvp5150, msp3400, tvaudio */ |
| @@ -2660,10 +2691,9 @@ void em28xx_card_setup(struct em28xx *dev) | |||
| 2660 | .addr = 0xba >> 1, | 2691 | .addr = 0xba >> 1, |
| 2661 | .platform_data = &pdata, | 2692 | .platform_data = &pdata, |
| 2662 | }; | 2693 | }; |
| 2663 | struct v4l2_subdev *sd; | ||
| 2664 | 2694 | ||
| 2665 | pdata.xtal = dev->sensor_xtal; | 2695 | pdata.xtal = dev->sensor_xtal; |
| 2666 | sd = v4l2_i2c_new_subdev_board(&dev->v4l2_dev, &dev->i2c_adap, | 2696 | v4l2_i2c_new_subdev_board(&dev->v4l2_dev, &dev->i2c_adap, |
| 2667 | &mt9v011_info, NULL); | 2697 | &mt9v011_info, NULL); |
| 2668 | } | 2698 | } |
| 2669 | 2699 | ||
| @@ -2842,11 +2872,26 @@ static int em28xx_init_dev(struct em28xx **devhandle, struct usb_device *udev, | |||
| 2842 | em28xx_info("chip ID is em2882/em2883\n"); | 2872 | em28xx_info("chip ID is em2882/em2883\n"); |
| 2843 | dev->wait_after_write = 0; | 2873 | dev->wait_after_write = 0; |
| 2844 | break; | 2874 | break; |
| 2875 | case CHIP_ID_EM2884: | ||
| 2876 | em28xx_info("chip ID is em2884\n"); | ||
| 2877 | dev->reg_gpio_num = EM2874_R80_GPIO; | ||
| 2878 | dev->wait_after_write = 0; | ||
| 2879 | break; | ||
| 2845 | default: | 2880 | default: |
| 2846 | em28xx_info("em28xx chip ID = %d\n", dev->chip_id); | 2881 | em28xx_info("em28xx chip ID = %d\n", dev->chip_id); |
| 2847 | } | 2882 | } |
| 2848 | } | 2883 | } |
| 2849 | 2884 | ||
| 2885 | if (dev->is_audio_only) { | ||
| 2886 | errCode = em28xx_audio_setup(dev); | ||
| 2887 | if (errCode) | ||
| 2888 | return -ENODEV; | ||
| 2889 | em28xx_add_into_devlist(dev); | ||
| 2890 | em28xx_init_extension(dev); | ||
| 2891 | |||
| 2892 | return 0; | ||
| 2893 | } | ||
| 2894 | |||
| 2850 | /* Prepopulate cached GPO register content */ | 2895 | /* Prepopulate cached GPO register content */ |
| 2851 | retval = em28xx_read_reg(dev, dev->reg_gpo_num); | 2896 | retval = em28xx_read_reg(dev, dev->reg_gpo_num); |
| 2852 | if (retval >= 0) | 2897 | if (retval >= 0) |
| @@ -2947,6 +2992,9 @@ fail_reg_devices: | |||
| 2947 | return retval; | 2992 | return retval; |
| 2948 | } | 2993 | } |
| 2949 | 2994 | ||
| 2995 | /* high bandwidth multiplier, as encoded in highspeed endpoint descriptors */ | ||
| 2996 | #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03)) | ||
| 2997 | |||
| 2950 | /* | 2998 | /* |
| 2951 | * em28xx_usb_probe() | 2999 | * em28xx_usb_probe() |
| 2952 | * checks for supported devices | 3000 | * checks for supported devices |
| @@ -2956,15 +3004,15 @@ static int em28xx_usb_probe(struct usb_interface *interface, | |||
| 2956 | { | 3004 | { |
| 2957 | const struct usb_endpoint_descriptor *endpoint; | 3005 | const struct usb_endpoint_descriptor *endpoint; |
| 2958 | struct usb_device *udev; | 3006 | struct usb_device *udev; |
| 2959 | struct usb_interface *uif; | ||
| 2960 | struct em28xx *dev = NULL; | 3007 | struct em28xx *dev = NULL; |
| 2961 | int retval; | 3008 | int retval; |
| 2962 | int i, nr, ifnum, isoc_pipe; | 3009 | bool is_audio_only = false, has_audio = false; |
| 3010 | int i, nr, isoc_pipe; | ||
| 3011 | const int ifnum = interface->altsetting[0].desc.bInterfaceNumber; | ||
| 2963 | char *speed; | 3012 | char *speed; |
| 2964 | char descr[255] = ""; | 3013 | char descr[255] = ""; |
| 2965 | 3014 | ||
| 2966 | udev = usb_get_dev(interface_to_usbdev(interface)); | 3015 | udev = usb_get_dev(interface_to_usbdev(interface)); |
| 2967 | ifnum = interface->altsetting[0].desc.bInterfaceNumber; | ||
| 2968 | 3016 | ||
| 2969 | /* Check to see next free device and mark as used */ | 3017 | /* Check to see next free device and mark as used */ |
| 2970 | nr = find_first_zero_bit(&em28xx_devused, EM28XX_MAXBOARDS); | 3018 | nr = find_first_zero_bit(&em28xx_devused, EM28XX_MAXBOARDS); |
| @@ -2984,6 +3032,19 @@ static int em28xx_usb_probe(struct usb_interface *interface, | |||
| 2984 | goto err; | 3032 | goto err; |
| 2985 | } | 3033 | } |
| 2986 | 3034 | ||
| 3035 | /* Get endpoints */ | ||
| 3036 | for (i = 0; i < interface->num_altsetting; i++) { | ||
| 3037 | int ep; | ||
| 3038 | |||
| 3039 | for (ep = 0; ep < interface->altsetting[i].desc.bNumEndpoints; ep++) { | ||
| 3040 | struct usb_host_endpoint *e; | ||
| 3041 | e = &interface->altsetting[i].endpoint[ep]; | ||
| 3042 | |||
| 3043 | if (e->desc.bEndpointAddress == 0x83) | ||
| 3044 | has_audio = true; | ||
| 3045 | } | ||
| 3046 | } | ||
| 3047 | |||
| 2987 | endpoint = &interface->cur_altsetting->endpoint[0].desc; | 3048 | endpoint = &interface->cur_altsetting->endpoint[0].desc; |
| 2988 | 3049 | ||
| 2989 | /* check if the device has the iso in endpoint at the correct place */ | 3050 | /* check if the device has the iso in endpoint at the correct place */ |
| @@ -3003,19 +3064,22 @@ static int em28xx_usb_probe(struct usb_interface *interface, | |||
| 3003 | check_interface = 0; | 3064 | check_interface = 0; |
| 3004 | 3065 | ||
| 3005 | if (!check_interface) { | 3066 | if (!check_interface) { |
| 3006 | em28xx_err(DRIVER_NAME " video device (%04x:%04x): " | 3067 | if (has_audio) { |
| 3007 | "interface %i, class %i found.\n", | 3068 | is_audio_only = true; |
| 3008 | le16_to_cpu(udev->descriptor.idVendor), | 3069 | } else { |
| 3009 | le16_to_cpu(udev->descriptor.idProduct), | 3070 | em28xx_err(DRIVER_NAME " video device (%04x:%04x): " |
| 3010 | ifnum, | 3071 | "interface %i, class %i found.\n", |
| 3011 | interface->altsetting[0].desc.bInterfaceClass); | 3072 | le16_to_cpu(udev->descriptor.idVendor), |
| 3012 | 3073 | le16_to_cpu(udev->descriptor.idProduct), | |
| 3013 | em28xx_err(DRIVER_NAME " This is an anciliary " | 3074 | ifnum, |
| 3014 | "interface not used by the driver\n"); | 3075 | interface->altsetting[0].desc.bInterfaceClass); |
| 3015 | 3076 | em28xx_err(DRIVER_NAME " This is an anciliary " | |
| 3016 | em28xx_devused &= ~(1<<nr); | 3077 | "interface not used by the driver\n"); |
| 3017 | retval = -ENODEV; | 3078 | |
| 3018 | goto err; | 3079 | em28xx_devused &= ~(1<<nr); |
| 3080 | retval = -ENODEV; | ||
| 3081 | goto err; | ||
| 3082 | } | ||
| 3019 | } | 3083 | } |
| 3020 | } | 3084 | } |
| 3021 | 3085 | ||
| @@ -3045,8 +3109,8 @@ static int em28xx_usb_probe(struct usb_interface *interface, | |||
| 3045 | if (*descr) | 3109 | if (*descr) |
| 3046 | strlcat(descr, " ", sizeof(descr)); | 3110 | strlcat(descr, " ", sizeof(descr)); |
| 3047 | 3111 | ||
| 3048 | printk(DRIVER_NAME ": New device %s@ %s Mbps " | 3112 | printk(KERN_INFO DRIVER_NAME |
| 3049 | "(%04x:%04x, interface %d, class %d)\n", | 3113 | ": New device %s@ %s Mbps (%04x:%04x, interface %d, class %d)\n", |
| 3050 | descr, | 3114 | descr, |
| 3051 | speed, | 3115 | speed, |
| 3052 | le16_to_cpu(udev->descriptor.idVendor), | 3116 | le16_to_cpu(udev->descriptor.idVendor), |
| @@ -3054,6 +3118,11 @@ static int em28xx_usb_probe(struct usb_interface *interface, | |||
| 3054 | ifnum, | 3118 | ifnum, |
| 3055 | interface->altsetting->desc.bInterfaceNumber); | 3119 | interface->altsetting->desc.bInterfaceNumber); |
| 3056 | 3120 | ||
| 3121 | if (has_audio) | ||
| 3122 | printk(KERN_INFO DRIVER_NAME | ||
| 3123 | ": Audio Vendor Class interface %i found\n", | ||
| 3124 | ifnum); | ||
| 3125 | |||
| 3057 | /* | 3126 | /* |
| 3058 | * Make sure we have 480 Mbps of bandwidth, otherwise things like | 3127 | * Make sure we have 480 Mbps of bandwidth, otherwise things like |
| 3059 | * video stream wouldn't likely work, since 12 Mbps is generally | 3128 | * video stream wouldn't likely work, since 12 Mbps is generally |
| @@ -3089,10 +3158,13 @@ static int em28xx_usb_probe(struct usb_interface *interface, | |||
| 3089 | dev->devno = nr; | 3158 | dev->devno = nr; |
| 3090 | dev->model = id->driver_info; | 3159 | dev->model = id->driver_info; |
| 3091 | dev->alt = -1; | 3160 | dev->alt = -1; |
| 3161 | dev->is_audio_only = is_audio_only; | ||
| 3162 | dev->has_alsa_audio = has_audio; | ||
| 3163 | dev->audio_ifnum = ifnum; | ||
| 3092 | 3164 | ||
| 3093 | /* Checks if audio is provided by some interface */ | 3165 | /* Checks if audio is provided by some interface */ |
| 3094 | for (i = 0; i < udev->config->desc.bNumInterfaces; i++) { | 3166 | for (i = 0; i < udev->config->desc.bNumInterfaces; i++) { |
| 3095 | uif = udev->config->interface[i]; | 3167 | struct usb_interface *uif = udev->config->interface[i]; |
| 3096 | if (uif->altsetting[0].desc.bInterfaceClass == USB_CLASS_AUDIO) { | 3168 | if (uif->altsetting[0].desc.bInterfaceClass == USB_CLASS_AUDIO) { |
| 3097 | dev->has_audio_class = 1; | 3169 | dev->has_audio_class = 1; |
| 3098 | break; | 3170 | break; |
| @@ -3100,9 +3172,7 @@ static int em28xx_usb_probe(struct usb_interface *interface, | |||
| 3100 | } | 3172 | } |
| 3101 | 3173 | ||
| 3102 | /* compute alternate max packet sizes */ | 3174 | /* compute alternate max packet sizes */ |
| 3103 | uif = udev->actconfig->interface[0]; | 3175 | dev->num_alt = interface->num_altsetting; |
| 3104 | |||
| 3105 | dev->num_alt = uif->num_altsetting; | ||
| 3106 | dev->alt_max_pkt_size = kmalloc(32 * dev->num_alt, GFP_KERNEL); | 3176 | dev->alt_max_pkt_size = kmalloc(32 * dev->num_alt, GFP_KERNEL); |
| 3107 | 3177 | ||
| 3108 | if (dev->alt_max_pkt_size == NULL) { | 3178 | if (dev->alt_max_pkt_size == NULL) { |
| @@ -3114,14 +3184,21 @@ static int em28xx_usb_probe(struct usb_interface *interface, | |||
| 3114 | } | 3184 | } |
| 3115 | 3185 | ||
| 3116 | for (i = 0; i < dev->num_alt ; i++) { | 3186 | for (i = 0; i < dev->num_alt ; i++) { |
| 3117 | u16 tmp = le16_to_cpu(uif->altsetting[i].endpoint[isoc_pipe].desc.wMaxPacketSize); | 3187 | u16 tmp = le16_to_cpu(interface->altsetting[i].endpoint[isoc_pipe].desc.wMaxPacketSize); |
| 3118 | dev->alt_max_pkt_size[i] = | 3188 | unsigned int size = tmp & 0x7ff; |
| 3119 | (tmp & 0x07ff) * (((tmp & 0x1800) >> 11) + 1); | 3189 | |
| 3190 | if (udev->speed == USB_SPEED_HIGH) | ||
| 3191 | size = size * hb_mult(tmp); | ||
| 3192 | |||
| 3193 | dev->alt_max_pkt_size[i] = size; | ||
| 3120 | } | 3194 | } |
| 3121 | 3195 | ||
| 3122 | if ((card[nr] >= 0) && (card[nr] < em28xx_bcount)) | 3196 | if ((card[nr] >= 0) && (card[nr] < em28xx_bcount)) |
| 3123 | dev->model = card[nr]; | 3197 | dev->model = card[nr]; |
| 3124 | 3198 | ||
| 3199 | /* save our data pointer in this interface device */ | ||
| 3200 | usb_set_intfdata(interface, dev); | ||
| 3201 | |||
| 3125 | /* allocate device struct */ | 3202 | /* allocate device struct */ |
| 3126 | mutex_init(&dev->lock); | 3203 | mutex_init(&dev->lock); |
| 3127 | mutex_lock(&dev->lock); | 3204 | mutex_lock(&dev->lock); |
| @@ -3133,9 +3210,6 @@ static int em28xx_usb_probe(struct usb_interface *interface, | |||
| 3133 | goto err; | 3210 | goto err; |
| 3134 | } | 3211 | } |
| 3135 | 3212 | ||
| 3136 | /* save our data pointer in this interface device */ | ||
| 3137 | usb_set_intfdata(interface, dev); | ||
| 3138 | |||
| 3139 | request_modules(dev); | 3213 | request_modules(dev); |
| 3140 | 3214 | ||
| 3141 | /* Should be the last thing to do, to avoid newer udev's to | 3215 | /* Should be the last thing to do, to avoid newer udev's to |
| @@ -3164,6 +3238,13 @@ static void em28xx_usb_disconnect(struct usb_interface *interface) | |||
| 3164 | if (!dev) | 3238 | if (!dev) |
| 3165 | return; | 3239 | return; |
| 3166 | 3240 | ||
| 3241 | if (dev->is_audio_only) { | ||
| 3242 | mutex_lock(&dev->lock); | ||
| 3243 | em28xx_close_extension(dev); | ||
| 3244 | mutex_unlock(&dev->lock); | ||
| 3245 | return; | ||
| 3246 | } | ||
| 3247 | |||
| 3167 | em28xx_info("disconnecting %s\n", dev->vdev->name); | 3248 | em28xx_info("disconnecting %s\n", dev->vdev->name); |
| 3168 | 3249 | ||
| 3169 | flush_request_modules(dev); | 3250 | flush_request_modules(dev); |
diff --git a/drivers/media/video/em28xx/em28xx-core.c b/drivers/media/video/em28xx/em28xx-core.c index e33f145d867a..57b1b5c6d885 100644 --- a/drivers/media/video/em28xx/em28xx-core.c +++ b/drivers/media/video/em28xx/em28xx-core.c | |||
| @@ -211,6 +211,7 @@ int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val) | |||
| 211 | { | 211 | { |
| 212 | return em28xx_write_regs(dev, reg, &val, 1); | 212 | return em28xx_write_regs(dev, reg, &val, 1); |
| 213 | } | 213 | } |
| 214 | EXPORT_SYMBOL_GPL(em28xx_write_reg); | ||
| 214 | 215 | ||
| 215 | /* | 216 | /* |
| 216 | * em28xx_write_reg_bits() | 217 | * em28xx_write_reg_bits() |
| @@ -286,6 +287,7 @@ int em28xx_read_ac97(struct em28xx *dev, u8 reg) | |||
| 286 | return ret; | 287 | return ret; |
| 287 | return le16_to_cpu(val); | 288 | return le16_to_cpu(val); |
| 288 | } | 289 | } |
| 290 | EXPORT_SYMBOL_GPL(em28xx_read_ac97); | ||
| 289 | 291 | ||
| 290 | /* | 292 | /* |
| 291 | * em28xx_write_ac97() | 293 | * em28xx_write_ac97() |
| @@ -313,13 +315,14 @@ int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val) | |||
| 313 | 315 | ||
| 314 | return 0; | 316 | return 0; |
| 315 | } | 317 | } |
| 318 | EXPORT_SYMBOL_GPL(em28xx_write_ac97); | ||
| 316 | 319 | ||
| 317 | struct em28xx_vol_table { | 320 | struct em28xx_vol_itable { |
| 318 | enum em28xx_amux mux; | 321 | enum em28xx_amux mux; |
| 319 | u8 reg; | 322 | u8 reg; |
| 320 | }; | 323 | }; |
| 321 | 324 | ||
| 322 | static struct em28xx_vol_table inputs[] = { | 325 | static struct em28xx_vol_itable inputs[] = { |
| 323 | { EM28XX_AMUX_VIDEO, AC97_VIDEO_VOL }, | 326 | { EM28XX_AMUX_VIDEO, AC97_VIDEO_VOL }, |
| 324 | { EM28XX_AMUX_LINE_IN, AC97_LINEIN_VOL }, | 327 | { EM28XX_AMUX_LINE_IN, AC97_LINEIN_VOL }, |
| 325 | { EM28XX_AMUX_PHONE, AC97_PHONE_VOL }, | 328 | { EM28XX_AMUX_PHONE, AC97_PHONE_VOL }, |
| @@ -403,7 +406,12 @@ static int em28xx_set_audio_source(struct em28xx *dev) | |||
| 403 | return ret; | 406 | return ret; |
| 404 | } | 407 | } |
| 405 | 408 | ||
| 406 | static const struct em28xx_vol_table outputs[] = { | 409 | struct em28xx_vol_otable { |
| 410 | enum em28xx_aout mux; | ||
| 411 | u8 reg; | ||
| 412 | }; | ||
| 413 | |||
| 414 | static const struct em28xx_vol_otable outputs[] = { | ||
| 407 | { EM28XX_AOUT_MASTER, AC97_MASTER_VOL }, | 415 | { EM28XX_AOUT_MASTER, AC97_MASTER_VOL }, |
| 408 | { EM28XX_AOUT_LINE, AC97_LINE_LEVEL_VOL }, | 416 | { EM28XX_AOUT_LINE, AC97_LINE_LEVEL_VOL }, |
| 409 | { EM28XX_AOUT_MONO, AC97_MASTER_MONO_VOL }, | 417 | { EM28XX_AOUT_MONO, AC97_MASTER_MONO_VOL }, |
| @@ -492,17 +500,13 @@ int em28xx_audio_setup(struct em28xx *dev) | |||
| 492 | if (dev->chip_id == CHIP_ID_EM2870 || dev->chip_id == CHIP_ID_EM2874 | 500 | if (dev->chip_id == CHIP_ID_EM2870 || dev->chip_id == CHIP_ID_EM2874 |
| 493 | || dev->chip_id == CHIP_ID_EM28174) { | 501 | || dev->chip_id == CHIP_ID_EM28174) { |
| 494 | /* Digital only device - don't load any alsa module */ | 502 | /* Digital only device - don't load any alsa module */ |
| 495 | dev->audio_mode.has_audio = 0; | 503 | dev->audio_mode.has_audio = false; |
| 496 | dev->has_audio_class = 0; | 504 | dev->has_audio_class = false; |
| 497 | dev->has_alsa_audio = 0; | 505 | dev->has_alsa_audio = false; |
| 498 | return 0; | 506 | return 0; |
| 499 | } | 507 | } |
| 500 | 508 | ||
| 501 | /* If device doesn't support Usb Audio Class, use vendor class */ | 509 | dev->audio_mode.has_audio = true; |
| 502 | if (!dev->has_audio_class) | ||
| 503 | dev->has_alsa_audio = 1; | ||
| 504 | |||
| 505 | dev->audio_mode.has_audio = 1; | ||
| 506 | 510 | ||
| 507 | /* See how this device is configured */ | 511 | /* See how this device is configured */ |
| 508 | cfg = em28xx_read_reg(dev, EM28XX_R00_CHIPCFG); | 512 | cfg = em28xx_read_reg(dev, EM28XX_R00_CHIPCFG); |
| @@ -512,8 +516,8 @@ int em28xx_audio_setup(struct em28xx *dev) | |||
| 512 | cfg = EM28XX_CHIPCFG_AC97; /* Be conservative */ | 516 | cfg = EM28XX_CHIPCFG_AC97; /* Be conservative */ |
| 513 | } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) == 0x00) { | 517 | } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) == 0x00) { |
| 514 | /* The device doesn't have vendor audio at all */ | 518 | /* The device doesn't have vendor audio at all */ |
| 515 | dev->has_alsa_audio = 0; | 519 | dev->has_alsa_audio = false; |
| 516 | dev->audio_mode.has_audio = 0; | 520 | dev->audio_mode.has_audio = false; |
| 517 | return 0; | 521 | return 0; |
| 518 | } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) == | 522 | } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) == |
| 519 | EM28XX_CHIPCFG_I2S_3_SAMPRATES) { | 523 | EM28XX_CHIPCFG_I2S_3_SAMPRATES) { |
| @@ -542,8 +546,8 @@ int em28xx_audio_setup(struct em28xx *dev) | |||
| 542 | */ | 546 | */ |
| 543 | em28xx_warn("AC97 chip type couldn't be determined\n"); | 547 | em28xx_warn("AC97 chip type couldn't be determined\n"); |
| 544 | dev->audio_mode.ac97 = EM28XX_NO_AC97; | 548 | dev->audio_mode.ac97 = EM28XX_NO_AC97; |
| 545 | dev->has_alsa_audio = 0; | 549 | dev->has_alsa_audio = false; |
| 546 | dev->audio_mode.has_audio = 0; | 550 | dev->audio_mode.has_audio = false; |
| 547 | goto init_audio; | 551 | goto init_audio; |
| 548 | } | 552 | } |
| 549 | 553 | ||
| @@ -615,7 +619,9 @@ int em28xx_capture_start(struct em28xx *dev, int start) | |||
| 615 | { | 619 | { |
| 616 | int rc; | 620 | int rc; |
| 617 | 621 | ||
| 618 | if (dev->chip_id == CHIP_ID_EM2874 || dev->chip_id == CHIP_ID_EM28174) { | 622 | if (dev->chip_id == CHIP_ID_EM2874 || |
| 623 | dev->chip_id == CHIP_ID_EM2884 || | ||
| 624 | dev->chip_id == CHIP_ID_EM28174) { | ||
| 619 | /* The Transport Stream Enable Register moved in em2874 */ | 625 | /* The Transport Stream Enable Register moved in em2874 */ |
| 620 | if (!start) { | 626 | if (!start) { |
| 621 | rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE, | 627 | rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE, |
| @@ -884,6 +890,7 @@ int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio) | |||
| 884 | } | 890 | } |
| 885 | return rc; | 891 | return rc; |
| 886 | } | 892 | } |
| 893 | EXPORT_SYMBOL_GPL(em28xx_gpio_set); | ||
| 887 | 894 | ||
| 888 | int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode) | 895 | int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode) |
| 889 | { | 896 | { |
| @@ -917,7 +924,7 @@ EXPORT_SYMBOL_GPL(em28xx_set_mode); | |||
| 917 | static void em28xx_irq_callback(struct urb *urb) | 924 | static void em28xx_irq_callback(struct urb *urb) |
| 918 | { | 925 | { |
| 919 | struct em28xx *dev = urb->context; | 926 | struct em28xx *dev = urb->context; |
| 920 | int rc, i; | 927 | int i; |
| 921 | 928 | ||
| 922 | switch (urb->status) { | 929 | switch (urb->status) { |
| 923 | case 0: /* success */ | 930 | case 0: /* success */ |
| @@ -934,7 +941,7 @@ static void em28xx_irq_callback(struct urb *urb) | |||
| 934 | 941 | ||
| 935 | /* Copy data from URB */ | 942 | /* Copy data from URB */ |
| 936 | spin_lock(&dev->slock); | 943 | spin_lock(&dev->slock); |
| 937 | rc = dev->isoc_ctl.isoc_copy(dev, urb); | 944 | dev->isoc_ctl.isoc_copy(dev, urb); |
| 938 | spin_unlock(&dev->slock); | 945 | spin_unlock(&dev->slock); |
| 939 | 946 | ||
| 940 | /* Reset urb buffers */ | 947 | /* Reset urb buffers */ |
| @@ -1106,17 +1113,19 @@ EXPORT_SYMBOL_GPL(em28xx_init_isoc); | |||
| 1106 | int em28xx_isoc_dvb_max_packetsize(struct em28xx *dev) | 1113 | int em28xx_isoc_dvb_max_packetsize(struct em28xx *dev) |
| 1107 | { | 1114 | { |
| 1108 | unsigned int chip_cfg2; | 1115 | unsigned int chip_cfg2; |
| 1109 | unsigned int packet_size = 564; | 1116 | unsigned int packet_size; |
| 1110 | 1117 | ||
| 1111 | if (dev->chip_id == CHIP_ID_EM2874) { | 1118 | switch (dev->chip_id) { |
| 1112 | /* FIXME - for now assume 564 like it was before, but the | 1119 | case CHIP_ID_EM2710: |
| 1113 | em2874 code should be added to return the proper value... */ | 1120 | case CHIP_ID_EM2750: |
| 1114 | packet_size = 564; | 1121 | case CHIP_ID_EM2800: |
| 1115 | } else if (dev->chip_id == CHIP_ID_EM28174) { | 1122 | case CHIP_ID_EM2820: |
| 1116 | /* FIXME same as em2874. 564 was enough for 22 Mbit DVB-T | 1123 | case CHIP_ID_EM2840: |
| 1117 | but too much for 44 Mbit DVB-C. */ | 1124 | case CHIP_ID_EM2860: |
| 1118 | packet_size = 752; | 1125 | /* No DVB support */ |
| 1119 | } else { | 1126 | return -EINVAL; |
| 1127 | case CHIP_ID_EM2870: | ||
| 1128 | case CHIP_ID_EM2883: | ||
| 1120 | /* TS max packet size stored in bits 1-0 of R01 */ | 1129 | /* TS max packet size stored in bits 1-0 of R01 */ |
| 1121 | chip_cfg2 = em28xx_read_reg(dev, EM28XX_R01_CHIPCFG2); | 1130 | chip_cfg2 = em28xx_read_reg(dev, EM28XX_R01_CHIPCFG2); |
| 1122 | switch (chip_cfg2 & EM28XX_CHIPCFG2_TS_PACKETSIZE_MASK) { | 1131 | switch (chip_cfg2 & EM28XX_CHIPCFG2_TS_PACKETSIZE_MASK) { |
| @@ -1133,9 +1142,24 @@ int em28xx_isoc_dvb_max_packetsize(struct em28xx *dev) | |||
| 1133 | packet_size = 752; | 1142 | packet_size = 752; |
| 1134 | break; | 1143 | break; |
| 1135 | } | 1144 | } |
| 1145 | break; | ||
| 1146 | case CHIP_ID_EM2874: | ||
| 1147 | /* | ||
| 1148 | * FIXME: for now assumes 564 like it was before, but the | ||
| 1149 | * em2874 code should be added to return the proper value | ||
| 1150 | */ | ||
| 1151 | packet_size = 564; | ||
| 1152 | break; | ||
| 1153 | case CHIP_ID_EM2884: | ||
| 1154 | case CHIP_ID_EM28174: | ||
| 1155 | default: | ||
| 1156 | /* | ||
| 1157 | * FIXME: same as em2874. 564 was enough for 22 Mbit DVB-T | ||
| 1158 | * but not enough for 44 Mbit DVB-C. | ||
| 1159 | */ | ||
| 1160 | packet_size = 752; | ||
| 1136 | } | 1161 | } |
| 1137 | 1162 | ||
| 1138 | em28xx_coredbg("dvb max packet size=%d\n", packet_size); | ||
| 1139 | return packet_size; | 1163 | return packet_size; |
| 1140 | } | 1164 | } |
| 1141 | EXPORT_SYMBOL_GPL(em28xx_isoc_dvb_max_packetsize); | 1165 | EXPORT_SYMBOL_GPL(em28xx_isoc_dvb_max_packetsize); |
diff --git a/drivers/media/video/em28xx/em28xx-dvb.c b/drivers/media/video/em28xx/em28xx-dvb.c index 7904ca4b6913..e5916dee4094 100644 --- a/drivers/media/video/em28xx/em28xx-dvb.c +++ b/drivers/media/video/em28xx/em28xx-dvb.c | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | /* | 1 | /* |
| 2 | DVB device driver for em28xx | 2 | DVB device driver for em28xx |
| 3 | 3 | ||
| 4 | (c) 2008 Mauro Carvalho Chehab <mchehab@infradead.org> | 4 | (c) 2008-2011 Mauro Carvalho Chehab <mchehab@infradead.org> |
| 5 | 5 | ||
| 6 | (c) 2008 Devin Heitmueller <devin.heitmueller@gmail.com> | 6 | (c) 2008 Devin Heitmueller <devin.heitmueller@gmail.com> |
| 7 | - Fixes for the driver to properly work with HVR-950 | 7 | - Fixes for the driver to properly work with HVR-950 |
| @@ -40,6 +40,8 @@ | |||
| 40 | #include "s921.h" | 40 | #include "s921.h" |
| 41 | #include "drxd.h" | 41 | #include "drxd.h" |
| 42 | #include "cxd2820r.h" | 42 | #include "cxd2820r.h" |
| 43 | #include "tda18271c2dd.h" | ||
| 44 | #include "drxk.h" | ||
| 43 | 45 | ||
| 44 | MODULE_DESCRIPTION("driver for em28xx based DVB cards"); | 46 | MODULE_DESCRIPTION("driver for em28xx based DVB cards"); |
| 45 | MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@infradead.org>"); | 47 | MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@infradead.org>"); |
| @@ -73,6 +75,11 @@ struct em28xx_dvb { | |||
| 73 | struct dmx_frontend fe_hw; | 75 | struct dmx_frontend fe_hw; |
| 74 | struct dmx_frontend fe_mem; | 76 | struct dmx_frontend fe_mem; |
| 75 | struct dvb_net net; | 77 | struct dvb_net net; |
| 78 | |||
| 79 | /* Due to DRX-K - probably need changes */ | ||
| 80 | int (*gate_ctrl)(struct dvb_frontend *, int); | ||
| 81 | struct semaphore pll_mutex; | ||
| 82 | bool dont_attach_fe1; | ||
| 76 | }; | 83 | }; |
| 77 | 84 | ||
| 78 | 85 | ||
| @@ -160,6 +167,11 @@ static int start_streaming(struct em28xx_dvb *dvb) | |||
| 160 | return rc; | 167 | return rc; |
| 161 | 168 | ||
| 162 | max_dvb_packet_size = em28xx_isoc_dvb_max_packetsize(dev); | 169 | max_dvb_packet_size = em28xx_isoc_dvb_max_packetsize(dev); |
| 170 | if (max_dvb_packet_size < 0) | ||
| 171 | return max_dvb_packet_size; | ||
| 172 | dprintk(1, "Using %d buffers each with %d bytes\n", | ||
| 173 | EM28XX_DVB_NUM_BUFS, | ||
| 174 | max_dvb_packet_size); | ||
| 163 | 175 | ||
| 164 | return em28xx_init_isoc(dev, EM28XX_DVB_MAX_PACKETS, | 176 | return em28xx_init_isoc(dev, EM28XX_DVB_MAX_PACKETS, |
| 165 | EM28XX_DVB_NUM_BUFS, max_dvb_packet_size, | 177 | EM28XX_DVB_NUM_BUFS, max_dvb_packet_size, |
| @@ -295,6 +307,79 @@ static struct drxd_config em28xx_drxd = { | |||
| 295 | .disable_i2c_gate_ctrl = 1, | 307 | .disable_i2c_gate_ctrl = 1, |
| 296 | }; | 308 | }; |
| 297 | 309 | ||
| 310 | struct drxk_config terratec_h5_drxk = { | ||
| 311 | .adr = 0x29, | ||
| 312 | .single_master = 1, | ||
| 313 | .no_i2c_bridge = 1, | ||
| 314 | .microcode_name = "dvb-usb-terratec-h5-drxk.fw", | ||
| 315 | }; | ||
| 316 | |||
| 317 | static int drxk_gate_ctrl(struct dvb_frontend *fe, int enable) | ||
| 318 | { | ||
| 319 | struct em28xx_dvb *dvb = fe->sec_priv; | ||
| 320 | int status; | ||
| 321 | |||
| 322 | if (!dvb) | ||
| 323 | return -EINVAL; | ||
| 324 | |||
| 325 | if (enable) { | ||
| 326 | down(&dvb->pll_mutex); | ||
| 327 | status = dvb->gate_ctrl(fe, 1); | ||
| 328 | } else { | ||
| 329 | status = dvb->gate_ctrl(fe, 0); | ||
| 330 | up(&dvb->pll_mutex); | ||
| 331 | } | ||
| 332 | return status; | ||
| 333 | } | ||
| 334 | |||
| 335 | static void terratec_h5_init(struct em28xx *dev) | ||
| 336 | { | ||
| 337 | int i; | ||
| 338 | struct em28xx_reg_seq terratec_h5_init[] = { | ||
| 339 | {EM28XX_R08_GPIO, 0xff, 0xff, 10}, | ||
| 340 | {EM2874_R80_GPIO, 0xf6, 0xff, 100}, | ||
| 341 | {EM2874_R80_GPIO, 0xf2, 0xff, 50}, | ||
| 342 | {EM2874_R80_GPIO, 0xf6, 0xff, 100}, | ||
| 343 | { -1, -1, -1, -1}, | ||
| 344 | }; | ||
| 345 | struct em28xx_reg_seq terratec_h5_end[] = { | ||
| 346 | {EM2874_R80_GPIO, 0xe6, 0xff, 100}, | ||
| 347 | {EM2874_R80_GPIO, 0xa6, 0xff, 50}, | ||
| 348 | {EM2874_R80_GPIO, 0xe6, 0xff, 100}, | ||
| 349 | { -1, -1, -1, -1}, | ||
| 350 | }; | ||
| 351 | struct { | ||
| 352 | unsigned char r[4]; | ||
| 353 | int len; | ||
| 354 | } regs[] = { | ||
| 355 | {{ 0x06, 0x02, 0x00, 0x31 }, 4}, | ||
| 356 | {{ 0x01, 0x02 }, 2}, | ||
| 357 | {{ 0x01, 0x02, 0x00, 0xc6 }, 4}, | ||
| 358 | {{ 0x01, 0x00 }, 2}, | ||
| 359 | {{ 0x01, 0x00, 0xff, 0xaf }, 4}, | ||
| 360 | {{ 0x01, 0x00, 0x03, 0xa0 }, 4}, | ||
| 361 | {{ 0x01, 0x00 }, 2}, | ||
| 362 | {{ 0x01, 0x00, 0x73, 0xaf }, 4}, | ||
| 363 | {{ 0x04, 0x00 }, 2}, | ||
| 364 | {{ 0x00, 0x04 }, 2}, | ||
| 365 | {{ 0x00, 0x04, 0x00, 0x0a }, 4}, | ||
| 366 | {{ 0x04, 0x14 }, 2}, | ||
| 367 | {{ 0x04, 0x14, 0x00, 0x00 }, 4}, | ||
| 368 | }; | ||
| 369 | |||
| 370 | em28xx_gpio_set(dev, terratec_h5_init); | ||
| 371 | em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x40); | ||
| 372 | msleep(10); | ||
| 373 | em28xx_write_reg(dev, EM28XX_R06_I2C_CLK, 0x45); | ||
| 374 | msleep(10); | ||
| 375 | |||
| 376 | dev->i2c_client.addr = 0x82 >> 1; | ||
| 377 | |||
| 378 | for (i = 0; i < ARRAY_SIZE(regs); i++) | ||
| 379 | i2c_master_send(&dev->i2c_client, regs[i].r, regs[i].len); | ||
| 380 | em28xx_gpio_set(dev, terratec_h5_end); | ||
| 381 | }; | ||
| 382 | |||
| 298 | static int mt352_terratec_xs_init(struct dvb_frontend *fe) | 383 | static int mt352_terratec_xs_init(struct dvb_frontend *fe) |
| 299 | { | 384 | { |
| 300 | /* Values extracted from a USB trace of the Terratec Windows driver */ | 385 | /* Values extracted from a USB trace of the Terratec Windows driver */ |
| @@ -516,7 +601,7 @@ static void unregister_dvb(struct em28xx_dvb *dvb) | |||
| 516 | if (dvb->fe[1]) | 601 | if (dvb->fe[1]) |
| 517 | dvb_unregister_frontend(dvb->fe[1]); | 602 | dvb_unregister_frontend(dvb->fe[1]); |
| 518 | dvb_unregister_frontend(dvb->fe[0]); | 603 | dvb_unregister_frontend(dvb->fe[0]); |
| 519 | if (dvb->fe[1]) | 604 | if (dvb->fe[1] && !dvb->dont_attach_fe1) |
| 520 | dvb_frontend_detach(dvb->fe[1]); | 605 | dvb_frontend_detach(dvb->fe[1]); |
| 521 | dvb_frontend_detach(dvb->fe[0]); | 606 | dvb_frontend_detach(dvb->fe[0]); |
| 522 | dvb_unregister_adapter(&dvb->adapter); | 607 | dvb_unregister_adapter(&dvb->adapter); |
| @@ -546,7 +631,7 @@ static int dvb_init(struct em28xx *dev) | |||
| 546 | em28xx_set_mode(dev, EM28XX_DIGITAL_MODE); | 631 | em28xx_set_mode(dev, EM28XX_DIGITAL_MODE); |
| 547 | /* init frontend */ | 632 | /* init frontend */ |
| 548 | switch (dev->model) { | 633 | switch (dev->model) { |
| 549 | case EM2874_LEADERSHIP_ISDBT: | 634 | case EM2874_BOARD_LEADERSHIP_ISDBT: |
| 550 | dvb->fe[0] = dvb_attach(s921_attach, | 635 | dvb->fe[0] = dvb_attach(s921_attach, |
| 551 | &sharp_isdbt, &dev->i2c_adap); | 636 | &sharp_isdbt, &dev->i2c_adap); |
| 552 | 637 | ||
| @@ -689,6 +774,41 @@ static int dvb_init(struct em28xx *dev) | |||
| 689 | } | 774 | } |
| 690 | } | 775 | } |
| 691 | break; | 776 | break; |
| 777 | case EM2884_BOARD_TERRATEC_H5: | ||
| 778 | terratec_h5_init(dev); | ||
| 779 | |||
| 780 | dvb->dont_attach_fe1 = 1; | ||
| 781 | |||
| 782 | dvb->fe[0] = dvb_attach(drxk_attach, &terratec_h5_drxk, &dev->i2c_adap, &dvb->fe[1]); | ||
| 783 | if (!dvb->fe[0]) { | ||
| 784 | result = -EINVAL; | ||
| 785 | goto out_free; | ||
| 786 | } | ||
| 787 | |||
| 788 | /* FIXME: do we need a pll semaphore? */ | ||
| 789 | dvb->fe[0]->sec_priv = dvb; | ||
| 790 | sema_init(&dvb->pll_mutex, 1); | ||
| 791 | dvb->gate_ctrl = dvb->fe[0]->ops.i2c_gate_ctrl; | ||
| 792 | dvb->fe[0]->ops.i2c_gate_ctrl = drxk_gate_ctrl; | ||
| 793 | dvb->fe[1]->id = 1; | ||
| 794 | |||
| 795 | /* Attach tda18271 to DVB-C frontend */ | ||
| 796 | if (dvb->fe[0]->ops.i2c_gate_ctrl) | ||
| 797 | dvb->fe[0]->ops.i2c_gate_ctrl(dvb->fe[0], 1); | ||
| 798 | if (!dvb_attach(tda18271c2dd_attach, dvb->fe[0], &dev->i2c_adap, 0x60)) { | ||
| 799 | result = -EINVAL; | ||
| 800 | goto out_free; | ||
| 801 | } | ||
| 802 | if (dvb->fe[0]->ops.i2c_gate_ctrl) | ||
| 803 | dvb->fe[0]->ops.i2c_gate_ctrl(dvb->fe[0], 0); | ||
| 804 | |||
| 805 | /* Hack - needed by drxk/tda18271c2dd */ | ||
| 806 | dvb->fe[1]->tuner_priv = dvb->fe[0]->tuner_priv; | ||
| 807 | memcpy(&dvb->fe[1]->ops.tuner_ops, | ||
| 808 | &dvb->fe[0]->ops.tuner_ops, | ||
| 809 | sizeof(dvb->fe[0]->ops.tuner_ops)); | ||
| 810 | |||
| 811 | break; | ||
| 692 | default: | 812 | default: |
| 693 | em28xx_errdev("/2: The frontend of your DVB/ATSC card" | 813 | em28xx_errdev("/2: The frontend of your DVB/ATSC card" |
| 694 | " isn't supported yet\n"); | 814 | " isn't supported yet\n"); |
diff --git a/drivers/media/video/em28xx/em28xx-i2c.c b/drivers/media/video/em28xx/em28xx-i2c.c index 4739fc7e6eb3..36f5a9bc8b76 100644 --- a/drivers/media/video/em28xx/em28xx-i2c.c +++ b/drivers/media/video/em28xx/em28xx-i2c.c | |||
| @@ -181,16 +181,25 @@ static int em2800_i2c_recv_bytes(struct em28xx *dev, unsigned char addr, | |||
| 181 | 181 | ||
| 182 | /* | 182 | /* |
| 183 | * em28xx_i2c_send_bytes() | 183 | * em28xx_i2c_send_bytes() |
| 184 | * untested for more than 4 bytes | ||
| 185 | */ | 184 | */ |
| 186 | static int em28xx_i2c_send_bytes(void *data, unsigned char addr, char *buf, | 185 | static int em28xx_i2c_send_bytes(void *data, unsigned char addr, char *buf, |
| 187 | short len, int stop) | 186 | short len, int stop) |
| 188 | { | 187 | { |
| 189 | int wrcount = 0; | 188 | int wrcount = 0; |
| 190 | struct em28xx *dev = (struct em28xx *)data; | 189 | struct em28xx *dev = (struct em28xx *)data; |
| 190 | int write_timeout, ret; | ||
| 191 | 191 | ||
| 192 | wrcount = dev->em28xx_write_regs_req(dev, stop ? 2 : 3, addr, buf, len); | 192 | wrcount = dev->em28xx_write_regs_req(dev, stop ? 2 : 3, addr, buf, len); |
| 193 | 193 | ||
| 194 | /* Seems to be required after a write */ | ||
| 195 | for (write_timeout = EM2800_I2C_WRITE_TIMEOUT; write_timeout > 0; | ||
| 196 | write_timeout -= 5) { | ||
| 197 | ret = dev->em28xx_read_reg(dev, 0x05); | ||
| 198 | if (!ret) | ||
| 199 | break; | ||
| 200 | msleep(5); | ||
| 201 | } | ||
| 202 | |||
| 194 | return wrcount; | 203 | return wrcount; |
| 195 | } | 204 | } |
| 196 | 205 | ||
| @@ -218,9 +227,7 @@ static int em28xx_i2c_recv_bytes(struct em28xx *dev, unsigned char addr, | |||
| 218 | */ | 227 | */ |
| 219 | static int em28xx_i2c_check_for_device(struct em28xx *dev, unsigned char addr) | 228 | static int em28xx_i2c_check_for_device(struct em28xx *dev, unsigned char addr) |
| 220 | { | 229 | { |
| 221 | char msg; | ||
| 222 | int ret; | 230 | int ret; |
| 223 | msg = addr; | ||
| 224 | 231 | ||
| 225 | ret = dev->em28xx_read_reg_req(dev, 2, addr); | 232 | ret = dev->em28xx_read_reg_req(dev, 2, addr); |
| 226 | if (ret < 0) { | 233 | if (ret < 0) { |
| @@ -332,7 +339,9 @@ static int em28xx_i2c_eeprom(struct em28xx *dev, unsigned char *eedata, int len) | |||
| 332 | struct em28xx_eeprom *em_eeprom = (void *)eedata; | 339 | struct em28xx_eeprom *em_eeprom = (void *)eedata; |
| 333 | int i, err, size = len, block; | 340 | int i, err, size = len, block; |
| 334 | 341 | ||
| 335 | if (dev->chip_id == CHIP_ID_EM2874 || dev->chip_id == CHIP_ID_EM28174) { | 342 | if (dev->chip_id == CHIP_ID_EM2874 || |
| 343 | dev->chip_id == CHIP_ID_EM28174 || | ||
| 344 | dev->chip_id == CHIP_ID_EM2884) { | ||
| 336 | /* Empia switched to a 16-bit addressable eeprom in newer | 345 | /* Empia switched to a 16-bit addressable eeprom in newer |
| 337 | devices. While we could certainly write a routine to read | 346 | devices. While we could certainly write a routine to read |
| 338 | the eeprom, there is nothing of use in there that cannot be | 347 | the eeprom, there is nothing of use in there that cannot be |
diff --git a/drivers/media/video/em28xx/em28xx-input.c b/drivers/media/video/em28xx/em28xx-input.c index ba1ba8648c81..5d12b14282e3 100644 --- a/drivers/media/video/em28xx/em28xx-input.c +++ b/drivers/media/video/em28xx/em28xx-input.c | |||
| @@ -372,6 +372,7 @@ int em28xx_ir_change_protocol(struct rc_dev *rc_dev, u64 rc_type) | |||
| 372 | ir->get_key = default_polling_getkey; | 372 | ir->get_key = default_polling_getkey; |
| 373 | break; | 373 | break; |
| 374 | case CHIP_ID_EM2874: | 374 | case CHIP_ID_EM2874: |
| 375 | case CHIP_ID_EM28174: | ||
| 375 | ir->get_key = em2874_polling_getkey; | 376 | ir->get_key = em2874_polling_getkey; |
| 376 | em28xx_write_regs(dev, EM2874_R50_IR_CONFIG, &ir_config, 1); | 377 | em28xx_write_regs(dev, EM2874_R50_IR_CONFIG, &ir_config, 1); |
| 377 | break; | 378 | break; |
diff --git a/drivers/media/video/em28xx/em28xx-reg.h b/drivers/media/video/em28xx/em28xx-reg.h index e92a28ede434..66f792361b97 100644 --- a/drivers/media/video/em28xx/em28xx-reg.h +++ b/drivers/media/video/em28xx/em28xx-reg.h | |||
| @@ -201,6 +201,7 @@ enum em28xx_chip_id { | |||
| 201 | CHIP_ID_EM2870 = 35, | 201 | CHIP_ID_EM2870 = 35, |
| 202 | CHIP_ID_EM2883 = 36, | 202 | CHIP_ID_EM2883 = 36, |
| 203 | CHIP_ID_EM2874 = 65, | 203 | CHIP_ID_EM2874 = 65, |
| 204 | CHIP_ID_EM2884 = 68, | ||
| 204 | CHIP_ID_EM28174 = 113, | 205 | CHIP_ID_EM28174 = 113, |
| 205 | }; | 206 | }; |
| 206 | 207 | ||
diff --git a/drivers/media/video/em28xx/em28xx-video.c b/drivers/media/video/em28xx/em28xx-video.c index 7b6461d2d1ff..d176dc0394e2 100644 --- a/drivers/media/video/em28xx/em28xx-video.c +++ b/drivers/media/video/em28xx/em28xx-video.c | |||
| @@ -32,7 +32,6 @@ | |||
| 32 | #include <linux/bitmap.h> | 32 | #include <linux/bitmap.h> |
| 33 | #include <linux/usb.h> | 33 | #include <linux/usb.h> |
| 34 | #include <linux/i2c.h> | 34 | #include <linux/i2c.h> |
| 35 | #include <linux/version.h> | ||
| 36 | #include <linux/mm.h> | 35 | #include <linux/mm.h> |
| 37 | #include <linux/mutex.h> | 36 | #include <linux/mutex.h> |
| 38 | #include <linux/slab.h> | 37 | #include <linux/slab.h> |
| @@ -50,7 +49,8 @@ | |||
| 50 | "Sascha Sommer <saschasommer@freenet.de>" | 49 | "Sascha Sommer <saschasommer@freenet.de>" |
| 51 | 50 | ||
| 52 | #define DRIVER_DESC "Empia em28xx based USB video device driver" | 51 | #define DRIVER_DESC "Empia em28xx based USB video device driver" |
| 53 | #define EM28XX_VERSION_CODE KERNEL_VERSION(0, 1, 2) | 52 | |
| 53 | #define EM28XX_VERSION "0.1.3" | ||
| 54 | 54 | ||
| 55 | #define em28xx_videodbg(fmt, arg...) do {\ | 55 | #define em28xx_videodbg(fmt, arg...) do {\ |
| 56 | if (video_debug) \ | 56 | if (video_debug) \ |
| @@ -72,6 +72,7 @@ do {\ | |||
| 72 | MODULE_AUTHOR(DRIVER_AUTHOR); | 72 | MODULE_AUTHOR(DRIVER_AUTHOR); |
| 73 | MODULE_DESCRIPTION(DRIVER_DESC); | 73 | MODULE_DESCRIPTION(DRIVER_DESC); |
| 74 | MODULE_LICENSE("GPL"); | 74 | MODULE_LICENSE("GPL"); |
| 75 | MODULE_VERSION(EM28XX_VERSION); | ||
| 75 | 76 | ||
| 76 | static unsigned int video_nr[] = {[0 ... (EM28XX_MAXBOARDS - 1)] = UNSET }; | 77 | static unsigned int video_nr[] = {[0 ... (EM28XX_MAXBOARDS - 1)] = UNSET }; |
| 77 | static unsigned int vbi_nr[] = {[0 ... (EM28XX_MAXBOARDS - 1)] = UNSET }; | 78 | static unsigned int vbi_nr[] = {[0 ... (EM28XX_MAXBOARDS - 1)] = UNSET }; |
| @@ -1757,8 +1758,6 @@ static int vidioc_querycap(struct file *file, void *priv, | |||
| 1757 | strlcpy(cap->card, em28xx_boards[dev->model].name, sizeof(cap->card)); | 1758 | strlcpy(cap->card, em28xx_boards[dev->model].name, sizeof(cap->card)); |
| 1758 | usb_make_path(dev->udev, cap->bus_info, sizeof(cap->bus_info)); | 1759 | usb_make_path(dev->udev, cap->bus_info, sizeof(cap->bus_info)); |
| 1759 | 1760 | ||
| 1760 | cap->version = EM28XX_VERSION_CODE; | ||
| 1761 | |||
| 1762 | cap->capabilities = | 1761 | cap->capabilities = |
| 1763 | V4L2_CAP_SLICED_VBI_CAPTURE | | 1762 | V4L2_CAP_SLICED_VBI_CAPTURE | |
| 1764 | V4L2_CAP_VIDEO_CAPTURE | | 1763 | V4L2_CAP_VIDEO_CAPTURE | |
| @@ -1976,7 +1975,6 @@ static int radio_querycap(struct file *file, void *priv, | |||
| 1976 | strlcpy(cap->card, em28xx_boards[dev->model].name, sizeof(cap->card)); | 1975 | strlcpy(cap->card, em28xx_boards[dev->model].name, sizeof(cap->card)); |
| 1977 | usb_make_path(dev->udev, cap->bus_info, sizeof(cap->bus_info)); | 1976 | usb_make_path(dev->udev, cap->bus_info, sizeof(cap->bus_info)); |
| 1978 | 1977 | ||
| 1979 | cap->version = EM28XX_VERSION_CODE; | ||
| 1980 | cap->capabilities = V4L2_CAP_TUNER; | 1978 | cap->capabilities = V4L2_CAP_TUNER; |
| 1981 | return 0; | 1979 | return 0; |
| 1982 | } | 1980 | } |
| @@ -2450,10 +2448,8 @@ int em28xx_register_analog_devices(struct em28xx *dev) | |||
| 2450 | u8 val; | 2448 | u8 val; |
| 2451 | int ret; | 2449 | int ret; |
| 2452 | 2450 | ||
| 2453 | printk(KERN_INFO "%s: v4l2 driver version %d.%d.%d\n", | 2451 | printk(KERN_INFO "%s: v4l2 driver version %s\n", |
| 2454 | dev->name, | 2452 | dev->name, EM28XX_VERSION); |
| 2455 | (EM28XX_VERSION_CODE >> 16) & 0xff, | ||
| 2456 | (EM28XX_VERSION_CODE >> 8) & 0xff, EM28XX_VERSION_CODE & 0xff); | ||
| 2457 | 2453 | ||
| 2458 | /* set default norm */ | 2454 | /* set default norm */ |
| 2459 | dev->norm = em28xx_video_template.current_norm; | 2455 | dev->norm = em28xx_video_template.current_norm; |
diff --git a/drivers/media/video/em28xx/em28xx.h b/drivers/media/video/em28xx/em28xx.h index 3cca33122450..d80658bf3da9 100644 --- a/drivers/media/video/em28xx/em28xx.h +++ b/drivers/media/video/em28xx/em28xx.h | |||
| @@ -117,9 +117,9 @@ | |||
| 117 | #define EM2800_BOARD_VC211A 74 | 117 | #define EM2800_BOARD_VC211A 74 |
| 118 | #define EM2882_BOARD_DIKOM_DK300 75 | 118 | #define EM2882_BOARD_DIKOM_DK300 75 |
| 119 | #define EM2870_BOARD_KWORLD_A340 76 | 119 | #define EM2870_BOARD_KWORLD_A340 76 |
| 120 | #define EM2874_LEADERSHIP_ISDBT 77 | 120 | #define EM2874_BOARD_LEADERSHIP_ISDBT 77 |
| 121 | #define EM28174_BOARD_PCTV_290E 78 | 121 | #define EM28174_BOARD_PCTV_290E 78 |
| 122 | 122 | #define EM2884_BOARD_TERRATEC_H5 79 | |
| 123 | 123 | ||
| 124 | /* Limits minimum and default number of buffers */ | 124 | /* Limits minimum and default number of buffers */ |
| 125 | #define EM28XX_MIN_BUF 4 | 125 | #define EM28XX_MIN_BUF 4 |
| @@ -487,6 +487,8 @@ struct em28xx { | |||
| 487 | int devno; /* marks the number of this device */ | 487 | int devno; /* marks the number of this device */ |
| 488 | enum em28xx_chip_id chip_id; | 488 | enum em28xx_chip_id chip_id; |
| 489 | 489 | ||
| 490 | int audio_ifnum; | ||
| 491 | |||
| 490 | struct v4l2_device v4l2_dev; | 492 | struct v4l2_device v4l2_dev; |
| 491 | struct em28xx_board board; | 493 | struct em28xx_board board; |
| 492 | 494 | ||
| @@ -503,6 +505,7 @@ struct em28xx { | |||
| 503 | 505 | ||
| 504 | unsigned int has_audio_class:1; | 506 | unsigned int has_audio_class:1; |
| 505 | unsigned int has_alsa_audio:1; | 507 | unsigned int has_alsa_audio:1; |
| 508 | unsigned int is_audio_only:1; | ||
| 506 | 509 | ||
| 507 | /* Controls audio streaming */ | 510 | /* Controls audio streaming */ |
| 508 | struct work_struct wq_trigger; /* Trigger to start/stop audio for alsa module */ | 511 | struct work_struct wq_trigger; /* Trigger to start/stop audio for alsa module */ |
| @@ -697,6 +700,9 @@ int em28xx_tuner_callback(void *ptr, int component, int command, int arg); | |||
| 697 | void em28xx_release_resources(struct em28xx *dev); | 700 | void em28xx_release_resources(struct em28xx *dev); |
| 698 | 701 | ||
| 699 | /* Provided by em28xx-input.c */ | 702 | /* Provided by em28xx-input.c */ |
| 703 | |||
| 704 | #ifdef CONFIG_VIDEO_EM28XX_RC | ||
| 705 | |||
| 700 | int em28xx_get_key_terratec(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw); | 706 | int em28xx_get_key_terratec(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw); |
| 701 | int em28xx_get_key_em_haup(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw); | 707 | int em28xx_get_key_em_haup(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw); |
| 702 | int em28xx_get_key_pinnacle_usb_grey(struct IR_i2c *ir, u32 *ir_key, | 708 | int em28xx_get_key_pinnacle_usb_grey(struct IR_i2c *ir, u32 *ir_key, |
| @@ -709,6 +715,20 @@ void em28xx_deregister_snapshot_button(struct em28xx *dev); | |||
| 709 | int em28xx_ir_init(struct em28xx *dev); | 715 | int em28xx_ir_init(struct em28xx *dev); |
| 710 | int em28xx_ir_fini(struct em28xx *dev); | 716 | int em28xx_ir_fini(struct em28xx *dev); |
| 711 | 717 | ||
| 718 | #else | ||
| 719 | |||
| 720 | #define em28xx_get_key_terratec NULL | ||
| 721 | #define em28xx_get_key_em_haup NULL | ||
| 722 | #define em28xx_get_key_pinnacle_usb_grey NULL | ||
| 723 | #define em28xx_get_key_winfast_usbii_deluxe NULL | ||
| 724 | |||
| 725 | static inline void em28xx_register_snapshot_button(struct em28xx *dev) {} | ||
| 726 | static inline void em28xx_deregister_snapshot_button(struct em28xx *dev) {} | ||
| 727 | static inline int em28xx_ir_init(struct em28xx *dev) { return 0; } | ||
| 728 | static inline int em28xx_ir_fini(struct em28xx *dev) { return 0; } | ||
| 729 | |||
| 730 | #endif | ||
| 731 | |||
| 712 | /* Provided by em28xx-vbi.c */ | 732 | /* Provided by em28xx-vbi.c */ |
| 713 | extern struct videobuf_queue_ops em28xx_vbi_qops; | 733 | extern struct videobuf_queue_ops em28xx_vbi_qops; |
| 714 | 734 | ||
diff --git a/drivers/media/video/et61x251/et61x251.h b/drivers/media/video/et61x251/et61x251.h index bf66189cb26d..14bb907d650e 100644 --- a/drivers/media/video/et61x251/et61x251.h +++ b/drivers/media/video/et61x251/et61x251.h | |||
| @@ -21,7 +21,6 @@ | |||
| 21 | #ifndef _ET61X251_H_ | 21 | #ifndef _ET61X251_H_ |
| 22 | #define _ET61X251_H_ | 22 | #define _ET61X251_H_ |
| 23 | 23 | ||
| 24 | #include <linux/version.h> | ||
| 25 | #include <linux/usb.h> | 24 | #include <linux/usb.h> |
| 26 | #include <linux/videodev2.h> | 25 | #include <linux/videodev2.h> |
| 27 | #include <media/v4l2-common.h> | 26 | #include <media/v4l2-common.h> |
diff --git a/drivers/media/video/et61x251/et61x251_core.c b/drivers/media/video/et61x251/et61x251_core.c index a982750dcef1..9a1e80a1e145 100644 --- a/drivers/media/video/et61x251/et61x251_core.c +++ b/drivers/media/video/et61x251/et61x251_core.c | |||
| @@ -18,6 +18,7 @@ | |||
| 18 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. * | 18 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. * |
| 19 | ***************************************************************************/ | 19 | ***************************************************************************/ |
| 20 | 20 | ||
| 21 | #include <linux/version.h> | ||
| 21 | #include <linux/module.h> | 22 | #include <linux/module.h> |
| 22 | #include <linux/init.h> | 23 | #include <linux/init.h> |
| 23 | #include <linux/kernel.h> | 24 | #include <linux/kernel.h> |
| @@ -48,8 +49,7 @@ | |||
| 48 | #define ET61X251_MODULE_AUTHOR "(C) 2006-2007 Luca Risolia" | 49 | #define ET61X251_MODULE_AUTHOR "(C) 2006-2007 Luca Risolia" |
| 49 | #define ET61X251_AUTHOR_EMAIL "<luca.risolia@studio.unibo.it>" | 50 | #define ET61X251_AUTHOR_EMAIL "<luca.risolia@studio.unibo.it>" |
| 50 | #define ET61X251_MODULE_LICENSE "GPL" | 51 | #define ET61X251_MODULE_LICENSE "GPL" |
| 51 | #define ET61X251_MODULE_VERSION "1:1.09" | 52 | #define ET61X251_MODULE_VERSION "1.1.10" |
| 52 | #define ET61X251_MODULE_VERSION_CODE KERNEL_VERSION(1, 1, 9) | ||
| 53 | 53 | ||
| 54 | /*****************************************************************************/ | 54 | /*****************************************************************************/ |
| 55 | 55 | ||
| @@ -1579,7 +1579,7 @@ et61x251_vidioc_querycap(struct et61x251_device* cam, void __user * arg) | |||
| 1579 | { | 1579 | { |
| 1580 | struct v4l2_capability cap = { | 1580 | struct v4l2_capability cap = { |
| 1581 | .driver = "et61x251", | 1581 | .driver = "et61x251", |
| 1582 | .version = ET61X251_MODULE_VERSION_CODE, | 1582 | .version = LINUX_VERSION_CODE, |
| 1583 | .capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE | | 1583 | .capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE | |
| 1584 | V4L2_CAP_STREAMING, | 1584 | V4L2_CAP_STREAMING, |
| 1585 | }; | 1585 | }; |
| @@ -2480,16 +2480,8 @@ static long et61x251_ioctl_v4l2(struct file *filp, | |||
| 2480 | case VIDIOC_S_PARM: | 2480 | case VIDIOC_S_PARM: |
| 2481 | return et61x251_vidioc_s_parm(cam, arg); | 2481 | return et61x251_vidioc_s_parm(cam, arg); |
| 2482 | 2482 | ||
| 2483 | case VIDIOC_G_STD: | ||
| 2484 | case VIDIOC_S_STD: | ||
| 2485 | case VIDIOC_QUERYSTD: | ||
| 2486 | case VIDIOC_ENUMSTD: | ||
| 2487 | case VIDIOC_QUERYMENU: | ||
| 2488 | case VIDIOC_ENUM_FRAMEINTERVALS: | ||
| 2489 | return -EINVAL; | ||
| 2490 | |||
| 2491 | default: | 2483 | default: |
| 2492 | return -EINVAL; | 2484 | return -ENOTTY; |
| 2493 | 2485 | ||
| 2494 | } | 2486 | } |
| 2495 | } | 2487 | } |
diff --git a/drivers/media/video/fsl-viu.c b/drivers/media/video/fsl-viu.c index 908d7012c3f2..27cb197d0bd6 100644 --- a/drivers/media/video/fsl-viu.c +++ b/drivers/media/video/fsl-viu.c | |||
| @@ -23,19 +23,13 @@ | |||
| 23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
| 24 | #include <linux/of_platform.h> | 24 | #include <linux/of_platform.h> |
| 25 | #include <linux/slab.h> | 25 | #include <linux/slab.h> |
| 26 | #include <linux/version.h> | ||
| 27 | #include <media/v4l2-common.h> | 26 | #include <media/v4l2-common.h> |
| 28 | #include <media/v4l2-device.h> | 27 | #include <media/v4l2-device.h> |
| 29 | #include <media/v4l2-ioctl.h> | 28 | #include <media/v4l2-ioctl.h> |
| 30 | #include <media/videobuf-dma-contig.h> | 29 | #include <media/videobuf-dma-contig.h> |
| 31 | 30 | ||
| 32 | #define DRV_NAME "fsl_viu" | 31 | #define DRV_NAME "fsl_viu" |
| 33 | #define VIU_MAJOR_VERSION 0 | 32 | #define VIU_VERSION "0.5.1" |
| 34 | #define VIU_MINOR_VERSION 5 | ||
| 35 | #define VIU_RELEASE 0 | ||
| 36 | #define VIU_VERSION KERNEL_VERSION(VIU_MAJOR_VERSION, \ | ||
| 37 | VIU_MINOR_VERSION, \ | ||
| 38 | VIU_RELEASE) | ||
| 39 | 33 | ||
| 40 | #define BUFFER_TIMEOUT msecs_to_jiffies(500) /* 0.5 seconds */ | 34 | #define BUFFER_TIMEOUT msecs_to_jiffies(500) /* 0.5 seconds */ |
| 41 | 35 | ||
| @@ -610,7 +604,6 @@ static int vidioc_querycap(struct file *file, void *priv, | |||
| 610 | { | 604 | { |
| 611 | strcpy(cap->driver, "viu"); | 605 | strcpy(cap->driver, "viu"); |
| 612 | strcpy(cap->card, "viu"); | 606 | strcpy(cap->card, "viu"); |
| 613 | cap->version = VIU_VERSION; | ||
| 614 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | | 607 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | |
| 615 | V4L2_CAP_STREAMING | | 608 | V4L2_CAP_STREAMING | |
| 616 | V4L2_CAP_VIDEO_OVERLAY | | 609 | V4L2_CAP_VIDEO_OVERLAY | |
| @@ -1684,3 +1677,4 @@ module_exit(viu_exit); | |||
| 1684 | MODULE_DESCRIPTION("Freescale Video-In(VIU)"); | 1677 | MODULE_DESCRIPTION("Freescale Video-In(VIU)"); |
| 1685 | MODULE_AUTHOR("Hongjun Chen"); | 1678 | MODULE_AUTHOR("Hongjun Chen"); |
| 1686 | MODULE_LICENSE("GPL"); | 1679 | MODULE_LICENSE("GPL"); |
| 1680 | MODULE_VERSION(VIU_VERSION); | ||
diff --git a/drivers/media/video/gspca/Kconfig b/drivers/media/video/gspca/Kconfig index 34ae2c299799..43d9a20caebc 100644 --- a/drivers/media/video/gspca/Kconfig +++ b/drivers/media/video/gspca/Kconfig | |||
| @@ -179,6 +179,16 @@ config USB_GSPCA_PAC7311 | |||
| 179 | To compile this driver as a module, choose M here: the | 179 | To compile this driver as a module, choose M here: the |
| 180 | module will be called gspca_pac7311. | 180 | module will be called gspca_pac7311. |
| 181 | 181 | ||
| 182 | config USB_GSPCA_SE401 | ||
| 183 | tristate "SE401 USB Camera Driver" | ||
| 184 | depends on VIDEO_V4L2 && USB_GSPCA | ||
| 185 | help | ||
| 186 | Say Y here if you want support for cameras based on the | ||
| 187 | Endpoints (formerly known as AOX) se401 chip. | ||
| 188 | |||
| 189 | To compile this driver as a module, choose M here: the | ||
| 190 | module will be called gspca_se401. | ||
| 191 | |||
| 182 | config USB_GSPCA_SN9C2028 | 192 | config USB_GSPCA_SN9C2028 |
| 183 | tristate "SONIX Dual-Mode USB Camera Driver" | 193 | tristate "SONIX Dual-Mode USB Camera Driver" |
| 184 | depends on VIDEO_V4L2 && USB_GSPCA | 194 | depends on VIDEO_V4L2 && USB_GSPCA |
diff --git a/drivers/media/video/gspca/Makefile b/drivers/media/video/gspca/Makefile index 802fbe1bff4a..d6364a86333a 100644 --- a/drivers/media/video/gspca/Makefile +++ b/drivers/media/video/gspca/Makefile | |||
| @@ -16,6 +16,7 @@ obj-$(CONFIG_USB_GSPCA_OV534_9) += gspca_ov534_9.o | |||
| 16 | obj-$(CONFIG_USB_GSPCA_PAC207) += gspca_pac207.o | 16 | obj-$(CONFIG_USB_GSPCA_PAC207) += gspca_pac207.o |
| 17 | obj-$(CONFIG_USB_GSPCA_PAC7302) += gspca_pac7302.o | 17 | obj-$(CONFIG_USB_GSPCA_PAC7302) += gspca_pac7302.o |
| 18 | obj-$(CONFIG_USB_GSPCA_PAC7311) += gspca_pac7311.o | 18 | obj-$(CONFIG_USB_GSPCA_PAC7311) += gspca_pac7311.o |
| 19 | obj-$(CONFIG_USB_GSPCA_SE401) += gspca_se401.o | ||
| 19 | obj-$(CONFIG_USB_GSPCA_SN9C2028) += gspca_sn9c2028.o | 20 | obj-$(CONFIG_USB_GSPCA_SN9C2028) += gspca_sn9c2028.o |
| 20 | obj-$(CONFIG_USB_GSPCA_SN9C20X) += gspca_sn9c20x.o | 21 | obj-$(CONFIG_USB_GSPCA_SN9C20X) += gspca_sn9c20x.o |
| 21 | obj-$(CONFIG_USB_GSPCA_SONIXB) += gspca_sonixb.o | 22 | obj-$(CONFIG_USB_GSPCA_SONIXB) += gspca_sonixb.o |
| @@ -58,6 +59,7 @@ gspca_ov534_9-objs := ov534_9.o | |||
| 58 | gspca_pac207-objs := pac207.o | 59 | gspca_pac207-objs := pac207.o |
| 59 | gspca_pac7302-objs := pac7302.o | 60 | gspca_pac7302-objs := pac7302.o |
| 60 | gspca_pac7311-objs := pac7311.o | 61 | gspca_pac7311-objs := pac7311.o |
| 62 | gspca_se401-objs := se401.o | ||
| 61 | gspca_sn9c2028-objs := sn9c2028.o | 63 | gspca_sn9c2028-objs := sn9c2028.o |
| 62 | gspca_sn9c20x-objs := sn9c20x.o | 64 | gspca_sn9c20x-objs := sn9c20x.o |
| 63 | gspca_sonixb-objs := sonixb.o | 65 | gspca_sonixb-objs := sonixb.o |
diff --git a/drivers/media/video/gspca/gl860/gl860.h b/drivers/media/video/gspca/gl860/gl860.h index 49ad4acbf602..0330a0293b9c 100644 --- a/drivers/media/video/gspca/gl860/gl860.h +++ b/drivers/media/video/gspca/gl860/gl860.h | |||
| @@ -18,7 +18,6 @@ | |||
| 18 | */ | 18 | */ |
| 19 | #ifndef GL860_DEV_H | 19 | #ifndef GL860_DEV_H |
| 20 | #define GL860_DEV_H | 20 | #define GL860_DEV_H |
| 21 | #include <linux/version.h> | ||
| 22 | 21 | ||
| 23 | #include "gspca.h" | 22 | #include "gspca.h" |
| 24 | 23 | ||
diff --git a/drivers/media/video/gspca/gspca.c b/drivers/media/video/gspca/gspca.c index 08ce9948d99b..5da4879f47f2 100644 --- a/drivers/media/video/gspca/gspca.c +++ b/drivers/media/video/gspca/gspca.c | |||
| @@ -24,7 +24,6 @@ | |||
| 24 | #define MODULE_NAME "gspca" | 24 | #define MODULE_NAME "gspca" |
| 25 | 25 | ||
| 26 | #include <linux/init.h> | 26 | #include <linux/init.h> |
| 27 | #include <linux/version.h> | ||
| 28 | #include <linux/fs.h> | 27 | #include <linux/fs.h> |
| 29 | #include <linux/vmalloc.h> | 28 | #include <linux/vmalloc.h> |
| 30 | #include <linux/sched.h> | 29 | #include <linux/sched.h> |
| @@ -51,11 +50,12 @@ | |||
| 51 | #error "DEF_NURBS too big" | 50 | #error "DEF_NURBS too big" |
| 52 | #endif | 51 | #endif |
| 53 | 52 | ||
| 53 | #define DRIVER_VERSION_NUMBER "2.13.0" | ||
| 54 | |||
| 54 | MODULE_AUTHOR("Jean-François Moine <http://moinejf.free.fr>"); | 55 | MODULE_AUTHOR("Jean-François Moine <http://moinejf.free.fr>"); |
| 55 | MODULE_DESCRIPTION("GSPCA USB Camera Driver"); | 56 | MODULE_DESCRIPTION("GSPCA USB Camera Driver"); |
| 56 | MODULE_LICENSE("GPL"); | 57 | MODULE_LICENSE("GPL"); |
| 57 | 58 | MODULE_VERSION(DRIVER_VERSION_NUMBER); | |
| 58 | #define DRIVER_VERSION_NUMBER KERNEL_VERSION(2, 13, 0) | ||
| 59 | 59 | ||
| 60 | #ifdef GSPCA_DEBUG | 60 | #ifdef GSPCA_DEBUG |
| 61 | int gspca_debug = D_ERR | D_PROBE; | 61 | int gspca_debug = D_ERR | D_PROBE; |
| @@ -443,8 +443,11 @@ void gspca_frame_add(struct gspca_dev *gspca_dev, | |||
| 443 | } else { | 443 | } else { |
| 444 | switch (gspca_dev->last_packet_type) { | 444 | switch (gspca_dev->last_packet_type) { |
| 445 | case DISCARD_PACKET: | 445 | case DISCARD_PACKET: |
| 446 | if (packet_type == LAST_PACKET) | 446 | if (packet_type == LAST_PACKET) { |
| 447 | gspca_dev->last_packet_type = packet_type; | 447 | gspca_dev->last_packet_type = packet_type; |
| 448 | gspca_dev->image = NULL; | ||
| 449 | gspca_dev->image_len = 0; | ||
| 450 | } | ||
| 448 | return; | 451 | return; |
| 449 | case LAST_PACKET: | 452 | case LAST_PACKET: |
| 450 | return; | 453 | return; |
| @@ -1278,10 +1281,10 @@ static int vidioc_querycap(struct file *file, void *priv, | |||
| 1278 | ret = -ENODEV; | 1281 | ret = -ENODEV; |
| 1279 | goto out; | 1282 | goto out; |
| 1280 | } | 1283 | } |
| 1281 | strncpy((char *) cap->driver, gspca_dev->sd_desc->name, | 1284 | strlcpy((char *) cap->driver, gspca_dev->sd_desc->name, |
| 1282 | sizeof cap->driver); | 1285 | sizeof cap->driver); |
| 1283 | if (gspca_dev->dev->product != NULL) { | 1286 | if (gspca_dev->dev->product != NULL) { |
| 1284 | strncpy((char *) cap->card, gspca_dev->dev->product, | 1287 | strlcpy((char *) cap->card, gspca_dev->dev->product, |
| 1285 | sizeof cap->card); | 1288 | sizeof cap->card); |
| 1286 | } else { | 1289 | } else { |
| 1287 | snprintf((char *) cap->card, sizeof cap->card, | 1290 | snprintf((char *) cap->card, sizeof cap->card, |
| @@ -1291,7 +1294,6 @@ static int vidioc_querycap(struct file *file, void *priv, | |||
| 1291 | } | 1294 | } |
| 1292 | usb_make_path(gspca_dev->dev, (char *) cap->bus_info, | 1295 | usb_make_path(gspca_dev->dev, (char *) cap->bus_info, |
| 1293 | sizeof(cap->bus_info)); | 1296 | sizeof(cap->bus_info)); |
| 1294 | cap->version = DRIVER_VERSION_NUMBER; | ||
| 1295 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | 1297 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE |
| 1296 | | V4L2_CAP_STREAMING | 1298 | | V4L2_CAP_STREAMING |
| 1297 | | V4L2_CAP_READWRITE; | 1299 | | V4L2_CAP_READWRITE; |
| @@ -1460,7 +1462,7 @@ static int vidioc_enum_input(struct file *file, void *priv, | |||
| 1460 | return -EINVAL; | 1462 | return -EINVAL; |
| 1461 | input->type = V4L2_INPUT_TYPE_CAMERA; | 1463 | input->type = V4L2_INPUT_TYPE_CAMERA; |
| 1462 | input->status = gspca_dev->cam.input_flags; | 1464 | input->status = gspca_dev->cam.input_flags; |
| 1463 | strncpy(input->name, gspca_dev->sd_desc->name, | 1465 | strlcpy(input->name, gspca_dev->sd_desc->name, |
| 1464 | sizeof input->name); | 1466 | sizeof input->name); |
| 1465 | return 0; | 1467 | return 0; |
| 1466 | } | 1468 | } |
| @@ -2478,10 +2480,7 @@ EXPORT_SYMBOL(gspca_auto_gain_n_exposure); | |||
| 2478 | /* -- module insert / remove -- */ | 2480 | /* -- module insert / remove -- */ |
| 2479 | static int __init gspca_init(void) | 2481 | static int __init gspca_init(void) |
| 2480 | { | 2482 | { |
| 2481 | info("v%d.%d.%d registered", | 2483 | info("v" DRIVER_VERSION_NUMBER " registered"); |
| 2482 | (DRIVER_VERSION_NUMBER >> 16) & 0xff, | ||
| 2483 | (DRIVER_VERSION_NUMBER >> 8) & 0xff, | ||
| 2484 | DRIVER_VERSION_NUMBER & 0xff); | ||
| 2485 | return 0; | 2484 | return 0; |
| 2486 | } | 2485 | } |
| 2487 | static void __exit gspca_exit(void) | 2486 | static void __exit gspca_exit(void) |
diff --git a/drivers/media/video/gspca/ov519.c b/drivers/media/video/gspca/ov519.c index 057e287b9152..0800433b2092 100644 --- a/drivers/media/video/gspca/ov519.c +++ b/drivers/media/video/gspca/ov519.c | |||
| @@ -134,6 +134,7 @@ enum sensors { | |||
| 134 | SEN_OV7670, | 134 | SEN_OV7670, |
| 135 | SEN_OV76BE, | 135 | SEN_OV76BE, |
| 136 | SEN_OV8610, | 136 | SEN_OV8610, |
| 137 | SEN_OV9600, | ||
| 137 | }; | 138 | }; |
| 138 | 139 | ||
| 139 | /* Note this is a bit of a hack, but the w9968cf driver needs the code for all | 140 | /* Note this is a bit of a hack, but the w9968cf driver needs the code for all |
| @@ -340,6 +341,10 @@ static const unsigned ctrl_dis[] = { | |||
| 340 | (1 << EXPOSURE) | | 341 | (1 << EXPOSURE) | |
| 341 | (1 << AUTOGAIN) | | 342 | (1 << AUTOGAIN) | |
| 342 | (1 << FREQ), | 343 | (1 << FREQ), |
| 344 | [SEN_OV9600] = ((1 << NCTRL) - 1) /* no control */ | ||
| 345 | ^ ((1 << EXPOSURE) /* but exposure */ | ||
| 346 | | (1 << AUTOGAIN)), /* and autogain */ | ||
| 347 | |||
| 343 | }; | 348 | }; |
| 344 | 349 | ||
| 345 | static const struct v4l2_pix_format ov519_vga_mode[] = { | 350 | static const struct v4l2_pix_format ov519_vga_mode[] = { |
| @@ -525,6 +530,17 @@ static const struct v4l2_pix_format ovfx2_ov3610_mode[] = { | |||
| 525 | .colorspace = V4L2_COLORSPACE_SRGB, | 530 | .colorspace = V4L2_COLORSPACE_SRGB, |
| 526 | .priv = 0}, | 531 | .priv = 0}, |
| 527 | }; | 532 | }; |
| 533 | static const struct v4l2_pix_format ovfx2_ov9600_mode[] = { | ||
| 534 | {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, | ||
| 535 | .bytesperline = 640, | ||
| 536 | .sizeimage = 640 * 480, | ||
| 537 | .colorspace = V4L2_COLORSPACE_SRGB, | ||
| 538 | .priv = 1}, | ||
| 539 | {1280, 1024, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE, | ||
| 540 | .bytesperline = 1280, | ||
| 541 | .sizeimage = 1280 * 1024, | ||
| 542 | .colorspace = V4L2_COLORSPACE_SRGB}, | ||
| 543 | }; | ||
| 528 | 544 | ||
| 529 | /* Registers common to OV511 / OV518 */ | 545 | /* Registers common to OV511 / OV518 */ |
| 530 | #define R51x_FIFO_PSIZE 0x30 /* 2 bytes wide w/ OV518(+) */ | 546 | #define R51x_FIFO_PSIZE 0x30 /* 2 bytes wide w/ OV518(+) */ |
| @@ -1807,6 +1823,22 @@ static const struct ov_i2c_regvals norm_7660[] = { | |||
| 1807 | | OV7670_COM8_AEC}, | 1823 | | OV7670_COM8_AEC}, |
| 1808 | {0xa1, 0xc8} | 1824 | {0xa1, 0xc8} |
| 1809 | }; | 1825 | }; |
| 1826 | static const struct ov_i2c_regvals norm_9600[] = { | ||
| 1827 | {0x12, 0x80}, | ||
| 1828 | {0x0c, 0x28}, | ||
| 1829 | {0x11, 0x80}, | ||
| 1830 | {0x13, 0xb5}, | ||
| 1831 | {0x14, 0x3e}, | ||
| 1832 | {0x1b, 0x04}, | ||
| 1833 | {0x24, 0xb0}, | ||
| 1834 | {0x25, 0x90}, | ||
| 1835 | {0x26, 0x94}, | ||
| 1836 | {0x35, 0x90}, | ||
| 1837 | {0x37, 0x07}, | ||
| 1838 | {0x38, 0x08}, | ||
| 1839 | {0x01, 0x8e}, | ||
| 1840 | {0x02, 0x85} | ||
| 1841 | }; | ||
| 1810 | 1842 | ||
| 1811 | /* 7670. Defaults taken from OmniVision provided data, | 1843 | /* 7670. Defaults taken from OmniVision provided data, |
| 1812 | * as provided by Jonathan Corbet of OLPC */ | 1844 | * as provided by Jonathan Corbet of OLPC */ |
| @@ -2400,9 +2432,12 @@ static int ov518_i2c_r(struct sd *sd, u8 reg) | |||
| 2400 | 2432 | ||
| 2401 | /* Initiate 2-byte write cycle */ | 2433 | /* Initiate 2-byte write cycle */ |
| 2402 | reg_w(sd, R518_I2C_CTL, 0x03); | 2434 | reg_w(sd, R518_I2C_CTL, 0x03); |
| 2435 | reg_r8(sd, R518_I2C_CTL); | ||
| 2403 | 2436 | ||
| 2404 | /* Initiate 2-byte read cycle */ | 2437 | /* Initiate 2-byte read cycle */ |
| 2405 | reg_w(sd, R518_I2C_CTL, 0x05); | 2438 | reg_w(sd, R518_I2C_CTL, 0x05); |
| 2439 | reg_r8(sd, R518_I2C_CTL); | ||
| 2440 | |||
| 2406 | value = reg_r(sd, R51x_I2C_DATA); | 2441 | value = reg_r(sd, R51x_I2C_DATA); |
| 2407 | PDEBUG(D_USBI, "ov518_i2c_r %02x %02x", reg, value); | 2442 | PDEBUG(D_USBI, "ov518_i2c_r %02x %02x", reg, value); |
| 2408 | return value; | 2443 | return value; |
| @@ -2686,7 +2721,7 @@ static void write_i2c_regvals(struct sd *sd, | |||
| 2686 | * | 2721 | * |
| 2687 | ***************************************************************************/ | 2722 | ***************************************************************************/ |
| 2688 | 2723 | ||
| 2689 | /* This initializes the OV2x10 / OV3610 / OV3620 */ | 2724 | /* This initializes the OV2x10 / OV3610 / OV3620 / OV9600 */ |
| 2690 | static void ov_hires_configure(struct sd *sd) | 2725 | static void ov_hires_configure(struct sd *sd) |
| 2691 | { | 2726 | { |
| 2692 | int high, low; | 2727 | int high, low; |
| @@ -2702,19 +2737,32 @@ static void ov_hires_configure(struct sd *sd) | |||
| 2702 | high = i2c_r(sd, 0x0a); | 2737 | high = i2c_r(sd, 0x0a); |
| 2703 | low = i2c_r(sd, 0x0b); | 2738 | low = i2c_r(sd, 0x0b); |
| 2704 | /* info("%x, %x", high, low); */ | 2739 | /* info("%x, %x", high, low); */ |
| 2705 | if (high == 0x96 && low == 0x40) { | 2740 | switch (high) { |
| 2706 | PDEBUG(D_PROBE, "Sensor is an OV2610"); | 2741 | case 0x96: |
| 2707 | sd->sensor = SEN_OV2610; | 2742 | switch (low) { |
| 2708 | } else if (high == 0x96 && low == 0x41) { | 2743 | case 0x40: |
| 2709 | PDEBUG(D_PROBE, "Sensor is an OV2610AE"); | 2744 | PDEBUG(D_PROBE, "Sensor is a OV2610"); |
| 2710 | sd->sensor = SEN_OV2610AE; | 2745 | sd->sensor = SEN_OV2610; |
| 2711 | } else if (high == 0x36 && (low & 0x0f) == 0x00) { | 2746 | return; |
| 2712 | PDEBUG(D_PROBE, "Sensor is an OV3610"); | 2747 | case 0x41: |
| 2713 | sd->sensor = SEN_OV3610; | 2748 | PDEBUG(D_PROBE, "Sensor is a OV2610AE"); |
| 2714 | } else { | 2749 | sd->sensor = SEN_OV2610AE; |
| 2715 | err("Error unknown sensor type: %02x%02x", | 2750 | return; |
| 2716 | high, low); | 2751 | case 0xb1: |
| 2752 | PDEBUG(D_PROBE, "Sensor is a OV9600"); | ||
| 2753 | sd->sensor = SEN_OV9600; | ||
| 2754 | return; | ||
| 2755 | } | ||
| 2756 | break; | ||
| 2757 | case 0x36: | ||
| 2758 | if ((low & 0x0f) == 0x00) { | ||
| 2759 | PDEBUG(D_PROBE, "Sensor is a OV3610"); | ||
| 2760 | sd->sensor = SEN_OV3610; | ||
| 2761 | return; | ||
| 2762 | } | ||
| 2763 | break; | ||
| 2717 | } | 2764 | } |
| 2765 | err("Error unknown sensor type: %02x%02x", high, low); | ||
| 2718 | } | 2766 | } |
| 2719 | 2767 | ||
| 2720 | /* This initializes the OV8110, OV8610 sensor. The OV8110 uses | 2768 | /* This initializes the OV8110, OV8610 sensor. The OV8110 uses |
| @@ -3400,6 +3448,10 @@ static int sd_init(struct gspca_dev *gspca_dev) | |||
| 3400 | cam->cam_mode = ovfx2_ov3610_mode; | 3448 | cam->cam_mode = ovfx2_ov3610_mode; |
| 3401 | cam->nmodes = ARRAY_SIZE(ovfx2_ov3610_mode); | 3449 | cam->nmodes = ARRAY_SIZE(ovfx2_ov3610_mode); |
| 3402 | break; | 3450 | break; |
| 3451 | case SEN_OV9600: | ||
| 3452 | cam->cam_mode = ovfx2_ov9600_mode; | ||
| 3453 | cam->nmodes = ARRAY_SIZE(ovfx2_ov9600_mode); | ||
| 3454 | break; | ||
| 3403 | default: | 3455 | default: |
| 3404 | if (sd->sif) { | 3456 | if (sd->sif) { |
| 3405 | cam->cam_mode = ov519_sif_mode; | 3457 | cam->cam_mode = ov519_sif_mode; |
| @@ -3497,6 +3549,12 @@ static int sd_init(struct gspca_dev *gspca_dev) | |||
| 3497 | case SEN_OV8610: | 3549 | case SEN_OV8610: |
| 3498 | write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610)); | 3550 | write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610)); |
| 3499 | break; | 3551 | break; |
| 3552 | case SEN_OV9600: | ||
| 3553 | write_i2c_regvals(sd, norm_9600, ARRAY_SIZE(norm_9600)); | ||
| 3554 | |||
| 3555 | /* enable autoexpo */ | ||
| 3556 | /* i2c_w_mask(sd, 0x13, 0x05, 0x05); */ | ||
| 3557 | break; | ||
| 3500 | } | 3558 | } |
| 3501 | return gspca_dev->usb_err; | 3559 | return gspca_dev->usb_err; |
| 3502 | error: | 3560 | error: |
| @@ -4085,6 +4143,33 @@ static void mode_init_ov_sensor_regs(struct sd *sd) | |||
| 4085 | i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20); | 4143 | i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20); |
| 4086 | i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */ | 4144 | i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */ |
| 4087 | break; | 4145 | break; |
| 4146 | case SEN_OV9600: { | ||
| 4147 | const struct ov_i2c_regvals *vals; | ||
| 4148 | static const struct ov_i2c_regvals sxga_15[] = { | ||
| 4149 | {0x11, 0x80}, {0x14, 0x3e}, {0x24, 0x85}, {0x25, 0x75} | ||
| 4150 | }; | ||
| 4151 | static const struct ov_i2c_regvals sxga_7_5[] = { | ||
| 4152 | {0x11, 0x81}, {0x14, 0x3e}, {0x24, 0x85}, {0x25, 0x75} | ||
| 4153 | }; | ||
| 4154 | static const struct ov_i2c_regvals vga_30[] = { | ||
| 4155 | {0x11, 0x81}, {0x14, 0x7e}, {0x24, 0x70}, {0x25, 0x60} | ||
| 4156 | }; | ||
| 4157 | static const struct ov_i2c_regvals vga_15[] = { | ||
| 4158 | {0x11, 0x83}, {0x14, 0x3e}, {0x24, 0x80}, {0x25, 0x70} | ||
| 4159 | }; | ||
| 4160 | |||
| 4161 | /* frame rates: | ||
| 4162 | * 15fps / 7.5 fps for 1280x1024 | ||
| 4163 | * 30fps / 15fps for 640x480 | ||
| 4164 | */ | ||
| 4165 | i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0x40); | ||
| 4166 | if (qvga) | ||
| 4167 | vals = sd->frame_rate < 30 ? vga_15 : vga_30; | ||
| 4168 | else | ||
| 4169 | vals = sd->frame_rate < 15 ? sxga_7_5 : sxga_15; | ||
| 4170 | write_i2c_regvals(sd, vals, ARRAY_SIZE(sxga_15)); | ||
| 4171 | return; | ||
| 4172 | } | ||
| 4088 | default: | 4173 | default: |
| 4089 | return; | 4174 | return; |
| 4090 | } | 4175 | } |
| @@ -4120,6 +4205,7 @@ static void set_ov_sensor_window(struct sd *sd) | |||
| 4120 | case SEN_OV2610AE: | 4205 | case SEN_OV2610AE: |
| 4121 | case SEN_OV3610: | 4206 | case SEN_OV3610: |
| 4122 | case SEN_OV7670: | 4207 | case SEN_OV7670: |
| 4208 | case SEN_OV9600: | ||
| 4123 | mode_init_ov_sensor_regs(sd); | 4209 | mode_init_ov_sensor_regs(sd); |
| 4124 | return; | 4210 | return; |
| 4125 | case SEN_OV7660: | 4211 | case SEN_OV7660: |
| @@ -4920,7 +5006,8 @@ static const struct sd_desc sd_desc = { | |||
| 4920 | static const struct usb_device_id device_table[] = { | 5006 | static const struct usb_device_id device_table[] = { |
| 4921 | {USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF }, | 5007 | {USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF }, |
| 4922 | {USB_DEVICE(0x041e, 0x4052), .driver_info = BRIDGE_OV519 }, | 5008 | {USB_DEVICE(0x041e, 0x4052), .driver_info = BRIDGE_OV519 }, |
| 4923 | {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 }, | 5009 | {USB_DEVICE(0x041e, 0x405f), |
| 5010 | .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED }, | ||
| 4924 | {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 }, | 5011 | {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 }, |
| 4925 | {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 }, | 5012 | {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 }, |
| 4926 | {USB_DEVICE(0x041e, 0x4064), | 5013 | {USB_DEVICE(0x041e, 0x4064), |
diff --git a/drivers/media/video/gspca/se401.c b/drivers/media/video/gspca/se401.c new file mode 100644 index 000000000000..4c283c24c752 --- /dev/null +++ b/drivers/media/video/gspca/se401.c | |||
| @@ -0,0 +1,774 @@ | |||
| 1 | /* | ||
| 2 | * GSPCA Endpoints (formerly known as AOX) se401 USB Camera sub Driver | ||
| 3 | * | ||
| 4 | * Copyright (C) 2011 Hans de Goede <hdegoede@redhat.com> | ||
| 5 | * | ||
| 6 | * Based on the v4l1 se401 driver which is: | ||
| 7 | * | ||
| 8 | * Copyright (c) 2000 Jeroen B. Vreeken (pe1rxq@amsat.org) | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License as published by | ||
| 12 | * the Free Software Foundation; either version 2 of the License, or | ||
| 13 | * (at your option) any later version. | ||
| 14 | * | ||
| 15 | * This program is distributed in the hope that it will be useful, | ||
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 18 | * GNU General Public License for more details. | ||
| 19 | * | ||
| 20 | * You should have received a copy of the GNU General Public License | ||
| 21 | * along with this program; if not, write to the Free Software | ||
| 22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 23 | * | ||
| 24 | */ | ||
| 25 | |||
| 26 | #define MODULE_NAME "se401" | ||
| 27 | |||
| 28 | #define BULK_SIZE 4096 | ||
| 29 | #define PACKET_SIZE 1024 | ||
| 30 | #define READ_REQ_SIZE 64 | ||
| 31 | #define MAX_MODES ((READ_REQ_SIZE - 6) / 4) | ||
| 32 | /* The se401 compression algorithm uses a fixed quant factor, which | ||
| 33 | can be configured by setting the high nibble of the SE401_OPERATINGMODE | ||
| 34 | feature. This needs to exactly match what is in libv4l! */ | ||
| 35 | #define SE401_QUANT_FACT 8 | ||
| 36 | |||
| 37 | #include <linux/input.h> | ||
| 38 | #include <linux/slab.h> | ||
| 39 | #include "gspca.h" | ||
| 40 | #include "se401.h" | ||
| 41 | |||
| 42 | MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>"); | ||
| 43 | MODULE_DESCRIPTION("Endpoints se401"); | ||
| 44 | MODULE_LICENSE("GPL"); | ||
| 45 | |||
| 46 | /* controls */ | ||
| 47 | enum e_ctrl { | ||
| 48 | BRIGHTNESS, | ||
| 49 | GAIN, | ||
| 50 | EXPOSURE, | ||
| 51 | FREQ, | ||
| 52 | NCTRL /* number of controls */ | ||
| 53 | }; | ||
| 54 | |||
| 55 | /* exposure change state machine states */ | ||
| 56 | enum { | ||
| 57 | EXPO_CHANGED, | ||
| 58 | EXPO_DROP_FRAME, | ||
| 59 | EXPO_NO_CHANGE, | ||
| 60 | }; | ||
| 61 | |||
| 62 | /* specific webcam descriptor */ | ||
| 63 | struct sd { | ||
| 64 | struct gspca_dev gspca_dev; /* !! must be the first item */ | ||
| 65 | struct gspca_ctrl ctrls[NCTRL]; | ||
| 66 | struct v4l2_pix_format fmts[MAX_MODES]; | ||
| 67 | int pixels_read; | ||
| 68 | int packet_read; | ||
| 69 | u8 packet[PACKET_SIZE]; | ||
| 70 | u8 restart_stream; | ||
| 71 | u8 button_state; | ||
| 72 | u8 resetlevel; | ||
| 73 | u8 resetlevel_frame_count; | ||
| 74 | int resetlevel_adjust_dir; | ||
| 75 | int expo_change_state; | ||
| 76 | }; | ||
| 77 | |||
| 78 | static void setbrightness(struct gspca_dev *gspca_dev); | ||
| 79 | static void setgain(struct gspca_dev *gspca_dev); | ||
| 80 | static void setexposure(struct gspca_dev *gspca_dev); | ||
| 81 | |||
| 82 | static const struct ctrl sd_ctrls[NCTRL] = { | ||
| 83 | [BRIGHTNESS] = { | ||
| 84 | { | ||
| 85 | .id = V4L2_CID_BRIGHTNESS, | ||
| 86 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 87 | .name = "Brightness", | ||
| 88 | .minimum = 0, | ||
| 89 | .maximum = 255, | ||
| 90 | .step = 1, | ||
| 91 | .default_value = 15, | ||
| 92 | }, | ||
| 93 | .set_control = setbrightness | ||
| 94 | }, | ||
| 95 | [GAIN] = { | ||
| 96 | { | ||
| 97 | .id = V4L2_CID_GAIN, | ||
| 98 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 99 | .name = "Gain", | ||
| 100 | .minimum = 0, | ||
| 101 | .maximum = 50, /* Really 63 but > 50 is not pretty */ | ||
| 102 | .step = 1, | ||
| 103 | .default_value = 25, | ||
| 104 | }, | ||
| 105 | .set_control = setgain | ||
| 106 | }, | ||
| 107 | [EXPOSURE] = { | ||
| 108 | { | ||
| 109 | .id = V4L2_CID_EXPOSURE, | ||
| 110 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 111 | .name = "Exposure", | ||
| 112 | .minimum = 0, | ||
| 113 | .maximum = 32767, | ||
| 114 | .step = 1, | ||
| 115 | .default_value = 15000, | ||
| 116 | }, | ||
| 117 | .set_control = setexposure | ||
| 118 | }, | ||
| 119 | [FREQ] = { | ||
| 120 | { | ||
| 121 | .id = V4L2_CID_POWER_LINE_FREQUENCY, | ||
| 122 | .type = V4L2_CTRL_TYPE_MENU, | ||
| 123 | .name = "Light frequency filter", | ||
| 124 | .minimum = 0, | ||
| 125 | .maximum = 2, | ||
| 126 | .step = 1, | ||
| 127 | .default_value = 0, | ||
| 128 | }, | ||
| 129 | .set_control = setexposure | ||
| 130 | }, | ||
| 131 | }; | ||
| 132 | |||
| 133 | static void se401_write_req(struct gspca_dev *gspca_dev, u16 req, u16 value, | ||
| 134 | int silent) | ||
| 135 | { | ||
| 136 | int err; | ||
| 137 | |||
| 138 | if (gspca_dev->usb_err < 0) | ||
| 139 | return; | ||
| 140 | |||
| 141 | err = usb_control_msg(gspca_dev->dev, | ||
| 142 | usb_sndctrlpipe(gspca_dev->dev, 0), req, | ||
| 143 | USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | ||
| 144 | value, 0, NULL, 0, 1000); | ||
| 145 | if (err < 0) { | ||
| 146 | if (!silent) | ||
| 147 | err("write req failed req %#04x val %#04x error %d", | ||
| 148 | req, value, err); | ||
| 149 | gspca_dev->usb_err = err; | ||
| 150 | } | ||
| 151 | } | ||
| 152 | |||
| 153 | static void se401_read_req(struct gspca_dev *gspca_dev, u16 req, int silent) | ||
| 154 | { | ||
| 155 | int err; | ||
| 156 | |||
| 157 | if (gspca_dev->usb_err < 0) | ||
| 158 | return; | ||
| 159 | |||
| 160 | if (USB_BUF_SZ < READ_REQ_SIZE) { | ||
| 161 | err("USB_BUF_SZ too small!!"); | ||
| 162 | gspca_dev->usb_err = -ENOBUFS; | ||
| 163 | return; | ||
| 164 | } | ||
| 165 | |||
| 166 | err = usb_control_msg(gspca_dev->dev, | ||
| 167 | usb_rcvctrlpipe(gspca_dev->dev, 0), req, | ||
| 168 | USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | ||
| 169 | 0, 0, gspca_dev->usb_buf, READ_REQ_SIZE, 1000); | ||
| 170 | if (err < 0) { | ||
| 171 | if (!silent) | ||
| 172 | err("read req failed req %#04x error %d", req, err); | ||
| 173 | gspca_dev->usb_err = err; | ||
| 174 | } | ||
| 175 | } | ||
| 176 | |||
| 177 | static void se401_set_feature(struct gspca_dev *gspca_dev, | ||
| 178 | u16 selector, u16 param) | ||
| 179 | { | ||
| 180 | int err; | ||
| 181 | |||
| 182 | if (gspca_dev->usb_err < 0) | ||
| 183 | return; | ||
| 184 | |||
| 185 | err = usb_control_msg(gspca_dev->dev, | ||
| 186 | usb_sndctrlpipe(gspca_dev->dev, 0), | ||
| 187 | SE401_REQ_SET_EXT_FEATURE, | ||
| 188 | USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | ||
| 189 | param, selector, NULL, 0, 1000); | ||
| 190 | if (err < 0) { | ||
| 191 | err("set feature failed sel %#04x param %#04x error %d", | ||
| 192 | selector, param, err); | ||
| 193 | gspca_dev->usb_err = err; | ||
| 194 | } | ||
| 195 | } | ||
| 196 | |||
| 197 | static int se401_get_feature(struct gspca_dev *gspca_dev, u16 selector) | ||
| 198 | { | ||
| 199 | int err; | ||
| 200 | |||
| 201 | if (gspca_dev->usb_err < 0) | ||
| 202 | return gspca_dev->usb_err; | ||
| 203 | |||
| 204 | if (USB_BUF_SZ < 2) { | ||
| 205 | err("USB_BUF_SZ too small!!"); | ||
| 206 | gspca_dev->usb_err = -ENOBUFS; | ||
| 207 | return gspca_dev->usb_err; | ||
| 208 | } | ||
| 209 | |||
| 210 | err = usb_control_msg(gspca_dev->dev, | ||
| 211 | usb_rcvctrlpipe(gspca_dev->dev, 0), | ||
| 212 | SE401_REQ_GET_EXT_FEATURE, | ||
| 213 | USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | ||
| 214 | 0, selector, gspca_dev->usb_buf, 2, 1000); | ||
| 215 | if (err < 0) { | ||
| 216 | err("get feature failed sel %#04x error %d", selector, err); | ||
| 217 | gspca_dev->usb_err = err; | ||
| 218 | return err; | ||
| 219 | } | ||
| 220 | return gspca_dev->usb_buf[0] | (gspca_dev->usb_buf[1] << 8); | ||
| 221 | } | ||
| 222 | |||
| 223 | static void setbrightness(struct gspca_dev *gspca_dev) | ||
| 224 | { | ||
| 225 | struct sd *sd = (struct sd *) gspca_dev; | ||
| 226 | |||
| 227 | if (gspca_dev->ctrl_dis & (1 << BRIGHTNESS)) | ||
| 228 | return; | ||
| 229 | |||
| 230 | /* HDG: this does not seem to do anything on my cam */ | ||
| 231 | se401_write_req(gspca_dev, SE401_REQ_SET_BRT, | ||
| 232 | sd->ctrls[BRIGHTNESS].val, 0); | ||
| 233 | } | ||
| 234 | |||
| 235 | static void setgain(struct gspca_dev *gspca_dev) | ||
| 236 | { | ||
| 237 | struct sd *sd = (struct sd *) gspca_dev; | ||
| 238 | u16 gain = 63 - sd->ctrls[GAIN].val; | ||
| 239 | |||
| 240 | /* red color gain */ | ||
| 241 | se401_set_feature(gspca_dev, HV7131_REG_ARCG, gain); | ||
| 242 | /* green color gain */ | ||
| 243 | se401_set_feature(gspca_dev, HV7131_REG_AGCG, gain); | ||
| 244 | /* blue color gain */ | ||
| 245 | se401_set_feature(gspca_dev, HV7131_REG_ABCG, gain); | ||
| 246 | } | ||
| 247 | |||
| 248 | static void setexposure(struct gspca_dev *gspca_dev) | ||
| 249 | { | ||
| 250 | struct sd *sd = (struct sd *) gspca_dev; | ||
| 251 | int integration = sd->ctrls[EXPOSURE].val << 6; | ||
| 252 | u8 expose_h, expose_m, expose_l; | ||
| 253 | |||
| 254 | /* Do this before the set_feature calls, for proper timing wrt | ||
| 255 | the interrupt driven pkt_scan. Note we may still race but that | ||
| 256 | is not a big issue, the expo change state machine is merely for | ||
| 257 | avoiding underexposed frames getting send out, if one sneaks | ||
| 258 | through so be it */ | ||
| 259 | sd->expo_change_state = EXPO_CHANGED; | ||
| 260 | |||
| 261 | if (sd->ctrls[FREQ].val == V4L2_CID_POWER_LINE_FREQUENCY_50HZ) | ||
| 262 | integration = integration - integration % 106667; | ||
| 263 | if (sd->ctrls[FREQ].val == V4L2_CID_POWER_LINE_FREQUENCY_60HZ) | ||
| 264 | integration = integration - integration % 88889; | ||
| 265 | |||
| 266 | expose_h = (integration >> 16); | ||
| 267 | expose_m = (integration >> 8); | ||
| 268 | expose_l = integration; | ||
| 269 | |||
| 270 | /* integration time low */ | ||
| 271 | se401_set_feature(gspca_dev, HV7131_REG_TITL, expose_l); | ||
| 272 | /* integration time mid */ | ||
| 273 | se401_set_feature(gspca_dev, HV7131_REG_TITM, expose_m); | ||
| 274 | /* integration time high */ | ||
| 275 | se401_set_feature(gspca_dev, HV7131_REG_TITU, expose_h); | ||
| 276 | } | ||
| 277 | |||
| 278 | static int sd_config(struct gspca_dev *gspca_dev, | ||
| 279 | const struct usb_device_id *id) | ||
| 280 | { | ||
| 281 | struct sd *sd = (struct sd *)gspca_dev; | ||
| 282 | struct cam *cam = &gspca_dev->cam; | ||
| 283 | u8 *cd = gspca_dev->usb_buf; | ||
| 284 | int i, j, n; | ||
| 285 | int widths[MAX_MODES], heights[MAX_MODES]; | ||
| 286 | |||
| 287 | /* Read the camera descriptor */ | ||
| 288 | se401_read_req(gspca_dev, SE401_REQ_GET_CAMERA_DESCRIPTOR, 1); | ||
| 289 | if (gspca_dev->usb_err) { | ||
| 290 | /* Sometimes after being idle for a while the se401 won't | ||
| 291 | respond and needs a good kicking */ | ||
| 292 | usb_reset_device(gspca_dev->dev); | ||
| 293 | gspca_dev->usb_err = 0; | ||
| 294 | se401_read_req(gspca_dev, SE401_REQ_GET_CAMERA_DESCRIPTOR, 0); | ||
| 295 | } | ||
| 296 | |||
| 297 | /* Some cameras start with their LED on */ | ||
| 298 | se401_write_req(gspca_dev, SE401_REQ_LED_CONTROL, 0, 0); | ||
| 299 | if (gspca_dev->usb_err) | ||
| 300 | return gspca_dev->usb_err; | ||
| 301 | |||
| 302 | if (cd[1] != 0x41) { | ||
| 303 | err("Wrong descriptor type"); | ||
| 304 | return -ENODEV; | ||
| 305 | } | ||
| 306 | |||
| 307 | if (!(cd[2] & SE401_FORMAT_BAYER)) { | ||
| 308 | err("Bayer format not supported!"); | ||
| 309 | return -ENODEV; | ||
| 310 | } | ||
| 311 | |||
| 312 | if (cd[3]) | ||
| 313 | info("ExtraFeatures: %d", cd[3]); | ||
| 314 | |||
| 315 | n = cd[4] | (cd[5] << 8); | ||
| 316 | if (n > MAX_MODES) { | ||
| 317 | err("Too many frame sizes"); | ||
| 318 | return -ENODEV; | ||
| 319 | } | ||
| 320 | |||
| 321 | for (i = 0; i < n ; i++) { | ||
| 322 | widths[i] = cd[6 + i * 4 + 0] | (cd[6 + i * 4 + 1] << 8); | ||
| 323 | heights[i] = cd[6 + i * 4 + 2] | (cd[6 + i * 4 + 3] << 8); | ||
| 324 | } | ||
| 325 | |||
| 326 | for (i = 0; i < n ; i++) { | ||
| 327 | sd->fmts[i].width = widths[i]; | ||
| 328 | sd->fmts[i].height = heights[i]; | ||
| 329 | sd->fmts[i].field = V4L2_FIELD_NONE; | ||
| 330 | sd->fmts[i].colorspace = V4L2_COLORSPACE_SRGB; | ||
| 331 | sd->fmts[i].priv = 1; | ||
| 332 | |||
| 333 | /* janggu compression only works for 1/4th or 1/16th res */ | ||
| 334 | for (j = 0; j < n; j++) { | ||
| 335 | if (widths[j] / 2 == widths[i] && | ||
| 336 | heights[j] / 2 == heights[i]) { | ||
| 337 | sd->fmts[i].priv = 2; | ||
| 338 | break; | ||
| 339 | } | ||
| 340 | } | ||
| 341 | /* 1/16th if available too is better then 1/4th, because | ||
| 342 | we then use a larger area of the sensor */ | ||
| 343 | for (j = 0; j < n; j++) { | ||
| 344 | if (widths[j] / 4 == widths[i] && | ||
| 345 | heights[j] / 4 == heights[i]) { | ||
| 346 | sd->fmts[i].priv = 4; | ||
| 347 | break; | ||
| 348 | } | ||
| 349 | } | ||
| 350 | |||
| 351 | if (sd->fmts[i].priv == 1) { | ||
| 352 | /* Not a 1/4th or 1/16th res, use bayer */ | ||
| 353 | sd->fmts[i].pixelformat = V4L2_PIX_FMT_SBGGR8; | ||
| 354 | sd->fmts[i].bytesperline = widths[i]; | ||
| 355 | sd->fmts[i].sizeimage = widths[i] * heights[i]; | ||
| 356 | info("Frame size: %dx%d bayer", widths[i], heights[i]); | ||
| 357 | } else { | ||
| 358 | /* Found a match use janggu compression */ | ||
| 359 | sd->fmts[i].pixelformat = V4L2_PIX_FMT_SE401; | ||
| 360 | sd->fmts[i].bytesperline = 0; | ||
| 361 | sd->fmts[i].sizeimage = widths[i] * heights[i] * 3; | ||
| 362 | info("Frame size: %dx%d 1/%dth janggu", | ||
| 363 | widths[i], heights[i], | ||
| 364 | sd->fmts[i].priv * sd->fmts[i].priv); | ||
| 365 | } | ||
| 366 | } | ||
| 367 | |||
| 368 | cam->cam_mode = sd->fmts; | ||
| 369 | cam->nmodes = n; | ||
| 370 | cam->bulk = 1; | ||
| 371 | cam->bulk_size = BULK_SIZE; | ||
| 372 | cam->bulk_nurbs = 4; | ||
| 373 | cam->ctrls = sd->ctrls; | ||
| 374 | gspca_dev->nbalt = 1; /* Ignore the bogus isoc alt settings */ | ||
| 375 | sd->resetlevel = 0x2d; /* Set initial resetlevel */ | ||
| 376 | |||
| 377 | /* See if the camera supports brightness */ | ||
| 378 | se401_read_req(gspca_dev, SE401_REQ_GET_BRT, 1); | ||
| 379 | if (gspca_dev->usb_err) { | ||
| 380 | gspca_dev->ctrl_dis = (1 << BRIGHTNESS); | ||
| 381 | gspca_dev->usb_err = 0; | ||
| 382 | } | ||
| 383 | |||
| 384 | return 0; | ||
| 385 | } | ||
| 386 | |||
| 387 | /* this function is called at probe and resume time */ | ||
| 388 | static int sd_init(struct gspca_dev *gspca_dev) | ||
| 389 | { | ||
| 390 | return 0; | ||
| 391 | } | ||
| 392 | |||
| 393 | /* -- start the camera -- */ | ||
| 394 | static int sd_start(struct gspca_dev *gspca_dev) | ||
| 395 | { | ||
| 396 | struct sd *sd = (struct sd *)gspca_dev; | ||
| 397 | int mult = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv; | ||
| 398 | int mode = 0; | ||
| 399 | |||
| 400 | se401_write_req(gspca_dev, SE401_REQ_CAMERA_POWER, 1, 1); | ||
| 401 | if (gspca_dev->usb_err) { | ||
| 402 | /* Sometimes after being idle for a while the se401 won't | ||
| 403 | respond and needs a good kicking */ | ||
| 404 | usb_reset_device(gspca_dev->dev); | ||
| 405 | gspca_dev->usb_err = 0; | ||
| 406 | se401_write_req(gspca_dev, SE401_REQ_CAMERA_POWER, 1, 0); | ||
| 407 | } | ||
| 408 | se401_write_req(gspca_dev, SE401_REQ_LED_CONTROL, 1, 0); | ||
| 409 | |||
| 410 | se401_set_feature(gspca_dev, HV7131_REG_MODE_B, 0x05); | ||
| 411 | |||
| 412 | /* set size + mode */ | ||
| 413 | se401_write_req(gspca_dev, SE401_REQ_SET_WIDTH, | ||
| 414 | gspca_dev->width * mult, 0); | ||
| 415 | se401_write_req(gspca_dev, SE401_REQ_SET_HEIGHT, | ||
| 416 | gspca_dev->height * mult, 0); | ||
| 417 | /* | ||
| 418 | * HDG: disabled this as it does not seem to do anything | ||
| 419 | * se401_write_req(gspca_dev, SE401_REQ_SET_OUTPUT_MODE, | ||
| 420 | * SE401_FORMAT_BAYER, 0); | ||
| 421 | */ | ||
| 422 | |||
| 423 | switch (mult) { | ||
| 424 | case 1: /* Raw bayer */ | ||
| 425 | mode = 0x03; break; | ||
| 426 | case 2: /* 1/4th janggu */ | ||
| 427 | mode = SE401_QUANT_FACT << 4; break; | ||
| 428 | case 4: /* 1/16th janggu */ | ||
| 429 | mode = (SE401_QUANT_FACT << 4) | 0x02; break; | ||
| 430 | } | ||
| 431 | se401_set_feature(gspca_dev, SE401_OPERATINGMODE, mode); | ||
| 432 | |||
| 433 | setbrightness(gspca_dev); | ||
| 434 | setgain(gspca_dev); | ||
| 435 | setexposure(gspca_dev); | ||
| 436 | se401_set_feature(gspca_dev, HV7131_REG_ARLV, sd->resetlevel); | ||
| 437 | |||
| 438 | sd->packet_read = 0; | ||
| 439 | sd->pixels_read = 0; | ||
| 440 | sd->restart_stream = 0; | ||
| 441 | sd->resetlevel_frame_count = 0; | ||
| 442 | sd->resetlevel_adjust_dir = 0; | ||
| 443 | sd->expo_change_state = EXPO_NO_CHANGE; | ||
| 444 | |||
| 445 | se401_write_req(gspca_dev, SE401_REQ_START_CONTINUOUS_CAPTURE, 0, 0); | ||
| 446 | |||
| 447 | return gspca_dev->usb_err; | ||
| 448 | } | ||
| 449 | |||
| 450 | static void sd_stopN(struct gspca_dev *gspca_dev) | ||
| 451 | { | ||
| 452 | se401_write_req(gspca_dev, SE401_REQ_STOP_CONTINUOUS_CAPTURE, 0, 0); | ||
| 453 | se401_write_req(gspca_dev, SE401_REQ_LED_CONTROL, 0, 0); | ||
| 454 | se401_write_req(gspca_dev, SE401_REQ_CAMERA_POWER, 0, 0); | ||
| 455 | } | ||
| 456 | |||
| 457 | static void sd_dq_callback(struct gspca_dev *gspca_dev) | ||
| 458 | { | ||
| 459 | struct sd *sd = (struct sd *)gspca_dev; | ||
| 460 | unsigned int ahrc, alrc; | ||
| 461 | int oldreset, adjust_dir; | ||
| 462 | |||
| 463 | /* Restart the stream if requested do so by pkt_scan */ | ||
| 464 | if (sd->restart_stream) { | ||
| 465 | sd_stopN(gspca_dev); | ||
| 466 | sd_start(gspca_dev); | ||
| 467 | sd->restart_stream = 0; | ||
| 468 | } | ||
| 469 | |||
| 470 | /* Automatically adjust sensor reset level | ||
| 471 | Hyundai have some really nice docs about this and other sensor | ||
| 472 | related stuff on their homepage: www.hei.co.kr */ | ||
| 473 | sd->resetlevel_frame_count++; | ||
| 474 | if (sd->resetlevel_frame_count < 20) | ||
| 475 | return; | ||
| 476 | |||
| 477 | /* For some reason this normally read-only register doesn't get reset | ||
| 478 | to zero after reading them just once... */ | ||
| 479 | se401_get_feature(gspca_dev, HV7131_REG_HIREFNOH); | ||
| 480 | se401_get_feature(gspca_dev, HV7131_REG_HIREFNOL); | ||
| 481 | se401_get_feature(gspca_dev, HV7131_REG_LOREFNOH); | ||
| 482 | se401_get_feature(gspca_dev, HV7131_REG_LOREFNOL); | ||
| 483 | ahrc = 256*se401_get_feature(gspca_dev, HV7131_REG_HIREFNOH) + | ||
| 484 | se401_get_feature(gspca_dev, HV7131_REG_HIREFNOL); | ||
| 485 | alrc = 256*se401_get_feature(gspca_dev, HV7131_REG_LOREFNOH) + | ||
| 486 | se401_get_feature(gspca_dev, HV7131_REG_LOREFNOL); | ||
| 487 | |||
| 488 | /* Not an exact science, but it seems to work pretty well... */ | ||
| 489 | oldreset = sd->resetlevel; | ||
| 490 | if (alrc > 10) { | ||
| 491 | while (alrc >= 10 && sd->resetlevel < 63) { | ||
| 492 | sd->resetlevel++; | ||
| 493 | alrc /= 2; | ||
| 494 | } | ||
| 495 | } else if (ahrc > 20) { | ||
| 496 | while (ahrc >= 20 && sd->resetlevel > 0) { | ||
| 497 | sd->resetlevel--; | ||
| 498 | ahrc /= 2; | ||
| 499 | } | ||
| 500 | } | ||
| 501 | /* Detect ping-pong-ing and halve adjustment to avoid overshoot */ | ||
| 502 | if (sd->resetlevel > oldreset) | ||
| 503 | adjust_dir = 1; | ||
| 504 | else | ||
| 505 | adjust_dir = -1; | ||
| 506 | if (sd->resetlevel_adjust_dir && | ||
| 507 | sd->resetlevel_adjust_dir != adjust_dir) | ||
| 508 | sd->resetlevel = oldreset + (sd->resetlevel - oldreset) / 2; | ||
| 509 | |||
| 510 | if (sd->resetlevel != oldreset) { | ||
| 511 | sd->resetlevel_adjust_dir = adjust_dir; | ||
| 512 | se401_set_feature(gspca_dev, HV7131_REG_ARLV, sd->resetlevel); | ||
| 513 | } | ||
| 514 | |||
| 515 | sd->resetlevel_frame_count = 0; | ||
| 516 | } | ||
| 517 | |||
| 518 | static void sd_complete_frame(struct gspca_dev *gspca_dev, u8 *data, int len) | ||
| 519 | { | ||
| 520 | struct sd *sd = (struct sd *)gspca_dev; | ||
| 521 | |||
| 522 | switch (sd->expo_change_state) { | ||
| 523 | case EXPO_CHANGED: | ||
| 524 | /* The exposure was changed while this frame | ||
| 525 | was being send, so this frame is ok */ | ||
| 526 | sd->expo_change_state = EXPO_DROP_FRAME; | ||
| 527 | break; | ||
| 528 | case EXPO_DROP_FRAME: | ||
| 529 | /* The exposure was changed while this frame | ||
| 530 | was being captured, drop it! */ | ||
| 531 | gspca_dev->last_packet_type = DISCARD_PACKET; | ||
| 532 | sd->expo_change_state = EXPO_NO_CHANGE; | ||
| 533 | break; | ||
| 534 | case EXPO_NO_CHANGE: | ||
| 535 | break; | ||
| 536 | } | ||
| 537 | gspca_frame_add(gspca_dev, LAST_PACKET, data, len); | ||
| 538 | } | ||
| 539 | |||
| 540 | static void sd_pkt_scan_janggu(struct gspca_dev *gspca_dev, u8 *data, int len) | ||
| 541 | { | ||
| 542 | struct sd *sd = (struct sd *)gspca_dev; | ||
| 543 | int imagesize = gspca_dev->width * gspca_dev->height; | ||
| 544 | int i, plen, bits, pixels, info, count; | ||
| 545 | |||
| 546 | if (sd->restart_stream) | ||
| 547 | return; | ||
| 548 | |||
| 549 | /* Sometimes a 1024 bytes garbage bulk packet is send between frames */ | ||
| 550 | if (gspca_dev->last_packet_type == LAST_PACKET && len == 1024) { | ||
| 551 | gspca_dev->last_packet_type = DISCARD_PACKET; | ||
| 552 | return; | ||
| 553 | } | ||
| 554 | |||
| 555 | i = 0; | ||
| 556 | while (i < len) { | ||
| 557 | /* Read header if not already be present from prev bulk pkt */ | ||
| 558 | if (sd->packet_read < 4) { | ||
| 559 | count = 4 - sd->packet_read; | ||
| 560 | if (count > len - i) | ||
| 561 | count = len - i; | ||
| 562 | memcpy(&sd->packet[sd->packet_read], &data[i], count); | ||
| 563 | sd->packet_read += count; | ||
| 564 | i += count; | ||
| 565 | if (sd->packet_read < 4) | ||
| 566 | break; | ||
| 567 | } | ||
| 568 | bits = sd->packet[3] + (sd->packet[2] << 8); | ||
| 569 | pixels = sd->packet[1] + ((sd->packet[0] & 0x3f) << 8); | ||
| 570 | info = (sd->packet[0] & 0xc0) >> 6; | ||
| 571 | plen = ((bits + 47) >> 4) << 1; | ||
| 572 | /* Sanity checks */ | ||
| 573 | if (plen > 1024) { | ||
| 574 | err("invalid packet len %d restarting stream", plen); | ||
| 575 | goto error; | ||
| 576 | } | ||
| 577 | if (info == 3) { | ||
| 578 | err("unknown frame info value restarting stream"); | ||
| 579 | goto error; | ||
| 580 | } | ||
| 581 | |||
| 582 | /* Read (remainder of) packet contents */ | ||
| 583 | count = plen - sd->packet_read; | ||
| 584 | if (count > len - i) | ||
| 585 | count = len - i; | ||
| 586 | memcpy(&sd->packet[sd->packet_read], &data[i], count); | ||
| 587 | sd->packet_read += count; | ||
| 588 | i += count; | ||
| 589 | if (sd->packet_read < plen) | ||
| 590 | break; | ||
| 591 | |||
| 592 | sd->pixels_read += pixels; | ||
| 593 | sd->packet_read = 0; | ||
| 594 | |||
| 595 | switch (info) { | ||
| 596 | case 0: /* Frame data */ | ||
| 597 | gspca_frame_add(gspca_dev, INTER_PACKET, sd->packet, | ||
| 598 | plen); | ||
| 599 | break; | ||
| 600 | case 1: /* EOF */ | ||
| 601 | if (sd->pixels_read != imagesize) { | ||
| 602 | err("frame size %d expected %d", | ||
| 603 | sd->pixels_read, imagesize); | ||
| 604 | goto error; | ||
| 605 | } | ||
| 606 | sd_complete_frame(gspca_dev, sd->packet, plen); | ||
| 607 | return; /* Discard the rest of the bulk packet !! */ | ||
| 608 | case 2: /* SOF */ | ||
| 609 | gspca_frame_add(gspca_dev, FIRST_PACKET, sd->packet, | ||
| 610 | plen); | ||
| 611 | sd->pixels_read = pixels; | ||
| 612 | break; | ||
| 613 | } | ||
| 614 | } | ||
| 615 | return; | ||
| 616 | |||
| 617 | error: | ||
| 618 | sd->restart_stream = 1; | ||
| 619 | /* Give userspace a 0 bytes frame, so our dq callback gets | ||
| 620 | called and it can restart the stream */ | ||
| 621 | gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0); | ||
| 622 | gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0); | ||
| 623 | } | ||
| 624 | |||
| 625 | static void sd_pkt_scan_bayer(struct gspca_dev *gspca_dev, u8 *data, int len) | ||
| 626 | { | ||
| 627 | struct cam *cam = &gspca_dev->cam; | ||
| 628 | int imagesize = cam->cam_mode[gspca_dev->curr_mode].sizeimage; | ||
| 629 | |||
| 630 | if (gspca_dev->image_len == 0) { | ||
| 631 | gspca_frame_add(gspca_dev, FIRST_PACKET, data, len); | ||
| 632 | return; | ||
| 633 | } | ||
| 634 | |||
| 635 | if (gspca_dev->image_len + len >= imagesize) { | ||
| 636 | sd_complete_frame(gspca_dev, data, len); | ||
| 637 | return; | ||
| 638 | } | ||
| 639 | |||
| 640 | gspca_frame_add(gspca_dev, INTER_PACKET, data, len); | ||
| 641 | } | ||
| 642 | |||
| 643 | static void sd_pkt_scan(struct gspca_dev *gspca_dev, u8 *data, int len) | ||
| 644 | { | ||
| 645 | int mult = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv; | ||
| 646 | |||
| 647 | if (len == 0) | ||
| 648 | return; | ||
| 649 | |||
| 650 | if (mult == 1) /* mult == 1 means raw bayer */ | ||
| 651 | sd_pkt_scan_bayer(gspca_dev, data, len); | ||
| 652 | else | ||
| 653 | sd_pkt_scan_janggu(gspca_dev, data, len); | ||
| 654 | } | ||
| 655 | |||
| 656 | static int sd_querymenu(struct gspca_dev *gspca_dev, | ||
| 657 | struct v4l2_querymenu *menu) | ||
| 658 | { | ||
| 659 | switch (menu->id) { | ||
| 660 | case V4L2_CID_POWER_LINE_FREQUENCY: | ||
| 661 | switch (menu->index) { | ||
| 662 | case V4L2_CID_POWER_LINE_FREQUENCY_DISABLED: | ||
| 663 | strcpy((char *) menu->name, "NoFliker"); | ||
| 664 | return 0; | ||
| 665 | case V4L2_CID_POWER_LINE_FREQUENCY_50HZ: | ||
| 666 | strcpy((char *) menu->name, "50 Hz"); | ||
| 667 | return 0; | ||
| 668 | case V4L2_CID_POWER_LINE_FREQUENCY_60HZ: | ||
| 669 | strcpy((char *) menu->name, "60 Hz"); | ||
| 670 | return 0; | ||
| 671 | } | ||
| 672 | break; | ||
| 673 | } | ||
| 674 | return -EINVAL; | ||
| 675 | } | ||
| 676 | |||
| 677 | #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE) | ||
| 678 | static int sd_int_pkt_scan(struct gspca_dev *gspca_dev, u8 *data, int len) | ||
| 679 | { | ||
| 680 | struct sd *sd = (struct sd *)gspca_dev; | ||
| 681 | u8 state; | ||
| 682 | |||
| 683 | if (len != 2) | ||
| 684 | return -EINVAL; | ||
| 685 | |||
| 686 | switch (data[0]) { | ||
| 687 | case 0: | ||
| 688 | case 1: | ||
| 689 | state = data[0]; | ||
| 690 | break; | ||
| 691 | default: | ||
| 692 | return -EINVAL; | ||
| 693 | } | ||
| 694 | if (sd->button_state != state) { | ||
| 695 | input_report_key(gspca_dev->input_dev, KEY_CAMERA, state); | ||
| 696 | input_sync(gspca_dev->input_dev); | ||
| 697 | sd->button_state = state; | ||
| 698 | } | ||
| 699 | |||
| 700 | return 0; | ||
| 701 | } | ||
| 702 | #endif | ||
| 703 | |||
| 704 | /* sub-driver description */ | ||
| 705 | static const struct sd_desc sd_desc = { | ||
| 706 | .name = MODULE_NAME, | ||
| 707 | .ctrls = sd_ctrls, | ||
| 708 | .nctrls = ARRAY_SIZE(sd_ctrls), | ||
| 709 | .config = sd_config, | ||
| 710 | .init = sd_init, | ||
| 711 | .start = sd_start, | ||
| 712 | .stopN = sd_stopN, | ||
| 713 | .dq_callback = sd_dq_callback, | ||
| 714 | .pkt_scan = sd_pkt_scan, | ||
| 715 | .querymenu = sd_querymenu, | ||
| 716 | #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE) | ||
| 717 | .int_pkt_scan = sd_int_pkt_scan, | ||
| 718 | #endif | ||
| 719 | }; | ||
| 720 | |||
| 721 | /* -- module initialisation -- */ | ||
| 722 | static const struct usb_device_id device_table[] = { | ||
| 723 | {USB_DEVICE(0x03e8, 0x0004)}, /* Endpoints/Aox SE401 */ | ||
| 724 | {USB_DEVICE(0x0471, 0x030b)}, /* Philips PCVC665K */ | ||
| 725 | {USB_DEVICE(0x047d, 0x5001)}, /* Kensington 67014 */ | ||
| 726 | {USB_DEVICE(0x047d, 0x5002)}, /* Kensington 6701(5/7) */ | ||
| 727 | {USB_DEVICE(0x047d, 0x5003)}, /* Kensington 67016 */ | ||
| 728 | {} | ||
| 729 | }; | ||
| 730 | MODULE_DEVICE_TABLE(usb, device_table); | ||
| 731 | |||
| 732 | /* -- device connect -- */ | ||
| 733 | static int sd_probe(struct usb_interface *intf, | ||
| 734 | const struct usb_device_id *id) | ||
| 735 | { | ||
| 736 | return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd), | ||
| 737 | THIS_MODULE); | ||
| 738 | } | ||
| 739 | |||
| 740 | static int sd_pre_reset(struct usb_interface *intf) | ||
| 741 | { | ||
| 742 | return 0; | ||
| 743 | } | ||
| 744 | |||
| 745 | static int sd_post_reset(struct usb_interface *intf) | ||
| 746 | { | ||
| 747 | return 0; | ||
| 748 | } | ||
| 749 | |||
| 750 | static struct usb_driver sd_driver = { | ||
| 751 | .name = MODULE_NAME, | ||
| 752 | .id_table = device_table, | ||
| 753 | .probe = sd_probe, | ||
| 754 | .disconnect = gspca_disconnect, | ||
| 755 | #ifdef CONFIG_PM | ||
| 756 | .suspend = gspca_suspend, | ||
| 757 | .resume = gspca_resume, | ||
| 758 | #endif | ||
| 759 | .pre_reset = sd_pre_reset, | ||
| 760 | .post_reset = sd_post_reset, | ||
| 761 | }; | ||
| 762 | |||
| 763 | /* -- module insert / remove -- */ | ||
| 764 | static int __init sd_mod_init(void) | ||
| 765 | { | ||
| 766 | return usb_register(&sd_driver); | ||
| 767 | } | ||
| 768 | static void __exit sd_mod_exit(void) | ||
| 769 | { | ||
| 770 | usb_deregister(&sd_driver); | ||
| 771 | } | ||
| 772 | |||
| 773 | module_init(sd_mod_init); | ||
| 774 | module_exit(sd_mod_exit); | ||
diff --git a/drivers/media/video/gspca/se401.h b/drivers/media/video/gspca/se401.h new file mode 100644 index 000000000000..96d8ebf3cf59 --- /dev/null +++ b/drivers/media/video/gspca/se401.h | |||
| @@ -0,0 +1,90 @@ | |||
| 1 | /* | ||
| 2 | * GSPCA Endpoints (formerly known as AOX) se401 USB Camera sub Driver | ||
| 3 | * | ||
| 4 | * Copyright (C) 2011 Hans de Goede <hdegoede@redhat.com> | ||
| 5 | * | ||
| 6 | * Based on the v4l1 se401 driver which is: | ||
| 7 | * | ||
| 8 | * Copyright (c) 2000 Jeroen B. Vreeken (pe1rxq@amsat.org) | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License as published by | ||
| 12 | * the Free Software Foundation; either version 2 of the License, or | ||
| 13 | * (at your option) any later version. | ||
| 14 | * | ||
| 15 | * This program is distributed in the hope that it will be useful, | ||
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 18 | * GNU General Public License for more details. | ||
| 19 | * | ||
| 20 | * You should have received a copy of the GNU General Public License | ||
| 21 | * along with this program; if not, write to the Free Software | ||
| 22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 23 | * | ||
| 24 | */ | ||
| 25 | |||
| 26 | #define SE401_REQ_GET_CAMERA_DESCRIPTOR 0x06 | ||
| 27 | #define SE401_REQ_START_CONTINUOUS_CAPTURE 0x41 | ||
| 28 | #define SE401_REQ_STOP_CONTINUOUS_CAPTURE 0x42 | ||
| 29 | #define SE401_REQ_CAPTURE_FRAME 0x43 | ||
| 30 | #define SE401_REQ_GET_BRT 0x44 | ||
| 31 | #define SE401_REQ_SET_BRT 0x45 | ||
| 32 | #define SE401_REQ_GET_WIDTH 0x4c | ||
| 33 | #define SE401_REQ_SET_WIDTH 0x4d | ||
| 34 | #define SE401_REQ_GET_HEIGHT 0x4e | ||
| 35 | #define SE401_REQ_SET_HEIGHT 0x4f | ||
| 36 | #define SE401_REQ_GET_OUTPUT_MODE 0x50 | ||
| 37 | #define SE401_REQ_SET_OUTPUT_MODE 0x51 | ||
| 38 | #define SE401_REQ_GET_EXT_FEATURE 0x52 | ||
| 39 | #define SE401_REQ_SET_EXT_FEATURE 0x53 | ||
| 40 | #define SE401_REQ_CAMERA_POWER 0x56 | ||
| 41 | #define SE401_REQ_LED_CONTROL 0x57 | ||
| 42 | #define SE401_REQ_BIOS 0xff | ||
| 43 | |||
| 44 | #define SE401_BIOS_READ 0x07 | ||
| 45 | |||
| 46 | #define SE401_FORMAT_BAYER 0x40 | ||
| 47 | |||
| 48 | /* Hyundai hv7131b registers | ||
| 49 | 7121 and 7141 should be the same (haven't really checked...) */ | ||
| 50 | /* Mode registers: */ | ||
| 51 | #define HV7131_REG_MODE_A 0x00 | ||
| 52 | #define HV7131_REG_MODE_B 0x01 | ||
| 53 | #define HV7131_REG_MODE_C 0x02 | ||
| 54 | /* Frame registers: */ | ||
| 55 | #define HV7131_REG_FRSU 0x10 | ||
| 56 | #define HV7131_REG_FRSL 0x11 | ||
| 57 | #define HV7131_REG_FCSU 0x12 | ||
| 58 | #define HV7131_REG_FCSL 0x13 | ||
| 59 | #define HV7131_REG_FWHU 0x14 | ||
| 60 | #define HV7131_REG_FWHL 0x15 | ||
| 61 | #define HV7131_REG_FWWU 0x16 | ||
| 62 | #define HV7131_REG_FWWL 0x17 | ||
| 63 | /* Timing registers: */ | ||
| 64 | #define HV7131_REG_THBU 0x20 | ||
| 65 | #define HV7131_REG_THBL 0x21 | ||
| 66 | #define HV7131_REG_TVBU 0x22 | ||
| 67 | #define HV7131_REG_TVBL 0x23 | ||
| 68 | #define HV7131_REG_TITU 0x25 | ||
| 69 | #define HV7131_REG_TITM 0x26 | ||
| 70 | #define HV7131_REG_TITL 0x27 | ||
| 71 | #define HV7131_REG_TMCD 0x28 | ||
| 72 | /* Adjust Registers: */ | ||
| 73 | #define HV7131_REG_ARLV 0x30 | ||
| 74 | #define HV7131_REG_ARCG 0x31 | ||
| 75 | #define HV7131_REG_AGCG 0x32 | ||
| 76 | #define HV7131_REG_ABCG 0x33 | ||
| 77 | #define HV7131_REG_APBV 0x34 | ||
| 78 | #define HV7131_REG_ASLP 0x54 | ||
| 79 | /* Offset Registers: */ | ||
| 80 | #define HV7131_REG_OFSR 0x50 | ||
| 81 | #define HV7131_REG_OFSG 0x51 | ||
| 82 | #define HV7131_REG_OFSB 0x52 | ||
| 83 | /* REset level statistics registers: */ | ||
| 84 | #define HV7131_REG_LOREFNOH 0x57 | ||
| 85 | #define HV7131_REG_LOREFNOL 0x58 | ||
| 86 | #define HV7131_REG_HIREFNOH 0x59 | ||
| 87 | #define HV7131_REG_HIREFNOL 0x5a | ||
| 88 | |||
| 89 | /* se401 registers */ | ||
| 90 | #define SE401_OPERATINGMODE 0x2000 | ||
diff --git a/drivers/media/video/gspca/sunplus.c b/drivers/media/video/gspca/sunplus.c index b089c0d3ee9f..6ec232902183 100644 --- a/drivers/media/video/gspca/sunplus.c +++ b/drivers/media/video/gspca/sunplus.c | |||
| @@ -247,7 +247,6 @@ static const struct cmd spca504A_clicksmart420_init_data[] = { | |||
| 247 | {0x30, 0x0004, 0x000a}, | 247 | {0x30, 0x0004, 0x000a}, |
| 248 | {0xb0, 0x0001, 0x0000}, | 248 | {0xb0, 0x0001, 0x0000}, |
| 249 | 249 | ||
| 250 | |||
| 251 | {0xa1, 0x0080, 0x0001}, | 250 | {0xa1, 0x0080, 0x0001}, |
| 252 | {0x30, 0x0049, 0x0000}, | 251 | {0x30, 0x0049, 0x0000}, |
| 253 | {0x30, 0x0060, 0x0005}, | 252 | {0x30, 0x0060, 0x0005}, |
| @@ -256,8 +255,6 @@ static const struct cmd spca504A_clicksmart420_init_data[] = { | |||
| 256 | {0x00, 0x0000, 0x2000}, | 255 | {0x00, 0x0000, 0x2000}, |
| 257 | {0x00, 0x0013, 0x2301}, | 256 | {0x00, 0x0013, 0x2301}, |
| 258 | {0x00, 0x0003, 0x2000}, | 257 | {0x00, 0x0003, 0x2000}, |
| 259 | {0x00, 0x0000, 0x2000}, | ||
| 260 | |||
| 261 | }; | 258 | }; |
| 262 | 259 | ||
| 263 | /* clicksmart 420 open data ? */ | 260 | /* clicksmart 420 open data ? */ |
diff --git a/drivers/media/video/gspca/t613.c b/drivers/media/video/gspca/t613.c index 7e762d551099..d1d733b9359b 100644 --- a/drivers/media/video/gspca/t613.c +++ b/drivers/media/video/gspca/t613.c | |||
| @@ -1387,7 +1387,7 @@ static int sd_querymenu(struct gspca_dev *gspca_dev, | |||
| 1387 | return 0; | 1387 | return 0; |
| 1388 | case V4L2_CID_EFFECTS: | 1388 | case V4L2_CID_EFFECTS: |
| 1389 | if ((unsigned) menu->index < ARRAY_SIZE(effects_control)) { | 1389 | if ((unsigned) menu->index < ARRAY_SIZE(effects_control)) { |
| 1390 | strncpy((char *) menu->name, | 1390 | strlcpy((char *) menu->name, |
| 1391 | effects_control[menu->index], | 1391 | effects_control[menu->index], |
| 1392 | sizeof menu->name); | 1392 | sizeof menu->name); |
| 1393 | return 0; | 1393 | return 0; |
diff --git a/drivers/media/video/hdpvr/hdpvr-core.c b/drivers/media/video/hdpvr/hdpvr-core.c index 5f1db46beb4e..441dacf642bb 100644 --- a/drivers/media/video/hdpvr/hdpvr-core.c +++ b/drivers/media/video/hdpvr/hdpvr-core.c | |||
| @@ -474,5 +474,6 @@ module_init(hdpvr_init); | |||
| 474 | module_exit(hdpvr_exit); | 474 | module_exit(hdpvr_exit); |
| 475 | 475 | ||
| 476 | MODULE_LICENSE("GPL"); | 476 | MODULE_LICENSE("GPL"); |
| 477 | MODULE_VERSION("0.2.1"); | ||
| 477 | MODULE_AUTHOR("Janne Grunau"); | 478 | MODULE_AUTHOR("Janne Grunau"); |
| 478 | MODULE_DESCRIPTION("Hauppauge HD PVR driver"); | 479 | MODULE_DESCRIPTION("Hauppauge HD PVR driver"); |
diff --git a/drivers/media/video/hdpvr/hdpvr-video.c b/drivers/media/video/hdpvr/hdpvr-video.c index 514aea76eaa5..087f7c08cb85 100644 --- a/drivers/media/video/hdpvr/hdpvr-video.c +++ b/drivers/media/video/hdpvr/hdpvr-video.c | |||
| @@ -17,7 +17,6 @@ | |||
| 17 | #include <linux/uaccess.h> | 17 | #include <linux/uaccess.h> |
| 18 | #include <linux/usb.h> | 18 | #include <linux/usb.h> |
| 19 | #include <linux/mutex.h> | 19 | #include <linux/mutex.h> |
| 20 | #include <linux/version.h> | ||
| 21 | #include <linux/workqueue.h> | 20 | #include <linux/workqueue.h> |
| 22 | 21 | ||
| 23 | #include <linux/videodev2.h> | 22 | #include <linux/videodev2.h> |
| @@ -574,7 +573,6 @@ static int vidioc_querycap(struct file *file, void *priv, | |||
| 574 | strcpy(cap->driver, "hdpvr"); | 573 | strcpy(cap->driver, "hdpvr"); |
| 575 | strcpy(cap->card, "Hauppauge HD PVR"); | 574 | strcpy(cap->card, "Hauppauge HD PVR"); |
| 576 | usb_make_path(dev->udev, cap->bus_info, sizeof(cap->bus_info)); | 575 | usb_make_path(dev->udev, cap->bus_info, sizeof(cap->bus_info)); |
| 577 | cap->version = HDPVR_VERSION; | ||
| 578 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | | 576 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | |
| 579 | V4L2_CAP_AUDIO | | 577 | V4L2_CAP_AUDIO | |
| 580 | V4L2_CAP_READWRITE; | 578 | V4L2_CAP_READWRITE; |
diff --git a/drivers/media/video/hdpvr/hdpvr.h b/drivers/media/video/hdpvr/hdpvr.h index 072f23c570f3..d6439db1d18b 100644 --- a/drivers/media/video/hdpvr/hdpvr.h +++ b/drivers/media/video/hdpvr/hdpvr.h | |||
| @@ -18,12 +18,6 @@ | |||
| 18 | #include <media/v4l2-device.h> | 18 | #include <media/v4l2-device.h> |
| 19 | #include <media/ir-kbd-i2c.h> | 19 | #include <media/ir-kbd-i2c.h> |
| 20 | 20 | ||
| 21 | #define HDPVR_MAJOR_VERSION 0 | ||
| 22 | #define HDPVR_MINOR_VERSION 2 | ||
| 23 | #define HDPVR_RELEASE 0 | ||
| 24 | #define HDPVR_VERSION \ | ||
| 25 | KERNEL_VERSION(HDPVR_MAJOR_VERSION, HDPVR_MINOR_VERSION, HDPVR_RELEASE) | ||
| 26 | |||
| 27 | #define HDPVR_MAX 8 | 21 | #define HDPVR_MAX 8 |
| 28 | #define HDPVR_I2C_MAX_SIZE 128 | 22 | #define HDPVR_I2C_MAX_SIZE 128 |
| 29 | 23 | ||
diff --git a/drivers/media/video/ivtv/ivtv-driver.h b/drivers/media/video/ivtv/ivtv-driver.h index 84bdf0f42a8e..8f9cc17b518e 100644 --- a/drivers/media/video/ivtv/ivtv-driver.h +++ b/drivers/media/video/ivtv/ivtv-driver.h | |||
| @@ -36,7 +36,6 @@ | |||
| 36 | * using information provided by Jiun-Kuei Jung @ AVerMedia. | 36 | * using information provided by Jiun-Kuei Jung @ AVerMedia. |
| 37 | */ | 37 | */ |
| 38 | 38 | ||
| 39 | #include <linux/version.h> | ||
| 40 | #include <linux/module.h> | 39 | #include <linux/module.h> |
| 41 | #include <linux/init.h> | 40 | #include <linux/init.h> |
| 42 | #include <linux/delay.h> | 41 | #include <linux/delay.h> |
diff --git a/drivers/media/video/ivtv/ivtv-fileops.c b/drivers/media/video/ivtv/ivtv-fileops.c index a7f54b010a5c..38f052257f46 100644 --- a/drivers/media/video/ivtv/ivtv-fileops.c +++ b/drivers/media/video/ivtv/ivtv-fileops.c | |||
| @@ -722,8 +722,8 @@ unsigned int ivtv_v4l2_dec_poll(struct file *filp, poll_table *wait) | |||
| 722 | 722 | ||
| 723 | /* If there are subscribed events, then only use the new event | 723 | /* If there are subscribed events, then only use the new event |
| 724 | API instead of the old video.h based API. */ | 724 | API instead of the old video.h based API. */ |
| 725 | if (!list_empty(&id->fh.events->subscribed)) { | 725 | if (!list_empty(&id->fh.subscribed)) { |
| 726 | poll_wait(filp, &id->fh.events->wait, wait); | 726 | poll_wait(filp, &id->fh.wait, wait); |
| 727 | /* Turn off the old-style vsync events */ | 727 | /* Turn off the old-style vsync events */ |
| 728 | clear_bit(IVTV_F_I_EV_VSYNC_ENABLED, &itv->i_flags); | 728 | clear_bit(IVTV_F_I_EV_VSYNC_ENABLED, &itv->i_flags); |
| 729 | if (v4l2_event_pending(&id->fh)) | 729 | if (v4l2_event_pending(&id->fh)) |
| @@ -750,6 +750,7 @@ unsigned int ivtv_v4l2_enc_poll(struct file *filp, poll_table * wait) | |||
| 750 | struct ivtv *itv = id->itv; | 750 | struct ivtv *itv = id->itv; |
| 751 | struct ivtv_stream *s = &itv->streams[id->type]; | 751 | struct ivtv_stream *s = &itv->streams[id->type]; |
| 752 | int eof = test_bit(IVTV_F_S_STREAMOFF, &s->s_flags); | 752 | int eof = test_bit(IVTV_F_S_STREAMOFF, &s->s_flags); |
| 753 | unsigned res = 0; | ||
| 753 | 754 | ||
| 754 | /* Start a capture if there is none */ | 755 | /* Start a capture if there is none */ |
| 755 | if (!eof && !test_bit(IVTV_F_S_STREAMING, &s->s_flags)) { | 756 | if (!eof && !test_bit(IVTV_F_S_STREAMING, &s->s_flags)) { |
| @@ -769,12 +770,16 @@ unsigned int ivtv_v4l2_enc_poll(struct file *filp, poll_table * wait) | |||
| 769 | /* add stream's waitq to the poll list */ | 770 | /* add stream's waitq to the poll list */ |
| 770 | IVTV_DEBUG_HI_FILE("Encoder poll\n"); | 771 | IVTV_DEBUG_HI_FILE("Encoder poll\n"); |
| 771 | poll_wait(filp, &s->waitq, wait); | 772 | poll_wait(filp, &s->waitq, wait); |
| 773 | if (v4l2_event_pending(&id->fh)) | ||
| 774 | res |= POLLPRI; | ||
| 775 | else | ||
| 776 | poll_wait(filp, &id->fh.wait, wait); | ||
| 772 | 777 | ||
| 773 | if (s->q_full.length || s->q_io.length) | 778 | if (s->q_full.length || s->q_io.length) |
| 774 | return POLLIN | POLLRDNORM; | 779 | return res | POLLIN | POLLRDNORM; |
| 775 | if (eof) | 780 | if (eof) |
| 776 | return POLLHUP; | 781 | return res | POLLHUP; |
| 777 | return 0; | 782 | return res; |
| 778 | } | 783 | } |
| 779 | 784 | ||
| 780 | void ivtv_stop_capture(struct ivtv_open_id *id, int gop_end) | 785 | void ivtv_stop_capture(struct ivtv_open_id *id, int gop_end) |
| @@ -961,10 +966,6 @@ static int ivtv_serialized_open(struct ivtv_stream *s, struct file *filp) | |||
| 961 | return -ENOMEM; | 966 | return -ENOMEM; |
| 962 | } | 967 | } |
| 963 | v4l2_fh_init(&item->fh, s->vdev); | 968 | v4l2_fh_init(&item->fh, s->vdev); |
| 964 | if (s->type == IVTV_DEC_STREAM_TYPE_YUV || | ||
| 965 | s->type == IVTV_DEC_STREAM_TYPE_MPG) { | ||
| 966 | res = v4l2_event_alloc(&item->fh, 60); | ||
| 967 | } | ||
| 968 | if (res < 0) { | 969 | if (res < 0) { |
| 969 | v4l2_fh_exit(&item->fh); | 970 | v4l2_fh_exit(&item->fh); |
| 970 | kfree(item); | 971 | kfree(item); |
diff --git a/drivers/media/video/ivtv/ivtv-ioctl.c b/drivers/media/video/ivtv/ivtv-ioctl.c index 120c7d8e0895..3e5c090af112 100644 --- a/drivers/media/video/ivtv/ivtv-ioctl.c +++ b/drivers/media/video/ivtv/ivtv-ioctl.c | |||
| @@ -757,7 +757,6 @@ static int ivtv_querycap(struct file *file, void *fh, struct v4l2_capability *vc | |||
| 757 | strlcpy(vcap->driver, IVTV_DRIVER_NAME, sizeof(vcap->driver)); | 757 | strlcpy(vcap->driver, IVTV_DRIVER_NAME, sizeof(vcap->driver)); |
| 758 | strlcpy(vcap->card, itv->card_name, sizeof(vcap->card)); | 758 | strlcpy(vcap->card, itv->card_name, sizeof(vcap->card)); |
| 759 | snprintf(vcap->bus_info, sizeof(vcap->bus_info), "PCI:%s", pci_name(itv->pdev)); | 759 | snprintf(vcap->bus_info, sizeof(vcap->bus_info), "PCI:%s", pci_name(itv->pdev)); |
| 760 | vcap->version = IVTV_DRIVER_VERSION; /* version */ | ||
| 761 | vcap->capabilities = itv->v4l2_cap; /* capabilities */ | 760 | vcap->capabilities = itv->v4l2_cap; /* capabilities */ |
| 762 | return 0; | 761 | return 0; |
| 763 | } | 762 | } |
| @@ -1451,11 +1450,11 @@ static int ivtv_subscribe_event(struct v4l2_fh *fh, struct v4l2_event_subscripti | |||
| 1451 | switch (sub->type) { | 1450 | switch (sub->type) { |
| 1452 | case V4L2_EVENT_VSYNC: | 1451 | case V4L2_EVENT_VSYNC: |
| 1453 | case V4L2_EVENT_EOS: | 1452 | case V4L2_EVENT_EOS: |
| 1454 | break; | 1453 | case V4L2_EVENT_CTRL: |
| 1454 | return v4l2_event_subscribe(fh, sub, 0); | ||
| 1455 | default: | 1455 | default: |
| 1456 | return -EINVAL; | 1456 | return -EINVAL; |
| 1457 | } | 1457 | } |
| 1458 | return v4l2_event_subscribe(fh, sub); | ||
| 1459 | } | 1458 | } |
| 1460 | 1459 | ||
| 1461 | static int ivtv_log_status(struct file *file, void *fh) | 1460 | static int ivtv_log_status(struct file *file, void *fh) |
diff --git a/drivers/media/video/ivtv/ivtv-version.h b/drivers/media/video/ivtv/ivtv-version.h index b67a4048f5aa..a20f346fcad8 100644 --- a/drivers/media/video/ivtv/ivtv-version.h +++ b/drivers/media/video/ivtv/ivtv-version.h | |||
| @@ -21,11 +21,6 @@ | |||
| 21 | #define IVTV_VERSION_H | 21 | #define IVTV_VERSION_H |
| 22 | 22 | ||
| 23 | #define IVTV_DRIVER_NAME "ivtv" | 23 | #define IVTV_DRIVER_NAME "ivtv" |
| 24 | #define IVTV_DRIVER_VERSION_MAJOR 1 | 24 | #define IVTV_VERSION "1.4.3" |
| 25 | #define IVTV_DRIVER_VERSION_MINOR 4 | ||
| 26 | #define IVTV_DRIVER_VERSION_PATCHLEVEL 2 | ||
| 27 | |||
| 28 | #define IVTV_VERSION __stringify(IVTV_DRIVER_VERSION_MAJOR) "." __stringify(IVTV_DRIVER_VERSION_MINOR) "." __stringify(IVTV_DRIVER_VERSION_PATCHLEVEL) | ||
| 29 | #define IVTV_DRIVER_VERSION KERNEL_VERSION(IVTV_DRIVER_VERSION_MAJOR,IVTV_DRIVER_VERSION_MINOR,IVTV_DRIVER_VERSION_PATCHLEVEL) | ||
| 30 | 25 | ||
| 31 | #endif | 26 | #endif |
diff --git a/drivers/media/video/m5mols/m5mols_capture.c b/drivers/media/video/m5mols/m5mols_capture.c index a45d8f098e02..3248ac805711 100644 --- a/drivers/media/video/m5mols/m5mols_capture.c +++ b/drivers/media/video/m5mols/m5mols_capture.c | |||
| @@ -18,7 +18,6 @@ | |||
| 18 | #include <linux/irq.h> | 18 | #include <linux/irq.h> |
| 19 | #include <linux/interrupt.h> | 19 | #include <linux/interrupt.h> |
| 20 | #include <linux/delay.h> | 20 | #include <linux/delay.h> |
| 21 | #include <linux/version.h> | ||
| 22 | #include <linux/gpio.h> | 21 | #include <linux/gpio.h> |
| 23 | #include <linux/regulator/consumer.h> | 22 | #include <linux/regulator/consumer.h> |
| 24 | #include <linux/videodev2.h> | 23 | #include <linux/videodev2.h> |
diff --git a/drivers/media/video/m5mols/m5mols_core.c b/drivers/media/video/m5mols/m5mols_core.c index 43c68f51c5ce..fb8e4a7a9dd2 100644 --- a/drivers/media/video/m5mols/m5mols_core.c +++ b/drivers/media/video/m5mols/m5mols_core.c | |||
| @@ -18,7 +18,6 @@ | |||
| 18 | #include <linux/irq.h> | 18 | #include <linux/irq.h> |
| 19 | #include <linux/interrupt.h> | 19 | #include <linux/interrupt.h> |
| 20 | #include <linux/delay.h> | 20 | #include <linux/delay.h> |
| 21 | #include <linux/version.h> | ||
| 22 | #include <linux/gpio.h> | 21 | #include <linux/gpio.h> |
| 23 | #include <linux/regulator/consumer.h> | 22 | #include <linux/regulator/consumer.h> |
| 24 | #include <linux/videodev2.h> | 23 | #include <linux/videodev2.h> |
diff --git a/drivers/media/video/marvell-ccic/Kconfig b/drivers/media/video/marvell-ccic/Kconfig new file mode 100644 index 000000000000..bf739e3b3398 --- /dev/null +++ b/drivers/media/video/marvell-ccic/Kconfig | |||
| @@ -0,0 +1,23 @@ | |||
| 1 | config VIDEO_CAFE_CCIC | ||
| 2 | tristate "Marvell 88ALP01 (Cafe) CMOS Camera Controller support" | ||
| 3 | depends on PCI && I2C && VIDEO_V4L2 | ||
| 4 | select VIDEO_OV7670 | ||
| 5 | select VIDEOBUF2_VMALLOC | ||
| 6 | select VIDEOBUF2_DMA_CONTIG | ||
| 7 | ---help--- | ||
| 8 | This is a video4linux2 driver for the Marvell 88ALP01 integrated | ||
| 9 | CMOS camera controller. This is the controller found on first- | ||
| 10 | generation OLPC systems. | ||
| 11 | |||
| 12 | config VIDEO_MMP_CAMERA | ||
| 13 | tristate "Marvell Armada 610 integrated camera controller support" | ||
| 14 | depends on ARCH_MMP && I2C && VIDEO_V4L2 | ||
| 15 | select VIDEO_OV7670 | ||
| 16 | select I2C_GPIO | ||
| 17 | select VIDEOBUF2_DMA_SG | ||
| 18 | ---help--- | ||
| 19 | This is a Video4Linux2 driver for the integrated camera | ||
| 20 | controller found on Marvell Armada 610 application | ||
| 21 | processors (and likely beyond). This is the controller found | ||
| 22 | in OLPC XO 1.75 systems. | ||
| 23 | |||
diff --git a/drivers/media/video/marvell-ccic/Makefile b/drivers/media/video/marvell-ccic/Makefile new file mode 100644 index 000000000000..05a792c579a2 --- /dev/null +++ b/drivers/media/video/marvell-ccic/Makefile | |||
| @@ -0,0 +1,6 @@ | |||
| 1 | obj-$(CONFIG_VIDEO_CAFE_CCIC) += cafe_ccic.o | ||
| 2 | cafe_ccic-y := cafe-driver.o mcam-core.o | ||
| 3 | |||
| 4 | obj-$(CONFIG_VIDEO_MMP_CAMERA) += mmp_camera.o | ||
| 5 | mmp_camera-y := mmp-driver.o mcam-core.o | ||
| 6 | |||
diff --git a/drivers/media/video/marvell-ccic/cafe-driver.c b/drivers/media/video/marvell-ccic/cafe-driver.c new file mode 100644 index 000000000000..d030f9beae88 --- /dev/null +++ b/drivers/media/video/marvell-ccic/cafe-driver.c | |||
| @@ -0,0 +1,654 @@ | |||
| 1 | /* | ||
| 2 | * A driver for the CMOS camera controller in the Marvell 88ALP01 "cafe" | ||
| 3 | * multifunction chip. Currently works with the Omnivision OV7670 | ||
| 4 | * sensor. | ||
| 5 | * | ||
| 6 | * The data sheet for this device can be found at: | ||
| 7 | * http://www.marvell.com/products/pc_connectivity/88alp01/ | ||
| 8 | * | ||
| 9 | * Copyright 2006-11 One Laptop Per Child Association, Inc. | ||
| 10 | * Copyright 2006-11 Jonathan Corbet <corbet@lwn.net> | ||
| 11 | * | ||
| 12 | * Written by Jonathan Corbet, corbet@lwn.net. | ||
| 13 | * | ||
| 14 | * v4l2_device/v4l2_subdev conversion by: | ||
| 15 | * Copyright (C) 2009 Hans Verkuil <hverkuil@xs4all.nl> | ||
| 16 | * | ||
| 17 | * This file may be distributed under the terms of the GNU General | ||
| 18 | * Public License, version 2. | ||
| 19 | */ | ||
| 20 | #include <linux/kernel.h> | ||
| 21 | #include <linux/module.h> | ||
| 22 | #include <linux/init.h> | ||
| 23 | #include <linux/pci.h> | ||
| 24 | #include <linux/i2c.h> | ||
| 25 | #include <linux/interrupt.h> | ||
| 26 | #include <linux/spinlock.h> | ||
| 27 | #include <linux/slab.h> | ||
| 28 | #include <linux/videodev2.h> | ||
| 29 | #include <media/v4l2-device.h> | ||
| 30 | #include <media/v4l2-chip-ident.h> | ||
| 31 | #include <linux/device.h> | ||
| 32 | #include <linux/wait.h> | ||
| 33 | #include <linux/delay.h> | ||
| 34 | #include <linux/io.h> | ||
| 35 | |||
| 36 | #include "mcam-core.h" | ||
| 37 | |||
| 38 | #define CAFE_VERSION 0x000002 | ||
| 39 | |||
| 40 | |||
| 41 | /* | ||
| 42 | * Parameters. | ||
| 43 | */ | ||
| 44 | MODULE_AUTHOR("Jonathan Corbet <corbet@lwn.net>"); | ||
| 45 | MODULE_DESCRIPTION("Marvell 88ALP01 CMOS Camera Controller driver"); | ||
| 46 | MODULE_LICENSE("GPL"); | ||
| 47 | MODULE_SUPPORTED_DEVICE("Video"); | ||
| 48 | |||
| 49 | |||
| 50 | |||
| 51 | |||
| 52 | struct cafe_camera { | ||
| 53 | int registered; /* Fully initialized? */ | ||
| 54 | struct mcam_camera mcam; | ||
| 55 | struct pci_dev *pdev; | ||
| 56 | wait_queue_head_t smbus_wait; /* Waiting on i2c events */ | ||
| 57 | }; | ||
| 58 | |||
| 59 | /* | ||
| 60 | * Most of the camera controller registers are defined in mcam-core.h, | ||
| 61 | * but the Cafe platform has some additional registers of its own; | ||
| 62 | * they are described here. | ||
| 63 | */ | ||
| 64 | |||
| 65 | /* | ||
| 66 | * "General purpose register" has a couple of GPIOs used for sensor | ||
| 67 | * power and reset on OLPC XO 1.0 systems. | ||
| 68 | */ | ||
| 69 | #define REG_GPR 0xb4 | ||
| 70 | #define GPR_C1EN 0x00000020 /* Pad 1 (power down) enable */ | ||
| 71 | #define GPR_C0EN 0x00000010 /* Pad 0 (reset) enable */ | ||
| 72 | #define GPR_C1 0x00000002 /* Control 1 value */ | ||
| 73 | /* | ||
| 74 | * Control 0 is wired to reset on OLPC machines. For ov7x sensors, | ||
| 75 | * it is active low. | ||
| 76 | */ | ||
| 77 | #define GPR_C0 0x00000001 /* Control 0 value */ | ||
| 78 | |||
| 79 | /* | ||
| 80 | * These registers control the SMBUS module for communicating | ||
| 81 | * with the sensor. | ||
| 82 | */ | ||
| 83 | #define REG_TWSIC0 0xb8 /* TWSI (smbus) control 0 */ | ||
| 84 | #define TWSIC0_EN 0x00000001 /* TWSI enable */ | ||
| 85 | #define TWSIC0_MODE 0x00000002 /* 1 = 16-bit, 0 = 8-bit */ | ||
| 86 | #define TWSIC0_SID 0x000003fc /* Slave ID */ | ||
| 87 | /* | ||
| 88 | * Subtle trickery: the slave ID field starts with bit 2. But the | ||
| 89 | * Linux i2c stack wants to treat the bottommost bit as a separate | ||
| 90 | * read/write bit, which is why slave ID's are usually presented | ||
| 91 | * >>1. For consistency with that behavior, we shift over three | ||
| 92 | * bits instead of two. | ||
| 93 | */ | ||
| 94 | #define TWSIC0_SID_SHIFT 3 | ||
| 95 | #define TWSIC0_CLKDIV 0x0007fc00 /* Clock divider */ | ||
| 96 | #define TWSIC0_MASKACK 0x00400000 /* Mask ack from sensor */ | ||
| 97 | #define TWSIC0_OVMAGIC 0x00800000 /* Make it work on OV sensors */ | ||
| 98 | |||
| 99 | #define REG_TWSIC1 0xbc /* TWSI control 1 */ | ||
| 100 | #define TWSIC1_DATA 0x0000ffff /* Data to/from camchip */ | ||
| 101 | #define TWSIC1_ADDR 0x00ff0000 /* Address (register) */ | ||
| 102 | #define TWSIC1_ADDR_SHIFT 16 | ||
| 103 | #define TWSIC1_READ 0x01000000 /* Set for read op */ | ||
| 104 | #define TWSIC1_WSTAT 0x02000000 /* Write status */ | ||
| 105 | #define TWSIC1_RVALID 0x04000000 /* Read data valid */ | ||
| 106 | #define TWSIC1_ERROR 0x08000000 /* Something screwed up */ | ||
| 107 | |||
| 108 | /* | ||
| 109 | * Here's the weird global control registers | ||
| 110 | */ | ||
| 111 | #define REG_GL_CSR 0x3004 /* Control/status register */ | ||
| 112 | #define GCSR_SRS 0x00000001 /* SW Reset set */ | ||
| 113 | #define GCSR_SRC 0x00000002 /* SW Reset clear */ | ||
| 114 | #define GCSR_MRS 0x00000004 /* Master reset set */ | ||
| 115 | #define GCSR_MRC 0x00000008 /* HW Reset clear */ | ||
| 116 | #define GCSR_CCIC_EN 0x00004000 /* CCIC Clock enable */ | ||
| 117 | #define REG_GL_IMASK 0x300c /* Interrupt mask register */ | ||
| 118 | #define GIMSK_CCIC_EN 0x00000004 /* CCIC Interrupt enable */ | ||
| 119 | |||
| 120 | #define REG_GL_FCR 0x3038 /* GPIO functional control register */ | ||
| 121 | #define GFCR_GPIO_ON 0x08 /* Camera GPIO enabled */ | ||
| 122 | #define REG_GL_GPIOR 0x315c /* GPIO register */ | ||
| 123 | #define GGPIO_OUT 0x80000 /* GPIO output */ | ||
| 124 | #define GGPIO_VAL 0x00008 /* Output pin value */ | ||
| 125 | |||
| 126 | #define REG_LEN (REG_GL_IMASK + 4) | ||
| 127 | |||
| 128 | |||
| 129 | /* | ||
| 130 | * Debugging and related. | ||
| 131 | */ | ||
| 132 | #define cam_err(cam, fmt, arg...) \ | ||
| 133 | dev_err(&(cam)->pdev->dev, fmt, ##arg); | ||
| 134 | #define cam_warn(cam, fmt, arg...) \ | ||
| 135 | dev_warn(&(cam)->pdev->dev, fmt, ##arg); | ||
| 136 | |||
| 137 | /* -------------------------------------------------------------------- */ | ||
| 138 | /* | ||
| 139 | * The I2C/SMBUS interface to the camera itself starts here. The | ||
| 140 | * controller handles SMBUS itself, presenting a relatively simple register | ||
| 141 | * interface; all we have to do is to tell it where to route the data. | ||
| 142 | */ | ||
| 143 | #define CAFE_SMBUS_TIMEOUT (HZ) /* generous */ | ||
| 144 | |||
| 145 | static inline struct cafe_camera *to_cam(struct v4l2_device *dev) | ||
| 146 | { | ||
| 147 | struct mcam_camera *m = container_of(dev, struct mcam_camera, v4l2_dev); | ||
| 148 | return container_of(m, struct cafe_camera, mcam); | ||
| 149 | } | ||
| 150 | |||
| 151 | |||
| 152 | static int cafe_smbus_write_done(struct mcam_camera *mcam) | ||
| 153 | { | ||
| 154 | unsigned long flags; | ||
| 155 | int c1; | ||
| 156 | |||
| 157 | /* | ||
| 158 | * We must delay after the interrupt, or the controller gets confused | ||
| 159 | * and never does give us good status. Fortunately, we don't do this | ||
| 160 | * often. | ||
| 161 | */ | ||
| 162 | udelay(20); | ||
| 163 | spin_lock_irqsave(&mcam->dev_lock, flags); | ||
| 164 | c1 = mcam_reg_read(mcam, REG_TWSIC1); | ||
| 165 | spin_unlock_irqrestore(&mcam->dev_lock, flags); | ||
| 166 | return (c1 & (TWSIC1_WSTAT|TWSIC1_ERROR)) != TWSIC1_WSTAT; | ||
| 167 | } | ||
| 168 | |||
| 169 | static int cafe_smbus_write_data(struct cafe_camera *cam, | ||
| 170 | u16 addr, u8 command, u8 value) | ||
| 171 | { | ||
| 172 | unsigned int rval; | ||
| 173 | unsigned long flags; | ||
| 174 | struct mcam_camera *mcam = &cam->mcam; | ||
| 175 | |||
| 176 | spin_lock_irqsave(&mcam->dev_lock, flags); | ||
| 177 | rval = TWSIC0_EN | ((addr << TWSIC0_SID_SHIFT) & TWSIC0_SID); | ||
| 178 | rval |= TWSIC0_OVMAGIC; /* Make OV sensors work */ | ||
| 179 | /* | ||
| 180 | * Marvell sez set clkdiv to all 1's for now. | ||
| 181 | */ | ||
| 182 | rval |= TWSIC0_CLKDIV; | ||
| 183 | mcam_reg_write(mcam, REG_TWSIC0, rval); | ||
| 184 | (void) mcam_reg_read(mcam, REG_TWSIC1); /* force write */ | ||
| 185 | rval = value | ((command << TWSIC1_ADDR_SHIFT) & TWSIC1_ADDR); | ||
| 186 | mcam_reg_write(mcam, REG_TWSIC1, rval); | ||
| 187 | spin_unlock_irqrestore(&mcam->dev_lock, flags); | ||
| 188 | |||
| 189 | /* Unfortunately, reading TWSIC1 too soon after sending a command | ||
| 190 | * causes the device to die. | ||
| 191 | * Use a busy-wait because we often send a large quantity of small | ||
| 192 | * commands at-once; using msleep() would cause a lot of context | ||
| 193 | * switches which take longer than 2ms, resulting in a noticeable | ||
| 194 | * boot-time and capture-start delays. | ||
| 195 | */ | ||
| 196 | mdelay(2); | ||
| 197 | |||
| 198 | /* | ||
| 199 | * Another sad fact is that sometimes, commands silently complete but | ||
| 200 | * cafe_smbus_write_done() never becomes aware of this. | ||
| 201 | * This happens at random and appears to possible occur with any | ||
| 202 | * command. | ||
| 203 | * We don't understand why this is. We work around this issue | ||
| 204 | * with the timeout in the wait below, assuming that all commands | ||
| 205 | * complete within the timeout. | ||
| 206 | */ | ||
| 207 | wait_event_timeout(cam->smbus_wait, cafe_smbus_write_done(mcam), | ||
| 208 | CAFE_SMBUS_TIMEOUT); | ||
| 209 | |||
| 210 | spin_lock_irqsave(&mcam->dev_lock, flags); | ||
| 211 | rval = mcam_reg_read(mcam, REG_TWSIC1); | ||
| 212 | spin_unlock_irqrestore(&mcam->dev_lock, flags); | ||
| 213 | |||
| 214 | if (rval & TWSIC1_WSTAT) { | ||
| 215 | cam_err(cam, "SMBUS write (%02x/%02x/%02x) timed out\n", addr, | ||
| 216 | command, value); | ||
| 217 | return -EIO; | ||
| 218 | } | ||
| 219 | if (rval & TWSIC1_ERROR) { | ||
| 220 | cam_err(cam, "SMBUS write (%02x/%02x/%02x) error\n", addr, | ||
| 221 | command, value); | ||
| 222 | return -EIO; | ||
| 223 | } | ||
| 224 | return 0; | ||
| 225 | } | ||
| 226 | |||
| 227 | |||
| 228 | |||
| 229 | static int cafe_smbus_read_done(struct mcam_camera *mcam) | ||
| 230 | { | ||
| 231 | unsigned long flags; | ||
| 232 | int c1; | ||
| 233 | |||
| 234 | /* | ||
| 235 | * We must delay after the interrupt, or the controller gets confused | ||
| 236 | * and never does give us good status. Fortunately, we don't do this | ||
| 237 | * often. | ||
| 238 | */ | ||
| 239 | udelay(20); | ||
| 240 | spin_lock_irqsave(&mcam->dev_lock, flags); | ||
| 241 | c1 = mcam_reg_read(mcam, REG_TWSIC1); | ||
| 242 | spin_unlock_irqrestore(&mcam->dev_lock, flags); | ||
| 243 | return c1 & (TWSIC1_RVALID|TWSIC1_ERROR); | ||
| 244 | } | ||
| 245 | |||
| 246 | |||
| 247 | |||
| 248 | static int cafe_smbus_read_data(struct cafe_camera *cam, | ||
| 249 | u16 addr, u8 command, u8 *value) | ||
| 250 | { | ||
| 251 | unsigned int rval; | ||
| 252 | unsigned long flags; | ||
| 253 | struct mcam_camera *mcam = &cam->mcam; | ||
| 254 | |||
| 255 | spin_lock_irqsave(&mcam->dev_lock, flags); | ||
| 256 | rval = TWSIC0_EN | ((addr << TWSIC0_SID_SHIFT) & TWSIC0_SID); | ||
| 257 | rval |= TWSIC0_OVMAGIC; /* Make OV sensors work */ | ||
| 258 | /* | ||
| 259 | * Marvel sez set clkdiv to all 1's for now. | ||
| 260 | */ | ||
| 261 | rval |= TWSIC0_CLKDIV; | ||
| 262 | mcam_reg_write(mcam, REG_TWSIC0, rval); | ||
| 263 | (void) mcam_reg_read(mcam, REG_TWSIC1); /* force write */ | ||
| 264 | rval = TWSIC1_READ | ((command << TWSIC1_ADDR_SHIFT) & TWSIC1_ADDR); | ||
| 265 | mcam_reg_write(mcam, REG_TWSIC1, rval); | ||
| 266 | spin_unlock_irqrestore(&mcam->dev_lock, flags); | ||
| 267 | |||
| 268 | wait_event_timeout(cam->smbus_wait, | ||
| 269 | cafe_smbus_read_done(mcam), CAFE_SMBUS_TIMEOUT); | ||
| 270 | spin_lock_irqsave(&mcam->dev_lock, flags); | ||
| 271 | rval = mcam_reg_read(mcam, REG_TWSIC1); | ||
| 272 | spin_unlock_irqrestore(&mcam->dev_lock, flags); | ||
| 273 | |||
| 274 | if (rval & TWSIC1_ERROR) { | ||
| 275 | cam_err(cam, "SMBUS read (%02x/%02x) error\n", addr, command); | ||
| 276 | return -EIO; | ||
| 277 | } | ||
| 278 | if (!(rval & TWSIC1_RVALID)) { | ||
| 279 | cam_err(cam, "SMBUS read (%02x/%02x) timed out\n", addr, | ||
| 280 | command); | ||
| 281 | return -EIO; | ||
| 282 | } | ||
| 283 | *value = rval & 0xff; | ||
| 284 | return 0; | ||
| 285 | } | ||
| 286 | |||
| 287 | /* | ||
| 288 | * Perform a transfer over SMBUS. This thing is called under | ||
| 289 | * the i2c bus lock, so we shouldn't race with ourselves... | ||
| 290 | */ | ||
| 291 | static int cafe_smbus_xfer(struct i2c_adapter *adapter, u16 addr, | ||
| 292 | unsigned short flags, char rw, u8 command, | ||
| 293 | int size, union i2c_smbus_data *data) | ||
| 294 | { | ||
| 295 | struct cafe_camera *cam = i2c_get_adapdata(adapter); | ||
| 296 | int ret = -EINVAL; | ||
| 297 | |||
| 298 | /* | ||
| 299 | * This interface would appear to only do byte data ops. OK | ||
| 300 | * it can do word too, but the cam chip has no use for that. | ||
| 301 | */ | ||
| 302 | if (size != I2C_SMBUS_BYTE_DATA) { | ||
| 303 | cam_err(cam, "funky xfer size %d\n", size); | ||
| 304 | return -EINVAL; | ||
| 305 | } | ||
| 306 | |||
| 307 | if (rw == I2C_SMBUS_WRITE) | ||
| 308 | ret = cafe_smbus_write_data(cam, addr, command, data->byte); | ||
| 309 | else if (rw == I2C_SMBUS_READ) | ||
| 310 | ret = cafe_smbus_read_data(cam, addr, command, &data->byte); | ||
| 311 | return ret; | ||
| 312 | } | ||
| 313 | |||
| 314 | |||
| 315 | static void cafe_smbus_enable_irq(struct cafe_camera *cam) | ||
| 316 | { | ||
| 317 | unsigned long flags; | ||
| 318 | |||
| 319 | spin_lock_irqsave(&cam->mcam.dev_lock, flags); | ||
| 320 | mcam_reg_set_bit(&cam->mcam, REG_IRQMASK, TWSIIRQS); | ||
| 321 | spin_unlock_irqrestore(&cam->mcam.dev_lock, flags); | ||
| 322 | } | ||
| 323 | |||
| 324 | static u32 cafe_smbus_func(struct i2c_adapter *adapter) | ||
| 325 | { | ||
| 326 | return I2C_FUNC_SMBUS_READ_BYTE_DATA | | ||
| 327 | I2C_FUNC_SMBUS_WRITE_BYTE_DATA; | ||
| 328 | } | ||
| 329 | |||
| 330 | static struct i2c_algorithm cafe_smbus_algo = { | ||
| 331 | .smbus_xfer = cafe_smbus_xfer, | ||
| 332 | .functionality = cafe_smbus_func | ||
| 333 | }; | ||
| 334 | |||
| 335 | static int cafe_smbus_setup(struct cafe_camera *cam) | ||
| 336 | { | ||
| 337 | struct i2c_adapter *adap; | ||
| 338 | int ret; | ||
| 339 | |||
| 340 | adap = kzalloc(sizeof(*adap), GFP_KERNEL); | ||
| 341 | if (adap == NULL) | ||
| 342 | return -ENOMEM; | ||
| 343 | cam->mcam.i2c_adapter = adap; | ||
| 344 | cafe_smbus_enable_irq(cam); | ||
| 345 | adap->owner = THIS_MODULE; | ||
| 346 | adap->algo = &cafe_smbus_algo; | ||
| 347 | strcpy(adap->name, "cafe_ccic"); | ||
| 348 | adap->dev.parent = &cam->pdev->dev; | ||
| 349 | i2c_set_adapdata(adap, cam); | ||
| 350 | ret = i2c_add_adapter(adap); | ||
| 351 | if (ret) | ||
| 352 | printk(KERN_ERR "Unable to register cafe i2c adapter\n"); | ||
| 353 | return ret; | ||
| 354 | } | ||
| 355 | |||
| 356 | static void cafe_smbus_shutdown(struct cafe_camera *cam) | ||
| 357 | { | ||
| 358 | i2c_del_adapter(cam->mcam.i2c_adapter); | ||
| 359 | kfree(cam->mcam.i2c_adapter); | ||
| 360 | } | ||
| 361 | |||
| 362 | |||
| 363 | /* | ||
| 364 | * Controller-level stuff | ||
| 365 | */ | ||
| 366 | |||
| 367 | static void cafe_ctlr_init(struct mcam_camera *mcam) | ||
| 368 | { | ||
| 369 | unsigned long flags; | ||
| 370 | |||
| 371 | spin_lock_irqsave(&mcam->dev_lock, flags); | ||
| 372 | /* | ||
| 373 | * Added magic to bring up the hardware on the B-Test board | ||
| 374 | */ | ||
| 375 | mcam_reg_write(mcam, 0x3038, 0x8); | ||
| 376 | mcam_reg_write(mcam, 0x315c, 0x80008); | ||
| 377 | /* | ||
| 378 | * Go through the dance needed to wake the device up. | ||
| 379 | * Note that these registers are global and shared | ||
| 380 | * with the NAND and SD devices. Interaction between the | ||
| 381 | * three still needs to be examined. | ||
| 382 | */ | ||
| 383 | mcam_reg_write(mcam, REG_GL_CSR, GCSR_SRS|GCSR_MRS); /* Needed? */ | ||
| 384 | mcam_reg_write(mcam, REG_GL_CSR, GCSR_SRC|GCSR_MRC); | ||
| 385 | mcam_reg_write(mcam, REG_GL_CSR, GCSR_SRC|GCSR_MRS); | ||
| 386 | /* | ||
| 387 | * Here we must wait a bit for the controller to come around. | ||
| 388 | */ | ||
| 389 | spin_unlock_irqrestore(&mcam->dev_lock, flags); | ||
| 390 | msleep(5); | ||
| 391 | spin_lock_irqsave(&mcam->dev_lock, flags); | ||
| 392 | |||
| 393 | mcam_reg_write(mcam, REG_GL_CSR, GCSR_CCIC_EN|GCSR_SRC|GCSR_MRC); | ||
| 394 | mcam_reg_set_bit(mcam, REG_GL_IMASK, GIMSK_CCIC_EN); | ||
| 395 | /* | ||
| 396 | * Mask all interrupts. | ||
| 397 | */ | ||
| 398 | mcam_reg_write(mcam, REG_IRQMASK, 0); | ||
| 399 | spin_unlock_irqrestore(&mcam->dev_lock, flags); | ||
| 400 | } | ||
| 401 | |||
| 402 | |||
| 403 | static void cafe_ctlr_power_up(struct mcam_camera *mcam) | ||
| 404 | { | ||
| 405 | /* | ||
| 406 | * Part one of the sensor dance: turn the global | ||
| 407 | * GPIO signal on. | ||
| 408 | */ | ||
| 409 | mcam_reg_write(mcam, REG_GL_FCR, GFCR_GPIO_ON); | ||
| 410 | mcam_reg_write(mcam, REG_GL_GPIOR, GGPIO_OUT|GGPIO_VAL); | ||
| 411 | /* | ||
| 412 | * Put the sensor into operational mode (assumes OLPC-style | ||
| 413 | * wiring). Control 0 is reset - set to 1 to operate. | ||
| 414 | * Control 1 is power down, set to 0 to operate. | ||
| 415 | */ | ||
| 416 | mcam_reg_write(mcam, REG_GPR, GPR_C1EN|GPR_C0EN); /* pwr up, reset */ | ||
| 417 | mcam_reg_write(mcam, REG_GPR, GPR_C1EN|GPR_C0EN|GPR_C0); | ||
| 418 | } | ||
| 419 | |||
| 420 | static void cafe_ctlr_power_down(struct mcam_camera *mcam) | ||
| 421 | { | ||
| 422 | mcam_reg_write(mcam, REG_GPR, GPR_C1EN|GPR_C0EN|GPR_C1); | ||
| 423 | mcam_reg_write(mcam, REG_GL_FCR, GFCR_GPIO_ON); | ||
| 424 | mcam_reg_write(mcam, REG_GL_GPIOR, GGPIO_OUT); | ||
| 425 | } | ||
| 426 | |||
| 427 | |||
| 428 | |||
| 429 | /* | ||
| 430 | * The platform interrupt handler. | ||
| 431 | */ | ||
| 432 | static irqreturn_t cafe_irq(int irq, void *data) | ||
| 433 | { | ||
| 434 | struct cafe_camera *cam = data; | ||
| 435 | struct mcam_camera *mcam = &cam->mcam; | ||
| 436 | unsigned int irqs, handled; | ||
| 437 | |||
| 438 | spin_lock(&mcam->dev_lock); | ||
| 439 | irqs = mcam_reg_read(mcam, REG_IRQSTAT); | ||
| 440 | handled = cam->registered && mccic_irq(mcam, irqs); | ||
| 441 | if (irqs & TWSIIRQS) { | ||
| 442 | mcam_reg_write(mcam, REG_IRQSTAT, TWSIIRQS); | ||
| 443 | wake_up(&cam->smbus_wait); | ||
| 444 | handled = 1; | ||
| 445 | } | ||
| 446 | spin_unlock(&mcam->dev_lock); | ||
| 447 | return IRQ_RETVAL(handled); | ||
| 448 | } | ||
| 449 | |||
| 450 | |||
| 451 | /* -------------------------------------------------------------------------- */ | ||
| 452 | /* | ||
| 453 | * PCI interface stuff. | ||
| 454 | */ | ||
| 455 | |||
| 456 | static int cafe_pci_probe(struct pci_dev *pdev, | ||
| 457 | const struct pci_device_id *id) | ||
| 458 | { | ||
| 459 | int ret; | ||
| 460 | struct cafe_camera *cam; | ||
| 461 | struct mcam_camera *mcam; | ||
| 462 | |||
| 463 | /* | ||
| 464 | * Start putting together one of our big camera structures. | ||
| 465 | */ | ||
| 466 | ret = -ENOMEM; | ||
| 467 | cam = kzalloc(sizeof(struct cafe_camera), GFP_KERNEL); | ||
| 468 | if (cam == NULL) | ||
| 469 | goto out; | ||
| 470 | cam->pdev = pdev; | ||
| 471 | mcam = &cam->mcam; | ||
| 472 | mcam->chip_id = V4L2_IDENT_CAFE; | ||
| 473 | spin_lock_init(&mcam->dev_lock); | ||
| 474 | init_waitqueue_head(&cam->smbus_wait); | ||
| 475 | mcam->plat_power_up = cafe_ctlr_power_up; | ||
| 476 | mcam->plat_power_down = cafe_ctlr_power_down; | ||
| 477 | mcam->dev = &pdev->dev; | ||
| 478 | /* | ||
| 479 | * Set the clock speed for the XO 1; I don't believe this | ||
| 480 | * driver has ever run anywhere else. | ||
| 481 | */ | ||
| 482 | mcam->clock_speed = 45; | ||
| 483 | mcam->use_smbus = 1; | ||
| 484 | /* | ||
| 485 | * Vmalloc mode for buffers is traditional with this driver. | ||
| 486 | * We *might* be able to run DMA_contig, especially on a system | ||
| 487 | * with CMA in it. | ||
| 488 | */ | ||
| 489 | mcam->buffer_mode = B_vmalloc; | ||
| 490 | /* | ||
| 491 | * Get set up on the PCI bus. | ||
| 492 | */ | ||
| 493 | ret = pci_enable_device(pdev); | ||
| 494 | if (ret) | ||
| 495 | goto out_free; | ||
| 496 | pci_set_master(pdev); | ||
| 497 | |||
| 498 | ret = -EIO; | ||
| 499 | mcam->regs = pci_iomap(pdev, 0, 0); | ||
| 500 | if (!mcam->regs) { | ||
| 501 | printk(KERN_ERR "Unable to ioremap cafe-ccic regs\n"); | ||
| 502 | goto out_disable; | ||
| 503 | } | ||
| 504 | ret = request_irq(pdev->irq, cafe_irq, IRQF_SHARED, "cafe-ccic", cam); | ||
| 505 | if (ret) | ||
| 506 | goto out_iounmap; | ||
| 507 | |||
| 508 | /* | ||
| 509 | * Initialize the controller and leave it powered up. It will | ||
| 510 | * stay that way until the sensor driver shows up. | ||
| 511 | */ | ||
| 512 | cafe_ctlr_init(mcam); | ||
| 513 | cafe_ctlr_power_up(mcam); | ||
| 514 | /* | ||
| 515 | * Set up I2C/SMBUS communications. We have to drop the mutex here | ||
| 516 | * because the sensor could attach in this call chain, leading to | ||
| 517 | * unsightly deadlocks. | ||
| 518 | */ | ||
| 519 | ret = cafe_smbus_setup(cam); | ||
| 520 | if (ret) | ||
| 521 | goto out_pdown; | ||
| 522 | |||
| 523 | ret = mccic_register(mcam); | ||
| 524 | if (ret == 0) { | ||
| 525 | cam->registered = 1; | ||
| 526 | return 0; | ||
| 527 | } | ||
| 528 | |||
| 529 | cafe_smbus_shutdown(cam); | ||
| 530 | out_pdown: | ||
| 531 | cafe_ctlr_power_down(mcam); | ||
| 532 | free_irq(pdev->irq, cam); | ||
| 533 | out_iounmap: | ||
| 534 | pci_iounmap(pdev, mcam->regs); | ||
| 535 | out_disable: | ||
| 536 | pci_disable_device(pdev); | ||
| 537 | out_free: | ||
| 538 | kfree(cam); | ||
| 539 | out: | ||
| 540 | return ret; | ||
| 541 | } | ||
| 542 | |||
| 543 | |||
| 544 | /* | ||
| 545 | * Shut down an initialized device | ||
| 546 | */ | ||
| 547 | static void cafe_shutdown(struct cafe_camera *cam) | ||
| 548 | { | ||
| 549 | mccic_shutdown(&cam->mcam); | ||
| 550 | cafe_smbus_shutdown(cam); | ||
| 551 | free_irq(cam->pdev->irq, cam); | ||
| 552 | pci_iounmap(cam->pdev, cam->mcam.regs); | ||
| 553 | } | ||
| 554 | |||
| 555 | |||
| 556 | static void cafe_pci_remove(struct pci_dev *pdev) | ||
| 557 | { | ||
| 558 | struct v4l2_device *v4l2_dev = dev_get_drvdata(&pdev->dev); | ||
| 559 | struct cafe_camera *cam = to_cam(v4l2_dev); | ||
| 560 | |||
| 561 | if (cam == NULL) { | ||
| 562 | printk(KERN_WARNING "pci_remove on unknown pdev %p\n", pdev); | ||
| 563 | return; | ||
| 564 | } | ||
| 565 | cafe_shutdown(cam); | ||
| 566 | kfree(cam); | ||
| 567 | } | ||
| 568 | |||
| 569 | |||
| 570 | #ifdef CONFIG_PM | ||
| 571 | /* | ||
| 572 | * Basic power management. | ||
| 573 | */ | ||
| 574 | static int cafe_pci_suspend(struct pci_dev *pdev, pm_message_t state) | ||
| 575 | { | ||
| 576 | struct v4l2_device *v4l2_dev = dev_get_drvdata(&pdev->dev); | ||
| 577 | struct cafe_camera *cam = to_cam(v4l2_dev); | ||
| 578 | int ret; | ||
| 579 | |||
| 580 | ret = pci_save_state(pdev); | ||
| 581 | if (ret) | ||
| 582 | return ret; | ||
| 583 | mccic_suspend(&cam->mcam); | ||
| 584 | pci_disable_device(pdev); | ||
| 585 | return 0; | ||
| 586 | } | ||
| 587 | |||
| 588 | |||
| 589 | static int cafe_pci_resume(struct pci_dev *pdev) | ||
| 590 | { | ||
| 591 | struct v4l2_device *v4l2_dev = dev_get_drvdata(&pdev->dev); | ||
| 592 | struct cafe_camera *cam = to_cam(v4l2_dev); | ||
| 593 | int ret = 0; | ||
| 594 | |||
| 595 | pci_restore_state(pdev); | ||
| 596 | ret = pci_enable_device(pdev); | ||
| 597 | |||
| 598 | if (ret) { | ||
| 599 | cam_warn(cam, "Unable to re-enable device on resume!\n"); | ||
| 600 | return ret; | ||
| 601 | } | ||
| 602 | cafe_ctlr_init(&cam->mcam); | ||
| 603 | return mccic_resume(&cam->mcam); | ||
| 604 | } | ||
| 605 | |||
| 606 | #endif /* CONFIG_PM */ | ||
| 607 | |||
| 608 | static struct pci_device_id cafe_ids[] = { | ||
| 609 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, | ||
| 610 | PCI_DEVICE_ID_MARVELL_88ALP01_CCIC) }, | ||
| 611 | { 0, } | ||
| 612 | }; | ||
| 613 | |||
| 614 | MODULE_DEVICE_TABLE(pci, cafe_ids); | ||
| 615 | |||
| 616 | static struct pci_driver cafe_pci_driver = { | ||
| 617 | .name = "cafe1000-ccic", | ||
| 618 | .id_table = cafe_ids, | ||
| 619 | .probe = cafe_pci_probe, | ||
| 620 | .remove = cafe_pci_remove, | ||
| 621 | #ifdef CONFIG_PM | ||
| 622 | .suspend = cafe_pci_suspend, | ||
| 623 | .resume = cafe_pci_resume, | ||
| 624 | #endif | ||
| 625 | }; | ||
| 626 | |||
| 627 | |||
| 628 | |||
| 629 | |||
| 630 | static int __init cafe_init(void) | ||
| 631 | { | ||
| 632 | int ret; | ||
| 633 | |||
| 634 | printk(KERN_NOTICE "Marvell M88ALP01 'CAFE' Camera Controller version %d\n", | ||
| 635 | CAFE_VERSION); | ||
| 636 | ret = pci_register_driver(&cafe_pci_driver); | ||
| 637 | if (ret) { | ||
| 638 | printk(KERN_ERR "Unable to register cafe_ccic driver\n"); | ||
| 639 | goto out; | ||
| 640 | } | ||
| 641 | ret = 0; | ||
| 642 | |||
| 643 | out: | ||
| 644 | return ret; | ||
| 645 | } | ||
| 646 | |||
| 647 | |||
| 648 | static void __exit cafe_exit(void) | ||
| 649 | { | ||
| 650 | pci_unregister_driver(&cafe_pci_driver); | ||
| 651 | } | ||
| 652 | |||
| 653 | module_init(cafe_init); | ||
| 654 | module_exit(cafe_exit); | ||
diff --git a/drivers/media/video/marvell-ccic/mcam-core.c b/drivers/media/video/marvell-ccic/mcam-core.c new file mode 100644 index 000000000000..83c14514cd52 --- /dev/null +++ b/drivers/media/video/marvell-ccic/mcam-core.c | |||
| @@ -0,0 +1,1843 @@ | |||
| 1 | /* | ||
| 2 | * The Marvell camera core. This device appears in a number of settings, | ||
| 3 | * so it needs platform-specific support outside of the core. | ||
| 4 | * | ||
| 5 | * Copyright 2011 Jonathan Corbet corbet@lwn.net | ||
| 6 | */ | ||
| 7 | #include <linux/kernel.h> | ||
| 8 | #include <linux/module.h> | ||
| 9 | #include <linux/fs.h> | ||
| 10 | #include <linux/mm.h> | ||
| 11 | #include <linux/i2c.h> | ||
| 12 | #include <linux/interrupt.h> | ||
| 13 | #include <linux/spinlock.h> | ||
| 14 | #include <linux/slab.h> | ||
| 15 | #include <linux/device.h> | ||
| 16 | #include <linux/wait.h> | ||
| 17 | #include <linux/list.h> | ||
| 18 | #include <linux/dma-mapping.h> | ||
| 19 | #include <linux/delay.h> | ||
| 20 | #include <linux/vmalloc.h> | ||
| 21 | #include <linux/io.h> | ||
| 22 | #include <linux/videodev2.h> | ||
| 23 | #include <media/v4l2-device.h> | ||
| 24 | #include <media/v4l2-ioctl.h> | ||
| 25 | #include <media/v4l2-chip-ident.h> | ||
| 26 | #include <media/ov7670.h> | ||
| 27 | #include <media/videobuf2-vmalloc.h> | ||
| 28 | #include <media/videobuf2-dma-contig.h> | ||
| 29 | #include <media/videobuf2-dma-sg.h> | ||
| 30 | |||
| 31 | #include "mcam-core.h" | ||
| 32 | |||
| 33 | /* | ||
| 34 | * Basic frame stats - to be deleted shortly | ||
| 35 | */ | ||
| 36 | static int frames; | ||
| 37 | static int singles; | ||
| 38 | static int delivered; | ||
| 39 | |||
| 40 | #ifdef MCAM_MODE_VMALLOC | ||
| 41 | /* | ||
| 42 | * Internal DMA buffer management. Since the controller cannot do S/G I/O, | ||
| 43 | * we must have physically contiguous buffers to bring frames into. | ||
| 44 | * These parameters control how many buffers we use, whether we | ||
| 45 | * allocate them at load time (better chance of success, but nails down | ||
| 46 | * memory) or when somebody tries to use the camera (riskier), and, | ||
| 47 | * for load-time allocation, how big they should be. | ||
| 48 | * | ||
| 49 | * The controller can cycle through three buffers. We could use | ||
| 50 | * more by flipping pointers around, but it probably makes little | ||
| 51 | * sense. | ||
| 52 | */ | ||
| 53 | |||
| 54 | static int alloc_bufs_at_read; | ||
| 55 | module_param(alloc_bufs_at_read, bool, 0444); | ||
| 56 | MODULE_PARM_DESC(alloc_bufs_at_read, | ||
| 57 | "Non-zero value causes DMA buffers to be allocated when the " | ||
| 58 | "video capture device is read, rather than at module load " | ||
| 59 | "time. This saves memory, but decreases the chances of " | ||
| 60 | "successfully getting those buffers. This parameter is " | ||
| 61 | "only used in the vmalloc buffer mode"); | ||
| 62 | |||
| 63 | static int n_dma_bufs = 3; | ||
| 64 | module_param(n_dma_bufs, uint, 0644); | ||
| 65 | MODULE_PARM_DESC(n_dma_bufs, | ||
| 66 | "The number of DMA buffers to allocate. Can be either two " | ||
| 67 | "(saves memory, makes timing tighter) or three."); | ||
| 68 | |||
| 69 | static int dma_buf_size = VGA_WIDTH * VGA_HEIGHT * 2; /* Worst case */ | ||
| 70 | module_param(dma_buf_size, uint, 0444); | ||
| 71 | MODULE_PARM_DESC(dma_buf_size, | ||
| 72 | "The size of the allocated DMA buffers. If actual operating " | ||
| 73 | "parameters require larger buffers, an attempt to reallocate " | ||
| 74 | "will be made."); | ||
| 75 | #else /* MCAM_MODE_VMALLOC */ | ||
| 76 | static const int alloc_bufs_at_read = 0; | ||
| 77 | static const int n_dma_bufs = 3; /* Used by S/G_PARM */ | ||
| 78 | #endif /* MCAM_MODE_VMALLOC */ | ||
| 79 | |||
| 80 | static int flip; | ||
| 81 | module_param(flip, bool, 0444); | ||
| 82 | MODULE_PARM_DESC(flip, | ||
| 83 | "If set, the sensor will be instructed to flip the image " | ||
| 84 | "vertically."); | ||
| 85 | |||
| 86 | static int buffer_mode = -1; | ||
| 87 | module_param(buffer_mode, int, 0444); | ||
| 88 | MODULE_PARM_DESC(buffer_mode, | ||
| 89 | "Set the buffer mode to be used; default is to go with what " | ||
| 90 | "the platform driver asks for. Set to 0 for vmalloc, 1 for " | ||
| 91 | "DMA contiguous."); | ||
| 92 | |||
| 93 | /* | ||
| 94 | * Status flags. Always manipulated with bit operations. | ||
| 95 | */ | ||
| 96 | #define CF_BUF0_VALID 0 /* Buffers valid - first three */ | ||
| 97 | #define CF_BUF1_VALID 1 | ||
| 98 | #define CF_BUF2_VALID 2 | ||
| 99 | #define CF_DMA_ACTIVE 3 /* A frame is incoming */ | ||
| 100 | #define CF_CONFIG_NEEDED 4 /* Must configure hardware */ | ||
| 101 | #define CF_SINGLE_BUFFER 5 /* Running with a single buffer */ | ||
| 102 | #define CF_SG_RESTART 6 /* SG restart needed */ | ||
| 103 | |||
| 104 | #define sensor_call(cam, o, f, args...) \ | ||
| 105 | v4l2_subdev_call(cam->sensor, o, f, ##args) | ||
| 106 | |||
| 107 | static struct mcam_format_struct { | ||
| 108 | __u8 *desc; | ||
| 109 | __u32 pixelformat; | ||
| 110 | int bpp; /* Bytes per pixel */ | ||
| 111 | enum v4l2_mbus_pixelcode mbus_code; | ||
| 112 | } mcam_formats[] = { | ||
| 113 | { | ||
| 114 | .desc = "YUYV 4:2:2", | ||
| 115 | .pixelformat = V4L2_PIX_FMT_YUYV, | ||
| 116 | .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8, | ||
| 117 | .bpp = 2, | ||
| 118 | }, | ||
| 119 | { | ||
| 120 | .desc = "RGB 444", | ||
| 121 | .pixelformat = V4L2_PIX_FMT_RGB444, | ||
| 122 | .mbus_code = V4L2_MBUS_FMT_RGB444_2X8_PADHI_LE, | ||
| 123 | .bpp = 2, | ||
| 124 | }, | ||
| 125 | { | ||
| 126 | .desc = "RGB 565", | ||
| 127 | .pixelformat = V4L2_PIX_FMT_RGB565, | ||
| 128 | .mbus_code = V4L2_MBUS_FMT_RGB565_2X8_LE, | ||
| 129 | .bpp = 2, | ||
| 130 | }, | ||
| 131 | { | ||
| 132 | .desc = "Raw RGB Bayer", | ||
| 133 | .pixelformat = V4L2_PIX_FMT_SBGGR8, | ||
| 134 | .mbus_code = V4L2_MBUS_FMT_SBGGR8_1X8, | ||
| 135 | .bpp = 1 | ||
| 136 | }, | ||
| 137 | }; | ||
| 138 | #define N_MCAM_FMTS ARRAY_SIZE(mcam_formats) | ||
| 139 | |||
| 140 | static struct mcam_format_struct *mcam_find_format(u32 pixelformat) | ||
| 141 | { | ||
| 142 | unsigned i; | ||
| 143 | |||
| 144 | for (i = 0; i < N_MCAM_FMTS; i++) | ||
| 145 | if (mcam_formats[i].pixelformat == pixelformat) | ||
| 146 | return mcam_formats + i; | ||
| 147 | /* Not found? Then return the first format. */ | ||
| 148 | return mcam_formats; | ||
| 149 | } | ||
| 150 | |||
| 151 | /* | ||
| 152 | * The default format we use until somebody says otherwise. | ||
| 153 | */ | ||
| 154 | static const struct v4l2_pix_format mcam_def_pix_format = { | ||
| 155 | .width = VGA_WIDTH, | ||
| 156 | .height = VGA_HEIGHT, | ||
| 157 | .pixelformat = V4L2_PIX_FMT_YUYV, | ||
| 158 | .field = V4L2_FIELD_NONE, | ||
| 159 | .bytesperline = VGA_WIDTH*2, | ||
| 160 | .sizeimage = VGA_WIDTH*VGA_HEIGHT*2, | ||
| 161 | }; | ||
| 162 | |||
| 163 | static const enum v4l2_mbus_pixelcode mcam_def_mbus_code = | ||
| 164 | V4L2_MBUS_FMT_YUYV8_2X8; | ||
| 165 | |||
| 166 | |||
| 167 | /* | ||
| 168 | * The two-word DMA descriptor format used by the Armada 610 and like. There | ||
| 169 | * Is a three-word format as well (set C1_DESC_3WORD) where the third | ||
| 170 | * word is a pointer to the next descriptor, but we don't use it. Two-word | ||
| 171 | * descriptors have to be contiguous in memory. | ||
| 172 | */ | ||
| 173 | struct mcam_dma_desc { | ||
| 174 | u32 dma_addr; | ||
| 175 | u32 segment_len; | ||
| 176 | }; | ||
| 177 | |||
| 178 | /* | ||
| 179 | * Our buffer type for working with videobuf2. Note that the vb2 | ||
| 180 | * developers have decreed that struct vb2_buffer must be at the | ||
| 181 | * beginning of this structure. | ||
| 182 | */ | ||
| 183 | struct mcam_vb_buffer { | ||
| 184 | struct vb2_buffer vb_buf; | ||
| 185 | struct list_head queue; | ||
| 186 | struct mcam_dma_desc *dma_desc; /* Descriptor virtual address */ | ||
| 187 | dma_addr_t dma_desc_pa; /* Descriptor physical address */ | ||
| 188 | int dma_desc_nent; /* Number of mapped descriptors */ | ||
| 189 | }; | ||
| 190 | |||
| 191 | static inline struct mcam_vb_buffer *vb_to_mvb(struct vb2_buffer *vb) | ||
| 192 | { | ||
| 193 | return container_of(vb, struct mcam_vb_buffer, vb_buf); | ||
| 194 | } | ||
| 195 | |||
| 196 | /* | ||
| 197 | * Hand a completed buffer back to user space. | ||
| 198 | */ | ||
| 199 | static void mcam_buffer_done(struct mcam_camera *cam, int frame, | ||
| 200 | struct vb2_buffer *vbuf) | ||
| 201 | { | ||
| 202 | vbuf->v4l2_buf.bytesused = cam->pix_format.sizeimage; | ||
| 203 | vbuf->v4l2_buf.sequence = cam->buf_seq[frame]; | ||
| 204 | vb2_set_plane_payload(vbuf, 0, cam->pix_format.sizeimage); | ||
| 205 | vb2_buffer_done(vbuf, VB2_BUF_STATE_DONE); | ||
| 206 | } | ||
| 207 | |||
| 208 | |||
| 209 | |||
| 210 | /* | ||
| 211 | * Debugging and related. | ||
| 212 | */ | ||
| 213 | #define cam_err(cam, fmt, arg...) \ | ||
| 214 | dev_err((cam)->dev, fmt, ##arg); | ||
| 215 | #define cam_warn(cam, fmt, arg...) \ | ||
| 216 | dev_warn((cam)->dev, fmt, ##arg); | ||
| 217 | #define cam_dbg(cam, fmt, arg...) \ | ||
| 218 | dev_dbg((cam)->dev, fmt, ##arg); | ||
| 219 | |||
| 220 | |||
| 221 | /* | ||
| 222 | * Flag manipulation helpers | ||
| 223 | */ | ||
| 224 | static void mcam_reset_buffers(struct mcam_camera *cam) | ||
| 225 | { | ||
| 226 | int i; | ||
| 227 | |||
| 228 | cam->next_buf = -1; | ||
| 229 | for (i = 0; i < cam->nbufs; i++) | ||
| 230 | clear_bit(i, &cam->flags); | ||
| 231 | } | ||
| 232 | |||
| 233 | static inline int mcam_needs_config(struct mcam_camera *cam) | ||
| 234 | { | ||
| 235 | return test_bit(CF_CONFIG_NEEDED, &cam->flags); | ||
| 236 | } | ||
| 237 | |||
| 238 | static void mcam_set_config_needed(struct mcam_camera *cam, int needed) | ||
| 239 | { | ||
| 240 | if (needed) | ||
| 241 | set_bit(CF_CONFIG_NEEDED, &cam->flags); | ||
| 242 | else | ||
| 243 | clear_bit(CF_CONFIG_NEEDED, &cam->flags); | ||
| 244 | } | ||
| 245 | |||
| 246 | /* ------------------------------------------------------------------- */ | ||
| 247 | /* | ||
| 248 | * Make the controller start grabbing images. Everything must | ||
| 249 | * be set up before doing this. | ||
| 250 | */ | ||
| 251 | static void mcam_ctlr_start(struct mcam_camera *cam) | ||
| 252 | { | ||
| 253 | /* set_bit performs a read, so no other barrier should be | ||
| 254 | needed here */ | ||
| 255 | mcam_reg_set_bit(cam, REG_CTRL0, C0_ENABLE); | ||
| 256 | } | ||
| 257 | |||
| 258 | static void mcam_ctlr_stop(struct mcam_camera *cam) | ||
| 259 | { | ||
| 260 | mcam_reg_clear_bit(cam, REG_CTRL0, C0_ENABLE); | ||
| 261 | } | ||
| 262 | |||
| 263 | /* ------------------------------------------------------------------- */ | ||
| 264 | |||
| 265 | #ifdef MCAM_MODE_VMALLOC | ||
| 266 | /* | ||
| 267 | * Code specific to the vmalloc buffer mode. | ||
| 268 | */ | ||
| 269 | |||
| 270 | /* | ||
| 271 | * Allocate in-kernel DMA buffers for vmalloc mode. | ||
| 272 | */ | ||
| 273 | static int mcam_alloc_dma_bufs(struct mcam_camera *cam, int loadtime) | ||
| 274 | { | ||
| 275 | int i; | ||
| 276 | |||
| 277 | mcam_set_config_needed(cam, 1); | ||
| 278 | if (loadtime) | ||
| 279 | cam->dma_buf_size = dma_buf_size; | ||
| 280 | else | ||
| 281 | cam->dma_buf_size = cam->pix_format.sizeimage; | ||
| 282 | if (n_dma_bufs > 3) | ||
| 283 | n_dma_bufs = 3; | ||
| 284 | |||
| 285 | cam->nbufs = 0; | ||
| 286 | for (i = 0; i < n_dma_bufs; i++) { | ||
| 287 | cam->dma_bufs[i] = dma_alloc_coherent(cam->dev, | ||
| 288 | cam->dma_buf_size, cam->dma_handles + i, | ||
| 289 | GFP_KERNEL); | ||
| 290 | if (cam->dma_bufs[i] == NULL) { | ||
| 291 | cam_warn(cam, "Failed to allocate DMA buffer\n"); | ||
| 292 | break; | ||
| 293 | } | ||
| 294 | (cam->nbufs)++; | ||
| 295 | } | ||
| 296 | |||
| 297 | switch (cam->nbufs) { | ||
| 298 | case 1: | ||
| 299 | dma_free_coherent(cam->dev, cam->dma_buf_size, | ||
| 300 | cam->dma_bufs[0], cam->dma_handles[0]); | ||
| 301 | cam->nbufs = 0; | ||
| 302 | case 0: | ||
| 303 | cam_err(cam, "Insufficient DMA buffers, cannot operate\n"); | ||
| 304 | return -ENOMEM; | ||
| 305 | |||
| 306 | case 2: | ||
| 307 | if (n_dma_bufs > 2) | ||
| 308 | cam_warn(cam, "Will limp along with only 2 buffers\n"); | ||
| 309 | break; | ||
| 310 | } | ||
| 311 | return 0; | ||
| 312 | } | ||
| 313 | |||
| 314 | static void mcam_free_dma_bufs(struct mcam_camera *cam) | ||
| 315 | { | ||
| 316 | int i; | ||
| 317 | |||
| 318 | for (i = 0; i < cam->nbufs; i++) { | ||
| 319 | dma_free_coherent(cam->dev, cam->dma_buf_size, | ||
| 320 | cam->dma_bufs[i], cam->dma_handles[i]); | ||
| 321 | cam->dma_bufs[i] = NULL; | ||
| 322 | } | ||
| 323 | cam->nbufs = 0; | ||
| 324 | } | ||
| 325 | |||
| 326 | |||
| 327 | /* | ||
| 328 | * Set up DMA buffers when operating in vmalloc mode | ||
| 329 | */ | ||
| 330 | static void mcam_ctlr_dma_vmalloc(struct mcam_camera *cam) | ||
| 331 | { | ||
| 332 | /* | ||
| 333 | * Store the first two Y buffers (we aren't supporting | ||
| 334 | * planar formats for now, so no UV bufs). Then either | ||
| 335 | * set the third if it exists, or tell the controller | ||
| 336 | * to just use two. | ||
| 337 | */ | ||
| 338 | mcam_reg_write(cam, REG_Y0BAR, cam->dma_handles[0]); | ||
| 339 | mcam_reg_write(cam, REG_Y1BAR, cam->dma_handles[1]); | ||
| 340 | if (cam->nbufs > 2) { | ||
| 341 | mcam_reg_write(cam, REG_Y2BAR, cam->dma_handles[2]); | ||
| 342 | mcam_reg_clear_bit(cam, REG_CTRL1, C1_TWOBUFS); | ||
| 343 | } else | ||
| 344 | mcam_reg_set_bit(cam, REG_CTRL1, C1_TWOBUFS); | ||
| 345 | if (cam->chip_id == V4L2_IDENT_CAFE) | ||
| 346 | mcam_reg_write(cam, REG_UBAR, 0); /* 32 bits only */ | ||
| 347 | } | ||
| 348 | |||
| 349 | /* | ||
| 350 | * Copy data out to user space in the vmalloc case | ||
| 351 | */ | ||
| 352 | static void mcam_frame_tasklet(unsigned long data) | ||
| 353 | { | ||
| 354 | struct mcam_camera *cam = (struct mcam_camera *) data; | ||
| 355 | int i; | ||
| 356 | unsigned long flags; | ||
| 357 | struct mcam_vb_buffer *buf; | ||
| 358 | |||
| 359 | spin_lock_irqsave(&cam->dev_lock, flags); | ||
| 360 | for (i = 0; i < cam->nbufs; i++) { | ||
| 361 | int bufno = cam->next_buf; | ||
| 362 | |||
| 363 | if (cam->state != S_STREAMING || bufno < 0) | ||
| 364 | break; /* I/O got stopped */ | ||
| 365 | if (++(cam->next_buf) >= cam->nbufs) | ||
| 366 | cam->next_buf = 0; | ||
| 367 | if (!test_bit(bufno, &cam->flags)) | ||
| 368 | continue; | ||
| 369 | if (list_empty(&cam->buffers)) { | ||
| 370 | singles++; | ||
| 371 | break; /* Leave it valid, hope for better later */ | ||
| 372 | } | ||
| 373 | delivered++; | ||
| 374 | clear_bit(bufno, &cam->flags); | ||
| 375 | buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer, | ||
| 376 | queue); | ||
| 377 | list_del_init(&buf->queue); | ||
| 378 | /* | ||
| 379 | * Drop the lock during the big copy. This *should* be safe... | ||
| 380 | */ | ||
| 381 | spin_unlock_irqrestore(&cam->dev_lock, flags); | ||
| 382 | memcpy(vb2_plane_vaddr(&buf->vb_buf, 0), cam->dma_bufs[bufno], | ||
| 383 | cam->pix_format.sizeimage); | ||
| 384 | mcam_buffer_done(cam, bufno, &buf->vb_buf); | ||
| 385 | spin_lock_irqsave(&cam->dev_lock, flags); | ||
| 386 | } | ||
| 387 | spin_unlock_irqrestore(&cam->dev_lock, flags); | ||
| 388 | } | ||
| 389 | |||
| 390 | |||
| 391 | /* | ||
| 392 | * Make sure our allocated buffers are up to the task. | ||
| 393 | */ | ||
| 394 | static int mcam_check_dma_buffers(struct mcam_camera *cam) | ||
| 395 | { | ||
| 396 | if (cam->nbufs > 0 && cam->dma_buf_size < cam->pix_format.sizeimage) | ||
| 397 | mcam_free_dma_bufs(cam); | ||
| 398 | if (cam->nbufs == 0) | ||
| 399 | return mcam_alloc_dma_bufs(cam, 0); | ||
| 400 | return 0; | ||
| 401 | } | ||
| 402 | |||
| 403 | static void mcam_vmalloc_done(struct mcam_camera *cam, int frame) | ||
| 404 | { | ||
| 405 | tasklet_schedule(&cam->s_tasklet); | ||
| 406 | } | ||
| 407 | |||
| 408 | #else /* MCAM_MODE_VMALLOC */ | ||
| 409 | |||
| 410 | static inline int mcam_alloc_dma_bufs(struct mcam_camera *cam, int loadtime) | ||
| 411 | { | ||
| 412 | return 0; | ||
| 413 | } | ||
| 414 | |||
| 415 | static inline void mcam_free_dma_bufs(struct mcam_camera *cam) | ||
| 416 | { | ||
| 417 | return; | ||
| 418 | } | ||
| 419 | |||
| 420 | static inline int mcam_check_dma_buffers(struct mcam_camera *cam) | ||
| 421 | { | ||
| 422 | return 0; | ||
| 423 | } | ||
| 424 | |||
| 425 | |||
| 426 | |||
| 427 | #endif /* MCAM_MODE_VMALLOC */ | ||
| 428 | |||
| 429 | |||
| 430 | #ifdef MCAM_MODE_DMA_CONTIG | ||
| 431 | /* ---------------------------------------------------------------------- */ | ||
| 432 | /* | ||
| 433 | * DMA-contiguous code. | ||
| 434 | */ | ||
| 435 | /* | ||
| 436 | * Set up a contiguous buffer for the given frame. Here also is where | ||
| 437 | * the underrun strategy is set: if there is no buffer available, reuse | ||
| 438 | * the buffer from the other BAR and set the CF_SINGLE_BUFFER flag to | ||
| 439 | * keep the interrupt handler from giving that buffer back to user | ||
| 440 | * space. In this way, we always have a buffer to DMA to and don't | ||
| 441 | * have to try to play games stopping and restarting the controller. | ||
| 442 | */ | ||
| 443 | static void mcam_set_contig_buffer(struct mcam_camera *cam, int frame) | ||
| 444 | { | ||
| 445 | struct mcam_vb_buffer *buf; | ||
| 446 | /* | ||
| 447 | * If there are no available buffers, go into single mode | ||
| 448 | */ | ||
| 449 | if (list_empty(&cam->buffers)) { | ||
| 450 | buf = cam->vb_bufs[frame ^ 0x1]; | ||
| 451 | cam->vb_bufs[frame] = buf; | ||
| 452 | mcam_reg_write(cam, frame == 0 ? REG_Y0BAR : REG_Y1BAR, | ||
| 453 | vb2_dma_contig_plane_paddr(&buf->vb_buf, 0)); | ||
| 454 | set_bit(CF_SINGLE_BUFFER, &cam->flags); | ||
| 455 | singles++; | ||
| 456 | return; | ||
| 457 | } | ||
| 458 | /* | ||
| 459 | * OK, we have a buffer we can use. | ||
| 460 | */ | ||
| 461 | buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer, queue); | ||
| 462 | list_del_init(&buf->queue); | ||
| 463 | mcam_reg_write(cam, frame == 0 ? REG_Y0BAR : REG_Y1BAR, | ||
| 464 | vb2_dma_contig_plane_paddr(&buf->vb_buf, 0)); | ||
| 465 | cam->vb_bufs[frame] = buf; | ||
| 466 | clear_bit(CF_SINGLE_BUFFER, &cam->flags); | ||
| 467 | } | ||
| 468 | |||
| 469 | /* | ||
| 470 | * Initial B_DMA_contig setup. | ||
| 471 | */ | ||
| 472 | static void mcam_ctlr_dma_contig(struct mcam_camera *cam) | ||
| 473 | { | ||
| 474 | mcam_reg_set_bit(cam, REG_CTRL1, C1_TWOBUFS); | ||
| 475 | cam->nbufs = 2; | ||
| 476 | mcam_set_contig_buffer(cam, 0); | ||
| 477 | mcam_set_contig_buffer(cam, 1); | ||
| 478 | } | ||
| 479 | |||
| 480 | /* | ||
| 481 | * Frame completion handling. | ||
| 482 | */ | ||
| 483 | static void mcam_dma_contig_done(struct mcam_camera *cam, int frame) | ||
| 484 | { | ||
| 485 | struct mcam_vb_buffer *buf = cam->vb_bufs[frame]; | ||
| 486 | |||
| 487 | if (!test_bit(CF_SINGLE_BUFFER, &cam->flags)) { | ||
| 488 | delivered++; | ||
| 489 | mcam_buffer_done(cam, frame, &buf->vb_buf); | ||
| 490 | } | ||
| 491 | mcam_set_contig_buffer(cam, frame); | ||
| 492 | } | ||
| 493 | |||
| 494 | #endif /* MCAM_MODE_DMA_CONTIG */ | ||
| 495 | |||
| 496 | #ifdef MCAM_MODE_DMA_SG | ||
| 497 | /* ---------------------------------------------------------------------- */ | ||
| 498 | /* | ||
| 499 | * Scatter/gather-specific code. | ||
| 500 | */ | ||
| 501 | |||
| 502 | /* | ||
| 503 | * Set up the next buffer for S/G I/O; caller should be sure that | ||
| 504 | * the controller is stopped and a buffer is available. | ||
| 505 | */ | ||
| 506 | static void mcam_sg_next_buffer(struct mcam_camera *cam) | ||
| 507 | { | ||
| 508 | struct mcam_vb_buffer *buf; | ||
| 509 | |||
| 510 | buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer, queue); | ||
| 511 | list_del_init(&buf->queue); | ||
| 512 | mcam_reg_write(cam, REG_DMA_DESC_Y, buf->dma_desc_pa); | ||
| 513 | mcam_reg_write(cam, REG_DESC_LEN_Y, | ||
| 514 | buf->dma_desc_nent*sizeof(struct mcam_dma_desc)); | ||
| 515 | mcam_reg_write(cam, REG_DESC_LEN_U, 0); | ||
| 516 | mcam_reg_write(cam, REG_DESC_LEN_V, 0); | ||
| 517 | cam->vb_bufs[0] = buf; | ||
| 518 | } | ||
| 519 | |||
| 520 | /* | ||
| 521 | * Initial B_DMA_sg setup | ||
| 522 | */ | ||
| 523 | static void mcam_ctlr_dma_sg(struct mcam_camera *cam) | ||
| 524 | { | ||
| 525 | mcam_reg_clear_bit(cam, REG_CTRL1, C1_DESC_3WORD); | ||
| 526 | mcam_sg_next_buffer(cam); | ||
| 527 | mcam_reg_set_bit(cam, REG_CTRL1, C1_DESC_ENA); | ||
| 528 | cam->nbufs = 3; | ||
| 529 | } | ||
| 530 | |||
| 531 | |||
| 532 | /* | ||
| 533 | * Frame completion with S/G is trickier. We can't muck with | ||
| 534 | * a descriptor chain on the fly, since the controller buffers it | ||
| 535 | * internally. So we have to actually stop and restart; Marvell | ||
| 536 | * says this is the way to do it. | ||
| 537 | * | ||
| 538 | * Of course, stopping is easier said than done; experience shows | ||
| 539 | * that the controller can start a frame *after* C0_ENABLE has been | ||
| 540 | * cleared. So when running in S/G mode, the controller is "stopped" | ||
| 541 | * on receipt of the start-of-frame interrupt. That means we can | ||
| 542 | * safely change the DMA descriptor array here and restart things | ||
| 543 | * (assuming there's another buffer waiting to go). | ||
| 544 | */ | ||
| 545 | static void mcam_dma_sg_done(struct mcam_camera *cam, int frame) | ||
| 546 | { | ||
| 547 | struct mcam_vb_buffer *buf = cam->vb_bufs[0]; | ||
| 548 | |||
| 549 | /* | ||
| 550 | * Very Bad Not Good Things happen if you don't clear | ||
| 551 | * C1_DESC_ENA before making any descriptor changes. | ||
| 552 | */ | ||
| 553 | mcam_reg_clear_bit(cam, REG_CTRL1, C1_DESC_ENA); | ||
| 554 | /* | ||
| 555 | * If we have another buffer available, put it in and | ||
| 556 | * restart the engine. | ||
| 557 | */ | ||
| 558 | if (!list_empty(&cam->buffers)) { | ||
| 559 | mcam_sg_next_buffer(cam); | ||
| 560 | mcam_reg_set_bit(cam, REG_CTRL1, C1_DESC_ENA); | ||
| 561 | mcam_ctlr_start(cam); | ||
| 562 | /* | ||
| 563 | * Otherwise set CF_SG_RESTART and the controller will | ||
| 564 | * be restarted once another buffer shows up. | ||
| 565 | */ | ||
| 566 | } else { | ||
| 567 | set_bit(CF_SG_RESTART, &cam->flags); | ||
| 568 | singles++; | ||
| 569 | } | ||
| 570 | /* | ||
| 571 | * Now we can give the completed frame back to user space. | ||
| 572 | */ | ||
| 573 | delivered++; | ||
| 574 | mcam_buffer_done(cam, frame, &buf->vb_buf); | ||
| 575 | } | ||
| 576 | |||
| 577 | |||
| 578 | /* | ||
| 579 | * Scatter/gather mode requires stopping the controller between | ||
| 580 | * frames so we can put in a new DMA descriptor array. If no new | ||
| 581 | * buffer exists at frame completion, the controller is left stopped; | ||
| 582 | * this function is charged with gettig things going again. | ||
| 583 | */ | ||
| 584 | static void mcam_sg_restart(struct mcam_camera *cam) | ||
| 585 | { | ||
| 586 | mcam_ctlr_dma_sg(cam); | ||
| 587 | mcam_ctlr_start(cam); | ||
| 588 | clear_bit(CF_SG_RESTART, &cam->flags); | ||
| 589 | } | ||
| 590 | |||
| 591 | #else /* MCAM_MODE_DMA_SG */ | ||
| 592 | |||
| 593 | static inline void mcam_sg_restart(struct mcam_camera *cam) | ||
| 594 | { | ||
| 595 | return; | ||
| 596 | } | ||
| 597 | |||
| 598 | #endif /* MCAM_MODE_DMA_SG */ | ||
| 599 | |||
| 600 | /* ---------------------------------------------------------------------- */ | ||
| 601 | /* | ||
| 602 | * Buffer-mode-independent controller code. | ||
| 603 | */ | ||
| 604 | |||
| 605 | /* | ||
| 606 | * Image format setup | ||
| 607 | */ | ||
| 608 | static void mcam_ctlr_image(struct mcam_camera *cam) | ||
| 609 | { | ||
| 610 | int imgsz; | ||
| 611 | struct v4l2_pix_format *fmt = &cam->pix_format; | ||
| 612 | |||
| 613 | imgsz = ((fmt->height << IMGSZ_V_SHIFT) & IMGSZ_V_MASK) | | ||
| 614 | (fmt->bytesperline & IMGSZ_H_MASK); | ||
| 615 | mcam_reg_write(cam, REG_IMGSIZE, imgsz); | ||
| 616 | mcam_reg_write(cam, REG_IMGOFFSET, 0); | ||
| 617 | /* YPITCH just drops the last two bits */ | ||
| 618 | mcam_reg_write_mask(cam, REG_IMGPITCH, fmt->bytesperline, | ||
| 619 | IMGP_YP_MASK); | ||
| 620 | /* | ||
| 621 | * Tell the controller about the image format we are using. | ||
| 622 | */ | ||
| 623 | switch (cam->pix_format.pixelformat) { | ||
| 624 | case V4L2_PIX_FMT_YUYV: | ||
| 625 | mcam_reg_write_mask(cam, REG_CTRL0, | ||
| 626 | C0_DF_YUV|C0_YUV_PACKED|C0_YUVE_YUYV, | ||
| 627 | C0_DF_MASK); | ||
| 628 | break; | ||
| 629 | |||
| 630 | case V4L2_PIX_FMT_RGB444: | ||
| 631 | mcam_reg_write_mask(cam, REG_CTRL0, | ||
| 632 | C0_DF_RGB|C0_RGBF_444|C0_RGB4_XRGB, | ||
| 633 | C0_DF_MASK); | ||
| 634 | /* Alpha value? */ | ||
| 635 | break; | ||
| 636 | |||
| 637 | case V4L2_PIX_FMT_RGB565: | ||
| 638 | mcam_reg_write_mask(cam, REG_CTRL0, | ||
| 639 | C0_DF_RGB|C0_RGBF_565|C0_RGB5_BGGR, | ||
| 640 | C0_DF_MASK); | ||
| 641 | break; | ||
| 642 | |||
| 643 | default: | ||
| 644 | cam_err(cam, "Unknown format %x\n", cam->pix_format.pixelformat); | ||
| 645 | break; | ||
| 646 | } | ||
| 647 | /* | ||
| 648 | * Make sure it knows we want to use hsync/vsync. | ||
| 649 | */ | ||
| 650 | mcam_reg_write_mask(cam, REG_CTRL0, C0_SIF_HVSYNC, | ||
| 651 | C0_SIFM_MASK); | ||
| 652 | } | ||
| 653 | |||
| 654 | |||
| 655 | /* | ||
| 656 | * Configure the controller for operation; caller holds the | ||
| 657 | * device mutex. | ||
| 658 | */ | ||
| 659 | static int mcam_ctlr_configure(struct mcam_camera *cam) | ||
| 660 | { | ||
| 661 | unsigned long flags; | ||
| 662 | |||
| 663 | spin_lock_irqsave(&cam->dev_lock, flags); | ||
| 664 | cam->dma_setup(cam); | ||
| 665 | mcam_ctlr_image(cam); | ||
| 666 | mcam_set_config_needed(cam, 0); | ||
| 667 | clear_bit(CF_SG_RESTART, &cam->flags); | ||
| 668 | spin_unlock_irqrestore(&cam->dev_lock, flags); | ||
| 669 | return 0; | ||
| 670 | } | ||
| 671 | |||
| 672 | static void mcam_ctlr_irq_enable(struct mcam_camera *cam) | ||
| 673 | { | ||
| 674 | /* | ||
| 675 | * Clear any pending interrupts, since we do not | ||
| 676 | * expect to have I/O active prior to enabling. | ||
| 677 | */ | ||
| 678 | mcam_reg_write(cam, REG_IRQSTAT, FRAMEIRQS); | ||
| 679 | mcam_reg_set_bit(cam, REG_IRQMASK, FRAMEIRQS); | ||
| 680 | } | ||
| 681 | |||
| 682 | static void mcam_ctlr_irq_disable(struct mcam_camera *cam) | ||
| 683 | { | ||
| 684 | mcam_reg_clear_bit(cam, REG_IRQMASK, FRAMEIRQS); | ||
| 685 | } | ||
| 686 | |||
| 687 | |||
| 688 | |||
| 689 | static void mcam_ctlr_init(struct mcam_camera *cam) | ||
| 690 | { | ||
| 691 | unsigned long flags; | ||
| 692 | |||
| 693 | spin_lock_irqsave(&cam->dev_lock, flags); | ||
| 694 | /* | ||
| 695 | * Make sure it's not powered down. | ||
| 696 | */ | ||
| 697 | mcam_reg_clear_bit(cam, REG_CTRL1, C1_PWRDWN); | ||
| 698 | /* | ||
| 699 | * Turn off the enable bit. It sure should be off anyway, | ||
| 700 | * but it's good to be sure. | ||
| 701 | */ | ||
| 702 | mcam_reg_clear_bit(cam, REG_CTRL0, C0_ENABLE); | ||
| 703 | /* | ||
| 704 | * Clock the sensor appropriately. Controller clock should | ||
| 705 | * be 48MHz, sensor "typical" value is half that. | ||
| 706 | */ | ||
| 707 | mcam_reg_write_mask(cam, REG_CLKCTRL, 2, CLK_DIV_MASK); | ||
| 708 | spin_unlock_irqrestore(&cam->dev_lock, flags); | ||
| 709 | } | ||
| 710 | |||
| 711 | |||
| 712 | /* | ||
| 713 | * Stop the controller, and don't return until we're really sure that no | ||
| 714 | * further DMA is going on. | ||
| 715 | */ | ||
| 716 | static void mcam_ctlr_stop_dma(struct mcam_camera *cam) | ||
| 717 | { | ||
| 718 | unsigned long flags; | ||
| 719 | |||
| 720 | /* | ||
| 721 | * Theory: stop the camera controller (whether it is operating | ||
| 722 | * or not). Delay briefly just in case we race with the SOF | ||
| 723 | * interrupt, then wait until no DMA is active. | ||
| 724 | */ | ||
| 725 | spin_lock_irqsave(&cam->dev_lock, flags); | ||
| 726 | clear_bit(CF_SG_RESTART, &cam->flags); | ||
| 727 | mcam_ctlr_stop(cam); | ||
| 728 | cam->state = S_IDLE; | ||
| 729 | spin_unlock_irqrestore(&cam->dev_lock, flags); | ||
| 730 | msleep(40); | ||
| 731 | if (test_bit(CF_DMA_ACTIVE, &cam->flags)) | ||
| 732 | cam_err(cam, "Timeout waiting for DMA to end\n"); | ||
| 733 | /* This would be bad news - what now? */ | ||
| 734 | spin_lock_irqsave(&cam->dev_lock, flags); | ||
| 735 | mcam_ctlr_irq_disable(cam); | ||
| 736 | spin_unlock_irqrestore(&cam->dev_lock, flags); | ||
| 737 | } | ||
| 738 | |||
| 739 | /* | ||
| 740 | * Power up and down. | ||
| 741 | */ | ||
| 742 | static void mcam_ctlr_power_up(struct mcam_camera *cam) | ||
| 743 | { | ||
| 744 | unsigned long flags; | ||
| 745 | |||
| 746 | spin_lock_irqsave(&cam->dev_lock, flags); | ||
| 747 | cam->plat_power_up(cam); | ||
| 748 | mcam_reg_clear_bit(cam, REG_CTRL1, C1_PWRDWN); | ||
| 749 | spin_unlock_irqrestore(&cam->dev_lock, flags); | ||
| 750 | msleep(5); /* Just to be sure */ | ||
| 751 | } | ||
| 752 | |||
| 753 | static void mcam_ctlr_power_down(struct mcam_camera *cam) | ||
| 754 | { | ||
| 755 | unsigned long flags; | ||
| 756 | |||
| 757 | spin_lock_irqsave(&cam->dev_lock, flags); | ||
| 758 | /* | ||
| 759 | * School of hard knocks department: be sure we do any register | ||
| 760 | * twiddling on the controller *before* calling the platform | ||
| 761 | * power down routine. | ||
| 762 | */ | ||
| 763 | mcam_reg_set_bit(cam, REG_CTRL1, C1_PWRDWN); | ||
| 764 | cam->plat_power_down(cam); | ||
| 765 | spin_unlock_irqrestore(&cam->dev_lock, flags); | ||
| 766 | } | ||
| 767 | |||
| 768 | /* -------------------------------------------------------------------- */ | ||
| 769 | /* | ||
| 770 | * Communications with the sensor. | ||
| 771 | */ | ||
| 772 | |||
| 773 | static int __mcam_cam_reset(struct mcam_camera *cam) | ||
| 774 | { | ||
| 775 | return sensor_call(cam, core, reset, 0); | ||
| 776 | } | ||
| 777 | |||
| 778 | /* | ||
| 779 | * We have found the sensor on the i2c. Let's try to have a | ||
| 780 | * conversation. | ||
| 781 | */ | ||
| 782 | static int mcam_cam_init(struct mcam_camera *cam) | ||
| 783 | { | ||
| 784 | struct v4l2_dbg_chip_ident chip; | ||
| 785 | int ret; | ||
| 786 | |||
| 787 | mutex_lock(&cam->s_mutex); | ||
| 788 | if (cam->state != S_NOTREADY) | ||
| 789 | cam_warn(cam, "Cam init with device in funky state %d", | ||
| 790 | cam->state); | ||
| 791 | ret = __mcam_cam_reset(cam); | ||
| 792 | if (ret) | ||
| 793 | goto out; | ||
| 794 | chip.ident = V4L2_IDENT_NONE; | ||
| 795 | chip.match.type = V4L2_CHIP_MATCH_I2C_ADDR; | ||
| 796 | chip.match.addr = cam->sensor_addr; | ||
| 797 | ret = sensor_call(cam, core, g_chip_ident, &chip); | ||
| 798 | if (ret) | ||
| 799 | goto out; | ||
| 800 | cam->sensor_type = chip.ident; | ||
| 801 | if (cam->sensor_type != V4L2_IDENT_OV7670) { | ||
| 802 | cam_err(cam, "Unsupported sensor type 0x%x", cam->sensor_type); | ||
| 803 | ret = -EINVAL; | ||
| 804 | goto out; | ||
| 805 | } | ||
| 806 | /* Get/set parameters? */ | ||
| 807 | ret = 0; | ||
| 808 | cam->state = S_IDLE; | ||
| 809 | out: | ||
| 810 | mcam_ctlr_power_down(cam); | ||
| 811 | mutex_unlock(&cam->s_mutex); | ||
| 812 | return ret; | ||
| 813 | } | ||
| 814 | |||
| 815 | /* | ||
| 816 | * Configure the sensor to match the parameters we have. Caller should | ||
| 817 | * hold s_mutex | ||
| 818 | */ | ||
| 819 | static int mcam_cam_set_flip(struct mcam_camera *cam) | ||
| 820 | { | ||
| 821 | struct v4l2_control ctrl; | ||
| 822 | |||
| 823 | memset(&ctrl, 0, sizeof(ctrl)); | ||
| 824 | ctrl.id = V4L2_CID_VFLIP; | ||
| 825 | ctrl.value = flip; | ||
| 826 | return sensor_call(cam, core, s_ctrl, &ctrl); | ||
| 827 | } | ||
| 828 | |||
| 829 | |||
| 830 | static int mcam_cam_configure(struct mcam_camera *cam) | ||
| 831 | { | ||
| 832 | struct v4l2_mbus_framefmt mbus_fmt; | ||
| 833 | int ret; | ||
| 834 | |||
| 835 | v4l2_fill_mbus_format(&mbus_fmt, &cam->pix_format, cam->mbus_code); | ||
| 836 | ret = sensor_call(cam, core, init, 0); | ||
| 837 | if (ret == 0) | ||
| 838 | ret = sensor_call(cam, video, s_mbus_fmt, &mbus_fmt); | ||
| 839 | /* | ||
| 840 | * OV7670 does weird things if flip is set *before* format... | ||
| 841 | */ | ||
| 842 | ret += mcam_cam_set_flip(cam); | ||
| 843 | return ret; | ||
| 844 | } | ||
| 845 | |||
| 846 | /* | ||
| 847 | * Get everything ready, and start grabbing frames. | ||
| 848 | */ | ||
| 849 | static int mcam_read_setup(struct mcam_camera *cam) | ||
| 850 | { | ||
| 851 | int ret; | ||
| 852 | unsigned long flags; | ||
| 853 | |||
| 854 | /* | ||
| 855 | * Configuration. If we still don't have DMA buffers, | ||
| 856 | * make one last, desperate attempt. | ||
| 857 | */ | ||
| 858 | if (cam->buffer_mode == B_vmalloc && cam->nbufs == 0 && | ||
| 859 | mcam_alloc_dma_bufs(cam, 0)) | ||
| 860 | return -ENOMEM; | ||
| 861 | |||
| 862 | if (mcam_needs_config(cam)) { | ||
| 863 | mcam_cam_configure(cam); | ||
| 864 | ret = mcam_ctlr_configure(cam); | ||
| 865 | if (ret) | ||
| 866 | return ret; | ||
| 867 | } | ||
| 868 | |||
| 869 | /* | ||
| 870 | * Turn it loose. | ||
| 871 | */ | ||
| 872 | spin_lock_irqsave(&cam->dev_lock, flags); | ||
| 873 | mcam_reset_buffers(cam); | ||
| 874 | mcam_ctlr_irq_enable(cam); | ||
| 875 | cam->state = S_STREAMING; | ||
| 876 | mcam_ctlr_start(cam); | ||
| 877 | spin_unlock_irqrestore(&cam->dev_lock, flags); | ||
| 878 | return 0; | ||
| 879 | } | ||
| 880 | |||
| 881 | /* ----------------------------------------------------------------------- */ | ||
| 882 | /* | ||
| 883 | * Videobuf2 interface code. | ||
| 884 | */ | ||
| 885 | |||
| 886 | static int mcam_vb_queue_setup(struct vb2_queue *vq, unsigned int *nbufs, | ||
| 887 | unsigned int *num_planes, unsigned long sizes[], | ||
| 888 | void *alloc_ctxs[]) | ||
| 889 | { | ||
| 890 | struct mcam_camera *cam = vb2_get_drv_priv(vq); | ||
| 891 | int minbufs = (cam->buffer_mode == B_DMA_contig) ? 3 : 2; | ||
| 892 | |||
| 893 | sizes[0] = cam->pix_format.sizeimage; | ||
| 894 | *num_planes = 1; /* Someday we have to support planar formats... */ | ||
| 895 | if (*nbufs < minbufs) | ||
| 896 | *nbufs = minbufs; | ||
| 897 | if (cam->buffer_mode == B_DMA_contig) | ||
| 898 | alloc_ctxs[0] = cam->vb_alloc_ctx; | ||
| 899 | return 0; | ||
| 900 | } | ||
| 901 | |||
| 902 | |||
| 903 | static void mcam_vb_buf_queue(struct vb2_buffer *vb) | ||
| 904 | { | ||
| 905 | struct mcam_vb_buffer *mvb = vb_to_mvb(vb); | ||
| 906 | struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue); | ||
| 907 | unsigned long flags; | ||
| 908 | int start; | ||
| 909 | |||
| 910 | spin_lock_irqsave(&cam->dev_lock, flags); | ||
| 911 | start = (cam->state == S_BUFWAIT) && !list_empty(&cam->buffers); | ||
| 912 | list_add(&mvb->queue, &cam->buffers); | ||
| 913 | if (test_bit(CF_SG_RESTART, &cam->flags)) | ||
| 914 | mcam_sg_restart(cam); | ||
| 915 | spin_unlock_irqrestore(&cam->dev_lock, flags); | ||
| 916 | if (start) | ||
| 917 | mcam_read_setup(cam); | ||
| 918 | } | ||
| 919 | |||
| 920 | |||
| 921 | /* | ||
| 922 | * vb2 uses these to release the mutex when waiting in dqbuf. I'm | ||
| 923 | * not actually sure we need to do this (I'm not sure that vb2_dqbuf() needs | ||
| 924 | * to be called with the mutex held), but better safe than sorry. | ||
| 925 | */ | ||
| 926 | static void mcam_vb_wait_prepare(struct vb2_queue *vq) | ||
| 927 | { | ||
| 928 | struct mcam_camera *cam = vb2_get_drv_priv(vq); | ||
| 929 | |||
| 930 | mutex_unlock(&cam->s_mutex); | ||
| 931 | } | ||
| 932 | |||
| 933 | static void mcam_vb_wait_finish(struct vb2_queue *vq) | ||
| 934 | { | ||
| 935 | struct mcam_camera *cam = vb2_get_drv_priv(vq); | ||
| 936 | |||
| 937 | mutex_lock(&cam->s_mutex); | ||
| 938 | } | ||
| 939 | |||
| 940 | /* | ||
| 941 | * These need to be called with the mutex held from vb2 | ||
| 942 | */ | ||
| 943 | static int mcam_vb_start_streaming(struct vb2_queue *vq) | ||
| 944 | { | ||
| 945 | struct mcam_camera *cam = vb2_get_drv_priv(vq); | ||
| 946 | |||
| 947 | if (cam->state != S_IDLE) | ||
| 948 | return -EINVAL; | ||
| 949 | cam->sequence = 0; | ||
| 950 | /* | ||
| 951 | * Videobuf2 sneakily hoards all the buffers and won't | ||
| 952 | * give them to us until *after* streaming starts. But | ||
| 953 | * we can't actually start streaming until we have a | ||
| 954 | * destination. So go into a wait state and hope they | ||
| 955 | * give us buffers soon. | ||
| 956 | */ | ||
| 957 | if (cam->buffer_mode != B_vmalloc && list_empty(&cam->buffers)) { | ||
| 958 | cam->state = S_BUFWAIT; | ||
| 959 | return 0; | ||
| 960 | } | ||
| 961 | return mcam_read_setup(cam); | ||
| 962 | } | ||
| 963 | |||
| 964 | static int mcam_vb_stop_streaming(struct vb2_queue *vq) | ||
| 965 | { | ||
| 966 | struct mcam_camera *cam = vb2_get_drv_priv(vq); | ||
| 967 | unsigned long flags; | ||
| 968 | |||
| 969 | if (cam->state == S_BUFWAIT) { | ||
| 970 | /* They never gave us buffers */ | ||
| 971 | cam->state = S_IDLE; | ||
| 972 | return 0; | ||
| 973 | } | ||
| 974 | if (cam->state != S_STREAMING) | ||
| 975 | return -EINVAL; | ||
| 976 | mcam_ctlr_stop_dma(cam); | ||
| 977 | /* | ||
| 978 | * VB2 reclaims the buffers, so we need to forget | ||
| 979 | * about them. | ||
| 980 | */ | ||
| 981 | spin_lock_irqsave(&cam->dev_lock, flags); | ||
| 982 | INIT_LIST_HEAD(&cam->buffers); | ||
| 983 | spin_unlock_irqrestore(&cam->dev_lock, flags); | ||
| 984 | return 0; | ||
| 985 | } | ||
| 986 | |||
| 987 | |||
| 988 | static const struct vb2_ops mcam_vb2_ops = { | ||
| 989 | .queue_setup = mcam_vb_queue_setup, | ||
| 990 | .buf_queue = mcam_vb_buf_queue, | ||
| 991 | .start_streaming = mcam_vb_start_streaming, | ||
| 992 | .stop_streaming = mcam_vb_stop_streaming, | ||
| 993 | .wait_prepare = mcam_vb_wait_prepare, | ||
| 994 | .wait_finish = mcam_vb_wait_finish, | ||
| 995 | }; | ||
| 996 | |||
| 997 | |||
| 998 | #ifdef MCAM_MODE_DMA_SG | ||
| 999 | /* | ||
| 1000 | * Scatter/gather mode uses all of the above functions plus a | ||
| 1001 | * few extras to deal with DMA mapping. | ||
| 1002 | */ | ||
| 1003 | static int mcam_vb_sg_buf_init(struct vb2_buffer *vb) | ||
| 1004 | { | ||
| 1005 | struct mcam_vb_buffer *mvb = vb_to_mvb(vb); | ||
| 1006 | struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue); | ||
| 1007 | int ndesc = cam->pix_format.sizeimage/PAGE_SIZE + 1; | ||
| 1008 | |||
| 1009 | mvb->dma_desc = dma_alloc_coherent(cam->dev, | ||
| 1010 | ndesc * sizeof(struct mcam_dma_desc), | ||
| 1011 | &mvb->dma_desc_pa, GFP_KERNEL); | ||
| 1012 | if (mvb->dma_desc == NULL) { | ||
| 1013 | cam_err(cam, "Unable to get DMA descriptor array\n"); | ||
| 1014 | return -ENOMEM; | ||
| 1015 | } | ||
| 1016 | return 0; | ||
| 1017 | } | ||
| 1018 | |||
| 1019 | static int mcam_vb_sg_buf_prepare(struct vb2_buffer *vb) | ||
| 1020 | { | ||
| 1021 | struct mcam_vb_buffer *mvb = vb_to_mvb(vb); | ||
| 1022 | struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue); | ||
| 1023 | struct vb2_dma_sg_desc *sgd = vb2_dma_sg_plane_desc(vb, 0); | ||
| 1024 | struct mcam_dma_desc *desc = mvb->dma_desc; | ||
| 1025 | struct scatterlist *sg; | ||
| 1026 | int i; | ||
| 1027 | |||
| 1028 | mvb->dma_desc_nent = dma_map_sg(cam->dev, sgd->sglist, sgd->num_pages, | ||
| 1029 | DMA_FROM_DEVICE); | ||
| 1030 | if (mvb->dma_desc_nent <= 0) | ||
| 1031 | return -EIO; /* Not sure what's right here */ | ||
| 1032 | for_each_sg(sgd->sglist, sg, mvb->dma_desc_nent, i) { | ||
| 1033 | desc->dma_addr = sg_dma_address(sg); | ||
| 1034 | desc->segment_len = sg_dma_len(sg); | ||
| 1035 | desc++; | ||
| 1036 | } | ||
| 1037 | return 0; | ||
| 1038 | } | ||
| 1039 | |||
| 1040 | static int mcam_vb_sg_buf_finish(struct vb2_buffer *vb) | ||
| 1041 | { | ||
| 1042 | struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue); | ||
| 1043 | struct vb2_dma_sg_desc *sgd = vb2_dma_sg_plane_desc(vb, 0); | ||
| 1044 | |||
| 1045 | dma_unmap_sg(cam->dev, sgd->sglist, sgd->num_pages, DMA_FROM_DEVICE); | ||
| 1046 | return 0; | ||
| 1047 | } | ||
| 1048 | |||
| 1049 | static void mcam_vb_sg_buf_cleanup(struct vb2_buffer *vb) | ||
| 1050 | { | ||
| 1051 | struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue); | ||
| 1052 | struct mcam_vb_buffer *mvb = vb_to_mvb(vb); | ||
| 1053 | int ndesc = cam->pix_format.sizeimage/PAGE_SIZE + 1; | ||
| 1054 | |||
| 1055 | dma_free_coherent(cam->dev, ndesc * sizeof(struct mcam_dma_desc), | ||
| 1056 | mvb->dma_desc, mvb->dma_desc_pa); | ||
| 1057 | } | ||
| 1058 | |||
| 1059 | |||
| 1060 | static const struct vb2_ops mcam_vb2_sg_ops = { | ||
| 1061 | .queue_setup = mcam_vb_queue_setup, | ||
| 1062 | .buf_init = mcam_vb_sg_buf_init, | ||
| 1063 | .buf_prepare = mcam_vb_sg_buf_prepare, | ||
| 1064 | .buf_queue = mcam_vb_buf_queue, | ||
| 1065 | .buf_finish = mcam_vb_sg_buf_finish, | ||
| 1066 | .buf_cleanup = mcam_vb_sg_buf_cleanup, | ||
| 1067 | .start_streaming = mcam_vb_start_streaming, | ||
| 1068 | .stop_streaming = mcam_vb_stop_streaming, | ||
| 1069 | .wait_prepare = mcam_vb_wait_prepare, | ||
| 1070 | .wait_finish = mcam_vb_wait_finish, | ||
| 1071 | }; | ||
| 1072 | |||
| 1073 | #endif /* MCAM_MODE_DMA_SG */ | ||
| 1074 | |||
| 1075 | static int mcam_setup_vb2(struct mcam_camera *cam) | ||
| 1076 | { | ||
| 1077 | struct vb2_queue *vq = &cam->vb_queue; | ||
| 1078 | |||
| 1079 | memset(vq, 0, sizeof(*vq)); | ||
| 1080 | vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | ||
| 1081 | vq->drv_priv = cam; | ||
| 1082 | INIT_LIST_HEAD(&cam->buffers); | ||
| 1083 | switch (cam->buffer_mode) { | ||
| 1084 | case B_DMA_contig: | ||
| 1085 | #ifdef MCAM_MODE_DMA_CONTIG | ||
| 1086 | vq->ops = &mcam_vb2_ops; | ||
| 1087 | vq->mem_ops = &vb2_dma_contig_memops; | ||
| 1088 | cam->vb_alloc_ctx = vb2_dma_contig_init_ctx(cam->dev); | ||
| 1089 | vq->io_modes = VB2_MMAP | VB2_USERPTR; | ||
| 1090 | cam->dma_setup = mcam_ctlr_dma_contig; | ||
| 1091 | cam->frame_complete = mcam_dma_contig_done; | ||
| 1092 | #endif | ||
| 1093 | break; | ||
| 1094 | case B_DMA_sg: | ||
| 1095 | #ifdef MCAM_MODE_DMA_SG | ||
| 1096 | vq->ops = &mcam_vb2_sg_ops; | ||
| 1097 | vq->mem_ops = &vb2_dma_sg_memops; | ||
| 1098 | vq->io_modes = VB2_MMAP | VB2_USERPTR; | ||
| 1099 | cam->dma_setup = mcam_ctlr_dma_sg; | ||
| 1100 | cam->frame_complete = mcam_dma_sg_done; | ||
| 1101 | #endif | ||
| 1102 | break; | ||
| 1103 | case B_vmalloc: | ||
| 1104 | #ifdef MCAM_MODE_VMALLOC | ||
| 1105 | tasklet_init(&cam->s_tasklet, mcam_frame_tasklet, | ||
| 1106 | (unsigned long) cam); | ||
| 1107 | vq->ops = &mcam_vb2_ops; | ||
| 1108 | vq->mem_ops = &vb2_vmalloc_memops; | ||
| 1109 | vq->buf_struct_size = sizeof(struct mcam_vb_buffer); | ||
| 1110 | vq->io_modes = VB2_MMAP; | ||
| 1111 | cam->dma_setup = mcam_ctlr_dma_vmalloc; | ||
| 1112 | cam->frame_complete = mcam_vmalloc_done; | ||
| 1113 | #endif | ||
| 1114 | break; | ||
| 1115 | } | ||
| 1116 | return vb2_queue_init(vq); | ||
| 1117 | } | ||
| 1118 | |||
| 1119 | static void mcam_cleanup_vb2(struct mcam_camera *cam) | ||
| 1120 | { | ||
| 1121 | vb2_queue_release(&cam->vb_queue); | ||
| 1122 | #ifdef MCAM_MODE_DMA_CONTIG | ||
| 1123 | if (cam->buffer_mode == B_DMA_contig) | ||
| 1124 | vb2_dma_contig_cleanup_ctx(cam->vb_alloc_ctx); | ||
| 1125 | #endif | ||
| 1126 | } | ||
| 1127 | |||
| 1128 | |||
| 1129 | /* ---------------------------------------------------------------------- */ | ||
| 1130 | /* | ||
| 1131 | * The long list of V4L2 ioctl() operations. | ||
| 1132 | */ | ||
| 1133 | |||
| 1134 | static int mcam_vidioc_streamon(struct file *filp, void *priv, | ||
| 1135 | enum v4l2_buf_type type) | ||
| 1136 | { | ||
| 1137 | struct mcam_camera *cam = filp->private_data; | ||
| 1138 | int ret; | ||
| 1139 | |||
| 1140 | mutex_lock(&cam->s_mutex); | ||
| 1141 | ret = vb2_streamon(&cam->vb_queue, type); | ||
| 1142 | mutex_unlock(&cam->s_mutex); | ||
| 1143 | return ret; | ||
| 1144 | } | ||
| 1145 | |||
| 1146 | |||
| 1147 | static int mcam_vidioc_streamoff(struct file *filp, void *priv, | ||
| 1148 | enum v4l2_buf_type type) | ||
| 1149 | { | ||
| 1150 | struct mcam_camera *cam = filp->private_data; | ||
| 1151 | int ret; | ||
| 1152 | |||
| 1153 | mutex_lock(&cam->s_mutex); | ||
| 1154 | ret = vb2_streamoff(&cam->vb_queue, type); | ||
| 1155 | mutex_unlock(&cam->s_mutex); | ||
| 1156 | return ret; | ||
| 1157 | } | ||
| 1158 | |||
| 1159 | |||
| 1160 | static int mcam_vidioc_reqbufs(struct file *filp, void *priv, | ||
| 1161 | struct v4l2_requestbuffers *req) | ||
| 1162 | { | ||
| 1163 | struct mcam_camera *cam = filp->private_data; | ||
| 1164 | int ret; | ||
| 1165 | |||
| 1166 | mutex_lock(&cam->s_mutex); | ||
| 1167 | ret = vb2_reqbufs(&cam->vb_queue, req); | ||
| 1168 | mutex_unlock(&cam->s_mutex); | ||
| 1169 | return ret; | ||
| 1170 | } | ||
| 1171 | |||
| 1172 | |||
| 1173 | static int mcam_vidioc_querybuf(struct file *filp, void *priv, | ||
| 1174 | struct v4l2_buffer *buf) | ||
| 1175 | { | ||
| 1176 | struct mcam_camera *cam = filp->private_data; | ||
| 1177 | int ret; | ||
| 1178 | |||
| 1179 | mutex_lock(&cam->s_mutex); | ||
| 1180 | ret = vb2_querybuf(&cam->vb_queue, buf); | ||
| 1181 | mutex_unlock(&cam->s_mutex); | ||
| 1182 | return ret; | ||
| 1183 | } | ||
| 1184 | |||
| 1185 | static int mcam_vidioc_qbuf(struct file *filp, void *priv, | ||
| 1186 | struct v4l2_buffer *buf) | ||
| 1187 | { | ||
| 1188 | struct mcam_camera *cam = filp->private_data; | ||
| 1189 | int ret; | ||
| 1190 | |||
| 1191 | mutex_lock(&cam->s_mutex); | ||
| 1192 | ret = vb2_qbuf(&cam->vb_queue, buf); | ||
| 1193 | mutex_unlock(&cam->s_mutex); | ||
| 1194 | return ret; | ||
| 1195 | } | ||
| 1196 | |||
| 1197 | static int mcam_vidioc_dqbuf(struct file *filp, void *priv, | ||
| 1198 | struct v4l2_buffer *buf) | ||
| 1199 | { | ||
| 1200 | struct mcam_camera *cam = filp->private_data; | ||
| 1201 | int ret; | ||
| 1202 | |||
| 1203 | mutex_lock(&cam->s_mutex); | ||
| 1204 | ret = vb2_dqbuf(&cam->vb_queue, buf, filp->f_flags & O_NONBLOCK); | ||
| 1205 | mutex_unlock(&cam->s_mutex); | ||
| 1206 | return ret; | ||
| 1207 | } | ||
| 1208 | |||
| 1209 | |||
| 1210 | |||
| 1211 | static int mcam_vidioc_queryctrl(struct file *filp, void *priv, | ||
| 1212 | struct v4l2_queryctrl *qc) | ||
| 1213 | { | ||
| 1214 | struct mcam_camera *cam = priv; | ||
| 1215 | int ret; | ||
| 1216 | |||
| 1217 | mutex_lock(&cam->s_mutex); | ||
| 1218 | ret = sensor_call(cam, core, queryctrl, qc); | ||
| 1219 | mutex_unlock(&cam->s_mutex); | ||
| 1220 | return ret; | ||
| 1221 | } | ||
| 1222 | |||
| 1223 | |||
| 1224 | static int mcam_vidioc_g_ctrl(struct file *filp, void *priv, | ||
| 1225 | struct v4l2_control *ctrl) | ||
| 1226 | { | ||
| 1227 | struct mcam_camera *cam = priv; | ||
| 1228 | int ret; | ||
| 1229 | |||
| 1230 | mutex_lock(&cam->s_mutex); | ||
| 1231 | ret = sensor_call(cam, core, g_ctrl, ctrl); | ||
| 1232 | mutex_unlock(&cam->s_mutex); | ||
| 1233 | return ret; | ||
| 1234 | } | ||
| 1235 | |||
| 1236 | |||
| 1237 | static int mcam_vidioc_s_ctrl(struct file *filp, void *priv, | ||
| 1238 | struct v4l2_control *ctrl) | ||
| 1239 | { | ||
| 1240 | struct mcam_camera *cam = priv; | ||
| 1241 | int ret; | ||
| 1242 | |||
| 1243 | mutex_lock(&cam->s_mutex); | ||
| 1244 | ret = sensor_call(cam, core, s_ctrl, ctrl); | ||
| 1245 | mutex_unlock(&cam->s_mutex); | ||
| 1246 | return ret; | ||
| 1247 | } | ||
| 1248 | |||
| 1249 | |||
| 1250 | static int mcam_vidioc_querycap(struct file *file, void *priv, | ||
| 1251 | struct v4l2_capability *cap) | ||
| 1252 | { | ||
| 1253 | strcpy(cap->driver, "marvell_ccic"); | ||
| 1254 | strcpy(cap->card, "marvell_ccic"); | ||
| 1255 | cap->version = 1; | ||
| 1256 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | | ||
| 1257 | V4L2_CAP_READWRITE | V4L2_CAP_STREAMING; | ||
| 1258 | return 0; | ||
| 1259 | } | ||
| 1260 | |||
| 1261 | |||
| 1262 | static int mcam_vidioc_enum_fmt_vid_cap(struct file *filp, | ||
| 1263 | void *priv, struct v4l2_fmtdesc *fmt) | ||
| 1264 | { | ||
| 1265 | if (fmt->index >= N_MCAM_FMTS) | ||
| 1266 | return -EINVAL; | ||
| 1267 | strlcpy(fmt->description, mcam_formats[fmt->index].desc, | ||
| 1268 | sizeof(fmt->description)); | ||
| 1269 | fmt->pixelformat = mcam_formats[fmt->index].pixelformat; | ||
| 1270 | return 0; | ||
| 1271 | } | ||
| 1272 | |||
| 1273 | static int mcam_vidioc_try_fmt_vid_cap(struct file *filp, void *priv, | ||
| 1274 | struct v4l2_format *fmt) | ||
| 1275 | { | ||
| 1276 | struct mcam_camera *cam = priv; | ||
| 1277 | struct mcam_format_struct *f; | ||
| 1278 | struct v4l2_pix_format *pix = &fmt->fmt.pix; | ||
| 1279 | struct v4l2_mbus_framefmt mbus_fmt; | ||
| 1280 | int ret; | ||
| 1281 | |||
| 1282 | f = mcam_find_format(pix->pixelformat); | ||
| 1283 | pix->pixelformat = f->pixelformat; | ||
| 1284 | v4l2_fill_mbus_format(&mbus_fmt, pix, f->mbus_code); | ||
| 1285 | mutex_lock(&cam->s_mutex); | ||
| 1286 | ret = sensor_call(cam, video, try_mbus_fmt, &mbus_fmt); | ||
| 1287 | mutex_unlock(&cam->s_mutex); | ||
| 1288 | v4l2_fill_pix_format(pix, &mbus_fmt); | ||
| 1289 | pix->bytesperline = pix->width * f->bpp; | ||
| 1290 | pix->sizeimage = pix->height * pix->bytesperline; | ||
| 1291 | return ret; | ||
| 1292 | } | ||
| 1293 | |||
| 1294 | static int mcam_vidioc_s_fmt_vid_cap(struct file *filp, void *priv, | ||
| 1295 | struct v4l2_format *fmt) | ||
| 1296 | { | ||
| 1297 | struct mcam_camera *cam = priv; | ||
| 1298 | struct mcam_format_struct *f; | ||
| 1299 | int ret; | ||
| 1300 | |||
| 1301 | /* | ||
| 1302 | * Can't do anything if the device is not idle | ||
| 1303 | * Also can't if there are streaming buffers in place. | ||
| 1304 | */ | ||
| 1305 | if (cam->state != S_IDLE || cam->vb_queue.num_buffers > 0) | ||
| 1306 | return -EBUSY; | ||
| 1307 | |||
| 1308 | f = mcam_find_format(fmt->fmt.pix.pixelformat); | ||
| 1309 | |||
| 1310 | /* | ||
| 1311 | * See if the formatting works in principle. | ||
| 1312 | */ | ||
| 1313 | ret = mcam_vidioc_try_fmt_vid_cap(filp, priv, fmt); | ||
| 1314 | if (ret) | ||
| 1315 | return ret; | ||
| 1316 | /* | ||
| 1317 | * Now we start to change things for real, so let's do it | ||
| 1318 | * under lock. | ||
| 1319 | */ | ||
| 1320 | mutex_lock(&cam->s_mutex); | ||
| 1321 | cam->pix_format = fmt->fmt.pix; | ||
| 1322 | cam->mbus_code = f->mbus_code; | ||
| 1323 | |||
| 1324 | /* | ||
| 1325 | * Make sure we have appropriate DMA buffers. | ||
| 1326 | */ | ||
| 1327 | if (cam->buffer_mode == B_vmalloc) { | ||
| 1328 | ret = mcam_check_dma_buffers(cam); | ||
| 1329 | if (ret) | ||
| 1330 | goto out; | ||
| 1331 | } | ||
| 1332 | mcam_set_config_needed(cam, 1); | ||
| 1333 | ret = 0; | ||
| 1334 | out: | ||
| 1335 | mutex_unlock(&cam->s_mutex); | ||
| 1336 | return ret; | ||
| 1337 | } | ||
| 1338 | |||
| 1339 | /* | ||
| 1340 | * Return our stored notion of how the camera is/should be configured. | ||
| 1341 | * The V4l2 spec wants us to be smarter, and actually get this from | ||
| 1342 | * the camera (and not mess with it at open time). Someday. | ||
| 1343 | */ | ||
| 1344 | static int mcam_vidioc_g_fmt_vid_cap(struct file *filp, void *priv, | ||
| 1345 | struct v4l2_format *f) | ||
| 1346 | { | ||
| 1347 | struct mcam_camera *cam = priv; | ||
| 1348 | |||
| 1349 | f->fmt.pix = cam->pix_format; | ||
| 1350 | return 0; | ||
| 1351 | } | ||
| 1352 | |||
| 1353 | /* | ||
| 1354 | * We only have one input - the sensor - so minimize the nonsense here. | ||
| 1355 | */ | ||
| 1356 | static int mcam_vidioc_enum_input(struct file *filp, void *priv, | ||
| 1357 | struct v4l2_input *input) | ||
| 1358 | { | ||
| 1359 | if (input->index != 0) | ||
| 1360 | return -EINVAL; | ||
| 1361 | |||
| 1362 | input->type = V4L2_INPUT_TYPE_CAMERA; | ||
| 1363 | input->std = V4L2_STD_ALL; /* Not sure what should go here */ | ||
| 1364 | strcpy(input->name, "Camera"); | ||
| 1365 | return 0; | ||
| 1366 | } | ||
| 1367 | |||
| 1368 | static int mcam_vidioc_g_input(struct file *filp, void *priv, unsigned int *i) | ||
| 1369 | { | ||
| 1370 | *i = 0; | ||
| 1371 | return 0; | ||
| 1372 | } | ||
| 1373 | |||
| 1374 | static int mcam_vidioc_s_input(struct file *filp, void *priv, unsigned int i) | ||
| 1375 | { | ||
| 1376 | if (i != 0) | ||
| 1377 | return -EINVAL; | ||
| 1378 | return 0; | ||
| 1379 | } | ||
| 1380 | |||
| 1381 | /* from vivi.c */ | ||
| 1382 | static int mcam_vidioc_s_std(struct file *filp, void *priv, v4l2_std_id *a) | ||
| 1383 | { | ||
| 1384 | return 0; | ||
| 1385 | } | ||
| 1386 | |||
| 1387 | /* | ||
| 1388 | * G/S_PARM. Most of this is done by the sensor, but we are | ||
| 1389 | * the level which controls the number of read buffers. | ||
| 1390 | */ | ||
| 1391 | static int mcam_vidioc_g_parm(struct file *filp, void *priv, | ||
| 1392 | struct v4l2_streamparm *parms) | ||
| 1393 | { | ||
| 1394 | struct mcam_camera *cam = priv; | ||
| 1395 | int ret; | ||
| 1396 | |||
| 1397 | mutex_lock(&cam->s_mutex); | ||
| 1398 | ret = sensor_call(cam, video, g_parm, parms); | ||
| 1399 | mutex_unlock(&cam->s_mutex); | ||
| 1400 | parms->parm.capture.readbuffers = n_dma_bufs; | ||
| 1401 | return ret; | ||
| 1402 | } | ||
| 1403 | |||
| 1404 | static int mcam_vidioc_s_parm(struct file *filp, void *priv, | ||
| 1405 | struct v4l2_streamparm *parms) | ||
| 1406 | { | ||
| 1407 | struct mcam_camera *cam = priv; | ||
| 1408 | int ret; | ||
| 1409 | |||
| 1410 | mutex_lock(&cam->s_mutex); | ||
| 1411 | ret = sensor_call(cam, video, s_parm, parms); | ||
| 1412 | mutex_unlock(&cam->s_mutex); | ||
| 1413 | parms->parm.capture.readbuffers = n_dma_bufs; | ||
| 1414 | return ret; | ||
| 1415 | } | ||
| 1416 | |||
| 1417 | static int mcam_vidioc_g_chip_ident(struct file *file, void *priv, | ||
| 1418 | struct v4l2_dbg_chip_ident *chip) | ||
| 1419 | { | ||
| 1420 | struct mcam_camera *cam = priv; | ||
| 1421 | |||
| 1422 | chip->ident = V4L2_IDENT_NONE; | ||
| 1423 | chip->revision = 0; | ||
| 1424 | if (v4l2_chip_match_host(&chip->match)) { | ||
| 1425 | chip->ident = cam->chip_id; | ||
| 1426 | return 0; | ||
| 1427 | } | ||
| 1428 | return sensor_call(cam, core, g_chip_ident, chip); | ||
| 1429 | } | ||
| 1430 | |||
| 1431 | static int mcam_vidioc_enum_framesizes(struct file *filp, void *priv, | ||
| 1432 | struct v4l2_frmsizeenum *sizes) | ||
| 1433 | { | ||
| 1434 | struct mcam_camera *cam = priv; | ||
| 1435 | int ret; | ||
| 1436 | |||
| 1437 | mutex_lock(&cam->s_mutex); | ||
| 1438 | ret = sensor_call(cam, video, enum_framesizes, sizes); | ||
| 1439 | mutex_unlock(&cam->s_mutex); | ||
| 1440 | return ret; | ||
| 1441 | } | ||
| 1442 | |||
| 1443 | static int mcam_vidioc_enum_frameintervals(struct file *filp, void *priv, | ||
| 1444 | struct v4l2_frmivalenum *interval) | ||
| 1445 | { | ||
| 1446 | struct mcam_camera *cam = priv; | ||
| 1447 | int ret; | ||
| 1448 | |||
| 1449 | mutex_lock(&cam->s_mutex); | ||
| 1450 | ret = sensor_call(cam, video, enum_frameintervals, interval); | ||
| 1451 | mutex_unlock(&cam->s_mutex); | ||
| 1452 | return ret; | ||
| 1453 | } | ||
| 1454 | |||
| 1455 | #ifdef CONFIG_VIDEO_ADV_DEBUG | ||
| 1456 | static int mcam_vidioc_g_register(struct file *file, void *priv, | ||
| 1457 | struct v4l2_dbg_register *reg) | ||
| 1458 | { | ||
| 1459 | struct mcam_camera *cam = priv; | ||
| 1460 | |||
| 1461 | if (v4l2_chip_match_host(®->match)) { | ||
| 1462 | reg->val = mcam_reg_read(cam, reg->reg); | ||
| 1463 | reg->size = 4; | ||
| 1464 | return 0; | ||
| 1465 | } | ||
| 1466 | return sensor_call(cam, core, g_register, reg); | ||
| 1467 | } | ||
| 1468 | |||
| 1469 | static int mcam_vidioc_s_register(struct file *file, void *priv, | ||
| 1470 | struct v4l2_dbg_register *reg) | ||
| 1471 | { | ||
| 1472 | struct mcam_camera *cam = priv; | ||
| 1473 | |||
| 1474 | if (v4l2_chip_match_host(®->match)) { | ||
| 1475 | mcam_reg_write(cam, reg->reg, reg->val); | ||
| 1476 | return 0; | ||
| 1477 | } | ||
| 1478 | return sensor_call(cam, core, s_register, reg); | ||
| 1479 | } | ||
| 1480 | #endif | ||
| 1481 | |||
| 1482 | static const struct v4l2_ioctl_ops mcam_v4l_ioctl_ops = { | ||
| 1483 | .vidioc_querycap = mcam_vidioc_querycap, | ||
| 1484 | .vidioc_enum_fmt_vid_cap = mcam_vidioc_enum_fmt_vid_cap, | ||
| 1485 | .vidioc_try_fmt_vid_cap = mcam_vidioc_try_fmt_vid_cap, | ||
| 1486 | .vidioc_s_fmt_vid_cap = mcam_vidioc_s_fmt_vid_cap, | ||
| 1487 | .vidioc_g_fmt_vid_cap = mcam_vidioc_g_fmt_vid_cap, | ||
| 1488 | .vidioc_enum_input = mcam_vidioc_enum_input, | ||
| 1489 | .vidioc_g_input = mcam_vidioc_g_input, | ||
| 1490 | .vidioc_s_input = mcam_vidioc_s_input, | ||
| 1491 | .vidioc_s_std = mcam_vidioc_s_std, | ||
| 1492 | .vidioc_reqbufs = mcam_vidioc_reqbufs, | ||
| 1493 | .vidioc_querybuf = mcam_vidioc_querybuf, | ||
| 1494 | .vidioc_qbuf = mcam_vidioc_qbuf, | ||
| 1495 | .vidioc_dqbuf = mcam_vidioc_dqbuf, | ||
| 1496 | .vidioc_streamon = mcam_vidioc_streamon, | ||
| 1497 | .vidioc_streamoff = mcam_vidioc_streamoff, | ||
| 1498 | .vidioc_queryctrl = mcam_vidioc_queryctrl, | ||
| 1499 | .vidioc_g_ctrl = mcam_vidioc_g_ctrl, | ||
| 1500 | .vidioc_s_ctrl = mcam_vidioc_s_ctrl, | ||
| 1501 | .vidioc_g_parm = mcam_vidioc_g_parm, | ||
| 1502 | .vidioc_s_parm = mcam_vidioc_s_parm, | ||
| 1503 | .vidioc_enum_framesizes = mcam_vidioc_enum_framesizes, | ||
| 1504 | .vidioc_enum_frameintervals = mcam_vidioc_enum_frameintervals, | ||
| 1505 | .vidioc_g_chip_ident = mcam_vidioc_g_chip_ident, | ||
| 1506 | #ifdef CONFIG_VIDEO_ADV_DEBUG | ||
| 1507 | .vidioc_g_register = mcam_vidioc_g_register, | ||
| 1508 | .vidioc_s_register = mcam_vidioc_s_register, | ||
| 1509 | #endif | ||
| 1510 | }; | ||
| 1511 | |||
| 1512 | /* ---------------------------------------------------------------------- */ | ||
| 1513 | /* | ||
| 1514 | * Our various file operations. | ||
| 1515 | */ | ||
| 1516 | static int mcam_v4l_open(struct file *filp) | ||
| 1517 | { | ||
| 1518 | struct mcam_camera *cam = video_drvdata(filp); | ||
| 1519 | int ret = 0; | ||
| 1520 | |||
| 1521 | filp->private_data = cam; | ||
| 1522 | |||
| 1523 | frames = singles = delivered = 0; | ||
| 1524 | mutex_lock(&cam->s_mutex); | ||
| 1525 | if (cam->users == 0) { | ||
| 1526 | ret = mcam_setup_vb2(cam); | ||
| 1527 | if (ret) | ||
| 1528 | goto out; | ||
| 1529 | mcam_ctlr_power_up(cam); | ||
| 1530 | __mcam_cam_reset(cam); | ||
| 1531 | mcam_set_config_needed(cam, 1); | ||
| 1532 | } | ||
| 1533 | (cam->users)++; | ||
| 1534 | out: | ||
| 1535 | mutex_unlock(&cam->s_mutex); | ||
| 1536 | return ret; | ||
| 1537 | } | ||
| 1538 | |||
| 1539 | |||
| 1540 | static int mcam_v4l_release(struct file *filp) | ||
| 1541 | { | ||
| 1542 | struct mcam_camera *cam = filp->private_data; | ||
| 1543 | |||
| 1544 | cam_err(cam, "Release, %d frames, %d singles, %d delivered\n", frames, | ||
| 1545 | singles, delivered); | ||
| 1546 | mutex_lock(&cam->s_mutex); | ||
| 1547 | (cam->users)--; | ||
| 1548 | if (filp == cam->owner) { | ||
| 1549 | mcam_ctlr_stop_dma(cam); | ||
| 1550 | cam->owner = NULL; | ||
| 1551 | } | ||
| 1552 | if (cam->users == 0) { | ||
| 1553 | mcam_cleanup_vb2(cam); | ||
| 1554 | mcam_ctlr_power_down(cam); | ||
| 1555 | if (cam->buffer_mode == B_vmalloc && alloc_bufs_at_read) | ||
| 1556 | mcam_free_dma_bufs(cam); | ||
| 1557 | } | ||
| 1558 | mutex_unlock(&cam->s_mutex); | ||
| 1559 | return 0; | ||
| 1560 | } | ||
| 1561 | |||
| 1562 | static ssize_t mcam_v4l_read(struct file *filp, | ||
| 1563 | char __user *buffer, size_t len, loff_t *pos) | ||
| 1564 | { | ||
| 1565 | struct mcam_camera *cam = filp->private_data; | ||
| 1566 | int ret; | ||
| 1567 | |||
| 1568 | mutex_lock(&cam->s_mutex); | ||
| 1569 | ret = vb2_read(&cam->vb_queue, buffer, len, pos, | ||
| 1570 | filp->f_flags & O_NONBLOCK); | ||
| 1571 | mutex_unlock(&cam->s_mutex); | ||
| 1572 | return ret; | ||
| 1573 | } | ||
| 1574 | |||
| 1575 | |||
| 1576 | |||
| 1577 | static unsigned int mcam_v4l_poll(struct file *filp, | ||
| 1578 | struct poll_table_struct *pt) | ||
| 1579 | { | ||
| 1580 | struct mcam_camera *cam = filp->private_data; | ||
| 1581 | int ret; | ||
| 1582 | |||
| 1583 | mutex_lock(&cam->s_mutex); | ||
| 1584 | ret = vb2_poll(&cam->vb_queue, filp, pt); | ||
| 1585 | mutex_unlock(&cam->s_mutex); | ||
| 1586 | return ret; | ||
| 1587 | } | ||
| 1588 | |||
| 1589 | |||
| 1590 | static int mcam_v4l_mmap(struct file *filp, struct vm_area_struct *vma) | ||
| 1591 | { | ||
| 1592 | struct mcam_camera *cam = filp->private_data; | ||
| 1593 | int ret; | ||
| 1594 | |||
| 1595 | mutex_lock(&cam->s_mutex); | ||
| 1596 | ret = vb2_mmap(&cam->vb_queue, vma); | ||
| 1597 | mutex_unlock(&cam->s_mutex); | ||
| 1598 | return ret; | ||
| 1599 | } | ||
| 1600 | |||
| 1601 | |||
| 1602 | |||
| 1603 | static const struct v4l2_file_operations mcam_v4l_fops = { | ||
| 1604 | .owner = THIS_MODULE, | ||
| 1605 | .open = mcam_v4l_open, | ||
| 1606 | .release = mcam_v4l_release, | ||
| 1607 | .read = mcam_v4l_read, | ||
| 1608 | .poll = mcam_v4l_poll, | ||
| 1609 | .mmap = mcam_v4l_mmap, | ||
| 1610 | .unlocked_ioctl = video_ioctl2, | ||
| 1611 | }; | ||
| 1612 | |||
| 1613 | |||
| 1614 | /* | ||
| 1615 | * This template device holds all of those v4l2 methods; we | ||
| 1616 | * clone it for specific real devices. | ||
| 1617 | */ | ||
| 1618 | static struct video_device mcam_v4l_template = { | ||
| 1619 | .name = "mcam", | ||
| 1620 | .tvnorms = V4L2_STD_NTSC_M, | ||
| 1621 | .current_norm = V4L2_STD_NTSC_M, /* make mplayer happy */ | ||
| 1622 | |||
| 1623 | .fops = &mcam_v4l_fops, | ||
| 1624 | .ioctl_ops = &mcam_v4l_ioctl_ops, | ||
| 1625 | .release = video_device_release_empty, | ||
| 1626 | }; | ||
| 1627 | |||
| 1628 | /* ---------------------------------------------------------------------- */ | ||
| 1629 | /* | ||
| 1630 | * Interrupt handler stuff | ||
| 1631 | */ | ||
| 1632 | static void mcam_frame_complete(struct mcam_camera *cam, int frame) | ||
| 1633 | { | ||
| 1634 | /* | ||
| 1635 | * Basic frame housekeeping. | ||
| 1636 | */ | ||
| 1637 | set_bit(frame, &cam->flags); | ||
| 1638 | clear_bit(CF_DMA_ACTIVE, &cam->flags); | ||
| 1639 | cam->next_buf = frame; | ||
| 1640 | cam->buf_seq[frame] = ++(cam->sequence); | ||
| 1641 | frames++; | ||
| 1642 | /* | ||
| 1643 | * "This should never happen" | ||
| 1644 | */ | ||
| 1645 | if (cam->state != S_STREAMING) | ||
| 1646 | return; | ||
| 1647 | /* | ||
| 1648 | * Process the frame and set up the next one. | ||
| 1649 | */ | ||
| 1650 | cam->frame_complete(cam, frame); | ||
| 1651 | } | ||
| 1652 | |||
| 1653 | |||
| 1654 | /* | ||
| 1655 | * The interrupt handler; this needs to be called from the | ||
| 1656 | * platform irq handler with the lock held. | ||
| 1657 | */ | ||
| 1658 | int mccic_irq(struct mcam_camera *cam, unsigned int irqs) | ||
| 1659 | { | ||
| 1660 | unsigned int frame, handled = 0; | ||
| 1661 | |||
| 1662 | mcam_reg_write(cam, REG_IRQSTAT, FRAMEIRQS); /* Clear'em all */ | ||
| 1663 | /* | ||
| 1664 | * Handle any frame completions. There really should | ||
| 1665 | * not be more than one of these, or we have fallen | ||
| 1666 | * far behind. | ||
| 1667 | * | ||
| 1668 | * When running in S/G mode, the frame number lacks any | ||
| 1669 | * real meaning - there's only one descriptor array - but | ||
| 1670 | * the controller still picks a different one to signal | ||
| 1671 | * each time. | ||
| 1672 | */ | ||
| 1673 | for (frame = 0; frame < cam->nbufs; frame++) | ||
| 1674 | if (irqs & (IRQ_EOF0 << frame)) { | ||
| 1675 | mcam_frame_complete(cam, frame); | ||
| 1676 | handled = 1; | ||
| 1677 | } | ||
| 1678 | /* | ||
| 1679 | * If a frame starts, note that we have DMA active. This | ||
| 1680 | * code assumes that we won't get multiple frame interrupts | ||
| 1681 | * at once; may want to rethink that. | ||
| 1682 | */ | ||
| 1683 | if (irqs & (IRQ_SOF0 | IRQ_SOF1 | IRQ_SOF2)) { | ||
| 1684 | set_bit(CF_DMA_ACTIVE, &cam->flags); | ||
| 1685 | handled = 1; | ||
| 1686 | if (cam->buffer_mode == B_DMA_sg) | ||
| 1687 | mcam_ctlr_stop(cam); | ||
| 1688 | } | ||
| 1689 | return handled; | ||
| 1690 | } | ||
| 1691 | |||
| 1692 | /* ---------------------------------------------------------------------- */ | ||
| 1693 | /* | ||
| 1694 | * Registration and such. | ||
| 1695 | */ | ||
| 1696 | static struct ov7670_config sensor_cfg = { | ||
| 1697 | /* | ||
| 1698 | * Exclude QCIF mode, because it only captures a tiny portion | ||
| 1699 | * of the sensor FOV | ||
| 1700 | */ | ||
| 1701 | .min_width = 320, | ||
| 1702 | .min_height = 240, | ||
| 1703 | }; | ||
| 1704 | |||
| 1705 | |||
| 1706 | int mccic_register(struct mcam_camera *cam) | ||
| 1707 | { | ||
| 1708 | struct i2c_board_info ov7670_info = { | ||
| 1709 | .type = "ov7670", | ||
| 1710 | .addr = 0x42 >> 1, | ||
| 1711 | .platform_data = &sensor_cfg, | ||
| 1712 | }; | ||
| 1713 | int ret; | ||
| 1714 | |||
| 1715 | /* | ||
| 1716 | * Validate the requested buffer mode. | ||
| 1717 | */ | ||
| 1718 | if (buffer_mode >= 0) | ||
| 1719 | cam->buffer_mode = buffer_mode; | ||
| 1720 | if (cam->buffer_mode == B_DMA_sg && | ||
| 1721 | cam->chip_id == V4L2_IDENT_CAFE) { | ||
| 1722 | printk(KERN_ERR "marvell-cam: Cafe can't do S/G I/O, " | ||
| 1723 | "attempting vmalloc mode instead\n"); | ||
| 1724 | cam->buffer_mode = B_vmalloc; | ||
| 1725 | } | ||
| 1726 | if (!mcam_buffer_mode_supported(cam->buffer_mode)) { | ||
| 1727 | printk(KERN_ERR "marvell-cam: buffer mode %d unsupported\n", | ||
| 1728 | cam->buffer_mode); | ||
| 1729 | return -EINVAL; | ||
| 1730 | } | ||
| 1731 | /* | ||
| 1732 | * Register with V4L | ||
| 1733 | */ | ||
| 1734 | ret = v4l2_device_register(cam->dev, &cam->v4l2_dev); | ||
| 1735 | if (ret) | ||
| 1736 | return ret; | ||
| 1737 | |||
| 1738 | mutex_init(&cam->s_mutex); | ||
| 1739 | cam->state = S_NOTREADY; | ||
| 1740 | mcam_set_config_needed(cam, 1); | ||
| 1741 | cam->pix_format = mcam_def_pix_format; | ||
| 1742 | cam->mbus_code = mcam_def_mbus_code; | ||
| 1743 | INIT_LIST_HEAD(&cam->buffers); | ||
| 1744 | mcam_ctlr_init(cam); | ||
| 1745 | |||
| 1746 | /* | ||
| 1747 | * Try to find the sensor. | ||
| 1748 | */ | ||
| 1749 | sensor_cfg.clock_speed = cam->clock_speed; | ||
| 1750 | sensor_cfg.use_smbus = cam->use_smbus; | ||
| 1751 | cam->sensor_addr = ov7670_info.addr; | ||
| 1752 | cam->sensor = v4l2_i2c_new_subdev_board(&cam->v4l2_dev, | ||
| 1753 | cam->i2c_adapter, &ov7670_info, NULL); | ||
| 1754 | if (cam->sensor == NULL) { | ||
| 1755 | ret = -ENODEV; | ||
| 1756 | goto out_unregister; | ||
| 1757 | } | ||
| 1758 | |||
| 1759 | ret = mcam_cam_init(cam); | ||
| 1760 | if (ret) | ||
| 1761 | goto out_unregister; | ||
| 1762 | /* | ||
| 1763 | * Get the v4l2 setup done. | ||
| 1764 | */ | ||
| 1765 | mutex_lock(&cam->s_mutex); | ||
| 1766 | cam->vdev = mcam_v4l_template; | ||
| 1767 | cam->vdev.debug = 0; | ||
| 1768 | cam->vdev.v4l2_dev = &cam->v4l2_dev; | ||
| 1769 | ret = video_register_device(&cam->vdev, VFL_TYPE_GRABBER, -1); | ||
| 1770 | if (ret) | ||
| 1771 | goto out; | ||
| 1772 | video_set_drvdata(&cam->vdev, cam); | ||
| 1773 | |||
| 1774 | /* | ||
| 1775 | * If so requested, try to get our DMA buffers now. | ||
| 1776 | */ | ||
| 1777 | if (cam->buffer_mode == B_vmalloc && !alloc_bufs_at_read) { | ||
| 1778 | if (mcam_alloc_dma_bufs(cam, 1)) | ||
| 1779 | cam_warn(cam, "Unable to alloc DMA buffers at load" | ||
| 1780 | " will try again later."); | ||
| 1781 | } | ||
| 1782 | |||
| 1783 | out: | ||
| 1784 | mutex_unlock(&cam->s_mutex); | ||
| 1785 | return ret; | ||
| 1786 | out_unregister: | ||
| 1787 | v4l2_device_unregister(&cam->v4l2_dev); | ||
| 1788 | return ret; | ||
| 1789 | } | ||
| 1790 | |||
| 1791 | |||
| 1792 | void mccic_shutdown(struct mcam_camera *cam) | ||
| 1793 | { | ||
| 1794 | /* | ||
| 1795 | * If we have no users (and we really, really should have no | ||
| 1796 | * users) the device will already be powered down. Trying to | ||
| 1797 | * take it down again will wedge the machine, which is frowned | ||
| 1798 | * upon. | ||
| 1799 | */ | ||
| 1800 | if (cam->users > 0) { | ||
| 1801 | cam_warn(cam, "Removing a device with users!\n"); | ||
| 1802 | mcam_ctlr_power_down(cam); | ||
| 1803 | } | ||
| 1804 | vb2_queue_release(&cam->vb_queue); | ||
| 1805 | if (cam->buffer_mode == B_vmalloc) | ||
| 1806 | mcam_free_dma_bufs(cam); | ||
| 1807 | video_unregister_device(&cam->vdev); | ||
| 1808 | v4l2_device_unregister(&cam->v4l2_dev); | ||
| 1809 | } | ||
| 1810 | |||
| 1811 | /* | ||
| 1812 | * Power management | ||
| 1813 | */ | ||
| 1814 | #ifdef CONFIG_PM | ||
| 1815 | |||
| 1816 | void mccic_suspend(struct mcam_camera *cam) | ||
| 1817 | { | ||
| 1818 | enum mcam_state cstate = cam->state; | ||
| 1819 | |||
| 1820 | mcam_ctlr_stop_dma(cam); | ||
| 1821 | mcam_ctlr_power_down(cam); | ||
| 1822 | cam->state = cstate; | ||
| 1823 | } | ||
| 1824 | |||
| 1825 | int mccic_resume(struct mcam_camera *cam) | ||
| 1826 | { | ||
| 1827 | int ret = 0; | ||
| 1828 | |||
| 1829 | mutex_lock(&cam->s_mutex); | ||
| 1830 | if (cam->users > 0) { | ||
| 1831 | mcam_ctlr_power_up(cam); | ||
| 1832 | __mcam_cam_reset(cam); | ||
| 1833 | } else { | ||
| 1834 | mcam_ctlr_power_down(cam); | ||
| 1835 | } | ||
| 1836 | mutex_unlock(&cam->s_mutex); | ||
| 1837 | |||
| 1838 | set_bit(CF_CONFIG_NEEDED, &cam->flags); | ||
| 1839 | if (cam->state == S_STREAMING) | ||
| 1840 | ret = mcam_read_setup(cam); | ||
| 1841 | return ret; | ||
| 1842 | } | ||
| 1843 | #endif /* CONFIG_PM */ | ||
diff --git a/drivers/media/video/marvell-ccic/mcam-core.h b/drivers/media/video/marvell-ccic/mcam-core.h new file mode 100644 index 000000000000..917200e63255 --- /dev/null +++ b/drivers/media/video/marvell-ccic/mcam-core.h | |||
| @@ -0,0 +1,323 @@ | |||
| 1 | /* | ||
| 2 | * Marvell camera core structures. | ||
| 3 | * | ||
| 4 | * Copyright 2011 Jonathan Corbet corbet@lwn.net | ||
| 5 | */ | ||
| 6 | #ifndef _MCAM_CORE_H | ||
| 7 | #define _MCAM_CORE_H | ||
| 8 | |||
| 9 | #include <linux/list.h> | ||
| 10 | #include <media/v4l2-common.h> | ||
| 11 | #include <media/v4l2-dev.h> | ||
| 12 | #include <media/videobuf2-core.h> | ||
| 13 | |||
| 14 | /* | ||
| 15 | * Create our own symbols for the supported buffer modes, but, for now, | ||
| 16 | * base them entirely on which videobuf2 options have been selected. | ||
| 17 | */ | ||
| 18 | #if defined(CONFIG_VIDEOBUF2_VMALLOC) || defined(CONFIG_VIDEOBUF2_VMALLOC_MODULE) | ||
| 19 | #define MCAM_MODE_VMALLOC 1 | ||
| 20 | #endif | ||
| 21 | |||
| 22 | #if defined(CONFIG_VIDEOBUF2_DMA_CONTIG) || defined(CONFIG_VIDEOBUF2_DMA_CONTIG_MODULE) | ||
| 23 | #define MCAM_MODE_DMA_CONTIG 1 | ||
| 24 | #endif | ||
| 25 | |||
| 26 | #if defined(CONFIG_VIDEOBUF2_DMA_SG) || defined(CONFIG_VIDEOBUF2_DMA_SG_MODULE) | ||
| 27 | #define MCAM_MODE_DMA_SG 1 | ||
| 28 | #endif | ||
| 29 | |||
| 30 | #if !defined(MCAM_MODE_VMALLOC) && !defined(MCAM_MODE_DMA_CONTIG) && \ | ||
| 31 | !defined(MCAM_MODE_DMA_SG) | ||
| 32 | #error One of the videobuf buffer modes must be selected in the config | ||
| 33 | #endif | ||
| 34 | |||
| 35 | |||
| 36 | enum mcam_state { | ||
| 37 | S_NOTREADY, /* Not yet initialized */ | ||
| 38 | S_IDLE, /* Just hanging around */ | ||
| 39 | S_FLAKED, /* Some sort of problem */ | ||
| 40 | S_STREAMING, /* Streaming data */ | ||
| 41 | S_BUFWAIT /* streaming requested but no buffers yet */ | ||
| 42 | }; | ||
| 43 | #define MAX_DMA_BUFS 3 | ||
| 44 | |||
| 45 | /* | ||
| 46 | * Different platforms work best with different buffer modes, so we | ||
| 47 | * let the platform pick. | ||
| 48 | */ | ||
| 49 | enum mcam_buffer_mode { | ||
| 50 | B_vmalloc = 0, | ||
| 51 | B_DMA_contig = 1, | ||
| 52 | B_DMA_sg = 2 | ||
| 53 | }; | ||
| 54 | |||
| 55 | /* | ||
| 56 | * Is a given buffer mode supported by the current kernel configuration? | ||
| 57 | */ | ||
| 58 | static inline int mcam_buffer_mode_supported(enum mcam_buffer_mode mode) | ||
| 59 | { | ||
| 60 | switch (mode) { | ||
| 61 | #ifdef MCAM_MODE_VMALLOC | ||
| 62 | case B_vmalloc: | ||
| 63 | #endif | ||
| 64 | #ifdef MCAM_MODE_DMA_CONTIG | ||
| 65 | case B_DMA_contig: | ||
| 66 | #endif | ||
| 67 | #ifdef MCAM_MODE_DMA_SG | ||
| 68 | case B_DMA_sg: | ||
| 69 | #endif | ||
| 70 | return 1; | ||
| 71 | default: | ||
| 72 | return 0; | ||
| 73 | } | ||
| 74 | } | ||
| 75 | |||
| 76 | |||
| 77 | /* | ||
| 78 | * A description of one of our devices. | ||
| 79 | * Locking: controlled by s_mutex. Certain fields, however, require | ||
| 80 | * the dev_lock spinlock; they are marked as such by comments. | ||
| 81 | * dev_lock is also required for access to device registers. | ||
| 82 | */ | ||
| 83 | struct mcam_camera { | ||
| 84 | /* | ||
| 85 | * These fields should be set by the platform code prior to | ||
| 86 | * calling mcam_register(). | ||
| 87 | */ | ||
| 88 | struct i2c_adapter *i2c_adapter; | ||
| 89 | unsigned char __iomem *regs; | ||
| 90 | spinlock_t dev_lock; | ||
| 91 | struct device *dev; /* For messages, dma alloc */ | ||
| 92 | unsigned int chip_id; | ||
| 93 | short int clock_speed; /* Sensor clock speed, default 30 */ | ||
| 94 | short int use_smbus; /* SMBUS or straight I2c? */ | ||
| 95 | enum mcam_buffer_mode buffer_mode; | ||
| 96 | /* | ||
| 97 | * Callbacks from the core to the platform code. | ||
| 98 | */ | ||
| 99 | void (*plat_power_up) (struct mcam_camera *cam); | ||
| 100 | void (*plat_power_down) (struct mcam_camera *cam); | ||
| 101 | |||
| 102 | /* | ||
| 103 | * Everything below here is private to the mcam core and | ||
| 104 | * should not be touched by the platform code. | ||
| 105 | */ | ||
| 106 | struct v4l2_device v4l2_dev; | ||
| 107 | enum mcam_state state; | ||
| 108 | unsigned long flags; /* Buffer status, mainly (dev_lock) */ | ||
| 109 | int users; /* How many open FDs */ | ||
| 110 | struct file *owner; /* Who has data access (v4l2) */ | ||
| 111 | |||
| 112 | /* | ||
| 113 | * Subsystem structures. | ||
| 114 | */ | ||
| 115 | struct video_device vdev; | ||
| 116 | struct v4l2_subdev *sensor; | ||
| 117 | unsigned short sensor_addr; | ||
| 118 | |||
| 119 | /* Videobuf2 stuff */ | ||
| 120 | struct vb2_queue vb_queue; | ||
| 121 | struct list_head buffers; /* Available frames */ | ||
| 122 | |||
| 123 | unsigned int nbufs; /* How many are alloc'd */ | ||
| 124 | int next_buf; /* Next to consume (dev_lock) */ | ||
| 125 | |||
| 126 | /* DMA buffers - vmalloc mode */ | ||
| 127 | #ifdef MCAM_MODE_VMALLOC | ||
| 128 | unsigned int dma_buf_size; /* allocated size */ | ||
| 129 | void *dma_bufs[MAX_DMA_BUFS]; /* Internal buffer addresses */ | ||
| 130 | dma_addr_t dma_handles[MAX_DMA_BUFS]; /* Buffer bus addresses */ | ||
| 131 | struct tasklet_struct s_tasklet; | ||
| 132 | #endif | ||
| 133 | unsigned int sequence; /* Frame sequence number */ | ||
| 134 | unsigned int buf_seq[MAX_DMA_BUFS]; /* Sequence for individual bufs */ | ||
| 135 | |||
| 136 | /* DMA buffers - DMA modes */ | ||
| 137 | struct mcam_vb_buffer *vb_bufs[MAX_DMA_BUFS]; | ||
| 138 | struct vb2_alloc_ctx *vb_alloc_ctx; | ||
| 139 | |||
| 140 | /* Mode-specific ops, set at open time */ | ||
| 141 | void (*dma_setup)(struct mcam_camera *cam); | ||
| 142 | void (*frame_complete)(struct mcam_camera *cam, int frame); | ||
| 143 | |||
| 144 | /* Current operating parameters */ | ||
| 145 | u32 sensor_type; /* Currently ov7670 only */ | ||
| 146 | struct v4l2_pix_format pix_format; | ||
| 147 | enum v4l2_mbus_pixelcode mbus_code; | ||
| 148 | |||
| 149 | /* Locks */ | ||
| 150 | struct mutex s_mutex; /* Access to this structure */ | ||
| 151 | }; | ||
| 152 | |||
| 153 | |||
| 154 | /* | ||
| 155 | * Register I/O functions. These are here because the platform code | ||
| 156 | * may legitimately need to mess with the register space. | ||
| 157 | */ | ||
| 158 | /* | ||
| 159 | * Device register I/O | ||
| 160 | */ | ||
| 161 | static inline void mcam_reg_write(struct mcam_camera *cam, unsigned int reg, | ||
| 162 | unsigned int val) | ||
| 163 | { | ||
| 164 | iowrite32(val, cam->regs + reg); | ||
| 165 | } | ||
| 166 | |||
| 167 | static inline unsigned int mcam_reg_read(struct mcam_camera *cam, | ||
| 168 | unsigned int reg) | ||
| 169 | { | ||
| 170 | return ioread32(cam->regs + reg); | ||
| 171 | } | ||
| 172 | |||
| 173 | |||
| 174 | static inline void mcam_reg_write_mask(struct mcam_camera *cam, unsigned int reg, | ||
| 175 | unsigned int val, unsigned int mask) | ||
| 176 | { | ||
| 177 | unsigned int v = mcam_reg_read(cam, reg); | ||
| 178 | |||
| 179 | v = (v & ~mask) | (val & mask); | ||
| 180 | mcam_reg_write(cam, reg, v); | ||
| 181 | } | ||
| 182 | |||
| 183 | static inline void mcam_reg_clear_bit(struct mcam_camera *cam, | ||
| 184 | unsigned int reg, unsigned int val) | ||
| 185 | { | ||
| 186 | mcam_reg_write_mask(cam, reg, 0, val); | ||
| 187 | } | ||
| 188 | |||
| 189 | static inline void mcam_reg_set_bit(struct mcam_camera *cam, | ||
| 190 | unsigned int reg, unsigned int val) | ||
| 191 | { | ||
| 192 | mcam_reg_write_mask(cam, reg, val, val); | ||
| 193 | } | ||
| 194 | |||
| 195 | /* | ||
| 196 | * Functions for use by platform code. | ||
| 197 | */ | ||
| 198 | int mccic_register(struct mcam_camera *cam); | ||
| 199 | int mccic_irq(struct mcam_camera *cam, unsigned int irqs); | ||
| 200 | void mccic_shutdown(struct mcam_camera *cam); | ||
| 201 | #ifdef CONFIG_PM | ||
| 202 | void mccic_suspend(struct mcam_camera *cam); | ||
| 203 | int mccic_resume(struct mcam_camera *cam); | ||
| 204 | #endif | ||
| 205 | |||
| 206 | /* | ||
| 207 | * Register definitions for the m88alp01 camera interface. Offsets in bytes | ||
| 208 | * as given in the spec. | ||
| 209 | */ | ||
| 210 | #define REG_Y0BAR 0x00 | ||
| 211 | #define REG_Y1BAR 0x04 | ||
| 212 | #define REG_Y2BAR 0x08 | ||
| 213 | /* ... */ | ||
| 214 | |||
| 215 | #define REG_IMGPITCH 0x24 /* Image pitch register */ | ||
| 216 | #define IMGP_YP_SHFT 2 /* Y pitch params */ | ||
| 217 | #define IMGP_YP_MASK 0x00003ffc /* Y pitch field */ | ||
| 218 | #define IMGP_UVP_SHFT 18 /* UV pitch (planar) */ | ||
| 219 | #define IMGP_UVP_MASK 0x3ffc0000 | ||
| 220 | #define REG_IRQSTATRAW 0x28 /* RAW IRQ Status */ | ||
| 221 | #define IRQ_EOF0 0x00000001 /* End of frame 0 */ | ||
| 222 | #define IRQ_EOF1 0x00000002 /* End of frame 1 */ | ||
| 223 | #define IRQ_EOF2 0x00000004 /* End of frame 2 */ | ||
| 224 | #define IRQ_SOF0 0x00000008 /* Start of frame 0 */ | ||
| 225 | #define IRQ_SOF1 0x00000010 /* Start of frame 1 */ | ||
| 226 | #define IRQ_SOF2 0x00000020 /* Start of frame 2 */ | ||
| 227 | #define IRQ_OVERFLOW 0x00000040 /* FIFO overflow */ | ||
| 228 | #define IRQ_TWSIW 0x00010000 /* TWSI (smbus) write */ | ||
| 229 | #define IRQ_TWSIR 0x00020000 /* TWSI read */ | ||
| 230 | #define IRQ_TWSIE 0x00040000 /* TWSI error */ | ||
| 231 | #define TWSIIRQS (IRQ_TWSIW|IRQ_TWSIR|IRQ_TWSIE) | ||
| 232 | #define FRAMEIRQS (IRQ_EOF0|IRQ_EOF1|IRQ_EOF2|IRQ_SOF0|IRQ_SOF1|IRQ_SOF2) | ||
| 233 | #define ALLIRQS (TWSIIRQS|FRAMEIRQS|IRQ_OVERFLOW) | ||
| 234 | #define REG_IRQMASK 0x2c /* IRQ mask - same bits as IRQSTAT */ | ||
| 235 | #define REG_IRQSTAT 0x30 /* IRQ status / clear */ | ||
| 236 | |||
| 237 | #define REG_IMGSIZE 0x34 /* Image size */ | ||
| 238 | #define IMGSZ_V_MASK 0x1fff0000 | ||
| 239 | #define IMGSZ_V_SHIFT 16 | ||
| 240 | #define IMGSZ_H_MASK 0x00003fff | ||
| 241 | #define REG_IMGOFFSET 0x38 /* IMage offset */ | ||
| 242 | |||
| 243 | #define REG_CTRL0 0x3c /* Control 0 */ | ||
| 244 | #define C0_ENABLE 0x00000001 /* Makes the whole thing go */ | ||
| 245 | |||
| 246 | /* Mask for all the format bits */ | ||
| 247 | #define C0_DF_MASK 0x00fffffc /* Bits 2-23 */ | ||
| 248 | |||
| 249 | /* RGB ordering */ | ||
| 250 | #define C0_RGB4_RGBX 0x00000000 | ||
| 251 | #define C0_RGB4_XRGB 0x00000004 | ||
| 252 | #define C0_RGB4_BGRX 0x00000008 | ||
| 253 | #define C0_RGB4_XBGR 0x0000000c | ||
| 254 | #define C0_RGB5_RGGB 0x00000000 | ||
| 255 | #define C0_RGB5_GRBG 0x00000004 | ||
| 256 | #define C0_RGB5_GBRG 0x00000008 | ||
| 257 | #define C0_RGB5_BGGR 0x0000000c | ||
| 258 | |||
| 259 | /* Spec has two fields for DIN and DOUT, but they must match, so | ||
| 260 | combine them here. */ | ||
| 261 | #define C0_DF_YUV 0x00000000 /* Data is YUV */ | ||
| 262 | #define C0_DF_RGB 0x000000a0 /* ... RGB */ | ||
| 263 | #define C0_DF_BAYER 0x00000140 /* ... Bayer */ | ||
| 264 | /* 8-8-8 must be missing from the below - ask */ | ||
| 265 | #define C0_RGBF_565 0x00000000 | ||
| 266 | #define C0_RGBF_444 0x00000800 | ||
| 267 | #define C0_RGB_BGR 0x00001000 /* Blue comes first */ | ||
| 268 | #define C0_YUV_PLANAR 0x00000000 /* YUV 422 planar format */ | ||
| 269 | #define C0_YUV_PACKED 0x00008000 /* YUV 422 packed */ | ||
| 270 | #define C0_YUV_420PL 0x0000a000 /* YUV 420 planar */ | ||
| 271 | /* Think that 420 packed must be 111 - ask */ | ||
| 272 | #define C0_YUVE_YUYV 0x00000000 /* Y1CbY0Cr */ | ||
| 273 | #define C0_YUVE_YVYU 0x00010000 /* Y1CrY0Cb */ | ||
| 274 | #define C0_YUVE_VYUY 0x00020000 /* CrY1CbY0 */ | ||
| 275 | #define C0_YUVE_UYVY 0x00030000 /* CbY1CrY0 */ | ||
| 276 | #define C0_YUVE_XYUV 0x00000000 /* 420: .YUV */ | ||
| 277 | #define C0_YUVE_XYVU 0x00010000 /* 420: .YVU */ | ||
| 278 | #define C0_YUVE_XUVY 0x00020000 /* 420: .UVY */ | ||
| 279 | #define C0_YUVE_XVUY 0x00030000 /* 420: .VUY */ | ||
| 280 | /* Bayer bits 18,19 if needed */ | ||
| 281 | #define C0_HPOL_LOW 0x01000000 /* HSYNC polarity active low */ | ||
| 282 | #define C0_VPOL_LOW 0x02000000 /* VSYNC polarity active low */ | ||
| 283 | #define C0_VCLK_LOW 0x04000000 /* VCLK on falling edge */ | ||
| 284 | #define C0_DOWNSCALE 0x08000000 /* Enable downscaler */ | ||
| 285 | #define C0_SIFM_MASK 0xc0000000 /* SIF mode bits */ | ||
| 286 | #define C0_SIF_HVSYNC 0x00000000 /* Use H/VSYNC */ | ||
| 287 | #define CO_SOF_NOSYNC 0x40000000 /* Use inband active signaling */ | ||
| 288 | |||
| 289 | /* Bits below C1_444ALPHA are not present in Cafe */ | ||
| 290 | #define REG_CTRL1 0x40 /* Control 1 */ | ||
| 291 | #define C1_CLKGATE 0x00000001 /* Sensor clock gate */ | ||
| 292 | #define C1_DESC_ENA 0x00000100 /* DMA descriptor enable */ | ||
| 293 | #define C1_DESC_3WORD 0x00000200 /* Three-word descriptors used */ | ||
| 294 | #define C1_444ALPHA 0x00f00000 /* Alpha field in RGB444 */ | ||
| 295 | #define C1_ALPHA_SHFT 20 | ||
| 296 | #define C1_DMAB32 0x00000000 /* 32-byte DMA burst */ | ||
| 297 | #define C1_DMAB16 0x02000000 /* 16-byte DMA burst */ | ||
| 298 | #define C1_DMAB64 0x04000000 /* 64-byte DMA burst */ | ||
| 299 | #define C1_DMAB_MASK 0x06000000 | ||
| 300 | #define C1_TWOBUFS 0x08000000 /* Use only two DMA buffers */ | ||
| 301 | #define C1_PWRDWN 0x10000000 /* Power down */ | ||
| 302 | |||
| 303 | #define REG_CLKCTRL 0x88 /* Clock control */ | ||
| 304 | #define CLK_DIV_MASK 0x0000ffff /* Upper bits RW "reserved" */ | ||
| 305 | |||
| 306 | /* This appears to be a Cafe-only register */ | ||
| 307 | #define REG_UBAR 0xc4 /* Upper base address register */ | ||
| 308 | |||
| 309 | /* Armada 610 DMA descriptor registers */ | ||
| 310 | #define REG_DMA_DESC_Y 0x200 | ||
| 311 | #define REG_DMA_DESC_U 0x204 | ||
| 312 | #define REG_DMA_DESC_V 0x208 | ||
| 313 | #define REG_DESC_LEN_Y 0x20c /* Lengths are in bytes */ | ||
| 314 | #define REG_DESC_LEN_U 0x210 | ||
| 315 | #define REG_DESC_LEN_V 0x214 | ||
| 316 | |||
| 317 | /* | ||
| 318 | * Useful stuff that probably belongs somewhere global. | ||
| 319 | */ | ||
| 320 | #define VGA_WIDTH 640 | ||
| 321 | #define VGA_HEIGHT 480 | ||
| 322 | |||
| 323 | #endif /* _MCAM_CORE_H */ | ||
diff --git a/drivers/media/video/marvell-ccic/mmp-driver.c b/drivers/media/video/marvell-ccic/mmp-driver.c new file mode 100644 index 000000000000..d6b764541375 --- /dev/null +++ b/drivers/media/video/marvell-ccic/mmp-driver.c | |||
| @@ -0,0 +1,340 @@ | |||
| 1 | /* | ||
| 2 | * Support for the camera device found on Marvell MMP processors; known | ||
| 3 | * to work with the Armada 610 as used in the OLPC 1.75 system. | ||
| 4 | * | ||
| 5 | * Copyright 2011 Jonathan Corbet <corbet@lwn.net> | ||
| 6 | * | ||
| 7 | * This file may be distributed under the terms of the GNU General | ||
| 8 | * Public License, version 2. | ||
| 9 | */ | ||
| 10 | |||
| 11 | #include <linux/init.h> | ||
| 12 | #include <linux/kernel.h> | ||
| 13 | #include <linux/module.h> | ||
| 14 | #include <linux/i2c.h> | ||
| 15 | #include <linux/i2c-gpio.h> | ||
| 16 | #include <linux/interrupt.h> | ||
| 17 | #include <linux/spinlock.h> | ||
| 18 | #include <linux/slab.h> | ||
| 19 | #include <linux/videodev2.h> | ||
| 20 | #include <media/v4l2-device.h> | ||
| 21 | #include <media/v4l2-chip-ident.h> | ||
| 22 | #include <media/mmp-camera.h> | ||
| 23 | #include <linux/device.h> | ||
| 24 | #include <linux/platform_device.h> | ||
| 25 | #include <linux/gpio.h> | ||
| 26 | #include <linux/io.h> | ||
| 27 | #include <linux/delay.h> | ||
| 28 | #include <linux/list.h> | ||
| 29 | |||
| 30 | #include "mcam-core.h" | ||
| 31 | |||
| 32 | MODULE_AUTHOR("Jonathan Corbet <corbet@lwn.net>"); | ||
| 33 | MODULE_LICENSE("GPL"); | ||
| 34 | |||
| 35 | struct mmp_camera { | ||
| 36 | void *power_regs; | ||
| 37 | struct platform_device *pdev; | ||
| 38 | struct mcam_camera mcam; | ||
| 39 | struct list_head devlist; | ||
| 40 | int irq; | ||
| 41 | }; | ||
| 42 | |||
| 43 | static inline struct mmp_camera *mcam_to_cam(struct mcam_camera *mcam) | ||
| 44 | { | ||
| 45 | return container_of(mcam, struct mmp_camera, mcam); | ||
| 46 | } | ||
| 47 | |||
| 48 | /* | ||
| 49 | * A silly little infrastructure so we can keep track of our devices. | ||
| 50 | * Chances are that we will never have more than one of them, but | ||
| 51 | * the Armada 610 *does* have two controllers... | ||
| 52 | */ | ||
| 53 | |||
| 54 | static LIST_HEAD(mmpcam_devices); | ||
| 55 | static struct mutex mmpcam_devices_lock; | ||
| 56 | |||
| 57 | static void mmpcam_add_device(struct mmp_camera *cam) | ||
| 58 | { | ||
| 59 | mutex_lock(&mmpcam_devices_lock); | ||
| 60 | list_add(&cam->devlist, &mmpcam_devices); | ||
| 61 | mutex_unlock(&mmpcam_devices_lock); | ||
| 62 | } | ||
| 63 | |||
| 64 | static void mmpcam_remove_device(struct mmp_camera *cam) | ||
| 65 | { | ||
| 66 | mutex_lock(&mmpcam_devices_lock); | ||
| 67 | list_del(&cam->devlist); | ||
| 68 | mutex_unlock(&mmpcam_devices_lock); | ||
| 69 | } | ||
| 70 | |||
| 71 | /* | ||
| 72 | * Platform dev remove passes us a platform_device, and there's | ||
| 73 | * no handy unused drvdata to stash a backpointer in. So just | ||
| 74 | * dig it out of our list. | ||
| 75 | */ | ||
| 76 | static struct mmp_camera *mmpcam_find_device(struct platform_device *pdev) | ||
| 77 | { | ||
| 78 | struct mmp_camera *cam; | ||
| 79 | |||
| 80 | mutex_lock(&mmpcam_devices_lock); | ||
| 81 | list_for_each_entry(cam, &mmpcam_devices, devlist) { | ||
| 82 | if (cam->pdev == pdev) { | ||
| 83 | mutex_unlock(&mmpcam_devices_lock); | ||
| 84 | return cam; | ||
| 85 | } | ||
| 86 | } | ||
| 87 | mutex_unlock(&mmpcam_devices_lock); | ||
| 88 | return NULL; | ||
| 89 | } | ||
| 90 | |||
| 91 | |||
| 92 | |||
| 93 | |||
| 94 | /* | ||
| 95 | * Power-related registers; this almost certainly belongs | ||
| 96 | * somewhere else. | ||
| 97 | * | ||
| 98 | * ARMADA 610 register manual, sec 7.2.1, p1842. | ||
| 99 | */ | ||
| 100 | #define CPU_SUBSYS_PMU_BASE 0xd4282800 | ||
| 101 | #define REG_CCIC_DCGCR 0x28 /* CCIC dyn clock gate ctrl reg */ | ||
| 102 | #define REG_CCIC_CRCR 0x50 /* CCIC clk reset ctrl reg */ | ||
| 103 | |||
| 104 | /* | ||
| 105 | * Power control. | ||
| 106 | */ | ||
| 107 | static void mmpcam_power_up(struct mcam_camera *mcam) | ||
| 108 | { | ||
| 109 | struct mmp_camera *cam = mcam_to_cam(mcam); | ||
| 110 | struct mmp_camera_platform_data *pdata; | ||
| 111 | /* | ||
| 112 | * Turn on power and clocks to the controller. | ||
| 113 | */ | ||
| 114 | iowrite32(0x3f, cam->power_regs + REG_CCIC_DCGCR); | ||
| 115 | iowrite32(0x3805b, cam->power_regs + REG_CCIC_CRCR); | ||
| 116 | mdelay(1); | ||
| 117 | /* | ||
| 118 | * Provide power to the sensor. | ||
| 119 | */ | ||
| 120 | mcam_reg_write(mcam, REG_CLKCTRL, 0x60000002); | ||
| 121 | pdata = cam->pdev->dev.platform_data; | ||
| 122 | gpio_set_value(pdata->sensor_power_gpio, 1); | ||
| 123 | mdelay(5); | ||
| 124 | mcam_reg_clear_bit(mcam, REG_CTRL1, 0x10000000); | ||
| 125 | gpio_set_value(pdata->sensor_reset_gpio, 0); /* reset is active low */ | ||
| 126 | mdelay(5); | ||
| 127 | gpio_set_value(pdata->sensor_reset_gpio, 1); /* reset is active low */ | ||
| 128 | mdelay(5); | ||
| 129 | } | ||
| 130 | |||
| 131 | static void mmpcam_power_down(struct mcam_camera *mcam) | ||
| 132 | { | ||
| 133 | struct mmp_camera *cam = mcam_to_cam(mcam); | ||
| 134 | struct mmp_camera_platform_data *pdata; | ||
| 135 | /* | ||
| 136 | * Turn off clocks and set reset lines | ||
| 137 | */ | ||
| 138 | iowrite32(0, cam->power_regs + REG_CCIC_DCGCR); | ||
| 139 | iowrite32(0, cam->power_regs + REG_CCIC_CRCR); | ||
| 140 | /* | ||
| 141 | * Shut down the sensor. | ||
| 142 | */ | ||
| 143 | pdata = cam->pdev->dev.platform_data; | ||
| 144 | gpio_set_value(pdata->sensor_power_gpio, 0); | ||
| 145 | gpio_set_value(pdata->sensor_reset_gpio, 0); | ||
| 146 | } | ||
| 147 | |||
| 148 | |||
| 149 | static irqreturn_t mmpcam_irq(int irq, void *data) | ||
| 150 | { | ||
| 151 | struct mcam_camera *mcam = data; | ||
| 152 | unsigned int irqs, handled; | ||
| 153 | |||
| 154 | spin_lock(&mcam->dev_lock); | ||
| 155 | irqs = mcam_reg_read(mcam, REG_IRQSTAT); | ||
| 156 | handled = mccic_irq(mcam, irqs); | ||
| 157 | spin_unlock(&mcam->dev_lock); | ||
| 158 | return IRQ_RETVAL(handled); | ||
| 159 | } | ||
| 160 | |||
| 161 | |||
| 162 | static int mmpcam_probe(struct platform_device *pdev) | ||
| 163 | { | ||
| 164 | struct mmp_camera *cam; | ||
| 165 | struct mcam_camera *mcam; | ||
| 166 | struct resource *res; | ||
| 167 | struct mmp_camera_platform_data *pdata; | ||
| 168 | int ret; | ||
| 169 | |||
| 170 | cam = kzalloc(sizeof(*cam), GFP_KERNEL); | ||
| 171 | if (cam == NULL) | ||
| 172 | return -ENOMEM; | ||
| 173 | cam->pdev = pdev; | ||
| 174 | INIT_LIST_HEAD(&cam->devlist); | ||
| 175 | |||
| 176 | mcam = &cam->mcam; | ||
| 177 | mcam->platform = MHP_Armada610; | ||
| 178 | mcam->plat_power_up = mmpcam_power_up; | ||
| 179 | mcam->plat_power_down = mmpcam_power_down; | ||
| 180 | mcam->dev = &pdev->dev; | ||
| 181 | mcam->use_smbus = 0; | ||
| 182 | mcam->chip_id = V4L2_IDENT_ARMADA610; | ||
| 183 | mcam->buffer_mode = B_DMA_sg; | ||
| 184 | spin_lock_init(&mcam->dev_lock); | ||
| 185 | /* | ||
| 186 | * Get our I/O memory. | ||
| 187 | */ | ||
| 188 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
| 189 | if (res == NULL) { | ||
| 190 | dev_err(&pdev->dev, "no iomem resource!\n"); | ||
| 191 | ret = -ENODEV; | ||
| 192 | goto out_free; | ||
| 193 | } | ||
| 194 | mcam->regs = ioremap(res->start, resource_size(res)); | ||
| 195 | if (mcam->regs == NULL) { | ||
| 196 | dev_err(&pdev->dev, "MMIO ioremap fail\n"); | ||
| 197 | ret = -ENODEV; | ||
| 198 | goto out_free; | ||
| 199 | } | ||
| 200 | /* | ||
| 201 | * Power/clock memory is elsewhere; get it too. Perhaps this | ||
| 202 | * should really be managed outside of this driver? | ||
| 203 | */ | ||
| 204 | res = platform_get_resource(pdev, IORESOURCE_MEM, 1); | ||
| 205 | if (res == NULL) { | ||
| 206 | dev_err(&pdev->dev, "no power resource!\n"); | ||
| 207 | ret = -ENODEV; | ||
| 208 | goto out_unmap1; | ||
| 209 | } | ||
| 210 | cam->power_regs = ioremap(res->start, resource_size(res)); | ||
| 211 | if (cam->power_regs == NULL) { | ||
| 212 | dev_err(&pdev->dev, "power MMIO ioremap fail\n"); | ||
| 213 | ret = -ENODEV; | ||
| 214 | goto out_unmap1; | ||
| 215 | } | ||
| 216 | /* | ||
| 217 | * Find the i2c adapter. This assumes, of course, that the | ||
| 218 | * i2c bus is already up and functioning. | ||
| 219 | */ | ||
| 220 | pdata = pdev->dev.platform_data; | ||
| 221 | mcam->i2c_adapter = platform_get_drvdata(pdata->i2c_device); | ||
| 222 | if (mcam->i2c_adapter == NULL) { | ||
| 223 | ret = -ENODEV; | ||
| 224 | dev_err(&pdev->dev, "No i2c adapter\n"); | ||
| 225 | goto out_unmap2; | ||
| 226 | } | ||
| 227 | /* | ||
| 228 | * Sensor GPIO pins. | ||
| 229 | */ | ||
| 230 | ret = gpio_request(pdata->sensor_power_gpio, "cam-power"); | ||
| 231 | if (ret) { | ||
| 232 | dev_err(&pdev->dev, "Can't get sensor power gpio %d", | ||
| 233 | pdata->sensor_power_gpio); | ||
| 234 | goto out_unmap2; | ||
| 235 | } | ||
| 236 | gpio_direction_output(pdata->sensor_power_gpio, 0); | ||
| 237 | ret = gpio_request(pdata->sensor_reset_gpio, "cam-reset"); | ||
| 238 | if (ret) { | ||
| 239 | dev_err(&pdev->dev, "Can't get sensor reset gpio %d", | ||
| 240 | pdata->sensor_reset_gpio); | ||
| 241 | goto out_gpio; | ||
| 242 | } | ||
| 243 | gpio_direction_output(pdata->sensor_reset_gpio, 0); | ||
| 244 | /* | ||
| 245 | * Power the device up and hand it off to the core. | ||
| 246 | */ | ||
| 247 | mmpcam_power_up(mcam); | ||
| 248 | ret = mccic_register(mcam); | ||
| 249 | if (ret) | ||
| 250 | goto out_gpio2; | ||
| 251 | /* | ||
| 252 | * Finally, set up our IRQ now that the core is ready to | ||
| 253 | * deal with it. | ||
| 254 | */ | ||
| 255 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | ||
| 256 | if (res == NULL) { | ||
| 257 | ret = -ENODEV; | ||
| 258 | goto out_unregister; | ||
| 259 | } | ||
| 260 | cam->irq = res->start; | ||
| 261 | ret = request_irq(cam->irq, mmpcam_irq, IRQF_SHARED, | ||
| 262 | "mmp-camera", mcam); | ||
| 263 | if (ret == 0) { | ||
| 264 | mmpcam_add_device(cam); | ||
| 265 | return 0; | ||
| 266 | } | ||
| 267 | |||
| 268 | out_unregister: | ||
| 269 | mccic_shutdown(mcam); | ||
| 270 | out_gpio2: | ||
| 271 | mmpcam_power_down(mcam); | ||
| 272 | gpio_free(pdata->sensor_reset_gpio); | ||
| 273 | out_gpio: | ||
| 274 | gpio_free(pdata->sensor_power_gpio); | ||
| 275 | out_unmap2: | ||
| 276 | iounmap(cam->power_regs); | ||
| 277 | out_unmap1: | ||
| 278 | iounmap(mcam->regs); | ||
| 279 | out_free: | ||
| 280 | kfree(cam); | ||
| 281 | return ret; | ||
| 282 | } | ||
| 283 | |||
| 284 | |||
| 285 | static int mmpcam_remove(struct mmp_camera *cam) | ||
| 286 | { | ||
| 287 | struct mcam_camera *mcam = &cam->mcam; | ||
| 288 | struct mmp_camera_platform_data *pdata; | ||
| 289 | |||
| 290 | mmpcam_remove_device(cam); | ||
| 291 | free_irq(cam->irq, mcam); | ||
| 292 | mccic_shutdown(mcam); | ||
| 293 | mmpcam_power_down(mcam); | ||
| 294 | pdata = cam->pdev->dev.platform_data; | ||
| 295 | gpio_free(pdata->sensor_reset_gpio); | ||
| 296 | gpio_free(pdata->sensor_power_gpio); | ||
| 297 | iounmap(cam->power_regs); | ||
| 298 | iounmap(mcam->regs); | ||
| 299 | kfree(cam); | ||
| 300 | return 0; | ||
| 301 | } | ||
| 302 | |||
| 303 | static int mmpcam_platform_remove(struct platform_device *pdev) | ||
| 304 | { | ||
| 305 | struct mmp_camera *cam = mmpcam_find_device(pdev); | ||
| 306 | |||
| 307 | if (cam == NULL) | ||
| 308 | return -ENODEV; | ||
| 309 | return mmpcam_remove(cam); | ||
| 310 | } | ||
| 311 | |||
| 312 | |||
| 313 | static struct platform_driver mmpcam_driver = { | ||
| 314 | .probe = mmpcam_probe, | ||
| 315 | .remove = mmpcam_platform_remove, | ||
| 316 | .driver = { | ||
| 317 | .name = "mmp-camera", | ||
| 318 | .owner = THIS_MODULE | ||
| 319 | } | ||
| 320 | }; | ||
| 321 | |||
| 322 | |||
| 323 | static int __init mmpcam_init_module(void) | ||
| 324 | { | ||
| 325 | mutex_init(&mmpcam_devices_lock); | ||
| 326 | return platform_driver_register(&mmpcam_driver); | ||
| 327 | } | ||
| 328 | |||
| 329 | static void __exit mmpcam_exit_module(void) | ||
| 330 | { | ||
| 331 | platform_driver_unregister(&mmpcam_driver); | ||
| 332 | /* | ||
| 333 | * platform_driver_unregister() should have emptied the list | ||
| 334 | */ | ||
| 335 | if (!list_empty(&mmpcam_devices)) | ||
| 336 | printk(KERN_ERR "mmp_camera leaving devices behind\n"); | ||
| 337 | } | ||
| 338 | |||
| 339 | module_init(mmpcam_init_module); | ||
| 340 | module_exit(mmpcam_exit_module); | ||
diff --git a/drivers/media/video/mem2mem_testdev.c b/drivers/media/video/mem2mem_testdev.c index b03d74e09a3c..166bf9349c10 100644 --- a/drivers/media/video/mem2mem_testdev.c +++ b/drivers/media/video/mem2mem_testdev.c | |||
| @@ -19,7 +19,6 @@ | |||
| 19 | #include <linux/module.h> | 19 | #include <linux/module.h> |
| 20 | #include <linux/delay.h> | 20 | #include <linux/delay.h> |
| 21 | #include <linux/fs.h> | 21 | #include <linux/fs.h> |
| 22 | #include <linux/version.h> | ||
| 23 | #include <linux/timer.h> | 22 | #include <linux/timer.h> |
| 24 | #include <linux/sched.h> | 23 | #include <linux/sched.h> |
| 25 | #include <linux/slab.h> | 24 | #include <linux/slab.h> |
| @@ -35,7 +34,7 @@ | |||
| 35 | MODULE_DESCRIPTION("Virtual device for mem2mem framework testing"); | 34 | MODULE_DESCRIPTION("Virtual device for mem2mem framework testing"); |
| 36 | MODULE_AUTHOR("Pawel Osciak, <pawel@osciak.com>"); | 35 | MODULE_AUTHOR("Pawel Osciak, <pawel@osciak.com>"); |
| 37 | MODULE_LICENSE("GPL"); | 36 | MODULE_LICENSE("GPL"); |
| 38 | 37 | MODULE_VERSION("0.1.1"); | |
| 39 | 38 | ||
| 40 | #define MIN_W 32 | 39 | #define MIN_W 32 |
| 41 | #define MIN_H 32 | 40 | #define MIN_H 32 |
| @@ -380,7 +379,6 @@ static int vidioc_querycap(struct file *file, void *priv, | |||
| 380 | strncpy(cap->driver, MEM2MEM_NAME, sizeof(cap->driver) - 1); | 379 | strncpy(cap->driver, MEM2MEM_NAME, sizeof(cap->driver) - 1); |
| 381 | strncpy(cap->card, MEM2MEM_NAME, sizeof(cap->card) - 1); | 380 | strncpy(cap->card, MEM2MEM_NAME, sizeof(cap->card) - 1); |
| 382 | cap->bus_info[0] = 0; | 381 | cap->bus_info[0] = 0; |
| 383 | cap->version = KERNEL_VERSION(0, 1, 0); | ||
| 384 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VIDEO_OUTPUT | 382 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VIDEO_OUTPUT |
| 385 | | V4L2_CAP_STREAMING; | 383 | | V4L2_CAP_STREAMING; |
| 386 | 384 | ||
diff --git a/drivers/media/video/mt9m001.c b/drivers/media/video/mt9m001.c index e2bbd8c35c98..4da9cca939c1 100644 --- a/drivers/media/video/mt9m001.c +++ b/drivers/media/video/mt9m001.c | |||
| @@ -603,13 +603,9 @@ static int mt9m001_video_probe(struct soc_camera_device *icd, | |||
| 603 | unsigned long flags; | 603 | unsigned long flags; |
| 604 | int ret; | 604 | int ret; |
| 605 | 605 | ||
| 606 | /* | 606 | /* We must have a parent by now. And it cannot be a wrong one. */ |
| 607 | * We must have a parent by now. And it cannot be a wrong one. | 607 | BUG_ON(!icd->parent || |
| 608 | * So this entire test is completely redundant. | 608 | to_soc_camera_host(icd->parent)->nr != icd->iface); |
| 609 | */ | ||
| 610 | if (!icd->dev.parent || | ||
| 611 | to_soc_camera_host(icd->dev.parent)->nr != icd->iface) | ||
| 612 | return -ENODEV; | ||
| 613 | 609 | ||
| 614 | /* Enable the chip */ | 610 | /* Enable the chip */ |
| 615 | data = reg_write(client, MT9M001_CHIP_ENABLE, 1); | 611 | data = reg_write(client, MT9M001_CHIP_ENABLE, 1); |
| @@ -675,8 +671,8 @@ static void mt9m001_video_remove(struct soc_camera_device *icd) | |||
| 675 | { | 671 | { |
| 676 | struct soc_camera_link *icl = to_soc_camera_link(icd); | 672 | struct soc_camera_link *icl = to_soc_camera_link(icd); |
| 677 | 673 | ||
| 678 | dev_dbg(&icd->dev, "Video removed: %p, %p\n", | 674 | dev_dbg(icd->pdev, "Video removed: %p, %p\n", |
| 679 | icd->dev.parent, icd->vdev); | 675 | icd->parent, icd->vdev); |
| 680 | if (icl->free_bus) | 676 | if (icl->free_bus) |
| 681 | icl->free_bus(icl); | 677 | icl->free_bus(icl); |
| 682 | } | 678 | } |
diff --git a/drivers/media/video/mt9m111.c b/drivers/media/video/mt9m111.c index ebebed929627..a357aa889fc6 100644 --- a/drivers/media/video/mt9m111.c +++ b/drivers/media/video/mt9m111.c | |||
| @@ -63,6 +63,12 @@ | |||
| 63 | #define MT9M111_RESET_RESTART_FRAME (1 << 1) | 63 | #define MT9M111_RESET_RESTART_FRAME (1 << 1) |
| 64 | #define MT9M111_RESET_RESET_MODE (1 << 0) | 64 | #define MT9M111_RESET_RESET_MODE (1 << 0) |
| 65 | 65 | ||
| 66 | #define MT9M111_RM_FULL_POWER_RD (0 << 10) | ||
| 67 | #define MT9M111_RM_LOW_POWER_RD (1 << 10) | ||
| 68 | #define MT9M111_RM_COL_SKIP_4X (1 << 5) | ||
| 69 | #define MT9M111_RM_ROW_SKIP_4X (1 << 4) | ||
| 70 | #define MT9M111_RM_COL_SKIP_2X (1 << 3) | ||
| 71 | #define MT9M111_RM_ROW_SKIP_2X (1 << 2) | ||
| 66 | #define MT9M111_RMB_MIRROR_COLS (1 << 1) | 72 | #define MT9M111_RMB_MIRROR_COLS (1 << 1) |
| 67 | #define MT9M111_RMB_MIRROR_ROWS (1 << 0) | 73 | #define MT9M111_RMB_MIRROR_ROWS (1 << 0) |
| 68 | #define MT9M111_CTXT_CTRL_RESTART (1 << 15) | 74 | #define MT9M111_CTXT_CTRL_RESTART (1 << 15) |
| @@ -95,7 +101,8 @@ | |||
| 95 | 101 | ||
| 96 | #define MT9M111_OPMODE_AUTOEXPO_EN (1 << 14) | 102 | #define MT9M111_OPMODE_AUTOEXPO_EN (1 << 14) |
| 97 | #define MT9M111_OPMODE_AUTOWHITEBAL_EN (1 << 1) | 103 | #define MT9M111_OPMODE_AUTOWHITEBAL_EN (1 << 1) |
| 98 | 104 | #define MT9M111_OUTFMT_FLIP_BAYER_COL (1 << 9) | |
| 105 | #define MT9M111_OUTFMT_FLIP_BAYER_ROW (1 << 8) | ||
| 99 | #define MT9M111_OUTFMT_PROCESSED_BAYER (1 << 14) | 106 | #define MT9M111_OUTFMT_PROCESSED_BAYER (1 << 14) |
| 100 | #define MT9M111_OUTFMT_BYPASS_IFP (1 << 10) | 107 | #define MT9M111_OUTFMT_BYPASS_IFP (1 << 10) |
| 101 | #define MT9M111_OUTFMT_INV_PIX_CLOCK (1 << 9) | 108 | #define MT9M111_OUTFMT_INV_PIX_CLOCK (1 << 9) |
| @@ -110,9 +117,8 @@ | |||
| 110 | #define MT9M111_OUTFMT_TST_RAMP_FRAME (3 << 4) | 117 | #define MT9M111_OUTFMT_TST_RAMP_FRAME (3 << 4) |
| 111 | #define MT9M111_OUTFMT_SHIFT_3_UP (1 << 3) | 118 | #define MT9M111_OUTFMT_SHIFT_3_UP (1 << 3) |
| 112 | #define MT9M111_OUTFMT_AVG_CHROMA (1 << 2) | 119 | #define MT9M111_OUTFMT_AVG_CHROMA (1 << 2) |
| 113 | #define MT9M111_OUTFMT_SWAP_YCbCr_C_Y (1 << 1) | 120 | #define MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN (1 << 1) |
| 114 | #define MT9M111_OUTFMT_SWAP_RGB_EVEN (1 << 1) | 121 | #define MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B (1 << 0) |
| 115 | #define MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr (1 << 0) | ||
| 116 | 122 | ||
| 117 | /* | 123 | /* |
| 118 | * Camera control register addresses (0x200..0x2ff not implemented) | 124 | * Camera control register addresses (0x200..0x2ff not implemented) |
| @@ -122,6 +128,8 @@ | |||
| 122 | #define reg_write(reg, val) mt9m111_reg_write(client, MT9M111_##reg, (val)) | 128 | #define reg_write(reg, val) mt9m111_reg_write(client, MT9M111_##reg, (val)) |
| 123 | #define reg_set(reg, val) mt9m111_reg_set(client, MT9M111_##reg, (val)) | 129 | #define reg_set(reg, val) mt9m111_reg_set(client, MT9M111_##reg, (val)) |
| 124 | #define reg_clear(reg, val) mt9m111_reg_clear(client, MT9M111_##reg, (val)) | 130 | #define reg_clear(reg, val) mt9m111_reg_clear(client, MT9M111_##reg, (val)) |
| 131 | #define reg_mask(reg, val, mask) mt9m111_reg_mask(client, MT9M111_##reg, \ | ||
| 132 | (val), (mask)) | ||
| 125 | 133 | ||
| 126 | #define MT9M111_MIN_DARK_ROWS 8 | 134 | #define MT9M111_MIN_DARK_ROWS 8 |
| 127 | #define MT9M111_MIN_DARK_COLS 26 | 135 | #define MT9M111_MIN_DARK_COLS 26 |
| @@ -153,7 +161,11 @@ static const struct mt9m111_datafmt mt9m111_colour_fmts[] = { | |||
| 153 | {V4L2_MBUS_FMT_UYVY8_2X8, V4L2_COLORSPACE_JPEG}, | 161 | {V4L2_MBUS_FMT_UYVY8_2X8, V4L2_COLORSPACE_JPEG}, |
| 154 | {V4L2_MBUS_FMT_VYUY8_2X8, V4L2_COLORSPACE_JPEG}, | 162 | {V4L2_MBUS_FMT_VYUY8_2X8, V4L2_COLORSPACE_JPEG}, |
| 155 | {V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB}, | 163 | {V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB}, |
| 164 | {V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE, V4L2_COLORSPACE_SRGB}, | ||
| 156 | {V4L2_MBUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB}, | 165 | {V4L2_MBUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB}, |
| 166 | {V4L2_MBUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB}, | ||
| 167 | {V4L2_MBUS_FMT_BGR565_2X8_LE, V4L2_COLORSPACE_SRGB}, | ||
| 168 | {V4L2_MBUS_FMT_BGR565_2X8_BE, V4L2_COLORSPACE_SRGB}, | ||
| 157 | {V4L2_MBUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB}, | 169 | {V4L2_MBUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB}, |
| 158 | {V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB}, | 170 | {V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB}, |
| 159 | }; | 171 | }; |
| @@ -169,6 +181,8 @@ struct mt9m111 { | |||
| 169 | * from v4l2-chip-ident.h */ | 181 | * from v4l2-chip-ident.h */ |
| 170 | enum mt9m111_context context; | 182 | enum mt9m111_context context; |
| 171 | struct v4l2_rect rect; | 183 | struct v4l2_rect rect; |
| 184 | struct mutex power_lock; /* lock to protect power_count */ | ||
| 185 | int power_count; | ||
| 172 | const struct mt9m111_datafmt *fmt; | 186 | const struct mt9m111_datafmt *fmt; |
| 173 | unsigned int gain; | 187 | unsigned int gain; |
| 174 | unsigned char autoexposure; | 188 | unsigned char autoexposure; |
| @@ -176,10 +190,6 @@ struct mt9m111 { | |||
| 176 | unsigned int powered:1; | 190 | unsigned int powered:1; |
| 177 | unsigned int hflip:1; | 191 | unsigned int hflip:1; |
| 178 | unsigned int vflip:1; | 192 | unsigned int vflip:1; |
| 179 | unsigned int swap_rgb_even_odd:1; | ||
| 180 | unsigned int swap_rgb_red_blue:1; | ||
| 181 | unsigned int swap_yuv_y_chromas:1; | ||
| 182 | unsigned int swap_yuv_cb_cr:1; | ||
| 183 | unsigned int autowhitebalance:1; | 193 | unsigned int autowhitebalance:1; |
| 184 | }; | 194 | }; |
| 185 | 195 | ||
| @@ -248,12 +258,26 @@ static int mt9m111_reg_clear(struct i2c_client *client, const u16 reg, | |||
| 248 | int ret; | 258 | int ret; |
| 249 | 259 | ||
| 250 | ret = mt9m111_reg_read(client, reg); | 260 | ret = mt9m111_reg_read(client, reg); |
| 251 | return mt9m111_reg_write(client, reg, ret & ~data); | 261 | if (ret >= 0) |
| 262 | ret = mt9m111_reg_write(client, reg, ret & ~data); | ||
| 263 | return ret; | ||
| 252 | } | 264 | } |
| 253 | 265 | ||
| 254 | static int mt9m111_set_context(struct i2c_client *client, | 266 | static int mt9m111_reg_mask(struct i2c_client *client, const u16 reg, |
| 267 | const u16 data, const u16 mask) | ||
| 268 | { | ||
| 269 | int ret; | ||
| 270 | |||
| 271 | ret = mt9m111_reg_read(client, reg); | ||
| 272 | if (ret >= 0) | ||
| 273 | ret = mt9m111_reg_write(client, reg, (ret & ~mask) | data); | ||
| 274 | return ret; | ||
| 275 | } | ||
| 276 | |||
| 277 | static int mt9m111_set_context(struct mt9m111 *mt9m111, | ||
| 255 | enum mt9m111_context ctxt) | 278 | enum mt9m111_context ctxt) |
| 256 | { | 279 | { |
| 280 | struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); | ||
| 257 | int valB = MT9M111_CTXT_CTRL_RESTART | MT9M111_CTXT_CTRL_DEFECTCOR_B | 281 | int valB = MT9M111_CTXT_CTRL_RESTART | MT9M111_CTXT_CTRL_DEFECTCOR_B |
| 258 | | MT9M111_CTXT_CTRL_RESIZE_B | MT9M111_CTXT_CTRL_CTRL2_B | 282 | | MT9M111_CTXT_CTRL_RESIZE_B | MT9M111_CTXT_CTRL_CTRL2_B |
| 259 | | MT9M111_CTXT_CTRL_GAMMA_B | MT9M111_CTXT_CTRL_READ_MODE_B | 283 | | MT9M111_CTXT_CTRL_GAMMA_B | MT9M111_CTXT_CTRL_READ_MODE_B |
| @@ -267,10 +291,10 @@ static int mt9m111_set_context(struct i2c_client *client, | |||
| 267 | return reg_write(CONTEXT_CONTROL, valA); | 291 | return reg_write(CONTEXT_CONTROL, valA); |
| 268 | } | 292 | } |
| 269 | 293 | ||
| 270 | static int mt9m111_setup_rect(struct i2c_client *client, | 294 | static int mt9m111_setup_rect(struct mt9m111 *mt9m111, |
| 271 | struct v4l2_rect *rect) | 295 | struct v4l2_rect *rect) |
| 272 | { | 296 | { |
| 273 | struct mt9m111 *mt9m111 = to_mt9m111(client); | 297 | struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); |
| 274 | int ret, is_raw_format; | 298 | int ret, is_raw_format; |
| 275 | int width = rect->width; | 299 | int width = rect->width; |
| 276 | int height = rect->height; | 300 | int height = rect->height; |
| @@ -312,81 +336,9 @@ static int mt9m111_setup_rect(struct i2c_client *client, | |||
| 312 | return ret; | 336 | return ret; |
| 313 | } | 337 | } |
| 314 | 338 | ||
| 315 | static int mt9m111_setup_pixfmt(struct i2c_client *client, u16 outfmt) | 339 | static int mt9m111_enable(struct mt9m111 *mt9m111) |
| 316 | { | 340 | { |
| 317 | int ret; | 341 | struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); |
| 318 | u16 mask = MT9M111_OUTFMT_PROCESSED_BAYER | MT9M111_OUTFMT_RGB | | ||
| 319 | MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_SWAP_RGB_EVEN | | ||
| 320 | MT9M111_OUTFMT_RGB565 | MT9M111_OUTFMT_RGB555 | | ||
| 321 | MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr | | ||
| 322 | MT9M111_OUTFMT_SWAP_YCbCr_C_Y; | ||
| 323 | |||
| 324 | ret = reg_read(OUTPUT_FORMAT_CTRL2_A); | ||
| 325 | if (ret >= 0) | ||
| 326 | ret = reg_write(OUTPUT_FORMAT_CTRL2_A, (ret & ~mask) | outfmt); | ||
| 327 | if (!ret) | ||
| 328 | ret = reg_read(OUTPUT_FORMAT_CTRL2_B); | ||
| 329 | if (ret >= 0) | ||
| 330 | ret = reg_write(OUTPUT_FORMAT_CTRL2_B, (ret & ~mask) | outfmt); | ||
| 331 | |||
| 332 | return ret; | ||
| 333 | } | ||
| 334 | |||
| 335 | static int mt9m111_setfmt_bayer8(struct i2c_client *client) | ||
| 336 | { | ||
| 337 | return mt9m111_setup_pixfmt(client, MT9M111_OUTFMT_PROCESSED_BAYER | | ||
| 338 | MT9M111_OUTFMT_RGB); | ||
| 339 | } | ||
| 340 | |||
| 341 | static int mt9m111_setfmt_bayer10(struct i2c_client *client) | ||
| 342 | { | ||
| 343 | return mt9m111_setup_pixfmt(client, MT9M111_OUTFMT_BYPASS_IFP); | ||
| 344 | } | ||
| 345 | |||
| 346 | static int mt9m111_setfmt_rgb565(struct i2c_client *client) | ||
| 347 | { | ||
| 348 | struct mt9m111 *mt9m111 = to_mt9m111(client); | ||
| 349 | int val = 0; | ||
| 350 | |||
| 351 | if (mt9m111->swap_rgb_red_blue) | ||
| 352 | val |= MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr; | ||
| 353 | if (mt9m111->swap_rgb_even_odd) | ||
| 354 | val |= MT9M111_OUTFMT_SWAP_RGB_EVEN; | ||
| 355 | val |= MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565; | ||
| 356 | |||
| 357 | return mt9m111_setup_pixfmt(client, val); | ||
| 358 | } | ||
| 359 | |||
| 360 | static int mt9m111_setfmt_rgb555(struct i2c_client *client) | ||
| 361 | { | ||
| 362 | struct mt9m111 *mt9m111 = to_mt9m111(client); | ||
| 363 | int val = 0; | ||
| 364 | |||
| 365 | if (mt9m111->swap_rgb_red_blue) | ||
| 366 | val |= MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr; | ||
| 367 | if (mt9m111->swap_rgb_even_odd) | ||
| 368 | val |= MT9M111_OUTFMT_SWAP_RGB_EVEN; | ||
| 369 | val |= MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555; | ||
| 370 | |||
| 371 | return mt9m111_setup_pixfmt(client, val); | ||
| 372 | } | ||
| 373 | |||
| 374 | static int mt9m111_setfmt_yuv(struct i2c_client *client) | ||
| 375 | { | ||
| 376 | struct mt9m111 *mt9m111 = to_mt9m111(client); | ||
| 377 | int val = 0; | ||
| 378 | |||
| 379 | if (mt9m111->swap_yuv_cb_cr) | ||
| 380 | val |= MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr; | ||
| 381 | if (mt9m111->swap_yuv_y_chromas) | ||
| 382 | val |= MT9M111_OUTFMT_SWAP_YCbCr_C_Y; | ||
| 383 | |||
| 384 | return mt9m111_setup_pixfmt(client, val); | ||
| 385 | } | ||
| 386 | |||
| 387 | static int mt9m111_enable(struct i2c_client *client) | ||
| 388 | { | ||
| 389 | struct mt9m111 *mt9m111 = to_mt9m111(client); | ||
| 390 | int ret; | 342 | int ret; |
| 391 | 343 | ||
| 392 | ret = reg_set(RESET, MT9M111_RESET_CHIP_ENABLE); | 344 | ret = reg_set(RESET, MT9M111_RESET_CHIP_ENABLE); |
| @@ -395,8 +347,9 @@ static int mt9m111_enable(struct i2c_client *client) | |||
| 395 | return ret; | 347 | return ret; |
| 396 | } | 348 | } |
| 397 | 349 | ||
| 398 | static int mt9m111_reset(struct i2c_client *client) | 350 | static int mt9m111_reset(struct mt9m111 *mt9m111) |
| 399 | { | 351 | { |
| 352 | struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); | ||
| 400 | int ret; | 353 | int ret; |
| 401 | 354 | ||
| 402 | ret = reg_set(RESET, MT9M111_RESET_RESET_MODE); | 355 | ret = reg_set(RESET, MT9M111_RESET_RESET_MODE); |
| @@ -424,11 +377,9 @@ static int mt9m111_set_bus_param(struct soc_camera_device *icd, unsigned long f) | |||
| 424 | return 0; | 377 | return 0; |
| 425 | } | 378 | } |
| 426 | 379 | ||
| 427 | static int mt9m111_make_rect(struct i2c_client *client, | 380 | static int mt9m111_make_rect(struct mt9m111 *mt9m111, |
| 428 | struct v4l2_rect *rect) | 381 | struct v4l2_rect *rect) |
| 429 | { | 382 | { |
| 430 | struct mt9m111 *mt9m111 = to_mt9m111(client); | ||
| 431 | |||
| 432 | if (mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8 || | 383 | if (mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8 || |
| 433 | mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE) { | 384 | mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE) { |
| 434 | /* Bayer format - even size lengths */ | 385 | /* Bayer format - even size lengths */ |
| @@ -444,14 +395,14 @@ static int mt9m111_make_rect(struct i2c_client *client, | |||
| 444 | soc_camera_limit_side(&rect->top, &rect->height, | 395 | soc_camera_limit_side(&rect->top, &rect->height, |
| 445 | MT9M111_MIN_DARK_ROWS, 2, MT9M111_MAX_HEIGHT); | 396 | MT9M111_MIN_DARK_ROWS, 2, MT9M111_MAX_HEIGHT); |
| 446 | 397 | ||
| 447 | return mt9m111_setup_rect(client, rect); | 398 | return mt9m111_setup_rect(mt9m111, rect); |
| 448 | } | 399 | } |
| 449 | 400 | ||
| 450 | static int mt9m111_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a) | 401 | static int mt9m111_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a) |
| 451 | { | 402 | { |
| 452 | struct v4l2_rect rect = a->c; | 403 | struct v4l2_rect rect = a->c; |
| 453 | struct i2c_client *client = v4l2_get_subdevdata(sd); | 404 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
| 454 | struct mt9m111 *mt9m111 = to_mt9m111(client); | 405 | struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev); |
| 455 | int ret; | 406 | int ret; |
| 456 | 407 | ||
| 457 | dev_dbg(&client->dev, "%s left=%d, top=%d, width=%d, height=%d\n", | 408 | dev_dbg(&client->dev, "%s left=%d, top=%d, width=%d, height=%d\n", |
| @@ -460,7 +411,7 @@ static int mt9m111_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a) | |||
| 460 | if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | 411 | if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) |
| 461 | return -EINVAL; | 412 | return -EINVAL; |
| 462 | 413 | ||
| 463 | ret = mt9m111_make_rect(client, &rect); | 414 | ret = mt9m111_make_rect(mt9m111, &rect); |
| 464 | if (!ret) | 415 | if (!ret) |
| 465 | mt9m111->rect = rect; | 416 | mt9m111->rect = rect; |
| 466 | return ret; | 417 | return ret; |
| @@ -468,8 +419,7 @@ static int mt9m111_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a) | |||
| 468 | 419 | ||
| 469 | static int mt9m111_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a) | 420 | static int mt9m111_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a) |
| 470 | { | 421 | { |
| 471 | struct i2c_client *client = v4l2_get_subdevdata(sd); | 422 | struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev); |
| 472 | struct mt9m111 *mt9m111 = to_mt9m111(client); | ||
| 473 | 423 | ||
| 474 | a->c = mt9m111->rect; | 424 | a->c = mt9m111->rect; |
| 475 | a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | 425 | a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; |
| @@ -496,8 +446,7 @@ static int mt9m111_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a) | |||
| 496 | static int mt9m111_g_fmt(struct v4l2_subdev *sd, | 446 | static int mt9m111_g_fmt(struct v4l2_subdev *sd, |
| 497 | struct v4l2_mbus_framefmt *mf) | 447 | struct v4l2_mbus_framefmt *mf) |
| 498 | { | 448 | { |
| 499 | struct i2c_client *client = v4l2_get_subdevdata(sd); | 449 | struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev); |
| 500 | struct mt9m111 *mt9m111 = to_mt9m111(client); | ||
| 501 | 450 | ||
| 502 | mf->width = mt9m111->rect.width; | 451 | mf->width = mt9m111->rect.width; |
| 503 | mf->height = mt9m111->rect.height; | 452 | mf->height = mt9m111->rect.height; |
| @@ -508,51 +457,73 @@ static int mt9m111_g_fmt(struct v4l2_subdev *sd, | |||
| 508 | return 0; | 457 | return 0; |
| 509 | } | 458 | } |
| 510 | 459 | ||
| 511 | static int mt9m111_set_pixfmt(struct i2c_client *client, | 460 | static int mt9m111_set_pixfmt(struct mt9m111 *mt9m111, |
| 512 | enum v4l2_mbus_pixelcode code) | 461 | enum v4l2_mbus_pixelcode code) |
| 513 | { | 462 | { |
| 514 | struct mt9m111 *mt9m111 = to_mt9m111(client); | 463 | struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); |
| 464 | u16 data_outfmt2, mask_outfmt2 = MT9M111_OUTFMT_PROCESSED_BAYER | | ||
| 465 | MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_RGB | | ||
| 466 | MT9M111_OUTFMT_RGB565 | MT9M111_OUTFMT_RGB555 | | ||
| 467 | MT9M111_OUTFMT_RGB444x | MT9M111_OUTFMT_RGBx444 | | ||
| 468 | MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN | | ||
| 469 | MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B; | ||
| 515 | int ret; | 470 | int ret; |
| 516 | 471 | ||
| 517 | switch (code) { | 472 | switch (code) { |
| 518 | case V4L2_MBUS_FMT_SBGGR8_1X8: | 473 | case V4L2_MBUS_FMT_SBGGR8_1X8: |
| 519 | ret = mt9m111_setfmt_bayer8(client); | 474 | data_outfmt2 = MT9M111_OUTFMT_PROCESSED_BAYER | |
| 475 | MT9M111_OUTFMT_RGB; | ||
| 520 | break; | 476 | break; |
| 521 | case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE: | 477 | case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE: |
| 522 | ret = mt9m111_setfmt_bayer10(client); | 478 | data_outfmt2 = MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_RGB; |
| 523 | break; | 479 | break; |
| 524 | case V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE: | 480 | case V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE: |
| 525 | ret = mt9m111_setfmt_rgb555(client); | 481 | data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555 | |
| 482 | MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN; | ||
| 483 | break; | ||
| 484 | case V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE: | ||
| 485 | data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555; | ||
| 526 | break; | 486 | break; |
| 527 | case V4L2_MBUS_FMT_RGB565_2X8_LE: | 487 | case V4L2_MBUS_FMT_RGB565_2X8_LE: |
| 528 | ret = mt9m111_setfmt_rgb565(client); | 488 | data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 | |
| 489 | MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN; | ||
| 490 | break; | ||
| 491 | case V4L2_MBUS_FMT_RGB565_2X8_BE: | ||
| 492 | data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565; | ||
| 493 | break; | ||
| 494 | case V4L2_MBUS_FMT_BGR565_2X8_BE: | ||
| 495 | data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 | | ||
| 496 | MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B; | ||
| 497 | break; | ||
| 498 | case V4L2_MBUS_FMT_BGR565_2X8_LE: | ||
| 499 | data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 | | ||
| 500 | MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN | | ||
| 501 | MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B; | ||
| 529 | break; | 502 | break; |
| 530 | case V4L2_MBUS_FMT_UYVY8_2X8: | 503 | case V4L2_MBUS_FMT_UYVY8_2X8: |
| 531 | mt9m111->swap_yuv_y_chromas = 0; | 504 | data_outfmt2 = 0; |
| 532 | mt9m111->swap_yuv_cb_cr = 0; | ||
| 533 | ret = mt9m111_setfmt_yuv(client); | ||
| 534 | break; | 505 | break; |
| 535 | case V4L2_MBUS_FMT_VYUY8_2X8: | 506 | case V4L2_MBUS_FMT_VYUY8_2X8: |
| 536 | mt9m111->swap_yuv_y_chromas = 0; | 507 | data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B; |
| 537 | mt9m111->swap_yuv_cb_cr = 1; | ||
| 538 | ret = mt9m111_setfmt_yuv(client); | ||
| 539 | break; | 508 | break; |
| 540 | case V4L2_MBUS_FMT_YUYV8_2X8: | 509 | case V4L2_MBUS_FMT_YUYV8_2X8: |
| 541 | mt9m111->swap_yuv_y_chromas = 1; | 510 | data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN; |
| 542 | mt9m111->swap_yuv_cb_cr = 0; | ||
| 543 | ret = mt9m111_setfmt_yuv(client); | ||
| 544 | break; | 511 | break; |
| 545 | case V4L2_MBUS_FMT_YVYU8_2X8: | 512 | case V4L2_MBUS_FMT_YVYU8_2X8: |
| 546 | mt9m111->swap_yuv_y_chromas = 1; | 513 | data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN | |
| 547 | mt9m111->swap_yuv_cb_cr = 1; | 514 | MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B; |
| 548 | ret = mt9m111_setfmt_yuv(client); | ||
| 549 | break; | 515 | break; |
| 550 | default: | 516 | default: |
| 551 | dev_err(&client->dev, "Pixel format not handled : %x\n", | 517 | dev_err(&client->dev, "Pixel format not handled: %x\n", code); |
| 552 | code); | 518 | return -EINVAL; |
| 553 | ret = -EINVAL; | ||
| 554 | } | 519 | } |
| 555 | 520 | ||
| 521 | ret = reg_mask(OUTPUT_FORMAT_CTRL2_A, data_outfmt2, | ||
| 522 | mask_outfmt2); | ||
| 523 | if (!ret) | ||
| 524 | ret = reg_mask(OUTPUT_FORMAT_CTRL2_B, data_outfmt2, | ||
| 525 | mask_outfmt2); | ||
| 526 | |||
| 556 | return ret; | 527 | return ret; |
| 557 | } | 528 | } |
| 558 | 529 | ||
| @@ -561,7 +532,7 @@ static int mt9m111_s_fmt(struct v4l2_subdev *sd, | |||
| 561 | { | 532 | { |
| 562 | struct i2c_client *client = v4l2_get_subdevdata(sd); | 533 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
| 563 | const struct mt9m111_datafmt *fmt; | 534 | const struct mt9m111_datafmt *fmt; |
| 564 | struct mt9m111 *mt9m111 = to_mt9m111(client); | 535 | struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev); |
| 565 | struct v4l2_rect rect = { | 536 | struct v4l2_rect rect = { |
| 566 | .left = mt9m111->rect.left, | 537 | .left = mt9m111->rect.left, |
| 567 | .top = mt9m111->rect.top, | 538 | .top = mt9m111->rect.top, |
| @@ -579,9 +550,9 @@ static int mt9m111_s_fmt(struct v4l2_subdev *sd, | |||
| 579 | "%s code=%x left=%d, top=%d, width=%d, height=%d\n", __func__, | 550 | "%s code=%x left=%d, top=%d, width=%d, height=%d\n", __func__, |
| 580 | mf->code, rect.left, rect.top, rect.width, rect.height); | 551 | mf->code, rect.left, rect.top, rect.width, rect.height); |
| 581 | 552 | ||
| 582 | ret = mt9m111_make_rect(client, &rect); | 553 | ret = mt9m111_make_rect(mt9m111, &rect); |
| 583 | if (!ret) | 554 | if (!ret) |
| 584 | ret = mt9m111_set_pixfmt(client, mf->code); | 555 | ret = mt9m111_set_pixfmt(mt9m111, mf->code); |
| 585 | if (!ret) { | 556 | if (!ret) { |
| 586 | mt9m111->rect = rect; | 557 | mt9m111->rect = rect; |
| 587 | mt9m111->fmt = fmt; | 558 | mt9m111->fmt = fmt; |
| @@ -594,8 +565,7 @@ static int mt9m111_s_fmt(struct v4l2_subdev *sd, | |||
| 594 | static int mt9m111_try_fmt(struct v4l2_subdev *sd, | 565 | static int mt9m111_try_fmt(struct v4l2_subdev *sd, |
| 595 | struct v4l2_mbus_framefmt *mf) | 566 | struct v4l2_mbus_framefmt *mf) |
| 596 | { | 567 | { |
| 597 | struct i2c_client *client = v4l2_get_subdevdata(sd); | 568 | struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev); |
| 598 | struct mt9m111 *mt9m111 = to_mt9m111(client); | ||
| 599 | const struct mt9m111_datafmt *fmt; | 569 | const struct mt9m111_datafmt *fmt; |
| 600 | bool bayer = mf->code == V4L2_MBUS_FMT_SBGGR8_1X8 || | 570 | bool bayer = mf->code == V4L2_MBUS_FMT_SBGGR8_1X8 || |
| 601 | mf->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE; | 571 | mf->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE; |
| @@ -635,7 +605,7 @@ static int mt9m111_g_chip_ident(struct v4l2_subdev *sd, | |||
| 635 | struct v4l2_dbg_chip_ident *id) | 605 | struct v4l2_dbg_chip_ident *id) |
| 636 | { | 606 | { |
| 637 | struct i2c_client *client = v4l2_get_subdevdata(sd); | 607 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
| 638 | struct mt9m111 *mt9m111 = to_mt9m111(client); | 608 | struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev); |
| 639 | 609 | ||
| 640 | if (id->match.type != V4L2_CHIP_MATCH_I2C_ADDR) | 610 | if (id->match.type != V4L2_CHIP_MATCH_I2C_ADDR) |
| 641 | return -EINVAL; | 611 | return -EINVAL; |
| @@ -726,21 +696,16 @@ static const struct v4l2_queryctrl mt9m111_controls[] = { | |||
| 726 | } | 696 | } |
| 727 | }; | 697 | }; |
| 728 | 698 | ||
| 729 | static int mt9m111_resume(struct soc_camera_device *icd); | ||
| 730 | static int mt9m111_suspend(struct soc_camera_device *icd, pm_message_t state); | ||
| 731 | |||
| 732 | static struct soc_camera_ops mt9m111_ops = { | 699 | static struct soc_camera_ops mt9m111_ops = { |
| 733 | .suspend = mt9m111_suspend, | ||
| 734 | .resume = mt9m111_resume, | ||
| 735 | .query_bus_param = mt9m111_query_bus_param, | 700 | .query_bus_param = mt9m111_query_bus_param, |
| 736 | .set_bus_param = mt9m111_set_bus_param, | 701 | .set_bus_param = mt9m111_set_bus_param, |
| 737 | .controls = mt9m111_controls, | 702 | .controls = mt9m111_controls, |
| 738 | .num_controls = ARRAY_SIZE(mt9m111_controls), | 703 | .num_controls = ARRAY_SIZE(mt9m111_controls), |
| 739 | }; | 704 | }; |
| 740 | 705 | ||
| 741 | static int mt9m111_set_flip(struct i2c_client *client, int flip, int mask) | 706 | static int mt9m111_set_flip(struct mt9m111 *mt9m111, int flip, int mask) |
| 742 | { | 707 | { |
| 743 | struct mt9m111 *mt9m111 = to_mt9m111(client); | 708 | struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); |
| 744 | int ret; | 709 | int ret; |
| 745 | 710 | ||
| 746 | if (mt9m111->context == HIGHPOWER) { | 711 | if (mt9m111->context == HIGHPOWER) { |
| @@ -758,8 +723,9 @@ static int mt9m111_set_flip(struct i2c_client *client, int flip, int mask) | |||
| 758 | return ret; | 723 | return ret; |
| 759 | } | 724 | } |
| 760 | 725 | ||
| 761 | static int mt9m111_get_global_gain(struct i2c_client *client) | 726 | static int mt9m111_get_global_gain(struct mt9m111 *mt9m111) |
| 762 | { | 727 | { |
| 728 | struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); | ||
| 763 | int data; | 729 | int data; |
| 764 | 730 | ||
| 765 | data = reg_read(GLOBAL_GAIN); | 731 | data = reg_read(GLOBAL_GAIN); |
| @@ -769,9 +735,9 @@ static int mt9m111_get_global_gain(struct i2c_client *client) | |||
| 769 | return data; | 735 | return data; |
| 770 | } | 736 | } |
| 771 | 737 | ||
| 772 | static int mt9m111_set_global_gain(struct i2c_client *client, int gain) | 738 | static int mt9m111_set_global_gain(struct mt9m111 *mt9m111, int gain) |
| 773 | { | 739 | { |
| 774 | struct mt9m111 *mt9m111 = to_mt9m111(client); | 740 | struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); |
| 775 | u16 val; | 741 | u16 val; |
| 776 | 742 | ||
| 777 | if (gain > 63 * 2 * 2) | 743 | if (gain > 63 * 2 * 2) |
| @@ -788,9 +754,9 @@ static int mt9m111_set_global_gain(struct i2c_client *client, int gain) | |||
| 788 | return reg_write(GLOBAL_GAIN, val); | 754 | return reg_write(GLOBAL_GAIN, val); |
| 789 | } | 755 | } |
| 790 | 756 | ||
| 791 | static int mt9m111_set_autoexposure(struct i2c_client *client, int on) | 757 | static int mt9m111_set_autoexposure(struct mt9m111 *mt9m111, int on) |
| 792 | { | 758 | { |
| 793 | struct mt9m111 *mt9m111 = to_mt9m111(client); | 759 | struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); |
| 794 | int ret; | 760 | int ret; |
| 795 | 761 | ||
| 796 | if (on) | 762 | if (on) |
| @@ -804,9 +770,9 @@ static int mt9m111_set_autoexposure(struct i2c_client *client, int on) | |||
| 804 | return ret; | 770 | return ret; |
| 805 | } | 771 | } |
| 806 | 772 | ||
| 807 | static int mt9m111_set_autowhitebalance(struct i2c_client *client, int on) | 773 | static int mt9m111_set_autowhitebalance(struct mt9m111 *mt9m111, int on) |
| 808 | { | 774 | { |
| 809 | struct mt9m111 *mt9m111 = to_mt9m111(client); | 775 | struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); |
| 810 | int ret; | 776 | int ret; |
| 811 | 777 | ||
| 812 | if (on) | 778 | if (on) |
| @@ -823,7 +789,7 @@ static int mt9m111_set_autowhitebalance(struct i2c_client *client, int on) | |||
| 823 | static int mt9m111_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) | 789 | static int mt9m111_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) |
| 824 | { | 790 | { |
| 825 | struct i2c_client *client = v4l2_get_subdevdata(sd); | 791 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
| 826 | struct mt9m111 *mt9m111 = to_mt9m111(client); | 792 | struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev); |
| 827 | int data; | 793 | int data; |
| 828 | 794 | ||
| 829 | switch (ctrl->id) { | 795 | switch (ctrl->id) { |
| @@ -848,7 +814,7 @@ static int mt9m111_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) | |||
| 848 | ctrl->value = !!(data & MT9M111_RMB_MIRROR_COLS); | 814 | ctrl->value = !!(data & MT9M111_RMB_MIRROR_COLS); |
| 849 | break; | 815 | break; |
| 850 | case V4L2_CID_GAIN: | 816 | case V4L2_CID_GAIN: |
| 851 | data = mt9m111_get_global_gain(client); | 817 | data = mt9m111_get_global_gain(mt9m111); |
| 852 | if (data < 0) | 818 | if (data < 0) |
| 853 | return data; | 819 | return data; |
| 854 | ctrl->value = data; | 820 | ctrl->value = data; |
| @@ -865,8 +831,7 @@ static int mt9m111_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) | |||
| 865 | 831 | ||
| 866 | static int mt9m111_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) | 832 | static int mt9m111_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) |
| 867 | { | 833 | { |
| 868 | struct i2c_client *client = v4l2_get_subdevdata(sd); | 834 | struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev); |
| 869 | struct mt9m111 *mt9m111 = to_mt9m111(client); | ||
| 870 | const struct v4l2_queryctrl *qctrl; | 835 | const struct v4l2_queryctrl *qctrl; |
| 871 | int ret; | 836 | int ret; |
| 872 | 837 | ||
| @@ -877,22 +842,22 @@ static int mt9m111_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) | |||
| 877 | switch (ctrl->id) { | 842 | switch (ctrl->id) { |
| 878 | case V4L2_CID_VFLIP: | 843 | case V4L2_CID_VFLIP: |
| 879 | mt9m111->vflip = ctrl->value; | 844 | mt9m111->vflip = ctrl->value; |
| 880 | ret = mt9m111_set_flip(client, ctrl->value, | 845 | ret = mt9m111_set_flip(mt9m111, ctrl->value, |
| 881 | MT9M111_RMB_MIRROR_ROWS); | 846 | MT9M111_RMB_MIRROR_ROWS); |
| 882 | break; | 847 | break; |
| 883 | case V4L2_CID_HFLIP: | 848 | case V4L2_CID_HFLIP: |
| 884 | mt9m111->hflip = ctrl->value; | 849 | mt9m111->hflip = ctrl->value; |
| 885 | ret = mt9m111_set_flip(client, ctrl->value, | 850 | ret = mt9m111_set_flip(mt9m111, ctrl->value, |
| 886 | MT9M111_RMB_MIRROR_COLS); | 851 | MT9M111_RMB_MIRROR_COLS); |
| 887 | break; | 852 | break; |
| 888 | case V4L2_CID_GAIN: | 853 | case V4L2_CID_GAIN: |
| 889 | ret = mt9m111_set_global_gain(client, ctrl->value); | 854 | ret = mt9m111_set_global_gain(mt9m111, ctrl->value); |
| 890 | break; | 855 | break; |
| 891 | case V4L2_CID_EXPOSURE_AUTO: | 856 | case V4L2_CID_EXPOSURE_AUTO: |
| 892 | ret = mt9m111_set_autoexposure(client, ctrl->value); | 857 | ret = mt9m111_set_autoexposure(mt9m111, ctrl->value); |
| 893 | break; | 858 | break; |
| 894 | case V4L2_CID_AUTO_WHITE_BALANCE: | 859 | case V4L2_CID_AUTO_WHITE_BALANCE: |
| 895 | ret = mt9m111_set_autowhitebalance(client, ctrl->value); | 860 | ret = mt9m111_set_autowhitebalance(mt9m111, ctrl->value); |
| 896 | break; | 861 | break; |
| 897 | default: | 862 | default: |
| 898 | ret = -EINVAL; | 863 | ret = -EINVAL; |
| @@ -901,60 +866,52 @@ static int mt9m111_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) | |||
| 901 | return ret; | 866 | return ret; |
| 902 | } | 867 | } |
| 903 | 868 | ||
| 904 | static int mt9m111_suspend(struct soc_camera_device *icd, pm_message_t state) | 869 | static int mt9m111_suspend(struct mt9m111 *mt9m111) |
| 905 | { | 870 | { |
| 906 | struct i2c_client *client = to_i2c_client(to_soc_camera_control(icd)); | 871 | mt9m111->gain = mt9m111_get_global_gain(mt9m111); |
| 907 | struct mt9m111 *mt9m111 = to_mt9m111(client); | ||
| 908 | |||
| 909 | mt9m111->gain = mt9m111_get_global_gain(client); | ||
| 910 | 872 | ||
| 911 | return 0; | 873 | return 0; |
| 912 | } | 874 | } |
| 913 | 875 | ||
| 914 | static int mt9m111_restore_state(struct i2c_client *client) | 876 | static void mt9m111_restore_state(struct mt9m111 *mt9m111) |
| 915 | { | 877 | { |
| 916 | struct mt9m111 *mt9m111 = to_mt9m111(client); | 878 | mt9m111_set_context(mt9m111, mt9m111->context); |
| 917 | 879 | mt9m111_set_pixfmt(mt9m111, mt9m111->fmt->code); | |
| 918 | mt9m111_set_context(client, mt9m111->context); | 880 | mt9m111_setup_rect(mt9m111, &mt9m111->rect); |
| 919 | mt9m111_set_pixfmt(client, mt9m111->fmt->code); | 881 | mt9m111_set_flip(mt9m111, mt9m111->hflip, MT9M111_RMB_MIRROR_COLS); |
| 920 | mt9m111_setup_rect(client, &mt9m111->rect); | 882 | mt9m111_set_flip(mt9m111, mt9m111->vflip, MT9M111_RMB_MIRROR_ROWS); |
| 921 | mt9m111_set_flip(client, mt9m111->hflip, MT9M111_RMB_MIRROR_COLS); | 883 | mt9m111_set_global_gain(mt9m111, mt9m111->gain); |
| 922 | mt9m111_set_flip(client, mt9m111->vflip, MT9M111_RMB_MIRROR_ROWS); | 884 | mt9m111_set_autoexposure(mt9m111, mt9m111->autoexposure); |
| 923 | mt9m111_set_global_gain(client, mt9m111->gain); | 885 | mt9m111_set_autowhitebalance(mt9m111, mt9m111->autowhitebalance); |
| 924 | mt9m111_set_autoexposure(client, mt9m111->autoexposure); | ||
| 925 | mt9m111_set_autowhitebalance(client, mt9m111->autowhitebalance); | ||
| 926 | return 0; | ||
| 927 | } | 886 | } |
| 928 | 887 | ||
| 929 | static int mt9m111_resume(struct soc_camera_device *icd) | 888 | static int mt9m111_resume(struct mt9m111 *mt9m111) |
| 930 | { | 889 | { |
| 931 | struct i2c_client *client = to_i2c_client(to_soc_camera_control(icd)); | ||
| 932 | struct mt9m111 *mt9m111 = to_mt9m111(client); | ||
| 933 | int ret = 0; | 890 | int ret = 0; |
| 934 | 891 | ||
| 935 | if (mt9m111->powered) { | 892 | if (mt9m111->powered) { |
| 936 | ret = mt9m111_enable(client); | 893 | ret = mt9m111_enable(mt9m111); |
| 937 | if (!ret) | 894 | if (!ret) |
| 938 | ret = mt9m111_reset(client); | 895 | ret = mt9m111_reset(mt9m111); |
| 939 | if (!ret) | 896 | if (!ret) |
| 940 | ret = mt9m111_restore_state(client); | 897 | mt9m111_restore_state(mt9m111); |
| 941 | } | 898 | } |
| 942 | return ret; | 899 | return ret; |
| 943 | } | 900 | } |
| 944 | 901 | ||
| 945 | static int mt9m111_init(struct i2c_client *client) | 902 | static int mt9m111_init(struct mt9m111 *mt9m111) |
| 946 | { | 903 | { |
| 947 | struct mt9m111 *mt9m111 = to_mt9m111(client); | 904 | struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev); |
| 948 | int ret; | 905 | int ret; |
| 949 | 906 | ||
| 950 | mt9m111->context = HIGHPOWER; | 907 | mt9m111->context = HIGHPOWER; |
| 951 | ret = mt9m111_enable(client); | 908 | ret = mt9m111_enable(mt9m111); |
| 952 | if (!ret) | 909 | if (!ret) |
| 953 | ret = mt9m111_reset(client); | 910 | ret = mt9m111_reset(mt9m111); |
| 954 | if (!ret) | 911 | if (!ret) |
| 955 | ret = mt9m111_set_context(client, mt9m111->context); | 912 | ret = mt9m111_set_context(mt9m111, mt9m111->context); |
| 956 | if (!ret) | 913 | if (!ret) |
| 957 | ret = mt9m111_set_autoexposure(client, mt9m111->autoexposure); | 914 | ret = mt9m111_set_autoexposure(mt9m111, mt9m111->autoexposure); |
| 958 | if (ret) | 915 | if (ret) |
| 959 | dev_err(&client->dev, "mt9m111 init failed: %d\n", ret); | 916 | dev_err(&client->dev, "mt9m111 init failed: %d\n", ret); |
| 960 | return ret; | 917 | return ret; |
| @@ -971,20 +928,13 @@ static int mt9m111_video_probe(struct soc_camera_device *icd, | |||
| 971 | s32 data; | 928 | s32 data; |
| 972 | int ret; | 929 | int ret; |
| 973 | 930 | ||
| 974 | /* | 931 | /* We must have a parent by now. And it cannot be a wrong one. */ |
| 975 | * We must have a parent by now. And it cannot be a wrong one. | 932 | BUG_ON(!icd->parent || |
| 976 | * So this entire test is completely redundant. | 933 | to_soc_camera_host(icd->parent)->nr != icd->iface); |
| 977 | */ | ||
| 978 | if (!icd->dev.parent || | ||
| 979 | to_soc_camera_host(icd->dev.parent)->nr != icd->iface) | ||
| 980 | return -ENODEV; | ||
| 981 | 934 | ||
| 982 | mt9m111->autoexposure = 1; | 935 | mt9m111->autoexposure = 1; |
| 983 | mt9m111->autowhitebalance = 1; | 936 | mt9m111->autowhitebalance = 1; |
| 984 | 937 | ||
| 985 | mt9m111->swap_rgb_even_odd = 1; | ||
| 986 | mt9m111->swap_rgb_red_blue = 1; | ||
| 987 | |||
| 988 | data = reg_read(CHIP_VERSION); | 938 | data = reg_read(CHIP_VERSION); |
| 989 | 939 | ||
| 990 | switch (data) { | 940 | switch (data) { |
| @@ -1005,16 +955,51 @@ static int mt9m111_video_probe(struct soc_camera_device *icd, | |||
| 1005 | goto ei2c; | 955 | goto ei2c; |
| 1006 | } | 956 | } |
| 1007 | 957 | ||
| 1008 | ret = mt9m111_init(client); | 958 | ret = mt9m111_init(mt9m111); |
| 1009 | 959 | ||
| 1010 | ei2c: | 960 | ei2c: |
| 1011 | return ret; | 961 | return ret; |
| 1012 | } | 962 | } |
| 1013 | 963 | ||
| 964 | static int mt9m111_s_power(struct v4l2_subdev *sd, int on) | ||
| 965 | { | ||
| 966 | struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev); | ||
| 967 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 968 | int ret = 0; | ||
| 969 | |||
| 970 | mutex_lock(&mt9m111->power_lock); | ||
| 971 | |||
| 972 | /* | ||
| 973 | * If the power count is modified from 0 to != 0 or from != 0 to 0, | ||
| 974 | * update the power state. | ||
| 975 | */ | ||
| 976 | if (mt9m111->power_count == !on) { | ||
| 977 | if (on) { | ||
| 978 | ret = mt9m111_resume(mt9m111); | ||
| 979 | if (ret) { | ||
| 980 | dev_err(&client->dev, | ||
| 981 | "Failed to resume the sensor: %d\n", ret); | ||
| 982 | goto out; | ||
| 983 | } | ||
| 984 | } else { | ||
| 985 | mt9m111_suspend(mt9m111); | ||
| 986 | } | ||
| 987 | } | ||
| 988 | |||
| 989 | /* Update the power count. */ | ||
| 990 | mt9m111->power_count += on ? 1 : -1; | ||
| 991 | WARN_ON(mt9m111->power_count < 0); | ||
| 992 | |||
| 993 | out: | ||
| 994 | mutex_unlock(&mt9m111->power_lock); | ||
| 995 | return ret; | ||
| 996 | } | ||
| 997 | |||
| 1014 | static struct v4l2_subdev_core_ops mt9m111_subdev_core_ops = { | 998 | static struct v4l2_subdev_core_ops mt9m111_subdev_core_ops = { |
| 1015 | .g_ctrl = mt9m111_g_ctrl, | 999 | .g_ctrl = mt9m111_g_ctrl, |
| 1016 | .s_ctrl = mt9m111_s_ctrl, | 1000 | .s_ctrl = mt9m111_s_ctrl, |
| 1017 | .g_chip_ident = mt9m111_g_chip_ident, | 1001 | .g_chip_ident = mt9m111_g_chip_ident, |
| 1002 | .s_power = mt9m111_s_power, | ||
| 1018 | #ifdef CONFIG_VIDEO_ADV_DEBUG | 1003 | #ifdef CONFIG_VIDEO_ADV_DEBUG |
| 1019 | .g_register = mt9m111_g_register, | 1004 | .g_register = mt9m111_g_register, |
| 1020 | .s_register = mt9m111_s_register, | 1005 | .s_register = mt9m111_s_register, |
diff --git a/drivers/media/video/mt9t031.c b/drivers/media/video/mt9t031.c index 7ce279c3751d..30547cc3f89b 100644 --- a/drivers/media/video/mt9t031.c +++ b/drivers/media/video/mt9t031.c | |||
| @@ -700,8 +700,7 @@ static int mt9t031_runtime_suspend(struct device *dev) | |||
| 700 | static int mt9t031_runtime_resume(struct device *dev) | 700 | static int mt9t031_runtime_resume(struct device *dev) |
| 701 | { | 701 | { |
| 702 | struct video_device *vdev = to_video_device(dev); | 702 | struct video_device *vdev = to_video_device(dev); |
| 703 | struct soc_camera_device *icd = container_of(vdev->parent, | 703 | struct soc_camera_device *icd = dev_get_drvdata(vdev->parent); |
| 704 | struct soc_camera_device, dev); | ||
| 705 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | 704 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); |
| 706 | struct i2c_client *client = v4l2_get_subdevdata(sd); | 705 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
| 707 | struct mt9t031 *mt9t031 = to_mt9t031(client); | 706 | struct mt9t031 *mt9t031 = to_mt9t031(client); |
diff --git a/drivers/media/video/mt9t112.c b/drivers/media/video/mt9t112.c index bffa9ee10968..d2e0a50063a2 100644 --- a/drivers/media/video/mt9t112.c +++ b/drivers/media/video/mt9t112.c | |||
| @@ -1057,13 +1057,9 @@ static int mt9t112_camera_probe(struct soc_camera_device *icd, | |||
| 1057 | const char *devname; | 1057 | const char *devname; |
| 1058 | int chipid; | 1058 | int chipid; |
| 1059 | 1059 | ||
| 1060 | /* | 1060 | /* We must have a parent by now. And it cannot be a wrong one. */ |
| 1061 | * We must have a parent by now. And it cannot be a wrong one. | 1061 | BUG_ON(!icd->parent || |
| 1062 | * So this entire test is completely redundant. | 1062 | to_soc_camera_host(icd->parent)->nr != icd->iface); |
| 1063 | */ | ||
| 1064 | if (!icd->dev.parent || | ||
| 1065 | to_soc_camera_host(icd->dev.parent)->nr != icd->iface) | ||
| 1066 | return -ENODEV; | ||
| 1067 | 1063 | ||
| 1068 | /* | 1064 | /* |
| 1069 | * check and show chip ID | 1065 | * check and show chip ID |
diff --git a/drivers/media/video/mt9v011.c b/drivers/media/video/mt9v011.c index 4904d25f689f..893a8b8f5141 100644 --- a/drivers/media/video/mt9v011.c +++ b/drivers/media/video/mt9v011.c | |||
| @@ -54,11 +54,20 @@ static struct v4l2_queryctrl mt9v011_qctrl[] = { | |||
| 54 | .type = V4L2_CTRL_TYPE_INTEGER, | 54 | .type = V4L2_CTRL_TYPE_INTEGER, |
| 55 | .name = "Gain", | 55 | .name = "Gain", |
| 56 | .minimum = 0, | 56 | .minimum = 0, |
| 57 | .maximum = (1 << 10) - 1, | 57 | .maximum = (1 << 12) - 1 - 0x0020, |
| 58 | .step = 1, | 58 | .step = 1, |
| 59 | .default_value = 0x0020, | 59 | .default_value = 0x0020, |
| 60 | .flags = 0, | 60 | .flags = 0, |
| 61 | }, { | 61 | }, { |
| 62 | .id = V4L2_CID_EXPOSURE, | ||
| 63 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 64 | .name = "Exposure", | ||
| 65 | .minimum = 0, | ||
| 66 | .maximum = 2047, | ||
| 67 | .step = 1, | ||
| 68 | .default_value = 0x01fc, | ||
| 69 | .flags = 0, | ||
| 70 | }, { | ||
| 62 | .id = V4L2_CID_RED_BALANCE, | 71 | .id = V4L2_CID_RED_BALANCE, |
| 63 | .type = V4L2_CTRL_TYPE_INTEGER, | 72 | .type = V4L2_CTRL_TYPE_INTEGER, |
| 64 | .name = "Red Balance", | 73 | .name = "Red Balance", |
| @@ -105,7 +114,8 @@ struct mt9v011 { | |||
| 105 | unsigned hflip:1; | 114 | unsigned hflip:1; |
| 106 | unsigned vflip:1; | 115 | unsigned vflip:1; |
| 107 | 116 | ||
| 108 | u16 global_gain, red_bal, blue_bal; | 117 | u16 global_gain, exposure; |
| 118 | s16 red_bal, blue_bal; | ||
| 109 | }; | 119 | }; |
| 110 | 120 | ||
| 111 | static inline struct mt9v011 *to_mt9v011(struct v4l2_subdev *sd) | 121 | static inline struct mt9v011 *to_mt9v011(struct v4l2_subdev *sd) |
| @@ -180,24 +190,68 @@ static const struct i2c_reg_value mt9v011_init_default[] = { | |||
| 180 | { R07_MT9V011_OUT_CTRL, 0x0002 }, /* chip enable */ | 190 | { R07_MT9V011_OUT_CTRL, 0x0002 }, /* chip enable */ |
| 181 | }; | 191 | }; |
| 182 | 192 | ||
| 193 | |||
| 194 | static u16 calc_mt9v011_gain(s16 lineargain) | ||
| 195 | { | ||
| 196 | |||
| 197 | u16 digitalgain = 0; | ||
| 198 | u16 analogmult = 0; | ||
| 199 | u16 analoginit = 0; | ||
| 200 | |||
| 201 | if (lineargain < 0) | ||
| 202 | lineargain = 0; | ||
| 203 | |||
| 204 | /* recommended minimum */ | ||
| 205 | lineargain += 0x0020; | ||
| 206 | |||
| 207 | if (lineargain > 2047) | ||
| 208 | lineargain = 2047; | ||
| 209 | |||
| 210 | if (lineargain > 1023) { | ||
| 211 | digitalgain = 3; | ||
| 212 | analogmult = 3; | ||
| 213 | analoginit = lineargain / 16; | ||
| 214 | } else if (lineargain > 511) { | ||
| 215 | digitalgain = 1; | ||
| 216 | analogmult = 3; | ||
| 217 | analoginit = lineargain / 8; | ||
| 218 | } else if (lineargain > 255) { | ||
| 219 | analogmult = 3; | ||
| 220 | analoginit = lineargain / 4; | ||
| 221 | } else if (lineargain > 127) { | ||
| 222 | analogmult = 1; | ||
| 223 | analoginit = lineargain / 2; | ||
| 224 | } else | ||
| 225 | analoginit = lineargain; | ||
| 226 | |||
| 227 | return analoginit + (analogmult << 7) + (digitalgain << 9); | ||
| 228 | |||
| 229 | } | ||
| 230 | |||
| 183 | static void set_balance(struct v4l2_subdev *sd) | 231 | static void set_balance(struct v4l2_subdev *sd) |
| 184 | { | 232 | { |
| 185 | struct mt9v011 *core = to_mt9v011(sd); | 233 | struct mt9v011 *core = to_mt9v011(sd); |
| 186 | u16 green1_gain, green2_gain, blue_gain, red_gain; | 234 | u16 green_gain, blue_gain, red_gain; |
| 235 | u16 exposure; | ||
| 236 | s16 bal; | ||
| 187 | 237 | ||
| 188 | green1_gain = core->global_gain; | 238 | exposure = core->exposure; |
| 189 | green2_gain = core->global_gain; | ||
| 190 | 239 | ||
| 191 | blue_gain = core->global_gain + | 240 | green_gain = calc_mt9v011_gain(core->global_gain); |
| 192 | core->global_gain * core->blue_bal / (1 << 9); | ||
| 193 | 241 | ||
| 194 | red_gain = core->global_gain + | 242 | bal = core->global_gain; |
| 195 | core->global_gain * core->blue_bal / (1 << 9); | 243 | bal += (core->blue_bal * core->global_gain / (1 << 7)); |
| 244 | blue_gain = calc_mt9v011_gain(bal); | ||
| 196 | 245 | ||
| 197 | mt9v011_write(sd, R2B_MT9V011_GREEN_1_GAIN, green1_gain); | 246 | bal = core->global_gain; |
| 198 | mt9v011_write(sd, R2E_MT9V011_GREEN_2_GAIN, green1_gain); | 247 | bal += (core->red_bal * core->global_gain / (1 << 7)); |
| 248 | red_gain = calc_mt9v011_gain(bal); | ||
| 249 | |||
| 250 | mt9v011_write(sd, R2B_MT9V011_GREEN_1_GAIN, green_gain); | ||
| 251 | mt9v011_write(sd, R2E_MT9V011_GREEN_2_GAIN, green_gain); | ||
| 199 | mt9v011_write(sd, R2C_MT9V011_BLUE_GAIN, blue_gain); | 252 | mt9v011_write(sd, R2C_MT9V011_BLUE_GAIN, blue_gain); |
| 200 | mt9v011_write(sd, R2D_MT9V011_RED_GAIN, red_gain); | 253 | mt9v011_write(sd, R2D_MT9V011_RED_GAIN, red_gain); |
| 254 | mt9v011_write(sd, R09_MT9V011_SHUTTER_WIDTH, exposure); | ||
| 201 | } | 255 | } |
| 202 | 256 | ||
| 203 | static void calc_fps(struct v4l2_subdev *sd, u32 *numerator, u32 *denominator) | 257 | static void calc_fps(struct v4l2_subdev *sd, u32 *numerator, u32 *denominator) |
| @@ -286,7 +340,7 @@ static void set_res(struct v4l2_subdev *sd) | |||
| 286 | * be missing. | 340 | * be missing. |
| 287 | */ | 341 | */ |
| 288 | 342 | ||
| 289 | hstart = 14 + (640 - core->width) / 2; | 343 | hstart = 20 + (640 - core->width) / 2; |
| 290 | mt9v011_write(sd, R02_MT9V011_COLSTART, hstart); | 344 | mt9v011_write(sd, R02_MT9V011_COLSTART, hstart); |
| 291 | mt9v011_write(sd, R04_MT9V011_WIDTH, core->width); | 345 | mt9v011_write(sd, R04_MT9V011_WIDTH, core->width); |
| 292 | mt9v011_write(sd, R05_MT9V011_HBLANK, 771 - core->width); | 346 | mt9v011_write(sd, R05_MT9V011_HBLANK, 771 - core->width); |
| @@ -338,6 +392,9 @@ static int mt9v011_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) | |||
| 338 | case V4L2_CID_GAIN: | 392 | case V4L2_CID_GAIN: |
| 339 | ctrl->value = core->global_gain; | 393 | ctrl->value = core->global_gain; |
| 340 | return 0; | 394 | return 0; |
| 395 | case V4L2_CID_EXPOSURE: | ||
| 396 | ctrl->value = core->exposure; | ||
| 397 | return 0; | ||
| 341 | case V4L2_CID_RED_BALANCE: | 398 | case V4L2_CID_RED_BALANCE: |
| 342 | ctrl->value = core->red_bal; | 399 | ctrl->value = core->red_bal; |
| 343 | return 0; | 400 | return 0; |
| @@ -392,6 +449,9 @@ static int mt9v011_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) | |||
| 392 | case V4L2_CID_GAIN: | 449 | case V4L2_CID_GAIN: |
| 393 | core->global_gain = ctrl->value; | 450 | core->global_gain = ctrl->value; |
| 394 | break; | 451 | break; |
| 452 | case V4L2_CID_EXPOSURE: | ||
| 453 | core->exposure = ctrl->value; | ||
| 454 | break; | ||
| 395 | case V4L2_CID_RED_BALANCE: | 455 | case V4L2_CID_RED_BALANCE: |
| 396 | core->red_bal = ctrl->value; | 456 | core->red_bal = ctrl->value; |
| 397 | break; | 457 | break; |
| @@ -598,6 +658,7 @@ static int mt9v011_probe(struct i2c_client *c, | |||
| 598 | } | 658 | } |
| 599 | 659 | ||
| 600 | core->global_gain = 0x0024; | 660 | core->global_gain = 0x0024; |
| 661 | core->exposure = 0x01fc; | ||
| 601 | core->width = 640; | 662 | core->width = 640; |
| 602 | core->height = 480; | 663 | core->height = 480; |
| 603 | core->xtal = 27000000; /* Hz */ | 664 | core->xtal = 27000000; /* Hz */ |
diff --git a/drivers/media/video/mt9v022.c b/drivers/media/video/mt9v022.c index fc76ed1c08e5..51b0fccbfe70 100644 --- a/drivers/media/video/mt9v022.c +++ b/drivers/media/video/mt9v022.c | |||
| @@ -728,9 +728,9 @@ static int mt9v022_video_probe(struct soc_camera_device *icd, | |||
| 728 | int ret; | 728 | int ret; |
| 729 | unsigned long flags; | 729 | unsigned long flags; |
| 730 | 730 | ||
| 731 | if (!icd->dev.parent || | 731 | /* We must have a parent by now. And it cannot be a wrong one. */ |
| 732 | to_soc_camera_host(icd->dev.parent)->nr != icd->iface) | 732 | BUG_ON(!icd->parent || |
| 733 | return -ENODEV; | 733 | to_soc_camera_host(icd->parent)->nr != icd->iface); |
| 734 | 734 | ||
| 735 | /* Read out the chip version register */ | 735 | /* Read out the chip version register */ |
| 736 | data = reg_read(client, MT9V022_CHIP_VERSION); | 736 | data = reg_read(client, MT9V022_CHIP_VERSION); |
| @@ -809,8 +809,8 @@ static void mt9v022_video_remove(struct soc_camera_device *icd) | |||
| 809 | { | 809 | { |
| 810 | struct soc_camera_link *icl = to_soc_camera_link(icd); | 810 | struct soc_camera_link *icl = to_soc_camera_link(icd); |
| 811 | 811 | ||
| 812 | dev_dbg(&icd->dev, "Video removed: %p, %p\n", | 812 | dev_dbg(icd->pdev, "Video removed: %p, %p\n", |
| 813 | icd->dev.parent, icd->vdev); | 813 | icd->parent, icd->vdev); |
| 814 | if (icl->free_bus) | 814 | if (icl->free_bus) |
| 815 | icl->free_bus(icl); | 815 | icl->free_bus(icl); |
| 816 | } | 816 | } |
diff --git a/drivers/media/video/mt9v032.c b/drivers/media/video/mt9v032.c index 1319c2c48aff..c64e1dc4cb4e 100644 --- a/drivers/media/video/mt9v032.c +++ b/drivers/media/video/mt9v032.c | |||
| @@ -31,14 +31,14 @@ | |||
| 31 | #define MT9V032_CHIP_VERSION 0x00 | 31 | #define MT9V032_CHIP_VERSION 0x00 |
| 32 | #define MT9V032_CHIP_ID_REV1 0x1311 | 32 | #define MT9V032_CHIP_ID_REV1 0x1311 |
| 33 | #define MT9V032_CHIP_ID_REV3 0x1313 | 33 | #define MT9V032_CHIP_ID_REV3 0x1313 |
| 34 | #define MT9V032_ROW_START 0x01 | 34 | #define MT9V032_COLUMN_START 0x01 |
| 35 | #define MT9V032_ROW_START_MIN 4 | ||
| 36 | #define MT9V032_ROW_START_DEF 10 | ||
| 37 | #define MT9V032_ROW_START_MAX 482 | ||
| 38 | #define MT9V032_COLUMN_START 0x02 | ||
| 39 | #define MT9V032_COLUMN_START_MIN 1 | 35 | #define MT9V032_COLUMN_START_MIN 1 |
| 40 | #define MT9V032_COLUMN_START_DEF 2 | 36 | #define MT9V032_COLUMN_START_DEF 1 |
| 41 | #define MT9V032_COLUMN_START_MAX 752 | 37 | #define MT9V032_COLUMN_START_MAX 752 |
| 38 | #define MT9V032_ROW_START 0x02 | ||
| 39 | #define MT9V032_ROW_START_MIN 4 | ||
| 40 | #define MT9V032_ROW_START_DEF 5 | ||
| 41 | #define MT9V032_ROW_START_MAX 482 | ||
| 42 | #define MT9V032_WINDOW_HEIGHT 0x03 | 42 | #define MT9V032_WINDOW_HEIGHT 0x03 |
| 43 | #define MT9V032_WINDOW_HEIGHT_MIN 1 | 43 | #define MT9V032_WINDOW_HEIGHT_MIN 1 |
| 44 | #define MT9V032_WINDOW_HEIGHT_DEF 480 | 44 | #define MT9V032_WINDOW_HEIGHT_DEF 480 |
| @@ -420,13 +420,13 @@ static int mt9v032_set_crop(struct v4l2_subdev *subdev, | |||
| 420 | struct v4l2_rect *__crop; | 420 | struct v4l2_rect *__crop; |
| 421 | struct v4l2_rect rect; | 421 | struct v4l2_rect rect; |
| 422 | 422 | ||
| 423 | /* Clamp the crop rectangle boundaries and align them to a multiple of 2 | 423 | /* Clamp the crop rectangle boundaries and align them to a non multiple |
| 424 | * pixels. | 424 | * of 2 pixels to ensure a GRBG Bayer pattern. |
| 425 | */ | 425 | */ |
| 426 | rect.left = clamp(ALIGN(crop->rect.left, 2), | 426 | rect.left = clamp(ALIGN(crop->rect.left + 1, 2) - 1, |
| 427 | MT9V032_COLUMN_START_MIN, | 427 | MT9V032_COLUMN_START_MIN, |
| 428 | MT9V032_COLUMN_START_MAX); | 428 | MT9V032_COLUMN_START_MAX); |
| 429 | rect.top = clamp(ALIGN(crop->rect.top, 2), | 429 | rect.top = clamp(ALIGN(crop->rect.top + 1, 2) - 1, |
| 430 | MT9V032_ROW_START_MIN, | 430 | MT9V032_ROW_START_MIN, |
| 431 | MT9V032_ROW_START_MAX); | 431 | MT9V032_ROW_START_MAX); |
| 432 | rect.width = clamp(ALIGN(crop->rect.width, 2), | 432 | rect.width = clamp(ALIGN(crop->rect.width, 2), |
diff --git a/drivers/media/video/mx1_camera.c b/drivers/media/video/mx1_camera.c index 63f8a0cc33d8..087db12a3a67 100644 --- a/drivers/media/video/mx1_camera.c +++ b/drivers/media/video/mx1_camera.c | |||
| @@ -31,7 +31,6 @@ | |||
| 31 | #include <linux/sched.h> | 31 | #include <linux/sched.h> |
| 32 | #include <linux/slab.h> | 32 | #include <linux/slab.h> |
| 33 | #include <linux/time.h> | 33 | #include <linux/time.h> |
| 34 | #include <linux/version.h> | ||
| 35 | #include <linux/videodev2.h> | 34 | #include <linux/videodev2.h> |
| 36 | 35 | ||
| 37 | #include <media/soc_camera.h> | 36 | #include <media/soc_camera.h> |
| @@ -73,7 +72,7 @@ | |||
| 73 | #define CSISR_SOF_INT (1 << 16) | 72 | #define CSISR_SOF_INT (1 << 16) |
| 74 | #define CSISR_DRDY (1 << 0) | 73 | #define CSISR_DRDY (1 << 0) |
| 75 | 74 | ||
| 76 | #define VERSION_CODE KERNEL_VERSION(0, 0, 1) | 75 | #define DRIVER_VERSION "0.0.2" |
| 77 | #define DRIVER_NAME "mx1-camera" | 76 | #define DRIVER_NAME "mx1-camera" |
| 78 | 77 | ||
| 79 | #define CSI_IRQ_MASK (CSISR_SFF_OR_INT | CSISR_RFF_OR_INT | \ | 78 | #define CSI_IRQ_MASK (CSISR_SFF_OR_INT | CSISR_RFF_OR_INT | \ |
| @@ -142,7 +141,7 @@ static int mx1_videobuf_setup(struct videobuf_queue *vq, unsigned int *count, | |||
| 142 | if (*size * *count > MAX_VIDEO_MEM * 1024 * 1024) | 141 | if (*size * *count > MAX_VIDEO_MEM * 1024 * 1024) |
| 143 | *count = (MAX_VIDEO_MEM * 1024 * 1024) / *size; | 142 | *count = (MAX_VIDEO_MEM * 1024 * 1024) / *size; |
| 144 | 143 | ||
| 145 | dev_dbg(icd->dev.parent, "count=%d, size=%d\n", *count, *size); | 144 | dev_dbg(icd->parent, "count=%d, size=%d\n", *count, *size); |
| 146 | 145 | ||
| 147 | return 0; | 146 | return 0; |
| 148 | } | 147 | } |
| @@ -154,7 +153,7 @@ static void free_buffer(struct videobuf_queue *vq, struct mx1_buffer *buf) | |||
| 154 | 153 | ||
| 155 | BUG_ON(in_interrupt()); | 154 | BUG_ON(in_interrupt()); |
| 156 | 155 | ||
| 157 | dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__, | 156 | dev_dbg(icd->parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__, |
| 158 | vb, vb->baddr, vb->bsize); | 157 | vb, vb->baddr, vb->bsize); |
| 159 | 158 | ||
| 160 | /* | 159 | /* |
| @@ -179,7 +178,7 @@ static int mx1_videobuf_prepare(struct videobuf_queue *vq, | |||
| 179 | if (bytes_per_line < 0) | 178 | if (bytes_per_line < 0) |
| 180 | return bytes_per_line; | 179 | return bytes_per_line; |
| 181 | 180 | ||
| 182 | dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__, | 181 | dev_dbg(icd->parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__, |
| 183 | vb, vb->baddr, vb->bsize); | 182 | vb, vb->baddr, vb->bsize); |
| 184 | 183 | ||
| 185 | /* Added list head initialization on alloc */ | 184 | /* Added list head initialization on alloc */ |
| @@ -232,7 +231,7 @@ out: | |||
| 232 | static int mx1_camera_setup_dma(struct mx1_camera_dev *pcdev) | 231 | static int mx1_camera_setup_dma(struct mx1_camera_dev *pcdev) |
| 233 | { | 232 | { |
| 234 | struct videobuf_buffer *vbuf = &pcdev->active->vb; | 233 | struct videobuf_buffer *vbuf = &pcdev->active->vb; |
| 235 | struct device *dev = pcdev->icd->dev.parent; | 234 | struct device *dev = pcdev->icd->parent; |
| 236 | int ret; | 235 | int ret; |
| 237 | 236 | ||
| 238 | if (unlikely(!pcdev->active)) { | 237 | if (unlikely(!pcdev->active)) { |
| @@ -256,11 +255,11 @@ static void mx1_videobuf_queue(struct videobuf_queue *vq, | |||
| 256 | struct videobuf_buffer *vb) | 255 | struct videobuf_buffer *vb) |
| 257 | { | 256 | { |
| 258 | struct soc_camera_device *icd = vq->priv_data; | 257 | struct soc_camera_device *icd = vq->priv_data; |
| 259 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 258 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 260 | struct mx1_camera_dev *pcdev = ici->priv; | 259 | struct mx1_camera_dev *pcdev = ici->priv; |
| 261 | struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb); | 260 | struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb); |
| 262 | 261 | ||
| 263 | dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__, | 262 | dev_dbg(icd->parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__, |
| 264 | vb, vb->baddr, vb->bsize); | 263 | vb, vb->baddr, vb->bsize); |
| 265 | 264 | ||
| 266 | list_add_tail(&vb->queue, &pcdev->capture); | 265 | list_add_tail(&vb->queue, &pcdev->capture); |
| @@ -287,7 +286,7 @@ static void mx1_videobuf_release(struct videobuf_queue *vq, | |||
| 287 | struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb); | 286 | struct mx1_buffer *buf = container_of(vb, struct mx1_buffer, vb); |
| 288 | #ifdef DEBUG | 287 | #ifdef DEBUG |
| 289 | struct soc_camera_device *icd = vq->priv_data; | 288 | struct soc_camera_device *icd = vq->priv_data; |
| 290 | struct device *dev = icd->dev.parent; | 289 | struct device *dev = icd->parent; |
| 291 | 290 | ||
| 292 | dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__, | 291 | dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__, |
| 293 | vb, vb->baddr, vb->bsize); | 292 | vb, vb->baddr, vb->bsize); |
| @@ -343,7 +342,7 @@ static void mx1_camera_wakeup(struct mx1_camera_dev *pcdev, | |||
| 343 | static void mx1_camera_dma_irq(int channel, void *data) | 342 | static void mx1_camera_dma_irq(int channel, void *data) |
| 344 | { | 343 | { |
| 345 | struct mx1_camera_dev *pcdev = data; | 344 | struct mx1_camera_dev *pcdev = data; |
| 346 | struct device *dev = pcdev->icd->dev.parent; | 345 | struct device *dev = pcdev->icd->parent; |
| 347 | struct mx1_buffer *buf; | 346 | struct mx1_buffer *buf; |
| 348 | struct videobuf_buffer *vb; | 347 | struct videobuf_buffer *vb; |
| 349 | unsigned long flags; | 348 | unsigned long flags; |
| @@ -378,10 +377,10 @@ static struct videobuf_queue_ops mx1_videobuf_ops = { | |||
| 378 | static void mx1_camera_init_videobuf(struct videobuf_queue *q, | 377 | static void mx1_camera_init_videobuf(struct videobuf_queue *q, |
| 379 | struct soc_camera_device *icd) | 378 | struct soc_camera_device *icd) |
| 380 | { | 379 | { |
| 381 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 380 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 382 | struct mx1_camera_dev *pcdev = ici->priv; | 381 | struct mx1_camera_dev *pcdev = ici->priv; |
| 383 | 382 | ||
| 384 | videobuf_queue_dma_contig_init(q, &mx1_videobuf_ops, icd->dev.parent, | 383 | videobuf_queue_dma_contig_init(q, &mx1_videobuf_ops, icd->parent, |
| 385 | &pcdev->lock, V4L2_BUF_TYPE_VIDEO_CAPTURE, | 384 | &pcdev->lock, V4L2_BUF_TYPE_VIDEO_CAPTURE, |
| 386 | V4L2_FIELD_NONE, | 385 | V4L2_FIELD_NONE, |
| 387 | sizeof(struct mx1_buffer), icd, &icd->video_lock); | 386 | sizeof(struct mx1_buffer), icd, &icd->video_lock); |
| @@ -401,7 +400,7 @@ static int mclk_get_divisor(struct mx1_camera_dev *pcdev) | |||
| 401 | */ | 400 | */ |
| 402 | div = (lcdclk + 2 * mclk - 1) / (2 * mclk) - 1; | 401 | div = (lcdclk + 2 * mclk - 1) / (2 * mclk) - 1; |
| 403 | 402 | ||
| 404 | dev_dbg(pcdev->icd->dev.parent, | 403 | dev_dbg(pcdev->icd->parent, |
| 405 | "System clock %lukHz, target freq %dkHz, divisor %lu\n", | 404 | "System clock %lukHz, target freq %dkHz, divisor %lu\n", |
| 406 | lcdclk / 1000, mclk / 1000, div); | 405 | lcdclk / 1000, mclk / 1000, div); |
| 407 | 406 | ||
| @@ -412,7 +411,7 @@ static void mx1_camera_activate(struct mx1_camera_dev *pcdev) | |||
| 412 | { | 411 | { |
| 413 | unsigned int csicr1 = CSICR1_EN; | 412 | unsigned int csicr1 = CSICR1_EN; |
| 414 | 413 | ||
| 415 | dev_dbg(pcdev->icd->dev.parent, "Activate device\n"); | 414 | dev_dbg(pcdev->icd->parent, "Activate device\n"); |
| 416 | 415 | ||
| 417 | clk_enable(pcdev->clk); | 416 | clk_enable(pcdev->clk); |
| 418 | 417 | ||
| @@ -428,7 +427,7 @@ static void mx1_camera_activate(struct mx1_camera_dev *pcdev) | |||
| 428 | 427 | ||
| 429 | static void mx1_camera_deactivate(struct mx1_camera_dev *pcdev) | 428 | static void mx1_camera_deactivate(struct mx1_camera_dev *pcdev) |
| 430 | { | 429 | { |
| 431 | dev_dbg(pcdev->icd->dev.parent, "Deactivate device\n"); | 430 | dev_dbg(pcdev->icd->parent, "Deactivate device\n"); |
| 432 | 431 | ||
| 433 | /* Disable all CSI interface */ | 432 | /* Disable all CSI interface */ |
| 434 | __raw_writel(0x00, pcdev->base + CSICR1); | 433 | __raw_writel(0x00, pcdev->base + CSICR1); |
| @@ -442,13 +441,13 @@ static void mx1_camera_deactivate(struct mx1_camera_dev *pcdev) | |||
| 442 | */ | 441 | */ |
| 443 | static int mx1_camera_add_device(struct soc_camera_device *icd) | 442 | static int mx1_camera_add_device(struct soc_camera_device *icd) |
| 444 | { | 443 | { |
| 445 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 444 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 446 | struct mx1_camera_dev *pcdev = ici->priv; | 445 | struct mx1_camera_dev *pcdev = ici->priv; |
| 447 | 446 | ||
| 448 | if (pcdev->icd) | 447 | if (pcdev->icd) |
| 449 | return -EBUSY; | 448 | return -EBUSY; |
| 450 | 449 | ||
| 451 | dev_info(icd->dev.parent, "MX1 Camera driver attached to camera %d\n", | 450 | dev_info(icd->parent, "MX1 Camera driver attached to camera %d\n", |
| 452 | icd->devnum); | 451 | icd->devnum); |
| 453 | 452 | ||
| 454 | mx1_camera_activate(pcdev); | 453 | mx1_camera_activate(pcdev); |
| @@ -460,7 +459,7 @@ static int mx1_camera_add_device(struct soc_camera_device *icd) | |||
| 460 | 459 | ||
| 461 | static void mx1_camera_remove_device(struct soc_camera_device *icd) | 460 | static void mx1_camera_remove_device(struct soc_camera_device *icd) |
| 462 | { | 461 | { |
| 463 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 462 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 464 | struct mx1_camera_dev *pcdev = ici->priv; | 463 | struct mx1_camera_dev *pcdev = ici->priv; |
| 465 | unsigned int csicr1; | 464 | unsigned int csicr1; |
| 466 | 465 | ||
| @@ -473,7 +472,7 @@ static void mx1_camera_remove_device(struct soc_camera_device *icd) | |||
| 473 | /* Stop DMA engine */ | 472 | /* Stop DMA engine */ |
| 474 | imx_dma_disable(pcdev->dma_chan); | 473 | imx_dma_disable(pcdev->dma_chan); |
| 475 | 474 | ||
| 476 | dev_info(icd->dev.parent, "MX1 Camera driver detached from camera %d\n", | 475 | dev_info(icd->parent, "MX1 Camera driver detached from camera %d\n", |
| 477 | icd->devnum); | 476 | icd->devnum); |
| 478 | 477 | ||
| 479 | mx1_camera_deactivate(pcdev); | 478 | mx1_camera_deactivate(pcdev); |
| @@ -491,7 +490,7 @@ static int mx1_camera_set_crop(struct soc_camera_device *icd, | |||
| 491 | 490 | ||
| 492 | static int mx1_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt) | 491 | static int mx1_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt) |
| 493 | { | 492 | { |
| 494 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 493 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 495 | struct mx1_camera_dev *pcdev = ici->priv; | 494 | struct mx1_camera_dev *pcdev = ici->priv; |
| 496 | unsigned long camera_flags, common_flags; | 495 | unsigned long camera_flags, common_flags; |
| 497 | unsigned int csicr1; | 496 | unsigned int csicr1; |
| @@ -562,14 +561,14 @@ static int mx1_camera_set_fmt(struct soc_camera_device *icd, | |||
| 562 | 561 | ||
| 563 | xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat); | 562 | xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat); |
| 564 | if (!xlate) { | 563 | if (!xlate) { |
| 565 | dev_warn(icd->dev.parent, "Format %x not found\n", | 564 | dev_warn(icd->parent, "Format %x not found\n", |
| 566 | pix->pixelformat); | 565 | pix->pixelformat); |
| 567 | return -EINVAL; | 566 | return -EINVAL; |
| 568 | } | 567 | } |
| 569 | 568 | ||
| 570 | buswidth = xlate->host_fmt->bits_per_sample; | 569 | buswidth = xlate->host_fmt->bits_per_sample; |
| 571 | if (buswidth > 8) { | 570 | if (buswidth > 8) { |
| 572 | dev_warn(icd->dev.parent, | 571 | dev_warn(icd->parent, |
| 573 | "bits-per-sample %d for format %x unsupported\n", | 572 | "bits-per-sample %d for format %x unsupported\n", |
| 574 | buswidth, pix->pixelformat); | 573 | buswidth, pix->pixelformat); |
| 575 | return -EINVAL; | 574 | return -EINVAL; |
| @@ -609,7 +608,7 @@ static int mx1_camera_try_fmt(struct soc_camera_device *icd, | |||
| 609 | 608 | ||
| 610 | xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat); | 609 | xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat); |
| 611 | if (!xlate) { | 610 | if (!xlate) { |
| 612 | dev_warn(icd->dev.parent, "Format %x not found\n", | 611 | dev_warn(icd->parent, "Format %x not found\n", |
| 613 | pix->pixelformat); | 612 | pix->pixelformat); |
| 614 | return -EINVAL; | 613 | return -EINVAL; |
| 615 | } | 614 | } |
| @@ -676,7 +675,6 @@ static int mx1_camera_querycap(struct soc_camera_host *ici, | |||
| 676 | { | 675 | { |
| 677 | /* cap->name is set by the friendly caller:-> */ | 676 | /* cap->name is set by the friendly caller:-> */ |
| 678 | strlcpy(cap->card, "i.MX1/i.MXL Camera", sizeof(cap->card)); | 677 | strlcpy(cap->card, "i.MX1/i.MXL Camera", sizeof(cap->card)); |
| 679 | cap->version = VERSION_CODE; | ||
| 680 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING; | 678 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING; |
| 681 | 679 | ||
| 682 | return 0; | 680 | return 0; |
| @@ -883,4 +881,5 @@ module_exit(mx1_camera_exit); | |||
| 883 | MODULE_DESCRIPTION("i.MX1/i.MXL SoC Camera Host driver"); | 881 | MODULE_DESCRIPTION("i.MX1/i.MXL SoC Camera Host driver"); |
| 884 | MODULE_AUTHOR("Paulius Zaleckas <paulius.zaleckas@teltonika.lt>"); | 882 | MODULE_AUTHOR("Paulius Zaleckas <paulius.zaleckas@teltonika.lt>"); |
| 885 | MODULE_LICENSE("GPL v2"); | 883 | MODULE_LICENSE("GPL v2"); |
| 884 | MODULE_VERSION(DRIVER_VERSION); | ||
| 886 | MODULE_ALIAS("platform:" DRIVER_NAME); | 885 | MODULE_ALIAS("platform:" DRIVER_NAME); |
diff --git a/drivers/media/video/mx2_camera.c b/drivers/media/video/mx2_camera.c index 4eab1c620318..ec2410c0c806 100644 --- a/drivers/media/video/mx2_camera.c +++ b/drivers/media/video/mx2_camera.c | |||
| @@ -23,7 +23,6 @@ | |||
| 23 | #include <linux/mm.h> | 23 | #include <linux/mm.h> |
| 24 | #include <linux/moduleparam.h> | 24 | #include <linux/moduleparam.h> |
| 25 | #include <linux/time.h> | 25 | #include <linux/time.h> |
| 26 | #include <linux/version.h> | ||
| 27 | #include <linux/device.h> | 26 | #include <linux/device.h> |
| 28 | #include <linux/platform_device.h> | 27 | #include <linux/platform_device.h> |
| 29 | #include <linux/mutex.h> | 28 | #include <linux/mutex.h> |
| @@ -47,7 +46,7 @@ | |||
| 47 | #include <asm/dma.h> | 46 | #include <asm/dma.h> |
| 48 | 47 | ||
| 49 | #define MX2_CAM_DRV_NAME "mx2-camera" | 48 | #define MX2_CAM_DRV_NAME "mx2-camera" |
| 50 | #define MX2_CAM_VERSION_CODE KERNEL_VERSION(0, 0, 5) | 49 | #define MX2_CAM_VERSION "0.0.6" |
| 51 | #define MX2_CAM_DRIVER_DESCRIPTION "i.MX2x_Camera" | 50 | #define MX2_CAM_DRIVER_DESCRIPTION "i.MX2x_Camera" |
| 52 | 51 | ||
| 53 | /* reset values */ | 52 | /* reset values */ |
| @@ -278,7 +277,7 @@ static void mx2_camera_deactivate(struct mx2_camera_dev *pcdev) | |||
| 278 | */ | 277 | */ |
| 279 | static int mx2_camera_add_device(struct soc_camera_device *icd) | 278 | static int mx2_camera_add_device(struct soc_camera_device *icd) |
| 280 | { | 279 | { |
| 281 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 280 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 282 | struct mx2_camera_dev *pcdev = ici->priv; | 281 | struct mx2_camera_dev *pcdev = ici->priv; |
| 283 | int ret; | 282 | int ret; |
| 284 | u32 csicr1; | 283 | u32 csicr1; |
| @@ -303,7 +302,7 @@ static int mx2_camera_add_device(struct soc_camera_device *icd) | |||
| 303 | 302 | ||
| 304 | pcdev->icd = icd; | 303 | pcdev->icd = icd; |
| 305 | 304 | ||
| 306 | dev_info(icd->dev.parent, "Camera driver attached to camera %d\n", | 305 | dev_info(icd->parent, "Camera driver attached to camera %d\n", |
| 307 | icd->devnum); | 306 | icd->devnum); |
| 308 | 307 | ||
| 309 | return 0; | 308 | return 0; |
| @@ -311,12 +310,12 @@ static int mx2_camera_add_device(struct soc_camera_device *icd) | |||
| 311 | 310 | ||
| 312 | static void mx2_camera_remove_device(struct soc_camera_device *icd) | 311 | static void mx2_camera_remove_device(struct soc_camera_device *icd) |
| 313 | { | 312 | { |
| 314 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 313 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 315 | struct mx2_camera_dev *pcdev = ici->priv; | 314 | struct mx2_camera_dev *pcdev = ici->priv; |
| 316 | 315 | ||
| 317 | BUG_ON(icd != pcdev->icd); | 316 | BUG_ON(icd != pcdev->icd); |
| 318 | 317 | ||
| 319 | dev_info(icd->dev.parent, "Camera driver detached from camera %d\n", | 318 | dev_info(icd->parent, "Camera driver detached from camera %d\n", |
| 320 | icd->devnum); | 319 | icd->devnum); |
| 321 | 320 | ||
| 322 | mx2_camera_deactivate(pcdev); | 321 | mx2_camera_deactivate(pcdev); |
| @@ -437,7 +436,7 @@ static int mx2_videobuf_setup(struct videobuf_queue *vq, unsigned int *count, | |||
| 437 | int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width, | 436 | int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width, |
| 438 | icd->current_fmt->host_fmt); | 437 | icd->current_fmt->host_fmt); |
| 439 | 438 | ||
| 440 | dev_dbg(&icd->dev, "count=%d, size=%d\n", *count, *size); | 439 | dev_dbg(icd->parent, "count=%d, size=%d\n", *count, *size); |
| 441 | 440 | ||
| 442 | if (bytes_per_line < 0) | 441 | if (bytes_per_line < 0) |
| 443 | return bytes_per_line; | 442 | return bytes_per_line; |
| @@ -457,7 +456,7 @@ static void free_buffer(struct videobuf_queue *vq, struct mx2_buffer *buf) | |||
| 457 | struct soc_camera_device *icd = vq->priv_data; | 456 | struct soc_camera_device *icd = vq->priv_data; |
| 458 | struct videobuf_buffer *vb = &buf->vb; | 457 | struct videobuf_buffer *vb = &buf->vb; |
| 459 | 458 | ||
| 460 | dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__, | 459 | dev_dbg(icd->parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__, |
| 461 | vb, vb->baddr, vb->bsize); | 460 | vb, vb->baddr, vb->bsize); |
| 462 | 461 | ||
| 463 | /* | 462 | /* |
| @@ -467,7 +466,7 @@ static void free_buffer(struct videobuf_queue *vq, struct mx2_buffer *buf) | |||
| 467 | videobuf_waiton(vq, vb, 0, 0); | 466 | videobuf_waiton(vq, vb, 0, 0); |
| 468 | 467 | ||
| 469 | videobuf_dma_contig_free(vq, vb); | 468 | videobuf_dma_contig_free(vq, vb); |
| 470 | dev_dbg(&icd->dev, "%s freed\n", __func__); | 469 | dev_dbg(icd->parent, "%s freed\n", __func__); |
| 471 | 470 | ||
| 472 | vb->state = VIDEOBUF_NEEDS_INIT; | 471 | vb->state = VIDEOBUF_NEEDS_INIT; |
| 473 | } | 472 | } |
| @@ -481,7 +480,7 @@ static int mx2_videobuf_prepare(struct videobuf_queue *vq, | |||
| 481 | icd->current_fmt->host_fmt); | 480 | icd->current_fmt->host_fmt); |
| 482 | int ret = 0; | 481 | int ret = 0; |
| 483 | 482 | ||
| 484 | dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__, | 483 | dev_dbg(icd->parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__, |
| 485 | vb, vb->baddr, vb->bsize); | 484 | vb, vb->baddr, vb->bsize); |
| 486 | 485 | ||
| 487 | if (bytes_per_line < 0) | 486 | if (bytes_per_line < 0) |
| @@ -533,12 +532,12 @@ static void mx2_videobuf_queue(struct videobuf_queue *vq, | |||
| 533 | { | 532 | { |
| 534 | struct soc_camera_device *icd = vq->priv_data; | 533 | struct soc_camera_device *icd = vq->priv_data; |
| 535 | struct soc_camera_host *ici = | 534 | struct soc_camera_host *ici = |
| 536 | to_soc_camera_host(icd->dev.parent); | 535 | to_soc_camera_host(icd->parent); |
| 537 | struct mx2_camera_dev *pcdev = ici->priv; | 536 | struct mx2_camera_dev *pcdev = ici->priv; |
| 538 | struct mx2_buffer *buf = container_of(vb, struct mx2_buffer, vb); | 537 | struct mx2_buffer *buf = container_of(vb, struct mx2_buffer, vb); |
| 539 | unsigned long flags; | 538 | unsigned long flags; |
| 540 | 539 | ||
| 541 | dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__, | 540 | dev_dbg(icd->parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__, |
| 542 | vb, vb->baddr, vb->bsize); | 541 | vb, vb->baddr, vb->bsize); |
| 543 | 542 | ||
| 544 | spin_lock_irqsave(&pcdev->lock, flags); | 543 | spin_lock_irqsave(&pcdev->lock, flags); |
| @@ -611,27 +610,27 @@ static void mx2_videobuf_release(struct videobuf_queue *vq, | |||
| 611 | struct videobuf_buffer *vb) | 610 | struct videobuf_buffer *vb) |
| 612 | { | 611 | { |
| 613 | struct soc_camera_device *icd = vq->priv_data; | 612 | struct soc_camera_device *icd = vq->priv_data; |
| 614 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 613 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 615 | struct mx2_camera_dev *pcdev = ici->priv; | 614 | struct mx2_camera_dev *pcdev = ici->priv; |
| 616 | struct mx2_buffer *buf = container_of(vb, struct mx2_buffer, vb); | 615 | struct mx2_buffer *buf = container_of(vb, struct mx2_buffer, vb); |
| 617 | unsigned long flags; | 616 | unsigned long flags; |
| 618 | 617 | ||
| 619 | #ifdef DEBUG | 618 | #ifdef DEBUG |
| 620 | dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__, | 619 | dev_dbg(icd->parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__, |
| 621 | vb, vb->baddr, vb->bsize); | 620 | vb, vb->baddr, vb->bsize); |
| 622 | 621 | ||
| 623 | switch (vb->state) { | 622 | switch (vb->state) { |
| 624 | case VIDEOBUF_ACTIVE: | 623 | case VIDEOBUF_ACTIVE: |
| 625 | dev_info(&icd->dev, "%s (active)\n", __func__); | 624 | dev_info(icd->parent, "%s (active)\n", __func__); |
| 626 | break; | 625 | break; |
| 627 | case VIDEOBUF_QUEUED: | 626 | case VIDEOBUF_QUEUED: |
| 628 | dev_info(&icd->dev, "%s (queued)\n", __func__); | 627 | dev_info(icd->parent, "%s (queued)\n", __func__); |
| 629 | break; | 628 | break; |
| 630 | case VIDEOBUF_PREPARED: | 629 | case VIDEOBUF_PREPARED: |
| 631 | dev_info(&icd->dev, "%s (prepared)\n", __func__); | 630 | dev_info(icd->parent, "%s (prepared)\n", __func__); |
| 632 | break; | 631 | break; |
| 633 | default: | 632 | default: |
| 634 | dev_info(&icd->dev, "%s (unknown) %d\n", __func__, | 633 | dev_info(icd->parent, "%s (unknown) %d\n", __func__, |
| 635 | vb->state); | 634 | vb->state); |
| 636 | break; | 635 | break; |
| 637 | } | 636 | } |
| @@ -678,7 +677,7 @@ static struct videobuf_queue_ops mx2_videobuf_ops = { | |||
| 678 | static void mx2_camera_init_videobuf(struct videobuf_queue *q, | 677 | static void mx2_camera_init_videobuf(struct videobuf_queue *q, |
| 679 | struct soc_camera_device *icd) | 678 | struct soc_camera_device *icd) |
| 680 | { | 679 | { |
| 681 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 680 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 682 | struct mx2_camera_dev *pcdev = ici->priv; | 681 | struct mx2_camera_dev *pcdev = ici->priv; |
| 683 | 682 | ||
| 684 | videobuf_queue_dma_contig_init(q, &mx2_videobuf_ops, pcdev->dev, | 683 | videobuf_queue_dma_contig_init(q, &mx2_videobuf_ops, pcdev->dev, |
| @@ -719,7 +718,7 @@ static void mx27_camera_emma_buf_init(struct soc_camera_device *icd, | |||
| 719 | int bytesperline) | 718 | int bytesperline) |
| 720 | { | 719 | { |
| 721 | struct soc_camera_host *ici = | 720 | struct soc_camera_host *ici = |
| 722 | to_soc_camera_host(icd->dev.parent); | 721 | to_soc_camera_host(icd->parent); |
| 723 | struct mx2_camera_dev *pcdev = ici->priv; | 722 | struct mx2_camera_dev *pcdev = ici->priv; |
| 724 | 723 | ||
| 725 | writel(pcdev->discard_buffer_dma, | 724 | writel(pcdev->discard_buffer_dma, |
| @@ -772,7 +771,7 @@ static int mx2_camera_set_bus_param(struct soc_camera_device *icd, | |||
| 772 | __u32 pixfmt) | 771 | __u32 pixfmt) |
| 773 | { | 772 | { |
| 774 | struct soc_camera_host *ici = | 773 | struct soc_camera_host *ici = |
| 775 | to_soc_camera_host(icd->dev.parent); | 774 | to_soc_camera_host(icd->parent); |
| 776 | struct mx2_camera_dev *pcdev = ici->priv; | 775 | struct mx2_camera_dev *pcdev = ici->priv; |
| 777 | unsigned long camera_flags, common_flags; | 776 | unsigned long camera_flags, common_flags; |
| 778 | int ret = 0; | 777 | int ret = 0; |
| @@ -891,7 +890,7 @@ static int mx2_camera_set_crop(struct soc_camera_device *icd, | |||
| 891 | if (ret < 0) | 890 | if (ret < 0) |
| 892 | return ret; | 891 | return ret; |
| 893 | 892 | ||
| 894 | dev_dbg(icd->dev.parent, "Sensor cropped %dx%d\n", | 893 | dev_dbg(icd->parent, "Sensor cropped %dx%d\n", |
| 895 | mf.width, mf.height); | 894 | mf.width, mf.height); |
| 896 | 895 | ||
| 897 | icd->user_width = mf.width; | 896 | icd->user_width = mf.width; |
| @@ -911,7 +910,7 @@ static int mx2_camera_set_fmt(struct soc_camera_device *icd, | |||
| 911 | 910 | ||
| 912 | xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat); | 911 | xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat); |
| 913 | if (!xlate) { | 912 | if (!xlate) { |
| 914 | dev_warn(icd->dev.parent, "Format %x not found\n", | 913 | dev_warn(icd->parent, "Format %x not found\n", |
| 915 | pix->pixelformat); | 914 | pix->pixelformat); |
| 916 | return -EINVAL; | 915 | return -EINVAL; |
| 917 | } | 916 | } |
| @@ -951,7 +950,7 @@ static int mx2_camera_try_fmt(struct soc_camera_device *icd, | |||
| 951 | 950 | ||
| 952 | xlate = soc_camera_xlate_by_fourcc(icd, pixfmt); | 951 | xlate = soc_camera_xlate_by_fourcc(icd, pixfmt); |
| 953 | if (pixfmt && !xlate) { | 952 | if (pixfmt && !xlate) { |
| 954 | dev_warn(icd->dev.parent, "Format %x not found\n", pixfmt); | 953 | dev_warn(icd->parent, "Format %x not found\n", pixfmt); |
| 955 | return -EINVAL; | 954 | return -EINVAL; |
| 956 | } | 955 | } |
| 957 | 956 | ||
| @@ -974,11 +973,16 @@ static int mx2_camera_try_fmt(struct soc_camera_device *icd, | |||
| 974 | if (pix->bytesperline < 0) | 973 | if (pix->bytesperline < 0) |
| 975 | return pix->bytesperline; | 974 | return pix->bytesperline; |
| 976 | pix->sizeimage = pix->height * pix->bytesperline; | 975 | pix->sizeimage = pix->height * pix->bytesperline; |
| 977 | if (pix->sizeimage > (4 * 0x3ffff)) { /* CSIRXCNT limit */ | 976 | /* Check against the CSIRXCNT limit */ |
| 978 | dev_warn(icd->dev.parent, | 977 | if (pix->sizeimage > 4 * 0x3ffff) { |
| 979 | "Image size (%u) above limit\n", | 978 | /* Adjust geometry, preserve aspect ratio */ |
| 980 | pix->sizeimage); | 979 | unsigned int new_height = int_sqrt(4 * 0x3ffff * |
| 981 | return -EINVAL; | 980 | pix->height / pix->bytesperline); |
| 981 | pix->width = new_height * pix->width / pix->height; | ||
| 982 | pix->height = new_height; | ||
| 983 | pix->bytesperline = soc_mbus_bytes_per_line(pix->width, | ||
| 984 | xlate->host_fmt); | ||
| 985 | BUG_ON(pix->bytesperline < 0); | ||
| 982 | } | 986 | } |
| 983 | } | 987 | } |
| 984 | 988 | ||
| @@ -996,7 +1000,7 @@ static int mx2_camera_try_fmt(struct soc_camera_device *icd, | |||
| 996 | if (mf.field == V4L2_FIELD_ANY) | 1000 | if (mf.field == V4L2_FIELD_ANY) |
| 997 | mf.field = V4L2_FIELD_NONE; | 1001 | mf.field = V4L2_FIELD_NONE; |
| 998 | if (mf.field != V4L2_FIELD_NONE) { | 1002 | if (mf.field != V4L2_FIELD_NONE) { |
| 999 | dev_err(icd->dev.parent, "Field type %d unsupported.\n", | 1003 | dev_err(icd->parent, "Field type %d unsupported.\n", |
| 1000 | mf.field); | 1004 | mf.field); |
| 1001 | return -EINVAL; | 1005 | return -EINVAL; |
| 1002 | } | 1006 | } |
| @@ -1014,7 +1018,6 @@ static int mx2_camera_querycap(struct soc_camera_host *ici, | |||
| 1014 | { | 1018 | { |
| 1015 | /* cap->name is set by the friendly caller:-> */ | 1019 | /* cap->name is set by the friendly caller:-> */ |
| 1016 | strlcpy(cap->card, MX2_CAM_DRIVER_DESCRIPTION, sizeof(cap->card)); | 1020 | strlcpy(cap->card, MX2_CAM_DRIVER_DESCRIPTION, sizeof(cap->card)); |
| 1017 | cap->version = MX2_CAM_VERSION_CODE; | ||
| 1018 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING; | 1021 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING; |
| 1019 | 1022 | ||
| 1020 | return 0; | 1023 | return 0; |
| @@ -1523,3 +1526,4 @@ module_exit(mx2_camera_exit); | |||
| 1523 | MODULE_DESCRIPTION("i.MX27/i.MX25 SoC Camera Host driver"); | 1526 | MODULE_DESCRIPTION("i.MX27/i.MX25 SoC Camera Host driver"); |
| 1524 | MODULE_AUTHOR("Sascha Hauer <sha@pengutronix.de>"); | 1527 | MODULE_AUTHOR("Sascha Hauer <sha@pengutronix.de>"); |
| 1525 | MODULE_LICENSE("GPL"); | 1528 | MODULE_LICENSE("GPL"); |
| 1529 | MODULE_VERSION(MX2_CAM_VERSION); | ||
diff --git a/drivers/media/video/mx3_camera.c b/drivers/media/video/mx3_camera.c index c7680eb83664..c045b47803ad 100644 --- a/drivers/media/video/mx3_camera.c +++ b/drivers/media/video/mx3_camera.c | |||
| @@ -11,7 +11,6 @@ | |||
| 11 | 11 | ||
| 12 | #include <linux/init.h> | 12 | #include <linux/init.h> |
| 13 | #include <linux/module.h> | 13 | #include <linux/module.h> |
| 14 | #include <linux/version.h> | ||
| 15 | #include <linux/videodev2.h> | 14 | #include <linux/videodev2.h> |
| 16 | #include <linux/platform_device.h> | 15 | #include <linux/platform_device.h> |
| 17 | #include <linux/clk.h> | 16 | #include <linux/clk.h> |
| @@ -195,7 +194,7 @@ static int mx3_videobuf_setup(struct vb2_queue *vq, | |||
| 195 | unsigned long sizes[], void *alloc_ctxs[]) | 194 | unsigned long sizes[], void *alloc_ctxs[]) |
| 196 | { | 195 | { |
| 197 | struct soc_camera_device *icd = soc_camera_from_vb2q(vq); | 196 | struct soc_camera_device *icd = soc_camera_from_vb2q(vq); |
| 198 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 197 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 199 | struct mx3_camera_dev *mx3_cam = ici->priv; | 198 | struct mx3_camera_dev *mx3_cam = ici->priv; |
| 200 | int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width, | 199 | int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width, |
| 201 | icd->current_fmt->host_fmt); | 200 | icd->current_fmt->host_fmt); |
| @@ -224,7 +223,7 @@ static int mx3_videobuf_setup(struct vb2_queue *vq, | |||
| 224 | static int mx3_videobuf_prepare(struct vb2_buffer *vb) | 223 | static int mx3_videobuf_prepare(struct vb2_buffer *vb) |
| 225 | { | 224 | { |
| 226 | struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue); | 225 | struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue); |
| 227 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 226 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 228 | struct mx3_camera_dev *mx3_cam = ici->priv; | 227 | struct mx3_camera_dev *mx3_cam = ici->priv; |
| 229 | struct idmac_channel *ichan = mx3_cam->idmac_channel[0]; | 228 | struct idmac_channel *ichan = mx3_cam->idmac_channel[0]; |
| 230 | struct scatterlist *sg; | 229 | struct scatterlist *sg; |
| @@ -242,7 +241,7 @@ static int mx3_videobuf_prepare(struct vb2_buffer *vb) | |||
| 242 | new_size = bytes_per_line * icd->user_height; | 241 | new_size = bytes_per_line * icd->user_height; |
| 243 | 242 | ||
| 244 | if (vb2_plane_size(vb, 0) < new_size) { | 243 | if (vb2_plane_size(vb, 0) < new_size) { |
| 245 | dev_err(icd->dev.parent, "Buffer too small (%lu < %zu)\n", | 244 | dev_err(icd->parent, "Buffer too small (%lu < %zu)\n", |
| 246 | vb2_plane_size(vb, 0), new_size); | 245 | vb2_plane_size(vb, 0), new_size); |
| 247 | return -ENOBUFS; | 246 | return -ENOBUFS; |
| 248 | } | 247 | } |
| @@ -284,7 +283,7 @@ static enum pixel_fmt fourcc_to_ipu_pix(__u32 fourcc) | |||
| 284 | static void mx3_videobuf_queue(struct vb2_buffer *vb) | 283 | static void mx3_videobuf_queue(struct vb2_buffer *vb) |
| 285 | { | 284 | { |
| 286 | struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue); | 285 | struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue); |
| 287 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 286 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 288 | struct mx3_camera_dev *mx3_cam = ici->priv; | 287 | struct mx3_camera_dev *mx3_cam = ici->priv; |
| 289 | struct mx3_camera_buffer *buf = to_mx3_vb(vb); | 288 | struct mx3_camera_buffer *buf = to_mx3_vb(vb); |
| 290 | struct dma_async_tx_descriptor *txd = buf->txd; | 289 | struct dma_async_tx_descriptor *txd = buf->txd; |
| @@ -337,7 +336,7 @@ static void mx3_videobuf_queue(struct vb2_buffer *vb) | |||
| 337 | spin_unlock_irq(&mx3_cam->lock); | 336 | spin_unlock_irq(&mx3_cam->lock); |
| 338 | 337 | ||
| 339 | cookie = txd->tx_submit(txd); | 338 | cookie = txd->tx_submit(txd); |
| 340 | dev_dbg(icd->dev.parent, "Submitted cookie %d DMA 0x%08x\n", | 339 | dev_dbg(icd->parent, "Submitted cookie %d DMA 0x%08x\n", |
| 341 | cookie, sg_dma_address(&buf->sg)); | 340 | cookie, sg_dma_address(&buf->sg)); |
| 342 | 341 | ||
| 343 | if (cookie >= 0) | 342 | if (cookie >= 0) |
| @@ -358,13 +357,13 @@ static void mx3_videobuf_queue(struct vb2_buffer *vb) | |||
| 358 | static void mx3_videobuf_release(struct vb2_buffer *vb) | 357 | static void mx3_videobuf_release(struct vb2_buffer *vb) |
| 359 | { | 358 | { |
| 360 | struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue); | 359 | struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue); |
| 361 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 360 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 362 | struct mx3_camera_dev *mx3_cam = ici->priv; | 361 | struct mx3_camera_dev *mx3_cam = ici->priv; |
| 363 | struct mx3_camera_buffer *buf = to_mx3_vb(vb); | 362 | struct mx3_camera_buffer *buf = to_mx3_vb(vb); |
| 364 | struct dma_async_tx_descriptor *txd = buf->txd; | 363 | struct dma_async_tx_descriptor *txd = buf->txd; |
| 365 | unsigned long flags; | 364 | unsigned long flags; |
| 366 | 365 | ||
| 367 | dev_dbg(icd->dev.parent, | 366 | dev_dbg(icd->parent, |
| 368 | "Release%s DMA 0x%08x, queue %sempty\n", | 367 | "Release%s DMA 0x%08x, queue %sempty\n", |
| 369 | mx3_cam->active == buf ? " active" : "", sg_dma_address(&buf->sg), | 368 | mx3_cam->active == buf ? " active" : "", sg_dma_address(&buf->sg), |
| 370 | list_empty(&buf->queue) ? "" : "not "); | 369 | list_empty(&buf->queue) ? "" : "not "); |
| @@ -403,7 +402,7 @@ static int mx3_videobuf_init(struct vb2_buffer *vb) | |||
| 403 | static int mx3_stop_streaming(struct vb2_queue *q) | 402 | static int mx3_stop_streaming(struct vb2_queue *q) |
| 404 | { | 403 | { |
| 405 | struct soc_camera_device *icd = soc_camera_from_vb2q(q); | 404 | struct soc_camera_device *icd = soc_camera_from_vb2q(q); |
| 406 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 405 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 407 | struct mx3_camera_dev *mx3_cam = ici->priv; | 406 | struct mx3_camera_dev *mx3_cam = ici->priv; |
| 408 | struct idmac_channel *ichan = mx3_cam->idmac_channel[0]; | 407 | struct idmac_channel *ichan = mx3_cam->idmac_channel[0]; |
| 409 | struct dma_chan *chan; | 408 | struct dma_chan *chan; |
| @@ -499,7 +498,7 @@ static void mx3_camera_activate(struct mx3_camera_dev *mx3_cam, | |||
| 499 | 498 | ||
| 500 | clk_enable(mx3_cam->clk); | 499 | clk_enable(mx3_cam->clk); |
| 501 | rate = clk_round_rate(mx3_cam->clk, mx3_cam->mclk); | 500 | rate = clk_round_rate(mx3_cam->clk, mx3_cam->mclk); |
| 502 | dev_dbg(icd->dev.parent, "Set SENS_CONF to %x, rate %ld\n", conf, rate); | 501 | dev_dbg(icd->parent, "Set SENS_CONF to %x, rate %ld\n", conf, rate); |
| 503 | if (rate) | 502 | if (rate) |
| 504 | clk_set_rate(mx3_cam->clk, rate); | 503 | clk_set_rate(mx3_cam->clk, rate); |
| 505 | } | 504 | } |
| @@ -507,7 +506,7 @@ static void mx3_camera_activate(struct mx3_camera_dev *mx3_cam, | |||
| 507 | /* Called with .video_lock held */ | 506 | /* Called with .video_lock held */ |
| 508 | static int mx3_camera_add_device(struct soc_camera_device *icd) | 507 | static int mx3_camera_add_device(struct soc_camera_device *icd) |
| 509 | { | 508 | { |
| 510 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 509 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 511 | struct mx3_camera_dev *mx3_cam = ici->priv; | 510 | struct mx3_camera_dev *mx3_cam = ici->priv; |
| 512 | 511 | ||
| 513 | if (mx3_cam->icd) | 512 | if (mx3_cam->icd) |
| @@ -517,7 +516,7 @@ static int mx3_camera_add_device(struct soc_camera_device *icd) | |||
| 517 | 516 | ||
| 518 | mx3_cam->icd = icd; | 517 | mx3_cam->icd = icd; |
| 519 | 518 | ||
| 520 | dev_info(icd->dev.parent, "MX3 Camera driver attached to camera %d\n", | 519 | dev_info(icd->parent, "MX3 Camera driver attached to camera %d\n", |
| 521 | icd->devnum); | 520 | icd->devnum); |
| 522 | 521 | ||
| 523 | return 0; | 522 | return 0; |
| @@ -526,7 +525,7 @@ static int mx3_camera_add_device(struct soc_camera_device *icd) | |||
| 526 | /* Called with .video_lock held */ | 525 | /* Called with .video_lock held */ |
| 527 | static void mx3_camera_remove_device(struct soc_camera_device *icd) | 526 | static void mx3_camera_remove_device(struct soc_camera_device *icd) |
| 528 | { | 527 | { |
| 529 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 528 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 530 | struct mx3_camera_dev *mx3_cam = ici->priv; | 529 | struct mx3_camera_dev *mx3_cam = ici->priv; |
| 531 | struct idmac_channel **ichan = &mx3_cam->idmac_channel[0]; | 530 | struct idmac_channel **ichan = &mx3_cam->idmac_channel[0]; |
| 532 | 531 | ||
| @@ -541,7 +540,7 @@ static void mx3_camera_remove_device(struct soc_camera_device *icd) | |||
| 541 | 540 | ||
| 542 | mx3_cam->icd = NULL; | 541 | mx3_cam->icd = NULL; |
| 543 | 542 | ||
| 544 | dev_info(icd->dev.parent, "MX3 Camera driver detached from camera %d\n", | 543 | dev_info(icd->parent, "MX3 Camera driver detached from camera %d\n", |
| 545 | icd->devnum); | 544 | icd->devnum); |
| 546 | } | 545 | } |
| 547 | 546 | ||
| @@ -608,12 +607,12 @@ static int test_platform_param(struct mx3_camera_dev *mx3_cam, | |||
| 608 | static int mx3_camera_try_bus_param(struct soc_camera_device *icd, | 607 | static int mx3_camera_try_bus_param(struct soc_camera_device *icd, |
| 609 | const unsigned int depth) | 608 | const unsigned int depth) |
| 610 | { | 609 | { |
| 611 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 610 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 612 | struct mx3_camera_dev *mx3_cam = ici->priv; | 611 | struct mx3_camera_dev *mx3_cam = ici->priv; |
| 613 | unsigned long bus_flags, camera_flags; | 612 | unsigned long bus_flags, camera_flags; |
| 614 | int ret = test_platform_param(mx3_cam, depth, &bus_flags); | 613 | int ret = test_platform_param(mx3_cam, depth, &bus_flags); |
| 615 | 614 | ||
| 616 | dev_dbg(icd->dev.parent, "request bus width %d bit: %d\n", depth, ret); | 615 | dev_dbg(icd->parent, "request bus width %d bit: %d\n", depth, ret); |
| 617 | 616 | ||
| 618 | if (ret < 0) | 617 | if (ret < 0) |
| 619 | return ret; | 618 | return ret; |
| @@ -622,7 +621,7 @@ static int mx3_camera_try_bus_param(struct soc_camera_device *icd, | |||
| 622 | 621 | ||
| 623 | ret = soc_camera_bus_param_compatible(camera_flags, bus_flags); | 622 | ret = soc_camera_bus_param_compatible(camera_flags, bus_flags); |
| 624 | if (ret < 0) | 623 | if (ret < 0) |
| 625 | dev_warn(icd->dev.parent, | 624 | dev_warn(icd->parent, |
| 626 | "Flags incompatible: camera %lx, host %lx\n", | 625 | "Flags incompatible: camera %lx, host %lx\n", |
| 627 | camera_flags, bus_flags); | 626 | camera_flags, bus_flags); |
| 628 | 627 | ||
| @@ -676,7 +675,7 @@ static int mx3_camera_get_formats(struct soc_camera_device *icd, unsigned int id | |||
| 676 | struct soc_camera_format_xlate *xlate) | 675 | struct soc_camera_format_xlate *xlate) |
| 677 | { | 676 | { |
| 678 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | 677 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); |
| 679 | struct device *dev = icd->dev.parent; | 678 | struct device *dev = icd->parent; |
| 680 | int formats = 0, ret; | 679 | int formats = 0, ret; |
| 681 | enum v4l2_mbus_pixelcode code; | 680 | enum v4l2_mbus_pixelcode code; |
| 682 | const struct soc_mbus_pixelfmt *fmt; | 681 | const struct soc_mbus_pixelfmt *fmt; |
| @@ -688,7 +687,7 @@ static int mx3_camera_get_formats(struct soc_camera_device *icd, unsigned int id | |||
| 688 | 687 | ||
| 689 | fmt = soc_mbus_get_fmtdesc(code); | 688 | fmt = soc_mbus_get_fmtdesc(code); |
| 690 | if (!fmt) { | 689 | if (!fmt) { |
| 691 | dev_warn(icd->dev.parent, | 690 | dev_warn(icd->parent, |
| 692 | "Unsupported format code #%u: %d\n", idx, code); | 691 | "Unsupported format code #%u: %d\n", idx, code); |
| 693 | return 0; | 692 | return 0; |
| 694 | } | 693 | } |
| @@ -816,7 +815,7 @@ static int mx3_camera_set_crop(struct soc_camera_device *icd, | |||
| 816 | struct v4l2_crop *a) | 815 | struct v4l2_crop *a) |
| 817 | { | 816 | { |
| 818 | struct v4l2_rect *rect = &a->c; | 817 | struct v4l2_rect *rect = &a->c; |
| 819 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 818 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 820 | struct mx3_camera_dev *mx3_cam = ici->priv; | 819 | struct mx3_camera_dev *mx3_cam = ici->priv; |
| 821 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | 820 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); |
| 822 | struct v4l2_mbus_framefmt mf; | 821 | struct v4l2_mbus_framefmt mf; |
| @@ -849,7 +848,7 @@ static int mx3_camera_set_crop(struct soc_camera_device *icd, | |||
| 849 | configure_geometry(mx3_cam, mf.width, mf.height, | 848 | configure_geometry(mx3_cam, mf.width, mf.height, |
| 850 | icd->current_fmt->host_fmt); | 849 | icd->current_fmt->host_fmt); |
| 851 | 850 | ||
| 852 | dev_dbg(icd->dev.parent, "Sensor cropped %dx%d\n", | 851 | dev_dbg(icd->parent, "Sensor cropped %dx%d\n", |
| 853 | mf.width, mf.height); | 852 | mf.width, mf.height); |
| 854 | 853 | ||
| 855 | icd->user_width = mf.width; | 854 | icd->user_width = mf.width; |
| @@ -861,7 +860,7 @@ static int mx3_camera_set_crop(struct soc_camera_device *icd, | |||
| 861 | static int mx3_camera_set_fmt(struct soc_camera_device *icd, | 860 | static int mx3_camera_set_fmt(struct soc_camera_device *icd, |
| 862 | struct v4l2_format *f) | 861 | struct v4l2_format *f) |
| 863 | { | 862 | { |
| 864 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 863 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 865 | struct mx3_camera_dev *mx3_cam = ici->priv; | 864 | struct mx3_camera_dev *mx3_cam = ici->priv; |
| 866 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | 865 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); |
| 867 | const struct soc_camera_format_xlate *xlate; | 866 | const struct soc_camera_format_xlate *xlate; |
| @@ -871,13 +870,13 @@ static int mx3_camera_set_fmt(struct soc_camera_device *icd, | |||
| 871 | 870 | ||
| 872 | xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat); | 871 | xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat); |
| 873 | if (!xlate) { | 872 | if (!xlate) { |
| 874 | dev_warn(icd->dev.parent, "Format %x not found\n", | 873 | dev_warn(icd->parent, "Format %x not found\n", |
| 875 | pix->pixelformat); | 874 | pix->pixelformat); |
| 876 | return -EINVAL; | 875 | return -EINVAL; |
| 877 | } | 876 | } |
| 878 | 877 | ||
| 879 | stride_align(&pix->width); | 878 | stride_align(&pix->width); |
| 880 | dev_dbg(icd->dev.parent, "Set format %dx%d\n", pix->width, pix->height); | 879 | dev_dbg(icd->parent, "Set format %dx%d\n", pix->width, pix->height); |
| 881 | 880 | ||
| 882 | /* | 881 | /* |
| 883 | * Might have to perform a complete interface initialisation like in | 882 | * Might have to perform a complete interface initialisation like in |
| @@ -913,13 +912,7 @@ static int mx3_camera_set_fmt(struct soc_camera_device *icd, | |||
| 913 | pix->colorspace = mf.colorspace; | 912 | pix->colorspace = mf.colorspace; |
| 914 | icd->current_fmt = xlate; | 913 | icd->current_fmt = xlate; |
| 915 | 914 | ||
| 916 | pix->bytesperline = soc_mbus_bytes_per_line(pix->width, | 915 | dev_dbg(icd->parent, "Sensor set %dx%d\n", pix->width, pix->height); |
| 917 | xlate->host_fmt); | ||
| 918 | if (pix->bytesperline < 0) | ||
| 919 | return pix->bytesperline; | ||
| 920 | pix->sizeimage = pix->height * pix->bytesperline; | ||
| 921 | |||
| 922 | dev_dbg(icd->dev.parent, "Sensor set %dx%d\n", pix->width, pix->height); | ||
| 923 | 916 | ||
| 924 | return ret; | 917 | return ret; |
| 925 | } | 918 | } |
| @@ -936,7 +929,7 @@ static int mx3_camera_try_fmt(struct soc_camera_device *icd, | |||
| 936 | 929 | ||
| 937 | xlate = soc_camera_xlate_by_fourcc(icd, pixfmt); | 930 | xlate = soc_camera_xlate_by_fourcc(icd, pixfmt); |
| 938 | if (pixfmt && !xlate) { | 931 | if (pixfmt && !xlate) { |
| 939 | dev_warn(icd->dev.parent, "Format %x not found\n", pixfmt); | 932 | dev_warn(icd->parent, "Format %x not found\n", pixfmt); |
| 940 | return -EINVAL; | 933 | return -EINVAL; |
| 941 | } | 934 | } |
| 942 | 935 | ||
| @@ -946,12 +939,6 @@ static int mx3_camera_try_fmt(struct soc_camera_device *icd, | |||
| 946 | if (pix->width > 4096) | 939 | if (pix->width > 4096) |
| 947 | pix->width = 4096; | 940 | pix->width = 4096; |
| 948 | 941 | ||
| 949 | pix->bytesperline = soc_mbus_bytes_per_line(pix->width, | ||
| 950 | xlate->host_fmt); | ||
| 951 | if (pix->bytesperline < 0) | ||
| 952 | return pix->bytesperline; | ||
| 953 | pix->sizeimage = pix->height * pix->bytesperline; | ||
| 954 | |||
| 955 | /* limit to sensor capabilities */ | 942 | /* limit to sensor capabilities */ |
| 956 | mf.width = pix->width; | 943 | mf.width = pix->width; |
| 957 | mf.height = pix->height; | 944 | mf.height = pix->height; |
| @@ -974,7 +961,7 @@ static int mx3_camera_try_fmt(struct soc_camera_device *icd, | |||
| 974 | case V4L2_FIELD_NONE: | 961 | case V4L2_FIELD_NONE: |
| 975 | break; | 962 | break; |
| 976 | default: | 963 | default: |
| 977 | dev_err(icd->dev.parent, "Field type %d unsupported.\n", | 964 | dev_err(icd->parent, "Field type %d unsupported.\n", |
| 978 | mf.field); | 965 | mf.field); |
| 979 | ret = -EINVAL; | 966 | ret = -EINVAL; |
| 980 | } | 967 | } |
| @@ -1000,7 +987,6 @@ static int mx3_camera_querycap(struct soc_camera_host *ici, | |||
| 1000 | { | 987 | { |
| 1001 | /* cap->name is set by the firendly caller:-> */ | 988 | /* cap->name is set by the firendly caller:-> */ |
| 1002 | strlcpy(cap->card, "i.MX3x Camera", sizeof(cap->card)); | 989 | strlcpy(cap->card, "i.MX3x Camera", sizeof(cap->card)); |
| 1003 | cap->version = KERNEL_VERSION(0, 2, 2); | ||
| 1004 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING; | 990 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING; |
| 1005 | 991 | ||
| 1006 | return 0; | 992 | return 0; |
| @@ -1008,7 +994,7 @@ static int mx3_camera_querycap(struct soc_camera_host *ici, | |||
| 1008 | 994 | ||
| 1009 | static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt) | 995 | static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt) |
| 1010 | { | 996 | { |
| 1011 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 997 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 1012 | struct mx3_camera_dev *mx3_cam = ici->priv; | 998 | struct mx3_camera_dev *mx3_cam = ici->priv; |
| 1013 | unsigned long bus_flags, camera_flags, common_flags; | 999 | unsigned long bus_flags, camera_flags, common_flags; |
| 1014 | u32 dw, sens_conf; | 1000 | u32 dw, sens_conf; |
| @@ -1016,7 +1002,7 @@ static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt) | |||
| 1016 | int buswidth; | 1002 | int buswidth; |
| 1017 | int ret; | 1003 | int ret; |
| 1018 | const struct soc_camera_format_xlate *xlate; | 1004 | const struct soc_camera_format_xlate *xlate; |
| 1019 | struct device *dev = icd->dev.parent; | 1005 | struct device *dev = icd->parent; |
| 1020 | 1006 | ||
| 1021 | fmt = soc_mbus_get_fmtdesc(icd->current_fmt->code); | 1007 | fmt = soc_mbus_get_fmtdesc(icd->current_fmt->code); |
| 1022 | if (!fmt) | 1008 | if (!fmt) |
| @@ -1325,4 +1311,5 @@ module_exit(mx3_camera_exit); | |||
| 1325 | MODULE_DESCRIPTION("i.MX3x SoC Camera Host driver"); | 1311 | MODULE_DESCRIPTION("i.MX3x SoC Camera Host driver"); |
| 1326 | MODULE_AUTHOR("Guennadi Liakhovetski <lg@denx.de>"); | 1312 | MODULE_AUTHOR("Guennadi Liakhovetski <lg@denx.de>"); |
| 1327 | MODULE_LICENSE("GPL v2"); | 1313 | MODULE_LICENSE("GPL v2"); |
| 1314 | MODULE_VERSION("0.2.3"); | ||
| 1328 | MODULE_ALIAS("platform:" MX3_CAM_DRV_NAME); | 1315 | MODULE_ALIAS("platform:" MX3_CAM_DRV_NAME); |
diff --git a/drivers/media/video/omap/Kconfig b/drivers/media/video/omap/Kconfig index e63233fd2aaa..390ab094f9f2 100644 --- a/drivers/media/video/omap/Kconfig +++ b/drivers/media/video/omap/Kconfig | |||
| @@ -1,11 +1,14 @@ | |||
| 1 | config VIDEO_OMAP2_VOUT_VRFB | ||
| 2 | bool | ||
| 3 | |||
| 1 | config VIDEO_OMAP2_VOUT | 4 | config VIDEO_OMAP2_VOUT |
| 2 | tristate "OMAP2/OMAP3 V4L2-Display driver" | 5 | tristate "OMAP2/OMAP3 V4L2-Display driver" |
| 3 | depends on ARCH_OMAP2 || ARCH_OMAP3 | 6 | depends on ARCH_OMAP2 || ARCH_OMAP3 |
| 4 | select VIDEOBUF_GEN | 7 | select VIDEOBUF_GEN |
| 5 | select VIDEOBUF_DMA_CONTIG | 8 | select VIDEOBUF_DMA_CONTIG |
| 6 | select OMAP2_DSS | 9 | select OMAP2_DSS |
| 7 | select OMAP2_VRAM | 10 | select OMAP2_VRFB if ARCH_OMAP2 || ARCH_OMAP3 |
| 8 | select OMAP2_VRFB | 11 | select VIDEO_OMAP2_VOUT_VRFB if VIDEO_OMAP2_VOUT && OMAP2_VRFB |
| 9 | default n | 12 | default n |
| 10 | ---help--- | 13 | ---help--- |
| 11 | V4L2 Display driver support for OMAP2/3 based boards. | 14 | V4L2 Display driver support for OMAP2/3 based boards. |
diff --git a/drivers/media/video/omap/Makefile b/drivers/media/video/omap/Makefile index b28788070ae1..fc410b438f7d 100644 --- a/drivers/media/video/omap/Makefile +++ b/drivers/media/video/omap/Makefile | |||
| @@ -4,4 +4,5 @@ | |||
| 4 | 4 | ||
| 5 | # OMAP2/3 Display driver | 5 | # OMAP2/3 Display driver |
| 6 | omap-vout-y := omap_vout.o omap_voutlib.o | 6 | omap-vout-y := omap_vout.o omap_voutlib.o |
| 7 | omap-vout-$(CONFIG_VIDEO_OMAP2_VOUT_VRFB) += omap_vout_vrfb.o | ||
| 7 | obj-$(CONFIG_VIDEO_OMAP2_VOUT) += omap-vout.o | 8 | obj-$(CONFIG_VIDEO_OMAP2_VOUT) += omap-vout.o |
diff --git a/drivers/media/video/omap/omap_vout.c b/drivers/media/video/omap/omap_vout.c index a647894d3a71..b5ef36222440 100644 --- a/drivers/media/video/omap/omap_vout.c +++ b/drivers/media/video/omap/omap_vout.c | |||
| @@ -35,28 +35,26 @@ | |||
| 35 | #include <linux/sched.h> | 35 | #include <linux/sched.h> |
| 36 | #include <linux/types.h> | 36 | #include <linux/types.h> |
| 37 | #include <linux/platform_device.h> | 37 | #include <linux/platform_device.h> |
| 38 | #include <linux/dma-mapping.h> | ||
| 39 | #include <linux/irq.h> | 38 | #include <linux/irq.h> |
| 40 | #include <linux/videodev2.h> | 39 | #include <linux/videodev2.h> |
| 41 | #include <linux/slab.h> | 40 | #include <linux/dma-mapping.h> |
| 42 | 41 | ||
| 43 | #include <media/videobuf-dma-contig.h> | 42 | #include <media/videobuf-dma-contig.h> |
| 44 | #include <media/v4l2-device.h> | 43 | #include <media/v4l2-device.h> |
| 45 | #include <media/v4l2-ioctl.h> | 44 | #include <media/v4l2-ioctl.h> |
| 46 | 45 | ||
| 47 | #include <plat/dma.h> | 46 | #include <plat/dma.h> |
| 48 | #include <plat/vram.h> | ||
| 49 | #include <plat/vrfb.h> | 47 | #include <plat/vrfb.h> |
| 50 | #include <video/omapdss.h> | 48 | #include <video/omapdss.h> |
| 51 | 49 | ||
| 52 | #include "omap_voutlib.h" | 50 | #include "omap_voutlib.h" |
| 53 | #include "omap_voutdef.h" | 51 | #include "omap_voutdef.h" |
| 52 | #include "omap_vout_vrfb.h" | ||
| 54 | 53 | ||
| 55 | MODULE_AUTHOR("Texas Instruments"); | 54 | MODULE_AUTHOR("Texas Instruments"); |
| 56 | MODULE_DESCRIPTION("OMAP Video for Linux Video out driver"); | 55 | MODULE_DESCRIPTION("OMAP Video for Linux Video out driver"); |
| 57 | MODULE_LICENSE("GPL"); | 56 | MODULE_LICENSE("GPL"); |
| 58 | 57 | ||
| 59 | |||
| 60 | /* Driver Configuration macros */ | 58 | /* Driver Configuration macros */ |
| 61 | #define VOUT_NAME "omap_vout" | 59 | #define VOUT_NAME "omap_vout" |
| 62 | 60 | ||
| @@ -65,31 +63,6 @@ enum omap_vout_channels { | |||
| 65 | OMAP_VIDEO2, | 63 | OMAP_VIDEO2, |
| 66 | }; | 64 | }; |
| 67 | 65 | ||
| 68 | enum dma_channel_state { | ||
| 69 | DMA_CHAN_NOT_ALLOTED, | ||
| 70 | DMA_CHAN_ALLOTED, | ||
| 71 | }; | ||
| 72 | |||
| 73 | #define QQVGA_WIDTH 160 | ||
| 74 | #define QQVGA_HEIGHT 120 | ||
| 75 | |||
| 76 | /* Max Resolution supported by the driver */ | ||
| 77 | #define VID_MAX_WIDTH 1280 /* Largest width */ | ||
| 78 | #define VID_MAX_HEIGHT 720 /* Largest height */ | ||
| 79 | |||
| 80 | /* Mimimum requirement is 2x2 for DSS */ | ||
| 81 | #define VID_MIN_WIDTH 2 | ||
| 82 | #define VID_MIN_HEIGHT 2 | ||
| 83 | |||
| 84 | /* 2048 x 2048 is max res supported by OMAP display controller */ | ||
| 85 | #define MAX_PIXELS_PER_LINE 2048 | ||
| 86 | |||
| 87 | #define VRFB_TX_TIMEOUT 1000 | ||
| 88 | #define VRFB_NUM_BUFS 4 | ||
| 89 | |||
| 90 | /* Max buffer size tobe allocated during init */ | ||
| 91 | #define OMAP_VOUT_MAX_BUF_SIZE (VID_MAX_WIDTH*VID_MAX_HEIGHT*4) | ||
| 92 | |||
| 93 | static struct videobuf_queue_ops video_vbq_ops; | 66 | static struct videobuf_queue_ops video_vbq_ops; |
| 94 | /* Variables configurable through module params*/ | 67 | /* Variables configurable through module params*/ |
| 95 | static u32 video1_numbuffers = 3; | 68 | static u32 video1_numbuffers = 3; |
| @@ -172,84 +145,6 @@ static const struct v4l2_fmtdesc omap_formats[] = { | |||
| 172 | #define NUM_OUTPUT_FORMATS (ARRAY_SIZE(omap_formats)) | 145 | #define NUM_OUTPUT_FORMATS (ARRAY_SIZE(omap_formats)) |
| 173 | 146 | ||
| 174 | /* | 147 | /* |
| 175 | * Allocate buffers | ||
| 176 | */ | ||
| 177 | static unsigned long omap_vout_alloc_buffer(u32 buf_size, u32 *phys_addr) | ||
| 178 | { | ||
| 179 | u32 order, size; | ||
| 180 | unsigned long virt_addr, addr; | ||
| 181 | |||
| 182 | size = PAGE_ALIGN(buf_size); | ||
| 183 | order = get_order(size); | ||
| 184 | virt_addr = __get_free_pages(GFP_KERNEL | GFP_DMA, order); | ||
| 185 | addr = virt_addr; | ||
| 186 | |||
| 187 | if (virt_addr) { | ||
| 188 | while (size > 0) { | ||
| 189 | SetPageReserved(virt_to_page(addr)); | ||
| 190 | addr += PAGE_SIZE; | ||
| 191 | size -= PAGE_SIZE; | ||
| 192 | } | ||
| 193 | } | ||
| 194 | *phys_addr = (u32) virt_to_phys((void *) virt_addr); | ||
| 195 | return virt_addr; | ||
| 196 | } | ||
| 197 | |||
| 198 | /* | ||
| 199 | * Free buffers | ||
| 200 | */ | ||
| 201 | static void omap_vout_free_buffer(unsigned long virtaddr, u32 buf_size) | ||
| 202 | { | ||
| 203 | u32 order, size; | ||
| 204 | unsigned long addr = virtaddr; | ||
| 205 | |||
| 206 | size = PAGE_ALIGN(buf_size); | ||
| 207 | order = get_order(size); | ||
| 208 | |||
| 209 | while (size > 0) { | ||
| 210 | ClearPageReserved(virt_to_page(addr)); | ||
| 211 | addr += PAGE_SIZE; | ||
| 212 | size -= PAGE_SIZE; | ||
| 213 | } | ||
| 214 | free_pages((unsigned long) virtaddr, order); | ||
| 215 | } | ||
| 216 | |||
| 217 | /* | ||
| 218 | * Function for allocating video buffers | ||
| 219 | */ | ||
| 220 | static int omap_vout_allocate_vrfb_buffers(struct omap_vout_device *vout, | ||
| 221 | unsigned int *count, int startindex) | ||
| 222 | { | ||
| 223 | int i, j; | ||
| 224 | |||
| 225 | for (i = 0; i < *count; i++) { | ||
| 226 | if (!vout->smsshado_virt_addr[i]) { | ||
| 227 | vout->smsshado_virt_addr[i] = | ||
| 228 | omap_vout_alloc_buffer(vout->smsshado_size, | ||
| 229 | &vout->smsshado_phy_addr[i]); | ||
| 230 | } | ||
| 231 | if (!vout->smsshado_virt_addr[i] && startindex != -1) { | ||
| 232 | if (V4L2_MEMORY_MMAP == vout->memory && i >= startindex) | ||
| 233 | break; | ||
| 234 | } | ||
| 235 | if (!vout->smsshado_virt_addr[i]) { | ||
| 236 | for (j = 0; j < i; j++) { | ||
| 237 | omap_vout_free_buffer( | ||
| 238 | vout->smsshado_virt_addr[j], | ||
| 239 | vout->smsshado_size); | ||
| 240 | vout->smsshado_virt_addr[j] = 0; | ||
| 241 | vout->smsshado_phy_addr[j] = 0; | ||
| 242 | } | ||
| 243 | *count = 0; | ||
| 244 | return -ENOMEM; | ||
| 245 | } | ||
| 246 | memset((void *) vout->smsshado_virt_addr[i], 0, | ||
| 247 | vout->smsshado_size); | ||
| 248 | } | ||
| 249 | return 0; | ||
| 250 | } | ||
| 251 | |||
| 252 | /* | ||
| 253 | * Try format | 148 | * Try format |
| 254 | */ | 149 | */ |
| 255 | static int omap_vout_try_format(struct v4l2_pix_format *pix) | 150 | static int omap_vout_try_format(struct v4l2_pix_format *pix) |
| @@ -342,73 +237,9 @@ static u32 omap_vout_uservirt_to_phys(u32 virtp) | |||
| 342 | } | 237 | } |
| 343 | 238 | ||
| 344 | /* | 239 | /* |
| 345 | * Wakes up the application once the DMA transfer to VRFB space is completed. | ||
| 346 | */ | ||
| 347 | static void omap_vout_vrfb_dma_tx_callback(int lch, u16 ch_status, void *data) | ||
| 348 | { | ||
| 349 | struct vid_vrfb_dma *t = (struct vid_vrfb_dma *) data; | ||
| 350 | |||
| 351 | t->tx_status = 1; | ||
| 352 | wake_up_interruptible(&t->wait); | ||
| 353 | } | ||
| 354 | |||
| 355 | /* | ||
| 356 | * Release the VRFB context once the module exits | ||
| 357 | */ | ||
| 358 | static void omap_vout_release_vrfb(struct omap_vout_device *vout) | ||
| 359 | { | ||
| 360 | int i; | ||
| 361 | |||
| 362 | for (i = 0; i < VRFB_NUM_BUFS; i++) | ||
| 363 | omap_vrfb_release_ctx(&vout->vrfb_context[i]); | ||
| 364 | |||
| 365 | if (vout->vrfb_dma_tx.req_status == DMA_CHAN_ALLOTED) { | ||
| 366 | vout->vrfb_dma_tx.req_status = DMA_CHAN_NOT_ALLOTED; | ||
| 367 | omap_free_dma(vout->vrfb_dma_tx.dma_ch); | ||
| 368 | } | ||
| 369 | } | ||
| 370 | |||
| 371 | /* | ||
| 372 | * Return true if rotation is 90 or 270 | ||
| 373 | */ | ||
| 374 | static inline int rotate_90_or_270(const struct omap_vout_device *vout) | ||
| 375 | { | ||
| 376 | return (vout->rotation == dss_rotation_90_degree || | ||
| 377 | vout->rotation == dss_rotation_270_degree); | ||
| 378 | } | ||
| 379 | |||
| 380 | /* | ||
| 381 | * Return true if rotation is enabled | ||
| 382 | */ | ||
| 383 | static inline int rotation_enabled(const struct omap_vout_device *vout) | ||
| 384 | { | ||
| 385 | return vout->rotation || vout->mirror; | ||
| 386 | } | ||
| 387 | |||
| 388 | /* | ||
| 389 | * Reverse the rotation degree if mirroring is enabled | ||
| 390 | */ | ||
| 391 | static inline int calc_rotation(const struct omap_vout_device *vout) | ||
| 392 | { | ||
| 393 | if (!vout->mirror) | ||
| 394 | return vout->rotation; | ||
| 395 | |||
| 396 | switch (vout->rotation) { | ||
| 397 | case dss_rotation_90_degree: | ||
| 398 | return dss_rotation_270_degree; | ||
| 399 | case dss_rotation_270_degree: | ||
| 400 | return dss_rotation_90_degree; | ||
| 401 | case dss_rotation_180_degree: | ||
| 402 | return dss_rotation_0_degree; | ||
| 403 | default: | ||
| 404 | return dss_rotation_180_degree; | ||
| 405 | } | ||
| 406 | } | ||
| 407 | |||
| 408 | /* | ||
| 409 | * Free the V4L2 buffers | 240 | * Free the V4L2 buffers |
| 410 | */ | 241 | */ |
| 411 | static void omap_vout_free_buffers(struct omap_vout_device *vout) | 242 | void omap_vout_free_buffers(struct omap_vout_device *vout) |
| 412 | { | 243 | { |
| 413 | int i, numbuffers; | 244 | int i, numbuffers; |
| 414 | 245 | ||
| @@ -425,52 +256,6 @@ static void omap_vout_free_buffers(struct omap_vout_device *vout) | |||
| 425 | } | 256 | } |
| 426 | 257 | ||
| 427 | /* | 258 | /* |
| 428 | * Free VRFB buffers | ||
| 429 | */ | ||
| 430 | static void omap_vout_free_vrfb_buffers(struct omap_vout_device *vout) | ||
| 431 | { | ||
| 432 | int j; | ||
| 433 | |||
| 434 | for (j = 0; j < VRFB_NUM_BUFS; j++) { | ||
| 435 | omap_vout_free_buffer(vout->smsshado_virt_addr[j], | ||
| 436 | vout->smsshado_size); | ||
| 437 | vout->smsshado_virt_addr[j] = 0; | ||
| 438 | vout->smsshado_phy_addr[j] = 0; | ||
| 439 | } | ||
| 440 | } | ||
| 441 | |||
| 442 | /* | ||
| 443 | * Allocate the buffers for the VRFB space. Data is copied from V4L2 | ||
| 444 | * buffers to the VRFB buffers using the DMA engine. | ||
| 445 | */ | ||
| 446 | static int omap_vout_vrfb_buffer_setup(struct omap_vout_device *vout, | ||
| 447 | unsigned int *count, unsigned int startindex) | ||
| 448 | { | ||
| 449 | int i; | ||
| 450 | bool yuv_mode; | ||
| 451 | |||
| 452 | /* Allocate the VRFB buffers only if the buffers are not | ||
| 453 | * allocated during init time. | ||
| 454 | */ | ||
| 455 | if ((rotation_enabled(vout)) && !vout->vrfb_static_allocation) | ||
| 456 | if (omap_vout_allocate_vrfb_buffers(vout, count, startindex)) | ||
| 457 | return -ENOMEM; | ||
| 458 | |||
| 459 | if (vout->dss_mode == OMAP_DSS_COLOR_YUV2 || | ||
| 460 | vout->dss_mode == OMAP_DSS_COLOR_UYVY) | ||
| 461 | yuv_mode = true; | ||
| 462 | else | ||
| 463 | yuv_mode = false; | ||
| 464 | |||
| 465 | for (i = 0; i < *count; i++) | ||
| 466 | omap_vrfb_setup(&vout->vrfb_context[i], | ||
| 467 | vout->smsshado_phy_addr[i], vout->pix.width, | ||
| 468 | vout->pix.height, vout->bpp, yuv_mode); | ||
| 469 | |||
| 470 | return 0; | ||
| 471 | } | ||
| 472 | |||
| 473 | /* | ||
| 474 | * Convert V4L2 rotation to DSS rotation | 259 | * Convert V4L2 rotation to DSS rotation |
| 475 | * V4L2 understand 0, 90, 180, 270. | 260 | * V4L2 understand 0, 90, 180, 270. |
| 476 | * Convert to 0, 1, 2 and 3 respectively for DSS | 261 | * Convert to 0, 1, 2 and 3 respectively for DSS |
| @@ -499,124 +284,38 @@ static int v4l2_rot_to_dss_rot(int v4l2_rotation, | |||
| 499 | return ret; | 284 | return ret; |
| 500 | } | 285 | } |
| 501 | 286 | ||
| 502 | /* | ||
| 503 | * Calculate the buffer offsets from which the streaming should | ||
| 504 | * start. This offset calculation is mainly required because of | ||
| 505 | * the VRFB 32 pixels alignment with rotation. | ||
| 506 | */ | ||
| 507 | static int omap_vout_calculate_offset(struct omap_vout_device *vout) | 287 | static int omap_vout_calculate_offset(struct omap_vout_device *vout) |
| 508 | { | 288 | { |
| 509 | struct omap_overlay *ovl; | ||
| 510 | enum dss_rotation rotation; | ||
| 511 | struct omapvideo_info *ovid; | 289 | struct omapvideo_info *ovid; |
| 512 | bool mirroring = vout->mirror; | ||
| 513 | struct omap_dss_device *cur_display; | ||
| 514 | struct v4l2_rect *crop = &vout->crop; | 290 | struct v4l2_rect *crop = &vout->crop; |
| 515 | struct v4l2_pix_format *pix = &vout->pix; | 291 | struct v4l2_pix_format *pix = &vout->pix; |
| 516 | int *cropped_offset = &vout->cropped_offset; | 292 | int *cropped_offset = &vout->cropped_offset; |
| 517 | int vr_ps = 1, ps = 2, temp_ps = 2; | 293 | int ps = 2, line_length = 0; |
| 518 | int offset = 0, ctop = 0, cleft = 0, line_length = 0; | ||
| 519 | 294 | ||
| 520 | ovid = &vout->vid_info; | 295 | ovid = &vout->vid_info; |
| 521 | ovl = ovid->overlays[0]; | ||
| 522 | /* get the display device attached to the overlay */ | ||
| 523 | if (!ovl->manager || !ovl->manager->device) | ||
| 524 | return -1; | ||
| 525 | 296 | ||
| 526 | cur_display = ovl->manager->device; | 297 | if (ovid->rotation_type == VOUT_ROT_VRFB) { |
| 527 | rotation = calc_rotation(vout); | 298 | omap_vout_calculate_vrfb_offset(vout); |
| 299 | } else { | ||
| 300 | vout->line_length = line_length = pix->width; | ||
| 528 | 301 | ||
| 529 | if (V4L2_PIX_FMT_YUYV == pix->pixelformat || | 302 | if (V4L2_PIX_FMT_YUYV == pix->pixelformat || |
| 530 | V4L2_PIX_FMT_UYVY == pix->pixelformat) { | 303 | V4L2_PIX_FMT_UYVY == pix->pixelformat) |
| 531 | if (rotation_enabled(vout)) { | 304 | ps = 2; |
| 532 | /* | 305 | else if (V4L2_PIX_FMT_RGB32 == pix->pixelformat) |
| 533 | * ps - Actual pixel size for YUYV/UYVY for | ||
| 534 | * VRFB/Mirroring is 4 bytes | ||
| 535 | * vr_ps - Virtually pixel size for YUYV/UYVY is | ||
| 536 | * 2 bytes | ||
| 537 | */ | ||
| 538 | ps = 4; | 306 | ps = 4; |
| 539 | vr_ps = 2; | 307 | else if (V4L2_PIX_FMT_RGB24 == pix->pixelformat) |
| 540 | } else { | 308 | ps = 3; |
| 541 | ps = 2; /* otherwise the pixel size is 2 byte */ | ||
| 542 | } | ||
| 543 | } else if (V4L2_PIX_FMT_RGB32 == pix->pixelformat) { | ||
| 544 | ps = 4; | ||
| 545 | } else if (V4L2_PIX_FMT_RGB24 == pix->pixelformat) { | ||
| 546 | ps = 3; | ||
| 547 | } | ||
| 548 | vout->ps = ps; | ||
| 549 | vout->vr_ps = vr_ps; | ||
| 550 | |||
| 551 | if (rotation_enabled(vout)) { | ||
| 552 | line_length = MAX_PIXELS_PER_LINE; | ||
| 553 | ctop = (pix->height - crop->height) - crop->top; | ||
| 554 | cleft = (pix->width - crop->width) - crop->left; | ||
| 555 | } else { | ||
| 556 | line_length = pix->width; | ||
| 557 | } | ||
| 558 | vout->line_length = line_length; | ||
| 559 | switch (rotation) { | ||
| 560 | case dss_rotation_90_degree: | ||
| 561 | offset = vout->vrfb_context[0].yoffset * | ||
| 562 | vout->vrfb_context[0].bytespp; | ||
| 563 | temp_ps = ps / vr_ps; | ||
| 564 | if (mirroring == 0) { | ||
| 565 | *cropped_offset = offset + line_length * | ||
| 566 | temp_ps * cleft + crop->top * temp_ps; | ||
| 567 | } else { | ||
| 568 | *cropped_offset = offset + line_length * temp_ps * | ||
| 569 | cleft + crop->top * temp_ps + (line_length * | ||
| 570 | ((crop->width / (vr_ps)) - 1) * ps); | ||
| 571 | } | ||
| 572 | break; | ||
| 573 | case dss_rotation_180_degree: | ||
| 574 | offset = ((MAX_PIXELS_PER_LINE * vout->vrfb_context[0].yoffset * | ||
| 575 | vout->vrfb_context[0].bytespp) + | ||
| 576 | (vout->vrfb_context[0].xoffset * | ||
| 577 | vout->vrfb_context[0].bytespp)); | ||
| 578 | if (mirroring == 0) { | ||
| 579 | *cropped_offset = offset + (line_length * ps * ctop) + | ||
| 580 | (cleft / vr_ps) * ps; | ||
| 581 | 309 | ||
| 582 | } else { | 310 | vout->ps = ps; |
| 583 | *cropped_offset = offset + (line_length * ps * ctop) + | 311 | |
| 584 | (cleft / vr_ps) * ps + (line_length * | 312 | *cropped_offset = (line_length * ps) * |
| 585 | (crop->height - 1) * ps); | 313 | crop->top + crop->left * ps; |
| 586 | } | ||
| 587 | break; | ||
| 588 | case dss_rotation_270_degree: | ||
| 589 | offset = MAX_PIXELS_PER_LINE * vout->vrfb_context[0].xoffset * | ||
| 590 | vout->vrfb_context[0].bytespp; | ||
| 591 | temp_ps = ps / vr_ps; | ||
| 592 | if (mirroring == 0) { | ||
| 593 | *cropped_offset = offset + line_length * | ||
| 594 | temp_ps * crop->left + ctop * ps; | ||
| 595 | } else { | ||
| 596 | *cropped_offset = offset + line_length * | ||
| 597 | temp_ps * crop->left + ctop * ps + | ||
| 598 | (line_length * ((crop->width / vr_ps) - 1) * | ||
| 599 | ps); | ||
| 600 | } | ||
| 601 | break; | ||
| 602 | case dss_rotation_0_degree: | ||
| 603 | if (mirroring == 0) { | ||
| 604 | *cropped_offset = (line_length * ps) * | ||
| 605 | crop->top + (crop->left / vr_ps) * ps; | ||
| 606 | } else { | ||
| 607 | *cropped_offset = (line_length * ps) * | ||
| 608 | crop->top + (crop->left / vr_ps) * ps + | ||
| 609 | (line_length * (crop->height - 1) * ps); | ||
| 610 | } | ||
| 611 | break; | ||
| 612 | default: | ||
| 613 | *cropped_offset = (line_length * ps * crop->top) / | ||
| 614 | vr_ps + (crop->left * ps) / vr_ps + | ||
| 615 | ((crop->width / vr_ps) - 1) * ps; | ||
| 616 | break; | ||
| 617 | } | 314 | } |
| 315 | |||
| 618 | v4l2_dbg(1, debug, &vout->vid_dev->v4l2_dev, "%s Offset:%x\n", | 316 | v4l2_dbg(1, debug, &vout->vid_dev->v4l2_dev, "%s Offset:%x\n", |
| 619 | __func__, *cropped_offset); | 317 | __func__, vout->cropped_offset); |
| 318 | |||
| 620 | return 0; | 319 | return 0; |
| 621 | } | 320 | } |
| 622 | 321 | ||
| @@ -664,7 +363,7 @@ static int video_mode_to_dss_mode(struct omap_vout_device *vout) | |||
| 664 | /* | 363 | /* |
| 665 | * Setup the overlay | 364 | * Setup the overlay |
| 666 | */ | 365 | */ |
| 667 | int omapvid_setup_overlay(struct omap_vout_device *vout, | 366 | static int omapvid_setup_overlay(struct omap_vout_device *vout, |
| 668 | struct omap_overlay *ovl, int posx, int posy, int outw, | 367 | struct omap_overlay *ovl, int posx, int posy, int outw, |
| 669 | int outh, u32 addr) | 368 | int outh, u32 addr) |
| 670 | { | 369 | { |
| @@ -687,7 +386,7 @@ int omapvid_setup_overlay(struct omap_vout_device *vout, | |||
| 687 | /* Setup the input plane parameters according to | 386 | /* Setup the input plane parameters according to |
| 688 | * rotation value selected. | 387 | * rotation value selected. |
| 689 | */ | 388 | */ |
| 690 | if (rotate_90_or_270(vout)) { | 389 | if (is_rotation_90_or_270(vout)) { |
| 691 | cropheight = vout->crop.width; | 390 | cropheight = vout->crop.width; |
| 692 | cropwidth = vout->crop.height; | 391 | cropwidth = vout->crop.height; |
| 693 | pixheight = vout->pix.width; | 392 | pixheight = vout->pix.width; |
| @@ -711,7 +410,7 @@ int omapvid_setup_overlay(struct omap_vout_device *vout, | |||
| 711 | info.out_width = outw; | 410 | info.out_width = outw; |
| 712 | info.out_height = outh; | 411 | info.out_height = outh; |
| 713 | info.global_alpha = vout->win.global_alpha; | 412 | info.global_alpha = vout->win.global_alpha; |
| 714 | if (!rotation_enabled(vout)) { | 413 | if (!is_rotation_enabled(vout)) { |
| 715 | info.rotation = 0; | 414 | info.rotation = 0; |
| 716 | info.rotation_type = OMAP_DSS_ROT_DMA; | 415 | info.rotation_type = OMAP_DSS_ROT_DMA; |
| 717 | info.screen_width = pixwidth; | 416 | info.screen_width = pixwidth; |
| @@ -744,7 +443,7 @@ setup_ovl_err: | |||
| 744 | /* | 443 | /* |
| 745 | * Initialize the overlay structure | 444 | * Initialize the overlay structure |
| 746 | */ | 445 | */ |
| 747 | int omapvid_init(struct omap_vout_device *vout, u32 addr) | 446 | static int omapvid_init(struct omap_vout_device *vout, u32 addr) |
| 748 | { | 447 | { |
| 749 | int ret = 0, i; | 448 | int ret = 0, i; |
| 750 | struct v4l2_window *win; | 449 | struct v4l2_window *win; |
| @@ -809,7 +508,7 @@ omapvid_init_err: | |||
| 809 | /* | 508 | /* |
| 810 | * Apply the changes set the go bit of DSS | 509 | * Apply the changes set the go bit of DSS |
| 811 | */ | 510 | */ |
| 812 | int omapvid_apply_changes(struct omap_vout_device *vout) | 511 | static int omapvid_apply_changes(struct omap_vout_device *vout) |
| 813 | { | 512 | { |
| 814 | int i; | 513 | int i; |
| 815 | struct omap_overlay *ovl; | 514 | struct omap_overlay *ovl; |
| @@ -825,7 +524,7 @@ int omapvid_apply_changes(struct omap_vout_device *vout) | |||
| 825 | return 0; | 524 | return 0; |
| 826 | } | 525 | } |
| 827 | 526 | ||
| 828 | void omap_vout_isr(void *arg, unsigned int irqstatus) | 527 | static void omap_vout_isr(void *arg, unsigned int irqstatus) |
| 829 | { | 528 | { |
| 830 | int ret; | 529 | int ret; |
| 831 | u32 addr, fid; | 530 | u32 addr, fid; |
| @@ -848,10 +547,20 @@ void omap_vout_isr(void *arg, unsigned int irqstatus) | |||
| 848 | 547 | ||
| 849 | spin_lock(&vout->vbq_lock); | 548 | spin_lock(&vout->vbq_lock); |
| 850 | do_gettimeofday(&timevalue); | 549 | do_gettimeofday(&timevalue); |
| 851 | if (cur_display->type == OMAP_DISPLAY_TYPE_DPI) { | ||
| 852 | if (!(irqstatus & DISPC_IRQ_VSYNC)) | ||
| 853 | goto vout_isr_err; | ||
| 854 | 550 | ||
| 551 | if (cur_display->type != OMAP_DISPLAY_TYPE_VENC) { | ||
| 552 | switch (cur_display->type) { | ||
| 553 | case OMAP_DISPLAY_TYPE_DPI: | ||
| 554 | if (!(irqstatus & (DISPC_IRQ_VSYNC | DISPC_IRQ_VSYNC2))) | ||
| 555 | goto vout_isr_err; | ||
| 556 | break; | ||
| 557 | case OMAP_DISPLAY_TYPE_HDMI: | ||
| 558 | if (!(irqstatus & DISPC_IRQ_EVSYNC_EVEN)) | ||
| 559 | goto vout_isr_err; | ||
| 560 | break; | ||
| 561 | default: | ||
| 562 | goto vout_isr_err; | ||
| 563 | } | ||
| 855 | if (!vout->first_int && (vout->cur_frm != vout->next_frm)) { | 564 | if (!vout->first_int && (vout->cur_frm != vout->next_frm)) { |
| 856 | vout->cur_frm->ts = timevalue; | 565 | vout->cur_frm->ts = timevalue; |
| 857 | vout->cur_frm->state = VIDEOBUF_DONE; | 566 | vout->cur_frm->state = VIDEOBUF_DONE; |
| @@ -875,7 +584,7 @@ void omap_vout_isr(void *arg, unsigned int irqstatus) | |||
| 875 | ret = omapvid_init(vout, addr); | 584 | ret = omapvid_init(vout, addr); |
| 876 | if (ret) | 585 | if (ret) |
| 877 | printk(KERN_ERR VOUT_NAME | 586 | printk(KERN_ERR VOUT_NAME |
| 878 | "failed to set overlay info\n"); | 587 | "failed to set overlay info\n"); |
| 879 | /* Enable the pipeline and set the Go bit */ | 588 | /* Enable the pipeline and set the Go bit */ |
| 880 | ret = omapvid_apply_changes(vout); | 589 | ret = omapvid_apply_changes(vout); |
| 881 | if (ret) | 590 | if (ret) |
| @@ -954,6 +663,7 @@ static int omap_vout_buffer_setup(struct videobuf_queue *q, unsigned int *count, | |||
| 954 | int startindex = 0, i, j; | 663 | int startindex = 0, i, j; |
| 955 | u32 phy_addr = 0, virt_addr = 0; | 664 | u32 phy_addr = 0, virt_addr = 0; |
| 956 | struct omap_vout_device *vout = q->priv_data; | 665 | struct omap_vout_device *vout = q->priv_data; |
| 666 | struct omapvideo_info *ovid = &vout->vid_info; | ||
| 957 | 667 | ||
| 958 | if (!vout) | 668 | if (!vout) |
| 959 | return -EINVAL; | 669 | return -EINVAL; |
| @@ -966,13 +676,10 @@ static int omap_vout_buffer_setup(struct videobuf_queue *q, unsigned int *count, | |||
| 966 | if (V4L2_MEMORY_MMAP == vout->memory && *count < startindex) | 676 | if (V4L2_MEMORY_MMAP == vout->memory && *count < startindex) |
| 967 | *count = startindex; | 677 | *count = startindex; |
| 968 | 678 | ||
| 969 | if ((rotation_enabled(vout)) && *count > VRFB_NUM_BUFS) | 679 | if (ovid->rotation_type == VOUT_ROT_VRFB) { |
| 970 | *count = VRFB_NUM_BUFS; | ||
| 971 | |||
| 972 | /* If rotation is enabled, allocate memory for VRFB space also */ | ||
| 973 | if (rotation_enabled(vout)) | ||
| 974 | if (omap_vout_vrfb_buffer_setup(vout, count, startindex)) | 680 | if (omap_vout_vrfb_buffer_setup(vout, count, startindex)) |
| 975 | return -ENOMEM; | 681 | return -ENOMEM; |
| 682 | } | ||
| 976 | 683 | ||
| 977 | if (V4L2_MEMORY_MMAP != vout->memory) | 684 | if (V4L2_MEMORY_MMAP != vout->memory) |
| 978 | return 0; | 685 | return 0; |
| @@ -996,8 +703,11 @@ static int omap_vout_buffer_setup(struct videobuf_queue *q, unsigned int *count, | |||
| 996 | virt_addr = omap_vout_alloc_buffer(vout->buffer_size, | 703 | virt_addr = omap_vout_alloc_buffer(vout->buffer_size, |
| 997 | &phy_addr); | 704 | &phy_addr); |
| 998 | if (!virt_addr) { | 705 | if (!virt_addr) { |
| 999 | if (!rotation_enabled(vout)) | 706 | if (ovid->rotation_type == VOUT_ROT_NONE) { |
| 1000 | break; | 707 | break; |
| 708 | } else { | ||
| 709 | if (!is_rotation_enabled(vout)) | ||
| 710 | break; | ||
| 1001 | /* Free the VRFB buffers if no space for V4L2 buffers */ | 711 | /* Free the VRFB buffers if no space for V4L2 buffers */ |
| 1002 | for (j = i; j < *count; j++) { | 712 | for (j = i; j < *count; j++) { |
| 1003 | omap_vout_free_buffer( | 713 | omap_vout_free_buffer( |
| @@ -1005,6 +715,7 @@ static int omap_vout_buffer_setup(struct videobuf_queue *q, unsigned int *count, | |||
| 1005 | vout->smsshado_size); | 715 | vout->smsshado_size); |
| 1006 | vout->smsshado_virt_addr[j] = 0; | 716 | vout->smsshado_virt_addr[j] = 0; |
| 1007 | vout->smsshado_phy_addr[j] = 0; | 717 | vout->smsshado_phy_addr[j] = 0; |
| 718 | } | ||
| 1008 | } | 719 | } |
| 1009 | } | 720 | } |
| 1010 | vout->buf_virt_addr[i] = virt_addr; | 721 | vout->buf_virt_addr[i] = virt_addr; |
| @@ -1017,9 +728,9 @@ static int omap_vout_buffer_setup(struct videobuf_queue *q, unsigned int *count, | |||
| 1017 | 728 | ||
| 1018 | /* | 729 | /* |
| 1019 | * Free the V4L2 buffers additionally allocated than default | 730 | * Free the V4L2 buffers additionally allocated than default |
| 1020 | * number of buffers and free all the VRFB buffers | 731 | * number of buffers |
| 1021 | */ | 732 | */ |
| 1022 | static void omap_vout_free_allbuffers(struct omap_vout_device *vout) | 733 | static void omap_vout_free_extra_buffers(struct omap_vout_device *vout) |
| 1023 | { | 734 | { |
| 1024 | int num_buffers = 0, i; | 735 | int num_buffers = 0, i; |
| 1025 | 736 | ||
| @@ -1034,20 +745,6 @@ static void omap_vout_free_allbuffers(struct omap_vout_device *vout) | |||
| 1034 | vout->buf_virt_addr[i] = 0; | 745 | vout->buf_virt_addr[i] = 0; |
| 1035 | vout->buf_phy_addr[i] = 0; | 746 | vout->buf_phy_addr[i] = 0; |
| 1036 | } | 747 | } |
| 1037 | /* Free the VRFB buffers only if they are allocated | ||
| 1038 | * during reqbufs. Don't free if init time allocated | ||
| 1039 | */ | ||
| 1040 | if (!vout->vrfb_static_allocation) { | ||
| 1041 | for (i = 0; i < VRFB_NUM_BUFS; i++) { | ||
| 1042 | if (vout->smsshado_virt_addr[i]) { | ||
| 1043 | omap_vout_free_buffer( | ||
| 1044 | vout->smsshado_virt_addr[i], | ||
| 1045 | vout->smsshado_size); | ||
| 1046 | vout->smsshado_virt_addr[i] = 0; | ||
| 1047 | vout->smsshado_phy_addr[i] = 0; | ||
| 1048 | } | ||
| 1049 | } | ||
| 1050 | } | ||
| 1051 | vout->buffer_allocated = num_buffers; | 748 | vout->buffer_allocated = num_buffers; |
| 1052 | } | 749 | } |
| 1053 | 750 | ||
| @@ -1059,16 +756,11 @@ static void omap_vout_free_allbuffers(struct omap_vout_device *vout) | |||
| 1059 | * buffer into VRFB memory space before giving it to the DSS. | 756 | * buffer into VRFB memory space before giving it to the DSS. |
| 1060 | */ | 757 | */ |
| 1061 | static int omap_vout_buffer_prepare(struct videobuf_queue *q, | 758 | static int omap_vout_buffer_prepare(struct videobuf_queue *q, |
| 1062 | struct videobuf_buffer *vb, | 759 | struct videobuf_buffer *vb, |
| 1063 | enum v4l2_field field) | 760 | enum v4l2_field field) |
| 1064 | { | 761 | { |
| 1065 | dma_addr_t dmabuf; | ||
| 1066 | struct vid_vrfb_dma *tx; | ||
| 1067 | enum dss_rotation rotation; | ||
| 1068 | struct omap_vout_device *vout = q->priv_data; | 762 | struct omap_vout_device *vout = q->priv_data; |
| 1069 | u32 dest_frame_index = 0, src_element_index = 0; | 763 | struct omapvideo_info *ovid = &vout->vid_info; |
| 1070 | u32 dest_element_index = 0, src_frame_index = 0; | ||
| 1071 | u32 elem_count = 0, frame_count = 0, pixsize = 2; | ||
| 1072 | 764 | ||
| 1073 | if (VIDEOBUF_NEEDS_INIT == vb->state) { | 765 | if (VIDEOBUF_NEEDS_INIT == vb->state) { |
| 1074 | vb->width = vout->pix.width; | 766 | vb->width = vout->pix.width; |
| @@ -1087,66 +779,24 @@ static int omap_vout_buffer_prepare(struct videobuf_queue *q, | |||
| 1087 | vout->queued_buf_addr[vb->i] = (u8 *) | 779 | vout->queued_buf_addr[vb->i] = (u8 *) |
| 1088 | omap_vout_uservirt_to_phys(vb->baddr); | 780 | omap_vout_uservirt_to_phys(vb->baddr); |
| 1089 | } else { | 781 | } else { |
| 1090 | vout->queued_buf_addr[vb->i] = (u8 *)vout->buf_phy_addr[vb->i]; | 782 | u32 addr, dma_addr; |
| 1091 | } | 783 | unsigned long size; |
| 1092 | 784 | ||
| 1093 | if (!rotation_enabled(vout)) | 785 | addr = (unsigned long) vout->buf_virt_addr[vb->i]; |
| 1094 | return 0; | 786 | size = (unsigned long) vb->size; |
| 1095 | 787 | ||
| 1096 | dmabuf = vout->buf_phy_addr[vb->i]; | 788 | dma_addr = dma_map_single(vout->vid_dev->v4l2_dev.dev, (void *) addr, |
| 1097 | /* If rotation is enabled, copy input buffer into VRFB | 789 | size, DMA_TO_DEVICE); |
| 1098 | * memory space using DMA. We are copying input buffer | 790 | if (dma_mapping_error(vout->vid_dev->v4l2_dev.dev, dma_addr)) |
| 1099 | * into VRFB memory space of desired angle and DSS will | 791 | v4l2_err(&vout->vid_dev->v4l2_dev, "dma_map_single failed\n"); |
| 1100 | * read image VRFB memory for 0 degree angle | ||
| 1101 | */ | ||
| 1102 | pixsize = vout->bpp * vout->vrfb_bpp; | ||
| 1103 | /* | ||
| 1104 | * DMA transfer in double index mode | ||
| 1105 | */ | ||
| 1106 | 792 | ||
| 1107 | /* Frame index */ | 793 | vout->queued_buf_addr[vb->i] = (u8 *)vout->buf_phy_addr[vb->i]; |
| 1108 | dest_frame_index = ((MAX_PIXELS_PER_LINE * pixsize) - | ||
| 1109 | (vout->pix.width * vout->bpp)) + 1; | ||
| 1110 | |||
| 1111 | /* Source and destination parameters */ | ||
| 1112 | src_element_index = 0; | ||
| 1113 | src_frame_index = 0; | ||
| 1114 | dest_element_index = 1; | ||
| 1115 | /* Number of elements per frame */ | ||
| 1116 | elem_count = vout->pix.width * vout->bpp; | ||
| 1117 | frame_count = vout->pix.height; | ||
| 1118 | tx = &vout->vrfb_dma_tx; | ||
| 1119 | tx->tx_status = 0; | ||
| 1120 | omap_set_dma_transfer_params(tx->dma_ch, OMAP_DMA_DATA_TYPE_S32, | ||
| 1121 | (elem_count / 4), frame_count, OMAP_DMA_SYNC_ELEMENT, | ||
| 1122 | tx->dev_id, 0x0); | ||
| 1123 | /* src_port required only for OMAP1 */ | ||
| 1124 | omap_set_dma_src_params(tx->dma_ch, 0, OMAP_DMA_AMODE_POST_INC, | ||
| 1125 | dmabuf, src_element_index, src_frame_index); | ||
| 1126 | /*set dma source burst mode for VRFB */ | ||
| 1127 | omap_set_dma_src_burst_mode(tx->dma_ch, OMAP_DMA_DATA_BURST_16); | ||
| 1128 | rotation = calc_rotation(vout); | ||
| 1129 | |||
| 1130 | /* dest_port required only for OMAP1 */ | ||
| 1131 | omap_set_dma_dest_params(tx->dma_ch, 0, OMAP_DMA_AMODE_DOUBLE_IDX, | ||
| 1132 | vout->vrfb_context[vb->i].paddr[0], dest_element_index, | ||
| 1133 | dest_frame_index); | ||
| 1134 | /*set dma dest burst mode for VRFB */ | ||
| 1135 | omap_set_dma_dest_burst_mode(tx->dma_ch, OMAP_DMA_DATA_BURST_16); | ||
| 1136 | omap_dma_set_global_params(DMA_DEFAULT_ARB_RATE, 0x20, 0); | ||
| 1137 | |||
| 1138 | omap_start_dma(tx->dma_ch); | ||
| 1139 | interruptible_sleep_on_timeout(&tx->wait, VRFB_TX_TIMEOUT); | ||
| 1140 | |||
| 1141 | if (tx->tx_status == 0) { | ||
| 1142 | omap_stop_dma(tx->dma_ch); | ||
| 1143 | return -EINVAL; | ||
| 1144 | } | 794 | } |
| 1145 | /* Store buffers physical address into an array. Addresses | 795 | |
| 1146 | * from this array will be used to configure DSS */ | 796 | if (ovid->rotation_type == VOUT_ROT_VRFB) |
| 1147 | vout->queued_buf_addr[vb->i] = (u8 *) | 797 | return omap_vout_prepare_vrfb(vout, vb); |
| 1148 | vout->vrfb_context[vb->i].paddr[rotation]; | 798 | else |
| 1149 | return 0; | 799 | return 0; |
| 1150 | } | 800 | } |
| 1151 | 801 | ||
| 1152 | /* | 802 | /* |
| @@ -1298,7 +948,15 @@ static int omap_vout_release(struct file *file) | |||
| 1298 | "Unable to apply changes\n"); | 948 | "Unable to apply changes\n"); |
| 1299 | 949 | ||
| 1300 | /* Free all buffers */ | 950 | /* Free all buffers */ |
| 1301 | omap_vout_free_allbuffers(vout); | 951 | omap_vout_free_extra_buffers(vout); |
| 952 | |||
| 953 | /* Free the VRFB buffers only if they are allocated | ||
| 954 | * during reqbufs. Don't free if init time allocated | ||
| 955 | */ | ||
| 956 | if (ovid->rotation_type == VOUT_ROT_VRFB) { | ||
| 957 | if (!vout->vrfb_static_allocation) | ||
| 958 | omap_vout_free_vrfb_buffers(vout); | ||
| 959 | } | ||
| 1302 | videobuf_mmap_free(q); | 960 | videobuf_mmap_free(q); |
| 1303 | 961 | ||
| 1304 | /* Even if apply changes fails we should continue | 962 | /* Even if apply changes fails we should continue |
| @@ -1307,7 +965,7 @@ static int omap_vout_release(struct file *file) | |||
| 1307 | u32 mask = 0; | 965 | u32 mask = 0; |
| 1308 | 966 | ||
| 1309 | mask = DISPC_IRQ_VSYNC | DISPC_IRQ_EVSYNC_EVEN | | 967 | mask = DISPC_IRQ_VSYNC | DISPC_IRQ_EVSYNC_EVEN | |
| 1310 | DISPC_IRQ_EVSYNC_ODD; | 968 | DISPC_IRQ_EVSYNC_ODD | DISPC_IRQ_VSYNC2; |
| 1311 | omap_dispc_unregister_isr(omap_vout_isr, vout, mask); | 969 | omap_dispc_unregister_isr(omap_vout_isr, vout, mask); |
| 1312 | vout->streaming = 0; | 970 | vout->streaming = 0; |
| 1313 | 971 | ||
| @@ -1383,10 +1041,7 @@ static int vidioc_enum_fmt_vid_out(struct file *file, void *fh, | |||
| 1383 | struct v4l2_fmtdesc *fmt) | 1041 | struct v4l2_fmtdesc *fmt) |
| 1384 | { | 1042 | { |
| 1385 | int index = fmt->index; | 1043 | int index = fmt->index; |
| 1386 | enum v4l2_buf_type type = fmt->type; | ||
| 1387 | 1044 | ||
| 1388 | fmt->index = index; | ||
| 1389 | fmt->type = type; | ||
| 1390 | if (index >= NUM_OUTPUT_FORMATS) | 1045 | if (index >= NUM_OUTPUT_FORMATS) |
| 1391 | return -EINVAL; | 1046 | return -EINVAL; |
| 1392 | 1047 | ||
| @@ -1457,7 +1112,7 @@ static int vidioc_s_fmt_vid_out(struct file *file, void *fh, | |||
| 1457 | 1112 | ||
| 1458 | /* We dont support RGB24-packed mode if vrfb rotation | 1113 | /* We dont support RGB24-packed mode if vrfb rotation |
| 1459 | * is enabled*/ | 1114 | * is enabled*/ |
| 1460 | if ((rotation_enabled(vout)) && | 1115 | if ((is_rotation_enabled(vout)) && |
| 1461 | f->fmt.pix.pixelformat == V4L2_PIX_FMT_RGB24) { | 1116 | f->fmt.pix.pixelformat == V4L2_PIX_FMT_RGB24) { |
| 1462 | ret = -EINVAL; | 1117 | ret = -EINVAL; |
| 1463 | goto s_fmt_vid_out_exit; | 1118 | goto s_fmt_vid_out_exit; |
| @@ -1465,7 +1120,7 @@ static int vidioc_s_fmt_vid_out(struct file *file, void *fh, | |||
| 1465 | 1120 | ||
| 1466 | /* get the framebuffer parameters */ | 1121 | /* get the framebuffer parameters */ |
| 1467 | 1122 | ||
| 1468 | if (rotate_90_or_270(vout)) { | 1123 | if (is_rotation_90_or_270(vout)) { |
| 1469 | vout->fbuf.fmt.height = timing->x_res; | 1124 | vout->fbuf.fmt.height = timing->x_res; |
| 1470 | vout->fbuf.fmt.width = timing->y_res; | 1125 | vout->fbuf.fmt.width = timing->y_res; |
| 1471 | } else { | 1126 | } else { |
| @@ -1555,10 +1210,7 @@ static int vidioc_enum_fmt_vid_overlay(struct file *file, void *fh, | |||
| 1555 | struct v4l2_fmtdesc *fmt) | 1210 | struct v4l2_fmtdesc *fmt) |
| 1556 | { | 1211 | { |
| 1557 | int index = fmt->index; | 1212 | int index = fmt->index; |
| 1558 | enum v4l2_buf_type type = fmt->type; | ||
| 1559 | 1213 | ||
| 1560 | fmt->index = index; | ||
| 1561 | fmt->type = type; | ||
| 1562 | if (index >= NUM_OUTPUT_FORMATS) | 1214 | if (index >= NUM_OUTPUT_FORMATS) |
| 1563 | return -EINVAL; | 1215 | return -EINVAL; |
| 1564 | 1216 | ||
| @@ -1645,7 +1297,7 @@ static int vidioc_s_crop(struct file *file, void *fh, struct v4l2_crop *crop) | |||
| 1645 | /* get the display device attached to the overlay */ | 1297 | /* get the display device attached to the overlay */ |
| 1646 | timing = &ovl->manager->device->panel.timings; | 1298 | timing = &ovl->manager->device->panel.timings; |
| 1647 | 1299 | ||
| 1648 | if (rotate_90_or_270(vout)) { | 1300 | if (is_rotation_90_or_270(vout)) { |
| 1649 | vout->fbuf.fmt.height = timing->x_res; | 1301 | vout->fbuf.fmt.height = timing->x_res; |
| 1650 | vout->fbuf.fmt.width = timing->y_res; | 1302 | vout->fbuf.fmt.width = timing->y_res; |
| 1651 | } else { | 1303 | } else { |
| @@ -1725,9 +1377,17 @@ static int vidioc_s_ctrl(struct file *file, void *fh, struct v4l2_control *a) | |||
| 1725 | switch (a->id) { | 1377 | switch (a->id) { |
| 1726 | case V4L2_CID_ROTATE: | 1378 | case V4L2_CID_ROTATE: |
| 1727 | { | 1379 | { |
| 1380 | struct omapvideo_info *ovid; | ||
| 1728 | int rotation = a->value; | 1381 | int rotation = a->value; |
| 1729 | 1382 | ||
| 1383 | ovid = &vout->vid_info; | ||
| 1384 | |||
| 1730 | mutex_lock(&vout->lock); | 1385 | mutex_lock(&vout->lock); |
| 1386 | if (rotation && ovid->rotation_type == VOUT_ROT_NONE) { | ||
| 1387 | mutex_unlock(&vout->lock); | ||
| 1388 | ret = -ERANGE; | ||
| 1389 | break; | ||
| 1390 | } | ||
| 1731 | 1391 | ||
| 1732 | if (rotation && vout->pix.pixelformat == V4L2_PIX_FMT_RGB24) { | 1392 | if (rotation && vout->pix.pixelformat == V4L2_PIX_FMT_RGB24) { |
| 1733 | mutex_unlock(&vout->lock); | 1393 | mutex_unlock(&vout->lock); |
| @@ -1783,6 +1443,11 @@ static int vidioc_s_ctrl(struct file *file, void *fh, struct v4l2_control *a) | |||
| 1783 | ovl = ovid->overlays[0]; | 1443 | ovl = ovid->overlays[0]; |
| 1784 | 1444 | ||
| 1785 | mutex_lock(&vout->lock); | 1445 | mutex_lock(&vout->lock); |
| 1446 | if (mirror && ovid->rotation_type == VOUT_ROT_NONE) { | ||
| 1447 | mutex_unlock(&vout->lock); | ||
| 1448 | ret = -ERANGE; | ||
| 1449 | break; | ||
| 1450 | } | ||
| 1786 | 1451 | ||
| 1787 | if (mirror && vout->pix.pixelformat == V4L2_PIX_FMT_RGB24) { | 1452 | if (mirror && vout->pix.pixelformat == V4L2_PIX_FMT_RGB24) { |
| 1788 | mutex_unlock(&vout->lock); | 1453 | mutex_unlock(&vout->lock); |
| @@ -1893,7 +1558,7 @@ static int vidioc_qbuf(struct file *file, void *fh, | |||
| 1893 | } | 1558 | } |
| 1894 | } | 1559 | } |
| 1895 | 1560 | ||
| 1896 | if ((rotation_enabled(vout)) && | 1561 | if ((is_rotation_enabled(vout)) && |
| 1897 | vout->vrfb_dma_tx.req_status == DMA_CHAN_NOT_ALLOTED) { | 1562 | vout->vrfb_dma_tx.req_status == DMA_CHAN_NOT_ALLOTED) { |
| 1898 | v4l2_warn(&vout->vid_dev->v4l2_dev, | 1563 | v4l2_warn(&vout->vid_dev->v4l2_dev, |
| 1899 | "DMA Channel not allocated for Rotation\n"); | 1564 | "DMA Channel not allocated for Rotation\n"); |
| @@ -1908,15 +1573,28 @@ static int vidioc_dqbuf(struct file *file, void *fh, struct v4l2_buffer *b) | |||
| 1908 | struct omap_vout_device *vout = fh; | 1573 | struct omap_vout_device *vout = fh; |
| 1909 | struct videobuf_queue *q = &vout->vbq; | 1574 | struct videobuf_queue *q = &vout->vbq; |
| 1910 | 1575 | ||
| 1576 | int ret; | ||
| 1577 | u32 addr; | ||
| 1578 | unsigned long size; | ||
| 1579 | struct videobuf_buffer *vb; | ||
| 1580 | |||
| 1581 | vb = q->bufs[b->index]; | ||
| 1582 | |||
| 1911 | if (!vout->streaming) | 1583 | if (!vout->streaming) |
| 1912 | return -EINVAL; | 1584 | return -EINVAL; |
| 1913 | 1585 | ||
| 1914 | if (file->f_flags & O_NONBLOCK) | 1586 | if (file->f_flags & O_NONBLOCK) |
| 1915 | /* Call videobuf_dqbuf for non blocking mode */ | 1587 | /* Call videobuf_dqbuf for non blocking mode */ |
| 1916 | return videobuf_dqbuf(q, (struct v4l2_buffer *)b, 1); | 1588 | ret = videobuf_dqbuf(q, (struct v4l2_buffer *)b, 1); |
| 1917 | else | 1589 | else |
| 1918 | /* Call videobuf_dqbuf for blocking mode */ | 1590 | /* Call videobuf_dqbuf for blocking mode */ |
| 1919 | return videobuf_dqbuf(q, (struct v4l2_buffer *)b, 0); | 1591 | ret = videobuf_dqbuf(q, (struct v4l2_buffer *)b, 0); |
| 1592 | |||
| 1593 | addr = (unsigned long) vout->buf_phy_addr[vb->i]; | ||
| 1594 | size = (unsigned long) vb->size; | ||
| 1595 | dma_unmap_single(vout->vid_dev->v4l2_dev.dev, addr, | ||
| 1596 | size, DMA_TO_DEVICE); | ||
| 1597 | return ret; | ||
| 1920 | } | 1598 | } |
| 1921 | 1599 | ||
| 1922 | static int vidioc_streamon(struct file *file, void *fh, enum v4l2_buf_type i) | 1600 | static int vidioc_streamon(struct file *file, void *fh, enum v4l2_buf_type i) |
| @@ -1965,7 +1643,8 @@ static int vidioc_streamon(struct file *file, void *fh, enum v4l2_buf_type i) | |||
| 1965 | addr = (unsigned long) vout->queued_buf_addr[vout->cur_frm->i] | 1643 | addr = (unsigned long) vout->queued_buf_addr[vout->cur_frm->i] |
| 1966 | + vout->cropped_offset; | 1644 | + vout->cropped_offset; |
| 1967 | 1645 | ||
| 1968 | mask = DISPC_IRQ_VSYNC | DISPC_IRQ_EVSYNC_EVEN | DISPC_IRQ_EVSYNC_ODD; | 1646 | mask = DISPC_IRQ_VSYNC | DISPC_IRQ_EVSYNC_EVEN | DISPC_IRQ_EVSYNC_ODD |
| 1647 | | DISPC_IRQ_VSYNC2; | ||
| 1969 | 1648 | ||
| 1970 | omap_dispc_register_isr(omap_vout_isr, vout, mask); | 1649 | omap_dispc_register_isr(omap_vout_isr, vout, mask); |
| 1971 | 1650 | ||
| @@ -2015,7 +1694,8 @@ static int vidioc_streamoff(struct file *file, void *fh, enum v4l2_buf_type i) | |||
| 2015 | return -EINVAL; | 1694 | return -EINVAL; |
| 2016 | 1695 | ||
| 2017 | vout->streaming = 0; | 1696 | vout->streaming = 0; |
| 2018 | mask = DISPC_IRQ_VSYNC | DISPC_IRQ_EVSYNC_EVEN | DISPC_IRQ_EVSYNC_ODD; | 1697 | mask = DISPC_IRQ_VSYNC | DISPC_IRQ_EVSYNC_EVEN | DISPC_IRQ_EVSYNC_ODD |
| 1698 | | DISPC_IRQ_VSYNC2; | ||
| 2019 | 1699 | ||
| 2020 | omap_dispc_unregister_isr(omap_vout_isr, vout, mask); | 1700 | omap_dispc_unregister_isr(omap_vout_isr, vout, mask); |
| 2021 | 1701 | ||
| @@ -2228,7 +1908,8 @@ static int __init omap_vout_setup_video_data(struct omap_vout_device *vout) | |||
| 2228 | vout->mirror = 0; | 1908 | vout->mirror = 0; |
| 2229 | vout->control[2].id = V4L2_CID_HFLIP; | 1909 | vout->control[2].id = V4L2_CID_HFLIP; |
| 2230 | vout->control[2].value = 0; | 1910 | vout->control[2].value = 0; |
| 2231 | vout->vrfb_bpp = 2; | 1911 | if (vout->vid_info.rotation_type == VOUT_ROT_VRFB) |
| 1912 | vout->vrfb_bpp = 2; | ||
| 2232 | 1913 | ||
| 2233 | control[1].id = V4L2_CID_BG_COLOR; | 1914 | control[1].id = V4L2_CID_BG_COLOR; |
| 2234 | control[1].value = 0; | 1915 | control[1].value = 0; |
| @@ -2260,17 +1941,15 @@ static int __init omap_vout_setup_video_bufs(struct platform_device *pdev, | |||
| 2260 | int vid_num) | 1941 | int vid_num) |
| 2261 | { | 1942 | { |
| 2262 | u32 numbuffers; | 1943 | u32 numbuffers; |
| 2263 | int ret = 0, i, j; | 1944 | int ret = 0, i; |
| 2264 | int image_width, image_height; | 1945 | struct omapvideo_info *ovid; |
| 2265 | struct video_device *vfd; | ||
| 2266 | struct omap_vout_device *vout; | 1946 | struct omap_vout_device *vout; |
| 2267 | int static_vrfb_allocation = 0, vrfb_num_bufs = VRFB_NUM_BUFS; | ||
| 2268 | struct v4l2_device *v4l2_dev = platform_get_drvdata(pdev); | 1947 | struct v4l2_device *v4l2_dev = platform_get_drvdata(pdev); |
| 2269 | struct omap2video_device *vid_dev = | 1948 | struct omap2video_device *vid_dev = |
| 2270 | container_of(v4l2_dev, struct omap2video_device, v4l2_dev); | 1949 | container_of(v4l2_dev, struct omap2video_device, v4l2_dev); |
| 2271 | 1950 | ||
| 2272 | vout = vid_dev->vouts[vid_num]; | 1951 | vout = vid_dev->vouts[vid_num]; |
| 2273 | vfd = vout->vfd; | 1952 | ovid = &vout->vid_info; |
| 2274 | 1953 | ||
| 2275 | numbuffers = (vid_num == 0) ? video1_numbuffers : video2_numbuffers; | 1954 | numbuffers = (vid_num == 0) ? video1_numbuffers : video2_numbuffers; |
| 2276 | vout->buffer_size = (vid_num == 0) ? video1_bufsize : video2_bufsize; | 1955 | vout->buffer_size = (vid_num == 0) ? video1_bufsize : video2_bufsize; |
| @@ -2287,66 +1966,16 @@ static int __init omap_vout_setup_video_bufs(struct platform_device *pdev, | |||
| 2287 | } | 1966 | } |
| 2288 | } | 1967 | } |
| 2289 | 1968 | ||
| 2290 | for (i = 0; i < VRFB_NUM_BUFS; i++) { | ||
| 2291 | if (omap_vrfb_request_ctx(&vout->vrfb_context[i])) { | ||
| 2292 | dev_info(&pdev->dev, ": VRFB allocation failed\n"); | ||
| 2293 | for (j = 0; j < i; j++) | ||
| 2294 | omap_vrfb_release_ctx(&vout->vrfb_context[j]); | ||
| 2295 | ret = -ENOMEM; | ||
| 2296 | goto free_buffers; | ||
| 2297 | } | ||
| 2298 | } | ||
| 2299 | vout->cropped_offset = 0; | 1969 | vout->cropped_offset = 0; |
| 2300 | 1970 | ||
| 2301 | /* Calculate VRFB memory size */ | 1971 | if (ovid->rotation_type == VOUT_ROT_VRFB) { |
| 2302 | /* allocate for worst case size */ | 1972 | int static_vrfb_allocation = (vid_num == 0) ? |
| 2303 | image_width = VID_MAX_WIDTH / TILE_SIZE; | 1973 | vid1_static_vrfb_alloc : vid2_static_vrfb_alloc; |
| 2304 | if (VID_MAX_WIDTH % TILE_SIZE) | 1974 | ret = omap_vout_setup_vrfb_bufs(pdev, vid_num, |
| 2305 | image_width++; | 1975 | static_vrfb_allocation); |
| 2306 | |||
| 2307 | image_width = image_width * TILE_SIZE; | ||
| 2308 | image_height = VID_MAX_HEIGHT / TILE_SIZE; | ||
| 2309 | |||
| 2310 | if (VID_MAX_HEIGHT % TILE_SIZE) | ||
| 2311 | image_height++; | ||
| 2312 | |||
| 2313 | image_height = image_height * TILE_SIZE; | ||
| 2314 | vout->smsshado_size = PAGE_ALIGN(image_width * image_height * 2 * 2); | ||
| 2315 | |||
| 2316 | /* | ||
| 2317 | * Request and Initialize DMA, for DMA based VRFB transfer | ||
| 2318 | */ | ||
| 2319 | vout->vrfb_dma_tx.dev_id = OMAP_DMA_NO_DEVICE; | ||
| 2320 | vout->vrfb_dma_tx.dma_ch = -1; | ||
| 2321 | vout->vrfb_dma_tx.req_status = DMA_CHAN_ALLOTED; | ||
| 2322 | ret = omap_request_dma(vout->vrfb_dma_tx.dev_id, "VRFB DMA TX", | ||
| 2323 | omap_vout_vrfb_dma_tx_callback, | ||
| 2324 | (void *) &vout->vrfb_dma_tx, &vout->vrfb_dma_tx.dma_ch); | ||
| 2325 | if (ret < 0) { | ||
| 2326 | vout->vrfb_dma_tx.req_status = DMA_CHAN_NOT_ALLOTED; | ||
| 2327 | dev_info(&pdev->dev, ": failed to allocate DMA Channel for" | ||
| 2328 | " video%d\n", vfd->minor); | ||
| 2329 | } | ||
| 2330 | init_waitqueue_head(&vout->vrfb_dma_tx.wait); | ||
| 2331 | |||
| 2332 | /* Allocate VRFB buffers if selected through bootargs */ | ||
| 2333 | static_vrfb_allocation = (vid_num == 0) ? | ||
| 2334 | vid1_static_vrfb_alloc : vid2_static_vrfb_alloc; | ||
| 2335 | |||
| 2336 | /* statically allocated the VRFB buffer is done through | ||
| 2337 | commands line aruments */ | ||
| 2338 | if (static_vrfb_allocation) { | ||
| 2339 | if (omap_vout_allocate_vrfb_buffers(vout, &vrfb_num_bufs, -1)) { | ||
| 2340 | ret = -ENOMEM; | ||
| 2341 | goto release_vrfb_ctx; | ||
| 2342 | } | ||
| 2343 | vout->vrfb_static_allocation = 1; | ||
| 2344 | } | 1976 | } |
| 2345 | return 0; | ||
| 2346 | 1977 | ||
| 2347 | release_vrfb_ctx: | 1978 | return ret; |
| 2348 | for (j = 0; j < VRFB_NUM_BUFS; j++) | ||
| 2349 | omap_vrfb_release_ctx(&vout->vrfb_context[j]); | ||
| 2350 | 1979 | ||
| 2351 | free_buffers: | 1980 | free_buffers: |
| 2352 | for (i = 0; i < numbuffers; i++) { | 1981 | for (i = 0; i < numbuffers; i++) { |
| @@ -2389,6 +2018,10 @@ static int __init omap_vout_create_video_devices(struct platform_device *pdev) | |||
| 2389 | vout->vid_info.num_overlays = 1; | 2018 | vout->vid_info.num_overlays = 1; |
| 2390 | vout->vid_info.id = k + 1; | 2019 | vout->vid_info.id = k + 1; |
| 2391 | 2020 | ||
| 2021 | /* Set VRFB as rotation_type for omap2 and omap3 */ | ||
| 2022 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) | ||
| 2023 | vout->vid_info.rotation_type = VOUT_ROT_VRFB; | ||
| 2024 | |||
| 2392 | /* Setup the default configuration for the video devices | 2025 | /* Setup the default configuration for the video devices |
| 2393 | */ | 2026 | */ |
| 2394 | if (omap_vout_setup_video_data(vout) != 0) { | 2027 | if (omap_vout_setup_video_data(vout) != 0) { |
| @@ -2422,7 +2055,8 @@ static int __init omap_vout_create_video_devices(struct platform_device *pdev) | |||
| 2422 | goto success; | 2055 | goto success; |
| 2423 | 2056 | ||
| 2424 | error2: | 2057 | error2: |
| 2425 | omap_vout_release_vrfb(vout); | 2058 | if (vout->vid_info.rotation_type == VOUT_ROT_VRFB) |
| 2059 | omap_vout_release_vrfb(vout); | ||
| 2426 | omap_vout_free_buffers(vout); | 2060 | omap_vout_free_buffers(vout); |
| 2427 | error1: | 2061 | error1: |
| 2428 | video_device_release(vfd); | 2062 | video_device_release(vfd); |
| @@ -2443,11 +2077,13 @@ success: | |||
| 2443 | static void omap_vout_cleanup_device(struct omap_vout_device *vout) | 2077 | static void omap_vout_cleanup_device(struct omap_vout_device *vout) |
| 2444 | { | 2078 | { |
| 2445 | struct video_device *vfd; | 2079 | struct video_device *vfd; |
| 2080 | struct omapvideo_info *ovid; | ||
| 2446 | 2081 | ||
| 2447 | if (!vout) | 2082 | if (!vout) |
| 2448 | return; | 2083 | return; |
| 2449 | 2084 | ||
| 2450 | vfd = vout->vfd; | 2085 | vfd = vout->vfd; |
| 2086 | ovid = &vout->vid_info; | ||
| 2451 | if (vfd) { | 2087 | if (vfd) { |
| 2452 | if (!video_is_registered(vfd)) { | 2088 | if (!video_is_registered(vfd)) { |
| 2453 | /* | 2089 | /* |
| @@ -2463,14 +2099,15 @@ static void omap_vout_cleanup_device(struct omap_vout_device *vout) | |||
| 2463 | video_unregister_device(vfd); | 2099 | video_unregister_device(vfd); |
| 2464 | } | 2100 | } |
| 2465 | } | 2101 | } |
| 2466 | 2102 | if (ovid->rotation_type == VOUT_ROT_VRFB) { | |
| 2467 | omap_vout_release_vrfb(vout); | 2103 | omap_vout_release_vrfb(vout); |
| 2104 | /* Free the VRFB buffer if allocated | ||
| 2105 | * init time | ||
| 2106 | */ | ||
| 2107 | if (vout->vrfb_static_allocation) | ||
| 2108 | omap_vout_free_vrfb_buffers(vout); | ||
| 2109 | } | ||
| 2468 | omap_vout_free_buffers(vout); | 2110 | omap_vout_free_buffers(vout); |
| 2469 | /* Free the VRFB buffer if allocated | ||
| 2470 | * init time | ||
| 2471 | */ | ||
| 2472 | if (vout->vrfb_static_allocation) | ||
| 2473 | omap_vout_free_vrfb_buffers(vout); | ||
| 2474 | 2111 | ||
| 2475 | kfree(vout); | 2112 | kfree(vout); |
| 2476 | } | 2113 | } |
diff --git a/drivers/media/video/omap/omap_vout_vrfb.c b/drivers/media/video/omap/omap_vout_vrfb.c new file mode 100644 index 000000000000..ebebcac49225 --- /dev/null +++ b/drivers/media/video/omap/omap_vout_vrfb.c | |||
| @@ -0,0 +1,390 @@ | |||
| 1 | /* | ||
| 2 | * omap_vout_vrfb.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 2010 Texas Instruments. | ||
| 5 | * | ||
| 6 | * This file is licensed under the terms of the GNU General Public License | ||
| 7 | * version 2. This program is licensed "as is" without any warranty of any | ||
| 8 | * kind, whether express or implied. | ||
| 9 | * | ||
| 10 | */ | ||
| 11 | |||
| 12 | #include <linux/sched.h> | ||
| 13 | #include <linux/platform_device.h> | ||
| 14 | #include <linux/videodev2.h> | ||
| 15 | |||
| 16 | #include <media/videobuf-dma-contig.h> | ||
| 17 | #include <media/v4l2-device.h> | ||
| 18 | |||
| 19 | #include <plat/dma.h> | ||
| 20 | #include <plat/vrfb.h> | ||
| 21 | |||
| 22 | #include "omap_voutdef.h" | ||
| 23 | #include "omap_voutlib.h" | ||
| 24 | |||
| 25 | /* | ||
| 26 | * Function for allocating video buffers | ||
| 27 | */ | ||
| 28 | static int omap_vout_allocate_vrfb_buffers(struct omap_vout_device *vout, | ||
| 29 | unsigned int *count, int startindex) | ||
| 30 | { | ||
| 31 | int i, j; | ||
| 32 | |||
| 33 | for (i = 0; i < *count; i++) { | ||
| 34 | if (!vout->smsshado_virt_addr[i]) { | ||
| 35 | vout->smsshado_virt_addr[i] = | ||
| 36 | omap_vout_alloc_buffer(vout->smsshado_size, | ||
| 37 | &vout->smsshado_phy_addr[i]); | ||
| 38 | } | ||
| 39 | if (!vout->smsshado_virt_addr[i] && startindex != -1) { | ||
| 40 | if (V4L2_MEMORY_MMAP == vout->memory && i >= startindex) | ||
| 41 | break; | ||
| 42 | } | ||
| 43 | if (!vout->smsshado_virt_addr[i]) { | ||
| 44 | for (j = 0; j < i; j++) { | ||
| 45 | omap_vout_free_buffer( | ||
| 46 | vout->smsshado_virt_addr[j], | ||
| 47 | vout->smsshado_size); | ||
| 48 | vout->smsshado_virt_addr[j] = 0; | ||
| 49 | vout->smsshado_phy_addr[j] = 0; | ||
| 50 | } | ||
| 51 | *count = 0; | ||
| 52 | return -ENOMEM; | ||
| 53 | } | ||
| 54 | memset((void *) vout->smsshado_virt_addr[i], 0, | ||
| 55 | vout->smsshado_size); | ||
| 56 | } | ||
| 57 | return 0; | ||
| 58 | } | ||
| 59 | |||
| 60 | /* | ||
| 61 | * Wakes up the application once the DMA transfer to VRFB space is completed. | ||
| 62 | */ | ||
| 63 | static void omap_vout_vrfb_dma_tx_callback(int lch, u16 ch_status, void *data) | ||
| 64 | { | ||
| 65 | struct vid_vrfb_dma *t = (struct vid_vrfb_dma *) data; | ||
| 66 | |||
| 67 | t->tx_status = 1; | ||
| 68 | wake_up_interruptible(&t->wait); | ||
| 69 | } | ||
| 70 | |||
| 71 | /* | ||
| 72 | * Free VRFB buffers | ||
| 73 | */ | ||
| 74 | void omap_vout_free_vrfb_buffers(struct omap_vout_device *vout) | ||
| 75 | { | ||
| 76 | int j; | ||
| 77 | |||
| 78 | for (j = 0; j < VRFB_NUM_BUFS; j++) { | ||
| 79 | omap_vout_free_buffer(vout->smsshado_virt_addr[j], | ||
| 80 | vout->smsshado_size); | ||
| 81 | vout->smsshado_virt_addr[j] = 0; | ||
| 82 | vout->smsshado_phy_addr[j] = 0; | ||
| 83 | } | ||
| 84 | } | ||
| 85 | |||
| 86 | int omap_vout_setup_vrfb_bufs(struct platform_device *pdev, int vid_num, | ||
| 87 | u32 static_vrfb_allocation) | ||
| 88 | { | ||
| 89 | int ret = 0, i, j; | ||
| 90 | struct omap_vout_device *vout; | ||
| 91 | struct video_device *vfd; | ||
| 92 | int image_width, image_height; | ||
| 93 | int vrfb_num_bufs = VRFB_NUM_BUFS; | ||
| 94 | struct v4l2_device *v4l2_dev = platform_get_drvdata(pdev); | ||
| 95 | struct omap2video_device *vid_dev = | ||
| 96 | container_of(v4l2_dev, struct omap2video_device, v4l2_dev); | ||
| 97 | |||
| 98 | vout = vid_dev->vouts[vid_num]; | ||
| 99 | vfd = vout->vfd; | ||
| 100 | |||
| 101 | for (i = 0; i < VRFB_NUM_BUFS; i++) { | ||
| 102 | if (omap_vrfb_request_ctx(&vout->vrfb_context[i])) { | ||
| 103 | dev_info(&pdev->dev, ": VRFB allocation failed\n"); | ||
| 104 | for (j = 0; j < i; j++) | ||
| 105 | omap_vrfb_release_ctx(&vout->vrfb_context[j]); | ||
| 106 | ret = -ENOMEM; | ||
| 107 | goto free_buffers; | ||
| 108 | } | ||
| 109 | } | ||
| 110 | |||
| 111 | /* Calculate VRFB memory size */ | ||
| 112 | /* allocate for worst case size */ | ||
| 113 | image_width = VID_MAX_WIDTH / TILE_SIZE; | ||
| 114 | if (VID_MAX_WIDTH % TILE_SIZE) | ||
| 115 | image_width++; | ||
| 116 | |||
| 117 | image_width = image_width * TILE_SIZE; | ||
| 118 | image_height = VID_MAX_HEIGHT / TILE_SIZE; | ||
| 119 | |||
| 120 | if (VID_MAX_HEIGHT % TILE_SIZE) | ||
| 121 | image_height++; | ||
| 122 | |||
| 123 | image_height = image_height * TILE_SIZE; | ||
| 124 | vout->smsshado_size = PAGE_ALIGN(image_width * image_height * 2 * 2); | ||
| 125 | |||
| 126 | /* | ||
| 127 | * Request and Initialize DMA, for DMA based VRFB transfer | ||
| 128 | */ | ||
| 129 | vout->vrfb_dma_tx.dev_id = OMAP_DMA_NO_DEVICE; | ||
| 130 | vout->vrfb_dma_tx.dma_ch = -1; | ||
| 131 | vout->vrfb_dma_tx.req_status = DMA_CHAN_ALLOTED; | ||
| 132 | ret = omap_request_dma(vout->vrfb_dma_tx.dev_id, "VRFB DMA TX", | ||
| 133 | omap_vout_vrfb_dma_tx_callback, | ||
| 134 | (void *) &vout->vrfb_dma_tx, &vout->vrfb_dma_tx.dma_ch); | ||
| 135 | if (ret < 0) { | ||
| 136 | vout->vrfb_dma_tx.req_status = DMA_CHAN_NOT_ALLOTED; | ||
| 137 | dev_info(&pdev->dev, ": failed to allocate DMA Channel for" | ||
| 138 | " video%d\n", vfd->minor); | ||
| 139 | } | ||
| 140 | init_waitqueue_head(&vout->vrfb_dma_tx.wait); | ||
| 141 | |||
| 142 | /* statically allocated the VRFB buffer is done through | ||
| 143 | commands line aruments */ | ||
| 144 | if (static_vrfb_allocation) { | ||
| 145 | if (omap_vout_allocate_vrfb_buffers(vout, &vrfb_num_bufs, -1)) { | ||
| 146 | ret = -ENOMEM; | ||
| 147 | goto release_vrfb_ctx; | ||
| 148 | } | ||
| 149 | vout->vrfb_static_allocation = 1; | ||
| 150 | } | ||
| 151 | return 0; | ||
| 152 | |||
| 153 | release_vrfb_ctx: | ||
| 154 | for (j = 0; j < VRFB_NUM_BUFS; j++) | ||
| 155 | omap_vrfb_release_ctx(&vout->vrfb_context[j]); | ||
| 156 | free_buffers: | ||
| 157 | omap_vout_free_buffers(vout); | ||
| 158 | |||
| 159 | return ret; | ||
| 160 | } | ||
| 161 | |||
| 162 | /* | ||
| 163 | * Release the VRFB context once the module exits | ||
| 164 | */ | ||
| 165 | void omap_vout_release_vrfb(struct omap_vout_device *vout) | ||
| 166 | { | ||
| 167 | int i; | ||
| 168 | |||
| 169 | for (i = 0; i < VRFB_NUM_BUFS; i++) | ||
| 170 | omap_vrfb_release_ctx(&vout->vrfb_context[i]); | ||
| 171 | |||
| 172 | if (vout->vrfb_dma_tx.req_status == DMA_CHAN_ALLOTED) { | ||
| 173 | vout->vrfb_dma_tx.req_status = DMA_CHAN_NOT_ALLOTED; | ||
| 174 | omap_free_dma(vout->vrfb_dma_tx.dma_ch); | ||
| 175 | } | ||
| 176 | } | ||
| 177 | |||
| 178 | /* | ||
| 179 | * Allocate the buffers for the VRFB space. Data is copied from V4L2 | ||
| 180 | * buffers to the VRFB buffers using the DMA engine. | ||
| 181 | */ | ||
| 182 | int omap_vout_vrfb_buffer_setup(struct omap_vout_device *vout, | ||
| 183 | unsigned int *count, unsigned int startindex) | ||
| 184 | { | ||
| 185 | int i; | ||
| 186 | bool yuv_mode; | ||
| 187 | |||
| 188 | if (!is_rotation_enabled(vout)) | ||
| 189 | return 0; | ||
| 190 | |||
| 191 | /* If rotation is enabled, allocate memory for VRFB space also */ | ||
| 192 | *count = *count > VRFB_NUM_BUFS ? VRFB_NUM_BUFS : *count; | ||
| 193 | |||
| 194 | /* Allocate the VRFB buffers only if the buffers are not | ||
| 195 | * allocated during init time. | ||
| 196 | */ | ||
| 197 | if (!vout->vrfb_static_allocation) | ||
| 198 | if (omap_vout_allocate_vrfb_buffers(vout, count, startindex)) | ||
| 199 | return -ENOMEM; | ||
| 200 | |||
| 201 | if (vout->dss_mode == OMAP_DSS_COLOR_YUV2 || | ||
| 202 | vout->dss_mode == OMAP_DSS_COLOR_UYVY) | ||
| 203 | yuv_mode = true; | ||
| 204 | else | ||
| 205 | yuv_mode = false; | ||
| 206 | |||
| 207 | for (i = 0; i < *count; i++) | ||
| 208 | omap_vrfb_setup(&vout->vrfb_context[i], | ||
| 209 | vout->smsshado_phy_addr[i], vout->pix.width, | ||
| 210 | vout->pix.height, vout->bpp, yuv_mode); | ||
| 211 | |||
| 212 | return 0; | ||
| 213 | } | ||
| 214 | |||
| 215 | int omap_vout_prepare_vrfb(struct omap_vout_device *vout, | ||
| 216 | struct videobuf_buffer *vb) | ||
| 217 | { | ||
| 218 | dma_addr_t dmabuf; | ||
| 219 | struct vid_vrfb_dma *tx; | ||
| 220 | enum dss_rotation rotation; | ||
| 221 | u32 dest_frame_index = 0, src_element_index = 0; | ||
| 222 | u32 dest_element_index = 0, src_frame_index = 0; | ||
| 223 | u32 elem_count = 0, frame_count = 0, pixsize = 2; | ||
| 224 | |||
| 225 | if (!is_rotation_enabled(vout)) | ||
| 226 | return 0; | ||
| 227 | |||
| 228 | dmabuf = vout->buf_phy_addr[vb->i]; | ||
| 229 | /* If rotation is enabled, copy input buffer into VRFB | ||
| 230 | * memory space using DMA. We are copying input buffer | ||
| 231 | * into VRFB memory space of desired angle and DSS will | ||
| 232 | * read image VRFB memory for 0 degree angle | ||
| 233 | */ | ||
| 234 | pixsize = vout->bpp * vout->vrfb_bpp; | ||
| 235 | /* | ||
| 236 | * DMA transfer in double index mode | ||
| 237 | */ | ||
| 238 | |||
| 239 | /* Frame index */ | ||
| 240 | dest_frame_index = ((MAX_PIXELS_PER_LINE * pixsize) - | ||
| 241 | (vout->pix.width * vout->bpp)) + 1; | ||
| 242 | |||
| 243 | /* Source and destination parameters */ | ||
| 244 | src_element_index = 0; | ||
| 245 | src_frame_index = 0; | ||
| 246 | dest_element_index = 1; | ||
| 247 | /* Number of elements per frame */ | ||
| 248 | elem_count = vout->pix.width * vout->bpp; | ||
| 249 | frame_count = vout->pix.height; | ||
| 250 | tx = &vout->vrfb_dma_tx; | ||
| 251 | tx->tx_status = 0; | ||
| 252 | omap_set_dma_transfer_params(tx->dma_ch, OMAP_DMA_DATA_TYPE_S32, | ||
| 253 | (elem_count / 4), frame_count, OMAP_DMA_SYNC_ELEMENT, | ||
| 254 | tx->dev_id, 0x0); | ||
| 255 | /* src_port required only for OMAP1 */ | ||
| 256 | omap_set_dma_src_params(tx->dma_ch, 0, OMAP_DMA_AMODE_POST_INC, | ||
| 257 | dmabuf, src_element_index, src_frame_index); | ||
| 258 | /*set dma source burst mode for VRFB */ | ||
| 259 | omap_set_dma_src_burst_mode(tx->dma_ch, OMAP_DMA_DATA_BURST_16); | ||
| 260 | rotation = calc_rotation(vout); | ||
| 261 | |||
| 262 | /* dest_port required only for OMAP1 */ | ||
| 263 | omap_set_dma_dest_params(tx->dma_ch, 0, OMAP_DMA_AMODE_DOUBLE_IDX, | ||
| 264 | vout->vrfb_context[vb->i].paddr[0], dest_element_index, | ||
| 265 | dest_frame_index); | ||
| 266 | /*set dma dest burst mode for VRFB */ | ||
| 267 | omap_set_dma_dest_burst_mode(tx->dma_ch, OMAP_DMA_DATA_BURST_16); | ||
| 268 | omap_dma_set_global_params(DMA_DEFAULT_ARB_RATE, 0x20, 0); | ||
| 269 | |||
| 270 | omap_start_dma(tx->dma_ch); | ||
| 271 | interruptible_sleep_on_timeout(&tx->wait, VRFB_TX_TIMEOUT); | ||
| 272 | |||
| 273 | if (tx->tx_status == 0) { | ||
| 274 | omap_stop_dma(tx->dma_ch); | ||
| 275 | return -EINVAL; | ||
| 276 | } | ||
| 277 | /* Store buffers physical address into an array. Addresses | ||
| 278 | * from this array will be used to configure DSS */ | ||
| 279 | vout->queued_buf_addr[vb->i] = (u8 *) | ||
| 280 | vout->vrfb_context[vb->i].paddr[rotation]; | ||
| 281 | return 0; | ||
| 282 | } | ||
| 283 | |||
| 284 | /* | ||
| 285 | * Calculate the buffer offsets from which the streaming should | ||
| 286 | * start. This offset calculation is mainly required because of | ||
| 287 | * the VRFB 32 pixels alignment with rotation. | ||
| 288 | */ | ||
| 289 | void omap_vout_calculate_vrfb_offset(struct omap_vout_device *vout) | ||
| 290 | { | ||
| 291 | enum dss_rotation rotation; | ||
| 292 | bool mirroring = vout->mirror; | ||
| 293 | struct v4l2_rect *crop = &vout->crop; | ||
| 294 | struct v4l2_pix_format *pix = &vout->pix; | ||
| 295 | int *cropped_offset = &vout->cropped_offset; | ||
| 296 | int vr_ps = 1, ps = 2, temp_ps = 2; | ||
| 297 | int offset = 0, ctop = 0, cleft = 0, line_length = 0; | ||
| 298 | |||
| 299 | rotation = calc_rotation(vout); | ||
| 300 | |||
| 301 | if (V4L2_PIX_FMT_YUYV == pix->pixelformat || | ||
| 302 | V4L2_PIX_FMT_UYVY == pix->pixelformat) { | ||
| 303 | if (is_rotation_enabled(vout)) { | ||
| 304 | /* | ||
| 305 | * ps - Actual pixel size for YUYV/UYVY for | ||
| 306 | * VRFB/Mirroring is 4 bytes | ||
| 307 | * vr_ps - Virtually pixel size for YUYV/UYVY is | ||
| 308 | * 2 bytes | ||
| 309 | */ | ||
| 310 | ps = 4; | ||
| 311 | vr_ps = 2; | ||
| 312 | } else { | ||
| 313 | ps = 2; /* otherwise the pixel size is 2 byte */ | ||
| 314 | } | ||
| 315 | } else if (V4L2_PIX_FMT_RGB32 == pix->pixelformat) { | ||
| 316 | ps = 4; | ||
| 317 | } else if (V4L2_PIX_FMT_RGB24 == pix->pixelformat) { | ||
| 318 | ps = 3; | ||
| 319 | } | ||
| 320 | vout->ps = ps; | ||
| 321 | vout->vr_ps = vr_ps; | ||
| 322 | |||
| 323 | if (is_rotation_enabled(vout)) { | ||
| 324 | line_length = MAX_PIXELS_PER_LINE; | ||
| 325 | ctop = (pix->height - crop->height) - crop->top; | ||
| 326 | cleft = (pix->width - crop->width) - crop->left; | ||
| 327 | } else { | ||
| 328 | line_length = pix->width; | ||
| 329 | } | ||
| 330 | vout->line_length = line_length; | ||
| 331 | switch (rotation) { | ||
| 332 | case dss_rotation_90_degree: | ||
| 333 | offset = vout->vrfb_context[0].yoffset * | ||
| 334 | vout->vrfb_context[0].bytespp; | ||
| 335 | temp_ps = ps / vr_ps; | ||
| 336 | if (mirroring == 0) { | ||
| 337 | *cropped_offset = offset + line_length * | ||
| 338 | temp_ps * cleft + crop->top * temp_ps; | ||
| 339 | } else { | ||
| 340 | *cropped_offset = offset + line_length * temp_ps * | ||
| 341 | cleft + crop->top * temp_ps + (line_length * | ||
| 342 | ((crop->width / (vr_ps)) - 1) * ps); | ||
| 343 | } | ||
| 344 | break; | ||
| 345 | case dss_rotation_180_degree: | ||
| 346 | offset = ((MAX_PIXELS_PER_LINE * vout->vrfb_context[0].yoffset * | ||
| 347 | vout->vrfb_context[0].bytespp) + | ||
| 348 | (vout->vrfb_context[0].xoffset * | ||
| 349 | vout->vrfb_context[0].bytespp)); | ||
| 350 | if (mirroring == 0) { | ||
| 351 | *cropped_offset = offset + (line_length * ps * ctop) + | ||
| 352 | (cleft / vr_ps) * ps; | ||
| 353 | |||
| 354 | } else { | ||
| 355 | *cropped_offset = offset + (line_length * ps * ctop) + | ||
| 356 | (cleft / vr_ps) * ps + (line_length * | ||
| 357 | (crop->height - 1) * ps); | ||
| 358 | } | ||
| 359 | break; | ||
| 360 | case dss_rotation_270_degree: | ||
| 361 | offset = MAX_PIXELS_PER_LINE * vout->vrfb_context[0].xoffset * | ||
| 362 | vout->vrfb_context[0].bytespp; | ||
| 363 | temp_ps = ps / vr_ps; | ||
| 364 | if (mirroring == 0) { | ||
| 365 | *cropped_offset = offset + line_length * | ||
| 366 | temp_ps * crop->left + ctop * ps; | ||
| 367 | } else { | ||
| 368 | *cropped_offset = offset + line_length * | ||
| 369 | temp_ps * crop->left + ctop * ps + | ||
| 370 | (line_length * ((crop->width / vr_ps) - 1) * | ||
| 371 | ps); | ||
| 372 | } | ||
| 373 | break; | ||
| 374 | case dss_rotation_0_degree: | ||
| 375 | if (mirroring == 0) { | ||
| 376 | *cropped_offset = (line_length * ps) * | ||
| 377 | crop->top + (crop->left / vr_ps) * ps; | ||
| 378 | } else { | ||
| 379 | *cropped_offset = (line_length * ps) * | ||
| 380 | crop->top + (crop->left / vr_ps) * ps + | ||
| 381 | (line_length * (crop->height - 1) * ps); | ||
| 382 | } | ||
| 383 | break; | ||
| 384 | default: | ||
| 385 | *cropped_offset = (line_length * ps * crop->top) / | ||
| 386 | vr_ps + (crop->left * ps) / vr_ps + | ||
| 387 | ((crop->width / vr_ps) - 1) * ps; | ||
| 388 | break; | ||
| 389 | } | ||
| 390 | } | ||
diff --git a/drivers/media/video/omap/omap_vout_vrfb.h b/drivers/media/video/omap/omap_vout_vrfb.h new file mode 100644 index 000000000000..ffde741e0590 --- /dev/null +++ b/drivers/media/video/omap/omap_vout_vrfb.h | |||
| @@ -0,0 +1,40 @@ | |||
| 1 | /* | ||
| 2 | * omap_vout_vrfb.h | ||
| 3 | * | ||
| 4 | * Copyright (C) 2010 Texas Instruments. | ||
| 5 | * | ||
| 6 | * This file is licensed under the terms of the GNU General Public License | ||
| 7 | * version 2. This program is licensed "as is" without any warranty of any | ||
| 8 | * kind, whether express or implied. | ||
| 9 | * | ||
| 10 | */ | ||
| 11 | |||
| 12 | #ifndef OMAP_VOUT_VRFB_H | ||
| 13 | #define OMAP_VOUT_VRFB_H | ||
| 14 | |||
| 15 | #ifdef CONFIG_VIDEO_OMAP2_VOUT_VRFB | ||
| 16 | void omap_vout_free_vrfb_buffers(struct omap_vout_device *vout); | ||
| 17 | int omap_vout_setup_vrfb_bufs(struct platform_device *pdev, int vid_num, | ||
| 18 | u32 static_vrfb_allocation); | ||
| 19 | void omap_vout_release_vrfb(struct omap_vout_device *vout); | ||
| 20 | int omap_vout_vrfb_buffer_setup(struct omap_vout_device *vout, | ||
| 21 | unsigned int *count, unsigned int startindex); | ||
| 22 | int omap_vout_prepare_vrfb(struct omap_vout_device *vout, | ||
| 23 | struct videobuf_buffer *vb); | ||
| 24 | void omap_vout_calculate_vrfb_offset(struct omap_vout_device *vout); | ||
| 25 | #else | ||
| 26 | void omap_vout_free_vrfb_buffers(struct omap_vout_device *vout) { } | ||
| 27 | int omap_vout_setup_vrfb_bufs(struct platform_device *pdev, int vid_num, | ||
| 28 | u32 static_vrfb_allocation) | ||
| 29 | { return 0; } | ||
| 30 | void omap_vout_release_vrfb(struct omap_vout_device *vout) { } | ||
| 31 | int omap_vout_vrfb_buffer_setup(struct omap_vout_device *vout, | ||
| 32 | unsigned int *count, unsigned int startindex) | ||
| 33 | { return 0; } | ||
| 34 | int omap_vout_prepare_vrfb(struct omap_vout_device *vout, | ||
| 35 | struct videobuf_buffer *vb) | ||
| 36 | { return 0; } | ||
| 37 | void omap_vout_calculate_vrfb_offset(struct omap_vout_device *vout) { } | ||
| 38 | #endif | ||
| 39 | |||
| 40 | #endif | ||
diff --git a/drivers/media/video/omap/omap_voutdef.h b/drivers/media/video/omap/omap_voutdef.h index 659497b84996..d793501cafcc 100644 --- a/drivers/media/video/omap/omap_voutdef.h +++ b/drivers/media/video/omap/omap_voutdef.h | |||
| @@ -12,6 +12,7 @@ | |||
| 12 | #define OMAP_VOUTDEF_H | 12 | #define OMAP_VOUTDEF_H |
| 13 | 13 | ||
| 14 | #include <video/omapdss.h> | 14 | #include <video/omapdss.h> |
| 15 | #include <plat/vrfb.h> | ||
| 15 | 16 | ||
| 16 | #define YUYV_BPP 2 | 17 | #define YUYV_BPP 2 |
| 17 | #define RGB565_BPP 2 | 18 | #define RGB565_BPP 2 |
| @@ -27,6 +28,31 @@ | |||
| 27 | #define MAX_DISPLAYS 3 | 28 | #define MAX_DISPLAYS 3 |
| 28 | #define MAX_MANAGERS 3 | 29 | #define MAX_MANAGERS 3 |
| 29 | 30 | ||
| 31 | #define QQVGA_WIDTH 160 | ||
| 32 | #define QQVGA_HEIGHT 120 | ||
| 33 | |||
| 34 | /* Max Resolution supported by the driver */ | ||
| 35 | #define VID_MAX_WIDTH 1280 /* Largest width */ | ||
| 36 | #define VID_MAX_HEIGHT 720 /* Largest height */ | ||
| 37 | |||
| 38 | /* Mimimum requirement is 2x2 for DSS */ | ||
| 39 | #define VID_MIN_WIDTH 2 | ||
| 40 | #define VID_MIN_HEIGHT 2 | ||
| 41 | |||
| 42 | /* 2048 x 2048 is max res supported by OMAP display controller */ | ||
| 43 | #define MAX_PIXELS_PER_LINE 2048 | ||
| 44 | |||
| 45 | #define VRFB_TX_TIMEOUT 1000 | ||
| 46 | #define VRFB_NUM_BUFS 4 | ||
| 47 | |||
| 48 | /* Max buffer size tobe allocated during init */ | ||
| 49 | #define OMAP_VOUT_MAX_BUF_SIZE (VID_MAX_WIDTH*VID_MAX_HEIGHT*4) | ||
| 50 | |||
| 51 | enum dma_channel_state { | ||
| 52 | DMA_CHAN_NOT_ALLOTED, | ||
| 53 | DMA_CHAN_ALLOTED, | ||
| 54 | }; | ||
| 55 | |||
| 30 | /* Enum for Rotation | 56 | /* Enum for Rotation |
| 31 | * DSS understands rotation in 0, 1, 2, 3 context | 57 | * DSS understands rotation in 0, 1, 2, 3 context |
| 32 | * while V4L2 driver understands it as 0, 90, 180, 270 | 58 | * while V4L2 driver understands it as 0, 90, 180, 270 |
| @@ -37,6 +63,18 @@ enum dss_rotation { | |||
| 37 | dss_rotation_180_degree = 2, | 63 | dss_rotation_180_degree = 2, |
| 38 | dss_rotation_270_degree = 3, | 64 | dss_rotation_270_degree = 3, |
| 39 | }; | 65 | }; |
| 66 | |||
| 67 | /* Enum for choosing rotation type for vout | ||
| 68 | * DSS2 doesn't understand no rotation as an | ||
| 69 | * option while V4L2 driver doesn't support | ||
| 70 | * rotation in the case where VRFB is not built in | ||
| 71 | * the kernel | ||
| 72 | */ | ||
| 73 | enum vout_rotaion_type { | ||
| 74 | VOUT_ROT_NONE = 0, | ||
| 75 | VOUT_ROT_VRFB = 1, | ||
| 76 | }; | ||
| 77 | |||
| 40 | /* | 78 | /* |
| 41 | * This structure is used to store the DMA transfer parameters | 79 | * This structure is used to store the DMA transfer parameters |
| 42 | * for VRFB hidden buffer | 80 | * for VRFB hidden buffer |
| @@ -53,6 +91,7 @@ struct omapvideo_info { | |||
| 53 | int id; | 91 | int id; |
| 54 | int num_overlays; | 92 | int num_overlays; |
| 55 | struct omap_overlay *overlays[MAX_OVLS]; | 93 | struct omap_overlay *overlays[MAX_OVLS]; |
| 94 | enum vout_rotaion_type rotation_type; | ||
| 56 | }; | 95 | }; |
| 57 | 96 | ||
| 58 | struct omap2video_device { | 97 | struct omap2video_device { |
| @@ -144,4 +183,43 @@ struct omap_vout_device { | |||
| 144 | int io_allowed; | 183 | int io_allowed; |
| 145 | 184 | ||
| 146 | }; | 185 | }; |
| 186 | |||
| 187 | /* | ||
| 188 | * Return true if rotation is 90 or 270 | ||
| 189 | */ | ||
| 190 | static inline int is_rotation_90_or_270(const struct omap_vout_device *vout) | ||
| 191 | { | ||
| 192 | return (vout->rotation == dss_rotation_90_degree || | ||
| 193 | vout->rotation == dss_rotation_270_degree); | ||
| 194 | } | ||
| 195 | |||
| 196 | /* | ||
| 197 | * Return true if rotation is enabled | ||
| 198 | */ | ||
| 199 | static inline int is_rotation_enabled(const struct omap_vout_device *vout) | ||
| 200 | { | ||
| 201 | return vout->rotation || vout->mirror; | ||
| 202 | } | ||
| 203 | |||
| 204 | /* | ||
| 205 | * Reverse the rotation degree if mirroring is enabled | ||
| 206 | */ | ||
| 207 | static inline int calc_rotation(const struct omap_vout_device *vout) | ||
| 208 | { | ||
| 209 | if (!vout->mirror) | ||
| 210 | return vout->rotation; | ||
| 211 | |||
| 212 | switch (vout->rotation) { | ||
| 213 | case dss_rotation_90_degree: | ||
| 214 | return dss_rotation_270_degree; | ||
| 215 | case dss_rotation_270_degree: | ||
| 216 | return dss_rotation_90_degree; | ||
| 217 | case dss_rotation_180_degree: | ||
| 218 | return dss_rotation_0_degree; | ||
| 219 | default: | ||
| 220 | return dss_rotation_180_degree; | ||
| 221 | } | ||
| 222 | } | ||
| 223 | |||
| 224 | void omap_vout_free_buffers(struct omap_vout_device *vout); | ||
| 147 | #endif /* ifndef OMAP_VOUTDEF_H */ | 225 | #endif /* ifndef OMAP_VOUTDEF_H */ |
diff --git a/drivers/media/video/omap/omap_voutlib.c b/drivers/media/video/omap/omap_voutlib.c index 8ae74817a110..115408b9274f 100644 --- a/drivers/media/video/omap/omap_voutlib.c +++ b/drivers/media/video/omap/omap_voutlib.c | |||
| @@ -24,8 +24,12 @@ | |||
| 24 | #include <linux/types.h> | 24 | #include <linux/types.h> |
| 25 | #include <linux/videodev2.h> | 25 | #include <linux/videodev2.h> |
| 26 | 26 | ||
| 27 | #include <linux/dma-mapping.h> | ||
| 28 | |||
| 27 | #include <plat/cpu.h> | 29 | #include <plat/cpu.h> |
| 28 | 30 | ||
| 31 | #include "omap_voutlib.h" | ||
| 32 | |||
| 29 | MODULE_AUTHOR("Texas Instruments"); | 33 | MODULE_AUTHOR("Texas Instruments"); |
| 30 | MODULE_DESCRIPTION("OMAP Video library"); | 34 | MODULE_DESCRIPTION("OMAP Video library"); |
| 31 | MODULE_LICENSE("GPL"); | 35 | MODULE_LICENSE("GPL"); |
| @@ -291,3 +295,45 @@ void omap_vout_new_format(struct v4l2_pix_format *pix, | |||
| 291 | } | 295 | } |
| 292 | EXPORT_SYMBOL_GPL(omap_vout_new_format); | 296 | EXPORT_SYMBOL_GPL(omap_vout_new_format); |
| 293 | 297 | ||
| 298 | /* | ||
| 299 | * Allocate buffers | ||
| 300 | */ | ||
| 301 | unsigned long omap_vout_alloc_buffer(u32 buf_size, u32 *phys_addr) | ||
| 302 | { | ||
| 303 | u32 order, size; | ||
| 304 | unsigned long virt_addr, addr; | ||
| 305 | |||
| 306 | size = PAGE_ALIGN(buf_size); | ||
| 307 | order = get_order(size); | ||
| 308 | virt_addr = __get_free_pages(GFP_KERNEL, order); | ||
| 309 | addr = virt_addr; | ||
| 310 | |||
| 311 | if (virt_addr) { | ||
| 312 | while (size > 0) { | ||
| 313 | SetPageReserved(virt_to_page(addr)); | ||
| 314 | addr += PAGE_SIZE; | ||
| 315 | size -= PAGE_SIZE; | ||
| 316 | } | ||
| 317 | } | ||
| 318 | *phys_addr = (u32) virt_to_phys((void *) virt_addr); | ||
| 319 | return virt_addr; | ||
| 320 | } | ||
| 321 | |||
| 322 | /* | ||
| 323 | * Free buffers | ||
| 324 | */ | ||
| 325 | void omap_vout_free_buffer(unsigned long virtaddr, u32 buf_size) | ||
| 326 | { | ||
| 327 | u32 order, size; | ||
| 328 | unsigned long addr = virtaddr; | ||
| 329 | |||
| 330 | size = PAGE_ALIGN(buf_size); | ||
| 331 | order = get_order(size); | ||
| 332 | |||
| 333 | while (size > 0) { | ||
| 334 | ClearPageReserved(virt_to_page(addr)); | ||
| 335 | addr += PAGE_SIZE; | ||
| 336 | size -= PAGE_SIZE; | ||
| 337 | } | ||
| 338 | free_pages((unsigned long) virtaddr, order); | ||
| 339 | } | ||
diff --git a/drivers/media/video/omap/omap_voutlib.h b/drivers/media/video/omap/omap_voutlib.h index a60b16e8bfc3..e51750a597e3 100644 --- a/drivers/media/video/omap/omap_voutlib.h +++ b/drivers/media/video/omap/omap_voutlib.h | |||
| @@ -12,23 +12,25 @@ | |||
| 12 | #ifndef OMAP_VOUTLIB_H | 12 | #ifndef OMAP_VOUTLIB_H |
| 13 | #define OMAP_VOUTLIB_H | 13 | #define OMAP_VOUTLIB_H |
| 14 | 14 | ||
| 15 | extern void omap_vout_default_crop(struct v4l2_pix_format *pix, | 15 | void omap_vout_default_crop(struct v4l2_pix_format *pix, |
| 16 | struct v4l2_framebuffer *fbuf, struct v4l2_rect *crop); | 16 | struct v4l2_framebuffer *fbuf, struct v4l2_rect *crop); |
| 17 | 17 | ||
| 18 | extern int omap_vout_new_crop(struct v4l2_pix_format *pix, | 18 | int omap_vout_new_crop(struct v4l2_pix_format *pix, |
| 19 | struct v4l2_rect *crop, struct v4l2_window *win, | 19 | struct v4l2_rect *crop, struct v4l2_window *win, |
| 20 | struct v4l2_framebuffer *fbuf, | 20 | struct v4l2_framebuffer *fbuf, |
| 21 | const struct v4l2_rect *new_crop); | 21 | const struct v4l2_rect *new_crop); |
| 22 | 22 | ||
| 23 | extern int omap_vout_try_window(struct v4l2_framebuffer *fbuf, | 23 | int omap_vout_try_window(struct v4l2_framebuffer *fbuf, |
| 24 | struct v4l2_window *new_win); | 24 | struct v4l2_window *new_win); |
| 25 | 25 | ||
| 26 | extern int omap_vout_new_window(struct v4l2_rect *crop, | 26 | int omap_vout_new_window(struct v4l2_rect *crop, |
| 27 | struct v4l2_window *win, struct v4l2_framebuffer *fbuf, | 27 | struct v4l2_window *win, struct v4l2_framebuffer *fbuf, |
| 28 | struct v4l2_window *new_win); | 28 | struct v4l2_window *new_win); |
| 29 | 29 | ||
| 30 | extern void omap_vout_new_format(struct v4l2_pix_format *pix, | 30 | void omap_vout_new_format(struct v4l2_pix_format *pix, |
| 31 | struct v4l2_framebuffer *fbuf, struct v4l2_rect *crop, | 31 | struct v4l2_framebuffer *fbuf, struct v4l2_rect *crop, |
| 32 | struct v4l2_window *win); | 32 | struct v4l2_window *win); |
| 33 | unsigned long omap_vout_alloc_buffer(u32 buf_size, u32 *phys_addr); | ||
| 34 | void omap_vout_free_buffer(unsigned long virtaddr, u32 buf_size); | ||
| 33 | #endif /* #ifndef OMAP_VOUTLIB_H */ | 35 | #endif /* #ifndef OMAP_VOUTLIB_H */ |
| 34 | 36 | ||
diff --git a/drivers/media/video/omap1_camera.c b/drivers/media/video/omap1_camera.c index e7cfc85b0a1c..8a947e603aca 100644 --- a/drivers/media/video/omap1_camera.c +++ b/drivers/media/video/omap1_camera.c | |||
| @@ -26,7 +26,6 @@ | |||
| 26 | #include <linux/interrupt.h> | 26 | #include <linux/interrupt.h> |
| 27 | #include <linux/platform_device.h> | 27 | #include <linux/platform_device.h> |
| 28 | #include <linux/slab.h> | 28 | #include <linux/slab.h> |
| 29 | #include <linux/version.h> | ||
| 30 | 29 | ||
| 31 | #include <media/omap1_camera.h> | 30 | #include <media/omap1_camera.h> |
| 32 | #include <media/soc_camera.h> | 31 | #include <media/soc_camera.h> |
| @@ -38,7 +37,7 @@ | |||
| 38 | 37 | ||
| 39 | 38 | ||
| 40 | #define DRIVER_NAME "omap1-camera" | 39 | #define DRIVER_NAME "omap1-camera" |
| 41 | #define VERSION_CODE KERNEL_VERSION(0, 0, 1) | 40 | #define DRIVER_VERSION "0.0.2" |
| 42 | 41 | ||
| 43 | 42 | ||
| 44 | /* | 43 | /* |
| @@ -208,7 +207,7 @@ static int omap1_videobuf_setup(struct videobuf_queue *vq, unsigned int *count, | |||
| 208 | struct soc_camera_device *icd = vq->priv_data; | 207 | struct soc_camera_device *icd = vq->priv_data; |
| 209 | int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width, | 208 | int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width, |
| 210 | icd->current_fmt->host_fmt); | 209 | icd->current_fmt->host_fmt); |
| 211 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 210 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 212 | struct omap1_cam_dev *pcdev = ici->priv; | 211 | struct omap1_cam_dev *pcdev = ici->priv; |
| 213 | 212 | ||
| 214 | if (bytes_per_line < 0) | 213 | if (bytes_per_line < 0) |
| @@ -222,7 +221,7 @@ static int omap1_videobuf_setup(struct videobuf_queue *vq, unsigned int *count, | |||
| 222 | if (*size * *count > MAX_VIDEO_MEM * 1024 * 1024) | 221 | if (*size * *count > MAX_VIDEO_MEM * 1024 * 1024) |
| 223 | *count = (MAX_VIDEO_MEM * 1024 * 1024) / *size; | 222 | *count = (MAX_VIDEO_MEM * 1024 * 1024) / *size; |
| 224 | 223 | ||
| 225 | dev_dbg(icd->dev.parent, | 224 | dev_dbg(icd->parent, |
| 226 | "%s: count=%d, size=%d\n", __func__, *count, *size); | 225 | "%s: count=%d, size=%d\n", __func__, *count, *size); |
| 227 | 226 | ||
| 228 | return 0; | 227 | return 0; |
| @@ -241,7 +240,7 @@ static void free_buffer(struct videobuf_queue *vq, struct omap1_cam_buf *buf, | |||
| 241 | videobuf_dma_contig_free(vq, vb); | 240 | videobuf_dma_contig_free(vq, vb); |
| 242 | } else { | 241 | } else { |
| 243 | struct soc_camera_device *icd = vq->priv_data; | 242 | struct soc_camera_device *icd = vq->priv_data; |
| 244 | struct device *dev = icd->dev.parent; | 243 | struct device *dev = icd->parent; |
| 245 | struct videobuf_dmabuf *dma = videobuf_to_dma(vb); | 244 | struct videobuf_dmabuf *dma = videobuf_to_dma(vb); |
| 246 | 245 | ||
| 247 | videobuf_dma_unmap(dev, dma); | 246 | videobuf_dma_unmap(dev, dma); |
| @@ -258,7 +257,7 @@ static int omap1_videobuf_prepare(struct videobuf_queue *vq, | |||
| 258 | struct omap1_cam_buf *buf = container_of(vb, struct omap1_cam_buf, vb); | 257 | struct omap1_cam_buf *buf = container_of(vb, struct omap1_cam_buf, vb); |
| 259 | int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width, | 258 | int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width, |
| 260 | icd->current_fmt->host_fmt); | 259 | icd->current_fmt->host_fmt); |
| 261 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 260 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 262 | struct omap1_cam_dev *pcdev = ici->priv; | 261 | struct omap1_cam_dev *pcdev = ici->priv; |
| 263 | int ret; | 262 | int ret; |
| 264 | 263 | ||
| @@ -490,7 +489,7 @@ static void omap1_videobuf_queue(struct videobuf_queue *vq, | |||
| 490 | struct videobuf_buffer *vb) | 489 | struct videobuf_buffer *vb) |
| 491 | { | 490 | { |
| 492 | struct soc_camera_device *icd = vq->priv_data; | 491 | struct soc_camera_device *icd = vq->priv_data; |
| 493 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 492 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 494 | struct omap1_cam_dev *pcdev = ici->priv; | 493 | struct omap1_cam_dev *pcdev = ici->priv; |
| 495 | struct omap1_cam_buf *buf; | 494 | struct omap1_cam_buf *buf; |
| 496 | u32 mode; | 495 | u32 mode; |
| @@ -519,7 +518,7 @@ static void omap1_videobuf_queue(struct videobuf_queue *vq, | |||
| 519 | pcdev->active = buf; | 518 | pcdev->active = buf; |
| 520 | pcdev->ready = NULL; | 519 | pcdev->ready = NULL; |
| 521 | 520 | ||
| 522 | dev_dbg(icd->dev.parent, | 521 | dev_dbg(icd->parent, |
| 523 | "%s: capture not active, setup FIFO, start DMA\n", __func__); | 522 | "%s: capture not active, setup FIFO, start DMA\n", __func__); |
| 524 | mode = CAM_READ_CACHE(pcdev, MODE) & ~THRESHOLD_MASK; | 523 | mode = CAM_READ_CACHE(pcdev, MODE) & ~THRESHOLD_MASK; |
| 525 | mode |= THRESHOLD_LEVEL(pcdev->vb_mode) << THRESHOLD_SHIFT; | 524 | mode |= THRESHOLD_LEVEL(pcdev->vb_mode) << THRESHOLD_SHIFT; |
| @@ -543,8 +542,8 @@ static void omap1_videobuf_release(struct videobuf_queue *vq, | |||
| 543 | struct omap1_cam_buf *buf = | 542 | struct omap1_cam_buf *buf = |
| 544 | container_of(vb, struct omap1_cam_buf, vb); | 543 | container_of(vb, struct omap1_cam_buf, vb); |
| 545 | struct soc_camera_device *icd = vq->priv_data; | 544 | struct soc_camera_device *icd = vq->priv_data; |
| 546 | struct device *dev = icd->dev.parent; | 545 | struct device *dev = icd->parent; |
| 547 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 546 | struct soc_camera_host *ici = to_soc_camera_host(dev); |
| 548 | struct omap1_cam_dev *pcdev = ici->priv; | 547 | struct omap1_cam_dev *pcdev = ici->priv; |
| 549 | 548 | ||
| 550 | switch (vb->state) { | 549 | switch (vb->state) { |
| @@ -573,7 +572,7 @@ static void videobuf_done(struct omap1_cam_dev *pcdev, | |||
| 573 | { | 572 | { |
| 574 | struct omap1_cam_buf *buf = pcdev->active; | 573 | struct omap1_cam_buf *buf = pcdev->active; |
| 575 | struct videobuf_buffer *vb; | 574 | struct videobuf_buffer *vb; |
| 576 | struct device *dev = pcdev->icd->dev.parent; | 575 | struct device *dev = pcdev->icd->parent; |
| 577 | 576 | ||
| 578 | if (WARN_ON(!buf)) { | 577 | if (WARN_ON(!buf)) { |
| 579 | suspend_capture(pcdev); | 578 | suspend_capture(pcdev); |
| @@ -799,7 +798,7 @@ out: | |||
| 799 | static irqreturn_t cam_isr(int irq, void *data) | 798 | static irqreturn_t cam_isr(int irq, void *data) |
| 800 | { | 799 | { |
| 801 | struct omap1_cam_dev *pcdev = data; | 800 | struct omap1_cam_dev *pcdev = data; |
| 802 | struct device *dev = pcdev->icd->dev.parent; | 801 | struct device *dev = pcdev->icd->parent; |
| 803 | struct omap1_cam_buf *buf = pcdev->active; | 802 | struct omap1_cam_buf *buf = pcdev->active; |
| 804 | u32 it_status; | 803 | u32 it_status; |
| 805 | unsigned long flags; | 804 | unsigned long flags; |
| @@ -909,7 +908,7 @@ static void sensor_reset(struct omap1_cam_dev *pcdev, bool reset) | |||
| 909 | */ | 908 | */ |
| 910 | static int omap1_cam_add_device(struct soc_camera_device *icd) | 909 | static int omap1_cam_add_device(struct soc_camera_device *icd) |
| 911 | { | 910 | { |
| 912 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 911 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 913 | struct omap1_cam_dev *pcdev = ici->priv; | 912 | struct omap1_cam_dev *pcdev = ici->priv; |
| 914 | u32 ctrlclock; | 913 | u32 ctrlclock; |
| 915 | 914 | ||
| @@ -952,14 +951,14 @@ static int omap1_cam_add_device(struct soc_camera_device *icd) | |||
| 952 | 951 | ||
| 953 | pcdev->icd = icd; | 952 | pcdev->icd = icd; |
| 954 | 953 | ||
| 955 | dev_dbg(icd->dev.parent, "OMAP1 Camera driver attached to camera %d\n", | 954 | dev_dbg(icd->parent, "OMAP1 Camera driver attached to camera %d\n", |
| 956 | icd->devnum); | 955 | icd->devnum); |
| 957 | return 0; | 956 | return 0; |
| 958 | } | 957 | } |
| 959 | 958 | ||
| 960 | static void omap1_cam_remove_device(struct soc_camera_device *icd) | 959 | static void omap1_cam_remove_device(struct soc_camera_device *icd) |
| 961 | { | 960 | { |
| 962 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 961 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 963 | struct omap1_cam_dev *pcdev = ici->priv; | 962 | struct omap1_cam_dev *pcdev = ici->priv; |
| 964 | u32 ctrlclock; | 963 | u32 ctrlclock; |
| 965 | 964 | ||
| @@ -985,7 +984,7 @@ static void omap1_cam_remove_device(struct soc_camera_device *icd) | |||
| 985 | 984 | ||
| 986 | pcdev->icd = NULL; | 985 | pcdev->icd = NULL; |
| 987 | 986 | ||
| 988 | dev_dbg(icd->dev.parent, | 987 | dev_dbg(icd->parent, |
| 989 | "OMAP1 Camera driver detached from camera %d\n", icd->devnum); | 988 | "OMAP1 Camera driver detached from camera %d\n", icd->devnum); |
| 990 | } | 989 | } |
| 991 | 990 | ||
| @@ -1070,7 +1069,7 @@ static int omap1_cam_get_formats(struct soc_camera_device *icd, | |||
| 1070 | unsigned int idx, struct soc_camera_format_xlate *xlate) | 1069 | unsigned int idx, struct soc_camera_format_xlate *xlate) |
| 1071 | { | 1070 | { |
| 1072 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | 1071 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); |
| 1073 | struct device *dev = icd->dev.parent; | 1072 | struct device *dev = icd->parent; |
| 1074 | int formats = 0, ret; | 1073 | int formats = 0, ret; |
| 1075 | enum v4l2_mbus_pixelcode code; | 1074 | enum v4l2_mbus_pixelcode code; |
| 1076 | const struct soc_mbus_pixelfmt *fmt; | 1075 | const struct soc_mbus_pixelfmt *fmt; |
| @@ -1222,9 +1221,9 @@ static int omap1_cam_set_crop(struct soc_camera_device *icd, | |||
| 1222 | struct v4l2_rect *rect = &crop->c; | 1221 | struct v4l2_rect *rect = &crop->c; |
| 1223 | const struct soc_camera_format_xlate *xlate = icd->current_fmt; | 1222 | const struct soc_camera_format_xlate *xlate = icd->current_fmt; |
| 1224 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | 1223 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); |
| 1225 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 1224 | struct device *dev = icd->parent; |
| 1225 | struct soc_camera_host *ici = to_soc_camera_host(dev); | ||
| 1226 | struct omap1_cam_dev *pcdev = ici->priv; | 1226 | struct omap1_cam_dev *pcdev = ici->priv; |
| 1227 | struct device *dev = icd->dev.parent; | ||
| 1228 | struct v4l2_mbus_framefmt mf; | 1227 | struct v4l2_mbus_framefmt mf; |
| 1229 | int ret; | 1228 | int ret; |
| 1230 | 1229 | ||
| @@ -1270,8 +1269,8 @@ static int omap1_cam_set_fmt(struct soc_camera_device *icd, | |||
| 1270 | { | 1269 | { |
| 1271 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | 1270 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); |
| 1272 | const struct soc_camera_format_xlate *xlate; | 1271 | const struct soc_camera_format_xlate *xlate; |
| 1273 | struct device *dev = icd->dev.parent; | 1272 | struct device *dev = icd->parent; |
| 1274 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 1273 | struct soc_camera_host *ici = to_soc_camera_host(dev); |
| 1275 | struct omap1_cam_dev *pcdev = ici->priv; | 1274 | struct omap1_cam_dev *pcdev = ici->priv; |
| 1276 | struct v4l2_pix_format *pix = &f->fmt.pix; | 1275 | struct v4l2_pix_format *pix = &f->fmt.pix; |
| 1277 | struct v4l2_mbus_framefmt mf; | 1276 | struct v4l2_mbus_framefmt mf; |
| @@ -1326,7 +1325,7 @@ static int omap1_cam_try_fmt(struct soc_camera_device *icd, | |||
| 1326 | 1325 | ||
| 1327 | xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat); | 1326 | xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat); |
| 1328 | if (!xlate) { | 1327 | if (!xlate) { |
| 1329 | dev_warn(icd->dev.parent, "Format %#x not found\n", | 1328 | dev_warn(icd->parent, "Format %#x not found\n", |
| 1330 | pix->pixelformat); | 1329 | pix->pixelformat); |
| 1331 | return -EINVAL; | 1330 | return -EINVAL; |
| 1332 | } | 1331 | } |
| @@ -1362,7 +1361,7 @@ static int omap1_cam_mmap_mapper(struct videobuf_queue *q, | |||
| 1362 | struct vm_area_struct *vma) | 1361 | struct vm_area_struct *vma) |
| 1363 | { | 1362 | { |
| 1364 | struct soc_camera_device *icd = q->priv_data; | 1363 | struct soc_camera_device *icd = q->priv_data; |
| 1365 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 1364 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 1366 | struct omap1_cam_dev *pcdev = ici->priv; | 1365 | struct omap1_cam_dev *pcdev = ici->priv; |
| 1367 | int ret; | 1366 | int ret; |
| 1368 | 1367 | ||
| @@ -1377,17 +1376,17 @@ static int omap1_cam_mmap_mapper(struct videobuf_queue *q, | |||
| 1377 | static void omap1_cam_init_videobuf(struct videobuf_queue *q, | 1376 | static void omap1_cam_init_videobuf(struct videobuf_queue *q, |
| 1378 | struct soc_camera_device *icd) | 1377 | struct soc_camera_device *icd) |
| 1379 | { | 1378 | { |
| 1380 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 1379 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 1381 | struct omap1_cam_dev *pcdev = ici->priv; | 1380 | struct omap1_cam_dev *pcdev = ici->priv; |
| 1382 | 1381 | ||
| 1383 | if (!sg_mode) | 1382 | if (!sg_mode) |
| 1384 | videobuf_queue_dma_contig_init(q, &omap1_videobuf_ops, | 1383 | videobuf_queue_dma_contig_init(q, &omap1_videobuf_ops, |
| 1385 | icd->dev.parent, &pcdev->lock, | 1384 | icd->parent, &pcdev->lock, |
| 1386 | V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_NONE, | 1385 | V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_NONE, |
| 1387 | sizeof(struct omap1_cam_buf), icd, &icd->video_lock); | 1386 | sizeof(struct omap1_cam_buf), icd, &icd->video_lock); |
| 1388 | else | 1387 | else |
| 1389 | videobuf_queue_sg_init(q, &omap1_videobuf_ops, | 1388 | videobuf_queue_sg_init(q, &omap1_videobuf_ops, |
| 1390 | icd->dev.parent, &pcdev->lock, | 1389 | icd->parent, &pcdev->lock, |
| 1391 | V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_NONE, | 1390 | V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_NONE, |
| 1392 | sizeof(struct omap1_cam_buf), icd, &icd->video_lock); | 1391 | sizeof(struct omap1_cam_buf), icd, &icd->video_lock); |
| 1393 | 1392 | ||
| @@ -1431,7 +1430,6 @@ static int omap1_cam_querycap(struct soc_camera_host *ici, | |||
| 1431 | { | 1430 | { |
| 1432 | /* cap->name is set by the friendly caller:-> */ | 1431 | /* cap->name is set by the friendly caller:-> */ |
| 1433 | strlcpy(cap->card, "OMAP1 Camera", sizeof(cap->card)); | 1432 | strlcpy(cap->card, "OMAP1 Camera", sizeof(cap->card)); |
| 1434 | cap->version = VERSION_CODE; | ||
| 1435 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING; | 1433 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING; |
| 1436 | 1434 | ||
| 1437 | return 0; | 1435 | return 0; |
| @@ -1440,9 +1438,9 @@ static int omap1_cam_querycap(struct soc_camera_host *ici, | |||
| 1440 | static int omap1_cam_set_bus_param(struct soc_camera_device *icd, | 1438 | static int omap1_cam_set_bus_param(struct soc_camera_device *icd, |
| 1441 | __u32 pixfmt) | 1439 | __u32 pixfmt) |
| 1442 | { | 1440 | { |
| 1443 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 1441 | struct device *dev = icd->parent; |
| 1442 | struct soc_camera_host *ici = to_soc_camera_host(dev); | ||
| 1444 | struct omap1_cam_dev *pcdev = ici->priv; | 1443 | struct omap1_cam_dev *pcdev = ici->priv; |
| 1445 | struct device *dev = icd->dev.parent; | ||
| 1446 | const struct soc_camera_format_xlate *xlate; | 1444 | const struct soc_camera_format_xlate *xlate; |
| 1447 | const struct soc_mbus_pixelfmt *fmt; | 1445 | const struct soc_mbus_pixelfmt *fmt; |
| 1448 | unsigned long camera_flags, common_flags; | 1446 | unsigned long camera_flags, common_flags; |
| @@ -1718,4 +1716,5 @@ MODULE_PARM_DESC(sg_mode, "videobuf mode, 0: dma-contig (default), 1: dma-sg"); | |||
| 1718 | MODULE_DESCRIPTION("OMAP1 Camera Interface driver"); | 1716 | MODULE_DESCRIPTION("OMAP1 Camera Interface driver"); |
| 1719 | MODULE_AUTHOR("Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>"); | 1717 | MODULE_AUTHOR("Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>"); |
| 1720 | MODULE_LICENSE("GPL v2"); | 1718 | MODULE_LICENSE("GPL v2"); |
| 1719 | MODULE_LICENSE(DRIVER_VERSION); | ||
| 1721 | MODULE_ALIAS("platform:" DRIVER_NAME); | 1720 | MODULE_ALIAS("platform:" DRIVER_NAME); |
diff --git a/drivers/media/video/omap24xxcam.c b/drivers/media/video/omap24xxcam.c index 69b60ba5dd7a..eb97bff7116f 100644 --- a/drivers/media/video/omap24xxcam.c +++ b/drivers/media/video/omap24xxcam.c | |||
| @@ -31,7 +31,6 @@ | |||
| 31 | #include <linux/interrupt.h> | 31 | #include <linux/interrupt.h> |
| 32 | #include <linux/videodev2.h> | 32 | #include <linux/videodev2.h> |
| 33 | #include <linux/pci.h> /* needed for videobufs */ | 33 | #include <linux/pci.h> /* needed for videobufs */ |
| 34 | #include <linux/version.h> | ||
| 35 | #include <linux/platform_device.h> | 34 | #include <linux/platform_device.h> |
| 36 | #include <linux/clk.h> | 35 | #include <linux/clk.h> |
| 37 | #include <linux/io.h> | 36 | #include <linux/io.h> |
| @@ -43,7 +42,7 @@ | |||
| 43 | 42 | ||
| 44 | #include "omap24xxcam.h" | 43 | #include "omap24xxcam.h" |
| 45 | 44 | ||
| 46 | #define OMAP24XXCAM_VERSION KERNEL_VERSION(0, 0, 0) | 45 | #define OMAP24XXCAM_VERSION "0.0.1" |
| 47 | 46 | ||
| 48 | #define RESET_TIMEOUT_NS 10000 | 47 | #define RESET_TIMEOUT_NS 10000 |
| 49 | 48 | ||
| @@ -309,11 +308,11 @@ static int omap24xxcam_vbq_alloc_mmap_buffer(struct videobuf_buffer *vb) | |||
| 309 | order--; | 308 | order--; |
| 310 | 309 | ||
| 311 | /* try to allocate as many contiguous pages as possible */ | 310 | /* try to allocate as many contiguous pages as possible */ |
| 312 | page = alloc_pages(GFP_KERNEL | GFP_DMA, order); | 311 | page = alloc_pages(GFP_KERNEL, order); |
| 313 | /* if allocation fails, try to allocate smaller amount */ | 312 | /* if allocation fails, try to allocate smaller amount */ |
| 314 | while (page == NULL) { | 313 | while (page == NULL) { |
| 315 | order--; | 314 | order--; |
| 316 | page = alloc_pages(GFP_KERNEL | GFP_DMA, order); | 315 | page = alloc_pages(GFP_KERNEL, order); |
| 317 | if (page == NULL && !order) { | 316 | if (page == NULL && !order) { |
| 318 | err = -ENOMEM; | 317 | err = -ENOMEM; |
| 319 | goto out; | 318 | goto out; |
| @@ -993,7 +992,6 @@ static int vidioc_querycap(struct file *file, void *fh, | |||
| 993 | 992 | ||
| 994 | strlcpy(cap->driver, CAM_NAME, sizeof(cap->driver)); | 993 | strlcpy(cap->driver, CAM_NAME, sizeof(cap->driver)); |
| 995 | strlcpy(cap->card, cam->vfd->name, sizeof(cap->card)); | 994 | strlcpy(cap->card, cam->vfd->name, sizeof(cap->card)); |
| 996 | cap->version = OMAP24XXCAM_VERSION; | ||
| 997 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING; | 995 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING; |
| 998 | 996 | ||
| 999 | return 0; | 997 | return 0; |
| @@ -1888,6 +1886,7 @@ static void __exit omap24xxcam_cleanup(void) | |||
| 1888 | MODULE_AUTHOR("Sakari Ailus <sakari.ailus@nokia.com>"); | 1886 | MODULE_AUTHOR("Sakari Ailus <sakari.ailus@nokia.com>"); |
| 1889 | MODULE_DESCRIPTION("OMAP24xx Video for Linux camera driver"); | 1887 | MODULE_DESCRIPTION("OMAP24xx Video for Linux camera driver"); |
| 1890 | MODULE_LICENSE("GPL"); | 1888 | MODULE_LICENSE("GPL"); |
| 1889 | MODULE_VERSION(OMAP24XXCAM_VERSION); | ||
| 1891 | module_param(video_nr, int, 0); | 1890 | module_param(video_nr, int, 0); |
| 1892 | MODULE_PARM_DESC(video_nr, | 1891 | MODULE_PARM_DESC(video_nr, |
| 1893 | "Minor number for video device (-1 ==> auto assign)"); | 1892 | "Minor number for video device (-1 ==> auto assign)"); |
diff --git a/drivers/media/video/omap3isp/isp.c b/drivers/media/video/omap3isp/isp.c index 94b6ed89e195..5cea2bbd7014 100644 --- a/drivers/media/video/omap3isp/isp.c +++ b/drivers/media/video/omap3isp/isp.c | |||
| @@ -2234,3 +2234,4 @@ module_exit(isp_cleanup); | |||
| 2234 | MODULE_AUTHOR("Nokia Corporation"); | 2234 | MODULE_AUTHOR("Nokia Corporation"); |
| 2235 | MODULE_DESCRIPTION("TI OMAP3 ISP driver"); | 2235 | MODULE_DESCRIPTION("TI OMAP3 ISP driver"); |
| 2236 | MODULE_LICENSE("GPL"); | 2236 | MODULE_LICENSE("GPL"); |
| 2237 | MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION); | ||
diff --git a/drivers/media/video/omap3isp/isp.h b/drivers/media/video/omap3isp/isp.h index 2620c405f5e4..529e582ef948 100644 --- a/drivers/media/video/omap3isp/isp.h +++ b/drivers/media/video/omap3isp/isp.h | |||
| @@ -139,6 +139,10 @@ struct isp_reg { | |||
| 139 | * 3 - CAMEXT[13:6] -> CAM[7:0] | 139 | * 3 - CAMEXT[13:6] -> CAM[7:0] |
| 140 | * @clk_pol: Pixel clock polarity | 140 | * @clk_pol: Pixel clock polarity |
| 141 | * 0 - Non Inverted, 1 - Inverted | 141 | * 0 - Non Inverted, 1 - Inverted |
| 142 | * @hs_pol: Horizontal synchronization polarity | ||
| 143 | * 0 - Active high, 1 - Active low | ||
| 144 | * @vs_pol: Vertical synchronization polarity | ||
| 145 | * 0 - Active high, 1 - Active low | ||
| 142 | * @bridge: CCDC Bridge input control | 146 | * @bridge: CCDC Bridge input control |
| 143 | * ISPCTRL_PAR_BRIDGE_DISABLE - Disable | 147 | * ISPCTRL_PAR_BRIDGE_DISABLE - Disable |
| 144 | * ISPCTRL_PAR_BRIDGE_LENDIAN - Little endian | 148 | * ISPCTRL_PAR_BRIDGE_LENDIAN - Little endian |
| @@ -147,6 +151,8 @@ struct isp_reg { | |||
| 147 | struct isp_parallel_platform_data { | 151 | struct isp_parallel_platform_data { |
| 148 | unsigned int data_lane_shift:2; | 152 | unsigned int data_lane_shift:2; |
| 149 | unsigned int clk_pol:1; | 153 | unsigned int clk_pol:1; |
| 154 | unsigned int hs_pol:1; | ||
| 155 | unsigned int vs_pol:1; | ||
| 150 | unsigned int bridge:4; | 156 | unsigned int bridge:4; |
| 151 | }; | 157 | }; |
| 152 | 158 | ||
diff --git a/drivers/media/video/omap3isp/ispccdc.c b/drivers/media/video/omap3isp/ispccdc.c index 39d501bda636..9d3459de04b2 100644 --- a/drivers/media/video/omap3isp/ispccdc.c +++ b/drivers/media/video/omap3isp/ispccdc.c | |||
| @@ -1148,6 +1148,8 @@ static void ccdc_configure(struct isp_ccdc_device *ccdc) | |||
| 1148 | omap3isp_configure_bridge(isp, ccdc->input, pdata, shift); | 1148 | omap3isp_configure_bridge(isp, ccdc->input, pdata, shift); |
| 1149 | 1149 | ||
| 1150 | ccdc->syncif.datsz = depth_out; | 1150 | ccdc->syncif.datsz = depth_out; |
| 1151 | ccdc->syncif.hdpol = pdata ? pdata->hs_pol : 0; | ||
| 1152 | ccdc->syncif.vdpol = pdata ? pdata->vs_pol : 0; | ||
| 1151 | ccdc_config_sync_if(ccdc, &ccdc->syncif); | 1153 | ccdc_config_sync_if(ccdc, &ccdc->syncif); |
| 1152 | 1154 | ||
| 1153 | /* CCDC_PAD_SINK */ | 1155 | /* CCDC_PAD_SINK */ |
| @@ -1691,7 +1693,7 @@ static int ccdc_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh, | |||
| 1691 | if (sub->type != V4L2_EVENT_OMAP3ISP_HS_VS) | 1693 | if (sub->type != V4L2_EVENT_OMAP3ISP_HS_VS) |
| 1692 | return -EINVAL; | 1694 | return -EINVAL; |
| 1693 | 1695 | ||
| 1694 | return v4l2_event_subscribe(fh, sub); | 1696 | return v4l2_event_subscribe(fh, sub, OMAP3ISP_CCDC_NEVENTS); |
| 1695 | } | 1697 | } |
| 1696 | 1698 | ||
| 1697 | static int ccdc_unsubscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh, | 1699 | static int ccdc_unsubscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh, |
| @@ -2162,7 +2164,6 @@ static int ccdc_init_entities(struct isp_ccdc_device *ccdc) | |||
| 2162 | sd->grp_id = 1 << 16; /* group ID for isp subdevs */ | 2164 | sd->grp_id = 1 << 16; /* group ID for isp subdevs */ |
| 2163 | v4l2_set_subdevdata(sd, ccdc); | 2165 | v4l2_set_subdevdata(sd, ccdc); |
| 2164 | sd->flags |= V4L2_SUBDEV_FL_HAS_EVENTS | V4L2_SUBDEV_FL_HAS_DEVNODE; | 2166 | sd->flags |= V4L2_SUBDEV_FL_HAS_EVENTS | V4L2_SUBDEV_FL_HAS_DEVNODE; |
| 2165 | sd->nevents = OMAP3ISP_CCDC_NEVENTS; | ||
| 2166 | 2167 | ||
| 2167 | pads[CCDC_PAD_SINK].flags = MEDIA_PAD_FL_SINK; | 2168 | pads[CCDC_PAD_SINK].flags = MEDIA_PAD_FL_SINK; |
| 2168 | pads[CCDC_PAD_SOURCE_VP].flags = MEDIA_PAD_FL_SOURCE; | 2169 | pads[CCDC_PAD_SOURCE_VP].flags = MEDIA_PAD_FL_SOURCE; |
| @@ -2257,8 +2258,6 @@ int omap3isp_ccdc_init(struct isp_device *isp) | |||
| 2257 | ccdc->syncif.fldout = 0; | 2258 | ccdc->syncif.fldout = 0; |
| 2258 | ccdc->syncif.fldpol = 0; | 2259 | ccdc->syncif.fldpol = 0; |
| 2259 | ccdc->syncif.fldstat = 0; | 2260 | ccdc->syncif.fldstat = 0; |
| 2260 | ccdc->syncif.hdpol = 0; | ||
| 2261 | ccdc->syncif.vdpol = 0; | ||
| 2262 | 2261 | ||
| 2263 | ccdc->clamp.oblen = 0; | 2262 | ccdc->clamp.oblen = 0; |
| 2264 | ccdc->clamp.dcsubval = 0; | 2263 | ccdc->clamp.dcsubval = 0; |
diff --git a/drivers/media/video/omap3isp/ispccp2.c b/drivers/media/video/omap3isp/ispccp2.c index 0e16cab8e089..ec9e395f3339 100644 --- a/drivers/media/video/omap3isp/ispccp2.c +++ b/drivers/media/video/omap3isp/ispccp2.c | |||
| @@ -30,6 +30,7 @@ | |||
| 30 | #include <linux/module.h> | 30 | #include <linux/module.h> |
| 31 | #include <linux/mutex.h> | 31 | #include <linux/mutex.h> |
| 32 | #include <linux/uaccess.h> | 32 | #include <linux/uaccess.h> |
| 33 | #include <linux/regulator/consumer.h> | ||
| 33 | 34 | ||
| 34 | #include "isp.h" | 35 | #include "isp.h" |
| 35 | #include "ispreg.h" | 36 | #include "ispreg.h" |
| @@ -163,6 +164,9 @@ static void ccp2_if_enable(struct isp_ccp2_device *ccp2, u8 enable) | |||
| 163 | struct isp_pipeline *pipe = to_isp_pipeline(&ccp2->subdev.entity); | 164 | struct isp_pipeline *pipe = to_isp_pipeline(&ccp2->subdev.entity); |
| 164 | int i; | 165 | int i; |
| 165 | 166 | ||
| 167 | if (enable && ccp2->vdds_csib) | ||
| 168 | regulator_enable(ccp2->vdds_csib); | ||
| 169 | |||
| 166 | /* Enable/Disable all the LCx channels */ | 170 | /* Enable/Disable all the LCx channels */ |
| 167 | for (i = 0; i < CCP2_LCx_CHANS_NUM; i++) | 171 | for (i = 0; i < CCP2_LCx_CHANS_NUM; i++) |
| 168 | isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCP2, ISPCCP2_LCx_CTRL(i), | 172 | isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCP2, ISPCCP2_LCx_CTRL(i), |
| @@ -186,6 +190,9 @@ static void ccp2_if_enable(struct isp_ccp2_device *ccp2, u8 enable) | |||
| 186 | ISPCCP2_LC01_IRQENABLE, | 190 | ISPCCP2_LC01_IRQENABLE, |
| 187 | ISPCCP2_LC01_IRQSTATUS_LC0_FS_IRQ); | 191 | ISPCCP2_LC01_IRQSTATUS_LC0_FS_IRQ); |
| 188 | } | 192 | } |
| 193 | |||
| 194 | if (!enable && ccp2->vdds_csib) | ||
| 195 | regulator_disable(ccp2->vdds_csib); | ||
| 189 | } | 196 | } |
| 190 | 197 | ||
| 191 | /* | 198 | /* |
| @@ -1137,6 +1144,9 @@ error: | |||
| 1137 | */ | 1144 | */ |
| 1138 | void omap3isp_ccp2_cleanup(struct isp_device *isp) | 1145 | void omap3isp_ccp2_cleanup(struct isp_device *isp) |
| 1139 | { | 1146 | { |
| 1147 | struct isp_ccp2_device *ccp2 = &isp->isp_ccp2; | ||
| 1148 | |||
| 1149 | regulator_put(ccp2->vdds_csib); | ||
| 1140 | } | 1150 | } |
| 1141 | 1151 | ||
| 1142 | /* | 1152 | /* |
| @@ -1151,14 +1161,27 @@ int omap3isp_ccp2_init(struct isp_device *isp) | |||
| 1151 | 1161 | ||
| 1152 | init_waitqueue_head(&ccp2->wait); | 1162 | init_waitqueue_head(&ccp2->wait); |
| 1153 | 1163 | ||
| 1154 | /* On the OMAP36xx, the CCP2 uses the CSI PHY1 or PHY2, shared with | 1164 | /* |
| 1165 | * On the OMAP34xx the CSI1 receiver is operated in the CSIb IO | ||
| 1166 | * complex, which is powered by vdds_csib power rail. Hence the | ||
| 1167 | * request for the regulator. | ||
| 1168 | * | ||
| 1169 | * On the OMAP36xx, the CCP2 uses the CSI PHY1 or PHY2, shared with | ||
| 1155 | * the CSI2c or CSI2a receivers. The PHY then needs to be explicitly | 1170 | * the CSI2c or CSI2a receivers. The PHY then needs to be explicitly |
| 1156 | * configured. | 1171 | * configured. |
| 1157 | * | 1172 | * |
| 1158 | * TODO: Don't hardcode the usage of PHY1 (shared with CSI2c). | 1173 | * TODO: Don't hardcode the usage of PHY1 (shared with CSI2c). |
| 1159 | */ | 1174 | */ |
| 1160 | if (isp->revision == ISP_REVISION_15_0) | 1175 | if (isp->revision == ISP_REVISION_2_0) { |
| 1176 | ccp2->vdds_csib = regulator_get(isp->dev, "vdds_csib"); | ||
| 1177 | if (IS_ERR(ccp2->vdds_csib)) { | ||
| 1178 | dev_dbg(isp->dev, | ||
| 1179 | "Could not get regulator vdds_csib\n"); | ||
| 1180 | ccp2->vdds_csib = NULL; | ||
| 1181 | } | ||
| 1182 | } else if (isp->revision == ISP_REVISION_15_0) { | ||
| 1161 | ccp2->phy = &isp->isp_csiphy1; | 1183 | ccp2->phy = &isp->isp_csiphy1; |
| 1184 | } | ||
| 1162 | 1185 | ||
| 1163 | ret = ccp2_init_entities(ccp2); | 1186 | ret = ccp2_init_entities(ccp2); |
| 1164 | if (ret < 0) | 1187 | if (ret < 0) |
diff --git a/drivers/media/video/omap3isp/ispccp2.h b/drivers/media/video/omap3isp/ispccp2.h index 5505a86a9a74..6674e9de2cd7 100644 --- a/drivers/media/video/omap3isp/ispccp2.h +++ b/drivers/media/video/omap3isp/ispccp2.h | |||
| @@ -81,6 +81,7 @@ struct isp_ccp2_device { | |||
| 81 | struct isp_interface_mem_config mem_cfg; | 81 | struct isp_interface_mem_config mem_cfg; |
| 82 | struct isp_video video_in; | 82 | struct isp_video video_in; |
| 83 | struct isp_csiphy *phy; | 83 | struct isp_csiphy *phy; |
| 84 | struct regulator *vdds_csib; | ||
| 84 | unsigned int error; | 85 | unsigned int error; |
| 85 | enum isp_pipeline_stream_state state; | 86 | enum isp_pipeline_stream_state state; |
| 86 | wait_queue_head_t wait; | 87 | wait_queue_head_t wait; |
diff --git a/drivers/media/video/omap3isp/ispstat.c b/drivers/media/video/omap3isp/ispstat.c index b44cb685236a..808065948ac1 100644 --- a/drivers/media/video/omap3isp/ispstat.c +++ b/drivers/media/video/omap3isp/ispstat.c | |||
| @@ -1032,7 +1032,6 @@ static int isp_stat_init_entities(struct ispstat *stat, const char *name, | |||
| 1032 | snprintf(subdev->name, V4L2_SUBDEV_NAME_SIZE, "OMAP3 ISP %s", name); | 1032 | snprintf(subdev->name, V4L2_SUBDEV_NAME_SIZE, "OMAP3 ISP %s", name); |
| 1033 | subdev->grp_id = 1 << 16; /* group ID for isp subdevs */ | 1033 | subdev->grp_id = 1 << 16; /* group ID for isp subdevs */ |
| 1034 | subdev->flags |= V4L2_SUBDEV_FL_HAS_EVENTS | V4L2_SUBDEV_FL_HAS_DEVNODE; | 1034 | subdev->flags |= V4L2_SUBDEV_FL_HAS_EVENTS | V4L2_SUBDEV_FL_HAS_DEVNODE; |
| 1035 | subdev->nevents = STAT_NEVENTS; | ||
| 1036 | v4l2_set_subdevdata(subdev, stat); | 1035 | v4l2_set_subdevdata(subdev, stat); |
| 1037 | 1036 | ||
| 1038 | stat->pad.flags = MEDIA_PAD_FL_SINK; | 1037 | stat->pad.flags = MEDIA_PAD_FL_SINK; |
| @@ -1050,7 +1049,7 @@ int omap3isp_stat_subscribe_event(struct v4l2_subdev *subdev, | |||
| 1050 | if (sub->type != stat->event_type) | 1049 | if (sub->type != stat->event_type) |
| 1051 | return -EINVAL; | 1050 | return -EINVAL; |
| 1052 | 1051 | ||
| 1053 | return v4l2_event_subscribe(fh, sub); | 1052 | return v4l2_event_subscribe(fh, sub, STAT_NEVENTS); |
| 1054 | } | 1053 | } |
| 1055 | 1054 | ||
| 1056 | int omap3isp_stat_unsubscribe_event(struct v4l2_subdev *subdev, | 1055 | int omap3isp_stat_unsubscribe_event(struct v4l2_subdev *subdev, |
diff --git a/drivers/media/video/omap3isp/ispvideo.c b/drivers/media/video/omap3isp/ispvideo.c index 9cd8f1aa567b..fd965adfd597 100644 --- a/drivers/media/video/omap3isp/ispvideo.c +++ b/drivers/media/video/omap3isp/ispvideo.c | |||
| @@ -695,7 +695,6 @@ isp_video_querycap(struct file *file, void *fh, struct v4l2_capability *cap) | |||
| 695 | strlcpy(cap->driver, ISP_VIDEO_DRIVER_NAME, sizeof(cap->driver)); | 695 | strlcpy(cap->driver, ISP_VIDEO_DRIVER_NAME, sizeof(cap->driver)); |
| 696 | strlcpy(cap->card, video->video.name, sizeof(cap->card)); | 696 | strlcpy(cap->card, video->video.name, sizeof(cap->card)); |
| 697 | strlcpy(cap->bus_info, "media", sizeof(cap->bus_info)); | 697 | strlcpy(cap->bus_info, "media", sizeof(cap->bus_info)); |
| 698 | cap->version = ISP_VIDEO_DRIVER_VERSION; | ||
| 699 | 698 | ||
| 700 | if (video->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) | 699 | if (video->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) |
| 701 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING; | 700 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING; |
diff --git a/drivers/media/video/omap3isp/ispvideo.h b/drivers/media/video/omap3isp/ispvideo.h index 911bea64e78a..53160aa24e6e 100644 --- a/drivers/media/video/omap3isp/ispvideo.h +++ b/drivers/media/video/omap3isp/ispvideo.h | |||
| @@ -27,7 +27,6 @@ | |||
| 27 | #define OMAP3_ISP_VIDEO_H | 27 | #define OMAP3_ISP_VIDEO_H |
| 28 | 28 | ||
| 29 | #include <linux/v4l2-mediabus.h> | 29 | #include <linux/v4l2-mediabus.h> |
| 30 | #include <linux/version.h> | ||
| 31 | #include <media/media-entity.h> | 30 | #include <media/media-entity.h> |
| 32 | #include <media/v4l2-dev.h> | 31 | #include <media/v4l2-dev.h> |
| 33 | #include <media/v4l2-fh.h> | 32 | #include <media/v4l2-fh.h> |
| @@ -35,7 +34,7 @@ | |||
| 35 | #include "ispqueue.h" | 34 | #include "ispqueue.h" |
| 36 | 35 | ||
| 37 | #define ISP_VIDEO_DRIVER_NAME "ispvideo" | 36 | #define ISP_VIDEO_DRIVER_NAME "ispvideo" |
| 38 | #define ISP_VIDEO_DRIVER_VERSION KERNEL_VERSION(0, 0, 1) | 37 | #define ISP_VIDEO_DRIVER_VERSION "0.0.2" |
| 39 | 38 | ||
| 40 | struct isp_device; | 39 | struct isp_device; |
| 41 | struct isp_video; | 40 | struct isp_video; |
diff --git a/drivers/media/video/ov2640.c b/drivers/media/video/ov2640.c index 0cea0cf36679..9ce2fa037b94 100644 --- a/drivers/media/video/ov2640.c +++ b/drivers/media/video/ov2640.c | |||
| @@ -1031,16 +1031,9 @@ static int ov2640_video_probe(struct soc_camera_device *icd, | |||
| 1031 | const char *devname; | 1031 | const char *devname; |
| 1032 | int ret; | 1032 | int ret; |
| 1033 | 1033 | ||
| 1034 | /* | 1034 | /* We must have a parent by now. And it cannot be a wrong one. */ |
| 1035 | * we must have a parent by now. And it cannot be a wrong one. | 1035 | BUG_ON(!icd->parent || |
| 1036 | * So this entire test is completely redundant. | 1036 | to_soc_camera_host(icd->parent)->nr != icd->iface); |
| 1037 | */ | ||
| 1038 | if (!icd->dev.parent || | ||
| 1039 | to_soc_camera_host(icd->dev.parent)->nr != icd->iface) { | ||
| 1040 | dev_err(&client->dev, "Parent missing or invalid!\n"); | ||
| 1041 | ret = -ENODEV; | ||
| 1042 | goto err; | ||
| 1043 | } | ||
| 1044 | 1037 | ||
| 1045 | /* | 1038 | /* |
| 1046 | * check and show product ID and manufacturer ID | 1039 | * check and show product ID and manufacturer ID |
diff --git a/drivers/media/video/ov5642.c b/drivers/media/video/ov5642.c new file mode 100644 index 000000000000..349a4ad3ccc1 --- /dev/null +++ b/drivers/media/video/ov5642.c | |||
| @@ -0,0 +1,1012 @@ | |||
| 1 | /* | ||
| 2 | * Driver for OV5642 CMOS Image Sensor from Omnivision | ||
| 3 | * | ||
| 4 | * Copyright (C) 2011, Bastian Hecht <hechtb@gmail.com> | ||
| 5 | * | ||
| 6 | * Based on Sony IMX074 Camera Driver | ||
| 7 | * Copyright (C) 2010, Guennadi Liakhovetski <g.liakhovetski@gmx.de> | ||
| 8 | * | ||
| 9 | * Based on Omnivision OV7670 Camera Driver | ||
| 10 | * Copyright (C) 2006-7 Jonathan Corbet <corbet@lwn.net> | ||
| 11 | * | ||
| 12 | * This program is free software; you can redistribute it and/or modify | ||
| 13 | * it under the terms of the GNU General Public License version 2 as | ||
| 14 | * published by the Free Software Foundation. | ||
| 15 | */ | ||
| 16 | |||
| 17 | #include <linux/delay.h> | ||
| 18 | #include <linux/i2c.h> | ||
| 19 | #include <linux/slab.h> | ||
| 20 | #include <linux/videodev2.h> | ||
| 21 | #include <linux/module.h> | ||
| 22 | |||
| 23 | #include <media/soc_camera.h> | ||
| 24 | #include <media/soc_mediabus.h> | ||
| 25 | #include <media/v4l2-chip-ident.h> | ||
| 26 | #include <media/v4l2-subdev.h> | ||
| 27 | |||
| 28 | /* OV5642 registers */ | ||
| 29 | #define REG_CHIP_ID_HIGH 0x300a | ||
| 30 | #define REG_CHIP_ID_LOW 0x300b | ||
| 31 | |||
| 32 | #define REG_WINDOW_START_X_HIGH 0x3800 | ||
| 33 | #define REG_WINDOW_START_X_LOW 0x3801 | ||
| 34 | #define REG_WINDOW_START_Y_HIGH 0x3802 | ||
| 35 | #define REG_WINDOW_START_Y_LOW 0x3803 | ||
| 36 | #define REG_WINDOW_WIDTH_HIGH 0x3804 | ||
| 37 | #define REG_WINDOW_WIDTH_LOW 0x3805 | ||
| 38 | #define REG_WINDOW_HEIGHT_HIGH 0x3806 | ||
| 39 | #define REG_WINDOW_HEIGHT_LOW 0x3807 | ||
| 40 | #define REG_OUT_WIDTH_HIGH 0x3808 | ||
| 41 | #define REG_OUT_WIDTH_LOW 0x3809 | ||
| 42 | #define REG_OUT_HEIGHT_HIGH 0x380a | ||
| 43 | #define REG_OUT_HEIGHT_LOW 0x380b | ||
| 44 | #define REG_OUT_TOTAL_WIDTH_HIGH 0x380c | ||
| 45 | #define REG_OUT_TOTAL_WIDTH_LOW 0x380d | ||
| 46 | #define REG_OUT_TOTAL_HEIGHT_HIGH 0x380e | ||
| 47 | #define REG_OUT_TOTAL_HEIGHT_LOW 0x380f | ||
| 48 | |||
| 49 | /* | ||
| 50 | * define standard resolution. | ||
| 51 | * Works currently only for up to 720 lines | ||
| 52 | * eg. 320x240, 640x480, 800x600, 1280x720, 2048x720 | ||
| 53 | */ | ||
| 54 | |||
| 55 | #define OV5642_WIDTH 1280 | ||
| 56 | #define OV5642_HEIGHT 720 | ||
| 57 | #define OV5642_TOTAL_WIDTH 3200 | ||
| 58 | #define OV5642_TOTAL_HEIGHT 2000 | ||
| 59 | #define OV5642_SENSOR_SIZE_X 2592 | ||
| 60 | #define OV5642_SENSOR_SIZE_Y 1944 | ||
| 61 | |||
| 62 | struct regval_list { | ||
| 63 | u16 reg_num; | ||
| 64 | u8 value; | ||
| 65 | }; | ||
| 66 | |||
| 67 | static struct regval_list ov5642_default_regs_init[] = { | ||
| 68 | { 0x3103, 0x93 }, | ||
| 69 | { 0x3008, 0x82 }, | ||
| 70 | { 0x3017, 0x7f }, | ||
| 71 | { 0x3018, 0xfc }, | ||
| 72 | { 0x3810, 0xc2 }, | ||
| 73 | { 0x3615, 0xf0 }, | ||
| 74 | { 0x3000, 0x0 }, | ||
| 75 | { 0x3001, 0x0 }, | ||
| 76 | { 0x3002, 0x0 }, | ||
| 77 | { 0x3003, 0x0 }, | ||
| 78 | { 0x3004, 0xff }, | ||
| 79 | { 0x3030, 0x2b }, | ||
| 80 | { 0x3011, 0x8 }, | ||
| 81 | { 0x3010, 0x10 }, | ||
| 82 | { 0x3604, 0x60 }, | ||
| 83 | { 0x3622, 0x60 }, | ||
| 84 | { 0x3621, 0x9 }, | ||
| 85 | { 0x3709, 0x0 }, | ||
| 86 | { 0x4000, 0x21 }, | ||
| 87 | { 0x401d, 0x22 }, | ||
| 88 | { 0x3600, 0x54 }, | ||
| 89 | { 0x3605, 0x4 }, | ||
| 90 | { 0x3606, 0x3f }, | ||
| 91 | { 0x3c01, 0x80 }, | ||
| 92 | { 0x300d, 0x22 }, | ||
| 93 | { 0x3623, 0x22 }, | ||
| 94 | { 0x5000, 0x4f }, | ||
| 95 | { 0x5020, 0x4 }, | ||
| 96 | { 0x5181, 0x79 }, | ||
| 97 | { 0x5182, 0x0 }, | ||
| 98 | { 0x5185, 0x22 }, | ||
| 99 | { 0x5197, 0x1 }, | ||
| 100 | { 0x5500, 0xa }, | ||
| 101 | { 0x5504, 0x0 }, | ||
| 102 | { 0x5505, 0x7f }, | ||
| 103 | { 0x5080, 0x8 }, | ||
| 104 | { 0x300e, 0x18 }, | ||
| 105 | { 0x4610, 0x0 }, | ||
| 106 | { 0x471d, 0x5 }, | ||
| 107 | { 0x4708, 0x6 }, | ||
| 108 | { 0x370c, 0xa0 }, | ||
| 109 | { 0x5687, 0x94 }, | ||
| 110 | { 0x501f, 0x0 }, | ||
| 111 | { 0x5000, 0x4f }, | ||
| 112 | { 0x5001, 0xcf }, | ||
| 113 | { 0x4300, 0x30 }, | ||
| 114 | { 0x4300, 0x30 }, | ||
| 115 | { 0x460b, 0x35 }, | ||
| 116 | { 0x471d, 0x0 }, | ||
| 117 | { 0x3002, 0xc }, | ||
| 118 | { 0x3002, 0x0 }, | ||
| 119 | { 0x4713, 0x3 }, | ||
| 120 | { 0x471c, 0x50 }, | ||
| 121 | { 0x4721, 0x2 }, | ||
| 122 | { 0x4402, 0x90 }, | ||
| 123 | { 0x460c, 0x22 }, | ||
| 124 | { 0x3815, 0x44 }, | ||
| 125 | { 0x3503, 0x7 }, | ||
| 126 | { 0x3501, 0x73 }, | ||
| 127 | { 0x3502, 0x80 }, | ||
| 128 | { 0x350b, 0x0 }, | ||
| 129 | { 0x3818, 0xc8 }, | ||
| 130 | { 0x3824, 0x11 }, | ||
| 131 | { 0x3a00, 0x78 }, | ||
| 132 | { 0x3a1a, 0x4 }, | ||
| 133 | { 0x3a13, 0x30 }, | ||
| 134 | { 0x3a18, 0x0 }, | ||
| 135 | { 0x3a19, 0x7c }, | ||
| 136 | { 0x3a08, 0x12 }, | ||
| 137 | { 0x3a09, 0xc0 }, | ||
| 138 | { 0x3a0a, 0xf }, | ||
| 139 | { 0x3a0b, 0xa0 }, | ||
| 140 | { 0x350c, 0x7 }, | ||
| 141 | { 0x350d, 0xd0 }, | ||
| 142 | { 0x3a0d, 0x8 }, | ||
| 143 | { 0x3a0e, 0x6 }, | ||
| 144 | { 0x3500, 0x0 }, | ||
| 145 | { 0x3501, 0x0 }, | ||
| 146 | { 0x3502, 0x0 }, | ||
| 147 | { 0x350a, 0x0 }, | ||
| 148 | { 0x350b, 0x0 }, | ||
| 149 | { 0x3503, 0x0 }, | ||
| 150 | { 0x3a0f, 0x3c }, | ||
| 151 | { 0x3a10, 0x32 }, | ||
| 152 | { 0x3a1b, 0x3c }, | ||
| 153 | { 0x3a1e, 0x32 }, | ||
| 154 | { 0x3a11, 0x80 }, | ||
| 155 | { 0x3a1f, 0x20 }, | ||
| 156 | { 0x3030, 0x2b }, | ||
| 157 | { 0x3a02, 0x0 }, | ||
| 158 | { 0x3a03, 0x7d }, | ||
| 159 | { 0x3a04, 0x0 }, | ||
| 160 | { 0x3a14, 0x0 }, | ||
| 161 | { 0x3a15, 0x7d }, | ||
| 162 | { 0x3a16, 0x0 }, | ||
| 163 | { 0x3a00, 0x78 }, | ||
| 164 | { 0x3a08, 0x9 }, | ||
| 165 | { 0x3a09, 0x60 }, | ||
| 166 | { 0x3a0a, 0x7 }, | ||
| 167 | { 0x3a0b, 0xd0 }, | ||
| 168 | { 0x3a0d, 0x10 }, | ||
| 169 | { 0x3a0e, 0xd }, | ||
| 170 | { 0x4407, 0x4 }, | ||
| 171 | { 0x5193, 0x70 }, | ||
| 172 | { 0x589b, 0x0 }, | ||
| 173 | { 0x589a, 0xc0 }, | ||
| 174 | { 0x401e, 0x20 }, | ||
| 175 | { 0x4001, 0x42 }, | ||
| 176 | { 0x401c, 0x6 }, | ||
| 177 | { 0x3825, 0xac }, | ||
| 178 | { 0x3827, 0xc }, | ||
| 179 | { 0x528a, 0x1 }, | ||
| 180 | { 0x528b, 0x4 }, | ||
| 181 | { 0x528c, 0x8 }, | ||
| 182 | { 0x528d, 0x10 }, | ||
| 183 | { 0x528e, 0x20 }, | ||
| 184 | { 0x528f, 0x28 }, | ||
| 185 | { 0x5290, 0x30 }, | ||
| 186 | { 0x5292, 0x0 }, | ||
| 187 | { 0x5293, 0x1 }, | ||
| 188 | { 0x5294, 0x0 }, | ||
| 189 | { 0x5295, 0x4 }, | ||
| 190 | { 0x5296, 0x0 }, | ||
| 191 | { 0x5297, 0x8 }, | ||
| 192 | { 0x5298, 0x0 }, | ||
| 193 | { 0x5299, 0x10 }, | ||
| 194 | { 0x529a, 0x0 }, | ||
| 195 | { 0x529b, 0x20 }, | ||
| 196 | { 0x529c, 0x0 }, | ||
| 197 | { 0x529d, 0x28 }, | ||
| 198 | { 0x529e, 0x0 }, | ||
| 199 | { 0x529f, 0x30 }, | ||
| 200 | { 0x5282, 0x0 }, | ||
| 201 | { 0x5300, 0x0 }, | ||
| 202 | { 0x5301, 0x20 }, | ||
| 203 | { 0x5302, 0x0 }, | ||
| 204 | { 0x5303, 0x7c }, | ||
| 205 | { 0x530c, 0x0 }, | ||
| 206 | { 0x530d, 0xc }, | ||
| 207 | { 0x530e, 0x20 }, | ||
| 208 | { 0x530f, 0x80 }, | ||
| 209 | { 0x5310, 0x20 }, | ||
| 210 | { 0x5311, 0x80 }, | ||
| 211 | { 0x5308, 0x20 }, | ||
| 212 | { 0x5309, 0x40 }, | ||
| 213 | { 0x5304, 0x0 }, | ||
| 214 | { 0x5305, 0x30 }, | ||
| 215 | { 0x5306, 0x0 }, | ||
| 216 | { 0x5307, 0x80 }, | ||
| 217 | { 0x5314, 0x8 }, | ||
| 218 | { 0x5315, 0x20 }, | ||
| 219 | { 0x5319, 0x30 }, | ||
| 220 | { 0x5316, 0x10 }, | ||
| 221 | { 0x5317, 0x0 }, | ||
| 222 | { 0x5318, 0x2 }, | ||
| 223 | { 0x5380, 0x1 }, | ||
| 224 | { 0x5381, 0x0 }, | ||
| 225 | { 0x5382, 0x0 }, | ||
| 226 | { 0x5383, 0x4e }, | ||
| 227 | { 0x5384, 0x0 }, | ||
| 228 | { 0x5385, 0xf }, | ||
| 229 | { 0x5386, 0x0 }, | ||
| 230 | { 0x5387, 0x0 }, | ||
| 231 | { 0x5388, 0x1 }, | ||
| 232 | { 0x5389, 0x15 }, | ||
| 233 | { 0x538a, 0x0 }, | ||
| 234 | { 0x538b, 0x31 }, | ||
| 235 | { 0x538c, 0x0 }, | ||
| 236 | { 0x538d, 0x0 }, | ||
| 237 | { 0x538e, 0x0 }, | ||
| 238 | { 0x538f, 0xf }, | ||
| 239 | { 0x5390, 0x0 }, | ||
| 240 | { 0x5391, 0xab }, | ||
| 241 | { 0x5392, 0x0 }, | ||
| 242 | { 0x5393, 0xa2 }, | ||
| 243 | { 0x5394, 0x8 }, | ||
| 244 | { 0x5480, 0x14 }, | ||
| 245 | { 0x5481, 0x21 }, | ||
| 246 | { 0x5482, 0x36 }, | ||
| 247 | { 0x5483, 0x57 }, | ||
| 248 | { 0x5484, 0x65 }, | ||
| 249 | { 0x5485, 0x71 }, | ||
| 250 | { 0x5486, 0x7d }, | ||
| 251 | { 0x5487, 0x87 }, | ||
| 252 | { 0x5488, 0x91 }, | ||
| 253 | { 0x5489, 0x9a }, | ||
| 254 | { 0x548a, 0xaa }, | ||
| 255 | { 0x548b, 0xb8 }, | ||
| 256 | { 0x548c, 0xcd }, | ||
| 257 | { 0x548d, 0xdd }, | ||
| 258 | { 0x548e, 0xea }, | ||
| 259 | { 0x548f, 0x1d }, | ||
| 260 | { 0x5490, 0x5 }, | ||
| 261 | { 0x5491, 0x0 }, | ||
| 262 | { 0x5492, 0x4 }, | ||
| 263 | { 0x5493, 0x20 }, | ||
| 264 | { 0x5494, 0x3 }, | ||
| 265 | { 0x5495, 0x60 }, | ||
| 266 | { 0x5496, 0x2 }, | ||
| 267 | { 0x5497, 0xb8 }, | ||
| 268 | { 0x5498, 0x2 }, | ||
| 269 | { 0x5499, 0x86 }, | ||
| 270 | { 0x549a, 0x2 }, | ||
| 271 | { 0x549b, 0x5b }, | ||
| 272 | { 0x549c, 0x2 }, | ||
| 273 | { 0x549d, 0x3b }, | ||
| 274 | { 0x549e, 0x2 }, | ||
| 275 | { 0x549f, 0x1c }, | ||
| 276 | { 0x54a0, 0x2 }, | ||
| 277 | { 0x54a1, 0x4 }, | ||
| 278 | { 0x54a2, 0x1 }, | ||
| 279 | { 0x54a3, 0xed }, | ||
| 280 | { 0x54a4, 0x1 }, | ||
| 281 | { 0x54a5, 0xc5 }, | ||
| 282 | { 0x54a6, 0x1 }, | ||
| 283 | { 0x54a7, 0xa5 }, | ||
| 284 | { 0x54a8, 0x1 }, | ||
| 285 | { 0x54a9, 0x6c }, | ||
| 286 | { 0x54aa, 0x1 }, | ||
| 287 | { 0x54ab, 0x41 }, | ||
| 288 | { 0x54ac, 0x1 }, | ||
| 289 | { 0x54ad, 0x20 }, | ||
| 290 | { 0x54ae, 0x0 }, | ||
| 291 | { 0x54af, 0x16 }, | ||
| 292 | { 0x54b0, 0x1 }, | ||
| 293 | { 0x54b1, 0x20 }, | ||
| 294 | { 0x54b2, 0x0 }, | ||
| 295 | { 0x54b3, 0x10 }, | ||
| 296 | { 0x54b4, 0x0 }, | ||
| 297 | { 0x54b5, 0xf0 }, | ||
| 298 | { 0x54b6, 0x0 }, | ||
| 299 | { 0x54b7, 0xdf }, | ||
| 300 | { 0x5402, 0x3f }, | ||
| 301 | { 0x5403, 0x0 }, | ||
| 302 | { 0x3406, 0x0 }, | ||
| 303 | { 0x5180, 0xff }, | ||
| 304 | { 0x5181, 0x52 }, | ||
| 305 | { 0x5182, 0x11 }, | ||
| 306 | { 0x5183, 0x14 }, | ||
| 307 | { 0x5184, 0x25 }, | ||
| 308 | { 0x5185, 0x24 }, | ||
| 309 | { 0x5186, 0x6 }, | ||
| 310 | { 0x5187, 0x8 }, | ||
| 311 | { 0x5188, 0x8 }, | ||
| 312 | { 0x5189, 0x7c }, | ||
| 313 | { 0x518a, 0x60 }, | ||
| 314 | { 0x518b, 0xb2 }, | ||
| 315 | { 0x518c, 0xb2 }, | ||
| 316 | { 0x518d, 0x44 }, | ||
| 317 | { 0x518e, 0x3d }, | ||
| 318 | { 0x518f, 0x58 }, | ||
| 319 | { 0x5190, 0x46 }, | ||
| 320 | { 0x5191, 0xf8 }, | ||
| 321 | { 0x5192, 0x4 }, | ||
| 322 | { 0x5193, 0x70 }, | ||
| 323 | { 0x5194, 0xf0 }, | ||
| 324 | { 0x5195, 0xf0 }, | ||
| 325 | { 0x5196, 0x3 }, | ||
| 326 | { 0x5197, 0x1 }, | ||
| 327 | { 0x5198, 0x4 }, | ||
| 328 | { 0x5199, 0x12 }, | ||
| 329 | { 0x519a, 0x4 }, | ||
| 330 | { 0x519b, 0x0 }, | ||
| 331 | { 0x519c, 0x6 }, | ||
| 332 | { 0x519d, 0x82 }, | ||
| 333 | { 0x519e, 0x0 }, | ||
| 334 | { 0x5025, 0x80 }, | ||
| 335 | { 0x3a0f, 0x38 }, | ||
| 336 | { 0x3a10, 0x30 }, | ||
| 337 | { 0x3a1b, 0x3a }, | ||
| 338 | { 0x3a1e, 0x2e }, | ||
| 339 | { 0x3a11, 0x60 }, | ||
| 340 | { 0x3a1f, 0x10 }, | ||
| 341 | { 0x5688, 0xa6 }, | ||
| 342 | { 0x5689, 0x6a }, | ||
| 343 | { 0x568a, 0xea }, | ||
| 344 | { 0x568b, 0xae }, | ||
| 345 | { 0x568c, 0xa6 }, | ||
| 346 | { 0x568d, 0x6a }, | ||
| 347 | { 0x568e, 0x62 }, | ||
| 348 | { 0x568f, 0x26 }, | ||
| 349 | { 0x5583, 0x40 }, | ||
| 350 | { 0x5584, 0x40 }, | ||
| 351 | { 0x5580, 0x2 }, | ||
| 352 | { 0x5000, 0xcf }, | ||
| 353 | { 0x5800, 0x27 }, | ||
| 354 | { 0x5801, 0x19 }, | ||
| 355 | { 0x5802, 0x12 }, | ||
| 356 | { 0x5803, 0xf }, | ||
| 357 | { 0x5804, 0x10 }, | ||
| 358 | { 0x5805, 0x15 }, | ||
| 359 | { 0x5806, 0x1e }, | ||
| 360 | { 0x5807, 0x2f }, | ||
| 361 | { 0x5808, 0x15 }, | ||
| 362 | { 0x5809, 0xd }, | ||
| 363 | { 0x580a, 0xa }, | ||
| 364 | { 0x580b, 0x9 }, | ||
| 365 | { 0x580c, 0xa }, | ||
| 366 | { 0x580d, 0xc }, | ||
| 367 | { 0x580e, 0x12 }, | ||
| 368 | { 0x580f, 0x19 }, | ||
| 369 | { 0x5810, 0xb }, | ||
| 370 | { 0x5811, 0x7 }, | ||
| 371 | { 0x5812, 0x4 }, | ||
| 372 | { 0x5813, 0x3 }, | ||
| 373 | { 0x5814, 0x3 }, | ||
| 374 | { 0x5815, 0x6 }, | ||
| 375 | { 0x5816, 0xa }, | ||
| 376 | { 0x5817, 0xf }, | ||
| 377 | { 0x5818, 0xa }, | ||
| 378 | { 0x5819, 0x5 }, | ||
| 379 | { 0x581a, 0x1 }, | ||
| 380 | { 0x581b, 0x0 }, | ||
| 381 | { 0x581c, 0x0 }, | ||
| 382 | { 0x581d, 0x3 }, | ||
| 383 | { 0x581e, 0x8 }, | ||
| 384 | { 0x581f, 0xc }, | ||
| 385 | { 0x5820, 0xa }, | ||
| 386 | { 0x5821, 0x5 }, | ||
| 387 | { 0x5822, 0x1 }, | ||
| 388 | { 0x5823, 0x0 }, | ||
| 389 | { 0x5824, 0x0 }, | ||
| 390 | { 0x5825, 0x3 }, | ||
| 391 | { 0x5826, 0x8 }, | ||
| 392 | { 0x5827, 0xc }, | ||
| 393 | { 0x5828, 0xe }, | ||
| 394 | { 0x5829, 0x8 }, | ||
| 395 | { 0x582a, 0x6 }, | ||
| 396 | { 0x582b, 0x4 }, | ||
| 397 | { 0x582c, 0x5 }, | ||
| 398 | { 0x582d, 0x7 }, | ||
| 399 | { 0x582e, 0xb }, | ||
| 400 | { 0x582f, 0x12 }, | ||
| 401 | { 0x5830, 0x18 }, | ||
| 402 | { 0x5831, 0x10 }, | ||
| 403 | { 0x5832, 0xc }, | ||
| 404 | { 0x5833, 0xa }, | ||
| 405 | { 0x5834, 0xb }, | ||
| 406 | { 0x5835, 0xe }, | ||
| 407 | { 0x5836, 0x15 }, | ||
| 408 | { 0x5837, 0x19 }, | ||
| 409 | { 0x5838, 0x32 }, | ||
| 410 | { 0x5839, 0x1f }, | ||
| 411 | { 0x583a, 0x18 }, | ||
| 412 | { 0x583b, 0x16 }, | ||
| 413 | { 0x583c, 0x17 }, | ||
| 414 | { 0x583d, 0x1e }, | ||
| 415 | { 0x583e, 0x26 }, | ||
| 416 | { 0x583f, 0x53 }, | ||
| 417 | { 0x5840, 0x10 }, | ||
| 418 | { 0x5841, 0xf }, | ||
| 419 | { 0x5842, 0xd }, | ||
| 420 | { 0x5843, 0xc }, | ||
| 421 | { 0x5844, 0xe }, | ||
| 422 | { 0x5845, 0x9 }, | ||
| 423 | { 0x5846, 0x11 }, | ||
| 424 | { 0x5847, 0x10 }, | ||
| 425 | { 0x5848, 0x10 }, | ||
| 426 | { 0x5849, 0x10 }, | ||
| 427 | { 0x584a, 0x10 }, | ||
| 428 | { 0x584b, 0xe }, | ||
| 429 | { 0x584c, 0x10 }, | ||
| 430 | { 0x584d, 0x10 }, | ||
| 431 | { 0x584e, 0x11 }, | ||
| 432 | { 0x584f, 0x10 }, | ||
| 433 | { 0x5850, 0xf }, | ||
| 434 | { 0x5851, 0xc }, | ||
| 435 | { 0x5852, 0xf }, | ||
| 436 | { 0x5853, 0x10 }, | ||
| 437 | { 0x5854, 0x10 }, | ||
| 438 | { 0x5855, 0xf }, | ||
| 439 | { 0x5856, 0xe }, | ||
| 440 | { 0x5857, 0xb }, | ||
| 441 | { 0x5858, 0x10 }, | ||
| 442 | { 0x5859, 0xd }, | ||
| 443 | { 0x585a, 0xd }, | ||
| 444 | { 0x585b, 0xc }, | ||
| 445 | { 0x585c, 0xc }, | ||
| 446 | { 0x585d, 0xc }, | ||
| 447 | { 0x585e, 0xb }, | ||
| 448 | { 0x585f, 0xc }, | ||
| 449 | { 0x5860, 0xc }, | ||
| 450 | { 0x5861, 0xc }, | ||
| 451 | { 0x5862, 0xd }, | ||
| 452 | { 0x5863, 0x8 }, | ||
| 453 | { 0x5864, 0x11 }, | ||
| 454 | { 0x5865, 0x18 }, | ||
| 455 | { 0x5866, 0x18 }, | ||
| 456 | { 0x5867, 0x19 }, | ||
| 457 | { 0x5868, 0x17 }, | ||
| 458 | { 0x5869, 0x19 }, | ||
| 459 | { 0x586a, 0x16 }, | ||
| 460 | { 0x586b, 0x13 }, | ||
| 461 | { 0x586c, 0x13 }, | ||
| 462 | { 0x586d, 0x12 }, | ||
| 463 | { 0x586e, 0x13 }, | ||
| 464 | { 0x586f, 0x16 }, | ||
| 465 | { 0x5870, 0x14 }, | ||
| 466 | { 0x5871, 0x12 }, | ||
| 467 | { 0x5872, 0x10 }, | ||
| 468 | { 0x5873, 0x11 }, | ||
| 469 | { 0x5874, 0x11 }, | ||
| 470 | { 0x5875, 0x16 }, | ||
| 471 | { 0x5876, 0x14 }, | ||
| 472 | { 0x5877, 0x11 }, | ||
| 473 | { 0x5878, 0x10 }, | ||
| 474 | { 0x5879, 0xf }, | ||
| 475 | { 0x587a, 0x10 }, | ||
| 476 | { 0x587b, 0x14 }, | ||
| 477 | { 0x587c, 0x13 }, | ||
| 478 | { 0x587d, 0x12 }, | ||
| 479 | { 0x587e, 0x11 }, | ||
| 480 | { 0x587f, 0x11 }, | ||
| 481 | { 0x5880, 0x12 }, | ||
| 482 | { 0x5881, 0x15 }, | ||
| 483 | { 0x5882, 0x14 }, | ||
| 484 | { 0x5883, 0x15 }, | ||
| 485 | { 0x5884, 0x15 }, | ||
| 486 | { 0x5885, 0x15 }, | ||
| 487 | { 0x5886, 0x13 }, | ||
| 488 | { 0x5887, 0x17 }, | ||
| 489 | { 0x3710, 0x10 }, | ||
| 490 | { 0x3632, 0x51 }, | ||
| 491 | { 0x3702, 0x10 }, | ||
| 492 | { 0x3703, 0xb2 }, | ||
| 493 | { 0x3704, 0x18 }, | ||
| 494 | { 0x370b, 0x40 }, | ||
| 495 | { 0x370d, 0x3 }, | ||
| 496 | { 0x3631, 0x1 }, | ||
| 497 | { 0x3632, 0x52 }, | ||
| 498 | { 0x3606, 0x24 }, | ||
| 499 | { 0x3620, 0x96 }, | ||
| 500 | { 0x5785, 0x7 }, | ||
| 501 | { 0x3a13, 0x30 }, | ||
| 502 | { 0x3600, 0x52 }, | ||
| 503 | { 0x3604, 0x48 }, | ||
| 504 | { 0x3606, 0x1b }, | ||
| 505 | { 0x370d, 0xb }, | ||
| 506 | { 0x370f, 0xc0 }, | ||
| 507 | { 0x3709, 0x1 }, | ||
| 508 | { 0x3823, 0x0 }, | ||
| 509 | { 0x5007, 0x0 }, | ||
| 510 | { 0x5009, 0x0 }, | ||
| 511 | { 0x5011, 0x0 }, | ||
| 512 | { 0x5013, 0x0 }, | ||
| 513 | { 0x519e, 0x0 }, | ||
| 514 | { 0x5086, 0x0 }, | ||
| 515 | { 0x5087, 0x0 }, | ||
| 516 | { 0x5088, 0x0 }, | ||
| 517 | { 0x5089, 0x0 }, | ||
| 518 | { 0x302b, 0x0 }, | ||
| 519 | { 0x3503, 0x7 }, | ||
| 520 | { 0x3011, 0x8 }, | ||
| 521 | { 0x350c, 0x2 }, | ||
| 522 | { 0x350d, 0xe4 }, | ||
| 523 | { 0x3621, 0xc9 }, | ||
| 524 | { 0x370a, 0x81 }, | ||
| 525 | { 0xffff, 0xff }, | ||
| 526 | }; | ||
| 527 | |||
| 528 | static struct regval_list ov5642_default_regs_finalise[] = { | ||
| 529 | { 0x3810, 0xc2 }, | ||
| 530 | { 0x3818, 0xc9 }, | ||
| 531 | { 0x381c, 0x10 }, | ||
| 532 | { 0x381d, 0xa0 }, | ||
| 533 | { 0x381e, 0x5 }, | ||
| 534 | { 0x381f, 0xb0 }, | ||
| 535 | { 0x3820, 0x0 }, | ||
| 536 | { 0x3821, 0x0 }, | ||
| 537 | { 0x3824, 0x11 }, | ||
| 538 | { 0x3a08, 0x1b }, | ||
| 539 | { 0x3a09, 0xc0 }, | ||
| 540 | { 0x3a0a, 0x17 }, | ||
| 541 | { 0x3a0b, 0x20 }, | ||
| 542 | { 0x3a0d, 0x2 }, | ||
| 543 | { 0x3a0e, 0x1 }, | ||
| 544 | { 0x401c, 0x4 }, | ||
| 545 | { 0x5682, 0x5 }, | ||
| 546 | { 0x5683, 0x0 }, | ||
| 547 | { 0x5686, 0x2 }, | ||
| 548 | { 0x5687, 0xcc }, | ||
| 549 | { 0x5001, 0x4f }, | ||
| 550 | { 0x589b, 0x6 }, | ||
| 551 | { 0x589a, 0xc5 }, | ||
| 552 | { 0x3503, 0x0 }, | ||
| 553 | { 0x460c, 0x20 }, | ||
| 554 | { 0x460b, 0x37 }, | ||
| 555 | { 0x471c, 0xd0 }, | ||
| 556 | { 0x471d, 0x5 }, | ||
| 557 | { 0x3815, 0x1 }, | ||
| 558 | { 0x3818, 0xc1 }, | ||
| 559 | { 0x501f, 0x0 }, | ||
| 560 | { 0x5002, 0xe0 }, | ||
| 561 | { 0x4300, 0x32 }, /* UYVY */ | ||
| 562 | { 0x3002, 0x1c }, | ||
| 563 | { 0x4800, 0x14 }, | ||
| 564 | { 0x4801, 0xf }, | ||
| 565 | { 0x3007, 0x3b }, | ||
| 566 | { 0x300e, 0x4 }, | ||
| 567 | { 0x4803, 0x50 }, | ||
| 568 | { 0x3815, 0x1 }, | ||
| 569 | { 0x4713, 0x2 }, | ||
| 570 | { 0x4842, 0x1 }, | ||
| 571 | { 0x300f, 0xe }, | ||
| 572 | { 0x3003, 0x3 }, | ||
| 573 | { 0x3003, 0x1 }, | ||
| 574 | { 0xffff, 0xff }, | ||
| 575 | }; | ||
| 576 | |||
| 577 | struct ov5642_datafmt { | ||
| 578 | enum v4l2_mbus_pixelcode code; | ||
| 579 | enum v4l2_colorspace colorspace; | ||
| 580 | }; | ||
| 581 | |||
| 582 | struct ov5642 { | ||
| 583 | struct v4l2_subdev subdev; | ||
| 584 | const struct ov5642_datafmt *fmt; | ||
| 585 | }; | ||
| 586 | |||
| 587 | static const struct ov5642_datafmt ov5642_colour_fmts[] = { | ||
| 588 | {V4L2_MBUS_FMT_UYVY8_2X8, V4L2_COLORSPACE_JPEG}, | ||
| 589 | }; | ||
| 590 | |||
| 591 | static struct ov5642 *to_ov5642(const struct i2c_client *client) | ||
| 592 | { | ||
| 593 | return container_of(i2c_get_clientdata(client), struct ov5642, subdev); | ||
| 594 | } | ||
| 595 | |||
| 596 | /* Find a data format by a pixel code in an array */ | ||
| 597 | static const struct ov5642_datafmt | ||
| 598 | *ov5642_find_datafmt(enum v4l2_mbus_pixelcode code) | ||
| 599 | { | ||
| 600 | int i; | ||
| 601 | |||
| 602 | for (i = 0; i < ARRAY_SIZE(ov5642_colour_fmts); i++) | ||
| 603 | if (ov5642_colour_fmts[i].code == code) | ||
| 604 | return ov5642_colour_fmts + i; | ||
| 605 | |||
| 606 | return NULL; | ||
| 607 | } | ||
| 608 | |||
| 609 | static int reg_read(struct i2c_client *client, u16 reg, u8 *val) | ||
| 610 | { | ||
| 611 | int ret; | ||
| 612 | /* We have 16-bit i2c addresses - care for endianess */ | ||
| 613 | unsigned char data[2] = { reg >> 8, reg & 0xff }; | ||
| 614 | |||
| 615 | ret = i2c_master_send(client, data, 2); | ||
| 616 | if (ret < 2) { | ||
| 617 | dev_err(&client->dev, "%s: i2c read error, reg: %x\n", | ||
| 618 | __func__, reg); | ||
| 619 | return ret < 0 ? ret : -EIO; | ||
| 620 | } | ||
| 621 | |||
| 622 | ret = i2c_master_recv(client, val, 1); | ||
| 623 | if (ret < 1) { | ||
| 624 | dev_err(&client->dev, "%s: i2c read error, reg: %x\n", | ||
| 625 | __func__, reg); | ||
| 626 | return ret < 0 ? ret : -EIO; | ||
| 627 | } | ||
| 628 | return 0; | ||
| 629 | } | ||
| 630 | |||
| 631 | static int reg_write(struct i2c_client *client, u16 reg, u8 val) | ||
| 632 | { | ||
| 633 | int ret; | ||
| 634 | unsigned char data[3] = { reg >> 8, reg & 0xff, val }; | ||
| 635 | |||
| 636 | ret = i2c_master_send(client, data, 3); | ||
| 637 | if (ret < 3) { | ||
| 638 | dev_err(&client->dev, "%s: i2c write error, reg: %x\n", | ||
| 639 | __func__, reg); | ||
| 640 | return ret < 0 ? ret : -EIO; | ||
| 641 | } | ||
| 642 | |||
| 643 | return 0; | ||
| 644 | } | ||
| 645 | #ifdef CONFIG_VIDEO_ADV_DEBUG | ||
| 646 | static int ov5642_get_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg) | ||
| 647 | { | ||
| 648 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 649 | int ret; | ||
| 650 | u8 val; | ||
| 651 | |||
| 652 | if (reg->reg & ~0xffff) | ||
| 653 | return -EINVAL; | ||
| 654 | |||
| 655 | reg->size = 1; | ||
| 656 | |||
| 657 | ret = reg_read(client, reg->reg, &val); | ||
| 658 | if (!ret) | ||
| 659 | reg->val = (__u64)val; | ||
| 660 | |||
| 661 | return ret; | ||
| 662 | } | ||
| 663 | |||
| 664 | static int ov5642_set_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg) | ||
| 665 | { | ||
| 666 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 667 | |||
| 668 | if (reg->reg & ~0xffff || reg->val & ~0xff) | ||
| 669 | return -EINVAL; | ||
| 670 | |||
| 671 | return reg_write(client, reg->reg, reg->val); | ||
| 672 | } | ||
| 673 | #endif | ||
| 674 | |||
| 675 | static int ov5642_write_array(struct i2c_client *client, | ||
| 676 | struct regval_list *vals) | ||
| 677 | { | ||
| 678 | while (vals->reg_num != 0xffff || vals->value != 0xff) { | ||
| 679 | int ret = reg_write(client, vals->reg_num, vals->value); | ||
| 680 | if (ret < 0) | ||
| 681 | return ret; | ||
| 682 | vals++; | ||
| 683 | } | ||
| 684 | dev_dbg(&client->dev, "Register list loaded\n"); | ||
| 685 | return 0; | ||
| 686 | } | ||
| 687 | |||
| 688 | static int ov5642_set_resolution(struct i2c_client *client) | ||
| 689 | { | ||
| 690 | int ret; | ||
| 691 | u8 start_x_high = ((OV5642_SENSOR_SIZE_X - OV5642_WIDTH) / 2) >> 8; | ||
| 692 | u8 start_x_low = ((OV5642_SENSOR_SIZE_X - OV5642_WIDTH) / 2) & 0xff; | ||
| 693 | u8 start_y_high = ((OV5642_SENSOR_SIZE_Y - OV5642_HEIGHT) / 2) >> 8; | ||
| 694 | u8 start_y_low = ((OV5642_SENSOR_SIZE_Y - OV5642_HEIGHT) / 2) & 0xff; | ||
| 695 | |||
| 696 | u8 width_high = OV5642_WIDTH >> 8; | ||
| 697 | u8 width_low = OV5642_WIDTH & 0xff; | ||
| 698 | u8 height_high = OV5642_HEIGHT >> 8; | ||
| 699 | u8 height_low = OV5642_HEIGHT & 0xff; | ||
| 700 | |||
| 701 | u8 total_width_high = OV5642_TOTAL_WIDTH >> 8; | ||
| 702 | u8 total_width_low = OV5642_TOTAL_WIDTH & 0xff; | ||
| 703 | u8 total_height_high = OV5642_TOTAL_HEIGHT >> 8; | ||
| 704 | u8 total_height_low = OV5642_TOTAL_HEIGHT & 0xff; | ||
| 705 | |||
| 706 | ret = reg_write(client, REG_WINDOW_START_X_HIGH, start_x_high); | ||
| 707 | if (!ret) | ||
| 708 | ret = reg_write(client, REG_WINDOW_START_X_LOW, start_x_low); | ||
| 709 | if (!ret) | ||
| 710 | ret = reg_write(client, REG_WINDOW_START_Y_HIGH, start_y_high); | ||
| 711 | if (!ret) | ||
| 712 | ret = reg_write(client, REG_WINDOW_START_Y_LOW, start_y_low); | ||
| 713 | |||
| 714 | if (!ret) | ||
| 715 | ret = reg_write(client, REG_WINDOW_WIDTH_HIGH, width_high); | ||
| 716 | if (!ret) | ||
| 717 | ret = reg_write(client, REG_WINDOW_WIDTH_LOW , width_low); | ||
| 718 | if (!ret) | ||
| 719 | ret = reg_write(client, REG_WINDOW_HEIGHT_HIGH, height_high); | ||
| 720 | if (!ret) | ||
| 721 | ret = reg_write(client, REG_WINDOW_HEIGHT_LOW, height_low); | ||
| 722 | |||
| 723 | if (!ret) | ||
| 724 | ret = reg_write(client, REG_OUT_WIDTH_HIGH, width_high); | ||
| 725 | if (!ret) | ||
| 726 | ret = reg_write(client, REG_OUT_WIDTH_LOW , width_low); | ||
| 727 | if (!ret) | ||
| 728 | ret = reg_write(client, REG_OUT_HEIGHT_HIGH, height_high); | ||
| 729 | if (!ret) | ||
| 730 | ret = reg_write(client, REG_OUT_HEIGHT_LOW, height_low); | ||
| 731 | |||
| 732 | if (!ret) | ||
| 733 | ret = reg_write(client, REG_OUT_TOTAL_WIDTH_HIGH, total_width_high); | ||
| 734 | if (!ret) | ||
| 735 | ret = reg_write(client, REG_OUT_TOTAL_WIDTH_LOW, total_width_low); | ||
| 736 | if (!ret) | ||
| 737 | ret = reg_write(client, REG_OUT_TOTAL_HEIGHT_HIGH, total_height_high); | ||
| 738 | if (!ret) | ||
| 739 | ret = reg_write(client, REG_OUT_TOTAL_HEIGHT_LOW, total_height_low); | ||
| 740 | |||
| 741 | return ret; | ||
| 742 | } | ||
| 743 | |||
| 744 | static int ov5642_try_fmt(struct v4l2_subdev *sd, | ||
| 745 | struct v4l2_mbus_framefmt *mf) | ||
| 746 | { | ||
| 747 | const struct ov5642_datafmt *fmt = ov5642_find_datafmt(mf->code); | ||
| 748 | |||
| 749 | dev_dbg(sd->v4l2_dev->dev, "%s(%u) width: %u heigth: %u\n", | ||
| 750 | __func__, mf->code, mf->width, mf->height); | ||
| 751 | |||
| 752 | if (!fmt) { | ||
| 753 | mf->code = ov5642_colour_fmts[0].code; | ||
| 754 | mf->colorspace = ov5642_colour_fmts[0].colorspace; | ||
| 755 | } | ||
| 756 | |||
| 757 | mf->width = OV5642_WIDTH; | ||
| 758 | mf->height = OV5642_HEIGHT; | ||
| 759 | mf->field = V4L2_FIELD_NONE; | ||
| 760 | |||
| 761 | return 0; | ||
| 762 | } | ||
| 763 | |||
| 764 | static int ov5642_s_fmt(struct v4l2_subdev *sd, | ||
| 765 | struct v4l2_mbus_framefmt *mf) | ||
| 766 | { | ||
| 767 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 768 | struct ov5642 *priv = to_ov5642(client); | ||
| 769 | |||
| 770 | dev_dbg(sd->v4l2_dev->dev, "%s(%u)\n", __func__, mf->code); | ||
| 771 | |||
| 772 | /* MIPI CSI could have changed the format, double-check */ | ||
| 773 | if (!ov5642_find_datafmt(mf->code)) | ||
| 774 | return -EINVAL; | ||
| 775 | |||
| 776 | ov5642_try_fmt(sd, mf); | ||
| 777 | |||
| 778 | priv->fmt = ov5642_find_datafmt(mf->code); | ||
| 779 | |||
| 780 | ov5642_write_array(client, ov5642_default_regs_init); | ||
| 781 | ov5642_set_resolution(client); | ||
| 782 | ov5642_write_array(client, ov5642_default_regs_finalise); | ||
| 783 | |||
| 784 | return 0; | ||
| 785 | } | ||
| 786 | |||
| 787 | static int ov5642_g_fmt(struct v4l2_subdev *sd, | ||
| 788 | struct v4l2_mbus_framefmt *mf) | ||
| 789 | { | ||
| 790 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 791 | struct ov5642 *priv = to_ov5642(client); | ||
| 792 | |||
| 793 | const struct ov5642_datafmt *fmt = priv->fmt; | ||
| 794 | |||
| 795 | mf->code = fmt->code; | ||
| 796 | mf->colorspace = fmt->colorspace; | ||
| 797 | mf->width = OV5642_WIDTH; | ||
| 798 | mf->height = OV5642_HEIGHT; | ||
| 799 | mf->field = V4L2_FIELD_NONE; | ||
| 800 | |||
| 801 | return 0; | ||
| 802 | } | ||
| 803 | |||
| 804 | static int ov5642_enum_fmt(struct v4l2_subdev *sd, unsigned int index, | ||
| 805 | enum v4l2_mbus_pixelcode *code) | ||
| 806 | { | ||
| 807 | if (index >= ARRAY_SIZE(ov5642_colour_fmts)) | ||
| 808 | return -EINVAL; | ||
| 809 | |||
| 810 | *code = ov5642_colour_fmts[index].code; | ||
| 811 | return 0; | ||
| 812 | } | ||
| 813 | |||
| 814 | static int ov5642_g_chip_ident(struct v4l2_subdev *sd, | ||
| 815 | struct v4l2_dbg_chip_ident *id) | ||
| 816 | { | ||
| 817 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 818 | |||
| 819 | if (id->match.type != V4L2_CHIP_MATCH_I2C_ADDR) | ||
| 820 | return -EINVAL; | ||
| 821 | |||
| 822 | if (id->match.addr != client->addr) | ||
| 823 | return -ENODEV; | ||
| 824 | |||
| 825 | id->ident = V4L2_IDENT_OV5642; | ||
| 826 | id->revision = 0; | ||
| 827 | |||
| 828 | return 0; | ||
| 829 | } | ||
| 830 | |||
| 831 | static int ov5642_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a) | ||
| 832 | { | ||
| 833 | struct v4l2_rect *rect = &a->c; | ||
| 834 | |||
| 835 | a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | ||
| 836 | rect->top = 0; | ||
| 837 | rect->left = 0; | ||
| 838 | rect->width = OV5642_WIDTH; | ||
| 839 | rect->height = OV5642_HEIGHT; | ||
| 840 | |||
| 841 | return 0; | ||
| 842 | } | ||
| 843 | |||
| 844 | static int ov5642_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a) | ||
| 845 | { | ||
| 846 | a->bounds.left = 0; | ||
| 847 | a->bounds.top = 0; | ||
| 848 | a->bounds.width = OV5642_WIDTH; | ||
| 849 | a->bounds.height = OV5642_HEIGHT; | ||
| 850 | a->defrect = a->bounds; | ||
| 851 | a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | ||
| 852 | a->pixelaspect.numerator = 1; | ||
| 853 | a->pixelaspect.denominator = 1; | ||
| 854 | |||
| 855 | return 0; | ||
| 856 | } | ||
| 857 | |||
| 858 | static struct v4l2_subdev_video_ops ov5642_subdev_video_ops = { | ||
| 859 | .s_mbus_fmt = ov5642_s_fmt, | ||
| 860 | .g_mbus_fmt = ov5642_g_fmt, | ||
| 861 | .try_mbus_fmt = ov5642_try_fmt, | ||
| 862 | .enum_mbus_fmt = ov5642_enum_fmt, | ||
| 863 | .g_crop = ov5642_g_crop, | ||
| 864 | .cropcap = ov5642_cropcap, | ||
| 865 | }; | ||
| 866 | |||
| 867 | static struct v4l2_subdev_core_ops ov5642_subdev_core_ops = { | ||
| 868 | .g_chip_ident = ov5642_g_chip_ident, | ||
| 869 | #ifdef CONFIG_VIDEO_ADV_DEBUG | ||
| 870 | .g_register = ov5642_get_register, | ||
| 871 | .s_register = ov5642_set_register, | ||
| 872 | #endif | ||
| 873 | }; | ||
| 874 | |||
| 875 | static struct v4l2_subdev_ops ov5642_subdev_ops = { | ||
| 876 | .core = &ov5642_subdev_core_ops, | ||
| 877 | .video = &ov5642_subdev_video_ops, | ||
| 878 | }; | ||
| 879 | |||
| 880 | /* | ||
| 881 | * We have to provide soc-camera operations, but we don't have anything to say | ||
| 882 | * there. The MIPI CSI2 driver will provide .query_bus_param and .set_bus_param | ||
| 883 | */ | ||
| 884 | static unsigned long soc_ov5642_query_bus_param(struct soc_camera_device *icd) | ||
| 885 | { | ||
| 886 | return 0; | ||
| 887 | } | ||
| 888 | |||
| 889 | static int soc_ov5642_set_bus_param(struct soc_camera_device *icd, | ||
| 890 | unsigned long flags) | ||
| 891 | { | ||
| 892 | return -EINVAL; | ||
| 893 | } | ||
| 894 | |||
| 895 | static struct soc_camera_ops soc_ov5642_ops = { | ||
| 896 | .query_bus_param = soc_ov5642_query_bus_param, | ||
| 897 | .set_bus_param = soc_ov5642_set_bus_param, | ||
| 898 | }; | ||
| 899 | |||
| 900 | static int ov5642_video_probe(struct soc_camera_device *icd, | ||
| 901 | struct i2c_client *client) | ||
| 902 | { | ||
| 903 | int ret; | ||
| 904 | u8 id_high, id_low; | ||
| 905 | u16 id; | ||
| 906 | |||
| 907 | /* Read sensor Model ID */ | ||
| 908 | ret = reg_read(client, REG_CHIP_ID_HIGH, &id_high); | ||
| 909 | if (ret < 0) | ||
| 910 | return ret; | ||
| 911 | |||
| 912 | id = id_high << 8; | ||
| 913 | |||
| 914 | ret = reg_read(client, REG_CHIP_ID_LOW, &id_low); | ||
| 915 | if (ret < 0) | ||
| 916 | return ret; | ||
| 917 | |||
| 918 | id |= id_low; | ||
| 919 | |||
| 920 | dev_info(&client->dev, "Chip ID 0x%04x detected\n", id); | ||
| 921 | |||
| 922 | if (id != 0x5642) | ||
| 923 | return -ENODEV; | ||
| 924 | |||
| 925 | return 0; | ||
| 926 | } | ||
| 927 | |||
| 928 | static int ov5642_probe(struct i2c_client *client, | ||
| 929 | const struct i2c_device_id *did) | ||
| 930 | { | ||
| 931 | struct ov5642 *priv; | ||
| 932 | struct soc_camera_device *icd = client->dev.platform_data; | ||
| 933 | struct soc_camera_link *icl; | ||
| 934 | int ret; | ||
| 935 | |||
| 936 | if (!icd) { | ||
| 937 | dev_err(&client->dev, "OV5642: missing soc-camera data!\n"); | ||
| 938 | return -EINVAL; | ||
| 939 | } | ||
| 940 | |||
| 941 | icl = to_soc_camera_link(icd); | ||
| 942 | if (!icl) { | ||
| 943 | dev_err(&client->dev, "OV5642: missing platform data!\n"); | ||
| 944 | return -EINVAL; | ||
| 945 | } | ||
| 946 | |||
| 947 | priv = kzalloc(sizeof(struct ov5642), GFP_KERNEL); | ||
| 948 | if (!priv) | ||
| 949 | return -ENOMEM; | ||
| 950 | |||
| 951 | v4l2_i2c_subdev_init(&priv->subdev, client, &ov5642_subdev_ops); | ||
| 952 | |||
| 953 | icd->ops = &soc_ov5642_ops; | ||
| 954 | priv->fmt = &ov5642_colour_fmts[0]; | ||
| 955 | |||
| 956 | ret = ov5642_video_probe(icd, client); | ||
| 957 | if (ret < 0) | ||
| 958 | goto error; | ||
| 959 | |||
| 960 | return 0; | ||
| 961 | |||
| 962 | error: | ||
| 963 | icd->ops = NULL; | ||
| 964 | kfree(priv); | ||
| 965 | return ret; | ||
| 966 | } | ||
| 967 | |||
| 968 | static int ov5642_remove(struct i2c_client *client) | ||
| 969 | { | ||
| 970 | struct ov5642 *priv = to_ov5642(client); | ||
| 971 | struct soc_camera_device *icd = client->dev.platform_data; | ||
| 972 | struct soc_camera_link *icl = to_soc_camera_link(icd); | ||
| 973 | |||
| 974 | icd->ops = NULL; | ||
| 975 | if (icl->free_bus) | ||
| 976 | icl->free_bus(icl); | ||
| 977 | kfree(priv); | ||
| 978 | |||
| 979 | return 0; | ||
| 980 | } | ||
| 981 | |||
| 982 | static const struct i2c_device_id ov5642_id[] = { | ||
| 983 | { "ov5642", 0 }, | ||
| 984 | { } | ||
| 985 | }; | ||
| 986 | MODULE_DEVICE_TABLE(i2c, ov5642_id); | ||
| 987 | |||
| 988 | static struct i2c_driver ov5642_i2c_driver = { | ||
| 989 | .driver = { | ||
| 990 | .name = "ov5642", | ||
| 991 | }, | ||
| 992 | .probe = ov5642_probe, | ||
| 993 | .remove = ov5642_remove, | ||
| 994 | .id_table = ov5642_id, | ||
| 995 | }; | ||
| 996 | |||
| 997 | static int __init ov5642_mod_init(void) | ||
| 998 | { | ||
| 999 | return i2c_add_driver(&ov5642_i2c_driver); | ||
| 1000 | } | ||
| 1001 | |||
| 1002 | static void __exit ov5642_mod_exit(void) | ||
| 1003 | { | ||
| 1004 | i2c_del_driver(&ov5642_i2c_driver); | ||
| 1005 | } | ||
| 1006 | |||
| 1007 | module_init(ov5642_mod_init); | ||
| 1008 | module_exit(ov5642_mod_exit); | ||
| 1009 | |||
| 1010 | MODULE_DESCRIPTION("Omnivision OV5642 Camera driver"); | ||
| 1011 | MODULE_AUTHOR("Bastian Hecht <hechtb@gmail.com>"); | ||
| 1012 | MODULE_LICENSE("GPL v2"); | ||
diff --git a/drivers/media/video/ov7670.c b/drivers/media/video/ov7670.c index d4e7c11553c3..8aa058531280 100644 --- a/drivers/media/video/ov7670.c +++ b/drivers/media/video/ov7670.c | |||
| @@ -19,8 +19,7 @@ | |||
| 19 | #include <media/v4l2-device.h> | 19 | #include <media/v4l2-device.h> |
| 20 | #include <media/v4l2-chip-ident.h> | 20 | #include <media/v4l2-chip-ident.h> |
| 21 | #include <media/v4l2-mediabus.h> | 21 | #include <media/v4l2-mediabus.h> |
| 22 | 22 | #include <media/ov7670.h> | |
| 23 | #include "ov7670.h" | ||
| 24 | 23 | ||
| 25 | MODULE_AUTHOR("Jonathan Corbet <corbet@lwn.net>"); | 24 | MODULE_AUTHOR("Jonathan Corbet <corbet@lwn.net>"); |
| 26 | MODULE_DESCRIPTION("A low-level driver for OmniVision ov7670 sensors"); | 25 | MODULE_DESCRIPTION("A low-level driver for OmniVision ov7670 sensors"); |
diff --git a/drivers/media/video/ov772x.c b/drivers/media/video/ov772x.c index 48895ef863ff..397870f076c1 100644 --- a/drivers/media/video/ov772x.c +++ b/drivers/media/video/ov772x.c | |||
| @@ -1032,13 +1032,9 @@ static int ov772x_video_probe(struct soc_camera_device *icd, | |||
| 1032 | u8 pid, ver; | 1032 | u8 pid, ver; |
| 1033 | const char *devname; | 1033 | const char *devname; |
| 1034 | 1034 | ||
| 1035 | /* | 1035 | /* We must have a parent by now. And it cannot be a wrong one. */ |
| 1036 | * We must have a parent by now. And it cannot be a wrong one. | 1036 | BUG_ON(!icd->parent || |
| 1037 | * So this entire test is completely redundant. | 1037 | to_soc_camera_host(icd->parent)->nr != icd->iface); |
| 1038 | */ | ||
| 1039 | if (!icd->dev.parent || | ||
| 1040 | to_soc_camera_host(icd->dev.parent)->nr != icd->iface) | ||
| 1041 | return -ENODEV; | ||
| 1042 | 1038 | ||
| 1043 | /* | 1039 | /* |
| 1044 | * check and show product ID and manufacturer ID | 1040 | * check and show product ID and manufacturer ID |
diff --git a/drivers/media/video/ov9640.c b/drivers/media/video/ov9640.c index 5173ac449dd8..3681a6ff0815 100644 --- a/drivers/media/video/ov9640.c +++ b/drivers/media/video/ov9640.c | |||
| @@ -657,16 +657,9 @@ static int ov9640_video_probe(struct soc_camera_device *icd, | |||
| 657 | const char *devname; | 657 | const char *devname; |
| 658 | int ret = 0; | 658 | int ret = 0; |
| 659 | 659 | ||
| 660 | /* | 660 | /* We must have a parent by now. And it cannot be a wrong one. */ |
| 661 | * We must have a parent by now. And it cannot be a wrong one. | 661 | BUG_ON(!icd->parent || |
| 662 | * So this entire test is completely redundant. | 662 | to_soc_camera_host(icd->parent)->nr != icd->iface); |
| 663 | */ | ||
| 664 | if (!icd->dev.parent || | ||
| 665 | to_soc_camera_host(icd->dev.parent)->nr != icd->iface) { | ||
| 666 | dev_err(&client->dev, "Parent missing or invalid!\n"); | ||
| 667 | ret = -ENODEV; | ||
| 668 | goto err; | ||
| 669 | } | ||
| 670 | 663 | ||
| 671 | /* | 664 | /* |
| 672 | * check and show product ID and manufacturer ID | 665 | * check and show product ID and manufacturer ID |
diff --git a/drivers/media/video/ov9740.c b/drivers/media/video/ov9740.c index 4d4ee4faca69..edd1ffcca30b 100644 --- a/drivers/media/video/ov9740.c +++ b/drivers/media/video/ov9740.c | |||
| @@ -44,12 +44,12 @@ | |||
| 44 | #define OV9740_Y_ADDR_START_LO 0x0347 | 44 | #define OV9740_Y_ADDR_START_LO 0x0347 |
| 45 | #define OV9740_X_ADDR_END_HI 0x0348 | 45 | #define OV9740_X_ADDR_END_HI 0x0348 |
| 46 | #define OV9740_X_ADDR_END_LO 0x0349 | 46 | #define OV9740_X_ADDR_END_LO 0x0349 |
| 47 | #define OV9740_Y_ADDR_END_HI 0x034A | 47 | #define OV9740_Y_ADDR_END_HI 0x034a |
| 48 | #define OV9740_Y_ADDR_END_LO 0x034B | 48 | #define OV9740_Y_ADDR_END_LO 0x034b |
| 49 | #define OV9740_X_OUTPUT_SIZE_HI 0x034C | 49 | #define OV9740_X_OUTPUT_SIZE_HI 0x034c |
| 50 | #define OV9740_X_OUTPUT_SIZE_LO 0x034D | 50 | #define OV9740_X_OUTPUT_SIZE_LO 0x034d |
| 51 | #define OV9740_Y_OUTPUT_SIZE_HI 0x034E | 51 | #define OV9740_Y_OUTPUT_SIZE_HI 0x034e |
| 52 | #define OV9740_Y_OUTPUT_SIZE_LO 0x034F | 52 | #define OV9740_Y_OUTPUT_SIZE_LO 0x034f |
| 53 | 53 | ||
| 54 | /* IO Control Registers */ | 54 | /* IO Control Registers */ |
| 55 | #define OV9740_IO_CREL00 0x3002 | 55 | #define OV9740_IO_CREL00 0x3002 |
| @@ -68,6 +68,7 @@ | |||
| 68 | #define OV9740_ANALOG_CTRL04 0x3604 | 68 | #define OV9740_ANALOG_CTRL04 0x3604 |
| 69 | #define OV9740_ANALOG_CTRL10 0x3610 | 69 | #define OV9740_ANALOG_CTRL10 0x3610 |
| 70 | #define OV9740_ANALOG_CTRL12 0x3612 | 70 | #define OV9740_ANALOG_CTRL12 0x3612 |
| 71 | #define OV9740_ANALOG_CTRL15 0x3615 | ||
| 71 | #define OV9740_ANALOG_CTRL20 0x3620 | 72 | #define OV9740_ANALOG_CTRL20 0x3620 |
| 72 | #define OV9740_ANALOG_CTRL21 0x3621 | 73 | #define OV9740_ANALOG_CTRL21 0x3621 |
| 73 | #define OV9740_ANALOG_CTRL22 0x3622 | 74 | #define OV9740_ANALOG_CTRL22 0x3622 |
| @@ -89,28 +90,28 @@ | |||
| 89 | #define OV9740_TIMING_CTRL35 0x3835 | 90 | #define OV9740_TIMING_CTRL35 0x3835 |
| 90 | 91 | ||
| 91 | /* Banding Filter */ | 92 | /* Banding Filter */ |
| 92 | #define OV9740_AEC_MAXEXPO_60_H 0x3A02 | 93 | #define OV9740_AEC_MAXEXPO_60_H 0x3a02 |
| 93 | #define OV9740_AEC_MAXEXPO_60_L 0x3A03 | 94 | #define OV9740_AEC_MAXEXPO_60_L 0x3a03 |
| 94 | #define OV9740_AEC_B50_STEP_HI 0x3A08 | 95 | #define OV9740_AEC_B50_STEP_HI 0x3a08 |
| 95 | #define OV9740_AEC_B50_STEP_LO 0x3A09 | 96 | #define OV9740_AEC_B50_STEP_LO 0x3a09 |
| 96 | #define OV9740_AEC_B60_STEP_HI 0x3A0A | 97 | #define OV9740_AEC_B60_STEP_HI 0x3a0a |
| 97 | #define OV9740_AEC_B60_STEP_LO 0x3A0B | 98 | #define OV9740_AEC_B60_STEP_LO 0x3a0b |
| 98 | #define OV9740_AEC_CTRL0D 0x3A0D | 99 | #define OV9740_AEC_CTRL0D 0x3a0d |
| 99 | #define OV9740_AEC_CTRL0E 0x3A0E | 100 | #define OV9740_AEC_CTRL0E 0x3a0e |
| 100 | #define OV9740_AEC_MAXEXPO_50_H 0x3A14 | 101 | #define OV9740_AEC_MAXEXPO_50_H 0x3a14 |
| 101 | #define OV9740_AEC_MAXEXPO_50_L 0x3A15 | 102 | #define OV9740_AEC_MAXEXPO_50_L 0x3a15 |
| 102 | 103 | ||
| 103 | /* AEC/AGC Control */ | 104 | /* AEC/AGC Control */ |
| 104 | #define OV9740_AEC_ENABLE 0x3503 | 105 | #define OV9740_AEC_ENABLE 0x3503 |
| 105 | #define OV9740_GAIN_CEILING_01 0x3A18 | 106 | #define OV9740_GAIN_CEILING_01 0x3a18 |
| 106 | #define OV9740_GAIN_CEILING_02 0x3A19 | 107 | #define OV9740_GAIN_CEILING_02 0x3a19 |
| 107 | #define OV9740_AEC_HI_THRESHOLD 0x3A11 | 108 | #define OV9740_AEC_HI_THRESHOLD 0x3a11 |
| 108 | #define OV9740_AEC_3A1A 0x3A1A | 109 | #define OV9740_AEC_3A1A 0x3a1a |
| 109 | #define OV9740_AEC_CTRL1B_WPT2 0x3A1B | 110 | #define OV9740_AEC_CTRL1B_WPT2 0x3a1b |
| 110 | #define OV9740_AEC_CTRL0F_WPT 0x3A0F | 111 | #define OV9740_AEC_CTRL0F_WPT 0x3a0f |
| 111 | #define OV9740_AEC_CTRL10_BPT 0x3A10 | 112 | #define OV9740_AEC_CTRL10_BPT 0x3a10 |
| 112 | #define OV9740_AEC_CTRL1E_BPT2 0x3A1E | 113 | #define OV9740_AEC_CTRL1E_BPT2 0x3a1e |
| 113 | #define OV9740_AEC_LO_THRESHOLD 0x3A1F | 114 | #define OV9740_AEC_LO_THRESHOLD 0x3a1f |
| 114 | 115 | ||
| 115 | /* BLC Control */ | 116 | /* BLC Control */ |
| 116 | #define OV9740_BLC_AUTO_ENABLE 0x4002 | 117 | #define OV9740_BLC_AUTO_ENABLE 0x4002 |
| @@ -132,7 +133,7 @@ | |||
| 132 | #define OV9740_VT_SYS_CLK_DIV 0x0303 | 133 | #define OV9740_VT_SYS_CLK_DIV 0x0303 |
| 133 | #define OV9740_VT_PIX_CLK_DIV 0x0301 | 134 | #define OV9740_VT_PIX_CLK_DIV 0x0301 |
| 134 | #define OV9740_PLL_CTRL3010 0x3010 | 135 | #define OV9740_PLL_CTRL3010 0x3010 |
| 135 | #define OV9740_VFIFO_CTRL00 0x460E | 136 | #define OV9740_VFIFO_CTRL00 0x460e |
| 136 | 137 | ||
| 137 | /* ISP Control */ | 138 | /* ISP Control */ |
| 138 | #define OV9740_ISP_CTRL00 0x5000 | 139 | #define OV9740_ISP_CTRL00 0x5000 |
| @@ -141,9 +142,9 @@ | |||
| 141 | #define OV9740_ISP_CTRL05 0x5005 | 142 | #define OV9740_ISP_CTRL05 0x5005 |
| 142 | #define OV9740_ISP_CTRL12 0x5012 | 143 | #define OV9740_ISP_CTRL12 0x5012 |
| 143 | #define OV9740_ISP_CTRL19 0x5019 | 144 | #define OV9740_ISP_CTRL19 0x5019 |
| 144 | #define OV9740_ISP_CTRL1A 0x501A | 145 | #define OV9740_ISP_CTRL1A 0x501a |
| 145 | #define OV9740_ISP_CTRL1E 0x501E | 146 | #define OV9740_ISP_CTRL1E 0x501e |
| 146 | #define OV9740_ISP_CTRL1F 0x501F | 147 | #define OV9740_ISP_CTRL1F 0x501f |
| 147 | #define OV9740_ISP_CTRL20 0x5020 | 148 | #define OV9740_ISP_CTRL20 0x5020 |
| 148 | #define OV9740_ISP_CTRL21 0x5021 | 149 | #define OV9740_ISP_CTRL21 0x5021 |
| 149 | 150 | ||
| @@ -158,12 +159,12 @@ | |||
| 158 | #define OV9740_AWB_ADV_CTRL04 0x5187 | 159 | #define OV9740_AWB_ADV_CTRL04 0x5187 |
| 159 | #define OV9740_AWB_ADV_CTRL05 0x5188 | 160 | #define OV9740_AWB_ADV_CTRL05 0x5188 |
| 160 | #define OV9740_AWB_ADV_CTRL06 0x5189 | 161 | #define OV9740_AWB_ADV_CTRL06 0x5189 |
| 161 | #define OV9740_AWB_ADV_CTRL07 0x518A | 162 | #define OV9740_AWB_ADV_CTRL07 0x518a |
| 162 | #define OV9740_AWB_ADV_CTRL08 0x518B | 163 | #define OV9740_AWB_ADV_CTRL08 0x518b |
| 163 | #define OV9740_AWB_ADV_CTRL09 0x518C | 164 | #define OV9740_AWB_ADV_CTRL09 0x518c |
| 164 | #define OV9740_AWB_ADV_CTRL10 0x518D | 165 | #define OV9740_AWB_ADV_CTRL10 0x518d |
| 165 | #define OV9740_AWB_ADV_CTRL11 0x518E | 166 | #define OV9740_AWB_ADV_CTRL11 0x518e |
| 166 | #define OV9740_AWB_CTRL0F 0x518F | 167 | #define OV9740_AWB_CTRL0F 0x518f |
| 167 | #define OV9740_AWB_CTRL10 0x5190 | 168 | #define OV9740_AWB_CTRL10 0x5190 |
| 168 | #define OV9740_AWB_CTRL11 0x5191 | 169 | #define OV9740_AWB_CTRL11 0x5191 |
| 169 | #define OV9740_AWB_CTRL12 0x5192 | 170 | #define OV9740_AWB_CTRL12 0x5192 |
| @@ -180,27 +181,8 @@ | |||
| 180 | #define OV9740_MIPI_CTRL_3012 0x3012 | 181 | #define OV9740_MIPI_CTRL_3012 0x3012 |
| 181 | #define OV9740_SC_CMMM_MIPI_CTR 0x3014 | 182 | #define OV9740_SC_CMMM_MIPI_CTR 0x3014 |
| 182 | 183 | ||
| 183 | /* supported resolutions */ | 184 | #define OV9740_MAX_WIDTH 1280 |
| 184 | enum { | 185 | #define OV9740_MAX_HEIGHT 720 |
| 185 | OV9740_VGA, | ||
| 186 | OV9740_720P, | ||
| 187 | }; | ||
| 188 | |||
| 189 | struct ov9740_resolution { | ||
| 190 | unsigned int width; | ||
| 191 | unsigned int height; | ||
| 192 | }; | ||
| 193 | |||
| 194 | static struct ov9740_resolution ov9740_resolutions[] = { | ||
| 195 | [OV9740_VGA] = { | ||
| 196 | .width = 640, | ||
| 197 | .height = 480, | ||
| 198 | }, | ||
| 199 | [OV9740_720P] = { | ||
| 200 | .width = 1280, | ||
| 201 | .height = 720, | ||
| 202 | }, | ||
| 203 | }; | ||
| 204 | 186 | ||
| 205 | /* Misc. structures */ | 187 | /* Misc. structures */ |
| 206 | struct ov9740_reg { | 188 | struct ov9740_reg { |
| @@ -219,9 +201,16 @@ struct ov9740_priv { | |||
| 219 | 201 | ||
| 220 | bool flag_vflip; | 202 | bool flag_vflip; |
| 221 | bool flag_hflip; | 203 | bool flag_hflip; |
| 204 | |||
| 205 | /* For suspend/resume. */ | ||
| 206 | struct v4l2_mbus_framefmt current_mf; | ||
| 207 | bool current_enable; | ||
| 222 | }; | 208 | }; |
| 223 | 209 | ||
| 224 | static const struct ov9740_reg ov9740_defaults[] = { | 210 | static const struct ov9740_reg ov9740_defaults[] = { |
| 211 | /* Software Reset */ | ||
| 212 | { OV9740_SOFTWARE_RESET, 0x01 }, | ||
| 213 | |||
| 225 | /* Banding Filter */ | 214 | /* Banding Filter */ |
| 226 | { OV9740_AEC_B50_STEP_HI, 0x00 }, | 215 | { OV9740_AEC_B50_STEP_HI, 0x00 }, |
| 227 | { OV9740_AEC_B50_STEP_LO, 0xe8 }, | 216 | { OV9740_AEC_B50_STEP_LO, 0xe8 }, |
| @@ -241,36 +230,36 @@ static const struct ov9740_reg ov9740_defaults[] = { | |||
| 241 | /* Un-documented OV9740 registers */ | 230 | /* Un-documented OV9740 registers */ |
| 242 | { 0x5800, 0x29 }, { 0x5801, 0x25 }, { 0x5802, 0x20 }, { 0x5803, 0x21 }, | 231 | { 0x5800, 0x29 }, { 0x5801, 0x25 }, { 0x5802, 0x20 }, { 0x5803, 0x21 }, |
| 243 | { 0x5804, 0x26 }, { 0x5805, 0x2e }, { 0x5806, 0x11 }, { 0x5807, 0x0c }, | 232 | { 0x5804, 0x26 }, { 0x5805, 0x2e }, { 0x5806, 0x11 }, { 0x5807, 0x0c }, |
| 244 | { 0x5808, 0x09 }, { 0x5809, 0x0a }, { 0x580A, 0x0e }, { 0x580B, 0x16 }, | 233 | { 0x5808, 0x09 }, { 0x5809, 0x0a }, { 0x580a, 0x0e }, { 0x580b, 0x16 }, |
| 245 | { 0x580C, 0x06 }, { 0x580D, 0x02 }, { 0x580E, 0x00 }, { 0x580F, 0x00 }, | 234 | { 0x580c, 0x06 }, { 0x580d, 0x02 }, { 0x580e, 0x00 }, { 0x580f, 0x00 }, |
| 246 | { 0x5810, 0x04 }, { 0x5811, 0x0a }, { 0x5812, 0x05 }, { 0x5813, 0x02 }, | 235 | { 0x5810, 0x04 }, { 0x5811, 0x0a }, { 0x5812, 0x05 }, { 0x5813, 0x02 }, |
| 247 | { 0x5814, 0x00 }, { 0x5815, 0x00 }, { 0x5816, 0x03 }, { 0x5817, 0x09 }, | 236 | { 0x5814, 0x00 }, { 0x5815, 0x00 }, { 0x5816, 0x03 }, { 0x5817, 0x09 }, |
| 248 | { 0x5818, 0x0f }, { 0x5819, 0x0a }, { 0x581A, 0x07 }, { 0x581B, 0x08 }, | 237 | { 0x5818, 0x0f }, { 0x5819, 0x0a }, { 0x581a, 0x07 }, { 0x581b, 0x08 }, |
| 249 | { 0x581C, 0x0b }, { 0x581D, 0x14 }, { 0x581E, 0x28 }, { 0x581F, 0x23 }, | 238 | { 0x581c, 0x0b }, { 0x581d, 0x14 }, { 0x581e, 0x28 }, { 0x581f, 0x23 }, |
| 250 | { 0x5820, 0x1d }, { 0x5821, 0x1e }, { 0x5822, 0x24 }, { 0x5823, 0x2a }, | 239 | { 0x5820, 0x1d }, { 0x5821, 0x1e }, { 0x5822, 0x24 }, { 0x5823, 0x2a }, |
| 251 | { 0x5824, 0x4f }, { 0x5825, 0x6f }, { 0x5826, 0x5f }, { 0x5827, 0x7f }, | 240 | { 0x5824, 0x4f }, { 0x5825, 0x6f }, { 0x5826, 0x5f }, { 0x5827, 0x7f }, |
| 252 | { 0x5828, 0x9f }, { 0x5829, 0x5f }, { 0x582A, 0x8f }, { 0x582B, 0x9e }, | 241 | { 0x5828, 0x9f }, { 0x5829, 0x5f }, { 0x582a, 0x8f }, { 0x582b, 0x9e }, |
| 253 | { 0x582C, 0x8f }, { 0x582D, 0x9f }, { 0x582E, 0x4f }, { 0x582F, 0x87 }, | 242 | { 0x582c, 0x8f }, { 0x582d, 0x9f }, { 0x582e, 0x4f }, { 0x582f, 0x87 }, |
| 254 | { 0x5830, 0x86 }, { 0x5831, 0x97 }, { 0x5832, 0xae }, { 0x5833, 0x3f }, | 243 | { 0x5830, 0x86 }, { 0x5831, 0x97 }, { 0x5832, 0xae }, { 0x5833, 0x3f }, |
| 255 | { 0x5834, 0x8e }, { 0x5835, 0x7c }, { 0x5836, 0x7e }, { 0x5837, 0xaf }, | 244 | { 0x5834, 0x8e }, { 0x5835, 0x7c }, { 0x5836, 0x7e }, { 0x5837, 0xaf }, |
| 256 | { 0x5838, 0x8f }, { 0x5839, 0x8f }, { 0x583A, 0x9f }, { 0x583B, 0x7f }, | 245 | { 0x5838, 0x8f }, { 0x5839, 0x8f }, { 0x583a, 0x9f }, { 0x583b, 0x7f }, |
| 257 | { 0x583C, 0x5f }, | 246 | { 0x583c, 0x5f }, |
| 258 | 247 | ||
| 259 | /* Y Gamma */ | 248 | /* Y Gamma */ |
| 260 | { 0x5480, 0x07 }, { 0x5481, 0x18 }, { 0x5482, 0x2c }, { 0x5483, 0x4e }, | 249 | { 0x5480, 0x07 }, { 0x5481, 0x18 }, { 0x5482, 0x2c }, { 0x5483, 0x4e }, |
| 261 | { 0x5484, 0x5e }, { 0x5485, 0x6b }, { 0x5486, 0x77 }, { 0x5487, 0x82 }, | 250 | { 0x5484, 0x5e }, { 0x5485, 0x6b }, { 0x5486, 0x77 }, { 0x5487, 0x82 }, |
| 262 | { 0x5488, 0x8c }, { 0x5489, 0x95 }, { 0x548A, 0xa4 }, { 0x548B, 0xb1 }, | 251 | { 0x5488, 0x8c }, { 0x5489, 0x95 }, { 0x548a, 0xa4 }, { 0x548b, 0xb1 }, |
| 263 | { 0x548C, 0xc6 }, { 0x548D, 0xd8 }, { 0x548E, 0xe9 }, | 252 | { 0x548c, 0xc6 }, { 0x548d, 0xd8 }, { 0x548e, 0xe9 }, |
| 264 | 253 | ||
| 265 | /* UV Gamma */ | 254 | /* UV Gamma */ |
| 266 | { 0x5490, 0x0f }, { 0x5491, 0xff }, { 0x5492, 0x0d }, { 0x5493, 0x05 }, | 255 | { 0x5490, 0x0f }, { 0x5491, 0xff }, { 0x5492, 0x0d }, { 0x5493, 0x05 }, |
| 267 | { 0x5494, 0x07 }, { 0x5495, 0x1a }, { 0x5496, 0x04 }, { 0x5497, 0x01 }, | 256 | { 0x5494, 0x07 }, { 0x5495, 0x1a }, { 0x5496, 0x04 }, { 0x5497, 0x01 }, |
| 268 | { 0x5498, 0x03 }, { 0x5499, 0x53 }, { 0x549A, 0x02 }, { 0x549B, 0xeb }, | 257 | { 0x5498, 0x03 }, { 0x5499, 0x53 }, { 0x549a, 0x02 }, { 0x549b, 0xeb }, |
| 269 | { 0x549C, 0x02 }, { 0x549D, 0xa0 }, { 0x549E, 0x02 }, { 0x549F, 0x67 }, | 258 | { 0x549c, 0x02 }, { 0x549d, 0xa0 }, { 0x549e, 0x02 }, { 0x549f, 0x67 }, |
| 270 | { 0x54A0, 0x02 }, { 0x54A1, 0x3b }, { 0x54A2, 0x02 }, { 0x54A3, 0x18 }, | 259 | { 0x54a0, 0x02 }, { 0x54a1, 0x3b }, { 0x54a2, 0x02 }, { 0x54a3, 0x18 }, |
| 271 | { 0x54A4, 0x01 }, { 0x54A5, 0xe7 }, { 0x54A6, 0x01 }, { 0x54A7, 0xc3 }, | 260 | { 0x54a4, 0x01 }, { 0x54a5, 0xe7 }, { 0x54a6, 0x01 }, { 0x54a7, 0xc3 }, |
| 272 | { 0x54A8, 0x01 }, { 0x54A9, 0x94 }, { 0x54AA, 0x01 }, { 0x54AB, 0x72 }, | 261 | { 0x54a8, 0x01 }, { 0x54a9, 0x94 }, { 0x54aa, 0x01 }, { 0x54ab, 0x72 }, |
| 273 | { 0x54AC, 0x01 }, { 0x54AD, 0x57 }, | 262 | { 0x54ac, 0x01 }, { 0x54ad, 0x57 }, |
| 274 | 263 | ||
| 275 | /* AWB */ | 264 | /* AWB */ |
| 276 | { OV9740_AWB_CTRL00, 0xf0 }, | 265 | { OV9740_AWB_CTRL00, 0xf0 }, |
| @@ -296,18 +285,18 @@ static const struct ov9740_reg ov9740_defaults[] = { | |||
| 296 | { OV9740_AWB_CTRL14, 0x00 }, | 285 | { OV9740_AWB_CTRL14, 0x00 }, |
| 297 | 286 | ||
| 298 | /* CIP */ | 287 | /* CIP */ |
| 299 | { 0x530D, 0x12 }, | 288 | { 0x530d, 0x12 }, |
| 300 | 289 | ||
| 301 | /* CMX */ | 290 | /* CMX */ |
| 302 | { 0x5380, 0x01 }, { 0x5381, 0x00 }, { 0x5382, 0x00 }, { 0x5383, 0x17 }, | 291 | { 0x5380, 0x01 }, { 0x5381, 0x00 }, { 0x5382, 0x00 }, { 0x5383, 0x17 }, |
| 303 | { 0x5384, 0x00 }, { 0x5385, 0x01 }, { 0x5386, 0x00 }, { 0x5387, 0x00 }, | 292 | { 0x5384, 0x00 }, { 0x5385, 0x01 }, { 0x5386, 0x00 }, { 0x5387, 0x00 }, |
| 304 | { 0x5388, 0x00 }, { 0x5389, 0xe0 }, { 0x538A, 0x00 }, { 0x538B, 0x20 }, | 293 | { 0x5388, 0x00 }, { 0x5389, 0xe0 }, { 0x538a, 0x00 }, { 0x538b, 0x20 }, |
| 305 | { 0x538C, 0x00 }, { 0x538D, 0x00 }, { 0x538E, 0x00 }, { 0x538F, 0x16 }, | 294 | { 0x538c, 0x00 }, { 0x538d, 0x00 }, { 0x538e, 0x00 }, { 0x538f, 0x16 }, |
| 306 | { 0x5390, 0x00 }, { 0x5391, 0x9c }, { 0x5392, 0x00 }, { 0x5393, 0xa0 }, | 295 | { 0x5390, 0x00 }, { 0x5391, 0x9c }, { 0x5392, 0x00 }, { 0x5393, 0xa0 }, |
| 307 | { 0x5394, 0x18 }, | 296 | { 0x5394, 0x18 }, |
| 308 | 297 | ||
| 309 | /* 50/60 Detection */ | 298 | /* 50/60 Detection */ |
| 310 | { 0x3C0A, 0x9c }, { 0x3C0B, 0x3f }, | 299 | { 0x3c0a, 0x9c }, { 0x3c0b, 0x3f }, |
| 311 | 300 | ||
| 312 | /* Output Select */ | 301 | /* Output Select */ |
| 313 | { OV9740_IO_OUTPUT_SEL01, 0x00 }, | 302 | { OV9740_IO_OUTPUT_SEL01, 0x00 }, |
| @@ -333,6 +322,7 @@ static const struct ov9740_reg ov9740_defaults[] = { | |||
| 333 | { OV9740_ANALOG_CTRL10, 0xa1 }, | 322 | { OV9740_ANALOG_CTRL10, 0xa1 }, |
| 334 | { OV9740_ANALOG_CTRL12, 0x24 }, | 323 | { OV9740_ANALOG_CTRL12, 0x24 }, |
| 335 | { OV9740_ANALOG_CTRL22, 0x9f }, | 324 | { OV9740_ANALOG_CTRL22, 0x9f }, |
| 325 | { OV9740_ANALOG_CTRL15, 0xf0 }, | ||
| 336 | 326 | ||
| 337 | /* Sensor Control */ | 327 | /* Sensor Control */ |
| 338 | { OV9740_SENSOR_CTRL03, 0x42 }, | 328 | { OV9740_SENSOR_CTRL03, 0x42 }, |
| @@ -385,7 +375,7 @@ static const struct ov9740_reg ov9740_defaults[] = { | |||
| 385 | { OV9740_LN_LENGTH_PCK_LO, 0x62 }, | 375 | { OV9740_LN_LENGTH_PCK_LO, 0x62 }, |
| 386 | 376 | ||
| 387 | /* MIPI Control */ | 377 | /* MIPI Control */ |
| 388 | { OV9740_MIPI_CTRL00, 0x44 }, | 378 | { OV9740_MIPI_CTRL00, 0x44 }, /* 0x64 for discontinuous clk */ |
| 389 | { OV9740_MIPI_3837, 0x01 }, | 379 | { OV9740_MIPI_3837, 0x01 }, |
| 390 | { OV9740_MIPI_CTRL01, 0x0f }, | 380 | { OV9740_MIPI_CTRL01, 0x0f }, |
| 391 | { OV9740_MIPI_CTRL03, 0x05 }, | 381 | { OV9740_MIPI_CTRL03, 0x05 }, |
| @@ -393,54 +383,9 @@ static const struct ov9740_reg ov9740_defaults[] = { | |||
| 393 | { OV9740_VFIFO_RD_CTRL, 0x16 }, | 383 | { OV9740_VFIFO_RD_CTRL, 0x16 }, |
| 394 | { OV9740_MIPI_CTRL_3012, 0x70 }, | 384 | { OV9740_MIPI_CTRL_3012, 0x70 }, |
| 395 | { OV9740_SC_CMMM_MIPI_CTR, 0x01 }, | 385 | { OV9740_SC_CMMM_MIPI_CTR, 0x01 }, |
| 396 | }; | ||
| 397 | |||
| 398 | static const struct ov9740_reg ov9740_regs_vga[] = { | ||
| 399 | { OV9740_X_ADDR_START_HI, 0x00 }, | ||
| 400 | { OV9740_X_ADDR_START_LO, 0xa0 }, | ||
| 401 | { OV9740_Y_ADDR_START_HI, 0x00 }, | ||
| 402 | { OV9740_Y_ADDR_START_LO, 0x00 }, | ||
| 403 | { OV9740_X_ADDR_END_HI, 0x04 }, | ||
| 404 | { OV9740_X_ADDR_END_LO, 0x63 }, | ||
| 405 | { OV9740_Y_ADDR_END_HI, 0x02 }, | ||
| 406 | { OV9740_Y_ADDR_END_LO, 0xd3 }, | ||
| 407 | { OV9740_X_OUTPUT_SIZE_HI, 0x02 }, | ||
| 408 | { OV9740_X_OUTPUT_SIZE_LO, 0x80 }, | ||
| 409 | { OV9740_Y_OUTPUT_SIZE_HI, 0x01 }, | ||
| 410 | { OV9740_Y_OUTPUT_SIZE_LO, 0xe0 }, | ||
| 411 | { OV9740_ISP_CTRL1E, 0x03 }, | ||
| 412 | { OV9740_ISP_CTRL1F, 0xc0 }, | ||
| 413 | { OV9740_ISP_CTRL20, 0x02 }, | ||
| 414 | { OV9740_ISP_CTRL21, 0xd0 }, | ||
| 415 | { OV9740_VFIFO_READ_START_HI, 0x01 }, | ||
| 416 | { OV9740_VFIFO_READ_START_LO, 0x40 }, | ||
| 417 | { OV9740_ISP_CTRL00, 0xff }, | ||
| 418 | { OV9740_ISP_CTRL01, 0xff }, | ||
| 419 | { OV9740_ISP_CTRL03, 0xff }, | ||
| 420 | }; | ||
| 421 | 386 | ||
| 422 | static const struct ov9740_reg ov9740_regs_720p[] = { | 387 | /* YUYV order */ |
| 423 | { OV9740_X_ADDR_START_HI, 0x00 }, | 388 | { OV9740_ISP_CTRL19, 0x02 }, |
| 424 | { OV9740_X_ADDR_START_LO, 0x00 }, | ||
| 425 | { OV9740_Y_ADDR_START_HI, 0x00 }, | ||
| 426 | { OV9740_Y_ADDR_START_LO, 0x00 }, | ||
| 427 | { OV9740_X_ADDR_END_HI, 0x05 }, | ||
| 428 | { OV9740_X_ADDR_END_LO, 0x03 }, | ||
| 429 | { OV9740_Y_ADDR_END_HI, 0x02 }, | ||
| 430 | { OV9740_Y_ADDR_END_LO, 0xd3 }, | ||
| 431 | { OV9740_X_OUTPUT_SIZE_HI, 0x05 }, | ||
| 432 | { OV9740_X_OUTPUT_SIZE_LO, 0x00 }, | ||
| 433 | { OV9740_Y_OUTPUT_SIZE_HI, 0x02 }, | ||
| 434 | { OV9740_Y_OUTPUT_SIZE_LO, 0xd0 }, | ||
| 435 | { OV9740_ISP_CTRL1E, 0x05 }, | ||
| 436 | { OV9740_ISP_CTRL1F, 0x00 }, | ||
| 437 | { OV9740_ISP_CTRL20, 0x02 }, | ||
| 438 | { OV9740_ISP_CTRL21, 0xd0 }, | ||
| 439 | { OV9740_VFIFO_READ_START_HI, 0x02 }, | ||
| 440 | { OV9740_VFIFO_READ_START_LO, 0x30 }, | ||
| 441 | { OV9740_ISP_CTRL00, 0xff }, | ||
| 442 | { OV9740_ISP_CTRL01, 0xef }, | ||
| 443 | { OV9740_ISP_CTRL03, 0xff }, | ||
| 444 | }; | 389 | }; |
| 445 | 390 | ||
| 446 | static enum v4l2_mbus_pixelcode ov9740_codes[] = { | 391 | static enum v4l2_mbus_pixelcode ov9740_codes[] = { |
| @@ -537,7 +482,8 @@ static int ov9740_reg_rmw(struct i2c_client *client, u16 reg, u8 set, u8 unset) | |||
| 537 | ret = ov9740_reg_read(client, reg, &val); | 482 | ret = ov9740_reg_read(client, reg, &val); |
| 538 | if (ret < 0) { | 483 | if (ret < 0) { |
| 539 | dev_err(&client->dev, | 484 | dev_err(&client->dev, |
| 540 | "[Read]-Modify-Write of register %02x failed!\n", reg); | 485 | "[Read]-Modify-Write of register 0x%04x failed!\n", |
| 486 | reg); | ||
| 541 | return ret; | 487 | return ret; |
| 542 | } | 488 | } |
| 543 | 489 | ||
| @@ -547,7 +493,8 @@ static int ov9740_reg_rmw(struct i2c_client *client, u16 reg, u8 set, u8 unset) | |||
| 547 | ret = ov9740_reg_write(client, reg, val); | 493 | ret = ov9740_reg_write(client, reg, val); |
| 548 | if (ret < 0) { | 494 | if (ret < 0) { |
| 549 | dev_err(&client->dev, | 495 | dev_err(&client->dev, |
| 550 | "Read-Modify-[Write] of register %02x failed!\n", reg); | 496 | "Read-Modify-[Write] of register 0x%04x failed!\n", |
| 497 | reg); | ||
| 551 | return ret; | 498 | return ret; |
| 552 | } | 499 | } |
| 553 | 500 | ||
| @@ -608,6 +555,8 @@ static int ov9740_s_stream(struct v4l2_subdev *sd, int enable) | |||
| 608 | 0x00); | 555 | 0x00); |
| 609 | } | 556 | } |
| 610 | 557 | ||
| 558 | priv->current_enable = enable; | ||
| 559 | |||
| 611 | return ret; | 560 | return ret; |
| 612 | } | 561 | } |
| 613 | 562 | ||
| @@ -630,126 +579,127 @@ static unsigned long ov9740_query_bus_param(struct soc_camera_device *icd) | |||
| 630 | return soc_camera_apply_sensor_flags(icl, flags); | 579 | return soc_camera_apply_sensor_flags(icl, flags); |
| 631 | } | 580 | } |
| 632 | 581 | ||
| 633 | /* Get status of additional camera capabilities */ | 582 | /* select nearest higher resolution for capture */ |
| 634 | static int ov9740_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) | 583 | static void ov9740_res_roundup(u32 *width, u32 *height) |
| 635 | { | ||
| 636 | struct ov9740_priv *priv = to_ov9740(sd); | ||
| 637 | |||
| 638 | switch (ctrl->id) { | ||
| 639 | case V4L2_CID_VFLIP: | ||
| 640 | ctrl->value = priv->flag_vflip; | ||
| 641 | break; | ||
| 642 | case V4L2_CID_HFLIP: | ||
| 643 | ctrl->value = priv->flag_hflip; | ||
| 644 | break; | ||
| 645 | default: | ||
| 646 | return -EINVAL; | ||
| 647 | } | ||
| 648 | |||
| 649 | return 0; | ||
| 650 | } | ||
| 651 | |||
| 652 | /* Set status of additional camera capabilities */ | ||
| 653 | static int ov9740_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) | ||
| 654 | { | ||
| 655 | struct ov9740_priv *priv = to_ov9740(sd); | ||
| 656 | |||
| 657 | switch (ctrl->id) { | ||
| 658 | case V4L2_CID_VFLIP: | ||
| 659 | priv->flag_vflip = ctrl->value; | ||
| 660 | break; | ||
| 661 | case V4L2_CID_HFLIP: | ||
| 662 | priv->flag_hflip = ctrl->value; | ||
| 663 | break; | ||
| 664 | default: | ||
| 665 | return -EINVAL; | ||
| 666 | } | ||
| 667 | |||
| 668 | return 0; | ||
| 669 | } | ||
| 670 | |||
| 671 | /* Get chip identification */ | ||
| 672 | static int ov9740_g_chip_ident(struct v4l2_subdev *sd, | ||
| 673 | struct v4l2_dbg_chip_ident *id) | ||
| 674 | { | 584 | { |
| 675 | struct ov9740_priv *priv = to_ov9740(sd); | 585 | /* Width must be a multiple of 4 pixels. */ |
| 586 | *width = ALIGN(*width, 4); | ||
| 676 | 587 | ||
| 677 | id->ident = priv->ident; | 588 | /* Max resolution is 1280x720 (720p). */ |
| 678 | id->revision = priv->revision; | 589 | if (*width > OV9740_MAX_WIDTH) |
| 590 | *width = OV9740_MAX_WIDTH; | ||
| 679 | 591 | ||
| 680 | return 0; | 592 | if (*height > OV9740_MAX_HEIGHT) |
| 593 | *height = OV9740_MAX_HEIGHT; | ||
| 681 | } | 594 | } |
| 682 | 595 | ||
| 683 | #ifdef CONFIG_VIDEO_ADV_DEBUG | 596 | /* Setup registers according to resolution and color encoding */ |
| 684 | static int ov9740_get_register(struct v4l2_subdev *sd, | 597 | static int ov9740_set_res(struct i2c_client *client, u32 width, u32 height) |
| 685 | struct v4l2_dbg_register *reg) | ||
| 686 | { | 598 | { |
| 687 | struct i2c_client *client = v4l2_get_subdevdata(sd); | 599 | u32 x_start; |
| 600 | u32 y_start; | ||
| 601 | u32 x_end; | ||
| 602 | u32 y_end; | ||
| 603 | bool scaling = 0; | ||
| 604 | u32 scale_input_x; | ||
| 605 | u32 scale_input_y; | ||
| 688 | int ret; | 606 | int ret; |
| 689 | u8 val; | ||
| 690 | |||
| 691 | if (reg->reg & ~0xffff) | ||
| 692 | return -EINVAL; | ||
| 693 | 607 | ||
| 694 | reg->size = 2; | 608 | if ((width != OV9740_MAX_WIDTH) || (height != OV9740_MAX_HEIGHT)) |
| 695 | 609 | scaling = 1; | |
| 696 | ret = ov9740_reg_read(client, reg->reg, &val); | ||
| 697 | if (ret) | ||
| 698 | return ret; | ||
| 699 | |||
| 700 | reg->val = (__u64)val; | ||
| 701 | 610 | ||
| 702 | return ret; | 611 | /* |
| 703 | } | 612 | * Try to use as much of the sensor area as possible when supporting |
| 704 | 613 | * smaller resolutions. Depending on the aspect ratio of the | |
| 705 | static int ov9740_set_register(struct v4l2_subdev *sd, | 614 | * chosen resolution, we can either use the full width of the sensor, |
| 706 | struct v4l2_dbg_register *reg) | 615 | * or the full height of the sensor (or both if the aspect ratio is |
| 707 | { | 616 | * the same as 1280x720. |
| 708 | struct i2c_client *client = v4l2_get_subdevdata(sd); | 617 | */ |
| 618 | if ((OV9740_MAX_WIDTH * height) > (OV9740_MAX_HEIGHT * width)) { | ||
| 619 | scale_input_x = (OV9740_MAX_HEIGHT * width) / height; | ||
| 620 | scale_input_y = OV9740_MAX_HEIGHT; | ||
| 621 | } else { | ||
| 622 | scale_input_x = OV9740_MAX_WIDTH; | ||
| 623 | scale_input_y = (OV9740_MAX_WIDTH * height) / width; | ||
| 624 | } | ||
| 709 | 625 | ||
| 710 | if (reg->reg & ~0xffff || reg->val & ~0xff) | 626 | /* These describe the area of the sensor to use. */ |
| 711 | return -EINVAL; | 627 | x_start = (OV9740_MAX_WIDTH - scale_input_x) / 2; |
| 628 | y_start = (OV9740_MAX_HEIGHT - scale_input_y) / 2; | ||
| 629 | x_end = x_start + scale_input_x - 1; | ||
| 630 | y_end = y_start + scale_input_y - 1; | ||
| 712 | 631 | ||
| 713 | return ov9740_reg_write(client, reg->reg, reg->val); | 632 | ret = ov9740_reg_write(client, OV9740_X_ADDR_START_HI, x_start >> 8); |
| 714 | } | 633 | if (ret) |
| 715 | #endif | 634 | goto done; |
| 635 | ret = ov9740_reg_write(client, OV9740_X_ADDR_START_LO, x_start & 0xff); | ||
| 636 | if (ret) | ||
| 637 | goto done; | ||
| 638 | ret = ov9740_reg_write(client, OV9740_Y_ADDR_START_HI, y_start >> 8); | ||
| 639 | if (ret) | ||
| 640 | goto done; | ||
| 641 | ret = ov9740_reg_write(client, OV9740_Y_ADDR_START_LO, y_start & 0xff); | ||
| 642 | if (ret) | ||
| 643 | goto done; | ||
| 716 | 644 | ||
| 717 | /* select nearest higher resolution for capture */ | 645 | ret = ov9740_reg_write(client, OV9740_X_ADDR_END_HI, x_end >> 8); |
| 718 | static void ov9740_res_roundup(u32 *width, u32 *height) | 646 | if (ret) |
| 719 | { | 647 | goto done; |
| 720 | int i; | 648 | ret = ov9740_reg_write(client, OV9740_X_ADDR_END_LO, x_end & 0xff); |
| 649 | if (ret) | ||
| 650 | goto done; | ||
| 651 | ret = ov9740_reg_write(client, OV9740_Y_ADDR_END_HI, y_end >> 8); | ||
| 652 | if (ret) | ||
| 653 | goto done; | ||
| 654 | ret = ov9740_reg_write(client, OV9740_Y_ADDR_END_LO, y_end & 0xff); | ||
| 655 | if (ret) | ||
| 656 | goto done; | ||
| 721 | 657 | ||
| 722 | for (i = 0; i < ARRAY_SIZE(ov9740_resolutions); i++) | 658 | ret = ov9740_reg_write(client, OV9740_X_OUTPUT_SIZE_HI, width >> 8); |
| 723 | if ((ov9740_resolutions[i].width >= *width) && | 659 | if (ret) |
| 724 | (ov9740_resolutions[i].height >= *height)) { | 660 | goto done; |
| 725 | *width = ov9740_resolutions[i].width; | 661 | ret = ov9740_reg_write(client, OV9740_X_OUTPUT_SIZE_LO, width & 0xff); |
| 726 | *height = ov9740_resolutions[i].height; | 662 | if (ret) |
| 727 | return; | 663 | goto done; |
| 728 | } | 664 | ret = ov9740_reg_write(client, OV9740_Y_OUTPUT_SIZE_HI, height >> 8); |
| 665 | if (ret) | ||
| 666 | goto done; | ||
| 667 | ret = ov9740_reg_write(client, OV9740_Y_OUTPUT_SIZE_LO, height & 0xff); | ||
| 668 | if (ret) | ||
| 669 | goto done; | ||
| 729 | 670 | ||
| 730 | *width = ov9740_resolutions[OV9740_720P].width; | 671 | ret = ov9740_reg_write(client, OV9740_ISP_CTRL1E, scale_input_x >> 8); |
| 731 | *height = ov9740_resolutions[OV9740_720P].height; | 672 | if (ret) |
| 732 | } | 673 | goto done; |
| 674 | ret = ov9740_reg_write(client, OV9740_ISP_CTRL1F, scale_input_x & 0xff); | ||
| 675 | if (ret) | ||
| 676 | goto done; | ||
| 677 | ret = ov9740_reg_write(client, OV9740_ISP_CTRL20, scale_input_y >> 8); | ||
| 678 | if (ret) | ||
| 679 | goto done; | ||
| 680 | ret = ov9740_reg_write(client, OV9740_ISP_CTRL21, scale_input_y & 0xff); | ||
| 681 | if (ret) | ||
| 682 | goto done; | ||
| 733 | 683 | ||
| 734 | /* Setup registers according to resolution and color encoding */ | 684 | ret = ov9740_reg_write(client, OV9740_VFIFO_READ_START_HI, |
| 735 | static int ov9740_set_res(struct i2c_client *client, u32 width) | 685 | (scale_input_x - width) >> 8); |
| 736 | { | 686 | if (ret) |
| 737 | int ret; | 687 | goto done; |
| 688 | ret = ov9740_reg_write(client, OV9740_VFIFO_READ_START_LO, | ||
| 689 | (scale_input_x - width) & 0xff); | ||
| 690 | if (ret) | ||
| 691 | goto done; | ||
| 738 | 692 | ||
| 739 | /* select register configuration for given resolution */ | 693 | ret = ov9740_reg_write(client, OV9740_ISP_CTRL00, 0xff); |
| 740 | if (width == ov9740_resolutions[OV9740_VGA].width) { | 694 | if (ret) |
| 741 | dev_dbg(&client->dev, "Setting image size to 640x480\n"); | 695 | goto done; |
| 742 | ret = ov9740_reg_write_array(client, ov9740_regs_vga, | 696 | ret = ov9740_reg_write(client, OV9740_ISP_CTRL01, 0xef | |
| 743 | ARRAY_SIZE(ov9740_regs_vga)); | 697 | (scaling << 4)); |
| 744 | } else if (width == ov9740_resolutions[OV9740_720P].width) { | 698 | if (ret) |
| 745 | dev_dbg(&client->dev, "Setting image size to 1280x720\n"); | 699 | goto done; |
| 746 | ret = ov9740_reg_write_array(client, ov9740_regs_720p, | 700 | ret = ov9740_reg_write(client, OV9740_ISP_CTRL03, 0xff); |
| 747 | ARRAY_SIZE(ov9740_regs_720p)); | ||
| 748 | } else { | ||
| 749 | dev_err(&client->dev, "Failed to select resolution!\n"); | ||
| 750 | return -EINVAL; | ||
| 751 | } | ||
| 752 | 701 | ||
| 702 | done: | ||
| 753 | return ret; | 703 | return ret; |
| 754 | } | 704 | } |
| 755 | 705 | ||
| @@ -758,6 +708,7 @@ static int ov9740_s_fmt(struct v4l2_subdev *sd, | |||
| 758 | struct v4l2_mbus_framefmt *mf) | 708 | struct v4l2_mbus_framefmt *mf) |
| 759 | { | 709 | { |
| 760 | struct i2c_client *client = v4l2_get_subdevdata(sd); | 710 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
| 711 | struct ov9740_priv *priv = to_ov9740(sd); | ||
| 761 | enum v4l2_colorspace cspace; | 712 | enum v4l2_colorspace cspace; |
| 762 | enum v4l2_mbus_pixelcode code = mf->code; | 713 | enum v4l2_mbus_pixelcode code = mf->code; |
| 763 | int ret; | 714 | int ret; |
| @@ -777,13 +728,15 @@ static int ov9740_s_fmt(struct v4l2_subdev *sd, | |||
| 777 | if (ret < 0) | 728 | if (ret < 0) |
| 778 | return ret; | 729 | return ret; |
| 779 | 730 | ||
| 780 | ret = ov9740_set_res(client, mf->width); | 731 | ret = ov9740_set_res(client, mf->width, mf->height); |
| 781 | if (ret < 0) | 732 | if (ret < 0) |
| 782 | return ret; | 733 | return ret; |
| 783 | 734 | ||
| 784 | mf->code = code; | 735 | mf->code = code; |
| 785 | mf->colorspace = cspace; | 736 | mf->colorspace = cspace; |
| 786 | 737 | ||
| 738 | memcpy(&priv->current_mf, mf, sizeof(struct v4l2_mbus_framefmt)); | ||
| 739 | |||
| 787 | return ret; | 740 | return ret; |
| 788 | } | 741 | } |
| 789 | 742 | ||
| @@ -814,8 +767,8 @@ static int ov9740_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a) | |||
| 814 | { | 767 | { |
| 815 | a->bounds.left = 0; | 768 | a->bounds.left = 0; |
| 816 | a->bounds.top = 0; | 769 | a->bounds.top = 0; |
| 817 | a->bounds.width = ov9740_resolutions[OV9740_720P].width; | 770 | a->bounds.width = OV9740_MAX_WIDTH; |
| 818 | a->bounds.height = ov9740_resolutions[OV9740_720P].height; | 771 | a->bounds.height = OV9740_MAX_HEIGHT; |
| 819 | a->defrect = a->bounds; | 772 | a->defrect = a->bounds; |
| 820 | a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | 773 | a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; |
| 821 | a->pixelaspect.numerator = 1; | 774 | a->pixelaspect.numerator = 1; |
| @@ -828,13 +781,115 @@ static int ov9740_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a) | |||
| 828 | { | 781 | { |
| 829 | a->c.left = 0; | 782 | a->c.left = 0; |
| 830 | a->c.top = 0; | 783 | a->c.top = 0; |
| 831 | a->c.width = ov9740_resolutions[OV9740_720P].width; | 784 | a->c.width = OV9740_MAX_WIDTH; |
| 832 | a->c.height = ov9740_resolutions[OV9740_720P].height; | 785 | a->c.height = OV9740_MAX_HEIGHT; |
| 833 | a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | 786 | a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; |
| 834 | 787 | ||
| 835 | return 0; | 788 | return 0; |
| 836 | } | 789 | } |
| 837 | 790 | ||
| 791 | /* Get status of additional camera capabilities */ | ||
| 792 | static int ov9740_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) | ||
| 793 | { | ||
| 794 | struct ov9740_priv *priv = to_ov9740(sd); | ||
| 795 | |||
| 796 | switch (ctrl->id) { | ||
| 797 | case V4L2_CID_VFLIP: | ||
| 798 | ctrl->value = priv->flag_vflip; | ||
| 799 | break; | ||
| 800 | case V4L2_CID_HFLIP: | ||
| 801 | ctrl->value = priv->flag_hflip; | ||
| 802 | break; | ||
| 803 | default: | ||
| 804 | return -EINVAL; | ||
| 805 | } | ||
| 806 | |||
| 807 | return 0; | ||
| 808 | } | ||
| 809 | |||
| 810 | /* Set status of additional camera capabilities */ | ||
| 811 | static int ov9740_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) | ||
| 812 | { | ||
| 813 | struct ov9740_priv *priv = to_ov9740(sd); | ||
| 814 | |||
| 815 | switch (ctrl->id) { | ||
| 816 | case V4L2_CID_VFLIP: | ||
| 817 | priv->flag_vflip = ctrl->value; | ||
| 818 | break; | ||
| 819 | case V4L2_CID_HFLIP: | ||
| 820 | priv->flag_hflip = ctrl->value; | ||
| 821 | break; | ||
| 822 | default: | ||
| 823 | return -EINVAL; | ||
| 824 | } | ||
| 825 | |||
| 826 | return 0; | ||
| 827 | } | ||
| 828 | |||
| 829 | /* Get chip identification */ | ||
| 830 | static int ov9740_g_chip_ident(struct v4l2_subdev *sd, | ||
| 831 | struct v4l2_dbg_chip_ident *id) | ||
| 832 | { | ||
| 833 | struct ov9740_priv *priv = to_ov9740(sd); | ||
| 834 | |||
| 835 | id->ident = priv->ident; | ||
| 836 | id->revision = priv->revision; | ||
| 837 | |||
| 838 | return 0; | ||
| 839 | } | ||
| 840 | |||
| 841 | static int ov9740_s_power(struct v4l2_subdev *sd, int on) | ||
| 842 | { | ||
| 843 | struct ov9740_priv *priv = to_ov9740(sd); | ||
| 844 | |||
| 845 | if (!priv->current_enable) | ||
| 846 | return 0; | ||
| 847 | |||
| 848 | if (on) { | ||
| 849 | ov9740_s_fmt(sd, &priv->current_mf); | ||
| 850 | ov9740_s_stream(sd, priv->current_enable); | ||
| 851 | } else { | ||
| 852 | ov9740_s_stream(sd, 0); | ||
| 853 | priv->current_enable = true; | ||
| 854 | } | ||
| 855 | |||
| 856 | return 0; | ||
| 857 | } | ||
| 858 | |||
| 859 | #ifdef CONFIG_VIDEO_ADV_DEBUG | ||
| 860 | static int ov9740_get_register(struct v4l2_subdev *sd, | ||
| 861 | struct v4l2_dbg_register *reg) | ||
| 862 | { | ||
| 863 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 864 | int ret; | ||
| 865 | u8 val; | ||
| 866 | |||
| 867 | if (reg->reg & ~0xffff) | ||
| 868 | return -EINVAL; | ||
| 869 | |||
| 870 | reg->size = 2; | ||
| 871 | |||
| 872 | ret = ov9740_reg_read(client, reg->reg, &val); | ||
| 873 | if (ret) | ||
| 874 | return ret; | ||
| 875 | |||
| 876 | reg->val = (__u64)val; | ||
| 877 | |||
| 878 | return ret; | ||
| 879 | } | ||
| 880 | |||
| 881 | static int ov9740_set_register(struct v4l2_subdev *sd, | ||
| 882 | struct v4l2_dbg_register *reg) | ||
| 883 | { | ||
| 884 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 885 | |||
| 886 | if (reg->reg & ~0xffff || reg->val & ~0xff) | ||
| 887 | return -EINVAL; | ||
| 888 | |||
| 889 | return ov9740_reg_write(client, reg->reg, reg->val); | ||
| 890 | } | ||
| 891 | #endif | ||
| 892 | |||
| 838 | static int ov9740_video_probe(struct soc_camera_device *icd, | 893 | static int ov9740_video_probe(struct soc_camera_device *icd, |
| 839 | struct i2c_client *client) | 894 | struct i2c_client *client) |
| 840 | { | 895 | { |
| @@ -843,16 +898,9 @@ static int ov9740_video_probe(struct soc_camera_device *icd, | |||
| 843 | u8 modelhi, modello; | 898 | u8 modelhi, modello; |
| 844 | int ret; | 899 | int ret; |
| 845 | 900 | ||
| 846 | /* | 901 | /* We must have a parent by now. And it cannot be a wrong one. */ |
| 847 | * We must have a parent by now. And it cannot be a wrong one. | 902 | BUG_ON(!icd->parent || |
| 848 | * So this entire test is completely redundant. | 903 | to_soc_camera_host(icd->parent)->nr != icd->iface); |
| 849 | */ | ||
| 850 | if (!icd->dev.parent || | ||
| 851 | to_soc_camera_host(icd->dev.parent)->nr != icd->iface) { | ||
| 852 | dev_err(&client->dev, "Parent missing or invalid!\n"); | ||
| 853 | ret = -ENODEV; | ||
| 854 | goto err; | ||
| 855 | } | ||
| 856 | 904 | ||
| 857 | /* | 905 | /* |
| 858 | * check and show product ID and manufacturer ID | 906 | * check and show product ID and manufacturer ID |
| @@ -901,24 +949,24 @@ static struct soc_camera_ops ov9740_ops = { | |||
| 901 | .num_controls = ARRAY_SIZE(ov9740_controls), | 949 | .num_controls = ARRAY_SIZE(ov9740_controls), |
| 902 | }; | 950 | }; |
| 903 | 951 | ||
| 952 | static struct v4l2_subdev_video_ops ov9740_video_ops = { | ||
| 953 | .s_stream = ov9740_s_stream, | ||
| 954 | .s_mbus_fmt = ov9740_s_fmt, | ||
| 955 | .try_mbus_fmt = ov9740_try_fmt, | ||
| 956 | .enum_mbus_fmt = ov9740_enum_fmt, | ||
| 957 | .cropcap = ov9740_cropcap, | ||
| 958 | .g_crop = ov9740_g_crop, | ||
| 959 | }; | ||
| 960 | |||
| 904 | static struct v4l2_subdev_core_ops ov9740_core_ops = { | 961 | static struct v4l2_subdev_core_ops ov9740_core_ops = { |
| 905 | .g_ctrl = ov9740_g_ctrl, | 962 | .g_ctrl = ov9740_g_ctrl, |
| 906 | .s_ctrl = ov9740_s_ctrl, | 963 | .s_ctrl = ov9740_s_ctrl, |
| 907 | .g_chip_ident = ov9740_g_chip_ident, | 964 | .g_chip_ident = ov9740_g_chip_ident, |
| 965 | .s_power = ov9740_s_power, | ||
| 908 | #ifdef CONFIG_VIDEO_ADV_DEBUG | 966 | #ifdef CONFIG_VIDEO_ADV_DEBUG |
| 909 | .g_register = ov9740_get_register, | 967 | .g_register = ov9740_get_register, |
| 910 | .s_register = ov9740_set_register, | 968 | .s_register = ov9740_set_register, |
| 911 | #endif | 969 | #endif |
| 912 | |||
| 913 | }; | ||
| 914 | |||
| 915 | static struct v4l2_subdev_video_ops ov9740_video_ops = { | ||
| 916 | .s_stream = ov9740_s_stream, | ||
| 917 | .s_mbus_fmt = ov9740_s_fmt, | ||
| 918 | .try_mbus_fmt = ov9740_try_fmt, | ||
| 919 | .enum_mbus_fmt = ov9740_enum_fmt, | ||
| 920 | .cropcap = ov9740_cropcap, | ||
| 921 | .g_crop = ov9740_g_crop, | ||
| 922 | }; | 970 | }; |
| 923 | 971 | ||
| 924 | static struct v4l2_subdev_ops ov9740_subdev_ops = { | 972 | static struct v4l2_subdev_ops ov9740_subdev_ops = { |
diff --git a/drivers/media/video/pms.c b/drivers/media/video/pms.c index 7551907f8c28..e753b5e4d2ce 100644 --- a/drivers/media/video/pms.c +++ b/drivers/media/video/pms.c | |||
| @@ -28,7 +28,6 @@ | |||
| 28 | #include <linux/mm.h> | 28 | #include <linux/mm.h> |
| 29 | #include <linux/ioport.h> | 29 | #include <linux/ioport.h> |
| 30 | #include <linux/init.h> | 30 | #include <linux/init.h> |
| 31 | #include <linux/version.h> | ||
| 32 | #include <linux/mutex.h> | 31 | #include <linux/mutex.h> |
| 33 | #include <linux/uaccess.h> | 32 | #include <linux/uaccess.h> |
| 34 | #include <asm/io.h> | 33 | #include <asm/io.h> |
| @@ -39,7 +38,7 @@ | |||
| 39 | #include <media/v4l2-device.h> | 38 | #include <media/v4l2-device.h> |
| 40 | 39 | ||
| 41 | MODULE_LICENSE("GPL"); | 40 | MODULE_LICENSE("GPL"); |
| 42 | 41 | MODULE_VERSION("0.0.4"); | |
| 43 | 42 | ||
| 44 | #define MOTOROLA 1 | 43 | #define MOTOROLA 1 |
| 45 | #define PHILIPS2 2 /* SAA7191 */ | 44 | #define PHILIPS2 2 /* SAA7191 */ |
| @@ -678,7 +677,6 @@ static int pms_querycap(struct file *file, void *priv, | |||
| 678 | strlcpy(vcap->driver, dev->v4l2_dev.name, sizeof(vcap->driver)); | 677 | strlcpy(vcap->driver, dev->v4l2_dev.name, sizeof(vcap->driver)); |
| 679 | strlcpy(vcap->card, "Mediavision PMS", sizeof(vcap->card)); | 678 | strlcpy(vcap->card, "Mediavision PMS", sizeof(vcap->card)); |
| 680 | strlcpy(vcap->bus_info, "ISA", sizeof(vcap->bus_info)); | 679 | strlcpy(vcap->bus_info, "ISA", sizeof(vcap->bus_info)); |
| 681 | vcap->version = KERNEL_VERSION(0, 0, 3); | ||
| 682 | vcap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE; | 680 | vcap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE; |
| 683 | return 0; | 681 | return 0; |
| 684 | } | 682 | } |
diff --git a/drivers/media/video/pvrusb2/pvrusb2-main.c b/drivers/media/video/pvrusb2/pvrusb2-main.c index 2254194aad57..c1d9bb61cd77 100644 --- a/drivers/media/video/pvrusb2/pvrusb2-main.c +++ b/drivers/media/video/pvrusb2/pvrusb2-main.c | |||
| @@ -168,6 +168,7 @@ module_exit(pvr_exit); | |||
| 168 | MODULE_AUTHOR(DRIVER_AUTHOR); | 168 | MODULE_AUTHOR(DRIVER_AUTHOR); |
| 169 | MODULE_DESCRIPTION(DRIVER_DESC); | 169 | MODULE_DESCRIPTION(DRIVER_DESC); |
| 170 | MODULE_LICENSE("GPL"); | 170 | MODULE_LICENSE("GPL"); |
| 171 | MODULE_VERSION("0.9.1"); | ||
| 171 | 172 | ||
| 172 | 173 | ||
| 173 | /* | 174 | /* |
diff --git a/drivers/media/video/pvrusb2/pvrusb2-v4l2.c b/drivers/media/video/pvrusb2/pvrusb2-v4l2.c index 38761142a4d9..e27f8ab76966 100644 --- a/drivers/media/video/pvrusb2/pvrusb2-v4l2.c +++ b/drivers/media/video/pvrusb2/pvrusb2-v4l2.c | |||
| @@ -91,7 +91,7 @@ static struct v4l2_capability pvr_capability ={ | |||
| 91 | .driver = "pvrusb2", | 91 | .driver = "pvrusb2", |
| 92 | .card = "Hauppauge WinTV pvr-usb2", | 92 | .card = "Hauppauge WinTV pvr-usb2", |
| 93 | .bus_info = "usb", | 93 | .bus_info = "usb", |
| 94 | .version = KERNEL_VERSION(0, 9, 0), | 94 | .version = LINUX_VERSION_CODE, |
| 95 | .capabilities = (V4L2_CAP_VIDEO_CAPTURE | | 95 | .capabilities = (V4L2_CAP_VIDEO_CAPTURE | |
| 96 | V4L2_CAP_TUNER | V4L2_CAP_AUDIO | V4L2_CAP_RADIO | | 96 | V4L2_CAP_TUNER | V4L2_CAP_AUDIO | V4L2_CAP_RADIO | |
| 97 | V4L2_CAP_READWRITE), | 97 | V4L2_CAP_READWRITE), |
| @@ -369,11 +369,6 @@ static long pvr2_v4l2_do_ioctl(struct file *file, unsigned int cmd, void *arg) | |||
| 369 | break; | 369 | break; |
| 370 | } | 370 | } |
| 371 | 371 | ||
| 372 | case VIDIOC_S_AUDIO: | ||
| 373 | { | ||
| 374 | ret = -EINVAL; | ||
| 375 | break; | ||
| 376 | } | ||
| 377 | case VIDIOC_G_TUNER: | 372 | case VIDIOC_G_TUNER: |
| 378 | { | 373 | { |
| 379 | struct v4l2_tuner *vt = (struct v4l2_tuner *)arg; | 374 | struct v4l2_tuner *vt = (struct v4l2_tuner *)arg; |
| @@ -850,7 +845,7 @@ static long pvr2_v4l2_do_ioctl(struct file *file, unsigned int cmd, void *arg) | |||
| 850 | #endif | 845 | #endif |
| 851 | 846 | ||
| 852 | default : | 847 | default : |
| 853 | ret = -EINVAL; | 848 | ret = -ENOTTY; |
| 854 | break; | 849 | break; |
| 855 | } | 850 | } |
| 856 | 851 | ||
diff --git a/drivers/media/video/pwc/Kconfig b/drivers/media/video/pwc/Kconfig index 8da42e4f1ba0..d63d0a850035 100644 --- a/drivers/media/video/pwc/Kconfig +++ b/drivers/media/video/pwc/Kconfig | |||
| @@ -1,6 +1,7 @@ | |||
| 1 | config USB_PWC | 1 | config USB_PWC |
| 2 | tristate "USB Philips Cameras" | 2 | tristate "USB Philips Cameras" |
| 3 | depends on VIDEO_V4L2 | 3 | depends on VIDEO_V4L2 |
| 4 | select VIDEOBUF2_VMALLOC | ||
| 4 | ---help--- | 5 | ---help--- |
| 5 | Say Y or M here if you want to use one of these Philips & OEM | 6 | Say Y or M here if you want to use one of these Philips & OEM |
| 6 | webcams: | 7 | webcams: |
diff --git a/drivers/media/video/pwc/pwc-ctrl.c b/drivers/media/video/pwc/pwc-ctrl.c index 760b4de13adf..3977addf3ba8 100644 --- a/drivers/media/video/pwc/pwc-ctrl.c +++ b/drivers/media/video/pwc/pwc-ctrl.c | |||
| @@ -3,6 +3,7 @@ | |||
| 3 | video modes. | 3 | video modes. |
| 4 | (C) 1999-2003 Nemosoft Unv. | 4 | (C) 1999-2003 Nemosoft Unv. |
| 5 | (C) 2004-2006 Luc Saillard (luc@saillard.org) | 5 | (C) 2004-2006 Luc Saillard (luc@saillard.org) |
| 6 | (C) 2011 Hans de Goede <hdegoede@redhat.com> | ||
| 6 | 7 | ||
| 7 | NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx | 8 | NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx |
| 8 | driver and thus may have bugs that are not present in the original version. | 9 | driver and thus may have bugs that are not present in the original version. |
| @@ -43,61 +44,12 @@ | |||
| 43 | #include <asm/errno.h> | 44 | #include <asm/errno.h> |
| 44 | 45 | ||
| 45 | #include "pwc.h" | 46 | #include "pwc.h" |
| 46 | #include "pwc-uncompress.h" | ||
| 47 | #include "pwc-kiara.h" | 47 | #include "pwc-kiara.h" |
| 48 | #include "pwc-timon.h" | 48 | #include "pwc-timon.h" |
| 49 | #include "pwc-dec1.h" | 49 | #include "pwc-dec1.h" |
| 50 | #include "pwc-dec23.h" | 50 | #include "pwc-dec23.h" |
| 51 | 51 | ||
| 52 | /* Request types: video */ | 52 | /* Selectors for status controls used only in this file */ |
| 53 | #define SET_LUM_CTL 0x01 | ||
| 54 | #define GET_LUM_CTL 0x02 | ||
| 55 | #define SET_CHROM_CTL 0x03 | ||
| 56 | #define GET_CHROM_CTL 0x04 | ||
| 57 | #define SET_STATUS_CTL 0x05 | ||
| 58 | #define GET_STATUS_CTL 0x06 | ||
| 59 | #define SET_EP_STREAM_CTL 0x07 | ||
| 60 | #define GET_EP_STREAM_CTL 0x08 | ||
| 61 | #define GET_XX_CTL 0x09 | ||
| 62 | #define SET_XX_CTL 0x0A | ||
| 63 | #define GET_XY_CTL 0x0B | ||
| 64 | #define SET_XY_CTL 0x0C | ||
| 65 | #define SET_MPT_CTL 0x0D | ||
| 66 | #define GET_MPT_CTL 0x0E | ||
| 67 | |||
| 68 | /* Selectors for the Luminance controls [GS]ET_LUM_CTL */ | ||
| 69 | #define AGC_MODE_FORMATTER 0x2000 | ||
| 70 | #define PRESET_AGC_FORMATTER 0x2100 | ||
| 71 | #define SHUTTER_MODE_FORMATTER 0x2200 | ||
| 72 | #define PRESET_SHUTTER_FORMATTER 0x2300 | ||
| 73 | #define PRESET_CONTOUR_FORMATTER 0x2400 | ||
| 74 | #define AUTO_CONTOUR_FORMATTER 0x2500 | ||
| 75 | #define BACK_LIGHT_COMPENSATION_FORMATTER 0x2600 | ||
| 76 | #define CONTRAST_FORMATTER 0x2700 | ||
| 77 | #define DYNAMIC_NOISE_CONTROL_FORMATTER 0x2800 | ||
| 78 | #define FLICKERLESS_MODE_FORMATTER 0x2900 | ||
| 79 | #define AE_CONTROL_SPEED 0x2A00 | ||
| 80 | #define BRIGHTNESS_FORMATTER 0x2B00 | ||
| 81 | #define GAMMA_FORMATTER 0x2C00 | ||
| 82 | |||
| 83 | /* Selectors for the Chrominance controls [GS]ET_CHROM_CTL */ | ||
| 84 | #define WB_MODE_FORMATTER 0x1000 | ||
| 85 | #define AWB_CONTROL_SPEED_FORMATTER 0x1100 | ||
| 86 | #define AWB_CONTROL_DELAY_FORMATTER 0x1200 | ||
| 87 | #define PRESET_MANUAL_RED_GAIN_FORMATTER 0x1300 | ||
| 88 | #define PRESET_MANUAL_BLUE_GAIN_FORMATTER 0x1400 | ||
| 89 | #define COLOUR_MODE_FORMATTER 0x1500 | ||
| 90 | #define SATURATION_MODE_FORMATTER1 0x1600 | ||
| 91 | #define SATURATION_MODE_FORMATTER2 0x1700 | ||
| 92 | |||
| 93 | /* Selectors for the Status controls [GS]ET_STATUS_CTL */ | ||
| 94 | #define SAVE_USER_DEFAULTS_FORMATTER 0x0200 | ||
| 95 | #define RESTORE_USER_DEFAULTS_FORMATTER 0x0300 | ||
| 96 | #define RESTORE_FACTORY_DEFAULTS_FORMATTER 0x0400 | ||
| 97 | #define READ_AGC_FORMATTER 0x0500 | ||
| 98 | #define READ_SHUTTER_FORMATTER 0x0600 | ||
| 99 | #define READ_RED_GAIN_FORMATTER 0x0700 | ||
| 100 | #define READ_BLUE_GAIN_FORMATTER 0x0800 | ||
| 101 | #define GET_STATUS_B00 0x0B00 | 53 | #define GET_STATUS_B00 0x0B00 |
| 102 | #define SENSOR_TYPE_FORMATTER1 0x0C00 | 54 | #define SENSOR_TYPE_FORMATTER1 0x0C00 |
| 103 | #define GET_STATUS_3000 0x3000 | 55 | #define GET_STATUS_3000 0x3000 |
| @@ -116,11 +68,6 @@ | |||
| 116 | /* Formatters for the Video Endpoint controls [GS]ET_EP_STREAM_CTL */ | 68 | /* Formatters for the Video Endpoint controls [GS]ET_EP_STREAM_CTL */ |
| 117 | #define VIDEO_OUTPUT_CONTROL_FORMATTER 0x0100 | 69 | #define VIDEO_OUTPUT_CONTROL_FORMATTER 0x0100 |
| 118 | 70 | ||
| 119 | /* Formatters for the motorized pan & tilt [GS]ET_MPT_CTL */ | ||
| 120 | #define PT_RELATIVE_CONTROL_FORMATTER 0x01 | ||
| 121 | #define PT_RESET_CONTROL_FORMATTER 0x02 | ||
| 122 | #define PT_STATUS_FORMATTER 0x03 | ||
| 123 | |||
| 124 | static const char *size2name[PSZ_MAX] = | 71 | static const char *size2name[PSZ_MAX] = |
| 125 | { | 72 | { |
| 126 | "subQCIF", | 73 | "subQCIF", |
| @@ -160,7 +107,7 @@ static void pwc_set_image_buffer_size(struct pwc_device *pdev); | |||
| 160 | /****************************************************************************/ | 107 | /****************************************************************************/ |
| 161 | 108 | ||
| 162 | static int _send_control_msg(struct pwc_device *pdev, | 109 | static int _send_control_msg(struct pwc_device *pdev, |
| 163 | u8 request, u16 value, int index, void *buf, int buflen, int timeout) | 110 | u8 request, u16 value, int index, void *buf, int buflen) |
| 164 | { | 111 | { |
| 165 | int rc; | 112 | int rc; |
| 166 | void *kbuf = NULL; | 113 | void *kbuf = NULL; |
| @@ -177,7 +124,7 @@ static int _send_control_msg(struct pwc_device *pdev, | |||
| 177 | USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | 124 | USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, |
| 178 | value, | 125 | value, |
| 179 | index, | 126 | index, |
| 180 | kbuf, buflen, timeout); | 127 | kbuf, buflen, USB_CTRL_SET_TIMEOUT); |
| 181 | 128 | ||
| 182 | kfree(kbuf); | 129 | kfree(kbuf); |
| 183 | return rc; | 130 | return rc; |
| @@ -197,9 +144,13 @@ static int recv_control_msg(struct pwc_device *pdev, | |||
| 197 | USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | 144 | USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, |
| 198 | value, | 145 | value, |
| 199 | pdev->vcinterface, | 146 | pdev->vcinterface, |
| 200 | kbuf, buflen, 500); | 147 | kbuf, buflen, USB_CTRL_GET_TIMEOUT); |
| 201 | memcpy(buf, kbuf, buflen); | 148 | memcpy(buf, kbuf, buflen); |
| 202 | kfree(kbuf); | 149 | kfree(kbuf); |
| 150 | |||
| 151 | if (rc < 0) | ||
| 152 | PWC_ERROR("recv_control_msg error %d req %02x val %04x\n", | ||
| 153 | rc, request, value); | ||
| 203 | return rc; | 154 | return rc; |
| 204 | } | 155 | } |
| 205 | 156 | ||
| @@ -210,18 +161,16 @@ static inline int send_video_command(struct pwc_device *pdev, | |||
| 210 | SET_EP_STREAM_CTL, | 161 | SET_EP_STREAM_CTL, |
| 211 | VIDEO_OUTPUT_CONTROL_FORMATTER, | 162 | VIDEO_OUTPUT_CONTROL_FORMATTER, |
| 212 | index, | 163 | index, |
| 213 | buf, buflen, 1000); | 164 | buf, buflen); |
| 214 | } | 165 | } |
| 215 | 166 | ||
| 216 | static inline int send_control_msg(struct pwc_device *pdev, | 167 | int send_control_msg(struct pwc_device *pdev, |
| 217 | u8 request, u16 value, void *buf, int buflen) | 168 | u8 request, u16 value, void *buf, int buflen) |
| 218 | { | 169 | { |
| 219 | return _send_control_msg(pdev, | 170 | return _send_control_msg(pdev, |
| 220 | request, value, pdev->vcinterface, buf, buflen, 500); | 171 | request, value, pdev->vcinterface, buf, buflen); |
| 221 | } | 172 | } |
| 222 | 173 | ||
| 223 | |||
| 224 | |||
| 225 | static int set_video_mode_Nala(struct pwc_device *pdev, int size, int frames) | 174 | static int set_video_mode_Nala(struct pwc_device *pdev, int size, int frames) |
| 226 | { | 175 | { |
| 227 | unsigned char buf[3]; | 176 | unsigned char buf[3]; |
| @@ -261,8 +210,11 @@ static int set_video_mode_Nala(struct pwc_device *pdev, int size, int frames) | |||
| 261 | PWC_DEBUG_MODULE("Failed to send video command... %d\n", ret); | 210 | PWC_DEBUG_MODULE("Failed to send video command... %d\n", ret); |
| 262 | return ret; | 211 | return ret; |
| 263 | } | 212 | } |
| 264 | if (pEntry->compressed && pdev->pixfmt == V4L2_PIX_FMT_YUV420) | 213 | if (pEntry->compressed && pdev->pixfmt == V4L2_PIX_FMT_YUV420) { |
| 265 | pwc_dec1_init(pdev->type, pdev->release, buf, pdev->decompress_data); | 214 | ret = pwc_dec1_init(pdev, pdev->type, pdev->release, buf); |
| 215 | if (ret < 0) | ||
| 216 | return ret; | ||
| 217 | } | ||
| 266 | 218 | ||
| 267 | pdev->cmd_len = 3; | 219 | pdev->cmd_len = 3; |
| 268 | memcpy(pdev->cmd_buf, buf, 3); | 220 | memcpy(pdev->cmd_buf, buf, 3); |
| @@ -321,8 +273,11 @@ static int set_video_mode_Timon(struct pwc_device *pdev, int size, int frames, i | |||
| 321 | if (ret < 0) | 273 | if (ret < 0) |
| 322 | return ret; | 274 | return ret; |
| 323 | 275 | ||
| 324 | if (pChoose->bandlength > 0 && pdev->pixfmt == V4L2_PIX_FMT_YUV420) | 276 | if (pChoose->bandlength > 0 && pdev->pixfmt == V4L2_PIX_FMT_YUV420) { |
| 325 | pwc_dec23_init(pdev, pdev->type, buf); | 277 | ret = pwc_dec23_init(pdev, pdev->type, buf); |
| 278 | if (ret < 0) | ||
| 279 | return ret; | ||
| 280 | } | ||
| 326 | 281 | ||
| 327 | pdev->cmd_len = 13; | 282 | pdev->cmd_len = 13; |
| 328 | memcpy(pdev->cmd_buf, buf, 13); | 283 | memcpy(pdev->cmd_buf, buf, 13); |
| @@ -394,8 +349,11 @@ static int set_video_mode_Kiara(struct pwc_device *pdev, int size, int frames, i | |||
| 394 | if (ret < 0) | 349 | if (ret < 0) |
| 395 | return ret; | 350 | return ret; |
| 396 | 351 | ||
| 397 | if (pChoose->bandlength > 0 && pdev->pixfmt == V4L2_PIX_FMT_YUV420) | 352 | if (pChoose->bandlength > 0 && pdev->pixfmt == V4L2_PIX_FMT_YUV420) { |
| 398 | pwc_dec23_init(pdev, pdev->type, buf); | 353 | ret = pwc_dec23_init(pdev, pdev->type, buf); |
| 354 | if (ret < 0) | ||
| 355 | return ret; | ||
| 356 | } | ||
| 399 | 357 | ||
| 400 | pdev->cmd_len = 12; | 358 | pdev->cmd_len = 12; |
| 401 | memcpy(pdev->cmd_buf, buf, 12); | 359 | memcpy(pdev->cmd_buf, buf, 12); |
| @@ -452,6 +410,7 @@ int pwc_set_video_mode(struct pwc_device *pdev, int width, int height, int frame | |||
| 452 | } | 410 | } |
| 453 | pdev->view.x = width; | 411 | pdev->view.x = width; |
| 454 | pdev->view.y = height; | 412 | pdev->view.y = height; |
| 413 | pdev->vcompression = compression; | ||
| 455 | pdev->frame_total_size = pdev->frame_size + pdev->frame_header_size + pdev->frame_trailer_size; | 414 | pdev->frame_total_size = pdev->frame_size + pdev->frame_header_size + pdev->frame_trailer_size; |
| 456 | pwc_set_image_buffer_size(pdev); | 415 | pwc_set_image_buffer_size(pdev); |
| 457 | PWC_DEBUG_SIZE("Set viewport to %dx%d, image size is %dx%d.\n", width, height, pwc_image_sizes[size].x, pwc_image_sizes[size].y); | 416 | PWC_DEBUG_SIZE("Set viewport to %dx%d, image size is %dx%d.\n", width, height, pwc_image_sizes[size].x, pwc_image_sizes[size].y); |
| @@ -511,13 +470,9 @@ unsigned int pwc_get_fps(struct pwc_device *pdev, unsigned int index, unsigned i | |||
| 511 | return ret; | 470 | return ret; |
| 512 | } | 471 | } |
| 513 | 472 | ||
| 514 | #define BLACK_Y 0 | ||
| 515 | #define BLACK_U 128 | ||
| 516 | #define BLACK_V 128 | ||
| 517 | |||
| 518 | static void pwc_set_image_buffer_size(struct pwc_device *pdev) | 473 | static void pwc_set_image_buffer_size(struct pwc_device *pdev) |
| 519 | { | 474 | { |
| 520 | int i, factor = 0; | 475 | int factor = 0; |
| 521 | 476 | ||
| 522 | /* for V4L2_PIX_FMT_YUV420 */ | 477 | /* for V4L2_PIX_FMT_YUV420 */ |
| 523 | switch (pdev->pixfmt) { | 478 | switch (pdev->pixfmt) { |
| @@ -541,442 +496,108 @@ static void pwc_set_image_buffer_size(struct pwc_device *pdev) | |||
| 541 | */ | 496 | */ |
| 542 | pdev->offset.x = ((pdev->view.x - pdev->image.x) / 2) & 0xFFFC; | 497 | pdev->offset.x = ((pdev->view.x - pdev->image.x) / 2) & 0xFFFC; |
| 543 | pdev->offset.y = ((pdev->view.y - pdev->image.y) / 2) & 0xFFFE; | 498 | pdev->offset.y = ((pdev->view.y - pdev->image.y) / 2) & 0xFFFE; |
| 544 | |||
| 545 | /* Fill buffers with black colors */ | ||
| 546 | for (i = 0; i < pwc_mbufs; i++) { | ||
| 547 | unsigned char *p = pdev->image_data + pdev->images[i].offset; | ||
| 548 | memset(p, BLACK_Y, pdev->view.x * pdev->view.y); | ||
| 549 | p += pdev->view.x * pdev->view.y; | ||
| 550 | memset(p, BLACK_U, pdev->view.x * pdev->view.y/4); | ||
| 551 | p += pdev->view.x * pdev->view.y/4; | ||
| 552 | memset(p, BLACK_V, pdev->view.x * pdev->view.y/4); | ||
| 553 | } | ||
| 554 | } | 499 | } |
| 555 | 500 | ||
| 556 | 501 | int pwc_get_u8_ctrl(struct pwc_device *pdev, u8 request, u16 value, int *data) | |
| 557 | |||
| 558 | /* BRIGHTNESS */ | ||
| 559 | |||
| 560 | int pwc_get_brightness(struct pwc_device *pdev) | ||
| 561 | { | 502 | { |
| 562 | char buf; | ||
| 563 | int ret; | 503 | int ret; |
| 504 | u8 buf; | ||
| 564 | 505 | ||
| 565 | ret = recv_control_msg(pdev, | 506 | ret = recv_control_msg(pdev, request, value, &buf, sizeof(buf)); |
| 566 | GET_LUM_CTL, BRIGHTNESS_FORMATTER, &buf, sizeof(buf)); | ||
| 567 | if (ret < 0) | 507 | if (ret < 0) |
| 568 | return ret; | 508 | return ret; |
| 569 | return buf; | ||
| 570 | } | ||
| 571 | 509 | ||
| 572 | int pwc_set_brightness(struct pwc_device *pdev, int value) | 510 | *data = buf; |
| 573 | { | 511 | return 0; |
| 574 | char buf; | ||
| 575 | |||
| 576 | if (value < 0) | ||
| 577 | value = 0; | ||
| 578 | if (value > 0xffff) | ||
| 579 | value = 0xffff; | ||
| 580 | buf = (value >> 9) & 0x7f; | ||
| 581 | return send_control_msg(pdev, | ||
| 582 | SET_LUM_CTL, BRIGHTNESS_FORMATTER, &buf, sizeof(buf)); | ||
| 583 | } | 512 | } |
| 584 | 513 | ||
| 585 | /* CONTRAST */ | 514 | int pwc_set_u8_ctrl(struct pwc_device *pdev, u8 request, u16 value, u8 data) |
| 586 | |||
| 587 | int pwc_get_contrast(struct pwc_device *pdev) | ||
| 588 | { | 515 | { |
| 589 | char buf; | ||
| 590 | int ret; | 516 | int ret; |
| 591 | 517 | ||
| 592 | ret = recv_control_msg(pdev, | 518 | ret = send_control_msg(pdev, request, value, &data, sizeof(data)); |
| 593 | GET_LUM_CTL, CONTRAST_FORMATTER, &buf, sizeof(buf)); | ||
| 594 | if (ret < 0) | 519 | if (ret < 0) |
| 595 | return ret; | 520 | return ret; |
| 596 | return buf; | ||
| 597 | } | ||
| 598 | 521 | ||
| 599 | int pwc_set_contrast(struct pwc_device *pdev, int value) | 522 | return 0; |
| 600 | { | ||
| 601 | char buf; | ||
| 602 | |||
| 603 | if (value < 0) | ||
| 604 | value = 0; | ||
| 605 | if (value > 0xffff) | ||
| 606 | value = 0xffff; | ||
| 607 | buf = (value >> 10) & 0x3f; | ||
| 608 | return send_control_msg(pdev, | ||
| 609 | SET_LUM_CTL, CONTRAST_FORMATTER, &buf, sizeof(buf)); | ||
| 610 | } | 523 | } |
| 611 | 524 | ||
| 612 | /* GAMMA */ | 525 | int pwc_get_s8_ctrl(struct pwc_device *pdev, u8 request, u16 value, int *data) |
| 613 | |||
| 614 | int pwc_get_gamma(struct pwc_device *pdev) | ||
| 615 | { | 526 | { |
| 616 | char buf; | ||
| 617 | int ret; | 527 | int ret; |
| 528 | s8 buf; | ||
| 618 | 529 | ||
| 619 | ret = recv_control_msg(pdev, | 530 | ret = recv_control_msg(pdev, request, value, &buf, sizeof(buf)); |
| 620 | GET_LUM_CTL, GAMMA_FORMATTER, &buf, sizeof(buf)); | ||
| 621 | if (ret < 0) | 531 | if (ret < 0) |
| 622 | return ret; | 532 | return ret; |
| 623 | return buf; | ||
| 624 | } | ||
| 625 | |||
| 626 | int pwc_set_gamma(struct pwc_device *pdev, int value) | ||
| 627 | { | ||
| 628 | char buf; | ||
| 629 | 533 | ||
| 630 | if (value < 0) | 534 | *data = buf; |
| 631 | value = 0; | ||
| 632 | if (value > 0xffff) | ||
| 633 | value = 0xffff; | ||
| 634 | buf = (value >> 11) & 0x1f; | ||
| 635 | return send_control_msg(pdev, | ||
| 636 | SET_LUM_CTL, GAMMA_FORMATTER, &buf, sizeof(buf)); | ||
| 637 | } | ||
| 638 | |||
| 639 | |||
| 640 | /* SATURATION */ | ||
| 641 | |||
| 642 | /* return a value between [-100 , 100] */ | ||
| 643 | int pwc_get_saturation(struct pwc_device *pdev, int *value) | ||
| 644 | { | ||
| 645 | char buf; | ||
| 646 | int ret, saturation_register; | ||
| 647 | |||
| 648 | if (pdev->type < 675) | ||
| 649 | return -EINVAL; | ||
| 650 | if (pdev->type < 730) | ||
| 651 | saturation_register = SATURATION_MODE_FORMATTER2; | ||
| 652 | else | ||
| 653 | saturation_register = SATURATION_MODE_FORMATTER1; | ||
| 654 | ret = recv_control_msg(pdev, | ||
| 655 | GET_CHROM_CTL, saturation_register, &buf, sizeof(buf)); | ||
| 656 | if (ret < 0) | ||
| 657 | return ret; | ||
| 658 | *value = (signed)buf; | ||
| 659 | return 0; | 535 | return 0; |
| 660 | } | 536 | } |
| 661 | 537 | ||
| 662 | /* @param value saturation color between [-100 , 100] */ | 538 | int pwc_get_u16_ctrl(struct pwc_device *pdev, u8 request, u16 value, int *data) |
| 663 | int pwc_set_saturation(struct pwc_device *pdev, int value) | ||
| 664 | { | 539 | { |
| 665 | char buf; | ||
| 666 | int saturation_register; | ||
| 667 | |||
| 668 | if (pdev->type < 675) | ||
| 669 | return -EINVAL; | ||
| 670 | if (value < -100) | ||
| 671 | value = -100; | ||
| 672 | if (value > 100) | ||
| 673 | value = 100; | ||
| 674 | if (pdev->type < 730) | ||
| 675 | saturation_register = SATURATION_MODE_FORMATTER2; | ||
| 676 | else | ||
| 677 | saturation_register = SATURATION_MODE_FORMATTER1; | ||
| 678 | return send_control_msg(pdev, | ||
| 679 | SET_CHROM_CTL, saturation_register, &buf, sizeof(buf)); | ||
| 680 | } | ||
| 681 | |||
| 682 | /* AGC */ | ||
| 683 | |||
| 684 | int pwc_set_agc(struct pwc_device *pdev, int mode, int value) | ||
| 685 | { | ||
| 686 | char buf; | ||
| 687 | int ret; | 540 | int ret; |
| 541 | u8 buf[2]; | ||
| 688 | 542 | ||
| 689 | if (mode) | 543 | ret = recv_control_msg(pdev, request, value, buf, sizeof(buf)); |
| 690 | buf = 0x0; /* auto */ | ||
| 691 | else | ||
| 692 | buf = 0xff; /* fixed */ | ||
| 693 | |||
| 694 | ret = send_control_msg(pdev, | ||
| 695 | SET_LUM_CTL, AGC_MODE_FORMATTER, &buf, sizeof(buf)); | ||
| 696 | |||
| 697 | if (!mode && ret >= 0) { | ||
| 698 | if (value < 0) | ||
| 699 | value = 0; | ||
| 700 | if (value > 0xffff) | ||
| 701 | value = 0xffff; | ||
| 702 | buf = (value >> 10) & 0x3F; | ||
| 703 | ret = send_control_msg(pdev, | ||
| 704 | SET_LUM_CTL, PRESET_AGC_FORMATTER, &buf, sizeof(buf)); | ||
| 705 | } | ||
| 706 | if (ret < 0) | 544 | if (ret < 0) |
| 707 | return ret; | 545 | return ret; |
| 546 | |||
| 547 | *data = (buf[1] << 8) | buf[0]; | ||
| 708 | return 0; | 548 | return 0; |
| 709 | } | 549 | } |
| 710 | 550 | ||
| 711 | int pwc_get_agc(struct pwc_device *pdev, int *value) | 551 | int pwc_set_u16_ctrl(struct pwc_device *pdev, u8 request, u16 value, u16 data) |
| 712 | { | 552 | { |
| 713 | unsigned char buf; | ||
| 714 | int ret; | 553 | int ret; |
| 554 | u8 buf[2]; | ||
| 715 | 555 | ||
| 716 | ret = recv_control_msg(pdev, | 556 | buf[0] = data & 0xff; |
| 717 | GET_LUM_CTL, AGC_MODE_FORMATTER, &buf, sizeof(buf)); | 557 | buf[1] = data >> 8; |
| 558 | ret = send_control_msg(pdev, request, value, buf, sizeof(buf)); | ||
| 718 | if (ret < 0) | 559 | if (ret < 0) |
| 719 | return ret; | 560 | return ret; |
| 720 | 561 | ||
| 721 | if (buf != 0) { /* fixed */ | ||
| 722 | ret = recv_control_msg(pdev, | ||
| 723 | GET_LUM_CTL, PRESET_AGC_FORMATTER, &buf, sizeof(buf)); | ||
| 724 | if (ret < 0) | ||
| 725 | return ret; | ||
| 726 | if (buf > 0x3F) | ||
| 727 | buf = 0x3F; | ||
| 728 | *value = (buf << 10); | ||
| 729 | } | ||
| 730 | else { /* auto */ | ||
| 731 | ret = recv_control_msg(pdev, | ||
| 732 | GET_STATUS_CTL, READ_AGC_FORMATTER, &buf, sizeof(buf)); | ||
| 733 | if (ret < 0) | ||
| 734 | return ret; | ||
| 735 | /* Gah... this value ranges from 0x00 ... 0x9F */ | ||
| 736 | if (buf > 0x9F) | ||
| 737 | buf = 0x9F; | ||
| 738 | *value = -(48 + buf * 409); | ||
| 739 | } | ||
| 740 | |||
| 741 | return 0; | 562 | return 0; |
| 742 | } | 563 | } |
| 743 | 564 | ||
| 744 | int pwc_set_shutter_speed(struct pwc_device *pdev, int mode, int value) | 565 | int pwc_button_ctrl(struct pwc_device *pdev, u16 value) |
| 745 | { | ||
| 746 | char buf[2]; | ||
| 747 | int speed, ret; | ||
| 748 | |||
| 749 | |||
| 750 | if (mode) | ||
| 751 | buf[0] = 0x0; /* auto */ | ||
| 752 | else | ||
| 753 | buf[0] = 0xff; /* fixed */ | ||
| 754 | |||
| 755 | ret = send_control_msg(pdev, | ||
| 756 | SET_LUM_CTL, SHUTTER_MODE_FORMATTER, &buf, 1); | ||
| 757 | |||
| 758 | if (!mode && ret >= 0) { | ||
| 759 | if (value < 0) | ||
| 760 | value = 0; | ||
| 761 | if (value > 0xffff) | ||
| 762 | value = 0xffff; | ||
| 763 | |||
| 764 | if (DEVICE_USE_CODEC2(pdev->type)) { | ||
| 765 | /* speed ranges from 0x0 to 0x290 (656) */ | ||
| 766 | speed = (value / 100); | ||
| 767 | buf[1] = speed >> 8; | ||
| 768 | buf[0] = speed & 0xff; | ||
| 769 | } else if (DEVICE_USE_CODEC3(pdev->type)) { | ||
| 770 | /* speed seems to range from 0x0 to 0xff */ | ||
| 771 | buf[1] = 0; | ||
| 772 | buf[0] = value >> 8; | ||
| 773 | } | ||
| 774 | |||
| 775 | ret = send_control_msg(pdev, | ||
| 776 | SET_LUM_CTL, PRESET_SHUTTER_FORMATTER, | ||
| 777 | &buf, sizeof(buf)); | ||
| 778 | } | ||
| 779 | return ret; | ||
| 780 | } | ||
| 781 | |||
| 782 | /* This function is not exported to v4l1, so output values between 0 -> 256 */ | ||
| 783 | int pwc_get_shutter_speed(struct pwc_device *pdev, int *value) | ||
| 784 | { | 566 | { |
| 785 | unsigned char buf[2]; | ||
| 786 | int ret; | 567 | int ret; |
| 787 | 568 | ||
| 788 | ret = recv_control_msg(pdev, | 569 | ret = send_control_msg(pdev, SET_STATUS_CTL, value, NULL, 0); |
| 789 | GET_STATUS_CTL, READ_SHUTTER_FORMATTER, &buf, sizeof(buf)); | ||
| 790 | if (ret < 0) | 570 | if (ret < 0) |
| 791 | return ret; | 571 | return ret; |
| 792 | *value = buf[0] + (buf[1] << 8); | 572 | |
| 793 | if (DEVICE_USE_CODEC2(pdev->type)) { | ||
| 794 | /* speed ranges from 0x0 to 0x290 (656) */ | ||
| 795 | *value *= 256/656; | ||
| 796 | } else if (DEVICE_USE_CODEC3(pdev->type)) { | ||
| 797 | /* speed seems to range from 0x0 to 0xff */ | ||
| 798 | } | ||
| 799 | return 0; | 573 | return 0; |
| 800 | } | 574 | } |
| 801 | 575 | ||
| 802 | |||
| 803 | /* POWER */ | 576 | /* POWER */ |
| 804 | 577 | void pwc_camera_power(struct pwc_device *pdev, int power) | |
| 805 | int pwc_camera_power(struct pwc_device *pdev, int power) | ||
| 806 | { | 578 | { |
| 807 | char buf; | 579 | char buf; |
| 580 | int r; | ||
| 581 | |||
| 582 | if (!pdev->power_save) | ||
| 583 | return; | ||
| 808 | 584 | ||
| 809 | if (pdev->type < 675 || (pdev->type < 730 && pdev->release < 6)) | 585 | if (pdev->type < 675 || (pdev->type < 730 && pdev->release < 6)) |
| 810 | return 0; /* Not supported by Nala or Timon < release 6 */ | 586 | return; /* Not supported by Nala or Timon < release 6 */ |
| 811 | 587 | ||
| 812 | if (power) | 588 | if (power) |
| 813 | buf = 0x00; /* active */ | 589 | buf = 0x00; /* active */ |
| 814 | else | 590 | else |
| 815 | buf = 0xFF; /* power save */ | 591 | buf = 0xFF; /* power save */ |
| 816 | return send_control_msg(pdev, | 592 | r = send_control_msg(pdev, |
| 817 | SET_STATUS_CTL, SET_POWER_SAVE_MODE_FORMATTER, | 593 | SET_STATUS_CTL, SET_POWER_SAVE_MODE_FORMATTER, |
| 818 | &buf, sizeof(buf)); | 594 | &buf, sizeof(buf)); |
| 819 | } | ||
| 820 | |||
| 821 | |||
| 822 | |||
| 823 | /* private calls */ | ||
| 824 | |||
| 825 | int pwc_restore_user(struct pwc_device *pdev) | ||
| 826 | { | ||
| 827 | return send_control_msg(pdev, | ||
| 828 | SET_STATUS_CTL, RESTORE_USER_DEFAULTS_FORMATTER, NULL, 0); | ||
| 829 | } | ||
| 830 | |||
| 831 | int pwc_save_user(struct pwc_device *pdev) | ||
| 832 | { | ||
| 833 | return send_control_msg(pdev, | ||
| 834 | SET_STATUS_CTL, SAVE_USER_DEFAULTS_FORMATTER, NULL, 0); | ||
| 835 | } | ||
| 836 | |||
| 837 | int pwc_restore_factory(struct pwc_device *pdev) | ||
| 838 | { | ||
| 839 | return send_control_msg(pdev, | ||
| 840 | SET_STATUS_CTL, RESTORE_FACTORY_DEFAULTS_FORMATTER, NULL, 0); | ||
| 841 | } | ||
| 842 | |||
| 843 | /* ************************************************* */ | ||
| 844 | /* Patch by Alvarado: (not in the original version */ | ||
| 845 | |||
| 846 | /* | ||
| 847 | * the camera recognizes modes from 0 to 4: | ||
| 848 | * | ||
| 849 | * 00: indoor (incandescant lighting) | ||
| 850 | * 01: outdoor (sunlight) | ||
| 851 | * 02: fluorescent lighting | ||
| 852 | * 03: manual | ||
| 853 | * 04: auto | ||
| 854 | */ | ||
| 855 | int pwc_set_awb(struct pwc_device *pdev, int mode) | ||
| 856 | { | ||
| 857 | char buf; | ||
| 858 | int ret; | ||
| 859 | |||
| 860 | if (mode < 0) | ||
| 861 | mode = 0; | ||
| 862 | |||
| 863 | if (mode > 4) | ||
| 864 | mode = 4; | ||
| 865 | |||
| 866 | buf = mode & 0x07; /* just the lowest three bits */ | ||
| 867 | |||
| 868 | ret = send_control_msg(pdev, | ||
| 869 | SET_CHROM_CTL, WB_MODE_FORMATTER, &buf, sizeof(buf)); | ||
| 870 | |||
| 871 | if (ret < 0) | ||
| 872 | return ret; | ||
| 873 | return 0; | ||
| 874 | } | ||
| 875 | |||
| 876 | int pwc_get_awb(struct pwc_device *pdev) | ||
| 877 | { | ||
| 878 | unsigned char buf; | ||
| 879 | int ret; | ||
| 880 | |||
| 881 | ret = recv_control_msg(pdev, | ||
| 882 | GET_CHROM_CTL, WB_MODE_FORMATTER, &buf, sizeof(buf)); | ||
| 883 | |||
| 884 | if (ret < 0) | ||
| 885 | return ret; | ||
| 886 | return buf; | ||
| 887 | } | ||
| 888 | |||
| 889 | int pwc_set_red_gain(struct pwc_device *pdev, int value) | ||
| 890 | { | ||
| 891 | unsigned char buf; | ||
| 892 | |||
| 893 | if (value < 0) | ||
| 894 | value = 0; | ||
| 895 | if (value > 0xffff) | ||
| 896 | value = 0xffff; | ||
| 897 | /* only the msb is considered */ | ||
| 898 | buf = value >> 8; | ||
| 899 | return send_control_msg(pdev, | ||
| 900 | SET_CHROM_CTL, PRESET_MANUAL_RED_GAIN_FORMATTER, | ||
| 901 | &buf, sizeof(buf)); | ||
| 902 | } | ||
| 903 | |||
| 904 | int pwc_get_red_gain(struct pwc_device *pdev, int *value) | ||
| 905 | { | ||
| 906 | unsigned char buf; | ||
| 907 | int ret; | ||
| 908 | |||
| 909 | ret = recv_control_msg(pdev, | ||
| 910 | GET_CHROM_CTL, PRESET_MANUAL_RED_GAIN_FORMATTER, | ||
| 911 | &buf, sizeof(buf)); | ||
| 912 | if (ret < 0) | ||
| 913 | return ret; | ||
| 914 | *value = buf << 8; | ||
| 915 | return 0; | ||
| 916 | } | ||
| 917 | |||
| 918 | |||
| 919 | int pwc_set_blue_gain(struct pwc_device *pdev, int value) | ||
| 920 | { | ||
| 921 | unsigned char buf; | ||
| 922 | |||
| 923 | if (value < 0) | ||
| 924 | value = 0; | ||
| 925 | if (value > 0xffff) | ||
| 926 | value = 0xffff; | ||
| 927 | /* only the msb is considered */ | ||
| 928 | buf = value >> 8; | ||
| 929 | return send_control_msg(pdev, | ||
| 930 | SET_CHROM_CTL, PRESET_MANUAL_BLUE_GAIN_FORMATTER, | ||
| 931 | &buf, sizeof(buf)); | ||
| 932 | } | ||
| 933 | |||
| 934 | int pwc_get_blue_gain(struct pwc_device *pdev, int *value) | ||
| 935 | { | ||
| 936 | unsigned char buf; | ||
| 937 | int ret; | ||
| 938 | |||
| 939 | ret = recv_control_msg(pdev, | ||
| 940 | GET_CHROM_CTL, PRESET_MANUAL_BLUE_GAIN_FORMATTER, | ||
| 941 | &buf, sizeof(buf)); | ||
| 942 | if (ret < 0) | ||
| 943 | return ret; | ||
| 944 | *value = buf << 8; | ||
| 945 | return 0; | ||
| 946 | } | ||
| 947 | |||
| 948 | 595 | ||
| 949 | /* The following two functions are different, since they only read the | 596 | if (r < 0) |
| 950 | internal red/blue gains, which may be different from the manual | 597 | PWC_ERROR("Failed to power %s camera (%d)\n", |
| 951 | gains set or read above. | 598 | power ? "on" : "off", r); |
| 952 | */ | ||
| 953 | static int pwc_read_red_gain(struct pwc_device *pdev, int *value) | ||
| 954 | { | ||
| 955 | unsigned char buf; | ||
| 956 | int ret; | ||
| 957 | |||
| 958 | ret = recv_control_msg(pdev, | ||
| 959 | GET_STATUS_CTL, READ_RED_GAIN_FORMATTER, &buf, sizeof(buf)); | ||
| 960 | if (ret < 0) | ||
| 961 | return ret; | ||
| 962 | *value = buf << 8; | ||
| 963 | return 0; | ||
| 964 | } | 599 | } |
| 965 | 600 | ||
| 966 | static int pwc_read_blue_gain(struct pwc_device *pdev, int *value) | ||
| 967 | { | ||
| 968 | unsigned char buf; | ||
| 969 | int ret; | ||
| 970 | |||
| 971 | ret = recv_control_msg(pdev, | ||
| 972 | GET_STATUS_CTL, READ_BLUE_GAIN_FORMATTER, &buf, sizeof(buf)); | ||
| 973 | if (ret < 0) | ||
| 974 | return ret; | ||
| 975 | *value = buf << 8; | ||
| 976 | return 0; | ||
| 977 | } | ||
| 978 | |||
| 979 | |||
| 980 | static int pwc_set_wb_speed(struct pwc_device *pdev, int speed) | 601 | static int pwc_set_wb_speed(struct pwc_device *pdev, int speed) |
| 981 | { | 602 | { |
| 982 | unsigned char buf; | 603 | unsigned char buf; |
| @@ -1028,6 +649,7 @@ static int pwc_get_wb_delay(struct pwc_device *pdev, int *value) | |||
| 1028 | int pwc_set_leds(struct pwc_device *pdev, int on_value, int off_value) | 649 | int pwc_set_leds(struct pwc_device *pdev, int on_value, int off_value) |
| 1029 | { | 650 | { |
| 1030 | unsigned char buf[2]; | 651 | unsigned char buf[2]; |
| 652 | int r; | ||
| 1031 | 653 | ||
| 1032 | if (pdev->type < 730) | 654 | if (pdev->type < 730) |
| 1033 | return 0; | 655 | return 0; |
| @@ -1045,8 +667,12 @@ int pwc_set_leds(struct pwc_device *pdev, int on_value, int off_value) | |||
| 1045 | buf[0] = on_value; | 667 | buf[0] = on_value; |
| 1046 | buf[1] = off_value; | 668 | buf[1] = off_value; |
| 1047 | 669 | ||
| 1048 | return send_control_msg(pdev, | 670 | r = send_control_msg(pdev, |
| 1049 | SET_STATUS_CTL, LED_FORMATTER, &buf, sizeof(buf)); | 671 | SET_STATUS_CTL, LED_FORMATTER, &buf, sizeof(buf)); |
| 672 | if (r < 0) | ||
| 673 | PWC_ERROR("Failed to set LED on/off time (%d)\n", r); | ||
| 674 | |||
| 675 | return r; | ||
| 1050 | } | 676 | } |
| 1051 | 677 | ||
| 1052 | static int pwc_get_leds(struct pwc_device *pdev, int *on_value, int *off_value) | 678 | static int pwc_get_leds(struct pwc_device *pdev, int *on_value, int *off_value) |
| @@ -1069,164 +695,6 @@ static int pwc_get_leds(struct pwc_device *pdev, int *on_value, int *off_value) | |||
| 1069 | return 0; | 695 | return 0; |
| 1070 | } | 696 | } |
| 1071 | 697 | ||
| 1072 | int pwc_set_contour(struct pwc_device *pdev, int contour) | ||
| 1073 | { | ||
| 1074 | unsigned char buf; | ||
| 1075 | int ret; | ||
| 1076 | |||
| 1077 | if (contour < 0) | ||
| 1078 | buf = 0xff; /* auto contour on */ | ||
| 1079 | else | ||
| 1080 | buf = 0x0; /* auto contour off */ | ||
| 1081 | ret = send_control_msg(pdev, | ||
| 1082 | SET_LUM_CTL, AUTO_CONTOUR_FORMATTER, &buf, sizeof(buf)); | ||
| 1083 | if (ret < 0) | ||
| 1084 | return ret; | ||
| 1085 | |||
| 1086 | if (contour < 0) | ||
| 1087 | return 0; | ||
| 1088 | if (contour > 0xffff) | ||
| 1089 | contour = 0xffff; | ||
| 1090 | |||
| 1091 | buf = (contour >> 10); /* contour preset is [0..3f] */ | ||
| 1092 | ret = send_control_msg(pdev, | ||
| 1093 | SET_LUM_CTL, PRESET_CONTOUR_FORMATTER, &buf, sizeof(buf)); | ||
| 1094 | if (ret < 0) | ||
| 1095 | return ret; | ||
| 1096 | return 0; | ||
| 1097 | } | ||
| 1098 | |||
| 1099 | int pwc_get_contour(struct pwc_device *pdev, int *contour) | ||
| 1100 | { | ||
| 1101 | unsigned char buf; | ||
| 1102 | int ret; | ||
| 1103 | |||
| 1104 | ret = recv_control_msg(pdev, | ||
| 1105 | GET_LUM_CTL, AUTO_CONTOUR_FORMATTER, &buf, sizeof(buf)); | ||
| 1106 | if (ret < 0) | ||
| 1107 | return ret; | ||
| 1108 | |||
| 1109 | if (buf == 0) { | ||
| 1110 | /* auto mode off, query current preset value */ | ||
| 1111 | ret = recv_control_msg(pdev, | ||
| 1112 | GET_LUM_CTL, PRESET_CONTOUR_FORMATTER, | ||
| 1113 | &buf, sizeof(buf)); | ||
| 1114 | if (ret < 0) | ||
| 1115 | return ret; | ||
| 1116 | *contour = buf << 10; | ||
| 1117 | } | ||
| 1118 | else | ||
| 1119 | *contour = -1; | ||
| 1120 | return 0; | ||
| 1121 | } | ||
| 1122 | |||
| 1123 | |||
| 1124 | int pwc_set_backlight(struct pwc_device *pdev, int backlight) | ||
| 1125 | { | ||
| 1126 | unsigned char buf; | ||
| 1127 | |||
| 1128 | if (backlight) | ||
| 1129 | buf = 0xff; | ||
| 1130 | else | ||
| 1131 | buf = 0x0; | ||
| 1132 | return send_control_msg(pdev, | ||
| 1133 | SET_LUM_CTL, BACK_LIGHT_COMPENSATION_FORMATTER, | ||
| 1134 | &buf, sizeof(buf)); | ||
| 1135 | } | ||
| 1136 | |||
| 1137 | int pwc_get_backlight(struct pwc_device *pdev, int *backlight) | ||
| 1138 | { | ||
| 1139 | int ret; | ||
| 1140 | unsigned char buf; | ||
| 1141 | |||
| 1142 | ret = recv_control_msg(pdev, | ||
| 1143 | GET_LUM_CTL, BACK_LIGHT_COMPENSATION_FORMATTER, | ||
| 1144 | &buf, sizeof(buf)); | ||
| 1145 | if (ret < 0) | ||
| 1146 | return ret; | ||
| 1147 | *backlight = !!buf; | ||
| 1148 | return 0; | ||
| 1149 | } | ||
| 1150 | |||
| 1151 | int pwc_set_colour_mode(struct pwc_device *pdev, int colour) | ||
| 1152 | { | ||
| 1153 | unsigned char buf; | ||
| 1154 | |||
| 1155 | if (colour) | ||
| 1156 | buf = 0xff; | ||
| 1157 | else | ||
| 1158 | buf = 0x0; | ||
| 1159 | return send_control_msg(pdev, | ||
| 1160 | SET_CHROM_CTL, COLOUR_MODE_FORMATTER, &buf, sizeof(buf)); | ||
| 1161 | } | ||
| 1162 | |||
| 1163 | int pwc_get_colour_mode(struct pwc_device *pdev, int *colour) | ||
| 1164 | { | ||
| 1165 | int ret; | ||
| 1166 | unsigned char buf; | ||
| 1167 | |||
| 1168 | ret = recv_control_msg(pdev, | ||
| 1169 | GET_CHROM_CTL, COLOUR_MODE_FORMATTER, &buf, sizeof(buf)); | ||
| 1170 | if (ret < 0) | ||
| 1171 | return ret; | ||
| 1172 | *colour = !!buf; | ||
| 1173 | return 0; | ||
| 1174 | } | ||
| 1175 | |||
| 1176 | |||
| 1177 | int pwc_set_flicker(struct pwc_device *pdev, int flicker) | ||
| 1178 | { | ||
| 1179 | unsigned char buf; | ||
| 1180 | |||
| 1181 | if (flicker) | ||
| 1182 | buf = 0xff; | ||
| 1183 | else | ||
| 1184 | buf = 0x0; | ||
| 1185 | return send_control_msg(pdev, | ||
| 1186 | SET_LUM_CTL, FLICKERLESS_MODE_FORMATTER, &buf, sizeof(buf)); | ||
| 1187 | } | ||
| 1188 | |||
| 1189 | int pwc_get_flicker(struct pwc_device *pdev, int *flicker) | ||
| 1190 | { | ||
| 1191 | int ret; | ||
| 1192 | unsigned char buf; | ||
| 1193 | |||
| 1194 | ret = recv_control_msg(pdev, | ||
| 1195 | GET_LUM_CTL, FLICKERLESS_MODE_FORMATTER, &buf, sizeof(buf)); | ||
| 1196 | if (ret < 0) | ||
| 1197 | return ret; | ||
| 1198 | *flicker = !!buf; | ||
| 1199 | return 0; | ||
| 1200 | } | ||
| 1201 | |||
| 1202 | int pwc_set_dynamic_noise(struct pwc_device *pdev, int noise) | ||
| 1203 | { | ||
| 1204 | unsigned char buf; | ||
| 1205 | |||
| 1206 | if (noise < 0) | ||
| 1207 | noise = 0; | ||
| 1208 | if (noise > 3) | ||
| 1209 | noise = 3; | ||
| 1210 | buf = noise; | ||
| 1211 | return send_control_msg(pdev, | ||
| 1212 | SET_LUM_CTL, DYNAMIC_NOISE_CONTROL_FORMATTER, | ||
| 1213 | &buf, sizeof(buf)); | ||
| 1214 | } | ||
| 1215 | |||
| 1216 | int pwc_get_dynamic_noise(struct pwc_device *pdev, int *noise) | ||
| 1217 | { | ||
| 1218 | int ret; | ||
| 1219 | unsigned char buf; | ||
| 1220 | |||
| 1221 | ret = recv_control_msg(pdev, | ||
| 1222 | GET_LUM_CTL, DYNAMIC_NOISE_CONTROL_FORMATTER, | ||
| 1223 | &buf, sizeof(buf)); | ||
| 1224 | if (ret < 0) | ||
| 1225 | return ret; | ||
| 1226 | *noise = buf; | ||
| 1227 | return 0; | ||
| 1228 | } | ||
| 1229 | |||
| 1230 | static int _pwc_mpt_reset(struct pwc_device *pdev, int flags) | 698 | static int _pwc_mpt_reset(struct pwc_device *pdev, int flags) |
| 1231 | { | 699 | { |
| 1232 | unsigned char buf; | 700 | unsigned char buf; |
| @@ -1309,7 +777,7 @@ static int pwc_mpt_get_status(struct pwc_device *pdev, struct pwc_mpt_status *st | |||
| 1309 | return 0; | 777 | return 0; |
| 1310 | } | 778 | } |
| 1311 | 779 | ||
| 1312 | 780 | #ifdef CONFIG_USB_PWC_DEBUG | |
| 1313 | int pwc_get_cmos_sensor(struct pwc_device *pdev, int *sensor) | 781 | int pwc_get_cmos_sensor(struct pwc_device *pdev, int *sensor) |
| 1314 | { | 782 | { |
| 1315 | unsigned char buf; | 783 | unsigned char buf; |
| @@ -1332,7 +800,7 @@ int pwc_get_cmos_sensor(struct pwc_device *pdev, int *sensor) | |||
| 1332 | *sensor = buf; | 800 | *sensor = buf; |
| 1333 | return 0; | 801 | return 0; |
| 1334 | } | 802 | } |
| 1335 | 803 | #endif | |
| 1336 | 804 | ||
| 1337 | /* End of Add-Ons */ | 805 | /* End of Add-Ons */ |
| 1338 | /* ************************************************* */ | 806 | /* ************************************************* */ |
| @@ -1356,37 +824,41 @@ int pwc_get_cmos_sensor(struct pwc_device *pdev, int *sensor) | |||
| 1356 | /* copy local variable to arg */ | 824 | /* copy local variable to arg */ |
| 1357 | #define ARG_OUT(ARG_name) /* nothing */ | 825 | #define ARG_OUT(ARG_name) /* nothing */ |
| 1358 | 826 | ||
| 827 | /* | ||
| 828 | * Our ctrls use native values, but the old custom pwc ioctl interface expects | ||
| 829 | * values from 0 - 65535, define 2 helper functions to scale things. */ | ||
| 830 | static int pwc_ioctl_g_ctrl(struct v4l2_ctrl *ctrl) | ||
| 831 | { | ||
| 832 | return v4l2_ctrl_g_ctrl(ctrl) * 65535 / ctrl->maximum; | ||
| 833 | } | ||
| 834 | |||
| 835 | static int pwc_ioctl_s_ctrl(struct v4l2_ctrl *ctrl, int val) | ||
| 836 | { | ||
| 837 | return v4l2_ctrl_s_ctrl(ctrl, val * ctrl->maximum / 65535); | ||
| 838 | } | ||
| 839 | |||
| 1359 | long pwc_ioctl(struct pwc_device *pdev, unsigned int cmd, void *arg) | 840 | long pwc_ioctl(struct pwc_device *pdev, unsigned int cmd, void *arg) |
| 1360 | { | 841 | { |
| 1361 | long ret = 0; | 842 | long ret = 0; |
| 1362 | 843 | ||
| 1363 | switch(cmd) { | 844 | switch(cmd) { |
| 1364 | case VIDIOCPWCRUSER: | 845 | case VIDIOCPWCRUSER: |
| 1365 | { | 846 | ret = pwc_button_ctrl(pdev, RESTORE_USER_DEFAULTS_FORMATTER); |
| 1366 | if (pwc_restore_user(pdev)) | ||
| 1367 | ret = -EINVAL; | ||
| 1368 | break; | 847 | break; |
| 1369 | } | ||
| 1370 | 848 | ||
| 1371 | case VIDIOCPWCSUSER: | 849 | case VIDIOCPWCSUSER: |
| 1372 | { | 850 | ret = pwc_button_ctrl(pdev, SAVE_USER_DEFAULTS_FORMATTER); |
| 1373 | if (pwc_save_user(pdev)) | ||
| 1374 | ret = -EINVAL; | ||
| 1375 | break; | 851 | break; |
| 1376 | } | ||
| 1377 | 852 | ||
| 1378 | case VIDIOCPWCFACTORY: | 853 | case VIDIOCPWCFACTORY: |
| 1379 | { | 854 | ret = pwc_button_ctrl(pdev, RESTORE_FACTORY_DEFAULTS_FORMATTER); |
| 1380 | if (pwc_restore_factory(pdev)) | ||
| 1381 | ret = -EINVAL; | ||
| 1382 | break; | 855 | break; |
| 1383 | } | ||
| 1384 | 856 | ||
| 1385 | case VIDIOCPWCSCQUAL: | 857 | case VIDIOCPWCSCQUAL: |
| 1386 | { | 858 | { |
| 1387 | ARG_DEF(int, qual) | 859 | ARG_DEF(int, qual) |
| 1388 | 860 | ||
| 1389 | if (pdev->iso_init) { | 861 | if (vb2_is_streaming(&pdev->vb_queue)) { |
| 1390 | ret = -EBUSY; | 862 | ret = -EBUSY; |
| 1391 | break; | 863 | break; |
| 1392 | } | 864 | } |
| @@ -1396,8 +868,6 @@ long pwc_ioctl(struct pwc_device *pdev, unsigned int cmd, void *arg) | |||
| 1396 | ret = -EINVAL; | 868 | ret = -EINVAL; |
| 1397 | else | 869 | else |
| 1398 | ret = pwc_set_video_mode(pdev, pdev->view.x, pdev->view.y, pdev->vframes, ARGR(qual), pdev->vsnapshot); | 870 | ret = pwc_set_video_mode(pdev, pdev->view.x, pdev->view.y, pdev->vframes, ARGR(qual), pdev->vsnapshot); |
| 1399 | if (ret >= 0) | ||
| 1400 | pdev->vcompression = ARGR(qual); | ||
| 1401 | break; | 871 | break; |
| 1402 | } | 872 | } |
| 1403 | 873 | ||
| @@ -1432,71 +902,59 @@ long pwc_ioctl(struct pwc_device *pdev, unsigned int cmd, void *arg) | |||
| 1432 | case VIDIOCPWCSAGC: | 902 | case VIDIOCPWCSAGC: |
| 1433 | { | 903 | { |
| 1434 | ARG_DEF(int, agc) | 904 | ARG_DEF(int, agc) |
| 1435 | |||
| 1436 | ARG_IN(agc) | 905 | ARG_IN(agc) |
| 1437 | if (pwc_set_agc(pdev, ARGR(agc) < 0 ? 1 : 0, ARGR(agc))) | 906 | ret = v4l2_ctrl_s_ctrl(pdev->autogain, ARGR(agc) < 0); |
| 1438 | ret = -EINVAL; | 907 | if (ret == 0 && ARGR(agc) >= 0) |
| 908 | ret = pwc_ioctl_s_ctrl(pdev->gain, ARGR(agc)); | ||
| 1439 | break; | 909 | break; |
| 1440 | } | 910 | } |
| 1441 | 911 | ||
| 1442 | case VIDIOCPWCGAGC: | 912 | case VIDIOCPWCGAGC: |
| 1443 | { | 913 | { |
| 1444 | ARG_DEF(int, agc) | 914 | ARG_DEF(int, agc) |
| 1445 | 915 | if (v4l2_ctrl_g_ctrl(pdev->autogain)) | |
| 1446 | if (pwc_get_agc(pdev, ARGA(agc))) | 916 | ARGR(agc) = -1; |
| 1447 | ret = -EINVAL; | 917 | else |
| 918 | ARGR(agc) = pwc_ioctl_g_ctrl(pdev->gain); | ||
| 1448 | ARG_OUT(agc) | 919 | ARG_OUT(agc) |
| 1449 | break; | 920 | break; |
| 1450 | } | 921 | } |
| 1451 | 922 | ||
| 1452 | case VIDIOCPWCSSHUTTER: | 923 | case VIDIOCPWCSSHUTTER: |
| 1453 | { | 924 | { |
| 1454 | ARG_DEF(int, shutter_speed) | 925 | ARG_DEF(int, shutter) |
| 1455 | 926 | ARG_IN(shutter) | |
| 1456 | ARG_IN(shutter_speed) | 927 | ret = v4l2_ctrl_s_ctrl(pdev->exposure_auto, |
| 1457 | ret = pwc_set_shutter_speed(pdev, ARGR(shutter_speed) < 0 ? 1 : 0, ARGR(shutter_speed)); | 928 | /* Menu idx 0 = auto, idx 1 = manual */ |
| 929 | ARGR(shutter) >= 0); | ||
| 930 | if (ret == 0 && ARGR(shutter) >= 0) | ||
| 931 | ret = pwc_ioctl_s_ctrl(pdev->exposure, ARGR(shutter)); | ||
| 1458 | break; | 932 | break; |
| 1459 | } | 933 | } |
| 1460 | 934 | ||
| 1461 | case VIDIOCPWCSAWB: | 935 | case VIDIOCPWCSAWB: |
| 1462 | { | 936 | { |
| 1463 | ARG_DEF(struct pwc_whitebalance, wb) | 937 | ARG_DEF(struct pwc_whitebalance, wb) |
| 1464 | |||
| 1465 | ARG_IN(wb) | 938 | ARG_IN(wb) |
| 1466 | ret = pwc_set_awb(pdev, ARGR(wb).mode); | 939 | ret = v4l2_ctrl_s_ctrl(pdev->auto_white_balance, |
| 1467 | if (ret >= 0 && ARGR(wb).mode == PWC_WB_MANUAL) { | 940 | ARGR(wb).mode); |
| 1468 | pwc_set_red_gain(pdev, ARGR(wb).manual_red); | 941 | if (ret == 0 && ARGR(wb).mode == PWC_WB_MANUAL) |
| 1469 | pwc_set_blue_gain(pdev, ARGR(wb).manual_blue); | 942 | ret = pwc_ioctl_s_ctrl(pdev->red_balance, |
| 1470 | } | 943 | ARGR(wb).manual_red); |
| 944 | if (ret == 0 && ARGR(wb).mode == PWC_WB_MANUAL) | ||
| 945 | ret = pwc_ioctl_s_ctrl(pdev->blue_balance, | ||
| 946 | ARGR(wb).manual_blue); | ||
| 1471 | break; | 947 | break; |
| 1472 | } | 948 | } |
| 1473 | 949 | ||
| 1474 | case VIDIOCPWCGAWB: | 950 | case VIDIOCPWCGAWB: |
| 1475 | { | 951 | { |
| 1476 | ARG_DEF(struct pwc_whitebalance, wb) | 952 | ARG_DEF(struct pwc_whitebalance, wb) |
| 1477 | 953 | ARGR(wb).mode = v4l2_ctrl_g_ctrl(pdev->auto_white_balance); | |
| 1478 | memset(ARGA(wb), 0, sizeof(struct pwc_whitebalance)); | 954 | ARGR(wb).manual_red = ARGR(wb).read_red = |
| 1479 | ARGR(wb).mode = pwc_get_awb(pdev); | 955 | pwc_ioctl_g_ctrl(pdev->red_balance); |
| 1480 | if (ARGR(wb).mode < 0) | 956 | ARGR(wb).manual_blue = ARGR(wb).read_blue = |
| 1481 | ret = -EINVAL; | 957 | pwc_ioctl_g_ctrl(pdev->blue_balance); |
| 1482 | else { | ||
| 1483 | if (ARGR(wb).mode == PWC_WB_MANUAL) { | ||
| 1484 | ret = pwc_get_red_gain(pdev, &ARGR(wb).manual_red); | ||
| 1485 | if (ret < 0) | ||
| 1486 | break; | ||
| 1487 | ret = pwc_get_blue_gain(pdev, &ARGR(wb).manual_blue); | ||
| 1488 | if (ret < 0) | ||
| 1489 | break; | ||
| 1490 | } | ||
| 1491 | if (ARGR(wb).mode == PWC_WB_AUTO) { | ||
| 1492 | ret = pwc_read_red_gain(pdev, &ARGR(wb).read_red); | ||
| 1493 | if (ret < 0) | ||
| 1494 | break; | ||
| 1495 | ret = pwc_read_blue_gain(pdev, &ARGR(wb).read_blue); | ||
| 1496 | if (ret < 0) | ||
| 1497 | break; | ||
| 1498 | } | ||
| 1499 | } | ||
| 1500 | ARG_OUT(wb) | 958 | ARG_OUT(wb) |
| 1501 | break; | 959 | break; |
| 1502 | } | 960 | } |
| @@ -1550,17 +1008,20 @@ long pwc_ioctl(struct pwc_device *pdev, unsigned int cmd, void *arg) | |||
| 1550 | case VIDIOCPWCSCONTOUR: | 1008 | case VIDIOCPWCSCONTOUR: |
| 1551 | { | 1009 | { |
| 1552 | ARG_DEF(int, contour) | 1010 | ARG_DEF(int, contour) |
| 1553 | |||
| 1554 | ARG_IN(contour) | 1011 | ARG_IN(contour) |
| 1555 | ret = pwc_set_contour(pdev, ARGR(contour)); | 1012 | ret = v4l2_ctrl_s_ctrl(pdev->autocontour, ARGR(contour) < 0); |
| 1013 | if (ret == 0 && ARGR(contour) >= 0) | ||
| 1014 | ret = pwc_ioctl_s_ctrl(pdev->contour, ARGR(contour)); | ||
| 1556 | break; | 1015 | break; |
| 1557 | } | 1016 | } |
| 1558 | 1017 | ||
| 1559 | case VIDIOCPWCGCONTOUR: | 1018 | case VIDIOCPWCGCONTOUR: |
| 1560 | { | 1019 | { |
| 1561 | ARG_DEF(int, contour) | 1020 | ARG_DEF(int, contour) |
| 1562 | 1021 | if (v4l2_ctrl_g_ctrl(pdev->autocontour)) | |
| 1563 | ret = pwc_get_contour(pdev, ARGA(contour)); | 1022 | ARGR(contour) = -1; |
| 1023 | else | ||
| 1024 | ARGR(contour) = pwc_ioctl_g_ctrl(pdev->contour); | ||
| 1564 | ARG_OUT(contour) | 1025 | ARG_OUT(contour) |
| 1565 | break; | 1026 | break; |
| 1566 | } | 1027 | } |
| @@ -1568,17 +1029,15 @@ long pwc_ioctl(struct pwc_device *pdev, unsigned int cmd, void *arg) | |||
| 1568 | case VIDIOCPWCSBACKLIGHT: | 1029 | case VIDIOCPWCSBACKLIGHT: |
| 1569 | { | 1030 | { |
| 1570 | ARG_DEF(int, backlight) | 1031 | ARG_DEF(int, backlight) |
| 1571 | |||
| 1572 | ARG_IN(backlight) | 1032 | ARG_IN(backlight) |
| 1573 | ret = pwc_set_backlight(pdev, ARGR(backlight)); | 1033 | ret = v4l2_ctrl_s_ctrl(pdev->backlight, ARGR(backlight)); |
| 1574 | break; | 1034 | break; |
| 1575 | } | 1035 | } |
| 1576 | 1036 | ||
| 1577 | case VIDIOCPWCGBACKLIGHT: | 1037 | case VIDIOCPWCGBACKLIGHT: |
| 1578 | { | 1038 | { |
| 1579 | ARG_DEF(int, backlight) | 1039 | ARG_DEF(int, backlight) |
| 1580 | 1040 | ARGR(backlight) = v4l2_ctrl_g_ctrl(pdev->backlight); | |
| 1581 | ret = pwc_get_backlight(pdev, ARGA(backlight)); | ||
| 1582 | ARG_OUT(backlight) | 1041 | ARG_OUT(backlight) |
| 1583 | break; | 1042 | break; |
| 1584 | } | 1043 | } |
| @@ -1586,17 +1045,15 @@ long pwc_ioctl(struct pwc_device *pdev, unsigned int cmd, void *arg) | |||
| 1586 | case VIDIOCPWCSFLICKER: | 1045 | case VIDIOCPWCSFLICKER: |
| 1587 | { | 1046 | { |
| 1588 | ARG_DEF(int, flicker) | 1047 | ARG_DEF(int, flicker) |
| 1589 | |||
| 1590 | ARG_IN(flicker) | 1048 | ARG_IN(flicker) |
| 1591 | ret = pwc_set_flicker(pdev, ARGR(flicker)); | 1049 | ret = v4l2_ctrl_s_ctrl(pdev->flicker, ARGR(flicker)); |
| 1592 | break; | 1050 | break; |
| 1593 | } | 1051 | } |
| 1594 | 1052 | ||
| 1595 | case VIDIOCPWCGFLICKER: | 1053 | case VIDIOCPWCGFLICKER: |
| 1596 | { | 1054 | { |
| 1597 | ARG_DEF(int, flicker) | 1055 | ARG_DEF(int, flicker) |
| 1598 | 1056 | ARGR(flicker) = v4l2_ctrl_g_ctrl(pdev->flicker); | |
| 1599 | ret = pwc_get_flicker(pdev, ARGA(flicker)); | ||
| 1600 | ARG_OUT(flicker) | 1057 | ARG_OUT(flicker) |
| 1601 | break; | 1058 | break; |
| 1602 | } | 1059 | } |
| @@ -1604,17 +1061,15 @@ long pwc_ioctl(struct pwc_device *pdev, unsigned int cmd, void *arg) | |||
| 1604 | case VIDIOCPWCSDYNNOISE: | 1061 | case VIDIOCPWCSDYNNOISE: |
| 1605 | { | 1062 | { |
| 1606 | ARG_DEF(int, dynnoise) | 1063 | ARG_DEF(int, dynnoise) |
| 1607 | |||
| 1608 | ARG_IN(dynnoise) | 1064 | ARG_IN(dynnoise) |
| 1609 | ret = pwc_set_dynamic_noise(pdev, ARGR(dynnoise)); | 1065 | ret = v4l2_ctrl_s_ctrl(pdev->noise_reduction, ARGR(dynnoise)); |
| 1610 | break; | 1066 | break; |
| 1611 | } | 1067 | } |
| 1612 | 1068 | ||
| 1613 | case VIDIOCPWCGDYNNOISE: | 1069 | case VIDIOCPWCGDYNNOISE: |
| 1614 | { | 1070 | { |
| 1615 | ARG_DEF(int, dynnoise) | 1071 | ARG_DEF(int, dynnoise) |
| 1616 | 1072 | ARGR(dynnoise) = v4l2_ctrl_g_ctrl(pdev->noise_reduction); | |
| 1617 | ret = pwc_get_dynamic_noise(pdev, ARGA(dynnoise)); | ||
| 1618 | ARG_OUT(dynnoise); | 1073 | ARG_OUT(dynnoise); |
| 1619 | break; | 1074 | break; |
| 1620 | } | 1075 | } |
diff --git a/drivers/media/video/pwc/pwc-dec1.c b/drivers/media/video/pwc/pwc-dec1.c index c29593f589eb..be0e02cb487f 100644 --- a/drivers/media/video/pwc/pwc-dec1.c +++ b/drivers/media/video/pwc/pwc-dec1.c | |||
| @@ -22,29 +22,19 @@ | |||
| 22 | along with this program; if not, write to the Free Software | 22 | along with this program; if not, write to the Free Software |
| 23 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 23 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 24 | */ | 24 | */ |
| 25 | |||
| 26 | |||
| 27 | |||
| 28 | #include "pwc-dec1.h" | 25 | #include "pwc-dec1.h" |
| 29 | 26 | ||
| 30 | 27 | int pwc_dec1_init(struct pwc_device *pwc, int type, int release, void *buffer) | |
| 31 | void pwc_dec1_init(int type, int release, void *buffer, void *table) | ||
| 32 | { | 28 | { |
| 29 | struct pwc_dec1_private *pdec; | ||
| 33 | 30 | ||
| 34 | } | 31 | if (pwc->decompress_data == NULL) { |
| 35 | 32 | pdec = kmalloc(sizeof(struct pwc_dec1_private), GFP_KERNEL); | |
| 36 | void pwc_dec1_exit(void) | 33 | if (pdec == NULL) |
| 37 | { | 34 | return -ENOMEM; |
| 35 | pwc->decompress_data = pdec; | ||
| 36 | } | ||
| 37 | pdec = pwc->decompress_data; | ||
| 38 | 38 | ||
| 39 | |||
| 40 | |||
| 41 | } | ||
| 42 | |||
| 43 | int pwc_dec1_alloc(struct pwc_device *pwc) | ||
| 44 | { | ||
| 45 | pwc->decompress_data = kmalloc(sizeof(struct pwc_dec1_private), GFP_KERNEL); | ||
| 46 | if (pwc->decompress_data == NULL) | ||
| 47 | return -ENOMEM; | ||
| 48 | return 0; | 39 | return 0; |
| 49 | } | 40 | } |
| 50 | |||
diff --git a/drivers/media/video/pwc/pwc-dec1.h b/drivers/media/video/pwc/pwc-dec1.h index 8b62ddcc5c7e..a57d8601080b 100644 --- a/drivers/media/video/pwc/pwc-dec1.h +++ b/drivers/media/video/pwc/pwc-dec1.h | |||
| @@ -22,8 +22,6 @@ | |||
| 22 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 22 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 23 | */ | 23 | */ |
| 24 | 24 | ||
| 25 | |||
| 26 | |||
| 27 | #ifndef PWC_DEC1_H | 25 | #ifndef PWC_DEC1_H |
| 28 | #define PWC_DEC1_H | 26 | #define PWC_DEC1_H |
| 29 | 27 | ||
| @@ -32,12 +30,8 @@ | |||
| 32 | struct pwc_dec1_private | 30 | struct pwc_dec1_private |
| 33 | { | 31 | { |
| 34 | int version; | 32 | int version; |
| 35 | |||
| 36 | }; | 33 | }; |
| 37 | 34 | ||
| 38 | int pwc_dec1_alloc(struct pwc_device *pwc); | 35 | int pwc_dec1_init(struct pwc_device *pwc, int type, int release, void *buffer); |
| 39 | void pwc_dec1_init(int type, int release, void *buffer, void *private_data); | ||
| 40 | void pwc_dec1_exit(void); | ||
| 41 | 36 | ||
| 42 | #endif | 37 | #endif |
| 43 | |||
diff --git a/drivers/media/video/pwc/pwc-dec23.c b/drivers/media/video/pwc/pwc-dec23.c index 0c801b8f3eca..06a4e877ba40 100644 --- a/drivers/media/video/pwc/pwc-dec23.c +++ b/drivers/media/video/pwc/pwc-dec23.c | |||
| @@ -916,27 +916,5 @@ void pwc_dec23_decompress(const struct pwc_device *pwc, | |||
| 916 | pout_planar_v += pwc->view.x; | 916 | pout_planar_v += pwc->view.x; |
| 917 | 917 | ||
| 918 | } | 918 | } |
| 919 | |||
| 920 | } | 919 | } |
| 921 | |||
| 922 | } | 920 | } |
| 923 | |||
| 924 | void pwc_dec23_exit(void) | ||
| 925 | { | ||
| 926 | /* Do nothing */ | ||
| 927 | |||
| 928 | } | ||
| 929 | |||
| 930 | /** | ||
| 931 | * Allocate a private structure used by lookup table. | ||
| 932 | * You must call kfree() to free the memory allocated. | ||
| 933 | */ | ||
| 934 | int pwc_dec23_alloc(struct pwc_device *pwc) | ||
| 935 | { | ||
| 936 | pwc->decompress_data = kmalloc(sizeof(struct pwc_dec23_private), GFP_KERNEL); | ||
| 937 | if (pwc->decompress_data == NULL) | ||
| 938 | return -ENOMEM; | ||
| 939 | return 0; | ||
| 940 | } | ||
| 941 | |||
| 942 | /* vim: set cino= formatoptions=croql cindent shiftwidth=8 tabstop=8: */ | ||
diff --git a/drivers/media/video/pwc/pwc-dec23.h b/drivers/media/video/pwc/pwc-dec23.h index 1c55298ad153..a0ac4f3dff81 100644 --- a/drivers/media/video/pwc/pwc-dec23.h +++ b/drivers/media/video/pwc/pwc-dec23.h | |||
| @@ -49,19 +49,9 @@ struct pwc_dec23_private | |||
| 49 | 49 | ||
| 50 | }; | 50 | }; |
| 51 | 51 | ||
| 52 | |||
| 53 | int pwc_dec23_alloc(struct pwc_device *pwc); | ||
| 54 | int pwc_dec23_init(struct pwc_device *pwc, int type, unsigned char *cmd); | 52 | int pwc_dec23_init(struct pwc_device *pwc, int type, unsigned char *cmd); |
| 55 | void pwc_dec23_exit(void); | ||
| 56 | void pwc_dec23_decompress(const struct pwc_device *pwc, | 53 | void pwc_dec23_decompress(const struct pwc_device *pwc, |
| 57 | const void *src, | 54 | const void *src, |
| 58 | void *dst, | 55 | void *dst, |
| 59 | int flags); | 56 | int flags); |
| 60 | |||
| 61 | |||
| 62 | |||
| 63 | #endif | 57 | #endif |
| 64 | |||
| 65 | |||
| 66 | /* vim: set cino= formatoptions=croql cindent shiftwidth=8 tabstop=8: */ | ||
| 67 | |||
diff --git a/drivers/media/video/pwc/pwc-if.c b/drivers/media/video/pwc/pwc-if.c index b0bde5a87c8a..51ca3589b1b5 100644 --- a/drivers/media/video/pwc/pwc-if.c +++ b/drivers/media/video/pwc/pwc-if.c | |||
| @@ -2,6 +2,7 @@ | |||
| 2 | USB and Video4Linux interface part. | 2 | USB and Video4Linux interface part. |
| 3 | (C) 1999-2004 Nemosoft Unv. | 3 | (C) 1999-2004 Nemosoft Unv. |
| 4 | (C) 2004-2006 Luc Saillard (luc@saillard.org) | 4 | (C) 2004-2006 Luc Saillard (luc@saillard.org) |
| 5 | (C) 2011 Hans de Goede <hdegoede@redhat.com> | ||
| 5 | 6 | ||
| 6 | NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx | 7 | NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx |
| 7 | driver and thus may have bugs that are not present in the original version. | 8 | driver and thus may have bugs that are not present in the original version. |
| @@ -74,7 +75,6 @@ | |||
| 74 | #include "pwc-timon.h" | 75 | #include "pwc-timon.h" |
| 75 | #include "pwc-dec23.h" | 76 | #include "pwc-dec23.h" |
| 76 | #include "pwc-dec1.h" | 77 | #include "pwc-dec1.h" |
| 77 | #include "pwc-uncompress.h" | ||
| 78 | 78 | ||
| 79 | /* Function prototypes and driver templates */ | 79 | /* Function prototypes and driver templates */ |
| 80 | 80 | ||
| @@ -116,6 +116,7 @@ MODULE_DEVICE_TABLE(usb, pwc_device_table); | |||
| 116 | 116 | ||
| 117 | static int usb_pwc_probe(struct usb_interface *intf, const struct usb_device_id *id); | 117 | static int usb_pwc_probe(struct usb_interface *intf, const struct usb_device_id *id); |
| 118 | static void usb_pwc_disconnect(struct usb_interface *intf); | 118 | static void usb_pwc_disconnect(struct usb_interface *intf); |
| 119 | static void pwc_isoc_cleanup(struct pwc_device *pdev); | ||
| 119 | 120 | ||
| 120 | static struct usb_driver pwc_driver = { | 121 | static struct usb_driver pwc_driver = { |
| 121 | .name = "Philips webcam", /* name */ | 122 | .name = "Philips webcam", /* name */ |
| @@ -127,14 +128,11 @@ static struct usb_driver pwc_driver = { | |||
| 127 | #define MAX_DEV_HINTS 20 | 128 | #define MAX_DEV_HINTS 20 |
| 128 | #define MAX_ISOC_ERRORS 20 | 129 | #define MAX_ISOC_ERRORS 20 |
| 129 | 130 | ||
| 130 | static int default_size = PSZ_QCIF; | ||
| 131 | static int default_fps = 10; | 131 | static int default_fps = 10; |
| 132 | static int default_fbufs = 3; /* Default number of frame buffers */ | ||
| 133 | int pwc_mbufs = 2; /* Default number of mmap() buffers */ | ||
| 134 | #ifdef CONFIG_USB_PWC_DEBUG | 132 | #ifdef CONFIG_USB_PWC_DEBUG |
| 135 | int pwc_trace = PWC_DEBUG_LEVEL; | 133 | int pwc_trace = PWC_DEBUG_LEVEL; |
| 136 | #endif | 134 | #endif |
| 137 | static int power_save; | 135 | static int power_save = -1; |
| 138 | static int led_on = 100, led_off; /* defaults to LED that is on while in use */ | 136 | static int led_on = 100, led_off; /* defaults to LED that is on while in use */ |
| 139 | static int pwc_preferred_compression = 1; /* 0..3 = uncompressed..high */ | 137 | static int pwc_preferred_compression = 1; /* 0..3 = uncompressed..high */ |
| 140 | static struct { | 138 | static struct { |
| @@ -173,389 +171,20 @@ static struct video_device pwc_template = { | |||
| 173 | /***************************************************************************/ | 171 | /***************************************************************************/ |
| 174 | /* Private functions */ | 172 | /* Private functions */ |
| 175 | 173 | ||
| 176 | /* Here we want the physical address of the memory. | 174 | struct pwc_frame_buf *pwc_get_next_fill_buf(struct pwc_device *pdev) |
| 177 | * This is used when initializing the contents of the area. | ||
| 178 | */ | ||
| 179 | |||
| 180 | |||
| 181 | |||
| 182 | static void *pwc_rvmalloc(unsigned long size) | ||
| 183 | { | ||
| 184 | void * mem; | ||
| 185 | unsigned long adr; | ||
| 186 | |||
| 187 | mem=vmalloc_32(size); | ||
| 188 | if (!mem) | ||
| 189 | return NULL; | ||
| 190 | |||
| 191 | memset(mem, 0, size); /* Clear the ram out, no junk to the user */ | ||
| 192 | adr=(unsigned long) mem; | ||
| 193 | while (size > 0) | ||
| 194 | { | ||
| 195 | SetPageReserved(vmalloc_to_page((void *)adr)); | ||
| 196 | adr += PAGE_SIZE; | ||
| 197 | size -= PAGE_SIZE; | ||
| 198 | } | ||
| 199 | return mem; | ||
| 200 | } | ||
| 201 | |||
| 202 | static void pwc_rvfree(void * mem, unsigned long size) | ||
| 203 | { | ||
| 204 | unsigned long adr; | ||
| 205 | |||
| 206 | if (!mem) | ||
| 207 | return; | ||
| 208 | |||
| 209 | adr=(unsigned long) mem; | ||
| 210 | while ((long) size > 0) | ||
| 211 | { | ||
| 212 | ClearPageReserved(vmalloc_to_page((void *)adr)); | ||
| 213 | adr += PAGE_SIZE; | ||
| 214 | size -= PAGE_SIZE; | ||
| 215 | } | ||
| 216 | vfree(mem); | ||
| 217 | } | ||
| 218 | |||
| 219 | |||
| 220 | |||
| 221 | |||
| 222 | static int pwc_allocate_buffers(struct pwc_device *pdev) | ||
| 223 | { | ||
| 224 | int i, err; | ||
| 225 | void *kbuf; | ||
| 226 | |||
| 227 | PWC_DEBUG_MEMORY(">> pwc_allocate_buffers(pdev = 0x%p)\n", pdev); | ||
| 228 | |||
| 229 | if (pdev == NULL) | ||
| 230 | return -ENXIO; | ||
| 231 | |||
| 232 | /* Allocate Isochronuous pipe buffers */ | ||
| 233 | for (i = 0; i < MAX_ISO_BUFS; i++) { | ||
| 234 | if (pdev->sbuf[i].data == NULL) { | ||
| 235 | kbuf = kzalloc(ISO_BUFFER_SIZE, GFP_KERNEL); | ||
| 236 | if (kbuf == NULL) { | ||
| 237 | PWC_ERROR("Failed to allocate iso buffer %d.\n", i); | ||
| 238 | return -ENOMEM; | ||
| 239 | } | ||
| 240 | PWC_DEBUG_MEMORY("Allocated iso buffer at %p.\n", kbuf); | ||
| 241 | pdev->sbuf[i].data = kbuf; | ||
| 242 | } | ||
| 243 | } | ||
| 244 | |||
| 245 | /* Allocate frame buffer structure */ | ||
| 246 | if (pdev->fbuf == NULL) { | ||
| 247 | kbuf = kzalloc(default_fbufs * sizeof(struct pwc_frame_buf), GFP_KERNEL); | ||
| 248 | if (kbuf == NULL) { | ||
| 249 | PWC_ERROR("Failed to allocate frame buffer structure.\n"); | ||
| 250 | return -ENOMEM; | ||
| 251 | } | ||
| 252 | PWC_DEBUG_MEMORY("Allocated frame buffer structure at %p.\n", kbuf); | ||
| 253 | pdev->fbuf = kbuf; | ||
| 254 | } | ||
| 255 | |||
| 256 | /* create frame buffers, and make circular ring */ | ||
| 257 | for (i = 0; i < default_fbufs; i++) { | ||
| 258 | if (pdev->fbuf[i].data == NULL) { | ||
| 259 | kbuf = vzalloc(PWC_FRAME_SIZE); /* need vmalloc since frame buffer > 128K */ | ||
| 260 | if (kbuf == NULL) { | ||
| 261 | PWC_ERROR("Failed to allocate frame buffer %d.\n", i); | ||
| 262 | return -ENOMEM; | ||
| 263 | } | ||
| 264 | PWC_DEBUG_MEMORY("Allocated frame buffer %d at %p.\n", i, kbuf); | ||
| 265 | pdev->fbuf[i].data = kbuf; | ||
| 266 | } | ||
| 267 | } | ||
| 268 | |||
| 269 | /* Allocate decompressor table space */ | ||
| 270 | if (DEVICE_USE_CODEC1(pdev->type)) | ||
| 271 | err = pwc_dec1_alloc(pdev); | ||
| 272 | else | ||
| 273 | err = pwc_dec23_alloc(pdev); | ||
| 274 | |||
| 275 | if (err) { | ||
| 276 | PWC_ERROR("Failed to allocate decompress table.\n"); | ||
| 277 | return err; | ||
| 278 | } | ||
| 279 | |||
| 280 | /* Allocate image buffer; double buffer for mmap() */ | ||
| 281 | kbuf = pwc_rvmalloc(pwc_mbufs * pdev->len_per_image); | ||
| 282 | if (kbuf == NULL) { | ||
| 283 | PWC_ERROR("Failed to allocate image buffer(s). needed (%d)\n", | ||
| 284 | pwc_mbufs * pdev->len_per_image); | ||
| 285 | return -ENOMEM; | ||
| 286 | } | ||
| 287 | PWC_DEBUG_MEMORY("Allocated image buffer at %p.\n", kbuf); | ||
| 288 | pdev->image_data = kbuf; | ||
| 289 | for (i = 0; i < pwc_mbufs; i++) { | ||
| 290 | pdev->images[i].offset = i * pdev->len_per_image; | ||
| 291 | pdev->images[i].vma_use_count = 0; | ||
| 292 | } | ||
| 293 | for (; i < MAX_IMAGES; i++) { | ||
| 294 | pdev->images[i].offset = 0; | ||
| 295 | } | ||
| 296 | |||
| 297 | kbuf = NULL; | ||
| 298 | |||
| 299 | PWC_DEBUG_MEMORY("<< pwc_allocate_buffers()\n"); | ||
| 300 | return 0; | ||
| 301 | } | ||
| 302 | |||
| 303 | static void pwc_free_buffers(struct pwc_device *pdev) | ||
| 304 | { | ||
| 305 | int i; | ||
| 306 | |||
| 307 | PWC_DEBUG_MEMORY("Entering free_buffers(%p).\n", pdev); | ||
| 308 | |||
| 309 | if (pdev == NULL) | ||
| 310 | return; | ||
| 311 | /* Release Iso-pipe buffers */ | ||
| 312 | for (i = 0; i < MAX_ISO_BUFS; i++) | ||
| 313 | if (pdev->sbuf[i].data != NULL) { | ||
| 314 | PWC_DEBUG_MEMORY("Freeing ISO buffer at %p.\n", pdev->sbuf[i].data); | ||
| 315 | kfree(pdev->sbuf[i].data); | ||
| 316 | pdev->sbuf[i].data = NULL; | ||
| 317 | } | ||
| 318 | |||
| 319 | /* The same for frame buffers */ | ||
| 320 | if (pdev->fbuf != NULL) { | ||
| 321 | for (i = 0; i < default_fbufs; i++) { | ||
| 322 | if (pdev->fbuf[i].data != NULL) { | ||
| 323 | PWC_DEBUG_MEMORY("Freeing frame buffer %d at %p.\n", i, pdev->fbuf[i].data); | ||
| 324 | vfree(pdev->fbuf[i].data); | ||
| 325 | pdev->fbuf[i].data = NULL; | ||
| 326 | } | ||
| 327 | } | ||
| 328 | kfree(pdev->fbuf); | ||
| 329 | pdev->fbuf = NULL; | ||
| 330 | } | ||
| 331 | |||
| 332 | /* Intermediate decompression buffer & tables */ | ||
| 333 | if (pdev->decompress_data != NULL) { | ||
| 334 | PWC_DEBUG_MEMORY("Freeing decompression buffer at %p.\n", pdev->decompress_data); | ||
| 335 | kfree(pdev->decompress_data); | ||
| 336 | pdev->decompress_data = NULL; | ||
| 337 | } | ||
| 338 | |||
| 339 | /* Release image buffers */ | ||
| 340 | if (pdev->image_data != NULL) { | ||
| 341 | PWC_DEBUG_MEMORY("Freeing image buffer at %p.\n", pdev->image_data); | ||
| 342 | pwc_rvfree(pdev->image_data, pwc_mbufs * pdev->len_per_image); | ||
| 343 | } | ||
| 344 | pdev->image_data = NULL; | ||
| 345 | |||
| 346 | PWC_DEBUG_MEMORY("Leaving free_buffers().\n"); | ||
| 347 | } | ||
| 348 | |||
| 349 | /* The frame & image buffer mess. | ||
| 350 | |||
| 351 | Yes, this is a mess. Well, it used to be simple, but alas... In this | ||
| 352 | module, 3 buffers schemes are used to get the data from the USB bus to | ||
| 353 | the user program. The first scheme involves the ISO buffers (called thus | ||
| 354 | since they transport ISO data from the USB controller), and not really | ||
| 355 | interesting. Suffices to say the data from this buffer is quickly | ||
| 356 | gathered in an interrupt handler (pwc_isoc_handler) and placed into the | ||
| 357 | frame buffer. | ||
| 358 | |||
| 359 | The frame buffer is the second scheme, and is the central element here. | ||
| 360 | It collects the data from a single frame from the camera (hence, the | ||
| 361 | name). Frames are delimited by the USB camera with a short USB packet, | ||
| 362 | so that's easy to detect. The frame buffers form a list that is filled | ||
| 363 | by the camera+USB controller and drained by the user process through | ||
| 364 | either read() or mmap(). | ||
| 365 | |||
| 366 | The image buffer is the third scheme, in which frames are decompressed | ||
| 367 | and converted into planar format. For mmap() there is more than | ||
| 368 | one image buffer available. | ||
| 369 | |||
| 370 | The frame buffers provide the image buffering. In case the user process | ||
| 371 | is a bit slow, this introduces lag and some undesired side-effects. | ||
| 372 | The problem arises when the frame buffer is full. I used to drop the last | ||
| 373 | frame, which makes the data in the queue stale very quickly. But dropping | ||
| 374 | the frame at the head of the queue proved to be a litte bit more difficult. | ||
| 375 | I tried a circular linked scheme, but this introduced more problems than | ||
| 376 | it solved. | ||
| 377 | |||
| 378 | Because filling and draining are completely asynchronous processes, this | ||
| 379 | requires some fiddling with pointers and mutexes. | ||
| 380 | |||
| 381 | Eventually, I came up with a system with 2 lists: an 'empty' frame list | ||
| 382 | and a 'full' frame list: | ||
| 383 | * Initially, all frame buffers but one are on the 'empty' list; the one | ||
| 384 | remaining buffer is our initial fill frame. | ||
| 385 | * If a frame is needed for filling, we try to take it from the 'empty' | ||
| 386 | list, unless that list is empty, in which case we take the buffer at | ||
| 387 | the head of the 'full' list. | ||
| 388 | * When our fill buffer has been filled, it is appended to the 'full' | ||
| 389 | list. | ||
| 390 | * If a frame is needed by read() or mmap(), it is taken from the head of | ||
| 391 | the 'full' list, handled, and then appended to the 'empty' list. If no | ||
| 392 | buffer is present on the 'full' list, we wait. | ||
| 393 | The advantage is that the buffer that is currently being decompressed/ | ||
| 394 | converted, is on neither list, and thus not in our way (any other scheme | ||
| 395 | I tried had the problem of old data lingering in the queue). | ||
| 396 | |||
| 397 | Whatever strategy you choose, it always remains a tradeoff: with more | ||
| 398 | frame buffers the chances of a missed frame are reduced. On the other | ||
| 399 | hand, on slower machines it introduces lag because the queue will | ||
| 400 | always be full. | ||
| 401 | */ | ||
| 402 | |||
| 403 | /** | ||
| 404 | \brief Find next frame buffer to fill. Take from empty or full list, whichever comes first. | ||
| 405 | */ | ||
| 406 | static int pwc_next_fill_frame(struct pwc_device *pdev) | ||
| 407 | { | ||
| 408 | int ret; | ||
| 409 | unsigned long flags; | ||
| 410 | |||
| 411 | ret = 0; | ||
| 412 | spin_lock_irqsave(&pdev->ptrlock, flags); | ||
| 413 | if (pdev->fill_frame != NULL) { | ||
| 414 | /* append to 'full' list */ | ||
| 415 | if (pdev->full_frames == NULL) { | ||
| 416 | pdev->full_frames = pdev->fill_frame; | ||
| 417 | pdev->full_frames_tail = pdev->full_frames; | ||
| 418 | } | ||
| 419 | else { | ||
| 420 | pdev->full_frames_tail->next = pdev->fill_frame; | ||
| 421 | pdev->full_frames_tail = pdev->fill_frame; | ||
| 422 | } | ||
| 423 | } | ||
| 424 | if (pdev->empty_frames != NULL) { | ||
| 425 | /* We have empty frames available. That's easy */ | ||
| 426 | pdev->fill_frame = pdev->empty_frames; | ||
| 427 | pdev->empty_frames = pdev->empty_frames->next; | ||
| 428 | } | ||
| 429 | else { | ||
| 430 | /* Hmm. Take it from the full list */ | ||
| 431 | /* sanity check */ | ||
| 432 | if (pdev->full_frames == NULL) { | ||
| 433 | PWC_ERROR("Neither empty or full frames available!\n"); | ||
| 434 | spin_unlock_irqrestore(&pdev->ptrlock, flags); | ||
| 435 | return -EINVAL; | ||
| 436 | } | ||
| 437 | pdev->fill_frame = pdev->full_frames; | ||
| 438 | pdev->full_frames = pdev->full_frames->next; | ||
| 439 | ret = 1; | ||
| 440 | } | ||
| 441 | pdev->fill_frame->next = NULL; | ||
| 442 | spin_unlock_irqrestore(&pdev->ptrlock, flags); | ||
| 443 | return ret; | ||
| 444 | } | ||
| 445 | |||
| 446 | |||
| 447 | /** | ||
| 448 | \brief Reset all buffers, pointers and lists, except for the image_used[] buffer. | ||
| 449 | |||
| 450 | If the image_used[] buffer is cleared too, mmap()/VIDIOCSYNC will run into trouble. | ||
| 451 | */ | ||
| 452 | static void pwc_reset_buffers(struct pwc_device *pdev) | ||
| 453 | { | ||
| 454 | int i; | ||
| 455 | unsigned long flags; | ||
| 456 | |||
| 457 | PWC_DEBUG_MEMORY(">> %s __enter__\n", __func__); | ||
| 458 | |||
| 459 | spin_lock_irqsave(&pdev->ptrlock, flags); | ||
| 460 | pdev->full_frames = NULL; | ||
| 461 | pdev->full_frames_tail = NULL; | ||
| 462 | for (i = 0; i < default_fbufs; i++) { | ||
| 463 | pdev->fbuf[i].filled = 0; | ||
| 464 | if (i > 0) | ||
| 465 | pdev->fbuf[i].next = &pdev->fbuf[i - 1]; | ||
| 466 | else | ||
| 467 | pdev->fbuf->next = NULL; | ||
| 468 | } | ||
| 469 | pdev->empty_frames = &pdev->fbuf[default_fbufs - 1]; | ||
| 470 | pdev->empty_frames_tail = pdev->fbuf; | ||
| 471 | pdev->read_frame = NULL; | ||
| 472 | pdev->fill_frame = pdev->empty_frames; | ||
| 473 | pdev->empty_frames = pdev->empty_frames->next; | ||
| 474 | |||
| 475 | pdev->image_read_pos = 0; | ||
| 476 | pdev->fill_image = 0; | ||
| 477 | spin_unlock_irqrestore(&pdev->ptrlock, flags); | ||
| 478 | |||
| 479 | PWC_DEBUG_MEMORY("<< %s __leaving__\n", __func__); | ||
| 480 | } | ||
| 481 | |||
| 482 | |||
| 483 | /** | ||
| 484 | \brief Do all the handling for getting one frame: get pointer, decompress, advance pointers. | ||
| 485 | */ | ||
| 486 | int pwc_handle_frame(struct pwc_device *pdev) | ||
| 487 | { | 175 | { |
| 488 | int ret = 0; | 176 | unsigned long flags = 0; |
| 489 | unsigned long flags; | 177 | struct pwc_frame_buf *buf = NULL; |
| 490 | 178 | ||
| 491 | spin_lock_irqsave(&pdev->ptrlock, flags); | 179 | spin_lock_irqsave(&pdev->queued_bufs_lock, flags); |
| 492 | /* First grab our read_frame; this is removed from all lists, so | 180 | if (list_empty(&pdev->queued_bufs)) |
| 493 | we can release the lock after this without problems */ | 181 | goto leave; |
| 494 | if (pdev->read_frame != NULL) { | 182 | |
| 495 | /* This can't theoretically happen */ | 183 | buf = list_entry(pdev->queued_bufs.next, struct pwc_frame_buf, list); |
| 496 | PWC_ERROR("Huh? Read frame still in use?\n"); | 184 | list_del(&buf->list); |
| 497 | spin_unlock_irqrestore(&pdev->ptrlock, flags); | 185 | leave: |
| 498 | return ret; | 186 | spin_unlock_irqrestore(&pdev->queued_bufs_lock, flags); |
| 499 | } | 187 | return buf; |
| 500 | |||
| 501 | |||
| 502 | if (pdev->full_frames == NULL) { | ||
| 503 | PWC_ERROR("Woops. No frames ready.\n"); | ||
| 504 | } | ||
| 505 | else { | ||
| 506 | pdev->read_frame = pdev->full_frames; | ||
| 507 | pdev->full_frames = pdev->full_frames->next; | ||
| 508 | pdev->read_frame->next = NULL; | ||
| 509 | } | ||
| 510 | |||
| 511 | if (pdev->read_frame != NULL) { | ||
| 512 | /* Decompression is a lengthy process, so it's outside of the lock. | ||
| 513 | This gives the isoc_handler the opportunity to fill more frames | ||
| 514 | in the mean time. | ||
| 515 | */ | ||
| 516 | spin_unlock_irqrestore(&pdev->ptrlock, flags); | ||
| 517 | ret = pwc_decompress(pdev); | ||
| 518 | spin_lock_irqsave(&pdev->ptrlock, flags); | ||
| 519 | |||
| 520 | /* We're done with read_buffer, tack it to the end of the empty buffer list */ | ||
| 521 | if (pdev->empty_frames == NULL) { | ||
| 522 | pdev->empty_frames = pdev->read_frame; | ||
| 523 | pdev->empty_frames_tail = pdev->empty_frames; | ||
| 524 | } | ||
| 525 | else { | ||
| 526 | pdev->empty_frames_tail->next = pdev->read_frame; | ||
| 527 | pdev->empty_frames_tail = pdev->read_frame; | ||
| 528 | } | ||
| 529 | pdev->read_frame = NULL; | ||
| 530 | } | ||
| 531 | spin_unlock_irqrestore(&pdev->ptrlock, flags); | ||
| 532 | return ret; | ||
| 533 | } | ||
| 534 | |||
| 535 | /** | ||
| 536 | \brief Advance pointers of image buffer (after each user request) | ||
| 537 | */ | ||
| 538 | void pwc_next_image(struct pwc_device *pdev) | ||
| 539 | { | ||
| 540 | pdev->image_used[pdev->fill_image] = 0; | ||
| 541 | pdev->fill_image = (pdev->fill_image + 1) % pwc_mbufs; | ||
| 542 | } | ||
| 543 | |||
| 544 | /** | ||
| 545 | * Print debug information when a frame is discarded because all of our buffer | ||
| 546 | * is full | ||
| 547 | */ | ||
| 548 | static void pwc_frame_dumped(struct pwc_device *pdev) | ||
| 549 | { | ||
| 550 | pdev->vframes_dumped++; | ||
| 551 | if (pdev->vframe_count < FRAME_LOWMARK) | ||
| 552 | return; | ||
| 553 | |||
| 554 | if (pdev->vframes_dumped < 20) | ||
| 555 | PWC_DEBUG_FLOW("Dumping frame %d\n", pdev->vframe_count); | ||
| 556 | else if (pdev->vframes_dumped == 20) | ||
| 557 | PWC_DEBUG_FLOW("Dumping frame %d (last message)\n", | ||
| 558 | pdev->vframe_count); | ||
| 559 | } | 188 | } |
| 560 | 189 | ||
| 561 | static void pwc_snapshot_button(struct pwc_device *pdev, int down) | 190 | static void pwc_snapshot_button(struct pwc_device *pdev, int down) |
| @@ -575,9 +204,9 @@ static void pwc_snapshot_button(struct pwc_device *pdev, int down) | |||
| 575 | #endif | 204 | #endif |
| 576 | } | 205 | } |
| 577 | 206 | ||
| 578 | static int pwc_rcv_short_packet(struct pwc_device *pdev, const struct pwc_frame_buf *fbuf) | 207 | static void pwc_frame_complete(struct pwc_device *pdev) |
| 579 | { | 208 | { |
| 580 | int awake = 0; | 209 | struct pwc_frame_buf *fbuf = pdev->fill_buf; |
| 581 | 210 | ||
| 582 | /* The ToUCam Fun CMOS sensor causes the firmware to send 2 or 3 bogus | 211 | /* The ToUCam Fun CMOS sensor causes the firmware to send 2 or 3 bogus |
| 583 | frames on the USB wire after an exposure change. This conditition is | 212 | frames on the USB wire after an exposure change. This conditition is |
| @@ -589,7 +218,6 @@ static int pwc_rcv_short_packet(struct pwc_device *pdev, const struct pwc_frame_ | |||
| 589 | if (ptr[1] == 1 && ptr[0] & 0x10) { | 218 | if (ptr[1] == 1 && ptr[0] & 0x10) { |
| 590 | PWC_TRACE("Hyundai CMOS sensor bug. Dropping frame.\n"); | 219 | PWC_TRACE("Hyundai CMOS sensor bug. Dropping frame.\n"); |
| 591 | pdev->drop_frames += 2; | 220 | pdev->drop_frames += 2; |
| 592 | pdev->vframes_error++; | ||
| 593 | } | 221 | } |
| 594 | if ((ptr[0] ^ pdev->vmirror) & 0x01) { | 222 | if ((ptr[0] ^ pdev->vmirror) & 0x01) { |
| 595 | pwc_snapshot_button(pdev, ptr[0] & 0x01); | 223 | pwc_snapshot_button(pdev, ptr[0] & 0x01); |
| @@ -612,8 +240,7 @@ static int pwc_rcv_short_packet(struct pwc_device *pdev, const struct pwc_frame_ | |||
| 612 | */ | 240 | */ |
| 613 | if (fbuf->filled == 4) | 241 | if (fbuf->filled == 4) |
| 614 | pdev->drop_frames++; | 242 | pdev->drop_frames++; |
| 615 | } | 243 | } else if (pdev->type == 740 || pdev->type == 720) { |
| 616 | else if (pdev->type == 740 || pdev->type == 720) { | ||
| 617 | unsigned char *ptr = (unsigned char *)fbuf->data; | 244 | unsigned char *ptr = (unsigned char *)fbuf->data; |
| 618 | if ((ptr[0] ^ pdev->vmirror) & 0x01) { | 245 | if ((ptr[0] ^ pdev->vmirror) & 0x01) { |
| 619 | pwc_snapshot_button(pdev, ptr[0] & 0x01); | 246 | pwc_snapshot_button(pdev, ptr[0] & 0x01); |
| @@ -621,33 +248,23 @@ static int pwc_rcv_short_packet(struct pwc_device *pdev, const struct pwc_frame_ | |||
| 621 | pdev->vmirror = ptr[0] & 0x03; | 248 | pdev->vmirror = ptr[0] & 0x03; |
| 622 | } | 249 | } |
| 623 | 250 | ||
| 624 | /* In case we were instructed to drop the frame, do so silently. | 251 | /* In case we were instructed to drop the frame, do so silently. */ |
| 625 | The buffer pointers are not updated either (but the counters are reset below). | 252 | if (pdev->drop_frames > 0) { |
| 626 | */ | ||
| 627 | if (pdev->drop_frames > 0) | ||
| 628 | pdev->drop_frames--; | 253 | pdev->drop_frames--; |
| 629 | else { | 254 | } else { |
| 630 | /* Check for underflow first */ | 255 | /* Check for underflow first */ |
| 631 | if (fbuf->filled < pdev->frame_total_size) { | 256 | if (fbuf->filled < pdev->frame_total_size) { |
| 632 | PWC_DEBUG_FLOW("Frame buffer underflow (%d bytes);" | 257 | PWC_DEBUG_FLOW("Frame buffer underflow (%d bytes);" |
| 633 | " discarded.\n", fbuf->filled); | 258 | " discarded.\n", fbuf->filled); |
| 634 | pdev->vframes_error++; | 259 | } else { |
| 635 | } | 260 | fbuf->vb.v4l2_buf.field = V4L2_FIELD_NONE; |
| 636 | else { | 261 | fbuf->vb.v4l2_buf.sequence = pdev->vframe_count; |
| 637 | /* Send only once per EOF */ | 262 | vb2_buffer_done(&fbuf->vb, VB2_BUF_STATE_DONE); |
| 638 | awake = 1; /* delay wake_ups */ | 263 | pdev->fill_buf = NULL; |
| 639 | 264 | pdev->vsync = 0; | |
| 640 | /* Find our next frame to fill. This will always succeed, since we | ||
| 641 | * nick a frame from either empty or full list, but if we had to | ||
| 642 | * take it from the full list, it means a frame got dropped. | ||
| 643 | */ | ||
| 644 | if (pwc_next_fill_frame(pdev)) | ||
| 645 | pwc_frame_dumped(pdev); | ||
| 646 | |||
| 647 | } | 265 | } |
| 648 | } /* !drop_frames */ | 266 | } /* !drop_frames */ |
| 649 | pdev->vframe_count++; | 267 | pdev->vframe_count++; |
| 650 | return awake; | ||
| 651 | } | 268 | } |
| 652 | 269 | ||
| 653 | /* This gets called for the Isochronous pipe (video). This is done in | 270 | /* This gets called for the Isochronous pipe (video). This is done in |
| @@ -655,24 +272,20 @@ static int pwc_rcv_short_packet(struct pwc_device *pdev, const struct pwc_frame_ | |||
| 655 | */ | 272 | */ |
| 656 | static void pwc_isoc_handler(struct urb *urb) | 273 | static void pwc_isoc_handler(struct urb *urb) |
| 657 | { | 274 | { |
| 658 | struct pwc_device *pdev; | 275 | struct pwc_device *pdev = (struct pwc_device *)urb->context; |
| 659 | int i, fst, flen; | 276 | int i, fst, flen; |
| 660 | int awake; | 277 | unsigned char *iso_buf = NULL; |
| 661 | struct pwc_frame_buf *fbuf; | ||
| 662 | unsigned char *fillptr = NULL, *iso_buf = NULL; | ||
| 663 | 278 | ||
| 664 | awake = 0; | 279 | if (urb->status == -ENOENT || urb->status == -ECONNRESET || |
| 665 | pdev = (struct pwc_device *)urb->context; | 280 | urb->status == -ESHUTDOWN) { |
| 666 | if (pdev == NULL) { | ||
| 667 | PWC_ERROR("isoc_handler() called with NULL device?!\n"); | ||
| 668 | return; | ||
| 669 | } | ||
| 670 | |||
| 671 | if (urb->status == -ENOENT || urb->status == -ECONNRESET) { | ||
| 672 | PWC_DEBUG_OPEN("URB (%p) unlinked %ssynchronuously.\n", urb, urb->status == -ENOENT ? "" : "a"); | 281 | PWC_DEBUG_OPEN("URB (%p) unlinked %ssynchronuously.\n", urb, urb->status == -ENOENT ? "" : "a"); |
| 673 | return; | 282 | return; |
| 674 | } | 283 | } |
| 675 | if (urb->status != -EINPROGRESS && urb->status != 0) { | 284 | |
| 285 | if (pdev->fill_buf == NULL) | ||
| 286 | pdev->fill_buf = pwc_get_next_fill_buf(pdev); | ||
| 287 | |||
| 288 | if (urb->status != 0) { | ||
| 676 | const char *errmsg; | 289 | const char *errmsg; |
| 677 | 290 | ||
| 678 | errmsg = "Unknown"; | 291 | errmsg = "Unknown"; |
| @@ -684,29 +297,21 @@ static void pwc_isoc_handler(struct urb *urb) | |||
| 684 | case -EILSEQ: errmsg = "CRC/Timeout (could be anything)"; break; | 297 | case -EILSEQ: errmsg = "CRC/Timeout (could be anything)"; break; |
| 685 | case -ETIME: errmsg = "Device does not respond"; break; | 298 | case -ETIME: errmsg = "Device does not respond"; break; |
| 686 | } | 299 | } |
| 687 | PWC_DEBUG_FLOW("pwc_isoc_handler() called with status %d [%s].\n", urb->status, errmsg); | 300 | PWC_ERROR("pwc_isoc_handler() called with status %d [%s].\n", |
| 688 | /* Give up after a number of contiguous errors on the USB bus. | 301 | urb->status, errmsg); |
| 689 | Appearantly something is wrong so we simulate an unplug event. | 302 | /* Give up after a number of contiguous errors */ |
| 690 | */ | ||
| 691 | if (++pdev->visoc_errors > MAX_ISOC_ERRORS) | 303 | if (++pdev->visoc_errors > MAX_ISOC_ERRORS) |
| 692 | { | 304 | { |
| 693 | PWC_INFO("Too many ISOC errors, bailing out.\n"); | 305 | PWC_ERROR("Too many ISOC errors, bailing out.\n"); |
| 694 | pdev->error_status = EIO; | 306 | if (pdev->fill_buf) { |
| 695 | awake = 1; | 307 | vb2_buffer_done(&pdev->fill_buf->vb, |
| 696 | wake_up_interruptible(&pdev->frameq); | 308 | VB2_BUF_STATE_ERROR); |
| 309 | pdev->fill_buf = NULL; | ||
| 310 | } | ||
| 697 | } | 311 | } |
| 698 | goto handler_end; // ugly, but practical | 312 | pdev->vsync = 0; /* Drop the current frame */ |
| 699 | } | ||
| 700 | |||
| 701 | fbuf = pdev->fill_frame; | ||
| 702 | if (fbuf == NULL) { | ||
| 703 | PWC_ERROR("pwc_isoc_handler without valid fill frame.\n"); | ||
| 704 | awake = 1; | ||
| 705 | goto handler_end; | 313 | goto handler_end; |
| 706 | } | 314 | } |
| 707 | else { | ||
| 708 | fillptr = fbuf->data + fbuf->filled; | ||
| 709 | } | ||
| 710 | 315 | ||
| 711 | /* Reset ISOC error counter. We did get here, after all. */ | 316 | /* Reset ISOC error counter. We did get here, after all. */ |
| 712 | pdev->visoc_errors = 0; | 317 | pdev->visoc_errors = 0; |
| @@ -720,89 +325,73 @@ static void pwc_isoc_handler(struct urb *urb) | |||
| 720 | fst = urb->iso_frame_desc[i].status; | 325 | fst = urb->iso_frame_desc[i].status; |
| 721 | flen = urb->iso_frame_desc[i].actual_length; | 326 | flen = urb->iso_frame_desc[i].actual_length; |
| 722 | iso_buf = urb->transfer_buffer + urb->iso_frame_desc[i].offset; | 327 | iso_buf = urb->transfer_buffer + urb->iso_frame_desc[i].offset; |
| 723 | if (fst == 0) { | 328 | if (fst != 0) { |
| 724 | if (flen > 0) { /* if valid data... */ | 329 | PWC_ERROR("Iso frame %d has error %d\n", i, fst); |
| 725 | if (pdev->vsync > 0) { /* ...and we are not sync-hunting... */ | 330 | continue; |
| 726 | pdev->vsync = 2; | 331 | } |
| 727 | 332 | if (flen > 0 && pdev->vsync) { | |
| 728 | /* ...copy data to frame buffer, if possible */ | 333 | struct pwc_frame_buf *fbuf = pdev->fill_buf; |
| 729 | if (flen + fbuf->filled > pdev->frame_total_size) { | 334 | |
| 730 | PWC_DEBUG_FLOW("Frame buffer overflow (flen = %d, frame_total_size = %d).\n", flen, pdev->frame_total_size); | 335 | if (pdev->vsync == 1) { |
| 731 | pdev->vsync = 0; /* Hmm, let's wait for an EOF (end-of-frame) */ | 336 | do_gettimeofday(&fbuf->vb.v4l2_buf.timestamp); |
| 732 | pdev->vframes_error++; | 337 | pdev->vsync = 2; |
| 733 | } | 338 | } |
| 734 | else { | 339 | |
| 735 | memmove(fillptr, iso_buf, flen); | 340 | if (flen + fbuf->filled > pdev->frame_total_size) { |
| 736 | fillptr += flen; | 341 | PWC_ERROR("Frame overflow (%d > %d)\n", |
| 737 | } | 342 | flen + fbuf->filled, |
| 738 | } | 343 | pdev->frame_total_size); |
| 344 | pdev->vsync = 0; /* Let's wait for an EOF */ | ||
| 345 | } else { | ||
| 346 | memcpy(fbuf->data + fbuf->filled, iso_buf, | ||
| 347 | flen); | ||
| 739 | fbuf->filled += flen; | 348 | fbuf->filled += flen; |
| 740 | } /* ..flen > 0 */ | 349 | } |
| 741 | 350 | } | |
| 742 | if (flen < pdev->vlast_packet_size) { | 351 | if (flen < pdev->vlast_packet_size) { |
| 743 | /* Shorter packet... We probably have the end of an image-frame; | 352 | /* Shorter packet... end of frame */ |
| 744 | wake up read() process and let select()/poll() do something. | 353 | if (pdev->vsync == 2) |
| 745 | Decompression is done in user time over there. | 354 | pwc_frame_complete(pdev); |
| 746 | */ | 355 | if (pdev->fill_buf == NULL) |
| 747 | if (pdev->vsync == 2) { | 356 | pdev->fill_buf = pwc_get_next_fill_buf(pdev); |
| 748 | if (pwc_rcv_short_packet(pdev, fbuf)) { | 357 | if (pdev->fill_buf) { |
| 749 | awake = 1; | 358 | pdev->fill_buf->filled = 0; |
| 750 | fbuf = pdev->fill_frame; | ||
| 751 | } | ||
| 752 | } | ||
| 753 | fbuf->filled = 0; | ||
| 754 | fillptr = fbuf->data; | ||
| 755 | pdev->vsync = 1; | 359 | pdev->vsync = 1; |
| 756 | } | 360 | } |
| 757 | |||
| 758 | pdev->vlast_packet_size = flen; | ||
| 759 | } /* ..status == 0 */ | ||
| 760 | else { | ||
| 761 | /* This is normally not interesting to the user, unless | ||
| 762 | * you are really debugging something, default = 0 */ | ||
| 763 | static int iso_error; | ||
| 764 | iso_error++; | ||
| 765 | if (iso_error < 20) | ||
| 766 | PWC_DEBUG_FLOW("Iso frame %d of USB has error %d\n", i, fst); | ||
| 767 | } | 361 | } |
| 362 | pdev->vlast_packet_size = flen; | ||
| 768 | } | 363 | } |
| 769 | 364 | ||
| 770 | handler_end: | 365 | handler_end: |
| 771 | if (awake) | ||
| 772 | wake_up_interruptible(&pdev->frameq); | ||
| 773 | |||
| 774 | urb->dev = pdev->udev; | ||
| 775 | i = usb_submit_urb(urb, GFP_ATOMIC); | 366 | i = usb_submit_urb(urb, GFP_ATOMIC); |
| 776 | if (i != 0) | 367 | if (i != 0) |
| 777 | PWC_ERROR("Error (%d) re-submitting urb in pwc_isoc_handler.\n", i); | 368 | PWC_ERROR("Error (%d) re-submitting urb in pwc_isoc_handler.\n", i); |
| 778 | } | 369 | } |
| 779 | 370 | ||
| 780 | 371 | static int pwc_isoc_init(struct pwc_device *pdev) | |
| 781 | int pwc_isoc_init(struct pwc_device *pdev) | ||
| 782 | { | 372 | { |
| 783 | struct usb_device *udev; | 373 | struct usb_device *udev; |
| 784 | struct urb *urb; | 374 | struct urb *urb; |
| 785 | int i, j, ret; | 375 | int i, j, ret; |
| 786 | |||
| 787 | struct usb_interface *intf; | 376 | struct usb_interface *intf; |
| 788 | struct usb_host_interface *idesc = NULL; | 377 | struct usb_host_interface *idesc = NULL; |
| 789 | 378 | ||
| 790 | if (pdev == NULL) | ||
| 791 | return -EFAULT; | ||
| 792 | if (pdev->iso_init) | 379 | if (pdev->iso_init) |
| 793 | return 0; | 380 | return 0; |
| 381 | |||
| 794 | pdev->vsync = 0; | 382 | pdev->vsync = 0; |
| 383 | pdev->vlast_packet_size = 0; | ||
| 384 | pdev->fill_buf = NULL; | ||
| 385 | pdev->vframe_count = 0; | ||
| 386 | pdev->visoc_errors = 0; | ||
| 795 | udev = pdev->udev; | 387 | udev = pdev->udev; |
| 796 | 388 | ||
| 797 | /* Get the current alternate interface, adjust packet size */ | 389 | /* Get the current alternate interface, adjust packet size */ |
| 798 | if (!udev->actconfig) | ||
| 799 | return -EFAULT; | ||
| 800 | intf = usb_ifnum_to_if(udev, 0); | 390 | intf = usb_ifnum_to_if(udev, 0); |
| 801 | if (intf) | 391 | if (intf) |
| 802 | idesc = usb_altnum_to_altsetting(intf, pdev->valternate); | 392 | idesc = usb_altnum_to_altsetting(intf, pdev->valternate); |
| 803 | |||
| 804 | if (!idesc) | 393 | if (!idesc) |
| 805 | return -EFAULT; | 394 | return -EIO; |
| 806 | 395 | ||
| 807 | /* Search video endpoint */ | 396 | /* Search video endpoint */ |
| 808 | pdev->vmax_packet_size = -1; | 397 | pdev->vmax_packet_size = -1; |
| @@ -825,34 +414,32 @@ int pwc_isoc_init(struct pwc_device *pdev) | |||
| 825 | if (ret < 0) | 414 | if (ret < 0) |
| 826 | return ret; | 415 | return ret; |
| 827 | 416 | ||
| 417 | /* Allocate and init Isochronuous urbs */ | ||
| 828 | for (i = 0; i < MAX_ISO_BUFS; i++) { | 418 | for (i = 0; i < MAX_ISO_BUFS; i++) { |
| 829 | urb = usb_alloc_urb(ISO_FRAMES_PER_DESC, GFP_KERNEL); | 419 | urb = usb_alloc_urb(ISO_FRAMES_PER_DESC, GFP_KERNEL); |
| 830 | if (urb == NULL) { | 420 | if (urb == NULL) { |
| 831 | PWC_ERROR("Failed to allocate urb %d\n", i); | 421 | PWC_ERROR("Failed to allocate urb %d\n", i); |
| 832 | ret = -ENOMEM; | 422 | pdev->iso_init = 1; |
| 833 | break; | 423 | pwc_isoc_cleanup(pdev); |
| 424 | return -ENOMEM; | ||
| 834 | } | 425 | } |
| 835 | pdev->sbuf[i].urb = urb; | 426 | pdev->urbs[i] = urb; |
| 836 | PWC_DEBUG_MEMORY("Allocated URB at 0x%p\n", urb); | 427 | PWC_DEBUG_MEMORY("Allocated URB at 0x%p\n", urb); |
| 837 | } | ||
| 838 | if (ret) { | ||
| 839 | /* De-allocate in reverse order */ | ||
| 840 | while (i--) { | ||
| 841 | usb_free_urb(pdev->sbuf[i].urb); | ||
| 842 | pdev->sbuf[i].urb = NULL; | ||
| 843 | } | ||
| 844 | return ret; | ||
| 845 | } | ||
| 846 | |||
| 847 | /* init URB structure */ | ||
| 848 | for (i = 0; i < MAX_ISO_BUFS; i++) { | ||
| 849 | urb = pdev->sbuf[i].urb; | ||
| 850 | 428 | ||
| 851 | urb->interval = 1; // devik | 429 | urb->interval = 1; // devik |
| 852 | urb->dev = udev; | 430 | urb->dev = udev; |
| 853 | urb->pipe = usb_rcvisocpipe(udev, pdev->vendpoint); | 431 | urb->pipe = usb_rcvisocpipe(udev, pdev->vendpoint); |
| 854 | urb->transfer_flags = URB_ISO_ASAP; | 432 | urb->transfer_flags = URB_ISO_ASAP | URB_NO_TRANSFER_DMA_MAP; |
| 855 | urb->transfer_buffer = pdev->sbuf[i].data; | 433 | urb->transfer_buffer = usb_alloc_coherent(udev, |
| 434 | ISO_BUFFER_SIZE, | ||
| 435 | GFP_KERNEL, | ||
| 436 | &urb->transfer_dma); | ||
| 437 | if (urb->transfer_buffer == NULL) { | ||
| 438 | PWC_ERROR("Failed to allocate urb buffer %d\n", i); | ||
| 439 | pdev->iso_init = 1; | ||
| 440 | pwc_isoc_cleanup(pdev); | ||
| 441 | return -ENOMEM; | ||
| 442 | } | ||
| 856 | urb->transfer_buffer_length = ISO_BUFFER_SIZE; | 443 | urb->transfer_buffer_length = ISO_BUFFER_SIZE; |
| 857 | urb->complete = pwc_isoc_handler; | 444 | urb->complete = pwc_isoc_handler; |
| 858 | urb->context = pdev; | 445 | urb->context = pdev; |
| @@ -866,14 +453,14 @@ int pwc_isoc_init(struct pwc_device *pdev) | |||
| 866 | 453 | ||
| 867 | /* link */ | 454 | /* link */ |
| 868 | for (i = 0; i < MAX_ISO_BUFS; i++) { | 455 | for (i = 0; i < MAX_ISO_BUFS; i++) { |
| 869 | ret = usb_submit_urb(pdev->sbuf[i].urb, GFP_KERNEL); | 456 | ret = usb_submit_urb(pdev->urbs[i], GFP_KERNEL); |
| 870 | if (ret) { | 457 | if (ret) { |
| 871 | PWC_ERROR("isoc_init() submit_urb %d failed with error %d\n", i, ret); | 458 | PWC_ERROR("isoc_init() submit_urb %d failed with error %d\n", i, ret); |
| 872 | pdev->iso_init = 1; | 459 | pdev->iso_init = 1; |
| 873 | pwc_isoc_cleanup(pdev); | 460 | pwc_isoc_cleanup(pdev); |
| 874 | return ret; | 461 | return ret; |
| 875 | } | 462 | } |
| 876 | PWC_DEBUG_MEMORY("URB 0x%p submitted.\n", pdev->sbuf[i].urb); | 463 | PWC_DEBUG_MEMORY("URB 0x%p submitted.\n", pdev->urbs[i]); |
| 877 | } | 464 | } |
| 878 | 465 | ||
| 879 | /* All is done... */ | 466 | /* All is done... */ |
| @@ -888,12 +475,9 @@ static void pwc_iso_stop(struct pwc_device *pdev) | |||
| 888 | 475 | ||
| 889 | /* Unlinking ISOC buffers one by one */ | 476 | /* Unlinking ISOC buffers one by one */ |
| 890 | for (i = 0; i < MAX_ISO_BUFS; i++) { | 477 | for (i = 0; i < MAX_ISO_BUFS; i++) { |
| 891 | struct urb *urb; | 478 | if (pdev->urbs[i]) { |
| 892 | 479 | PWC_DEBUG_MEMORY("Unlinking URB %p\n", pdev->urbs[i]); | |
| 893 | urb = pdev->sbuf[i].urb; | 480 | usb_kill_urb(pdev->urbs[i]); |
| 894 | if (urb) { | ||
| 895 | PWC_DEBUG_MEMORY("Unlinking URB %p\n", urb); | ||
| 896 | usb_kill_urb(urb); | ||
| 897 | } | 481 | } |
| 898 | } | 482 | } |
| 899 | } | 483 | } |
| @@ -904,40 +488,51 @@ static void pwc_iso_free(struct pwc_device *pdev) | |||
| 904 | 488 | ||
| 905 | /* Freeing ISOC buffers one by one */ | 489 | /* Freeing ISOC buffers one by one */ |
| 906 | for (i = 0; i < MAX_ISO_BUFS; i++) { | 490 | for (i = 0; i < MAX_ISO_BUFS; i++) { |
| 907 | struct urb *urb; | 491 | if (pdev->urbs[i]) { |
| 908 | |||
| 909 | urb = pdev->sbuf[i].urb; | ||
| 910 | if (urb) { | ||
| 911 | PWC_DEBUG_MEMORY("Freeing URB\n"); | 492 | PWC_DEBUG_MEMORY("Freeing URB\n"); |
| 912 | usb_free_urb(urb); | 493 | if (pdev->urbs[i]->transfer_buffer) { |
| 913 | pdev->sbuf[i].urb = NULL; | 494 | usb_free_coherent(pdev->udev, |
| 495 | pdev->urbs[i]->transfer_buffer_length, | ||
| 496 | pdev->urbs[i]->transfer_buffer, | ||
| 497 | pdev->urbs[i]->transfer_dma); | ||
| 498 | } | ||
| 499 | usb_free_urb(pdev->urbs[i]); | ||
| 500 | pdev->urbs[i] = NULL; | ||
| 914 | } | 501 | } |
| 915 | } | 502 | } |
| 916 | } | 503 | } |
| 917 | 504 | ||
| 918 | void pwc_isoc_cleanup(struct pwc_device *pdev) | 505 | static void pwc_isoc_cleanup(struct pwc_device *pdev) |
| 919 | { | 506 | { |
| 920 | PWC_DEBUG_OPEN(">> pwc_isoc_cleanup()\n"); | 507 | PWC_DEBUG_OPEN(">> pwc_isoc_cleanup()\n"); |
| 921 | if (pdev == NULL) | 508 | |
| 922 | return; | ||
| 923 | if (pdev->iso_init == 0) | 509 | if (pdev->iso_init == 0) |
| 924 | return; | 510 | return; |
| 925 | 511 | ||
| 926 | pwc_iso_stop(pdev); | 512 | pwc_iso_stop(pdev); |
| 927 | pwc_iso_free(pdev); | 513 | pwc_iso_free(pdev); |
| 928 | 514 | usb_set_interface(pdev->udev, 0, 0); | |
| 929 | /* Stop camera, but only if we are sure the camera is still there (unplug | ||
| 930 | is signalled by EPIPE) | ||
| 931 | */ | ||
| 932 | if (pdev->error_status != EPIPE) { | ||
| 933 | PWC_DEBUG_OPEN("Setting alternate interface 0.\n"); | ||
| 934 | usb_set_interface(pdev->udev, 0, 0); | ||
| 935 | } | ||
| 936 | 515 | ||
| 937 | pdev->iso_init = 0; | 516 | pdev->iso_init = 0; |
| 938 | PWC_DEBUG_OPEN("<< pwc_isoc_cleanup()\n"); | 517 | PWC_DEBUG_OPEN("<< pwc_isoc_cleanup()\n"); |
| 939 | } | 518 | } |
| 940 | 519 | ||
| 520 | /* | ||
| 521 | * Release all queued buffers, no need to take queued_bufs_lock, since all | ||
| 522 | * iso urbs have been killed when we're called so pwc_isoc_handler won't run. | ||
| 523 | */ | ||
| 524 | static void pwc_cleanup_queued_bufs(struct pwc_device *pdev) | ||
| 525 | { | ||
| 526 | while (!list_empty(&pdev->queued_bufs)) { | ||
| 527 | struct pwc_frame_buf *buf; | ||
| 528 | |||
| 529 | buf = list_entry(pdev->queued_bufs.next, struct pwc_frame_buf, | ||
| 530 | list); | ||
| 531 | list_del(&buf->list); | ||
| 532 | vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR); | ||
| 533 | } | ||
| 534 | } | ||
| 535 | |||
| 941 | /********* | 536 | /********* |
| 942 | * sysfs | 537 | * sysfs |
| 943 | *********/ | 538 | *********/ |
| @@ -1051,98 +646,15 @@ static const char *pwc_sensor_type_to_string(unsigned int sensor_type) | |||
| 1051 | 646 | ||
| 1052 | static int pwc_video_open(struct file *file) | 647 | static int pwc_video_open(struct file *file) |
| 1053 | { | 648 | { |
| 1054 | int i, ret; | ||
| 1055 | struct video_device *vdev = video_devdata(file); | 649 | struct video_device *vdev = video_devdata(file); |
| 1056 | struct pwc_device *pdev; | 650 | struct pwc_device *pdev; |
| 1057 | 651 | ||
| 1058 | PWC_DEBUG_OPEN(">> video_open called(vdev = 0x%p).\n", vdev); | 652 | PWC_DEBUG_OPEN(">> video_open called(vdev = 0x%p).\n", vdev); |
| 1059 | 653 | ||
| 1060 | pdev = video_get_drvdata(vdev); | 654 | pdev = video_get_drvdata(vdev); |
| 1061 | BUG_ON(!pdev); | 655 | if (!pdev->udev) |
| 1062 | if (pdev->vopen) { | 656 | return -ENODEV; |
| 1063 | PWC_DEBUG_OPEN("I'm busy, someone is using the device.\n"); | ||
| 1064 | return -EBUSY; | ||
| 1065 | } | ||
| 1066 | |||
| 1067 | pwc_construct(pdev); /* set min/max sizes correct */ | ||
| 1068 | if (!pdev->usb_init) { | ||
| 1069 | PWC_DEBUG_OPEN("Doing first time initialization.\n"); | ||
| 1070 | pdev->usb_init = 1; | ||
| 1071 | |||
| 1072 | /* Query sensor type */ | ||
| 1073 | ret = pwc_get_cmos_sensor(pdev, &i); | ||
| 1074 | if (ret >= 0) | ||
| 1075 | { | ||
| 1076 | PWC_DEBUG_OPEN("This %s camera is equipped with a %s (%d).\n", | ||
| 1077 | pdev->vdev.name, | ||
| 1078 | pwc_sensor_type_to_string(i), i); | ||
| 1079 | } | ||
| 1080 | } | ||
| 1081 | |||
| 1082 | /* Turn on camera */ | ||
| 1083 | if (power_save) { | ||
| 1084 | i = pwc_camera_power(pdev, 1); | ||
| 1085 | if (i < 0) | ||
| 1086 | PWC_DEBUG_OPEN("Failed to restore power to the camera! (%d)\n", i); | ||
| 1087 | } | ||
| 1088 | /* Set LED on/off time */ | ||
| 1089 | if (pwc_set_leds(pdev, led_on, led_off) < 0) | ||
| 1090 | PWC_DEBUG_OPEN("Failed to set LED on/off time.\n"); | ||
| 1091 | |||
| 1092 | |||
| 1093 | /* So far, so good. Allocate memory. */ | ||
| 1094 | i = pwc_allocate_buffers(pdev); | ||
| 1095 | if (i < 0) { | ||
| 1096 | PWC_DEBUG_OPEN("Failed to allocate buffers memory.\n"); | ||
| 1097 | pwc_free_buffers(pdev); | ||
| 1098 | return i; | ||
| 1099 | } | ||
| 1100 | |||
| 1101 | /* Reset buffers & parameters */ | ||
| 1102 | pwc_reset_buffers(pdev); | ||
| 1103 | for (i = 0; i < pwc_mbufs; i++) | ||
| 1104 | pdev->image_used[i] = 0; | ||
| 1105 | pdev->vframe_count = 0; | ||
| 1106 | pdev->vframes_dumped = 0; | ||
| 1107 | pdev->vframes_error = 0; | ||
| 1108 | pdev->visoc_errors = 0; | ||
| 1109 | pdev->error_status = 0; | ||
| 1110 | pwc_construct(pdev); /* set min/max sizes correct */ | ||
| 1111 | |||
| 1112 | /* Set some defaults */ | ||
| 1113 | pdev->vsnapshot = 0; | ||
| 1114 | |||
| 1115 | /* Set video size, first try the last used video size | ||
| 1116 | (or the default one); if that fails try QCIF/10 or QSIF/10; | ||
| 1117 | it that fails too, give up. | ||
| 1118 | */ | ||
| 1119 | i = pwc_set_video_mode(pdev, pwc_image_sizes[pdev->vsize].x, pwc_image_sizes[pdev->vsize].y, pdev->vframes, pdev->vcompression, 0); | ||
| 1120 | if (i) { | ||
| 1121 | unsigned int default_resolution; | ||
| 1122 | PWC_DEBUG_OPEN("First attempt at set_video_mode failed.\n"); | ||
| 1123 | if (pdev->type>= 730) | ||
| 1124 | default_resolution = PSZ_QSIF; | ||
| 1125 | else | ||
| 1126 | default_resolution = PSZ_QCIF; | ||
| 1127 | |||
| 1128 | i = pwc_set_video_mode(pdev, | ||
| 1129 | pwc_image_sizes[default_resolution].x, | ||
| 1130 | pwc_image_sizes[default_resolution].y, | ||
| 1131 | 10, | ||
| 1132 | pdev->vcompression, | ||
| 1133 | 0); | ||
| 1134 | } | ||
| 1135 | if (i) { | ||
| 1136 | PWC_DEBUG_OPEN("Second attempt at set_video_mode failed.\n"); | ||
| 1137 | pwc_free_buffers(pdev); | ||
| 1138 | return i; | ||
| 1139 | } | ||
| 1140 | |||
| 1141 | /* Initialize the webcam to sane value */ | ||
| 1142 | pwc_set_brightness(pdev, 0x7fff); | ||
| 1143 | pwc_set_agc(pdev, 1, 0); | ||
| 1144 | 657 | ||
| 1145 | pdev->vopen++; | ||
| 1146 | file->private_data = vdev; | 658 | file->private_data = vdev; |
| 1147 | PWC_DEBUG_OPEN("<< video_open() returns 0.\n"); | 659 | PWC_DEBUG_OPEN("<< video_open() returns 0.\n"); |
| 1148 | return 0; | 660 | return 0; |
| @@ -1158,239 +670,211 @@ static void pwc_video_release(struct video_device *vfd) | |||
| 1158 | if (device_hint[hint].pdev == pdev) | 670 | if (device_hint[hint].pdev == pdev) |
| 1159 | device_hint[hint].pdev = NULL; | 671 | device_hint[hint].pdev = NULL; |
| 1160 | 672 | ||
| 673 | /* Free intermediate decompression buffer & tables */ | ||
| 674 | if (pdev->decompress_data != NULL) { | ||
| 675 | PWC_DEBUG_MEMORY("Freeing decompression buffer at %p.\n", | ||
| 676 | pdev->decompress_data); | ||
| 677 | kfree(pdev->decompress_data); | ||
| 678 | pdev->decompress_data = NULL; | ||
| 679 | } | ||
| 680 | |||
| 681 | v4l2_ctrl_handler_free(&pdev->ctrl_handler); | ||
| 682 | |||
| 1161 | kfree(pdev); | 683 | kfree(pdev); |
| 1162 | } | 684 | } |
| 1163 | 685 | ||
| 1164 | /* Note that all cleanup is done in the reverse order as in _open */ | ||
| 1165 | static int pwc_video_close(struct file *file) | 686 | static int pwc_video_close(struct file *file) |
| 1166 | { | 687 | { |
| 1167 | struct video_device *vdev = file->private_data; | 688 | struct video_device *vdev = file->private_data; |
| 1168 | struct pwc_device *pdev; | 689 | struct pwc_device *pdev; |
| 1169 | int i; | ||
| 1170 | 690 | ||
| 1171 | PWC_DEBUG_OPEN(">> video_close called(vdev = 0x%p).\n", vdev); | 691 | PWC_DEBUG_OPEN(">> video_close called(vdev = 0x%p).\n", vdev); |
| 1172 | 692 | ||
| 1173 | pdev = video_get_drvdata(vdev); | 693 | pdev = video_get_drvdata(vdev); |
| 1174 | if (pdev->vopen == 0) | 694 | if (pdev->capt_file == file) { |
| 1175 | PWC_DEBUG_MODULE("video_close() called on closed device?\n"); | 695 | vb2_queue_release(&pdev->vb_queue); |
| 1176 | 696 | pdev->capt_file = NULL; | |
| 1177 | /* Dump statistics, but only if a reasonable amount of frames were | ||
| 1178 | processed (to prevent endless log-entries in case of snap-shot | ||
| 1179 | programs) | ||
| 1180 | */ | ||
| 1181 | if (pdev->vframe_count > 20) | ||
| 1182 | PWC_DEBUG_MODULE("Closing video device: %d frames received, dumped %d frames, %d frames with errors.\n", pdev->vframe_count, pdev->vframes_dumped, pdev->vframes_error); | ||
| 1183 | |||
| 1184 | if (DEVICE_USE_CODEC1(pdev->type)) | ||
| 1185 | pwc_dec1_exit(); | ||
| 1186 | else | ||
| 1187 | pwc_dec23_exit(); | ||
| 1188 | |||
| 1189 | pwc_isoc_cleanup(pdev); | ||
| 1190 | pwc_free_buffers(pdev); | ||
| 1191 | |||
| 1192 | /* Turn off LEDS and power down camera, but only when not unplugged */ | ||
| 1193 | if (!pdev->unplugged) { | ||
| 1194 | /* Turn LEDs off */ | ||
| 1195 | if (pwc_set_leds(pdev, 0, 0) < 0) | ||
| 1196 | PWC_DEBUG_MODULE("Failed to set LED on/off time.\n"); | ||
| 1197 | if (power_save) { | ||
| 1198 | i = pwc_camera_power(pdev, 0); | ||
| 1199 | if (i < 0) | ||
| 1200 | PWC_ERROR("Failed to power down camera (%d)\n", i); | ||
| 1201 | } | ||
| 1202 | pdev->vopen--; | ||
| 1203 | PWC_DEBUG_OPEN("<< video_close() vopen=%d\n", pdev->vopen); | ||
| 1204 | } | 697 | } |
| 1205 | 698 | ||
| 699 | PWC_DEBUG_OPEN("<< video_close()\n"); | ||
| 1206 | return 0; | 700 | return 0; |
| 1207 | } | 701 | } |
| 1208 | 702 | ||
| 1209 | /* | ||
| 1210 | * FIXME: what about two parallel reads ???? | ||
| 1211 | * ANSWER: Not supported. You can't open the device more than once, | ||
| 1212 | despite what the V4L1 interface says. First, I don't see | ||
| 1213 | the need, second there's no mechanism of alerting the | ||
| 1214 | 2nd/3rd/... process of events like changing image size. | ||
| 1215 | And I don't see the point of blocking that for the | ||
| 1216 | 2nd/3rd/... process. | ||
| 1217 | In multi-threaded environments reading parallel from any | ||
| 1218 | device is tricky anyhow. | ||
| 1219 | */ | ||
| 1220 | |||
| 1221 | static ssize_t pwc_video_read(struct file *file, char __user *buf, | 703 | static ssize_t pwc_video_read(struct file *file, char __user *buf, |
| 1222 | size_t count, loff_t *ppos) | 704 | size_t count, loff_t *ppos) |
| 1223 | { | 705 | { |
| 1224 | struct video_device *vdev = file->private_data; | 706 | struct video_device *vdev = file->private_data; |
| 1225 | struct pwc_device *pdev; | 707 | struct pwc_device *pdev = video_get_drvdata(vdev); |
| 1226 | int noblock = file->f_flags & O_NONBLOCK; | ||
| 1227 | DECLARE_WAITQUEUE(wait, current); | ||
| 1228 | int bytes_to_read, rv = 0; | ||
| 1229 | void *image_buffer_addr; | ||
| 1230 | |||
| 1231 | PWC_DEBUG_READ("pwc_video_read(vdev=0x%p, buf=%p, count=%zd) called.\n", | ||
| 1232 | vdev, buf, count); | ||
| 1233 | if (vdev == NULL) | ||
| 1234 | return -EFAULT; | ||
| 1235 | pdev = video_get_drvdata(vdev); | ||
| 1236 | if (pdev == NULL) | ||
| 1237 | return -EFAULT; | ||
| 1238 | 708 | ||
| 1239 | if (pdev->error_status) { | 709 | if (!pdev->udev) |
| 1240 | rv = -pdev->error_status; /* Something happened, report what. */ | 710 | return -ENODEV; |
| 1241 | goto err_out; | ||
| 1242 | } | ||
| 1243 | 711 | ||
| 1244 | /* Start the stream (if not already started) */ | 712 | if (pdev->capt_file != NULL && |
| 1245 | rv = pwc_isoc_init(pdev); | 713 | pdev->capt_file != file) |
| 1246 | if (rv) | 714 | return -EBUSY; |
| 1247 | goto err_out; | ||
| 1248 | |||
| 1249 | /* In case we're doing partial reads, we don't have to wait for a frame */ | ||
| 1250 | if (pdev->image_read_pos == 0) { | ||
| 1251 | /* Do wait queueing according to the (doc)book */ | ||
| 1252 | add_wait_queue(&pdev->frameq, &wait); | ||
| 1253 | while (pdev->full_frames == NULL) { | ||
| 1254 | /* Check for unplugged/etc. here */ | ||
| 1255 | if (pdev->error_status) { | ||
| 1256 | remove_wait_queue(&pdev->frameq, &wait); | ||
| 1257 | set_current_state(TASK_RUNNING); | ||
| 1258 | rv = -pdev->error_status ; | ||
| 1259 | goto err_out; | ||
| 1260 | } | ||
| 1261 | if (noblock) { | ||
| 1262 | remove_wait_queue(&pdev->frameq, &wait); | ||
| 1263 | set_current_state(TASK_RUNNING); | ||
| 1264 | rv = -EWOULDBLOCK; | ||
| 1265 | goto err_out; | ||
| 1266 | } | ||
| 1267 | if (signal_pending(current)) { | ||
| 1268 | remove_wait_queue(&pdev->frameq, &wait); | ||
| 1269 | set_current_state(TASK_RUNNING); | ||
| 1270 | rv = -ERESTARTSYS; | ||
| 1271 | goto err_out; | ||
| 1272 | } | ||
| 1273 | mutex_unlock(&pdev->modlock); | ||
| 1274 | schedule(); | ||
| 1275 | set_current_state(TASK_INTERRUPTIBLE); | ||
| 1276 | mutex_lock(&pdev->modlock); | ||
| 1277 | } | ||
| 1278 | remove_wait_queue(&pdev->frameq, &wait); | ||
| 1279 | set_current_state(TASK_RUNNING); | ||
| 1280 | 715 | ||
| 1281 | /* Decompress and release frame */ | 716 | pdev->capt_file = file; |
| 1282 | if (pwc_handle_frame(pdev)) { | ||
| 1283 | rv = -EFAULT; | ||
| 1284 | goto err_out; | ||
| 1285 | } | ||
| 1286 | } | ||
| 1287 | 717 | ||
| 1288 | PWC_DEBUG_READ("Copying data to user space.\n"); | 718 | return vb2_read(&pdev->vb_queue, buf, count, ppos, |
| 1289 | if (pdev->pixfmt != V4L2_PIX_FMT_YUV420) | 719 | file->f_flags & O_NONBLOCK); |
| 1290 | bytes_to_read = pdev->frame_size + sizeof(struct pwc_raw_frame); | ||
| 1291 | else | ||
| 1292 | bytes_to_read = pdev->view.size; | ||
| 1293 | |||
| 1294 | /* copy bytes to user space; we allow for partial reads */ | ||
| 1295 | if (count + pdev->image_read_pos > bytes_to_read) | ||
| 1296 | count = bytes_to_read - pdev->image_read_pos; | ||
| 1297 | image_buffer_addr = pdev->image_data; | ||
| 1298 | image_buffer_addr += pdev->images[pdev->fill_image].offset; | ||
| 1299 | image_buffer_addr += pdev->image_read_pos; | ||
| 1300 | if (copy_to_user(buf, image_buffer_addr, count)) { | ||
| 1301 | rv = -EFAULT; | ||
| 1302 | goto err_out; | ||
| 1303 | } | ||
| 1304 | pdev->image_read_pos += count; | ||
| 1305 | if (pdev->image_read_pos >= bytes_to_read) { /* All data has been read */ | ||
| 1306 | pdev->image_read_pos = 0; | ||
| 1307 | pwc_next_image(pdev); | ||
| 1308 | } | ||
| 1309 | return count; | ||
| 1310 | err_out: | ||
| 1311 | return rv; | ||
| 1312 | } | 720 | } |
| 1313 | 721 | ||
| 1314 | static unsigned int pwc_video_poll(struct file *file, poll_table *wait) | 722 | static unsigned int pwc_video_poll(struct file *file, poll_table *wait) |
| 1315 | { | 723 | { |
| 1316 | struct video_device *vdev = file->private_data; | 724 | struct video_device *vdev = file->private_data; |
| 1317 | struct pwc_device *pdev; | 725 | struct pwc_device *pdev = video_get_drvdata(vdev); |
| 1318 | int ret; | ||
| 1319 | 726 | ||
| 1320 | if (vdev == NULL) | 727 | if (!pdev->udev) |
| 1321 | return -EFAULT; | 728 | return POLL_ERR; |
| 1322 | pdev = video_get_drvdata(vdev); | ||
| 1323 | if (pdev == NULL) | ||
| 1324 | return -EFAULT; | ||
| 1325 | 729 | ||
| 1326 | /* Start the stream (if not already started) */ | 730 | return vb2_poll(&pdev->vb_queue, file, wait); |
| 1327 | ret = pwc_isoc_init(pdev); | 731 | } |
| 1328 | if (ret) | 732 | |
| 1329 | return ret; | 733 | static int pwc_video_mmap(struct file *file, struct vm_area_struct *vma) |
| 734 | { | ||
| 735 | struct video_device *vdev = file->private_data; | ||
| 736 | struct pwc_device *pdev = video_get_drvdata(vdev); | ||
| 737 | |||
| 738 | if (pdev->capt_file != file) | ||
| 739 | return -EBUSY; | ||
| 740 | |||
| 741 | return vb2_mmap(&pdev->vb_queue, vma); | ||
| 742 | } | ||
| 743 | |||
| 744 | /***************************************************************************/ | ||
| 745 | /* Videobuf2 operations */ | ||
| 746 | |||
| 747 | static int queue_setup(struct vb2_queue *vq, unsigned int *nbuffers, | ||
| 748 | unsigned int *nplanes, unsigned long sizes[], | ||
| 749 | void *alloc_ctxs[]) | ||
| 750 | { | ||
| 751 | struct pwc_device *pdev = vb2_get_drv_priv(vq); | ||
| 752 | |||
| 753 | if (*nbuffers < MIN_FRAMES) | ||
| 754 | *nbuffers = MIN_FRAMES; | ||
| 755 | else if (*nbuffers > MAX_FRAMES) | ||
| 756 | *nbuffers = MAX_FRAMES; | ||
| 757 | |||
| 758 | *nplanes = 1; | ||
| 1330 | 759 | ||
| 1331 | poll_wait(file, &pdev->frameq, wait); | 760 | sizes[0] = PAGE_ALIGN((pdev->abs_max.x * pdev->abs_max.y * 3) / 2); |
| 1332 | if (pdev->error_status) | ||
| 1333 | return POLLERR; | ||
| 1334 | if (pdev->full_frames != NULL) /* we have frames waiting */ | ||
| 1335 | return (POLLIN | POLLRDNORM); | ||
| 1336 | 761 | ||
| 1337 | return 0; | 762 | return 0; |
| 1338 | } | 763 | } |
| 1339 | 764 | ||
| 1340 | static int pwc_video_mmap(struct file *file, struct vm_area_struct *vma) | 765 | static int buffer_init(struct vb2_buffer *vb) |
| 1341 | { | 766 | { |
| 1342 | struct video_device *vdev = file->private_data; | 767 | struct pwc_frame_buf *buf = container_of(vb, struct pwc_frame_buf, vb); |
| 1343 | struct pwc_device *pdev; | ||
| 1344 | unsigned long start; | ||
| 1345 | unsigned long size; | ||
| 1346 | unsigned long page, pos = 0; | ||
| 1347 | int index; | ||
| 1348 | 768 | ||
| 1349 | PWC_DEBUG_MEMORY(">> %s\n", __func__); | 769 | /* need vmalloc since frame buffer > 128K */ |
| 1350 | pdev = video_get_drvdata(vdev); | 770 | buf->data = vzalloc(PWC_FRAME_SIZE); |
| 1351 | size = vma->vm_end - vma->vm_start; | 771 | if (buf->data == NULL) |
| 1352 | start = vma->vm_start; | 772 | return -ENOMEM; |
| 1353 | 773 | ||
| 1354 | /* Find the idx buffer for this mapping */ | 774 | return 0; |
| 1355 | for (index = 0; index < pwc_mbufs; index++) { | 775 | } |
| 1356 | pos = pdev->images[index].offset; | 776 | |
| 1357 | if ((pos>>PAGE_SHIFT) == vma->vm_pgoff) | 777 | static int buffer_prepare(struct vb2_buffer *vb) |
| 1358 | break; | 778 | { |
| 779 | struct pwc_device *pdev = vb2_get_drv_priv(vb->vb2_queue); | ||
| 780 | |||
| 781 | /* Don't allow queing new buffers after device disconnection */ | ||
| 782 | if (!pdev->udev) | ||
| 783 | return -ENODEV; | ||
| 784 | |||
| 785 | return 0; | ||
| 786 | } | ||
| 787 | |||
| 788 | static int buffer_finish(struct vb2_buffer *vb) | ||
| 789 | { | ||
| 790 | struct pwc_device *pdev = vb2_get_drv_priv(vb->vb2_queue); | ||
| 791 | struct pwc_frame_buf *buf = container_of(vb, struct pwc_frame_buf, vb); | ||
| 792 | |||
| 793 | /* | ||
| 794 | * Application has called dqbuf and is getting back a buffer we've | ||
| 795 | * filled, take the pwc data we've stored in buf->data and decompress | ||
| 796 | * it into a usable format, storing the result in the vb2_buffer | ||
| 797 | */ | ||
| 798 | return pwc_decompress(pdev, buf); | ||
| 799 | } | ||
| 800 | |||
| 801 | static void buffer_cleanup(struct vb2_buffer *vb) | ||
| 802 | { | ||
| 803 | struct pwc_frame_buf *buf = container_of(vb, struct pwc_frame_buf, vb); | ||
| 804 | |||
| 805 | vfree(buf->data); | ||
| 806 | } | ||
| 807 | |||
| 808 | static void buffer_queue(struct vb2_buffer *vb) | ||
| 809 | { | ||
| 810 | struct pwc_device *pdev = vb2_get_drv_priv(vb->vb2_queue); | ||
| 811 | struct pwc_frame_buf *buf = container_of(vb, struct pwc_frame_buf, vb); | ||
| 812 | unsigned long flags = 0; | ||
| 813 | |||
| 814 | spin_lock_irqsave(&pdev->queued_bufs_lock, flags); | ||
| 815 | list_add_tail(&buf->list, &pdev->queued_bufs); | ||
| 816 | spin_unlock_irqrestore(&pdev->queued_bufs_lock, flags); | ||
| 817 | } | ||
| 818 | |||
| 819 | static int start_streaming(struct vb2_queue *vq) | ||
| 820 | { | ||
| 821 | struct pwc_device *pdev = vb2_get_drv_priv(vq); | ||
| 822 | |||
| 823 | if (!pdev->udev) | ||
| 824 | return -ENODEV; | ||
| 825 | |||
| 826 | /* Turn on camera and set LEDS on */ | ||
| 827 | pwc_camera_power(pdev, 1); | ||
| 828 | if (pdev->power_save) { | ||
| 829 | /* Restore video mode */ | ||
| 830 | pwc_set_video_mode(pdev, pdev->view.x, pdev->view.y, | ||
| 831 | pdev->vframes, pdev->vcompression, | ||
| 832 | pdev->vsnapshot); | ||
| 1359 | } | 833 | } |
| 1360 | if (index == MAX_IMAGES) | 834 | pwc_set_leds(pdev, led_on, led_off); |
| 1361 | return -EINVAL; | 835 | |
| 1362 | if (index == 0) { | 836 | return pwc_isoc_init(pdev); |
| 1363 | /* | 837 | } |
| 1364 | * Special case for v4l1. In v4l1, we map only one big buffer, | 838 | |
| 1365 | * but in v4l2 each buffer is mapped | 839 | static int stop_streaming(struct vb2_queue *vq) |
| 1366 | */ | 840 | { |
| 1367 | unsigned long total_size; | 841 | struct pwc_device *pdev = vb2_get_drv_priv(vq); |
| 1368 | total_size = pwc_mbufs * pdev->len_per_image; | 842 | |
| 1369 | if (size != pdev->len_per_image && size != total_size) { | 843 | if (pdev->udev) { |
| 1370 | PWC_ERROR("Wrong size (%lu) needed to be len_per_image=%d or total_size=%lu\n", | 844 | pwc_set_leds(pdev, 0, 0); |
| 1371 | size, pdev->len_per_image, total_size); | 845 | pwc_camera_power(pdev, 0); |
| 1372 | return -EINVAL; | 846 | pwc_isoc_cleanup(pdev); |
| 1373 | } | ||
| 1374 | } else if (size > pdev->len_per_image) | ||
| 1375 | return -EINVAL; | ||
| 1376 | |||
| 1377 | vma->vm_flags |= VM_IO; /* from 2.6.9-acX */ | ||
| 1378 | |||
| 1379 | pos += (unsigned long)pdev->image_data; | ||
| 1380 | while (size > 0) { | ||
| 1381 | page = vmalloc_to_pfn((void *)pos); | ||
| 1382 | if (remap_pfn_range(vma, start, page, PAGE_SIZE, PAGE_SHARED)) | ||
| 1383 | return -EAGAIN; | ||
| 1384 | start += PAGE_SIZE; | ||
| 1385 | pos += PAGE_SIZE; | ||
| 1386 | if (size > PAGE_SIZE) | ||
| 1387 | size -= PAGE_SIZE; | ||
| 1388 | else | ||
| 1389 | size = 0; | ||
| 1390 | } | 847 | } |
| 848 | pwc_cleanup_queued_bufs(pdev); | ||
| 849 | |||
| 1391 | return 0; | 850 | return 0; |
| 1392 | } | 851 | } |
| 1393 | 852 | ||
| 853 | static void pwc_lock(struct vb2_queue *vq) | ||
| 854 | { | ||
| 855 | struct pwc_device *pdev = vb2_get_drv_priv(vq); | ||
| 856 | mutex_lock(&pdev->modlock); | ||
| 857 | } | ||
| 858 | |||
| 859 | static void pwc_unlock(struct vb2_queue *vq) | ||
| 860 | { | ||
| 861 | struct pwc_device *pdev = vb2_get_drv_priv(vq); | ||
| 862 | mutex_unlock(&pdev->modlock); | ||
| 863 | } | ||
| 864 | |||
| 865 | static struct vb2_ops pwc_vb_queue_ops = { | ||
| 866 | .queue_setup = queue_setup, | ||
| 867 | .buf_init = buffer_init, | ||
| 868 | .buf_prepare = buffer_prepare, | ||
| 869 | .buf_finish = buffer_finish, | ||
| 870 | .buf_cleanup = buffer_cleanup, | ||
| 871 | .buf_queue = buffer_queue, | ||
| 872 | .start_streaming = start_streaming, | ||
| 873 | .stop_streaming = stop_streaming, | ||
| 874 | .wait_prepare = pwc_unlock, | ||
| 875 | .wait_finish = pwc_lock, | ||
| 876 | }; | ||
| 877 | |||
| 1394 | /***************************************************************************/ | 878 | /***************************************************************************/ |
| 1395 | /* USB functions */ | 879 | /* USB functions */ |
| 1396 | 880 | ||
| @@ -1406,6 +890,7 @@ static int usb_pwc_probe(struct usb_interface *intf, const struct usb_device_id | |||
| 1406 | int hint, rc; | 890 | int hint, rc; |
| 1407 | int features = 0; | 891 | int features = 0; |
| 1408 | int video_nr = -1; /* default: use next available device */ | 892 | int video_nr = -1; /* default: use next available device */ |
| 893 | int my_power_save = power_save; | ||
| 1409 | char serial_number[30], *name; | 894 | char serial_number[30], *name; |
| 1410 | 895 | ||
| 1411 | vendor_id = le16_to_cpu(udev->descriptor.idVendor); | 896 | vendor_id = le16_to_cpu(udev->descriptor.idVendor); |
| @@ -1513,6 +998,8 @@ static int usb_pwc_probe(struct usb_interface *intf, const struct usb_device_id | |||
| 1513 | PWC_INFO("Logitech QuickCam 4000 Pro USB webcam detected.\n"); | 998 | PWC_INFO("Logitech QuickCam 4000 Pro USB webcam detected.\n"); |
| 1514 | name = "Logitech QuickCam Pro 4000"; | 999 | name = "Logitech QuickCam Pro 4000"; |
| 1515 | type_id = 740; /* CCD sensor */ | 1000 | type_id = 740; /* CCD sensor */ |
| 1001 | if (my_power_save == -1) | ||
| 1002 | my_power_save = 1; | ||
| 1516 | break; | 1003 | break; |
| 1517 | case 0x08b3: | 1004 | case 0x08b3: |
| 1518 | PWC_INFO("Logitech QuickCam Zoom USB webcam detected.\n"); | 1005 | PWC_INFO("Logitech QuickCam Zoom USB webcam detected.\n"); |
| @@ -1523,12 +1010,15 @@ static int usb_pwc_probe(struct usb_interface *intf, const struct usb_device_id | |||
| 1523 | PWC_INFO("Logitech QuickCam Zoom (new model) USB webcam detected.\n"); | 1010 | PWC_INFO("Logitech QuickCam Zoom (new model) USB webcam detected.\n"); |
| 1524 | name = "Logitech QuickCam Zoom"; | 1011 | name = "Logitech QuickCam Zoom"; |
| 1525 | type_id = 740; /* CCD sensor */ | 1012 | type_id = 740; /* CCD sensor */ |
| 1526 | power_save = 1; | 1013 | if (my_power_save == -1) |
| 1014 | my_power_save = 1; | ||
| 1527 | break; | 1015 | break; |
| 1528 | case 0x08b5: | 1016 | case 0x08b5: |
| 1529 | PWC_INFO("Logitech QuickCam Orbit/Sphere USB webcam detected.\n"); | 1017 | PWC_INFO("Logitech QuickCam Orbit/Sphere USB webcam detected.\n"); |
| 1530 | name = "Logitech QuickCam Orbit"; | 1018 | name = "Logitech QuickCam Orbit"; |
| 1531 | type_id = 740; /* CCD sensor */ | 1019 | type_id = 740; /* CCD sensor */ |
| 1020 | if (my_power_save == -1) | ||
| 1021 | my_power_save = 1; | ||
| 1532 | features |= FEATURE_MOTOR_PANTILT; | 1022 | features |= FEATURE_MOTOR_PANTILT; |
| 1533 | break; | 1023 | break; |
| 1534 | case 0x08b6: | 1024 | case 0x08b6: |
| @@ -1583,6 +1073,8 @@ static int usb_pwc_probe(struct usb_interface *intf, const struct usb_device_id | |||
| 1583 | PWC_INFO("Creative Labs Webcam 5 detected.\n"); | 1073 | PWC_INFO("Creative Labs Webcam 5 detected.\n"); |
| 1584 | name = "Creative Labs Webcam 5"; | 1074 | name = "Creative Labs Webcam 5"; |
| 1585 | type_id = 730; | 1075 | type_id = 730; |
| 1076 | if (my_power_save == -1) | ||
| 1077 | my_power_save = 1; | ||
| 1586 | break; | 1078 | break; |
| 1587 | case 0x4011: | 1079 | case 0x4011: |
| 1588 | PWC_INFO("Creative Labs Webcam Pro Ex detected.\n"); | 1080 | PWC_INFO("Creative Labs Webcam Pro Ex detected.\n"); |
| @@ -1640,6 +1132,9 @@ static int usb_pwc_probe(struct usb_interface *intf, const struct usb_device_id | |||
| 1640 | else | 1132 | else |
| 1641 | return -ENODEV; /* Not any of the know types; but the list keeps growing. */ | 1133 | return -ENODEV; /* Not any of the know types; but the list keeps growing. */ |
| 1642 | 1134 | ||
| 1135 | if (my_power_save == -1) | ||
| 1136 | my_power_save = 0; | ||
| 1137 | |||
| 1643 | memset(serial_number, 0, 30); | 1138 | memset(serial_number, 0, 30); |
| 1644 | usb_string(udev, udev->descriptor.iSerialNumber, serial_number, 29); | 1139 | usb_string(udev, udev->descriptor.iSerialNumber, serial_number, 29); |
| 1645 | PWC_DEBUG_PROBE("Device serial number is %s\n", serial_number); | 1140 | PWC_DEBUG_PROBE("Device serial number is %s\n", serial_number); |
| @@ -1654,7 +1149,6 @@ static int usb_pwc_probe(struct usb_interface *intf, const struct usb_device_id | |||
| 1654 | return -ENOMEM; | 1149 | return -ENOMEM; |
| 1655 | } | 1150 | } |
| 1656 | pdev->type = type_id; | 1151 | pdev->type = type_id; |
| 1657 | pdev->vsize = default_size; | ||
| 1658 | pdev->vframes = default_fps; | 1152 | pdev->vframes = default_fps; |
| 1659 | strcpy(pdev->serial, serial_number); | 1153 | strcpy(pdev->serial, serial_number); |
| 1660 | pdev->features = features; | 1154 | pdev->features = features; |
| @@ -1668,13 +1162,26 @@ static int usb_pwc_probe(struct usb_interface *intf, const struct usb_device_id | |||
| 1668 | pdev->angle_range.tilt_min = -3000; | 1162 | pdev->angle_range.tilt_min = -3000; |
| 1669 | pdev->angle_range.tilt_max = 2500; | 1163 | pdev->angle_range.tilt_max = 2500; |
| 1670 | } | 1164 | } |
| 1165 | pwc_construct(pdev); /* set min/max sizes correct */ | ||
| 1671 | 1166 | ||
| 1672 | mutex_init(&pdev->modlock); | 1167 | mutex_init(&pdev->modlock); |
| 1673 | spin_lock_init(&pdev->ptrlock); | 1168 | mutex_init(&pdev->udevlock); |
| 1169 | spin_lock_init(&pdev->queued_bufs_lock); | ||
| 1170 | INIT_LIST_HEAD(&pdev->queued_bufs); | ||
| 1674 | 1171 | ||
| 1675 | pdev->udev = udev; | 1172 | pdev->udev = udev; |
| 1676 | init_waitqueue_head(&pdev->frameq); | ||
| 1677 | pdev->vcompression = pwc_preferred_compression; | 1173 | pdev->vcompression = pwc_preferred_compression; |
| 1174 | pdev->power_save = my_power_save; | ||
| 1175 | |||
| 1176 | /* Init videobuf2 queue structure */ | ||
| 1177 | memset(&pdev->vb_queue, 0, sizeof(pdev->vb_queue)); | ||
| 1178 | pdev->vb_queue.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | ||
| 1179 | pdev->vb_queue.io_modes = VB2_MMAP | VB2_USERPTR | VB2_READ; | ||
| 1180 | pdev->vb_queue.drv_priv = pdev; | ||
| 1181 | pdev->vb_queue.buf_struct_size = sizeof(struct pwc_frame_buf); | ||
| 1182 | pdev->vb_queue.ops = &pwc_vb_queue_ops; | ||
| 1183 | pdev->vb_queue.mem_ops = &vb2_vmalloc_memops; | ||
| 1184 | vb2_queue_init(&pdev->vb_queue); | ||
| 1678 | 1185 | ||
| 1679 | /* Init video_device structure */ | 1186 | /* Init video_device structure */ |
| 1680 | memcpy(&pdev->vdev, &pwc_template, sizeof(pwc_template)); | 1187 | memcpy(&pdev->vdev, &pwc_template, sizeof(pwc_template)); |
| @@ -1707,14 +1214,40 @@ static int usb_pwc_probe(struct usb_interface *intf, const struct usb_device_id | |||
| 1707 | PWC_DEBUG_PROBE("probe() function returning struct at 0x%p.\n", pdev); | 1214 | PWC_DEBUG_PROBE("probe() function returning struct at 0x%p.\n", pdev); |
| 1708 | usb_set_intfdata(intf, pdev); | 1215 | usb_set_intfdata(intf, pdev); |
| 1709 | 1216 | ||
| 1217 | #ifdef CONFIG_USB_PWC_DEBUG | ||
| 1218 | /* Query sensor type */ | ||
| 1219 | if (pwc_get_cmos_sensor(pdev, &rc) >= 0) { | ||
| 1220 | PWC_DEBUG_OPEN("This %s camera is equipped with a %s (%d).\n", | ||
| 1221 | pdev->vdev.name, | ||
| 1222 | pwc_sensor_type_to_string(rc), rc); | ||
| 1223 | } | ||
| 1224 | #endif | ||
| 1225 | |||
| 1710 | /* Set the leds off */ | 1226 | /* Set the leds off */ |
| 1711 | pwc_set_leds(pdev, 0, 0); | 1227 | pwc_set_leds(pdev, 0, 0); |
| 1228 | |||
| 1229 | /* Setup intial videomode */ | ||
| 1230 | rc = pwc_set_video_mode(pdev, pdev->view_max.x, pdev->view_max.y, | ||
| 1231 | pdev->vframes, pdev->vcompression, 0); | ||
| 1232 | if (rc) | ||
| 1233 | goto err_free_mem; | ||
| 1234 | |||
| 1235 | /* Register controls (and read default values from camera */ | ||
| 1236 | rc = pwc_init_controls(pdev); | ||
| 1237 | if (rc) { | ||
| 1238 | PWC_ERROR("Failed to register v4l2 controls (%d).\n", rc); | ||
| 1239 | goto err_free_mem; | ||
| 1240 | } | ||
| 1241 | |||
| 1242 | pdev->vdev.ctrl_handler = &pdev->ctrl_handler; | ||
| 1243 | |||
| 1244 | /* And powerdown the camera until streaming starts */ | ||
| 1712 | pwc_camera_power(pdev, 0); | 1245 | pwc_camera_power(pdev, 0); |
| 1713 | 1246 | ||
| 1714 | rc = video_register_device(&pdev->vdev, VFL_TYPE_GRABBER, video_nr); | 1247 | rc = video_register_device(&pdev->vdev, VFL_TYPE_GRABBER, video_nr); |
| 1715 | if (rc < 0) { | 1248 | if (rc < 0) { |
| 1716 | PWC_ERROR("Failed to register as video device (%d).\n", rc); | 1249 | PWC_ERROR("Failed to register as video device (%d).\n", rc); |
| 1717 | goto err_free_mem; | 1250 | goto err_free_controls; |
| 1718 | } | 1251 | } |
| 1719 | rc = pwc_create_sysfs_files(pdev); | 1252 | rc = pwc_create_sysfs_files(pdev); |
| 1720 | if (rc) | 1253 | if (rc) |
| @@ -1757,7 +1290,10 @@ err_video_unreg: | |||
| 1757 | if (hint < MAX_DEV_HINTS) | 1290 | if (hint < MAX_DEV_HINTS) |
| 1758 | device_hint[hint].pdev = NULL; | 1291 | device_hint[hint].pdev = NULL; |
| 1759 | video_unregister_device(&pdev->vdev); | 1292 | video_unregister_device(&pdev->vdev); |
| 1293 | err_free_controls: | ||
| 1294 | v4l2_ctrl_handler_free(&pdev->ctrl_handler); | ||
| 1760 | err_free_mem: | 1295 | err_free_mem: |
| 1296 | usb_set_intfdata(intf, NULL); | ||
| 1761 | kfree(pdev); | 1297 | kfree(pdev); |
| 1762 | return rc; | 1298 | return rc; |
| 1763 | } | 1299 | } |
| @@ -1767,33 +1303,17 @@ static void usb_pwc_disconnect(struct usb_interface *intf) | |||
| 1767 | { | 1303 | { |
| 1768 | struct pwc_device *pdev = usb_get_intfdata(intf); | 1304 | struct pwc_device *pdev = usb_get_intfdata(intf); |
| 1769 | 1305 | ||
| 1306 | mutex_lock(&pdev->udevlock); | ||
| 1770 | mutex_lock(&pdev->modlock); | 1307 | mutex_lock(&pdev->modlock); |
| 1771 | usb_set_intfdata (intf, NULL); | ||
| 1772 | if (pdev == NULL) { | ||
| 1773 | PWC_ERROR("pwc_disconnect() Called without private pointer.\n"); | ||
| 1774 | goto disconnect_out; | ||
| 1775 | } | ||
| 1776 | if (pdev->udev == NULL) { | ||
| 1777 | PWC_ERROR("pwc_disconnect() already called for %p\n", pdev); | ||
| 1778 | goto disconnect_out; | ||
| 1779 | } | ||
| 1780 | if (pdev->udev != interface_to_usbdev(intf)) { | ||
| 1781 | PWC_ERROR("pwc_disconnect() Woops: pointer mismatch udev/pdev.\n"); | ||
| 1782 | goto disconnect_out; | ||
| 1783 | } | ||
| 1784 | |||
| 1785 | /* We got unplugged; this is signalled by an EPIPE error code */ | ||
| 1786 | pdev->error_status = EPIPE; | ||
| 1787 | pdev->unplugged = 1; | ||
| 1788 | |||
| 1789 | /* Alert waiting processes */ | ||
| 1790 | wake_up_interruptible(&pdev->frameq); | ||
| 1791 | 1308 | ||
| 1309 | usb_set_intfdata(intf, NULL); | ||
| 1792 | /* No need to keep the urbs around after disconnection */ | 1310 | /* No need to keep the urbs around after disconnection */ |
| 1793 | pwc_isoc_cleanup(pdev); | 1311 | pwc_isoc_cleanup(pdev); |
| 1312 | pwc_cleanup_queued_bufs(pdev); | ||
| 1313 | pdev->udev = NULL; | ||
| 1794 | 1314 | ||
| 1795 | disconnect_out: | ||
| 1796 | mutex_unlock(&pdev->modlock); | 1315 | mutex_unlock(&pdev->modlock); |
| 1316 | mutex_unlock(&pdev->udevlock); | ||
| 1797 | 1317 | ||
| 1798 | pwc_remove_sysfs_files(pdev); | 1318 | pwc_remove_sysfs_files(pdev); |
| 1799 | video_unregister_device(&pdev->vdev); | 1319 | video_unregister_device(&pdev->vdev); |
| @@ -1809,36 +1329,27 @@ disconnect_out: | |||
| 1809 | * Initialization code & module stuff | 1329 | * Initialization code & module stuff |
| 1810 | */ | 1330 | */ |
| 1811 | 1331 | ||
| 1812 | static char *size; | ||
| 1813 | static int fps; | 1332 | static int fps; |
| 1814 | static int fbufs; | ||
| 1815 | static int mbufs; | ||
| 1816 | static int compression = -1; | 1333 | static int compression = -1; |
| 1817 | static int leds[2] = { -1, -1 }; | 1334 | static int leds[2] = { -1, -1 }; |
| 1818 | static unsigned int leds_nargs; | 1335 | static unsigned int leds_nargs; |
| 1819 | static char *dev_hint[MAX_DEV_HINTS]; | 1336 | static char *dev_hint[MAX_DEV_HINTS]; |
| 1820 | static unsigned int dev_hint_nargs; | 1337 | static unsigned int dev_hint_nargs; |
| 1821 | 1338 | ||
| 1822 | module_param(size, charp, 0444); | ||
| 1823 | module_param(fps, int, 0444); | 1339 | module_param(fps, int, 0444); |
| 1824 | module_param(fbufs, int, 0444); | ||
| 1825 | module_param(mbufs, int, 0444); | ||
| 1826 | #ifdef CONFIG_USB_PWC_DEBUG | 1340 | #ifdef CONFIG_USB_PWC_DEBUG |
| 1827 | module_param_named(trace, pwc_trace, int, 0644); | 1341 | module_param_named(trace, pwc_trace, int, 0644); |
| 1828 | #endif | 1342 | #endif |
| 1829 | module_param(power_save, int, 0444); | 1343 | module_param(power_save, int, 0644); |
| 1830 | module_param(compression, int, 0444); | 1344 | module_param(compression, int, 0444); |
| 1831 | module_param_array(leds, int, &leds_nargs, 0444); | 1345 | module_param_array(leds, int, &leds_nargs, 0444); |
| 1832 | module_param_array(dev_hint, charp, &dev_hint_nargs, 0444); | 1346 | module_param_array(dev_hint, charp, &dev_hint_nargs, 0444); |
| 1833 | 1347 | ||
| 1834 | MODULE_PARM_DESC(size, "Initial image size. One of sqcif, qsif, qcif, sif, cif, vga"); | ||
| 1835 | MODULE_PARM_DESC(fps, "Initial frames per second. Varies with model, useful range 5-30"); | 1348 | MODULE_PARM_DESC(fps, "Initial frames per second. Varies with model, useful range 5-30"); |
| 1836 | MODULE_PARM_DESC(fbufs, "Number of internal frame buffers to reserve"); | ||
| 1837 | MODULE_PARM_DESC(mbufs, "Number of external (mmap()ed) image buffers"); | ||
| 1838 | #ifdef CONFIG_USB_PWC_DEBUG | 1349 | #ifdef CONFIG_USB_PWC_DEBUG |
| 1839 | MODULE_PARM_DESC(trace, "For debugging purposes"); | 1350 | MODULE_PARM_DESC(trace, "For debugging purposes"); |
| 1840 | #endif | 1351 | #endif |
| 1841 | MODULE_PARM_DESC(power_save, "Turn power save feature in camera on or off"); | 1352 | MODULE_PARM_DESC(power_save, "Turn power saving for new cameras on or off"); |
| 1842 | MODULE_PARM_DESC(compression, "Preferred compression quality. Range 0 (uncompressed) to 3 (high compression)"); | 1353 | MODULE_PARM_DESC(compression, "Preferred compression quality. Range 0 (uncompressed) to 3 (high compression)"); |
| 1843 | MODULE_PARM_DESC(leds, "LED on,off time in milliseconds"); | 1354 | MODULE_PARM_DESC(leds, "LED on,off time in milliseconds"); |
| 1844 | MODULE_PARM_DESC(dev_hint, "Device node hints"); | 1355 | MODULE_PARM_DESC(dev_hint, "Device node hints"); |
| @@ -1851,14 +1362,19 @@ MODULE_VERSION( PWC_VERSION ); | |||
| 1851 | 1362 | ||
| 1852 | static int __init usb_pwc_init(void) | 1363 | static int __init usb_pwc_init(void) |
| 1853 | { | 1364 | { |
| 1854 | int i, sz; | 1365 | int i; |
| 1855 | char *sizenames[PSZ_MAX] = { "sqcif", "qsif", "qcif", "sif", "cif", "vga" }; | ||
| 1856 | 1366 | ||
| 1367 | #ifdef CONFIG_USB_PWC_DEBUG | ||
| 1857 | PWC_INFO("Philips webcam module version " PWC_VERSION " loaded.\n"); | 1368 | PWC_INFO("Philips webcam module version " PWC_VERSION " loaded.\n"); |
| 1858 | PWC_INFO("Supports Philips PCA645/646, PCVC675/680/690, PCVC720[40]/730/740/750 & PCVC830/840.\n"); | 1369 | PWC_INFO("Supports Philips PCA645/646, PCVC675/680/690, PCVC720[40]/730/740/750 & PCVC830/840.\n"); |
| 1859 | PWC_INFO("Also supports the Askey VC010, various Logitech Quickcams, Samsung MPC-C10 and MPC-C30,\n"); | 1370 | PWC_INFO("Also supports the Askey VC010, various Logitech Quickcams, Samsung MPC-C10 and MPC-C30,\n"); |
| 1860 | PWC_INFO("the Creative WebCam 5 & Pro Ex, SOTEC Afina Eye and Visionite VCS-UC300 and VCS-UM100.\n"); | 1371 | PWC_INFO("the Creative WebCam 5 & Pro Ex, SOTEC Afina Eye and Visionite VCS-UC300 and VCS-UM100.\n"); |
| 1861 | 1372 | ||
| 1373 | if (pwc_trace >= 0) { | ||
| 1374 | PWC_DEBUG_MODULE("Trace options: 0x%04x\n", pwc_trace); | ||
| 1375 | } | ||
| 1376 | #endif | ||
| 1377 | |||
| 1862 | if (fps) { | 1378 | if (fps) { |
| 1863 | if (fps < 4 || fps > 30) { | 1379 | if (fps < 4 || fps > 30) { |
| 1864 | PWC_ERROR("Framerate out of bounds (4-30).\n"); | 1380 | PWC_ERROR("Framerate out of bounds (4-30).\n"); |
| @@ -1868,41 +1384,6 @@ static int __init usb_pwc_init(void) | |||
| 1868 | PWC_DEBUG_MODULE("Default framerate set to %d.\n", default_fps); | 1384 | PWC_DEBUG_MODULE("Default framerate set to %d.\n", default_fps); |
| 1869 | } | 1385 | } |
| 1870 | 1386 | ||
| 1871 | if (size) { | ||
| 1872 | /* string; try matching with array */ | ||
| 1873 | for (sz = 0; sz < PSZ_MAX; sz++) { | ||
| 1874 | if (!strcmp(sizenames[sz], size)) { /* Found! */ | ||
| 1875 | default_size = sz; | ||
| 1876 | break; | ||
| 1877 | } | ||
| 1878 | } | ||
| 1879 | if (sz == PSZ_MAX) { | ||
| 1880 | PWC_ERROR("Size not recognized; try size=[sqcif | qsif | qcif | sif | cif | vga].\n"); | ||
| 1881 | return -EINVAL; | ||
| 1882 | } | ||
| 1883 | PWC_DEBUG_MODULE("Default image size set to %s [%dx%d].\n", sizenames[default_size], pwc_image_sizes[default_size].x, pwc_image_sizes[default_size].y); | ||
| 1884 | } | ||
| 1885 | if (mbufs) { | ||
| 1886 | if (mbufs < 1 || mbufs > MAX_IMAGES) { | ||
| 1887 | PWC_ERROR("Illegal number of mmap() buffers; use a number between 1 and %d.\n", MAX_IMAGES); | ||
| 1888 | return -EINVAL; | ||
| 1889 | } | ||
| 1890 | pwc_mbufs = mbufs; | ||
| 1891 | PWC_DEBUG_MODULE("Number of image buffers set to %d.\n", pwc_mbufs); | ||
| 1892 | } | ||
| 1893 | if (fbufs) { | ||
| 1894 | if (fbufs < 2 || fbufs > MAX_FRAMES) { | ||
| 1895 | PWC_ERROR("Illegal number of frame buffers; use a number between 2 and %d.\n", MAX_FRAMES); | ||
| 1896 | return -EINVAL; | ||
| 1897 | } | ||
| 1898 | default_fbufs = fbufs; | ||
| 1899 | PWC_DEBUG_MODULE("Number of frame buffers set to %d.\n", default_fbufs); | ||
| 1900 | } | ||
| 1901 | #ifdef CONFIG_USB_PWC_DEBUG | ||
| 1902 | if (pwc_trace >= 0) { | ||
| 1903 | PWC_DEBUG_MODULE("Trace options: 0x%04x\n", pwc_trace); | ||
| 1904 | } | ||
| 1905 | #endif | ||
| 1906 | if (compression >= 0) { | 1387 | if (compression >= 0) { |
| 1907 | if (compression > 3) { | 1388 | if (compression > 3) { |
| 1908 | PWC_ERROR("Invalid compression setting; use a number between 0 (uncompressed) and 3 (high).\n"); | 1389 | PWC_ERROR("Invalid compression setting; use a number between 0 (uncompressed) and 3 (high).\n"); |
| @@ -1911,8 +1392,6 @@ static int __init usb_pwc_init(void) | |||
| 1911 | pwc_preferred_compression = compression; | 1392 | pwc_preferred_compression = compression; |
| 1912 | PWC_DEBUG_MODULE("Preferred compression set to %d.\n", pwc_preferred_compression); | 1393 | PWC_DEBUG_MODULE("Preferred compression set to %d.\n", pwc_preferred_compression); |
| 1913 | } | 1394 | } |
| 1914 | if (power_save) | ||
| 1915 | PWC_DEBUG_MODULE("Enabling power save on open/close.\n"); | ||
| 1916 | if (leds[0] >= 0) | 1395 | if (leds[0] >= 0) |
| 1917 | led_on = leds[0]; | 1396 | led_on = leds[0]; |
| 1918 | if (leds[1] >= 0) | 1397 | if (leds[1] >= 0) |
diff --git a/drivers/media/video/pwc/pwc-ioctl.h b/drivers/media/video/pwc/pwc-ioctl.h deleted file mode 100644 index 8c0cae7b3daf..000000000000 --- a/drivers/media/video/pwc/pwc-ioctl.h +++ /dev/null | |||
| @@ -1,323 +0,0 @@ | |||
| 1 | #ifndef PWC_IOCTL_H | ||
| 2 | #define PWC_IOCTL_H | ||
| 3 | |||
| 4 | /* (C) 2001-2004 Nemosoft Unv. | ||
| 5 | (C) 2004-2006 Luc Saillard (luc@saillard.org) | ||
| 6 | |||
| 7 | NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx | ||
| 8 | driver and thus may have bugs that are not present in the original version. | ||
| 9 | Please send bug reports and support requests to <luc@saillard.org>. | ||
| 10 | The decompression routines have been implemented by reverse-engineering the | ||
| 11 | Nemosoft binary pwcx module. Caveat emptor. | ||
| 12 | |||
| 13 | This program is free software; you can redistribute it and/or modify | ||
| 14 | it under the terms of the GNU General Public License as published by | ||
| 15 | the Free Software Foundation; either version 2 of the License, or | ||
| 16 | (at your option) any later version. | ||
| 17 | |||
| 18 | This program is distributed in the hope that it will be useful, | ||
| 19 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 20 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 21 | GNU General Public License for more details. | ||
| 22 | |||
| 23 | You should have received a copy of the GNU General Public License | ||
| 24 | along with this program; if not, write to the Free Software | ||
| 25 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 26 | */ | ||
| 27 | |||
| 28 | /* This is pwc-ioctl.h belonging to PWC 10.0.10 | ||
| 29 | It contains structures and defines to communicate from user space | ||
| 30 | directly to the driver. | ||
| 31 | */ | ||
| 32 | |||
| 33 | /* | ||
| 34 | Changes | ||
| 35 | 2001/08/03 Alvarado Added ioctl constants to access methods for | ||
| 36 | changing white balance and red/blue gains | ||
| 37 | 2002/12/15 G. H. Fernandez-Toribio VIDIOCGREALSIZE | ||
| 38 | 2003/12/13 Nemosft Unv. Some modifications to make interfacing to | ||
| 39 | PWCX easier | ||
| 40 | */ | ||
| 41 | |||
| 42 | /* These are private ioctl() commands, specific for the Philips webcams. | ||
| 43 | They contain functions not found in other webcams, and settings not | ||
| 44 | specified in the Video4Linux API. | ||
| 45 | |||
| 46 | The #define names are built up like follows: | ||
| 47 | VIDIOC VIDeo IOCtl prefix | ||
| 48 | PWC Philps WebCam | ||
| 49 | G optional: Get | ||
| 50 | S optional: Set | ||
| 51 | ... the function | ||
| 52 | */ | ||
| 53 | |||
| 54 | #include <linux/types.h> | ||
| 55 | #include <linux/version.h> | ||
| 56 | |||
| 57 | /* Enumeration of image sizes */ | ||
| 58 | #define PSZ_SQCIF 0x00 | ||
| 59 | #define PSZ_QSIF 0x01 | ||
| 60 | #define PSZ_QCIF 0x02 | ||
| 61 | #define PSZ_SIF 0x03 | ||
| 62 | #define PSZ_CIF 0x04 | ||
| 63 | #define PSZ_VGA 0x05 | ||
| 64 | #define PSZ_MAX 6 | ||
| 65 | |||
| 66 | |||
| 67 | /* The frame rate is encoded in the video_window.flags parameter using | ||
| 68 | the upper 16 bits, since some flags are defined nowadays. The following | ||
| 69 | defines provide a mask and shift to filter out this value. | ||
| 70 | This value can also be passing using the private flag when using v4l2 and | ||
| 71 | VIDIOC_S_FMT ioctl. | ||
| 72 | |||
| 73 | In 'Snapshot' mode the camera freezes its automatic exposure and colour | ||
| 74 | balance controls. | ||
| 75 | */ | ||
| 76 | #define PWC_FPS_SHIFT 16 | ||
| 77 | #define PWC_FPS_MASK 0x00FF0000 | ||
| 78 | #define PWC_FPS_FRMASK 0x003F0000 | ||
| 79 | #define PWC_FPS_SNAPSHOT 0x00400000 | ||
| 80 | #define PWC_QLT_MASK 0x03000000 | ||
| 81 | #define PWC_QLT_SHIFT 24 | ||
| 82 | |||
| 83 | |||
| 84 | /* structure for transferring x & y coordinates */ | ||
| 85 | struct pwc_coord | ||
| 86 | { | ||
| 87 | int x, y; /* guess what */ | ||
| 88 | int size; /* size, or offset */ | ||
| 89 | }; | ||
| 90 | |||
| 91 | |||
| 92 | /* Used with VIDIOCPWCPROBE */ | ||
| 93 | struct pwc_probe | ||
| 94 | { | ||
| 95 | char name[32]; | ||
| 96 | int type; | ||
| 97 | }; | ||
| 98 | |||
| 99 | struct pwc_serial | ||
| 100 | { | ||
| 101 | char serial[30]; /* String with serial number. Contains terminating 0 */ | ||
| 102 | }; | ||
| 103 | |||
| 104 | /* pwc_whitebalance.mode values */ | ||
| 105 | #define PWC_WB_INDOOR 0 | ||
| 106 | #define PWC_WB_OUTDOOR 1 | ||
| 107 | #define PWC_WB_FL 2 | ||
| 108 | #define PWC_WB_MANUAL 3 | ||
| 109 | #define PWC_WB_AUTO 4 | ||
| 110 | |||
| 111 | /* Used with VIDIOCPWC[SG]AWB (Auto White Balance). | ||
| 112 | Set mode to one of the PWC_WB_* values above. | ||
| 113 | *red and *blue are the respective gains of these colour components inside | ||
| 114 | the camera; range 0..65535 | ||
| 115 | When 'mode' == PWC_WB_MANUAL, 'manual_red' and 'manual_blue' are set or read; | ||
| 116 | otherwise undefined. | ||
| 117 | 'read_red' and 'read_blue' are read-only. | ||
| 118 | */ | ||
| 119 | struct pwc_whitebalance | ||
| 120 | { | ||
| 121 | int mode; | ||
| 122 | int manual_red, manual_blue; /* R/W */ | ||
| 123 | int read_red, read_blue; /* R/O */ | ||
| 124 | }; | ||
| 125 | |||
| 126 | /* | ||
| 127 | 'control_speed' and 'control_delay' are used in automatic whitebalance mode, | ||
| 128 | and tell the camera how fast it should react to changes in lighting, and | ||
| 129 | with how much delay. Valid values are 0..65535. | ||
| 130 | */ | ||
| 131 | struct pwc_wb_speed | ||
| 132 | { | ||
| 133 | int control_speed; | ||
| 134 | int control_delay; | ||
| 135 | |||
| 136 | }; | ||
| 137 | |||
| 138 | /* Used with VIDIOCPWC[SG]LED */ | ||
| 139 | struct pwc_leds | ||
| 140 | { | ||
| 141 | int led_on; /* Led on-time; range = 0..25000 */ | ||
| 142 | int led_off; /* Led off-time; range = 0..25000 */ | ||
| 143 | }; | ||
| 144 | |||
| 145 | /* Image size (used with GREALSIZE) */ | ||
| 146 | struct pwc_imagesize | ||
| 147 | { | ||
| 148 | int width; | ||
| 149 | int height; | ||
| 150 | }; | ||
| 151 | |||
| 152 | /* Defines and structures for Motorized Pan & Tilt */ | ||
| 153 | #define PWC_MPT_PAN 0x01 | ||
| 154 | #define PWC_MPT_TILT 0x02 | ||
| 155 | #define PWC_MPT_TIMEOUT 0x04 /* for status */ | ||
| 156 | |||
| 157 | /* Set angles; when absolute != 0, the angle is absolute and the | ||
| 158 | driver calculates the relative offset for you. This can only | ||
| 159 | be used with VIDIOCPWCSANGLE; VIDIOCPWCGANGLE always returns | ||
| 160 | absolute angles. | ||
| 161 | */ | ||
| 162 | struct pwc_mpt_angles | ||
| 163 | { | ||
| 164 | int absolute; /* write-only */ | ||
| 165 | int pan; /* degrees * 100 */ | ||
| 166 | int tilt; /* degress * 100 */ | ||
| 167 | }; | ||
| 168 | |||
| 169 | /* Range of angles of the camera, both horizontally and vertically. | ||
| 170 | */ | ||
| 171 | struct pwc_mpt_range | ||
| 172 | { | ||
| 173 | int pan_min, pan_max; /* degrees * 100 */ | ||
| 174 | int tilt_min, tilt_max; | ||
| 175 | }; | ||
| 176 | |||
| 177 | struct pwc_mpt_status | ||
| 178 | { | ||
| 179 | int status; | ||
| 180 | int time_pan; | ||
| 181 | int time_tilt; | ||
| 182 | }; | ||
| 183 | |||
| 184 | |||
| 185 | /* This is used for out-of-kernel decompression. With it, you can get | ||
| 186 | all the necessary information to initialize and use the decompressor | ||
| 187 | routines in standalone applications. | ||
| 188 | */ | ||
| 189 | struct pwc_video_command | ||
| 190 | { | ||
| 191 | int type; /* camera type (645, 675, 730, etc.) */ | ||
| 192 | int release; /* release number */ | ||
| 193 | |||
| 194 | int size; /* one of PSZ_* */ | ||
| 195 | int alternate; | ||
| 196 | int command_len; /* length of USB video command */ | ||
| 197 | unsigned char command_buf[13]; /* Actual USB video command */ | ||
| 198 | int bandlength; /* >0 = compressed */ | ||
| 199 | int frame_size; /* Size of one (un)compressed frame */ | ||
| 200 | }; | ||
| 201 | |||
| 202 | /* Flags for PWCX subroutines. Not all modules honour all flags. */ | ||
| 203 | #define PWCX_FLAG_PLANAR 0x0001 | ||
| 204 | #define PWCX_FLAG_BAYER 0x0008 | ||
| 205 | |||
| 206 | |||
| 207 | /* IOCTL definitions */ | ||
| 208 | |||
| 209 | /* Restore user settings */ | ||
| 210 | #define VIDIOCPWCRUSER _IO('v', 192) | ||
| 211 | /* Save user settings */ | ||
| 212 | #define VIDIOCPWCSUSER _IO('v', 193) | ||
| 213 | /* Restore factory settings */ | ||
| 214 | #define VIDIOCPWCFACTORY _IO('v', 194) | ||
| 215 | |||
| 216 | /* You can manipulate the compression factor. A compression preference of 0 | ||
| 217 | means use uncompressed modes when available; 1 is low compression, 2 is | ||
| 218 | medium and 3 is high compression preferred. Of course, the higher the | ||
| 219 | compression, the lower the bandwidth used but more chance of artefacts | ||
| 220 | in the image. The driver automatically chooses a higher compression when | ||
| 221 | the preferred mode is not available. | ||
| 222 | */ | ||
| 223 | /* Set preferred compression quality (0 = uncompressed, 3 = highest compression) */ | ||
| 224 | #define VIDIOCPWCSCQUAL _IOW('v', 195, int) | ||
| 225 | /* Get preferred compression quality */ | ||
| 226 | #define VIDIOCPWCGCQUAL _IOR('v', 195, int) | ||
| 227 | |||
| 228 | |||
| 229 | /* Retrieve serial number of camera */ | ||
| 230 | #define VIDIOCPWCGSERIAL _IOR('v', 198, struct pwc_serial) | ||
| 231 | |||
| 232 | /* This is a probe function; since so many devices are supported, it | ||
| 233 | becomes difficult to include all the names in programs that want to | ||
| 234 | check for the enhanced Philips stuff. So in stead, try this PROBE; | ||
| 235 | it returns a structure with the original name, and the corresponding | ||
| 236 | Philips type. | ||
| 237 | To use, fill the structure with zeroes, call PROBE and if that succeeds, | ||
| 238 | compare the name with that returned from VIDIOCGCAP; they should be the | ||
| 239 | same. If so, you can be assured it is a Philips (OEM) cam and the type | ||
| 240 | is valid. | ||
| 241 | */ | ||
| 242 | #define VIDIOCPWCPROBE _IOR('v', 199, struct pwc_probe) | ||
| 243 | |||
| 244 | /* Set AGC (Automatic Gain Control); int < 0 = auto, 0..65535 = fixed */ | ||
| 245 | #define VIDIOCPWCSAGC _IOW('v', 200, int) | ||
| 246 | /* Get AGC; int < 0 = auto; >= 0 = fixed, range 0..65535 */ | ||
| 247 | #define VIDIOCPWCGAGC _IOR('v', 200, int) | ||
| 248 | /* Set shutter speed; int < 0 = auto; >= 0 = fixed, range 0..65535 */ | ||
| 249 | #define VIDIOCPWCSSHUTTER _IOW('v', 201, int) | ||
| 250 | |||
| 251 | /* Color compensation (Auto White Balance) */ | ||
| 252 | #define VIDIOCPWCSAWB _IOW('v', 202, struct pwc_whitebalance) | ||
| 253 | #define VIDIOCPWCGAWB _IOR('v', 202, struct pwc_whitebalance) | ||
| 254 | |||
| 255 | /* Auto WB speed */ | ||
| 256 | #define VIDIOCPWCSAWBSPEED _IOW('v', 203, struct pwc_wb_speed) | ||
| 257 | #define VIDIOCPWCGAWBSPEED _IOR('v', 203, struct pwc_wb_speed) | ||
| 258 | |||
| 259 | /* LEDs on/off/blink; int range 0..65535 */ | ||
| 260 | #define VIDIOCPWCSLED _IOW('v', 205, struct pwc_leds) | ||
| 261 | #define VIDIOCPWCGLED _IOR('v', 205, struct pwc_leds) | ||
| 262 | |||
| 263 | /* Contour (sharpness); int < 0 = auto, 0..65536 = fixed */ | ||
| 264 | #define VIDIOCPWCSCONTOUR _IOW('v', 206, int) | ||
| 265 | #define VIDIOCPWCGCONTOUR _IOR('v', 206, int) | ||
| 266 | |||
| 267 | /* Backlight compensation; 0 = off, otherwise on */ | ||
| 268 | #define VIDIOCPWCSBACKLIGHT _IOW('v', 207, int) | ||
| 269 | #define VIDIOCPWCGBACKLIGHT _IOR('v', 207, int) | ||
| 270 | |||
| 271 | /* Flickerless mode; = 0 off, otherwise on */ | ||
| 272 | #define VIDIOCPWCSFLICKER _IOW('v', 208, int) | ||
| 273 | #define VIDIOCPWCGFLICKER _IOR('v', 208, int) | ||
| 274 | |||
| 275 | /* Dynamic noise reduction; 0 off, 3 = high noise reduction */ | ||
| 276 | #define VIDIOCPWCSDYNNOISE _IOW('v', 209, int) | ||
| 277 | #define VIDIOCPWCGDYNNOISE _IOR('v', 209, int) | ||
| 278 | |||
| 279 | /* Real image size as used by the camera; tells you whether or not there's a gray border around the image */ | ||
| 280 | #define VIDIOCPWCGREALSIZE _IOR('v', 210, struct pwc_imagesize) | ||
| 281 | |||
| 282 | /* Motorized pan & tilt functions */ | ||
| 283 | #define VIDIOCPWCMPTRESET _IOW('v', 211, int) | ||
| 284 | #define VIDIOCPWCMPTGRANGE _IOR('v', 211, struct pwc_mpt_range) | ||
| 285 | #define VIDIOCPWCMPTSANGLE _IOW('v', 212, struct pwc_mpt_angles) | ||
| 286 | #define VIDIOCPWCMPTGANGLE _IOR('v', 212, struct pwc_mpt_angles) | ||
| 287 | #define VIDIOCPWCMPTSTATUS _IOR('v', 213, struct pwc_mpt_status) | ||
| 288 | |||
| 289 | /* Get the USB set-video command; needed for initializing libpwcx */ | ||
| 290 | #define VIDIOCPWCGVIDCMD _IOR('v', 215, struct pwc_video_command) | ||
| 291 | struct pwc_table_init_buffer { | ||
| 292 | int len; | ||
| 293 | char *buffer; | ||
| 294 | |||
| 295 | }; | ||
| 296 | #define VIDIOCPWCGVIDTABLE _IOR('v', 216, struct pwc_table_init_buffer) | ||
| 297 | |||
| 298 | /* | ||
| 299 | * This is private command used when communicating with v4l2. | ||
| 300 | * In the future all private ioctl will be remove/replace to | ||
| 301 | * use interface offer by v4l2. | ||
| 302 | */ | ||
| 303 | |||
| 304 | #define V4L2_CID_PRIVATE_SAVE_USER (V4L2_CID_PRIVATE_BASE + 0) | ||
| 305 | #define V4L2_CID_PRIVATE_RESTORE_USER (V4L2_CID_PRIVATE_BASE + 1) | ||
| 306 | #define V4L2_CID_PRIVATE_RESTORE_FACTORY (V4L2_CID_PRIVATE_BASE + 2) | ||
| 307 | #define V4L2_CID_PRIVATE_COLOUR_MODE (V4L2_CID_PRIVATE_BASE + 3) | ||
| 308 | #define V4L2_CID_PRIVATE_AUTOCONTOUR (V4L2_CID_PRIVATE_BASE + 4) | ||
| 309 | #define V4L2_CID_PRIVATE_CONTOUR (V4L2_CID_PRIVATE_BASE + 5) | ||
| 310 | #define V4L2_CID_PRIVATE_BACKLIGHT (V4L2_CID_PRIVATE_BASE + 6) | ||
| 311 | #define V4L2_CID_PRIVATE_FLICKERLESS (V4L2_CID_PRIVATE_BASE + 7) | ||
| 312 | #define V4L2_CID_PRIVATE_NOISE_REDUCTION (V4L2_CID_PRIVATE_BASE + 8) | ||
| 313 | |||
| 314 | struct pwc_raw_frame { | ||
| 315 | __le16 type; /* type of the webcam */ | ||
| 316 | __le16 vbandlength; /* Size of 4lines compressed (used by the decompressor) */ | ||
| 317 | __u8 cmd[4]; /* the four byte of the command (in case of nala, | ||
| 318 | only the first 3 bytes is filled) */ | ||
| 319 | __u8 rawframe[0]; /* frame_size = H/4*vbandlength */ | ||
| 320 | } __attribute__ ((packed)); | ||
| 321 | |||
| 322 | |||
| 323 | #endif | ||
diff --git a/drivers/media/video/pwc/pwc-kiara.c b/drivers/media/video/pwc/pwc-kiara.c index f4ae83c0cf2b..e5f4fd817125 100644 --- a/drivers/media/video/pwc/pwc-kiara.c +++ b/drivers/media/video/pwc/pwc-kiara.c | |||
| @@ -40,7 +40,6 @@ | |||
| 40 | 40 | ||
| 41 | 41 | ||
| 42 | #include "pwc-kiara.h" | 42 | #include "pwc-kiara.h" |
| 43 | #include "pwc-uncompress.h" | ||
| 44 | 43 | ||
| 45 | const unsigned int Kiara_fps_vector[PWC_FPS_MAX_KIARA] = { 5, 10, 15, 20, 25, 30 }; | 44 | const unsigned int Kiara_fps_vector[PWC_FPS_MAX_KIARA] = { 5, 10, 15, 20, 25, 30 }; |
| 46 | 45 | ||
diff --git a/drivers/media/video/pwc/pwc-misc.c b/drivers/media/video/pwc/pwc-misc.c index 6af5bb538358..0b031336eab8 100644 --- a/drivers/media/video/pwc/pwc-misc.c +++ b/drivers/media/video/pwc/pwc-misc.c | |||
| @@ -126,8 +126,4 @@ void pwc_construct(struct pwc_device *pdev) | |||
| 126 | pdev->pixfmt = V4L2_PIX_FMT_YUV420; /* default */ | 126 | pdev->pixfmt = V4L2_PIX_FMT_YUV420; /* default */ |
| 127 | pdev->view_min.size = pdev->view_min.x * pdev->view_min.y; | 127 | pdev->view_min.size = pdev->view_min.x * pdev->view_min.y; |
| 128 | pdev->view_max.size = pdev->view_max.x * pdev->view_max.y; | 128 | pdev->view_max.size = pdev->view_max.x * pdev->view_max.y; |
| 129 | /* length of image, in YUV format; always allocate enough memory. */ | ||
| 130 | pdev->len_per_image = PAGE_ALIGN((pdev->abs_max.x * pdev->abs_max.y * 3) / 2); | ||
| 131 | } | 129 | } |
| 132 | |||
| 133 | |||
diff --git a/drivers/media/video/pwc/pwc-uncompress.c b/drivers/media/video/pwc/pwc-uncompress.c index 3b73f295f032..51265092bd31 100644 --- a/drivers/media/video/pwc/pwc-uncompress.c +++ b/drivers/media/video/pwc/pwc-uncompress.c | |||
| @@ -30,26 +30,17 @@ | |||
| 30 | #include <asm/types.h> | 30 | #include <asm/types.h> |
| 31 | 31 | ||
| 32 | #include "pwc.h" | 32 | #include "pwc.h" |
| 33 | #include "pwc-uncompress.h" | ||
| 34 | #include "pwc-dec1.h" | 33 | #include "pwc-dec1.h" |
| 35 | #include "pwc-dec23.h" | 34 | #include "pwc-dec23.h" |
| 36 | 35 | ||
| 37 | int pwc_decompress(struct pwc_device *pdev) | 36 | int pwc_decompress(struct pwc_device *pdev, struct pwc_frame_buf *fbuf) |
| 38 | { | 37 | { |
| 39 | struct pwc_frame_buf *fbuf; | ||
| 40 | int n, line, col, stride; | 38 | int n, line, col, stride; |
| 41 | void *yuv, *image; | 39 | void *yuv, *image; |
| 42 | u16 *src; | 40 | u16 *src; |
| 43 | u16 *dsty, *dstu, *dstv; | 41 | u16 *dsty, *dstu, *dstv; |
| 44 | 42 | ||
| 45 | if (pdev == NULL) | 43 | image = vb2_plane_vaddr(&fbuf->vb, 0); |
| 46 | return -EFAULT; | ||
| 47 | |||
| 48 | fbuf = pdev->read_frame; | ||
| 49 | if (fbuf == NULL) | ||
| 50 | return -EFAULT; | ||
| 51 | image = pdev->image_data; | ||
| 52 | image += pdev->images[pdev->fill_image].offset; | ||
| 53 | 44 | ||
| 54 | yuv = fbuf->data + pdev->frame_header_size; /* Skip header */ | 45 | yuv = fbuf->data + pdev->frame_header_size; /* Skip header */ |
| 55 | 46 | ||
| @@ -64,9 +55,13 @@ int pwc_decompress(struct pwc_device *pdev) | |||
| 64 | * determine this using the type of the webcam */ | 55 | * determine this using the type of the webcam */ |
| 65 | memcpy(raw_frame->cmd, pdev->cmd_buf, 4); | 56 | memcpy(raw_frame->cmd, pdev->cmd_buf, 4); |
| 66 | memcpy(raw_frame+1, yuv, pdev->frame_size); | 57 | memcpy(raw_frame+1, yuv, pdev->frame_size); |
| 58 | vb2_set_plane_payload(&fbuf->vb, 0, | ||
| 59 | pdev->frame_size + sizeof(struct pwc_raw_frame)); | ||
| 67 | return 0; | 60 | return 0; |
| 68 | } | 61 | } |
| 69 | 62 | ||
| 63 | vb2_set_plane_payload(&fbuf->vb, 0, pdev->view.size); | ||
| 64 | |||
| 70 | if (pdev->vbandlength == 0) { | 65 | if (pdev->vbandlength == 0) { |
| 71 | /* Uncompressed mode. | 66 | /* Uncompressed mode. |
| 72 | * We copy the data into the output buffer, using the viewport | 67 | * We copy the data into the output buffer, using the viewport |
diff --git a/drivers/media/video/pwc/pwc-uncompress.h b/drivers/media/video/pwc/pwc-uncompress.h deleted file mode 100644 index 43028e74e9e0..000000000000 --- a/drivers/media/video/pwc/pwc-uncompress.h +++ /dev/null | |||
| @@ -1,40 +0,0 @@ | |||
| 1 | /* (C) 1999-2003 Nemosoft Unv. | ||
| 2 | (C) 2004-2006 Luc Saillard (luc@saillard.org) | ||
| 3 | |||
| 4 | NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx | ||
| 5 | driver and thus may have bugs that are not present in the original version. | ||
| 6 | Please send bug reports and support requests to <luc@saillard.org>. | ||
| 7 | The decompression routines have been implemented by reverse-engineering the | ||
| 8 | Nemosoft binary pwcx module. Caveat emptor. | ||
| 9 | |||
| 10 | This program is free software; you can redistribute it and/or modify | ||
| 11 | it under the terms of the GNU General Public License as published by | ||
| 12 | the Free Software Foundation; either version 2 of the License, or | ||
| 13 | (at your option) any later version. | ||
| 14 | |||
| 15 | This program is distributed in the hope that it will be useful, | ||
| 16 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 18 | GNU General Public License for more details. | ||
| 19 | |||
| 20 | You should have received a copy of the GNU General Public License | ||
| 21 | along with this program; if not, write to the Free Software | ||
| 22 | Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 23 | */ | ||
| 24 | |||
| 25 | /* This file is the bridge between the kernel module and the plugin; it | ||
| 26 | describes the structures and datatypes used in both modules. Any | ||
| 27 | significant change should be reflected by increasing the | ||
| 28 | pwc_decompressor_version major number. | ||
| 29 | */ | ||
| 30 | #ifndef PWC_UNCOMPRESS_H | ||
| 31 | #define PWC_UNCOMPRESS_H | ||
| 32 | |||
| 33 | |||
| 34 | #include <media/pwc-ioctl.h> | ||
| 35 | |||
| 36 | /* from pwc-dec.h */ | ||
| 37 | #define PWCX_FLAG_PLANAR 0x0001 | ||
| 38 | /* */ | ||
| 39 | |||
| 40 | #endif | ||
diff --git a/drivers/media/video/pwc/pwc-v4l.c b/drivers/media/video/pwc/pwc-v4l.c index f85c51249c7b..e9a0e94b9995 100644 --- a/drivers/media/video/pwc/pwc-v4l.c +++ b/drivers/media/video/pwc/pwc-v4l.c | |||
| @@ -2,6 +2,7 @@ | |||
| 2 | USB and Video4Linux interface part. | 2 | USB and Video4Linux interface part. |
| 3 | (C) 1999-2004 Nemosoft Unv. | 3 | (C) 1999-2004 Nemosoft Unv. |
| 4 | (C) 2004-2006 Luc Saillard (luc@saillard.org) | 4 | (C) 2004-2006 Luc Saillard (luc@saillard.org) |
| 5 | (C) 2011 Hans de Goede <hdegoede@redhat.com> | ||
| 5 | 6 | ||
| 6 | NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx | 7 | NOTE: this version of pwc is an unofficial (modified) release of pwc & pcwx |
| 7 | driver and thus may have bugs that are not present in the original version. | 8 | driver and thus may have bugs that are not present in the original version. |
| @@ -31,184 +32,330 @@ | |||
| 31 | #include <linux/module.h> | 32 | #include <linux/module.h> |
| 32 | #include <linux/poll.h> | 33 | #include <linux/poll.h> |
| 33 | #include <linux/vmalloc.h> | 34 | #include <linux/vmalloc.h> |
| 35 | #include <linux/jiffies.h> | ||
| 34 | #include <asm/io.h> | 36 | #include <asm/io.h> |
| 35 | 37 | ||
| 36 | #include "pwc.h" | 38 | #include "pwc.h" |
| 37 | 39 | ||
| 38 | static struct v4l2_queryctrl pwc_controls[] = { | 40 | #define PWC_CID_CUSTOM(ctrl) ((V4L2_CID_USER_BASE | 0xf000) + custom_ ## ctrl) |
| 39 | { | 41 | |
| 40 | .id = V4L2_CID_BRIGHTNESS, | 42 | static int pwc_g_volatile_ctrl(struct v4l2_ctrl *ctrl); |
| 41 | .type = V4L2_CTRL_TYPE_INTEGER, | 43 | static int pwc_s_ctrl(struct v4l2_ctrl *ctrl); |
| 42 | .name = "Brightness", | 44 | |
| 43 | .minimum = 0, | 45 | static const struct v4l2_ctrl_ops pwc_ctrl_ops = { |
| 44 | .maximum = 128, | 46 | .g_volatile_ctrl = pwc_g_volatile_ctrl, |
| 45 | .step = 1, | 47 | .s_ctrl = pwc_s_ctrl, |
| 46 | .default_value = 64, | 48 | }; |
| 47 | }, | 49 | |
| 48 | { | 50 | enum { awb_indoor, awb_outdoor, awb_fl, awb_manual, awb_auto }; |
| 49 | .id = V4L2_CID_CONTRAST, | 51 | enum { custom_autocontour, custom_contour, custom_noise_reduction, |
| 50 | .type = V4L2_CTRL_TYPE_INTEGER, | 52 | custom_save_user, custom_restore_user, custom_restore_factory }; |
| 51 | .name = "Contrast", | 53 | |
| 52 | .minimum = 0, | 54 | const char * const pwc_auto_whitebal_qmenu[] = { |
| 53 | .maximum = 64, | 55 | "Indoor (Incandescant Lighting) Mode", |
| 54 | .step = 1, | 56 | "Outdoor (Sunlight) Mode", |
| 55 | .default_value = 0, | 57 | "Indoor (Fluorescent Lighting) Mode", |
| 56 | }, | 58 | "Manual Mode", |
| 57 | { | 59 | "Auto Mode", |
| 58 | .id = V4L2_CID_SATURATION, | 60 | NULL |
| 59 | .type = V4L2_CTRL_TYPE_INTEGER, | 61 | }; |
| 60 | .name = "Saturation", | 62 | |
| 61 | .minimum = -100, | 63 | static const struct v4l2_ctrl_config pwc_auto_white_balance_cfg = { |
| 62 | .maximum = 100, | 64 | .ops = &pwc_ctrl_ops, |
| 63 | .step = 1, | 65 | .id = V4L2_CID_AUTO_WHITE_BALANCE, |
| 64 | .default_value = 0, | 66 | .type = V4L2_CTRL_TYPE_MENU, |
| 65 | }, | 67 | .max = awb_auto, |
| 66 | { | 68 | .qmenu = pwc_auto_whitebal_qmenu, |
| 67 | .id = V4L2_CID_GAMMA, | 69 | }; |
| 68 | .type = V4L2_CTRL_TYPE_INTEGER, | 70 | |
| 69 | .name = "Gamma", | 71 | static const struct v4l2_ctrl_config pwc_autocontour_cfg = { |
| 70 | .minimum = 0, | 72 | .ops = &pwc_ctrl_ops, |
| 71 | .maximum = 32, | 73 | .id = PWC_CID_CUSTOM(autocontour), |
| 72 | .step = 1, | 74 | .type = V4L2_CTRL_TYPE_BOOLEAN, |
| 73 | .default_value = 0, | 75 | .name = "Auto contour", |
| 74 | }, | 76 | .min = 0, |
| 75 | { | 77 | .max = 1, |
| 76 | .id = V4L2_CID_RED_BALANCE, | 78 | .step = 1, |
| 77 | .type = V4L2_CTRL_TYPE_INTEGER, | 79 | }; |
| 78 | .name = "Red Gain", | 80 | |
| 79 | .minimum = 0, | 81 | static const struct v4l2_ctrl_config pwc_contour_cfg = { |
| 80 | .maximum = 256, | 82 | .ops = &pwc_ctrl_ops, |
| 81 | .step = 1, | 83 | .id = PWC_CID_CUSTOM(contour), |
| 82 | .default_value = 0, | 84 | .type = V4L2_CTRL_TYPE_INTEGER, |
| 83 | }, | 85 | .name = "Contour", |
| 84 | { | 86 | .min = 0, |
| 85 | .id = V4L2_CID_BLUE_BALANCE, | 87 | .max = 63, |
| 86 | .type = V4L2_CTRL_TYPE_INTEGER, | 88 | .step = 1, |
| 87 | .name = "Blue Gain", | 89 | }; |
| 88 | .minimum = 0, | 90 | |
| 89 | .maximum = 256, | 91 | static const struct v4l2_ctrl_config pwc_backlight_cfg = { |
| 90 | .step = 1, | 92 | .ops = &pwc_ctrl_ops, |
| 91 | .default_value = 0, | 93 | .id = V4L2_CID_BACKLIGHT_COMPENSATION, |
| 92 | }, | 94 | .type = V4L2_CTRL_TYPE_BOOLEAN, |
| 93 | { | 95 | .min = 0, |
| 94 | .id = V4L2_CID_AUTO_WHITE_BALANCE, | 96 | .max = 1, |
| 95 | .type = V4L2_CTRL_TYPE_BOOLEAN, | 97 | .step = 1, |
| 96 | .name = "Auto White Balance", | 98 | }; |
| 97 | .minimum = 0, | 99 | |
| 98 | .maximum = 1, | 100 | static const struct v4l2_ctrl_config pwc_flicker_cfg = { |
| 99 | .step = 1, | 101 | .ops = &pwc_ctrl_ops, |
| 100 | .default_value = 0, | 102 | .id = V4L2_CID_BAND_STOP_FILTER, |
| 101 | }, | 103 | .type = V4L2_CTRL_TYPE_BOOLEAN, |
| 102 | { | 104 | .min = 0, |
| 103 | .id = V4L2_CID_EXPOSURE, | 105 | .max = 1, |
| 104 | .type = V4L2_CTRL_TYPE_INTEGER, | 106 | .step = 1, |
| 105 | .name = "Shutter Speed (Exposure)", | 107 | }; |
| 106 | .minimum = 0, | 108 | |
| 107 | .maximum = 256, | 109 | static const struct v4l2_ctrl_config pwc_noise_reduction_cfg = { |
| 108 | .step = 1, | 110 | .ops = &pwc_ctrl_ops, |
| 109 | .default_value = 200, | 111 | .id = PWC_CID_CUSTOM(noise_reduction), |
| 110 | }, | 112 | .type = V4L2_CTRL_TYPE_INTEGER, |
| 111 | { | 113 | .name = "Dynamic Noise Reduction", |
| 112 | .id = V4L2_CID_AUTOGAIN, | 114 | .min = 0, |
| 113 | .type = V4L2_CTRL_TYPE_BOOLEAN, | 115 | .max = 3, |
| 114 | .name = "Auto Gain Enabled", | 116 | .step = 1, |
| 115 | .minimum = 0, | 117 | }; |
| 116 | .maximum = 1, | 118 | |
| 117 | .step = 1, | 119 | static const struct v4l2_ctrl_config pwc_save_user_cfg = { |
| 118 | .default_value = 1, | 120 | .ops = &pwc_ctrl_ops, |
| 119 | }, | 121 | .id = PWC_CID_CUSTOM(save_user), |
| 120 | { | 122 | .type = V4L2_CTRL_TYPE_BUTTON, |
| 121 | .id = V4L2_CID_GAIN, | 123 | .name = "Save User Settings", |
| 122 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 123 | .name = "Gain Level", | ||
| 124 | .minimum = 0, | ||
| 125 | .maximum = 256, | ||
| 126 | .step = 1, | ||
| 127 | .default_value = 0, | ||
| 128 | }, | ||
| 129 | { | ||
| 130 | .id = V4L2_CID_PRIVATE_SAVE_USER, | ||
| 131 | .type = V4L2_CTRL_TYPE_BUTTON, | ||
| 132 | .name = "Save User Settings", | ||
| 133 | .minimum = 0, | ||
| 134 | .maximum = 0, | ||
| 135 | .step = 0, | ||
| 136 | .default_value = 0, | ||
| 137 | }, | ||
| 138 | { | ||
| 139 | .id = V4L2_CID_PRIVATE_RESTORE_USER, | ||
| 140 | .type = V4L2_CTRL_TYPE_BUTTON, | ||
| 141 | .name = "Restore User Settings", | ||
| 142 | .minimum = 0, | ||
| 143 | .maximum = 0, | ||
| 144 | .step = 0, | ||
| 145 | .default_value = 0, | ||
| 146 | }, | ||
| 147 | { | ||
| 148 | .id = V4L2_CID_PRIVATE_RESTORE_FACTORY, | ||
| 149 | .type = V4L2_CTRL_TYPE_BUTTON, | ||
| 150 | .name = "Restore Factory Settings", | ||
| 151 | .minimum = 0, | ||
| 152 | .maximum = 0, | ||
| 153 | .step = 0, | ||
| 154 | .default_value = 0, | ||
| 155 | }, | ||
| 156 | { | ||
| 157 | .id = V4L2_CID_PRIVATE_COLOUR_MODE, | ||
| 158 | .type = V4L2_CTRL_TYPE_BOOLEAN, | ||
| 159 | .name = "Colour mode", | ||
| 160 | .minimum = 0, | ||
| 161 | .maximum = 1, | ||
| 162 | .step = 1, | ||
| 163 | .default_value = 0, | ||
| 164 | }, | ||
| 165 | { | ||
| 166 | .id = V4L2_CID_PRIVATE_AUTOCONTOUR, | ||
| 167 | .type = V4L2_CTRL_TYPE_BOOLEAN, | ||
| 168 | .name = "Auto contour", | ||
| 169 | .minimum = 0, | ||
| 170 | .maximum = 1, | ||
| 171 | .step = 1, | ||
| 172 | .default_value = 0, | ||
| 173 | }, | ||
| 174 | { | ||
| 175 | .id = V4L2_CID_PRIVATE_CONTOUR, | ||
| 176 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 177 | .name = "Contour", | ||
| 178 | .minimum = 0, | ||
| 179 | .maximum = 63, | ||
| 180 | .step = 1, | ||
| 181 | .default_value = 0, | ||
| 182 | }, | ||
| 183 | { | ||
| 184 | .id = V4L2_CID_PRIVATE_BACKLIGHT, | ||
| 185 | .type = V4L2_CTRL_TYPE_BOOLEAN, | ||
| 186 | .name = "Backlight compensation", | ||
| 187 | .minimum = 0, | ||
| 188 | .maximum = 1, | ||
| 189 | .step = 1, | ||
| 190 | .default_value = 0, | ||
| 191 | }, | ||
| 192 | { | ||
| 193 | .id = V4L2_CID_PRIVATE_FLICKERLESS, | ||
| 194 | .type = V4L2_CTRL_TYPE_BOOLEAN, | ||
| 195 | .name = "Flickerless", | ||
| 196 | .minimum = 0, | ||
| 197 | .maximum = 1, | ||
| 198 | .step = 1, | ||
| 199 | .default_value = 0, | ||
| 200 | }, | ||
| 201 | { | ||
| 202 | .id = V4L2_CID_PRIVATE_NOISE_REDUCTION, | ||
| 203 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 204 | .name = "Noise reduction", | ||
| 205 | .minimum = 0, | ||
| 206 | .maximum = 3, | ||
| 207 | .step = 1, | ||
| 208 | .default_value = 0, | ||
| 209 | }, | ||
| 210 | }; | 124 | }; |
| 211 | 125 | ||
| 126 | static const struct v4l2_ctrl_config pwc_restore_user_cfg = { | ||
| 127 | .ops = &pwc_ctrl_ops, | ||
| 128 | .id = PWC_CID_CUSTOM(restore_user), | ||
| 129 | .type = V4L2_CTRL_TYPE_BUTTON, | ||
| 130 | .name = "Restore User Settings", | ||
| 131 | }; | ||
| 132 | |||
| 133 | static const struct v4l2_ctrl_config pwc_restore_factory_cfg = { | ||
| 134 | .ops = &pwc_ctrl_ops, | ||
| 135 | .id = PWC_CID_CUSTOM(restore_factory), | ||
| 136 | .type = V4L2_CTRL_TYPE_BUTTON, | ||
| 137 | .name = "Restore Factory Settings", | ||
| 138 | }; | ||
| 139 | |||
| 140 | int pwc_init_controls(struct pwc_device *pdev) | ||
| 141 | { | ||
| 142 | struct v4l2_ctrl_handler *hdl; | ||
| 143 | struct v4l2_ctrl_config cfg; | ||
| 144 | int r, def; | ||
| 145 | |||
| 146 | hdl = &pdev->ctrl_handler; | ||
| 147 | r = v4l2_ctrl_handler_init(hdl, 20); | ||
| 148 | if (r) | ||
| 149 | return r; | ||
| 150 | |||
| 151 | /* Brightness, contrast, saturation, gamma */ | ||
| 152 | r = pwc_get_u8_ctrl(pdev, GET_LUM_CTL, BRIGHTNESS_FORMATTER, &def); | ||
| 153 | if (r || def > 127) | ||
| 154 | def = 63; | ||
| 155 | pdev->brightness = v4l2_ctrl_new_std(hdl, &pwc_ctrl_ops, | ||
| 156 | V4L2_CID_BRIGHTNESS, 0, 127, 1, def); | ||
| 157 | |||
| 158 | r = pwc_get_u8_ctrl(pdev, GET_LUM_CTL, CONTRAST_FORMATTER, &def); | ||
| 159 | if (r || def > 63) | ||
| 160 | def = 31; | ||
| 161 | pdev->contrast = v4l2_ctrl_new_std(hdl, &pwc_ctrl_ops, | ||
| 162 | V4L2_CID_CONTRAST, 0, 63, 1, def); | ||
| 163 | |||
| 164 | if (pdev->type >= 675) { | ||
| 165 | if (pdev->type < 730) | ||
| 166 | pdev->saturation_fmt = SATURATION_MODE_FORMATTER2; | ||
| 167 | else | ||
| 168 | pdev->saturation_fmt = SATURATION_MODE_FORMATTER1; | ||
| 169 | r = pwc_get_s8_ctrl(pdev, GET_CHROM_CTL, pdev->saturation_fmt, | ||
| 170 | &def); | ||
| 171 | if (r || def < -100 || def > 100) | ||
| 172 | def = 0; | ||
| 173 | pdev->saturation = v4l2_ctrl_new_std(hdl, &pwc_ctrl_ops, | ||
| 174 | V4L2_CID_SATURATION, -100, 100, 1, def); | ||
| 175 | } | ||
| 176 | |||
| 177 | r = pwc_get_u8_ctrl(pdev, GET_LUM_CTL, GAMMA_FORMATTER, &def); | ||
| 178 | if (r || def > 31) | ||
| 179 | def = 15; | ||
| 180 | pdev->gamma = v4l2_ctrl_new_std(hdl, &pwc_ctrl_ops, | ||
| 181 | V4L2_CID_GAMMA, 0, 31, 1, def); | ||
| 182 | |||
| 183 | /* auto white balance, red gain, blue gain */ | ||
| 184 | r = pwc_get_u8_ctrl(pdev, GET_CHROM_CTL, WB_MODE_FORMATTER, &def); | ||
| 185 | if (r || def > awb_auto) | ||
| 186 | def = awb_auto; | ||
| 187 | cfg = pwc_auto_white_balance_cfg; | ||
| 188 | cfg.name = v4l2_ctrl_get_name(cfg.id); | ||
| 189 | cfg.def = def; | ||
| 190 | pdev->auto_white_balance = v4l2_ctrl_new_custom(hdl, &cfg, NULL); | ||
| 191 | /* check auto controls to avoid NULL deref in v4l2_ctrl_auto_cluster */ | ||
| 192 | if (!pdev->auto_white_balance) | ||
| 193 | return hdl->error; | ||
| 194 | |||
| 195 | r = pwc_get_u8_ctrl(pdev, GET_CHROM_CTL, | ||
| 196 | PRESET_MANUAL_RED_GAIN_FORMATTER, &def); | ||
| 197 | if (r) | ||
| 198 | def = 127; | ||
| 199 | pdev->red_balance = v4l2_ctrl_new_std(hdl, &pwc_ctrl_ops, | ||
| 200 | V4L2_CID_RED_BALANCE, 0, 255, 1, def); | ||
| 201 | |||
| 202 | r = pwc_get_u8_ctrl(pdev, GET_CHROM_CTL, | ||
| 203 | PRESET_MANUAL_BLUE_GAIN_FORMATTER, &def); | ||
| 204 | if (r) | ||
| 205 | def = 127; | ||
| 206 | pdev->blue_balance = v4l2_ctrl_new_std(hdl, &pwc_ctrl_ops, | ||
| 207 | V4L2_CID_BLUE_BALANCE, 0, 255, 1, def); | ||
| 208 | |||
| 209 | v4l2_ctrl_auto_cluster(3, &pdev->auto_white_balance, awb_manual, | ||
| 210 | pdev->auto_white_balance->cur.val == awb_auto); | ||
| 211 | |||
| 212 | /* autogain, gain */ | ||
| 213 | r = pwc_get_u8_ctrl(pdev, GET_LUM_CTL, AGC_MODE_FORMATTER, &def); | ||
| 214 | if (r || (def != 0 && def != 0xff)) | ||
| 215 | def = 0; | ||
| 216 | /* Note a register value if 0 means auto gain is on */ | ||
| 217 | pdev->autogain = v4l2_ctrl_new_std(hdl, &pwc_ctrl_ops, | ||
| 218 | V4L2_CID_AUTOGAIN, 0, 1, 1, def == 0); | ||
| 219 | if (!pdev->autogain) | ||
| 220 | return hdl->error; | ||
| 221 | |||
| 222 | r = pwc_get_u8_ctrl(pdev, GET_LUM_CTL, PRESET_AGC_FORMATTER, &def); | ||
| 223 | if (r || def > 63) | ||
| 224 | def = 31; | ||
| 225 | pdev->gain = v4l2_ctrl_new_std(hdl, &pwc_ctrl_ops, | ||
| 226 | V4L2_CID_GAIN, 0, 63, 1, def); | ||
| 227 | |||
| 228 | /* auto exposure, exposure */ | ||
| 229 | if (DEVICE_USE_CODEC2(pdev->type)) { | ||
| 230 | r = pwc_get_u8_ctrl(pdev, GET_LUM_CTL, SHUTTER_MODE_FORMATTER, | ||
| 231 | &def); | ||
| 232 | if (r || (def != 0 && def != 0xff)) | ||
| 233 | def = 0; | ||
| 234 | /* | ||
| 235 | * def = 0 auto, def = ff manual | ||
| 236 | * menu idx 0 = auto, idx 1 = manual | ||
| 237 | */ | ||
| 238 | pdev->exposure_auto = v4l2_ctrl_new_std_menu(hdl, | ||
| 239 | &pwc_ctrl_ops, | ||
| 240 | V4L2_CID_EXPOSURE_AUTO, | ||
| 241 | 1, 0, def != 0); | ||
| 242 | if (!pdev->exposure_auto) | ||
| 243 | return hdl->error; | ||
| 244 | |||
| 245 | /* GET_LUM_CTL, PRESET_SHUTTER_FORMATTER is unreliable */ | ||
| 246 | r = pwc_get_u16_ctrl(pdev, GET_STATUS_CTL, | ||
| 247 | READ_SHUTTER_FORMATTER, &def); | ||
| 248 | if (r || def > 655) | ||
| 249 | def = 655; | ||
| 250 | pdev->exposure = v4l2_ctrl_new_std(hdl, &pwc_ctrl_ops, | ||
| 251 | V4L2_CID_EXPOSURE, 0, 655, 1, def); | ||
| 252 | /* CODEC2: separate auto gain & auto exposure */ | ||
| 253 | v4l2_ctrl_auto_cluster(2, &pdev->autogain, 0, true); | ||
| 254 | v4l2_ctrl_auto_cluster(2, &pdev->exposure_auto, | ||
| 255 | V4L2_EXPOSURE_MANUAL, true); | ||
| 256 | } else if (DEVICE_USE_CODEC3(pdev->type)) { | ||
| 257 | /* GET_LUM_CTL, PRESET_SHUTTER_FORMATTER is unreliable */ | ||
| 258 | r = pwc_get_u16_ctrl(pdev, GET_STATUS_CTL, | ||
| 259 | READ_SHUTTER_FORMATTER, &def); | ||
| 260 | if (r || def > 255) | ||
| 261 | def = 255; | ||
| 262 | pdev->exposure = v4l2_ctrl_new_std(hdl, &pwc_ctrl_ops, | ||
| 263 | V4L2_CID_EXPOSURE, 0, 255, 1, def); | ||
| 264 | /* CODEC3: both gain and exposure controlled by autogain */ | ||
| 265 | pdev->autogain_expo_cluster[0] = pdev->autogain; | ||
| 266 | pdev->autogain_expo_cluster[1] = pdev->gain; | ||
| 267 | pdev->autogain_expo_cluster[2] = pdev->exposure; | ||
| 268 | v4l2_ctrl_auto_cluster(3, pdev->autogain_expo_cluster, | ||
| 269 | 0, true); | ||
| 270 | } | ||
| 271 | |||
| 272 | /* color / bw setting */ | ||
| 273 | r = pwc_get_u8_ctrl(pdev, GET_CHROM_CTL, COLOUR_MODE_FORMATTER, | ||
| 274 | &def); | ||
| 275 | if (r || (def != 0 && def != 0xff)) | ||
| 276 | def = 0xff; | ||
| 277 | /* def = 0 bw, def = ff color, menu idx 0 = color, idx 1 = bw */ | ||
| 278 | pdev->colorfx = v4l2_ctrl_new_std_menu(hdl, &pwc_ctrl_ops, | ||
| 279 | V4L2_CID_COLORFX, 1, 0, def == 0); | ||
| 280 | |||
| 281 | /* autocontour, contour */ | ||
| 282 | r = pwc_get_u8_ctrl(pdev, GET_LUM_CTL, AUTO_CONTOUR_FORMATTER, &def); | ||
| 283 | if (r || (def != 0 && def != 0xff)) | ||
| 284 | def = 0; | ||
| 285 | cfg = pwc_autocontour_cfg; | ||
| 286 | cfg.def = def == 0; | ||
| 287 | pdev->autocontour = v4l2_ctrl_new_custom(hdl, &cfg, NULL); | ||
| 288 | if (!pdev->autocontour) | ||
| 289 | return hdl->error; | ||
| 290 | |||
| 291 | r = pwc_get_u8_ctrl(pdev, GET_LUM_CTL, PRESET_CONTOUR_FORMATTER, &def); | ||
| 292 | if (r || def > 63) | ||
| 293 | def = 31; | ||
| 294 | cfg = pwc_contour_cfg; | ||
| 295 | cfg.def = def; | ||
| 296 | pdev->contour = v4l2_ctrl_new_custom(hdl, &cfg, NULL); | ||
| 297 | |||
| 298 | v4l2_ctrl_auto_cluster(2, &pdev->autocontour, 0, false); | ||
| 299 | |||
| 300 | /* backlight */ | ||
| 301 | r = pwc_get_u8_ctrl(pdev, GET_LUM_CTL, | ||
| 302 | BACK_LIGHT_COMPENSATION_FORMATTER, &def); | ||
| 303 | if (r || (def != 0 && def != 0xff)) | ||
| 304 | def = 0; | ||
| 305 | cfg = pwc_backlight_cfg; | ||
| 306 | cfg.name = v4l2_ctrl_get_name(cfg.id); | ||
| 307 | cfg.def = def == 0; | ||
| 308 | pdev->backlight = v4l2_ctrl_new_custom(hdl, &cfg, NULL); | ||
| 309 | |||
| 310 | /* flikker rediction */ | ||
| 311 | r = pwc_get_u8_ctrl(pdev, GET_LUM_CTL, | ||
| 312 | FLICKERLESS_MODE_FORMATTER, &def); | ||
| 313 | if (r || (def != 0 && def != 0xff)) | ||
| 314 | def = 0; | ||
| 315 | cfg = pwc_flicker_cfg; | ||
| 316 | cfg.name = v4l2_ctrl_get_name(cfg.id); | ||
| 317 | cfg.def = def == 0; | ||
| 318 | pdev->flicker = v4l2_ctrl_new_custom(hdl, &cfg, NULL); | ||
| 319 | |||
| 320 | /* Dynamic noise reduction */ | ||
| 321 | r = pwc_get_u8_ctrl(pdev, GET_LUM_CTL, | ||
| 322 | DYNAMIC_NOISE_CONTROL_FORMATTER, &def); | ||
| 323 | if (r || def > 3) | ||
| 324 | def = 2; | ||
| 325 | cfg = pwc_noise_reduction_cfg; | ||
| 326 | cfg.def = def; | ||
| 327 | pdev->noise_reduction = v4l2_ctrl_new_custom(hdl, &cfg, NULL); | ||
| 328 | |||
| 329 | /* Save / Restore User / Factory Settings */ | ||
| 330 | pdev->save_user = v4l2_ctrl_new_custom(hdl, &pwc_save_user_cfg, NULL); | ||
| 331 | pdev->restore_user = v4l2_ctrl_new_custom(hdl, &pwc_restore_user_cfg, | ||
| 332 | NULL); | ||
| 333 | if (pdev->restore_user) | ||
| 334 | pdev->restore_user->flags = V4L2_CTRL_FLAG_UPDATE; | ||
| 335 | pdev->restore_factory = v4l2_ctrl_new_custom(hdl, | ||
| 336 | &pwc_restore_factory_cfg, | ||
| 337 | NULL); | ||
| 338 | if (pdev->restore_factory) | ||
| 339 | pdev->restore_factory->flags = V4L2_CTRL_FLAG_UPDATE; | ||
| 340 | |||
| 341 | if (!pdev->features & FEATURE_MOTOR_PANTILT) | ||
| 342 | return hdl->error; | ||
| 343 | |||
| 344 | /* Motor pan / tilt / reset */ | ||
| 345 | pdev->motor_pan = v4l2_ctrl_new_std(hdl, &pwc_ctrl_ops, | ||
| 346 | V4L2_CID_PAN_RELATIVE, -4480, 4480, 64, 0); | ||
| 347 | if (!pdev->motor_pan) | ||
| 348 | return hdl->error; | ||
| 349 | pdev->motor_tilt = v4l2_ctrl_new_std(hdl, &pwc_ctrl_ops, | ||
| 350 | V4L2_CID_TILT_RELATIVE, -1920, 1920, 64, 0); | ||
| 351 | pdev->motor_pan_reset = v4l2_ctrl_new_std(hdl, &pwc_ctrl_ops, | ||
| 352 | V4L2_CID_PAN_RESET, 0, 0, 0, 0); | ||
| 353 | pdev->motor_tilt_reset = v4l2_ctrl_new_std(hdl, &pwc_ctrl_ops, | ||
| 354 | V4L2_CID_TILT_RESET, 0, 0, 0, 0); | ||
| 355 | v4l2_ctrl_cluster(4, &pdev->motor_pan); | ||
| 356 | |||
| 357 | return hdl->error; | ||
| 358 | } | ||
| 212 | 359 | ||
| 213 | static void pwc_vidioc_fill_fmt(const struct pwc_device *pdev, struct v4l2_format *f) | 360 | static void pwc_vidioc_fill_fmt(const struct pwc_device *pdev, struct v4l2_format *f) |
| 214 | { | 361 | { |
| @@ -284,10 +431,21 @@ static int pwc_vidioc_try_fmt(struct pwc_device *pdev, struct v4l2_format *f) | |||
| 284 | } | 431 | } |
| 285 | 432 | ||
| 286 | /* ioctl(VIDIOC_SET_FMT) */ | 433 | /* ioctl(VIDIOC_SET_FMT) */ |
| 287 | static int pwc_vidioc_set_fmt(struct pwc_device *pdev, struct v4l2_format *f) | 434 | |
| 435 | static int pwc_s_fmt_vid_cap(struct file *file, void *fh, struct v4l2_format *f) | ||
| 288 | { | 436 | { |
| 437 | struct pwc_device *pdev = video_drvdata(file); | ||
| 289 | int ret, fps, snapshot, compression, pixelformat; | 438 | int ret, fps, snapshot, compression, pixelformat; |
| 290 | 439 | ||
| 440 | if (!pdev->udev) | ||
| 441 | return -ENODEV; | ||
| 442 | |||
| 443 | if (pdev->capt_file != NULL && | ||
| 444 | pdev->capt_file != file) | ||
| 445 | return -EBUSY; | ||
| 446 | |||
| 447 | pdev->capt_file = file; | ||
| 448 | |||
| 291 | ret = pwc_vidioc_try_fmt(pdev, f); | 449 | ret = pwc_vidioc_try_fmt(pdev, f); |
| 292 | if (ret<0) | 450 | if (ret<0) |
| 293 | return ret; | 451 | return ret; |
| @@ -309,7 +467,7 @@ static int pwc_vidioc_set_fmt(struct pwc_device *pdev, struct v4l2_format *f) | |||
| 309 | pixelformat != V4L2_PIX_FMT_PWC2) | 467 | pixelformat != V4L2_PIX_FMT_PWC2) |
| 310 | return -EINVAL; | 468 | return -EINVAL; |
| 311 | 469 | ||
| 312 | if (pdev->iso_init) | 470 | if (vb2_is_streaming(&pdev->vb_queue)) |
| 313 | return -EBUSY; | 471 | return -EBUSY; |
| 314 | 472 | ||
| 315 | PWC_DEBUG_IOCTL("Trying to set format to: width=%d height=%d fps=%d " | 473 | PWC_DEBUG_IOCTL("Trying to set format to: width=%d height=%d fps=%d " |
| @@ -343,13 +501,14 @@ static int pwc_vidioc_set_fmt(struct pwc_device *pdev, struct v4l2_format *f) | |||
| 343 | 501 | ||
| 344 | static int pwc_querycap(struct file *file, void *fh, struct v4l2_capability *cap) | 502 | static int pwc_querycap(struct file *file, void *fh, struct v4l2_capability *cap) |
| 345 | { | 503 | { |
| 346 | struct video_device *vdev = video_devdata(file); | ||
| 347 | struct pwc_device *pdev = video_drvdata(file); | 504 | struct pwc_device *pdev = video_drvdata(file); |
| 348 | 505 | ||
| 506 | if (!pdev->udev) | ||
| 507 | return -ENODEV; | ||
| 508 | |||
| 349 | strcpy(cap->driver, PWC_NAME); | 509 | strcpy(cap->driver, PWC_NAME); |
| 350 | strlcpy(cap->card, vdev->name, sizeof(cap->card)); | 510 | strlcpy(cap->card, pdev->vdev.name, sizeof(cap->card)); |
| 351 | usb_make_path(pdev->udev, cap->bus_info, sizeof(cap->bus_info)); | 511 | usb_make_path(pdev->udev, cap->bus_info, sizeof(cap->bus_info)); |
| 352 | cap->version = PWC_VERSION_CODE; | ||
| 353 | cap->capabilities = | 512 | cap->capabilities = |
| 354 | V4L2_CAP_VIDEO_CAPTURE | | 513 | V4L2_CAP_VIDEO_CAPTURE | |
| 355 | V4L2_CAP_STREAMING | | 514 | V4L2_CAP_STREAMING | |
| @@ -377,255 +536,396 @@ static int pwc_s_input(struct file *file, void *fh, unsigned int i) | |||
| 377 | return i ? -EINVAL : 0; | 536 | return i ? -EINVAL : 0; |
| 378 | } | 537 | } |
| 379 | 538 | ||
| 380 | static int pwc_queryctrl(struct file *file, void *fh, struct v4l2_queryctrl *c) | 539 | static int pwc_g_volatile_ctrl(struct v4l2_ctrl *ctrl) |
| 381 | { | 540 | { |
| 382 | int i, idx; | 541 | struct pwc_device *pdev = |
| 383 | u32 id; | 542 | container_of(ctrl->handler, struct pwc_device, ctrl_handler); |
| 384 | 543 | int ret = 0; | |
| 385 | id = c->id; | 544 | |
| 386 | if (id & V4L2_CTRL_FLAG_NEXT_CTRL) { | 545 | /* |
| 387 | id &= V4L2_CTRL_ID_MASK; | 546 | * Sometimes it can take quite long for the pwc to complete usb control |
| 388 | id++; | 547 | * transfers, so release the modlock to give streaming by another |
| 389 | idx = -1; | 548 | * process / thread the chance to continue with a dqbuf. |
| 390 | for (i = 0; i < ARRAY_SIZE(pwc_controls); i++) { | 549 | */ |
| 391 | if (pwc_controls[i].id < id) | 550 | mutex_unlock(&pdev->modlock); |
| 392 | continue; | 551 | |
| 393 | if (idx >= 0 | 552 | /* |
| 394 | && pwc_controls[i].id > pwc_controls[idx].id) | 553 | * Take the udev-lock to protect against the disconnect handler |
| 395 | continue; | 554 | * completing and setting dev->udev to NULL underneath us. Other code |
| 396 | idx = i; | 555 | * does not need to do this since it is protected by the modlock. |
| 556 | */ | ||
| 557 | mutex_lock(&pdev->udevlock); | ||
| 558 | |||
| 559 | if (!pdev->udev) { | ||
| 560 | ret = -ENODEV; | ||
| 561 | goto leave; | ||
| 562 | } | ||
| 563 | |||
| 564 | switch (ctrl->id) { | ||
| 565 | case V4L2_CID_AUTO_WHITE_BALANCE: | ||
| 566 | if (pdev->color_bal_valid && time_before(jiffies, | ||
| 567 | pdev->last_color_bal_update + HZ / 4)) { | ||
| 568 | pdev->red_balance->val = pdev->last_red_balance; | ||
| 569 | pdev->blue_balance->val = pdev->last_blue_balance; | ||
| 570 | break; | ||
| 397 | } | 571 | } |
| 398 | if (idx < 0) | 572 | ret = pwc_get_u8_ctrl(pdev, GET_STATUS_CTL, |
| 399 | return -EINVAL; | 573 | READ_RED_GAIN_FORMATTER, |
| 400 | memcpy(c, &pwc_controls[idx], sizeof pwc_controls[0]); | 574 | &pdev->red_balance->val); |
| 401 | return 0; | 575 | if (ret) |
| 576 | break; | ||
| 577 | ret = pwc_get_u8_ctrl(pdev, GET_STATUS_CTL, | ||
| 578 | READ_BLUE_GAIN_FORMATTER, | ||
| 579 | &pdev->blue_balance->val); | ||
| 580 | if (ret) | ||
| 581 | break; | ||
| 582 | pdev->last_red_balance = pdev->red_balance->val; | ||
| 583 | pdev->last_blue_balance = pdev->blue_balance->val; | ||
| 584 | pdev->last_color_bal_update = jiffies; | ||
| 585 | pdev->color_bal_valid = true; | ||
| 586 | break; | ||
| 587 | case V4L2_CID_AUTOGAIN: | ||
| 588 | if (pdev->gain_valid && time_before(jiffies, | ||
| 589 | pdev->last_gain_update + HZ / 4)) { | ||
| 590 | pdev->gain->val = pdev->last_gain; | ||
| 591 | break; | ||
| 592 | } | ||
| 593 | ret = pwc_get_u8_ctrl(pdev, GET_STATUS_CTL, | ||
| 594 | READ_AGC_FORMATTER, &pdev->gain->val); | ||
| 595 | if (ret) | ||
| 596 | break; | ||
| 597 | pdev->last_gain = pdev->gain->val; | ||
| 598 | pdev->last_gain_update = jiffies; | ||
| 599 | pdev->gain_valid = true; | ||
| 600 | if (!DEVICE_USE_CODEC3(pdev->type)) | ||
| 601 | break; | ||
| 602 | /* Fall through for CODEC3 where autogain also controls expo */ | ||
| 603 | case V4L2_CID_EXPOSURE_AUTO: | ||
| 604 | if (pdev->exposure_valid && time_before(jiffies, | ||
| 605 | pdev->last_exposure_update + HZ / 4)) { | ||
| 606 | pdev->exposure->val = pdev->last_exposure; | ||
| 607 | break; | ||
| 608 | } | ||
| 609 | ret = pwc_get_u16_ctrl(pdev, GET_STATUS_CTL, | ||
| 610 | READ_SHUTTER_FORMATTER, | ||
| 611 | &pdev->exposure->val); | ||
| 612 | if (ret) | ||
| 613 | break; | ||
| 614 | pdev->last_exposure = pdev->exposure->val; | ||
| 615 | pdev->last_exposure_update = jiffies; | ||
| 616 | pdev->exposure_valid = true; | ||
| 617 | break; | ||
| 618 | default: | ||
| 619 | ret = -EINVAL; | ||
| 402 | } | 620 | } |
| 403 | for (i = 0; i < sizeof(pwc_controls) / sizeof(struct v4l2_queryctrl); i++) { | 621 | |
| 404 | if (pwc_controls[i].id == c->id) { | 622 | if (ret) |
| 405 | PWC_DEBUG_IOCTL("ioctl(VIDIOC_QUERYCTRL) found\n"); | 623 | PWC_ERROR("g_ctrl %s error %d\n", ctrl->name, ret); |
| 406 | memcpy(c, &pwc_controls[i], sizeof(struct v4l2_queryctrl)); | 624 | |
| 407 | return 0; | 625 | leave: |
| 626 | mutex_unlock(&pdev->udevlock); | ||
| 627 | mutex_lock(&pdev->modlock); | ||
| 628 | return ret; | ||
| 629 | } | ||
| 630 | |||
| 631 | static int pwc_set_awb(struct pwc_device *pdev) | ||
| 632 | { | ||
| 633 | int ret = 0; | ||
| 634 | |||
| 635 | if (pdev->auto_white_balance->is_new) { | ||
| 636 | ret = pwc_set_u8_ctrl(pdev, SET_CHROM_CTL, | ||
| 637 | WB_MODE_FORMATTER, | ||
| 638 | pdev->auto_white_balance->val); | ||
| 639 | if (ret) | ||
| 640 | return ret; | ||
| 641 | |||
| 642 | /* Update val when coming from auto or going to a preset */ | ||
| 643 | if (pdev->red_balance->is_volatile || | ||
| 644 | pdev->auto_white_balance->val == awb_indoor || | ||
| 645 | pdev->auto_white_balance->val == awb_outdoor || | ||
| 646 | pdev->auto_white_balance->val == awb_fl) { | ||
| 647 | if (!pdev->red_balance->is_new) | ||
| 648 | pwc_get_u8_ctrl(pdev, GET_STATUS_CTL, | ||
| 649 | READ_RED_GAIN_FORMATTER, | ||
| 650 | &pdev->red_balance->val); | ||
| 651 | if (!pdev->blue_balance->is_new) | ||
| 652 | pwc_get_u8_ctrl(pdev, GET_STATUS_CTL, | ||
| 653 | READ_BLUE_GAIN_FORMATTER, | ||
| 654 | &pdev->blue_balance->val); | ||
| 655 | } | ||
| 656 | if (pdev->auto_white_balance->val == awb_auto) { | ||
| 657 | pdev->red_balance->is_volatile = true; | ||
| 658 | pdev->blue_balance->is_volatile = true; | ||
| 659 | pdev->color_bal_valid = false; /* Force cache update */ | ||
| 660 | } else { | ||
| 661 | pdev->red_balance->is_volatile = false; | ||
| 662 | pdev->blue_balance->is_volatile = false; | ||
| 408 | } | 663 | } |
| 409 | } | 664 | } |
| 410 | return -EINVAL; | 665 | |
| 666 | if (ret == 0 && pdev->red_balance->is_new) { | ||
| 667 | if (pdev->auto_white_balance->val != awb_manual) | ||
| 668 | return -EBUSY; | ||
| 669 | ret = pwc_set_u8_ctrl(pdev, SET_CHROM_CTL, | ||
| 670 | PRESET_MANUAL_RED_GAIN_FORMATTER, | ||
| 671 | pdev->red_balance->val); | ||
| 672 | } | ||
| 673 | |||
| 674 | if (ret == 0 && pdev->blue_balance->is_new) { | ||
| 675 | if (pdev->auto_white_balance->val != awb_manual) | ||
| 676 | return -EBUSY; | ||
| 677 | ret = pwc_set_u8_ctrl(pdev, SET_CHROM_CTL, | ||
| 678 | PRESET_MANUAL_BLUE_GAIN_FORMATTER, | ||
| 679 | pdev->blue_balance->val); | ||
| 680 | } | ||
| 681 | return ret; | ||
| 411 | } | 682 | } |
| 412 | 683 | ||
| 413 | static int pwc_g_ctrl(struct file *file, void *fh, struct v4l2_control *c) | 684 | /* For CODEC2 models which have separate autogain and auto exposure */ |
| 685 | static int pwc_set_autogain(struct pwc_device *pdev) | ||
| 414 | { | 686 | { |
| 415 | struct pwc_device *pdev = video_drvdata(file); | 687 | int ret = 0; |
| 416 | int ret; | 688 | |
| 689 | if (pdev->autogain->is_new) { | ||
| 690 | ret = pwc_set_u8_ctrl(pdev, SET_LUM_CTL, | ||
| 691 | AGC_MODE_FORMATTER, | ||
| 692 | pdev->autogain->val ? 0 : 0xff); | ||
| 693 | if (ret) | ||
| 694 | return ret; | ||
| 695 | if (pdev->autogain->val) | ||
| 696 | pdev->gain_valid = false; /* Force cache update */ | ||
| 697 | else if (!pdev->gain->is_new) | ||
| 698 | pwc_get_u8_ctrl(pdev, GET_STATUS_CTL, | ||
| 699 | READ_AGC_FORMATTER, | ||
| 700 | &pdev->gain->val); | ||
| 701 | } | ||
| 702 | if (ret == 0 && pdev->gain->is_new) { | ||
| 703 | if (pdev->autogain->val) | ||
| 704 | return -EBUSY; | ||
| 705 | ret = pwc_set_u8_ctrl(pdev, SET_LUM_CTL, | ||
| 706 | PRESET_AGC_FORMATTER, | ||
| 707 | pdev->gain->val); | ||
| 708 | } | ||
| 709 | return ret; | ||
| 710 | } | ||
| 417 | 711 | ||
| 418 | switch (c->id) { | 712 | /* For CODEC2 models which have separate autogain and auto exposure */ |
| 419 | case V4L2_CID_BRIGHTNESS: | 713 | static int pwc_set_exposure_auto(struct pwc_device *pdev) |
| 420 | c->value = pwc_get_brightness(pdev); | 714 | { |
| 421 | if (c->value < 0) | 715 | int ret = 0; |
| 422 | return -EINVAL; | 716 | int is_auto = pdev->exposure_auto->val == V4L2_EXPOSURE_AUTO; |
| 423 | return 0; | 717 | |
| 424 | case V4L2_CID_CONTRAST: | 718 | if (pdev->exposure_auto->is_new) { |
| 425 | c->value = pwc_get_contrast(pdev); | 719 | ret = pwc_set_u8_ctrl(pdev, SET_LUM_CTL, |
| 426 | if (c->value < 0) | 720 | SHUTTER_MODE_FORMATTER, |
| 427 | return -EINVAL; | 721 | is_auto ? 0 : 0xff); |
| 428 | return 0; | 722 | if (ret) |
| 429 | case V4L2_CID_SATURATION: | 723 | return ret; |
| 430 | ret = pwc_get_saturation(pdev, &c->value); | 724 | if (is_auto) |
| 431 | if (ret < 0) | 725 | pdev->exposure_valid = false; /* Force cache update */ |
| 432 | return -EINVAL; | 726 | else if (!pdev->exposure->is_new) |
| 433 | return 0; | 727 | pwc_get_u16_ctrl(pdev, GET_STATUS_CTL, |
| 434 | case V4L2_CID_GAMMA: | 728 | READ_SHUTTER_FORMATTER, |
| 435 | c->value = pwc_get_gamma(pdev); | 729 | &pdev->exposure->val); |
| 436 | if (c->value < 0) | 730 | } |
| 437 | return -EINVAL; | 731 | if (ret == 0 && pdev->exposure->is_new) { |
| 438 | return 0; | 732 | if (is_auto) |
| 439 | case V4L2_CID_RED_BALANCE: | 733 | return -EBUSY; |
| 440 | ret = pwc_get_red_gain(pdev, &c->value); | 734 | ret = pwc_set_u16_ctrl(pdev, SET_LUM_CTL, |
| 441 | if (ret < 0) | 735 | PRESET_SHUTTER_FORMATTER, |
| 442 | return -EINVAL; | 736 | pdev->exposure->val); |
| 443 | c->value >>= 8; | 737 | } |
| 444 | return 0; | 738 | return ret; |
| 445 | case V4L2_CID_BLUE_BALANCE: | 739 | } |
| 446 | ret = pwc_get_blue_gain(pdev, &c->value); | ||
| 447 | if (ret < 0) | ||
| 448 | return -EINVAL; | ||
| 449 | c->value >>= 8; | ||
| 450 | return 0; | ||
| 451 | case V4L2_CID_AUTO_WHITE_BALANCE: | ||
| 452 | ret = pwc_get_awb(pdev); | ||
| 453 | if (ret < 0) | ||
| 454 | return -EINVAL; | ||
| 455 | c->value = (ret == PWC_WB_MANUAL) ? 0 : 1; | ||
| 456 | return 0; | ||
| 457 | case V4L2_CID_GAIN: | ||
| 458 | ret = pwc_get_agc(pdev, &c->value); | ||
| 459 | if (ret < 0) | ||
| 460 | return -EINVAL; | ||
| 461 | c->value >>= 8; | ||
| 462 | return 0; | ||
| 463 | case V4L2_CID_AUTOGAIN: | ||
| 464 | ret = pwc_get_agc(pdev, &c->value); | ||
| 465 | if (ret < 0) | ||
| 466 | return -EINVAL; | ||
| 467 | c->value = (c->value < 0) ? 1 : 0; | ||
| 468 | return 0; | ||
| 469 | case V4L2_CID_EXPOSURE: | ||
| 470 | ret = pwc_get_shutter_speed(pdev, &c->value); | ||
| 471 | if (ret < 0) | ||
| 472 | return -EINVAL; | ||
| 473 | return 0; | ||
| 474 | case V4L2_CID_PRIVATE_COLOUR_MODE: | ||
| 475 | ret = pwc_get_colour_mode(pdev, &c->value); | ||
| 476 | if (ret < 0) | ||
| 477 | return -EINVAL; | ||
| 478 | return 0; | ||
| 479 | case V4L2_CID_PRIVATE_AUTOCONTOUR: | ||
| 480 | ret = pwc_get_contour(pdev, &c->value); | ||
| 481 | if (ret < 0) | ||
| 482 | return -EINVAL; | ||
| 483 | c->value = (c->value == -1 ? 1 : 0); | ||
| 484 | return 0; | ||
| 485 | case V4L2_CID_PRIVATE_CONTOUR: | ||
| 486 | ret = pwc_get_contour(pdev, &c->value); | ||
| 487 | if (ret < 0) | ||
| 488 | return -EINVAL; | ||
| 489 | c->value >>= 10; | ||
| 490 | return 0; | ||
| 491 | case V4L2_CID_PRIVATE_BACKLIGHT: | ||
| 492 | ret = pwc_get_backlight(pdev, &c->value); | ||
| 493 | if (ret < 0) | ||
| 494 | return -EINVAL; | ||
| 495 | return 0; | ||
| 496 | case V4L2_CID_PRIVATE_FLICKERLESS: | ||
| 497 | ret = pwc_get_flicker(pdev, &c->value); | ||
| 498 | if (ret < 0) | ||
| 499 | return -EINVAL; | ||
| 500 | c->value = (c->value ? 1 : 0); | ||
| 501 | return 0; | ||
| 502 | case V4L2_CID_PRIVATE_NOISE_REDUCTION: | ||
| 503 | ret = pwc_get_dynamic_noise(pdev, &c->value); | ||
| 504 | if (ret < 0) | ||
| 505 | return -EINVAL; | ||
| 506 | return 0; | ||
| 507 | 740 | ||
| 508 | case V4L2_CID_PRIVATE_SAVE_USER: | 741 | /* For CODEC3 models which have autogain controlling both gain and exposure */ |
| 509 | case V4L2_CID_PRIVATE_RESTORE_USER: | 742 | static int pwc_set_autogain_expo(struct pwc_device *pdev) |
| 510 | case V4L2_CID_PRIVATE_RESTORE_FACTORY: | 743 | { |
| 511 | return -EINVAL; | 744 | int ret = 0; |
| 745 | |||
| 746 | if (pdev->autogain->is_new) { | ||
| 747 | ret = pwc_set_u8_ctrl(pdev, SET_LUM_CTL, | ||
| 748 | AGC_MODE_FORMATTER, | ||
| 749 | pdev->autogain->val ? 0 : 0xff); | ||
| 750 | if (ret) | ||
| 751 | return ret; | ||
| 752 | if (pdev->autogain->val) { | ||
| 753 | pdev->gain_valid = false; /* Force cache update */ | ||
| 754 | pdev->exposure_valid = false; /* Force cache update */ | ||
| 755 | } else { | ||
| 756 | if (!pdev->gain->is_new) | ||
| 757 | pwc_get_u8_ctrl(pdev, GET_STATUS_CTL, | ||
| 758 | READ_AGC_FORMATTER, | ||
| 759 | &pdev->gain->val); | ||
| 760 | if (!pdev->exposure->is_new) | ||
| 761 | pwc_get_u16_ctrl(pdev, GET_STATUS_CTL, | ||
| 762 | READ_SHUTTER_FORMATTER, | ||
| 763 | &pdev->exposure->val); | ||
| 764 | } | ||
| 512 | } | 765 | } |
| 513 | return -EINVAL; | 766 | if (ret == 0 && pdev->gain->is_new) { |
| 767 | if (pdev->autogain->val) | ||
| 768 | return -EBUSY; | ||
| 769 | ret = pwc_set_u8_ctrl(pdev, SET_LUM_CTL, | ||
| 770 | PRESET_AGC_FORMATTER, | ||
| 771 | pdev->gain->val); | ||
| 772 | } | ||
| 773 | if (ret == 0 && pdev->exposure->is_new) { | ||
| 774 | if (pdev->autogain->val) | ||
| 775 | return -EBUSY; | ||
| 776 | ret = pwc_set_u16_ctrl(pdev, SET_LUM_CTL, | ||
| 777 | PRESET_SHUTTER_FORMATTER, | ||
| 778 | pdev->exposure->val); | ||
| 779 | } | ||
| 780 | return ret; | ||
| 514 | } | 781 | } |
| 515 | 782 | ||
| 516 | static int pwc_s_ctrl(struct file *file, void *fh, struct v4l2_control *c) | 783 | static int pwc_set_motor(struct pwc_device *pdev) |
| 517 | { | 784 | { |
| 518 | struct pwc_device *pdev = video_drvdata(file); | ||
| 519 | int ret; | 785 | int ret; |
| 786 | u8 buf[4]; | ||
| 787 | |||
| 788 | buf[0] = 0; | ||
| 789 | if (pdev->motor_pan_reset->is_new) | ||
| 790 | buf[0] |= 0x01; | ||
| 791 | if (pdev->motor_tilt_reset->is_new) | ||
| 792 | buf[0] |= 0x02; | ||
| 793 | if (pdev->motor_pan_reset->is_new || pdev->motor_tilt_reset->is_new) { | ||
| 794 | ret = send_control_msg(pdev, SET_MPT_CTL, | ||
| 795 | PT_RESET_CONTROL_FORMATTER, buf, 1); | ||
| 796 | if (ret < 0) | ||
| 797 | return ret; | ||
| 798 | } | ||
| 520 | 799 | ||
| 521 | switch (c->id) { | 800 | memset(buf, 0, sizeof(buf)); |
| 522 | case V4L2_CID_BRIGHTNESS: | 801 | if (pdev->motor_pan->is_new) { |
| 523 | c->value <<= 9; | 802 | buf[0] = pdev->motor_pan->val & 0xFF; |
| 524 | ret = pwc_set_brightness(pdev, c->value); | 803 | buf[1] = (pdev->motor_pan->val >> 8); |
| 804 | } | ||
| 805 | if (pdev->motor_tilt->is_new) { | ||
| 806 | buf[2] = pdev->motor_tilt->val & 0xFF; | ||
| 807 | buf[3] = (pdev->motor_tilt->val >> 8); | ||
| 808 | } | ||
| 809 | if (pdev->motor_pan->is_new || pdev->motor_tilt->is_new) { | ||
| 810 | ret = send_control_msg(pdev, SET_MPT_CTL, | ||
| 811 | PT_RELATIVE_CONTROL_FORMATTER, | ||
| 812 | buf, sizeof(buf)); | ||
| 525 | if (ret < 0) | 813 | if (ret < 0) |
| 526 | return -EINVAL; | 814 | return ret; |
| 527 | return 0; | 815 | } |
| 816 | |||
| 817 | return 0; | ||
| 818 | } | ||
| 819 | |||
| 820 | static int pwc_s_ctrl(struct v4l2_ctrl *ctrl) | ||
| 821 | { | ||
| 822 | struct pwc_device *pdev = | ||
| 823 | container_of(ctrl->handler, struct pwc_device, ctrl_handler); | ||
| 824 | int ret = 0; | ||
| 825 | |||
| 826 | /* See the comments on locking in pwc_g_volatile_ctrl */ | ||
| 827 | mutex_unlock(&pdev->modlock); | ||
| 828 | mutex_lock(&pdev->udevlock); | ||
| 829 | |||
| 830 | if (!pdev->udev) { | ||
| 831 | ret = -ENODEV; | ||
| 832 | goto leave; | ||
| 833 | } | ||
| 834 | |||
| 835 | switch (ctrl->id) { | ||
| 836 | case V4L2_CID_BRIGHTNESS: | ||
| 837 | ret = pwc_set_u8_ctrl(pdev, SET_LUM_CTL, | ||
| 838 | BRIGHTNESS_FORMATTER, ctrl->val); | ||
| 839 | break; | ||
| 528 | case V4L2_CID_CONTRAST: | 840 | case V4L2_CID_CONTRAST: |
| 529 | c->value <<= 10; | 841 | ret = pwc_set_u8_ctrl(pdev, SET_LUM_CTL, |
| 530 | ret = pwc_set_contrast(pdev, c->value); | 842 | CONTRAST_FORMATTER, ctrl->val); |
| 531 | if (ret < 0) | 843 | break; |
| 532 | return -EINVAL; | ||
| 533 | return 0; | ||
| 534 | case V4L2_CID_SATURATION: | 844 | case V4L2_CID_SATURATION: |
| 535 | ret = pwc_set_saturation(pdev, c->value); | 845 | ret = pwc_set_s8_ctrl(pdev, SET_CHROM_CTL, |
| 536 | if (ret < 0) | 846 | pdev->saturation_fmt, ctrl->val); |
| 537 | return -EINVAL; | 847 | break; |
| 538 | return 0; | ||
| 539 | case V4L2_CID_GAMMA: | 848 | case V4L2_CID_GAMMA: |
| 540 | c->value <<= 11; | 849 | ret = pwc_set_u8_ctrl(pdev, SET_LUM_CTL, |
| 541 | ret = pwc_set_gamma(pdev, c->value); | 850 | GAMMA_FORMATTER, ctrl->val); |
| 542 | if (ret < 0) | 851 | break; |
| 543 | return -EINVAL; | ||
| 544 | return 0; | ||
| 545 | case V4L2_CID_RED_BALANCE: | ||
| 546 | c->value <<= 8; | ||
| 547 | ret = pwc_set_red_gain(pdev, c->value); | ||
| 548 | if (ret < 0) | ||
| 549 | return -EINVAL; | ||
| 550 | return 0; | ||
| 551 | case V4L2_CID_BLUE_BALANCE: | ||
| 552 | c->value <<= 8; | ||
| 553 | ret = pwc_set_blue_gain(pdev, c->value); | ||
| 554 | if (ret < 0) | ||
| 555 | return -EINVAL; | ||
| 556 | return 0; | ||
| 557 | case V4L2_CID_AUTO_WHITE_BALANCE: | 852 | case V4L2_CID_AUTO_WHITE_BALANCE: |
| 558 | c->value = (c->value == 0) ? PWC_WB_MANUAL : PWC_WB_AUTO; | 853 | ret = pwc_set_awb(pdev); |
| 559 | ret = pwc_set_awb(pdev, c->value); | 854 | break; |
| 560 | if (ret < 0) | ||
| 561 | return -EINVAL; | ||
| 562 | return 0; | ||
| 563 | case V4L2_CID_EXPOSURE: | ||
| 564 | c->value <<= 8; | ||
| 565 | ret = pwc_set_shutter_speed(pdev, c->value ? 0 : 1, c->value); | ||
| 566 | if (ret < 0) | ||
| 567 | return -EINVAL; | ||
| 568 | return 0; | ||
| 569 | case V4L2_CID_AUTOGAIN: | 855 | case V4L2_CID_AUTOGAIN: |
| 570 | /* autogain off means nothing without a gain */ | 856 | if (DEVICE_USE_CODEC2(pdev->type)) |
| 571 | if (c->value == 0) | 857 | ret = pwc_set_autogain(pdev); |
| 572 | return 0; | 858 | else if (DEVICE_USE_CODEC3(pdev->type)) |
| 573 | ret = pwc_set_agc(pdev, c->value, 0); | 859 | ret = pwc_set_autogain_expo(pdev); |
| 574 | if (ret < 0) | 860 | else |
| 575 | return -EINVAL; | 861 | ret = -EINVAL; |
| 576 | return 0; | 862 | break; |
| 577 | case V4L2_CID_GAIN: | 863 | case V4L2_CID_EXPOSURE_AUTO: |
| 578 | c->value <<= 8; | 864 | if (DEVICE_USE_CODEC2(pdev->type)) |
| 579 | ret = pwc_set_agc(pdev, 0, c->value); | 865 | ret = pwc_set_exposure_auto(pdev); |
| 580 | if (ret < 0) | 866 | else |
| 581 | return -EINVAL; | 867 | ret = -EINVAL; |
| 582 | return 0; | 868 | break; |
| 583 | case V4L2_CID_PRIVATE_SAVE_USER: | 869 | case V4L2_CID_COLORFX: |
| 584 | if (pwc_save_user(pdev)) | 870 | ret = pwc_set_u8_ctrl(pdev, SET_CHROM_CTL, |
| 585 | return -EINVAL; | 871 | COLOUR_MODE_FORMATTER, |
| 586 | return 0; | 872 | ctrl->val ? 0 : 0xff); |
| 587 | case V4L2_CID_PRIVATE_RESTORE_USER: | 873 | break; |
| 588 | if (pwc_restore_user(pdev)) | 874 | case PWC_CID_CUSTOM(autocontour): |
| 589 | return -EINVAL; | 875 | if (pdev->autocontour->is_new) { |
| 590 | return 0; | 876 | ret = pwc_set_u8_ctrl(pdev, SET_LUM_CTL, |
| 591 | case V4L2_CID_PRIVATE_RESTORE_FACTORY: | 877 | AUTO_CONTOUR_FORMATTER, |
| 592 | if (pwc_restore_factory(pdev)) | 878 | pdev->autocontour->val ? 0 : 0xff); |
| 593 | return -EINVAL; | 879 | } |
| 594 | return 0; | 880 | if (ret == 0 && pdev->contour->is_new) { |
| 595 | case V4L2_CID_PRIVATE_COLOUR_MODE: | 881 | if (pdev->autocontour->val) { |
| 596 | ret = pwc_set_colour_mode(pdev, c->value); | 882 | ret = -EBUSY; |
| 597 | if (ret < 0) | 883 | break; |
| 598 | return -EINVAL; | 884 | } |
| 599 | return 0; | 885 | ret = pwc_set_u8_ctrl(pdev, SET_LUM_CTL, |
| 600 | case V4L2_CID_PRIVATE_AUTOCONTOUR: | 886 | PRESET_CONTOUR_FORMATTER, |
| 601 | c->value = (c->value == 1) ? -1 : 0; | 887 | pdev->contour->val); |
| 602 | ret = pwc_set_contour(pdev, c->value); | 888 | } |
| 603 | if (ret < 0) | 889 | break; |
| 604 | return -EINVAL; | 890 | case V4L2_CID_BACKLIGHT_COMPENSATION: |
| 605 | return 0; | 891 | ret = pwc_set_u8_ctrl(pdev, SET_LUM_CTL, |
| 606 | case V4L2_CID_PRIVATE_CONTOUR: | 892 | BACK_LIGHT_COMPENSATION_FORMATTER, |
| 607 | c->value <<= 10; | 893 | ctrl->val ? 0 : 0xff); |
| 608 | ret = pwc_set_contour(pdev, c->value); | 894 | break; |
| 609 | if (ret < 0) | 895 | case V4L2_CID_BAND_STOP_FILTER: |
| 610 | return -EINVAL; | 896 | ret = pwc_set_u8_ctrl(pdev, SET_LUM_CTL, |
| 611 | return 0; | 897 | FLICKERLESS_MODE_FORMATTER, |
| 612 | case V4L2_CID_PRIVATE_BACKLIGHT: | 898 | ctrl->val ? 0 : 0xff); |
| 613 | ret = pwc_set_backlight(pdev, c->value); | 899 | break; |
| 614 | if (ret < 0) | 900 | case PWC_CID_CUSTOM(noise_reduction): |
| 615 | return -EINVAL; | 901 | ret = pwc_set_u8_ctrl(pdev, SET_LUM_CTL, |
| 616 | return 0; | 902 | DYNAMIC_NOISE_CONTROL_FORMATTER, |
| 617 | case V4L2_CID_PRIVATE_FLICKERLESS: | 903 | ctrl->val); |
| 618 | ret = pwc_set_flicker(pdev, c->value); | 904 | break; |
| 619 | if (ret < 0) | 905 | case PWC_CID_CUSTOM(save_user): |
| 620 | return -EINVAL; | 906 | ret = pwc_button_ctrl(pdev, SAVE_USER_DEFAULTS_FORMATTER); |
| 621 | case V4L2_CID_PRIVATE_NOISE_REDUCTION: | 907 | break; |
| 622 | ret = pwc_set_dynamic_noise(pdev, c->value); | 908 | case PWC_CID_CUSTOM(restore_user): |
| 623 | if (ret < 0) | 909 | ret = pwc_button_ctrl(pdev, RESTORE_USER_DEFAULTS_FORMATTER); |
| 624 | return -EINVAL; | 910 | break; |
| 625 | return 0; | 911 | case PWC_CID_CUSTOM(restore_factory): |
| 626 | 912 | ret = pwc_button_ctrl(pdev, | |
| 913 | RESTORE_FACTORY_DEFAULTS_FORMATTER); | ||
| 914 | break; | ||
| 915 | case V4L2_CID_PAN_RELATIVE: | ||
| 916 | ret = pwc_set_motor(pdev); | ||
| 917 | break; | ||
| 918 | default: | ||
| 919 | ret = -EINVAL; | ||
| 627 | } | 920 | } |
| 628 | return -EINVAL; | 921 | |
| 922 | if (ret) | ||
| 923 | PWC_ERROR("s_ctrl %s error %d\n", ctrl->name, ret); | ||
| 924 | |||
| 925 | leave: | ||
| 926 | mutex_unlock(&pdev->udevlock); | ||
| 927 | mutex_lock(&pdev->modlock); | ||
| 928 | return ret; | ||
| 629 | } | 929 | } |
| 630 | 930 | ||
| 631 | static int pwc_enum_fmt_vid_cap(struct file *file, void *fh, struct v4l2_fmtdesc *f) | 931 | static int pwc_enum_fmt_vid_cap(struct file *file, void *fh, struct v4l2_fmtdesc *f) |
| @@ -667,157 +967,77 @@ static int pwc_try_fmt_vid_cap(struct file *file, void *fh, struct v4l2_format * | |||
| 667 | return pwc_vidioc_try_fmt(pdev, f); | 967 | return pwc_vidioc_try_fmt(pdev, f); |
| 668 | } | 968 | } |
| 669 | 969 | ||
| 670 | static int pwc_s_fmt_vid_cap(struct file *file, void *fh, struct v4l2_format *f) | 970 | static int pwc_reqbufs(struct file *file, void *fh, |
| 971 | struct v4l2_requestbuffers *rb) | ||
| 671 | { | 972 | { |
| 672 | struct pwc_device *pdev = video_drvdata(file); | 973 | struct pwc_device *pdev = video_drvdata(file); |
| 673 | 974 | ||
| 674 | return pwc_vidioc_set_fmt(pdev, f); | 975 | if (pdev->capt_file != NULL && |
| 675 | } | 976 | pdev->capt_file != file) |
| 676 | 977 | return -EBUSY; | |
| 677 | static int pwc_reqbufs(struct file *file, void *fh, struct v4l2_requestbuffers *rb) | ||
| 678 | { | ||
| 679 | int nbuffers; | ||
| 680 | 978 | ||
| 681 | PWC_DEBUG_IOCTL("ioctl(VIDIOC_REQBUFS) count=%d\n", rb->count); | 979 | pdev->capt_file = file; |
| 682 | if (rb->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | ||
| 683 | return -EINVAL; | ||
| 684 | if (rb->memory != V4L2_MEMORY_MMAP) | ||
| 685 | return -EINVAL; | ||
| 686 | 980 | ||
| 687 | nbuffers = rb->count; | 981 | return vb2_reqbufs(&pdev->vb_queue, rb); |
| 688 | if (nbuffers < 2) | ||
| 689 | nbuffers = 2; | ||
| 690 | else if (nbuffers > pwc_mbufs) | ||
| 691 | nbuffers = pwc_mbufs; | ||
| 692 | /* Force to use our # of buffers */ | ||
| 693 | rb->count = pwc_mbufs; | ||
| 694 | return 0; | ||
| 695 | } | 982 | } |
| 696 | 983 | ||
| 697 | static int pwc_querybuf(struct file *file, void *fh, struct v4l2_buffer *buf) | 984 | static int pwc_querybuf(struct file *file, void *fh, struct v4l2_buffer *buf) |
| 698 | { | 985 | { |
| 699 | struct pwc_device *pdev = video_drvdata(file); | 986 | struct pwc_device *pdev = video_drvdata(file); |
| 700 | int index; | ||
| 701 | 987 | ||
| 702 | PWC_DEBUG_IOCTL("ioctl(VIDIOC_QUERYBUF) index=%d\n", buf->index); | 988 | return vb2_querybuf(&pdev->vb_queue, buf); |
| 703 | if (buf->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) { | ||
| 704 | PWC_DEBUG_IOCTL("ioctl(VIDIOC_QUERYBUF) Bad type\n"); | ||
| 705 | return -EINVAL; | ||
| 706 | } | ||
| 707 | index = buf->index; | ||
| 708 | if (index < 0 || index >= pwc_mbufs) { | ||
| 709 | PWC_DEBUG_IOCTL("ioctl(VIDIOC_QUERYBUF) Bad index %d\n", buf->index); | ||
| 710 | return -EINVAL; | ||
| 711 | } | ||
| 712 | |||
| 713 | buf->m.offset = index * pdev->len_per_image; | ||
| 714 | if (pdev->pixfmt != V4L2_PIX_FMT_YUV420) | ||
| 715 | buf->bytesused = pdev->frame_size + sizeof(struct pwc_raw_frame); | ||
| 716 | else | ||
| 717 | buf->bytesused = pdev->view.size; | ||
| 718 | buf->field = V4L2_FIELD_NONE; | ||
| 719 | buf->memory = V4L2_MEMORY_MMAP; | ||
| 720 | /*buf->flags = V4L2_BUF_FLAG_MAPPED;*/ | ||
| 721 | buf->length = pdev->len_per_image; | ||
| 722 | |||
| 723 | PWC_DEBUG_READ("VIDIOC_QUERYBUF: index=%d\n", buf->index); | ||
| 724 | PWC_DEBUG_READ("VIDIOC_QUERYBUF: m.offset=%d\n", buf->m.offset); | ||
| 725 | PWC_DEBUG_READ("VIDIOC_QUERYBUF: bytesused=%d\n", buf->bytesused); | ||
| 726 | |||
| 727 | return 0; | ||
| 728 | } | 989 | } |
| 729 | 990 | ||
| 730 | static int pwc_qbuf(struct file *file, void *fh, struct v4l2_buffer *buf) | 991 | static int pwc_qbuf(struct file *file, void *fh, struct v4l2_buffer *buf) |
| 731 | { | 992 | { |
| 732 | PWC_DEBUG_IOCTL("ioctl(VIDIOC_QBUF) index=%d\n", buf->index); | 993 | struct pwc_device *pdev = video_drvdata(file); |
| 733 | if (buf->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | ||
| 734 | return -EINVAL; | ||
| 735 | if (buf->memory != V4L2_MEMORY_MMAP) | ||
| 736 | return -EINVAL; | ||
| 737 | if (buf->index >= pwc_mbufs) | ||
| 738 | return -EINVAL; | ||
| 739 | 994 | ||
| 740 | buf->flags |= V4L2_BUF_FLAG_QUEUED; | 995 | if (!pdev->udev) |
| 741 | buf->flags &= ~V4L2_BUF_FLAG_DONE; | 996 | return -ENODEV; |
| 742 | 997 | ||
| 743 | return 0; | 998 | if (pdev->capt_file != file) |
| 999 | return -EBUSY; | ||
| 1000 | |||
| 1001 | return vb2_qbuf(&pdev->vb_queue, buf); | ||
| 744 | } | 1002 | } |
| 745 | 1003 | ||
| 746 | static int pwc_dqbuf(struct file *file, void *fh, struct v4l2_buffer *buf) | 1004 | static int pwc_dqbuf(struct file *file, void *fh, struct v4l2_buffer *buf) |
| 747 | { | 1005 | { |
| 748 | DECLARE_WAITQUEUE(wait, current); | ||
| 749 | struct pwc_device *pdev = video_drvdata(file); | 1006 | struct pwc_device *pdev = video_drvdata(file); |
| 750 | int ret; | ||
| 751 | 1007 | ||
| 752 | PWC_DEBUG_IOCTL("ioctl(VIDIOC_DQBUF)\n"); | 1008 | if (!pdev->udev) |
| 1009 | return -ENODEV; | ||
| 753 | 1010 | ||
| 754 | if (buf->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | 1011 | if (pdev->capt_file != file) |
| 755 | return -EINVAL; | 1012 | return -EBUSY; |
| 756 | |||
| 757 | add_wait_queue(&pdev->frameq, &wait); | ||
| 758 | while (pdev->full_frames == NULL) { | ||
| 759 | if (pdev->error_status) { | ||
| 760 | remove_wait_queue(&pdev->frameq, &wait); | ||
| 761 | set_current_state(TASK_RUNNING); | ||
| 762 | return -pdev->error_status; | ||
| 763 | } | ||
| 764 | |||
| 765 | if (signal_pending(current)) { | ||
| 766 | remove_wait_queue(&pdev->frameq, &wait); | ||
| 767 | set_current_state(TASK_RUNNING); | ||
| 768 | return -ERESTARTSYS; | ||
| 769 | } | ||
| 770 | mutex_unlock(&pdev->modlock); | ||
| 771 | schedule(); | ||
| 772 | set_current_state(TASK_INTERRUPTIBLE); | ||
| 773 | mutex_lock(&pdev->modlock); | ||
| 774 | } | ||
| 775 | remove_wait_queue(&pdev->frameq, &wait); | ||
| 776 | set_current_state(TASK_RUNNING); | ||
| 777 | |||
| 778 | PWC_DEBUG_IOCTL("VIDIOC_DQBUF: frame ready.\n"); | ||
| 779 | /* Decompress data in pdev->images[pdev->fill_image] */ | ||
| 780 | ret = pwc_handle_frame(pdev); | ||
| 781 | if (ret) | ||
| 782 | return -EFAULT; | ||
| 783 | PWC_DEBUG_IOCTL("VIDIOC_DQBUF: after pwc_handle_frame\n"); | ||
| 784 | |||
| 785 | buf->index = pdev->fill_image; | ||
| 786 | if (pdev->pixfmt != V4L2_PIX_FMT_YUV420) | ||
| 787 | buf->bytesused = pdev->frame_size + sizeof(struct pwc_raw_frame); | ||
| 788 | else | ||
| 789 | buf->bytesused = pdev->view.size; | ||
| 790 | buf->flags = V4L2_BUF_FLAG_MAPPED; | ||
| 791 | buf->field = V4L2_FIELD_NONE; | ||
| 792 | do_gettimeofday(&buf->timestamp); | ||
| 793 | buf->sequence = 0; | ||
| 794 | buf->memory = V4L2_MEMORY_MMAP; | ||
| 795 | buf->m.offset = pdev->fill_image * pdev->len_per_image; | ||
| 796 | buf->length = pdev->len_per_image; | ||
| 797 | pwc_next_image(pdev); | ||
| 798 | |||
| 799 | PWC_DEBUG_IOCTL("VIDIOC_DQBUF: buf->index=%d\n", buf->index); | ||
| 800 | PWC_DEBUG_IOCTL("VIDIOC_DQBUF: buf->length=%d\n", buf->length); | ||
| 801 | PWC_DEBUG_IOCTL("VIDIOC_DQBUF: m.offset=%d\n", buf->m.offset); | ||
| 802 | PWC_DEBUG_IOCTL("VIDIOC_DQBUF: bytesused=%d\n", buf->bytesused); | ||
| 803 | PWC_DEBUG_IOCTL("VIDIOC_DQBUF: leaving\n"); | ||
| 804 | return 0; | ||
| 805 | 1013 | ||
| 1014 | return vb2_dqbuf(&pdev->vb_queue, buf, file->f_flags & O_NONBLOCK); | ||
| 806 | } | 1015 | } |
| 807 | 1016 | ||
| 808 | static int pwc_streamon(struct file *file, void *fh, enum v4l2_buf_type i) | 1017 | static int pwc_streamon(struct file *file, void *fh, enum v4l2_buf_type i) |
| 809 | { | 1018 | { |
| 810 | struct pwc_device *pdev = video_drvdata(file); | 1019 | struct pwc_device *pdev = video_drvdata(file); |
| 811 | 1020 | ||
| 812 | return pwc_isoc_init(pdev); | 1021 | if (!pdev->udev) |
| 1022 | return -ENODEV; | ||
| 1023 | |||
| 1024 | if (pdev->capt_file != file) | ||
| 1025 | return -EBUSY; | ||
| 1026 | |||
| 1027 | return vb2_streamon(&pdev->vb_queue, i); | ||
| 813 | } | 1028 | } |
| 814 | 1029 | ||
| 815 | static int pwc_streamoff(struct file *file, void *fh, enum v4l2_buf_type i) | 1030 | static int pwc_streamoff(struct file *file, void *fh, enum v4l2_buf_type i) |
| 816 | { | 1031 | { |
| 817 | struct pwc_device *pdev = video_drvdata(file); | 1032 | struct pwc_device *pdev = video_drvdata(file); |
| 818 | 1033 | ||
| 819 | pwc_isoc_cleanup(pdev); | 1034 | if (!pdev->udev) |
| 820 | return 0; | 1035 | return -ENODEV; |
| 1036 | |||
| 1037 | if (pdev->capt_file != file) | ||
| 1038 | return -EBUSY; | ||
| 1039 | |||
| 1040 | return vb2_streamoff(&pdev->vb_queue, i); | ||
| 821 | } | 1041 | } |
| 822 | 1042 | ||
| 823 | static int pwc_enum_framesizes(struct file *file, void *fh, | 1043 | static int pwc_enum_framesizes(struct file *file, void *fh, |
| @@ -896,9 +1116,6 @@ const struct v4l2_ioctl_ops pwc_ioctl_ops = { | |||
| 896 | .vidioc_g_fmt_vid_cap = pwc_g_fmt_vid_cap, | 1116 | .vidioc_g_fmt_vid_cap = pwc_g_fmt_vid_cap, |
| 897 | .vidioc_s_fmt_vid_cap = pwc_s_fmt_vid_cap, | 1117 | .vidioc_s_fmt_vid_cap = pwc_s_fmt_vid_cap, |
| 898 | .vidioc_try_fmt_vid_cap = pwc_try_fmt_vid_cap, | 1118 | .vidioc_try_fmt_vid_cap = pwc_try_fmt_vid_cap, |
| 899 | .vidioc_queryctrl = pwc_queryctrl, | ||
| 900 | .vidioc_g_ctrl = pwc_g_ctrl, | ||
| 901 | .vidioc_s_ctrl = pwc_s_ctrl, | ||
| 902 | .vidioc_reqbufs = pwc_reqbufs, | 1119 | .vidioc_reqbufs = pwc_reqbufs, |
| 903 | .vidioc_querybuf = pwc_querybuf, | 1120 | .vidioc_querybuf = pwc_querybuf, |
| 904 | .vidioc_qbuf = pwc_qbuf, | 1121 | .vidioc_qbuf = pwc_qbuf, |
diff --git a/drivers/media/video/pwc/pwc.h b/drivers/media/video/pwc/pwc.h index 083f8b15df73..0e4e2d7b7872 100644 --- a/drivers/media/video/pwc/pwc.h +++ b/drivers/media/video/pwc/pwc.h | |||
| @@ -29,7 +29,6 @@ | |||
| 29 | #include <linux/usb.h> | 29 | #include <linux/usb.h> |
| 30 | #include <linux/spinlock.h> | 30 | #include <linux/spinlock.h> |
| 31 | #include <linux/wait.h> | 31 | #include <linux/wait.h> |
| 32 | #include <linux/version.h> | ||
| 33 | #include <linux/mutex.h> | 32 | #include <linux/mutex.h> |
| 34 | #include <linux/mm.h> | 33 | #include <linux/mm.h> |
| 35 | #include <linux/slab.h> | 34 | #include <linux/slab.h> |
| @@ -37,19 +36,16 @@ | |||
| 37 | #include <linux/videodev2.h> | 36 | #include <linux/videodev2.h> |
| 38 | #include <media/v4l2-common.h> | 37 | #include <media/v4l2-common.h> |
| 39 | #include <media/v4l2-ioctl.h> | 38 | #include <media/v4l2-ioctl.h> |
| 39 | #include <media/v4l2-ctrls.h> | ||
| 40 | #include <media/videobuf2-vmalloc.h> | ||
| 40 | #ifdef CONFIG_USB_PWC_INPUT_EVDEV | 41 | #ifdef CONFIG_USB_PWC_INPUT_EVDEV |
| 41 | #include <linux/input.h> | 42 | #include <linux/input.h> |
| 42 | #endif | 43 | #endif |
| 43 | 44 | ||
| 44 | #include "pwc-uncompress.h" | ||
| 45 | #include <media/pwc-ioctl.h> | 45 | #include <media/pwc-ioctl.h> |
| 46 | 46 | ||
| 47 | /* Version block */ | 47 | /* Version block */ |
| 48 | #define PWC_MAJOR 10 | 48 | #define PWC_VERSION "10.0.15" |
| 49 | #define PWC_MINOR 0 | ||
| 50 | #define PWC_EXTRAMINOR 12 | ||
| 51 | #define PWC_VERSION_CODE KERNEL_VERSION(PWC_MAJOR,PWC_MINOR,PWC_EXTRAMINOR) | ||
| 52 | #define PWC_VERSION "10.0.14" | ||
| 53 | #define PWC_NAME "pwc" | 49 | #define PWC_NAME "pwc" |
| 54 | #define PFX PWC_NAME ": " | 50 | #define PFX PWC_NAME ": " |
| 55 | 51 | ||
| @@ -81,9 +77,9 @@ | |||
| 81 | #define PWC_DEBUG_LEVEL (PWC_DEBUG_LEVEL_MODULE) | 77 | #define PWC_DEBUG_LEVEL (PWC_DEBUG_LEVEL_MODULE) |
| 82 | 78 | ||
| 83 | #define PWC_DEBUG(level, fmt, args...) do {\ | 79 | #define PWC_DEBUG(level, fmt, args...) do {\ |
| 84 | if ((PWC_DEBUG_LEVEL_ ##level) & pwc_trace) \ | 80 | if ((PWC_DEBUG_LEVEL_ ##level) & pwc_trace) \ |
| 85 | printk(KERN_DEBUG PFX fmt, ##args); \ | 81 | printk(KERN_DEBUG PFX fmt, ##args); \ |
| 86 | } while(0) | 82 | } while (0) |
| 87 | 83 | ||
| 88 | #define PWC_ERROR(fmt, args...) printk(KERN_ERR PFX fmt, ##args) | 84 | #define PWC_ERROR(fmt, args...) printk(KERN_ERR PFX fmt, ##args) |
| 89 | #define PWC_WARNING(fmt, args...) printk(KERN_WARNING PFX fmt, ##args) | 85 | #define PWC_WARNING(fmt, args...) printk(KERN_WARNING PFX fmt, ##args) |
| @@ -110,25 +106,21 @@ | |||
| 110 | #define FEATURE_CODEC1 0x0002 | 106 | #define FEATURE_CODEC1 0x0002 |
| 111 | #define FEATURE_CODEC2 0x0004 | 107 | #define FEATURE_CODEC2 0x0004 |
| 112 | 108 | ||
| 113 | /* Turn certain features on/off */ | ||
| 114 | #define PWC_INT_PIPE 0 | ||
| 115 | |||
| 116 | /* Ignore errors in the first N frames, to allow for startup delays */ | 109 | /* Ignore errors in the first N frames, to allow for startup delays */ |
| 117 | #define FRAME_LOWMARK 5 | 110 | #define FRAME_LOWMARK 5 |
| 118 | 111 | ||
| 119 | /* Size and number of buffers for the ISO pipe. */ | 112 | /* Size and number of buffers for the ISO pipe. */ |
| 120 | #define MAX_ISO_BUFS 2 | 113 | #define MAX_ISO_BUFS 3 |
| 121 | #define ISO_FRAMES_PER_DESC 10 | 114 | #define ISO_FRAMES_PER_DESC 10 |
| 122 | #define ISO_MAX_FRAME_SIZE 960 | 115 | #define ISO_MAX_FRAME_SIZE 960 |
| 123 | #define ISO_BUFFER_SIZE (ISO_FRAMES_PER_DESC * ISO_MAX_FRAME_SIZE) | 116 | #define ISO_BUFFER_SIZE (ISO_FRAMES_PER_DESC * ISO_MAX_FRAME_SIZE) |
| 124 | 117 | ||
| 125 | /* Frame buffers: contains compressed or uncompressed video data. */ | ||
| 126 | #define MAX_FRAMES 5 | ||
| 127 | /* Maximum size after decompression is 640x480 YUV data, 1.5 * 640 * 480 */ | 118 | /* Maximum size after decompression is 640x480 YUV data, 1.5 * 640 * 480 */ |
| 128 | #define PWC_FRAME_SIZE (460800 + TOUCAM_HEADER_SIZE + TOUCAM_TRAILER_SIZE) | 119 | #define PWC_FRAME_SIZE (460800 + TOUCAM_HEADER_SIZE + TOUCAM_TRAILER_SIZE) |
| 129 | 120 | ||
| 130 | /* Absolute maximum number of buffers available for mmap() */ | 121 | /* Absolute minimum and maximum number of buffers available for mmap() */ |
| 131 | #define MAX_IMAGES 10 | 122 | #define MIN_FRAMES 2 |
| 123 | #define MAX_FRAMES 16 | ||
| 132 | 124 | ||
| 133 | /* Some macros to quickly find the type of a webcam */ | 125 | /* Some macros to quickly find the type of a webcam */ |
| 134 | #define DEVICE_USE_CODEC1(x) ((x)<675) | 126 | #define DEVICE_USE_CODEC1(x) ((x)<675) |
| @@ -136,149 +128,221 @@ | |||
| 136 | #define DEVICE_USE_CODEC3(x) ((x)>=700) | 128 | #define DEVICE_USE_CODEC3(x) ((x)>=700) |
| 137 | #define DEVICE_USE_CODEC23(x) ((x)>=675) | 129 | #define DEVICE_USE_CODEC23(x) ((x)>=675) |
| 138 | 130 | ||
| 139 | /* The following structures were based on cpia.h. Why reinvent the wheel? :-) */ | 131 | /* from pwc-dec.h */ |
| 140 | struct pwc_iso_buf | 132 | #define PWCX_FLAG_PLANAR 0x0001 |
| 141 | { | 133 | |
| 142 | void *data; | 134 | /* Request types: video */ |
| 143 | int length; | 135 | #define SET_LUM_CTL 0x01 |
| 144 | int read; | 136 | #define GET_LUM_CTL 0x02 |
| 145 | struct urb *urb; | 137 | #define SET_CHROM_CTL 0x03 |
| 146 | }; | 138 | #define GET_CHROM_CTL 0x04 |
| 139 | #define SET_STATUS_CTL 0x05 | ||
| 140 | #define GET_STATUS_CTL 0x06 | ||
| 141 | #define SET_EP_STREAM_CTL 0x07 | ||
| 142 | #define GET_EP_STREAM_CTL 0x08 | ||
| 143 | #define GET_XX_CTL 0x09 | ||
| 144 | #define SET_XX_CTL 0x0A | ||
| 145 | #define GET_XY_CTL 0x0B | ||
| 146 | #define SET_XY_CTL 0x0C | ||
| 147 | #define SET_MPT_CTL 0x0D | ||
| 148 | #define GET_MPT_CTL 0x0E | ||
| 149 | |||
| 150 | /* Selectors for the Luminance controls [GS]ET_LUM_CTL */ | ||
| 151 | #define AGC_MODE_FORMATTER 0x2000 | ||
| 152 | #define PRESET_AGC_FORMATTER 0x2100 | ||
| 153 | #define SHUTTER_MODE_FORMATTER 0x2200 | ||
| 154 | #define PRESET_SHUTTER_FORMATTER 0x2300 | ||
| 155 | #define PRESET_CONTOUR_FORMATTER 0x2400 | ||
| 156 | #define AUTO_CONTOUR_FORMATTER 0x2500 | ||
| 157 | #define BACK_LIGHT_COMPENSATION_FORMATTER 0x2600 | ||
| 158 | #define CONTRAST_FORMATTER 0x2700 | ||
| 159 | #define DYNAMIC_NOISE_CONTROL_FORMATTER 0x2800 | ||
| 160 | #define FLICKERLESS_MODE_FORMATTER 0x2900 | ||
| 161 | #define AE_CONTROL_SPEED 0x2A00 | ||
| 162 | #define BRIGHTNESS_FORMATTER 0x2B00 | ||
| 163 | #define GAMMA_FORMATTER 0x2C00 | ||
| 164 | |||
| 165 | /* Selectors for the Chrominance controls [GS]ET_CHROM_CTL */ | ||
| 166 | #define WB_MODE_FORMATTER 0x1000 | ||
| 167 | #define AWB_CONTROL_SPEED_FORMATTER 0x1100 | ||
| 168 | #define AWB_CONTROL_DELAY_FORMATTER 0x1200 | ||
| 169 | #define PRESET_MANUAL_RED_GAIN_FORMATTER 0x1300 | ||
| 170 | #define PRESET_MANUAL_BLUE_GAIN_FORMATTER 0x1400 | ||
| 171 | #define COLOUR_MODE_FORMATTER 0x1500 | ||
| 172 | #define SATURATION_MODE_FORMATTER1 0x1600 | ||
| 173 | #define SATURATION_MODE_FORMATTER2 0x1700 | ||
| 174 | |||
| 175 | /* Selectors for the Status controls [GS]ET_STATUS_CTL */ | ||
| 176 | #define SAVE_USER_DEFAULTS_FORMATTER 0x0200 | ||
| 177 | #define RESTORE_USER_DEFAULTS_FORMATTER 0x0300 | ||
| 178 | #define RESTORE_FACTORY_DEFAULTS_FORMATTER 0x0400 | ||
| 179 | #define READ_AGC_FORMATTER 0x0500 | ||
| 180 | #define READ_SHUTTER_FORMATTER 0x0600 | ||
| 181 | #define READ_RED_GAIN_FORMATTER 0x0700 | ||
| 182 | #define READ_BLUE_GAIN_FORMATTER 0x0800 | ||
| 183 | |||
| 184 | /* Formatters for the motorized pan & tilt [GS]ET_MPT_CTL */ | ||
| 185 | #define PT_RELATIVE_CONTROL_FORMATTER 0x01 | ||
| 186 | #define PT_RESET_CONTROL_FORMATTER 0x02 | ||
| 187 | #define PT_STATUS_FORMATTER 0x03 | ||
| 147 | 188 | ||
| 148 | /* intermediate buffers with raw data from the USB cam */ | 189 | /* intermediate buffers with raw data from the USB cam */ |
| 149 | struct pwc_frame_buf | 190 | struct pwc_frame_buf |
| 150 | { | 191 | { |
| 151 | void *data; | 192 | struct vb2_buffer vb; /* common v4l buffer stuff -- must be first */ |
| 152 | volatile int filled; /* number of bytes filled */ | 193 | struct list_head list; |
| 153 | struct pwc_frame_buf *next; /* list */ | 194 | void *data; |
| 154 | }; | 195 | int filled; /* number of bytes filled */ |
| 155 | |||
| 156 | /* additionnal informations used when dealing image between kernel and userland */ | ||
| 157 | struct pwc_imgbuf | ||
| 158 | { | ||
| 159 | unsigned long offset; /* offset of this buffer in the big array of image_data */ | ||
| 160 | int vma_use_count; /* count the number of time this memory is mapped */ | ||
| 161 | }; | 196 | }; |
| 162 | 197 | ||
| 163 | struct pwc_device | 198 | struct pwc_device |
| 164 | { | 199 | { |
| 165 | struct video_device vdev; | 200 | struct video_device vdev; |
| 166 | 201 | struct mutex modlock; | |
| 167 | /* Pointer to our usb_device, may be NULL after unplug */ | 202 | |
| 168 | struct usb_device *udev; | 203 | /* Pointer to our usb_device, may be NULL after unplug */ |
| 169 | 204 | struct usb_device *udev; | |
| 170 | int type; /* type of cam (645, 646, 675, 680, 690, 720, 730, 740, 750) */ | 205 | /* Protects the setting of udev to NULL by our disconnect handler */ |
| 171 | int release; /* release number */ | 206 | struct mutex udevlock; |
| 172 | int features; /* feature bits */ | 207 | |
| 173 | char serial[30]; /* serial number (string) */ | 208 | /* type of cam (645, 646, 675, 680, 690, 720, 730, 740, 750) */ |
| 174 | int error_status; /* set when something goes wrong with the cam (unplugged, USB errors) */ | 209 | int type; |
| 175 | int usb_init; /* set when the cam has been initialized over USB */ | 210 | int release; /* release number */ |
| 176 | 211 | int features; /* feature bits */ | |
| 177 | /*** Video data ***/ | 212 | char serial[30]; /* serial number (string) */ |
| 178 | int vopen; /* flag */ | 213 | |
| 179 | int vendpoint; /* video isoc endpoint */ | 214 | /*** Video data ***/ |
| 180 | int vcinterface; /* video control interface */ | 215 | struct file *capt_file; /* file doing video capture */ |
| 181 | int valternate; /* alternate interface needed */ | 216 | int vendpoint; /* video isoc endpoint */ |
| 182 | int vframes, vsize; /* frames-per-second & size (see PSZ_*) */ | 217 | int vcinterface; /* video control interface */ |
| 183 | int pixfmt; /* pixelformat: V4L2_PIX_FMT_YUV420 or raw: _PWC1, _PWC2 */ | 218 | int valternate; /* alternate interface needed */ |
| 184 | int vframe_count; /* received frames */ | 219 | int vframes, vsize; /* frames-per-second & size (see PSZ_*) */ |
| 185 | int vframes_dumped; /* counter for dumped frames */ | 220 | int pixfmt; /* pixelformat: V4L2_PIX_FMT_YUV420 or _PWCX */ |
| 186 | int vframes_error; /* frames received in error */ | 221 | int vframe_count; /* received frames */ |
| 187 | int vmax_packet_size; /* USB maxpacket size */ | 222 | int vmax_packet_size; /* USB maxpacket size */ |
| 188 | int vlast_packet_size; /* for frame synchronisation */ | 223 | int vlast_packet_size; /* for frame synchronisation */ |
| 189 | int visoc_errors; /* number of contiguous ISOC errors */ | 224 | int visoc_errors; /* number of contiguous ISOC errors */ |
| 190 | int vcompression; /* desired compression factor */ | 225 | int vcompression; /* desired compression factor */ |
| 191 | int vbandlength; /* compressed band length; 0 is uncompressed */ | 226 | int vbandlength; /* compressed band length; 0 is uncompressed */ |
| 192 | char vsnapshot; /* snapshot mode */ | 227 | char vsnapshot; /* snapshot mode */ |
| 193 | char vsync; /* used by isoc handler */ | 228 | char vsync; /* used by isoc handler */ |
| 194 | char vmirror; /* for ToUCaM series */ | 229 | char vmirror; /* for ToUCaM series */ |
| 195 | char unplugged; | 230 | char power_save; /* Do powersaving for this cam */ |
| 196 | 231 | ||
| 197 | int cmd_len; | 232 | int cmd_len; |
| 198 | unsigned char cmd_buf[13]; | 233 | unsigned char cmd_buf[13]; |
| 199 | 234 | ||
| 200 | /* The image acquisition requires 3 to 4 steps: | 235 | struct urb *urbs[MAX_ISO_BUFS]; |
| 201 | 1. data is gathered in short packets from the USB controller | 236 | char iso_init; |
| 202 | 2. data is synchronized and packed into a frame buffer | 237 | |
| 203 | 3a. in case data is compressed, decompress it directly into image buffer | 238 | /* videobuf2 queue and queued buffers list */ |
| 204 | 3b. in case data is uncompressed, copy into image buffer with viewport | 239 | struct vb2_queue vb_queue; |
| 205 | 4. data is transferred to the user process | 240 | struct list_head queued_bufs; |
| 206 | 241 | spinlock_t queued_bufs_lock; | |
| 207 | Note that MAX_ISO_BUFS != MAX_FRAMES != MAX_IMAGES.... | 242 | |
| 208 | We have in effect a back-to-back-double-buffer system. | 243 | /* |
| 209 | */ | 244 | * Frame currently being filled, this only gets touched by the |
| 210 | /* 1: isoc */ | 245 | * isoc urb complete handler, and by stream start / stop since |
| 211 | struct pwc_iso_buf sbuf[MAX_ISO_BUFS]; | 246 | * start / stop touch it before / after starting / killing the urbs |
| 212 | char iso_init; | 247 | * no locking is needed around this |
| 213 | 248 | */ | |
| 214 | /* 2: frame */ | 249 | struct pwc_frame_buf *fill_buf; |
| 215 | struct pwc_frame_buf *fbuf; /* all frames */ | 250 | |
| 216 | struct pwc_frame_buf *empty_frames, *empty_frames_tail; /* all empty frames */ | 251 | int frame_header_size, frame_trailer_size; |
| 217 | struct pwc_frame_buf *full_frames, *full_frames_tail; /* all filled frames */ | 252 | int frame_size; |
| 218 | struct pwc_frame_buf *fill_frame; /* frame currently being filled */ | 253 | int frame_total_size; /* including header & trailer */ |
| 219 | struct pwc_frame_buf *read_frame; /* frame currently read by user process */ | 254 | int drop_frames; |
| 220 | int frame_header_size, frame_trailer_size; | 255 | |
| 221 | int frame_size; | 256 | void *decompress_data; /* private data for decompression engine */ |
| 222 | int frame_total_size; /* including header & trailer */ | 257 | |
| 223 | int drop_frames; | 258 | /* |
| 224 | 259 | * We have an 'image' and a 'view', where 'image' is the fixed-size img | |
| 225 | /* 3: decompression */ | 260 | * as delivered by the camera, and 'view' is the size requested by the |
| 226 | void *decompress_data; /* private data for decompression engine */ | 261 | * program. The camera image is centered in this viewport, laced with |
| 227 | 262 | * a gray or black border. view_min <= image <= view <= view_max; | |
| 228 | /* 4: image */ | 263 | */ |
| 229 | /* We have an 'image' and a 'view', where 'image' is the fixed-size image | 264 | int image_mask; /* supported sizes */ |
| 230 | as delivered by the camera, and 'view' is the size requested by the | 265 | struct pwc_coord view_min, view_max; /* minimum and maximum view */ |
| 231 | program. The camera image is centered in this viewport, laced with | 266 | struct pwc_coord abs_max; /* maximum supported size */ |
| 232 | a gray or black border. view_min <= image <= view <= view_max; | 267 | struct pwc_coord image, view; /* image and viewport size */ |
| 233 | */ | 268 | struct pwc_coord offset; /* offset of the viewport */ |
| 234 | int image_mask; /* bitmask of supported sizes */ | 269 | |
| 235 | struct pwc_coord view_min, view_max; /* minimum and maximum viewable sizes */ | 270 | /*** motorized pan/tilt feature */ |
| 236 | struct pwc_coord abs_max; /* maximum supported size with compression */ | 271 | struct pwc_mpt_range angle_range; |
| 237 | struct pwc_coord image, view; /* image and viewport size */ | 272 | int pan_angle; /* in degrees * 100 */ |
| 238 | struct pwc_coord offset; /* offset within the viewport */ | 273 | int tilt_angle; /* absolute angle; 0,0 is home */ |
| 239 | 274 | ||
| 240 | void *image_data; /* total buffer, which is subdivided into ... */ | 275 | /* |
| 241 | struct pwc_imgbuf images[MAX_IMAGES];/* ...several images... */ | 276 | * Set to 1 when the user push the button, reset to 0 |
| 242 | int fill_image; /* ...which are rotated. */ | 277 | * when this value is read from sysfs. |
| 243 | int len_per_image; /* length per image */ | 278 | */ |
| 244 | int image_read_pos; /* In case we read data in pieces, keep track of were we are in the imagebuffer */ | 279 | int snapshot_button_status; |
| 245 | int image_used[MAX_IMAGES]; /* For MCAPTURE and SYNC */ | ||
| 246 | |||
| 247 | struct mutex modlock; /* to prevent races in video_open(), etc */ | ||
| 248 | spinlock_t ptrlock; /* for manipulating the buffer pointers */ | ||
| 249 | |||
| 250 | /*** motorized pan/tilt feature */ | ||
| 251 | struct pwc_mpt_range angle_range; | ||
| 252 | int pan_angle; /* in degrees * 100 */ | ||
| 253 | int tilt_angle; /* absolute angle; 0,0 is home position */ | ||
| 254 | int snapshot_button_status; /* set to 1 when the user push the button, reset to 0 when this value is read */ | ||
| 255 | #ifdef CONFIG_USB_PWC_INPUT_EVDEV | 280 | #ifdef CONFIG_USB_PWC_INPUT_EVDEV |
| 256 | struct input_dev *button_dev; /* webcam snapshot button input */ | 281 | struct input_dev *button_dev; /* webcam snapshot button input */ |
| 257 | char button_phys[64]; | 282 | char button_phys[64]; |
| 258 | #endif | 283 | #endif |
| 259 | 284 | ||
| 260 | /*** Misc. data ***/ | 285 | /* controls */ |
| 261 | wait_queue_head_t frameq; /* When waiting for a frame to finish... */ | 286 | struct v4l2_ctrl_handler ctrl_handler; |
| 262 | #if PWC_INT_PIPE | 287 | u16 saturation_fmt; |
| 263 | void *usb_int_handler; /* for the interrupt endpoint */ | 288 | struct v4l2_ctrl *brightness; |
| 264 | #endif | 289 | struct v4l2_ctrl *contrast; |
| 290 | struct v4l2_ctrl *saturation; | ||
| 291 | struct v4l2_ctrl *gamma; | ||
| 292 | struct { | ||
| 293 | /* awb / red-blue balance cluster */ | ||
| 294 | struct v4l2_ctrl *auto_white_balance; | ||
| 295 | struct v4l2_ctrl *red_balance; | ||
| 296 | struct v4l2_ctrl *blue_balance; | ||
| 297 | /* usb ctrl transfers are slow, so we cache things */ | ||
| 298 | int color_bal_valid; | ||
| 299 | unsigned long last_color_bal_update; /* In jiffies */ | ||
| 300 | s32 last_red_balance; | ||
| 301 | s32 last_blue_balance; | ||
| 302 | }; | ||
| 303 | struct { | ||
| 304 | /* autogain / gain cluster */ | ||
| 305 | struct v4l2_ctrl *autogain; | ||
| 306 | struct v4l2_ctrl *gain; | ||
| 307 | int gain_valid; | ||
| 308 | unsigned long last_gain_update; /* In jiffies */ | ||
| 309 | s32 last_gain; | ||
| 310 | }; | ||
| 311 | struct { | ||
| 312 | /* exposure_auto / exposure cluster */ | ||
| 313 | struct v4l2_ctrl *exposure_auto; | ||
| 314 | struct v4l2_ctrl *exposure; | ||
| 315 | int exposure_valid; | ||
| 316 | unsigned long last_exposure_update; /* In jiffies */ | ||
| 317 | s32 last_exposure; | ||
| 318 | }; | ||
| 319 | struct v4l2_ctrl *colorfx; | ||
| 320 | struct { | ||
| 321 | /* autocontour/contour cluster */ | ||
| 322 | struct v4l2_ctrl *autocontour; | ||
| 323 | struct v4l2_ctrl *contour; | ||
| 324 | }; | ||
| 325 | struct v4l2_ctrl *backlight; | ||
| 326 | struct v4l2_ctrl *flicker; | ||
| 327 | struct v4l2_ctrl *noise_reduction; | ||
| 328 | struct v4l2_ctrl *save_user; | ||
| 329 | struct v4l2_ctrl *restore_user; | ||
| 330 | struct v4l2_ctrl *restore_factory; | ||
| 331 | struct { | ||
| 332 | /* motor control cluster */ | ||
| 333 | struct v4l2_ctrl *motor_pan; | ||
| 334 | struct v4l2_ctrl *motor_tilt; | ||
| 335 | struct v4l2_ctrl *motor_pan_reset; | ||
| 336 | struct v4l2_ctrl *motor_tilt_reset; | ||
| 337 | }; | ||
| 338 | /* CODEC3 models have both gain and exposure controlled by autogain */ | ||
| 339 | struct v4l2_ctrl *autogain_expo_cluster[3]; | ||
| 265 | }; | 340 | }; |
| 266 | 341 | ||
| 267 | #ifdef __cplusplus | ||
| 268 | extern "C" { | ||
| 269 | #endif | ||
| 270 | |||
| 271 | /* Global variables */ | 342 | /* Global variables */ |
| 272 | #ifdef CONFIG_USB_PWC_DEBUG | 343 | #ifdef CONFIG_USB_PWC_DEBUG |
| 273 | extern int pwc_trace; | 344 | extern int pwc_trace; |
| 274 | #endif | 345 | #endif |
| 275 | extern int pwc_mbufs; | ||
| 276 | |||
| 277 | /** functions in pwc-if.c */ | ||
| 278 | int pwc_handle_frame(struct pwc_device *pdev); | ||
| 279 | void pwc_next_image(struct pwc_device *pdev); | ||
| 280 | int pwc_isoc_init(struct pwc_device *pdev); | ||
| 281 | void pwc_isoc_cleanup(struct pwc_device *pdev); | ||
| 282 | 346 | ||
| 283 | /** Functions in pwc-misc.c */ | 347 | /** Functions in pwc-misc.c */ |
| 284 | /* sizes in pixels */ | 348 | /* sizes in pixels */ |
| @@ -291,50 +355,25 @@ void pwc_construct(struct pwc_device *pdev); | |||
| 291 | /* Request a certain video mode. Returns < 0 if not possible */ | 355 | /* Request a certain video mode. Returns < 0 if not possible */ |
| 292 | extern int pwc_set_video_mode(struct pwc_device *pdev, int width, int height, int frames, int compression, int snapshot); | 356 | extern int pwc_set_video_mode(struct pwc_device *pdev, int width, int height, int frames, int compression, int snapshot); |
| 293 | extern unsigned int pwc_get_fps(struct pwc_device *pdev, unsigned int index, unsigned int size); | 357 | extern unsigned int pwc_get_fps(struct pwc_device *pdev, unsigned int index, unsigned int size); |
| 294 | /* Calculate the number of bytes per image (not frame) */ | ||
| 295 | extern int pwc_mpt_reset(struct pwc_device *pdev, int flags); | 358 | extern int pwc_mpt_reset(struct pwc_device *pdev, int flags); |
| 296 | extern int pwc_mpt_set_angle(struct pwc_device *pdev, int pan, int tilt); | 359 | extern int pwc_mpt_set_angle(struct pwc_device *pdev, int pan, int tilt); |
| 297 | |||
| 298 | /* Various controls; should be obvious. Value 0..65535, or < 0 on error */ | ||
| 299 | extern int pwc_get_brightness(struct pwc_device *pdev); | ||
| 300 | extern int pwc_set_brightness(struct pwc_device *pdev, int value); | ||
| 301 | extern int pwc_get_contrast(struct pwc_device *pdev); | ||
| 302 | extern int pwc_set_contrast(struct pwc_device *pdev, int value); | ||
| 303 | extern int pwc_get_gamma(struct pwc_device *pdev); | ||
| 304 | extern int pwc_set_gamma(struct pwc_device *pdev, int value); | ||
| 305 | extern int pwc_get_saturation(struct pwc_device *pdev, int *value); | ||
| 306 | extern int pwc_set_saturation(struct pwc_device *pdev, int value); | ||
| 307 | extern int pwc_set_leds(struct pwc_device *pdev, int on_value, int off_value); | 360 | extern int pwc_set_leds(struct pwc_device *pdev, int on_value, int off_value); |
| 308 | extern int pwc_get_cmos_sensor(struct pwc_device *pdev, int *sensor); | 361 | extern int pwc_get_cmos_sensor(struct pwc_device *pdev, int *sensor); |
| 309 | extern int pwc_restore_user(struct pwc_device *pdev); | 362 | extern int send_control_msg(struct pwc_device *pdev, |
| 310 | extern int pwc_save_user(struct pwc_device *pdev); | 363 | u8 request, u16 value, void *buf, int buflen); |
| 311 | extern int pwc_restore_factory(struct pwc_device *pdev); | 364 | |
| 312 | 365 | /* Control get / set helpers */ | |
| 313 | /* exported for use by v4l2 controls */ | 366 | int pwc_get_u8_ctrl(struct pwc_device *pdev, u8 request, u16 value, int *data); |
| 314 | extern int pwc_get_red_gain(struct pwc_device *pdev, int *value); | 367 | int pwc_set_u8_ctrl(struct pwc_device *pdev, u8 request, u16 value, u8 data); |
| 315 | extern int pwc_set_red_gain(struct pwc_device *pdev, int value); | 368 | int pwc_get_s8_ctrl(struct pwc_device *pdev, u8 request, u16 value, int *data); |
| 316 | extern int pwc_get_blue_gain(struct pwc_device *pdev, int *value); | 369 | #define pwc_set_s8_ctrl pwc_set_u8_ctrl |
| 317 | extern int pwc_set_blue_gain(struct pwc_device *pdev, int value); | 370 | int pwc_get_u16_ctrl(struct pwc_device *pdev, u8 request, u16 value, int *dat); |
| 318 | extern int pwc_get_awb(struct pwc_device *pdev); | 371 | int pwc_set_u16_ctrl(struct pwc_device *pdev, u8 request, u16 value, u16 data); |
| 319 | extern int pwc_set_awb(struct pwc_device *pdev, int mode); | 372 | int pwc_button_ctrl(struct pwc_device *pdev, u16 value); |
| 320 | extern int pwc_set_agc(struct pwc_device *pdev, int mode, int value); | 373 | int pwc_init_controls(struct pwc_device *pdev); |
| 321 | extern int pwc_get_agc(struct pwc_device *pdev, int *value); | ||
| 322 | extern int pwc_set_shutter_speed(struct pwc_device *pdev, int mode, int value); | ||
| 323 | extern int pwc_get_shutter_speed(struct pwc_device *pdev, int *value); | ||
| 324 | |||
| 325 | extern int pwc_set_colour_mode(struct pwc_device *pdev, int colour); | ||
| 326 | extern int pwc_get_colour_mode(struct pwc_device *pdev, int *colour); | ||
| 327 | extern int pwc_set_contour(struct pwc_device *pdev, int contour); | ||
| 328 | extern int pwc_get_contour(struct pwc_device *pdev, int *contour); | ||
| 329 | extern int pwc_set_backlight(struct pwc_device *pdev, int backlight); | ||
| 330 | extern int pwc_get_backlight(struct pwc_device *pdev, int *backlight); | ||
| 331 | extern int pwc_set_flicker(struct pwc_device *pdev, int flicker); | ||
| 332 | extern int pwc_get_flicker(struct pwc_device *pdev, int *flicker); | ||
| 333 | extern int pwc_set_dynamic_noise(struct pwc_device *pdev, int noise); | ||
| 334 | extern int pwc_get_dynamic_noise(struct pwc_device *pdev, int *noise); | ||
| 335 | 374 | ||
| 336 | /* Power down or up the camera; not supported by all models */ | 375 | /* Power down or up the camera; not supported by all models */ |
| 337 | extern int pwc_camera_power(struct pwc_device *pdev, int power); | 376 | extern void pwc_camera_power(struct pwc_device *pdev, int power); |
| 338 | 377 | ||
| 339 | /* Private ioctl()s; see pwc-ioctl.h */ | 378 | /* Private ioctl()s; see pwc-ioctl.h */ |
| 340 | extern long pwc_ioctl(struct pwc_device *pdev, unsigned int cmd, void *arg); | 379 | extern long pwc_ioctl(struct pwc_device *pdev, unsigned int cmd, void *arg); |
| @@ -343,12 +382,6 @@ extern const struct v4l2_ioctl_ops pwc_ioctl_ops; | |||
| 343 | 382 | ||
| 344 | /** pwc-uncompress.c */ | 383 | /** pwc-uncompress.c */ |
| 345 | /* Expand frame to image, possibly including decompression. Uses read_frame and fill_image */ | 384 | /* Expand frame to image, possibly including decompression. Uses read_frame and fill_image */ |
| 346 | extern int pwc_decompress(struct pwc_device *pdev); | 385 | int pwc_decompress(struct pwc_device *pdev, struct pwc_frame_buf *fbuf); |
| 347 | |||
| 348 | #ifdef __cplusplus | ||
| 349 | } | ||
| 350 | #endif | ||
| 351 | |||
| 352 | 386 | ||
| 353 | #endif | 387 | #endif |
| 354 | /* vim: set cino= formatoptions=croql cindent shiftwidth=8 tabstop=8: */ | ||
diff --git a/drivers/media/video/pxa_camera.c b/drivers/media/video/pxa_camera.c index b42bfa5ccdf2..d07df22a5ec6 100644 --- a/drivers/media/video/pxa_camera.c +++ b/drivers/media/video/pxa_camera.c | |||
| @@ -22,7 +22,6 @@ | |||
| 22 | #include <linux/mm.h> | 22 | #include <linux/mm.h> |
| 23 | #include <linux/moduleparam.h> | 23 | #include <linux/moduleparam.h> |
| 24 | #include <linux/time.h> | 24 | #include <linux/time.h> |
| 25 | #include <linux/version.h> | ||
| 26 | #include <linux/device.h> | 25 | #include <linux/device.h> |
| 27 | #include <linux/platform_device.h> | 26 | #include <linux/platform_device.h> |
| 28 | #include <linux/clk.h> | 27 | #include <linux/clk.h> |
| @@ -40,7 +39,7 @@ | |||
| 40 | #include <mach/dma.h> | 39 | #include <mach/dma.h> |
| 41 | #include <mach/camera.h> | 40 | #include <mach/camera.h> |
| 42 | 41 | ||
| 43 | #define PXA_CAM_VERSION_CODE KERNEL_VERSION(0, 0, 5) | 42 | #define PXA_CAM_VERSION "0.0.6" |
| 44 | #define PXA_CAM_DRV_NAME "pxa27x-camera" | 43 | #define PXA_CAM_DRV_NAME "pxa27x-camera" |
| 45 | 44 | ||
| 46 | /* Camera Interface */ | 45 | /* Camera Interface */ |
| @@ -247,7 +246,7 @@ static int pxa_videobuf_setup(struct videobuf_queue *vq, unsigned int *count, | |||
| 247 | if (bytes_per_line < 0) | 246 | if (bytes_per_line < 0) |
| 248 | return bytes_per_line; | 247 | return bytes_per_line; |
| 249 | 248 | ||
| 250 | dev_dbg(icd->dev.parent, "count=%d, size=%d\n", *count, *size); | 249 | dev_dbg(icd->parent, "count=%d, size=%d\n", *count, *size); |
| 251 | 250 | ||
| 252 | *size = bytes_per_line * icd->user_height; | 251 | *size = bytes_per_line * icd->user_height; |
| 253 | 252 | ||
| @@ -262,13 +261,13 @@ static int pxa_videobuf_setup(struct videobuf_queue *vq, unsigned int *count, | |||
| 262 | static void free_buffer(struct videobuf_queue *vq, struct pxa_buffer *buf) | 261 | static void free_buffer(struct videobuf_queue *vq, struct pxa_buffer *buf) |
| 263 | { | 262 | { |
| 264 | struct soc_camera_device *icd = vq->priv_data; | 263 | struct soc_camera_device *icd = vq->priv_data; |
| 265 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 264 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 266 | struct videobuf_dmabuf *dma = videobuf_to_dma(&buf->vb); | 265 | struct videobuf_dmabuf *dma = videobuf_to_dma(&buf->vb); |
| 267 | int i; | 266 | int i; |
| 268 | 267 | ||
| 269 | BUG_ON(in_interrupt()); | 268 | BUG_ON(in_interrupt()); |
| 270 | 269 | ||
| 271 | dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__, | 270 | dev_dbg(icd->parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__, |
| 272 | &buf->vb, buf->vb.baddr, buf->vb.bsize); | 271 | &buf->vb, buf->vb.baddr, buf->vb.bsize); |
| 273 | 272 | ||
| 274 | /* | 273 | /* |
| @@ -429,7 +428,7 @@ static int pxa_videobuf_prepare(struct videobuf_queue *vq, | |||
| 429 | struct videobuf_buffer *vb, enum v4l2_field field) | 428 | struct videobuf_buffer *vb, enum v4l2_field field) |
| 430 | { | 429 | { |
| 431 | struct soc_camera_device *icd = vq->priv_data; | 430 | struct soc_camera_device *icd = vq->priv_data; |
| 432 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 431 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 433 | struct pxa_camera_dev *pcdev = ici->priv; | 432 | struct pxa_camera_dev *pcdev = ici->priv; |
| 434 | struct device *dev = pcdev->soc_host.v4l2_dev.dev; | 433 | struct device *dev = pcdev->soc_host.v4l2_dev.dev; |
| 435 | struct pxa_buffer *buf = container_of(vb, struct pxa_buffer, vb); | 434 | struct pxa_buffer *buf = container_of(vb, struct pxa_buffer, vb); |
| @@ -636,11 +635,11 @@ static void pxa_videobuf_queue(struct videobuf_queue *vq, | |||
| 636 | struct videobuf_buffer *vb) | 635 | struct videobuf_buffer *vb) |
| 637 | { | 636 | { |
| 638 | struct soc_camera_device *icd = vq->priv_data; | 637 | struct soc_camera_device *icd = vq->priv_data; |
| 639 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 638 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 640 | struct pxa_camera_dev *pcdev = ici->priv; | 639 | struct pxa_camera_dev *pcdev = ici->priv; |
| 641 | struct pxa_buffer *buf = container_of(vb, struct pxa_buffer, vb); | 640 | struct pxa_buffer *buf = container_of(vb, struct pxa_buffer, vb); |
| 642 | 641 | ||
| 643 | dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d active=%p\n", | 642 | dev_dbg(icd->parent, "%s (vb=0x%p) 0x%08lx %d active=%p\n", |
| 644 | __func__, vb, vb->baddr, vb->bsize, pcdev->active); | 643 | __func__, vb, vb->baddr, vb->bsize, pcdev->active); |
| 645 | 644 | ||
| 646 | list_add_tail(&vb->queue, &pcdev->capture); | 645 | list_add_tail(&vb->queue, &pcdev->capture); |
| @@ -658,7 +657,7 @@ static void pxa_videobuf_release(struct videobuf_queue *vq, | |||
| 658 | struct pxa_buffer *buf = container_of(vb, struct pxa_buffer, vb); | 657 | struct pxa_buffer *buf = container_of(vb, struct pxa_buffer, vb); |
| 659 | #ifdef DEBUG | 658 | #ifdef DEBUG |
| 660 | struct soc_camera_device *icd = vq->priv_data; | 659 | struct soc_camera_device *icd = vq->priv_data; |
| 661 | struct device *dev = icd->dev.parent; | 660 | struct device *dev = icd->parent; |
| 662 | 661 | ||
| 663 | dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__, | 662 | dev_dbg(dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__, |
| 664 | vb, vb->baddr, vb->bsize); | 663 | vb, vb->baddr, vb->bsize); |
| @@ -843,7 +842,7 @@ static struct videobuf_queue_ops pxa_videobuf_ops = { | |||
| 843 | static void pxa_camera_init_videobuf(struct videobuf_queue *q, | 842 | static void pxa_camera_init_videobuf(struct videobuf_queue *q, |
| 844 | struct soc_camera_device *icd) | 843 | struct soc_camera_device *icd) |
| 845 | { | 844 | { |
| 846 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 845 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 847 | struct pxa_camera_dev *pcdev = ici->priv; | 846 | struct pxa_camera_dev *pcdev = ici->priv; |
| 848 | 847 | ||
| 849 | /* | 848 | /* |
| @@ -972,7 +971,7 @@ static irqreturn_t pxa_camera_irq(int irq, void *data) | |||
| 972 | */ | 971 | */ |
| 973 | static int pxa_camera_add_device(struct soc_camera_device *icd) | 972 | static int pxa_camera_add_device(struct soc_camera_device *icd) |
| 974 | { | 973 | { |
| 975 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 974 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 976 | struct pxa_camera_dev *pcdev = ici->priv; | 975 | struct pxa_camera_dev *pcdev = ici->priv; |
| 977 | 976 | ||
| 978 | if (pcdev->icd) | 977 | if (pcdev->icd) |
| @@ -982,7 +981,7 @@ static int pxa_camera_add_device(struct soc_camera_device *icd) | |||
| 982 | 981 | ||
| 983 | pcdev->icd = icd; | 982 | pcdev->icd = icd; |
| 984 | 983 | ||
| 985 | dev_info(icd->dev.parent, "PXA Camera driver attached to camera %d\n", | 984 | dev_info(icd->parent, "PXA Camera driver attached to camera %d\n", |
| 986 | icd->devnum); | 985 | icd->devnum); |
| 987 | 986 | ||
| 988 | return 0; | 987 | return 0; |
| @@ -991,12 +990,12 @@ static int pxa_camera_add_device(struct soc_camera_device *icd) | |||
| 991 | /* Called with .video_lock held */ | 990 | /* Called with .video_lock held */ |
| 992 | static void pxa_camera_remove_device(struct soc_camera_device *icd) | 991 | static void pxa_camera_remove_device(struct soc_camera_device *icd) |
| 993 | { | 992 | { |
| 994 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 993 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 995 | struct pxa_camera_dev *pcdev = ici->priv; | 994 | struct pxa_camera_dev *pcdev = ici->priv; |
| 996 | 995 | ||
| 997 | BUG_ON(icd != pcdev->icd); | 996 | BUG_ON(icd != pcdev->icd); |
| 998 | 997 | ||
| 999 | dev_info(icd->dev.parent, "PXA Camera driver detached from camera %d\n", | 998 | dev_info(icd->parent, "PXA Camera driver detached from camera %d\n", |
| 1000 | icd->devnum); | 999 | icd->devnum); |
| 1001 | 1000 | ||
| 1002 | /* disable capture, disable interrupts */ | 1001 | /* disable capture, disable interrupts */ |
| @@ -1057,7 +1056,7 @@ static int test_platform_param(struct pxa_camera_dev *pcdev, | |||
| 1057 | static void pxa_camera_setup_cicr(struct soc_camera_device *icd, | 1056 | static void pxa_camera_setup_cicr(struct soc_camera_device *icd, |
| 1058 | unsigned long flags, __u32 pixfmt) | 1057 | unsigned long flags, __u32 pixfmt) |
| 1059 | { | 1058 | { |
| 1060 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 1059 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 1061 | struct pxa_camera_dev *pcdev = ici->priv; | 1060 | struct pxa_camera_dev *pcdev = ici->priv; |
| 1062 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | 1061 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); |
| 1063 | unsigned long dw, bpp; | 1062 | unsigned long dw, bpp; |
| @@ -1152,7 +1151,7 @@ static void pxa_camera_setup_cicr(struct soc_camera_device *icd, | |||
| 1152 | 1151 | ||
| 1153 | static int pxa_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt) | 1152 | static int pxa_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt) |
| 1154 | { | 1153 | { |
| 1155 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 1154 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 1156 | struct pxa_camera_dev *pcdev = ici->priv; | 1155 | struct pxa_camera_dev *pcdev = ici->priv; |
| 1157 | unsigned long bus_flags, camera_flags, common_flags; | 1156 | unsigned long bus_flags, camera_flags, common_flags; |
| 1158 | int ret; | 1157 | int ret; |
| @@ -1210,7 +1209,7 @@ static int pxa_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt) | |||
| 1210 | static int pxa_camera_try_bus_param(struct soc_camera_device *icd, | 1209 | static int pxa_camera_try_bus_param(struct soc_camera_device *icd, |
| 1211 | unsigned char buswidth) | 1210 | unsigned char buswidth) |
| 1212 | { | 1211 | { |
| 1213 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 1212 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 1214 | struct pxa_camera_dev *pcdev = ici->priv; | 1213 | struct pxa_camera_dev *pcdev = ici->priv; |
| 1215 | unsigned long bus_flags, camera_flags; | 1214 | unsigned long bus_flags, camera_flags; |
| 1216 | int ret = test_platform_param(pcdev, buswidth, &bus_flags); | 1215 | int ret = test_platform_param(pcdev, buswidth, &bus_flags); |
| @@ -1247,7 +1246,7 @@ static int pxa_camera_get_formats(struct soc_camera_device *icd, unsigned int id | |||
| 1247 | struct soc_camera_format_xlate *xlate) | 1246 | struct soc_camera_format_xlate *xlate) |
| 1248 | { | 1247 | { |
| 1249 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | 1248 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); |
| 1250 | struct device *dev = icd->dev.parent; | 1249 | struct device *dev = icd->parent; |
| 1251 | int formats = 0, ret; | 1250 | int formats = 0, ret; |
| 1252 | struct pxa_cam *cam; | 1251 | struct pxa_cam *cam; |
| 1253 | enum v4l2_mbus_pixelcode code; | 1252 | enum v4l2_mbus_pixelcode code; |
| @@ -1335,9 +1334,9 @@ static int pxa_camera_set_crop(struct soc_camera_device *icd, | |||
| 1335 | struct v4l2_crop *a) | 1334 | struct v4l2_crop *a) |
| 1336 | { | 1335 | { |
| 1337 | struct v4l2_rect *rect = &a->c; | 1336 | struct v4l2_rect *rect = &a->c; |
| 1338 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 1337 | struct device *dev = icd->parent; |
| 1338 | struct soc_camera_host *ici = to_soc_camera_host(dev); | ||
| 1339 | struct pxa_camera_dev *pcdev = ici->priv; | 1339 | struct pxa_camera_dev *pcdev = ici->priv; |
| 1340 | struct device *dev = icd->dev.parent; | ||
| 1341 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | 1340 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); |
| 1342 | struct soc_camera_sense sense = { | 1341 | struct soc_camera_sense sense = { |
| 1343 | .master_clock = pcdev->mclk, | 1342 | .master_clock = pcdev->mclk, |
| @@ -1379,7 +1378,7 @@ static int pxa_camera_set_crop(struct soc_camera_device *icd, | |||
| 1379 | return ret; | 1378 | return ret; |
| 1380 | 1379 | ||
| 1381 | if (pxa_camera_check_frame(mf.width, mf.height)) { | 1380 | if (pxa_camera_check_frame(mf.width, mf.height)) { |
| 1382 | dev_warn(icd->dev.parent, | 1381 | dev_warn(icd->parent, |
| 1383 | "Inconsistent state. Use S_FMT to repair\n"); | 1382 | "Inconsistent state. Use S_FMT to repair\n"); |
| 1384 | return -EINVAL; | 1383 | return -EINVAL; |
| 1385 | } | 1384 | } |
| @@ -1406,9 +1405,9 @@ static int pxa_camera_set_crop(struct soc_camera_device *icd, | |||
| 1406 | static int pxa_camera_set_fmt(struct soc_camera_device *icd, | 1405 | static int pxa_camera_set_fmt(struct soc_camera_device *icd, |
| 1407 | struct v4l2_format *f) | 1406 | struct v4l2_format *f) |
| 1408 | { | 1407 | { |
| 1409 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 1408 | struct device *dev = icd->parent; |
| 1409 | struct soc_camera_host *ici = to_soc_camera_host(dev); | ||
| 1410 | struct pxa_camera_dev *pcdev = ici->priv; | 1410 | struct pxa_camera_dev *pcdev = ici->priv; |
| 1411 | struct device *dev = icd->dev.parent; | ||
| 1412 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | 1411 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); |
| 1413 | const struct soc_camera_format_xlate *xlate = NULL; | 1412 | const struct soc_camera_format_xlate *xlate = NULL; |
| 1414 | struct soc_camera_sense sense = { | 1413 | struct soc_camera_sense sense = { |
| @@ -1485,7 +1484,7 @@ static int pxa_camera_try_fmt(struct soc_camera_device *icd, | |||
| 1485 | 1484 | ||
| 1486 | xlate = soc_camera_xlate_by_fourcc(icd, pixfmt); | 1485 | xlate = soc_camera_xlate_by_fourcc(icd, pixfmt); |
| 1487 | if (!xlate) { | 1486 | if (!xlate) { |
| 1488 | dev_warn(icd->dev.parent, "Format %x not found\n", pixfmt); | 1487 | dev_warn(icd->parent, "Format %x not found\n", pixfmt); |
| 1489 | return -EINVAL; | 1488 | return -EINVAL; |
| 1490 | } | 1489 | } |
| 1491 | 1490 | ||
| @@ -1499,16 +1498,11 @@ static int pxa_camera_try_fmt(struct soc_camera_device *icd, | |||
| 1499 | &pix->height, 32, 2048, 0, | 1498 | &pix->height, 32, 2048, 0, |
| 1500 | pixfmt == V4L2_PIX_FMT_YUV422P ? 4 : 0); | 1499 | pixfmt == V4L2_PIX_FMT_YUV422P ? 4 : 0); |
| 1501 | 1500 | ||
| 1502 | pix->bytesperline = soc_mbus_bytes_per_line(pix->width, | ||
| 1503 | xlate->host_fmt); | ||
| 1504 | if (pix->bytesperline < 0) | ||
| 1505 | return pix->bytesperline; | ||
| 1506 | pix->sizeimage = pix->height * pix->bytesperline; | ||
| 1507 | |||
| 1508 | /* limit to sensor capabilities */ | 1501 | /* limit to sensor capabilities */ |
| 1509 | mf.width = pix->width; | 1502 | mf.width = pix->width; |
| 1510 | mf.height = pix->height; | 1503 | mf.height = pix->height; |
| 1511 | mf.field = pix->field; | 1504 | /* Only progressive video supported so far */ |
| 1505 | mf.field = V4L2_FIELD_NONE; | ||
| 1512 | mf.colorspace = pix->colorspace; | 1506 | mf.colorspace = pix->colorspace; |
| 1513 | mf.code = xlate->code; | 1507 | mf.code = xlate->code; |
| 1514 | 1508 | ||
| @@ -1527,7 +1521,7 @@ static int pxa_camera_try_fmt(struct soc_camera_device *icd, | |||
| 1527 | break; | 1521 | break; |
| 1528 | default: | 1522 | default: |
| 1529 | /* TODO: support interlaced at least in pass-through mode */ | 1523 | /* TODO: support interlaced at least in pass-through mode */ |
| 1530 | dev_err(icd->dev.parent, "Field type %d unsupported.\n", | 1524 | dev_err(icd->parent, "Field type %d unsupported.\n", |
| 1531 | mf.field); | 1525 | mf.field); |
| 1532 | return -EINVAL; | 1526 | return -EINVAL; |
| 1533 | } | 1527 | } |
| @@ -1578,15 +1572,14 @@ static int pxa_camera_querycap(struct soc_camera_host *ici, | |||
| 1578 | { | 1572 | { |
| 1579 | /* cap->name is set by the firendly caller:-> */ | 1573 | /* cap->name is set by the firendly caller:-> */ |
| 1580 | strlcpy(cap->card, pxa_cam_driver_description, sizeof(cap->card)); | 1574 | strlcpy(cap->card, pxa_cam_driver_description, sizeof(cap->card)); |
| 1581 | cap->version = PXA_CAM_VERSION_CODE; | ||
| 1582 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING; | 1575 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING; |
| 1583 | 1576 | ||
| 1584 | return 0; | 1577 | return 0; |
| 1585 | } | 1578 | } |
| 1586 | 1579 | ||
| 1587 | static int pxa_camera_suspend(struct soc_camera_device *icd, pm_message_t state) | 1580 | static int pxa_camera_suspend(struct device *dev) |
| 1588 | { | 1581 | { |
| 1589 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 1582 | struct soc_camera_host *ici = to_soc_camera_host(dev); |
| 1590 | struct pxa_camera_dev *pcdev = ici->priv; | 1583 | struct pxa_camera_dev *pcdev = ici->priv; |
| 1591 | int i = 0, ret = 0; | 1584 | int i = 0, ret = 0; |
| 1592 | 1585 | ||
| @@ -1596,15 +1589,19 @@ static int pxa_camera_suspend(struct soc_camera_device *icd, pm_message_t state) | |||
| 1596 | pcdev->save_cicr[i++] = __raw_readl(pcdev->base + CICR3); | 1589 | pcdev->save_cicr[i++] = __raw_readl(pcdev->base + CICR3); |
| 1597 | pcdev->save_cicr[i++] = __raw_readl(pcdev->base + CICR4); | 1590 | pcdev->save_cicr[i++] = __raw_readl(pcdev->base + CICR4); |
| 1598 | 1591 | ||
| 1599 | if ((pcdev->icd) && (pcdev->icd->ops->suspend)) | 1592 | if (pcdev->icd) { |
| 1600 | ret = pcdev->icd->ops->suspend(pcdev->icd, state); | 1593 | struct v4l2_subdev *sd = soc_camera_to_subdev(pcdev->icd); |
| 1594 | ret = v4l2_subdev_call(sd, core, s_power, 0); | ||
| 1595 | if (ret == -ENOIOCTLCMD) | ||
| 1596 | ret = 0; | ||
| 1597 | } | ||
| 1601 | 1598 | ||
| 1602 | return ret; | 1599 | return ret; |
| 1603 | } | 1600 | } |
| 1604 | 1601 | ||
| 1605 | static int pxa_camera_resume(struct soc_camera_device *icd) | 1602 | static int pxa_camera_resume(struct device *dev) |
| 1606 | { | 1603 | { |
| 1607 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 1604 | struct soc_camera_host *ici = to_soc_camera_host(dev); |
| 1608 | struct pxa_camera_dev *pcdev = ici->priv; | 1605 | struct pxa_camera_dev *pcdev = ici->priv; |
| 1609 | int i = 0, ret = 0; | 1606 | int i = 0, ret = 0; |
| 1610 | 1607 | ||
| @@ -1618,8 +1615,12 @@ static int pxa_camera_resume(struct soc_camera_device *icd) | |||
| 1618 | __raw_writel(pcdev->save_cicr[i++], pcdev->base + CICR3); | 1615 | __raw_writel(pcdev->save_cicr[i++], pcdev->base + CICR3); |
| 1619 | __raw_writel(pcdev->save_cicr[i++], pcdev->base + CICR4); | 1616 | __raw_writel(pcdev->save_cicr[i++], pcdev->base + CICR4); |
| 1620 | 1617 | ||
| 1621 | if ((pcdev->icd) && (pcdev->icd->ops->resume)) | 1618 | if (pcdev->icd) { |
| 1622 | ret = pcdev->icd->ops->resume(pcdev->icd); | 1619 | struct v4l2_subdev *sd = soc_camera_to_subdev(pcdev->icd); |
| 1620 | ret = v4l2_subdev_call(sd, core, s_power, 1); | ||
| 1621 | if (ret == -ENOIOCTLCMD) | ||
| 1622 | ret = 0; | ||
| 1623 | } | ||
| 1623 | 1624 | ||
| 1624 | /* Restart frame capture if active buffer exists */ | 1625 | /* Restart frame capture if active buffer exists */ |
| 1625 | if (!ret && pcdev->active) | 1626 | if (!ret && pcdev->active) |
| @@ -1632,8 +1633,6 @@ static struct soc_camera_host_ops pxa_soc_camera_host_ops = { | |||
| 1632 | .owner = THIS_MODULE, | 1633 | .owner = THIS_MODULE, |
| 1633 | .add = pxa_camera_add_device, | 1634 | .add = pxa_camera_add_device, |
| 1634 | .remove = pxa_camera_remove_device, | 1635 | .remove = pxa_camera_remove_device, |
| 1635 | .suspend = pxa_camera_suspend, | ||
| 1636 | .resume = pxa_camera_resume, | ||
| 1637 | .set_crop = pxa_camera_set_crop, | 1636 | .set_crop = pxa_camera_set_crop, |
| 1638 | .get_formats = pxa_camera_get_formats, | 1637 | .get_formats = pxa_camera_get_formats, |
| 1639 | .put_formats = pxa_camera_put_formats, | 1638 | .put_formats = pxa_camera_put_formats, |
| @@ -1818,9 +1817,15 @@ static int __devexit pxa_camera_remove(struct platform_device *pdev) | |||
| 1818 | return 0; | 1817 | return 0; |
| 1819 | } | 1818 | } |
| 1820 | 1819 | ||
| 1820 | static struct dev_pm_ops pxa_camera_pm = { | ||
| 1821 | .suspend = pxa_camera_suspend, | ||
| 1822 | .resume = pxa_camera_resume, | ||
| 1823 | }; | ||
| 1824 | |||
| 1821 | static struct platform_driver pxa_camera_driver = { | 1825 | static struct platform_driver pxa_camera_driver = { |
| 1822 | .driver = { | 1826 | .driver = { |
| 1823 | .name = PXA_CAM_DRV_NAME, | 1827 | .name = PXA_CAM_DRV_NAME, |
| 1828 | .pm = &pxa_camera_pm, | ||
| 1824 | }, | 1829 | }, |
| 1825 | .probe = pxa_camera_probe, | 1830 | .probe = pxa_camera_probe, |
| 1826 | .remove = __devexit_p(pxa_camera_remove), | 1831 | .remove = __devexit_p(pxa_camera_remove), |
| @@ -1843,4 +1848,5 @@ module_exit(pxa_camera_exit); | |||
| 1843 | MODULE_DESCRIPTION("PXA27x SoC Camera Host driver"); | 1848 | MODULE_DESCRIPTION("PXA27x SoC Camera Host driver"); |
| 1844 | MODULE_AUTHOR("Guennadi Liakhovetski <kernel@pengutronix.de>"); | 1849 | MODULE_AUTHOR("Guennadi Liakhovetski <kernel@pengutronix.de>"); |
| 1845 | MODULE_LICENSE("GPL"); | 1850 | MODULE_LICENSE("GPL"); |
| 1851 | MODULE_VERSION(PXA_CAM_VERSION); | ||
| 1846 | MODULE_ALIAS("platform:" PXA_CAM_DRV_NAME); | 1852 | MODULE_ALIAS("platform:" PXA_CAM_DRV_NAME); |
diff --git a/drivers/media/video/rj54n1cb0c.c b/drivers/media/video/rj54n1cb0c.c index 57e11b6f19fb..847ccc067e87 100644 --- a/drivers/media/video/rj54n1cb0c.c +++ b/drivers/media/video/rj54n1cb0c.c | |||
| @@ -1364,10 +1364,9 @@ static int rj54n1_video_probe(struct soc_camera_device *icd, | |||
| 1364 | int data1, data2; | 1364 | int data1, data2; |
| 1365 | int ret; | 1365 | int ret; |
| 1366 | 1366 | ||
| 1367 | /* This could be a BUG_ON() or a WARN_ON(), or remove it completely */ | 1367 | /* We must have a parent by now. And it cannot be a wrong one. */ |
| 1368 | if (!icd->dev.parent || | 1368 | BUG_ON(!icd->parent || |
| 1369 | to_soc_camera_host(icd->dev.parent)->nr != icd->iface) | 1369 | to_soc_camera_host(icd->parent)->nr != icd->iface); |
| 1370 | return -ENODEV; | ||
| 1371 | 1370 | ||
| 1372 | /* Read out the chip version register */ | 1371 | /* Read out the chip version register */ |
| 1373 | data1 = reg_read(client, RJ54N1_DEV_CODE); | 1372 | data1 = reg_read(client, RJ54N1_DEV_CODE); |
diff --git a/drivers/media/video/s2255drv.c b/drivers/media/video/s2255drv.c index 5b9dce85645c..803c9c82e496 100644 --- a/drivers/media/video/s2255drv.c +++ b/drivers/media/video/s2255drv.c | |||
| @@ -16,15 +16,10 @@ | |||
| 16 | * Example maximum bandwidth utilization: | 16 | * Example maximum bandwidth utilization: |
| 17 | * | 17 | * |
| 18 | * -full size, color mode YUYV or YUV422P: 2 channels at once | 18 | * -full size, color mode YUYV or YUV422P: 2 channels at once |
| 19 | * | ||
| 20 | * -full or half size Grey scale: all 4 channels at once | 19 | * -full or half size Grey scale: all 4 channels at once |
| 21 | * | ||
| 22 | * -half size, color mode YUYV or YUV422P: all 4 channels at once | 20 | * -half size, color mode YUYV or YUV422P: all 4 channels at once |
| 23 | * | ||
| 24 | * -full size, color mode YUYV or YUV422P 1/2 frame rate: all 4 channels | 21 | * -full size, color mode YUYV or YUV422P 1/2 frame rate: all 4 channels |
| 25 | * at once. | 22 | * at once. |
| 26 | * (TODO: Incorporate videodev2 frame rate(FR) enumeration, | ||
| 27 | * which is currently experimental.) | ||
| 28 | * | 23 | * |
| 29 | * This program is free software; you can redistribute it and/or modify | 24 | * This program is free software; you can redistribute it and/or modify |
| 30 | * it under the terms of the GNU General Public License as published by | 25 | * it under the terms of the GNU General Public License as published by |
| @@ -47,7 +42,6 @@ | |||
| 47 | #include <linux/mutex.h> | 42 | #include <linux/mutex.h> |
| 48 | #include <linux/slab.h> | 43 | #include <linux/slab.h> |
| 49 | #include <linux/videodev2.h> | 44 | #include <linux/videodev2.h> |
| 50 | #include <linux/version.h> | ||
| 51 | #include <linux/mm.h> | 45 | #include <linux/mm.h> |
| 52 | #include <media/videobuf-vmalloc.h> | 46 | #include <media/videobuf-vmalloc.h> |
| 53 | #include <media/v4l2-common.h> | 47 | #include <media/v4l2-common.h> |
| @@ -56,12 +50,7 @@ | |||
| 56 | #include <linux/vmalloc.h> | 50 | #include <linux/vmalloc.h> |
| 57 | #include <linux/usb.h> | 51 | #include <linux/usb.h> |
| 58 | 52 | ||
| 59 | #define S2255_MAJOR_VERSION 1 | 53 | #define S2255_VERSION "1.22.1" |
| 60 | #define S2255_MINOR_VERSION 21 | ||
| 61 | #define S2255_RELEASE 0 | ||
| 62 | #define S2255_VERSION KERNEL_VERSION(S2255_MAJOR_VERSION, \ | ||
| 63 | S2255_MINOR_VERSION, \ | ||
| 64 | S2255_RELEASE) | ||
| 65 | #define FIRMWARE_FILE_NAME "f2255usb.bin" | 54 | #define FIRMWARE_FILE_NAME "f2255usb.bin" |
| 66 | 55 | ||
| 67 | /* default JPEG quality */ | 56 | /* default JPEG quality */ |
| @@ -126,7 +115,7 @@ | |||
| 126 | #define MASK_COLOR 0x000000ff | 115 | #define MASK_COLOR 0x000000ff |
| 127 | #define MASK_JPG_QUALITY 0x0000ff00 | 116 | #define MASK_JPG_QUALITY 0x0000ff00 |
| 128 | #define MASK_INPUT_TYPE 0x000f0000 | 117 | #define MASK_INPUT_TYPE 0x000f0000 |
| 129 | /* frame decimation. Not implemented by V4L yet(experimental in V4L) */ | 118 | /* frame decimation. */ |
| 130 | #define FDEC_1 1 /* capture every frame. default */ | 119 | #define FDEC_1 1 /* capture every frame. default */ |
| 131 | #define FDEC_2 2 /* capture every 2nd frame */ | 120 | #define FDEC_2 2 /* capture every 2nd frame */ |
| 132 | #define FDEC_3 3 /* capture every 3rd frame */ | 121 | #define FDEC_3 3 /* capture every 3rd frame */ |
| @@ -312,9 +301,9 @@ struct s2255_fh { | |||
| 312 | }; | 301 | }; |
| 313 | 302 | ||
| 314 | /* current cypress EEPROM firmware version */ | 303 | /* current cypress EEPROM firmware version */ |
| 315 | #define S2255_CUR_USB_FWVER ((3 << 8) | 11) | 304 | #define S2255_CUR_USB_FWVER ((3 << 8) | 12) |
| 316 | /* current DSP FW version */ | 305 | /* current DSP FW version */ |
| 317 | #define S2255_CUR_DSP_FWVER 10102 | 306 | #define S2255_CUR_DSP_FWVER 10104 |
| 318 | /* Need DSP version 5+ for video status feature */ | 307 | /* Need DSP version 5+ for video status feature */ |
| 319 | #define S2255_MIN_DSP_STATUS 5 | 308 | #define S2255_MIN_DSP_STATUS 5 |
| 320 | #define S2255_MIN_DSP_COLORFILTER 8 | 309 | #define S2255_MIN_DSP_COLORFILTER 8 |
| @@ -502,7 +491,7 @@ static void planar422p_to_yuv_packed(const unsigned char *in, | |||
| 502 | 491 | ||
| 503 | static void s2255_reset_dsppower(struct s2255_dev *dev) | 492 | static void s2255_reset_dsppower(struct s2255_dev *dev) |
| 504 | { | 493 | { |
| 505 | s2255_vendor_req(dev, 0x40, 0x0b0b, 0x0b01, NULL, 0, 1); | 494 | s2255_vendor_req(dev, 0x40, 0x0000, 0x0001, NULL, 0, 1); |
| 506 | msleep(10); | 495 | msleep(10); |
| 507 | s2255_vendor_req(dev, 0x50, 0x0000, 0x0000, NULL, 0, 1); | 496 | s2255_vendor_req(dev, 0x50, 0x0000, 0x0000, NULL, 0, 1); |
| 508 | msleep(600); | 497 | msleep(600); |
| @@ -856,7 +845,6 @@ static int vidioc_querycap(struct file *file, void *priv, | |||
| 856 | strlcpy(cap->driver, "s2255", sizeof(cap->driver)); | 845 | strlcpy(cap->driver, "s2255", sizeof(cap->driver)); |
| 857 | strlcpy(cap->card, "s2255", sizeof(cap->card)); | 846 | strlcpy(cap->card, "s2255", sizeof(cap->card)); |
| 858 | usb_make_path(dev->udev, cap->bus_info, sizeof(cap->bus_info)); | 847 | usb_make_path(dev->udev, cap->bus_info, sizeof(cap->bus_info)); |
| 859 | cap->version = S2255_VERSION; | ||
| 860 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING; | 848 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING; |
| 861 | return 0; | 849 | return 0; |
| 862 | } | 850 | } |
| @@ -1984,9 +1972,8 @@ static int s2255_probe_v4l(struct s2255_dev *dev) | |||
| 1984 | video_device_node_name(&channel->vdev)); | 1972 | video_device_node_name(&channel->vdev)); |
| 1985 | 1973 | ||
| 1986 | } | 1974 | } |
| 1987 | printk(KERN_INFO "Sensoray 2255 V4L driver Revision: %d.%d\n", | 1975 | printk(KERN_INFO "Sensoray 2255 V4L driver Revision: %s\n", |
| 1988 | S2255_MAJOR_VERSION, | 1976 | S2255_VERSION); |
| 1989 | S2255_MINOR_VERSION); | ||
| 1990 | /* if no channels registered, return error and probe will fail*/ | 1977 | /* if no channels registered, return error and probe will fail*/ |
| 1991 | if (atomic_read(&dev->num_channels) == 0) { | 1978 | if (atomic_read(&dev->num_channels) == 0) { |
| 1992 | v4l2_device_unregister(&dev->v4l2_dev); | 1979 | v4l2_device_unregister(&dev->v4l2_dev); |
| @@ -2302,15 +2289,12 @@ static int s2255_board_init(struct s2255_dev *dev) | |||
| 2302 | /* query the firmware */ | 2289 | /* query the firmware */ |
| 2303 | fw_ver = s2255_get_fx2fw(dev); | 2290 | fw_ver = s2255_get_fx2fw(dev); |
| 2304 | 2291 | ||
| 2305 | printk(KERN_INFO "2255 usb firmware version %d.%d\n", | 2292 | printk(KERN_INFO "s2255: usb firmware version %d.%d\n", |
| 2306 | (fw_ver >> 8) & 0xff, | 2293 | (fw_ver >> 8) & 0xff, |
| 2307 | fw_ver & 0xff); | 2294 | fw_ver & 0xff); |
| 2308 | 2295 | ||
| 2309 | if (fw_ver < S2255_CUR_USB_FWVER) | 2296 | if (fw_ver < S2255_CUR_USB_FWVER) |
| 2310 | dev_err(&dev->udev->dev, | 2297 | printk(KERN_INFO "s2255: newer USB firmware available\n"); |
| 2311 | "usb firmware not up to date %d.%d\n", | ||
| 2312 | (fw_ver >> 8) & 0xff, | ||
| 2313 | fw_ver & 0xff); | ||
| 2314 | 2298 | ||
| 2315 | for (j = 0; j < MAX_CHANNELS; j++) { | 2299 | for (j = 0; j < MAX_CHANNELS; j++) { |
| 2316 | struct s2255_channel *channel = &dev->channel[j]; | 2300 | struct s2255_channel *channel = &dev->channel[j]; |
| @@ -2721,3 +2705,4 @@ module_exit(usb_s2255_exit); | |||
| 2721 | MODULE_DESCRIPTION("Sensoray 2255 Video for Linux driver"); | 2705 | MODULE_DESCRIPTION("Sensoray 2255 Video for Linux driver"); |
| 2722 | MODULE_AUTHOR("Dean Anderson (Sensoray Company Inc.)"); | 2706 | MODULE_AUTHOR("Dean Anderson (Sensoray Company Inc.)"); |
| 2723 | MODULE_LICENSE("GPL"); | 2707 | MODULE_LICENSE("GPL"); |
| 2708 | MODULE_VERSION(S2255_VERSION); | ||
diff --git a/drivers/media/video/s5p-fimc/fimc-capture.c b/drivers/media/video/s5p-fimc/fimc-capture.c index 81b4a826ee5e..0d730e55605d 100644 --- a/drivers/media/video/s5p-fimc/fimc-capture.c +++ b/drivers/media/video/s5p-fimc/fimc-capture.c | |||
| @@ -11,7 +11,6 @@ | |||
| 11 | 11 | ||
| 12 | #include <linux/module.h> | 12 | #include <linux/module.h> |
| 13 | #include <linux/kernel.h> | 13 | #include <linux/kernel.h> |
| 14 | #include <linux/version.h> | ||
| 15 | #include <linux/types.h> | 14 | #include <linux/types.h> |
| 16 | #include <linux/errno.h> | 15 | #include <linux/errno.h> |
| 17 | #include <linux/bug.h> | 16 | #include <linux/bug.h> |
| @@ -451,7 +450,6 @@ static int fimc_vidioc_querycap_capture(struct file *file, void *priv, | |||
| 451 | strncpy(cap->driver, fimc->pdev->name, sizeof(cap->driver) - 1); | 450 | strncpy(cap->driver, fimc->pdev->name, sizeof(cap->driver) - 1); |
| 452 | strncpy(cap->card, fimc->pdev->name, sizeof(cap->card) - 1); | 451 | strncpy(cap->card, fimc->pdev->name, sizeof(cap->card) - 1); |
| 453 | cap->bus_info[0] = 0; | 452 | cap->bus_info[0] = 0; |
| 454 | cap->version = KERNEL_VERSION(1, 0, 0); | ||
| 455 | cap->capabilities = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_CAPTURE | | 453 | cap->capabilities = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_CAPTURE | |
| 456 | V4L2_CAP_VIDEO_CAPTURE_MPLANE; | 454 | V4L2_CAP_VIDEO_CAPTURE_MPLANE; |
| 457 | 455 | ||
diff --git a/drivers/media/video/s5p-fimc/fimc-core.c b/drivers/media/video/s5p-fimc/fimc-core.c index bdf19ada9172..aa550666cc0b 100644 --- a/drivers/media/video/s5p-fimc/fimc-core.c +++ b/drivers/media/video/s5p-fimc/fimc-core.c | |||
| @@ -12,7 +12,6 @@ | |||
| 12 | 12 | ||
| 13 | #include <linux/module.h> | 13 | #include <linux/module.h> |
| 14 | #include <linux/kernel.h> | 14 | #include <linux/kernel.h> |
| 15 | #include <linux/version.h> | ||
| 16 | #include <linux/types.h> | 15 | #include <linux/types.h> |
| 17 | #include <linux/errno.h> | 16 | #include <linux/errno.h> |
| 18 | #include <linux/bug.h> | 17 | #include <linux/bug.h> |
| @@ -774,7 +773,6 @@ static int fimc_m2m_querycap(struct file *file, void *priv, | |||
| 774 | strncpy(cap->driver, fimc->pdev->name, sizeof(cap->driver) - 1); | 773 | strncpy(cap->driver, fimc->pdev->name, sizeof(cap->driver) - 1); |
| 775 | strncpy(cap->card, fimc->pdev->name, sizeof(cap->card) - 1); | 774 | strncpy(cap->card, fimc->pdev->name, sizeof(cap->card) - 1); |
| 776 | cap->bus_info[0] = 0; | 775 | cap->bus_info[0] = 0; |
| 777 | cap->version = KERNEL_VERSION(1, 0, 0); | ||
| 778 | cap->capabilities = V4L2_CAP_STREAMING | | 776 | cap->capabilities = V4L2_CAP_STREAMING | |
| 779 | V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VIDEO_OUTPUT | | 777 | V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VIDEO_OUTPUT | |
| 780 | V4L2_CAP_VIDEO_CAPTURE_MPLANE | V4L2_CAP_VIDEO_OUTPUT_MPLANE; | 778 | V4L2_CAP_VIDEO_CAPTURE_MPLANE | V4L2_CAP_VIDEO_OUTPUT_MPLANE; |
| @@ -1937,3 +1935,4 @@ module_exit(fimc_exit); | |||
| 1937 | MODULE_AUTHOR("Sylwester Nawrocki <s.nawrocki@samsung.com>"); | 1935 | MODULE_AUTHOR("Sylwester Nawrocki <s.nawrocki@samsung.com>"); |
| 1938 | MODULE_DESCRIPTION("S5P FIMC camera host interface/video postprocessor driver"); | 1936 | MODULE_DESCRIPTION("S5P FIMC camera host interface/video postprocessor driver"); |
| 1939 | MODULE_LICENSE("GPL"); | 1937 | MODULE_LICENSE("GPL"); |
| 1938 | MODULE_VERSION("1.0.1"); | ||
diff --git a/drivers/media/video/s5p-mfc/Makefile b/drivers/media/video/s5p-mfc/Makefile new file mode 100644 index 000000000000..d0663409af00 --- /dev/null +++ b/drivers/media/video/s5p-mfc/Makefile | |||
| @@ -0,0 +1,5 @@ | |||
| 1 | obj-$(CONFIG_VIDEO_SAMSUNG_S5P_MFC) := s5p-mfc.o | ||
| 2 | s5p-mfc-y += s5p_mfc.o s5p_mfc_intr.o s5p_mfc_opr.o | ||
| 3 | s5p-mfc-y += s5p_mfc_dec.o s5p_mfc_enc.o | ||
| 4 | s5p-mfc-y += s5p_mfc_ctrl.o s5p_mfc_cmd.o | ||
| 5 | s5p-mfc-y += s5p_mfc_pm.o s5p_mfc_shm.o | ||
diff --git a/drivers/media/video/s5p-mfc/regs-mfc.h b/drivers/media/video/s5p-mfc/regs-mfc.h new file mode 100644 index 000000000000..053a8a872fd7 --- /dev/null +++ b/drivers/media/video/s5p-mfc/regs-mfc.h | |||
| @@ -0,0 +1,413 @@ | |||
| 1 | /* | ||
| 2 | * Register definition file for Samsung MFC V5.1 Interface (FIMV) driver | ||
| 3 | * | ||
| 4 | * Kamil Debski, Copyright (c) 2010 Samsung Electronics | ||
| 5 | * http://www.samsung.com/ | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | */ | ||
| 11 | |||
| 12 | #ifndef _REGS_FIMV_H | ||
| 13 | #define _REGS_FIMV_H | ||
| 14 | |||
| 15 | #define S5P_FIMV_REG_SIZE (S5P_FIMV_END_ADDR - S5P_FIMV_START_ADDR) | ||
| 16 | #define S5P_FIMV_REG_COUNT ((S5P_FIMV_END_ADDR - S5P_FIMV_START_ADDR) / 4) | ||
| 17 | |||
| 18 | /* Number of bits that the buffer address should be shifted for particular | ||
| 19 | * MFC buffers. */ | ||
| 20 | #define S5P_FIMV_START_ADDR 0x0000 | ||
| 21 | #define S5P_FIMV_END_ADDR 0xe008 | ||
| 22 | |||
| 23 | #define S5P_FIMV_SW_RESET 0x0000 | ||
| 24 | #define S5P_FIMV_RISC_HOST_INT 0x0008 | ||
| 25 | |||
| 26 | /* Command from HOST to RISC */ | ||
| 27 | #define S5P_FIMV_HOST2RISC_CMD 0x0030 | ||
| 28 | #define S5P_FIMV_HOST2RISC_ARG1 0x0034 | ||
| 29 | #define S5P_FIMV_HOST2RISC_ARG2 0x0038 | ||
| 30 | #define S5P_FIMV_HOST2RISC_ARG3 0x003c | ||
| 31 | #define S5P_FIMV_HOST2RISC_ARG4 0x0040 | ||
| 32 | |||
| 33 | /* Command from RISC to HOST */ | ||
| 34 | #define S5P_FIMV_RISC2HOST_CMD 0x0044 | ||
| 35 | #define S5P_FIMV_RISC2HOST_CMD_MASK 0x1FFFF | ||
| 36 | #define S5P_FIMV_RISC2HOST_ARG1 0x0048 | ||
| 37 | #define S5P_FIMV_RISC2HOST_ARG2 0x004c | ||
| 38 | #define S5P_FIMV_RISC2HOST_ARG3 0x0050 | ||
| 39 | #define S5P_FIMV_RISC2HOST_ARG4 0x0054 | ||
| 40 | |||
| 41 | #define S5P_FIMV_FW_VERSION 0x0058 | ||
| 42 | #define S5P_FIMV_SYS_MEM_SZ 0x005c | ||
| 43 | #define S5P_FIMV_FW_STATUS 0x0080 | ||
| 44 | |||
| 45 | /* Memory controller register */ | ||
| 46 | #define S5P_FIMV_MC_DRAMBASE_ADR_A 0x0508 | ||
| 47 | #define S5P_FIMV_MC_DRAMBASE_ADR_B 0x050c | ||
| 48 | #define S5P_FIMV_MC_STATUS 0x0510 | ||
| 49 | |||
| 50 | /* Common register */ | ||
| 51 | #define S5P_FIMV_COMMON_BASE_A 0x0600 | ||
| 52 | #define S5P_FIMV_COMMON_BASE_B 0x0700 | ||
| 53 | |||
| 54 | /* Decoder */ | ||
| 55 | #define S5P_FIMV_DEC_CHROMA_ADR (S5P_FIMV_COMMON_BASE_A) | ||
| 56 | #define S5P_FIMV_DEC_LUMA_ADR (S5P_FIMV_COMMON_BASE_B) | ||
| 57 | |||
| 58 | /* H.264 decoding */ | ||
| 59 | #define S5P_FIMV_H264_VERT_NB_MV_ADR (S5P_FIMV_COMMON_BASE_A + 0x8c) | ||
| 60 | /* vertical neighbor motion vector */ | ||
| 61 | #define S5P_FIMV_H264_NB_IP_ADR (S5P_FIMV_COMMON_BASE_A + 0x90) | ||
| 62 | /* neighbor pixels for intra pred */ | ||
| 63 | #define S5P_FIMV_H264_MV_ADR (S5P_FIMV_COMMON_BASE_B + 0x80) | ||
| 64 | /* H264 motion vector */ | ||
| 65 | |||
| 66 | /* MPEG4 decoding */ | ||
| 67 | #define S5P_FIMV_MPEG4_NB_DCAC_ADR (S5P_FIMV_COMMON_BASE_A + 0x8c) | ||
| 68 | /* neighbor AC/DC coeff. */ | ||
| 69 | #define S5P_FIMV_MPEG4_UP_NB_MV_ADR (S5P_FIMV_COMMON_BASE_A + 0x90) | ||
| 70 | /* upper neighbor motion vector */ | ||
| 71 | #define S5P_FIMV_MPEG4_SA_MV_ADR (S5P_FIMV_COMMON_BASE_A + 0x94) | ||
| 72 | /* subseq. anchor motion vector */ | ||
| 73 | #define S5P_FIMV_MPEG4_OT_LINE_ADR (S5P_FIMV_COMMON_BASE_A + 0x98) | ||
| 74 | /* overlap transform line */ | ||
| 75 | #define S5P_FIMV_MPEG4_SP_ADR (S5P_FIMV_COMMON_BASE_A + 0xa8) | ||
| 76 | /* syntax parser */ | ||
| 77 | |||
| 78 | /* H.263 decoding */ | ||
| 79 | #define S5P_FIMV_H263_NB_DCAC_ADR (S5P_FIMV_COMMON_BASE_A + 0x8c) | ||
| 80 | #define S5P_FIMV_H263_UP_NB_MV_ADR (S5P_FIMV_COMMON_BASE_A + 0x90) | ||
| 81 | #define S5P_FIMV_H263_SA_MV_ADR (S5P_FIMV_COMMON_BASE_A + 0x94) | ||
| 82 | #define S5P_FIMV_H263_OT_LINE_ADR (S5P_FIMV_COMMON_BASE_A + 0x98) | ||
| 83 | |||
| 84 | /* VC-1 decoding */ | ||
| 85 | #define S5P_FIMV_VC1_NB_DCAC_ADR (S5P_FIMV_COMMON_BASE_A + 0x8c) | ||
| 86 | #define S5P_FIMV_VC1_UP_NB_MV_ADR (S5P_FIMV_COMMON_BASE_A + 0x90) | ||
| 87 | #define S5P_FIMV_VC1_SA_MV_ADR (S5P_FIMV_COMMON_BASE_A + 0x94) | ||
| 88 | #define S5P_FIMV_VC1_OT_LINE_ADR (S5P_FIMV_COMMON_BASE_A + 0x98) | ||
| 89 | #define S5P_FIMV_VC1_BITPLANE3_ADR (S5P_FIMV_COMMON_BASE_A + 0x9c) | ||
| 90 | /* bitplane3 */ | ||
| 91 | #define S5P_FIMV_VC1_BITPLANE2_ADR (S5P_FIMV_COMMON_BASE_A + 0xa0) | ||
| 92 | /* bitplane2 */ | ||
| 93 | #define S5P_FIMV_VC1_BITPLANE1_ADR (S5P_FIMV_COMMON_BASE_A + 0xa4) | ||
| 94 | /* bitplane1 */ | ||
| 95 | |||
| 96 | /* Encoder */ | ||
| 97 | #define S5P_FIMV_ENC_REF0_LUMA_ADR (S5P_FIMV_COMMON_BASE_A + 0x1c) | ||
| 98 | #define S5P_FIMV_ENC_REF1_LUMA_ADR (S5P_FIMV_COMMON_BASE_A + 0x20) | ||
| 99 | /* reconstructed luma */ | ||
| 100 | #define S5P_FIMV_ENC_REF0_CHROMA_ADR (S5P_FIMV_COMMON_BASE_B) | ||
| 101 | #define S5P_FIMV_ENC_REF1_CHROMA_ADR (S5P_FIMV_COMMON_BASE_B + 0x04) | ||
| 102 | /* reconstructed chroma */ | ||
| 103 | #define S5P_FIMV_ENC_REF2_LUMA_ADR (S5P_FIMV_COMMON_BASE_B + 0x10) | ||
| 104 | #define S5P_FIMV_ENC_REF2_CHROMA_ADR (S5P_FIMV_COMMON_BASE_B + 0x08) | ||
| 105 | #define S5P_FIMV_ENC_REF3_LUMA_ADR (S5P_FIMV_COMMON_BASE_B + 0x14) | ||
| 106 | #define S5P_FIMV_ENC_REF3_CHROMA_ADR (S5P_FIMV_COMMON_BASE_B + 0x0c) | ||
| 107 | |||
| 108 | /* H.264 encoding */ | ||
| 109 | #define S5P_FIMV_H264_UP_MV_ADR (S5P_FIMV_COMMON_BASE_A) | ||
| 110 | /* upper motion vector */ | ||
| 111 | #define S5P_FIMV_H264_NBOR_INFO_ADR (S5P_FIMV_COMMON_BASE_A + 0x04) | ||
| 112 | /* entropy engine's neighbor info. */ | ||
| 113 | #define S5P_FIMV_H264_UP_INTRA_MD_ADR (S5P_FIMV_COMMON_BASE_A + 0x08) | ||
| 114 | /* upper intra MD */ | ||
| 115 | #define S5P_FIMV_H264_COZERO_FLAG_ADR (S5P_FIMV_COMMON_BASE_A + 0x10) | ||
| 116 | /* direct cozero flag */ | ||
| 117 | #define S5P_FIMV_H264_UP_INTRA_PRED_ADR (S5P_FIMV_COMMON_BASE_B + 0x40) | ||
| 118 | /* upper intra PRED */ | ||
| 119 | |||
| 120 | /* H.263 encoding */ | ||
| 121 | #define S5P_FIMV_H263_UP_MV_ADR (S5P_FIMV_COMMON_BASE_A) | ||
| 122 | /* upper motion vector */ | ||
| 123 | #define S5P_FIMV_H263_ACDC_COEF_ADR (S5P_FIMV_COMMON_BASE_A + 0x04) | ||
| 124 | /* upper Q coeff. */ | ||
| 125 | |||
| 126 | /* MPEG4 encoding */ | ||
| 127 | #define S5P_FIMV_MPEG4_UP_MV_ADR (S5P_FIMV_COMMON_BASE_A) | ||
| 128 | /* upper motion vector */ | ||
| 129 | #define S5P_FIMV_MPEG4_ACDC_COEF_ADR (S5P_FIMV_COMMON_BASE_A + 0x04) | ||
| 130 | /* upper Q coeff. */ | ||
| 131 | #define S5P_FIMV_MPEG4_COZERO_FLAG_ADR (S5P_FIMV_COMMON_BASE_A + 0x10) | ||
| 132 | /* direct cozero flag */ | ||
| 133 | |||
| 134 | #define S5P_FIMV_ENC_REF_B_LUMA_ADR 0x062c /* ref B Luma addr */ | ||
| 135 | #define S5P_FIMV_ENC_REF_B_CHROMA_ADR 0x0630 /* ref B Chroma addr */ | ||
| 136 | |||
| 137 | #define S5P_FIMV_ENC_CUR_LUMA_ADR 0x0718 /* current Luma addr */ | ||
| 138 | #define S5P_FIMV_ENC_CUR_CHROMA_ADR 0x071C /* current Chroma addr */ | ||
| 139 | |||
| 140 | /* Codec common register */ | ||
| 141 | #define S5P_FIMV_ENC_HSIZE_PX 0x0818 /* frame width at encoder */ | ||
| 142 | #define S5P_FIMV_ENC_VSIZE_PX 0x081c /* frame height at encoder */ | ||
| 143 | #define S5P_FIMV_ENC_PROFILE 0x0830 /* profile register */ | ||
| 144 | #define S5P_FIMV_ENC_PROFILE_H264_MAIN 0 | ||
| 145 | #define S5P_FIMV_ENC_PROFILE_H264_HIGH 1 | ||
| 146 | #define S5P_FIMV_ENC_PROFILE_H264_BASELINE 2 | ||
| 147 | #define S5P_FIMV_ENC_PROFILE_MPEG4_SIMPLE 0 | ||
| 148 | #define S5P_FIMV_ENC_PROFILE_MPEG4_ADVANCED_SIMPLE 1 | ||
| 149 | #define S5P_FIMV_ENC_PIC_STRUCT 0x083c /* picture field/frame flag */ | ||
| 150 | #define S5P_FIMV_ENC_LF_CTRL 0x0848 /* loop filter control */ | ||
| 151 | #define S5P_FIMV_ENC_ALPHA_OFF 0x084c /* loop filter alpha offset */ | ||
| 152 | #define S5P_FIMV_ENC_BETA_OFF 0x0850 /* loop filter beta offset */ | ||
| 153 | #define S5P_FIMV_MR_BUSIF_CTRL 0x0854 /* hidden, bus interface ctrl */ | ||
| 154 | #define S5P_FIMV_ENC_PXL_CACHE_CTRL 0x0a00 /* pixel cache control */ | ||
| 155 | |||
| 156 | /* Channel & stream interface register */ | ||
| 157 | #define S5P_FIMV_SI_RTN_CHID 0x2000 /* Return CH inst ID register */ | ||
| 158 | #define S5P_FIMV_SI_CH0_INST_ID 0x2040 /* codec instance ID */ | ||
| 159 | #define S5P_FIMV_SI_CH1_INST_ID 0x2080 /* codec instance ID */ | ||
| 160 | /* Decoder */ | ||
| 161 | #define S5P_FIMV_SI_VRESOL 0x2004 /* vertical res of decoder */ | ||
| 162 | #define S5P_FIMV_SI_HRESOL 0x2008 /* horizontal res of decoder */ | ||
| 163 | #define S5P_FIMV_SI_BUF_NUMBER 0x200c /* number of frames in the | ||
| 164 | decoded pic */ | ||
| 165 | #define S5P_FIMV_SI_DISPLAY_Y_ADR 0x2010 /* luma addr of displayed pic */ | ||
| 166 | #define S5P_FIMV_SI_DISPLAY_C_ADR 0x2014 /* chroma addrof displayed pic */ | ||
| 167 | #define S5P_FIMV_SI_CONSUMED_BYTES 0x2018 /* Consumed number of bytes to | ||
| 168 | decode a frame */ | ||
| 169 | #define S5P_FIMV_SI_DISPLAY_STATUS 0x201c /* status of decoded picture */ | ||
| 170 | |||
| 171 | #define S5P_FIMV_SI_CH0_SB_ST_ADR 0x2044 /* start addr of stream buf */ | ||
| 172 | #define S5P_FIMV_SI_CH0_SB_FRM_SIZE 0x2048 /* size of stream buf */ | ||
| 173 | #define S5P_FIMV_SI_CH0_DESC_ADR 0x204c /* addr of descriptor buf */ | ||
| 174 | #define S5P_FIMV_SI_CH0_CPB_SIZE 0x2058 /* max size of coded pic. buf */ | ||
| 175 | #define S5P_FIMV_SI_CH0_DESC_SIZE 0x205c /* max size of descriptor buf */ | ||
| 176 | |||
| 177 | #define S5P_FIMV_SI_CH1_SB_ST_ADR 0x2084 /* start addr of stream buf */ | ||
| 178 | #define S5P_FIMV_SI_CH1_SB_FRM_SIZE 0x2088 /* size of stream buf */ | ||
| 179 | #define S5P_FIMV_SI_CH1_DESC_ADR 0x208c /* addr of descriptor buf */ | ||
| 180 | #define S5P_FIMV_SI_CH1_CPB_SIZE 0x2098 /* max size of coded pic. buf */ | ||
| 181 | #define S5P_FIMV_SI_CH1_DESC_SIZE 0x209c /* max size of descriptor buf */ | ||
| 182 | |||
| 183 | #define S5P_FIMV_CRC_LUMA0 0x2030 /* luma crc data per frame | ||
| 184 | (top field) */ | ||
| 185 | #define S5P_FIMV_CRC_CHROMA0 0x2034 /* chroma crc data per frame | ||
| 186 | (top field) */ | ||
| 187 | #define S5P_FIMV_CRC_LUMA1 0x2038 /* luma crc data per bottom | ||
| 188 | field */ | ||
| 189 | #define S5P_FIMV_CRC_CHROMA1 0x203c /* chroma crc data per bottom | ||
| 190 | field */ | ||
| 191 | |||
| 192 | /* Display status */ | ||
| 193 | #define S5P_FIMV_DEC_STATUS_DECODING_ONLY 0 | ||
| 194 | #define S5P_FIMV_DEC_STATUS_DECODING_DISPLAY 1 | ||
| 195 | #define S5P_FIMV_DEC_STATUS_DISPLAY_ONLY 2 | ||
| 196 | #define S5P_FIMV_DEC_STATUS_DECODING_EMPTY 3 | ||
| 197 | #define S5P_FIMV_DEC_STATUS_DECODING_STATUS_MASK 7 | ||
| 198 | #define S5P_FIMV_DEC_STATUS_PROGRESSIVE (0<<3) | ||
| 199 | #define S5P_FIMV_DEC_STATUS_INTERLACE (1<<3) | ||
| 200 | #define S5P_FIMV_DEC_STATUS_INTERLACE_MASK (1<<3) | ||
| 201 | #define S5P_FIMV_DEC_STATUS_CRC_NUMBER_TWO (0<<4) | ||
| 202 | #define S5P_FIMV_DEC_STATUS_CRC_NUMBER_FOUR (1<<4) | ||
| 203 | #define S5P_FIMV_DEC_STATUS_CRC_NUMBER_MASK (1<<4) | ||
| 204 | #define S5P_FIMV_DEC_STATUS_CRC_GENERATED (1<<5) | ||
| 205 | #define S5P_FIMV_DEC_STATUS_CRC_NOT_GENERATED (0<<5) | ||
| 206 | #define S5P_FIMV_DEC_STATUS_CRC_MASK (1<<5) | ||
| 207 | |||
| 208 | #define S5P_FIMV_DEC_STATUS_RESOLUTION_MASK (3<<4) | ||
| 209 | #define S5P_FIMV_DEC_STATUS_RESOLUTION_INC (1<<4) | ||
| 210 | #define S5P_FIMV_DEC_STATUS_RESOLUTION_DEC (2<<4) | ||
| 211 | |||
| 212 | /* Decode frame address */ | ||
| 213 | #define S5P_FIMV_DECODE_Y_ADR 0x2024 | ||
| 214 | #define S5P_FIMV_DECODE_C_ADR 0x2028 | ||
| 215 | |||
| 216 | /* Decoded frame tpe */ | ||
| 217 | #define S5P_FIMV_DECODE_FRAME_TYPE 0x2020 | ||
| 218 | #define S5P_FIMV_DECODE_FRAME_MASK 7 | ||
| 219 | |||
| 220 | #define S5P_FIMV_DECODE_FRAME_SKIPPED 0 | ||
| 221 | #define S5P_FIMV_DECODE_FRAME_I_FRAME 1 | ||
| 222 | #define S5P_FIMV_DECODE_FRAME_P_FRAME 2 | ||
| 223 | #define S5P_FIMV_DECODE_FRAME_B_FRAME 3 | ||
| 224 | #define S5P_FIMV_DECODE_FRAME_OTHER_FRAME 4 | ||
| 225 | |||
| 226 | /* Sizes of buffers required for decoding */ | ||
| 227 | #define S5P_FIMV_DEC_NB_IP_SIZE (32 * 1024) | ||
| 228 | #define S5P_FIMV_DEC_VERT_NB_MV_SIZE (16 * 1024) | ||
| 229 | #define S5P_FIMV_DEC_NB_DCAC_SIZE (16 * 1024) | ||
| 230 | #define S5P_FIMV_DEC_UPNB_MV_SIZE (68 * 1024) | ||
| 231 | #define S5P_FIMV_DEC_SUB_ANCHOR_MV_SIZE (136 * 1024) | ||
| 232 | #define S5P_FIMV_DEC_OVERLAP_TRANSFORM_SIZE (32 * 1024) | ||
| 233 | #define S5P_FIMV_DEC_VC1_BITPLANE_SIZE (2 * 1024) | ||
| 234 | #define S5P_FIMV_DEC_STX_PARSER_SIZE (68 * 1024) | ||
| 235 | |||
| 236 | #define S5P_FIMV_DEC_BUF_ALIGN (8 * 1024) | ||
| 237 | #define S5P_FIMV_ENC_BUF_ALIGN (8 * 1024) | ||
| 238 | #define S5P_FIMV_NV12M_HALIGN 16 | ||
| 239 | #define S5P_FIMV_NV12M_LVALIGN 16 | ||
| 240 | #define S5P_FIMV_NV12M_CVALIGN 8 | ||
| 241 | #define S5P_FIMV_NV12MT_HALIGN 128 | ||
| 242 | #define S5P_FIMV_NV12MT_VALIGN 32 | ||
| 243 | #define S5P_FIMV_NV12M_SALIGN 2048 | ||
| 244 | #define S5P_FIMV_NV12MT_SALIGN 8192 | ||
| 245 | |||
| 246 | /* Sizes of buffers required for encoding */ | ||
| 247 | #define S5P_FIMV_ENC_UPMV_SIZE 0x10000 | ||
| 248 | #define S5P_FIMV_ENC_COLFLG_SIZE 0x10000 | ||
| 249 | #define S5P_FIMV_ENC_INTRAMD_SIZE 0x10000 | ||
| 250 | #define S5P_FIMV_ENC_INTRAPRED_SIZE 0x4000 | ||
| 251 | #define S5P_FIMV_ENC_NBORINFO_SIZE 0x10000 | ||
| 252 | #define S5P_FIMV_ENC_ACDCCOEF_SIZE 0x10000 | ||
| 253 | |||
| 254 | /* Encoder */ | ||
| 255 | #define S5P_FIMV_ENC_SI_STRM_SIZE 0x2004 /* stream size */ | ||
| 256 | #define S5P_FIMV_ENC_SI_PIC_CNT 0x2008 /* picture count */ | ||
| 257 | #define S5P_FIMV_ENC_SI_WRITE_PTR 0x200c /* write pointer */ | ||
| 258 | #define S5P_FIMV_ENC_SI_SLICE_TYPE 0x2010 /* slice type(I/P/B/IDR) */ | ||
| 259 | #define S5P_FIMV_ENC_SI_SLICE_TYPE_NON_CODED 0 | ||
| 260 | #define S5P_FIMV_ENC_SI_SLICE_TYPE_I 1 | ||
| 261 | #define S5P_FIMV_ENC_SI_SLICE_TYPE_P 2 | ||
| 262 | #define S5P_FIMV_ENC_SI_SLICE_TYPE_B 3 | ||
| 263 | #define S5P_FIMV_ENC_SI_SLICE_TYPE_SKIPPED 4 | ||
| 264 | #define S5P_FIMV_ENC_SI_SLICE_TYPE_OTHERS 5 | ||
| 265 | #define S5P_FIMV_ENCODED_Y_ADDR 0x2014 /* the addr of the encoded | ||
| 266 | luma pic */ | ||
| 267 | #define S5P_FIMV_ENCODED_C_ADDR 0x2018 /* the addr of the encoded | ||
| 268 | chroma pic */ | ||
| 269 | |||
| 270 | #define S5P_FIMV_ENC_SI_CH0_SB_ADR 0x2044 /* addr of stream buf */ | ||
| 271 | #define S5P_FIMV_ENC_SI_CH0_SB_SIZE 0x204c /* size of stream buf */ | ||
| 272 | #define S5P_FIMV_ENC_SI_CH0_CUR_Y_ADR 0x2050 /* current Luma addr */ | ||
| 273 | #define S5P_FIMV_ENC_SI_CH0_CUR_C_ADR 0x2054 /* current Chroma addr */ | ||
| 274 | #define S5P_FIMV_ENC_SI_CH0_FRAME_INS 0x2058 /* frame insertion */ | ||
| 275 | |||
| 276 | #define S5P_FIMV_ENC_SI_CH1_SB_ADR 0x2084 /* addr of stream buf */ | ||
| 277 | #define S5P_FIMV_ENC_SI_CH1_SB_SIZE 0x208c /* size of stream buf */ | ||
| 278 | #define S5P_FIMV_ENC_SI_CH1_CUR_Y_ADR 0x2090 /* current Luma addr */ | ||
| 279 | #define S5P_FIMV_ENC_SI_CH1_CUR_C_ADR 0x2094 /* current Chroma addr */ | ||
| 280 | #define S5P_FIMV_ENC_SI_CH1_FRAME_INS 0x2098 /* frame insertion */ | ||
| 281 | |||
| 282 | #define S5P_FIMV_ENC_PIC_TYPE_CTRL 0xc504 /* pic type level control */ | ||
| 283 | #define S5P_FIMV_ENC_B_RECON_WRITE_ON 0xc508 /* B frame recon write ctrl */ | ||
| 284 | #define S5P_FIMV_ENC_MSLICE_CTRL 0xc50c /* multi slice control */ | ||
| 285 | #define S5P_FIMV_ENC_MSLICE_MB 0xc510 /* MB number in the one slice */ | ||
| 286 | #define S5P_FIMV_ENC_MSLICE_BIT 0xc514 /* bit count for one slice */ | ||
| 287 | #define S5P_FIMV_ENC_CIR_CTRL 0xc518 /* number of intra refresh MB */ | ||
| 288 | #define S5P_FIMV_ENC_MAP_FOR_CUR 0xc51c /* linear or tiled mode */ | ||
| 289 | #define S5P_FIMV_ENC_PADDING_CTRL 0xc520 /* padding control */ | ||
| 290 | |||
| 291 | #define S5P_FIMV_ENC_RC_CONFIG 0xc5a0 /* RC config */ | ||
| 292 | #define S5P_FIMV_ENC_RC_BIT_RATE 0xc5a8 /* bit rate */ | ||
| 293 | #define S5P_FIMV_ENC_RC_QBOUND 0xc5ac /* max/min QP */ | ||
| 294 | #define S5P_FIMV_ENC_RC_RPARA 0xc5b0 /* rate control reaction coeff */ | ||
| 295 | #define S5P_FIMV_ENC_RC_MB_CTRL 0xc5b4 /* MB adaptive scaling */ | ||
| 296 | |||
| 297 | /* Encoder for H264 only */ | ||
| 298 | #define S5P_FIMV_ENC_H264_ENTROPY_MODE 0xd004 /* CAVLC or CABAC */ | ||
| 299 | #define S5P_FIMV_ENC_H264_ALPHA_OFF 0xd008 /* loop filter alpha offset */ | ||
| 300 | #define S5P_FIMV_ENC_H264_BETA_OFF 0xd00c /* loop filter beta offset */ | ||
| 301 | #define S5P_FIMV_ENC_H264_NUM_OF_REF 0xd010 /* number of reference for P/B */ | ||
| 302 | #define S5P_FIMV_ENC_H264_TRANS_FLAG 0xd034 /* 8x8 transform flag in PPS & | ||
| 303 | high profile */ | ||
| 304 | |||
| 305 | #define S5P_FIMV_ENC_RC_FRAME_RATE 0xd0d0 /* frame rate */ | ||
| 306 | |||
| 307 | /* Encoder for MPEG4 only */ | ||
| 308 | #define S5P_FIMV_ENC_MPEG4_QUART_PXL 0xe008 /* qpel interpolation ctrl */ | ||
| 309 | |||
| 310 | /* Additional */ | ||
| 311 | #define S5P_FIMV_SI_CH0_DPB_CONF_CTRL 0x2068 /* DPB Config Control Register */ | ||
| 312 | #define S5P_FIMV_SLICE_INT_MASK 1 | ||
| 313 | #define S5P_FIMV_SLICE_INT_SHIFT 31 | ||
| 314 | #define S5P_FIMV_DDELAY_ENA_SHIFT 30 | ||
| 315 | #define S5P_FIMV_DDELAY_VAL_MASK 0xff | ||
| 316 | #define S5P_FIMV_DDELAY_VAL_SHIFT 16 | ||
| 317 | #define S5P_FIMV_DPB_COUNT_MASK 0xffff | ||
| 318 | #define S5P_FIMV_DPB_FLUSH_MASK 1 | ||
| 319 | #define S5P_FIMV_DPB_FLUSH_SHIFT 14 | ||
| 320 | |||
| 321 | |||
| 322 | #define S5P_FIMV_SI_CH0_RELEASE_BUF 0x2060 /* DPB release buffer register */ | ||
| 323 | #define S5P_FIMV_SI_CH0_HOST_WR_ADR 0x2064 /* address of shared memory */ | ||
| 324 | |||
| 325 | /* Codec numbers */ | ||
| 326 | #define S5P_FIMV_CODEC_NONE -1 | ||
| 327 | |||
| 328 | #define S5P_FIMV_CODEC_H264_DEC 0 | ||
| 329 | #define S5P_FIMV_CODEC_VC1_DEC 1 | ||
| 330 | #define S5P_FIMV_CODEC_MPEG4_DEC 2 | ||
| 331 | #define S5P_FIMV_CODEC_MPEG2_DEC 3 | ||
| 332 | #define S5P_FIMV_CODEC_H263_DEC 4 | ||
| 333 | #define S5P_FIMV_CODEC_VC1RCV_DEC 5 | ||
| 334 | |||
| 335 | #define S5P_FIMV_CODEC_H264_ENC 16 | ||
| 336 | #define S5P_FIMV_CODEC_MPEG4_ENC 17 | ||
| 337 | #define S5P_FIMV_CODEC_H263_ENC 18 | ||
| 338 | |||
| 339 | /* Channel Control Register */ | ||
| 340 | #define S5P_FIMV_CH_SEQ_HEADER 1 | ||
| 341 | #define S5P_FIMV_CH_FRAME_START 2 | ||
| 342 | #define S5P_FIMV_CH_LAST_FRAME 3 | ||
| 343 | #define S5P_FIMV_CH_INIT_BUFS 4 | ||
| 344 | #define S5P_FIMV_CH_FRAME_START_REALLOC 5 | ||
| 345 | #define S5P_FIMV_CH_MASK 7 | ||
| 346 | #define S5P_FIMV_CH_SHIFT 16 | ||
| 347 | |||
| 348 | |||
| 349 | /* Host to RISC command */ | ||
| 350 | #define S5P_FIMV_H2R_CMD_EMPTY 0 | ||
| 351 | #define S5P_FIMV_H2R_CMD_OPEN_INSTANCE 1 | ||
| 352 | #define S5P_FIMV_H2R_CMD_CLOSE_INSTANCE 2 | ||
| 353 | #define S5P_FIMV_H2R_CMD_SYS_INIT 3 | ||
| 354 | #define S5P_FIMV_H2R_CMD_FLUSH 4 | ||
| 355 | #define S5P_FIMV_H2R_CMD_SLEEP 5 | ||
| 356 | #define S5P_FIMV_H2R_CMD_WAKEUP 6 | ||
| 357 | |||
| 358 | #define S5P_FIMV_R2H_CMD_EMPTY 0 | ||
| 359 | #define S5P_FIMV_R2H_CMD_OPEN_INSTANCE_RET 1 | ||
| 360 | #define S5P_FIMV_R2H_CMD_CLOSE_INSTANCE_RET 2 | ||
| 361 | #define S5P_FIMV_R2H_CMD_RSV_RET 3 | ||
| 362 | #define S5P_FIMV_R2H_CMD_SEQ_DONE_RET 4 | ||
| 363 | #define S5P_FIMV_R2H_CMD_FRAME_DONE_RET 5 | ||
| 364 | #define S5P_FIMV_R2H_CMD_SLICE_DONE_RET 6 | ||
| 365 | #define S5P_FIMV_R2H_CMD_ENC_COMPLETE_RET 7 | ||
| 366 | #define S5P_FIMV_R2H_CMD_SYS_INIT_RET 8 | ||
| 367 | #define S5P_FIMV_R2H_CMD_FW_STATUS_RET 9 | ||
| 368 | #define S5P_FIMV_R2H_CMD_SLEEP_RET 10 | ||
| 369 | #define S5P_FIMV_R2H_CMD_WAKEUP_RET 11 | ||
| 370 | #define S5P_FIMV_R2H_CMD_FLUSH_RET 12 | ||
| 371 | #define S5P_FIMV_R2H_CMD_INIT_BUFFERS_RET 15 | ||
| 372 | #define S5P_FIMV_R2H_CMD_EDFU_INIT_RET 16 | ||
| 373 | #define S5P_FIMV_R2H_CMD_ERR_RET 32 | ||
| 374 | |||
| 375 | /* Error handling defines */ | ||
| 376 | #define S5P_FIMV_ERR_WARNINGS_START 145 | ||
| 377 | #define S5P_FIMV_ERR_DEC_MASK 0xFFFF | ||
| 378 | #define S5P_FIMV_ERR_DEC_SHIFT 0 | ||
| 379 | #define S5P_FIMV_ERR_DSPL_MASK 0xFFFF0000 | ||
| 380 | #define S5P_FIMV_ERR_DSPL_SHIFT 16 | ||
| 381 | |||
| 382 | /* Shared memory registers' offsets */ | ||
| 383 | |||
| 384 | /* An offset of the start position in the stream when | ||
| 385 | * the start position is not aligned */ | ||
| 386 | #define S5P_FIMV_SHARED_CROP_INFO_H 0x0020 | ||
| 387 | #define S5P_FIMV_SHARED_CROP_LEFT_MASK 0xFFFF | ||
| 388 | #define S5P_FIMV_SHARED_CROP_LEFT_SHIFT 0 | ||
| 389 | #define S5P_FIMV_SHARED_CROP_RIGHT_MASK 0xFFFF0000 | ||
| 390 | #define S5P_FIMV_SHARED_CROP_RIGHT_SHIFT 16 | ||
| 391 | #define S5P_FIMV_SHARED_CROP_INFO_V 0x0024 | ||
| 392 | #define S5P_FIMV_SHARED_CROP_TOP_MASK 0xFFFF | ||
| 393 | #define S5P_FIMV_SHARED_CROP_TOP_SHIFT 0 | ||
| 394 | #define S5P_FIMV_SHARED_CROP_BOTTOM_MASK 0xFFFF0000 | ||
| 395 | #define S5P_FIMV_SHARED_CROP_BOTTOM_SHIFT 16 | ||
| 396 | #define S5P_FIMV_SHARED_SET_FRAME_TAG 0x0004 | ||
| 397 | #define S5P_FIMV_SHARED_GET_FRAME_TAG_TOP 0x0008 | ||
| 398 | #define S5P_FIMV_SHARED_GET_FRAME_TAG_BOT 0x000C | ||
| 399 | #define S5P_FIMV_SHARED_START_BYTE_NUM 0x0018 | ||
| 400 | #define S5P_FIMV_SHARED_RC_VOP_TIMING 0x0030 | ||
| 401 | #define S5P_FIMV_SHARED_LUMA_DPB_SIZE 0x0064 | ||
| 402 | #define S5P_FIMV_SHARED_CHROMA_DPB_SIZE 0x0068 | ||
| 403 | #define S5P_FIMV_SHARED_MV_SIZE 0x006C | ||
| 404 | #define S5P_FIMV_SHARED_PIC_TIME_TOP 0x0010 | ||
| 405 | #define S5P_FIMV_SHARED_PIC_TIME_BOTTOM 0x0014 | ||
| 406 | #define S5P_FIMV_SHARED_EXT_ENC_CONTROL 0x0028 | ||
| 407 | #define S5P_FIMV_SHARED_P_B_FRAME_QP 0x0070 | ||
| 408 | #define S5P_FIMV_SHARED_ASPECT_RATIO_IDC 0x0074 | ||
| 409 | #define S5P_FIMV_SHARED_EXTENDED_SAR 0x0078 | ||
| 410 | #define S5P_FIMV_SHARED_H264_I_PERIOD 0x009C | ||
| 411 | #define S5P_FIMV_SHARED_RC_CONTROL_CONFIG 0x00A0 | ||
| 412 | |||
| 413 | #endif /* _REGS_FIMV_H */ | ||
diff --git a/drivers/media/video/s5p-mfc/s5p_mfc.c b/drivers/media/video/s5p-mfc/s5p_mfc.c new file mode 100644 index 000000000000..7dc7eab58b38 --- /dev/null +++ b/drivers/media/video/s5p-mfc/s5p_mfc.c | |||
| @@ -0,0 +1,1274 @@ | |||
| 1 | /* | ||
| 2 | * Samsung S5P Multi Format Codec v 5.1 | ||
| 3 | * | ||
| 4 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
| 5 | * Kamil Debski, <k.debski@samsung.com> | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License as published by | ||
| 9 | * the Free Software Foundation; either version 2 of the License, or | ||
| 10 | * (at your option) any later version. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/clk.h> | ||
| 14 | #include <linux/delay.h> | ||
| 15 | #include <linux/interrupt.h> | ||
| 16 | #include <linux/io.h> | ||
| 17 | #include <linux/module.h> | ||
| 18 | #include <linux/platform_device.h> | ||
| 19 | #include <linux/sched.h> | ||
| 20 | #include <linux/slab.h> | ||
| 21 | #include <linux/version.h> | ||
| 22 | #include <linux/videodev2.h> | ||
| 23 | #include <linux/workqueue.h> | ||
| 24 | #include <media/videobuf2-core.h> | ||
| 25 | #include "regs-mfc.h" | ||
| 26 | #include "s5p_mfc_ctrl.h" | ||
| 27 | #include "s5p_mfc_debug.h" | ||
| 28 | #include "s5p_mfc_dec.h" | ||
| 29 | #include "s5p_mfc_enc.h" | ||
| 30 | #include "s5p_mfc_intr.h" | ||
| 31 | #include "s5p_mfc_opr.h" | ||
| 32 | #include "s5p_mfc_pm.h" | ||
| 33 | #include "s5p_mfc_shm.h" | ||
| 34 | |||
| 35 | #define S5P_MFC_NAME "s5p-mfc" | ||
| 36 | #define S5P_MFC_DEC_NAME "s5p-mfc-dec" | ||
| 37 | #define S5P_MFC_ENC_NAME "s5p-mfc-enc" | ||
| 38 | |||
| 39 | int debug; | ||
| 40 | module_param(debug, int, S_IRUGO | S_IWUSR); | ||
| 41 | MODULE_PARM_DESC(debug, "Debug level - higher value produces more verbose messages"); | ||
| 42 | |||
| 43 | /* Helper functions for interrupt processing */ | ||
| 44 | /* Remove from hw execution round robin */ | ||
| 45 | static void clear_work_bit(struct s5p_mfc_ctx *ctx) | ||
| 46 | { | ||
| 47 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 48 | |||
| 49 | spin_lock(&dev->condlock); | ||
| 50 | clear_bit(ctx->num, &dev->ctx_work_bits); | ||
| 51 | spin_unlock(&dev->condlock); | ||
| 52 | } | ||
| 53 | |||
| 54 | /* Wake up context wait_queue */ | ||
| 55 | static void wake_up_ctx(struct s5p_mfc_ctx *ctx, unsigned int reason, | ||
| 56 | unsigned int err) | ||
| 57 | { | ||
| 58 | ctx->int_cond = 1; | ||
| 59 | ctx->int_type = reason; | ||
| 60 | ctx->int_err = err; | ||
| 61 | wake_up(&ctx->queue); | ||
| 62 | } | ||
| 63 | |||
| 64 | /* Wake up device wait_queue */ | ||
| 65 | static void wake_up_dev(struct s5p_mfc_dev *dev, unsigned int reason, | ||
| 66 | unsigned int err) | ||
| 67 | { | ||
| 68 | dev->int_cond = 1; | ||
| 69 | dev->int_type = reason; | ||
| 70 | dev->int_err = err; | ||
| 71 | wake_up(&dev->queue); | ||
| 72 | } | ||
| 73 | |||
| 74 | void s5p_mfc_watchdog(unsigned long arg) | ||
| 75 | { | ||
| 76 | struct s5p_mfc_dev *dev = (struct s5p_mfc_dev *)arg; | ||
| 77 | |||
| 78 | if (test_bit(0, &dev->hw_lock)) | ||
| 79 | atomic_inc(&dev->watchdog_cnt); | ||
| 80 | if (atomic_read(&dev->watchdog_cnt) >= MFC_WATCHDOG_CNT) { | ||
| 81 | /* This means that hw is busy and no interrupts were | ||
| 82 | * generated by hw for the Nth time of running this | ||
| 83 | * watchdog timer. This usually means a serious hw | ||
| 84 | * error. Now it is time to kill all instances and | ||
| 85 | * reset the MFC. */ | ||
| 86 | mfc_err("Time out during waiting for HW\n"); | ||
| 87 | queue_work(dev->watchdog_workqueue, &dev->watchdog_work); | ||
| 88 | } | ||
| 89 | dev->watchdog_timer.expires = jiffies + | ||
| 90 | msecs_to_jiffies(MFC_WATCHDOG_INTERVAL); | ||
| 91 | add_timer(&dev->watchdog_timer); | ||
| 92 | } | ||
| 93 | |||
| 94 | static void s5p_mfc_watchdog_worker(struct work_struct *work) | ||
| 95 | { | ||
| 96 | struct s5p_mfc_dev *dev; | ||
| 97 | struct s5p_mfc_ctx *ctx; | ||
| 98 | unsigned long flags; | ||
| 99 | int mutex_locked; | ||
| 100 | int i, ret; | ||
| 101 | |||
| 102 | dev = container_of(work, struct s5p_mfc_dev, watchdog_work); | ||
| 103 | |||
| 104 | mfc_err("Driver timeout error handling\n"); | ||
| 105 | /* Lock the mutex that protects open and release. | ||
| 106 | * This is necessary as they may load and unload firmware. */ | ||
| 107 | mutex_locked = mutex_trylock(&dev->mfc_mutex); | ||
| 108 | if (!mutex_locked) | ||
| 109 | mfc_err("Error: some instance may be closing/opening\n"); | ||
| 110 | spin_lock_irqsave(&dev->irqlock, flags); | ||
| 111 | |||
| 112 | s5p_mfc_clock_off(); | ||
| 113 | |||
| 114 | for (i = 0; i < MFC_NUM_CONTEXTS; i++) { | ||
| 115 | ctx = dev->ctx[i]; | ||
| 116 | if (!ctx) | ||
| 117 | continue; | ||
| 118 | ctx->state = MFCINST_ERROR; | ||
| 119 | s5p_mfc_cleanup_queue(&ctx->dst_queue, &ctx->vq_dst); | ||
| 120 | s5p_mfc_cleanup_queue(&ctx->src_queue, &ctx->vq_src); | ||
| 121 | clear_work_bit(ctx); | ||
| 122 | wake_up_ctx(ctx, S5P_FIMV_R2H_CMD_ERR_RET, 0); | ||
| 123 | } | ||
| 124 | clear_bit(0, &dev->hw_lock); | ||
| 125 | spin_unlock_irqrestore(&dev->irqlock, flags); | ||
| 126 | /* Double check if there is at least one instance running. | ||
| 127 | * If no instance is in memory than no firmware should be present */ | ||
| 128 | if (dev->num_inst > 0) { | ||
| 129 | ret = s5p_mfc_reload_firmware(dev); | ||
| 130 | if (ret) { | ||
| 131 | mfc_err("Failed to reload FW\n"); | ||
| 132 | goto unlock; | ||
| 133 | } | ||
| 134 | s5p_mfc_clock_on(); | ||
| 135 | ret = s5p_mfc_init_hw(dev); | ||
| 136 | if (ret) | ||
| 137 | mfc_err("Failed to reinit FW\n"); | ||
| 138 | } | ||
| 139 | unlock: | ||
| 140 | if (mutex_locked) | ||
| 141 | mutex_unlock(&dev->mfc_mutex); | ||
| 142 | } | ||
| 143 | |||
| 144 | static enum s5p_mfc_node_type s5p_mfc_get_node_type(struct file *file) | ||
| 145 | { | ||
| 146 | struct video_device *vdev = video_devdata(file); | ||
| 147 | |||
| 148 | if (!vdev) { | ||
| 149 | mfc_err("failed to get video_device"); | ||
| 150 | return MFCNODE_INVALID; | ||
| 151 | } | ||
| 152 | if (vdev->index == 0) | ||
| 153 | return MFCNODE_DECODER; | ||
| 154 | else if (vdev->index == 1) | ||
| 155 | return MFCNODE_ENCODER; | ||
| 156 | return MFCNODE_INVALID; | ||
| 157 | } | ||
| 158 | |||
| 159 | static void s5p_mfc_clear_int_flags(struct s5p_mfc_dev *dev) | ||
| 160 | { | ||
| 161 | mfc_write(dev, 0, S5P_FIMV_RISC_HOST_INT); | ||
| 162 | mfc_write(dev, 0, S5P_FIMV_RISC2HOST_CMD); | ||
| 163 | mfc_write(dev, 0xffff, S5P_FIMV_SI_RTN_CHID); | ||
| 164 | } | ||
| 165 | |||
| 166 | static void s5p_mfc_handle_frame_all_extracted(struct s5p_mfc_ctx *ctx) | ||
| 167 | { | ||
| 168 | struct s5p_mfc_buf *dst_buf; | ||
| 169 | |||
| 170 | ctx->state = MFCINST_FINISHED; | ||
| 171 | ctx->sequence++; | ||
| 172 | while (!list_empty(&ctx->dst_queue)) { | ||
| 173 | dst_buf = list_entry(ctx->dst_queue.next, | ||
| 174 | struct s5p_mfc_buf, list); | ||
| 175 | mfc_debug(2, "Cleaning up buffer: %d\n", | ||
| 176 | dst_buf->b->v4l2_buf.index); | ||
| 177 | vb2_set_plane_payload(dst_buf->b, 0, 0); | ||
| 178 | vb2_set_plane_payload(dst_buf->b, 1, 0); | ||
| 179 | list_del(&dst_buf->list); | ||
| 180 | ctx->dst_queue_cnt--; | ||
| 181 | dst_buf->b->v4l2_buf.sequence = (ctx->sequence++); | ||
| 182 | |||
| 183 | if (s5p_mfc_read_shm(ctx, PIC_TIME_TOP) == | ||
| 184 | s5p_mfc_read_shm(ctx, PIC_TIME_BOT)) | ||
| 185 | dst_buf->b->v4l2_buf.field = V4L2_FIELD_NONE; | ||
| 186 | else | ||
| 187 | dst_buf->b->v4l2_buf.field = V4L2_FIELD_INTERLACED; | ||
| 188 | |||
| 189 | ctx->dec_dst_flag &= ~(1 << dst_buf->b->v4l2_buf.index); | ||
| 190 | vb2_buffer_done(dst_buf->b, VB2_BUF_STATE_DONE); | ||
| 191 | } | ||
| 192 | } | ||
| 193 | |||
| 194 | static void s5p_mfc_handle_frame_copy_time(struct s5p_mfc_ctx *ctx) | ||
| 195 | { | ||
| 196 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 197 | struct s5p_mfc_buf *dst_buf, *src_buf; | ||
| 198 | size_t dec_y_addr = s5p_mfc_get_dec_y_adr(); | ||
| 199 | unsigned int frame_type = s5p_mfc_get_frame_type(); | ||
| 200 | |||
| 201 | /* Copy timestamp / timecode from decoded src to dst and set | ||
| 202 | appropraite flags */ | ||
| 203 | src_buf = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list); | ||
| 204 | list_for_each_entry(dst_buf, &ctx->dst_queue, list) { | ||
| 205 | if (vb2_dma_contig_plane_paddr(dst_buf->b, 0) == dec_y_addr) { | ||
| 206 | memcpy(&dst_buf->b->v4l2_buf.timecode, | ||
| 207 | &src_buf->b->v4l2_buf.timecode, | ||
| 208 | sizeof(struct v4l2_timecode)); | ||
| 209 | memcpy(&dst_buf->b->v4l2_buf.timestamp, | ||
| 210 | &src_buf->b->v4l2_buf.timestamp, | ||
| 211 | sizeof(struct timeval)); | ||
| 212 | switch (frame_type) { | ||
| 213 | case S5P_FIMV_DECODE_FRAME_I_FRAME: | ||
| 214 | dst_buf->b->v4l2_buf.flags |= | ||
| 215 | V4L2_BUF_FLAG_KEYFRAME; | ||
| 216 | break; | ||
| 217 | case S5P_FIMV_DECODE_FRAME_P_FRAME: | ||
| 218 | dst_buf->b->v4l2_buf.flags |= | ||
| 219 | V4L2_BUF_FLAG_PFRAME; | ||
| 220 | break; | ||
| 221 | case S5P_FIMV_DECODE_FRAME_B_FRAME: | ||
| 222 | dst_buf->b->v4l2_buf.flags |= | ||
| 223 | V4L2_BUF_FLAG_BFRAME; | ||
| 224 | break; | ||
| 225 | } | ||
| 226 | break; | ||
| 227 | } | ||
| 228 | } | ||
| 229 | } | ||
| 230 | |||
| 231 | static void s5p_mfc_handle_frame_new(struct s5p_mfc_ctx *ctx, unsigned int err) | ||
| 232 | { | ||
| 233 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 234 | struct s5p_mfc_buf *dst_buf; | ||
| 235 | size_t dspl_y_addr = s5p_mfc_get_dspl_y_adr(); | ||
| 236 | unsigned int frame_type = s5p_mfc_get_frame_type(); | ||
| 237 | unsigned int index; | ||
| 238 | |||
| 239 | /* If frame is same as previous then skip and do not dequeue */ | ||
| 240 | if (frame_type == S5P_FIMV_DECODE_FRAME_SKIPPED) { | ||
| 241 | if (!ctx->after_packed_pb) | ||
| 242 | ctx->sequence++; | ||
| 243 | ctx->after_packed_pb = 0; | ||
| 244 | return; | ||
| 245 | } | ||
| 246 | ctx->sequence++; | ||
| 247 | /* The MFC returns address of the buffer, now we have to | ||
| 248 | * check which videobuf does it correspond to */ | ||
| 249 | list_for_each_entry(dst_buf, &ctx->dst_queue, list) { | ||
| 250 | /* Check if this is the buffer we're looking for */ | ||
| 251 | if (vb2_dma_contig_plane_paddr(dst_buf->b, 0) == dspl_y_addr) { | ||
| 252 | list_del(&dst_buf->list); | ||
| 253 | ctx->dst_queue_cnt--; | ||
| 254 | dst_buf->b->v4l2_buf.sequence = ctx->sequence; | ||
| 255 | if (s5p_mfc_read_shm(ctx, PIC_TIME_TOP) == | ||
| 256 | s5p_mfc_read_shm(ctx, PIC_TIME_BOT)) | ||
| 257 | dst_buf->b->v4l2_buf.field = V4L2_FIELD_NONE; | ||
| 258 | else | ||
| 259 | dst_buf->b->v4l2_buf.field = | ||
| 260 | V4L2_FIELD_INTERLACED; | ||
| 261 | vb2_set_plane_payload(dst_buf->b, 0, ctx->luma_size); | ||
| 262 | vb2_set_plane_payload(dst_buf->b, 1, ctx->chroma_size); | ||
| 263 | clear_bit(dst_buf->b->v4l2_buf.index, | ||
| 264 | &ctx->dec_dst_flag); | ||
| 265 | |||
| 266 | vb2_buffer_done(dst_buf->b, | ||
| 267 | err ? VB2_BUF_STATE_ERROR : VB2_BUF_STATE_DONE); | ||
| 268 | |||
| 269 | index = dst_buf->b->v4l2_buf.index; | ||
| 270 | break; | ||
| 271 | } | ||
| 272 | } | ||
| 273 | } | ||
| 274 | |||
| 275 | /* Handle frame decoding interrupt */ | ||
| 276 | static void s5p_mfc_handle_frame(struct s5p_mfc_ctx *ctx, | ||
| 277 | unsigned int reason, unsigned int err) | ||
| 278 | { | ||
| 279 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 280 | unsigned int dst_frame_status; | ||
| 281 | struct s5p_mfc_buf *src_buf; | ||
| 282 | unsigned long flags; | ||
| 283 | unsigned int res_change; | ||
| 284 | |||
| 285 | unsigned int index; | ||
| 286 | |||
| 287 | dst_frame_status = s5p_mfc_get_dspl_status() | ||
| 288 | & S5P_FIMV_DEC_STATUS_DECODING_STATUS_MASK; | ||
| 289 | res_change = s5p_mfc_get_dspl_status() | ||
| 290 | & S5P_FIMV_DEC_STATUS_RESOLUTION_MASK; | ||
| 291 | mfc_debug(2, "Frame Status: %x\n", dst_frame_status); | ||
| 292 | if (ctx->state == MFCINST_RES_CHANGE_INIT) | ||
| 293 | ctx->state = MFCINST_RES_CHANGE_FLUSH; | ||
| 294 | if (res_change) { | ||
| 295 | ctx->state = MFCINST_RES_CHANGE_INIT; | ||
| 296 | s5p_mfc_clear_int_flags(dev); | ||
| 297 | wake_up_ctx(ctx, reason, err); | ||
| 298 | if (test_and_clear_bit(0, &dev->hw_lock) == 0) | ||
| 299 | BUG(); | ||
| 300 | s5p_mfc_clock_off(); | ||
| 301 | s5p_mfc_try_run(dev); | ||
| 302 | return; | ||
| 303 | } | ||
| 304 | if (ctx->dpb_flush_flag) | ||
| 305 | ctx->dpb_flush_flag = 0; | ||
| 306 | |||
| 307 | spin_lock_irqsave(&dev->irqlock, flags); | ||
| 308 | /* All frames remaining in the buffer have been extracted */ | ||
| 309 | if (dst_frame_status == S5P_FIMV_DEC_STATUS_DECODING_EMPTY) { | ||
| 310 | if (ctx->state == MFCINST_RES_CHANGE_FLUSH) { | ||
| 311 | s5p_mfc_handle_frame_all_extracted(ctx); | ||
| 312 | ctx->state = MFCINST_RES_CHANGE_END; | ||
| 313 | goto leave_handle_frame; | ||
| 314 | } else { | ||
| 315 | s5p_mfc_handle_frame_all_extracted(ctx); | ||
| 316 | } | ||
| 317 | } | ||
| 318 | |||
| 319 | if (dst_frame_status == S5P_FIMV_DEC_STATUS_DECODING_DISPLAY || | ||
| 320 | dst_frame_status == S5P_FIMV_DEC_STATUS_DECODING_ONLY) | ||
| 321 | s5p_mfc_handle_frame_copy_time(ctx); | ||
| 322 | |||
| 323 | /* A frame has been decoded and is in the buffer */ | ||
| 324 | if (dst_frame_status == S5P_FIMV_DEC_STATUS_DISPLAY_ONLY || | ||
| 325 | dst_frame_status == S5P_FIMV_DEC_STATUS_DECODING_DISPLAY) { | ||
| 326 | s5p_mfc_handle_frame_new(ctx, err); | ||
| 327 | } else { | ||
| 328 | mfc_debug(2, "No frame decode\n"); | ||
| 329 | } | ||
| 330 | /* Mark source buffer as complete */ | ||
| 331 | if (dst_frame_status != S5P_FIMV_DEC_STATUS_DISPLAY_ONLY | ||
| 332 | && !list_empty(&ctx->src_queue)) { | ||
| 333 | src_buf = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, | ||
| 334 | list); | ||
| 335 | ctx->consumed_stream += s5p_mfc_get_consumed_stream(); | ||
| 336 | if (ctx->codec_mode != S5P_FIMV_CODEC_H264_DEC && | ||
| 337 | s5p_mfc_get_frame_type() == S5P_FIMV_DECODE_FRAME_P_FRAME | ||
| 338 | && ctx->consumed_stream + STUFF_BYTE < | ||
| 339 | src_buf->b->v4l2_planes[0].bytesused) { | ||
| 340 | /* Run MFC again on the same buffer */ | ||
| 341 | mfc_debug(2, "Running again the same buffer\n"); | ||
| 342 | ctx->after_packed_pb = 1; | ||
| 343 | } else { | ||
| 344 | index = src_buf->b->v4l2_buf.index; | ||
| 345 | mfc_debug(2, "MFC needs next buffer\n"); | ||
| 346 | ctx->consumed_stream = 0; | ||
| 347 | list_del(&src_buf->list); | ||
| 348 | ctx->src_queue_cnt--; | ||
| 349 | if (s5p_mfc_err_dec(err) > 0) | ||
| 350 | vb2_buffer_done(src_buf->b, VB2_BUF_STATE_ERROR); | ||
| 351 | else | ||
| 352 | vb2_buffer_done(src_buf->b, VB2_BUF_STATE_DONE); | ||
| 353 | } | ||
| 354 | } | ||
| 355 | leave_handle_frame: | ||
| 356 | spin_unlock_irqrestore(&dev->irqlock, flags); | ||
| 357 | if ((ctx->src_queue_cnt == 0 && ctx->state != MFCINST_FINISHING) | ||
| 358 | || ctx->dst_queue_cnt < ctx->dpb_count) | ||
| 359 | clear_work_bit(ctx); | ||
| 360 | s5p_mfc_clear_int_flags(dev); | ||
| 361 | wake_up_ctx(ctx, reason, err); | ||
| 362 | if (test_and_clear_bit(0, &dev->hw_lock) == 0) | ||
| 363 | BUG(); | ||
| 364 | s5p_mfc_clock_off(); | ||
| 365 | s5p_mfc_try_run(dev); | ||
| 366 | } | ||
| 367 | |||
| 368 | /* Error handling for interrupt */ | ||
| 369 | static void s5p_mfc_handle_error(struct s5p_mfc_ctx *ctx, | ||
| 370 | unsigned int reason, unsigned int err) | ||
| 371 | { | ||
| 372 | struct s5p_mfc_dev *dev; | ||
| 373 | unsigned long flags; | ||
| 374 | |||
| 375 | /* If no context is available then all necessary | ||
| 376 | * processing has been done. */ | ||
| 377 | if (ctx == 0) | ||
| 378 | return; | ||
| 379 | |||
| 380 | dev = ctx->dev; | ||
| 381 | mfc_err("Interrupt Error: %08x\n", err); | ||
| 382 | s5p_mfc_clear_int_flags(dev); | ||
| 383 | wake_up_dev(dev, reason, err); | ||
| 384 | |||
| 385 | /* Error recovery is dependent on the state of context */ | ||
| 386 | switch (ctx->state) { | ||
| 387 | case MFCINST_INIT: | ||
| 388 | /* This error had to happen while acquireing instance */ | ||
| 389 | case MFCINST_GOT_INST: | ||
| 390 | /* This error had to happen while parsing the header */ | ||
| 391 | case MFCINST_HEAD_PARSED: | ||
| 392 | /* This error had to happen while setting dst buffers */ | ||
| 393 | case MFCINST_RETURN_INST: | ||
| 394 | /* This error had to happen while releasing instance */ | ||
| 395 | clear_work_bit(ctx); | ||
| 396 | wake_up_ctx(ctx, reason, err); | ||
| 397 | if (test_and_clear_bit(0, &dev->hw_lock) == 0) | ||
| 398 | BUG(); | ||
| 399 | s5p_mfc_clock_off(); | ||
| 400 | ctx->state = MFCINST_ERROR; | ||
| 401 | break; | ||
| 402 | case MFCINST_FINISHING: | ||
| 403 | case MFCINST_FINISHED: | ||
| 404 | case MFCINST_RUNNING: | ||
| 405 | /* It is higly probable that an error occured | ||
| 406 | * while decoding a frame */ | ||
| 407 | clear_work_bit(ctx); | ||
| 408 | ctx->state = MFCINST_ERROR; | ||
| 409 | /* Mark all dst buffers as having an error */ | ||
| 410 | spin_lock_irqsave(&dev->irqlock, flags); | ||
| 411 | s5p_mfc_cleanup_queue(&ctx->dst_queue, &ctx->vq_dst); | ||
| 412 | /* Mark all src buffers as having an error */ | ||
| 413 | s5p_mfc_cleanup_queue(&ctx->src_queue, &ctx->vq_src); | ||
| 414 | spin_unlock_irqrestore(&dev->irqlock, flags); | ||
| 415 | if (test_and_clear_bit(0, &dev->hw_lock) == 0) | ||
| 416 | BUG(); | ||
| 417 | s5p_mfc_clock_off(); | ||
| 418 | break; | ||
| 419 | default: | ||
| 420 | mfc_err("Encountered an error interrupt which had not been handled\n"); | ||
| 421 | break; | ||
| 422 | } | ||
| 423 | return; | ||
| 424 | } | ||
| 425 | |||
| 426 | /* Header parsing interrupt handling */ | ||
| 427 | static void s5p_mfc_handle_seq_done(struct s5p_mfc_ctx *ctx, | ||
| 428 | unsigned int reason, unsigned int err) | ||
| 429 | { | ||
| 430 | struct s5p_mfc_dev *dev; | ||
| 431 | unsigned int guard_width, guard_height; | ||
| 432 | |||
| 433 | if (ctx == 0) | ||
| 434 | return; | ||
| 435 | dev = ctx->dev; | ||
| 436 | if (ctx->c_ops->post_seq_start) { | ||
| 437 | if (ctx->c_ops->post_seq_start(ctx)) | ||
| 438 | mfc_err("post_seq_start() failed\n"); | ||
| 439 | } else { | ||
| 440 | ctx->img_width = s5p_mfc_get_img_width(); | ||
| 441 | ctx->img_height = s5p_mfc_get_img_height(); | ||
| 442 | |||
| 443 | ctx->buf_width = ALIGN(ctx->img_width, | ||
| 444 | S5P_FIMV_NV12MT_HALIGN); | ||
| 445 | ctx->buf_height = ALIGN(ctx->img_height, | ||
| 446 | S5P_FIMV_NV12MT_VALIGN); | ||
| 447 | mfc_debug(2, "SEQ Done: Movie dimensions %dx%d, " | ||
| 448 | "buffer dimensions: %dx%d\n", ctx->img_width, | ||
| 449 | ctx->img_height, ctx->buf_width, | ||
| 450 | ctx->buf_height); | ||
| 451 | if (ctx->codec_mode == S5P_FIMV_CODEC_H264_DEC) { | ||
| 452 | ctx->luma_size = ALIGN(ctx->buf_width * | ||
| 453 | ctx->buf_height, S5P_FIMV_DEC_BUF_ALIGN); | ||
| 454 | ctx->chroma_size = ALIGN(ctx->buf_width * | ||
| 455 | ALIGN((ctx->img_height >> 1), | ||
| 456 | S5P_FIMV_NV12MT_VALIGN), | ||
| 457 | S5P_FIMV_DEC_BUF_ALIGN); | ||
| 458 | ctx->mv_size = ALIGN(ctx->buf_width * | ||
| 459 | ALIGN((ctx->buf_height >> 2), | ||
| 460 | S5P_FIMV_NV12MT_VALIGN), | ||
| 461 | S5P_FIMV_DEC_BUF_ALIGN); | ||
| 462 | } else { | ||
| 463 | guard_width = ALIGN(ctx->img_width + 24, | ||
| 464 | S5P_FIMV_NV12MT_HALIGN); | ||
| 465 | guard_height = ALIGN(ctx->img_height + 16, | ||
| 466 | S5P_FIMV_NV12MT_VALIGN); | ||
| 467 | ctx->luma_size = ALIGN(guard_width * | ||
| 468 | guard_height, S5P_FIMV_DEC_BUF_ALIGN); | ||
| 469 | guard_width = ALIGN(ctx->img_width + 16, | ||
| 470 | S5P_FIMV_NV12MT_HALIGN); | ||
| 471 | guard_height = ALIGN((ctx->img_height >> 1) + 4, | ||
| 472 | S5P_FIMV_NV12MT_VALIGN); | ||
| 473 | ctx->chroma_size = ALIGN(guard_width * | ||
| 474 | guard_height, S5P_FIMV_DEC_BUF_ALIGN); | ||
| 475 | ctx->mv_size = 0; | ||
| 476 | } | ||
| 477 | ctx->dpb_count = s5p_mfc_get_dpb_count(); | ||
| 478 | if (ctx->img_width == 0 || ctx->img_width == 0) | ||
| 479 | ctx->state = MFCINST_ERROR; | ||
| 480 | else | ||
| 481 | ctx->state = MFCINST_HEAD_PARSED; | ||
| 482 | } | ||
| 483 | s5p_mfc_clear_int_flags(dev); | ||
| 484 | clear_work_bit(ctx); | ||
| 485 | if (test_and_clear_bit(0, &dev->hw_lock) == 0) | ||
| 486 | BUG(); | ||
| 487 | s5p_mfc_clock_off(); | ||
| 488 | s5p_mfc_try_run(dev); | ||
| 489 | wake_up_ctx(ctx, reason, err); | ||
| 490 | } | ||
| 491 | |||
| 492 | /* Header parsing interrupt handling */ | ||
| 493 | static void s5p_mfc_handle_init_buffers(struct s5p_mfc_ctx *ctx, | ||
| 494 | unsigned int reason, unsigned int err) | ||
| 495 | { | ||
| 496 | struct s5p_mfc_buf *src_buf; | ||
| 497 | struct s5p_mfc_dev *dev; | ||
| 498 | unsigned long flags; | ||
| 499 | |||
| 500 | if (ctx == 0) | ||
| 501 | return; | ||
| 502 | dev = ctx->dev; | ||
| 503 | s5p_mfc_clear_int_flags(dev); | ||
| 504 | ctx->int_type = reason; | ||
| 505 | ctx->int_err = err; | ||
| 506 | ctx->int_cond = 1; | ||
| 507 | spin_lock(&dev->condlock); | ||
| 508 | clear_bit(ctx->num, &dev->ctx_work_bits); | ||
| 509 | spin_unlock(&dev->condlock); | ||
| 510 | if (err == 0) { | ||
| 511 | ctx->state = MFCINST_RUNNING; | ||
| 512 | if (!ctx->dpb_flush_flag) { | ||
| 513 | spin_lock_irqsave(&dev->irqlock, flags); | ||
| 514 | if (!list_empty(&ctx->src_queue)) { | ||
| 515 | src_buf = list_entry(ctx->src_queue.next, | ||
| 516 | struct s5p_mfc_buf, list); | ||
| 517 | list_del(&src_buf->list); | ||
| 518 | ctx->src_queue_cnt--; | ||
| 519 | vb2_buffer_done(src_buf->b, | ||
| 520 | VB2_BUF_STATE_DONE); | ||
| 521 | } | ||
| 522 | spin_unlock_irqrestore(&dev->irqlock, flags); | ||
| 523 | } else { | ||
| 524 | ctx->dpb_flush_flag = 0; | ||
| 525 | } | ||
| 526 | if (test_and_clear_bit(0, &dev->hw_lock) == 0) | ||
| 527 | BUG(); | ||
| 528 | |||
| 529 | s5p_mfc_clock_off(); | ||
| 530 | |||
| 531 | wake_up(&ctx->queue); | ||
| 532 | s5p_mfc_try_run(dev); | ||
| 533 | } else { | ||
| 534 | if (test_and_clear_bit(0, &dev->hw_lock) == 0) | ||
| 535 | BUG(); | ||
| 536 | |||
| 537 | s5p_mfc_clock_off(); | ||
| 538 | |||
| 539 | wake_up(&ctx->queue); | ||
| 540 | } | ||
| 541 | } | ||
| 542 | |||
| 543 | /* Interrupt processing */ | ||
| 544 | static irqreturn_t s5p_mfc_irq(int irq, void *priv) | ||
| 545 | { | ||
| 546 | struct s5p_mfc_dev *dev = priv; | ||
| 547 | struct s5p_mfc_ctx *ctx; | ||
| 548 | unsigned int reason; | ||
| 549 | unsigned int err; | ||
| 550 | |||
| 551 | mfc_debug_enter(); | ||
| 552 | /* Reset the timeout watchdog */ | ||
| 553 | atomic_set(&dev->watchdog_cnt, 0); | ||
| 554 | ctx = dev->ctx[dev->curr_ctx]; | ||
| 555 | /* Get the reason of interrupt and the error code */ | ||
| 556 | reason = s5p_mfc_get_int_reason(); | ||
| 557 | err = s5p_mfc_get_int_err(); | ||
| 558 | mfc_debug(1, "Int reason: %d (err: %08x)\n", reason, err); | ||
| 559 | switch (reason) { | ||
| 560 | case S5P_FIMV_R2H_CMD_ERR_RET: | ||
| 561 | /* An error has occured */ | ||
| 562 | if (ctx->state == MFCINST_RUNNING && | ||
| 563 | s5p_mfc_err_dec(err) >= S5P_FIMV_ERR_WARNINGS_START) | ||
| 564 | s5p_mfc_handle_frame(ctx, reason, err); | ||
| 565 | else | ||
| 566 | s5p_mfc_handle_error(ctx, reason, err); | ||
| 567 | clear_bit(0, &dev->enter_suspend); | ||
| 568 | break; | ||
| 569 | |||
| 570 | case S5P_FIMV_R2H_CMD_SLICE_DONE_RET: | ||
| 571 | case S5P_FIMV_R2H_CMD_FRAME_DONE_RET: | ||
| 572 | if (ctx->c_ops->post_frame_start) { | ||
| 573 | if (ctx->c_ops->post_frame_start(ctx)) | ||
| 574 | mfc_err("post_frame_start() failed\n"); | ||
| 575 | s5p_mfc_clear_int_flags(dev); | ||
| 576 | wake_up_ctx(ctx, reason, err); | ||
| 577 | if (test_and_clear_bit(0, &dev->hw_lock) == 0) | ||
| 578 | BUG(); | ||
| 579 | s5p_mfc_clock_off(); | ||
| 580 | s5p_mfc_try_run(dev); | ||
| 581 | } else { | ||
| 582 | s5p_mfc_handle_frame(ctx, reason, err); | ||
| 583 | } | ||
| 584 | break; | ||
| 585 | |||
| 586 | case S5P_FIMV_R2H_CMD_SEQ_DONE_RET: | ||
| 587 | s5p_mfc_handle_seq_done(ctx, reason, err); | ||
| 588 | break; | ||
| 589 | |||
| 590 | case S5P_FIMV_R2H_CMD_OPEN_INSTANCE_RET: | ||
| 591 | ctx->inst_no = s5p_mfc_get_inst_no(); | ||
| 592 | ctx->state = MFCINST_GOT_INST; | ||
| 593 | clear_work_bit(ctx); | ||
| 594 | wake_up(&ctx->queue); | ||
| 595 | goto irq_cleanup_hw; | ||
| 596 | |||
| 597 | case S5P_FIMV_R2H_CMD_CLOSE_INSTANCE_RET: | ||
| 598 | clear_work_bit(ctx); | ||
| 599 | ctx->state = MFCINST_FREE; | ||
| 600 | wake_up(&ctx->queue); | ||
| 601 | goto irq_cleanup_hw; | ||
| 602 | |||
| 603 | case S5P_FIMV_R2H_CMD_SYS_INIT_RET: | ||
| 604 | case S5P_FIMV_R2H_CMD_FW_STATUS_RET: | ||
| 605 | case S5P_FIMV_R2H_CMD_SLEEP_RET: | ||
| 606 | case S5P_FIMV_R2H_CMD_WAKEUP_RET: | ||
| 607 | if (ctx) | ||
| 608 | clear_work_bit(ctx); | ||
| 609 | s5p_mfc_clear_int_flags(dev); | ||
| 610 | wake_up_dev(dev, reason, err); | ||
| 611 | clear_bit(0, &dev->hw_lock); | ||
| 612 | clear_bit(0, &dev->enter_suspend); | ||
| 613 | break; | ||
| 614 | |||
| 615 | case S5P_FIMV_R2H_CMD_INIT_BUFFERS_RET: | ||
| 616 | s5p_mfc_handle_init_buffers(ctx, reason, err); | ||
| 617 | break; | ||
| 618 | default: | ||
| 619 | mfc_debug(2, "Unknown int reason\n"); | ||
| 620 | s5p_mfc_clear_int_flags(dev); | ||
| 621 | } | ||
| 622 | mfc_debug_leave(); | ||
| 623 | return IRQ_HANDLED; | ||
| 624 | irq_cleanup_hw: | ||
| 625 | s5p_mfc_clear_int_flags(dev); | ||
| 626 | ctx->int_type = reason; | ||
| 627 | ctx->int_err = err; | ||
| 628 | ctx->int_cond = 1; | ||
| 629 | if (test_and_clear_bit(0, &dev->hw_lock) == 0) | ||
| 630 | mfc_err("Failed to unlock hw\n"); | ||
| 631 | |||
| 632 | s5p_mfc_clock_off(); | ||
| 633 | |||
| 634 | s5p_mfc_try_run(dev); | ||
| 635 | mfc_debug(2, "Exit via irq_cleanup_hw\n"); | ||
| 636 | return IRQ_HANDLED; | ||
| 637 | } | ||
| 638 | |||
| 639 | /* Open an MFC node */ | ||
| 640 | static int s5p_mfc_open(struct file *file) | ||
| 641 | { | ||
| 642 | struct s5p_mfc_dev *dev = video_drvdata(file); | ||
| 643 | struct s5p_mfc_ctx *ctx = NULL; | ||
| 644 | struct vb2_queue *q; | ||
| 645 | unsigned long flags; | ||
| 646 | int ret = 0; | ||
| 647 | |||
| 648 | mfc_debug_enter(); | ||
| 649 | dev->num_inst++; /* It is guarded by mfc_mutex in vfd */ | ||
| 650 | /* Allocate memory for context */ | ||
| 651 | ctx = kzalloc(sizeof *ctx, GFP_KERNEL); | ||
| 652 | if (!ctx) { | ||
| 653 | mfc_err("Not enough memory\n"); | ||
| 654 | ret = -ENOMEM; | ||
| 655 | goto err_alloc; | ||
| 656 | } | ||
| 657 | v4l2_fh_init(&ctx->fh, video_devdata(file)); | ||
| 658 | file->private_data = &ctx->fh; | ||
| 659 | v4l2_fh_add(&ctx->fh); | ||
| 660 | ctx->dev = dev; | ||
| 661 | INIT_LIST_HEAD(&ctx->src_queue); | ||
| 662 | INIT_LIST_HEAD(&ctx->dst_queue); | ||
| 663 | ctx->src_queue_cnt = 0; | ||
| 664 | ctx->dst_queue_cnt = 0; | ||
| 665 | /* Get context number */ | ||
| 666 | ctx->num = 0; | ||
| 667 | while (dev->ctx[ctx->num]) { | ||
| 668 | ctx->num++; | ||
| 669 | if (ctx->num >= MFC_NUM_CONTEXTS) { | ||
| 670 | mfc_err("Too many open contexts\n"); | ||
| 671 | ret = -EBUSY; | ||
| 672 | goto err_no_ctx; | ||
| 673 | } | ||
| 674 | } | ||
| 675 | /* Mark context as idle */ | ||
| 676 | spin_lock_irqsave(&dev->condlock, flags); | ||
| 677 | clear_bit(ctx->num, &dev->ctx_work_bits); | ||
| 678 | spin_unlock_irqrestore(&dev->condlock, flags); | ||
| 679 | dev->ctx[ctx->num] = ctx; | ||
| 680 | if (s5p_mfc_get_node_type(file) == MFCNODE_DECODER) { | ||
| 681 | ctx->type = MFCINST_DECODER; | ||
| 682 | ctx->c_ops = get_dec_codec_ops(); | ||
| 683 | /* Setup ctrl handler */ | ||
| 684 | ret = s5p_mfc_dec_ctrls_setup(ctx); | ||
| 685 | if (ret) { | ||
| 686 | mfc_err("Failed to setup mfc controls\n"); | ||
| 687 | goto err_ctrls_setup; | ||
| 688 | } | ||
| 689 | } else if (s5p_mfc_get_node_type(file) == MFCNODE_ENCODER) { | ||
| 690 | ctx->type = MFCINST_ENCODER; | ||
| 691 | ctx->c_ops = get_enc_codec_ops(); | ||
| 692 | /* only for encoder */ | ||
| 693 | INIT_LIST_HEAD(&ctx->ref_queue); | ||
| 694 | ctx->ref_queue_cnt = 0; | ||
| 695 | /* Setup ctrl handler */ | ||
| 696 | ret = s5p_mfc_enc_ctrls_setup(ctx); | ||
| 697 | if (ret) { | ||
| 698 | mfc_err("Failed to setup mfc controls\n"); | ||
| 699 | goto err_ctrls_setup; | ||
| 700 | } | ||
| 701 | } else { | ||
| 702 | ret = -ENOENT; | ||
| 703 | goto err_bad_node; | ||
| 704 | } | ||
| 705 | ctx->fh.ctrl_handler = &ctx->ctrl_handler; | ||
| 706 | ctx->inst_no = -1; | ||
| 707 | /* Load firmware if this is the first instance */ | ||
| 708 | if (dev->num_inst == 1) { | ||
| 709 | dev->watchdog_timer.expires = jiffies + | ||
| 710 | msecs_to_jiffies(MFC_WATCHDOG_INTERVAL); | ||
| 711 | add_timer(&dev->watchdog_timer); | ||
| 712 | ret = s5p_mfc_power_on(); | ||
| 713 | if (ret < 0) { | ||
| 714 | mfc_err("power on failed\n"); | ||
| 715 | goto err_pwr_enable; | ||
| 716 | } | ||
| 717 | s5p_mfc_clock_on(); | ||
| 718 | ret = s5p_mfc_alloc_and_load_firmware(dev); | ||
| 719 | if (ret) | ||
| 720 | goto err_alloc_fw; | ||
| 721 | /* Init the FW */ | ||
| 722 | ret = s5p_mfc_init_hw(dev); | ||
| 723 | if (ret) | ||
| 724 | goto err_init_hw; | ||
| 725 | s5p_mfc_clock_off(); | ||
| 726 | } | ||
| 727 | /* Init videobuf2 queue for CAPTURE */ | ||
| 728 | q = &ctx->vq_dst; | ||
| 729 | q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; | ||
| 730 | q->drv_priv = &ctx->fh; | ||
| 731 | if (s5p_mfc_get_node_type(file) == MFCNODE_DECODER) { | ||
| 732 | q->io_modes = VB2_MMAP; | ||
| 733 | q->ops = get_dec_queue_ops(); | ||
| 734 | } else if (s5p_mfc_get_node_type(file) == MFCNODE_ENCODER) { | ||
| 735 | q->io_modes = VB2_MMAP | VB2_USERPTR; | ||
| 736 | q->ops = get_enc_queue_ops(); | ||
| 737 | } else { | ||
| 738 | ret = -ENOENT; | ||
| 739 | goto err_queue_init; | ||
| 740 | } | ||
| 741 | q->mem_ops = (struct vb2_mem_ops *)&vb2_dma_contig_memops; | ||
| 742 | ret = vb2_queue_init(q); | ||
| 743 | if (ret) { | ||
| 744 | mfc_err("Failed to initialize videobuf2 queue(capture)\n"); | ||
| 745 | goto err_queue_init; | ||
| 746 | } | ||
| 747 | /* Init videobuf2 queue for OUTPUT */ | ||
| 748 | q = &ctx->vq_src; | ||
| 749 | q->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE; | ||
| 750 | q->io_modes = VB2_MMAP; | ||
| 751 | q->drv_priv = &ctx->fh; | ||
| 752 | if (s5p_mfc_get_node_type(file) == MFCNODE_DECODER) { | ||
| 753 | q->io_modes = VB2_MMAP; | ||
| 754 | q->ops = get_dec_queue_ops(); | ||
| 755 | } else if (s5p_mfc_get_node_type(file) == MFCNODE_ENCODER) { | ||
| 756 | q->io_modes = VB2_MMAP | VB2_USERPTR; | ||
| 757 | q->ops = get_enc_queue_ops(); | ||
| 758 | } else { | ||
| 759 | ret = -ENOENT; | ||
| 760 | goto err_queue_init; | ||
| 761 | } | ||
| 762 | q->mem_ops = (struct vb2_mem_ops *)&vb2_dma_contig_memops; | ||
| 763 | ret = vb2_queue_init(q); | ||
| 764 | if (ret) { | ||
| 765 | mfc_err("Failed to initialize videobuf2 queue(output)\n"); | ||
| 766 | goto err_queue_init; | ||
| 767 | } | ||
| 768 | init_waitqueue_head(&ctx->queue); | ||
| 769 | mfc_debug_leave(); | ||
| 770 | return ret; | ||
| 771 | /* Deinit when failure occured */ | ||
| 772 | err_queue_init: | ||
| 773 | err_init_hw: | ||
| 774 | s5p_mfc_release_firmware(dev); | ||
| 775 | err_alloc_fw: | ||
| 776 | dev->ctx[ctx->num] = 0; | ||
| 777 | del_timer_sync(&dev->watchdog_timer); | ||
| 778 | s5p_mfc_clock_off(); | ||
| 779 | err_pwr_enable: | ||
| 780 | if (dev->num_inst == 1) { | ||
| 781 | if (s5p_mfc_power_off() < 0) | ||
| 782 | mfc_err("power off failed\n"); | ||
| 783 | s5p_mfc_release_firmware(dev); | ||
| 784 | } | ||
| 785 | err_ctrls_setup: | ||
| 786 | s5p_mfc_dec_ctrls_delete(ctx); | ||
| 787 | err_bad_node: | ||
| 788 | err_no_ctx: | ||
| 789 | v4l2_fh_del(&ctx->fh); | ||
| 790 | v4l2_fh_exit(&ctx->fh); | ||
| 791 | kfree(ctx); | ||
| 792 | err_alloc: | ||
| 793 | dev->num_inst--; | ||
| 794 | mfc_debug_leave(); | ||
| 795 | return ret; | ||
| 796 | } | ||
| 797 | |||
| 798 | /* Release MFC context */ | ||
| 799 | static int s5p_mfc_release(struct file *file) | ||
| 800 | { | ||
| 801 | struct s5p_mfc_ctx *ctx = fh_to_ctx(file->private_data); | ||
| 802 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 803 | unsigned long flags; | ||
| 804 | |||
| 805 | mfc_debug_enter(); | ||
| 806 | s5p_mfc_clock_on(); | ||
| 807 | vb2_queue_release(&ctx->vq_src); | ||
| 808 | vb2_queue_release(&ctx->vq_dst); | ||
| 809 | /* Mark context as idle */ | ||
| 810 | spin_lock_irqsave(&dev->condlock, flags); | ||
| 811 | clear_bit(ctx->num, &dev->ctx_work_bits); | ||
| 812 | spin_unlock_irqrestore(&dev->condlock, flags); | ||
| 813 | /* If instance was initialised then | ||
| 814 | * return instance and free reosurces */ | ||
| 815 | if (ctx->inst_no != MFC_NO_INSTANCE_SET) { | ||
| 816 | mfc_debug(2, "Has to free instance\n"); | ||
| 817 | ctx->state = MFCINST_RETURN_INST; | ||
| 818 | spin_lock_irqsave(&dev->condlock, flags); | ||
| 819 | set_bit(ctx->num, &dev->ctx_work_bits); | ||
| 820 | spin_unlock_irqrestore(&dev->condlock, flags); | ||
| 821 | s5p_mfc_clean_ctx_int_flags(ctx); | ||
| 822 | s5p_mfc_try_run(dev); | ||
| 823 | /* Wait until instance is returned or timeout occured */ | ||
| 824 | if (s5p_mfc_wait_for_done_ctx | ||
| 825 | (ctx, S5P_FIMV_R2H_CMD_CLOSE_INSTANCE_RET, 0)) { | ||
| 826 | s5p_mfc_clock_off(); | ||
| 827 | mfc_err("Err returning instance\n"); | ||
| 828 | } | ||
| 829 | mfc_debug(2, "After free instance\n"); | ||
| 830 | /* Free resources */ | ||
| 831 | s5p_mfc_release_codec_buffers(ctx); | ||
| 832 | s5p_mfc_release_instance_buffer(ctx); | ||
| 833 | if (ctx->type == MFCINST_DECODER) | ||
| 834 | s5p_mfc_release_dec_desc_buffer(ctx); | ||
| 835 | |||
| 836 | ctx->inst_no = MFC_NO_INSTANCE_SET; | ||
| 837 | } | ||
| 838 | /* hardware locking scheme */ | ||
| 839 | if (dev->curr_ctx == ctx->num) | ||
| 840 | clear_bit(0, &dev->hw_lock); | ||
| 841 | dev->num_inst--; | ||
| 842 | if (dev->num_inst == 0) { | ||
| 843 | mfc_debug(2, "Last instance - release firmware\n"); | ||
| 844 | /* reset <-> F/W release */ | ||
| 845 | s5p_mfc_reset(dev); | ||
| 846 | s5p_mfc_release_firmware(dev); | ||
| 847 | del_timer_sync(&dev->watchdog_timer); | ||
| 848 | if (s5p_mfc_power_off() < 0) | ||
| 849 | mfc_err("Power off failed\n"); | ||
| 850 | } | ||
| 851 | mfc_debug(2, "Shutting down clock\n"); | ||
| 852 | s5p_mfc_clock_off(); | ||
| 853 | dev->ctx[ctx->num] = 0; | ||
| 854 | s5p_mfc_dec_ctrls_delete(ctx); | ||
| 855 | v4l2_fh_del(&ctx->fh); | ||
| 856 | v4l2_fh_exit(&ctx->fh); | ||
| 857 | kfree(ctx); | ||
| 858 | mfc_debug_leave(); | ||
| 859 | return 0; | ||
| 860 | } | ||
| 861 | |||
| 862 | /* Poll */ | ||
| 863 | static unsigned int s5p_mfc_poll(struct file *file, | ||
| 864 | struct poll_table_struct *wait) | ||
| 865 | { | ||
| 866 | struct s5p_mfc_ctx *ctx = fh_to_ctx(file->private_data); | ||
| 867 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 868 | struct vb2_queue *src_q, *dst_q; | ||
| 869 | struct vb2_buffer *src_vb = NULL, *dst_vb = NULL; | ||
| 870 | unsigned int rc = 0; | ||
| 871 | unsigned long flags; | ||
| 872 | |||
| 873 | src_q = &ctx->vq_src; | ||
| 874 | dst_q = &ctx->vq_dst; | ||
| 875 | /* | ||
| 876 | * There has to be at least one buffer queued on each queued_list, which | ||
| 877 | * means either in driver already or waiting for driver to claim it | ||
| 878 | * and start processing. | ||
| 879 | */ | ||
| 880 | if ((!src_q->streaming || list_empty(&src_q->queued_list)) | ||
| 881 | && (!dst_q->streaming || list_empty(&dst_q->queued_list))) { | ||
| 882 | rc = POLLERR; | ||
| 883 | goto end; | ||
| 884 | } | ||
| 885 | mutex_unlock(&dev->mfc_mutex); | ||
| 886 | poll_wait(file, &src_q->done_wq, wait); | ||
| 887 | poll_wait(file, &dst_q->done_wq, wait); | ||
| 888 | mutex_lock(&dev->mfc_mutex); | ||
| 889 | spin_lock_irqsave(&src_q->done_lock, flags); | ||
| 890 | if (!list_empty(&src_q->done_list)) | ||
| 891 | src_vb = list_first_entry(&src_q->done_list, struct vb2_buffer, | ||
| 892 | done_entry); | ||
| 893 | if (src_vb && (src_vb->state == VB2_BUF_STATE_DONE | ||
| 894 | || src_vb->state == VB2_BUF_STATE_ERROR)) | ||
| 895 | rc |= POLLOUT | POLLWRNORM; | ||
| 896 | spin_unlock_irqrestore(&src_q->done_lock, flags); | ||
| 897 | spin_lock_irqsave(&dst_q->done_lock, flags); | ||
| 898 | if (!list_empty(&dst_q->done_list)) | ||
| 899 | dst_vb = list_first_entry(&dst_q->done_list, struct vb2_buffer, | ||
| 900 | done_entry); | ||
| 901 | if (dst_vb && (dst_vb->state == VB2_BUF_STATE_DONE | ||
| 902 | || dst_vb->state == VB2_BUF_STATE_ERROR)) | ||
| 903 | rc |= POLLIN | POLLRDNORM; | ||
| 904 | spin_unlock_irqrestore(&dst_q->done_lock, flags); | ||
| 905 | end: | ||
| 906 | return rc; | ||
| 907 | } | ||
| 908 | |||
| 909 | /* Mmap */ | ||
| 910 | static int s5p_mfc_mmap(struct file *file, struct vm_area_struct *vma) | ||
| 911 | { | ||
| 912 | struct s5p_mfc_ctx *ctx = fh_to_ctx(file->private_data); | ||
| 913 | unsigned long offset = vma->vm_pgoff << PAGE_SHIFT; | ||
| 914 | int ret; | ||
| 915 | if (offset < DST_QUEUE_OFF_BASE) { | ||
| 916 | mfc_debug(2, "mmaping source\n"); | ||
| 917 | ret = vb2_mmap(&ctx->vq_src, vma); | ||
| 918 | } else { /* capture */ | ||
| 919 | mfc_debug(2, "mmaping destination\n"); | ||
| 920 | vma->vm_pgoff -= (DST_QUEUE_OFF_BASE >> PAGE_SHIFT); | ||
| 921 | ret = vb2_mmap(&ctx->vq_dst, vma); | ||
| 922 | } | ||
| 923 | return ret; | ||
| 924 | } | ||
| 925 | |||
| 926 | /* v4l2 ops */ | ||
| 927 | static const struct v4l2_file_operations s5p_mfc_fops = { | ||
| 928 | .owner = THIS_MODULE, | ||
| 929 | .open = s5p_mfc_open, | ||
| 930 | .release = s5p_mfc_release, | ||
| 931 | .poll = s5p_mfc_poll, | ||
| 932 | .unlocked_ioctl = video_ioctl2, | ||
| 933 | .mmap = s5p_mfc_mmap, | ||
| 934 | }; | ||
| 935 | |||
| 936 | static int match_child(struct device *dev, void *data) | ||
| 937 | { | ||
| 938 | if (!dev_name(dev)) | ||
| 939 | return 0; | ||
| 940 | return !strcmp(dev_name(dev), (char *)data); | ||
| 941 | } | ||
| 942 | |||
| 943 | |||
| 944 | /* MFC probe function */ | ||
| 945 | static int __devinit s5p_mfc_probe(struct platform_device *pdev) | ||
| 946 | { | ||
| 947 | struct s5p_mfc_dev *dev; | ||
| 948 | struct video_device *vfd; | ||
| 949 | struct resource *res; | ||
| 950 | int ret; | ||
| 951 | |||
| 952 | pr_debug("%s++\n", __func__); | ||
| 953 | dev = kzalloc(sizeof *dev, GFP_KERNEL); | ||
| 954 | if (!dev) { | ||
| 955 | dev_err(&pdev->dev, "Not enough memory for MFC device\n"); | ||
| 956 | return -ENOMEM; | ||
| 957 | } | ||
| 958 | |||
| 959 | spin_lock_init(&dev->irqlock); | ||
| 960 | spin_lock_init(&dev->condlock); | ||
| 961 | dev->plat_dev = pdev; | ||
| 962 | if (!dev->plat_dev) { | ||
| 963 | dev_err(&pdev->dev, "No platform data specified\n"); | ||
| 964 | ret = -ENODEV; | ||
| 965 | goto err_dev; | ||
| 966 | } | ||
| 967 | |||
| 968 | ret = s5p_mfc_init_pm(dev); | ||
| 969 | if (ret < 0) { | ||
| 970 | dev_err(&pdev->dev, "failed to get mfc clock source\n"); | ||
| 971 | goto err_clk; | ||
| 972 | } | ||
| 973 | |||
| 974 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
| 975 | if (res == NULL) { | ||
| 976 | dev_err(&pdev->dev, "failed to get memory region resource\n"); | ||
| 977 | ret = -ENOENT; | ||
| 978 | goto err_res; | ||
| 979 | } | ||
| 980 | |||
| 981 | dev->mfc_mem = request_mem_region(res->start, resource_size(res), | ||
| 982 | pdev->name); | ||
| 983 | if (dev->mfc_mem == NULL) { | ||
| 984 | dev_err(&pdev->dev, "failed to get memory region\n"); | ||
| 985 | ret = -ENOENT; | ||
| 986 | goto err_mem_reg; | ||
| 987 | } | ||
| 988 | dev->regs_base = ioremap(dev->mfc_mem->start, resource_size(dev->mfc_mem)); | ||
| 989 | if (dev->regs_base == NULL) { | ||
| 990 | dev_err(&pdev->dev, "failed to ioremap address region\n"); | ||
| 991 | ret = -ENOENT; | ||
| 992 | goto err_ioremap; | ||
| 993 | } | ||
| 994 | |||
| 995 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | ||
| 996 | if (res == NULL) { | ||
| 997 | dev_err(&pdev->dev, "failed to get irq resource\n"); | ||
| 998 | ret = -ENOENT; | ||
| 999 | goto err_get_res; | ||
| 1000 | } | ||
| 1001 | dev->irq = res->start; | ||
| 1002 | ret = request_irq(dev->irq, s5p_mfc_irq, IRQF_DISABLED, pdev->name, | ||
| 1003 | dev); | ||
| 1004 | if (ret) { | ||
| 1005 | dev_err(&pdev->dev, "Failed to install irq (%d)\n", ret); | ||
| 1006 | goto err_req_irq; | ||
| 1007 | } | ||
| 1008 | |||
| 1009 | dev->mem_dev_l = device_find_child(&dev->plat_dev->dev, "s5p-mfc-l", | ||
| 1010 | match_child); | ||
| 1011 | if (!dev->mem_dev_l) { | ||
| 1012 | mfc_err("Mem child (L) device get failed\n"); | ||
| 1013 | ret = -ENODEV; | ||
| 1014 | goto err_find_child; | ||
| 1015 | } | ||
| 1016 | dev->mem_dev_r = device_find_child(&dev->plat_dev->dev, "s5p-mfc-r", | ||
| 1017 | match_child); | ||
| 1018 | if (!dev->mem_dev_r) { | ||
| 1019 | mfc_err("Mem child (R) device get failed\n"); | ||
| 1020 | ret = -ENODEV; | ||
| 1021 | goto err_find_child; | ||
| 1022 | } | ||
| 1023 | |||
| 1024 | dev->alloc_ctx[0] = vb2_dma_contig_init_ctx(dev->mem_dev_l); | ||
| 1025 | if (IS_ERR_OR_NULL(dev->alloc_ctx[0])) { | ||
| 1026 | ret = PTR_ERR(dev->alloc_ctx[0]); | ||
| 1027 | goto err_mem_init_ctx_0; | ||
| 1028 | } | ||
| 1029 | dev->alloc_ctx[1] = vb2_dma_contig_init_ctx(dev->mem_dev_r); | ||
| 1030 | if (IS_ERR_OR_NULL(dev->alloc_ctx[1])) { | ||
| 1031 | ret = PTR_ERR(dev->alloc_ctx[1]); | ||
| 1032 | goto err_mem_init_ctx_1; | ||
| 1033 | } | ||
| 1034 | |||
| 1035 | mutex_init(&dev->mfc_mutex); | ||
| 1036 | |||
| 1037 | ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev); | ||
| 1038 | if (ret) | ||
| 1039 | goto err_v4l2_dev_reg; | ||
| 1040 | init_waitqueue_head(&dev->queue); | ||
| 1041 | |||
| 1042 | /* decoder */ | ||
| 1043 | vfd = video_device_alloc(); | ||
| 1044 | if (!vfd) { | ||
| 1045 | v4l2_err(&dev->v4l2_dev, "Failed to allocate video device\n"); | ||
| 1046 | ret = -ENOMEM; | ||
| 1047 | goto err_dec_alloc; | ||
| 1048 | } | ||
| 1049 | vfd->fops = &s5p_mfc_fops, | ||
| 1050 | vfd->ioctl_ops = get_dec_v4l2_ioctl_ops(); | ||
| 1051 | vfd->release = video_device_release, | ||
| 1052 | vfd->lock = &dev->mfc_mutex; | ||
| 1053 | vfd->v4l2_dev = &dev->v4l2_dev; | ||
| 1054 | snprintf(vfd->name, sizeof(vfd->name), "%s", S5P_MFC_DEC_NAME); | ||
| 1055 | dev->vfd_dec = vfd; | ||
| 1056 | ret = video_register_device(vfd, VFL_TYPE_GRABBER, 0); | ||
| 1057 | if (ret) { | ||
| 1058 | v4l2_err(&dev->v4l2_dev, "Failed to register video device\n"); | ||
| 1059 | video_device_release(vfd); | ||
| 1060 | goto err_dec_reg; | ||
| 1061 | } | ||
| 1062 | v4l2_info(&dev->v4l2_dev, | ||
| 1063 | "decoder registered as /dev/video%d\n", vfd->num); | ||
| 1064 | video_set_drvdata(vfd, dev); | ||
| 1065 | |||
| 1066 | /* encoder */ | ||
| 1067 | vfd = video_device_alloc(); | ||
| 1068 | if (!vfd) { | ||
| 1069 | v4l2_err(&dev->v4l2_dev, "Failed to allocate video device\n"); | ||
| 1070 | ret = -ENOMEM; | ||
| 1071 | goto err_enc_alloc; | ||
| 1072 | } | ||
| 1073 | vfd->fops = &s5p_mfc_fops, | ||
| 1074 | vfd->ioctl_ops = get_enc_v4l2_ioctl_ops(); | ||
| 1075 | vfd->release = video_device_release, | ||
| 1076 | vfd->lock = &dev->mfc_mutex; | ||
| 1077 | vfd->v4l2_dev = &dev->v4l2_dev; | ||
| 1078 | snprintf(vfd->name, sizeof(vfd->name), "%s", S5P_MFC_ENC_NAME); | ||
| 1079 | dev->vfd_enc = vfd; | ||
| 1080 | ret = video_register_device(vfd, VFL_TYPE_GRABBER, 0); | ||
| 1081 | if (ret) { | ||
| 1082 | v4l2_err(&dev->v4l2_dev, "Failed to register video device\n"); | ||
| 1083 | video_device_release(vfd); | ||
| 1084 | goto err_enc_reg; | ||
| 1085 | } | ||
| 1086 | v4l2_info(&dev->v4l2_dev, | ||
| 1087 | "encoder registered as /dev/video%d\n", vfd->num); | ||
| 1088 | video_set_drvdata(vfd, dev); | ||
| 1089 | platform_set_drvdata(pdev, dev); | ||
| 1090 | |||
| 1091 | dev->hw_lock = 0; | ||
| 1092 | dev->watchdog_workqueue = create_singlethread_workqueue(S5P_MFC_NAME); | ||
| 1093 | INIT_WORK(&dev->watchdog_work, s5p_mfc_watchdog_worker); | ||
| 1094 | atomic_set(&dev->watchdog_cnt, 0); | ||
| 1095 | init_timer(&dev->watchdog_timer); | ||
| 1096 | dev->watchdog_timer.data = (unsigned long)dev; | ||
| 1097 | dev->watchdog_timer.function = s5p_mfc_watchdog; | ||
| 1098 | |||
| 1099 | pr_debug("%s--\n", __func__); | ||
| 1100 | return 0; | ||
| 1101 | |||
| 1102 | /* Deinit MFC if probe had failed */ | ||
| 1103 | err_enc_reg: | ||
| 1104 | video_device_release(dev->vfd_enc); | ||
| 1105 | err_enc_alloc: | ||
| 1106 | video_unregister_device(dev->vfd_dec); | ||
| 1107 | err_dec_reg: | ||
| 1108 | video_device_release(dev->vfd_dec); | ||
| 1109 | err_dec_alloc: | ||
| 1110 | v4l2_device_unregister(&dev->v4l2_dev); | ||
| 1111 | err_v4l2_dev_reg: | ||
| 1112 | vb2_dma_contig_cleanup_ctx(dev->alloc_ctx[1]); | ||
| 1113 | err_mem_init_ctx_1: | ||
| 1114 | vb2_dma_contig_cleanup_ctx(dev->alloc_ctx[0]); | ||
| 1115 | err_mem_init_ctx_0: | ||
| 1116 | err_find_child: | ||
| 1117 | free_irq(dev->irq, dev); | ||
| 1118 | err_req_irq: | ||
| 1119 | err_get_res: | ||
| 1120 | iounmap(dev->regs_base); | ||
| 1121 | dev->regs_base = NULL; | ||
| 1122 | err_ioremap: | ||
| 1123 | release_resource(dev->mfc_mem); | ||
| 1124 | kfree(dev->mfc_mem); | ||
| 1125 | err_mem_reg: | ||
| 1126 | err_res: | ||
| 1127 | s5p_mfc_final_pm(dev); | ||
| 1128 | err_clk: | ||
| 1129 | err_dev: | ||
| 1130 | kfree(dev); | ||
| 1131 | pr_debug("%s-- with error\n", __func__); | ||
| 1132 | return ret; | ||
| 1133 | |||
| 1134 | } | ||
| 1135 | |||
| 1136 | /* Remove the driver */ | ||
| 1137 | static int __devexit s5p_mfc_remove(struct platform_device *pdev) | ||
| 1138 | { | ||
| 1139 | struct s5p_mfc_dev *dev = platform_get_drvdata(pdev); | ||
| 1140 | |||
| 1141 | v4l2_info(&dev->v4l2_dev, "Removing %s\n", pdev->name); | ||
| 1142 | |||
| 1143 | del_timer_sync(&dev->watchdog_timer); | ||
| 1144 | flush_workqueue(dev->watchdog_workqueue); | ||
| 1145 | destroy_workqueue(dev->watchdog_workqueue); | ||
| 1146 | |||
| 1147 | video_unregister_device(dev->vfd_enc); | ||
| 1148 | video_unregister_device(dev->vfd_dec); | ||
| 1149 | v4l2_device_unregister(&dev->v4l2_dev); | ||
| 1150 | vb2_dma_contig_cleanup_ctx(dev->alloc_ctx[0]); | ||
| 1151 | vb2_dma_contig_cleanup_ctx(dev->alloc_ctx[1]); | ||
| 1152 | |||
| 1153 | free_irq(dev->irq, dev); | ||
| 1154 | iounmap(dev->regs_base); | ||
| 1155 | if (dev->mfc_mem) { | ||
| 1156 | release_resource(dev->mfc_mem); | ||
| 1157 | kfree(dev->mfc_mem); | ||
| 1158 | dev->mfc_mem = NULL; | ||
| 1159 | } | ||
| 1160 | s5p_mfc_final_pm(dev); | ||
| 1161 | kfree(dev); | ||
| 1162 | return 0; | ||
| 1163 | } | ||
| 1164 | |||
| 1165 | #ifdef CONFIG_PM_SLEEP | ||
| 1166 | |||
| 1167 | static int s5p_mfc_suspend(struct device *dev) | ||
| 1168 | { | ||
| 1169 | struct platform_device *pdev = to_platform_device(dev); | ||
| 1170 | struct s5p_mfc_dev *m_dev = platform_get_drvdata(pdev); | ||
| 1171 | int ret; | ||
| 1172 | |||
| 1173 | if (m_dev->num_inst == 0) | ||
| 1174 | return 0; | ||
| 1175 | return s5p_mfc_sleep(m_dev); | ||
| 1176 | if (test_and_set_bit(0, &m_dev->enter_suspend) != 0) { | ||
| 1177 | mfc_err("Error: going to suspend for a second time\n"); | ||
| 1178 | return -EIO; | ||
| 1179 | } | ||
| 1180 | |||
| 1181 | /* Check if we're processing then wait if it necessary. */ | ||
| 1182 | while (test_and_set_bit(0, &m_dev->hw_lock) != 0) { | ||
| 1183 | /* Try and lock the HW */ | ||
| 1184 | /* Wait on the interrupt waitqueue */ | ||
| 1185 | ret = wait_event_interruptible_timeout(m_dev->queue, | ||
| 1186 | m_dev->int_cond || m_dev->ctx[m_dev->curr_ctx]->int_cond, | ||
| 1187 | msecs_to_jiffies(MFC_INT_TIMEOUT)); | ||
| 1188 | |||
| 1189 | if (ret == 0) { | ||
| 1190 | mfc_err("Waiting for hardware to finish timed out\n"); | ||
| 1191 | return -EIO; | ||
| 1192 | } | ||
| 1193 | } | ||
| 1194 | return 0; | ||
| 1195 | } | ||
| 1196 | |||
| 1197 | static int s5p_mfc_resume(struct device *dev) | ||
| 1198 | { | ||
| 1199 | struct platform_device *pdev = to_platform_device(dev); | ||
| 1200 | struct s5p_mfc_dev *m_dev = platform_get_drvdata(pdev); | ||
| 1201 | |||
| 1202 | if (m_dev->num_inst == 0) | ||
| 1203 | return 0; | ||
| 1204 | return s5p_mfc_wakeup(m_dev); | ||
| 1205 | } | ||
| 1206 | #endif | ||
| 1207 | |||
| 1208 | #ifdef CONFIG_PM_RUNTIME | ||
| 1209 | static int s5p_mfc_runtime_suspend(struct device *dev) | ||
| 1210 | { | ||
| 1211 | struct platform_device *pdev = to_platform_device(dev); | ||
| 1212 | struct s5p_mfc_dev *m_dev = platform_get_drvdata(pdev); | ||
| 1213 | |||
| 1214 | atomic_set(&m_dev->pm.power, 0); | ||
| 1215 | return 0; | ||
| 1216 | } | ||
| 1217 | |||
| 1218 | static int s5p_mfc_runtime_resume(struct device *dev) | ||
| 1219 | { | ||
| 1220 | struct platform_device *pdev = to_platform_device(dev); | ||
| 1221 | struct s5p_mfc_dev *m_dev = platform_get_drvdata(pdev); | ||
| 1222 | int pre_power; | ||
| 1223 | |||
| 1224 | if (!m_dev->alloc_ctx) | ||
| 1225 | return 0; | ||
| 1226 | pre_power = atomic_read(&m_dev->pm.power); | ||
| 1227 | atomic_set(&m_dev->pm.power, 1); | ||
| 1228 | return 0; | ||
| 1229 | } | ||
| 1230 | #endif | ||
| 1231 | |||
| 1232 | /* Power management */ | ||
| 1233 | static const struct dev_pm_ops s5p_mfc_pm_ops = { | ||
| 1234 | SET_SYSTEM_SLEEP_PM_OPS(s5p_mfc_suspend, s5p_mfc_resume) | ||
| 1235 | SET_RUNTIME_PM_OPS(s5p_mfc_runtime_suspend, s5p_mfc_runtime_resume, | ||
| 1236 | NULL) | ||
| 1237 | }; | ||
| 1238 | |||
| 1239 | static struct platform_driver s5p_mfc_pdrv = { | ||
| 1240 | .probe = s5p_mfc_probe, | ||
| 1241 | .remove = __devexit_p(s5p_mfc_remove), | ||
| 1242 | .driver = { | ||
| 1243 | .name = S5P_MFC_NAME, | ||
| 1244 | .owner = THIS_MODULE, | ||
| 1245 | .pm = &s5p_mfc_pm_ops | ||
| 1246 | }, | ||
| 1247 | }; | ||
| 1248 | |||
| 1249 | static char banner[] __initdata = | ||
| 1250 | "S5P MFC V4L2 Driver, (C) 2011 Samsung Electronics\n"; | ||
| 1251 | |||
| 1252 | static int __init s5p_mfc_init(void) | ||
| 1253 | { | ||
| 1254 | int ret; | ||
| 1255 | |||
| 1256 | pr_info("%s", banner); | ||
| 1257 | ret = platform_driver_register(&s5p_mfc_pdrv); | ||
| 1258 | if (ret) | ||
| 1259 | pr_err("Platform device registration failed.\n"); | ||
| 1260 | return ret; | ||
| 1261 | } | ||
| 1262 | |||
| 1263 | static void __devexit s5p_mfc_exit(void) | ||
| 1264 | { | ||
| 1265 | platform_driver_unregister(&s5p_mfc_pdrv); | ||
| 1266 | } | ||
| 1267 | |||
| 1268 | module_init(s5p_mfc_init); | ||
| 1269 | module_exit(s5p_mfc_exit); | ||
| 1270 | |||
| 1271 | MODULE_LICENSE("GPL"); | ||
| 1272 | MODULE_AUTHOR("Kamil Debski <k.debski@samsung.com>"); | ||
| 1273 | MODULE_DESCRIPTION("Samsung S5P Multi Format Codec V4L2 driver"); | ||
| 1274 | |||
diff --git a/drivers/media/video/s5p-mfc/s5p_mfc_cmd.c b/drivers/media/video/s5p-mfc/s5p_mfc_cmd.c new file mode 100644 index 000000000000..f0665ed1a529 --- /dev/null +++ b/drivers/media/video/s5p-mfc/s5p_mfc_cmd.c | |||
| @@ -0,0 +1,120 @@ | |||
| 1 | /* | ||
| 2 | * linux/drivers/media/video/s5p-mfc/s5p_mfc_cmd.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 2011 Samsung Electronics Co., Ltd. | ||
| 5 | * http://www.samsung.com/ | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License as published by | ||
| 9 | * the Free Software Foundation; either version 2 of the License, or | ||
| 10 | * (at your option) any later version. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include "regs-mfc.h" | ||
| 14 | #include "s5p_mfc_cmd.h" | ||
| 15 | #include "s5p_mfc_common.h" | ||
| 16 | #include "s5p_mfc_debug.h" | ||
| 17 | |||
| 18 | /* This function is used to send a command to the MFC */ | ||
| 19 | static int s5p_mfc_cmd_host2risc(struct s5p_mfc_dev *dev, int cmd, | ||
| 20 | struct s5p_mfc_cmd_args *args) | ||
| 21 | { | ||
| 22 | int cur_cmd; | ||
| 23 | unsigned long timeout; | ||
| 24 | |||
| 25 | timeout = jiffies + msecs_to_jiffies(MFC_BW_TIMEOUT); | ||
| 26 | /* wait until host to risc command register becomes 'H2R_CMD_EMPTY' */ | ||
| 27 | do { | ||
| 28 | if (time_after(jiffies, timeout)) { | ||
| 29 | mfc_err("Timeout while waiting for hardware\n"); | ||
| 30 | return -EIO; | ||
| 31 | } | ||
| 32 | cur_cmd = mfc_read(dev, S5P_FIMV_HOST2RISC_CMD); | ||
| 33 | } while (cur_cmd != S5P_FIMV_H2R_CMD_EMPTY); | ||
| 34 | mfc_write(dev, args->arg[0], S5P_FIMV_HOST2RISC_ARG1); | ||
| 35 | mfc_write(dev, args->arg[1], S5P_FIMV_HOST2RISC_ARG2); | ||
| 36 | mfc_write(dev, args->arg[2], S5P_FIMV_HOST2RISC_ARG3); | ||
| 37 | mfc_write(dev, args->arg[3], S5P_FIMV_HOST2RISC_ARG4); | ||
| 38 | /* Issue the command */ | ||
| 39 | mfc_write(dev, cmd, S5P_FIMV_HOST2RISC_CMD); | ||
| 40 | return 0; | ||
| 41 | } | ||
| 42 | |||
| 43 | /* Initialize the MFC */ | ||
| 44 | int s5p_mfc_sys_init_cmd(struct s5p_mfc_dev *dev) | ||
| 45 | { | ||
| 46 | struct s5p_mfc_cmd_args h2r_args; | ||
| 47 | |||
| 48 | memset(&h2r_args, 0, sizeof(struct s5p_mfc_cmd_args)); | ||
| 49 | h2r_args.arg[0] = dev->fw_size; | ||
| 50 | return s5p_mfc_cmd_host2risc(dev, S5P_FIMV_H2R_CMD_SYS_INIT, &h2r_args); | ||
| 51 | } | ||
| 52 | |||
| 53 | /* Suspend the MFC hardware */ | ||
| 54 | int s5p_mfc_sleep_cmd(struct s5p_mfc_dev *dev) | ||
| 55 | { | ||
| 56 | struct s5p_mfc_cmd_args h2r_args; | ||
| 57 | |||
| 58 | memset(&h2r_args, 0, sizeof(struct s5p_mfc_cmd_args)); | ||
| 59 | return s5p_mfc_cmd_host2risc(dev, S5P_FIMV_H2R_CMD_SLEEP, &h2r_args); | ||
| 60 | } | ||
| 61 | |||
| 62 | /* Wake up the MFC hardware */ | ||
| 63 | int s5p_mfc_wakeup_cmd(struct s5p_mfc_dev *dev) | ||
| 64 | { | ||
| 65 | struct s5p_mfc_cmd_args h2r_args; | ||
| 66 | |||
| 67 | memset(&h2r_args, 0, sizeof(struct s5p_mfc_cmd_args)); | ||
| 68 | return s5p_mfc_cmd_host2risc(dev, S5P_FIMV_H2R_CMD_WAKEUP, &h2r_args); | ||
| 69 | } | ||
| 70 | |||
| 71 | |||
| 72 | int s5p_mfc_open_inst_cmd(struct s5p_mfc_ctx *ctx) | ||
| 73 | { | ||
| 74 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 75 | struct s5p_mfc_cmd_args h2r_args; | ||
| 76 | int ret; | ||
| 77 | |||
| 78 | /* Preparing decoding - getting instance number */ | ||
| 79 | mfc_debug(2, "Getting instance number (codec: %d)\n", ctx->codec_mode); | ||
| 80 | dev->curr_ctx = ctx->num; | ||
| 81 | memset(&h2r_args, 0, sizeof(struct s5p_mfc_cmd_args)); | ||
| 82 | h2r_args.arg[0] = ctx->codec_mode; | ||
| 83 | h2r_args.arg[1] = 0; /* no crc & no pixelcache */ | ||
| 84 | h2r_args.arg[2] = ctx->ctx_ofs; | ||
| 85 | h2r_args.arg[3] = ctx->ctx_size; | ||
| 86 | ret = s5p_mfc_cmd_host2risc(dev, S5P_FIMV_H2R_CMD_OPEN_INSTANCE, | ||
| 87 | &h2r_args); | ||
| 88 | if (ret) { | ||
| 89 | mfc_err("Failed to create a new instance\n"); | ||
| 90 | ctx->state = MFCINST_ERROR; | ||
| 91 | } | ||
| 92 | return ret; | ||
| 93 | } | ||
| 94 | |||
| 95 | int s5p_mfc_close_inst_cmd(struct s5p_mfc_ctx *ctx) | ||
| 96 | { | ||
| 97 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 98 | struct s5p_mfc_cmd_args h2r_args; | ||
| 99 | int ret; | ||
| 100 | |||
| 101 | if (ctx->state == MFCINST_FREE) { | ||
| 102 | mfc_err("Instance already returned\n"); | ||
| 103 | ctx->state = MFCINST_ERROR; | ||
| 104 | return -EINVAL; | ||
| 105 | } | ||
| 106 | /* Closing decoding instance */ | ||
| 107 | mfc_debug(2, "Returning instance number %d\n", ctx->inst_no); | ||
| 108 | dev->curr_ctx = ctx->num; | ||
| 109 | memset(&h2r_args, 0, sizeof(struct s5p_mfc_cmd_args)); | ||
| 110 | h2r_args.arg[0] = ctx->inst_no; | ||
| 111 | ret = s5p_mfc_cmd_host2risc(dev, S5P_FIMV_H2R_CMD_CLOSE_INSTANCE, | ||
| 112 | &h2r_args); | ||
| 113 | if (ret) { | ||
| 114 | mfc_err("Failed to return an instance\n"); | ||
| 115 | ctx->state = MFCINST_ERROR; | ||
| 116 | return -EINVAL; | ||
| 117 | } | ||
| 118 | return 0; | ||
| 119 | } | ||
| 120 | |||
diff --git a/drivers/media/video/s5p-mfc/s5p_mfc_cmd.h b/drivers/media/video/s5p-mfc/s5p_mfc_cmd.h new file mode 100644 index 000000000000..5ceebfe6131a --- /dev/null +++ b/drivers/media/video/s5p-mfc/s5p_mfc_cmd.h | |||
| @@ -0,0 +1,30 @@ | |||
| 1 | /* | ||
| 2 | * linux/drivers/media/video/s5p-mfc/s5p_mfc_cmd.h | ||
| 3 | * | ||
| 4 | * Copyright (C) 2011 Samsung Electronics Co., Ltd. | ||
| 5 | * http://www.samsung.com/ | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License as published by | ||
| 9 | * the Free Software Foundation; either version 2 of the License, or | ||
| 10 | * (at your option) any later version. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #ifndef S5P_MFC_CMD_H_ | ||
| 14 | #define S5P_MFC_CMD_H_ | ||
| 15 | |||
| 16 | #include "s5p_mfc_common.h" | ||
| 17 | |||
| 18 | #define MAX_H2R_ARG 4 | ||
| 19 | |||
| 20 | struct s5p_mfc_cmd_args { | ||
| 21 | unsigned int arg[MAX_H2R_ARG]; | ||
| 22 | }; | ||
| 23 | |||
| 24 | int s5p_mfc_sys_init_cmd(struct s5p_mfc_dev *dev); | ||
| 25 | int s5p_mfc_sleep_cmd(struct s5p_mfc_dev *dev); | ||
| 26 | int s5p_mfc_wakeup_cmd(struct s5p_mfc_dev *dev); | ||
| 27 | int s5p_mfc_open_inst_cmd(struct s5p_mfc_ctx *ctx); | ||
| 28 | int s5p_mfc_close_inst_cmd(struct s5p_mfc_ctx *ctx); | ||
| 29 | |||
| 30 | #endif /* S5P_MFC_CMD_H_ */ | ||
diff --git a/drivers/media/video/s5p-mfc/s5p_mfc_common.h b/drivers/media/video/s5p-mfc/s5p_mfc_common.h new file mode 100644 index 000000000000..91146fa622e4 --- /dev/null +++ b/drivers/media/video/s5p-mfc/s5p_mfc_common.h | |||
| @@ -0,0 +1,572 @@ | |||
| 1 | /* | ||
| 2 | * Samsung S5P Multi Format Codec v 5.0 | ||
| 3 | * | ||
| 4 | * This file contains definitions of enums and structs used by the codec | ||
| 5 | * driver. | ||
| 6 | * | ||
| 7 | * Copyright (C) 2011 Samsung Electronics Co., Ltd. | ||
| 8 | * Kamil Debski, <k.debski@samsung.com> | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License as published by the | ||
| 12 | * Free Software Foundation; either version 2 of the | ||
| 13 | * License, or (at your option) any later version | ||
| 14 | */ | ||
| 15 | |||
| 16 | #ifndef S5P_MFC_COMMON_H_ | ||
| 17 | #define S5P_MFC_COMMON_H_ | ||
| 18 | |||
| 19 | #include "regs-mfc.h" | ||
| 20 | #include <linux/platform_device.h> | ||
| 21 | #include <linux/videodev2.h> | ||
| 22 | #include <media/v4l2-ctrls.h> | ||
| 23 | #include <media/v4l2-device.h> | ||
| 24 | #include <media/v4l2-ioctl.h> | ||
| 25 | #include <media/videobuf2-core.h> | ||
| 26 | |||
| 27 | /* Definitions related to MFC memory */ | ||
| 28 | |||
| 29 | /* Offset base used to differentiate between CAPTURE and OUTPUT | ||
| 30 | * while mmaping */ | ||
| 31 | #define DST_QUEUE_OFF_BASE (TASK_SIZE / 2) | ||
| 32 | |||
| 33 | /* Offset used by the hardware to store addresses */ | ||
| 34 | #define MFC_OFFSET_SHIFT 11 | ||
| 35 | |||
| 36 | #define FIRMWARE_ALIGN 0x20000 /* 128KB */ | ||
| 37 | #define MFC_H264_CTX_BUF_SIZE 0x96000 /* 600KB per H264 instance */ | ||
| 38 | #define MFC_CTX_BUF_SIZE 0x2800 /* 10KB per instance */ | ||
| 39 | #define DESC_BUF_SIZE 0x20000 /* 128KB for DESC buffer */ | ||
| 40 | #define SHARED_BUF_SIZE 0x2000 /* 8KB for shared buffer */ | ||
| 41 | |||
| 42 | #define DEF_CPB_SIZE 0x40000 /* 512KB */ | ||
| 43 | |||
| 44 | #define MFC_BANK1_ALLOC_CTX 0 | ||
| 45 | #define MFC_BANK2_ALLOC_CTX 1 | ||
| 46 | |||
| 47 | #define MFC_BANK1_ALIGN_ORDER 13 | ||
| 48 | #define MFC_BANK2_ALIGN_ORDER 13 | ||
| 49 | #define MFC_BASE_ALIGN_ORDER 17 | ||
| 50 | |||
| 51 | #include <media/videobuf2-dma-contig.h> | ||
| 52 | |||
| 53 | static inline dma_addr_t s5p_mfc_mem_cookie(void *a, void *b) | ||
| 54 | { | ||
| 55 | /* Same functionality as the vb2_dma_contig_plane_paddr */ | ||
| 56 | dma_addr_t *paddr = vb2_dma_contig_memops.cookie(b); | ||
| 57 | |||
| 58 | return *paddr; | ||
| 59 | } | ||
| 60 | |||
| 61 | /* MFC definitions */ | ||
| 62 | #define MFC_MAX_EXTRA_DPB 5 | ||
| 63 | #define MFC_MAX_BUFFERS 32 | ||
| 64 | #define MFC_NUM_CONTEXTS 4 | ||
| 65 | /* Interrupt timeout */ | ||
| 66 | #define MFC_INT_TIMEOUT 2000 | ||
| 67 | /* Busy wait timeout */ | ||
| 68 | #define MFC_BW_TIMEOUT 500 | ||
| 69 | /* Watchdog interval */ | ||
| 70 | #define MFC_WATCHDOG_INTERVAL 1000 | ||
| 71 | /* After how many executions watchdog should assume lock up */ | ||
| 72 | #define MFC_WATCHDOG_CNT 10 | ||
| 73 | #define MFC_NO_INSTANCE_SET -1 | ||
| 74 | #define MFC_ENC_CAP_PLANE_COUNT 1 | ||
| 75 | #define MFC_ENC_OUT_PLANE_COUNT 2 | ||
| 76 | #define STUFF_BYTE 4 | ||
| 77 | #define MFC_MAX_CTRLS 64 | ||
| 78 | |||
| 79 | #define mfc_read(dev, offset) readl(dev->regs_base + (offset)) | ||
| 80 | #define mfc_write(dev, data, offset) writel((data), dev->regs_base + \ | ||
| 81 | (offset)) | ||
| 82 | |||
| 83 | /** | ||
| 84 | * enum s5p_mfc_fmt_type - type of the pixelformat | ||
| 85 | */ | ||
| 86 | enum s5p_mfc_fmt_type { | ||
| 87 | MFC_FMT_DEC, | ||
| 88 | MFC_FMT_ENC, | ||
| 89 | MFC_FMT_RAW, | ||
| 90 | }; | ||
| 91 | |||
| 92 | /** | ||
| 93 | * enum s5p_mfc_node_type - The type of an MFC device node. | ||
| 94 | */ | ||
| 95 | enum s5p_mfc_node_type { | ||
| 96 | MFCNODE_INVALID = -1, | ||
| 97 | MFCNODE_DECODER = 0, | ||
| 98 | MFCNODE_ENCODER = 1, | ||
| 99 | }; | ||
| 100 | |||
| 101 | /** | ||
| 102 | * enum s5p_mfc_inst_type - The type of an MFC instance. | ||
| 103 | */ | ||
| 104 | enum s5p_mfc_inst_type { | ||
| 105 | MFCINST_INVALID, | ||
| 106 | MFCINST_DECODER, | ||
| 107 | MFCINST_ENCODER, | ||
| 108 | }; | ||
| 109 | |||
| 110 | /** | ||
| 111 | * enum s5p_mfc_inst_state - The state of an MFC instance. | ||
| 112 | */ | ||
| 113 | enum s5p_mfc_inst_state { | ||
| 114 | MFCINST_FREE = 0, | ||
| 115 | MFCINST_INIT = 100, | ||
| 116 | MFCINST_GOT_INST, | ||
| 117 | MFCINST_HEAD_PARSED, | ||
| 118 | MFCINST_BUFS_SET, | ||
| 119 | MFCINST_RUNNING, | ||
| 120 | MFCINST_FINISHING, | ||
| 121 | MFCINST_FINISHED, | ||
| 122 | MFCINST_RETURN_INST, | ||
| 123 | MFCINST_ERROR, | ||
| 124 | MFCINST_ABORT, | ||
| 125 | MFCINST_RES_CHANGE_INIT, | ||
| 126 | MFCINST_RES_CHANGE_FLUSH, | ||
| 127 | MFCINST_RES_CHANGE_END, | ||
| 128 | }; | ||
| 129 | |||
| 130 | /** | ||
| 131 | * enum s5p_mfc_queue_state - The state of buffer queue. | ||
| 132 | */ | ||
| 133 | enum s5p_mfc_queue_state { | ||
| 134 | QUEUE_FREE, | ||
| 135 | QUEUE_BUFS_REQUESTED, | ||
| 136 | QUEUE_BUFS_QUERIED, | ||
| 137 | QUEUE_BUFS_MMAPED, | ||
| 138 | }; | ||
| 139 | |||
| 140 | /** | ||
| 141 | * enum s5p_mfc_decode_arg - type of frame decoding | ||
| 142 | */ | ||
| 143 | enum s5p_mfc_decode_arg { | ||
| 144 | MFC_DEC_FRAME, | ||
| 145 | MFC_DEC_LAST_FRAME, | ||
| 146 | MFC_DEC_RES_CHANGE, | ||
| 147 | }; | ||
| 148 | |||
| 149 | struct s5p_mfc_ctx; | ||
| 150 | |||
| 151 | /** | ||
| 152 | * struct s5p_mfc_buf - MFC buffer | ||
| 153 | */ | ||
| 154 | struct s5p_mfc_buf { | ||
| 155 | struct list_head list; | ||
| 156 | struct vb2_buffer *b; | ||
| 157 | union { | ||
| 158 | struct { | ||
| 159 | size_t luma; | ||
| 160 | size_t chroma; | ||
| 161 | } raw; | ||
| 162 | size_t stream; | ||
| 163 | } cookie; | ||
| 164 | int used; | ||
| 165 | }; | ||
| 166 | |||
| 167 | /** | ||
| 168 | * struct s5p_mfc_pm - power management data structure | ||
| 169 | */ | ||
| 170 | struct s5p_mfc_pm { | ||
| 171 | struct clk *clock; | ||
| 172 | struct clk *clock_gate; | ||
| 173 | atomic_t power; | ||
| 174 | struct device *device; | ||
| 175 | }; | ||
| 176 | |||
| 177 | /** | ||
| 178 | * struct s5p_mfc_dev - The struct containing driver internal parameters. | ||
| 179 | * | ||
| 180 | * @v4l2_dev: v4l2_device | ||
| 181 | * @vfd_dec: video device for decoding | ||
| 182 | * @vfd_enc: video device for encoding | ||
| 183 | * @plat_dev: platform device | ||
| 184 | * @mem_dev_l: child device of the left memory bank (0) | ||
| 185 | * @mem_dev_r: child device of the right memory bank (1) | ||
| 186 | * @regs_base: base address of the MFC hw registers | ||
| 187 | * @irq: irq resource | ||
| 188 | * @mfc_mem: MFC registers memory resource | ||
| 189 | * @dec_ctrl_handler: control framework handler for decoding | ||
| 190 | * @enc_ctrl_handler: control framework handler for encoding | ||
| 191 | * @pm: power management control | ||
| 192 | * @num_inst: couter of active MFC instances | ||
| 193 | * @irqlock: lock for operations on videobuf2 queues | ||
| 194 | * @condlock: lock for changing/checking if a context is ready to be | ||
| 195 | * processed | ||
| 196 | * @mfc_mutex: lock for video_device | ||
| 197 | * @int_cond: variable used by the waitqueue | ||
| 198 | * @int_type: type of last interrupt | ||
| 199 | * @int_err: error number for last interrupt | ||
| 200 | * @queue: waitqueue for waiting for completion of device commands | ||
| 201 | * @fw_size: size of firmware | ||
| 202 | * @bank1: address of the beggining of bank 1 memory | ||
| 203 | * @bank2: address of the beggining of bank 2 memory | ||
| 204 | * @hw_lock: used for hardware locking | ||
| 205 | * @ctx: array of driver contexts | ||
| 206 | * @curr_ctx: number of the currently running context | ||
| 207 | * @ctx_work_bits: used to mark which contexts are waiting for hardware | ||
| 208 | * @watchdog_cnt: counter for the watchdog | ||
| 209 | * @watchdog_workqueue: workqueue for the watchdog | ||
| 210 | * @watchdog_work: worker for the watchdog | ||
| 211 | * @alloc_ctx: videobuf2 allocator contexts for two memory banks | ||
| 212 | * @enter_suspend: flag set when entering suspend | ||
| 213 | * | ||
| 214 | */ | ||
| 215 | struct s5p_mfc_dev { | ||
| 216 | struct v4l2_device v4l2_dev; | ||
| 217 | struct video_device *vfd_dec; | ||
| 218 | struct video_device *vfd_enc; | ||
| 219 | struct platform_device *plat_dev; | ||
| 220 | struct device *mem_dev_l; | ||
| 221 | struct device *mem_dev_r; | ||
| 222 | void __iomem *regs_base; | ||
| 223 | int irq; | ||
| 224 | struct resource *mfc_mem; | ||
| 225 | struct v4l2_ctrl_handler dec_ctrl_handler; | ||
| 226 | struct v4l2_ctrl_handler enc_ctrl_handler; | ||
| 227 | struct s5p_mfc_pm pm; | ||
| 228 | int num_inst; | ||
| 229 | spinlock_t irqlock; /* lock when operating on videobuf2 queues */ | ||
| 230 | spinlock_t condlock; /* lock when changing/checking if a context is | ||
| 231 | ready to be processed */ | ||
| 232 | struct mutex mfc_mutex; /* video_device lock */ | ||
| 233 | int int_cond; | ||
| 234 | int int_type; | ||
| 235 | unsigned int int_err; | ||
| 236 | wait_queue_head_t queue; | ||
| 237 | size_t fw_size; | ||
| 238 | size_t bank1; | ||
| 239 | size_t bank2; | ||
| 240 | unsigned long hw_lock; | ||
| 241 | struct s5p_mfc_ctx *ctx[MFC_NUM_CONTEXTS]; | ||
| 242 | int curr_ctx; | ||
| 243 | unsigned long ctx_work_bits; | ||
| 244 | atomic_t watchdog_cnt; | ||
| 245 | struct timer_list watchdog_timer; | ||
| 246 | struct workqueue_struct *watchdog_workqueue; | ||
| 247 | struct work_struct watchdog_work; | ||
| 248 | void *alloc_ctx[2]; | ||
| 249 | unsigned long enter_suspend; | ||
| 250 | }; | ||
| 251 | |||
| 252 | /** | ||
| 253 | * struct s5p_mfc_h264_enc_params - encoding parameters for h264 | ||
| 254 | */ | ||
| 255 | struct s5p_mfc_h264_enc_params { | ||
| 256 | enum v4l2_mpeg_video_h264_profile profile; | ||
| 257 | enum v4l2_mpeg_video_h264_loop_filter_mode loop_filter_mode; | ||
| 258 | s8 loop_filter_alpha; | ||
| 259 | s8 loop_filter_beta; | ||
| 260 | enum v4l2_mpeg_video_h264_entropy_mode entropy_mode; | ||
| 261 | u8 max_ref_pic; | ||
| 262 | u8 num_ref_pic_4p; | ||
| 263 | int _8x8_transform; | ||
| 264 | int rc_mb; | ||
| 265 | int rc_mb_dark; | ||
| 266 | int rc_mb_smooth; | ||
| 267 | int rc_mb_static; | ||
| 268 | int rc_mb_activity; | ||
| 269 | int vui_sar; | ||
| 270 | u8 vui_sar_idc; | ||
| 271 | u16 vui_ext_sar_width; | ||
| 272 | u16 vui_ext_sar_height; | ||
| 273 | int open_gop; | ||
| 274 | u16 open_gop_size; | ||
| 275 | u8 rc_frame_qp; | ||
| 276 | u8 rc_min_qp; | ||
| 277 | u8 rc_max_qp; | ||
| 278 | u8 rc_p_frame_qp; | ||
| 279 | u8 rc_b_frame_qp; | ||
| 280 | enum v4l2_mpeg_video_h264_level level_v4l2; | ||
| 281 | int level; | ||
| 282 | u16 cpb_size; | ||
| 283 | }; | ||
| 284 | |||
| 285 | /** | ||
| 286 | * struct s5p_mfc_mpeg4_enc_params - encoding parameters for h263 and mpeg4 | ||
| 287 | */ | ||
| 288 | struct s5p_mfc_mpeg4_enc_params { | ||
| 289 | /* MPEG4 Only */ | ||
| 290 | enum v4l2_mpeg_video_mpeg4_profile profile; | ||
| 291 | int quarter_pixel; | ||
| 292 | /* Common for MPEG4, H263 */ | ||
| 293 | u16 vop_time_res; | ||
| 294 | u16 vop_frm_delta; | ||
| 295 | u8 rc_frame_qp; | ||
| 296 | u8 rc_min_qp; | ||
| 297 | u8 rc_max_qp; | ||
| 298 | u8 rc_p_frame_qp; | ||
| 299 | u8 rc_b_frame_qp; | ||
| 300 | enum v4l2_mpeg_video_mpeg4_level level_v4l2; | ||
| 301 | int level; | ||
| 302 | }; | ||
| 303 | |||
| 304 | /** | ||
| 305 | * struct s5p_mfc_enc_params - general encoding parameters | ||
| 306 | */ | ||
| 307 | struct s5p_mfc_enc_params { | ||
| 308 | u16 width; | ||
| 309 | u16 height; | ||
| 310 | |||
| 311 | u16 gop_size; | ||
| 312 | enum v4l2_mpeg_video_multi_slice_mode slice_mode; | ||
| 313 | u16 slice_mb; | ||
| 314 | u32 slice_bit; | ||
| 315 | u16 intra_refresh_mb; | ||
| 316 | int pad; | ||
| 317 | u8 pad_luma; | ||
| 318 | u8 pad_cb; | ||
| 319 | u8 pad_cr; | ||
| 320 | int rc_frame; | ||
| 321 | u32 rc_bitrate; | ||
| 322 | u16 rc_reaction_coeff; | ||
| 323 | u16 vbv_size; | ||
| 324 | |||
| 325 | enum v4l2_mpeg_video_header_mode seq_hdr_mode; | ||
| 326 | enum v4l2_mpeg_mfc51_video_frame_skip_mode frame_skip_mode; | ||
| 327 | int fixed_target_bit; | ||
| 328 | |||
| 329 | u8 num_b_frame; | ||
| 330 | u32 rc_framerate_num; | ||
| 331 | u32 rc_framerate_denom; | ||
| 332 | int interlace; | ||
| 333 | |||
| 334 | union { | ||
| 335 | struct s5p_mfc_h264_enc_params h264; | ||
| 336 | struct s5p_mfc_mpeg4_enc_params mpeg4; | ||
| 337 | } codec; | ||
| 338 | |||
| 339 | }; | ||
| 340 | |||
| 341 | /** | ||
| 342 | * struct s5p_mfc_codec_ops - codec ops, used by encoding | ||
| 343 | */ | ||
| 344 | struct s5p_mfc_codec_ops { | ||
| 345 | /* initialization routines */ | ||
| 346 | int (*pre_seq_start) (struct s5p_mfc_ctx *ctx); | ||
| 347 | int (*post_seq_start) (struct s5p_mfc_ctx *ctx); | ||
| 348 | /* execution routines */ | ||
| 349 | int (*pre_frame_start) (struct s5p_mfc_ctx *ctx); | ||
| 350 | int (*post_frame_start) (struct s5p_mfc_ctx *ctx); | ||
| 351 | }; | ||
| 352 | |||
| 353 | #define call_cop(c, op, args...) \ | ||
| 354 | (((c)->c_ops->op) ? \ | ||
| 355 | ((c)->c_ops->op(args)) : 0) | ||
| 356 | |||
| 357 | /** | ||
| 358 | * struct s5p_mfc_ctx - This struct contains the instance context | ||
| 359 | * | ||
| 360 | * @dev: pointer to the s5p_mfc_dev of the device | ||
| 361 | * @fh: struct v4l2_fh | ||
| 362 | * @num: number of the context that this structure describes | ||
| 363 | * @int_cond: variable used by the waitqueue | ||
| 364 | * @int_type: type of the last interrupt | ||
| 365 | * @int_err: error number received from MFC hw in the interrupt | ||
| 366 | * @queue: waitqueue that can be used to wait for this context to | ||
| 367 | * finish | ||
| 368 | * @src_fmt: source pixelformat information | ||
| 369 | * @dst_fmt: destination pixelformat information | ||
| 370 | * @vq_src: vb2 queue for source buffers | ||
| 371 | * @vq_dst: vb2 queue for destination buffers | ||
| 372 | * @src_queue: driver internal queue for source buffers | ||
| 373 | * @dst_queue: driver internal queue for destination buffers | ||
| 374 | * @src_queue_cnt: number of buffers queued on the source internal queue | ||
| 375 | * @dst_queue_cnt: number of buffers queued on the dest internal queue | ||
| 376 | * @type: type of the instance - decoder or encoder | ||
| 377 | * @state: state of the context | ||
| 378 | * @inst_no: number of hw instance associated with the context | ||
| 379 | * @img_width: width of the image that is decoded or encoded | ||
| 380 | * @img_height: height of the image that is decoded or encoded | ||
| 381 | * @buf_width: width of the buffer for processed image | ||
| 382 | * @buf_height: height of the buffer for processed image | ||
| 383 | * @luma_size: size of a luma plane | ||
| 384 | * @chroma_size: size of a chroma plane | ||
| 385 | * @mv_size: size of a motion vectors buffer | ||
| 386 | * @consumed_stream: number of bytes that have been used so far from the | ||
| 387 | * decoding buffer | ||
| 388 | * @dpb_flush_flag: flag used to indicate that a DPB buffers are being | ||
| 389 | * flushed | ||
| 390 | * @bank1_buf: handle to memory allocated for temporary buffers from | ||
| 391 | * memory bank 1 | ||
| 392 | * @bank1_phys: address of the temporary buffers from memory bank 1 | ||
| 393 | * @bank1_size: size of the memory allocated for temporary buffers from | ||
| 394 | * memory bank 1 | ||
| 395 | * @bank2_buf: handle to memory allocated for temporary buffers from | ||
| 396 | * memory bank 2 | ||
| 397 | * @bank2_phys: address of the temporary buffers from memory bank 2 | ||
| 398 | * @bank2_size: size of the memory allocated for temporary buffers from | ||
| 399 | * memory bank 2 | ||
| 400 | * @capture_state: state of the capture buffers queue | ||
| 401 | * @output_state: state of the output buffers queue | ||
| 402 | * @src_bufs: information on allocated source buffers | ||
| 403 | * @dst_bufs: information on allocated destination buffers | ||
| 404 | * @sequence: counter for the sequence number for v4l2 | ||
| 405 | * @dec_dst_flag: flags for buffers queued in the hardware | ||
| 406 | * @dec_src_buf_size: size of the buffer for source buffers in decoding | ||
| 407 | * @codec_mode: number of codec mode used by MFC hw | ||
| 408 | * @slice_interface: slice interface flag | ||
| 409 | * @loop_filter_mpeg4: loop filter for MPEG4 flag | ||
| 410 | * @display_delay: value of the display delay for H264 | ||
| 411 | * @display_delay_enable: display delay for H264 enable flag | ||
| 412 | * @after_packed_pb: flag used to track buffer when stream is in | ||
| 413 | * Packed PB format | ||
| 414 | * @dpb_count: count of the DPB buffers required by MFC hw | ||
| 415 | * @total_dpb_count: count of DPB buffers with additional buffers | ||
| 416 | * requested by the application | ||
| 417 | * @ctx_buf: handle to the memory associated with this context | ||
| 418 | * @ctx_phys: address of the memory associated with this context | ||
| 419 | * @ctx_size: size of the memory associated with this context | ||
| 420 | * @desc_buf: description buffer for decoding handle | ||
| 421 | * @desc_phys: description buffer for decoding address | ||
| 422 | * @shm_alloc: handle for the shared memory buffer | ||
| 423 | * @shm: virtual address for the shared memory buffer | ||
| 424 | * @shm_ofs: address offset for shared memory | ||
| 425 | * @enc_params: encoding parameters for MFC | ||
| 426 | * @enc_dst_buf_size: size of the buffers for encoder output | ||
| 427 | * @frame_type: used to force the type of the next encoded frame | ||
| 428 | * @ref_queue: list of the reference buffers for encoding | ||
| 429 | * @ref_queue_cnt: number of the buffers in the reference list | ||
| 430 | * @c_ops: ops for encoding | ||
| 431 | * @ctrls: array of controls, used when adding controls to the | ||
| 432 | * v4l2 control framework | ||
| 433 | * @ctrl_handler: handler for v4l2 framework | ||
| 434 | */ | ||
| 435 | struct s5p_mfc_ctx { | ||
| 436 | struct s5p_mfc_dev *dev; | ||
| 437 | struct v4l2_fh fh; | ||
| 438 | |||
| 439 | int num; | ||
| 440 | |||
| 441 | int int_cond; | ||
| 442 | int int_type; | ||
| 443 | unsigned int int_err; | ||
| 444 | wait_queue_head_t queue; | ||
| 445 | |||
| 446 | struct s5p_mfc_fmt *src_fmt; | ||
| 447 | struct s5p_mfc_fmt *dst_fmt; | ||
| 448 | |||
| 449 | struct vb2_queue vq_src; | ||
| 450 | struct vb2_queue vq_dst; | ||
| 451 | |||
| 452 | struct list_head src_queue; | ||
| 453 | struct list_head dst_queue; | ||
| 454 | |||
| 455 | unsigned int src_queue_cnt; | ||
| 456 | unsigned int dst_queue_cnt; | ||
| 457 | |||
| 458 | enum s5p_mfc_inst_type type; | ||
| 459 | enum s5p_mfc_inst_state state; | ||
| 460 | int inst_no; | ||
| 461 | |||
| 462 | /* Image parameters */ | ||
| 463 | int img_width; | ||
| 464 | int img_height; | ||
| 465 | int buf_width; | ||
| 466 | int buf_height; | ||
| 467 | |||
| 468 | int luma_size; | ||
| 469 | int chroma_size; | ||
| 470 | int mv_size; | ||
| 471 | |||
| 472 | unsigned long consumed_stream; | ||
| 473 | |||
| 474 | unsigned int dpb_flush_flag; | ||
| 475 | |||
| 476 | /* Buffers */ | ||
| 477 | void *bank1_buf; | ||
| 478 | size_t bank1_phys; | ||
| 479 | size_t bank1_size; | ||
| 480 | |||
| 481 | void *bank2_buf; | ||
| 482 | size_t bank2_phys; | ||
| 483 | size_t bank2_size; | ||
| 484 | |||
| 485 | enum s5p_mfc_queue_state capture_state; | ||
| 486 | enum s5p_mfc_queue_state output_state; | ||
| 487 | |||
| 488 | struct s5p_mfc_buf src_bufs[MFC_MAX_BUFFERS]; | ||
| 489 | int src_bufs_cnt; | ||
| 490 | struct s5p_mfc_buf dst_bufs[MFC_MAX_BUFFERS]; | ||
| 491 | int dst_bufs_cnt; | ||
| 492 | |||
| 493 | unsigned int sequence; | ||
| 494 | unsigned long dec_dst_flag; | ||
| 495 | size_t dec_src_buf_size; | ||
| 496 | |||
| 497 | /* Control values */ | ||
| 498 | int codec_mode; | ||
| 499 | int slice_interface; | ||
| 500 | int loop_filter_mpeg4; | ||
| 501 | int display_delay; | ||
| 502 | int display_delay_enable; | ||
| 503 | int after_packed_pb; | ||
| 504 | |||
| 505 | int dpb_count; | ||
| 506 | int total_dpb_count; | ||
| 507 | |||
| 508 | /* Buffers */ | ||
| 509 | void *ctx_buf; | ||
| 510 | size_t ctx_phys; | ||
| 511 | size_t ctx_ofs; | ||
| 512 | size_t ctx_size; | ||
| 513 | |||
| 514 | void *desc_buf; | ||
| 515 | size_t desc_phys; | ||
| 516 | |||
| 517 | |||
| 518 | void *shm_alloc; | ||
| 519 | void *shm; | ||
| 520 | size_t shm_ofs; | ||
| 521 | |||
| 522 | struct s5p_mfc_enc_params enc_params; | ||
| 523 | |||
| 524 | size_t enc_dst_buf_size; | ||
| 525 | |||
| 526 | enum v4l2_mpeg_mfc51_video_force_frame_type force_frame_type; | ||
| 527 | |||
| 528 | struct list_head ref_queue; | ||
| 529 | unsigned int ref_queue_cnt; | ||
| 530 | |||
| 531 | struct s5p_mfc_codec_ops *c_ops; | ||
| 532 | |||
| 533 | struct v4l2_ctrl *ctrls[MFC_MAX_CTRLS]; | ||
| 534 | struct v4l2_ctrl_handler ctrl_handler; | ||
| 535 | }; | ||
| 536 | |||
| 537 | /* | ||
| 538 | * struct s5p_mfc_fmt - structure used to store information about pixelformats | ||
| 539 | * used by the MFC | ||
| 540 | */ | ||
| 541 | struct s5p_mfc_fmt { | ||
| 542 | char *name; | ||
| 543 | u32 fourcc; | ||
| 544 | u32 codec_mode; | ||
| 545 | enum s5p_mfc_fmt_type type; | ||
| 546 | u32 num_planes; | ||
| 547 | }; | ||
| 548 | |||
| 549 | /** | ||
| 550 | * struct mfc_control - structure used to store information about MFC controls | ||
| 551 | * it is used to initialize the control framework. | ||
| 552 | */ | ||
| 553 | struct mfc_control { | ||
| 554 | __u32 id; | ||
| 555 | enum v4l2_ctrl_type type; | ||
| 556 | __u8 name[32]; /* Whatever */ | ||
| 557 | __s32 minimum; /* Note signedness */ | ||
| 558 | __s32 maximum; | ||
| 559 | __s32 step; | ||
| 560 | __u32 menu_skip_mask; | ||
| 561 | __s32 default_value; | ||
| 562 | __u32 flags; | ||
| 563 | __u32 reserved[2]; | ||
| 564 | __u8 is_volatile; | ||
| 565 | }; | ||
| 566 | |||
| 567 | |||
| 568 | #define fh_to_ctx(__fh) container_of(__fh, struct s5p_mfc_ctx, fh) | ||
| 569 | #define ctrl_to_ctx(__ctrl) \ | ||
| 570 | container_of((__ctrl)->handler, struct s5p_mfc_ctx, ctrl_handler) | ||
| 571 | |||
| 572 | #endif /* S5P_MFC_COMMON_H_ */ | ||
diff --git a/drivers/media/video/s5p-mfc/s5p_mfc_ctrl.c b/drivers/media/video/s5p-mfc/s5p_mfc_ctrl.c new file mode 100644 index 000000000000..5f4da80051bb --- /dev/null +++ b/drivers/media/video/s5p-mfc/s5p_mfc_ctrl.c | |||
| @@ -0,0 +1,343 @@ | |||
| 1 | /* | ||
| 2 | * linux/drivers/media/video/s5p-mfc/s5p_mfc_ctrl.c | ||
| 3 | * | ||
| 4 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
| 5 | * http://www.samsung.com/ | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License as published by | ||
| 9 | * the Free Software Foundation; either version 2 of the License, or | ||
| 10 | * (at your option) any later version. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/delay.h> | ||
| 14 | #include <linux/err.h> | ||
| 15 | #include <linux/firmware.h> | ||
| 16 | #include <linux/jiffies.h> | ||
| 17 | #include <linux/sched.h> | ||
| 18 | #include "regs-mfc.h" | ||
| 19 | #include "s5p_mfc_cmd.h" | ||
| 20 | #include "s5p_mfc_common.h" | ||
| 21 | #include "s5p_mfc_debug.h" | ||
| 22 | #include "s5p_mfc_intr.h" | ||
| 23 | #include "s5p_mfc_pm.h" | ||
| 24 | |||
| 25 | static void *s5p_mfc_bitproc_buf; | ||
| 26 | static size_t s5p_mfc_bitproc_phys; | ||
| 27 | static unsigned char *s5p_mfc_bitproc_virt; | ||
| 28 | |||
| 29 | /* Allocate and load firmware */ | ||
| 30 | int s5p_mfc_alloc_and_load_firmware(struct s5p_mfc_dev *dev) | ||
| 31 | { | ||
| 32 | struct firmware *fw_blob; | ||
| 33 | size_t bank2_base_phys; | ||
| 34 | void *b_base; | ||
| 35 | int err; | ||
| 36 | |||
| 37 | /* Firmare has to be present as a separate file or compiled | ||
| 38 | * into kernel. */ | ||
| 39 | mfc_debug_enter(); | ||
| 40 | err = request_firmware((const struct firmware **)&fw_blob, | ||
| 41 | "s5pc110-mfc.fw", dev->v4l2_dev.dev); | ||
| 42 | if (err != 0) { | ||
| 43 | mfc_err("Firmware is not present in the /lib/firmware directory nor compiled in kernel\n"); | ||
| 44 | return -EINVAL; | ||
| 45 | } | ||
| 46 | dev->fw_size = ALIGN(fw_blob->size, FIRMWARE_ALIGN); | ||
| 47 | if (s5p_mfc_bitproc_buf) { | ||
| 48 | mfc_err("Attempting to allocate firmware when it seems that it is already loaded\n"); | ||
| 49 | release_firmware(fw_blob); | ||
| 50 | return -ENOMEM; | ||
| 51 | } | ||
| 52 | s5p_mfc_bitproc_buf = vb2_dma_contig_memops.alloc( | ||
| 53 | dev->alloc_ctx[MFC_BANK1_ALLOC_CTX], dev->fw_size); | ||
| 54 | if (IS_ERR(s5p_mfc_bitproc_buf)) { | ||
| 55 | s5p_mfc_bitproc_buf = 0; | ||
| 56 | mfc_err("Allocating bitprocessor buffer failed\n"); | ||
| 57 | release_firmware(fw_blob); | ||
| 58 | return -ENOMEM; | ||
| 59 | } | ||
| 60 | s5p_mfc_bitproc_phys = s5p_mfc_mem_cookie( | ||
| 61 | dev->alloc_ctx[MFC_BANK1_ALLOC_CTX], s5p_mfc_bitproc_buf); | ||
| 62 | if (s5p_mfc_bitproc_phys & ((1 << MFC_BASE_ALIGN_ORDER) - 1)) { | ||
| 63 | mfc_err("The base memory for bank 1 is not aligned to 128KB\n"); | ||
| 64 | vb2_dma_contig_memops.put(s5p_mfc_bitproc_buf); | ||
| 65 | s5p_mfc_bitproc_phys = 0; | ||
| 66 | s5p_mfc_bitproc_buf = 0; | ||
| 67 | release_firmware(fw_blob); | ||
| 68 | return -EIO; | ||
| 69 | } | ||
| 70 | s5p_mfc_bitproc_virt = vb2_dma_contig_memops.vaddr(s5p_mfc_bitproc_buf); | ||
| 71 | if (!s5p_mfc_bitproc_virt) { | ||
| 72 | mfc_err("Bitprocessor memory remap failed\n"); | ||
| 73 | vb2_dma_contig_memops.put(s5p_mfc_bitproc_buf); | ||
| 74 | s5p_mfc_bitproc_phys = 0; | ||
| 75 | s5p_mfc_bitproc_buf = 0; | ||
| 76 | release_firmware(fw_blob); | ||
| 77 | return -EIO; | ||
| 78 | } | ||
| 79 | dev->bank1 = s5p_mfc_bitproc_phys; | ||
| 80 | b_base = vb2_dma_contig_memops.alloc( | ||
| 81 | dev->alloc_ctx[MFC_BANK2_ALLOC_CTX], 1 << MFC_BANK2_ALIGN_ORDER); | ||
| 82 | if (IS_ERR(b_base)) { | ||
| 83 | vb2_dma_contig_memops.put(s5p_mfc_bitproc_buf); | ||
| 84 | s5p_mfc_bitproc_phys = 0; | ||
| 85 | s5p_mfc_bitproc_buf = 0; | ||
| 86 | mfc_err("Allocating bank2 base failed\n"); | ||
| 87 | release_firmware(fw_blob); | ||
| 88 | return -ENOMEM; | ||
| 89 | } | ||
| 90 | bank2_base_phys = s5p_mfc_mem_cookie( | ||
| 91 | dev->alloc_ctx[MFC_BANK2_ALLOC_CTX], b_base); | ||
| 92 | vb2_dma_contig_memops.put(b_base); | ||
| 93 | if (bank2_base_phys & ((1 << MFC_BASE_ALIGN_ORDER) - 1)) { | ||
| 94 | mfc_err("The base memory for bank 2 is not aligned to 128KB\n"); | ||
| 95 | vb2_dma_contig_memops.put(s5p_mfc_bitproc_buf); | ||
| 96 | s5p_mfc_bitproc_phys = 0; | ||
| 97 | s5p_mfc_bitproc_buf = 0; | ||
| 98 | release_firmware(fw_blob); | ||
| 99 | return -EIO; | ||
| 100 | } | ||
| 101 | dev->bank2 = bank2_base_phys; | ||
| 102 | memcpy(s5p_mfc_bitproc_virt, fw_blob->data, fw_blob->size); | ||
| 103 | wmb(); | ||
| 104 | release_firmware(fw_blob); | ||
| 105 | mfc_debug_leave(); | ||
| 106 | return 0; | ||
| 107 | } | ||
| 108 | |||
| 109 | /* Reload firmware to MFC */ | ||
| 110 | int s5p_mfc_reload_firmware(struct s5p_mfc_dev *dev) | ||
| 111 | { | ||
| 112 | struct firmware *fw_blob; | ||
| 113 | int err; | ||
| 114 | |||
| 115 | /* Firmare has to be present as a separate file or compiled | ||
| 116 | * into kernel. */ | ||
| 117 | mfc_debug_enter(); | ||
| 118 | err = request_firmware((const struct firmware **)&fw_blob, | ||
| 119 | "s5pc110-mfc.fw", dev->v4l2_dev.dev); | ||
| 120 | if (err != 0) { | ||
| 121 | mfc_err("Firmware is not present in the /lib/firmware directory nor compiled in kernel\n"); | ||
| 122 | return -EINVAL; | ||
| 123 | } | ||
| 124 | if (fw_blob->size > dev->fw_size) { | ||
| 125 | mfc_err("MFC firmware is too big to be loaded\n"); | ||
| 126 | release_firmware(fw_blob); | ||
| 127 | return -ENOMEM; | ||
| 128 | } | ||
| 129 | if (s5p_mfc_bitproc_buf == 0 || s5p_mfc_bitproc_phys == 0) { | ||
| 130 | mfc_err("MFC firmware is not allocated or was not mapped correctly\n"); | ||
| 131 | release_firmware(fw_blob); | ||
| 132 | return -EINVAL; | ||
| 133 | } | ||
| 134 | memcpy(s5p_mfc_bitproc_virt, fw_blob->data, fw_blob->size); | ||
| 135 | wmb(); | ||
| 136 | release_firmware(fw_blob); | ||
| 137 | mfc_debug_leave(); | ||
| 138 | return 0; | ||
| 139 | } | ||
| 140 | |||
| 141 | /* Release firmware memory */ | ||
| 142 | int s5p_mfc_release_firmware(struct s5p_mfc_dev *dev) | ||
| 143 | { | ||
| 144 | /* Before calling this function one has to make sure | ||
| 145 | * that MFC is no longer processing */ | ||
| 146 | if (!s5p_mfc_bitproc_buf) | ||
| 147 | return -EINVAL; | ||
| 148 | vb2_dma_contig_memops.put(s5p_mfc_bitproc_buf); | ||
| 149 | s5p_mfc_bitproc_virt = 0; | ||
| 150 | s5p_mfc_bitproc_phys = 0; | ||
| 151 | s5p_mfc_bitproc_buf = 0; | ||
| 152 | return 0; | ||
| 153 | } | ||
| 154 | |||
| 155 | /* Reset the device */ | ||
| 156 | int s5p_mfc_reset(struct s5p_mfc_dev *dev) | ||
| 157 | { | ||
| 158 | unsigned int mc_status; | ||
| 159 | unsigned long timeout; | ||
| 160 | |||
| 161 | mfc_debug_enter(); | ||
| 162 | /* Stop procedure */ | ||
| 163 | /* reset RISC */ | ||
| 164 | mfc_write(dev, 0x3f6, S5P_FIMV_SW_RESET); | ||
| 165 | /* All reset except for MC */ | ||
| 166 | mfc_write(dev, 0x3e2, S5P_FIMV_SW_RESET); | ||
| 167 | mdelay(10); | ||
| 168 | |||
| 169 | timeout = jiffies + msecs_to_jiffies(MFC_BW_TIMEOUT); | ||
| 170 | /* Check MC status */ | ||
| 171 | do { | ||
| 172 | if (time_after(jiffies, timeout)) { | ||
| 173 | mfc_err("Timeout while resetting MFC\n"); | ||
| 174 | return -EIO; | ||
| 175 | } | ||
| 176 | |||
| 177 | mc_status = mfc_read(dev, S5P_FIMV_MC_STATUS); | ||
| 178 | |||
| 179 | } while (mc_status & 0x3); | ||
| 180 | |||
| 181 | mfc_write(dev, 0x0, S5P_FIMV_SW_RESET); | ||
| 182 | mfc_write(dev, 0x3fe, S5P_FIMV_SW_RESET); | ||
| 183 | mfc_debug_leave(); | ||
| 184 | return 0; | ||
| 185 | } | ||
| 186 | |||
| 187 | static inline void s5p_mfc_init_memctrl(struct s5p_mfc_dev *dev) | ||
| 188 | { | ||
| 189 | mfc_write(dev, dev->bank1, S5P_FIMV_MC_DRAMBASE_ADR_A); | ||
| 190 | mfc_write(dev, dev->bank2, S5P_FIMV_MC_DRAMBASE_ADR_B); | ||
| 191 | mfc_debug(2, "Bank1: %08x, Bank2: %08x\n", dev->bank1, dev->bank2); | ||
| 192 | } | ||
| 193 | |||
| 194 | static inline void s5p_mfc_clear_cmds(struct s5p_mfc_dev *dev) | ||
| 195 | { | ||
| 196 | mfc_write(dev, 0xffffffff, S5P_FIMV_SI_CH0_INST_ID); | ||
| 197 | mfc_write(dev, 0xffffffff, S5P_FIMV_SI_CH1_INST_ID); | ||
| 198 | mfc_write(dev, 0, S5P_FIMV_RISC2HOST_CMD); | ||
| 199 | mfc_write(dev, 0, S5P_FIMV_HOST2RISC_CMD); | ||
| 200 | } | ||
| 201 | |||
| 202 | /* Initialize hardware */ | ||
| 203 | int s5p_mfc_init_hw(struct s5p_mfc_dev *dev) | ||
| 204 | { | ||
| 205 | unsigned int ver; | ||
| 206 | int ret; | ||
| 207 | |||
| 208 | mfc_debug_enter(); | ||
| 209 | if (!s5p_mfc_bitproc_buf) | ||
| 210 | return -EINVAL; | ||
| 211 | |||
| 212 | /* 0. MFC reset */ | ||
| 213 | mfc_debug(2, "MFC reset..\n"); | ||
| 214 | s5p_mfc_clock_on(); | ||
| 215 | ret = s5p_mfc_reset(dev); | ||
| 216 | if (ret) { | ||
| 217 | mfc_err("Failed to reset MFC - timeout\n"); | ||
| 218 | return ret; | ||
| 219 | } | ||
| 220 | mfc_debug(2, "Done MFC reset..\n"); | ||
| 221 | /* 1. Set DRAM base Addr */ | ||
| 222 | s5p_mfc_init_memctrl(dev); | ||
| 223 | /* 2. Initialize registers of channel I/F */ | ||
| 224 | s5p_mfc_clear_cmds(dev); | ||
| 225 | /* 3. Release reset signal to the RISC */ | ||
| 226 | s5p_mfc_clean_dev_int_flags(dev); | ||
| 227 | mfc_write(dev, 0x3ff, S5P_FIMV_SW_RESET); | ||
| 228 | mfc_debug(2, "Will now wait for completion of firmware transfer\n"); | ||
| 229 | if (s5p_mfc_wait_for_done_dev(dev, S5P_FIMV_R2H_CMD_FW_STATUS_RET)) { | ||
| 230 | mfc_err("Failed to load firmware\n"); | ||
| 231 | s5p_mfc_reset(dev); | ||
| 232 | s5p_mfc_clock_off(); | ||
| 233 | return -EIO; | ||
| 234 | } | ||
| 235 | s5p_mfc_clean_dev_int_flags(dev); | ||
| 236 | /* 4. Initialize firmware */ | ||
| 237 | ret = s5p_mfc_sys_init_cmd(dev); | ||
| 238 | if (ret) { | ||
| 239 | mfc_err("Failed to send command to MFC - timeout\n"); | ||
| 240 | s5p_mfc_reset(dev); | ||
| 241 | s5p_mfc_clock_off(); | ||
| 242 | return ret; | ||
| 243 | } | ||
| 244 | mfc_debug(2, "Ok, now will write a command to init the system\n"); | ||
| 245 | if (s5p_mfc_wait_for_done_dev(dev, S5P_FIMV_R2H_CMD_SYS_INIT_RET)) { | ||
| 246 | mfc_err("Failed to load firmware\n"); | ||
| 247 | s5p_mfc_reset(dev); | ||
| 248 | s5p_mfc_clock_off(); | ||
| 249 | return -EIO; | ||
| 250 | } | ||
| 251 | dev->int_cond = 0; | ||
| 252 | if (dev->int_err != 0 || dev->int_type != | ||
| 253 | S5P_FIMV_R2H_CMD_SYS_INIT_RET) { | ||
| 254 | /* Failure. */ | ||
| 255 | mfc_err("Failed to init firmware - error: %d int: %d\n", | ||
| 256 | dev->int_err, dev->int_type); | ||
| 257 | s5p_mfc_reset(dev); | ||
| 258 | s5p_mfc_clock_off(); | ||
| 259 | return -EIO; | ||
| 260 | } | ||
| 261 | ver = mfc_read(dev, S5P_FIMV_FW_VERSION); | ||
| 262 | mfc_debug(2, "MFC F/W version : %02xyy, %02xmm, %02xdd\n", | ||
| 263 | (ver >> 16) & 0xFF, (ver >> 8) & 0xFF, ver & 0xFF); | ||
| 264 | s5p_mfc_clock_off(); | ||
| 265 | mfc_debug_leave(); | ||
| 266 | return 0; | ||
| 267 | } | ||
| 268 | |||
| 269 | |||
| 270 | int s5p_mfc_sleep(struct s5p_mfc_dev *dev) | ||
| 271 | { | ||
| 272 | int ret; | ||
| 273 | |||
| 274 | mfc_debug_enter(); | ||
| 275 | s5p_mfc_clock_on(); | ||
| 276 | s5p_mfc_clean_dev_int_flags(dev); | ||
| 277 | ret = s5p_mfc_sleep_cmd(dev); | ||
| 278 | if (ret) { | ||
| 279 | mfc_err("Failed to send command to MFC - timeout\n"); | ||
| 280 | return ret; | ||
| 281 | } | ||
| 282 | if (s5p_mfc_wait_for_done_dev(dev, S5P_FIMV_R2H_CMD_SLEEP_RET)) { | ||
| 283 | mfc_err("Failed to sleep\n"); | ||
| 284 | return -EIO; | ||
| 285 | } | ||
| 286 | s5p_mfc_clock_off(); | ||
| 287 | dev->int_cond = 0; | ||
| 288 | if (dev->int_err != 0 || dev->int_type != | ||
| 289 | S5P_FIMV_R2H_CMD_SLEEP_RET) { | ||
| 290 | /* Failure. */ | ||
| 291 | mfc_err("Failed to sleep - error: %d int: %d\n", dev->int_err, | ||
| 292 | dev->int_type); | ||
| 293 | return -EIO; | ||
| 294 | } | ||
| 295 | mfc_debug_leave(); | ||
| 296 | return ret; | ||
| 297 | } | ||
| 298 | |||
| 299 | int s5p_mfc_wakeup(struct s5p_mfc_dev *dev) | ||
| 300 | { | ||
| 301 | int ret; | ||
| 302 | |||
| 303 | mfc_debug_enter(); | ||
| 304 | /* 0. MFC reset */ | ||
| 305 | mfc_debug(2, "MFC reset..\n"); | ||
| 306 | s5p_mfc_clock_on(); | ||
| 307 | ret = s5p_mfc_reset(dev); | ||
| 308 | if (ret) { | ||
| 309 | mfc_err("Failed to reset MFC - timeout\n"); | ||
| 310 | return ret; | ||
| 311 | } | ||
| 312 | mfc_debug(2, "Done MFC reset..\n"); | ||
| 313 | /* 1. Set DRAM base Addr */ | ||
| 314 | s5p_mfc_init_memctrl(dev); | ||
| 315 | /* 2. Initialize registers of channel I/F */ | ||
| 316 | s5p_mfc_clear_cmds(dev); | ||
| 317 | s5p_mfc_clean_dev_int_flags(dev); | ||
| 318 | /* 3. Initialize firmware */ | ||
| 319 | ret = s5p_mfc_wakeup_cmd(dev); | ||
| 320 | if (ret) { | ||
| 321 | mfc_err("Failed to send command to MFC - timeout\n"); | ||
| 322 | return ret; | ||
| 323 | } | ||
| 324 | /* 4. Release reset signal to the RISC */ | ||
| 325 | mfc_write(dev, 0x3ff, S5P_FIMV_SW_RESET); | ||
| 326 | mfc_debug(2, "Ok, now will write a command to wakeup the system\n"); | ||
| 327 | if (s5p_mfc_wait_for_done_dev(dev, S5P_FIMV_R2H_CMD_WAKEUP_RET)) { | ||
| 328 | mfc_err("Failed to load firmware\n"); | ||
| 329 | return -EIO; | ||
| 330 | } | ||
| 331 | s5p_mfc_clock_off(); | ||
| 332 | dev->int_cond = 0; | ||
| 333 | if (dev->int_err != 0 || dev->int_type != | ||
| 334 | S5P_FIMV_R2H_CMD_WAKEUP_RET) { | ||
| 335 | /* Failure. */ | ||
| 336 | mfc_err("Failed to wakeup - error: %d int: %d\n", dev->int_err, | ||
| 337 | dev->int_type); | ||
| 338 | return -EIO; | ||
| 339 | } | ||
| 340 | mfc_debug_leave(); | ||
| 341 | return 0; | ||
| 342 | } | ||
| 343 | |||
diff --git a/drivers/media/video/s5p-mfc/s5p_mfc_ctrl.h b/drivers/media/video/s5p-mfc/s5p_mfc_ctrl.h new file mode 100644 index 000000000000..61dc23b7ee5a --- /dev/null +++ b/drivers/media/video/s5p-mfc/s5p_mfc_ctrl.h | |||
| @@ -0,0 +1,29 @@ | |||
| 1 | /* | ||
| 2 | * linux/drivers/media/video/s5p-mfc/s5p_mfc_ctrl.h | ||
| 3 | * | ||
| 4 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
| 5 | * http://www.samsung.com/ | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License as published by | ||
| 9 | * the Free Software Foundation; either version 2 of the License, or | ||
| 10 | * (at your option) any later version. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #ifndef S5P_MFC_CTRL_H | ||
| 14 | #define S5P_MFC_CTRL_H | ||
| 15 | |||
| 16 | #include "s5p_mfc_common.h" | ||
| 17 | |||
| 18 | int s5p_mfc_release_firmware(struct s5p_mfc_dev *dev); | ||
| 19 | int s5p_mfc_alloc_and_load_firmware(struct s5p_mfc_dev *dev); | ||
| 20 | int s5p_mfc_reload_firmware(struct s5p_mfc_dev *dev); | ||
| 21 | |||
| 22 | int s5p_mfc_init_hw(struct s5p_mfc_dev *dev); | ||
| 23 | |||
| 24 | int s5p_mfc_sleep(struct s5p_mfc_dev *dev); | ||
| 25 | int s5p_mfc_wakeup(struct s5p_mfc_dev *dev); | ||
| 26 | |||
| 27 | int s5p_mfc_reset(struct s5p_mfc_dev *dev); | ||
| 28 | |||
| 29 | #endif /* S5P_MFC_CTRL_H */ | ||
diff --git a/drivers/media/video/s5p-mfc/s5p_mfc_debug.h b/drivers/media/video/s5p-mfc/s5p_mfc_debug.h new file mode 100644 index 000000000000..ecb8616a492a --- /dev/null +++ b/drivers/media/video/s5p-mfc/s5p_mfc_debug.h | |||
| @@ -0,0 +1,48 @@ | |||
| 1 | /* | ||
| 2 | * drivers/media/video/samsung/mfc5/s5p_mfc_debug.h | ||
| 3 | * | ||
| 4 | * Header file for Samsung MFC (Multi Function Codec - FIMV) driver | ||
| 5 | * This file contains debug macros | ||
| 6 | * | ||
| 7 | * Kamil Debski, Copyright (c) 2011 Samsung Electronics | ||
| 8 | * http://www.samsung.com/ | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #ifndef S5P_MFC_DEBUG_H_ | ||
| 16 | #define S5P_MFC_DEBUG_H_ | ||
| 17 | |||
| 18 | #define DEBUG | ||
| 19 | |||
| 20 | #ifdef DEBUG | ||
| 21 | extern int debug; | ||
| 22 | |||
| 23 | #define mfc_debug(level, fmt, args...) \ | ||
| 24 | do { \ | ||
| 25 | if (debug >= level) \ | ||
| 26 | printk(KERN_DEBUG "%s:%d: " fmt, \ | ||
| 27 | __func__, __LINE__, ##args); \ | ||
| 28 | } while (0) | ||
| 29 | #else | ||
| 30 | #define mfc_debug(level, fmt, args...) | ||
| 31 | #endif | ||
| 32 | |||
| 33 | #define mfc_debug_enter() mfc_debug(5, "enter") | ||
| 34 | #define mfc_debug_leave() mfc_debug(5, "leave") | ||
| 35 | |||
| 36 | #define mfc_err(fmt, args...) \ | ||
| 37 | do { \ | ||
| 38 | printk(KERN_ERR "%s:%d: " fmt, \ | ||
| 39 | __func__, __LINE__, ##args); \ | ||
| 40 | } while (0) | ||
| 41 | |||
| 42 | #define mfc_info(fmt, args...) \ | ||
| 43 | do { \ | ||
| 44 | printk(KERN_INFO "%s:%d: " fmt, \ | ||
| 45 | __func__, __LINE__, ##args); \ | ||
| 46 | } while (0) | ||
| 47 | |||
| 48 | #endif /* S5P_MFC_DEBUG_H_ */ | ||
diff --git a/drivers/media/video/s5p-mfc/s5p_mfc_dec.c b/drivers/media/video/s5p-mfc/s5p_mfc_dec.c new file mode 100644 index 000000000000..b2c5052a9c41 --- /dev/null +++ b/drivers/media/video/s5p-mfc/s5p_mfc_dec.c | |||
| @@ -0,0 +1,1036 @@ | |||
| 1 | /* | ||
| 2 | * linux/drivers/media/video/s5p-mfc/s5p_mfc_dec.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 2011 Samsung Electronics Co., Ltd. | ||
| 5 | * http://www.samsung.com/ | ||
| 6 | * Kamil Debski, <k.debski@samsung.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License as published by | ||
| 10 | * the Free Software Foundation; either version 2 of the License, or | ||
| 11 | * (at your option) any later version. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <linux/clk.h> | ||
| 15 | #include <linux/interrupt.h> | ||
| 16 | #include <linux/io.h> | ||
| 17 | #include <linux/module.h> | ||
| 18 | #include <linux/platform_device.h> | ||
| 19 | #include <linux/sched.h> | ||
| 20 | #include <linux/slab.h> | ||
| 21 | #include <linux/version.h> | ||
| 22 | #include <linux/videodev2.h> | ||
| 23 | #include <linux/workqueue.h> | ||
| 24 | #include <media/v4l2-ctrls.h> | ||
| 25 | #include <media/videobuf2-core.h> | ||
| 26 | #include "regs-mfc.h" | ||
| 27 | #include "s5p_mfc_common.h" | ||
| 28 | #include "s5p_mfc_debug.h" | ||
| 29 | #include "s5p_mfc_dec.h" | ||
| 30 | #include "s5p_mfc_intr.h" | ||
| 31 | #include "s5p_mfc_opr.h" | ||
| 32 | #include "s5p_mfc_pm.h" | ||
| 33 | #include "s5p_mfc_shm.h" | ||
| 34 | |||
| 35 | static struct s5p_mfc_fmt formats[] = { | ||
| 36 | { | ||
| 37 | .name = "4:2:0 2 Planes 64x32 Tiles", | ||
| 38 | .fourcc = V4L2_PIX_FMT_NV12MT, | ||
| 39 | .codec_mode = S5P_FIMV_CODEC_NONE, | ||
| 40 | .type = MFC_FMT_RAW, | ||
| 41 | .num_planes = 2, | ||
| 42 | }, | ||
| 43 | { | ||
| 44 | .name = "4:2:0 2 Planes", | ||
| 45 | .fourcc = V4L2_PIX_FMT_NV12M, | ||
| 46 | .codec_mode = S5P_FIMV_CODEC_NONE, | ||
| 47 | .type = MFC_FMT_RAW, | ||
| 48 | .num_planes = 2, | ||
| 49 | }, | ||
| 50 | { | ||
| 51 | .name = "H264 Encoded Stream", | ||
| 52 | .fourcc = V4L2_PIX_FMT_H264, | ||
| 53 | .codec_mode = S5P_FIMV_CODEC_H264_DEC, | ||
| 54 | .type = MFC_FMT_DEC, | ||
| 55 | .num_planes = 1, | ||
| 56 | }, | ||
| 57 | { | ||
| 58 | .name = "H263 Encoded Stream", | ||
| 59 | .fourcc = V4L2_PIX_FMT_H263, | ||
| 60 | .codec_mode = S5P_FIMV_CODEC_H263_DEC, | ||
| 61 | .type = MFC_FMT_DEC, | ||
| 62 | .num_planes = 1, | ||
| 63 | }, | ||
| 64 | { | ||
| 65 | .name = "MPEG1 Encoded Stream", | ||
| 66 | .fourcc = V4L2_PIX_FMT_MPEG1, | ||
| 67 | .codec_mode = S5P_FIMV_CODEC_MPEG2_DEC, | ||
| 68 | .type = MFC_FMT_DEC, | ||
| 69 | .num_planes = 1, | ||
| 70 | }, | ||
| 71 | { | ||
| 72 | .name = "MPEG2 Encoded Stream", | ||
| 73 | .fourcc = V4L2_PIX_FMT_MPEG2, | ||
| 74 | .codec_mode = S5P_FIMV_CODEC_MPEG2_DEC, | ||
| 75 | .type = MFC_FMT_DEC, | ||
| 76 | .num_planes = 1, | ||
| 77 | }, | ||
| 78 | { | ||
| 79 | .name = "MPEG4 Encoded Stream", | ||
| 80 | .fourcc = V4L2_PIX_FMT_MPEG4, | ||
| 81 | .codec_mode = S5P_FIMV_CODEC_MPEG4_DEC, | ||
| 82 | .type = MFC_FMT_DEC, | ||
| 83 | .num_planes = 1, | ||
| 84 | }, | ||
| 85 | { | ||
| 86 | .name = "XviD Encoded Stream", | ||
| 87 | .fourcc = V4L2_PIX_FMT_XVID, | ||
| 88 | .codec_mode = S5P_FIMV_CODEC_MPEG4_DEC, | ||
| 89 | .type = MFC_FMT_DEC, | ||
| 90 | .num_planes = 1, | ||
| 91 | }, | ||
| 92 | { | ||
| 93 | .name = "VC1 Encoded Stream", | ||
| 94 | .fourcc = V4L2_PIX_FMT_VC1_ANNEX_G, | ||
| 95 | .codec_mode = S5P_FIMV_CODEC_VC1_DEC, | ||
| 96 | .type = MFC_FMT_DEC, | ||
| 97 | .num_planes = 1, | ||
| 98 | }, | ||
| 99 | { | ||
| 100 | .name = "VC1 RCV Encoded Stream", | ||
| 101 | .fourcc = V4L2_PIX_FMT_VC1_ANNEX_L, | ||
| 102 | .codec_mode = S5P_FIMV_CODEC_VC1RCV_DEC, | ||
| 103 | .type = MFC_FMT_DEC, | ||
| 104 | .num_planes = 1, | ||
| 105 | }, | ||
| 106 | }; | ||
| 107 | |||
| 108 | #define NUM_FORMATS ARRAY_SIZE(formats) | ||
| 109 | |||
| 110 | /* Find selected format description */ | ||
| 111 | static struct s5p_mfc_fmt *find_format(struct v4l2_format *f, unsigned int t) | ||
| 112 | { | ||
| 113 | unsigned int i; | ||
| 114 | |||
| 115 | for (i = 0; i < NUM_FORMATS; i++) { | ||
| 116 | if (formats[i].fourcc == f->fmt.pix_mp.pixelformat && | ||
| 117 | formats[i].type == t) | ||
| 118 | return &formats[i]; | ||
| 119 | } | ||
| 120 | return NULL; | ||
| 121 | } | ||
| 122 | |||
| 123 | static struct mfc_control controls[] = { | ||
| 124 | { | ||
| 125 | .id = V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY, | ||
| 126 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 127 | .name = "H264 Display Delay", | ||
| 128 | .minimum = 0, | ||
| 129 | .maximum = 16383, | ||
| 130 | .step = 1, | ||
| 131 | .default_value = 0, | ||
| 132 | }, | ||
| 133 | { | ||
| 134 | .id = V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY_ENABLE, | ||
| 135 | .type = V4L2_CTRL_TYPE_BOOLEAN, | ||
| 136 | .name = "H264 Display Delay Enable", | ||
| 137 | .minimum = 0, | ||
| 138 | .maximum = 1, | ||
| 139 | .step = 1, | ||
| 140 | .default_value = 0, | ||
| 141 | }, | ||
| 142 | { | ||
| 143 | .id = V4L2_CID_MPEG_VIDEO_DECODER_MPEG4_DEBLOCK_FILTER, | ||
| 144 | .type = V4L2_CTRL_TYPE_BOOLEAN, | ||
| 145 | .name = "Mpeg4 Loop Filter Enable", | ||
| 146 | .minimum = 0, | ||
| 147 | .maximum = 1, | ||
| 148 | .step = 1, | ||
| 149 | .default_value = 0, | ||
| 150 | }, | ||
| 151 | { | ||
| 152 | .id = V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE, | ||
| 153 | .type = V4L2_CTRL_TYPE_BOOLEAN, | ||
| 154 | .name = "Slice Interface Enable", | ||
| 155 | .minimum = 0, | ||
| 156 | .maximum = 1, | ||
| 157 | .step = 1, | ||
| 158 | .default_value = 0, | ||
| 159 | }, | ||
| 160 | { | ||
| 161 | .id = V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, | ||
| 162 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 163 | .name = "Minimum number of cap bufs", | ||
| 164 | .minimum = 1, | ||
| 165 | .maximum = 32, | ||
| 166 | .step = 1, | ||
| 167 | .default_value = 1, | ||
| 168 | .is_volatile = 1, | ||
| 169 | }, | ||
| 170 | }; | ||
| 171 | |||
| 172 | #define NUM_CTRLS ARRAY_SIZE(controls) | ||
| 173 | |||
| 174 | /* Check whether a context should be run on hardware */ | ||
| 175 | static int s5p_mfc_ctx_ready(struct s5p_mfc_ctx *ctx) | ||
| 176 | { | ||
| 177 | /* Context is to parse header */ | ||
| 178 | if (ctx->src_queue_cnt >= 1 && ctx->state == MFCINST_GOT_INST) | ||
| 179 | return 1; | ||
| 180 | /* Context is to decode a frame */ | ||
| 181 | if (ctx->src_queue_cnt >= 1 && | ||
| 182 | ctx->state == MFCINST_RUNNING && | ||
| 183 | ctx->dst_queue_cnt >= ctx->dpb_count) | ||
| 184 | return 1; | ||
| 185 | /* Context is to return last frame */ | ||
| 186 | if (ctx->state == MFCINST_FINISHING && | ||
| 187 | ctx->dst_queue_cnt >= ctx->dpb_count) | ||
| 188 | return 1; | ||
| 189 | /* Context is to set buffers */ | ||
| 190 | if (ctx->src_queue_cnt >= 1 && | ||
| 191 | ctx->state == MFCINST_HEAD_PARSED && | ||
| 192 | ctx->capture_state == QUEUE_BUFS_MMAPED) | ||
| 193 | return 1; | ||
| 194 | /* Resolution change */ | ||
| 195 | if ((ctx->state == MFCINST_RES_CHANGE_INIT || | ||
| 196 | ctx->state == MFCINST_RES_CHANGE_FLUSH) && | ||
| 197 | ctx->dst_queue_cnt >= ctx->dpb_count) | ||
| 198 | return 1; | ||
| 199 | if (ctx->state == MFCINST_RES_CHANGE_END && | ||
| 200 | ctx->src_queue_cnt >= 1) | ||
| 201 | return 1; | ||
| 202 | mfc_debug(2, "ctx is not ready\n"); | ||
| 203 | return 0; | ||
| 204 | } | ||
| 205 | |||
| 206 | static struct s5p_mfc_codec_ops decoder_codec_ops = { | ||
| 207 | .pre_seq_start = NULL, | ||
| 208 | .post_seq_start = NULL, | ||
| 209 | .pre_frame_start = NULL, | ||
| 210 | .post_frame_start = NULL, | ||
| 211 | }; | ||
| 212 | |||
| 213 | /* Query capabilities of the device */ | ||
| 214 | static int vidioc_querycap(struct file *file, void *priv, | ||
| 215 | struct v4l2_capability *cap) | ||
| 216 | { | ||
| 217 | struct s5p_mfc_dev *dev = video_drvdata(file); | ||
| 218 | |||
| 219 | strncpy(cap->driver, dev->plat_dev->name, sizeof(cap->driver) - 1); | ||
| 220 | strncpy(cap->card, dev->plat_dev->name, sizeof(cap->card) - 1); | ||
| 221 | cap->bus_info[0] = 0; | ||
| 222 | cap->version = KERNEL_VERSION(1, 0, 0); | ||
| 223 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VIDEO_OUTPUT | ||
| 224 | | V4L2_CAP_STREAMING; | ||
| 225 | return 0; | ||
| 226 | } | ||
| 227 | |||
| 228 | /* Enumerate format */ | ||
| 229 | static int vidioc_enum_fmt(struct v4l2_fmtdesc *f, bool mplane, bool out) | ||
| 230 | { | ||
| 231 | struct s5p_mfc_fmt *fmt; | ||
| 232 | int i, j = 0; | ||
| 233 | |||
| 234 | for (i = 0; i < ARRAY_SIZE(formats); ++i) { | ||
| 235 | if (mplane && formats[i].num_planes == 1) | ||
| 236 | continue; | ||
| 237 | else if (!mplane && formats[i].num_planes > 1) | ||
| 238 | continue; | ||
| 239 | if (out && formats[i].type != MFC_FMT_DEC) | ||
| 240 | continue; | ||
| 241 | else if (!out && formats[i].type != MFC_FMT_RAW) | ||
| 242 | continue; | ||
| 243 | |||
| 244 | if (j == f->index) | ||
| 245 | break; | ||
| 246 | ++j; | ||
| 247 | } | ||
| 248 | if (i == ARRAY_SIZE(formats)) | ||
| 249 | return -EINVAL; | ||
| 250 | fmt = &formats[i]; | ||
| 251 | strlcpy(f->description, fmt->name, sizeof(f->description)); | ||
| 252 | f->pixelformat = fmt->fourcc; | ||
| 253 | return 0; | ||
| 254 | } | ||
| 255 | |||
| 256 | static int vidioc_enum_fmt_vid_cap(struct file *file, void *pirv, | ||
| 257 | struct v4l2_fmtdesc *f) | ||
| 258 | { | ||
| 259 | return vidioc_enum_fmt(f, false, false); | ||
| 260 | } | ||
| 261 | |||
| 262 | static int vidioc_enum_fmt_vid_cap_mplane(struct file *file, void *pirv, | ||
| 263 | struct v4l2_fmtdesc *f) | ||
| 264 | { | ||
| 265 | return vidioc_enum_fmt(f, true, false); | ||
| 266 | } | ||
| 267 | |||
| 268 | static int vidioc_enum_fmt_vid_out(struct file *file, void *prov, | ||
| 269 | struct v4l2_fmtdesc *f) | ||
| 270 | { | ||
| 271 | return vidioc_enum_fmt(f, false, true); | ||
| 272 | } | ||
| 273 | |||
| 274 | static int vidioc_enum_fmt_vid_out_mplane(struct file *file, void *prov, | ||
| 275 | struct v4l2_fmtdesc *f) | ||
| 276 | { | ||
| 277 | return vidioc_enum_fmt(f, true, true); | ||
| 278 | } | ||
| 279 | |||
| 280 | /* Get format */ | ||
| 281 | static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f) | ||
| 282 | { | ||
| 283 | struct s5p_mfc_ctx *ctx = fh_to_ctx(priv); | ||
| 284 | struct v4l2_pix_format_mplane *pix_mp; | ||
| 285 | |||
| 286 | mfc_debug_enter(); | ||
| 287 | pix_mp = &f->fmt.pix_mp; | ||
| 288 | if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE && | ||
| 289 | (ctx->state == MFCINST_GOT_INST || ctx->state == | ||
| 290 | MFCINST_RES_CHANGE_END)) { | ||
| 291 | /* If the MFC is parsing the header, | ||
| 292 | * so wait until it is finished */ | ||
| 293 | s5p_mfc_clean_ctx_int_flags(ctx); | ||
| 294 | s5p_mfc_wait_for_done_ctx(ctx, S5P_FIMV_R2H_CMD_SEQ_DONE_RET, | ||
| 295 | 0); | ||
| 296 | } | ||
| 297 | if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE && | ||
| 298 | ctx->state >= MFCINST_HEAD_PARSED && | ||
| 299 | ctx->state < MFCINST_ABORT) { | ||
| 300 | /* This is run on CAPTURE (decode output) */ | ||
| 301 | /* Width and height are set to the dimensions | ||
| 302 | of the movie, the buffer is bigger and | ||
| 303 | further processing stages should crop to this | ||
| 304 | rectangle. */ | ||
| 305 | pix_mp->width = ctx->buf_width; | ||
| 306 | pix_mp->height = ctx->buf_height; | ||
| 307 | pix_mp->field = V4L2_FIELD_NONE; | ||
| 308 | pix_mp->num_planes = 2; | ||
| 309 | /* Set pixelformat to the format in which MFC | ||
| 310 | outputs the decoded frame */ | ||
| 311 | pix_mp->pixelformat = V4L2_PIX_FMT_NV12MT; | ||
| 312 | pix_mp->plane_fmt[0].bytesperline = ctx->buf_width; | ||
| 313 | pix_mp->plane_fmt[0].sizeimage = ctx->luma_size; | ||
| 314 | pix_mp->plane_fmt[1].bytesperline = ctx->buf_width; | ||
| 315 | pix_mp->plane_fmt[1].sizeimage = ctx->chroma_size; | ||
| 316 | } else if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { | ||
| 317 | /* This is run on OUTPUT | ||
| 318 | The buffer contains compressed image | ||
| 319 | so width and height have no meaning */ | ||
| 320 | pix_mp->width = 0; | ||
| 321 | pix_mp->height = 0; | ||
| 322 | pix_mp->field = V4L2_FIELD_NONE; | ||
| 323 | pix_mp->plane_fmt[0].bytesperline = ctx->dec_src_buf_size; | ||
| 324 | pix_mp->plane_fmt[0].sizeimage = ctx->dec_src_buf_size; | ||
| 325 | pix_mp->pixelformat = ctx->src_fmt->fourcc; | ||
| 326 | pix_mp->num_planes = ctx->src_fmt->num_planes; | ||
| 327 | } else { | ||
| 328 | mfc_err("Format could not be read\n"); | ||
| 329 | mfc_debug(2, "%s-- with error\n", __func__); | ||
| 330 | return -EINVAL; | ||
| 331 | } | ||
| 332 | mfc_debug_leave(); | ||
| 333 | return 0; | ||
| 334 | } | ||
| 335 | |||
| 336 | /* Try format */ | ||
| 337 | static int vidioc_try_fmt(struct file *file, void *priv, struct v4l2_format *f) | ||
| 338 | { | ||
| 339 | struct s5p_mfc_fmt *fmt; | ||
| 340 | |||
| 341 | if (f->type != V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { | ||
| 342 | mfc_err("This node supports decoding only\n"); | ||
| 343 | return -EINVAL; | ||
| 344 | } | ||
| 345 | fmt = find_format(f, MFC_FMT_DEC); | ||
| 346 | if (!fmt) { | ||
| 347 | mfc_err("Unsupported format\n"); | ||
| 348 | return -EINVAL; | ||
| 349 | } | ||
| 350 | if (fmt->type != MFC_FMT_DEC) { | ||
| 351 | mfc_err("\n"); | ||
| 352 | return -EINVAL; | ||
| 353 | } | ||
| 354 | return 0; | ||
| 355 | } | ||
| 356 | |||
| 357 | /* Set format */ | ||
| 358 | static int vidioc_s_fmt(struct file *file, void *priv, struct v4l2_format *f) | ||
| 359 | { | ||
| 360 | struct s5p_mfc_dev *dev = video_drvdata(file); | ||
| 361 | struct s5p_mfc_ctx *ctx = fh_to_ctx(priv); | ||
| 362 | int ret = 0; | ||
| 363 | struct s5p_mfc_fmt *fmt; | ||
| 364 | struct v4l2_pix_format_mplane *pix_mp; | ||
| 365 | |||
| 366 | mfc_debug_enter(); | ||
| 367 | ret = vidioc_try_fmt(file, priv, f); | ||
| 368 | pix_mp = &f->fmt.pix_mp; | ||
| 369 | if (ret) | ||
| 370 | return ret; | ||
| 371 | if (ctx->vq_src.streaming || ctx->vq_dst.streaming) { | ||
| 372 | v4l2_err(&dev->v4l2_dev, "%s queue busy\n", __func__); | ||
| 373 | ret = -EBUSY; | ||
| 374 | goto out; | ||
| 375 | } | ||
| 376 | fmt = find_format(f, MFC_FMT_DEC); | ||
| 377 | if (!fmt || fmt->codec_mode == S5P_FIMV_CODEC_NONE) { | ||
| 378 | mfc_err("Unknown codec\n"); | ||
| 379 | ret = -EINVAL; | ||
| 380 | goto out; | ||
| 381 | } | ||
| 382 | if (fmt->type != MFC_FMT_DEC) { | ||
| 383 | mfc_err("Wrong format selected, you should choose " | ||
| 384 | "format for decoding\n"); | ||
| 385 | ret = -EINVAL; | ||
| 386 | goto out; | ||
| 387 | } | ||
| 388 | ctx->src_fmt = fmt; | ||
| 389 | ctx->codec_mode = fmt->codec_mode; | ||
| 390 | mfc_debug(2, "The codec number is: %d\n", ctx->codec_mode); | ||
| 391 | pix_mp->height = 0; | ||
| 392 | pix_mp->width = 0; | ||
| 393 | if (pix_mp->plane_fmt[0].sizeimage) | ||
| 394 | ctx->dec_src_buf_size = pix_mp->plane_fmt[0].sizeimage; | ||
| 395 | else | ||
| 396 | pix_mp->plane_fmt[0].sizeimage = ctx->dec_src_buf_size = | ||
| 397 | DEF_CPB_SIZE; | ||
| 398 | pix_mp->plane_fmt[0].bytesperline = 0; | ||
| 399 | ctx->state = MFCINST_INIT; | ||
| 400 | out: | ||
| 401 | mfc_debug_leave(); | ||
| 402 | return ret; | ||
| 403 | } | ||
| 404 | |||
| 405 | /* Reqeust buffers */ | ||
| 406 | static int vidioc_reqbufs(struct file *file, void *priv, | ||
| 407 | struct v4l2_requestbuffers *reqbufs) | ||
| 408 | { | ||
| 409 | struct s5p_mfc_dev *dev = video_drvdata(file); | ||
| 410 | struct s5p_mfc_ctx *ctx = fh_to_ctx(priv); | ||
| 411 | int ret = 0; | ||
| 412 | unsigned long flags; | ||
| 413 | |||
| 414 | if (reqbufs->memory != V4L2_MEMORY_MMAP) { | ||
| 415 | mfc_err("Only V4L2_MEMORY_MAP is supported\n"); | ||
| 416 | return -EINVAL; | ||
| 417 | } | ||
| 418 | if (reqbufs->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { | ||
| 419 | /* Can only request buffers after an instance has been opened.*/ | ||
| 420 | if (ctx->state == MFCINST_INIT) { | ||
| 421 | ctx->src_bufs_cnt = 0; | ||
| 422 | if (reqbufs->count == 0) { | ||
| 423 | mfc_debug(2, "Freeing buffers\n"); | ||
| 424 | s5p_mfc_clock_on(); | ||
| 425 | ret = vb2_reqbufs(&ctx->vq_src, reqbufs); | ||
| 426 | s5p_mfc_clock_off(); | ||
| 427 | return ret; | ||
| 428 | } | ||
| 429 | /* Decoding */ | ||
| 430 | if (ctx->output_state != QUEUE_FREE) { | ||
| 431 | mfc_err("Bufs have already been requested\n"); | ||
| 432 | return -EINVAL; | ||
| 433 | } | ||
| 434 | s5p_mfc_clock_on(); | ||
| 435 | ret = vb2_reqbufs(&ctx->vq_src, reqbufs); | ||
| 436 | s5p_mfc_clock_off(); | ||
| 437 | if (ret) { | ||
| 438 | mfc_err("vb2_reqbufs on output failed\n"); | ||
| 439 | return ret; | ||
| 440 | } | ||
| 441 | mfc_debug(2, "vb2_reqbufs: %d\n", ret); | ||
| 442 | ctx->output_state = QUEUE_BUFS_REQUESTED; | ||
| 443 | } | ||
| 444 | } else if (reqbufs->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { | ||
| 445 | ctx->dst_bufs_cnt = 0; | ||
| 446 | if (reqbufs->count == 0) { | ||
| 447 | mfc_debug(2, "Freeing buffers\n"); | ||
| 448 | s5p_mfc_clock_on(); | ||
| 449 | ret = vb2_reqbufs(&ctx->vq_dst, reqbufs); | ||
| 450 | s5p_mfc_clock_off(); | ||
| 451 | return ret; | ||
| 452 | } | ||
| 453 | if (ctx->capture_state != QUEUE_FREE) { | ||
| 454 | mfc_err("Bufs have already been requested\n"); | ||
| 455 | return -EINVAL; | ||
| 456 | } | ||
| 457 | ctx->capture_state = QUEUE_BUFS_REQUESTED; | ||
| 458 | s5p_mfc_clock_on(); | ||
| 459 | ret = vb2_reqbufs(&ctx->vq_dst, reqbufs); | ||
| 460 | s5p_mfc_clock_off(); | ||
| 461 | if (ret) { | ||
| 462 | mfc_err("vb2_reqbufs on capture failed\n"); | ||
| 463 | return ret; | ||
| 464 | } | ||
| 465 | if (reqbufs->count < ctx->dpb_count) { | ||
| 466 | mfc_err("Not enough buffers allocated\n"); | ||
| 467 | reqbufs->count = 0; | ||
| 468 | s5p_mfc_clock_on(); | ||
| 469 | ret = vb2_reqbufs(&ctx->vq_dst, reqbufs); | ||
| 470 | s5p_mfc_clock_off(); | ||
| 471 | return -ENOMEM; | ||
| 472 | } | ||
| 473 | ctx->total_dpb_count = reqbufs->count; | ||
| 474 | ret = s5p_mfc_alloc_codec_buffers(ctx); | ||
| 475 | if (ret) { | ||
| 476 | mfc_err("Failed to allocate decoding buffers\n"); | ||
| 477 | reqbufs->count = 0; | ||
| 478 | s5p_mfc_clock_on(); | ||
| 479 | ret = vb2_reqbufs(&ctx->vq_dst, reqbufs); | ||
| 480 | s5p_mfc_clock_off(); | ||
| 481 | return -ENOMEM; | ||
| 482 | } | ||
| 483 | if (ctx->dst_bufs_cnt == ctx->total_dpb_count) { | ||
| 484 | ctx->capture_state = QUEUE_BUFS_MMAPED; | ||
| 485 | } else { | ||
| 486 | mfc_err("Not all buffers passed to buf_init\n"); | ||
| 487 | reqbufs->count = 0; | ||
| 488 | s5p_mfc_clock_on(); | ||
| 489 | ret = vb2_reqbufs(&ctx->vq_dst, reqbufs); | ||
| 490 | s5p_mfc_release_codec_buffers(ctx); | ||
| 491 | s5p_mfc_clock_off(); | ||
| 492 | return -ENOMEM; | ||
| 493 | } | ||
| 494 | if (s5p_mfc_ctx_ready(ctx)) { | ||
| 495 | spin_lock_irqsave(&dev->condlock, flags); | ||
| 496 | set_bit(ctx->num, &dev->ctx_work_bits); | ||
| 497 | spin_unlock_irqrestore(&dev->condlock, flags); | ||
| 498 | } | ||
| 499 | s5p_mfc_try_run(dev); | ||
| 500 | s5p_mfc_wait_for_done_ctx(ctx, | ||
| 501 | S5P_FIMV_R2H_CMD_INIT_BUFFERS_RET, 0); | ||
| 502 | } | ||
| 503 | return ret; | ||
| 504 | } | ||
| 505 | |||
| 506 | /* Query buffer */ | ||
| 507 | static int vidioc_querybuf(struct file *file, void *priv, | ||
| 508 | struct v4l2_buffer *buf) | ||
| 509 | { | ||
| 510 | struct s5p_mfc_ctx *ctx = fh_to_ctx(priv); | ||
| 511 | int ret; | ||
| 512 | int i; | ||
| 513 | |||
| 514 | if (buf->memory != V4L2_MEMORY_MMAP) { | ||
| 515 | mfc_err("Only mmaped buffers can be used\n"); | ||
| 516 | return -EINVAL; | ||
| 517 | } | ||
| 518 | mfc_debug(2, "State: %d, buf->type: %d\n", ctx->state, buf->type); | ||
| 519 | if (ctx->state == MFCINST_INIT && | ||
| 520 | buf->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { | ||
| 521 | ret = vb2_querybuf(&ctx->vq_src, buf); | ||
| 522 | } else if (ctx->state == MFCINST_RUNNING && | ||
| 523 | buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { | ||
| 524 | ret = vb2_querybuf(&ctx->vq_dst, buf); | ||
| 525 | for (i = 0; i < buf->length; i++) | ||
| 526 | buf->m.planes[i].m.mem_offset += DST_QUEUE_OFF_BASE; | ||
| 527 | } else { | ||
| 528 | mfc_err("vidioc_querybuf called in an inappropriate state\n"); | ||
| 529 | ret = -EINVAL; | ||
| 530 | } | ||
| 531 | mfc_debug_leave(); | ||
| 532 | return ret; | ||
| 533 | } | ||
| 534 | |||
| 535 | /* Queue a buffer */ | ||
| 536 | static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *buf) | ||
| 537 | { | ||
| 538 | struct s5p_mfc_ctx *ctx = fh_to_ctx(priv); | ||
| 539 | |||
| 540 | if (ctx->state == MFCINST_ERROR) { | ||
| 541 | mfc_err("Call on QBUF after unrecoverable error\n"); | ||
| 542 | return -EIO; | ||
| 543 | } | ||
| 544 | if (buf->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) | ||
| 545 | return vb2_qbuf(&ctx->vq_src, buf); | ||
| 546 | else if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) | ||
| 547 | return vb2_qbuf(&ctx->vq_dst, buf); | ||
| 548 | return -EINVAL; | ||
| 549 | } | ||
| 550 | |||
| 551 | /* Dequeue a buffer */ | ||
| 552 | static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *buf) | ||
| 553 | { | ||
| 554 | struct s5p_mfc_ctx *ctx = fh_to_ctx(priv); | ||
| 555 | |||
| 556 | if (ctx->state == MFCINST_ERROR) { | ||
| 557 | mfc_err("Call on DQBUF after unrecoverable error\n"); | ||
| 558 | return -EIO; | ||
| 559 | } | ||
| 560 | if (buf->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) | ||
| 561 | return vb2_dqbuf(&ctx->vq_src, buf, file->f_flags & O_NONBLOCK); | ||
| 562 | else if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) | ||
| 563 | return vb2_dqbuf(&ctx->vq_dst, buf, file->f_flags & O_NONBLOCK); | ||
| 564 | return -EINVAL; | ||
| 565 | } | ||
| 566 | |||
| 567 | /* Stream on */ | ||
| 568 | static int vidioc_streamon(struct file *file, void *priv, | ||
| 569 | enum v4l2_buf_type type) | ||
| 570 | { | ||
| 571 | struct s5p_mfc_ctx *ctx = fh_to_ctx(priv); | ||
| 572 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 573 | unsigned long flags; | ||
| 574 | int ret = -EINVAL; | ||
| 575 | |||
| 576 | mfc_debug_enter(); | ||
| 577 | if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { | ||
| 578 | |||
| 579 | if (ctx->state == MFCINST_INIT) { | ||
| 580 | ctx->dst_bufs_cnt = 0; | ||
| 581 | ctx->src_bufs_cnt = 0; | ||
| 582 | ctx->capture_state = QUEUE_FREE; | ||
| 583 | ctx->output_state = QUEUE_FREE; | ||
| 584 | s5p_mfc_alloc_instance_buffer(ctx); | ||
| 585 | s5p_mfc_alloc_dec_temp_buffers(ctx); | ||
| 586 | spin_lock_irqsave(&dev->condlock, flags); | ||
| 587 | set_bit(ctx->num, &dev->ctx_work_bits); | ||
| 588 | spin_unlock_irqrestore(&dev->condlock, flags); | ||
| 589 | s5p_mfc_clean_ctx_int_flags(ctx); | ||
| 590 | s5p_mfc_try_run(dev); | ||
| 591 | |||
| 592 | if (s5p_mfc_wait_for_done_ctx(ctx, | ||
| 593 | S5P_FIMV_R2H_CMD_OPEN_INSTANCE_RET, 0)) { | ||
| 594 | /* Error or timeout */ | ||
| 595 | mfc_err("Error getting instance from hardware\n"); | ||
| 596 | s5p_mfc_release_instance_buffer(ctx); | ||
| 597 | s5p_mfc_release_dec_desc_buffer(ctx); | ||
| 598 | return -EIO; | ||
| 599 | } | ||
| 600 | mfc_debug(2, "Got instance number: %d\n", ctx->inst_no); | ||
| 601 | } | ||
| 602 | ret = vb2_streamon(&ctx->vq_src, type); | ||
| 603 | } | ||
| 604 | else if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) | ||
| 605 | ret = vb2_streamon(&ctx->vq_dst, type); | ||
| 606 | mfc_debug_leave(); | ||
| 607 | return ret; | ||
| 608 | } | ||
| 609 | |||
| 610 | /* Stream off, which equals to a pause */ | ||
| 611 | static int vidioc_streamoff(struct file *file, void *priv, | ||
| 612 | enum v4l2_buf_type type) | ||
| 613 | { | ||
| 614 | struct s5p_mfc_ctx *ctx = fh_to_ctx(priv); | ||
| 615 | |||
| 616 | if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) | ||
| 617 | return vb2_streamoff(&ctx->vq_src, type); | ||
| 618 | else if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) | ||
| 619 | return vb2_streamoff(&ctx->vq_dst, type); | ||
| 620 | return -EINVAL; | ||
| 621 | } | ||
| 622 | |||
| 623 | /* Set controls - v4l2 control framework */ | ||
| 624 | static int s5p_mfc_dec_s_ctrl(struct v4l2_ctrl *ctrl) | ||
| 625 | { | ||
| 626 | struct s5p_mfc_ctx *ctx = ctrl_to_ctx(ctrl); | ||
| 627 | |||
| 628 | switch (ctrl->id) { | ||
| 629 | case V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY: | ||
| 630 | ctx->loop_filter_mpeg4 = ctrl->val; | ||
| 631 | break; | ||
| 632 | case V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY_ENABLE: | ||
| 633 | ctx->display_delay_enable = ctrl->val; | ||
| 634 | break; | ||
| 635 | case V4L2_CID_MPEG_VIDEO_DECODER_MPEG4_DEBLOCK_FILTER: | ||
| 636 | ctx->display_delay = ctrl->val; | ||
| 637 | break; | ||
| 638 | case V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE: | ||
| 639 | ctx->slice_interface = ctrl->val; | ||
| 640 | break; | ||
| 641 | default: | ||
| 642 | mfc_err("Invalid control 0x%08x\n", ctrl->id); | ||
| 643 | return -EINVAL; | ||
| 644 | } | ||
| 645 | return 0; | ||
| 646 | } | ||
| 647 | |||
| 648 | static int s5p_mfc_dec_g_v_ctrl(struct v4l2_ctrl *ctrl) | ||
| 649 | { | ||
| 650 | struct s5p_mfc_ctx *ctx = ctrl_to_ctx(ctrl); | ||
| 651 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 652 | |||
| 653 | switch (ctrl->id) { | ||
| 654 | case V4L2_CID_MIN_BUFFERS_FOR_CAPTURE: | ||
| 655 | if (ctx->state >= MFCINST_HEAD_PARSED && | ||
| 656 | ctx->state < MFCINST_ABORT) { | ||
| 657 | ctrl->val = ctx->dpb_count; | ||
| 658 | break; | ||
| 659 | } else if (ctx->state != MFCINST_INIT) { | ||
| 660 | v4l2_err(&dev->v4l2_dev, "Decoding not initialised\n"); | ||
| 661 | return -EINVAL; | ||
| 662 | } | ||
| 663 | /* Should wait for the header to be parsed */ | ||
| 664 | s5p_mfc_clean_ctx_int_flags(ctx); | ||
| 665 | s5p_mfc_wait_for_done_ctx(ctx, | ||
| 666 | S5P_FIMV_R2H_CMD_SEQ_DONE_RET, 0); | ||
| 667 | if (ctx->state >= MFCINST_HEAD_PARSED && | ||
| 668 | ctx->state < MFCINST_ABORT) { | ||
| 669 | ctrl->val = ctx->dpb_count; | ||
| 670 | } else { | ||
| 671 | v4l2_err(&dev->v4l2_dev, "Decoding not initialised\n"); | ||
| 672 | return -EINVAL; | ||
| 673 | } | ||
| 674 | break; | ||
| 675 | } | ||
| 676 | return 0; | ||
| 677 | } | ||
| 678 | |||
| 679 | |||
| 680 | static const struct v4l2_ctrl_ops s5p_mfc_dec_ctrl_ops = { | ||
| 681 | .s_ctrl = s5p_mfc_dec_s_ctrl, | ||
| 682 | .g_volatile_ctrl = s5p_mfc_dec_g_v_ctrl, | ||
| 683 | }; | ||
| 684 | |||
| 685 | /* Get cropping information */ | ||
| 686 | static int vidioc_g_crop(struct file *file, void *priv, | ||
| 687 | struct v4l2_crop *cr) | ||
| 688 | { | ||
| 689 | struct s5p_mfc_ctx *ctx = fh_to_ctx(priv); | ||
| 690 | u32 left, right, top, bottom; | ||
| 691 | |||
| 692 | if (ctx->state != MFCINST_HEAD_PARSED && | ||
| 693 | ctx->state != MFCINST_RUNNING && ctx->state != MFCINST_FINISHING | ||
| 694 | && ctx->state != MFCINST_FINISHED) { | ||
| 695 | mfc_err("Cannont set crop\n"); | ||
| 696 | return -EINVAL; | ||
| 697 | } | ||
| 698 | if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_H264) { | ||
| 699 | left = s5p_mfc_read_shm(ctx, CROP_INFO_H); | ||
| 700 | right = left >> S5P_FIMV_SHARED_CROP_RIGHT_SHIFT; | ||
| 701 | left = left & S5P_FIMV_SHARED_CROP_LEFT_MASK; | ||
| 702 | top = s5p_mfc_read_shm(ctx, CROP_INFO_V); | ||
| 703 | bottom = top >> S5P_FIMV_SHARED_CROP_BOTTOM_SHIFT; | ||
| 704 | top = top & S5P_FIMV_SHARED_CROP_TOP_MASK; | ||
| 705 | cr->c.left = left; | ||
| 706 | cr->c.top = top; | ||
| 707 | cr->c.width = ctx->img_width - left - right; | ||
| 708 | cr->c.height = ctx->img_height - top - bottom; | ||
| 709 | mfc_debug(2, "Cropping info [h264]: l=%d t=%d " | ||
| 710 | "w=%d h=%d (r=%d b=%d fw=%d fh=%d\n", left, top, | ||
| 711 | cr->c.width, cr->c.height, right, bottom, | ||
| 712 | ctx->buf_width, ctx->buf_height); | ||
| 713 | } else { | ||
| 714 | cr->c.left = 0; | ||
| 715 | cr->c.top = 0; | ||
| 716 | cr->c.width = ctx->img_width; | ||
| 717 | cr->c.height = ctx->img_height; | ||
| 718 | mfc_debug(2, "Cropping info: w=%d h=%d fw=%d " | ||
| 719 | "fh=%d\n", cr->c.width, cr->c.height, ctx->buf_width, | ||
| 720 | ctx->buf_height); | ||
| 721 | } | ||
| 722 | return 0; | ||
| 723 | } | ||
| 724 | |||
| 725 | /* v4l2_ioctl_ops */ | ||
| 726 | static const struct v4l2_ioctl_ops s5p_mfc_dec_ioctl_ops = { | ||
| 727 | .vidioc_querycap = vidioc_querycap, | ||
| 728 | .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap, | ||
| 729 | .vidioc_enum_fmt_vid_cap_mplane = vidioc_enum_fmt_vid_cap_mplane, | ||
| 730 | .vidioc_enum_fmt_vid_out = vidioc_enum_fmt_vid_out, | ||
| 731 | .vidioc_enum_fmt_vid_out_mplane = vidioc_enum_fmt_vid_out_mplane, | ||
| 732 | .vidioc_g_fmt_vid_cap_mplane = vidioc_g_fmt, | ||
| 733 | .vidioc_g_fmt_vid_out_mplane = vidioc_g_fmt, | ||
| 734 | .vidioc_try_fmt_vid_cap_mplane = vidioc_try_fmt, | ||
| 735 | .vidioc_try_fmt_vid_out_mplane = vidioc_try_fmt, | ||
| 736 | .vidioc_s_fmt_vid_cap_mplane = vidioc_s_fmt, | ||
| 737 | .vidioc_s_fmt_vid_out_mplane = vidioc_s_fmt, | ||
| 738 | .vidioc_reqbufs = vidioc_reqbufs, | ||
| 739 | .vidioc_querybuf = vidioc_querybuf, | ||
| 740 | .vidioc_qbuf = vidioc_qbuf, | ||
| 741 | .vidioc_dqbuf = vidioc_dqbuf, | ||
| 742 | .vidioc_streamon = vidioc_streamon, | ||
| 743 | .vidioc_streamoff = vidioc_streamoff, | ||
| 744 | .vidioc_g_crop = vidioc_g_crop, | ||
| 745 | }; | ||
| 746 | |||
| 747 | static int s5p_mfc_queue_setup(struct vb2_queue *vq, unsigned int *buf_count, | ||
| 748 | unsigned int *plane_count, unsigned long psize[], | ||
| 749 | void *allocators[]) | ||
| 750 | { | ||
| 751 | struct s5p_mfc_ctx *ctx = fh_to_ctx(vq->drv_priv); | ||
| 752 | |||
| 753 | /* Video output for decoding (source) | ||
| 754 | * this can be set after getting an instance */ | ||
| 755 | if (ctx->state == MFCINST_INIT && | ||
| 756 | vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { | ||
| 757 | /* A single plane is required for input */ | ||
| 758 | *plane_count = 1; | ||
| 759 | if (*buf_count < 1) | ||
| 760 | *buf_count = 1; | ||
| 761 | if (*buf_count > MFC_MAX_BUFFERS) | ||
| 762 | *buf_count = MFC_MAX_BUFFERS; | ||
| 763 | /* Video capture for decoding (destination) | ||
| 764 | * this can be set after the header was parsed */ | ||
| 765 | } else if (ctx->state == MFCINST_HEAD_PARSED && | ||
| 766 | vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { | ||
| 767 | /* Output plane count is 2 - one for Y and one for CbCr */ | ||
| 768 | *plane_count = 2; | ||
| 769 | /* Setup buffer count */ | ||
| 770 | if (*buf_count < ctx->dpb_count) | ||
| 771 | *buf_count = ctx->dpb_count; | ||
| 772 | if (*buf_count > ctx->dpb_count + MFC_MAX_EXTRA_DPB) | ||
| 773 | *buf_count = ctx->dpb_count + MFC_MAX_EXTRA_DPB; | ||
| 774 | if (*buf_count > MFC_MAX_BUFFERS) | ||
| 775 | *buf_count = MFC_MAX_BUFFERS; | ||
| 776 | } else { | ||
| 777 | mfc_err("State seems invalid. State = %d, vq->type = %d\n", | ||
| 778 | ctx->state, vq->type); | ||
| 779 | return -EINVAL; | ||
| 780 | } | ||
| 781 | mfc_debug(2, "Buffer count=%d, plane count=%d\n", | ||
| 782 | *buf_count, *plane_count); | ||
| 783 | if (ctx->state == MFCINST_HEAD_PARSED && | ||
| 784 | vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { | ||
| 785 | psize[0] = ctx->luma_size; | ||
| 786 | psize[1] = ctx->chroma_size; | ||
| 787 | allocators[0] = ctx->dev->alloc_ctx[MFC_BANK2_ALLOC_CTX]; | ||
| 788 | allocators[1] = ctx->dev->alloc_ctx[MFC_BANK1_ALLOC_CTX]; | ||
| 789 | } else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE && | ||
| 790 | ctx->state == MFCINST_INIT) { | ||
| 791 | psize[0] = ctx->dec_src_buf_size; | ||
| 792 | allocators[0] = ctx->dev->alloc_ctx[MFC_BANK1_ALLOC_CTX]; | ||
| 793 | } else { | ||
| 794 | mfc_err("This video node is dedicated to decoding. Decoding not initalised\n"); | ||
| 795 | return -EINVAL; | ||
| 796 | } | ||
| 797 | return 0; | ||
| 798 | } | ||
| 799 | |||
| 800 | static void s5p_mfc_unlock(struct vb2_queue *q) | ||
| 801 | { | ||
| 802 | struct s5p_mfc_ctx *ctx = fh_to_ctx(q->drv_priv); | ||
| 803 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 804 | |||
| 805 | mutex_unlock(&dev->mfc_mutex); | ||
| 806 | } | ||
| 807 | |||
| 808 | static void s5p_mfc_lock(struct vb2_queue *q) | ||
| 809 | { | ||
| 810 | struct s5p_mfc_ctx *ctx = fh_to_ctx(q->drv_priv); | ||
| 811 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 812 | |||
| 813 | mutex_lock(&dev->mfc_mutex); | ||
| 814 | } | ||
| 815 | |||
| 816 | static int s5p_mfc_buf_init(struct vb2_buffer *vb) | ||
| 817 | { | ||
| 818 | struct vb2_queue *vq = vb->vb2_queue; | ||
| 819 | struct s5p_mfc_ctx *ctx = fh_to_ctx(vq->drv_priv); | ||
| 820 | unsigned int i; | ||
| 821 | |||
| 822 | if (vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { | ||
| 823 | if (ctx->capture_state == QUEUE_BUFS_MMAPED) | ||
| 824 | return 0; | ||
| 825 | for (i = 0; i <= ctx->src_fmt->num_planes ; i++) { | ||
| 826 | if (IS_ERR_OR_NULL(ERR_PTR( | ||
| 827 | vb2_dma_contig_plane_paddr(vb, i)))) { | ||
| 828 | mfc_err("Plane mem not allocated\n"); | ||
| 829 | return -EINVAL; | ||
| 830 | } | ||
| 831 | } | ||
| 832 | if (vb2_plane_size(vb, 0) < ctx->luma_size || | ||
| 833 | vb2_plane_size(vb, 1) < ctx->chroma_size) { | ||
| 834 | mfc_err("Plane buffer (CAPTURE) is too small\n"); | ||
| 835 | return -EINVAL; | ||
| 836 | } | ||
| 837 | i = vb->v4l2_buf.index; | ||
| 838 | ctx->dst_bufs[i].b = vb; | ||
| 839 | ctx->dst_bufs[i].cookie.raw.luma = | ||
| 840 | vb2_dma_contig_plane_paddr(vb, 0); | ||
| 841 | ctx->dst_bufs[i].cookie.raw.chroma = | ||
| 842 | vb2_dma_contig_plane_paddr(vb, 1); | ||
| 843 | ctx->dst_bufs_cnt++; | ||
| 844 | } else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { | ||
| 845 | if (IS_ERR_OR_NULL(ERR_PTR( | ||
| 846 | vb2_dma_contig_plane_paddr(vb, 0)))) { | ||
| 847 | mfc_err("Plane memory not allocated\n"); | ||
| 848 | return -EINVAL; | ||
| 849 | } | ||
| 850 | if (vb2_plane_size(vb, 0) < ctx->dec_src_buf_size) { | ||
| 851 | mfc_err("Plane buffer (OUTPUT) is too small\n"); | ||
| 852 | return -EINVAL; | ||
| 853 | } | ||
| 854 | |||
| 855 | i = vb->v4l2_buf.index; | ||
| 856 | ctx->src_bufs[i].b = vb; | ||
| 857 | ctx->src_bufs[i].cookie.stream = | ||
| 858 | vb2_dma_contig_plane_paddr(vb, 0); | ||
| 859 | ctx->src_bufs_cnt++; | ||
| 860 | } else { | ||
| 861 | mfc_err("s5p_mfc_buf_init: unknown queue type\n"); | ||
| 862 | return -EINVAL; | ||
| 863 | } | ||
| 864 | return 0; | ||
| 865 | } | ||
| 866 | |||
| 867 | static int s5p_mfc_start_streaming(struct vb2_queue *q) | ||
| 868 | { | ||
| 869 | struct s5p_mfc_ctx *ctx = fh_to_ctx(q->drv_priv); | ||
| 870 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 871 | unsigned long flags; | ||
| 872 | |||
| 873 | v4l2_ctrl_handler_setup(&ctx->ctrl_handler); | ||
| 874 | if (ctx->state == MFCINST_FINISHING || | ||
| 875 | ctx->state == MFCINST_FINISHED) | ||
| 876 | ctx->state = MFCINST_RUNNING; | ||
| 877 | /* If context is ready then dev = work->data;schedule it to run */ | ||
| 878 | if (s5p_mfc_ctx_ready(ctx)) { | ||
| 879 | spin_lock_irqsave(&dev->condlock, flags); | ||
| 880 | set_bit(ctx->num, &dev->ctx_work_bits); | ||
| 881 | spin_unlock_irqrestore(&dev->condlock, flags); | ||
| 882 | } | ||
| 883 | s5p_mfc_try_run(dev); | ||
| 884 | return 0; | ||
| 885 | } | ||
| 886 | |||
| 887 | static int s5p_mfc_stop_streaming(struct vb2_queue *q) | ||
| 888 | { | ||
| 889 | unsigned long flags; | ||
| 890 | struct s5p_mfc_ctx *ctx = fh_to_ctx(q->drv_priv); | ||
| 891 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 892 | int aborted = 0; | ||
| 893 | |||
| 894 | if ((ctx->state == MFCINST_FINISHING || | ||
| 895 | ctx->state == MFCINST_RUNNING) && | ||
| 896 | dev->curr_ctx == ctx->num && dev->hw_lock) { | ||
| 897 | ctx->state = MFCINST_ABORT; | ||
| 898 | s5p_mfc_wait_for_done_ctx(ctx, | ||
| 899 | S5P_FIMV_R2H_CMD_FRAME_DONE_RET, 0); | ||
| 900 | aborted = 1; | ||
| 901 | } | ||
| 902 | spin_lock_irqsave(&dev->irqlock, flags); | ||
| 903 | if (q->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { | ||
| 904 | s5p_mfc_cleanup_queue(&ctx->dst_queue, &ctx->vq_dst); | ||
| 905 | INIT_LIST_HEAD(&ctx->dst_queue); | ||
| 906 | ctx->dst_queue_cnt = 0; | ||
| 907 | ctx->dpb_flush_flag = 1; | ||
| 908 | ctx->dec_dst_flag = 0; | ||
| 909 | } | ||
| 910 | if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { | ||
| 911 | s5p_mfc_cleanup_queue(&ctx->src_queue, &ctx->vq_src); | ||
| 912 | INIT_LIST_HEAD(&ctx->src_queue); | ||
| 913 | ctx->src_queue_cnt = 0; | ||
| 914 | } | ||
| 915 | if (aborted) | ||
| 916 | ctx->state = MFCINST_RUNNING; | ||
| 917 | spin_unlock_irqrestore(&dev->irqlock, flags); | ||
| 918 | return 0; | ||
| 919 | } | ||
| 920 | |||
| 921 | |||
| 922 | static void s5p_mfc_buf_queue(struct vb2_buffer *vb) | ||
| 923 | { | ||
| 924 | struct vb2_queue *vq = vb->vb2_queue; | ||
| 925 | struct s5p_mfc_ctx *ctx = fh_to_ctx(vq->drv_priv); | ||
| 926 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 927 | unsigned long flags; | ||
| 928 | struct s5p_mfc_buf *mfc_buf; | ||
| 929 | |||
| 930 | if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { | ||
| 931 | mfc_buf = &ctx->src_bufs[vb->v4l2_buf.index]; | ||
| 932 | mfc_buf->used = 0; | ||
| 933 | spin_lock_irqsave(&dev->irqlock, flags); | ||
| 934 | list_add_tail(&mfc_buf->list, &ctx->src_queue); | ||
| 935 | ctx->src_queue_cnt++; | ||
| 936 | spin_unlock_irqrestore(&dev->irqlock, flags); | ||
| 937 | } else if (vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { | ||
| 938 | mfc_buf = &ctx->dst_bufs[vb->v4l2_buf.index]; | ||
| 939 | mfc_buf->used = 0; | ||
| 940 | /* Mark destination as available for use by MFC */ | ||
| 941 | spin_lock_irqsave(&dev->irqlock, flags); | ||
| 942 | set_bit(vb->v4l2_buf.index, &ctx->dec_dst_flag); | ||
| 943 | list_add_tail(&mfc_buf->list, &ctx->dst_queue); | ||
| 944 | ctx->dst_queue_cnt++; | ||
| 945 | spin_unlock_irqrestore(&dev->irqlock, flags); | ||
| 946 | } else { | ||
| 947 | mfc_err("Unsupported buffer type (%d)\n", vq->type); | ||
| 948 | } | ||
| 949 | if (s5p_mfc_ctx_ready(ctx)) { | ||
| 950 | spin_lock_irqsave(&dev->condlock, flags); | ||
| 951 | set_bit(ctx->num, &dev->ctx_work_bits); | ||
| 952 | spin_unlock_irqrestore(&dev->condlock, flags); | ||
| 953 | } | ||
| 954 | s5p_mfc_try_run(dev); | ||
| 955 | } | ||
| 956 | |||
| 957 | static struct vb2_ops s5p_mfc_dec_qops = { | ||
| 958 | .queue_setup = s5p_mfc_queue_setup, | ||
| 959 | .wait_prepare = s5p_mfc_unlock, | ||
| 960 | .wait_finish = s5p_mfc_lock, | ||
| 961 | .buf_init = s5p_mfc_buf_init, | ||
| 962 | .start_streaming = s5p_mfc_start_streaming, | ||
| 963 | .stop_streaming = s5p_mfc_stop_streaming, | ||
| 964 | .buf_queue = s5p_mfc_buf_queue, | ||
| 965 | }; | ||
| 966 | |||
| 967 | struct s5p_mfc_codec_ops *get_dec_codec_ops(void) | ||
| 968 | { | ||
| 969 | return &decoder_codec_ops; | ||
| 970 | } | ||
| 971 | |||
| 972 | struct vb2_ops *get_dec_queue_ops(void) | ||
| 973 | { | ||
| 974 | return &s5p_mfc_dec_qops; | ||
| 975 | } | ||
| 976 | |||
| 977 | const struct v4l2_ioctl_ops *get_dec_v4l2_ioctl_ops(void) | ||
| 978 | { | ||
| 979 | return &s5p_mfc_dec_ioctl_ops; | ||
| 980 | } | ||
| 981 | |||
| 982 | #define IS_MFC51_PRIV(x) ((V4L2_CTRL_ID2CLASS(x) == V4L2_CTRL_CLASS_MPEG) \ | ||
| 983 | && V4L2_CTRL_DRIVER_PRIV(x)) | ||
| 984 | |||
| 985 | int s5p_mfc_dec_ctrls_setup(struct s5p_mfc_ctx *ctx) | ||
| 986 | { | ||
| 987 | struct v4l2_ctrl_config cfg; | ||
| 988 | int i; | ||
| 989 | |||
| 990 | v4l2_ctrl_handler_init(&ctx->ctrl_handler, NUM_CTRLS); | ||
| 991 | if (ctx->ctrl_handler.error) { | ||
| 992 | mfc_err("v4l2_ctrl_handler_init failed\n"); | ||
| 993 | return ctx->ctrl_handler.error; | ||
| 994 | } | ||
| 995 | |||
| 996 | for (i = 0; i < NUM_CTRLS; i++) { | ||
| 997 | if (IS_MFC51_PRIV(controls[i].id)) { | ||
| 998 | cfg.ops = &s5p_mfc_dec_ctrl_ops; | ||
| 999 | cfg.id = controls[i].id; | ||
| 1000 | cfg.min = controls[i].minimum; | ||
| 1001 | cfg.max = controls[i].maximum; | ||
| 1002 | cfg.def = controls[i].default_value; | ||
| 1003 | cfg.name = controls[i].name; | ||
| 1004 | cfg.type = controls[i].type; | ||
| 1005 | |||
| 1006 | cfg.step = controls[i].step; | ||
| 1007 | cfg.menu_skip_mask = 0; | ||
| 1008 | |||
| 1009 | ctx->ctrls[i] = v4l2_ctrl_new_custom(&ctx->ctrl_handler, | ||
| 1010 | &cfg, NULL); | ||
| 1011 | } else { | ||
| 1012 | ctx->ctrls[i] = v4l2_ctrl_new_std(&ctx->ctrl_handler, | ||
| 1013 | &s5p_mfc_dec_ctrl_ops, | ||
| 1014 | controls[i].id, controls[i].minimum, | ||
| 1015 | controls[i].maximum, controls[i].step, | ||
| 1016 | controls[i].default_value); | ||
| 1017 | } | ||
| 1018 | if (ctx->ctrl_handler.error) { | ||
| 1019 | mfc_err("Adding control (%d) failed\n", i); | ||
| 1020 | return ctx->ctrl_handler.error; | ||
| 1021 | } | ||
| 1022 | if (controls[i].is_volatile && ctx->ctrls[i]) | ||
| 1023 | ctx->ctrls[i]->is_volatile = 1; | ||
| 1024 | } | ||
| 1025 | return 0; | ||
| 1026 | } | ||
| 1027 | |||
| 1028 | void s5p_mfc_dec_ctrls_delete(struct s5p_mfc_ctx *ctx) | ||
| 1029 | { | ||
| 1030 | int i; | ||
| 1031 | |||
| 1032 | v4l2_ctrl_handler_free(&ctx->ctrl_handler); | ||
| 1033 | for (i = 0; i < NUM_CTRLS; i++) | ||
| 1034 | ctx->ctrls[i] = NULL; | ||
| 1035 | } | ||
| 1036 | |||
diff --git a/drivers/media/video/s5p-mfc/s5p_mfc_dec.h b/drivers/media/video/s5p-mfc/s5p_mfc_dec.h new file mode 100644 index 000000000000..fb8b215db0e7 --- /dev/null +++ b/drivers/media/video/s5p-mfc/s5p_mfc_dec.h | |||
| @@ -0,0 +1,23 @@ | |||
| 1 | /* | ||
| 2 | * linux/drivers/media/video/s5p-mfc/s5p_mfc_dec.h | ||
| 3 | * | ||
| 4 | * Copyright (C) 2011 Samsung Electronics Co., Ltd. | ||
| 5 | * http://www.samsung.com/ | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License as published by | ||
| 9 | * the Free Software Foundation; either version 2 of the License, or | ||
| 10 | * (at your option) any later version. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #ifndef S5P_MFC_DEC_H_ | ||
| 14 | #define S5P_MFC_DEC_H_ | ||
| 15 | |||
| 16 | struct s5p_mfc_codec_ops *get_dec_codec_ops(void); | ||
| 17 | struct vb2_ops *get_dec_queue_ops(void); | ||
| 18 | const struct v4l2_ioctl_ops *get_dec_v4l2_ioctl_ops(void); | ||
| 19 | struct s5p_mfc_fmt *get_dec_def_fmt(bool src); | ||
| 20 | int s5p_mfc_dec_ctrls_setup(struct s5p_mfc_ctx *ctx); | ||
| 21 | void s5p_mfc_dec_ctrls_delete(struct s5p_mfc_ctx *ctx); | ||
| 22 | |||
| 23 | #endif /* S5P_MFC_DEC_H_ */ | ||
diff --git a/drivers/media/video/s5p-mfc/s5p_mfc_enc.c b/drivers/media/video/s5p-mfc/s5p_mfc_enc.c new file mode 100644 index 000000000000..fee094a14f4c --- /dev/null +++ b/drivers/media/video/s5p-mfc/s5p_mfc_enc.c | |||
| @@ -0,0 +1,1829 @@ | |||
| 1 | /* | ||
| 2 | * linux/drivers/media/video/s5p-mfc/s5p_mfc_enc.c | ||
| 3 | * | ||
| 4 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
| 5 | * http://www.samsung.com/ | ||
| 6 | * | ||
| 7 | * Jeongtae Park <jtp.park@samsung.com> | ||
| 8 | * Kamil Debski <k.debski@samsung.com> | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License as published by | ||
| 12 | * the Free Software Foundation; either version 2 of the License, or | ||
| 13 | * (at your option) any later version. | ||
| 14 | */ | ||
| 15 | |||
| 16 | #include <linux/clk.h> | ||
| 17 | #include <linux/interrupt.h> | ||
| 18 | #include <linux/io.h> | ||
| 19 | #include <linux/module.h> | ||
| 20 | #include <linux/platform_device.h> | ||
| 21 | #include <linux/sched.h> | ||
| 22 | #include <linux/version.h> | ||
| 23 | #include <linux/videodev2.h> | ||
| 24 | #include <linux/workqueue.h> | ||
| 25 | #include <media/v4l2-ctrls.h> | ||
| 26 | #include <media/videobuf2-core.h> | ||
| 27 | #include "regs-mfc.h" | ||
| 28 | #include "s5p_mfc_common.h" | ||
| 29 | #include "s5p_mfc_debug.h" | ||
| 30 | #include "s5p_mfc_enc.h" | ||
| 31 | #include "s5p_mfc_intr.h" | ||
| 32 | #include "s5p_mfc_opr.h" | ||
| 33 | |||
| 34 | static struct s5p_mfc_fmt formats[] = { | ||
| 35 | { | ||
| 36 | .name = "4:2:0 2 Planes 64x32 Tiles", | ||
| 37 | .fourcc = V4L2_PIX_FMT_NV12MT, | ||
| 38 | .codec_mode = S5P_FIMV_CODEC_NONE, | ||
| 39 | .type = MFC_FMT_RAW, | ||
| 40 | .num_planes = 2, | ||
| 41 | }, | ||
| 42 | { | ||
| 43 | .name = "4:2:0 2 Planes", | ||
| 44 | .fourcc = V4L2_PIX_FMT_NV12M, | ||
| 45 | .codec_mode = S5P_FIMV_CODEC_NONE, | ||
| 46 | .type = MFC_FMT_RAW, | ||
| 47 | .num_planes = 2, | ||
| 48 | }, | ||
| 49 | { | ||
| 50 | .name = "H264 Encoded Stream", | ||
| 51 | .fourcc = V4L2_PIX_FMT_H264, | ||
| 52 | .codec_mode = S5P_FIMV_CODEC_H264_ENC, | ||
| 53 | .type = MFC_FMT_ENC, | ||
| 54 | .num_planes = 1, | ||
| 55 | }, | ||
| 56 | { | ||
| 57 | .name = "MPEG4 Encoded Stream", | ||
| 58 | .fourcc = V4L2_PIX_FMT_MPEG4, | ||
| 59 | .codec_mode = S5P_FIMV_CODEC_MPEG4_ENC, | ||
| 60 | .type = MFC_FMT_ENC, | ||
| 61 | .num_planes = 1, | ||
| 62 | }, | ||
| 63 | { | ||
| 64 | .name = "H264 Encoded Stream", | ||
| 65 | .fourcc = V4L2_PIX_FMT_H263, | ||
| 66 | .codec_mode = S5P_FIMV_CODEC_H263_ENC, | ||
| 67 | .type = MFC_FMT_ENC, | ||
| 68 | .num_planes = 1, | ||
| 69 | }, | ||
| 70 | }; | ||
| 71 | |||
| 72 | #define NUM_FORMATS ARRAY_SIZE(formats) | ||
| 73 | static struct s5p_mfc_fmt *find_format(struct v4l2_format *f, unsigned int t) | ||
| 74 | { | ||
| 75 | unsigned int i; | ||
| 76 | |||
| 77 | for (i = 0; i < NUM_FORMATS; i++) { | ||
| 78 | if (formats[i].fourcc == f->fmt.pix_mp.pixelformat && | ||
| 79 | formats[i].type == t) | ||
| 80 | return &formats[i]; | ||
| 81 | } | ||
| 82 | return NULL; | ||
| 83 | } | ||
| 84 | |||
| 85 | static struct mfc_control controls[] = { | ||
| 86 | { | ||
| 87 | .id = V4L2_CID_MPEG_VIDEO_GOP_SIZE, | ||
| 88 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 89 | .minimum = 0, | ||
| 90 | .maximum = (1 << 16) - 1, | ||
| 91 | .step = 1, | ||
| 92 | .default_value = 0, | ||
| 93 | }, | ||
| 94 | { | ||
| 95 | .id = V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE, | ||
| 96 | .type = V4L2_CTRL_TYPE_MENU, | ||
| 97 | .minimum = V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, | ||
| 98 | .maximum = V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES, | ||
| 99 | .default_value = V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE, | ||
| 100 | .menu_skip_mask = 0, | ||
| 101 | }, | ||
| 102 | { | ||
| 103 | .id = V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, | ||
| 104 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 105 | .minimum = 1, | ||
| 106 | .maximum = (1 << 16) - 1, | ||
| 107 | .step = 1, | ||
| 108 | .default_value = 1, | ||
| 109 | }, | ||
| 110 | { | ||
| 111 | .id = V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, | ||
| 112 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 113 | .minimum = 1900, | ||
| 114 | .maximum = (1 << 30) - 1, | ||
| 115 | .step = 1, | ||
| 116 | .default_value = 1900, | ||
| 117 | }, | ||
| 118 | { | ||
| 119 | .id = V4L2_CID_MPEG_VIDEO_CYCLIC_INTRA_REFRESH_MB, | ||
| 120 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 121 | .minimum = 0, | ||
| 122 | .maximum = (1 << 16) - 1, | ||
| 123 | .step = 1, | ||
| 124 | .default_value = 0, | ||
| 125 | }, | ||
| 126 | { | ||
| 127 | .id = V4L2_CID_MPEG_MFC51_VIDEO_PADDING, | ||
| 128 | .type = V4L2_CTRL_TYPE_BOOLEAN, | ||
| 129 | .name = "Padding Control Enable", | ||
| 130 | .minimum = 0, | ||
| 131 | .maximum = 1, | ||
| 132 | .step = 1, | ||
| 133 | .default_value = 0, | ||
| 134 | }, | ||
| 135 | { | ||
| 136 | .id = V4L2_CID_MPEG_MFC51_VIDEO_PADDING_YUV, | ||
| 137 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 138 | .name = "Padding Color YUV Value", | ||
| 139 | .minimum = 0, | ||
| 140 | .maximum = (1 << 25) - 1, | ||
| 141 | .step = 1, | ||
| 142 | .default_value = 0, | ||
| 143 | }, | ||
| 144 | { | ||
| 145 | .id = V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE, | ||
| 146 | .type = V4L2_CTRL_TYPE_BOOLEAN, | ||
| 147 | .minimum = 0, | ||
| 148 | .maximum = 1, | ||
| 149 | .step = 1, | ||
| 150 | .default_value = 0, | ||
| 151 | }, | ||
| 152 | { | ||
| 153 | .id = V4L2_CID_MPEG_VIDEO_BITRATE, | ||
| 154 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 155 | .minimum = 1, | ||
| 156 | .maximum = (1 << 30) - 1, | ||
| 157 | .step = 1, | ||
| 158 | .default_value = 1, | ||
| 159 | }, | ||
| 160 | { | ||
| 161 | .id = V4L2_CID_MPEG_MFC51_VIDEO_RC_REACTION_COEFF, | ||
| 162 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 163 | .name = "Rate Control Reaction Coeff.", | ||
| 164 | .minimum = 1, | ||
| 165 | .maximum = (1 << 16) - 1, | ||
| 166 | .step = 1, | ||
| 167 | .default_value = 1, | ||
| 168 | }, | ||
| 169 | { | ||
| 170 | .id = V4L2_CID_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE, | ||
| 171 | .type = V4L2_CTRL_TYPE_MENU, | ||
| 172 | .name = "Force frame type", | ||
| 173 | .minimum = V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_DISABLED, | ||
| 174 | .maximum = V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_NOT_CODED, | ||
| 175 | .default_value = V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_DISABLED, | ||
| 176 | .menu_skip_mask = 0, | ||
| 177 | }, | ||
| 178 | { | ||
| 179 | .id = V4L2_CID_MPEG_VIDEO_VBV_SIZE, | ||
| 180 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 181 | .minimum = 0, | ||
| 182 | .maximum = (1 << 16) - 1, | ||
| 183 | .step = 1, | ||
| 184 | .default_value = 0, | ||
| 185 | }, | ||
| 186 | { | ||
| 187 | .id = V4L2_CID_MPEG_VIDEO_H264_CPB_SIZE, | ||
| 188 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 189 | .minimum = 0, | ||
| 190 | .maximum = (1 << 16) - 1, | ||
| 191 | .step = 1, | ||
| 192 | .default_value = 0, | ||
| 193 | }, | ||
| 194 | { | ||
| 195 | .id = V4L2_CID_MPEG_VIDEO_HEADER_MODE, | ||
| 196 | .type = V4L2_CTRL_TYPE_MENU, | ||
| 197 | .minimum = V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, | ||
| 198 | .maximum = V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, | ||
| 199 | .default_value = V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, | ||
| 200 | .menu_skip_mask = 0, | ||
| 201 | }, | ||
| 202 | { | ||
| 203 | .id = V4L2_CID_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE, | ||
| 204 | .type = V4L2_CTRL_TYPE_MENU, | ||
| 205 | .name = "Frame Skip Enable", | ||
| 206 | .minimum = V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_DISABLED, | ||
| 207 | .maximum = V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT, | ||
| 208 | .menu_skip_mask = 0, | ||
| 209 | .default_value = V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_DISABLED, | ||
| 210 | }, | ||
| 211 | { | ||
| 212 | .id = V4L2_CID_MPEG_MFC51_VIDEO_RC_FIXED_TARGET_BIT, | ||
| 213 | .type = V4L2_CTRL_TYPE_BOOLEAN, | ||
| 214 | .name = "Fixed Target Bit Enable", | ||
| 215 | .minimum = 0, | ||
| 216 | .maximum = 1, | ||
| 217 | .default_value = 0, | ||
| 218 | .menu_skip_mask = 0, | ||
| 219 | }, | ||
| 220 | { | ||
| 221 | .id = V4L2_CID_MPEG_VIDEO_B_FRAMES, | ||
| 222 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 223 | .minimum = 0, | ||
| 224 | .maximum = 2, | ||
| 225 | .step = 1, | ||
| 226 | .default_value = 0, | ||
| 227 | }, | ||
| 228 | { | ||
| 229 | .id = V4L2_CID_MPEG_VIDEO_H264_PROFILE, | ||
| 230 | .type = V4L2_CTRL_TYPE_MENU, | ||
| 231 | .minimum = V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, | ||
| 232 | .maximum = V4L2_MPEG_VIDEO_H264_PROFILE_MULTIVIEW_HIGH, | ||
| 233 | .default_value = V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, | ||
| 234 | .menu_skip_mask = ~( | ||
| 235 | (1 << V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | | ||
| 236 | (1 << V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | | ||
| 237 | (1 << V4L2_MPEG_VIDEO_H264_PROFILE_HIGH) | ||
| 238 | ), | ||
| 239 | }, | ||
| 240 | { | ||
| 241 | .id = V4L2_CID_MPEG_VIDEO_H264_LEVEL, | ||
| 242 | .type = V4L2_CTRL_TYPE_MENU, | ||
| 243 | .minimum = V4L2_MPEG_VIDEO_H264_LEVEL_1_0, | ||
| 244 | .maximum = V4L2_MPEG_VIDEO_H264_LEVEL_4_0, | ||
| 245 | .default_value = V4L2_MPEG_VIDEO_H264_LEVEL_1_0, | ||
| 246 | .menu_skip_mask = ~( | ||
| 247 | (1 << V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | | ||
| 248 | (1 << V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | | ||
| 249 | (1 << V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | | ||
| 250 | (1 << V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | ||
| 251 | ), | ||
| 252 | }, | ||
| 253 | { | ||
| 254 | .id = V4L2_CID_MPEG_VIDEO_MPEG4_LEVEL, | ||
| 255 | .type = V4L2_CTRL_TYPE_MENU, | ||
| 256 | .minimum = V4L2_MPEG_VIDEO_MPEG4_LEVEL_0, | ||
| 257 | .maximum = V4L2_MPEG_VIDEO_MPEG4_LEVEL_5, | ||
| 258 | .default_value = V4L2_MPEG_VIDEO_MPEG4_LEVEL_0, | ||
| 259 | .menu_skip_mask = 0, | ||
| 260 | }, | ||
| 261 | { | ||
| 262 | .id = V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE, | ||
| 263 | .type = V4L2_CTRL_TYPE_MENU, | ||
| 264 | .minimum = V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, | ||
| 265 | .maximum = V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED_AT_SLICE_BOUNDARY, | ||
| 266 | .default_value = V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED, | ||
| 267 | .menu_skip_mask = 0, | ||
| 268 | }, | ||
| 269 | { | ||
| 270 | .id = V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA, | ||
| 271 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 272 | .minimum = -6, | ||
| 273 | .maximum = 6, | ||
| 274 | .step = 1, | ||
| 275 | .default_value = 0, | ||
| 276 | }, | ||
| 277 | { | ||
| 278 | .id = V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA, | ||
| 279 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 280 | .minimum = -6, | ||
| 281 | .maximum = 6, | ||
| 282 | .step = 1, | ||
| 283 | .default_value = 0, | ||
| 284 | }, | ||
| 285 | { | ||
| 286 | .id = V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE, | ||
| 287 | .type = V4L2_CTRL_TYPE_MENU, | ||
| 288 | .minimum = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, | ||
| 289 | .maximum = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, | ||
| 290 | .default_value = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, | ||
| 291 | .menu_skip_mask = 0, | ||
| 292 | }, | ||
| 293 | { | ||
| 294 | .id = V4L2_CID_MPEG_MFC51_VIDEO_H264_NUM_REF_PIC_FOR_P, | ||
| 295 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 296 | .name = "The Number of Ref. Pic for P", | ||
| 297 | .minimum = 1, | ||
| 298 | .maximum = 2, | ||
| 299 | .step = 1, | ||
| 300 | .default_value = 1, | ||
| 301 | }, | ||
| 302 | { | ||
| 303 | .id = V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM, | ||
| 304 | .type = V4L2_CTRL_TYPE_BOOLEAN, | ||
| 305 | .minimum = 0, | ||
| 306 | .maximum = 1, | ||
| 307 | .step = 1, | ||
| 308 | .default_value = 0, | ||
| 309 | }, | ||
| 310 | { | ||
| 311 | .id = V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE, | ||
| 312 | .type = V4L2_CTRL_TYPE_BOOLEAN, | ||
| 313 | .minimum = 0, | ||
| 314 | .maximum = 1, | ||
| 315 | .step = 1, | ||
| 316 | .default_value = 0, | ||
| 317 | }, | ||
| 318 | { | ||
| 319 | .id = V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, | ||
| 320 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 321 | .minimum = 0, | ||
| 322 | .maximum = 51, | ||
| 323 | .step = 1, | ||
| 324 | .default_value = 1, | ||
| 325 | }, | ||
| 326 | { | ||
| 327 | .id = V4L2_CID_MPEG_VIDEO_H264_MIN_QP, | ||
| 328 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 329 | .minimum = 0, | ||
| 330 | .maximum = 51, | ||
| 331 | .step = 1, | ||
| 332 | .default_value = 1, | ||
| 333 | }, | ||
| 334 | { | ||
| 335 | .id = V4L2_CID_MPEG_VIDEO_H264_MAX_QP, | ||
| 336 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 337 | .minimum = 0, | ||
| 338 | .maximum = 51, | ||
| 339 | .step = 1, | ||
| 340 | .default_value = 1, | ||
| 341 | }, | ||
| 342 | { | ||
| 343 | .id = V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, | ||
| 344 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 345 | .minimum = 0, | ||
| 346 | .maximum = 51, | ||
| 347 | .step = 1, | ||
| 348 | .default_value = 1, | ||
| 349 | }, | ||
| 350 | { | ||
| 351 | .id = V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP, | ||
| 352 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 353 | .minimum = 0, | ||
| 354 | .maximum = 51, | ||
| 355 | .step = 1, | ||
| 356 | .default_value = 1, | ||
| 357 | }, | ||
| 358 | { | ||
| 359 | .id = V4L2_CID_MPEG_VIDEO_H263_I_FRAME_QP, | ||
| 360 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 361 | .name = "H263 I-Frame QP value", | ||
| 362 | .minimum = 1, | ||
| 363 | .maximum = 31, | ||
| 364 | .step = 1, | ||
| 365 | .default_value = 1, | ||
| 366 | }, | ||
| 367 | { | ||
| 368 | .id = V4L2_CID_MPEG_VIDEO_H263_MIN_QP, | ||
| 369 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 370 | .name = "H263 Minimum QP value", | ||
| 371 | .minimum = 1, | ||
| 372 | .maximum = 31, | ||
| 373 | .step = 1, | ||
| 374 | .default_value = 1, | ||
| 375 | }, | ||
| 376 | { | ||
| 377 | .id = V4L2_CID_MPEG_VIDEO_H263_MAX_QP, | ||
| 378 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 379 | .name = "H263 Maximum QP value", | ||
| 380 | .minimum = 1, | ||
| 381 | .maximum = 31, | ||
| 382 | .step = 1, | ||
| 383 | .default_value = 1, | ||
| 384 | }, | ||
| 385 | { | ||
| 386 | .id = V4L2_CID_MPEG_VIDEO_H263_P_FRAME_QP, | ||
| 387 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 388 | .name = "H263 P frame QP value", | ||
| 389 | .minimum = 1, | ||
| 390 | .maximum = 31, | ||
| 391 | .step = 1, | ||
| 392 | .default_value = 1, | ||
| 393 | }, | ||
| 394 | { | ||
| 395 | .id = V4L2_CID_MPEG_VIDEO_H263_B_FRAME_QP, | ||
| 396 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 397 | .name = "H263 B frame QP value", | ||
| 398 | .minimum = 1, | ||
| 399 | .maximum = 31, | ||
| 400 | .step = 1, | ||
| 401 | .default_value = 1, | ||
| 402 | }, | ||
| 403 | { | ||
| 404 | .id = V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP, | ||
| 405 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 406 | .name = "MPEG4 I-Frame QP value", | ||
| 407 | .minimum = 1, | ||
| 408 | .maximum = 31, | ||
| 409 | .step = 1, | ||
| 410 | .default_value = 1, | ||
| 411 | }, | ||
| 412 | { | ||
| 413 | .id = V4L2_CID_MPEG_VIDEO_MPEG4_MIN_QP, | ||
| 414 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 415 | .name = "MPEG4 Minimum QP value", | ||
| 416 | .minimum = 1, | ||
| 417 | .maximum = 31, | ||
| 418 | .step = 1, | ||
| 419 | .default_value = 1, | ||
| 420 | }, | ||
| 421 | { | ||
| 422 | .id = V4L2_CID_MPEG_VIDEO_MPEG4_MAX_QP, | ||
| 423 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 424 | .name = "MPEG4 Maximum QP value", | ||
| 425 | .minimum = 0, | ||
| 426 | .maximum = 51, | ||
| 427 | .step = 1, | ||
| 428 | .default_value = 1, | ||
| 429 | }, | ||
| 430 | { | ||
| 431 | .id = V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP, | ||
| 432 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 433 | .name = "MPEG4 P frame QP value", | ||
| 434 | .minimum = 1, | ||
| 435 | .maximum = 31, | ||
| 436 | .step = 1, | ||
| 437 | .default_value = 1, | ||
| 438 | }, | ||
| 439 | { | ||
| 440 | .id = V4L2_CID_MPEG_VIDEO_MPEG4_B_FRAME_QP, | ||
| 441 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 442 | .name = "MPEG4 B frame QP value", | ||
| 443 | .minimum = 1, | ||
| 444 | .maximum = 31, | ||
| 445 | .step = 1, | ||
| 446 | .default_value = 1, | ||
| 447 | }, | ||
| 448 | { | ||
| 449 | .id = V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_DARK, | ||
| 450 | .type = V4L2_CTRL_TYPE_BOOLEAN, | ||
| 451 | .name = "H264 Dark Reg Adaptive RC", | ||
| 452 | .minimum = 0, | ||
| 453 | .maximum = 1, | ||
| 454 | .step = 1, | ||
| 455 | .default_value = 0, | ||
| 456 | }, | ||
| 457 | { | ||
| 458 | .id = V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_SMOOTH, | ||
| 459 | .type = V4L2_CTRL_TYPE_BOOLEAN, | ||
| 460 | .name = "H264 Smooth Reg Adaptive RC", | ||
| 461 | .minimum = 0, | ||
| 462 | .maximum = 1, | ||
| 463 | .step = 1, | ||
| 464 | .default_value = 0, | ||
| 465 | }, | ||
| 466 | { | ||
| 467 | .id = V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_STATIC, | ||
| 468 | .type = V4L2_CTRL_TYPE_BOOLEAN, | ||
| 469 | .name = "H264 Static Reg Adaptive RC", | ||
| 470 | .minimum = 0, | ||
| 471 | .maximum = 1, | ||
| 472 | .step = 1, | ||
| 473 | .default_value = 0, | ||
| 474 | }, | ||
| 475 | { | ||
| 476 | .id = V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_ACTIVITY, | ||
| 477 | .type = V4L2_CTRL_TYPE_BOOLEAN, | ||
| 478 | .name = "H264 Activity Reg Adaptive RC", | ||
| 479 | .minimum = 0, | ||
| 480 | .maximum = 1, | ||
| 481 | .step = 1, | ||
| 482 | .default_value = 0, | ||
| 483 | }, | ||
| 484 | { | ||
| 485 | .id = V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_ENABLE, | ||
| 486 | .type = V4L2_CTRL_TYPE_BOOLEAN, | ||
| 487 | .minimum = 0, | ||
| 488 | .maximum = 1, | ||
| 489 | .step = 1, | ||
| 490 | .default_value = 0, | ||
| 491 | }, | ||
| 492 | { | ||
| 493 | .id = V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_IDC, | ||
| 494 | .type = V4L2_CTRL_TYPE_MENU, | ||
| 495 | .minimum = V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_UNSPECIFIED, | ||
| 496 | .maximum = V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED, | ||
| 497 | .default_value = 0, | ||
| 498 | .menu_skip_mask = 0, | ||
| 499 | }, | ||
| 500 | { | ||
| 501 | .id = V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_WIDTH, | ||
| 502 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 503 | .minimum = 0, | ||
| 504 | .maximum = (1 << 16) - 1, | ||
| 505 | .step = 1, | ||
| 506 | .default_value = 0, | ||
| 507 | }, | ||
| 508 | { | ||
| 509 | .id = V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_HEIGHT, | ||
| 510 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 511 | .minimum = 0, | ||
| 512 | .maximum = (1 << 16) - 1, | ||
| 513 | .step = 1, | ||
| 514 | .default_value = 0, | ||
| 515 | }, | ||
| 516 | { | ||
| 517 | .id = V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, | ||
| 518 | .type = V4L2_CTRL_TYPE_BOOLEAN, | ||
| 519 | .minimum = 0, | ||
| 520 | .maximum = 1, | ||
| 521 | .step = 1, | ||
| 522 | .default_value = 1, | ||
| 523 | }, | ||
| 524 | { | ||
| 525 | .id = V4L2_CID_MPEG_VIDEO_H264_I_PERIOD, | ||
| 526 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
| 527 | .minimum = 0, | ||
| 528 | .maximum = (1 << 16) - 1, | ||
| 529 | .step = 1, | ||
| 530 | .default_value = 0, | ||
| 531 | }, | ||
| 532 | { | ||
| 533 | .id = V4L2_CID_MPEG_VIDEO_MPEG4_PROFILE, | ||
| 534 | .type = V4L2_CTRL_TYPE_MENU, | ||
| 535 | .minimum = V4L2_MPEG_VIDEO_MPEG4_PROFILE_SIMPLE, | ||
| 536 | .maximum = V4L2_MPEG_VIDEO_MPEG4_PROFILE_ADVANCED_SIMPLE, | ||
| 537 | .default_value = 0, | ||
| 538 | .menu_skip_mask = 0, | ||
| 539 | }, | ||
| 540 | { | ||
| 541 | .id = V4L2_CID_MPEG_VIDEO_MPEG4_QPEL, | ||
| 542 | .type = V4L2_CTRL_TYPE_BOOLEAN, | ||
| 543 | .minimum = 0, | ||
| 544 | .maximum = 1, | ||
| 545 | .step = 1, | ||
| 546 | .default_value = 0, | ||
| 547 | }, | ||
| 548 | }; | ||
| 549 | |||
| 550 | #define NUM_CTRLS ARRAY_SIZE(controls) | ||
| 551 | static const char * const *mfc51_get_menu(u32 id) | ||
| 552 | { | ||
| 553 | static const char * const mfc51_video_frame_skip[] = { | ||
| 554 | "Disabled", | ||
| 555 | "Level Limit", | ||
| 556 | "VBV/CPB Limit", | ||
| 557 | NULL, | ||
| 558 | }; | ||
| 559 | static const char * const mfc51_video_force_frame[] = { | ||
| 560 | "Disabled", | ||
| 561 | "I Frame", | ||
| 562 | "Not Coded", | ||
| 563 | NULL, | ||
| 564 | }; | ||
| 565 | switch (id) { | ||
| 566 | case V4L2_CID_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE: | ||
| 567 | return mfc51_video_frame_skip; | ||
| 568 | case V4L2_CID_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE: | ||
| 569 | return mfc51_video_force_frame; | ||
| 570 | } | ||
| 571 | return NULL; | ||
| 572 | } | ||
| 573 | |||
| 574 | static int s5p_mfc_ctx_ready(struct s5p_mfc_ctx *ctx) | ||
| 575 | { | ||
| 576 | mfc_debug(2, "src=%d, dst=%d, state=%d\n", | ||
| 577 | ctx->src_queue_cnt, ctx->dst_queue_cnt, ctx->state); | ||
| 578 | /* context is ready to make header */ | ||
| 579 | if (ctx->state == MFCINST_GOT_INST && ctx->dst_queue_cnt >= 1) | ||
| 580 | return 1; | ||
| 581 | /* context is ready to encode a frame */ | ||
| 582 | if (ctx->state == MFCINST_RUNNING && | ||
| 583 | ctx->src_queue_cnt >= 1 && ctx->dst_queue_cnt >= 1) | ||
| 584 | return 1; | ||
| 585 | /* context is ready to encode remain frames */ | ||
| 586 | if (ctx->state == MFCINST_FINISHING && | ||
| 587 | ctx->src_queue_cnt >= 1 && ctx->dst_queue_cnt >= 1) | ||
| 588 | return 1; | ||
| 589 | mfc_debug(2, "ctx is not ready\n"); | ||
| 590 | return 0; | ||
| 591 | } | ||
| 592 | |||
| 593 | static void cleanup_ref_queue(struct s5p_mfc_ctx *ctx) | ||
| 594 | { | ||
| 595 | struct s5p_mfc_buf *mb_entry; | ||
| 596 | unsigned long mb_y_addr, mb_c_addr; | ||
| 597 | |||
| 598 | /* move buffers in ref queue to src queue */ | ||
| 599 | while (!list_empty(&ctx->ref_queue)) { | ||
| 600 | mb_entry = list_entry((&ctx->ref_queue)->next, | ||
| 601 | struct s5p_mfc_buf, list); | ||
| 602 | mb_y_addr = vb2_dma_contig_plane_paddr(mb_entry->b, 0); | ||
| 603 | mb_c_addr = vb2_dma_contig_plane_paddr(mb_entry->b, 1); | ||
| 604 | list_del(&mb_entry->list); | ||
| 605 | ctx->ref_queue_cnt--; | ||
| 606 | list_add_tail(&mb_entry->list, &ctx->src_queue); | ||
| 607 | ctx->src_queue_cnt++; | ||
| 608 | } | ||
| 609 | mfc_debug(2, "enc src count: %d, enc ref count: %d\n", | ||
| 610 | ctx->src_queue_cnt, ctx->ref_queue_cnt); | ||
| 611 | INIT_LIST_HEAD(&ctx->ref_queue); | ||
| 612 | ctx->ref_queue_cnt = 0; | ||
| 613 | } | ||
| 614 | |||
| 615 | static int enc_pre_seq_start(struct s5p_mfc_ctx *ctx) | ||
| 616 | { | ||
| 617 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 618 | struct s5p_mfc_buf *dst_mb; | ||
| 619 | unsigned long dst_addr; | ||
| 620 | unsigned int dst_size; | ||
| 621 | unsigned long flags; | ||
| 622 | |||
| 623 | spin_lock_irqsave(&dev->irqlock, flags); | ||
| 624 | dst_mb = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list); | ||
| 625 | dst_addr = vb2_dma_contig_plane_paddr(dst_mb->b, 0); | ||
| 626 | dst_size = vb2_plane_size(dst_mb->b, 0); | ||
| 627 | s5p_mfc_set_enc_stream_buffer(ctx, dst_addr, dst_size); | ||
| 628 | spin_unlock_irqrestore(&dev->irqlock, flags); | ||
| 629 | return 0; | ||
| 630 | } | ||
| 631 | |||
| 632 | static int enc_post_seq_start(struct s5p_mfc_ctx *ctx) | ||
| 633 | { | ||
| 634 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 635 | struct s5p_mfc_enc_params *p = &ctx->enc_params; | ||
| 636 | struct s5p_mfc_buf *dst_mb; | ||
| 637 | unsigned long flags; | ||
| 638 | |||
| 639 | if (p->seq_hdr_mode == V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) { | ||
| 640 | spin_lock_irqsave(&dev->irqlock, flags); | ||
| 641 | dst_mb = list_entry(ctx->dst_queue.next, | ||
| 642 | struct s5p_mfc_buf, list); | ||
| 643 | list_del(&dst_mb->list); | ||
| 644 | ctx->dst_queue_cnt--; | ||
| 645 | vb2_set_plane_payload(dst_mb->b, 0, | ||
| 646 | s5p_mfc_get_enc_strm_size()); | ||
| 647 | vb2_buffer_done(dst_mb->b, VB2_BUF_STATE_DONE); | ||
| 648 | spin_unlock_irqrestore(&dev->irqlock, flags); | ||
| 649 | } | ||
| 650 | ctx->state = MFCINST_RUNNING; | ||
| 651 | if (s5p_mfc_ctx_ready(ctx)) { | ||
| 652 | spin_lock_irqsave(&dev->condlock, flags); | ||
| 653 | set_bit(ctx->num, &dev->ctx_work_bits); | ||
| 654 | spin_unlock_irqrestore(&dev->condlock, flags); | ||
| 655 | } | ||
| 656 | s5p_mfc_try_run(dev); | ||
| 657 | return 0; | ||
| 658 | } | ||
| 659 | |||
| 660 | static int enc_pre_frame_start(struct s5p_mfc_ctx *ctx) | ||
| 661 | { | ||
| 662 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 663 | struct s5p_mfc_buf *dst_mb; | ||
| 664 | struct s5p_mfc_buf *src_mb; | ||
| 665 | unsigned long flags; | ||
| 666 | unsigned long src_y_addr, src_c_addr, dst_addr; | ||
| 667 | unsigned int dst_size; | ||
| 668 | |||
| 669 | spin_lock_irqsave(&dev->irqlock, flags); | ||
| 670 | src_mb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list); | ||
| 671 | src_y_addr = vb2_dma_contig_plane_paddr(src_mb->b, 0); | ||
| 672 | src_c_addr = vb2_dma_contig_plane_paddr(src_mb->b, 1); | ||
| 673 | s5p_mfc_set_enc_frame_buffer(ctx, src_y_addr, src_c_addr); | ||
| 674 | spin_unlock_irqrestore(&dev->irqlock, flags); | ||
| 675 | |||
| 676 | spin_lock_irqsave(&dev->irqlock, flags); | ||
| 677 | dst_mb = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list); | ||
| 678 | dst_addr = vb2_dma_contig_plane_paddr(dst_mb->b, 0); | ||
| 679 | dst_size = vb2_plane_size(dst_mb->b, 0); | ||
| 680 | s5p_mfc_set_enc_stream_buffer(ctx, dst_addr, dst_size); | ||
| 681 | spin_unlock_irqrestore(&dev->irqlock, flags); | ||
| 682 | |||
| 683 | return 0; | ||
| 684 | } | ||
| 685 | |||
| 686 | static int enc_post_frame_start(struct s5p_mfc_ctx *ctx) | ||
| 687 | { | ||
| 688 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 689 | struct s5p_mfc_buf *mb_entry; | ||
| 690 | unsigned long enc_y_addr, enc_c_addr; | ||
| 691 | unsigned long mb_y_addr, mb_c_addr; | ||
| 692 | int slice_type; | ||
| 693 | unsigned int strm_size; | ||
| 694 | unsigned long flags; | ||
| 695 | |||
| 696 | slice_type = s5p_mfc_get_enc_slice_type(); | ||
| 697 | strm_size = s5p_mfc_get_enc_strm_size(); | ||
| 698 | mfc_debug(2, "Encoded slice type: %d", slice_type); | ||
| 699 | mfc_debug(2, "Encoded stream size: %d", strm_size); | ||
| 700 | mfc_debug(2, "Display order: %d", | ||
| 701 | mfc_read(dev, S5P_FIMV_ENC_SI_PIC_CNT)); | ||
| 702 | spin_lock_irqsave(&dev->irqlock, flags); | ||
| 703 | if (slice_type >= 0) { | ||
| 704 | s5p_mfc_get_enc_frame_buffer(ctx, &enc_y_addr, &enc_c_addr); | ||
| 705 | list_for_each_entry(mb_entry, &ctx->src_queue, list) { | ||
| 706 | mb_y_addr = vb2_dma_contig_plane_paddr(mb_entry->b, 0); | ||
| 707 | mb_c_addr = vb2_dma_contig_plane_paddr(mb_entry->b, 1); | ||
| 708 | if ((enc_y_addr == mb_y_addr) && | ||
| 709 | (enc_c_addr == mb_c_addr)) { | ||
| 710 | list_del(&mb_entry->list); | ||
| 711 | ctx->src_queue_cnt--; | ||
| 712 | vb2_buffer_done(mb_entry->b, | ||
| 713 | VB2_BUF_STATE_DONE); | ||
| 714 | break; | ||
| 715 | } | ||
| 716 | } | ||
| 717 | list_for_each_entry(mb_entry, &ctx->ref_queue, list) { | ||
| 718 | mb_y_addr = vb2_dma_contig_plane_paddr(mb_entry->b, 0); | ||
| 719 | mb_c_addr = vb2_dma_contig_plane_paddr(mb_entry->b, 1); | ||
| 720 | if ((enc_y_addr == mb_y_addr) && | ||
| 721 | (enc_c_addr == mb_c_addr)) { | ||
| 722 | list_del(&mb_entry->list); | ||
| 723 | ctx->ref_queue_cnt--; | ||
| 724 | vb2_buffer_done(mb_entry->b, | ||
| 725 | VB2_BUF_STATE_DONE); | ||
| 726 | break; | ||
| 727 | } | ||
| 728 | } | ||
| 729 | } | ||
| 730 | if ((ctx->src_queue_cnt > 0) && (ctx->state == MFCINST_RUNNING)) { | ||
| 731 | mb_entry = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, | ||
| 732 | list); | ||
| 733 | if (mb_entry->used) { | ||
| 734 | list_del(&mb_entry->list); | ||
| 735 | ctx->src_queue_cnt--; | ||
| 736 | list_add_tail(&mb_entry->list, &ctx->ref_queue); | ||
| 737 | ctx->ref_queue_cnt++; | ||
| 738 | } | ||
| 739 | mfc_debug(2, "enc src count: %d, enc ref count: %d\n", | ||
| 740 | ctx->src_queue_cnt, ctx->ref_queue_cnt); | ||
| 741 | } | ||
| 742 | if (strm_size > 0) { | ||
| 743 | /* at least one more dest. buffers exist always */ | ||
| 744 | mb_entry = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, | ||
| 745 | list); | ||
| 746 | list_del(&mb_entry->list); | ||
| 747 | ctx->dst_queue_cnt--; | ||
| 748 | switch (slice_type) { | ||
| 749 | case S5P_FIMV_ENC_SI_SLICE_TYPE_I: | ||
| 750 | mb_entry->b->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME; | ||
| 751 | break; | ||
| 752 | case S5P_FIMV_ENC_SI_SLICE_TYPE_P: | ||
| 753 | mb_entry->b->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME; | ||
| 754 | break; | ||
| 755 | case S5P_FIMV_ENC_SI_SLICE_TYPE_B: | ||
| 756 | mb_entry->b->v4l2_buf.flags |= V4L2_BUF_FLAG_BFRAME; | ||
| 757 | break; | ||
| 758 | } | ||
| 759 | vb2_set_plane_payload(mb_entry->b, 0, strm_size); | ||
| 760 | vb2_buffer_done(mb_entry->b, VB2_BUF_STATE_DONE); | ||
| 761 | } | ||
| 762 | spin_unlock_irqrestore(&dev->irqlock, flags); | ||
| 763 | if ((ctx->src_queue_cnt == 0) || (ctx->dst_queue_cnt == 0)) { | ||
| 764 | spin_lock(&dev->condlock); | ||
| 765 | clear_bit(ctx->num, &dev->ctx_work_bits); | ||
| 766 | spin_unlock(&dev->condlock); | ||
| 767 | } | ||
| 768 | return 0; | ||
| 769 | } | ||
| 770 | |||
| 771 | static struct s5p_mfc_codec_ops encoder_codec_ops = { | ||
| 772 | .pre_seq_start = enc_pre_seq_start, | ||
| 773 | .post_seq_start = enc_post_seq_start, | ||
| 774 | .pre_frame_start = enc_pre_frame_start, | ||
| 775 | .post_frame_start = enc_post_frame_start, | ||
| 776 | }; | ||
| 777 | |||
| 778 | /* Query capabilities of the device */ | ||
| 779 | static int vidioc_querycap(struct file *file, void *priv, | ||
| 780 | struct v4l2_capability *cap) | ||
| 781 | { | ||
| 782 | struct s5p_mfc_dev *dev = video_drvdata(file); | ||
| 783 | |||
| 784 | strncpy(cap->driver, dev->plat_dev->name, sizeof(cap->driver) - 1); | ||
| 785 | strncpy(cap->card, dev->plat_dev->name, sizeof(cap->card) - 1); | ||
| 786 | cap->bus_info[0] = 0; | ||
| 787 | cap->version = KERNEL_VERSION(1, 0, 0); | ||
| 788 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | ||
| 789 | | V4L2_CAP_VIDEO_OUTPUT | ||
| 790 | | V4L2_CAP_STREAMING; | ||
| 791 | return 0; | ||
| 792 | } | ||
| 793 | |||
| 794 | static int vidioc_enum_fmt(struct v4l2_fmtdesc *f, bool mplane, bool out) | ||
| 795 | { | ||
| 796 | struct s5p_mfc_fmt *fmt; | ||
| 797 | int i, j = 0; | ||
| 798 | |||
| 799 | for (i = 0; i < ARRAY_SIZE(formats); ++i) { | ||
| 800 | if (mplane && formats[i].num_planes == 1) | ||
| 801 | continue; | ||
| 802 | else if (!mplane && formats[i].num_planes > 1) | ||
| 803 | continue; | ||
| 804 | if (out && formats[i].type != MFC_FMT_RAW) | ||
| 805 | continue; | ||
| 806 | else if (!out && formats[i].type != MFC_FMT_ENC) | ||
| 807 | continue; | ||
| 808 | if (j == f->index) { | ||
| 809 | fmt = &formats[i]; | ||
| 810 | strlcpy(f->description, fmt->name, | ||
| 811 | sizeof(f->description)); | ||
| 812 | f->pixelformat = fmt->fourcc; | ||
| 813 | return 0; | ||
| 814 | } | ||
| 815 | ++j; | ||
| 816 | } | ||
| 817 | return -EINVAL; | ||
| 818 | } | ||
| 819 | |||
| 820 | static int vidioc_enum_fmt_vid_cap(struct file *file, void *pirv, | ||
| 821 | struct v4l2_fmtdesc *f) | ||
| 822 | { | ||
| 823 | return vidioc_enum_fmt(f, false, false); | ||
| 824 | } | ||
| 825 | |||
| 826 | static int vidioc_enum_fmt_vid_cap_mplane(struct file *file, void *pirv, | ||
| 827 | struct v4l2_fmtdesc *f) | ||
| 828 | { | ||
| 829 | return vidioc_enum_fmt(f, true, false); | ||
| 830 | } | ||
| 831 | |||
| 832 | static int vidioc_enum_fmt_vid_out(struct file *file, void *prov, | ||
| 833 | struct v4l2_fmtdesc *f) | ||
| 834 | { | ||
| 835 | return vidioc_enum_fmt(f, false, true); | ||
| 836 | } | ||
| 837 | |||
| 838 | static int vidioc_enum_fmt_vid_out_mplane(struct file *file, void *prov, | ||
| 839 | struct v4l2_fmtdesc *f) | ||
| 840 | { | ||
| 841 | return vidioc_enum_fmt(f, true, true); | ||
| 842 | } | ||
| 843 | |||
| 844 | static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f) | ||
| 845 | { | ||
| 846 | struct s5p_mfc_ctx *ctx = fh_to_ctx(priv); | ||
| 847 | struct v4l2_pix_format_mplane *pix_fmt_mp = &f->fmt.pix_mp; | ||
| 848 | |||
| 849 | mfc_debug(2, "f->type = %d ctx->state = %d\n", f->type, ctx->state); | ||
| 850 | if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { | ||
| 851 | /* This is run on output (encoder dest) */ | ||
| 852 | pix_fmt_mp->width = 0; | ||
| 853 | pix_fmt_mp->height = 0; | ||
| 854 | pix_fmt_mp->field = V4L2_FIELD_NONE; | ||
| 855 | pix_fmt_mp->pixelformat = ctx->dst_fmt->fourcc; | ||
| 856 | pix_fmt_mp->num_planes = ctx->dst_fmt->num_planes; | ||
| 857 | |||
| 858 | pix_fmt_mp->plane_fmt[0].bytesperline = ctx->enc_dst_buf_size; | ||
| 859 | pix_fmt_mp->plane_fmt[0].sizeimage = ctx->enc_dst_buf_size; | ||
| 860 | } else if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { | ||
| 861 | /* This is run on capture (encoder src) */ | ||
| 862 | pix_fmt_mp->width = ctx->img_width; | ||
| 863 | pix_fmt_mp->height = ctx->img_height; | ||
| 864 | |||
| 865 | pix_fmt_mp->field = V4L2_FIELD_NONE; | ||
| 866 | pix_fmt_mp->pixelformat = ctx->src_fmt->fourcc; | ||
| 867 | pix_fmt_mp->num_planes = ctx->src_fmt->num_planes; | ||
| 868 | |||
| 869 | pix_fmt_mp->plane_fmt[0].bytesperline = ctx->buf_width; | ||
| 870 | pix_fmt_mp->plane_fmt[0].sizeimage = ctx->luma_size; | ||
| 871 | pix_fmt_mp->plane_fmt[1].bytesperline = ctx->buf_width; | ||
| 872 | pix_fmt_mp->plane_fmt[1].sizeimage = ctx->chroma_size; | ||
| 873 | } else { | ||
| 874 | mfc_err("invalid buf type\n"); | ||
| 875 | return -EINVAL; | ||
| 876 | } | ||
| 877 | return 0; | ||
| 878 | } | ||
| 879 | |||
| 880 | static int vidioc_try_fmt(struct file *file, void *priv, struct v4l2_format *f) | ||
| 881 | { | ||
| 882 | struct s5p_mfc_fmt *fmt; | ||
| 883 | struct v4l2_pix_format_mplane *pix_fmt_mp = &f->fmt.pix_mp; | ||
| 884 | |||
| 885 | if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { | ||
| 886 | fmt = find_format(f, MFC_FMT_ENC); | ||
| 887 | if (!fmt) { | ||
| 888 | mfc_err("failed to try output format\n"); | ||
| 889 | return -EINVAL; | ||
| 890 | } | ||
| 891 | |||
| 892 | if (pix_fmt_mp->plane_fmt[0].sizeimage == 0) { | ||
| 893 | mfc_err("must be set encoding output size\n"); | ||
| 894 | return -EINVAL; | ||
| 895 | } | ||
| 896 | |||
| 897 | pix_fmt_mp->plane_fmt[0].bytesperline = | ||
| 898 | pix_fmt_mp->plane_fmt[0].sizeimage; | ||
| 899 | } else if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { | ||
| 900 | fmt = find_format(f, MFC_FMT_RAW); | ||
| 901 | if (!fmt) { | ||
| 902 | mfc_err("failed to try output format\n"); | ||
| 903 | return -EINVAL; | ||
| 904 | } | ||
| 905 | |||
| 906 | if (fmt->num_planes != pix_fmt_mp->num_planes) { | ||
| 907 | mfc_err("failed to try output format\n"); | ||
| 908 | return -EINVAL; | ||
| 909 | } | ||
| 910 | } else { | ||
| 911 | mfc_err("invalid buf type\n"); | ||
| 912 | return -EINVAL; | ||
| 913 | } | ||
| 914 | return 0; | ||
| 915 | } | ||
| 916 | |||
| 917 | static int vidioc_s_fmt(struct file *file, void *priv, struct v4l2_format *f) | ||
| 918 | { | ||
| 919 | struct s5p_mfc_dev *dev = video_drvdata(file); | ||
| 920 | struct s5p_mfc_ctx *ctx = fh_to_ctx(priv); | ||
| 921 | struct s5p_mfc_fmt *fmt; | ||
| 922 | struct v4l2_pix_format_mplane *pix_fmt_mp = &f->fmt.pix_mp; | ||
| 923 | unsigned long flags; | ||
| 924 | int ret = 0; | ||
| 925 | |||
| 926 | ret = vidioc_try_fmt(file, priv, f); | ||
| 927 | if (ret) | ||
| 928 | return ret; | ||
| 929 | if (ctx->vq_src.streaming || ctx->vq_dst.streaming) { | ||
| 930 | v4l2_err(&dev->v4l2_dev, "%s queue busy\n", __func__); | ||
| 931 | ret = -EBUSY; | ||
| 932 | goto out; | ||
| 933 | } | ||
| 934 | if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { | ||
| 935 | fmt = find_format(f, MFC_FMT_ENC); | ||
| 936 | if (!fmt) { | ||
| 937 | mfc_err("failed to set capture format\n"); | ||
| 938 | return -EINVAL; | ||
| 939 | } | ||
| 940 | ctx->state = MFCINST_INIT; | ||
| 941 | ctx->dst_fmt = fmt; | ||
| 942 | ctx->codec_mode = ctx->dst_fmt->codec_mode; | ||
| 943 | ctx->enc_dst_buf_size = pix_fmt_mp->plane_fmt[0].sizeimage; | ||
| 944 | pix_fmt_mp->plane_fmt[0].bytesperline = 0; | ||
| 945 | ctx->dst_bufs_cnt = 0; | ||
| 946 | ctx->capture_state = QUEUE_FREE; | ||
| 947 | s5p_mfc_alloc_instance_buffer(ctx); | ||
| 948 | spin_lock_irqsave(&dev->condlock, flags); | ||
| 949 | set_bit(ctx->num, &dev->ctx_work_bits); | ||
| 950 | spin_unlock_irqrestore(&dev->condlock, flags); | ||
| 951 | s5p_mfc_clean_ctx_int_flags(ctx); | ||
| 952 | s5p_mfc_try_run(dev); | ||
| 953 | if (s5p_mfc_wait_for_done_ctx(ctx, \ | ||
| 954 | S5P_FIMV_R2H_CMD_OPEN_INSTANCE_RET, 1)) { | ||
| 955 | /* Error or timeout */ | ||
| 956 | mfc_err("Error getting instance from hardware\n"); | ||
| 957 | s5p_mfc_release_instance_buffer(ctx); | ||
| 958 | ret = -EIO; | ||
| 959 | goto out; | ||
| 960 | } | ||
| 961 | mfc_debug(2, "Got instance number: %d\n", ctx->inst_no); | ||
| 962 | } else if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { | ||
| 963 | fmt = find_format(f, MFC_FMT_RAW); | ||
| 964 | if (!fmt) { | ||
| 965 | mfc_err("failed to set output format\n"); | ||
| 966 | return -EINVAL; | ||
| 967 | } | ||
| 968 | if (fmt->num_planes != pix_fmt_mp->num_planes) { | ||
| 969 | mfc_err("failed to set output format\n"); | ||
| 970 | ret = -EINVAL; | ||
| 971 | goto out; | ||
| 972 | } | ||
| 973 | ctx->src_fmt = fmt; | ||
| 974 | ctx->img_width = pix_fmt_mp->width; | ||
| 975 | ctx->img_height = pix_fmt_mp->height; | ||
| 976 | mfc_debug(2, "codec number: %d\n", ctx->src_fmt->codec_mode); | ||
| 977 | mfc_debug(2, "fmt - w: %d, h: %d, ctx - w: %d, h: %d\n", | ||
| 978 | pix_fmt_mp->width, pix_fmt_mp->height, | ||
| 979 | ctx->img_width, ctx->img_height); | ||
| 980 | if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_NV12M) { | ||
| 981 | ctx->buf_width = ALIGN(ctx->img_width, | ||
| 982 | S5P_FIMV_NV12M_HALIGN); | ||
| 983 | ctx->luma_size = ALIGN(ctx->img_width, | ||
| 984 | S5P_FIMV_NV12M_HALIGN) * ALIGN(ctx->img_height, | ||
| 985 | S5P_FIMV_NV12M_LVALIGN); | ||
| 986 | ctx->chroma_size = ALIGN(ctx->img_width, | ||
| 987 | S5P_FIMV_NV12M_HALIGN) * ALIGN((ctx->img_height | ||
| 988 | >> 1), S5P_FIMV_NV12M_CVALIGN); | ||
| 989 | |||
| 990 | ctx->luma_size = ALIGN(ctx->luma_size, | ||
| 991 | S5P_FIMV_NV12M_SALIGN); | ||
| 992 | ctx->chroma_size = ALIGN(ctx->chroma_size, | ||
| 993 | S5P_FIMV_NV12M_SALIGN); | ||
| 994 | |||
| 995 | pix_fmt_mp->plane_fmt[0].sizeimage = ctx->luma_size; | ||
| 996 | pix_fmt_mp->plane_fmt[0].bytesperline = ctx->buf_width; | ||
| 997 | pix_fmt_mp->plane_fmt[1].sizeimage = ctx->chroma_size; | ||
| 998 | pix_fmt_mp->plane_fmt[1].bytesperline = ctx->buf_width; | ||
| 999 | |||
| 1000 | } else if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_NV12MT) { | ||
| 1001 | ctx->buf_width = ALIGN(ctx->img_width, | ||
| 1002 | S5P_FIMV_NV12MT_HALIGN); | ||
| 1003 | ctx->luma_size = ALIGN(ctx->img_width, | ||
| 1004 | S5P_FIMV_NV12MT_HALIGN) * ALIGN(ctx->img_height, | ||
| 1005 | S5P_FIMV_NV12MT_VALIGN); | ||
| 1006 | ctx->chroma_size = ALIGN(ctx->img_width, | ||
| 1007 | S5P_FIMV_NV12MT_HALIGN) * ALIGN((ctx->img_height | ||
| 1008 | >> 1), S5P_FIMV_NV12MT_VALIGN); | ||
| 1009 | ctx->luma_size = ALIGN(ctx->luma_size, | ||
| 1010 | S5P_FIMV_NV12MT_SALIGN); | ||
| 1011 | ctx->chroma_size = ALIGN(ctx->chroma_size, | ||
| 1012 | S5P_FIMV_NV12MT_SALIGN); | ||
| 1013 | |||
| 1014 | pix_fmt_mp->plane_fmt[0].sizeimage = ctx->luma_size; | ||
| 1015 | pix_fmt_mp->plane_fmt[0].bytesperline = ctx->buf_width; | ||
| 1016 | pix_fmt_mp->plane_fmt[1].sizeimage = ctx->chroma_size; | ||
| 1017 | pix_fmt_mp->plane_fmt[1].bytesperline = ctx->buf_width; | ||
| 1018 | } | ||
| 1019 | ctx->src_bufs_cnt = 0; | ||
| 1020 | ctx->output_state = QUEUE_FREE; | ||
| 1021 | } else { | ||
| 1022 | mfc_err("invalid buf type\n"); | ||
| 1023 | return -EINVAL; | ||
| 1024 | } | ||
| 1025 | out: | ||
| 1026 | mfc_debug_leave(); | ||
| 1027 | return ret; | ||
| 1028 | } | ||
| 1029 | |||
| 1030 | static int vidioc_reqbufs(struct file *file, void *priv, | ||
| 1031 | struct v4l2_requestbuffers *reqbufs) | ||
| 1032 | { | ||
| 1033 | struct s5p_mfc_ctx *ctx = fh_to_ctx(priv); | ||
| 1034 | int ret = 0; | ||
| 1035 | |||
| 1036 | /* if memory is not mmp or userptr return error */ | ||
| 1037 | if ((reqbufs->memory != V4L2_MEMORY_MMAP) && | ||
| 1038 | (reqbufs->memory != V4L2_MEMORY_USERPTR)) | ||
| 1039 | return -EINVAL; | ||
| 1040 | if (reqbufs->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { | ||
| 1041 | if (ctx->capture_state != QUEUE_FREE) { | ||
| 1042 | mfc_err("invalid capture state: %d\n", | ||
| 1043 | ctx->capture_state); | ||
| 1044 | return -EINVAL; | ||
| 1045 | } | ||
| 1046 | ret = vb2_reqbufs(&ctx->vq_dst, reqbufs); | ||
| 1047 | if (ret != 0) { | ||
| 1048 | mfc_err("error in vb2_reqbufs() for E(D)\n"); | ||
| 1049 | return ret; | ||
| 1050 | } | ||
| 1051 | ctx->capture_state = QUEUE_BUFS_REQUESTED; | ||
| 1052 | ret = s5p_mfc_alloc_codec_buffers(ctx); | ||
| 1053 | if (ret) { | ||
| 1054 | mfc_err("Failed to allocate encoding buffers\n"); | ||
| 1055 | reqbufs->count = 0; | ||
| 1056 | ret = vb2_reqbufs(&ctx->vq_dst, reqbufs); | ||
| 1057 | return -ENOMEM; | ||
| 1058 | } | ||
| 1059 | } else if (reqbufs->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { | ||
| 1060 | if (ctx->output_state != QUEUE_FREE) { | ||
| 1061 | mfc_err("invalid output state: %d\n", | ||
| 1062 | ctx->output_state); | ||
| 1063 | return -EINVAL; | ||
| 1064 | } | ||
| 1065 | ret = vb2_reqbufs(&ctx->vq_src, reqbufs); | ||
| 1066 | if (ret != 0) { | ||
| 1067 | mfc_err("error in vb2_reqbufs() for E(S)\n"); | ||
| 1068 | return ret; | ||
| 1069 | } | ||
| 1070 | ctx->output_state = QUEUE_BUFS_REQUESTED; | ||
| 1071 | } else { | ||
| 1072 | mfc_err("invalid buf type\n"); | ||
| 1073 | return -EINVAL; | ||
| 1074 | } | ||
| 1075 | return ret; | ||
| 1076 | } | ||
| 1077 | |||
| 1078 | static int vidioc_querybuf(struct file *file, void *priv, | ||
| 1079 | struct v4l2_buffer *buf) | ||
| 1080 | { | ||
| 1081 | struct s5p_mfc_ctx *ctx = fh_to_ctx(priv); | ||
| 1082 | int ret = 0; | ||
| 1083 | |||
| 1084 | /* if memory is not mmp or userptr return error */ | ||
| 1085 | if ((buf->memory != V4L2_MEMORY_MMAP) && | ||
| 1086 | (buf->memory != V4L2_MEMORY_USERPTR)) | ||
| 1087 | return -EINVAL; | ||
| 1088 | if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { | ||
| 1089 | if (ctx->state != MFCINST_GOT_INST) { | ||
| 1090 | mfc_err("invalid context state: %d\n", ctx->state); | ||
| 1091 | return -EINVAL; | ||
| 1092 | } | ||
| 1093 | ret = vb2_querybuf(&ctx->vq_dst, buf); | ||
| 1094 | if (ret != 0) { | ||
| 1095 | mfc_err("error in vb2_querybuf() for E(D)\n"); | ||
| 1096 | return ret; | ||
| 1097 | } | ||
| 1098 | buf->m.planes[0].m.mem_offset += DST_QUEUE_OFF_BASE; | ||
| 1099 | } else if (buf->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { | ||
| 1100 | ret = vb2_querybuf(&ctx->vq_src, buf); | ||
| 1101 | if (ret != 0) { | ||
| 1102 | mfc_err("error in vb2_querybuf() for E(S)\n"); | ||
| 1103 | return ret; | ||
| 1104 | } | ||
| 1105 | } else { | ||
| 1106 | mfc_err("invalid buf type\n"); | ||
| 1107 | return -EINVAL; | ||
| 1108 | } | ||
| 1109 | return ret; | ||
| 1110 | } | ||
| 1111 | |||
| 1112 | /* Queue a buffer */ | ||
| 1113 | static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *buf) | ||
| 1114 | { | ||
| 1115 | struct s5p_mfc_ctx *ctx = fh_to_ctx(priv); | ||
| 1116 | |||
| 1117 | if (ctx->state == MFCINST_ERROR) { | ||
| 1118 | mfc_err("Call on QBUF after unrecoverable error\n"); | ||
| 1119 | return -EIO; | ||
| 1120 | } | ||
| 1121 | if (buf->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) | ||
| 1122 | return vb2_qbuf(&ctx->vq_src, buf); | ||
| 1123 | else if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) | ||
| 1124 | return vb2_qbuf(&ctx->vq_dst, buf); | ||
| 1125 | return -EINVAL; | ||
| 1126 | } | ||
| 1127 | |||
| 1128 | /* Dequeue a buffer */ | ||
| 1129 | static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *buf) | ||
| 1130 | { | ||
| 1131 | struct s5p_mfc_ctx *ctx = fh_to_ctx(priv); | ||
| 1132 | |||
| 1133 | if (ctx->state == MFCINST_ERROR) { | ||
| 1134 | mfc_err("Call on DQBUF after unrecoverable error\n"); | ||
| 1135 | return -EIO; | ||
| 1136 | } | ||
| 1137 | if (buf->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) | ||
| 1138 | return vb2_dqbuf(&ctx->vq_src, buf, file->f_flags & O_NONBLOCK); | ||
| 1139 | else if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) | ||
| 1140 | return vb2_dqbuf(&ctx->vq_dst, buf, file->f_flags & O_NONBLOCK); | ||
| 1141 | return -EINVAL; | ||
| 1142 | } | ||
| 1143 | |||
| 1144 | /* Stream on */ | ||
| 1145 | static int vidioc_streamon(struct file *file, void *priv, | ||
| 1146 | enum v4l2_buf_type type) | ||
| 1147 | { | ||
| 1148 | struct s5p_mfc_ctx *ctx = fh_to_ctx(priv); | ||
| 1149 | |||
| 1150 | if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) | ||
| 1151 | return vb2_streamon(&ctx->vq_src, type); | ||
| 1152 | else if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) | ||
| 1153 | return vb2_streamon(&ctx->vq_dst, type); | ||
| 1154 | return -EINVAL; | ||
| 1155 | } | ||
| 1156 | |||
| 1157 | /* Stream off, which equals to a pause */ | ||
| 1158 | static int vidioc_streamoff(struct file *file, void *priv, | ||
| 1159 | enum v4l2_buf_type type) | ||
| 1160 | { | ||
| 1161 | struct s5p_mfc_ctx *ctx = fh_to_ctx(priv); | ||
| 1162 | |||
| 1163 | if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) | ||
| 1164 | return vb2_streamoff(&ctx->vq_src, type); | ||
| 1165 | else if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) | ||
| 1166 | return vb2_streamoff(&ctx->vq_dst, type); | ||
| 1167 | return -EINVAL; | ||
| 1168 | } | ||
| 1169 | |||
| 1170 | static inline int h264_level(enum v4l2_mpeg_video_h264_level lvl) | ||
| 1171 | { | ||
| 1172 | static unsigned int t[V4L2_MPEG_VIDEO_H264_LEVEL_4_0 + 1] = { | ||
| 1173 | /* V4L2_MPEG_VIDEO_H264_LEVEL_1_0 */ 10, | ||
| 1174 | /* V4L2_MPEG_VIDEO_H264_LEVEL_1B */ 9, | ||
| 1175 | /* V4L2_MPEG_VIDEO_H264_LEVEL_1_1 */ 11, | ||
| 1176 | /* V4L2_MPEG_VIDEO_H264_LEVEL_1_2 */ 12, | ||
| 1177 | /* V4L2_MPEG_VIDEO_H264_LEVEL_1_3 */ 13, | ||
| 1178 | /* V4L2_MPEG_VIDEO_H264_LEVEL_2_0 */ 20, | ||
| 1179 | /* V4L2_MPEG_VIDEO_H264_LEVEL_2_1 */ 21, | ||
| 1180 | /* V4L2_MPEG_VIDEO_H264_LEVEL_2_2 */ 22, | ||
| 1181 | /* V4L2_MPEG_VIDEO_H264_LEVEL_3_0 */ 30, | ||
| 1182 | /* V4L2_MPEG_VIDEO_H264_LEVEL_3_1 */ 31, | ||
| 1183 | /* V4L2_MPEG_VIDEO_H264_LEVEL_3_2 */ 32, | ||
| 1184 | /* V4L2_MPEG_VIDEO_H264_LEVEL_4_0 */ 40, | ||
| 1185 | }; | ||
| 1186 | return t[lvl]; | ||
| 1187 | } | ||
| 1188 | |||
| 1189 | static inline int mpeg4_level(enum v4l2_mpeg_video_mpeg4_level lvl) | ||
| 1190 | { | ||
| 1191 | static unsigned int t[V4L2_MPEG_VIDEO_MPEG4_LEVEL_5 + 1] = { | ||
| 1192 | /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_0 */ 0, | ||
| 1193 | /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_0B */ 9, | ||
| 1194 | /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_1 */ 1, | ||
| 1195 | /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_2 */ 2, | ||
| 1196 | /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_3 */ 3, | ||
| 1197 | /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_3B */ 7, | ||
| 1198 | /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_4 */ 4, | ||
| 1199 | /* V4L2_MPEG_VIDEO_MPEG4_LEVEL_5 */ 5, | ||
| 1200 | }; | ||
| 1201 | return t[lvl]; | ||
| 1202 | } | ||
| 1203 | |||
| 1204 | static inline int vui_sar_idc(enum v4l2_mpeg_video_h264_vui_sar_idc sar) | ||
| 1205 | { | ||
| 1206 | static unsigned int t[V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED + 1] = { | ||
| 1207 | /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_UNSPECIFIED */ 0, | ||
| 1208 | /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_1x1 */ 1, | ||
| 1209 | /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_12x11 */ 2, | ||
| 1210 | /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_10x11 */ 3, | ||
| 1211 | /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_16x11 */ 4, | ||
| 1212 | /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_40x33 */ 5, | ||
| 1213 | /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_24x11 */ 6, | ||
| 1214 | /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_20x11 */ 7, | ||
| 1215 | /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_32x11 */ 8, | ||
| 1216 | /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_80x33 */ 9, | ||
| 1217 | /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_18x11 */ 10, | ||
| 1218 | /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_15x11 */ 11, | ||
| 1219 | /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_64x33 */ 12, | ||
| 1220 | /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_160x99 */ 13, | ||
| 1221 | /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_4x3 */ 14, | ||
| 1222 | /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_3x2 */ 15, | ||
| 1223 | /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_2x1 */ 16, | ||
| 1224 | /* V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED */ 255, | ||
| 1225 | }; | ||
| 1226 | return t[sar]; | ||
| 1227 | } | ||
| 1228 | |||
| 1229 | static int s5p_mfc_enc_s_ctrl(struct v4l2_ctrl *ctrl) | ||
| 1230 | { | ||
| 1231 | struct s5p_mfc_ctx *ctx = ctrl_to_ctx(ctrl); | ||
| 1232 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 1233 | struct s5p_mfc_enc_params *p = &ctx->enc_params; | ||
| 1234 | int ret = 0; | ||
| 1235 | |||
| 1236 | switch (ctrl->id) { | ||
| 1237 | case V4L2_CID_MPEG_VIDEO_GOP_SIZE: | ||
| 1238 | p->gop_size = ctrl->val; | ||
| 1239 | break; | ||
| 1240 | case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE: | ||
| 1241 | p->slice_mode = ctrl->val; | ||
| 1242 | break; | ||
| 1243 | case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB: | ||
| 1244 | p->slice_mb = ctrl->val; | ||
| 1245 | break; | ||
| 1246 | case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES: | ||
| 1247 | p->slice_bit = ctrl->val * 8; | ||
| 1248 | break; | ||
| 1249 | case V4L2_CID_MPEG_VIDEO_CYCLIC_INTRA_REFRESH_MB: | ||
| 1250 | p->intra_refresh_mb = ctrl->val; | ||
| 1251 | break; | ||
| 1252 | case V4L2_CID_MPEG_MFC51_VIDEO_PADDING: | ||
| 1253 | p->pad = ctrl->val; | ||
| 1254 | break; | ||
| 1255 | case V4L2_CID_MPEG_MFC51_VIDEO_PADDING_YUV: | ||
| 1256 | p->pad_luma = (ctrl->val >> 16) & 0xff; | ||
| 1257 | p->pad_cb = (ctrl->val >> 8) & 0xff; | ||
| 1258 | p->pad_cr = (ctrl->val >> 0) & 0xff; | ||
| 1259 | break; | ||
| 1260 | case V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE: | ||
| 1261 | p->rc_frame = ctrl->val; | ||
| 1262 | break; | ||
| 1263 | case V4L2_CID_MPEG_VIDEO_BITRATE: | ||
| 1264 | p->rc_bitrate = ctrl->val; | ||
| 1265 | break; | ||
| 1266 | case V4L2_CID_MPEG_MFC51_VIDEO_RC_REACTION_COEFF: | ||
| 1267 | p->rc_reaction_coeff = ctrl->val; | ||
| 1268 | break; | ||
| 1269 | case V4L2_CID_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE: | ||
| 1270 | ctx->force_frame_type = ctrl->val; | ||
| 1271 | break; | ||
| 1272 | case V4L2_CID_MPEG_VIDEO_VBV_SIZE: | ||
| 1273 | p->vbv_size = ctrl->val; | ||
| 1274 | break; | ||
| 1275 | case V4L2_CID_MPEG_VIDEO_H264_CPB_SIZE: | ||
| 1276 | p->codec.h264.cpb_size = ctrl->val; | ||
| 1277 | break; | ||
| 1278 | case V4L2_CID_MPEG_VIDEO_HEADER_MODE: | ||
| 1279 | p->seq_hdr_mode = ctrl->val; | ||
| 1280 | break; | ||
| 1281 | case V4L2_CID_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE: | ||
| 1282 | p->frame_skip_mode = ctrl->val; | ||
| 1283 | break; | ||
| 1284 | case V4L2_CID_MPEG_MFC51_VIDEO_RC_FIXED_TARGET_BIT: | ||
| 1285 | p->fixed_target_bit = ctrl->val; | ||
| 1286 | break; | ||
| 1287 | case V4L2_CID_MPEG_VIDEO_B_FRAMES: | ||
| 1288 | p->num_b_frame = ctrl->val; | ||
| 1289 | break; | ||
| 1290 | case V4L2_CID_MPEG_VIDEO_H264_PROFILE: | ||
| 1291 | switch (ctrl->val) { | ||
| 1292 | case V4L2_MPEG_VIDEO_H264_PROFILE_MAIN: | ||
| 1293 | p->codec.h264.profile = | ||
| 1294 | S5P_FIMV_ENC_PROFILE_H264_MAIN; | ||
| 1295 | break; | ||
| 1296 | case V4L2_MPEG_VIDEO_H264_PROFILE_HIGH: | ||
| 1297 | p->codec.h264.profile = | ||
| 1298 | S5P_FIMV_ENC_PROFILE_H264_HIGH; | ||
| 1299 | break; | ||
| 1300 | case V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE: | ||
| 1301 | p->codec.h264.profile = | ||
| 1302 | S5P_FIMV_ENC_PROFILE_H264_BASELINE; | ||
| 1303 | break; | ||
| 1304 | default: | ||
| 1305 | ret = -EINVAL; | ||
| 1306 | } | ||
| 1307 | break; | ||
| 1308 | case V4L2_CID_MPEG_VIDEO_H264_LEVEL: | ||
| 1309 | p->codec.h264.level_v4l2 = ctrl->val; | ||
| 1310 | p->codec.h264.level = h264_level(ctrl->val); | ||
| 1311 | if (p->codec.h264.level < 0) { | ||
| 1312 | mfc_err("Level number is wrong\n"); | ||
| 1313 | ret = p->codec.h264.level; | ||
| 1314 | } | ||
| 1315 | break; | ||
| 1316 | case V4L2_CID_MPEG_VIDEO_MPEG4_LEVEL: | ||
| 1317 | p->codec.mpeg4.level_v4l2 = ctrl->val; | ||
| 1318 | p->codec.mpeg4.level = mpeg4_level(ctrl->val); | ||
| 1319 | if (p->codec.mpeg4.level < 0) { | ||
| 1320 | mfc_err("Level number is wrong\n"); | ||
| 1321 | ret = p->codec.mpeg4.level; | ||
| 1322 | } | ||
| 1323 | break; | ||
| 1324 | case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE: | ||
| 1325 | p->codec.h264.loop_filter_mode = ctrl->val; | ||
| 1326 | break; | ||
| 1327 | case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA: | ||
| 1328 | p->codec.h264.loop_filter_alpha = ctrl->val; | ||
| 1329 | break; | ||
| 1330 | case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA: | ||
| 1331 | p->codec.h264.loop_filter_beta = ctrl->val; | ||
| 1332 | break; | ||
| 1333 | case V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE: | ||
| 1334 | p->codec.h264.entropy_mode = ctrl->val; | ||
| 1335 | break; | ||
| 1336 | case V4L2_CID_MPEG_MFC51_VIDEO_H264_NUM_REF_PIC_FOR_P: | ||
| 1337 | p->codec.h264.num_ref_pic_4p = ctrl->val; | ||
| 1338 | break; | ||
| 1339 | case V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM: | ||
| 1340 | p->codec.h264._8x8_transform = ctrl->val; | ||
| 1341 | break; | ||
| 1342 | case V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE: | ||
| 1343 | p->codec.h264.rc_mb = ctrl->val; | ||
| 1344 | break; | ||
| 1345 | case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP: | ||
| 1346 | p->codec.h264.rc_frame_qp = ctrl->val; | ||
| 1347 | break; | ||
| 1348 | case V4L2_CID_MPEG_VIDEO_H264_MIN_QP: | ||
| 1349 | p->codec.h264.rc_min_qp = ctrl->val; | ||
| 1350 | break; | ||
| 1351 | case V4L2_CID_MPEG_VIDEO_H264_MAX_QP: | ||
| 1352 | p->codec.h264.rc_max_qp = ctrl->val; | ||
| 1353 | break; | ||
| 1354 | case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP: | ||
| 1355 | p->codec.h264.rc_p_frame_qp = ctrl->val; | ||
| 1356 | break; | ||
| 1357 | case V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP: | ||
| 1358 | p->codec.h264.rc_b_frame_qp = ctrl->val; | ||
| 1359 | break; | ||
| 1360 | case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP: | ||
| 1361 | case V4L2_CID_MPEG_VIDEO_H263_I_FRAME_QP: | ||
| 1362 | p->codec.mpeg4.rc_frame_qp = ctrl->val; | ||
| 1363 | break; | ||
| 1364 | case V4L2_CID_MPEG_VIDEO_MPEG4_MIN_QP: | ||
| 1365 | case V4L2_CID_MPEG_VIDEO_H263_MIN_QP: | ||
| 1366 | p->codec.mpeg4.rc_min_qp = ctrl->val; | ||
| 1367 | break; | ||
| 1368 | case V4L2_CID_MPEG_VIDEO_MPEG4_MAX_QP: | ||
| 1369 | case V4L2_CID_MPEG_VIDEO_H263_MAX_QP: | ||
| 1370 | p->codec.mpeg4.rc_max_qp = ctrl->val; | ||
| 1371 | break; | ||
| 1372 | case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP: | ||
| 1373 | case V4L2_CID_MPEG_VIDEO_H263_P_FRAME_QP: | ||
| 1374 | p->codec.mpeg4.rc_p_frame_qp = ctrl->val; | ||
| 1375 | break; | ||
| 1376 | case V4L2_CID_MPEG_VIDEO_MPEG4_B_FRAME_QP: | ||
| 1377 | case V4L2_CID_MPEG_VIDEO_H263_B_FRAME_QP: | ||
| 1378 | p->codec.mpeg4.rc_b_frame_qp = ctrl->val; | ||
| 1379 | break; | ||
| 1380 | case V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_DARK: | ||
| 1381 | p->codec.h264.rc_mb_dark = ctrl->val; | ||
| 1382 | break; | ||
| 1383 | case V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_SMOOTH: | ||
| 1384 | p->codec.h264.rc_mb_smooth = ctrl->val; | ||
| 1385 | break; | ||
| 1386 | case V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_STATIC: | ||
| 1387 | p->codec.h264.rc_mb_static = ctrl->val; | ||
| 1388 | break; | ||
| 1389 | case V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_ACTIVITY: | ||
| 1390 | p->codec.h264.rc_mb_activity = ctrl->val; | ||
| 1391 | break; | ||
| 1392 | case V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_ENABLE: | ||
| 1393 | p->codec.h264.vui_sar = ctrl->val; | ||
| 1394 | break; | ||
| 1395 | case V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_IDC: | ||
| 1396 | p->codec.h264.vui_sar_idc = vui_sar_idc(ctrl->val); | ||
| 1397 | break; | ||
| 1398 | case V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_WIDTH: | ||
| 1399 | p->codec.h264.vui_ext_sar_width = ctrl->val; | ||
| 1400 | break; | ||
| 1401 | case V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_HEIGHT: | ||
| 1402 | p->codec.h264.vui_ext_sar_height = ctrl->val; | ||
| 1403 | break; | ||
| 1404 | case V4L2_CID_MPEG_VIDEO_GOP_CLOSURE: | ||
| 1405 | p->codec.h264.open_gop = !ctrl->val; | ||
| 1406 | break; | ||
| 1407 | case V4L2_CID_MPEG_VIDEO_H264_I_PERIOD: | ||
| 1408 | p->codec.h264.open_gop_size = ctrl->val; | ||
| 1409 | break; | ||
| 1410 | case V4L2_CID_MPEG_VIDEO_MPEG4_PROFILE: | ||
| 1411 | switch (ctrl->val) { | ||
| 1412 | case V4L2_MPEG_VIDEO_MPEG4_PROFILE_SIMPLE: | ||
| 1413 | p->codec.mpeg4.profile = | ||
| 1414 | S5P_FIMV_ENC_PROFILE_MPEG4_SIMPLE; | ||
| 1415 | break; | ||
| 1416 | case V4L2_MPEG_VIDEO_MPEG4_PROFILE_ADVANCED_SIMPLE: | ||
| 1417 | p->codec.mpeg4.profile = | ||
| 1418 | S5P_FIMV_ENC_PROFILE_MPEG4_ADVANCED_SIMPLE; | ||
| 1419 | break; | ||
| 1420 | default: | ||
| 1421 | ret = -EINVAL; | ||
| 1422 | } | ||
| 1423 | break; | ||
| 1424 | case V4L2_CID_MPEG_VIDEO_MPEG4_QPEL: | ||
| 1425 | p->codec.mpeg4.quarter_pixel = ctrl->val; | ||
| 1426 | break; | ||
| 1427 | default: | ||
| 1428 | v4l2_err(&dev->v4l2_dev, "Invalid control, id=%d, val=%d\n", | ||
| 1429 | ctrl->id, ctrl->val); | ||
| 1430 | ret = -EINVAL; | ||
| 1431 | } | ||
| 1432 | return ret; | ||
| 1433 | } | ||
| 1434 | |||
| 1435 | static const struct v4l2_ctrl_ops s5p_mfc_enc_ctrl_ops = { | ||
| 1436 | .s_ctrl = s5p_mfc_enc_s_ctrl, | ||
| 1437 | }; | ||
| 1438 | |||
| 1439 | int vidioc_s_parm(struct file *file, void *priv, struct v4l2_streamparm *a) | ||
| 1440 | { | ||
| 1441 | struct s5p_mfc_ctx *ctx = fh_to_ctx(priv); | ||
| 1442 | |||
| 1443 | if (a->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { | ||
| 1444 | ctx->enc_params.rc_framerate_num = | ||
| 1445 | a->parm.output.timeperframe.denominator; | ||
| 1446 | ctx->enc_params.rc_framerate_denom = | ||
| 1447 | a->parm.output.timeperframe.numerator; | ||
| 1448 | } else { | ||
| 1449 | mfc_err("Setting FPS is only possible for the output queue\n"); | ||
| 1450 | return -EINVAL; | ||
| 1451 | } | ||
| 1452 | return 0; | ||
| 1453 | } | ||
| 1454 | |||
| 1455 | int vidioc_g_parm(struct file *file, void *priv, struct v4l2_streamparm *a) | ||
| 1456 | { | ||
| 1457 | struct s5p_mfc_ctx *ctx = fh_to_ctx(priv); | ||
| 1458 | |||
| 1459 | if (a->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) { | ||
| 1460 | a->parm.output.timeperframe.denominator = | ||
| 1461 | ctx->enc_params.rc_framerate_num; | ||
| 1462 | a->parm.output.timeperframe.numerator = | ||
| 1463 | ctx->enc_params.rc_framerate_denom; | ||
| 1464 | } else { | ||
| 1465 | mfc_err("Setting FPS is only possible for the output queue\n"); | ||
| 1466 | return -EINVAL; | ||
| 1467 | } | ||
| 1468 | return 0; | ||
| 1469 | } | ||
| 1470 | |||
| 1471 | static const struct v4l2_ioctl_ops s5p_mfc_enc_ioctl_ops = { | ||
| 1472 | .vidioc_querycap = vidioc_querycap, | ||
| 1473 | .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap, | ||
| 1474 | .vidioc_enum_fmt_vid_cap_mplane = vidioc_enum_fmt_vid_cap_mplane, | ||
| 1475 | .vidioc_enum_fmt_vid_out = vidioc_enum_fmt_vid_out, | ||
| 1476 | .vidioc_enum_fmt_vid_out_mplane = vidioc_enum_fmt_vid_out_mplane, | ||
| 1477 | .vidioc_g_fmt_vid_cap_mplane = vidioc_g_fmt, | ||
| 1478 | .vidioc_g_fmt_vid_out_mplane = vidioc_g_fmt, | ||
| 1479 | .vidioc_try_fmt_vid_cap_mplane = vidioc_try_fmt, | ||
| 1480 | .vidioc_try_fmt_vid_out_mplane = vidioc_try_fmt, | ||
| 1481 | .vidioc_s_fmt_vid_cap_mplane = vidioc_s_fmt, | ||
| 1482 | .vidioc_s_fmt_vid_out_mplane = vidioc_s_fmt, | ||
| 1483 | .vidioc_reqbufs = vidioc_reqbufs, | ||
| 1484 | .vidioc_querybuf = vidioc_querybuf, | ||
| 1485 | .vidioc_qbuf = vidioc_qbuf, | ||
| 1486 | .vidioc_dqbuf = vidioc_dqbuf, | ||
| 1487 | .vidioc_streamon = vidioc_streamon, | ||
| 1488 | .vidioc_streamoff = vidioc_streamoff, | ||
| 1489 | .vidioc_s_parm = vidioc_s_parm, | ||
| 1490 | .vidioc_g_parm = vidioc_g_parm, | ||
| 1491 | }; | ||
| 1492 | |||
| 1493 | static int check_vb_with_fmt(struct s5p_mfc_fmt *fmt, struct vb2_buffer *vb) | ||
| 1494 | { | ||
| 1495 | int i; | ||
| 1496 | |||
| 1497 | if (!fmt) | ||
| 1498 | return -EINVAL; | ||
| 1499 | if (fmt->num_planes != vb->num_planes) { | ||
| 1500 | mfc_err("invalid plane number for the format\n"); | ||
| 1501 | return -EINVAL; | ||
| 1502 | } | ||
| 1503 | for (i = 0; i < fmt->num_planes; i++) { | ||
| 1504 | if (!vb2_dma_contig_plane_paddr(vb, i)) { | ||
| 1505 | mfc_err("failed to get plane cookie\n"); | ||
| 1506 | return -EINVAL; | ||
| 1507 | } | ||
| 1508 | mfc_debug(2, "index: %d, plane[%d] cookie: 0x%08zx", | ||
| 1509 | vb->v4l2_buf.index, i, | ||
| 1510 | vb2_dma_contig_plane_paddr(vb, i)); | ||
| 1511 | } | ||
| 1512 | return 0; | ||
| 1513 | } | ||
| 1514 | |||
| 1515 | static int s5p_mfc_queue_setup(struct vb2_queue *vq, | ||
| 1516 | unsigned int *buf_count, unsigned int *plane_count, | ||
| 1517 | unsigned long psize[], void *allocators[]) | ||
| 1518 | { | ||
| 1519 | struct s5p_mfc_ctx *ctx = fh_to_ctx(vq->drv_priv); | ||
| 1520 | |||
| 1521 | if (ctx->state != MFCINST_GOT_INST) { | ||
| 1522 | mfc_err("inavlid state: %d\n", ctx->state); | ||
| 1523 | return -EINVAL; | ||
| 1524 | } | ||
| 1525 | if (vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { | ||
| 1526 | if (ctx->dst_fmt) | ||
| 1527 | *plane_count = ctx->dst_fmt->num_planes; | ||
| 1528 | else | ||
| 1529 | *plane_count = MFC_ENC_CAP_PLANE_COUNT; | ||
| 1530 | if (*buf_count < 1) | ||
| 1531 | *buf_count = 1; | ||
| 1532 | if (*buf_count > MFC_MAX_BUFFERS) | ||
| 1533 | *buf_count = MFC_MAX_BUFFERS; | ||
| 1534 | psize[0] = ctx->enc_dst_buf_size; | ||
| 1535 | allocators[0] = ctx->dev->alloc_ctx[MFC_BANK1_ALLOC_CTX]; | ||
| 1536 | } else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { | ||
| 1537 | if (ctx->src_fmt) | ||
| 1538 | *plane_count = ctx->src_fmt->num_planes; | ||
| 1539 | else | ||
| 1540 | *plane_count = MFC_ENC_OUT_PLANE_COUNT; | ||
| 1541 | |||
| 1542 | if (*buf_count < 1) | ||
| 1543 | *buf_count = 1; | ||
| 1544 | if (*buf_count > MFC_MAX_BUFFERS) | ||
| 1545 | *buf_count = MFC_MAX_BUFFERS; | ||
| 1546 | psize[0] = ctx->luma_size; | ||
| 1547 | psize[1] = ctx->chroma_size; | ||
| 1548 | allocators[0] = ctx->dev->alloc_ctx[MFC_BANK2_ALLOC_CTX]; | ||
| 1549 | allocators[1] = ctx->dev->alloc_ctx[MFC_BANK2_ALLOC_CTX]; | ||
| 1550 | } else { | ||
| 1551 | mfc_err("inavlid queue type: %d\n", vq->type); | ||
| 1552 | return -EINVAL; | ||
| 1553 | } | ||
| 1554 | return 0; | ||
| 1555 | } | ||
| 1556 | |||
| 1557 | static void s5p_mfc_unlock(struct vb2_queue *q) | ||
| 1558 | { | ||
| 1559 | struct s5p_mfc_ctx *ctx = fh_to_ctx(q->drv_priv); | ||
| 1560 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 1561 | |||
| 1562 | mutex_unlock(&dev->mfc_mutex); | ||
| 1563 | } | ||
| 1564 | |||
| 1565 | static void s5p_mfc_lock(struct vb2_queue *q) | ||
| 1566 | { | ||
| 1567 | struct s5p_mfc_ctx *ctx = fh_to_ctx(q->drv_priv); | ||
| 1568 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 1569 | |||
| 1570 | mutex_lock(&dev->mfc_mutex); | ||
| 1571 | } | ||
| 1572 | |||
| 1573 | static int s5p_mfc_buf_init(struct vb2_buffer *vb) | ||
| 1574 | { | ||
| 1575 | struct vb2_queue *vq = vb->vb2_queue; | ||
| 1576 | struct s5p_mfc_ctx *ctx = fh_to_ctx(vq->drv_priv); | ||
| 1577 | unsigned int i; | ||
| 1578 | int ret; | ||
| 1579 | |||
| 1580 | if (vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { | ||
| 1581 | ret = check_vb_with_fmt(ctx->dst_fmt, vb); | ||
| 1582 | if (ret < 0) | ||
| 1583 | return ret; | ||
| 1584 | i = vb->v4l2_buf.index; | ||
| 1585 | ctx->dst_bufs[i].b = vb; | ||
| 1586 | ctx->dst_bufs[i].cookie.stream = | ||
| 1587 | vb2_dma_contig_plane_paddr(vb, 0); | ||
| 1588 | ctx->dst_bufs_cnt++; | ||
| 1589 | } else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { | ||
| 1590 | ret = check_vb_with_fmt(ctx->src_fmt, vb); | ||
| 1591 | if (ret < 0) | ||
| 1592 | return ret; | ||
| 1593 | i = vb->v4l2_buf.index; | ||
| 1594 | ctx->src_bufs[i].b = vb; | ||
| 1595 | ctx->src_bufs[i].cookie.raw.luma = | ||
| 1596 | vb2_dma_contig_plane_paddr(vb, 0); | ||
| 1597 | ctx->src_bufs[i].cookie.raw.chroma = | ||
| 1598 | vb2_dma_contig_plane_paddr(vb, 1); | ||
| 1599 | ctx->src_bufs_cnt++; | ||
| 1600 | } else { | ||
| 1601 | mfc_err("inavlid queue type: %d\n", vq->type); | ||
| 1602 | return -EINVAL; | ||
| 1603 | } | ||
| 1604 | return 0; | ||
| 1605 | } | ||
| 1606 | |||
| 1607 | static int s5p_mfc_buf_prepare(struct vb2_buffer *vb) | ||
| 1608 | { | ||
| 1609 | struct vb2_queue *vq = vb->vb2_queue; | ||
| 1610 | struct s5p_mfc_ctx *ctx = fh_to_ctx(vq->drv_priv); | ||
| 1611 | int ret; | ||
| 1612 | |||
| 1613 | if (vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { | ||
| 1614 | ret = check_vb_with_fmt(ctx->dst_fmt, vb); | ||
| 1615 | if (ret < 0) | ||
| 1616 | return ret; | ||
| 1617 | mfc_debug(2, "plane size: %ld, dst size: %d\n", | ||
| 1618 | vb2_plane_size(vb, 0), ctx->enc_dst_buf_size); | ||
| 1619 | if (vb2_plane_size(vb, 0) < ctx->enc_dst_buf_size) { | ||
| 1620 | mfc_err("plane size is too small for capture\n"); | ||
| 1621 | return -EINVAL; | ||
| 1622 | } | ||
| 1623 | } else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { | ||
| 1624 | ret = check_vb_with_fmt(ctx->src_fmt, vb); | ||
| 1625 | if (ret < 0) | ||
| 1626 | return ret; | ||
| 1627 | mfc_debug(2, "plane size: %ld, luma size: %d\n", | ||
| 1628 | vb2_plane_size(vb, 0), ctx->luma_size); | ||
| 1629 | mfc_debug(2, "plane size: %ld, chroma size: %d\n", | ||
| 1630 | vb2_plane_size(vb, 1), ctx->chroma_size); | ||
| 1631 | if (vb2_plane_size(vb, 0) < ctx->luma_size || | ||
| 1632 | vb2_plane_size(vb, 1) < ctx->chroma_size) { | ||
| 1633 | mfc_err("plane size is too small for output\n"); | ||
| 1634 | return -EINVAL; | ||
| 1635 | } | ||
| 1636 | } else { | ||
| 1637 | mfc_err("inavlid queue type: %d\n", vq->type); | ||
| 1638 | return -EINVAL; | ||
| 1639 | } | ||
| 1640 | return 0; | ||
| 1641 | } | ||
| 1642 | |||
| 1643 | static int s5p_mfc_start_streaming(struct vb2_queue *q) | ||
| 1644 | { | ||
| 1645 | struct s5p_mfc_ctx *ctx = fh_to_ctx(q->drv_priv); | ||
| 1646 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 1647 | unsigned long flags; | ||
| 1648 | |||
| 1649 | v4l2_ctrl_handler_setup(&ctx->ctrl_handler); | ||
| 1650 | /* If context is ready then dev = work->data;schedule it to run */ | ||
| 1651 | if (s5p_mfc_ctx_ready(ctx)) { | ||
| 1652 | spin_lock_irqsave(&dev->condlock, flags); | ||
| 1653 | set_bit(ctx->num, &dev->ctx_work_bits); | ||
| 1654 | spin_unlock_irqrestore(&dev->condlock, flags); | ||
| 1655 | } | ||
| 1656 | s5p_mfc_try_run(dev); | ||
| 1657 | return 0; | ||
| 1658 | } | ||
| 1659 | |||
| 1660 | static int s5p_mfc_stop_streaming(struct vb2_queue *q) | ||
| 1661 | { | ||
| 1662 | unsigned long flags; | ||
| 1663 | struct s5p_mfc_ctx *ctx = fh_to_ctx(q->drv_priv); | ||
| 1664 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 1665 | |||
| 1666 | if ((ctx->state == MFCINST_FINISHING || | ||
| 1667 | ctx->state == MFCINST_RUNNING) && | ||
| 1668 | dev->curr_ctx == ctx->num && dev->hw_lock) { | ||
| 1669 | ctx->state = MFCINST_ABORT; | ||
| 1670 | s5p_mfc_wait_for_done_ctx(ctx, S5P_FIMV_R2H_CMD_FRAME_DONE_RET, | ||
| 1671 | 0); | ||
| 1672 | } | ||
| 1673 | ctx->state = MFCINST_FINISHED; | ||
| 1674 | spin_lock_irqsave(&dev->irqlock, flags); | ||
| 1675 | if (q->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { | ||
| 1676 | s5p_mfc_cleanup_queue(&ctx->dst_queue, &ctx->vq_dst); | ||
| 1677 | INIT_LIST_HEAD(&ctx->dst_queue); | ||
| 1678 | ctx->dst_queue_cnt = 0; | ||
| 1679 | } | ||
| 1680 | if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { | ||
| 1681 | cleanup_ref_queue(ctx); | ||
| 1682 | s5p_mfc_cleanup_queue(&ctx->src_queue, &ctx->vq_src); | ||
| 1683 | INIT_LIST_HEAD(&ctx->src_queue); | ||
| 1684 | ctx->src_queue_cnt = 0; | ||
| 1685 | } | ||
| 1686 | spin_unlock_irqrestore(&dev->irqlock, flags); | ||
| 1687 | return 0; | ||
| 1688 | } | ||
| 1689 | |||
| 1690 | static void s5p_mfc_buf_queue(struct vb2_buffer *vb) | ||
| 1691 | { | ||
| 1692 | struct vb2_queue *vq = vb->vb2_queue; | ||
| 1693 | struct s5p_mfc_ctx *ctx = fh_to_ctx(vq->drv_priv); | ||
| 1694 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 1695 | unsigned long flags; | ||
| 1696 | struct s5p_mfc_buf *mfc_buf; | ||
| 1697 | |||
| 1698 | if (ctx->state == MFCINST_ERROR) { | ||
| 1699 | vb2_buffer_done(vb, VB2_BUF_STATE_ERROR); | ||
| 1700 | cleanup_ref_queue(ctx); | ||
| 1701 | return; | ||
| 1702 | } | ||
| 1703 | if (vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { | ||
| 1704 | mfc_buf = &ctx->dst_bufs[vb->v4l2_buf.index]; | ||
| 1705 | mfc_buf->used = 0; | ||
| 1706 | /* Mark destination as available for use by MFC */ | ||
| 1707 | spin_lock_irqsave(&dev->irqlock, flags); | ||
| 1708 | list_add_tail(&mfc_buf->list, &ctx->dst_queue); | ||
| 1709 | ctx->dst_queue_cnt++; | ||
| 1710 | spin_unlock_irqrestore(&dev->irqlock, flags); | ||
| 1711 | } else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { | ||
| 1712 | mfc_buf = &ctx->src_bufs[vb->v4l2_buf.index]; | ||
| 1713 | mfc_buf->used = 0; | ||
| 1714 | spin_lock_irqsave(&dev->irqlock, flags); | ||
| 1715 | if (vb->v4l2_planes[0].bytesused == 0) { | ||
| 1716 | mfc_debug(1, "change state to FINISHING\n"); | ||
| 1717 | ctx->state = MFCINST_FINISHING; | ||
| 1718 | vb2_buffer_done(vb, VB2_BUF_STATE_DONE); | ||
| 1719 | cleanup_ref_queue(ctx); | ||
| 1720 | } else { | ||
| 1721 | list_add_tail(&mfc_buf->list, &ctx->src_queue); | ||
| 1722 | ctx->src_queue_cnt++; | ||
| 1723 | } | ||
| 1724 | spin_unlock_irqrestore(&dev->irqlock, flags); | ||
| 1725 | } else { | ||
| 1726 | mfc_err("unsupported buffer type (%d)\n", vq->type); | ||
| 1727 | } | ||
| 1728 | if (s5p_mfc_ctx_ready(ctx)) { | ||
| 1729 | spin_lock_irqsave(&dev->condlock, flags); | ||
| 1730 | set_bit(ctx->num, &dev->ctx_work_bits); | ||
| 1731 | spin_unlock_irqrestore(&dev->condlock, flags); | ||
| 1732 | } | ||
| 1733 | s5p_mfc_try_run(dev); | ||
| 1734 | } | ||
| 1735 | |||
| 1736 | static struct vb2_ops s5p_mfc_enc_qops = { | ||
| 1737 | .queue_setup = s5p_mfc_queue_setup, | ||
| 1738 | .wait_prepare = s5p_mfc_unlock, | ||
| 1739 | .wait_finish = s5p_mfc_lock, | ||
| 1740 | .buf_init = s5p_mfc_buf_init, | ||
| 1741 | .buf_prepare = s5p_mfc_buf_prepare, | ||
| 1742 | .start_streaming = s5p_mfc_start_streaming, | ||
| 1743 | .stop_streaming = s5p_mfc_stop_streaming, | ||
| 1744 | .buf_queue = s5p_mfc_buf_queue, | ||
| 1745 | }; | ||
| 1746 | |||
| 1747 | struct s5p_mfc_codec_ops *get_enc_codec_ops(void) | ||
| 1748 | { | ||
| 1749 | return &encoder_codec_ops; | ||
| 1750 | } | ||
| 1751 | |||
| 1752 | struct vb2_ops *get_enc_queue_ops(void) | ||
| 1753 | { | ||
| 1754 | return &s5p_mfc_enc_qops; | ||
| 1755 | } | ||
| 1756 | |||
| 1757 | const struct v4l2_ioctl_ops *get_enc_v4l2_ioctl_ops(void) | ||
| 1758 | { | ||
| 1759 | return &s5p_mfc_enc_ioctl_ops; | ||
| 1760 | } | ||
| 1761 | |||
| 1762 | #define IS_MFC51_PRIV(x) ((V4L2_CTRL_ID2CLASS(x) == V4L2_CTRL_CLASS_MPEG) \ | ||
| 1763 | && V4L2_CTRL_DRIVER_PRIV(x)) | ||
| 1764 | |||
| 1765 | int s5p_mfc_enc_ctrls_setup(struct s5p_mfc_ctx *ctx) | ||
| 1766 | { | ||
| 1767 | struct v4l2_ctrl_config cfg; | ||
| 1768 | int i; | ||
| 1769 | |||
| 1770 | v4l2_ctrl_handler_init(&ctx->ctrl_handler, NUM_CTRLS); | ||
| 1771 | if (ctx->ctrl_handler.error) { | ||
| 1772 | mfc_err("v4l2_ctrl_handler_init failed\n"); | ||
| 1773 | return ctx->ctrl_handler.error; | ||
| 1774 | } | ||
| 1775 | for (i = 0; i < NUM_CTRLS; i++) { | ||
| 1776 | if (IS_MFC51_PRIV(controls[i].id)) { | ||
| 1777 | cfg.ops = &s5p_mfc_enc_ctrl_ops; | ||
| 1778 | cfg.id = controls[i].id; | ||
| 1779 | cfg.min = controls[i].minimum; | ||
| 1780 | cfg.max = controls[i].maximum; | ||
| 1781 | cfg.def = controls[i].default_value; | ||
| 1782 | cfg.name = controls[i].name; | ||
| 1783 | cfg.type = controls[i].type; | ||
| 1784 | cfg.flags = 0; | ||
| 1785 | |||
| 1786 | if (cfg.type == V4L2_CTRL_TYPE_MENU) { | ||
| 1787 | cfg.step = 0; | ||
| 1788 | cfg.menu_skip_mask = cfg.menu_skip_mask; | ||
| 1789 | cfg.qmenu = mfc51_get_menu(cfg.id); | ||
| 1790 | } else { | ||
| 1791 | cfg.step = controls[i].step; | ||
| 1792 | cfg.menu_skip_mask = 0; | ||
| 1793 | } | ||
| 1794 | ctx->ctrls[i] = v4l2_ctrl_new_custom(&ctx->ctrl_handler, | ||
| 1795 | &cfg, NULL); | ||
| 1796 | } else { | ||
| 1797 | if (controls[i].type == V4L2_CTRL_TYPE_MENU) { | ||
| 1798 | ctx->ctrls[i] = v4l2_ctrl_new_std_menu( | ||
| 1799 | &ctx->ctrl_handler, | ||
| 1800 | &s5p_mfc_enc_ctrl_ops, controls[i].id, | ||
| 1801 | controls[i].maximum, 0, | ||
| 1802 | controls[i].default_value); | ||
| 1803 | } else { | ||
| 1804 | ctx->ctrls[i] = v4l2_ctrl_new_std( | ||
| 1805 | &ctx->ctrl_handler, | ||
| 1806 | &s5p_mfc_enc_ctrl_ops, controls[i].id, | ||
| 1807 | controls[i].minimum, | ||
| 1808 | controls[i].maximum, controls[i].step, | ||
| 1809 | controls[i].default_value); | ||
| 1810 | } | ||
| 1811 | } | ||
| 1812 | if (ctx->ctrl_handler.error) { | ||
| 1813 | mfc_err("Adding control (%d) failed\n", i); | ||
| 1814 | return ctx->ctrl_handler.error; | ||
| 1815 | } | ||
| 1816 | if (controls[i].is_volatile && ctx->ctrls[i]) | ||
| 1817 | ctx->ctrls[i]->is_volatile = 1; | ||
| 1818 | } | ||
| 1819 | return 0; | ||
| 1820 | } | ||
| 1821 | |||
| 1822 | void s5p_mfc_enc_ctrls_delete(struct s5p_mfc_ctx *ctx) | ||
| 1823 | { | ||
| 1824 | int i; | ||
| 1825 | |||
| 1826 | v4l2_ctrl_handler_free(&ctx->ctrl_handler); | ||
| 1827 | for (i = 0; i < NUM_CTRLS; i++) | ||
| 1828 | ctx->ctrls[i] = NULL; | ||
| 1829 | } | ||
diff --git a/drivers/media/video/s5p-mfc/s5p_mfc_enc.h b/drivers/media/video/s5p-mfc/s5p_mfc_enc.h new file mode 100644 index 000000000000..405bdd3ee083 --- /dev/null +++ b/drivers/media/video/s5p-mfc/s5p_mfc_enc.h | |||
| @@ -0,0 +1,23 @@ | |||
| 1 | /* | ||
| 2 | * linux/drivers/media/video/s5p-mfc/s5p_mfc_enc.h | ||
| 3 | * | ||
| 4 | * Copyright (C) 2011 Samsung Electronics Co., Ltd. | ||
| 5 | * http://www.samsung.com/ | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License as published by | ||
| 9 | * the Free Software Foundation; either version 2 of the License, or | ||
| 10 | * (at your option) any later version. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #ifndef S5P_MFC_ENC_H_ | ||
| 14 | #define S5P_MFC_ENC_H_ | ||
| 15 | |||
| 16 | struct s5p_mfc_codec_ops *get_enc_codec_ops(void); | ||
| 17 | struct vb2_ops *get_enc_queue_ops(void); | ||
| 18 | const struct v4l2_ioctl_ops *get_enc_v4l2_ioctl_ops(void); | ||
| 19 | struct s5p_mfc_fmt *get_enc_def_fmt(bool src); | ||
| 20 | int s5p_mfc_enc_ctrls_setup(struct s5p_mfc_ctx *ctx); | ||
| 21 | void s5p_mfc_enc_ctrls_delete(struct s5p_mfc_ctx *ctx); | ||
| 22 | |||
| 23 | #endif /* S5P_MFC_ENC_H_ */ | ||
diff --git a/drivers/media/video/s5p-mfc/s5p_mfc_intr.c b/drivers/media/video/s5p-mfc/s5p_mfc_intr.c new file mode 100644 index 000000000000..8f2f8bf4da7f --- /dev/null +++ b/drivers/media/video/s5p-mfc/s5p_mfc_intr.c | |||
| @@ -0,0 +1,92 @@ | |||
| 1 | /* | ||
| 2 | * drivers/media/video/samsung/mfc5/s5p_mfc_intr.c | ||
| 3 | * | ||
| 4 | * C file for Samsung MFC (Multi Function Codec - FIMV) driver | ||
| 5 | * This file contains functions used to wait for command completion. | ||
| 6 | * | ||
| 7 | * Kamil Debski, Copyright (C) 2011 Samsung Electronics Co., Ltd. | ||
| 8 | * http://www.samsung.com/ | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #include <linux/delay.h> | ||
| 16 | #include <linux/errno.h> | ||
| 17 | #include <linux/io.h> | ||
| 18 | #include <linux/sched.h> | ||
| 19 | #include <linux/wait.h> | ||
| 20 | #include "regs-mfc.h" | ||
| 21 | #include "s5p_mfc_common.h" | ||
| 22 | #include "s5p_mfc_debug.h" | ||
| 23 | #include "s5p_mfc_intr.h" | ||
| 24 | |||
| 25 | int s5p_mfc_wait_for_done_dev(struct s5p_mfc_dev *dev, int command) | ||
| 26 | { | ||
| 27 | int ret; | ||
| 28 | |||
| 29 | ret = wait_event_interruptible_timeout(dev->queue, | ||
| 30 | (dev->int_cond && (dev->int_type == command | ||
| 31 | || dev->int_type == S5P_FIMV_R2H_CMD_ERR_RET)), | ||
| 32 | msecs_to_jiffies(MFC_INT_TIMEOUT)); | ||
| 33 | if (ret == 0) { | ||
| 34 | mfc_err("Interrupt (dev->int_type:%d, command:%d) timed out\n", | ||
| 35 | dev->int_type, command); | ||
| 36 | return 1; | ||
| 37 | } else if (ret == -ERESTARTSYS) { | ||
| 38 | mfc_err("Interrupted by a signal\n"); | ||
| 39 | return 1; | ||
| 40 | } | ||
| 41 | mfc_debug(1, "Finished waiting (dev->int_type:%d, command: %d)\n", | ||
| 42 | dev->int_type, command); | ||
| 43 | if (dev->int_type == S5P_FIMV_R2H_CMD_ERR_RET) | ||
| 44 | return 1; | ||
| 45 | return 0; | ||
| 46 | } | ||
| 47 | |||
| 48 | void s5p_mfc_clean_dev_int_flags(struct s5p_mfc_dev *dev) | ||
| 49 | { | ||
| 50 | dev->int_cond = 0; | ||
| 51 | dev->int_type = 0; | ||
| 52 | dev->int_err = 0; | ||
| 53 | } | ||
| 54 | |||
| 55 | int s5p_mfc_wait_for_done_ctx(struct s5p_mfc_ctx *ctx, | ||
| 56 | int command, int interrupt) | ||
| 57 | { | ||
| 58 | int ret; | ||
| 59 | |||
| 60 | if (interrupt) { | ||
| 61 | ret = wait_event_interruptible_timeout(ctx->queue, | ||
| 62 | (ctx->int_cond && (ctx->int_type == command | ||
| 63 | || ctx->int_type == S5P_FIMV_R2H_CMD_ERR_RET)), | ||
| 64 | msecs_to_jiffies(MFC_INT_TIMEOUT)); | ||
| 65 | } else { | ||
| 66 | ret = wait_event_timeout(ctx->queue, | ||
| 67 | (ctx->int_cond && (ctx->int_type == command | ||
| 68 | || ctx->int_type == S5P_FIMV_R2H_CMD_ERR_RET)), | ||
| 69 | msecs_to_jiffies(MFC_INT_TIMEOUT)); | ||
| 70 | } | ||
| 71 | if (ret == 0) { | ||
| 72 | mfc_err("Interrupt (ctx->int_type:%d, command:%d) timed out\n", | ||
| 73 | ctx->int_type, command); | ||
| 74 | return 1; | ||
| 75 | } else if (ret == -ERESTARTSYS) { | ||
| 76 | mfc_err("Interrupted by a signal\n"); | ||
| 77 | return 1; | ||
| 78 | } | ||
| 79 | mfc_debug(1, "Finished waiting (ctx->int_type:%d, command: %d)\n", | ||
| 80 | ctx->int_type, command); | ||
| 81 | if (ctx->int_type == S5P_FIMV_R2H_CMD_ERR_RET) | ||
| 82 | return 1; | ||
| 83 | return 0; | ||
| 84 | } | ||
| 85 | |||
| 86 | void s5p_mfc_clean_ctx_int_flags(struct s5p_mfc_ctx *ctx) | ||
| 87 | { | ||
| 88 | ctx->int_cond = 0; | ||
| 89 | ctx->int_type = 0; | ||
| 90 | ctx->int_err = 0; | ||
| 91 | } | ||
| 92 | |||
diff --git a/drivers/media/video/s5p-mfc/s5p_mfc_intr.h b/drivers/media/video/s5p-mfc/s5p_mfc_intr.h new file mode 100644 index 000000000000..122d7732f745 --- /dev/null +++ b/drivers/media/video/s5p-mfc/s5p_mfc_intr.h | |||
| @@ -0,0 +1,26 @@ | |||
| 1 | /* | ||
| 2 | * drivers/media/video/samsung/mfc5/s5p_mfc_intr.h | ||
| 3 | * | ||
| 4 | * Header file for Samsung MFC (Multi Function Codec - FIMV) driver | ||
| 5 | * It contains waiting functions declarations. | ||
| 6 | * | ||
| 7 | * Kamil Debski, Copyright (C) 2011 Samsung Electronics | ||
| 8 | * http://www.samsung.com/ | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #ifndef S5P_MFC_INTR_H_ | ||
| 16 | #define S5P_MFC_INTR_H_ | ||
| 17 | |||
| 18 | #include "s5p_mfc_common.h" | ||
| 19 | |||
| 20 | int s5p_mfc_wait_for_done_ctx(struct s5p_mfc_ctx *ctx, | ||
| 21 | int command, int interrupt); | ||
| 22 | int s5p_mfc_wait_for_done_dev(struct s5p_mfc_dev *dev, int command); | ||
| 23 | void s5p_mfc_clean_ctx_int_flags(struct s5p_mfc_ctx *ctx); | ||
| 24 | void s5p_mfc_clean_dev_int_flags(struct s5p_mfc_dev *dev); | ||
| 25 | |||
| 26 | #endif /* S5P_MFC_INTR_H_ */ | ||
diff --git a/drivers/media/video/s5p-mfc/s5p_mfc_opr.c b/drivers/media/video/s5p-mfc/s5p_mfc_opr.c new file mode 100644 index 000000000000..7b239168c199 --- /dev/null +++ b/drivers/media/video/s5p-mfc/s5p_mfc_opr.c | |||
| @@ -0,0 +1,1397 @@ | |||
| 1 | /* | ||
| 2 | * drivers/media/video/samsung/mfc5/s5p_mfc_opr.c | ||
| 3 | * | ||
| 4 | * Samsung MFC (Multi Function Codec - FIMV) driver | ||
| 5 | * This file contains hw related functions. | ||
| 6 | * | ||
| 7 | * Kamil Debski, Copyright (c) 2011 Samsung Electronics | ||
| 8 | * http://www.samsung.com/ | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #include "regs-mfc.h" | ||
| 16 | #include "s5p_mfc_cmd.h" | ||
| 17 | #include "s5p_mfc_common.h" | ||
| 18 | #include "s5p_mfc_ctrl.h" | ||
| 19 | #include "s5p_mfc_debug.h" | ||
| 20 | #include "s5p_mfc_intr.h" | ||
| 21 | #include "s5p_mfc_opr.h" | ||
| 22 | #include "s5p_mfc_pm.h" | ||
| 23 | #include "s5p_mfc_shm.h" | ||
| 24 | #include <asm/cacheflush.h> | ||
| 25 | #include <linux/delay.h> | ||
| 26 | #include <linux/dma-mapping.h> | ||
| 27 | #include <linux/err.h> | ||
| 28 | #include <linux/firmware.h> | ||
| 29 | #include <linux/io.h> | ||
| 30 | #include <linux/jiffies.h> | ||
| 31 | #include <linux/mm.h> | ||
| 32 | #include <linux/sched.h> | ||
| 33 | |||
| 34 | #define OFFSETA(x) (((x) - dev->bank1) >> MFC_OFFSET_SHIFT) | ||
| 35 | #define OFFSETB(x) (((x) - dev->bank2) >> MFC_OFFSET_SHIFT) | ||
| 36 | |||
| 37 | /* Allocate temporary buffers for decoding */ | ||
| 38 | int s5p_mfc_alloc_dec_temp_buffers(struct s5p_mfc_ctx *ctx) | ||
| 39 | { | ||
| 40 | void *desc_virt; | ||
| 41 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 42 | |||
| 43 | ctx->desc_buf = vb2_dma_contig_memops.alloc( | ||
| 44 | dev->alloc_ctx[MFC_BANK1_ALLOC_CTX], DESC_BUF_SIZE); | ||
| 45 | if (IS_ERR_VALUE((int)ctx->desc_buf)) { | ||
| 46 | ctx->desc_buf = 0; | ||
| 47 | mfc_err("Allocating DESC buffer failed\n"); | ||
| 48 | return -ENOMEM; | ||
| 49 | } | ||
| 50 | ctx->desc_phys = s5p_mfc_mem_cookie( | ||
| 51 | dev->alloc_ctx[MFC_BANK1_ALLOC_CTX], ctx->desc_buf); | ||
| 52 | BUG_ON(ctx->desc_phys & ((1 << MFC_BANK1_ALIGN_ORDER) - 1)); | ||
| 53 | desc_virt = vb2_dma_contig_memops.vaddr(ctx->desc_buf); | ||
| 54 | if (desc_virt == NULL) { | ||
| 55 | vb2_dma_contig_memops.put(ctx->desc_buf); | ||
| 56 | ctx->desc_phys = 0; | ||
| 57 | ctx->desc_buf = 0; | ||
| 58 | mfc_err("Remapping DESC buffer failed\n"); | ||
| 59 | return -ENOMEM; | ||
| 60 | } | ||
| 61 | memset(desc_virt, 0, DESC_BUF_SIZE); | ||
| 62 | wmb(); | ||
| 63 | return 0; | ||
| 64 | } | ||
| 65 | |||
| 66 | /* Release temporary buffers for decoding */ | ||
| 67 | void s5p_mfc_release_dec_desc_buffer(struct s5p_mfc_ctx *ctx) | ||
| 68 | { | ||
| 69 | if (ctx->desc_phys) { | ||
| 70 | vb2_dma_contig_memops.put(ctx->desc_buf); | ||
| 71 | ctx->desc_phys = 0; | ||
| 72 | ctx->desc_buf = 0; | ||
| 73 | } | ||
| 74 | } | ||
| 75 | |||
| 76 | /* Allocate codec buffers */ | ||
| 77 | int s5p_mfc_alloc_codec_buffers(struct s5p_mfc_ctx *ctx) | ||
| 78 | { | ||
| 79 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 80 | unsigned int enc_ref_y_size = 0; | ||
| 81 | unsigned int enc_ref_c_size = 0; | ||
| 82 | unsigned int guard_width, guard_height; | ||
| 83 | |||
| 84 | if (ctx->type == MFCINST_DECODER) { | ||
| 85 | mfc_debug(2, "Luma size:%d Chroma size:%d MV size:%d\n", | ||
| 86 | ctx->luma_size, ctx->chroma_size, ctx->mv_size); | ||
| 87 | mfc_debug(2, "Totals bufs: %d\n", ctx->total_dpb_count); | ||
| 88 | } else if (ctx->type == MFCINST_ENCODER) { | ||
| 89 | enc_ref_y_size = ALIGN(ctx->img_width, S5P_FIMV_NV12MT_HALIGN) | ||
| 90 | * ALIGN(ctx->img_height, S5P_FIMV_NV12MT_VALIGN); | ||
| 91 | enc_ref_y_size = ALIGN(enc_ref_y_size, S5P_FIMV_NV12MT_SALIGN); | ||
| 92 | |||
| 93 | if (ctx->codec_mode == S5P_FIMV_CODEC_H264_ENC) { | ||
| 94 | enc_ref_c_size = ALIGN(ctx->img_width, | ||
| 95 | S5P_FIMV_NV12MT_HALIGN) | ||
| 96 | * ALIGN(ctx->img_height >> 1, | ||
| 97 | S5P_FIMV_NV12MT_VALIGN); | ||
| 98 | enc_ref_c_size = ALIGN(enc_ref_c_size, | ||
| 99 | S5P_FIMV_NV12MT_SALIGN); | ||
| 100 | } else { | ||
| 101 | guard_width = ALIGN(ctx->img_width + 16, | ||
| 102 | S5P_FIMV_NV12MT_HALIGN); | ||
| 103 | guard_height = ALIGN((ctx->img_height >> 1) + 4, | ||
| 104 | S5P_FIMV_NV12MT_VALIGN); | ||
| 105 | enc_ref_c_size = ALIGN(guard_width * guard_height, | ||
| 106 | S5P_FIMV_NV12MT_SALIGN); | ||
| 107 | } | ||
| 108 | mfc_debug(2, "recon luma size: %d chroma size: %d\n", | ||
| 109 | enc_ref_y_size, enc_ref_c_size); | ||
| 110 | } else { | ||
| 111 | return -EINVAL; | ||
| 112 | } | ||
| 113 | /* Codecs have different memory requirements */ | ||
| 114 | switch (ctx->codec_mode) { | ||
| 115 | case S5P_FIMV_CODEC_H264_DEC: | ||
| 116 | ctx->bank1_size = | ||
| 117 | ALIGN(S5P_FIMV_DEC_NB_IP_SIZE + | ||
| 118 | S5P_FIMV_DEC_VERT_NB_MV_SIZE, | ||
| 119 | S5P_FIMV_DEC_BUF_ALIGN); | ||
| 120 | ctx->bank2_size = ctx->total_dpb_count * ctx->mv_size; | ||
| 121 | break; | ||
| 122 | case S5P_FIMV_CODEC_MPEG4_DEC: | ||
| 123 | ctx->bank1_size = | ||
| 124 | ALIGN(S5P_FIMV_DEC_NB_DCAC_SIZE + | ||
| 125 | S5P_FIMV_DEC_UPNB_MV_SIZE + | ||
| 126 | S5P_FIMV_DEC_SUB_ANCHOR_MV_SIZE + | ||
| 127 | S5P_FIMV_DEC_STX_PARSER_SIZE + | ||
| 128 | S5P_FIMV_DEC_OVERLAP_TRANSFORM_SIZE, | ||
| 129 | S5P_FIMV_DEC_BUF_ALIGN); | ||
| 130 | ctx->bank2_size = 0; | ||
| 131 | break; | ||
| 132 | case S5P_FIMV_CODEC_VC1RCV_DEC: | ||
| 133 | case S5P_FIMV_CODEC_VC1_DEC: | ||
| 134 | ctx->bank1_size = | ||
| 135 | ALIGN(S5P_FIMV_DEC_OVERLAP_TRANSFORM_SIZE + | ||
| 136 | S5P_FIMV_DEC_UPNB_MV_SIZE + | ||
| 137 | S5P_FIMV_DEC_SUB_ANCHOR_MV_SIZE + | ||
| 138 | S5P_FIMV_DEC_NB_DCAC_SIZE + | ||
| 139 | 3 * S5P_FIMV_DEC_VC1_BITPLANE_SIZE, | ||
| 140 | S5P_FIMV_DEC_BUF_ALIGN); | ||
| 141 | ctx->bank2_size = 0; | ||
| 142 | break; | ||
| 143 | case S5P_FIMV_CODEC_MPEG2_DEC: | ||
| 144 | ctx->bank1_size = 0; | ||
| 145 | ctx->bank2_size = 0; | ||
| 146 | break; | ||
| 147 | case S5P_FIMV_CODEC_H263_DEC: | ||
| 148 | ctx->bank1_size = | ||
| 149 | ALIGN(S5P_FIMV_DEC_OVERLAP_TRANSFORM_SIZE + | ||
| 150 | S5P_FIMV_DEC_UPNB_MV_SIZE + | ||
| 151 | S5P_FIMV_DEC_SUB_ANCHOR_MV_SIZE + | ||
| 152 | S5P_FIMV_DEC_NB_DCAC_SIZE, | ||
| 153 | S5P_FIMV_DEC_BUF_ALIGN); | ||
| 154 | ctx->bank2_size = 0; | ||
| 155 | break; | ||
| 156 | case S5P_FIMV_CODEC_H264_ENC: | ||
| 157 | ctx->bank1_size = (enc_ref_y_size * 2) + | ||
| 158 | S5P_FIMV_ENC_UPMV_SIZE + | ||
| 159 | S5P_FIMV_ENC_COLFLG_SIZE + | ||
| 160 | S5P_FIMV_ENC_INTRAMD_SIZE + | ||
| 161 | S5P_FIMV_ENC_NBORINFO_SIZE; | ||
| 162 | ctx->bank2_size = (enc_ref_y_size * 2) + | ||
| 163 | (enc_ref_c_size * 4) + | ||
| 164 | S5P_FIMV_ENC_INTRAPRED_SIZE; | ||
| 165 | break; | ||
| 166 | case S5P_FIMV_CODEC_MPEG4_ENC: | ||
| 167 | ctx->bank1_size = (enc_ref_y_size * 2) + | ||
| 168 | S5P_FIMV_ENC_UPMV_SIZE + | ||
| 169 | S5P_FIMV_ENC_COLFLG_SIZE + | ||
| 170 | S5P_FIMV_ENC_ACDCCOEF_SIZE; | ||
| 171 | ctx->bank2_size = (enc_ref_y_size * 2) + | ||
| 172 | (enc_ref_c_size * 4); | ||
| 173 | break; | ||
| 174 | case S5P_FIMV_CODEC_H263_ENC: | ||
| 175 | ctx->bank1_size = (enc_ref_y_size * 2) + | ||
| 176 | S5P_FIMV_ENC_UPMV_SIZE + | ||
| 177 | S5P_FIMV_ENC_ACDCCOEF_SIZE; | ||
| 178 | ctx->bank2_size = (enc_ref_y_size * 2) + | ||
| 179 | (enc_ref_c_size * 4); | ||
| 180 | break; | ||
| 181 | default: | ||
| 182 | break; | ||
| 183 | } | ||
| 184 | /* Allocate only if memory from bank 1 is necessary */ | ||
| 185 | if (ctx->bank1_size > 0) { | ||
| 186 | ctx->bank1_buf = vb2_dma_contig_memops.alloc( | ||
| 187 | dev->alloc_ctx[MFC_BANK1_ALLOC_CTX], ctx->bank1_size); | ||
| 188 | if (IS_ERR(ctx->bank1_buf)) { | ||
| 189 | ctx->bank1_buf = 0; | ||
| 190 | printk(KERN_ERR | ||
| 191 | "Buf alloc for decoding failed (port A)\n"); | ||
| 192 | return -ENOMEM; | ||
| 193 | } | ||
| 194 | ctx->bank1_phys = s5p_mfc_mem_cookie( | ||
| 195 | dev->alloc_ctx[MFC_BANK1_ALLOC_CTX], ctx->bank1_buf); | ||
| 196 | BUG_ON(ctx->bank1_phys & ((1 << MFC_BANK1_ALIGN_ORDER) - 1)); | ||
| 197 | } | ||
| 198 | /* Allocate only if memory from bank 2 is necessary */ | ||
| 199 | if (ctx->bank2_size > 0) { | ||
| 200 | ctx->bank2_buf = vb2_dma_contig_memops.alloc( | ||
| 201 | dev->alloc_ctx[MFC_BANK2_ALLOC_CTX], ctx->bank2_size); | ||
| 202 | if (IS_ERR(ctx->bank2_buf)) { | ||
| 203 | ctx->bank2_buf = 0; | ||
| 204 | mfc_err("Buf alloc for decoding failed (port B)\n"); | ||
| 205 | return -ENOMEM; | ||
| 206 | } | ||
| 207 | ctx->bank2_phys = s5p_mfc_mem_cookie( | ||
| 208 | dev->alloc_ctx[MFC_BANK2_ALLOC_CTX], ctx->bank2_buf); | ||
| 209 | BUG_ON(ctx->bank2_phys & ((1 << MFC_BANK2_ALIGN_ORDER) - 1)); | ||
| 210 | } | ||
| 211 | return 0; | ||
| 212 | } | ||
| 213 | |||
| 214 | /* Release buffers allocated for codec */ | ||
| 215 | void s5p_mfc_release_codec_buffers(struct s5p_mfc_ctx *ctx) | ||
| 216 | { | ||
| 217 | if (ctx->bank1_buf) { | ||
| 218 | vb2_dma_contig_memops.put(ctx->bank1_buf); | ||
| 219 | ctx->bank1_buf = 0; | ||
| 220 | ctx->bank1_phys = 0; | ||
| 221 | ctx->bank1_size = 0; | ||
| 222 | } | ||
| 223 | if (ctx->bank2_buf) { | ||
| 224 | vb2_dma_contig_memops.put(ctx->bank2_buf); | ||
| 225 | ctx->bank2_buf = 0; | ||
| 226 | ctx->bank2_phys = 0; | ||
| 227 | ctx->bank2_size = 0; | ||
| 228 | } | ||
| 229 | } | ||
| 230 | |||
| 231 | /* Allocate memory for instance data buffer */ | ||
| 232 | int s5p_mfc_alloc_instance_buffer(struct s5p_mfc_ctx *ctx) | ||
| 233 | { | ||
| 234 | void *context_virt; | ||
| 235 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 236 | |||
| 237 | if (ctx->codec_mode == S5P_FIMV_CODEC_H264_DEC || | ||
| 238 | ctx->codec_mode == S5P_FIMV_CODEC_H264_ENC) | ||
| 239 | ctx->ctx_size = MFC_H264_CTX_BUF_SIZE; | ||
| 240 | else | ||
| 241 | ctx->ctx_size = MFC_CTX_BUF_SIZE; | ||
| 242 | ctx->ctx_buf = vb2_dma_contig_memops.alloc( | ||
| 243 | dev->alloc_ctx[MFC_BANK1_ALLOC_CTX], ctx->ctx_size); | ||
| 244 | if (IS_ERR(ctx->ctx_buf)) { | ||
| 245 | mfc_err("Allocating context buffer failed\n"); | ||
| 246 | ctx->ctx_phys = 0; | ||
| 247 | ctx->ctx_buf = 0; | ||
| 248 | return -ENOMEM; | ||
| 249 | } | ||
| 250 | ctx->ctx_phys = s5p_mfc_mem_cookie( | ||
| 251 | dev->alloc_ctx[MFC_BANK1_ALLOC_CTX], ctx->ctx_buf); | ||
| 252 | BUG_ON(ctx->ctx_phys & ((1 << MFC_BANK1_ALIGN_ORDER) - 1)); | ||
| 253 | ctx->ctx_ofs = OFFSETA(ctx->ctx_phys); | ||
| 254 | context_virt = vb2_dma_contig_memops.vaddr(ctx->ctx_buf); | ||
| 255 | if (context_virt == NULL) { | ||
| 256 | mfc_err("Remapping instance buffer failed\n"); | ||
| 257 | vb2_dma_contig_memops.put(ctx->ctx_buf); | ||
| 258 | ctx->ctx_phys = 0; | ||
| 259 | ctx->ctx_buf = 0; | ||
| 260 | return -ENOMEM; | ||
| 261 | } | ||
| 262 | /* Zero content of the allocated memory */ | ||
| 263 | memset(context_virt, 0, ctx->ctx_size); | ||
| 264 | wmb(); | ||
| 265 | if (s5p_mfc_init_shm(ctx) < 0) { | ||
| 266 | vb2_dma_contig_memops.put(ctx->ctx_buf); | ||
| 267 | ctx->ctx_phys = 0; | ||
| 268 | ctx->ctx_buf = 0; | ||
| 269 | return -ENOMEM; | ||
| 270 | } | ||
| 271 | return 0; | ||
| 272 | } | ||
| 273 | |||
| 274 | /* Release instance buffer */ | ||
| 275 | void s5p_mfc_release_instance_buffer(struct s5p_mfc_ctx *ctx) | ||
| 276 | { | ||
| 277 | if (ctx->ctx_buf) { | ||
| 278 | vb2_dma_contig_memops.put(ctx->ctx_buf); | ||
| 279 | ctx->ctx_phys = 0; | ||
| 280 | ctx->ctx_buf = 0; | ||
| 281 | } | ||
| 282 | if (ctx->shm_alloc) { | ||
| 283 | vb2_dma_contig_memops.put(ctx->shm_alloc); | ||
| 284 | ctx->shm_alloc = 0; | ||
| 285 | ctx->shm = 0; | ||
| 286 | } | ||
| 287 | } | ||
| 288 | |||
| 289 | /* Set registers for decoding temporary buffers */ | ||
| 290 | void s5p_mfc_set_dec_desc_buffer(struct s5p_mfc_ctx *ctx) | ||
| 291 | { | ||
| 292 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 293 | |||
| 294 | mfc_write(dev, OFFSETA(ctx->desc_phys), S5P_FIMV_SI_CH0_DESC_ADR); | ||
| 295 | mfc_write(dev, DESC_BUF_SIZE, S5P_FIMV_SI_CH0_DESC_SIZE); | ||
| 296 | } | ||
| 297 | |||
| 298 | /* Set registers for shared buffer */ | ||
| 299 | void s5p_mfc_set_shared_buffer(struct s5p_mfc_ctx *ctx) | ||
| 300 | { | ||
| 301 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 302 | mfc_write(dev, ctx->shm_ofs, S5P_FIMV_SI_CH0_HOST_WR_ADR); | ||
| 303 | } | ||
| 304 | |||
| 305 | /* Set registers for decoding stream buffer */ | ||
| 306 | int s5p_mfc_set_dec_stream_buffer(struct s5p_mfc_ctx *ctx, int buf_addr, | ||
| 307 | unsigned int start_num_byte, unsigned int buf_size) | ||
| 308 | { | ||
| 309 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 310 | |||
| 311 | mfc_write(dev, OFFSETA(buf_addr), S5P_FIMV_SI_CH0_SB_ST_ADR); | ||
| 312 | mfc_write(dev, ctx->dec_src_buf_size, S5P_FIMV_SI_CH0_CPB_SIZE); | ||
| 313 | mfc_write(dev, buf_size, S5P_FIMV_SI_CH0_SB_FRM_SIZE); | ||
| 314 | s5p_mfc_write_shm(ctx, start_num_byte, START_BYTE_NUM); | ||
| 315 | return 0; | ||
| 316 | } | ||
| 317 | |||
| 318 | /* Set decoding frame buffer */ | ||
| 319 | int s5p_mfc_set_dec_frame_buffer(struct s5p_mfc_ctx *ctx) | ||
| 320 | { | ||
| 321 | unsigned int frame_size, i; | ||
| 322 | unsigned int frame_size_ch, frame_size_mv; | ||
| 323 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 324 | unsigned int dpb; | ||
| 325 | size_t buf_addr1, buf_addr2; | ||
| 326 | int buf_size1, buf_size2; | ||
| 327 | |||
| 328 | buf_addr1 = ctx->bank1_phys; | ||
| 329 | buf_size1 = ctx->bank1_size; | ||
| 330 | buf_addr2 = ctx->bank2_phys; | ||
| 331 | buf_size2 = ctx->bank2_size; | ||
| 332 | dpb = mfc_read(dev, S5P_FIMV_SI_CH0_DPB_CONF_CTRL) & | ||
| 333 | ~S5P_FIMV_DPB_COUNT_MASK; | ||
| 334 | mfc_write(dev, ctx->total_dpb_count | dpb, | ||
| 335 | S5P_FIMV_SI_CH0_DPB_CONF_CTRL); | ||
| 336 | s5p_mfc_set_shared_buffer(ctx); | ||
| 337 | switch (ctx->codec_mode) { | ||
| 338 | case S5P_FIMV_CODEC_H264_DEC: | ||
| 339 | mfc_write(dev, OFFSETA(buf_addr1), | ||
| 340 | S5P_FIMV_H264_VERT_NB_MV_ADR); | ||
| 341 | buf_addr1 += S5P_FIMV_DEC_VERT_NB_MV_SIZE; | ||
| 342 | buf_size1 -= S5P_FIMV_DEC_VERT_NB_MV_SIZE; | ||
| 343 | mfc_write(dev, OFFSETA(buf_addr1), S5P_FIMV_H264_NB_IP_ADR); | ||
| 344 | buf_addr1 += S5P_FIMV_DEC_NB_IP_SIZE; | ||
| 345 | buf_size1 -= S5P_FIMV_DEC_NB_IP_SIZE; | ||
| 346 | break; | ||
| 347 | case S5P_FIMV_CODEC_MPEG4_DEC: | ||
| 348 | mfc_write(dev, OFFSETA(buf_addr1), S5P_FIMV_MPEG4_NB_DCAC_ADR); | ||
| 349 | buf_addr1 += S5P_FIMV_DEC_NB_DCAC_SIZE; | ||
| 350 | buf_size1 -= S5P_FIMV_DEC_NB_DCAC_SIZE; | ||
| 351 | mfc_write(dev, OFFSETA(buf_addr1), S5P_FIMV_MPEG4_UP_NB_MV_ADR); | ||
| 352 | buf_addr1 += S5P_FIMV_DEC_UPNB_MV_SIZE; | ||
| 353 | buf_size1 -= S5P_FIMV_DEC_UPNB_MV_SIZE; | ||
| 354 | mfc_write(dev, OFFSETA(buf_addr1), S5P_FIMV_MPEG4_SA_MV_ADR); | ||
| 355 | buf_addr1 += S5P_FIMV_DEC_SUB_ANCHOR_MV_SIZE; | ||
| 356 | buf_size1 -= S5P_FIMV_DEC_SUB_ANCHOR_MV_SIZE; | ||
| 357 | mfc_write(dev, OFFSETA(buf_addr1), S5P_FIMV_MPEG4_SP_ADR); | ||
| 358 | buf_addr1 += S5P_FIMV_DEC_STX_PARSER_SIZE; | ||
| 359 | buf_size1 -= S5P_FIMV_DEC_STX_PARSER_SIZE; | ||
| 360 | mfc_write(dev, OFFSETA(buf_addr1), S5P_FIMV_MPEG4_OT_LINE_ADR); | ||
| 361 | buf_addr1 += S5P_FIMV_DEC_OVERLAP_TRANSFORM_SIZE; | ||
| 362 | buf_size1 -= S5P_FIMV_DEC_OVERLAP_TRANSFORM_SIZE; | ||
| 363 | break; | ||
| 364 | case S5P_FIMV_CODEC_H263_DEC: | ||
| 365 | mfc_write(dev, OFFSETA(buf_addr1), S5P_FIMV_H263_OT_LINE_ADR); | ||
| 366 | buf_addr1 += S5P_FIMV_DEC_OVERLAP_TRANSFORM_SIZE; | ||
| 367 | buf_size1 -= S5P_FIMV_DEC_OVERLAP_TRANSFORM_SIZE; | ||
| 368 | mfc_write(dev, OFFSETA(buf_addr1), S5P_FIMV_H263_UP_NB_MV_ADR); | ||
| 369 | buf_addr1 += S5P_FIMV_DEC_UPNB_MV_SIZE; | ||
| 370 | buf_size1 -= S5P_FIMV_DEC_UPNB_MV_SIZE; | ||
| 371 | mfc_write(dev, OFFSETA(buf_addr1), S5P_FIMV_H263_SA_MV_ADR); | ||
| 372 | buf_addr1 += S5P_FIMV_DEC_SUB_ANCHOR_MV_SIZE; | ||
| 373 | buf_size1 -= S5P_FIMV_DEC_SUB_ANCHOR_MV_SIZE; | ||
| 374 | mfc_write(dev, OFFSETA(buf_addr1), S5P_FIMV_H263_NB_DCAC_ADR); | ||
| 375 | buf_addr1 += S5P_FIMV_DEC_NB_DCAC_SIZE; | ||
| 376 | buf_size1 -= S5P_FIMV_DEC_NB_DCAC_SIZE; | ||
| 377 | break; | ||
| 378 | case S5P_FIMV_CODEC_VC1_DEC: | ||
| 379 | case S5P_FIMV_CODEC_VC1RCV_DEC: | ||
| 380 | mfc_write(dev, OFFSETA(buf_addr1), S5P_FIMV_VC1_NB_DCAC_ADR); | ||
| 381 | buf_addr1 += S5P_FIMV_DEC_NB_DCAC_SIZE; | ||
| 382 | buf_size1 -= S5P_FIMV_DEC_NB_DCAC_SIZE; | ||
| 383 | mfc_write(dev, OFFSETA(buf_addr1), S5P_FIMV_VC1_OT_LINE_ADR); | ||
| 384 | buf_addr1 += S5P_FIMV_DEC_OVERLAP_TRANSFORM_SIZE; | ||
| 385 | buf_size1 -= S5P_FIMV_DEC_OVERLAP_TRANSFORM_SIZE; | ||
| 386 | mfc_write(dev, OFFSETA(buf_addr1), S5P_FIMV_VC1_UP_NB_MV_ADR); | ||
| 387 | buf_addr1 += S5P_FIMV_DEC_UPNB_MV_SIZE; | ||
| 388 | buf_size1 -= S5P_FIMV_DEC_UPNB_MV_SIZE; | ||
| 389 | mfc_write(dev, OFFSETA(buf_addr1), S5P_FIMV_VC1_SA_MV_ADR); | ||
| 390 | buf_addr1 += S5P_FIMV_DEC_SUB_ANCHOR_MV_SIZE; | ||
| 391 | buf_size1 -= S5P_FIMV_DEC_SUB_ANCHOR_MV_SIZE; | ||
| 392 | mfc_write(dev, OFFSETA(buf_addr1), S5P_FIMV_VC1_BITPLANE3_ADR); | ||
| 393 | buf_addr1 += S5P_FIMV_DEC_VC1_BITPLANE_SIZE; | ||
| 394 | buf_size1 -= S5P_FIMV_DEC_VC1_BITPLANE_SIZE; | ||
| 395 | mfc_write(dev, OFFSETA(buf_addr1), S5P_FIMV_VC1_BITPLANE2_ADR); | ||
| 396 | buf_addr1 += S5P_FIMV_DEC_VC1_BITPLANE_SIZE; | ||
| 397 | buf_size1 -= S5P_FIMV_DEC_VC1_BITPLANE_SIZE; | ||
| 398 | mfc_write(dev, OFFSETA(buf_addr1), S5P_FIMV_VC1_BITPLANE1_ADR); | ||
| 399 | buf_addr1 += S5P_FIMV_DEC_VC1_BITPLANE_SIZE; | ||
| 400 | buf_size1 -= S5P_FIMV_DEC_VC1_BITPLANE_SIZE; | ||
| 401 | break; | ||
| 402 | case S5P_FIMV_CODEC_MPEG2_DEC: | ||
| 403 | break; | ||
| 404 | default: | ||
| 405 | mfc_err("Unknown codec for decoding (%x)\n", | ||
| 406 | ctx->codec_mode); | ||
| 407 | return -EINVAL; | ||
| 408 | break; | ||
| 409 | } | ||
| 410 | frame_size = ctx->luma_size; | ||
| 411 | frame_size_ch = ctx->chroma_size; | ||
| 412 | frame_size_mv = ctx->mv_size; | ||
| 413 | mfc_debug(2, "Frm size: %d ch: %d mv: %d\n", frame_size, frame_size_ch, | ||
| 414 | frame_size_mv); | ||
| 415 | for (i = 0; i < ctx->total_dpb_count; i++) { | ||
| 416 | /* Bank2 */ | ||
| 417 | mfc_debug(2, "Luma %d: %x\n", i, | ||
| 418 | ctx->dst_bufs[i].cookie.raw.luma); | ||
| 419 | mfc_write(dev, OFFSETB(ctx->dst_bufs[i].cookie.raw.luma), | ||
| 420 | S5P_FIMV_DEC_LUMA_ADR + i * 4); | ||
| 421 | mfc_debug(2, "\tChroma %d: %x\n", i, | ||
| 422 | ctx->dst_bufs[i].cookie.raw.chroma); | ||
| 423 | mfc_write(dev, OFFSETA(ctx->dst_bufs[i].cookie.raw.chroma), | ||
| 424 | S5P_FIMV_DEC_CHROMA_ADR + i * 4); | ||
| 425 | if (ctx->codec_mode == S5P_FIMV_CODEC_H264_DEC) { | ||
| 426 | mfc_debug(2, "\tBuf2: %x, size: %d\n", | ||
| 427 | buf_addr2, buf_size2); | ||
| 428 | mfc_write(dev, OFFSETB(buf_addr2), | ||
| 429 | S5P_FIMV_H264_MV_ADR + i * 4); | ||
| 430 | buf_addr2 += frame_size_mv; | ||
| 431 | buf_size2 -= frame_size_mv; | ||
| 432 | } | ||
| 433 | } | ||
| 434 | mfc_debug(2, "Buf1: %u, buf_size1: %d\n", buf_addr1, buf_size1); | ||
| 435 | mfc_debug(2, "Buf 1/2 size after: %d/%d (frames %d)\n", | ||
| 436 | buf_size1, buf_size2, ctx->total_dpb_count); | ||
| 437 | if (buf_size1 < 0 || buf_size2 < 0) { | ||
| 438 | mfc_debug(2, "Not enough memory has been allocated\n"); | ||
| 439 | return -ENOMEM; | ||
| 440 | } | ||
| 441 | s5p_mfc_write_shm(ctx, frame_size, ALLOC_LUMA_DPB_SIZE); | ||
| 442 | s5p_mfc_write_shm(ctx, frame_size_ch, ALLOC_CHROMA_DPB_SIZE); | ||
| 443 | if (ctx->codec_mode == S5P_FIMV_CODEC_H264_DEC) | ||
| 444 | s5p_mfc_write_shm(ctx, frame_size_mv, ALLOC_MV_SIZE); | ||
| 445 | mfc_write(dev, ((S5P_FIMV_CH_INIT_BUFS & S5P_FIMV_CH_MASK) | ||
| 446 | << S5P_FIMV_CH_SHIFT) | (ctx->inst_no), | ||
| 447 | S5P_FIMV_SI_CH0_INST_ID); | ||
| 448 | return 0; | ||
| 449 | } | ||
| 450 | |||
| 451 | /* Set registers for encoding stream buffer */ | ||
| 452 | int s5p_mfc_set_enc_stream_buffer(struct s5p_mfc_ctx *ctx, | ||
| 453 | unsigned long addr, unsigned int size) | ||
| 454 | { | ||
| 455 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 456 | |||
| 457 | mfc_write(dev, OFFSETA(addr), S5P_FIMV_ENC_SI_CH0_SB_ADR); | ||
| 458 | mfc_write(dev, size, S5P_FIMV_ENC_SI_CH0_SB_SIZE); | ||
| 459 | return 0; | ||
| 460 | } | ||
| 461 | |||
| 462 | void s5p_mfc_set_enc_frame_buffer(struct s5p_mfc_ctx *ctx, | ||
| 463 | unsigned long y_addr, unsigned long c_addr) | ||
| 464 | { | ||
| 465 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 466 | |||
| 467 | mfc_write(dev, OFFSETB(y_addr), S5P_FIMV_ENC_SI_CH0_CUR_Y_ADR); | ||
| 468 | mfc_write(dev, OFFSETB(c_addr), S5P_FIMV_ENC_SI_CH0_CUR_C_ADR); | ||
| 469 | } | ||
| 470 | |||
| 471 | void s5p_mfc_get_enc_frame_buffer(struct s5p_mfc_ctx *ctx, | ||
| 472 | unsigned long *y_addr, unsigned long *c_addr) | ||
| 473 | { | ||
| 474 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 475 | |||
| 476 | *y_addr = dev->bank2 + (mfc_read(dev, S5P_FIMV_ENCODED_Y_ADDR) | ||
| 477 | << MFC_OFFSET_SHIFT); | ||
| 478 | *c_addr = dev->bank2 + (mfc_read(dev, S5P_FIMV_ENCODED_C_ADDR) | ||
| 479 | << MFC_OFFSET_SHIFT); | ||
| 480 | } | ||
| 481 | |||
| 482 | /* Set encoding ref & codec buffer */ | ||
| 483 | int s5p_mfc_set_enc_ref_buffer(struct s5p_mfc_ctx *ctx) | ||
| 484 | { | ||
| 485 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 486 | size_t buf_addr1, buf_addr2; | ||
| 487 | size_t buf_size1, buf_size2; | ||
| 488 | unsigned int enc_ref_y_size, enc_ref_c_size; | ||
| 489 | unsigned int guard_width, guard_height; | ||
| 490 | int i; | ||
| 491 | |||
| 492 | buf_addr1 = ctx->bank1_phys; | ||
| 493 | buf_size1 = ctx->bank1_size; | ||
| 494 | buf_addr2 = ctx->bank2_phys; | ||
| 495 | buf_size2 = ctx->bank2_size; | ||
| 496 | enc_ref_y_size = ALIGN(ctx->img_width, S5P_FIMV_NV12MT_HALIGN) | ||
| 497 | * ALIGN(ctx->img_height, S5P_FIMV_NV12MT_VALIGN); | ||
| 498 | enc_ref_y_size = ALIGN(enc_ref_y_size, S5P_FIMV_NV12MT_SALIGN); | ||
| 499 | if (ctx->codec_mode == S5P_FIMV_CODEC_H264_ENC) { | ||
| 500 | enc_ref_c_size = ALIGN(ctx->img_width, S5P_FIMV_NV12MT_HALIGN) | ||
| 501 | * ALIGN((ctx->img_height >> 1), S5P_FIMV_NV12MT_VALIGN); | ||
| 502 | enc_ref_c_size = ALIGN(enc_ref_c_size, S5P_FIMV_NV12MT_SALIGN); | ||
| 503 | } else { | ||
| 504 | guard_width = ALIGN(ctx->img_width + 16, | ||
| 505 | S5P_FIMV_NV12MT_HALIGN); | ||
| 506 | guard_height = ALIGN((ctx->img_height >> 1) + 4, | ||
| 507 | S5P_FIMV_NV12MT_VALIGN); | ||
| 508 | enc_ref_c_size = ALIGN(guard_width * guard_height, | ||
| 509 | S5P_FIMV_NV12MT_SALIGN); | ||
| 510 | } | ||
| 511 | mfc_debug(2, "buf_size1: %d, buf_size2: %d\n", buf_size1, buf_size2); | ||
| 512 | switch (ctx->codec_mode) { | ||
| 513 | case S5P_FIMV_CODEC_H264_ENC: | ||
| 514 | for (i = 0; i < 2; i++) { | ||
| 515 | mfc_write(dev, OFFSETA(buf_addr1), | ||
| 516 | S5P_FIMV_ENC_REF0_LUMA_ADR + (4 * i)); | ||
| 517 | buf_addr1 += enc_ref_y_size; | ||
| 518 | buf_size1 -= enc_ref_y_size; | ||
| 519 | |||
| 520 | mfc_write(dev, OFFSETB(buf_addr2), | ||
| 521 | S5P_FIMV_ENC_REF2_LUMA_ADR + (4 * i)); | ||
| 522 | buf_addr2 += enc_ref_y_size; | ||
| 523 | buf_size2 -= enc_ref_y_size; | ||
| 524 | } | ||
| 525 | for (i = 0; i < 4; i++) { | ||
| 526 | mfc_write(dev, OFFSETB(buf_addr2), | ||
| 527 | S5P_FIMV_ENC_REF0_CHROMA_ADR + (4 * i)); | ||
| 528 | buf_addr2 += enc_ref_c_size; | ||
| 529 | buf_size2 -= enc_ref_c_size; | ||
| 530 | } | ||
| 531 | mfc_write(dev, OFFSETA(buf_addr1), S5P_FIMV_H264_UP_MV_ADR); | ||
| 532 | buf_addr1 += S5P_FIMV_ENC_UPMV_SIZE; | ||
| 533 | buf_size1 -= S5P_FIMV_ENC_UPMV_SIZE; | ||
| 534 | mfc_write(dev, OFFSETA(buf_addr1), | ||
| 535 | S5P_FIMV_H264_COZERO_FLAG_ADR); | ||
| 536 | buf_addr1 += S5P_FIMV_ENC_COLFLG_SIZE; | ||
| 537 | buf_size1 -= S5P_FIMV_ENC_COLFLG_SIZE; | ||
| 538 | mfc_write(dev, OFFSETA(buf_addr1), | ||
| 539 | S5P_FIMV_H264_UP_INTRA_MD_ADR); | ||
| 540 | buf_addr1 += S5P_FIMV_ENC_INTRAMD_SIZE; | ||
| 541 | buf_size1 -= S5P_FIMV_ENC_INTRAMD_SIZE; | ||
| 542 | mfc_write(dev, OFFSETB(buf_addr2), | ||
| 543 | S5P_FIMV_H264_UP_INTRA_PRED_ADR); | ||
| 544 | buf_addr2 += S5P_FIMV_ENC_INTRAPRED_SIZE; | ||
| 545 | buf_size2 -= S5P_FIMV_ENC_INTRAPRED_SIZE; | ||
| 546 | mfc_write(dev, OFFSETA(buf_addr1), | ||
| 547 | S5P_FIMV_H264_NBOR_INFO_ADR); | ||
| 548 | buf_addr1 += S5P_FIMV_ENC_NBORINFO_SIZE; | ||
| 549 | buf_size1 -= S5P_FIMV_ENC_NBORINFO_SIZE; | ||
| 550 | mfc_debug(2, "buf_size1: %d, buf_size2: %d\n", | ||
| 551 | buf_size1, buf_size2); | ||
| 552 | break; | ||
| 553 | case S5P_FIMV_CODEC_MPEG4_ENC: | ||
| 554 | for (i = 0; i < 2; i++) { | ||
| 555 | mfc_write(dev, OFFSETA(buf_addr1), | ||
| 556 | S5P_FIMV_ENC_REF0_LUMA_ADR + (4 * i)); | ||
| 557 | buf_addr1 += enc_ref_y_size; | ||
| 558 | buf_size1 -= enc_ref_y_size; | ||
| 559 | mfc_write(dev, OFFSETB(buf_addr2), | ||
| 560 | S5P_FIMV_ENC_REF2_LUMA_ADR + (4 * i)); | ||
| 561 | buf_addr2 += enc_ref_y_size; | ||
| 562 | buf_size2 -= enc_ref_y_size; | ||
| 563 | } | ||
| 564 | for (i = 0; i < 4; i++) { | ||
| 565 | mfc_write(dev, OFFSETB(buf_addr2), | ||
| 566 | S5P_FIMV_ENC_REF0_CHROMA_ADR + (4 * i)); | ||
| 567 | buf_addr2 += enc_ref_c_size; | ||
| 568 | buf_size2 -= enc_ref_c_size; | ||
| 569 | } | ||
| 570 | mfc_write(dev, OFFSETA(buf_addr1), S5P_FIMV_MPEG4_UP_MV_ADR); | ||
| 571 | buf_addr1 += S5P_FIMV_ENC_UPMV_SIZE; | ||
| 572 | buf_size1 -= S5P_FIMV_ENC_UPMV_SIZE; | ||
| 573 | mfc_write(dev, OFFSETA(buf_addr1), | ||
| 574 | S5P_FIMV_MPEG4_COZERO_FLAG_ADR); | ||
| 575 | buf_addr1 += S5P_FIMV_ENC_COLFLG_SIZE; | ||
| 576 | buf_size1 -= S5P_FIMV_ENC_COLFLG_SIZE; | ||
| 577 | mfc_write(dev, OFFSETA(buf_addr1), | ||
| 578 | S5P_FIMV_MPEG4_ACDC_COEF_ADR); | ||
| 579 | buf_addr1 += S5P_FIMV_ENC_ACDCCOEF_SIZE; | ||
| 580 | buf_size1 -= S5P_FIMV_ENC_ACDCCOEF_SIZE; | ||
| 581 | mfc_debug(2, "buf_size1: %d, buf_size2: %d\n", | ||
| 582 | buf_size1, buf_size2); | ||
| 583 | break; | ||
| 584 | case S5P_FIMV_CODEC_H263_ENC: | ||
| 585 | for (i = 0; i < 2; i++) { | ||
| 586 | mfc_write(dev, OFFSETA(buf_addr1), | ||
| 587 | S5P_FIMV_ENC_REF0_LUMA_ADR + (4 * i)); | ||
| 588 | buf_addr1 += enc_ref_y_size; | ||
| 589 | buf_size1 -= enc_ref_y_size; | ||
| 590 | mfc_write(dev, OFFSETB(buf_addr2), | ||
| 591 | S5P_FIMV_ENC_REF2_LUMA_ADR + (4 * i)); | ||
| 592 | buf_addr2 += enc_ref_y_size; | ||
| 593 | buf_size2 -= enc_ref_y_size; | ||
| 594 | } | ||
| 595 | for (i = 0; i < 4; i++) { | ||
| 596 | mfc_write(dev, OFFSETB(buf_addr2), | ||
| 597 | S5P_FIMV_ENC_REF0_CHROMA_ADR + (4 * i)); | ||
| 598 | buf_addr2 += enc_ref_c_size; | ||
| 599 | buf_size2 -= enc_ref_c_size; | ||
| 600 | } | ||
| 601 | mfc_write(dev, OFFSETA(buf_addr1), S5P_FIMV_H263_UP_MV_ADR); | ||
| 602 | buf_addr1 += S5P_FIMV_ENC_UPMV_SIZE; | ||
| 603 | buf_size1 -= S5P_FIMV_ENC_UPMV_SIZE; | ||
| 604 | mfc_write(dev, OFFSETA(buf_addr1), S5P_FIMV_H263_ACDC_COEF_ADR); | ||
| 605 | buf_addr1 += S5P_FIMV_ENC_ACDCCOEF_SIZE; | ||
| 606 | buf_size1 -= S5P_FIMV_ENC_ACDCCOEF_SIZE; | ||
| 607 | mfc_debug(2, "buf_size1: %d, buf_size2: %d\n", | ||
| 608 | buf_size1, buf_size2); | ||
| 609 | break; | ||
| 610 | default: | ||
| 611 | mfc_err("Unknown codec set for encoding: %d\n", | ||
| 612 | ctx->codec_mode); | ||
| 613 | return -EINVAL; | ||
| 614 | } | ||
| 615 | return 0; | ||
| 616 | } | ||
| 617 | |||
| 618 | static int s5p_mfc_set_enc_params(struct s5p_mfc_ctx *ctx) | ||
| 619 | { | ||
| 620 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 621 | struct s5p_mfc_enc_params *p = &ctx->enc_params; | ||
| 622 | unsigned int reg; | ||
| 623 | unsigned int shm; | ||
| 624 | |||
| 625 | /* width */ | ||
| 626 | mfc_write(dev, ctx->img_width, S5P_FIMV_ENC_HSIZE_PX); | ||
| 627 | /* height */ | ||
| 628 | mfc_write(dev, ctx->img_height, S5P_FIMV_ENC_VSIZE_PX); | ||
| 629 | /* pictype : enable, IDR period */ | ||
| 630 | reg = mfc_read(dev, S5P_FIMV_ENC_PIC_TYPE_CTRL); | ||
| 631 | reg |= (1 << 18); | ||
| 632 | reg &= ~(0xFFFF); | ||
| 633 | reg |= p->gop_size; | ||
| 634 | mfc_write(dev, reg, S5P_FIMV_ENC_PIC_TYPE_CTRL); | ||
| 635 | mfc_write(dev, 0, S5P_FIMV_ENC_B_RECON_WRITE_ON); | ||
| 636 | /* multi-slice control */ | ||
| 637 | /* multi-slice MB number or bit size */ | ||
| 638 | mfc_write(dev, p->slice_mode, S5P_FIMV_ENC_MSLICE_CTRL); | ||
| 639 | if (p->slice_mode == V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB) { | ||
| 640 | mfc_write(dev, p->slice_mb, S5P_FIMV_ENC_MSLICE_MB); | ||
| 641 | } else if (p->slice_mode == V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES) { | ||
| 642 | mfc_write(dev, p->slice_bit, S5P_FIMV_ENC_MSLICE_BIT); | ||
| 643 | } else { | ||
| 644 | mfc_write(dev, 0, S5P_FIMV_ENC_MSLICE_MB); | ||
| 645 | mfc_write(dev, 0, S5P_FIMV_ENC_MSLICE_BIT); | ||
| 646 | } | ||
| 647 | /* cyclic intra refresh */ | ||
| 648 | mfc_write(dev, p->intra_refresh_mb, S5P_FIMV_ENC_CIR_CTRL); | ||
| 649 | /* memory structure cur. frame */ | ||
| 650 | if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_NV12M) | ||
| 651 | mfc_write(dev, 0, S5P_FIMV_ENC_MAP_FOR_CUR); | ||
| 652 | else if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_NV12MT) | ||
| 653 | mfc_write(dev, 3, S5P_FIMV_ENC_MAP_FOR_CUR); | ||
| 654 | /* padding control & value */ | ||
| 655 | reg = mfc_read(dev, S5P_FIMV_ENC_PADDING_CTRL); | ||
| 656 | if (p->pad) { | ||
| 657 | /** enable */ | ||
| 658 | reg |= (1 << 31); | ||
| 659 | /** cr value */ | ||
| 660 | reg &= ~(0xFF << 16); | ||
| 661 | reg |= (p->pad_cr << 16); | ||
| 662 | /** cb value */ | ||
| 663 | reg &= ~(0xFF << 8); | ||
| 664 | reg |= (p->pad_cb << 8); | ||
| 665 | /** y value */ | ||
| 666 | reg &= ~(0xFF); | ||
| 667 | reg |= (p->pad_luma); | ||
| 668 | } else { | ||
| 669 | /** disable & all value clear */ | ||
| 670 | reg = 0; | ||
| 671 | } | ||
| 672 | mfc_write(dev, reg, S5P_FIMV_ENC_PADDING_CTRL); | ||
| 673 | /* rate control config. */ | ||
| 674 | reg = mfc_read(dev, S5P_FIMV_ENC_RC_CONFIG); | ||
| 675 | /** frame-level rate control */ | ||
| 676 | reg &= ~(0x1 << 9); | ||
| 677 | reg |= (p->rc_frame << 9); | ||
| 678 | mfc_write(dev, reg, S5P_FIMV_ENC_RC_CONFIG); | ||
| 679 | /* bit rate */ | ||
| 680 | if (p->rc_frame) | ||
| 681 | mfc_write(dev, p->rc_bitrate, | ||
| 682 | S5P_FIMV_ENC_RC_BIT_RATE); | ||
| 683 | else | ||
| 684 | mfc_write(dev, 0, S5P_FIMV_ENC_RC_BIT_RATE); | ||
| 685 | /* reaction coefficient */ | ||
| 686 | if (p->rc_frame) | ||
| 687 | mfc_write(dev, p->rc_reaction_coeff, S5P_FIMV_ENC_RC_RPARA); | ||
| 688 | shm = s5p_mfc_read_shm(ctx, EXT_ENC_CONTROL); | ||
| 689 | /* seq header ctrl */ | ||
| 690 | shm &= ~(0x1 << 3); | ||
| 691 | shm |= (p->seq_hdr_mode << 3); | ||
| 692 | /* frame skip mode */ | ||
| 693 | shm &= ~(0x3 << 1); | ||
| 694 | shm |= (p->frame_skip_mode << 1); | ||
| 695 | s5p_mfc_write_shm(ctx, shm, EXT_ENC_CONTROL); | ||
| 696 | /* fixed target bit */ | ||
| 697 | s5p_mfc_write_shm(ctx, p->fixed_target_bit, RC_CONTROL_CONFIG); | ||
| 698 | return 0; | ||
| 699 | } | ||
| 700 | |||
| 701 | static int s5p_mfc_set_enc_params_h264(struct s5p_mfc_ctx *ctx) | ||
| 702 | { | ||
| 703 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 704 | struct s5p_mfc_enc_params *p = &ctx->enc_params; | ||
| 705 | struct s5p_mfc_h264_enc_params *p_264 = &p->codec.h264; | ||
| 706 | unsigned int reg; | ||
| 707 | unsigned int shm; | ||
| 708 | |||
| 709 | s5p_mfc_set_enc_params(ctx); | ||
| 710 | /* pictype : number of B */ | ||
| 711 | reg = mfc_read(dev, S5P_FIMV_ENC_PIC_TYPE_CTRL); | ||
| 712 | /* num_b_frame - 0 ~ 2 */ | ||
| 713 | reg &= ~(0x3 << 16); | ||
| 714 | reg |= (p->num_b_frame << 16); | ||
| 715 | mfc_write(dev, reg, S5P_FIMV_ENC_PIC_TYPE_CTRL); | ||
| 716 | /* profile & level */ | ||
| 717 | reg = mfc_read(dev, S5P_FIMV_ENC_PROFILE); | ||
| 718 | /* level */ | ||
| 719 | reg &= ~(0xFF << 8); | ||
| 720 | reg |= (p_264->level << 8); | ||
| 721 | /* profile - 0 ~ 2 */ | ||
| 722 | reg &= ~(0x3F); | ||
| 723 | reg |= p_264->profile; | ||
| 724 | mfc_write(dev, reg, S5P_FIMV_ENC_PROFILE); | ||
| 725 | /* interlace */ | ||
| 726 | mfc_write(dev, p->interlace, S5P_FIMV_ENC_PIC_STRUCT); | ||
| 727 | /* height */ | ||
| 728 | if (p->interlace) | ||
| 729 | mfc_write(dev, ctx->img_height >> 1, S5P_FIMV_ENC_VSIZE_PX); | ||
| 730 | /* loopfilter ctrl */ | ||
| 731 | mfc_write(dev, p_264->loop_filter_mode, S5P_FIMV_ENC_LF_CTRL); | ||
| 732 | /* loopfilter alpha offset */ | ||
| 733 | if (p_264->loop_filter_alpha < 0) { | ||
| 734 | reg = 0x10; | ||
| 735 | reg |= (0xFF - p_264->loop_filter_alpha) + 1; | ||
| 736 | } else { | ||
| 737 | reg = 0x00; | ||
| 738 | reg |= (p_264->loop_filter_alpha & 0xF); | ||
| 739 | } | ||
| 740 | mfc_write(dev, reg, S5P_FIMV_ENC_ALPHA_OFF); | ||
| 741 | /* loopfilter beta offset */ | ||
| 742 | if (p_264->loop_filter_beta < 0) { | ||
| 743 | reg = 0x10; | ||
| 744 | reg |= (0xFF - p_264->loop_filter_beta) + 1; | ||
| 745 | } else { | ||
| 746 | reg = 0x00; | ||
| 747 | reg |= (p_264->loop_filter_beta & 0xF); | ||
| 748 | } | ||
| 749 | mfc_write(dev, reg, S5P_FIMV_ENC_BETA_OFF); | ||
| 750 | /* entropy coding mode */ | ||
| 751 | if (p_264->entropy_mode == V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC) | ||
| 752 | mfc_write(dev, 1, S5P_FIMV_ENC_H264_ENTROPY_MODE); | ||
| 753 | else | ||
| 754 | mfc_write(dev, 0, S5P_FIMV_ENC_H264_ENTROPY_MODE); | ||
| 755 | /* number of ref. picture */ | ||
| 756 | reg = mfc_read(dev, S5P_FIMV_ENC_H264_NUM_OF_REF); | ||
| 757 | /* num of ref. pictures of P */ | ||
| 758 | reg &= ~(0x3 << 5); | ||
| 759 | reg |= (p_264->num_ref_pic_4p << 5); | ||
| 760 | /* max number of ref. pictures */ | ||
| 761 | reg &= ~(0x1F); | ||
| 762 | reg |= p_264->max_ref_pic; | ||
| 763 | mfc_write(dev, reg, S5P_FIMV_ENC_H264_NUM_OF_REF); | ||
| 764 | /* 8x8 transform enable */ | ||
| 765 | mfc_write(dev, p_264->_8x8_transform, S5P_FIMV_ENC_H264_TRANS_FLAG); | ||
| 766 | /* rate control config. */ | ||
| 767 | reg = mfc_read(dev, S5P_FIMV_ENC_RC_CONFIG); | ||
| 768 | /* macroblock level rate control */ | ||
| 769 | reg &= ~(0x1 << 8); | ||
| 770 | reg |= (p_264->rc_mb << 8); | ||
| 771 | /* frame QP */ | ||
| 772 | reg &= ~(0x3F); | ||
| 773 | reg |= p_264->rc_frame_qp; | ||
| 774 | mfc_write(dev, reg, S5P_FIMV_ENC_RC_CONFIG); | ||
| 775 | /* frame rate */ | ||
| 776 | if (p->rc_frame && p->rc_framerate_denom) | ||
| 777 | mfc_write(dev, p->rc_framerate_num * 1000 | ||
| 778 | / p->rc_framerate_denom, S5P_FIMV_ENC_RC_FRAME_RATE); | ||
| 779 | else | ||
| 780 | mfc_write(dev, 0, S5P_FIMV_ENC_RC_FRAME_RATE); | ||
| 781 | /* max & min value of QP */ | ||
| 782 | reg = mfc_read(dev, S5P_FIMV_ENC_RC_QBOUND); | ||
| 783 | /* max QP */ | ||
| 784 | reg &= ~(0x3F << 8); | ||
| 785 | reg |= (p_264->rc_max_qp << 8); | ||
| 786 | /* min QP */ | ||
| 787 | reg &= ~(0x3F); | ||
| 788 | reg |= p_264->rc_min_qp; | ||
| 789 | mfc_write(dev, reg, S5P_FIMV_ENC_RC_QBOUND); | ||
| 790 | /* macroblock adaptive scaling features */ | ||
| 791 | if (p_264->rc_mb) { | ||
| 792 | reg = mfc_read(dev, S5P_FIMV_ENC_RC_MB_CTRL); | ||
| 793 | /* dark region */ | ||
| 794 | reg &= ~(0x1 << 3); | ||
| 795 | reg |= (p_264->rc_mb_dark << 3); | ||
| 796 | /* smooth region */ | ||
| 797 | reg &= ~(0x1 << 2); | ||
| 798 | reg |= (p_264->rc_mb_smooth << 2); | ||
| 799 | /* static region */ | ||
| 800 | reg &= ~(0x1 << 1); | ||
| 801 | reg |= (p_264->rc_mb_static << 1); | ||
| 802 | /* high activity region */ | ||
| 803 | reg &= ~(0x1); | ||
| 804 | reg |= p_264->rc_mb_activity; | ||
| 805 | mfc_write(dev, reg, S5P_FIMV_ENC_RC_MB_CTRL); | ||
| 806 | } | ||
| 807 | if (!p->rc_frame && | ||
| 808 | !p_264->rc_mb) { | ||
| 809 | shm = s5p_mfc_read_shm(ctx, P_B_FRAME_QP); | ||
| 810 | shm &= ~(0xFFF); | ||
| 811 | shm |= ((p_264->rc_b_frame_qp & 0x3F) << 6); | ||
| 812 | shm |= (p_264->rc_p_frame_qp & 0x3F); | ||
| 813 | s5p_mfc_write_shm(ctx, shm, P_B_FRAME_QP); | ||
| 814 | } | ||
| 815 | /* extended encoder ctrl */ | ||
| 816 | shm = s5p_mfc_read_shm(ctx, EXT_ENC_CONTROL); | ||
| 817 | /* AR VUI control */ | ||
| 818 | shm &= ~(0x1 << 15); | ||
| 819 | shm |= (p_264->vui_sar << 1); | ||
| 820 | s5p_mfc_write_shm(ctx, shm, EXT_ENC_CONTROL); | ||
| 821 | if (p_264->vui_sar) { | ||
| 822 | /* aspect ration IDC */ | ||
| 823 | shm = s5p_mfc_read_shm(ctx, SAMPLE_ASPECT_RATIO_IDC); | ||
| 824 | shm &= ~(0xFF); | ||
| 825 | shm |= p_264->vui_sar_idc; | ||
| 826 | s5p_mfc_write_shm(ctx, shm, SAMPLE_ASPECT_RATIO_IDC); | ||
| 827 | if (p_264->vui_sar_idc == 0xFF) { | ||
| 828 | /* sample AR info */ | ||
| 829 | shm = s5p_mfc_read_shm(ctx, EXTENDED_SAR); | ||
| 830 | shm &= ~(0xFFFFFFFF); | ||
| 831 | shm |= p_264->vui_ext_sar_width << 16; | ||
| 832 | shm |= p_264->vui_ext_sar_height; | ||
| 833 | s5p_mfc_write_shm(ctx, shm, EXTENDED_SAR); | ||
| 834 | } | ||
| 835 | } | ||
| 836 | /* intra picture period for H.264 */ | ||
| 837 | shm = s5p_mfc_read_shm(ctx, H264_I_PERIOD); | ||
| 838 | /* control */ | ||
| 839 | shm &= ~(0x1 << 16); | ||
| 840 | shm |= (p_264->open_gop << 16); | ||
| 841 | /* value */ | ||
| 842 | if (p_264->open_gop) { | ||
| 843 | shm &= ~(0xFFFF); | ||
| 844 | shm |= p_264->open_gop_size; | ||
| 845 | } | ||
| 846 | s5p_mfc_write_shm(ctx, shm, H264_I_PERIOD); | ||
| 847 | /* extended encoder ctrl */ | ||
| 848 | shm = s5p_mfc_read_shm(ctx, EXT_ENC_CONTROL); | ||
| 849 | /* vbv buffer size */ | ||
| 850 | if (p->frame_skip_mode == | ||
| 851 | V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT) { | ||
| 852 | shm &= ~(0xFFFF << 16); | ||
| 853 | shm |= (p_264->cpb_size << 16); | ||
| 854 | } | ||
| 855 | s5p_mfc_write_shm(ctx, shm, EXT_ENC_CONTROL); | ||
| 856 | return 0; | ||
| 857 | } | ||
| 858 | |||
| 859 | static int s5p_mfc_set_enc_params_mpeg4(struct s5p_mfc_ctx *ctx) | ||
| 860 | { | ||
| 861 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 862 | struct s5p_mfc_enc_params *p = &ctx->enc_params; | ||
| 863 | struct s5p_mfc_mpeg4_enc_params *p_mpeg4 = &p->codec.mpeg4; | ||
| 864 | unsigned int reg; | ||
| 865 | unsigned int shm; | ||
| 866 | unsigned int framerate; | ||
| 867 | |||
| 868 | s5p_mfc_set_enc_params(ctx); | ||
| 869 | /* pictype : number of B */ | ||
| 870 | reg = mfc_read(dev, S5P_FIMV_ENC_PIC_TYPE_CTRL); | ||
| 871 | /* num_b_frame - 0 ~ 2 */ | ||
| 872 | reg &= ~(0x3 << 16); | ||
| 873 | reg |= (p->num_b_frame << 16); | ||
| 874 | mfc_write(dev, reg, S5P_FIMV_ENC_PIC_TYPE_CTRL); | ||
| 875 | /* profile & level */ | ||
| 876 | reg = mfc_read(dev, S5P_FIMV_ENC_PROFILE); | ||
| 877 | /* level */ | ||
| 878 | reg &= ~(0xFF << 8); | ||
| 879 | reg |= (p_mpeg4->level << 8); | ||
| 880 | /* profile - 0 ~ 2 */ | ||
| 881 | reg &= ~(0x3F); | ||
| 882 | reg |= p_mpeg4->profile; | ||
| 883 | mfc_write(dev, reg, S5P_FIMV_ENC_PROFILE); | ||
| 884 | /* quarter_pixel */ | ||
| 885 | mfc_write(dev, p_mpeg4->quarter_pixel, S5P_FIMV_ENC_MPEG4_QUART_PXL); | ||
| 886 | /* qp */ | ||
| 887 | if (!p->rc_frame) { | ||
| 888 | shm = s5p_mfc_read_shm(ctx, P_B_FRAME_QP); | ||
| 889 | shm &= ~(0xFFF); | ||
| 890 | shm |= ((p_mpeg4->rc_b_frame_qp & 0x3F) << 6); | ||
| 891 | shm |= (p_mpeg4->rc_p_frame_qp & 0x3F); | ||
| 892 | s5p_mfc_write_shm(ctx, shm, P_B_FRAME_QP); | ||
| 893 | } | ||
| 894 | /* frame rate */ | ||
| 895 | if (p->rc_frame) { | ||
| 896 | if (p->rc_framerate_denom > 0) { | ||
| 897 | framerate = p->rc_framerate_num * 1000 / | ||
| 898 | p->rc_framerate_denom; | ||
| 899 | mfc_write(dev, framerate, | ||
| 900 | S5P_FIMV_ENC_RC_FRAME_RATE); | ||
| 901 | shm = s5p_mfc_read_shm(ctx, RC_VOP_TIMING); | ||
| 902 | shm &= ~(0xFFFFFFFF); | ||
| 903 | shm |= (1 << 31); | ||
| 904 | shm |= ((p->rc_framerate_num & 0x7FFF) << 16); | ||
| 905 | shm |= (p->rc_framerate_denom & 0xFFFF); | ||
| 906 | s5p_mfc_write_shm(ctx, shm, RC_VOP_TIMING); | ||
| 907 | } | ||
| 908 | } else { | ||
| 909 | mfc_write(dev, 0, S5P_FIMV_ENC_RC_FRAME_RATE); | ||
| 910 | } | ||
| 911 | /* rate control config. */ | ||
| 912 | reg = mfc_read(dev, S5P_FIMV_ENC_RC_CONFIG); | ||
| 913 | /* frame QP */ | ||
| 914 | reg &= ~(0x3F); | ||
| 915 | reg |= p_mpeg4->rc_frame_qp; | ||
| 916 | mfc_write(dev, reg, S5P_FIMV_ENC_RC_CONFIG); | ||
| 917 | /* max & min value of QP */ | ||
| 918 | reg = mfc_read(dev, S5P_FIMV_ENC_RC_QBOUND); | ||
| 919 | /* max QP */ | ||
| 920 | reg &= ~(0x3F << 8); | ||
| 921 | reg |= (p_mpeg4->rc_max_qp << 8); | ||
| 922 | /* min QP */ | ||
| 923 | reg &= ~(0x3F); | ||
| 924 | reg |= p_mpeg4->rc_min_qp; | ||
| 925 | mfc_write(dev, reg, S5P_FIMV_ENC_RC_QBOUND); | ||
| 926 | /* extended encoder ctrl */ | ||
| 927 | shm = s5p_mfc_read_shm(ctx, EXT_ENC_CONTROL); | ||
| 928 | /* vbv buffer size */ | ||
| 929 | if (p->frame_skip_mode == | ||
| 930 | V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT) { | ||
| 931 | shm &= ~(0xFFFF << 16); | ||
| 932 | shm |= (p->vbv_size << 16); | ||
| 933 | } | ||
| 934 | s5p_mfc_write_shm(ctx, shm, EXT_ENC_CONTROL); | ||
| 935 | return 0; | ||
| 936 | } | ||
| 937 | |||
| 938 | static int s5p_mfc_set_enc_params_h263(struct s5p_mfc_ctx *ctx) | ||
| 939 | { | ||
| 940 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 941 | struct s5p_mfc_enc_params *p = &ctx->enc_params; | ||
| 942 | struct s5p_mfc_mpeg4_enc_params *p_h263 = &p->codec.mpeg4; | ||
| 943 | unsigned int reg; | ||
| 944 | unsigned int shm; | ||
| 945 | |||
| 946 | s5p_mfc_set_enc_params(ctx); | ||
| 947 | /* qp */ | ||
| 948 | if (!p->rc_frame) { | ||
| 949 | shm = s5p_mfc_read_shm(ctx, P_B_FRAME_QP); | ||
| 950 | shm &= ~(0xFFF); | ||
| 951 | shm |= (p_h263->rc_p_frame_qp & 0x3F); | ||
| 952 | s5p_mfc_write_shm(ctx, shm, P_B_FRAME_QP); | ||
| 953 | } | ||
| 954 | /* frame rate */ | ||
| 955 | if (p->rc_frame && p->rc_framerate_denom) | ||
| 956 | mfc_write(dev, p->rc_framerate_num * 1000 | ||
| 957 | / p->rc_framerate_denom, S5P_FIMV_ENC_RC_FRAME_RATE); | ||
| 958 | else | ||
| 959 | mfc_write(dev, 0, S5P_FIMV_ENC_RC_FRAME_RATE); | ||
| 960 | /* rate control config. */ | ||
| 961 | reg = mfc_read(dev, S5P_FIMV_ENC_RC_CONFIG); | ||
| 962 | /* frame QP */ | ||
| 963 | reg &= ~(0x3F); | ||
| 964 | reg |= p_h263->rc_frame_qp; | ||
| 965 | mfc_write(dev, reg, S5P_FIMV_ENC_RC_CONFIG); | ||
| 966 | /* max & min value of QP */ | ||
| 967 | reg = mfc_read(dev, S5P_FIMV_ENC_RC_QBOUND); | ||
| 968 | /* max QP */ | ||
| 969 | reg &= ~(0x3F << 8); | ||
| 970 | reg |= (p_h263->rc_max_qp << 8); | ||
| 971 | /* min QP */ | ||
| 972 | reg &= ~(0x3F); | ||
| 973 | reg |= p_h263->rc_min_qp; | ||
| 974 | mfc_write(dev, reg, S5P_FIMV_ENC_RC_QBOUND); | ||
| 975 | /* extended encoder ctrl */ | ||
| 976 | shm = s5p_mfc_read_shm(ctx, EXT_ENC_CONTROL); | ||
| 977 | /* vbv buffer size */ | ||
| 978 | if (p->frame_skip_mode == | ||
| 979 | V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT) { | ||
| 980 | shm &= ~(0xFFFF << 16); | ||
| 981 | shm |= (p->vbv_size << 16); | ||
| 982 | } | ||
| 983 | s5p_mfc_write_shm(ctx, shm, EXT_ENC_CONTROL); | ||
| 984 | return 0; | ||
| 985 | } | ||
| 986 | |||
| 987 | /* Initialize decoding */ | ||
| 988 | int s5p_mfc_init_decode(struct s5p_mfc_ctx *ctx) | ||
| 989 | { | ||
| 990 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 991 | |||
| 992 | s5p_mfc_set_shared_buffer(ctx); | ||
| 993 | /* Setup loop filter, for decoding this is only valid for MPEG4 */ | ||
| 994 | if (ctx->codec_mode == S5P_FIMV_CODEC_MPEG4_DEC) | ||
| 995 | mfc_write(dev, ctx->loop_filter_mpeg4, S5P_FIMV_ENC_LF_CTRL); | ||
| 996 | else | ||
| 997 | mfc_write(dev, 0, S5P_FIMV_ENC_LF_CTRL); | ||
| 998 | mfc_write(dev, ((ctx->slice_interface & S5P_FIMV_SLICE_INT_MASK) << | ||
| 999 | S5P_FIMV_SLICE_INT_SHIFT) | (ctx->display_delay_enable << | ||
| 1000 | S5P_FIMV_DDELAY_ENA_SHIFT) | ((ctx->display_delay & | ||
| 1001 | S5P_FIMV_DDELAY_VAL_MASK) << S5P_FIMV_DDELAY_VAL_SHIFT), | ||
| 1002 | S5P_FIMV_SI_CH0_DPB_CONF_CTRL); | ||
| 1003 | mfc_write(dev, | ||
| 1004 | ((S5P_FIMV_CH_SEQ_HEADER & S5P_FIMV_CH_MASK) << S5P_FIMV_CH_SHIFT) | ||
| 1005 | | (ctx->inst_no), S5P_FIMV_SI_CH0_INST_ID); | ||
| 1006 | return 0; | ||
| 1007 | } | ||
| 1008 | |||
| 1009 | static void s5p_mfc_set_flush(struct s5p_mfc_ctx *ctx, int flush) | ||
| 1010 | { | ||
| 1011 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 1012 | unsigned int dpb; | ||
| 1013 | |||
| 1014 | if (flush) | ||
| 1015 | dpb = mfc_read(dev, S5P_FIMV_SI_CH0_DPB_CONF_CTRL) | ( | ||
| 1016 | S5P_FIMV_DPB_FLUSH_MASK << S5P_FIMV_DPB_FLUSH_SHIFT); | ||
| 1017 | else | ||
| 1018 | dpb = mfc_read(dev, S5P_FIMV_SI_CH0_DPB_CONF_CTRL) & | ||
| 1019 | ~(S5P_FIMV_DPB_FLUSH_MASK << S5P_FIMV_DPB_FLUSH_SHIFT); | ||
| 1020 | mfc_write(dev, dpb, S5P_FIMV_SI_CH0_DPB_CONF_CTRL); | ||
| 1021 | } | ||
| 1022 | |||
| 1023 | /* Decode a single frame */ | ||
| 1024 | int s5p_mfc_decode_one_frame(struct s5p_mfc_ctx *ctx, | ||
| 1025 | enum s5p_mfc_decode_arg last_frame) | ||
| 1026 | { | ||
| 1027 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 1028 | |||
| 1029 | mfc_write(dev, ctx->dec_dst_flag, S5P_FIMV_SI_CH0_RELEASE_BUF); | ||
| 1030 | s5p_mfc_set_shared_buffer(ctx); | ||
| 1031 | s5p_mfc_set_flush(ctx, ctx->dpb_flush_flag); | ||
| 1032 | /* Issue different commands to instance basing on whether it | ||
| 1033 | * is the last frame or not. */ | ||
| 1034 | switch (last_frame) { | ||
| 1035 | case MFC_DEC_FRAME: | ||
| 1036 | mfc_write(dev, ((S5P_FIMV_CH_FRAME_START & S5P_FIMV_CH_MASK) << | ||
| 1037 | S5P_FIMV_CH_SHIFT) | (ctx->inst_no), S5P_FIMV_SI_CH0_INST_ID); | ||
| 1038 | break; | ||
| 1039 | case MFC_DEC_LAST_FRAME: | ||
| 1040 | mfc_write(dev, ((S5P_FIMV_CH_LAST_FRAME & S5P_FIMV_CH_MASK) << | ||
| 1041 | S5P_FIMV_CH_SHIFT) | (ctx->inst_no), S5P_FIMV_SI_CH0_INST_ID); | ||
| 1042 | break; | ||
| 1043 | case MFC_DEC_RES_CHANGE: | ||
| 1044 | mfc_write(dev, ((S5P_FIMV_CH_FRAME_START_REALLOC & | ||
| 1045 | S5P_FIMV_CH_MASK) << S5P_FIMV_CH_SHIFT) | (ctx->inst_no), | ||
| 1046 | S5P_FIMV_SI_CH0_INST_ID); | ||
| 1047 | break; | ||
| 1048 | } | ||
| 1049 | mfc_debug(2, "Decoding a usual frame\n"); | ||
| 1050 | return 0; | ||
| 1051 | } | ||
| 1052 | |||
| 1053 | int s5p_mfc_init_encode(struct s5p_mfc_ctx *ctx) | ||
| 1054 | { | ||
| 1055 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 1056 | |||
| 1057 | if (ctx->codec_mode == S5P_FIMV_CODEC_H264_ENC) | ||
| 1058 | s5p_mfc_set_enc_params_h264(ctx); | ||
| 1059 | else if (ctx->codec_mode == S5P_FIMV_CODEC_MPEG4_ENC) | ||
| 1060 | s5p_mfc_set_enc_params_mpeg4(ctx); | ||
| 1061 | else if (ctx->codec_mode == S5P_FIMV_CODEC_H263_ENC) | ||
| 1062 | s5p_mfc_set_enc_params_h263(ctx); | ||
| 1063 | else { | ||
| 1064 | mfc_err("Unknown codec for encoding (%x)\n", | ||
| 1065 | ctx->codec_mode); | ||
| 1066 | return -EINVAL; | ||
| 1067 | } | ||
| 1068 | s5p_mfc_set_shared_buffer(ctx); | ||
| 1069 | mfc_write(dev, ((S5P_FIMV_CH_SEQ_HEADER << 16) & 0x70000) | | ||
| 1070 | (ctx->inst_no), S5P_FIMV_SI_CH0_INST_ID); | ||
| 1071 | return 0; | ||
| 1072 | } | ||
| 1073 | |||
| 1074 | /* Encode a single frame */ | ||
| 1075 | int s5p_mfc_encode_one_frame(struct s5p_mfc_ctx *ctx) | ||
| 1076 | { | ||
| 1077 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 1078 | /* memory structure cur. frame */ | ||
| 1079 | if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_NV12M) | ||
| 1080 | mfc_write(dev, 0, S5P_FIMV_ENC_MAP_FOR_CUR); | ||
| 1081 | else if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_NV12MT) | ||
| 1082 | mfc_write(dev, 3, S5P_FIMV_ENC_MAP_FOR_CUR); | ||
| 1083 | s5p_mfc_set_shared_buffer(ctx); | ||
| 1084 | mfc_write(dev, (S5P_FIMV_CH_FRAME_START << 16 & 0x70000) | | ||
| 1085 | (ctx->inst_no), S5P_FIMV_SI_CH0_INST_ID); | ||
| 1086 | return 0; | ||
| 1087 | } | ||
| 1088 | |||
| 1089 | static int s5p_mfc_get_new_ctx(struct s5p_mfc_dev *dev) | ||
| 1090 | { | ||
| 1091 | unsigned long flags; | ||
| 1092 | int new_ctx; | ||
| 1093 | int cnt; | ||
| 1094 | |||
| 1095 | spin_lock_irqsave(&dev->condlock, flags); | ||
| 1096 | new_ctx = (dev->curr_ctx + 1) % MFC_NUM_CONTEXTS; | ||
| 1097 | cnt = 0; | ||
| 1098 | while (!test_bit(new_ctx, &dev->ctx_work_bits)) { | ||
| 1099 | new_ctx = (new_ctx + 1) % MFC_NUM_CONTEXTS; | ||
| 1100 | if (++cnt > MFC_NUM_CONTEXTS) { | ||
| 1101 | /* No contexts to run */ | ||
| 1102 | spin_unlock_irqrestore(&dev->condlock, flags); | ||
| 1103 | return -EAGAIN; | ||
| 1104 | } | ||
| 1105 | } | ||
| 1106 | spin_unlock_irqrestore(&dev->condlock, flags); | ||
| 1107 | return new_ctx; | ||
| 1108 | } | ||
| 1109 | |||
| 1110 | static void s5p_mfc_run_res_change(struct s5p_mfc_ctx *ctx) | ||
| 1111 | { | ||
| 1112 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 1113 | |||
| 1114 | s5p_mfc_set_dec_stream_buffer(ctx, 0, 0, 0); | ||
| 1115 | dev->curr_ctx = ctx->num; | ||
| 1116 | s5p_mfc_clean_ctx_int_flags(ctx); | ||
| 1117 | s5p_mfc_decode_one_frame(ctx, MFC_DEC_RES_CHANGE); | ||
| 1118 | } | ||
| 1119 | |||
| 1120 | static int s5p_mfc_run_dec_frame(struct s5p_mfc_ctx *ctx, int last_frame) | ||
| 1121 | { | ||
| 1122 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 1123 | struct s5p_mfc_buf *temp_vb; | ||
| 1124 | unsigned long flags; | ||
| 1125 | unsigned int index; | ||
| 1126 | |||
| 1127 | spin_lock_irqsave(&dev->irqlock, flags); | ||
| 1128 | /* Frames are being decoded */ | ||
| 1129 | if (list_empty(&ctx->src_queue)) { | ||
| 1130 | mfc_debug(2, "No src buffers\n"); | ||
| 1131 | spin_unlock_irqrestore(&dev->irqlock, flags); | ||
| 1132 | return -EAGAIN; | ||
| 1133 | } | ||
| 1134 | /* Get the next source buffer */ | ||
| 1135 | temp_vb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list); | ||
| 1136 | temp_vb->used = 1; | ||
| 1137 | s5p_mfc_set_dec_stream_buffer(ctx, | ||
| 1138 | vb2_dma_contig_plane_paddr(temp_vb->b, 0), ctx->consumed_stream, | ||
| 1139 | temp_vb->b->v4l2_planes[0].bytesused); | ||
| 1140 | spin_unlock_irqrestore(&dev->irqlock, flags); | ||
| 1141 | index = temp_vb->b->v4l2_buf.index; | ||
| 1142 | dev->curr_ctx = ctx->num; | ||
| 1143 | s5p_mfc_clean_ctx_int_flags(ctx); | ||
| 1144 | if (temp_vb->b->v4l2_planes[0].bytesused == 0) { | ||
| 1145 | last_frame = MFC_DEC_LAST_FRAME; | ||
| 1146 | mfc_debug(2, "Setting ctx->state to FINISHING\n"); | ||
| 1147 | ctx->state = MFCINST_FINISHING; | ||
| 1148 | } | ||
| 1149 | s5p_mfc_decode_one_frame(ctx, last_frame); | ||
| 1150 | return 0; | ||
| 1151 | } | ||
| 1152 | |||
| 1153 | static int s5p_mfc_run_enc_frame(struct s5p_mfc_ctx *ctx) | ||
| 1154 | { | ||
| 1155 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 1156 | unsigned long flags; | ||
| 1157 | struct s5p_mfc_buf *dst_mb; | ||
| 1158 | struct s5p_mfc_buf *src_mb; | ||
| 1159 | unsigned long src_y_addr, src_c_addr, dst_addr; | ||
| 1160 | unsigned int dst_size; | ||
| 1161 | |||
| 1162 | spin_lock_irqsave(&dev->irqlock, flags); | ||
| 1163 | if (list_empty(&ctx->src_queue)) { | ||
| 1164 | mfc_debug(2, "no src buffers\n"); | ||
| 1165 | spin_unlock_irqrestore(&dev->irqlock, flags); | ||
| 1166 | return -EAGAIN; | ||
| 1167 | } | ||
| 1168 | if (list_empty(&ctx->dst_queue)) { | ||
| 1169 | mfc_debug(2, "no dst buffers\n"); | ||
| 1170 | spin_unlock_irqrestore(&dev->irqlock, flags); | ||
| 1171 | return -EAGAIN; | ||
| 1172 | } | ||
| 1173 | src_mb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list); | ||
| 1174 | src_mb->used = 1; | ||
| 1175 | src_y_addr = vb2_dma_contig_plane_paddr(src_mb->b, 0); | ||
| 1176 | src_c_addr = vb2_dma_contig_plane_paddr(src_mb->b, 1); | ||
| 1177 | s5p_mfc_set_enc_frame_buffer(ctx, src_y_addr, src_c_addr); | ||
| 1178 | dst_mb = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list); | ||
| 1179 | dst_mb->used = 1; | ||
| 1180 | dst_addr = vb2_dma_contig_plane_paddr(dst_mb->b, 0); | ||
| 1181 | dst_size = vb2_plane_size(dst_mb->b, 0); | ||
| 1182 | s5p_mfc_set_enc_stream_buffer(ctx, dst_addr, dst_size); | ||
| 1183 | spin_unlock_irqrestore(&dev->irqlock, flags); | ||
| 1184 | dev->curr_ctx = ctx->num; | ||
| 1185 | s5p_mfc_clean_ctx_int_flags(ctx); | ||
| 1186 | s5p_mfc_encode_one_frame(ctx); | ||
| 1187 | return 0; | ||
| 1188 | } | ||
| 1189 | |||
| 1190 | static void s5p_mfc_run_init_dec(struct s5p_mfc_ctx *ctx) | ||
| 1191 | { | ||
| 1192 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 1193 | unsigned long flags; | ||
| 1194 | struct s5p_mfc_buf *temp_vb; | ||
| 1195 | |||
| 1196 | /* Initializing decoding - parsing header */ | ||
| 1197 | spin_lock_irqsave(&dev->irqlock, flags); | ||
| 1198 | mfc_debug(2, "Preparing to init decoding\n"); | ||
| 1199 | temp_vb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list); | ||
| 1200 | s5p_mfc_set_dec_desc_buffer(ctx); | ||
| 1201 | mfc_debug(2, "Header size: %d\n", temp_vb->b->v4l2_planes[0].bytesused); | ||
| 1202 | s5p_mfc_set_dec_stream_buffer(ctx, | ||
| 1203 | vb2_dma_contig_plane_paddr(temp_vb->b, 0), | ||
| 1204 | 0, temp_vb->b->v4l2_planes[0].bytesused); | ||
| 1205 | spin_unlock_irqrestore(&dev->irqlock, flags); | ||
| 1206 | dev->curr_ctx = ctx->num; | ||
| 1207 | s5p_mfc_clean_ctx_int_flags(ctx); | ||
| 1208 | s5p_mfc_init_decode(ctx); | ||
| 1209 | } | ||
| 1210 | |||
| 1211 | static void s5p_mfc_run_init_enc(struct s5p_mfc_ctx *ctx) | ||
| 1212 | { | ||
| 1213 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 1214 | unsigned long flags; | ||
| 1215 | struct s5p_mfc_buf *dst_mb; | ||
| 1216 | unsigned long dst_addr; | ||
| 1217 | unsigned int dst_size; | ||
| 1218 | |||
| 1219 | s5p_mfc_set_enc_ref_buffer(ctx); | ||
| 1220 | spin_lock_irqsave(&dev->irqlock, flags); | ||
| 1221 | dst_mb = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list); | ||
| 1222 | dst_addr = vb2_dma_contig_plane_paddr(dst_mb->b, 0); | ||
| 1223 | dst_size = vb2_plane_size(dst_mb->b, 0); | ||
| 1224 | s5p_mfc_set_enc_stream_buffer(ctx, dst_addr, dst_size); | ||
| 1225 | spin_unlock_irqrestore(&dev->irqlock, flags); | ||
| 1226 | dev->curr_ctx = ctx->num; | ||
| 1227 | s5p_mfc_clean_ctx_int_flags(ctx); | ||
| 1228 | s5p_mfc_init_encode(ctx); | ||
| 1229 | } | ||
| 1230 | |||
| 1231 | static int s5p_mfc_run_init_dec_buffers(struct s5p_mfc_ctx *ctx) | ||
| 1232 | { | ||
| 1233 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 1234 | unsigned long flags; | ||
| 1235 | struct s5p_mfc_buf *temp_vb; | ||
| 1236 | int ret; | ||
| 1237 | |||
| 1238 | /* | ||
| 1239 | * Header was parsed now starting processing | ||
| 1240 | * First set the output frame buffers | ||
| 1241 | */ | ||
| 1242 | if (ctx->capture_state != QUEUE_BUFS_MMAPED) { | ||
| 1243 | mfc_err("It seems that not all destionation buffers were " | ||
| 1244 | "mmaped\nMFC requires that all destination are mmaped " | ||
| 1245 | "before starting processing\n"); | ||
| 1246 | return -EAGAIN; | ||
| 1247 | } | ||
| 1248 | spin_lock_irqsave(&dev->irqlock, flags); | ||
| 1249 | if (list_empty(&ctx->src_queue)) { | ||
| 1250 | mfc_err("Header has been deallocated in the middle of" | ||
| 1251 | " initialization\n"); | ||
| 1252 | spin_unlock_irqrestore(&dev->irqlock, flags); | ||
| 1253 | return -EIO; | ||
| 1254 | } | ||
| 1255 | temp_vb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list); | ||
| 1256 | mfc_debug(2, "Header size: %d\n", temp_vb->b->v4l2_planes[0].bytesused); | ||
| 1257 | s5p_mfc_set_dec_stream_buffer(ctx, | ||
| 1258 | vb2_dma_contig_plane_paddr(temp_vb->b, 0), | ||
| 1259 | 0, temp_vb->b->v4l2_planes[0].bytesused); | ||
| 1260 | spin_unlock_irqrestore(&dev->irqlock, flags); | ||
| 1261 | dev->curr_ctx = ctx->num; | ||
| 1262 | s5p_mfc_clean_ctx_int_flags(ctx); | ||
| 1263 | ret = s5p_mfc_set_dec_frame_buffer(ctx); | ||
| 1264 | if (ret) { | ||
| 1265 | mfc_err("Failed to alloc frame mem\n"); | ||
| 1266 | ctx->state = MFCINST_ERROR; | ||
| 1267 | } | ||
| 1268 | return ret; | ||
| 1269 | } | ||
| 1270 | |||
| 1271 | /* Try running an operation on hardware */ | ||
| 1272 | void s5p_mfc_try_run(struct s5p_mfc_dev *dev) | ||
| 1273 | { | ||
| 1274 | struct s5p_mfc_ctx *ctx; | ||
| 1275 | int new_ctx; | ||
| 1276 | unsigned int ret = 0; | ||
| 1277 | |||
| 1278 | if (test_bit(0, &dev->enter_suspend)) { | ||
| 1279 | mfc_debug(1, "Entering suspend so do not schedule any jobs\n"); | ||
| 1280 | return; | ||
| 1281 | } | ||
| 1282 | /* Check whether hardware is not running */ | ||
| 1283 | if (test_and_set_bit(0, &dev->hw_lock) != 0) { | ||
| 1284 | /* This is perfectly ok, the scheduled ctx should wait */ | ||
| 1285 | mfc_debug(1, "Couldn't lock HW\n"); | ||
| 1286 | return; | ||
| 1287 | } | ||
| 1288 | /* Choose the context to run */ | ||
| 1289 | new_ctx = s5p_mfc_get_new_ctx(dev); | ||
| 1290 | if (new_ctx < 0) { | ||
| 1291 | /* No contexts to run */ | ||
| 1292 | if (test_and_clear_bit(0, &dev->hw_lock) == 0) { | ||
| 1293 | mfc_err("Failed to unlock hardware\n"); | ||
| 1294 | return; | ||
| 1295 | } | ||
| 1296 | mfc_debug(1, "No ctx is scheduled to be run\n"); | ||
| 1297 | return; | ||
| 1298 | } | ||
| 1299 | ctx = dev->ctx[new_ctx]; | ||
| 1300 | /* Got context to run in ctx */ | ||
| 1301 | /* | ||
| 1302 | * Last frame has already been sent to MFC. | ||
| 1303 | * Now obtaining frames from MFC buffer | ||
| 1304 | */ | ||
| 1305 | s5p_mfc_clock_on(); | ||
| 1306 | if (ctx->type == MFCINST_DECODER) { | ||
| 1307 | s5p_mfc_set_dec_desc_buffer(ctx); | ||
| 1308 | switch (ctx->state) { | ||
| 1309 | case MFCINST_FINISHING: | ||
| 1310 | s5p_mfc_run_dec_frame(ctx, MFC_DEC_LAST_FRAME); | ||
| 1311 | break; | ||
| 1312 | case MFCINST_RUNNING: | ||
| 1313 | ret = s5p_mfc_run_dec_frame(ctx, MFC_DEC_FRAME); | ||
| 1314 | break; | ||
| 1315 | case MFCINST_INIT: | ||
| 1316 | s5p_mfc_clean_ctx_int_flags(ctx); | ||
| 1317 | ret = s5p_mfc_open_inst_cmd(ctx); | ||
| 1318 | break; | ||
| 1319 | case MFCINST_RETURN_INST: | ||
| 1320 | s5p_mfc_clean_ctx_int_flags(ctx); | ||
| 1321 | ret = s5p_mfc_close_inst_cmd(ctx); | ||
| 1322 | break; | ||
| 1323 | case MFCINST_GOT_INST: | ||
| 1324 | s5p_mfc_run_init_dec(ctx); | ||
| 1325 | break; | ||
| 1326 | case MFCINST_HEAD_PARSED: | ||
| 1327 | ret = s5p_mfc_run_init_dec_buffers(ctx); | ||
| 1328 | mfc_debug(1, "head parsed\n"); | ||
| 1329 | break; | ||
| 1330 | case MFCINST_RES_CHANGE_INIT: | ||
| 1331 | s5p_mfc_run_res_change(ctx); | ||
| 1332 | break; | ||
| 1333 | case MFCINST_RES_CHANGE_FLUSH: | ||
| 1334 | s5p_mfc_run_dec_frame(ctx, MFC_DEC_FRAME); | ||
| 1335 | break; | ||
| 1336 | case MFCINST_RES_CHANGE_END: | ||
| 1337 | mfc_debug(2, "Finished remaining frames after resolution change\n"); | ||
| 1338 | ctx->capture_state = QUEUE_FREE; | ||
| 1339 | mfc_debug(2, "Will re-init the codec\n"); | ||
| 1340 | s5p_mfc_run_init_dec(ctx); | ||
| 1341 | break; | ||
| 1342 | default: | ||
| 1343 | ret = -EAGAIN; | ||
| 1344 | } | ||
| 1345 | } else if (ctx->type == MFCINST_ENCODER) { | ||
| 1346 | switch (ctx->state) { | ||
| 1347 | case MFCINST_FINISHING: | ||
| 1348 | case MFCINST_RUNNING: | ||
| 1349 | ret = s5p_mfc_run_enc_frame(ctx); | ||
| 1350 | break; | ||
| 1351 | case MFCINST_INIT: | ||
| 1352 | s5p_mfc_clean_ctx_int_flags(ctx); | ||
| 1353 | ret = s5p_mfc_open_inst_cmd(ctx); | ||
| 1354 | break; | ||
| 1355 | case MFCINST_RETURN_INST: | ||
| 1356 | s5p_mfc_clean_ctx_int_flags(ctx); | ||
| 1357 | ret = s5p_mfc_close_inst_cmd(ctx); | ||
| 1358 | break; | ||
| 1359 | case MFCINST_GOT_INST: | ||
| 1360 | s5p_mfc_run_init_enc(ctx); | ||
| 1361 | break; | ||
| 1362 | default: | ||
| 1363 | ret = -EAGAIN; | ||
| 1364 | } | ||
| 1365 | } else { | ||
| 1366 | mfc_err("Invalid context type: %d\n", ctx->type); | ||
| 1367 | ret = -EAGAIN; | ||
| 1368 | } | ||
| 1369 | |||
| 1370 | if (ret) { | ||
| 1371 | /* Free hardware lock */ | ||
| 1372 | if (test_and_clear_bit(0, &dev->hw_lock) == 0) | ||
| 1373 | mfc_err("Failed to unlock hardware\n"); | ||
| 1374 | |||
| 1375 | /* This is in deed imporant, as no operation has been | ||
| 1376 | * scheduled, reduce the clock count as no one will | ||
| 1377 | * ever do this, because no interrupt related to this try_run | ||
| 1378 | * will ever come from hardware. */ | ||
| 1379 | s5p_mfc_clock_off(); | ||
| 1380 | } | ||
| 1381 | } | ||
| 1382 | |||
| 1383 | |||
| 1384 | void s5p_mfc_cleanup_queue(struct list_head *lh, struct vb2_queue *vq) | ||
| 1385 | { | ||
| 1386 | struct s5p_mfc_buf *b; | ||
| 1387 | int i; | ||
| 1388 | |||
| 1389 | while (!list_empty(lh)) { | ||
| 1390 | b = list_entry(lh->next, struct s5p_mfc_buf, list); | ||
| 1391 | for (i = 0; i < b->b->num_planes; i++) | ||
| 1392 | vb2_set_plane_payload(b->b, i, 0); | ||
| 1393 | vb2_buffer_done(b->b, VB2_BUF_STATE_ERROR); | ||
| 1394 | list_del(&b->list); | ||
| 1395 | } | ||
| 1396 | } | ||
| 1397 | |||
diff --git a/drivers/media/video/s5p-mfc/s5p_mfc_opr.h b/drivers/media/video/s5p-mfc/s5p_mfc_opr.h new file mode 100644 index 000000000000..db83836e6a9f --- /dev/null +++ b/drivers/media/video/s5p-mfc/s5p_mfc_opr.h | |||
| @@ -0,0 +1,91 @@ | |||
| 1 | /* | ||
| 2 | * drivers/media/video/samsung/mfc5/s5p_mfc_opr.h | ||
| 3 | * | ||
| 4 | * Header file for Samsung MFC (Multi Function Codec - FIMV) driver | ||
| 5 | * Contains declarations of hw related functions. | ||
| 6 | * | ||
| 7 | * Kamil Debski, Copyright (C) 2011 Samsung Electronics | ||
| 8 | * http://www.samsung.com/ | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | */ | ||
| 14 | |||
| 15 | #ifndef S5P_MFC_OPR_H_ | ||
| 16 | #define S5P_MFC_OPR_H_ | ||
| 17 | |||
| 18 | #include "s5p_mfc_common.h" | ||
| 19 | |||
| 20 | int s5p_mfc_init_decode(struct s5p_mfc_ctx *ctx); | ||
| 21 | int s5p_mfc_init_encode(struct s5p_mfc_ctx *mfc_ctx); | ||
| 22 | |||
| 23 | /* Decoding functions */ | ||
| 24 | int s5p_mfc_set_dec_frame_buffer(struct s5p_mfc_ctx *ctx); | ||
| 25 | int s5p_mfc_set_dec_stream_buffer(struct s5p_mfc_ctx *ctx, int buf_addr, | ||
| 26 | unsigned int start_num_byte, | ||
| 27 | unsigned int buf_size); | ||
| 28 | |||
| 29 | /* Encoding functions */ | ||
| 30 | void s5p_mfc_set_enc_frame_buffer(struct s5p_mfc_ctx *ctx, | ||
| 31 | unsigned long y_addr, unsigned long c_addr); | ||
| 32 | int s5p_mfc_set_enc_stream_buffer(struct s5p_mfc_ctx *ctx, | ||
| 33 | unsigned long addr, unsigned int size); | ||
| 34 | void s5p_mfc_get_enc_frame_buffer(struct s5p_mfc_ctx *ctx, | ||
| 35 | unsigned long *y_addr, unsigned long *c_addr); | ||
| 36 | int s5p_mfc_set_enc_ref_buffer(struct s5p_mfc_ctx *mfc_ctx); | ||
| 37 | |||
| 38 | int s5p_mfc_decode_one_frame(struct s5p_mfc_ctx *ctx, | ||
| 39 | enum s5p_mfc_decode_arg last_frame); | ||
| 40 | int s5p_mfc_encode_one_frame(struct s5p_mfc_ctx *mfc_ctx); | ||
| 41 | |||
| 42 | /* Memory allocation */ | ||
| 43 | int s5p_mfc_alloc_dec_temp_buffers(struct s5p_mfc_ctx *ctx); | ||
| 44 | void s5p_mfc_set_dec_desc_buffer(struct s5p_mfc_ctx *ctx); | ||
| 45 | void s5p_mfc_release_dec_desc_buffer(struct s5p_mfc_ctx *ctx); | ||
| 46 | |||
| 47 | int s5p_mfc_alloc_codec_buffers(struct s5p_mfc_ctx *ctx); | ||
| 48 | void s5p_mfc_release_codec_buffers(struct s5p_mfc_ctx *ctx); | ||
| 49 | |||
| 50 | int s5p_mfc_alloc_instance_buffer(struct s5p_mfc_ctx *ctx); | ||
| 51 | void s5p_mfc_release_instance_buffer(struct s5p_mfc_ctx *ctx); | ||
| 52 | |||
| 53 | void s5p_mfc_try_run(struct s5p_mfc_dev *dev); | ||
| 54 | void s5p_mfc_cleanup_queue(struct list_head *lh, struct vb2_queue *vq); | ||
| 55 | |||
| 56 | #define s5p_mfc_get_dspl_y_adr() (readl(dev->regs_base + \ | ||
| 57 | S5P_FIMV_SI_DISPLAY_Y_ADR) << \ | ||
| 58 | MFC_OFFSET_SHIFT) | ||
| 59 | #define s5p_mfc_get_dec_y_adr() (readl(dev->regs_base + \ | ||
| 60 | S5P_FIMV_SI_DISPLAY_Y_ADR) << \ | ||
| 61 | MFC_OFFSET_SHIFT) | ||
| 62 | #define s5p_mfc_get_dspl_status() readl(dev->regs_base + \ | ||
| 63 | S5P_FIMV_SI_DISPLAY_STATUS) | ||
| 64 | #define s5p_mfc_get_frame_type() (readl(dev->regs_base + \ | ||
| 65 | S5P_FIMV_DECODE_FRAME_TYPE) \ | ||
| 66 | & S5P_FIMV_DECODE_FRAME_MASK) | ||
| 67 | #define s5p_mfc_get_consumed_stream() readl(dev->regs_base + \ | ||
| 68 | S5P_FIMV_SI_CONSUMED_BYTES) | ||
| 69 | #define s5p_mfc_get_int_reason() (readl(dev->regs_base + \ | ||
| 70 | S5P_FIMV_RISC2HOST_CMD) & \ | ||
| 71 | S5P_FIMV_RISC2HOST_CMD_MASK) | ||
| 72 | #define s5p_mfc_get_int_err() readl(dev->regs_base + \ | ||
| 73 | S5P_FIMV_RISC2HOST_ARG2) | ||
| 74 | #define s5p_mfc_err_dec(x) (((x) & S5P_FIMV_ERR_DEC_MASK) >> \ | ||
| 75 | S5P_FIMV_ERR_DEC_SHIFT) | ||
| 76 | #define s5p_mfc_err_dspl(x) (((x) & S5P_FIMV_ERR_DSPL_MASK) >> \ | ||
| 77 | S5P_FIMV_ERR_DSPL_SHIFT) | ||
| 78 | #define s5p_mfc_get_img_width() readl(dev->regs_base + \ | ||
| 79 | S5P_FIMV_SI_HRESOL) | ||
| 80 | #define s5p_mfc_get_img_height() readl(dev->regs_base + \ | ||
| 81 | S5P_FIMV_SI_VRESOL) | ||
| 82 | #define s5p_mfc_get_dpb_count() readl(dev->regs_base + \ | ||
| 83 | S5P_FIMV_SI_BUF_NUMBER) | ||
| 84 | #define s5p_mfc_get_inst_no() readl(dev->regs_base + \ | ||
| 85 | S5P_FIMV_RISC2HOST_ARG1) | ||
| 86 | #define s5p_mfc_get_enc_strm_size() readl(dev->regs_base + \ | ||
| 87 | S5P_FIMV_ENC_SI_STRM_SIZE) | ||
| 88 | #define s5p_mfc_get_enc_slice_type() readl(dev->regs_base + \ | ||
| 89 | S5P_FIMV_ENC_SI_SLICE_TYPE) | ||
| 90 | |||
| 91 | #endif /* S5P_MFC_OPR_H_ */ | ||
diff --git a/drivers/media/video/s5p-mfc/s5p_mfc_pm.c b/drivers/media/video/s5p-mfc/s5p_mfc_pm.c new file mode 100644 index 000000000000..f6a3035c4fb7 --- /dev/null +++ b/drivers/media/video/s5p-mfc/s5p_mfc_pm.c | |||
| @@ -0,0 +1,117 @@ | |||
| 1 | /* | ||
| 2 | * linux/drivers/media/video/s5p-mfc/s5p_mfc_pm.c | ||
| 3 | * | ||
| 4 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
| 5 | * http://www.samsung.com/ | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License as published by | ||
| 9 | * the Free Software Foundation; either version 2 of the License, or | ||
| 10 | * (at your option) any later version. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/clk.h> | ||
| 14 | #include <linux/err.h> | ||
| 15 | #include <linux/platform_device.h> | ||
| 16 | #ifdef CONFIG_PM_RUNTIME | ||
| 17 | #include <linux/pm_runtime.h> | ||
| 18 | #endif | ||
| 19 | #include "s5p_mfc_common.h" | ||
| 20 | #include "s5p_mfc_debug.h" | ||
| 21 | #include "s5p_mfc_pm.h" | ||
| 22 | |||
| 23 | #define MFC_CLKNAME "sclk_mfc" | ||
| 24 | #define MFC_GATE_CLK_NAME "mfc" | ||
| 25 | |||
| 26 | #define CLK_DEBUG | ||
| 27 | |||
| 28 | static struct s5p_mfc_pm *pm; | ||
| 29 | static struct s5p_mfc_dev *p_dev; | ||
| 30 | |||
| 31 | #ifdef CLK_DEBUG | ||
| 32 | atomic_t clk_ref; | ||
| 33 | #endif | ||
| 34 | |||
| 35 | int s5p_mfc_init_pm(struct s5p_mfc_dev *dev) | ||
| 36 | { | ||
| 37 | int ret = 0; | ||
| 38 | |||
| 39 | pm = &dev->pm; | ||
| 40 | p_dev = dev; | ||
| 41 | pm->clock_gate = clk_get(&dev->plat_dev->dev, MFC_GATE_CLK_NAME); | ||
| 42 | if (IS_ERR(pm->clock_gate)) { | ||
| 43 | mfc_err("Failed to get clock-gating control\n"); | ||
| 44 | ret = -ENOENT; | ||
| 45 | goto err_g_ip_clk; | ||
| 46 | } | ||
| 47 | pm->clock = clk_get(&dev->plat_dev->dev, MFC_CLKNAME); | ||
| 48 | if (IS_ERR(pm->clock)) { | ||
| 49 | mfc_err("Failed to get MFC clock\n"); | ||
| 50 | ret = -ENOENT; | ||
| 51 | goto err_g_ip_clk_2; | ||
| 52 | } | ||
| 53 | atomic_set(&pm->power, 0); | ||
| 54 | #ifdef CONFIG_PM_RUNTIME | ||
| 55 | pm->device = &dev->plat_dev->dev; | ||
| 56 | pm_runtime_enable(pm->device); | ||
| 57 | #endif | ||
| 58 | #ifdef CLK_DEBUG | ||
| 59 | atomic_set(&clk_ref, 0); | ||
| 60 | #endif | ||
| 61 | return 0; | ||
| 62 | err_g_ip_clk_2: | ||
| 63 | clk_put(pm->clock_gate); | ||
| 64 | err_g_ip_clk: | ||
| 65 | return ret; | ||
| 66 | } | ||
| 67 | |||
| 68 | void s5p_mfc_final_pm(struct s5p_mfc_dev *dev) | ||
| 69 | { | ||
| 70 | clk_put(pm->clock_gate); | ||
| 71 | clk_put(pm->clock); | ||
| 72 | #ifdef CONFIG_PM_RUNTIME | ||
| 73 | pm_runtime_disable(pm->device); | ||
| 74 | #endif | ||
| 75 | } | ||
| 76 | |||
| 77 | int s5p_mfc_clock_on(void) | ||
| 78 | { | ||
| 79 | int ret; | ||
| 80 | #ifdef CLK_DEBUG | ||
| 81 | atomic_inc(&clk_ref); | ||
| 82 | mfc_debug(3, "+ %d", atomic_read(&clk_ref)); | ||
| 83 | #endif | ||
| 84 | ret = clk_enable(pm->clock_gate); | ||
| 85 | return ret; | ||
| 86 | } | ||
| 87 | |||
| 88 | void s5p_mfc_clock_off(void) | ||
| 89 | { | ||
| 90 | #ifdef CLK_DEBUG | ||
| 91 | atomic_dec(&clk_ref); | ||
| 92 | mfc_debug(3, "- %d", atomic_read(&clk_ref)); | ||
| 93 | #endif | ||
| 94 | clk_disable(pm->clock_gate); | ||
| 95 | } | ||
| 96 | |||
| 97 | int s5p_mfc_power_on(void) | ||
| 98 | { | ||
| 99 | #ifdef CONFIG_PM_RUNTIME | ||
| 100 | return pm_runtime_get_sync(pm->device); | ||
| 101 | #else | ||
| 102 | atomic_set(&pm->power, 1); | ||
| 103 | return 0; | ||
| 104 | #endif | ||
| 105 | } | ||
| 106 | |||
| 107 | int s5p_mfc_power_off(void) | ||
| 108 | { | ||
| 109 | #ifdef CONFIG_PM_RUNTIME | ||
| 110 | return pm_runtime_put_sync(pm->device); | ||
| 111 | #else | ||
| 112 | atomic_set(&pm->power, 0); | ||
| 113 | return 0; | ||
| 114 | #endif | ||
| 115 | } | ||
| 116 | |||
| 117 | |||
diff --git a/drivers/media/video/s5p-mfc/s5p_mfc_pm.h b/drivers/media/video/s5p-mfc/s5p_mfc_pm.h new file mode 100644 index 000000000000..5107914f27e4 --- /dev/null +++ b/drivers/media/video/s5p-mfc/s5p_mfc_pm.h | |||
| @@ -0,0 +1,24 @@ | |||
| 1 | /* | ||
| 2 | * linux/drivers/media/video/s5p-mfc/s5p_mfc_pm.h | ||
| 3 | * | ||
| 4 | * Copyright (C) 2011 Samsung Electronics Co., Ltd. | ||
| 5 | * http://www.samsung.com/ | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License as published by | ||
| 9 | * the Free Software Foundation; either version 2 of the License, or | ||
| 10 | * (at your option) any later version. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #ifndef S5P_MFC_PM_H_ | ||
| 14 | #define S5P_MFC_PM_H_ | ||
| 15 | |||
| 16 | int s5p_mfc_init_pm(struct s5p_mfc_dev *dev); | ||
| 17 | void s5p_mfc_final_pm(struct s5p_mfc_dev *dev); | ||
| 18 | |||
| 19 | int s5p_mfc_clock_on(void); | ||
| 20 | void s5p_mfc_clock_off(void); | ||
| 21 | int s5p_mfc_power_on(void); | ||
| 22 | int s5p_mfc_power_off(void); | ||
| 23 | |||
| 24 | #endif /* S5P_MFC_PM_H_ */ | ||
diff --git a/drivers/media/video/s5p-mfc/s5p_mfc_shm.c b/drivers/media/video/s5p-mfc/s5p_mfc_shm.c new file mode 100644 index 000000000000..91fdbac8c37a --- /dev/null +++ b/drivers/media/video/s5p-mfc/s5p_mfc_shm.c | |||
| @@ -0,0 +1,47 @@ | |||
| 1 | /* | ||
| 2 | * linux/drivers/media/video/s5p-mfc/s5p_mfc_shm.c | ||
| 3 | * | ||
| 4 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
| 5 | * http://www.samsung.com/ | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License as published by | ||
| 9 | * the Free Software Foundation; either version 2 of the License, or | ||
| 10 | * (at your option) any later version. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #ifdef CONFIG_ARCH_EXYNOS4 | ||
| 14 | #include <linux/dma-mapping.h> | ||
| 15 | #endif | ||
| 16 | #include <linux/io.h> | ||
| 17 | #include "s5p_mfc_common.h" | ||
| 18 | #include "s5p_mfc_debug.h" | ||
| 19 | |||
| 20 | int s5p_mfc_init_shm(struct s5p_mfc_ctx *ctx) | ||
| 21 | { | ||
| 22 | struct s5p_mfc_dev *dev = ctx->dev; | ||
| 23 | void *shm_alloc_ctx = dev->alloc_ctx[MFC_BANK1_ALLOC_CTX]; | ||
| 24 | |||
| 25 | ctx->shm_alloc = vb2_dma_contig_memops.alloc(shm_alloc_ctx, | ||
| 26 | SHARED_BUF_SIZE); | ||
| 27 | if (IS_ERR(ctx->shm_alloc)) { | ||
| 28 | mfc_err("failed to allocate shared memory\n"); | ||
| 29 | return PTR_ERR(ctx->shm_alloc); | ||
| 30 | } | ||
| 31 | /* shm_ofs only keeps the offset from base (port a) */ | ||
| 32 | ctx->shm_ofs = s5p_mfc_mem_cookie(shm_alloc_ctx, ctx->shm_alloc) | ||
| 33 | - dev->bank1; | ||
| 34 | BUG_ON(ctx->shm_ofs & ((1 << MFC_BANK1_ALIGN_ORDER) - 1)); | ||
| 35 | ctx->shm = vb2_dma_contig_memops.vaddr(ctx->shm_alloc); | ||
| 36 | if (!ctx->shm) { | ||
| 37 | vb2_dma_contig_memops.put(ctx->shm_alloc); | ||
| 38 | ctx->shm_ofs = 0; | ||
| 39 | ctx->shm_alloc = NULL; | ||
| 40 | mfc_err("failed to virt addr of shared memory\n"); | ||
| 41 | return -ENOMEM; | ||
| 42 | } | ||
| 43 | memset((void *)ctx->shm, 0, SHARED_BUF_SIZE); | ||
| 44 | wmb(); | ||
| 45 | return 0; | ||
| 46 | } | ||
| 47 | |||
diff --git a/drivers/media/video/s5p-mfc/s5p_mfc_shm.h b/drivers/media/video/s5p-mfc/s5p_mfc_shm.h new file mode 100644 index 000000000000..764eac6bcc4c --- /dev/null +++ b/drivers/media/video/s5p-mfc/s5p_mfc_shm.h | |||
| @@ -0,0 +1,91 @@ | |||
| 1 | /* | ||
| 2 | * linux/drivers/media/video/s5p-mfc/s5p_mfc_shm.h | ||
| 3 | * | ||
| 4 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | ||
| 5 | * http://www.samsung.com/ | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License as published by | ||
| 9 | * the Free Software Foundation; either version 2 of the License, or | ||
| 10 | * (at your option) any later version. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #ifndef S5P_MFC_SHM_H_ | ||
| 14 | #define S5P_MFC_SHM_H_ | ||
| 15 | |||
| 16 | enum MFC_SHM_OFS | ||
| 17 | { | ||
| 18 | EXTENEDED_DECODE_STATUS = 0x00, /* D */ | ||
| 19 | SET_FRAME_TAG = 0x04, /* D */ | ||
| 20 | GET_FRAME_TAG_TOP = 0x08, /* D */ | ||
| 21 | GET_FRAME_TAG_BOT = 0x0C, /* D */ | ||
| 22 | PIC_TIME_TOP = 0x10, /* D */ | ||
| 23 | PIC_TIME_BOT = 0x14, /* D */ | ||
| 24 | START_BYTE_NUM = 0x18, /* D */ | ||
| 25 | |||
| 26 | CROP_INFO_H = 0x20, /* D */ | ||
| 27 | CROP_INFO_V = 0x24, /* D */ | ||
| 28 | EXT_ENC_CONTROL = 0x28, /* E */ | ||
| 29 | ENC_PARAM_CHANGE = 0x2C, /* E */ | ||
| 30 | RC_VOP_TIMING = 0x30, /* E, MPEG4 */ | ||
| 31 | HEC_PERIOD = 0x34, /* E, MPEG4 */ | ||
| 32 | METADATA_ENABLE = 0x38, /* C */ | ||
| 33 | METADATA_STATUS = 0x3C, /* C */ | ||
| 34 | METADATA_DISPLAY_INDEX = 0x40, /* C */ | ||
| 35 | EXT_METADATA_START_ADDR = 0x44, /* C */ | ||
| 36 | PUT_EXTRADATA = 0x48, /* C */ | ||
| 37 | EXTRADATA_ADDR = 0x4C, /* C */ | ||
| 38 | |||
| 39 | ALLOC_LUMA_DPB_SIZE = 0x64, /* D */ | ||
| 40 | ALLOC_CHROMA_DPB_SIZE = 0x68, /* D */ | ||
| 41 | ALLOC_MV_SIZE = 0x6C, /* D */ | ||
| 42 | P_B_FRAME_QP = 0x70, /* E */ | ||
| 43 | SAMPLE_ASPECT_RATIO_IDC = 0x74, /* E, H.264, depend on | ||
| 44 | ASPECT_RATIO_VUI_ENABLE in EXT_ENC_CONTROL */ | ||
| 45 | EXTENDED_SAR = 0x78, /* E, H.264, depned on | ||
| 46 | ASPECT_RATIO_VUI_ENABLE in EXT_ENC_CONTROL */ | ||
| 47 | DISP_PIC_PROFILE = 0x7C, /* D */ | ||
| 48 | FLUSH_CMD_TYPE = 0x80, /* C */ | ||
| 49 | FLUSH_CMD_INBUF1 = 0x84, /* C */ | ||
| 50 | FLUSH_CMD_INBUF2 = 0x88, /* C */ | ||
| 51 | FLUSH_CMD_OUTBUF = 0x8C, /* E */ | ||
| 52 | NEW_RC_BIT_RATE = 0x90, /* E, format as RC_BIT_RATE(0xC5A8) | ||
| 53 | depend on RC_BIT_RATE_CHANGE in ENC_PARAM_CHANGE */ | ||
| 54 | NEW_RC_FRAME_RATE = 0x94, /* E, format as RC_FRAME_RATE(0xD0D0) | ||
| 55 | depend on RC_FRAME_RATE_CHANGE in ENC_PARAM_CHANGE */ | ||
| 56 | NEW_I_PERIOD = 0x98, /* E, format as I_FRM_CTRL(0xC504) | ||
| 57 | depend on I_PERIOD_CHANGE in ENC_PARAM_CHANGE */ | ||
| 58 | H264_I_PERIOD = 0x9C, /* E, H.264, open GOP */ | ||
| 59 | RC_CONTROL_CONFIG = 0xA0, /* E */ | ||
| 60 | BATCH_INPUT_ADDR = 0xA4, /* E */ | ||
| 61 | BATCH_OUTPUT_ADDR = 0xA8, /* E */ | ||
| 62 | BATCH_OUTPUT_SIZE = 0xAC, /* E */ | ||
| 63 | MIN_LUMA_DPB_SIZE = 0xB0, /* D */ | ||
| 64 | DEVICE_FORMAT_ID = 0xB4, /* C */ | ||
| 65 | H264_POC_TYPE = 0xB8, /* D */ | ||
| 66 | MIN_CHROMA_DPB_SIZE = 0xBC, /* D */ | ||
| 67 | DISP_PIC_FRAME_TYPE = 0xC0, /* D */ | ||
| 68 | FREE_LUMA_DPB = 0xC4, /* D, VC1 MPEG4 */ | ||
| 69 | ASPECT_RATIO_INFO = 0xC8, /* D, MPEG4 */ | ||
| 70 | EXTENDED_PAR = 0xCC, /* D, MPEG4 */ | ||
| 71 | DBG_HISTORY_INPUT0 = 0xD0, /* C */ | ||
| 72 | DBG_HISTORY_INPUT1 = 0xD4, /* C */ | ||
| 73 | DBG_HISTORY_OUTPUT = 0xD8, /* C */ | ||
| 74 | HIERARCHICAL_P_QP = 0xE0, /* E, H.264 */ | ||
| 75 | }; | ||
| 76 | |||
| 77 | int s5p_mfc_init_shm(struct s5p_mfc_ctx *ctx); | ||
| 78 | |||
| 79 | #define s5p_mfc_write_shm(ctx, x, ofs) \ | ||
| 80 | do { \ | ||
| 81 | writel(x, (ctx->shm + ofs)); \ | ||
| 82 | wmb(); \ | ||
| 83 | } while (0) | ||
| 84 | |||
| 85 | static inline u32 s5p_mfc_read_shm(struct s5p_mfc_ctx *ctx, unsigned int ofs) | ||
| 86 | { | ||
| 87 | rmb(); | ||
| 88 | return readl(ctx->shm + ofs); | ||
| 89 | } | ||
| 90 | |||
| 91 | #endif /* S5P_MFC_SHM_H_ */ | ||
diff --git a/drivers/media/video/s5p-tv/Kconfig b/drivers/media/video/s5p-tv/Kconfig new file mode 100644 index 000000000000..9c37dee7bc59 --- /dev/null +++ b/drivers/media/video/s5p-tv/Kconfig | |||
| @@ -0,0 +1,76 @@ | |||
| 1 | # drivers/media/video/s5p-tv/Kconfig | ||
| 2 | # | ||
| 3 | # Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
| 4 | # http://www.samsung.com/ | ||
| 5 | # Tomasz Stanislawski <t.stanislaws@samsung.com> | ||
| 6 | # | ||
| 7 | # Licensed under GPL | ||
| 8 | |||
| 9 | config VIDEO_SAMSUNG_S5P_TV | ||
| 10 | bool "Samsung TV driver for S5P platform (experimental)" | ||
| 11 | depends on PLAT_S5P | ||
| 12 | depends on EXPERIMENTAL | ||
| 13 | default n | ||
| 14 | ---help--- | ||
| 15 | Say Y here to enable selecting the TV output devices for | ||
| 16 | Samsung S5P platform. | ||
| 17 | |||
| 18 | if VIDEO_SAMSUNG_S5P_TV | ||
| 19 | |||
| 20 | config VIDEO_SAMSUNG_S5P_HDMI | ||
| 21 | tristate "Samsung HDMI Driver" | ||
| 22 | depends on VIDEO_V4L2 | ||
| 23 | depends on VIDEO_SAMSUNG_S5P_TV | ||
| 24 | select VIDEO_SAMSUNG_S5P_HDMIPHY | ||
| 25 | help | ||
| 26 | Say Y here if you want support for the HDMI output | ||
| 27 | interface in S5P Samsung SoC. The driver can be compiled | ||
| 28 | as module. It is an auxiliary driver, that exposes a V4L2 | ||
| 29 | subdev for use by other drivers. This driver requires | ||
| 30 | hdmiphy driver to work correctly. | ||
| 31 | |||
| 32 | config VIDEO_SAMSUNG_S5P_HDMI_DEBUG | ||
| 33 | bool "Enable debug for HDMI Driver" | ||
| 34 | depends on VIDEO_SAMSUNG_S5P_HDMI | ||
| 35 | default n | ||
| 36 | help | ||
| 37 | Enables debugging for HDMI driver. | ||
| 38 | |||
| 39 | config VIDEO_SAMSUNG_S5P_HDMIPHY | ||
| 40 | tristate "Samsung HDMIPHY Driver" | ||
| 41 | depends on VIDEO_DEV && VIDEO_V4L2 && I2C | ||
| 42 | depends on VIDEO_SAMSUNG_S5P_TV | ||
| 43 | help | ||
| 44 | Say Y here if you want support for the physical HDMI | ||
| 45 | interface in S5P Samsung SoC. The driver can be compiled | ||
| 46 | as module. It is an I2C driver, that exposes a V4L2 | ||
| 47 | subdev for use by other drivers. | ||
| 48 | |||
| 49 | config VIDEO_SAMSUNG_S5P_SDO | ||
| 50 | tristate "Samsung Analog TV Driver" | ||
| 51 | depends on VIDEO_DEV && VIDEO_V4L2 | ||
| 52 | depends on VIDEO_SAMSUNG_S5P_TV | ||
| 53 | help | ||
| 54 | Say Y here if you want support for the analog TV output | ||
| 55 | interface in S5P Samsung SoC. The driver can be compiled | ||
| 56 | as module. It is an auxiliary driver, that exposes a V4L2 | ||
| 57 | subdev for use by other drivers. This driver requires | ||
| 58 | hdmiphy driver to work correctly. | ||
| 59 | |||
| 60 | config VIDEO_SAMSUNG_S5P_MIXER | ||
| 61 | tristate "Samsung Mixer and Video Processor Driver" | ||
| 62 | depends on VIDEO_DEV && VIDEO_V4L2 | ||
| 63 | depends on VIDEO_SAMSUNG_S5P_TV | ||
| 64 | select VIDEOBUF2_DMA_CONTIG | ||
| 65 | help | ||
| 66 | Say Y here if you want support for the Mixer in Samsung S5P SoCs. | ||
| 67 | This device produce image data to one of output interfaces. | ||
| 68 | |||
| 69 | config VIDEO_SAMSUNG_S5P_MIXER_DEBUG | ||
| 70 | bool "Enable debug for Mixer Driver" | ||
| 71 | depends on VIDEO_SAMSUNG_S5P_MIXER | ||
| 72 | default n | ||
| 73 | help | ||
| 74 | Enables debugging for Mixer driver. | ||
| 75 | |||
| 76 | endif # VIDEO_SAMSUNG_S5P_TV | ||
diff --git a/drivers/media/video/s5p-tv/Makefile b/drivers/media/video/s5p-tv/Makefile new file mode 100644 index 000000000000..37e4c17663b4 --- /dev/null +++ b/drivers/media/video/s5p-tv/Makefile | |||
| @@ -0,0 +1,17 @@ | |||
| 1 | # drivers/media/video/samsung/tvout/Makefile | ||
| 2 | # | ||
| 3 | # Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
| 4 | # http://www.samsung.com/ | ||
| 5 | # Tomasz Stanislawski <t.stanislaws@samsung.com> | ||
| 6 | # | ||
| 7 | # Licensed under GPL | ||
| 8 | |||
| 9 | obj-$(CONFIG_VIDEO_SAMSUNG_S5P_HDMIPHY) += s5p-hdmiphy.o | ||
| 10 | s5p-hdmiphy-y += hdmiphy_drv.o | ||
| 11 | obj-$(CONFIG_VIDEO_SAMSUNG_S5P_HDMI) += s5p-hdmi.o | ||
| 12 | s5p-hdmi-y += hdmi_drv.o | ||
| 13 | obj-$(CONFIG_VIDEO_SAMSUNG_S5P_SDO) += s5p-sdo.o | ||
| 14 | s5p-sdo-y += sdo_drv.o | ||
| 15 | obj-$(CONFIG_VIDEO_SAMSUNG_S5P_MIXER) += s5p-mixer.o | ||
| 16 | s5p-mixer-y += mixer_drv.o mixer_video.o mixer_reg.o mixer_grp_layer.o mixer_vp_layer.o | ||
| 17 | |||
diff --git a/drivers/media/video/s5p-tv/hdmi_drv.c b/drivers/media/video/s5p-tv/hdmi_drv.c new file mode 100644 index 000000000000..06d6663f4594 --- /dev/null +++ b/drivers/media/video/s5p-tv/hdmi_drv.c | |||
| @@ -0,0 +1,1042 @@ | |||
| 1 | /* | ||
| 2 | * Samsung HDMI interface driver | ||
| 3 | * | ||
| 4 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
| 5 | * | ||
| 6 | * Tomasz Stanislawski, <t.stanislaws@samsung.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License as published | ||
| 10 | * by the Free Software Foundiation. either version 2 of the License, | ||
| 11 | * or (at your option) any later version | ||
| 12 | */ | ||
| 13 | |||
| 14 | #ifdef CONFIG_VIDEO_SAMSUNG_S5P_HDMI_DEBUG | ||
| 15 | #define DEBUG | ||
| 16 | #endif | ||
| 17 | |||
| 18 | #include <linux/kernel.h> | ||
| 19 | #include <linux/slab.h> | ||
| 20 | #include <linux/io.h> | ||
| 21 | #include <linux/i2c.h> | ||
| 22 | #include <linux/platform_device.h> | ||
| 23 | #include <media/v4l2-subdev.h> | ||
| 24 | #include <linux/module.h> | ||
| 25 | #include <linux/interrupt.h> | ||
| 26 | #include <linux/irq.h> | ||
| 27 | #include <linux/delay.h> | ||
| 28 | #include <linux/bug.h> | ||
| 29 | #include <linux/pm_runtime.h> | ||
| 30 | #include <linux/clk.h> | ||
| 31 | #include <linux/regulator/consumer.h> | ||
| 32 | |||
| 33 | #include <media/v4l2-common.h> | ||
| 34 | #include <media/v4l2-dev.h> | ||
| 35 | #include <media/v4l2-device.h> | ||
| 36 | |||
| 37 | #include "regs-hdmi.h" | ||
| 38 | |||
| 39 | MODULE_AUTHOR("Tomasz Stanislawski, <t.stanislaws@samsung.com>"); | ||
| 40 | MODULE_DESCRIPTION("Samsung HDMI"); | ||
| 41 | MODULE_LICENSE("GPL"); | ||
| 42 | |||
| 43 | /* default preset configured on probe */ | ||
| 44 | #define HDMI_DEFAULT_PRESET V4L2_DV_1080P60 | ||
| 45 | |||
| 46 | struct hdmi_resources { | ||
| 47 | struct clk *hdmi; | ||
| 48 | struct clk *sclk_hdmi; | ||
| 49 | struct clk *sclk_pixel; | ||
| 50 | struct clk *sclk_hdmiphy; | ||
| 51 | struct clk *hdmiphy; | ||
| 52 | struct regulator_bulk_data *regul_bulk; | ||
| 53 | int regul_count; | ||
| 54 | }; | ||
| 55 | |||
| 56 | struct hdmi_device { | ||
| 57 | /** base address of HDMI registers */ | ||
| 58 | void __iomem *regs; | ||
| 59 | /** HDMI interrupt */ | ||
| 60 | unsigned int irq; | ||
| 61 | /** pointer to device parent */ | ||
| 62 | struct device *dev; | ||
| 63 | /** subdev generated by HDMI device */ | ||
| 64 | struct v4l2_subdev sd; | ||
| 65 | /** V4L2 device structure */ | ||
| 66 | struct v4l2_device v4l2_dev; | ||
| 67 | /** subdev of HDMIPHY interface */ | ||
| 68 | struct v4l2_subdev *phy_sd; | ||
| 69 | /** configuration of current graphic mode */ | ||
| 70 | const struct hdmi_preset_conf *cur_conf; | ||
| 71 | /** current preset */ | ||
| 72 | u32 cur_preset; | ||
| 73 | /** other resources */ | ||
| 74 | struct hdmi_resources res; | ||
| 75 | }; | ||
| 76 | |||
| 77 | struct hdmi_driver_data { | ||
| 78 | int hdmiphy_bus; | ||
| 79 | }; | ||
| 80 | |||
| 81 | struct hdmi_tg_regs { | ||
| 82 | u8 cmd; | ||
| 83 | u8 h_fsz_l; | ||
| 84 | u8 h_fsz_h; | ||
| 85 | u8 hact_st_l; | ||
| 86 | u8 hact_st_h; | ||
| 87 | u8 hact_sz_l; | ||
| 88 | u8 hact_sz_h; | ||
| 89 | u8 v_fsz_l; | ||
| 90 | u8 v_fsz_h; | ||
| 91 | u8 vsync_l; | ||
| 92 | u8 vsync_h; | ||
| 93 | u8 vsync2_l; | ||
| 94 | u8 vsync2_h; | ||
| 95 | u8 vact_st_l; | ||
| 96 | u8 vact_st_h; | ||
| 97 | u8 vact_sz_l; | ||
| 98 | u8 vact_sz_h; | ||
| 99 | u8 field_chg_l; | ||
| 100 | u8 field_chg_h; | ||
| 101 | u8 vact_st2_l; | ||
| 102 | u8 vact_st2_h; | ||
| 103 | u8 vsync_top_hdmi_l; | ||
| 104 | u8 vsync_top_hdmi_h; | ||
| 105 | u8 vsync_bot_hdmi_l; | ||
| 106 | u8 vsync_bot_hdmi_h; | ||
| 107 | u8 field_top_hdmi_l; | ||
| 108 | u8 field_top_hdmi_h; | ||
| 109 | u8 field_bot_hdmi_l; | ||
| 110 | u8 field_bot_hdmi_h; | ||
| 111 | }; | ||
| 112 | |||
| 113 | struct hdmi_core_regs { | ||
| 114 | u8 h_blank[2]; | ||
| 115 | u8 v_blank[3]; | ||
| 116 | u8 h_v_line[3]; | ||
| 117 | u8 vsync_pol[1]; | ||
| 118 | u8 int_pro_mode[1]; | ||
| 119 | u8 v_blank_f[3]; | ||
| 120 | u8 h_sync_gen[3]; | ||
| 121 | u8 v_sync_gen1[3]; | ||
| 122 | u8 v_sync_gen2[3]; | ||
| 123 | u8 v_sync_gen3[3]; | ||
| 124 | }; | ||
| 125 | |||
| 126 | struct hdmi_preset_conf { | ||
| 127 | struct hdmi_core_regs core; | ||
| 128 | struct hdmi_tg_regs tg; | ||
| 129 | struct v4l2_mbus_framefmt mbus_fmt; | ||
| 130 | }; | ||
| 131 | |||
| 132 | /* I2C module and id for HDMIPHY */ | ||
| 133 | static struct i2c_board_info hdmiphy_info = { | ||
| 134 | I2C_BOARD_INFO("hdmiphy", 0x38), | ||
| 135 | }; | ||
| 136 | |||
| 137 | static struct hdmi_driver_data hdmi_driver_data[] = { | ||
| 138 | { .hdmiphy_bus = 3 }, | ||
| 139 | { .hdmiphy_bus = 8 }, | ||
| 140 | }; | ||
| 141 | |||
| 142 | static struct platform_device_id hdmi_driver_types[] = { | ||
| 143 | { | ||
| 144 | .name = "s5pv210-hdmi", | ||
| 145 | .driver_data = (unsigned long)&hdmi_driver_data[0], | ||
| 146 | }, { | ||
| 147 | .name = "exynos4-hdmi", | ||
| 148 | .driver_data = (unsigned long)&hdmi_driver_data[1], | ||
| 149 | }, { | ||
| 150 | /* end node */ | ||
| 151 | } | ||
| 152 | }; | ||
| 153 | |||
| 154 | static const struct v4l2_subdev_ops hdmi_sd_ops; | ||
| 155 | |||
| 156 | static struct hdmi_device *sd_to_hdmi_dev(struct v4l2_subdev *sd) | ||
| 157 | { | ||
| 158 | return container_of(sd, struct hdmi_device, sd); | ||
| 159 | } | ||
| 160 | |||
| 161 | static inline | ||
| 162 | void hdmi_write(struct hdmi_device *hdev, u32 reg_id, u32 value) | ||
| 163 | { | ||
| 164 | writel(value, hdev->regs + reg_id); | ||
| 165 | } | ||
| 166 | |||
| 167 | static inline | ||
| 168 | void hdmi_write_mask(struct hdmi_device *hdev, u32 reg_id, u32 value, u32 mask) | ||
| 169 | { | ||
| 170 | u32 old = readl(hdev->regs + reg_id); | ||
| 171 | value = (value & mask) | (old & ~mask); | ||
| 172 | writel(value, hdev->regs + reg_id); | ||
| 173 | } | ||
| 174 | |||
| 175 | static inline | ||
| 176 | void hdmi_writeb(struct hdmi_device *hdev, u32 reg_id, u8 value) | ||
| 177 | { | ||
| 178 | writeb(value, hdev->regs + reg_id); | ||
| 179 | } | ||
| 180 | |||
| 181 | static inline u32 hdmi_read(struct hdmi_device *hdev, u32 reg_id) | ||
| 182 | { | ||
| 183 | return readl(hdev->regs + reg_id); | ||
| 184 | } | ||
| 185 | |||
| 186 | static irqreturn_t hdmi_irq_handler(int irq, void *dev_data) | ||
| 187 | { | ||
| 188 | struct hdmi_device *hdev = dev_data; | ||
| 189 | u32 intc_flag; | ||
| 190 | |||
| 191 | (void)irq; | ||
| 192 | intc_flag = hdmi_read(hdev, HDMI_INTC_FLAG); | ||
| 193 | /* clearing flags for HPD plug/unplug */ | ||
| 194 | if (intc_flag & HDMI_INTC_FLAG_HPD_UNPLUG) { | ||
| 195 | printk(KERN_INFO "unplugged\n"); | ||
| 196 | hdmi_write_mask(hdev, HDMI_INTC_FLAG, ~0, | ||
| 197 | HDMI_INTC_FLAG_HPD_UNPLUG); | ||
| 198 | } | ||
| 199 | if (intc_flag & HDMI_INTC_FLAG_HPD_PLUG) { | ||
| 200 | printk(KERN_INFO "plugged\n"); | ||
| 201 | hdmi_write_mask(hdev, HDMI_INTC_FLAG, ~0, | ||
| 202 | HDMI_INTC_FLAG_HPD_PLUG); | ||
| 203 | } | ||
| 204 | |||
| 205 | return IRQ_HANDLED; | ||
| 206 | } | ||
| 207 | |||
| 208 | static void hdmi_reg_init(struct hdmi_device *hdev) | ||
| 209 | { | ||
| 210 | /* enable HPD interrupts */ | ||
| 211 | hdmi_write_mask(hdev, HDMI_INTC_CON, ~0, HDMI_INTC_EN_GLOBAL | | ||
| 212 | HDMI_INTC_EN_HPD_PLUG | HDMI_INTC_EN_HPD_UNPLUG); | ||
| 213 | /* choose HDMI mode */ | ||
| 214 | hdmi_write_mask(hdev, HDMI_MODE_SEL, | ||
| 215 | HDMI_MODE_HDMI_EN, HDMI_MODE_MASK); | ||
| 216 | /* disable bluescreen */ | ||
| 217 | hdmi_write_mask(hdev, HDMI_CON_0, 0, HDMI_BLUE_SCR_EN); | ||
| 218 | /* choose bluescreen (fecal) color */ | ||
| 219 | hdmi_writeb(hdev, HDMI_BLUE_SCREEN_0, 0x12); | ||
| 220 | hdmi_writeb(hdev, HDMI_BLUE_SCREEN_1, 0x34); | ||
| 221 | hdmi_writeb(hdev, HDMI_BLUE_SCREEN_2, 0x56); | ||
| 222 | /* enable AVI packet every vsync, fixes purple line problem */ | ||
| 223 | hdmi_writeb(hdev, HDMI_AVI_CON, 0x02); | ||
| 224 | /* force YUV444, look to CEA-861-D, table 7 for more detail */ | ||
| 225 | hdmi_writeb(hdev, HDMI_AVI_BYTE(0), 2 << 5); | ||
| 226 | hdmi_write_mask(hdev, HDMI_CON_1, 2, 3 << 5); | ||
| 227 | } | ||
| 228 | |||
| 229 | static void hdmi_timing_apply(struct hdmi_device *hdev, | ||
| 230 | const struct hdmi_preset_conf *conf) | ||
| 231 | { | ||
| 232 | const struct hdmi_core_regs *core = &conf->core; | ||
| 233 | const struct hdmi_tg_regs *tg = &conf->tg; | ||
| 234 | |||
| 235 | /* setting core registers */ | ||
| 236 | hdmi_writeb(hdev, HDMI_H_BLANK_0, core->h_blank[0]); | ||
| 237 | hdmi_writeb(hdev, HDMI_H_BLANK_1, core->h_blank[1]); | ||
| 238 | hdmi_writeb(hdev, HDMI_V_BLANK_0, core->v_blank[0]); | ||
| 239 | hdmi_writeb(hdev, HDMI_V_BLANK_1, core->v_blank[1]); | ||
| 240 | hdmi_writeb(hdev, HDMI_V_BLANK_2, core->v_blank[2]); | ||
| 241 | hdmi_writeb(hdev, HDMI_H_V_LINE_0, core->h_v_line[0]); | ||
| 242 | hdmi_writeb(hdev, HDMI_H_V_LINE_1, core->h_v_line[1]); | ||
| 243 | hdmi_writeb(hdev, HDMI_H_V_LINE_2, core->h_v_line[2]); | ||
| 244 | hdmi_writeb(hdev, HDMI_VSYNC_POL, core->vsync_pol[0]); | ||
| 245 | hdmi_writeb(hdev, HDMI_INT_PRO_MODE, core->int_pro_mode[0]); | ||
| 246 | hdmi_writeb(hdev, HDMI_V_BLANK_F_0, core->v_blank_f[0]); | ||
| 247 | hdmi_writeb(hdev, HDMI_V_BLANK_F_1, core->v_blank_f[1]); | ||
| 248 | hdmi_writeb(hdev, HDMI_V_BLANK_F_2, core->v_blank_f[2]); | ||
| 249 | hdmi_writeb(hdev, HDMI_H_SYNC_GEN_0, core->h_sync_gen[0]); | ||
| 250 | hdmi_writeb(hdev, HDMI_H_SYNC_GEN_1, core->h_sync_gen[1]); | ||
| 251 | hdmi_writeb(hdev, HDMI_H_SYNC_GEN_2, core->h_sync_gen[2]); | ||
| 252 | hdmi_writeb(hdev, HDMI_V_SYNC_GEN_1_0, core->v_sync_gen1[0]); | ||
| 253 | hdmi_writeb(hdev, HDMI_V_SYNC_GEN_1_1, core->v_sync_gen1[1]); | ||
| 254 | hdmi_writeb(hdev, HDMI_V_SYNC_GEN_1_2, core->v_sync_gen1[2]); | ||
| 255 | hdmi_writeb(hdev, HDMI_V_SYNC_GEN_2_0, core->v_sync_gen2[0]); | ||
| 256 | hdmi_writeb(hdev, HDMI_V_SYNC_GEN_2_1, core->v_sync_gen2[1]); | ||
| 257 | hdmi_writeb(hdev, HDMI_V_SYNC_GEN_2_2, core->v_sync_gen2[2]); | ||
| 258 | hdmi_writeb(hdev, HDMI_V_SYNC_GEN_3_0, core->v_sync_gen3[0]); | ||
| 259 | hdmi_writeb(hdev, HDMI_V_SYNC_GEN_3_1, core->v_sync_gen3[1]); | ||
| 260 | hdmi_writeb(hdev, HDMI_V_SYNC_GEN_3_2, core->v_sync_gen3[2]); | ||
| 261 | /* Timing generator registers */ | ||
| 262 | hdmi_writeb(hdev, HDMI_TG_H_FSZ_L, tg->h_fsz_l); | ||
| 263 | hdmi_writeb(hdev, HDMI_TG_H_FSZ_H, tg->h_fsz_h); | ||
| 264 | hdmi_writeb(hdev, HDMI_TG_HACT_ST_L, tg->hact_st_l); | ||
| 265 | hdmi_writeb(hdev, HDMI_TG_HACT_ST_H, tg->hact_st_h); | ||
| 266 | hdmi_writeb(hdev, HDMI_TG_HACT_SZ_L, tg->hact_sz_l); | ||
| 267 | hdmi_writeb(hdev, HDMI_TG_HACT_SZ_H, tg->hact_sz_h); | ||
| 268 | hdmi_writeb(hdev, HDMI_TG_V_FSZ_L, tg->v_fsz_l); | ||
| 269 | hdmi_writeb(hdev, HDMI_TG_V_FSZ_H, tg->v_fsz_h); | ||
| 270 | hdmi_writeb(hdev, HDMI_TG_VSYNC_L, tg->vsync_l); | ||
| 271 | hdmi_writeb(hdev, HDMI_TG_VSYNC_H, tg->vsync_h); | ||
| 272 | hdmi_writeb(hdev, HDMI_TG_VSYNC2_L, tg->vsync2_l); | ||
| 273 | hdmi_writeb(hdev, HDMI_TG_VSYNC2_H, tg->vsync2_h); | ||
| 274 | hdmi_writeb(hdev, HDMI_TG_VACT_ST_L, tg->vact_st_l); | ||
| 275 | hdmi_writeb(hdev, HDMI_TG_VACT_ST_H, tg->vact_st_h); | ||
| 276 | hdmi_writeb(hdev, HDMI_TG_VACT_SZ_L, tg->vact_sz_l); | ||
| 277 | hdmi_writeb(hdev, HDMI_TG_VACT_SZ_H, tg->vact_sz_h); | ||
| 278 | hdmi_writeb(hdev, HDMI_TG_FIELD_CHG_L, tg->field_chg_l); | ||
| 279 | hdmi_writeb(hdev, HDMI_TG_FIELD_CHG_H, tg->field_chg_h); | ||
| 280 | hdmi_writeb(hdev, HDMI_TG_VACT_ST2_L, tg->vact_st2_l); | ||
| 281 | hdmi_writeb(hdev, HDMI_TG_VACT_ST2_H, tg->vact_st2_h); | ||
| 282 | hdmi_writeb(hdev, HDMI_TG_VSYNC_TOP_HDMI_L, tg->vsync_top_hdmi_l); | ||
| 283 | hdmi_writeb(hdev, HDMI_TG_VSYNC_TOP_HDMI_H, tg->vsync_top_hdmi_h); | ||
| 284 | hdmi_writeb(hdev, HDMI_TG_VSYNC_BOT_HDMI_L, tg->vsync_bot_hdmi_l); | ||
| 285 | hdmi_writeb(hdev, HDMI_TG_VSYNC_BOT_HDMI_H, tg->vsync_bot_hdmi_h); | ||
| 286 | hdmi_writeb(hdev, HDMI_TG_FIELD_TOP_HDMI_L, tg->field_top_hdmi_l); | ||
| 287 | hdmi_writeb(hdev, HDMI_TG_FIELD_TOP_HDMI_H, tg->field_top_hdmi_h); | ||
| 288 | hdmi_writeb(hdev, HDMI_TG_FIELD_BOT_HDMI_L, tg->field_bot_hdmi_l); | ||
| 289 | hdmi_writeb(hdev, HDMI_TG_FIELD_BOT_HDMI_H, tg->field_bot_hdmi_h); | ||
| 290 | } | ||
| 291 | |||
| 292 | static int hdmi_conf_apply(struct hdmi_device *hdmi_dev) | ||
| 293 | { | ||
| 294 | struct device *dev = hdmi_dev->dev; | ||
| 295 | const struct hdmi_preset_conf *conf = hdmi_dev->cur_conf; | ||
| 296 | struct v4l2_dv_preset preset; | ||
| 297 | int ret; | ||
| 298 | |||
| 299 | dev_dbg(dev, "%s\n", __func__); | ||
| 300 | |||
| 301 | /* reset hdmiphy */ | ||
| 302 | hdmi_write_mask(hdmi_dev, HDMI_PHY_RSTOUT, ~0, HDMI_PHY_SW_RSTOUT); | ||
| 303 | mdelay(10); | ||
| 304 | hdmi_write_mask(hdmi_dev, HDMI_PHY_RSTOUT, 0, HDMI_PHY_SW_RSTOUT); | ||
| 305 | mdelay(10); | ||
| 306 | |||
| 307 | /* configure presets */ | ||
| 308 | preset.preset = hdmi_dev->cur_preset; | ||
| 309 | ret = v4l2_subdev_call(hdmi_dev->phy_sd, video, s_dv_preset, &preset); | ||
| 310 | if (ret) { | ||
| 311 | dev_err(dev, "failed to set preset (%u)\n", preset.preset); | ||
| 312 | return ret; | ||
| 313 | } | ||
| 314 | |||
| 315 | /* resetting HDMI core */ | ||
| 316 | hdmi_write_mask(hdmi_dev, HDMI_CORE_RSTOUT, 0, HDMI_CORE_SW_RSTOUT); | ||
| 317 | mdelay(10); | ||
| 318 | hdmi_write_mask(hdmi_dev, HDMI_CORE_RSTOUT, ~0, HDMI_CORE_SW_RSTOUT); | ||
| 319 | mdelay(10); | ||
| 320 | |||
| 321 | hdmi_reg_init(hdmi_dev); | ||
| 322 | |||
| 323 | /* setting core registers */ | ||
| 324 | hdmi_timing_apply(hdmi_dev, conf); | ||
| 325 | |||
| 326 | return 0; | ||
| 327 | } | ||
| 328 | |||
| 329 | static void hdmi_dumpregs(struct hdmi_device *hdev, char *prefix) | ||
| 330 | { | ||
| 331 | #define DUMPREG(reg_id) \ | ||
| 332 | dev_dbg(hdev->dev, "%s:" #reg_id " = %08x\n", prefix, \ | ||
| 333 | readl(hdev->regs + reg_id)) | ||
| 334 | |||
| 335 | dev_dbg(hdev->dev, "%s: ---- CONTROL REGISTERS ----\n", prefix); | ||
| 336 | DUMPREG(HDMI_INTC_FLAG); | ||
| 337 | DUMPREG(HDMI_INTC_CON); | ||
| 338 | DUMPREG(HDMI_HPD_STATUS); | ||
| 339 | DUMPREG(HDMI_PHY_RSTOUT); | ||
| 340 | DUMPREG(HDMI_PHY_VPLL); | ||
| 341 | DUMPREG(HDMI_PHY_CMU); | ||
| 342 | DUMPREG(HDMI_CORE_RSTOUT); | ||
| 343 | |||
| 344 | dev_dbg(hdev->dev, "%s: ---- CORE REGISTERS ----\n", prefix); | ||
| 345 | DUMPREG(HDMI_CON_0); | ||
| 346 | DUMPREG(HDMI_CON_1); | ||
| 347 | DUMPREG(HDMI_CON_2); | ||
| 348 | DUMPREG(HDMI_SYS_STATUS); | ||
| 349 | DUMPREG(HDMI_PHY_STATUS); | ||
| 350 | DUMPREG(HDMI_STATUS_EN); | ||
| 351 | DUMPREG(HDMI_HPD); | ||
| 352 | DUMPREG(HDMI_MODE_SEL); | ||
| 353 | DUMPREG(HDMI_HPD_GEN); | ||
| 354 | DUMPREG(HDMI_DC_CONTROL); | ||
| 355 | DUMPREG(HDMI_VIDEO_PATTERN_GEN); | ||
| 356 | |||
| 357 | dev_dbg(hdev->dev, "%s: ---- CORE SYNC REGISTERS ----\n", prefix); | ||
| 358 | DUMPREG(HDMI_H_BLANK_0); | ||
| 359 | DUMPREG(HDMI_H_BLANK_1); | ||
| 360 | DUMPREG(HDMI_V_BLANK_0); | ||
| 361 | DUMPREG(HDMI_V_BLANK_1); | ||
| 362 | DUMPREG(HDMI_V_BLANK_2); | ||
| 363 | DUMPREG(HDMI_H_V_LINE_0); | ||
| 364 | DUMPREG(HDMI_H_V_LINE_1); | ||
| 365 | DUMPREG(HDMI_H_V_LINE_2); | ||
| 366 | DUMPREG(HDMI_VSYNC_POL); | ||
| 367 | DUMPREG(HDMI_INT_PRO_MODE); | ||
| 368 | DUMPREG(HDMI_V_BLANK_F_0); | ||
| 369 | DUMPREG(HDMI_V_BLANK_F_1); | ||
| 370 | DUMPREG(HDMI_V_BLANK_F_2); | ||
| 371 | DUMPREG(HDMI_H_SYNC_GEN_0); | ||
| 372 | DUMPREG(HDMI_H_SYNC_GEN_1); | ||
| 373 | DUMPREG(HDMI_H_SYNC_GEN_2); | ||
| 374 | DUMPREG(HDMI_V_SYNC_GEN_1_0); | ||
| 375 | DUMPREG(HDMI_V_SYNC_GEN_1_1); | ||
| 376 | DUMPREG(HDMI_V_SYNC_GEN_1_2); | ||
| 377 | DUMPREG(HDMI_V_SYNC_GEN_2_0); | ||
| 378 | DUMPREG(HDMI_V_SYNC_GEN_2_1); | ||
| 379 | DUMPREG(HDMI_V_SYNC_GEN_2_2); | ||
| 380 | DUMPREG(HDMI_V_SYNC_GEN_3_0); | ||
| 381 | DUMPREG(HDMI_V_SYNC_GEN_3_1); | ||
| 382 | DUMPREG(HDMI_V_SYNC_GEN_3_2); | ||
| 383 | |||
| 384 | dev_dbg(hdev->dev, "%s: ---- TG REGISTERS ----\n", prefix); | ||
| 385 | DUMPREG(HDMI_TG_CMD); | ||
| 386 | DUMPREG(HDMI_TG_H_FSZ_L); | ||
| 387 | DUMPREG(HDMI_TG_H_FSZ_H); | ||
| 388 | DUMPREG(HDMI_TG_HACT_ST_L); | ||
| 389 | DUMPREG(HDMI_TG_HACT_ST_H); | ||
| 390 | DUMPREG(HDMI_TG_HACT_SZ_L); | ||
| 391 | DUMPREG(HDMI_TG_HACT_SZ_H); | ||
| 392 | DUMPREG(HDMI_TG_V_FSZ_L); | ||
| 393 | DUMPREG(HDMI_TG_V_FSZ_H); | ||
| 394 | DUMPREG(HDMI_TG_VSYNC_L); | ||
| 395 | DUMPREG(HDMI_TG_VSYNC_H); | ||
| 396 | DUMPREG(HDMI_TG_VSYNC2_L); | ||
| 397 | DUMPREG(HDMI_TG_VSYNC2_H); | ||
| 398 | DUMPREG(HDMI_TG_VACT_ST_L); | ||
| 399 | DUMPREG(HDMI_TG_VACT_ST_H); | ||
| 400 | DUMPREG(HDMI_TG_VACT_SZ_L); | ||
| 401 | DUMPREG(HDMI_TG_VACT_SZ_H); | ||
| 402 | DUMPREG(HDMI_TG_FIELD_CHG_L); | ||
| 403 | DUMPREG(HDMI_TG_FIELD_CHG_H); | ||
| 404 | DUMPREG(HDMI_TG_VACT_ST2_L); | ||
| 405 | DUMPREG(HDMI_TG_VACT_ST2_H); | ||
| 406 | DUMPREG(HDMI_TG_VSYNC_TOP_HDMI_L); | ||
| 407 | DUMPREG(HDMI_TG_VSYNC_TOP_HDMI_H); | ||
| 408 | DUMPREG(HDMI_TG_VSYNC_BOT_HDMI_L); | ||
| 409 | DUMPREG(HDMI_TG_VSYNC_BOT_HDMI_H); | ||
| 410 | DUMPREG(HDMI_TG_FIELD_TOP_HDMI_L); | ||
| 411 | DUMPREG(HDMI_TG_FIELD_TOP_HDMI_H); | ||
| 412 | DUMPREG(HDMI_TG_FIELD_BOT_HDMI_L); | ||
| 413 | DUMPREG(HDMI_TG_FIELD_BOT_HDMI_H); | ||
| 414 | #undef DUMPREG | ||
| 415 | } | ||
| 416 | |||
| 417 | static const struct hdmi_preset_conf hdmi_conf_480p = { | ||
| 418 | .core = { | ||
| 419 | .h_blank = {0x8a, 0x00}, | ||
| 420 | .v_blank = {0x0d, 0x6a, 0x01}, | ||
| 421 | .h_v_line = {0x0d, 0xa2, 0x35}, | ||
| 422 | .vsync_pol = {0x01}, | ||
| 423 | .int_pro_mode = {0x00}, | ||
| 424 | .v_blank_f = {0x00, 0x00, 0x00}, | ||
| 425 | .h_sync_gen = {0x0e, 0x30, 0x11}, | ||
| 426 | .v_sync_gen1 = {0x0f, 0x90, 0x00}, | ||
| 427 | /* other don't care */ | ||
| 428 | }, | ||
| 429 | .tg = { | ||
| 430 | 0x00, /* cmd */ | ||
| 431 | 0x5a, 0x03, /* h_fsz */ | ||
| 432 | 0x8a, 0x00, 0xd0, 0x02, /* hact */ | ||
| 433 | 0x0d, 0x02, /* v_fsz */ | ||
| 434 | 0x01, 0x00, 0x33, 0x02, /* vsync */ | ||
| 435 | 0x2d, 0x00, 0xe0, 0x01, /* vact */ | ||
| 436 | 0x33, 0x02, /* field_chg */ | ||
| 437 | 0x49, 0x02, /* vact_st2 */ | ||
| 438 | 0x01, 0x00, 0x33, 0x02, /* vsync top/bot */ | ||
| 439 | 0x01, 0x00, 0x33, 0x02, /* field top/bot */ | ||
| 440 | }, | ||
| 441 | .mbus_fmt = { | ||
| 442 | .width = 720, | ||
| 443 | .height = 480, | ||
| 444 | .code = V4L2_MBUS_FMT_FIXED, /* means RGB888 */ | ||
| 445 | .field = V4L2_FIELD_NONE, | ||
| 446 | }, | ||
| 447 | }; | ||
| 448 | |||
| 449 | static const struct hdmi_preset_conf hdmi_conf_720p60 = { | ||
| 450 | .core = { | ||
| 451 | .h_blank = {0x72, 0x01}, | ||
| 452 | .v_blank = {0xee, 0xf2, 0x00}, | ||
| 453 | .h_v_line = {0xee, 0x22, 0x67}, | ||
| 454 | .vsync_pol = {0x00}, | ||
| 455 | .int_pro_mode = {0x00}, | ||
| 456 | .v_blank_f = {0x00, 0x00, 0x00}, /* don't care */ | ||
| 457 | .h_sync_gen = {0x6c, 0x50, 0x02}, | ||
| 458 | .v_sync_gen1 = {0x0a, 0x50, 0x00}, | ||
| 459 | /* other don't care */ | ||
| 460 | }, | ||
| 461 | .tg = { | ||
| 462 | 0x00, /* cmd */ | ||
| 463 | 0x72, 0x06, /* h_fsz */ | ||
| 464 | 0x72, 0x01, 0x00, 0x05, /* hact */ | ||
| 465 | 0xee, 0x02, /* v_fsz */ | ||
| 466 | 0x01, 0x00, 0x33, 0x02, /* vsync */ | ||
| 467 | 0x1e, 0x00, 0xd0, 0x02, /* vact */ | ||
| 468 | 0x33, 0x02, /* field_chg */ | ||
| 469 | 0x49, 0x02, /* vact_st2 */ | ||
| 470 | 0x01, 0x00, 0x33, 0x02, /* vsync top/bot */ | ||
| 471 | 0x01, 0x00, 0x33, 0x02, /* field top/bot */ | ||
| 472 | }, | ||
| 473 | .mbus_fmt = { | ||
| 474 | .width = 1280, | ||
| 475 | .height = 720, | ||
| 476 | .code = V4L2_MBUS_FMT_FIXED, /* means RGB888 */ | ||
| 477 | .field = V4L2_FIELD_NONE, | ||
| 478 | }, | ||
| 479 | }; | ||
| 480 | |||
| 481 | static const struct hdmi_preset_conf hdmi_conf_1080p50 = { | ||
| 482 | .core = { | ||
| 483 | .h_blank = {0xd0, 0x02}, | ||
| 484 | .v_blank = {0x65, 0x6c, 0x01}, | ||
| 485 | .h_v_line = {0x65, 0x04, 0xa5}, | ||
| 486 | .vsync_pol = {0x00}, | ||
| 487 | .int_pro_mode = {0x00}, | ||
| 488 | .v_blank_f = {0x00, 0x00, 0x00}, /* don't care */ | ||
| 489 | .h_sync_gen = {0x0e, 0xea, 0x08}, | ||
| 490 | .v_sync_gen1 = {0x09, 0x40, 0x00}, | ||
| 491 | /* other don't care */ | ||
| 492 | }, | ||
| 493 | .tg = { | ||
| 494 | 0x00, /* cmd */ | ||
| 495 | 0x98, 0x08, /* h_fsz */ | ||
| 496 | 0x18, 0x01, 0x80, 0x07, /* hact */ | ||
| 497 | 0x65, 0x04, /* v_fsz */ | ||
| 498 | 0x01, 0x00, 0x33, 0x02, /* vsync */ | ||
| 499 | 0x2d, 0x00, 0x38, 0x04, /* vact */ | ||
| 500 | 0x33, 0x02, /* field_chg */ | ||
| 501 | 0x49, 0x02, /* vact_st2 */ | ||
| 502 | 0x01, 0x00, 0x33, 0x02, /* vsync top/bot */ | ||
| 503 | 0x01, 0x00, 0x33, 0x02, /* field top/bot */ | ||
| 504 | }, | ||
| 505 | .mbus_fmt = { | ||
| 506 | .width = 1920, | ||
| 507 | .height = 1080, | ||
| 508 | .code = V4L2_MBUS_FMT_FIXED, /* means RGB888 */ | ||
| 509 | .field = V4L2_FIELD_NONE, | ||
| 510 | }, | ||
| 511 | }; | ||
| 512 | |||
| 513 | static const struct hdmi_preset_conf hdmi_conf_1080p60 = { | ||
| 514 | .core = { | ||
| 515 | .h_blank = {0x18, 0x01}, | ||
| 516 | .v_blank = {0x65, 0x6c, 0x01}, | ||
| 517 | .h_v_line = {0x65, 0x84, 0x89}, | ||
| 518 | .vsync_pol = {0x00}, | ||
| 519 | .int_pro_mode = {0x00}, | ||
| 520 | .v_blank_f = {0x00, 0x00, 0x00}, /* don't care */ | ||
| 521 | .h_sync_gen = {0x56, 0x08, 0x02}, | ||
| 522 | .v_sync_gen1 = {0x09, 0x40, 0x00}, | ||
| 523 | /* other don't care */ | ||
| 524 | }, | ||
| 525 | .tg = { | ||
| 526 | 0x00, /* cmd */ | ||
| 527 | 0x98, 0x08, /* h_fsz */ | ||
| 528 | 0x18, 0x01, 0x80, 0x07, /* hact */ | ||
| 529 | 0x65, 0x04, /* v_fsz */ | ||
| 530 | 0x01, 0x00, 0x33, 0x02, /* vsync */ | ||
| 531 | 0x2d, 0x00, 0x38, 0x04, /* vact */ | ||
| 532 | 0x33, 0x02, /* field_chg */ | ||
| 533 | 0x48, 0x02, /* vact_st2 */ | ||
| 534 | 0x01, 0x00, 0x01, 0x00, /* vsync top/bot */ | ||
| 535 | 0x01, 0x00, 0x33, 0x02, /* field top/bot */ | ||
| 536 | }, | ||
| 537 | .mbus_fmt = { | ||
| 538 | .width = 1920, | ||
| 539 | .height = 1080, | ||
| 540 | .code = V4L2_MBUS_FMT_FIXED, /* means RGB888 */ | ||
| 541 | .field = V4L2_FIELD_NONE, | ||
| 542 | }, | ||
| 543 | }; | ||
| 544 | |||
| 545 | static const struct { | ||
| 546 | u32 preset; | ||
| 547 | const struct hdmi_preset_conf *conf; | ||
| 548 | } hdmi_conf[] = { | ||
| 549 | { V4L2_DV_480P59_94, &hdmi_conf_480p }, | ||
| 550 | { V4L2_DV_720P59_94, &hdmi_conf_720p60 }, | ||
| 551 | { V4L2_DV_1080P50, &hdmi_conf_1080p50 }, | ||
| 552 | { V4L2_DV_1080P30, &hdmi_conf_1080p60 }, | ||
| 553 | { V4L2_DV_1080P60, &hdmi_conf_1080p60 }, | ||
| 554 | }; | ||
| 555 | |||
| 556 | static const struct hdmi_preset_conf *hdmi_preset2conf(u32 preset) | ||
| 557 | { | ||
| 558 | int i; | ||
| 559 | |||
| 560 | for (i = 0; i < ARRAY_SIZE(hdmi_conf); ++i) | ||
| 561 | if (hdmi_conf[i].preset == preset) | ||
| 562 | return hdmi_conf[i].conf; | ||
| 563 | return NULL; | ||
| 564 | } | ||
| 565 | |||
| 566 | static int hdmi_streamon(struct hdmi_device *hdev) | ||
| 567 | { | ||
| 568 | struct device *dev = hdev->dev; | ||
| 569 | struct hdmi_resources *res = &hdev->res; | ||
| 570 | int ret, tries; | ||
| 571 | |||
| 572 | dev_dbg(dev, "%s\n", __func__); | ||
| 573 | |||
| 574 | ret = v4l2_subdev_call(hdev->phy_sd, video, s_stream, 1); | ||
| 575 | if (ret) | ||
| 576 | return ret; | ||
| 577 | |||
| 578 | /* waiting for HDMIPHY's PLL to get to steady state */ | ||
| 579 | for (tries = 100; tries; --tries) { | ||
| 580 | u32 val = hdmi_read(hdev, HDMI_PHY_STATUS); | ||
| 581 | if (val & HDMI_PHY_STATUS_READY) | ||
| 582 | break; | ||
| 583 | mdelay(1); | ||
| 584 | } | ||
| 585 | /* steady state not achieved */ | ||
| 586 | if (tries == 0) { | ||
| 587 | dev_err(dev, "hdmiphy's pll could not reach steady state.\n"); | ||
| 588 | v4l2_subdev_call(hdev->phy_sd, video, s_stream, 0); | ||
| 589 | hdmi_dumpregs(hdev, "s_stream"); | ||
| 590 | return -EIO; | ||
| 591 | } | ||
| 592 | |||
| 593 | /* hdmiphy clock is used for HDMI in streaming mode */ | ||
| 594 | clk_disable(res->sclk_hdmi); | ||
| 595 | clk_set_parent(res->sclk_hdmi, res->sclk_hdmiphy); | ||
| 596 | clk_enable(res->sclk_hdmi); | ||
| 597 | |||
| 598 | /* enable HDMI and timing generator */ | ||
| 599 | hdmi_write_mask(hdev, HDMI_CON_0, ~0, HDMI_EN); | ||
| 600 | hdmi_write_mask(hdev, HDMI_TG_CMD, ~0, HDMI_TG_EN); | ||
| 601 | hdmi_dumpregs(hdev, "streamon"); | ||
| 602 | return 0; | ||
| 603 | } | ||
| 604 | |||
| 605 | static int hdmi_streamoff(struct hdmi_device *hdev) | ||
| 606 | { | ||
| 607 | struct device *dev = hdev->dev; | ||
| 608 | struct hdmi_resources *res = &hdev->res; | ||
| 609 | |||
| 610 | dev_dbg(dev, "%s\n", __func__); | ||
| 611 | |||
| 612 | hdmi_write_mask(hdev, HDMI_CON_0, 0, HDMI_EN); | ||
| 613 | hdmi_write_mask(hdev, HDMI_TG_CMD, 0, HDMI_TG_EN); | ||
| 614 | |||
| 615 | /* pixel(vpll) clock is used for HDMI in config mode */ | ||
| 616 | clk_disable(res->sclk_hdmi); | ||
| 617 | clk_set_parent(res->sclk_hdmi, res->sclk_pixel); | ||
| 618 | clk_enable(res->sclk_hdmi); | ||
| 619 | |||
| 620 | v4l2_subdev_call(hdev->phy_sd, video, s_stream, 0); | ||
| 621 | |||
| 622 | hdmi_dumpregs(hdev, "streamoff"); | ||
| 623 | return 0; | ||
| 624 | } | ||
| 625 | |||
| 626 | static int hdmi_s_stream(struct v4l2_subdev *sd, int enable) | ||
| 627 | { | ||
| 628 | struct hdmi_device *hdev = sd_to_hdmi_dev(sd); | ||
| 629 | struct device *dev = hdev->dev; | ||
| 630 | |||
| 631 | dev_dbg(dev, "%s(%d)\n", __func__, enable); | ||
| 632 | if (enable) | ||
| 633 | return hdmi_streamon(hdev); | ||
| 634 | return hdmi_streamoff(hdev); | ||
| 635 | } | ||
| 636 | |||
| 637 | static void hdmi_resource_poweron(struct hdmi_resources *res) | ||
| 638 | { | ||
| 639 | /* turn HDMI power on */ | ||
| 640 | regulator_bulk_enable(res->regul_count, res->regul_bulk); | ||
| 641 | /* power-on hdmi physical interface */ | ||
| 642 | clk_enable(res->hdmiphy); | ||
| 643 | /* use VPP as parent clock; HDMIPHY is not working yet */ | ||
| 644 | clk_set_parent(res->sclk_hdmi, res->sclk_pixel); | ||
| 645 | /* turn clocks on */ | ||
| 646 | clk_enable(res->sclk_hdmi); | ||
| 647 | } | ||
| 648 | |||
| 649 | static void hdmi_resource_poweroff(struct hdmi_resources *res) | ||
| 650 | { | ||
| 651 | /* turn clocks off */ | ||
| 652 | clk_disable(res->sclk_hdmi); | ||
| 653 | /* power-off hdmiphy */ | ||
| 654 | clk_disable(res->hdmiphy); | ||
| 655 | /* turn HDMI power off */ | ||
| 656 | regulator_bulk_disable(res->regul_count, res->regul_bulk); | ||
| 657 | } | ||
| 658 | |||
| 659 | static int hdmi_s_power(struct v4l2_subdev *sd, int on) | ||
| 660 | { | ||
| 661 | struct hdmi_device *hdev = sd_to_hdmi_dev(sd); | ||
| 662 | int ret; | ||
| 663 | |||
| 664 | if (on) | ||
| 665 | ret = pm_runtime_get_sync(hdev->dev); | ||
| 666 | else | ||
| 667 | ret = pm_runtime_put_sync(hdev->dev); | ||
| 668 | /* only values < 0 indicate errors */ | ||
| 669 | return IS_ERR_VALUE(ret) ? ret : 0; | ||
| 670 | } | ||
| 671 | |||
| 672 | static int hdmi_s_dv_preset(struct v4l2_subdev *sd, | ||
| 673 | struct v4l2_dv_preset *preset) | ||
| 674 | { | ||
| 675 | struct hdmi_device *hdev = sd_to_hdmi_dev(sd); | ||
| 676 | struct device *dev = hdev->dev; | ||
| 677 | const struct hdmi_preset_conf *conf; | ||
| 678 | |||
| 679 | conf = hdmi_preset2conf(preset->preset); | ||
| 680 | if (conf == NULL) { | ||
| 681 | dev_err(dev, "preset (%u) not supported\n", preset->preset); | ||
| 682 | return -EINVAL; | ||
| 683 | } | ||
| 684 | hdev->cur_conf = conf; | ||
| 685 | hdev->cur_preset = preset->preset; | ||
| 686 | return 0; | ||
| 687 | } | ||
| 688 | |||
| 689 | static int hdmi_g_dv_preset(struct v4l2_subdev *sd, | ||
| 690 | struct v4l2_dv_preset *preset) | ||
| 691 | { | ||
| 692 | memset(preset, 0, sizeof(*preset)); | ||
| 693 | preset->preset = sd_to_hdmi_dev(sd)->cur_preset; | ||
| 694 | return 0; | ||
| 695 | } | ||
| 696 | |||
| 697 | static int hdmi_g_mbus_fmt(struct v4l2_subdev *sd, | ||
| 698 | struct v4l2_mbus_framefmt *fmt) | ||
| 699 | { | ||
| 700 | struct hdmi_device *hdev = sd_to_hdmi_dev(sd); | ||
| 701 | struct device *dev = hdev->dev; | ||
| 702 | |||
| 703 | dev_dbg(dev, "%s\n", __func__); | ||
| 704 | if (!hdev->cur_conf) | ||
| 705 | return -EINVAL; | ||
| 706 | *fmt = hdev->cur_conf->mbus_fmt; | ||
| 707 | return 0; | ||
| 708 | } | ||
| 709 | |||
| 710 | static int hdmi_enum_dv_presets(struct v4l2_subdev *sd, | ||
| 711 | struct v4l2_dv_enum_preset *preset) | ||
| 712 | { | ||
| 713 | if (preset->index >= ARRAY_SIZE(hdmi_conf)) | ||
| 714 | return -EINVAL; | ||
| 715 | return v4l_fill_dv_preset_info(hdmi_conf[preset->index].preset, preset); | ||
| 716 | } | ||
| 717 | |||
| 718 | static const struct v4l2_subdev_core_ops hdmi_sd_core_ops = { | ||
| 719 | .s_power = hdmi_s_power, | ||
| 720 | }; | ||
| 721 | |||
| 722 | static const struct v4l2_subdev_video_ops hdmi_sd_video_ops = { | ||
| 723 | .s_dv_preset = hdmi_s_dv_preset, | ||
| 724 | .g_dv_preset = hdmi_g_dv_preset, | ||
| 725 | .enum_dv_presets = hdmi_enum_dv_presets, | ||
| 726 | .g_mbus_fmt = hdmi_g_mbus_fmt, | ||
| 727 | .s_stream = hdmi_s_stream, | ||
| 728 | }; | ||
| 729 | |||
| 730 | static const struct v4l2_subdev_ops hdmi_sd_ops = { | ||
| 731 | .core = &hdmi_sd_core_ops, | ||
| 732 | .video = &hdmi_sd_video_ops, | ||
| 733 | }; | ||
| 734 | |||
| 735 | static int hdmi_runtime_suspend(struct device *dev) | ||
| 736 | { | ||
| 737 | struct v4l2_subdev *sd = dev_get_drvdata(dev); | ||
| 738 | struct hdmi_device *hdev = sd_to_hdmi_dev(sd); | ||
| 739 | |||
| 740 | dev_dbg(dev, "%s\n", __func__); | ||
| 741 | hdmi_resource_poweroff(&hdev->res); | ||
| 742 | return 0; | ||
| 743 | } | ||
| 744 | |||
| 745 | static int hdmi_runtime_resume(struct device *dev) | ||
| 746 | { | ||
| 747 | struct v4l2_subdev *sd = dev_get_drvdata(dev); | ||
| 748 | struct hdmi_device *hdev = sd_to_hdmi_dev(sd); | ||
| 749 | int ret = 0; | ||
| 750 | |||
| 751 | dev_dbg(dev, "%s\n", __func__); | ||
| 752 | |||
| 753 | hdmi_resource_poweron(&hdev->res); | ||
| 754 | |||
| 755 | ret = hdmi_conf_apply(hdev); | ||
| 756 | if (ret) | ||
| 757 | goto fail; | ||
| 758 | |||
| 759 | dev_dbg(dev, "poweron succeed\n"); | ||
| 760 | |||
| 761 | return 0; | ||
| 762 | |||
| 763 | fail: | ||
| 764 | hdmi_resource_poweroff(&hdev->res); | ||
| 765 | dev_err(dev, "poweron failed\n"); | ||
| 766 | |||
| 767 | return ret; | ||
| 768 | } | ||
| 769 | |||
| 770 | static const struct dev_pm_ops hdmi_pm_ops = { | ||
| 771 | .runtime_suspend = hdmi_runtime_suspend, | ||
| 772 | .runtime_resume = hdmi_runtime_resume, | ||
| 773 | }; | ||
| 774 | |||
| 775 | static void hdmi_resources_cleanup(struct hdmi_device *hdev) | ||
| 776 | { | ||
| 777 | struct hdmi_resources *res = &hdev->res; | ||
| 778 | |||
| 779 | dev_dbg(hdev->dev, "HDMI resource cleanup\n"); | ||
| 780 | /* put clocks, power */ | ||
| 781 | if (res->regul_count) | ||
| 782 | regulator_bulk_free(res->regul_count, res->regul_bulk); | ||
| 783 | /* kfree is NULL-safe */ | ||
| 784 | kfree(res->regul_bulk); | ||
| 785 | if (!IS_ERR_OR_NULL(res->hdmiphy)) | ||
| 786 | clk_put(res->hdmiphy); | ||
| 787 | if (!IS_ERR_OR_NULL(res->sclk_hdmiphy)) | ||
| 788 | clk_put(res->sclk_hdmiphy); | ||
| 789 | if (!IS_ERR_OR_NULL(res->sclk_pixel)) | ||
| 790 | clk_put(res->sclk_pixel); | ||
| 791 | if (!IS_ERR_OR_NULL(res->sclk_hdmi)) | ||
| 792 | clk_put(res->sclk_hdmi); | ||
| 793 | if (!IS_ERR_OR_NULL(res->hdmi)) | ||
| 794 | clk_put(res->hdmi); | ||
| 795 | memset(res, 0, sizeof *res); | ||
| 796 | } | ||
| 797 | |||
| 798 | static int hdmi_resources_init(struct hdmi_device *hdev) | ||
| 799 | { | ||
| 800 | struct device *dev = hdev->dev; | ||
| 801 | struct hdmi_resources *res = &hdev->res; | ||
| 802 | static char *supply[] = { | ||
| 803 | "hdmi-en", | ||
| 804 | "vdd", | ||
| 805 | "vdd_osc", | ||
| 806 | "vdd_pll", | ||
| 807 | }; | ||
| 808 | int i, ret; | ||
| 809 | |||
| 810 | dev_dbg(dev, "HDMI resource init\n"); | ||
| 811 | |||
| 812 | memset(res, 0, sizeof *res); | ||
| 813 | /* get clocks, power */ | ||
| 814 | |||
| 815 | res->hdmi = clk_get(dev, "hdmi"); | ||
| 816 | if (IS_ERR_OR_NULL(res->hdmi)) { | ||
| 817 | dev_err(dev, "failed to get clock 'hdmi'\n"); | ||
| 818 | goto fail; | ||
| 819 | } | ||
| 820 | res->sclk_hdmi = clk_get(dev, "sclk_hdmi"); | ||
| 821 | if (IS_ERR_OR_NULL(res->sclk_hdmi)) { | ||
| 822 | dev_err(dev, "failed to get clock 'sclk_hdmi'\n"); | ||
| 823 | goto fail; | ||
| 824 | } | ||
| 825 | res->sclk_pixel = clk_get(dev, "sclk_pixel"); | ||
| 826 | if (IS_ERR_OR_NULL(res->sclk_pixel)) { | ||
| 827 | dev_err(dev, "failed to get clock 'sclk_pixel'\n"); | ||
| 828 | goto fail; | ||
| 829 | } | ||
| 830 | res->sclk_hdmiphy = clk_get(dev, "sclk_hdmiphy"); | ||
| 831 | if (IS_ERR_OR_NULL(res->sclk_hdmiphy)) { | ||
| 832 | dev_err(dev, "failed to get clock 'sclk_hdmiphy'\n"); | ||
| 833 | goto fail; | ||
| 834 | } | ||
| 835 | res->hdmiphy = clk_get(dev, "hdmiphy"); | ||
| 836 | if (IS_ERR_OR_NULL(res->hdmiphy)) { | ||
| 837 | dev_err(dev, "failed to get clock 'hdmiphy'\n"); | ||
| 838 | goto fail; | ||
| 839 | } | ||
| 840 | res->regul_bulk = kzalloc(ARRAY_SIZE(supply) * | ||
| 841 | sizeof res->regul_bulk[0], GFP_KERNEL); | ||
| 842 | if (!res->regul_bulk) { | ||
| 843 | dev_err(dev, "failed to get memory for regulators\n"); | ||
| 844 | goto fail; | ||
| 845 | } | ||
| 846 | for (i = 0; i < ARRAY_SIZE(supply); ++i) { | ||
| 847 | res->regul_bulk[i].supply = supply[i]; | ||
| 848 | res->regul_bulk[i].consumer = NULL; | ||
| 849 | } | ||
| 850 | |||
| 851 | ret = regulator_bulk_get(dev, ARRAY_SIZE(supply), res->regul_bulk); | ||
| 852 | if (ret) { | ||
| 853 | dev_err(dev, "failed to get regulators\n"); | ||
| 854 | goto fail; | ||
| 855 | } | ||
| 856 | res->regul_count = ARRAY_SIZE(supply); | ||
| 857 | |||
| 858 | return 0; | ||
| 859 | fail: | ||
| 860 | dev_err(dev, "HDMI resource init - failed\n"); | ||
| 861 | hdmi_resources_cleanup(hdev); | ||
| 862 | return -ENODEV; | ||
| 863 | } | ||
| 864 | |||
| 865 | static int __devinit hdmi_probe(struct platform_device *pdev) | ||
| 866 | { | ||
| 867 | struct device *dev = &pdev->dev; | ||
| 868 | struct resource *res; | ||
| 869 | struct i2c_adapter *phy_adapter; | ||
| 870 | struct v4l2_subdev *sd; | ||
| 871 | struct hdmi_device *hdmi_dev = NULL; | ||
| 872 | struct hdmi_driver_data *drv_data; | ||
| 873 | int ret; | ||
| 874 | |||
| 875 | dev_dbg(dev, "probe start\n"); | ||
| 876 | |||
| 877 | hdmi_dev = kzalloc(sizeof(*hdmi_dev), GFP_KERNEL); | ||
| 878 | if (!hdmi_dev) { | ||
| 879 | dev_err(dev, "out of memory\n"); | ||
| 880 | ret = -ENOMEM; | ||
| 881 | goto fail; | ||
| 882 | } | ||
| 883 | |||
| 884 | hdmi_dev->dev = dev; | ||
| 885 | |||
| 886 | ret = hdmi_resources_init(hdmi_dev); | ||
| 887 | if (ret) | ||
| 888 | goto fail_hdev; | ||
| 889 | |||
| 890 | /* mapping HDMI registers */ | ||
| 891 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
| 892 | if (res == NULL) { | ||
| 893 | dev_err(dev, "get memory resource failed.\n"); | ||
| 894 | ret = -ENXIO; | ||
| 895 | goto fail_init; | ||
| 896 | } | ||
| 897 | |||
| 898 | hdmi_dev->regs = ioremap(res->start, resource_size(res)); | ||
| 899 | if (hdmi_dev->regs == NULL) { | ||
| 900 | dev_err(dev, "register mapping failed.\n"); | ||
| 901 | ret = -ENXIO; | ||
| 902 | goto fail_hdev; | ||
| 903 | } | ||
| 904 | |||
| 905 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | ||
| 906 | if (res == NULL) { | ||
| 907 | dev_err(dev, "get interrupt resource failed.\n"); | ||
| 908 | ret = -ENXIO; | ||
| 909 | goto fail_regs; | ||
| 910 | } | ||
| 911 | |||
| 912 | ret = request_irq(res->start, hdmi_irq_handler, 0, "hdmi", hdmi_dev); | ||
| 913 | if (ret) { | ||
| 914 | dev_err(dev, "request interrupt failed.\n"); | ||
| 915 | goto fail_regs; | ||
| 916 | } | ||
| 917 | hdmi_dev->irq = res->start; | ||
| 918 | |||
| 919 | /* setting v4l2 name to prevent WARN_ON in v4l2_device_register */ | ||
| 920 | strlcpy(hdmi_dev->v4l2_dev.name, dev_name(dev), | ||
| 921 | sizeof(hdmi_dev->v4l2_dev.name)); | ||
| 922 | /* passing NULL owner prevents driver from erasing drvdata */ | ||
| 923 | ret = v4l2_device_register(NULL, &hdmi_dev->v4l2_dev); | ||
| 924 | if (ret) { | ||
| 925 | dev_err(dev, "could not register v4l2 device.\n"); | ||
| 926 | goto fail_irq; | ||
| 927 | } | ||
| 928 | |||
| 929 | drv_data = (struct hdmi_driver_data *) | ||
| 930 | platform_get_device_id(pdev)->driver_data; | ||
| 931 | phy_adapter = i2c_get_adapter(drv_data->hdmiphy_bus); | ||
| 932 | if (phy_adapter == NULL) { | ||
| 933 | dev_err(dev, "adapter request failed\n"); | ||
| 934 | ret = -ENXIO; | ||
| 935 | goto fail_vdev; | ||
| 936 | } | ||
| 937 | |||
| 938 | hdmi_dev->phy_sd = v4l2_i2c_new_subdev_board(&hdmi_dev->v4l2_dev, | ||
| 939 | phy_adapter, &hdmiphy_info, NULL); | ||
| 940 | /* on failure or not adapter is no longer useful */ | ||
| 941 | i2c_put_adapter(phy_adapter); | ||
| 942 | if (hdmi_dev->phy_sd == NULL) { | ||
| 943 | dev_err(dev, "missing subdev for hdmiphy\n"); | ||
| 944 | ret = -ENODEV; | ||
| 945 | goto fail_vdev; | ||
| 946 | } | ||
| 947 | |||
| 948 | clk_enable(hdmi_dev->res.hdmi); | ||
| 949 | |||
| 950 | pm_runtime_enable(dev); | ||
| 951 | |||
| 952 | sd = &hdmi_dev->sd; | ||
| 953 | v4l2_subdev_init(sd, &hdmi_sd_ops); | ||
| 954 | sd->owner = THIS_MODULE; | ||
| 955 | |||
| 956 | strlcpy(sd->name, "s5p-hdmi", sizeof sd->name); | ||
| 957 | hdmi_dev->cur_preset = HDMI_DEFAULT_PRESET; | ||
| 958 | /* FIXME: missing fail preset is not supported */ | ||
| 959 | hdmi_dev->cur_conf = hdmi_preset2conf(hdmi_dev->cur_preset); | ||
| 960 | |||
| 961 | /* storing subdev for call that have only access to struct device */ | ||
| 962 | dev_set_drvdata(dev, sd); | ||
| 963 | |||
| 964 | dev_info(dev, "probe sucessful\n"); | ||
| 965 | |||
| 966 | return 0; | ||
| 967 | |||
| 968 | fail_vdev: | ||
| 969 | v4l2_device_unregister(&hdmi_dev->v4l2_dev); | ||
| 970 | |||
| 971 | fail_irq: | ||
| 972 | free_irq(hdmi_dev->irq, hdmi_dev); | ||
| 973 | |||
| 974 | fail_regs: | ||
| 975 | iounmap(hdmi_dev->regs); | ||
| 976 | |||
| 977 | fail_init: | ||
| 978 | hdmi_resources_cleanup(hdmi_dev); | ||
| 979 | |||
| 980 | fail_hdev: | ||
| 981 | kfree(hdmi_dev); | ||
| 982 | |||
| 983 | fail: | ||
| 984 | dev_err(dev, "probe failed\n"); | ||
| 985 | return ret; | ||
| 986 | } | ||
| 987 | |||
| 988 | static int __devexit hdmi_remove(struct platform_device *pdev) | ||
| 989 | { | ||
| 990 | struct device *dev = &pdev->dev; | ||
| 991 | struct v4l2_subdev *sd = dev_get_drvdata(dev); | ||
| 992 | struct hdmi_device *hdmi_dev = sd_to_hdmi_dev(sd); | ||
| 993 | |||
| 994 | pm_runtime_disable(dev); | ||
| 995 | clk_disable(hdmi_dev->res.hdmi); | ||
| 996 | v4l2_device_unregister(&hdmi_dev->v4l2_dev); | ||
| 997 | disable_irq(hdmi_dev->irq); | ||
| 998 | free_irq(hdmi_dev->irq, hdmi_dev); | ||
| 999 | iounmap(hdmi_dev->regs); | ||
| 1000 | hdmi_resources_cleanup(hdmi_dev); | ||
| 1001 | kfree(hdmi_dev); | ||
| 1002 | dev_info(dev, "remove sucessful\n"); | ||
| 1003 | |||
| 1004 | return 0; | ||
| 1005 | } | ||
| 1006 | |||
| 1007 | static struct platform_driver hdmi_driver __refdata = { | ||
| 1008 | .probe = hdmi_probe, | ||
| 1009 | .remove = __devexit_p(hdmi_remove), | ||
| 1010 | .id_table = hdmi_driver_types, | ||
| 1011 | .driver = { | ||
| 1012 | .name = "s5p-hdmi", | ||
| 1013 | .owner = THIS_MODULE, | ||
| 1014 | .pm = &hdmi_pm_ops, | ||
| 1015 | } | ||
| 1016 | }; | ||
| 1017 | |||
| 1018 | /* D R I V E R I N I T I A L I Z A T I O N */ | ||
| 1019 | |||
| 1020 | static int __init hdmi_init(void) | ||
| 1021 | { | ||
| 1022 | int ret; | ||
| 1023 | static const char banner[] __initdata = KERN_INFO \ | ||
| 1024 | "Samsung HDMI output driver, " | ||
| 1025 | "(c) 2010-2011 Samsung Electronics Co., Ltd.\n"; | ||
| 1026 | printk(banner); | ||
| 1027 | |||
| 1028 | ret = platform_driver_register(&hdmi_driver); | ||
| 1029 | if (ret) | ||
| 1030 | printk(KERN_ERR "HDMI platform driver register failed\n"); | ||
| 1031 | |||
| 1032 | return ret; | ||
| 1033 | } | ||
| 1034 | module_init(hdmi_init); | ||
| 1035 | |||
| 1036 | static void __exit hdmi_exit(void) | ||
| 1037 | { | ||
| 1038 | platform_driver_unregister(&hdmi_driver); | ||
| 1039 | } | ||
| 1040 | module_exit(hdmi_exit); | ||
| 1041 | |||
| 1042 | |||
diff --git a/drivers/media/video/s5p-tv/hdmiphy_drv.c b/drivers/media/video/s5p-tv/hdmiphy_drv.c new file mode 100644 index 000000000000..6693f4aff108 --- /dev/null +++ b/drivers/media/video/s5p-tv/hdmiphy_drv.c | |||
| @@ -0,0 +1,188 @@ | |||
| 1 | /* | ||
| 2 | * Samsung HDMI Physical interface driver | ||
| 3 | * | ||
| 4 | * Copyright (C) 2010-2011 Samsung Electronics Co.Ltd | ||
| 5 | * Author: Tomasz Stanislawski <t.stanislaws@samsung.com> | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify it | ||
| 8 | * under the terms of the GNU General Public License as published by the | ||
| 9 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 10 | * option) any later version. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #include <linux/module.h> | ||
| 14 | #include <linux/i2c.h> | ||
| 15 | #include <linux/slab.h> | ||
| 16 | #include <linux/clk.h> | ||
| 17 | #include <linux/io.h> | ||
| 18 | #include <linux/interrupt.h> | ||
| 19 | #include <linux/irq.h> | ||
| 20 | #include <linux/err.h> | ||
| 21 | |||
| 22 | #include <media/v4l2-subdev.h> | ||
| 23 | |||
| 24 | MODULE_AUTHOR("Tomasz Stanislawski <t.stanislaws@samsung.com>"); | ||
| 25 | MODULE_DESCRIPTION("Samsung HDMI Physical interface driver"); | ||
| 26 | MODULE_LICENSE("GPL"); | ||
| 27 | |||
| 28 | struct hdmiphy_conf { | ||
| 29 | u32 preset; | ||
| 30 | const u8 *data; | ||
| 31 | }; | ||
| 32 | |||
| 33 | static const u8 hdmiphy_conf27[32] = { | ||
| 34 | 0x01, 0x05, 0x00, 0xD8, 0x10, 0x1C, 0x30, 0x40, | ||
| 35 | 0x6B, 0x10, 0x02, 0x51, 0xDf, 0xF2, 0x54, 0x87, | ||
| 36 | 0x84, 0x00, 0x30, 0x38, 0x00, 0x08, 0x10, 0xE0, | ||
| 37 | 0x22, 0x40, 0xe3, 0x26, 0x00, 0x00, 0x00, 0x00, | ||
| 38 | }; | ||
| 39 | |||
| 40 | static const u8 hdmiphy_conf74_175[32] = { | ||
| 41 | 0x01, 0x05, 0x00, 0xD8, 0x10, 0x9C, 0xef, 0x5B, | ||
| 42 | 0x6D, 0x10, 0x01, 0x51, 0xef, 0xF3, 0x54, 0xb9, | ||
| 43 | 0x84, 0x00, 0x30, 0x38, 0x00, 0x08, 0x10, 0xE0, | ||
| 44 | 0x22, 0x40, 0xa5, 0x26, 0x01, 0x00, 0x00, 0x00, | ||
| 45 | }; | ||
| 46 | |||
| 47 | static const u8 hdmiphy_conf74_25[32] = { | ||
| 48 | 0x01, 0x05, 0x00, 0xd8, 0x10, 0x9c, 0xf8, 0x40, | ||
| 49 | 0x6a, 0x10, 0x01, 0x51, 0xff, 0xf1, 0x54, 0xba, | ||
| 50 | 0x84, 0x00, 0x30, 0x38, 0x00, 0x08, 0x10, 0xe0, | ||
| 51 | 0x22, 0x40, 0xa4, 0x26, 0x01, 0x00, 0x00, 0x00, | ||
| 52 | }; | ||
| 53 | |||
| 54 | static const u8 hdmiphy_conf148_5[32] = { | ||
| 55 | 0x01, 0x05, 0x00, 0xD8, 0x10, 0x9C, 0xf8, 0x40, | ||
| 56 | 0x6A, 0x18, 0x00, 0x51, 0xff, 0xF1, 0x54, 0xba, | ||
| 57 | 0x84, 0x00, 0x10, 0x38, 0x00, 0x08, 0x10, 0xE0, | ||
| 58 | 0x22, 0x40, 0xa4, 0x26, 0x02, 0x00, 0x00, 0x00, | ||
| 59 | }; | ||
| 60 | |||
| 61 | static const struct hdmiphy_conf hdmiphy_conf[] = { | ||
| 62 | { V4L2_DV_480P59_94, hdmiphy_conf27 }, | ||
| 63 | { V4L2_DV_1080P30, hdmiphy_conf74_175 }, | ||
| 64 | { V4L2_DV_720P59_94, hdmiphy_conf74_175 }, | ||
| 65 | { V4L2_DV_720P60, hdmiphy_conf74_25 }, | ||
| 66 | { V4L2_DV_1080P50, hdmiphy_conf148_5 }, | ||
| 67 | { V4L2_DV_1080P60, hdmiphy_conf148_5 }, | ||
| 68 | }; | ||
| 69 | |||
| 70 | const u8 *hdmiphy_preset2conf(u32 preset) | ||
| 71 | { | ||
| 72 | int i; | ||
| 73 | for (i = 0; i < ARRAY_SIZE(hdmiphy_conf); ++i) | ||
| 74 | if (hdmiphy_conf[i].preset == preset) | ||
| 75 | return hdmiphy_conf[i].data; | ||
| 76 | return NULL; | ||
| 77 | } | ||
| 78 | |||
| 79 | static int hdmiphy_s_power(struct v4l2_subdev *sd, int on) | ||
| 80 | { | ||
| 81 | /* to be implemented */ | ||
| 82 | return 0; | ||
| 83 | } | ||
| 84 | |||
| 85 | static int hdmiphy_s_dv_preset(struct v4l2_subdev *sd, | ||
| 86 | struct v4l2_dv_preset *preset) | ||
| 87 | { | ||
| 88 | const u8 *data; | ||
| 89 | u8 buffer[32]; | ||
| 90 | int ret; | ||
| 91 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 92 | struct device *dev = &client->dev; | ||
| 93 | |||
| 94 | dev_info(dev, "s_dv_preset(preset = %d)\n", preset->preset); | ||
| 95 | data = hdmiphy_preset2conf(preset->preset); | ||
| 96 | if (!data) { | ||
| 97 | dev_err(dev, "format not supported\n"); | ||
| 98 | return -EINVAL; | ||
| 99 | } | ||
| 100 | |||
| 101 | /* storing configuration to the device */ | ||
| 102 | memcpy(buffer, data, 32); | ||
| 103 | ret = i2c_master_send(client, buffer, 32); | ||
| 104 | if (ret != 32) { | ||
| 105 | dev_err(dev, "failed to configure HDMIPHY via I2C\n"); | ||
| 106 | return -EIO; | ||
| 107 | } | ||
| 108 | |||
| 109 | return 0; | ||
| 110 | } | ||
| 111 | |||
| 112 | static int hdmiphy_s_stream(struct v4l2_subdev *sd, int enable) | ||
| 113 | { | ||
| 114 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
| 115 | struct device *dev = &client->dev; | ||
| 116 | u8 buffer[2]; | ||
| 117 | int ret; | ||
| 118 | |||
| 119 | dev_info(dev, "s_stream(%d)\n", enable); | ||
| 120 | /* going to/from configuration from/to operation mode */ | ||
| 121 | buffer[0] = 0x1f; | ||
| 122 | buffer[1] = enable ? 0x80 : 0x00; | ||
| 123 | |||
| 124 | ret = i2c_master_send(client, buffer, 2); | ||
| 125 | if (ret != 2) { | ||
| 126 | dev_err(dev, "stream (%d) failed\n", enable); | ||
| 127 | return -EIO; | ||
| 128 | } | ||
| 129 | return 0; | ||
| 130 | } | ||
| 131 | |||
| 132 | static const struct v4l2_subdev_core_ops hdmiphy_core_ops = { | ||
| 133 | .s_power = hdmiphy_s_power, | ||
| 134 | }; | ||
| 135 | |||
| 136 | static const struct v4l2_subdev_video_ops hdmiphy_video_ops = { | ||
| 137 | .s_dv_preset = hdmiphy_s_dv_preset, | ||
| 138 | .s_stream = hdmiphy_s_stream, | ||
| 139 | }; | ||
| 140 | |||
| 141 | static const struct v4l2_subdev_ops hdmiphy_ops = { | ||
| 142 | .core = &hdmiphy_core_ops, | ||
| 143 | .video = &hdmiphy_video_ops, | ||
| 144 | }; | ||
| 145 | |||
| 146 | static int __devinit hdmiphy_probe(struct i2c_client *client, | ||
| 147 | const struct i2c_device_id *id) | ||
| 148 | { | ||
| 149 | static struct v4l2_subdev sd; | ||
| 150 | |||
| 151 | v4l2_i2c_subdev_init(&sd, client, &hdmiphy_ops); | ||
| 152 | dev_info(&client->dev, "probe successful\n"); | ||
| 153 | return 0; | ||
| 154 | } | ||
| 155 | |||
| 156 | static int __devexit hdmiphy_remove(struct i2c_client *client) | ||
| 157 | { | ||
| 158 | dev_info(&client->dev, "remove successful\n"); | ||
| 159 | return 0; | ||
| 160 | } | ||
| 161 | |||
| 162 | static const struct i2c_device_id hdmiphy_id[] = { | ||
| 163 | { "hdmiphy", 0 }, | ||
| 164 | { }, | ||
| 165 | }; | ||
| 166 | MODULE_DEVICE_TABLE(i2c, hdmiphy_id); | ||
| 167 | |||
| 168 | static struct i2c_driver hdmiphy_driver = { | ||
| 169 | .driver = { | ||
| 170 | .name = "s5p-hdmiphy", | ||
| 171 | .owner = THIS_MODULE, | ||
| 172 | }, | ||
| 173 | .probe = hdmiphy_probe, | ||
| 174 | .remove = __devexit_p(hdmiphy_remove), | ||
| 175 | .id_table = hdmiphy_id, | ||
| 176 | }; | ||
| 177 | |||
| 178 | static int __init hdmiphy_init(void) | ||
| 179 | { | ||
| 180 | return i2c_add_driver(&hdmiphy_driver); | ||
| 181 | } | ||
| 182 | module_init(hdmiphy_init); | ||
| 183 | |||
| 184 | static void __exit hdmiphy_exit(void) | ||
| 185 | { | ||
| 186 | i2c_del_driver(&hdmiphy_driver); | ||
| 187 | } | ||
| 188 | module_exit(hdmiphy_exit); | ||
diff --git a/drivers/media/video/s5p-tv/mixer.h b/drivers/media/video/s5p-tv/mixer.h new file mode 100644 index 000000000000..e2242243f63d --- /dev/null +++ b/drivers/media/video/s5p-tv/mixer.h | |||
| @@ -0,0 +1,354 @@ | |||
| 1 | /* | ||
| 2 | * Samsung TV Mixer driver | ||
| 3 | * | ||
| 4 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
| 5 | * | ||
| 6 | * Tomasz Stanislawski, <t.stanislaws@samsung.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License as published | ||
| 10 | * by the Free Software Foundiation. either version 2 of the License, | ||
| 11 | * or (at your option) any later version | ||
| 12 | */ | ||
| 13 | |||
| 14 | #ifndef SAMSUNG_MIXER_H | ||
| 15 | #define SAMSUNG_MIXER_H | ||
| 16 | |||
| 17 | #ifdef CONFIG_VIDEO_SAMSUNG_S5P_MIXER_DEBUG | ||
| 18 | #define DEBUG | ||
| 19 | #endif | ||
| 20 | |||
| 21 | #include <linux/fb.h> | ||
| 22 | #include <linux/kernel.h> | ||
| 23 | #include <linux/spinlock.h> | ||
| 24 | #include <linux/wait.h> | ||
| 25 | #include <media/v4l2-device.h> | ||
| 26 | #include <media/videobuf2-core.h> | ||
| 27 | |||
| 28 | #include "regs-mixer.h" | ||
| 29 | |||
| 30 | /** maximum number of output interfaces */ | ||
| 31 | #define MXR_MAX_OUTPUTS 2 | ||
| 32 | /** maximum number of input interfaces (layers) */ | ||
| 33 | #define MXR_MAX_LAYERS 3 | ||
| 34 | #define MXR_DRIVER_NAME "s5p-mixer" | ||
| 35 | /** maximal number of planes for every layer */ | ||
| 36 | #define MXR_MAX_PLANES 2 | ||
| 37 | |||
| 38 | #define MXR_ENABLE 1 | ||
| 39 | #define MXR_DISABLE 0 | ||
| 40 | |||
| 41 | /** description of a macroblock for packed formats */ | ||
| 42 | struct mxr_block { | ||
| 43 | /** vertical number of pixels in macroblock */ | ||
| 44 | unsigned int width; | ||
| 45 | /** horizontal number of pixels in macroblock */ | ||
| 46 | unsigned int height; | ||
| 47 | /** size of block in bytes */ | ||
| 48 | unsigned int size; | ||
| 49 | }; | ||
| 50 | |||
| 51 | /** description of supported format */ | ||
| 52 | struct mxr_format { | ||
| 53 | /** format name/mnemonic */ | ||
| 54 | const char *name; | ||
| 55 | /** fourcc identifier */ | ||
| 56 | u32 fourcc; | ||
| 57 | /** colorspace identifier */ | ||
| 58 | enum v4l2_colorspace colorspace; | ||
| 59 | /** number of planes in image data */ | ||
| 60 | int num_planes; | ||
| 61 | /** description of block for each plane */ | ||
| 62 | struct mxr_block plane[MXR_MAX_PLANES]; | ||
| 63 | /** number of subframes in image data */ | ||
| 64 | int num_subframes; | ||
| 65 | /** specifies to which subframe belong given plane */ | ||
| 66 | int plane2subframe[MXR_MAX_PLANES]; | ||
| 67 | /** internal code, driver dependant */ | ||
| 68 | unsigned long cookie; | ||
| 69 | }; | ||
| 70 | |||
| 71 | /** description of crop configuration for image */ | ||
| 72 | struct mxr_crop { | ||
| 73 | /** width of layer in pixels */ | ||
| 74 | unsigned int full_width; | ||
| 75 | /** height of layer in pixels */ | ||
| 76 | unsigned int full_height; | ||
| 77 | /** horizontal offset of first pixel to be displayed */ | ||
| 78 | unsigned int x_offset; | ||
| 79 | /** vertical offset of first pixel to be displayed */ | ||
| 80 | unsigned int y_offset; | ||
| 81 | /** width of displayed data in pixels */ | ||
| 82 | unsigned int width; | ||
| 83 | /** height of displayed data in pixels */ | ||
| 84 | unsigned int height; | ||
| 85 | /** indicate which fields are present in buffer */ | ||
| 86 | unsigned int field; | ||
| 87 | }; | ||
| 88 | |||
| 89 | /** description of transformation from source to destination image */ | ||
| 90 | struct mxr_geometry { | ||
| 91 | /** cropping for source image */ | ||
| 92 | struct mxr_crop src; | ||
| 93 | /** cropping for destination image */ | ||
| 94 | struct mxr_crop dst; | ||
| 95 | /** layer-dependant description of horizontal scaling */ | ||
| 96 | unsigned int x_ratio; | ||
| 97 | /** layer-dependant description of vertical scaling */ | ||
| 98 | unsigned int y_ratio; | ||
| 99 | }; | ||
| 100 | |||
| 101 | /** instance of a buffer */ | ||
| 102 | struct mxr_buffer { | ||
| 103 | /** common v4l buffer stuff -- must be first */ | ||
| 104 | struct vb2_buffer vb; | ||
| 105 | /** node for layer's lists */ | ||
| 106 | struct list_head list; | ||
| 107 | }; | ||
| 108 | |||
| 109 | |||
| 110 | /** internal states of layer */ | ||
| 111 | enum mxr_layer_state { | ||
| 112 | /** layers is not shown */ | ||
| 113 | MXR_LAYER_IDLE = 0, | ||
| 114 | /** state between STREAMON and hardware start */ | ||
| 115 | MXR_LAYER_STREAMING_START, | ||
| 116 | /** layer is shown */ | ||
| 117 | MXR_LAYER_STREAMING, | ||
| 118 | /** state before STREAMOFF is finished */ | ||
| 119 | MXR_LAYER_STREAMING_FINISH, | ||
| 120 | }; | ||
| 121 | |||
| 122 | /** forward declarations */ | ||
| 123 | struct mxr_device; | ||
| 124 | struct mxr_layer; | ||
| 125 | |||
| 126 | /** callback for layers operation */ | ||
| 127 | struct mxr_layer_ops { | ||
| 128 | /* TODO: try to port it to subdev API */ | ||
| 129 | /** handler for resource release function */ | ||
| 130 | void (*release)(struct mxr_layer *); | ||
| 131 | /** setting buffer to HW */ | ||
| 132 | void (*buffer_set)(struct mxr_layer *, struct mxr_buffer *); | ||
| 133 | /** setting format and geometry in HW */ | ||
| 134 | void (*format_set)(struct mxr_layer *); | ||
| 135 | /** streaming stop/start */ | ||
| 136 | void (*stream_set)(struct mxr_layer *, int); | ||
| 137 | /** adjusting geometry */ | ||
| 138 | void (*fix_geometry)(struct mxr_layer *); | ||
| 139 | }; | ||
| 140 | |||
| 141 | /** layer instance, a single window and content displayed on output */ | ||
| 142 | struct mxr_layer { | ||
| 143 | /** parent mixer device */ | ||
| 144 | struct mxr_device *mdev; | ||
| 145 | /** layer index (unique identifier) */ | ||
| 146 | int idx; | ||
| 147 | /** callbacks for layer methods */ | ||
| 148 | struct mxr_layer_ops ops; | ||
| 149 | /** format array */ | ||
| 150 | const struct mxr_format **fmt_array; | ||
| 151 | /** size of format array */ | ||
| 152 | unsigned long fmt_array_size; | ||
| 153 | |||
| 154 | /** lock for protection of list and state fields */ | ||
| 155 | spinlock_t enq_slock; | ||
| 156 | /** list for enqueued buffers */ | ||
| 157 | struct list_head enq_list; | ||
| 158 | /** buffer currently owned by hardware in temporary registers */ | ||
| 159 | struct mxr_buffer *update_buf; | ||
| 160 | /** buffer currently owned by hardware in shadow registers */ | ||
| 161 | struct mxr_buffer *shadow_buf; | ||
| 162 | /** state of layer IDLE/STREAMING */ | ||
| 163 | enum mxr_layer_state state; | ||
| 164 | |||
| 165 | /** mutex for protection of fields below */ | ||
| 166 | struct mutex mutex; | ||
| 167 | /** handler for video node */ | ||
| 168 | struct video_device vfd; | ||
| 169 | /** queue for output buffers */ | ||
| 170 | struct vb2_queue vb_queue; | ||
| 171 | /** current image format */ | ||
| 172 | const struct mxr_format *fmt; | ||
| 173 | /** current geometry of image */ | ||
| 174 | struct mxr_geometry geo; | ||
| 175 | }; | ||
| 176 | |||
| 177 | /** description of mixers output interface */ | ||
| 178 | struct mxr_output { | ||
| 179 | /** name of output */ | ||
| 180 | char name[32]; | ||
| 181 | /** output subdev */ | ||
| 182 | struct v4l2_subdev *sd; | ||
| 183 | /** cookie used for configuration of registers */ | ||
| 184 | int cookie; | ||
| 185 | }; | ||
| 186 | |||
| 187 | /** specify source of output subdevs */ | ||
| 188 | struct mxr_output_conf { | ||
| 189 | /** name of output (connector) */ | ||
| 190 | char *output_name; | ||
| 191 | /** name of module that generates output subdev */ | ||
| 192 | char *module_name; | ||
| 193 | /** cookie need for mixer HW */ | ||
| 194 | int cookie; | ||
| 195 | }; | ||
| 196 | |||
| 197 | struct clk; | ||
| 198 | struct regulator; | ||
| 199 | |||
| 200 | /** auxiliary resources used my mixer */ | ||
| 201 | struct mxr_resources { | ||
| 202 | /** interrupt index */ | ||
| 203 | int irq; | ||
| 204 | /** pointer to Mixer registers */ | ||
| 205 | void __iomem *mxr_regs; | ||
| 206 | /** pointer to Video Processor registers */ | ||
| 207 | void __iomem *vp_regs; | ||
| 208 | /** other resources, should used under mxr_device.mutex */ | ||
| 209 | struct clk *mixer; | ||
| 210 | struct clk *vp; | ||
| 211 | struct clk *sclk_mixer; | ||
| 212 | struct clk *sclk_hdmi; | ||
| 213 | struct clk *sclk_dac; | ||
| 214 | }; | ||
| 215 | |||
| 216 | /* event flags used */ | ||
| 217 | enum mxr_devide_flags { | ||
| 218 | MXR_EVENT_VSYNC = 0, | ||
| 219 | }; | ||
| 220 | |||
| 221 | /** drivers instance */ | ||
| 222 | struct mxr_device { | ||
| 223 | /** master device */ | ||
| 224 | struct device *dev; | ||
| 225 | /** state of each layer */ | ||
| 226 | struct mxr_layer *layer[MXR_MAX_LAYERS]; | ||
| 227 | /** state of each output */ | ||
| 228 | struct mxr_output *output[MXR_MAX_OUTPUTS]; | ||
| 229 | /** number of registered outputs */ | ||
| 230 | int output_cnt; | ||
| 231 | |||
| 232 | /* video resources */ | ||
| 233 | |||
| 234 | /** V4L2 device */ | ||
| 235 | struct v4l2_device v4l2_dev; | ||
| 236 | /** context of allocator */ | ||
| 237 | void *alloc_ctx; | ||
| 238 | /** event wait queue */ | ||
| 239 | wait_queue_head_t event_queue; | ||
| 240 | /** state flags */ | ||
| 241 | unsigned long event_flags; | ||
| 242 | |||
| 243 | /** spinlock for protection of registers */ | ||
| 244 | spinlock_t reg_slock; | ||
| 245 | |||
| 246 | /** mutex for protection of fields below */ | ||
| 247 | struct mutex mutex; | ||
| 248 | /** number of entities depndant on output configuration */ | ||
| 249 | int n_output; | ||
| 250 | /** number of users that do streaming */ | ||
| 251 | int n_streamer; | ||
| 252 | /** index of current output */ | ||
| 253 | int current_output; | ||
| 254 | /** auxiliary resources used my mixer */ | ||
| 255 | struct mxr_resources res; | ||
| 256 | }; | ||
| 257 | |||
| 258 | /** transform device structure into mixer device */ | ||
| 259 | static inline struct mxr_device *to_mdev(struct device *dev) | ||
| 260 | { | ||
| 261 | struct v4l2_device *vdev = dev_get_drvdata(dev); | ||
| 262 | return container_of(vdev, struct mxr_device, v4l2_dev); | ||
| 263 | } | ||
| 264 | |||
| 265 | /** get current output data, should be called under mdev's mutex */ | ||
| 266 | static inline struct mxr_output *to_output(struct mxr_device *mdev) | ||
| 267 | { | ||
| 268 | return mdev->output[mdev->current_output]; | ||
| 269 | } | ||
| 270 | |||
| 271 | /** get current output subdev, should be called under mdev's mutex */ | ||
| 272 | static inline struct v4l2_subdev *to_outsd(struct mxr_device *mdev) | ||
| 273 | { | ||
| 274 | struct mxr_output *out = to_output(mdev); | ||
| 275 | return out ? out->sd : NULL; | ||
| 276 | } | ||
| 277 | |||
| 278 | /** forward declaration for mixer platform data */ | ||
| 279 | struct mxr_platform_data; | ||
| 280 | |||
| 281 | /** acquiring common video resources */ | ||
| 282 | int __devinit mxr_acquire_video(struct mxr_device *mdev, | ||
| 283 | struct mxr_output_conf *output_cont, int output_count); | ||
| 284 | |||
| 285 | /** releasing common video resources */ | ||
| 286 | void __devexit mxr_release_video(struct mxr_device *mdev); | ||
| 287 | |||
| 288 | struct mxr_layer *mxr_graph_layer_create(struct mxr_device *mdev, int idx); | ||
| 289 | struct mxr_layer *mxr_vp_layer_create(struct mxr_device *mdev, int idx); | ||
| 290 | struct mxr_layer *mxr_base_layer_create(struct mxr_device *mdev, | ||
| 291 | int idx, char *name, struct mxr_layer_ops *ops); | ||
| 292 | |||
| 293 | void mxr_base_layer_release(struct mxr_layer *layer); | ||
| 294 | void mxr_layer_release(struct mxr_layer *layer); | ||
| 295 | |||
| 296 | int mxr_base_layer_register(struct mxr_layer *layer); | ||
| 297 | void mxr_base_layer_unregister(struct mxr_layer *layer); | ||
| 298 | |||
| 299 | unsigned long mxr_get_plane_size(const struct mxr_block *blk, | ||
| 300 | unsigned int width, unsigned int height); | ||
| 301 | |||
| 302 | /** adds new consumer for mixer's power */ | ||
| 303 | int __must_check mxr_power_get(struct mxr_device *mdev); | ||
| 304 | /** removes consumer for mixer's power */ | ||
| 305 | void mxr_power_put(struct mxr_device *mdev); | ||
| 306 | /** add new client for output configuration */ | ||
| 307 | void mxr_output_get(struct mxr_device *mdev); | ||
| 308 | /** removes new client for output configuration */ | ||
| 309 | void mxr_output_put(struct mxr_device *mdev); | ||
| 310 | /** add new client for streaming */ | ||
| 311 | void mxr_streamer_get(struct mxr_device *mdev); | ||
| 312 | /** removes new client for streaming */ | ||
| 313 | void mxr_streamer_put(struct mxr_device *mdev); | ||
| 314 | /** returns format of data delivared to current output */ | ||
| 315 | void mxr_get_mbus_fmt(struct mxr_device *mdev, | ||
| 316 | struct v4l2_mbus_framefmt *mbus_fmt); | ||
| 317 | |||
| 318 | /* Debug */ | ||
| 319 | |||
| 320 | #define mxr_err(mdev, fmt, ...) dev_err(mdev->dev, fmt, ##__VA_ARGS__) | ||
| 321 | #define mxr_warn(mdev, fmt, ...) dev_warn(mdev->dev, fmt, ##__VA_ARGS__) | ||
| 322 | #define mxr_info(mdev, fmt, ...) dev_info(mdev->dev, fmt, ##__VA_ARGS__) | ||
| 323 | |||
| 324 | #ifdef CONFIG_VIDEO_SAMSUNG_S5P_MIXER_DEBUG | ||
| 325 | #define mxr_dbg(mdev, fmt, ...) dev_dbg(mdev->dev, fmt, ##__VA_ARGS__) | ||
| 326 | #else | ||
| 327 | #define mxr_dbg(mdev, fmt, ...) do { (void) mdev; } while (0) | ||
| 328 | #endif | ||
| 329 | |||
| 330 | /* accessing Mixer's and Video Processor's registers */ | ||
| 331 | |||
| 332 | void mxr_vsync_set_update(struct mxr_device *mdev, int en); | ||
| 333 | void mxr_reg_reset(struct mxr_device *mdev); | ||
| 334 | irqreturn_t mxr_irq_handler(int irq, void *dev_data); | ||
| 335 | void mxr_reg_s_output(struct mxr_device *mdev, int cookie); | ||
| 336 | void mxr_reg_streamon(struct mxr_device *mdev); | ||
| 337 | void mxr_reg_streamoff(struct mxr_device *mdev); | ||
| 338 | int mxr_reg_wait4vsync(struct mxr_device *mdev); | ||
| 339 | void mxr_reg_set_mbus_fmt(struct mxr_device *mdev, | ||
| 340 | struct v4l2_mbus_framefmt *fmt); | ||
| 341 | void mxr_reg_graph_layer_stream(struct mxr_device *mdev, int idx, int en); | ||
| 342 | void mxr_reg_graph_buffer(struct mxr_device *mdev, int idx, dma_addr_t addr); | ||
| 343 | void mxr_reg_graph_format(struct mxr_device *mdev, int idx, | ||
| 344 | const struct mxr_format *fmt, const struct mxr_geometry *geo); | ||
| 345 | |||
| 346 | void mxr_reg_vp_layer_stream(struct mxr_device *mdev, int en); | ||
| 347 | void mxr_reg_vp_buffer(struct mxr_device *mdev, | ||
| 348 | dma_addr_t luma_addr[2], dma_addr_t chroma_addr[2]); | ||
| 349 | void mxr_reg_vp_format(struct mxr_device *mdev, | ||
| 350 | const struct mxr_format *fmt, const struct mxr_geometry *geo); | ||
| 351 | void mxr_reg_dump(struct mxr_device *mdev); | ||
| 352 | |||
| 353 | #endif /* SAMSUNG_MIXER_H */ | ||
| 354 | |||
diff --git a/drivers/media/video/s5p-tv/mixer_drv.c b/drivers/media/video/s5p-tv/mixer_drv.c new file mode 100644 index 000000000000..00643094b221 --- /dev/null +++ b/drivers/media/video/s5p-tv/mixer_drv.c | |||
| @@ -0,0 +1,487 @@ | |||
| 1 | /* | ||
| 2 | * Samsung TV Mixer driver | ||
| 3 | * | ||
| 4 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
| 5 | * | ||
| 6 | * Tomasz Stanislawski, <t.stanislaws@samsung.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License as published | ||
| 10 | * by the Free Software Foundiation. either version 2 of the License, | ||
| 11 | * or (at your option) any later version | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include "mixer.h" | ||
| 15 | |||
| 16 | #include <linux/module.h> | ||
| 17 | #include <linux/platform_device.h> | ||
| 18 | #include <linux/io.h> | ||
| 19 | #include <linux/interrupt.h> | ||
| 20 | #include <linux/irq.h> | ||
| 21 | #include <linux/fb.h> | ||
| 22 | #include <linux/delay.h> | ||
| 23 | #include <linux/pm_runtime.h> | ||
| 24 | #include <linux/clk.h> | ||
| 25 | |||
| 26 | MODULE_AUTHOR("Tomasz Stanislawski, <t.stanislaws@samsung.com>"); | ||
| 27 | MODULE_DESCRIPTION("Samsung MIXER"); | ||
| 28 | MODULE_LICENSE("GPL"); | ||
| 29 | |||
| 30 | /* --------- DRIVER PARAMETERS ---------- */ | ||
| 31 | |||
| 32 | static struct mxr_output_conf mxr_output_conf[] = { | ||
| 33 | { | ||
| 34 | .output_name = "S5P HDMI connector", | ||
| 35 | .module_name = "s5p-hdmi", | ||
| 36 | .cookie = 1, | ||
| 37 | }, | ||
| 38 | { | ||
| 39 | .output_name = "S5P SDO connector", | ||
| 40 | .module_name = "s5p-sdo", | ||
| 41 | .cookie = 0, | ||
| 42 | }, | ||
| 43 | }; | ||
| 44 | |||
| 45 | void mxr_get_mbus_fmt(struct mxr_device *mdev, | ||
| 46 | struct v4l2_mbus_framefmt *mbus_fmt) | ||
| 47 | { | ||
| 48 | struct v4l2_subdev *sd; | ||
| 49 | int ret; | ||
| 50 | |||
| 51 | mutex_lock(&mdev->mutex); | ||
| 52 | sd = to_outsd(mdev); | ||
| 53 | ret = v4l2_subdev_call(sd, video, g_mbus_fmt, mbus_fmt); | ||
| 54 | WARN(ret, "failed to get mbus_fmt for output %s\n", sd->name); | ||
| 55 | mutex_unlock(&mdev->mutex); | ||
| 56 | } | ||
| 57 | |||
| 58 | void mxr_streamer_get(struct mxr_device *mdev) | ||
| 59 | { | ||
| 60 | mutex_lock(&mdev->mutex); | ||
| 61 | ++mdev->n_streamer; | ||
| 62 | mxr_dbg(mdev, "%s(%d)\n", __func__, mdev->n_streamer); | ||
| 63 | if (mdev->n_streamer == 1) { | ||
| 64 | struct v4l2_subdev *sd = to_outsd(mdev); | ||
| 65 | struct v4l2_mbus_framefmt mbus_fmt; | ||
| 66 | struct mxr_resources *res = &mdev->res; | ||
| 67 | int ret; | ||
| 68 | |||
| 69 | if (to_output(mdev)->cookie == 0) | ||
| 70 | clk_set_parent(res->sclk_mixer, res->sclk_dac); | ||
| 71 | else | ||
| 72 | clk_set_parent(res->sclk_mixer, res->sclk_hdmi); | ||
| 73 | mxr_reg_s_output(mdev, to_output(mdev)->cookie); | ||
| 74 | |||
| 75 | ret = v4l2_subdev_call(sd, video, g_mbus_fmt, &mbus_fmt); | ||
| 76 | WARN(ret, "failed to get mbus_fmt for output %s\n", sd->name); | ||
| 77 | ret = v4l2_subdev_call(sd, video, s_stream, 1); | ||
| 78 | WARN(ret, "starting stream failed for output %s\n", sd->name); | ||
| 79 | |||
| 80 | mxr_reg_set_mbus_fmt(mdev, &mbus_fmt); | ||
| 81 | mxr_reg_streamon(mdev); | ||
| 82 | ret = mxr_reg_wait4vsync(mdev); | ||
| 83 | WARN(ret, "failed to get vsync (%d) from output\n", ret); | ||
| 84 | } | ||
| 85 | mutex_unlock(&mdev->mutex); | ||
| 86 | mxr_reg_dump(mdev); | ||
| 87 | /* FIXME: what to do when streaming fails? */ | ||
| 88 | } | ||
| 89 | |||
| 90 | void mxr_streamer_put(struct mxr_device *mdev) | ||
| 91 | { | ||
| 92 | mutex_lock(&mdev->mutex); | ||
| 93 | --mdev->n_streamer; | ||
| 94 | mxr_dbg(mdev, "%s(%d)\n", __func__, mdev->n_streamer); | ||
| 95 | if (mdev->n_streamer == 0) { | ||
| 96 | int ret; | ||
| 97 | struct v4l2_subdev *sd = to_outsd(mdev); | ||
| 98 | |||
| 99 | mxr_reg_streamoff(mdev); | ||
| 100 | /* vsync applies Mixer setup */ | ||
| 101 | ret = mxr_reg_wait4vsync(mdev); | ||
| 102 | WARN(ret, "failed to get vsync (%d) from output\n", ret); | ||
| 103 | ret = v4l2_subdev_call(sd, video, s_stream, 0); | ||
| 104 | WARN(ret, "stopping stream failed for output %s\n", sd->name); | ||
| 105 | } | ||
| 106 | WARN(mdev->n_streamer < 0, "negative number of streamers (%d)\n", | ||
| 107 | mdev->n_streamer); | ||
| 108 | mutex_unlock(&mdev->mutex); | ||
| 109 | mxr_reg_dump(mdev); | ||
| 110 | } | ||
| 111 | |||
| 112 | void mxr_output_get(struct mxr_device *mdev) | ||
| 113 | { | ||
| 114 | mutex_lock(&mdev->mutex); | ||
| 115 | ++mdev->n_output; | ||
| 116 | mxr_dbg(mdev, "%s(%d)\n", __func__, mdev->n_output); | ||
| 117 | /* turn on auxiliary driver */ | ||
| 118 | if (mdev->n_output == 1) | ||
| 119 | v4l2_subdev_call(to_outsd(mdev), core, s_power, 1); | ||
| 120 | mutex_unlock(&mdev->mutex); | ||
| 121 | } | ||
| 122 | |||
| 123 | void mxr_output_put(struct mxr_device *mdev) | ||
| 124 | { | ||
| 125 | mutex_lock(&mdev->mutex); | ||
| 126 | --mdev->n_output; | ||
| 127 | mxr_dbg(mdev, "%s(%d)\n", __func__, mdev->n_output); | ||
| 128 | /* turn on auxiliary driver */ | ||
| 129 | if (mdev->n_output == 0) | ||
| 130 | v4l2_subdev_call(to_outsd(mdev), core, s_power, 0); | ||
| 131 | WARN(mdev->n_output < 0, "negative number of output users (%d)\n", | ||
| 132 | mdev->n_output); | ||
| 133 | mutex_unlock(&mdev->mutex); | ||
| 134 | } | ||
| 135 | |||
| 136 | int mxr_power_get(struct mxr_device *mdev) | ||
| 137 | { | ||
| 138 | int ret = pm_runtime_get_sync(mdev->dev); | ||
| 139 | |||
| 140 | /* returning 1 means that power is already enabled, | ||
| 141 | * so zero success be returned */ | ||
| 142 | if (IS_ERR_VALUE(ret)) | ||
| 143 | return ret; | ||
| 144 | return 0; | ||
| 145 | } | ||
| 146 | |||
| 147 | void mxr_power_put(struct mxr_device *mdev) | ||
| 148 | { | ||
| 149 | pm_runtime_put_sync(mdev->dev); | ||
| 150 | } | ||
| 151 | |||
| 152 | /* --------- RESOURCE MANAGEMENT -------------*/ | ||
| 153 | |||
| 154 | static int __devinit mxr_acquire_plat_resources(struct mxr_device *mdev, | ||
| 155 | struct platform_device *pdev) | ||
| 156 | { | ||
| 157 | struct resource *res; | ||
| 158 | int ret; | ||
| 159 | |||
| 160 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mxr"); | ||
| 161 | if (res == NULL) { | ||
| 162 | mxr_err(mdev, "get memory resource failed.\n"); | ||
| 163 | ret = -ENXIO; | ||
| 164 | goto fail; | ||
| 165 | } | ||
| 166 | |||
| 167 | mdev->res.mxr_regs = ioremap(res->start, resource_size(res)); | ||
| 168 | if (mdev->res.mxr_regs == NULL) { | ||
| 169 | mxr_err(mdev, "register mapping failed.\n"); | ||
| 170 | ret = -ENXIO; | ||
| 171 | goto fail; | ||
| 172 | } | ||
| 173 | |||
| 174 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "vp"); | ||
| 175 | if (res == NULL) { | ||
| 176 | mxr_err(mdev, "get memory resource failed.\n"); | ||
| 177 | ret = -ENXIO; | ||
| 178 | goto fail_mxr_regs; | ||
| 179 | } | ||
| 180 | |||
| 181 | mdev->res.vp_regs = ioremap(res->start, resource_size(res)); | ||
| 182 | if (mdev->res.vp_regs == NULL) { | ||
| 183 | mxr_err(mdev, "register mapping failed.\n"); | ||
| 184 | ret = -ENXIO; | ||
| 185 | goto fail_mxr_regs; | ||
| 186 | } | ||
| 187 | |||
| 188 | res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "irq"); | ||
| 189 | if (res == NULL) { | ||
| 190 | mxr_err(mdev, "get interrupt resource failed.\n"); | ||
| 191 | ret = -ENXIO; | ||
| 192 | goto fail_vp_regs; | ||
| 193 | } | ||
| 194 | |||
| 195 | ret = request_irq(res->start, mxr_irq_handler, 0, "s5p-mixer", mdev); | ||
| 196 | if (ret) { | ||
| 197 | mxr_err(mdev, "request interrupt failed.\n"); | ||
| 198 | goto fail_vp_regs; | ||
| 199 | } | ||
| 200 | mdev->res.irq = res->start; | ||
| 201 | |||
| 202 | return 0; | ||
| 203 | |||
| 204 | fail_vp_regs: | ||
| 205 | iounmap(mdev->res.vp_regs); | ||
| 206 | |||
| 207 | fail_mxr_regs: | ||
| 208 | iounmap(mdev->res.mxr_regs); | ||
| 209 | |||
| 210 | fail: | ||
| 211 | return ret; | ||
| 212 | } | ||
| 213 | |||
| 214 | static void mxr_release_plat_resources(struct mxr_device *mdev) | ||
| 215 | { | ||
| 216 | free_irq(mdev->res.irq, mdev); | ||
| 217 | iounmap(mdev->res.vp_regs); | ||
| 218 | iounmap(mdev->res.mxr_regs); | ||
| 219 | } | ||
| 220 | |||
| 221 | static void mxr_release_clocks(struct mxr_device *mdev) | ||
| 222 | { | ||
| 223 | struct mxr_resources *res = &mdev->res; | ||
| 224 | |||
| 225 | if (!IS_ERR_OR_NULL(res->sclk_dac)) | ||
| 226 | clk_put(res->sclk_dac); | ||
| 227 | if (!IS_ERR_OR_NULL(res->sclk_hdmi)) | ||
| 228 | clk_put(res->sclk_hdmi); | ||
| 229 | if (!IS_ERR_OR_NULL(res->sclk_mixer)) | ||
| 230 | clk_put(res->sclk_mixer); | ||
| 231 | if (!IS_ERR_OR_NULL(res->vp)) | ||
| 232 | clk_put(res->vp); | ||
| 233 | if (!IS_ERR_OR_NULL(res->mixer)) | ||
| 234 | clk_put(res->mixer); | ||
| 235 | } | ||
| 236 | |||
| 237 | static int mxr_acquire_clocks(struct mxr_device *mdev) | ||
| 238 | { | ||
| 239 | struct mxr_resources *res = &mdev->res; | ||
| 240 | struct device *dev = mdev->dev; | ||
| 241 | |||
| 242 | res->mixer = clk_get(dev, "mixer"); | ||
| 243 | if (IS_ERR_OR_NULL(res->mixer)) { | ||
| 244 | mxr_err(mdev, "failed to get clock 'mixer'\n"); | ||
| 245 | goto fail; | ||
| 246 | } | ||
| 247 | res->vp = clk_get(dev, "vp"); | ||
| 248 | if (IS_ERR_OR_NULL(res->vp)) { | ||
| 249 | mxr_err(mdev, "failed to get clock 'vp'\n"); | ||
| 250 | goto fail; | ||
| 251 | } | ||
| 252 | res->sclk_mixer = clk_get(dev, "sclk_mixer"); | ||
| 253 | if (IS_ERR_OR_NULL(res->sclk_mixer)) { | ||
| 254 | mxr_err(mdev, "failed to get clock 'sclk_mixer'\n"); | ||
| 255 | goto fail; | ||
| 256 | } | ||
| 257 | res->sclk_hdmi = clk_get(dev, "sclk_hdmi"); | ||
| 258 | if (IS_ERR_OR_NULL(res->sclk_hdmi)) { | ||
| 259 | mxr_err(mdev, "failed to get clock 'sclk_hdmi'\n"); | ||
| 260 | goto fail; | ||
| 261 | } | ||
| 262 | res->sclk_dac = clk_get(dev, "sclk_dac"); | ||
| 263 | if (IS_ERR_OR_NULL(res->sclk_dac)) { | ||
| 264 | mxr_err(mdev, "failed to get clock 'sclk_dac'\n"); | ||
| 265 | goto fail; | ||
| 266 | } | ||
| 267 | |||
| 268 | return 0; | ||
| 269 | fail: | ||
| 270 | mxr_release_clocks(mdev); | ||
| 271 | return -ENODEV; | ||
| 272 | } | ||
| 273 | |||
| 274 | static int __devinit mxr_acquire_resources(struct mxr_device *mdev, | ||
| 275 | struct platform_device *pdev) | ||
| 276 | { | ||
| 277 | int ret; | ||
| 278 | ret = mxr_acquire_plat_resources(mdev, pdev); | ||
| 279 | |||
| 280 | if (ret) | ||
| 281 | goto fail; | ||
| 282 | |||
| 283 | ret = mxr_acquire_clocks(mdev); | ||
| 284 | if (ret) | ||
| 285 | goto fail_plat; | ||
| 286 | |||
| 287 | mxr_info(mdev, "resources acquired\n"); | ||
| 288 | return 0; | ||
| 289 | |||
| 290 | fail_plat: | ||
| 291 | mxr_release_plat_resources(mdev); | ||
| 292 | fail: | ||
| 293 | mxr_err(mdev, "resources acquire failed\n"); | ||
| 294 | return ret; | ||
| 295 | } | ||
| 296 | |||
| 297 | static void mxr_release_resources(struct mxr_device *mdev) | ||
| 298 | { | ||
| 299 | mxr_release_clocks(mdev); | ||
| 300 | mxr_release_plat_resources(mdev); | ||
| 301 | memset(&mdev->res, 0, sizeof mdev->res); | ||
| 302 | } | ||
| 303 | |||
| 304 | static void mxr_release_layers(struct mxr_device *mdev) | ||
| 305 | { | ||
| 306 | int i; | ||
| 307 | |||
| 308 | for (i = 0; i < ARRAY_SIZE(mdev->layer); ++i) | ||
| 309 | if (mdev->layer[i]) | ||
| 310 | mxr_layer_release(mdev->layer[i]); | ||
| 311 | } | ||
| 312 | |||
| 313 | static int __devinit mxr_acquire_layers(struct mxr_device *mdev, | ||
| 314 | struct mxr_platform_data *pdata) | ||
| 315 | { | ||
| 316 | mdev->layer[0] = mxr_graph_layer_create(mdev, 0); | ||
| 317 | mdev->layer[1] = mxr_graph_layer_create(mdev, 1); | ||
| 318 | mdev->layer[2] = mxr_vp_layer_create(mdev, 0); | ||
| 319 | |||
| 320 | if (!mdev->layer[0] || !mdev->layer[1] || !mdev->layer[2]) { | ||
| 321 | mxr_err(mdev, "failed to acquire layers\n"); | ||
| 322 | goto fail; | ||
| 323 | } | ||
| 324 | |||
| 325 | return 0; | ||
| 326 | |||
| 327 | fail: | ||
| 328 | mxr_release_layers(mdev); | ||
| 329 | return -ENODEV; | ||
| 330 | } | ||
| 331 | |||
| 332 | /* ---------- POWER MANAGEMENT ----------- */ | ||
| 333 | |||
| 334 | static int mxr_runtime_resume(struct device *dev) | ||
| 335 | { | ||
| 336 | struct mxr_device *mdev = to_mdev(dev); | ||
| 337 | struct mxr_resources *res = &mdev->res; | ||
| 338 | |||
| 339 | mxr_dbg(mdev, "resume - start\n"); | ||
| 340 | mutex_lock(&mdev->mutex); | ||
| 341 | /* turn clocks on */ | ||
| 342 | clk_enable(res->mixer); | ||
| 343 | clk_enable(res->vp); | ||
| 344 | clk_enable(res->sclk_mixer); | ||
| 345 | /* apply default configuration */ | ||
| 346 | mxr_reg_reset(mdev); | ||
| 347 | mxr_dbg(mdev, "resume - finished\n"); | ||
| 348 | |||
| 349 | mutex_unlock(&mdev->mutex); | ||
| 350 | return 0; | ||
| 351 | } | ||
| 352 | |||
| 353 | static int mxr_runtime_suspend(struct device *dev) | ||
| 354 | { | ||
| 355 | struct mxr_device *mdev = to_mdev(dev); | ||
| 356 | struct mxr_resources *res = &mdev->res; | ||
| 357 | mxr_dbg(mdev, "suspend - start\n"); | ||
| 358 | mutex_lock(&mdev->mutex); | ||
| 359 | /* turn clocks off */ | ||
| 360 | clk_disable(res->sclk_mixer); | ||
| 361 | clk_disable(res->vp); | ||
| 362 | clk_disable(res->mixer); | ||
| 363 | mutex_unlock(&mdev->mutex); | ||
| 364 | mxr_dbg(mdev, "suspend - finished\n"); | ||
| 365 | return 0; | ||
| 366 | } | ||
| 367 | |||
| 368 | static const struct dev_pm_ops mxr_pm_ops = { | ||
| 369 | .runtime_suspend = mxr_runtime_suspend, | ||
| 370 | .runtime_resume = mxr_runtime_resume, | ||
| 371 | }; | ||
| 372 | |||
| 373 | /* --------- DRIVER INITIALIZATION ---------- */ | ||
| 374 | |||
| 375 | static int __devinit mxr_probe(struct platform_device *pdev) | ||
| 376 | { | ||
| 377 | struct device *dev = &pdev->dev; | ||
| 378 | struct mxr_platform_data *pdata = dev->platform_data; | ||
| 379 | struct mxr_device *mdev; | ||
| 380 | int ret; | ||
| 381 | |||
| 382 | /* mdev does not exist yet so no mxr_dbg is used */ | ||
| 383 | dev_info(dev, "probe start\n"); | ||
| 384 | |||
| 385 | mdev = kzalloc(sizeof *mdev, GFP_KERNEL); | ||
| 386 | if (!mdev) { | ||
| 387 | mxr_err(mdev, "not enough memory.\n"); | ||
| 388 | ret = -ENOMEM; | ||
| 389 | goto fail; | ||
| 390 | } | ||
| 391 | |||
| 392 | /* setup pointer to master device */ | ||
| 393 | mdev->dev = dev; | ||
| 394 | |||
| 395 | mutex_init(&mdev->mutex); | ||
| 396 | spin_lock_init(&mdev->reg_slock); | ||
| 397 | init_waitqueue_head(&mdev->event_queue); | ||
| 398 | |||
| 399 | /* acquire resources: regs, irqs, clocks, regulators */ | ||
| 400 | ret = mxr_acquire_resources(mdev, pdev); | ||
| 401 | if (ret) | ||
| 402 | goto fail_mem; | ||
| 403 | |||
| 404 | /* configure resources for video output */ | ||
| 405 | ret = mxr_acquire_video(mdev, mxr_output_conf, | ||
| 406 | ARRAY_SIZE(mxr_output_conf)); | ||
| 407 | if (ret) | ||
| 408 | goto fail_resources; | ||
| 409 | |||
| 410 | /* configure layers */ | ||
| 411 | ret = mxr_acquire_layers(mdev, pdata); | ||
| 412 | if (ret) | ||
| 413 | goto fail_video; | ||
| 414 | |||
| 415 | pm_runtime_enable(dev); | ||
| 416 | |||
| 417 | mxr_info(mdev, "probe successful\n"); | ||
| 418 | return 0; | ||
| 419 | |||
| 420 | fail_video: | ||
| 421 | mxr_release_video(mdev); | ||
| 422 | |||
| 423 | fail_resources: | ||
| 424 | mxr_release_resources(mdev); | ||
| 425 | |||
| 426 | fail_mem: | ||
| 427 | kfree(mdev); | ||
| 428 | |||
| 429 | fail: | ||
| 430 | dev_info(dev, "probe failed\n"); | ||
| 431 | return ret; | ||
| 432 | } | ||
| 433 | |||
| 434 | static int __devexit mxr_remove(struct platform_device *pdev) | ||
| 435 | { | ||
| 436 | struct device *dev = &pdev->dev; | ||
| 437 | struct mxr_device *mdev = to_mdev(dev); | ||
| 438 | |||
| 439 | pm_runtime_disable(dev); | ||
| 440 | |||
| 441 | mxr_release_layers(mdev); | ||
| 442 | mxr_release_video(mdev); | ||
| 443 | mxr_release_resources(mdev); | ||
| 444 | |||
| 445 | kfree(mdev); | ||
| 446 | |||
| 447 | dev_info(dev, "remove sucessful\n"); | ||
| 448 | return 0; | ||
| 449 | } | ||
| 450 | |||
| 451 | static struct platform_driver mxr_driver __refdata = { | ||
| 452 | .probe = mxr_probe, | ||
| 453 | .remove = __devexit_p(mxr_remove), | ||
| 454 | .driver = { | ||
| 455 | .name = MXR_DRIVER_NAME, | ||
| 456 | .owner = THIS_MODULE, | ||
| 457 | .pm = &mxr_pm_ops, | ||
| 458 | } | ||
| 459 | }; | ||
| 460 | |||
| 461 | static int __init mxr_init(void) | ||
| 462 | { | ||
| 463 | int i, ret; | ||
| 464 | static const char banner[] __initdata = KERN_INFO | ||
| 465 | "Samsung TV Mixer driver, " | ||
| 466 | "(c) 2010-2011 Samsung Electronics Co., Ltd.\n"; | ||
| 467 | printk(banner); | ||
| 468 | |||
| 469 | /* Loading auxiliary modules */ | ||
| 470 | for (i = 0; i < ARRAY_SIZE(mxr_output_conf); ++i) | ||
| 471 | request_module(mxr_output_conf[i].module_name); | ||
| 472 | |||
| 473 | ret = platform_driver_register(&mxr_driver); | ||
| 474 | if (ret != 0) { | ||
| 475 | printk(KERN_ERR "registration of MIXER driver failed\n"); | ||
| 476 | return -ENXIO; | ||
| 477 | } | ||
| 478 | |||
| 479 | return 0; | ||
| 480 | } | ||
| 481 | module_init(mxr_init); | ||
| 482 | |||
| 483 | static void __exit mxr_exit(void) | ||
| 484 | { | ||
| 485 | platform_driver_unregister(&mxr_driver); | ||
| 486 | } | ||
| 487 | module_exit(mxr_exit); | ||
diff --git a/drivers/media/video/s5p-tv/mixer_grp_layer.c b/drivers/media/video/s5p-tv/mixer_grp_layer.c new file mode 100644 index 000000000000..58f0ba49580f --- /dev/null +++ b/drivers/media/video/s5p-tv/mixer_grp_layer.c | |||
| @@ -0,0 +1,185 @@ | |||
| 1 | /* | ||
| 2 | * Samsung TV Mixer driver | ||
| 3 | * | ||
| 4 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
| 5 | * | ||
| 6 | * Tomasz Stanislawski, <t.stanislaws@samsung.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License as published | ||
| 10 | * by the Free Software Foundiation. either version 2 of the License, | ||
| 11 | * or (at your option) any later version | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include "mixer.h" | ||
| 15 | |||
| 16 | #include <media/videobuf2-dma-contig.h> | ||
| 17 | |||
| 18 | /* FORMAT DEFINITIONS */ | ||
| 19 | |||
| 20 | static const struct mxr_format mxr_fb_fmt_rgb565 = { | ||
| 21 | .name = "RGB565", | ||
| 22 | .fourcc = V4L2_PIX_FMT_RGB565, | ||
| 23 | .colorspace = V4L2_COLORSPACE_SRGB, | ||
| 24 | .num_planes = 1, | ||
| 25 | .plane = { | ||
| 26 | { .width = 1, .height = 1, .size = 2 }, | ||
| 27 | }, | ||
| 28 | .num_subframes = 1, | ||
| 29 | .cookie = 4, | ||
| 30 | }; | ||
| 31 | |||
| 32 | static const struct mxr_format mxr_fb_fmt_argb1555 = { | ||
| 33 | .name = "ARGB1555", | ||
| 34 | .num_planes = 1, | ||
| 35 | .fourcc = V4L2_PIX_FMT_RGB555, | ||
| 36 | .colorspace = V4L2_COLORSPACE_SRGB, | ||
| 37 | .plane = { | ||
| 38 | { .width = 1, .height = 1, .size = 2 }, | ||
| 39 | }, | ||
| 40 | .num_subframes = 1, | ||
| 41 | .cookie = 5, | ||
| 42 | }; | ||
| 43 | |||
| 44 | static const struct mxr_format mxr_fb_fmt_argb4444 = { | ||
| 45 | .name = "ARGB4444", | ||
| 46 | .num_planes = 1, | ||
| 47 | .fourcc = V4L2_PIX_FMT_RGB444, | ||
| 48 | .colorspace = V4L2_COLORSPACE_SRGB, | ||
| 49 | .plane = { | ||
| 50 | { .width = 1, .height = 1, .size = 2 }, | ||
| 51 | }, | ||
| 52 | .num_subframes = 1, | ||
| 53 | .cookie = 6, | ||
| 54 | }; | ||
| 55 | |||
| 56 | static const struct mxr_format mxr_fb_fmt_argb8888 = { | ||
| 57 | .name = "ARGB8888", | ||
| 58 | .fourcc = V4L2_PIX_FMT_BGR32, | ||
| 59 | .colorspace = V4L2_COLORSPACE_SRGB, | ||
| 60 | .num_planes = 1, | ||
| 61 | .plane = { | ||
| 62 | { .width = 1, .height = 1, .size = 4 }, | ||
| 63 | }, | ||
| 64 | .num_subframes = 1, | ||
| 65 | .cookie = 7, | ||
| 66 | }; | ||
| 67 | |||
| 68 | static const struct mxr_format *mxr_graph_format[] = { | ||
| 69 | &mxr_fb_fmt_rgb565, | ||
| 70 | &mxr_fb_fmt_argb1555, | ||
| 71 | &mxr_fb_fmt_argb4444, | ||
| 72 | &mxr_fb_fmt_argb8888, | ||
| 73 | }; | ||
| 74 | |||
| 75 | /* AUXILIARY CALLBACKS */ | ||
| 76 | |||
| 77 | static void mxr_graph_layer_release(struct mxr_layer *layer) | ||
| 78 | { | ||
| 79 | mxr_base_layer_unregister(layer); | ||
| 80 | mxr_base_layer_release(layer); | ||
| 81 | } | ||
| 82 | |||
| 83 | static void mxr_graph_buffer_set(struct mxr_layer *layer, | ||
| 84 | struct mxr_buffer *buf) | ||
| 85 | { | ||
| 86 | dma_addr_t addr = 0; | ||
| 87 | |||
| 88 | if (buf) | ||
| 89 | addr = vb2_dma_contig_plane_paddr(&buf->vb, 0); | ||
| 90 | mxr_reg_graph_buffer(layer->mdev, layer->idx, addr); | ||
| 91 | } | ||
| 92 | |||
| 93 | static void mxr_graph_stream_set(struct mxr_layer *layer, int en) | ||
| 94 | { | ||
| 95 | mxr_reg_graph_layer_stream(layer->mdev, layer->idx, en); | ||
| 96 | } | ||
| 97 | |||
| 98 | static void mxr_graph_format_set(struct mxr_layer *layer) | ||
| 99 | { | ||
| 100 | mxr_reg_graph_format(layer->mdev, layer->idx, | ||
| 101 | layer->fmt, &layer->geo); | ||
| 102 | } | ||
| 103 | |||
| 104 | static void mxr_graph_fix_geometry(struct mxr_layer *layer) | ||
| 105 | { | ||
| 106 | struct mxr_geometry *geo = &layer->geo; | ||
| 107 | |||
| 108 | /* limit to boundary size */ | ||
| 109 | geo->src.full_width = clamp_val(geo->src.full_width, 1, 32767); | ||
| 110 | geo->src.full_height = clamp_val(geo->src.full_height, 1, 2047); | ||
| 111 | geo->src.width = clamp_val(geo->src.width, 1, geo->src.full_width); | ||
| 112 | geo->src.width = min(geo->src.width, 2047U); | ||
| 113 | /* not possible to crop of Y axis */ | ||
| 114 | geo->src.y_offset = min(geo->src.y_offset, geo->src.full_height - 1); | ||
| 115 | geo->src.height = geo->src.full_height - geo->src.y_offset; | ||
| 116 | /* limitting offset */ | ||
| 117 | geo->src.x_offset = min(geo->src.x_offset, | ||
| 118 | geo->src.full_width - geo->src.width); | ||
| 119 | |||
| 120 | /* setting position in output */ | ||
| 121 | geo->dst.width = min(geo->dst.width, geo->dst.full_width); | ||
| 122 | geo->dst.height = min(geo->dst.height, geo->dst.full_height); | ||
| 123 | |||
| 124 | /* Mixer supports only 1x and 2x scaling */ | ||
| 125 | if (geo->dst.width >= 2 * geo->src.width) { | ||
| 126 | geo->x_ratio = 1; | ||
| 127 | geo->dst.width = 2 * geo->src.width; | ||
| 128 | } else { | ||
| 129 | geo->x_ratio = 0; | ||
| 130 | geo->dst.width = geo->src.width; | ||
| 131 | } | ||
| 132 | |||
| 133 | if (geo->dst.height >= 2 * geo->src.height) { | ||
| 134 | geo->y_ratio = 1; | ||
| 135 | geo->dst.height = 2 * geo->src.height; | ||
| 136 | } else { | ||
| 137 | geo->y_ratio = 0; | ||
| 138 | geo->dst.height = geo->src.height; | ||
| 139 | } | ||
| 140 | |||
| 141 | geo->dst.x_offset = min(geo->dst.x_offset, | ||
| 142 | geo->dst.full_width - geo->dst.width); | ||
| 143 | geo->dst.y_offset = min(geo->dst.y_offset, | ||
| 144 | geo->dst.full_height - geo->dst.height); | ||
| 145 | } | ||
| 146 | |||
| 147 | /* PUBLIC API */ | ||
| 148 | |||
| 149 | struct mxr_layer *mxr_graph_layer_create(struct mxr_device *mdev, int idx) | ||
| 150 | { | ||
| 151 | struct mxr_layer *layer; | ||
| 152 | int ret; | ||
| 153 | struct mxr_layer_ops ops = { | ||
| 154 | .release = mxr_graph_layer_release, | ||
| 155 | .buffer_set = mxr_graph_buffer_set, | ||
| 156 | .stream_set = mxr_graph_stream_set, | ||
| 157 | .format_set = mxr_graph_format_set, | ||
| 158 | .fix_geometry = mxr_graph_fix_geometry, | ||
| 159 | }; | ||
| 160 | char name[32]; | ||
| 161 | |||
| 162 | sprintf(name, "graph%d", idx); | ||
| 163 | |||
| 164 | layer = mxr_base_layer_create(mdev, idx, name, &ops); | ||
| 165 | if (layer == NULL) { | ||
| 166 | mxr_err(mdev, "failed to initialize layer(%d) base\n", idx); | ||
| 167 | goto fail; | ||
| 168 | } | ||
| 169 | |||
| 170 | layer->fmt_array = mxr_graph_format; | ||
| 171 | layer->fmt_array_size = ARRAY_SIZE(mxr_graph_format); | ||
| 172 | |||
| 173 | ret = mxr_base_layer_register(layer); | ||
| 174 | if (ret) | ||
| 175 | goto fail_layer; | ||
| 176 | |||
| 177 | return layer; | ||
| 178 | |||
| 179 | fail_layer: | ||
| 180 | mxr_base_layer_release(layer); | ||
| 181 | |||
| 182 | fail: | ||
| 183 | return NULL; | ||
| 184 | } | ||
| 185 | |||
diff --git a/drivers/media/video/s5p-tv/mixer_reg.c b/drivers/media/video/s5p-tv/mixer_reg.c new file mode 100644 index 000000000000..38dac672aa1c --- /dev/null +++ b/drivers/media/video/s5p-tv/mixer_reg.c | |||
| @@ -0,0 +1,541 @@ | |||
| 1 | /* | ||
| 2 | * Samsung TV Mixer driver | ||
| 3 | * | ||
| 4 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
| 5 | * | ||
| 6 | * Tomasz Stanislawski, <t.stanislaws@samsung.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License as published | ||
| 10 | * by the Free Software Foundiation. either version 2 of the License, | ||
| 11 | * or (at your option) any later version | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include "mixer.h" | ||
| 15 | #include "regs-mixer.h" | ||
| 16 | #include "regs-vp.h" | ||
| 17 | |||
| 18 | #include <linux/delay.h> | ||
| 19 | |||
| 20 | /* Register access subroutines */ | ||
| 21 | |||
| 22 | static inline u32 vp_read(struct mxr_device *mdev, u32 reg_id) | ||
| 23 | { | ||
| 24 | return readl(mdev->res.vp_regs + reg_id); | ||
| 25 | } | ||
| 26 | |||
| 27 | static inline void vp_write(struct mxr_device *mdev, u32 reg_id, u32 val) | ||
| 28 | { | ||
| 29 | writel(val, mdev->res.vp_regs + reg_id); | ||
| 30 | } | ||
| 31 | |||
| 32 | static inline void vp_write_mask(struct mxr_device *mdev, u32 reg_id, | ||
| 33 | u32 val, u32 mask) | ||
| 34 | { | ||
| 35 | u32 old = vp_read(mdev, reg_id); | ||
| 36 | |||
| 37 | val = (val & mask) | (old & ~mask); | ||
| 38 | writel(val, mdev->res.vp_regs + reg_id); | ||
| 39 | } | ||
| 40 | |||
| 41 | static inline u32 mxr_read(struct mxr_device *mdev, u32 reg_id) | ||
| 42 | { | ||
| 43 | return readl(mdev->res.mxr_regs + reg_id); | ||
| 44 | } | ||
| 45 | |||
| 46 | static inline void mxr_write(struct mxr_device *mdev, u32 reg_id, u32 val) | ||
| 47 | { | ||
| 48 | writel(val, mdev->res.mxr_regs + reg_id); | ||
| 49 | } | ||
| 50 | |||
| 51 | static inline void mxr_write_mask(struct mxr_device *mdev, u32 reg_id, | ||
| 52 | u32 val, u32 mask) | ||
| 53 | { | ||
| 54 | u32 old = mxr_read(mdev, reg_id); | ||
| 55 | |||
| 56 | val = (val & mask) | (old & ~mask); | ||
| 57 | writel(val, mdev->res.mxr_regs + reg_id); | ||
| 58 | } | ||
| 59 | |||
| 60 | void mxr_vsync_set_update(struct mxr_device *mdev, int en) | ||
| 61 | { | ||
| 62 | /* block update on vsync */ | ||
| 63 | mxr_write_mask(mdev, MXR_STATUS, en ? MXR_STATUS_SYNC_ENABLE : 0, | ||
| 64 | MXR_STATUS_SYNC_ENABLE); | ||
| 65 | vp_write(mdev, VP_SHADOW_UPDATE, en ? VP_SHADOW_UPDATE_ENABLE : 0); | ||
| 66 | } | ||
| 67 | |||
| 68 | static void __mxr_reg_vp_reset(struct mxr_device *mdev) | ||
| 69 | { | ||
| 70 | int tries = 100; | ||
| 71 | |||
| 72 | vp_write(mdev, VP_SRESET, VP_SRESET_PROCESSING); | ||
| 73 | for (tries = 100; tries; --tries) { | ||
| 74 | /* waiting until VP_SRESET_PROCESSING is 0 */ | ||
| 75 | if (~vp_read(mdev, VP_SRESET) & VP_SRESET_PROCESSING) | ||
| 76 | break; | ||
| 77 | mdelay(10); | ||
| 78 | } | ||
| 79 | WARN(tries == 0, "failed to reset Video Processor\n"); | ||
| 80 | } | ||
| 81 | |||
| 82 | static void mxr_reg_vp_default_filter(struct mxr_device *mdev); | ||
| 83 | |||
| 84 | void mxr_reg_reset(struct mxr_device *mdev) | ||
| 85 | { | ||
| 86 | unsigned long flags; | ||
| 87 | u32 val; /* value stored to register */ | ||
| 88 | |||
| 89 | spin_lock_irqsave(&mdev->reg_slock, flags); | ||
| 90 | mxr_vsync_set_update(mdev, MXR_DISABLE); | ||
| 91 | |||
| 92 | /* set output in RGB888 mode */ | ||
| 93 | mxr_write(mdev, MXR_CFG, MXR_CFG_OUT_YUV444); | ||
| 94 | |||
| 95 | /* 16 beat burst in DMA */ | ||
| 96 | mxr_write_mask(mdev, MXR_STATUS, MXR_STATUS_16_BURST, | ||
| 97 | MXR_STATUS_BURST_MASK); | ||
| 98 | |||
| 99 | /* setting default layer priority: layer1 > video > layer0 | ||
| 100 | * because typical usage scenario would be | ||
| 101 | * layer0 - framebuffer | ||
| 102 | * video - video overlay | ||
| 103 | * layer1 - OSD | ||
| 104 | */ | ||
| 105 | val = MXR_LAYER_CFG_GRP0_VAL(1); | ||
| 106 | val |= MXR_LAYER_CFG_VP_VAL(2); | ||
| 107 | val |= MXR_LAYER_CFG_GRP1_VAL(3); | ||
| 108 | mxr_write(mdev, MXR_LAYER_CFG, val); | ||
| 109 | |||
| 110 | /* use dark gray background color */ | ||
| 111 | mxr_write(mdev, MXR_BG_COLOR0, 0x808080); | ||
| 112 | mxr_write(mdev, MXR_BG_COLOR1, 0x808080); | ||
| 113 | mxr_write(mdev, MXR_BG_COLOR2, 0x808080); | ||
| 114 | |||
| 115 | /* setting graphical layers */ | ||
| 116 | |||
| 117 | val = MXR_GRP_CFG_COLOR_KEY_DISABLE; /* no blank key */ | ||
| 118 | val |= MXR_GRP_CFG_BLEND_PRE_MUL; /* premul mode */ | ||
| 119 | val |= MXR_GRP_CFG_ALPHA_VAL(0xff); /* non-transparent alpha */ | ||
| 120 | |||
| 121 | /* the same configuration for both layers */ | ||
| 122 | mxr_write(mdev, MXR_GRAPHIC_CFG(0), val); | ||
| 123 | mxr_write(mdev, MXR_GRAPHIC_CFG(1), val); | ||
| 124 | |||
| 125 | /* configuration of Video Processor Registers */ | ||
| 126 | __mxr_reg_vp_reset(mdev); | ||
| 127 | mxr_reg_vp_default_filter(mdev); | ||
| 128 | |||
| 129 | /* enable all interrupts */ | ||
| 130 | mxr_write_mask(mdev, MXR_INT_EN, ~0, MXR_INT_EN_ALL); | ||
| 131 | |||
| 132 | mxr_vsync_set_update(mdev, MXR_ENABLE); | ||
| 133 | spin_unlock_irqrestore(&mdev->reg_slock, flags); | ||
| 134 | } | ||
| 135 | |||
| 136 | void mxr_reg_graph_format(struct mxr_device *mdev, int idx, | ||
| 137 | const struct mxr_format *fmt, const struct mxr_geometry *geo) | ||
| 138 | { | ||
| 139 | u32 val; | ||
| 140 | unsigned long flags; | ||
| 141 | |||
| 142 | spin_lock_irqsave(&mdev->reg_slock, flags); | ||
| 143 | mxr_vsync_set_update(mdev, MXR_DISABLE); | ||
| 144 | |||
| 145 | /* setup format */ | ||
| 146 | mxr_write_mask(mdev, MXR_GRAPHIC_CFG(idx), | ||
| 147 | MXR_GRP_CFG_FORMAT_VAL(fmt->cookie), MXR_GRP_CFG_FORMAT_MASK); | ||
| 148 | |||
| 149 | /* setup geometry */ | ||
| 150 | mxr_write(mdev, MXR_GRAPHIC_SPAN(idx), geo->src.full_width); | ||
| 151 | val = MXR_GRP_WH_WIDTH(geo->src.width); | ||
| 152 | val |= MXR_GRP_WH_HEIGHT(geo->src.height); | ||
| 153 | val |= MXR_GRP_WH_H_SCALE(geo->x_ratio); | ||
| 154 | val |= MXR_GRP_WH_V_SCALE(geo->y_ratio); | ||
| 155 | mxr_write(mdev, MXR_GRAPHIC_WH(idx), val); | ||
| 156 | |||
| 157 | /* setup offsets in source image */ | ||
| 158 | val = MXR_GRP_SXY_SX(geo->src.x_offset); | ||
| 159 | val |= MXR_GRP_SXY_SY(geo->src.y_offset); | ||
| 160 | mxr_write(mdev, MXR_GRAPHIC_SXY(idx), val); | ||
| 161 | |||
| 162 | /* setup offsets in display image */ | ||
| 163 | val = MXR_GRP_DXY_DX(geo->dst.x_offset); | ||
| 164 | val |= MXR_GRP_DXY_DY(geo->dst.y_offset); | ||
| 165 | mxr_write(mdev, MXR_GRAPHIC_DXY(idx), val); | ||
| 166 | |||
| 167 | mxr_vsync_set_update(mdev, MXR_ENABLE); | ||
| 168 | spin_unlock_irqrestore(&mdev->reg_slock, flags); | ||
| 169 | } | ||
| 170 | |||
| 171 | void mxr_reg_vp_format(struct mxr_device *mdev, | ||
| 172 | const struct mxr_format *fmt, const struct mxr_geometry *geo) | ||
| 173 | { | ||
| 174 | unsigned long flags; | ||
| 175 | |||
| 176 | spin_lock_irqsave(&mdev->reg_slock, flags); | ||
| 177 | mxr_vsync_set_update(mdev, MXR_DISABLE); | ||
| 178 | |||
| 179 | vp_write_mask(mdev, VP_MODE, fmt->cookie, VP_MODE_FMT_MASK); | ||
| 180 | |||
| 181 | /* setting size of input image */ | ||
| 182 | vp_write(mdev, VP_IMG_SIZE_Y, VP_IMG_HSIZE(geo->src.full_width) | | ||
| 183 | VP_IMG_VSIZE(geo->src.full_height)); | ||
| 184 | /* chroma height has to reduced by 2 to avoid chroma distorions */ | ||
| 185 | vp_write(mdev, VP_IMG_SIZE_C, VP_IMG_HSIZE(geo->src.full_width) | | ||
| 186 | VP_IMG_VSIZE(geo->src.full_height / 2)); | ||
| 187 | |||
| 188 | vp_write(mdev, VP_SRC_WIDTH, geo->src.width); | ||
| 189 | vp_write(mdev, VP_SRC_HEIGHT, geo->src.height); | ||
| 190 | vp_write(mdev, VP_SRC_H_POSITION, | ||
| 191 | VP_SRC_H_POSITION_VAL(geo->src.x_offset)); | ||
| 192 | vp_write(mdev, VP_SRC_V_POSITION, geo->src.y_offset); | ||
| 193 | |||
| 194 | vp_write(mdev, VP_DST_WIDTH, geo->dst.width); | ||
| 195 | vp_write(mdev, VP_DST_H_POSITION, geo->dst.x_offset); | ||
| 196 | if (geo->dst.field == V4L2_FIELD_INTERLACED) { | ||
| 197 | vp_write(mdev, VP_DST_HEIGHT, geo->dst.height / 2); | ||
| 198 | vp_write(mdev, VP_DST_V_POSITION, geo->dst.y_offset / 2); | ||
| 199 | } else { | ||
| 200 | vp_write(mdev, VP_DST_HEIGHT, geo->dst.height); | ||
| 201 | vp_write(mdev, VP_DST_V_POSITION, geo->dst.y_offset); | ||
| 202 | } | ||
| 203 | |||
| 204 | vp_write(mdev, VP_H_RATIO, geo->x_ratio); | ||
| 205 | vp_write(mdev, VP_V_RATIO, geo->y_ratio); | ||
| 206 | |||
| 207 | vp_write(mdev, VP_ENDIAN_MODE, VP_ENDIAN_MODE_LITTLE); | ||
| 208 | |||
| 209 | mxr_vsync_set_update(mdev, MXR_ENABLE); | ||
| 210 | spin_unlock_irqrestore(&mdev->reg_slock, flags); | ||
| 211 | |||
| 212 | } | ||
| 213 | |||
| 214 | void mxr_reg_graph_buffer(struct mxr_device *mdev, int idx, dma_addr_t addr) | ||
| 215 | { | ||
| 216 | u32 val = addr ? ~0 : 0; | ||
| 217 | unsigned long flags; | ||
| 218 | |||
| 219 | spin_lock_irqsave(&mdev->reg_slock, flags); | ||
| 220 | mxr_vsync_set_update(mdev, MXR_DISABLE); | ||
| 221 | |||
| 222 | if (idx == 0) | ||
| 223 | mxr_write_mask(mdev, MXR_CFG, val, MXR_CFG_GRP0_ENABLE); | ||
| 224 | else | ||
| 225 | mxr_write_mask(mdev, MXR_CFG, val, MXR_CFG_GRP1_ENABLE); | ||
| 226 | mxr_write(mdev, MXR_GRAPHIC_BASE(idx), addr); | ||
| 227 | |||
| 228 | mxr_vsync_set_update(mdev, MXR_ENABLE); | ||
| 229 | spin_unlock_irqrestore(&mdev->reg_slock, flags); | ||
| 230 | } | ||
| 231 | |||
| 232 | void mxr_reg_vp_buffer(struct mxr_device *mdev, | ||
| 233 | dma_addr_t luma_addr[2], dma_addr_t chroma_addr[2]) | ||
| 234 | { | ||
| 235 | u32 val = luma_addr[0] ? ~0 : 0; | ||
| 236 | unsigned long flags; | ||
| 237 | |||
| 238 | spin_lock_irqsave(&mdev->reg_slock, flags); | ||
| 239 | mxr_vsync_set_update(mdev, MXR_DISABLE); | ||
| 240 | |||
| 241 | mxr_write_mask(mdev, MXR_CFG, val, MXR_CFG_VP_ENABLE); | ||
| 242 | vp_write_mask(mdev, VP_ENABLE, val, VP_ENABLE_ON); | ||
| 243 | /* TODO: fix tiled mode */ | ||
| 244 | vp_write(mdev, VP_TOP_Y_PTR, luma_addr[0]); | ||
| 245 | vp_write(mdev, VP_TOP_C_PTR, chroma_addr[0]); | ||
| 246 | vp_write(mdev, VP_BOT_Y_PTR, luma_addr[1]); | ||
| 247 | vp_write(mdev, VP_BOT_C_PTR, chroma_addr[1]); | ||
| 248 | |||
| 249 | mxr_vsync_set_update(mdev, MXR_ENABLE); | ||
| 250 | spin_unlock_irqrestore(&mdev->reg_slock, flags); | ||
| 251 | } | ||
| 252 | |||
| 253 | static void mxr_irq_layer_handle(struct mxr_layer *layer) | ||
| 254 | { | ||
| 255 | struct list_head *head = &layer->enq_list; | ||
| 256 | struct mxr_buffer *done; | ||
| 257 | |||
| 258 | /* skip non-existing layer */ | ||
| 259 | if (layer == NULL) | ||
| 260 | return; | ||
| 261 | |||
| 262 | spin_lock(&layer->enq_slock); | ||
| 263 | if (layer->state == MXR_LAYER_IDLE) | ||
| 264 | goto done; | ||
| 265 | |||
| 266 | done = layer->shadow_buf; | ||
| 267 | layer->shadow_buf = layer->update_buf; | ||
| 268 | |||
| 269 | if (list_empty(head)) { | ||
| 270 | if (layer->state != MXR_LAYER_STREAMING) | ||
| 271 | layer->update_buf = NULL; | ||
| 272 | } else { | ||
| 273 | struct mxr_buffer *next; | ||
| 274 | next = list_first_entry(head, struct mxr_buffer, list); | ||
| 275 | list_del(&next->list); | ||
| 276 | layer->update_buf = next; | ||
| 277 | } | ||
| 278 | |||
| 279 | layer->ops.buffer_set(layer, layer->update_buf); | ||
| 280 | |||
| 281 | if (done && done != layer->shadow_buf) | ||
| 282 | vb2_buffer_done(&done->vb, VB2_BUF_STATE_DONE); | ||
| 283 | |||
| 284 | done: | ||
| 285 | spin_unlock(&layer->enq_slock); | ||
| 286 | } | ||
| 287 | |||
| 288 | irqreturn_t mxr_irq_handler(int irq, void *dev_data) | ||
| 289 | { | ||
| 290 | struct mxr_device *mdev = dev_data; | ||
| 291 | u32 i, val; | ||
| 292 | |||
| 293 | spin_lock(&mdev->reg_slock); | ||
| 294 | val = mxr_read(mdev, MXR_INT_STATUS); | ||
| 295 | |||
| 296 | /* wake up process waiting for VSYNC */ | ||
| 297 | if (val & MXR_INT_STATUS_VSYNC) { | ||
| 298 | set_bit(MXR_EVENT_VSYNC, &mdev->event_flags); | ||
| 299 | wake_up(&mdev->event_queue); | ||
| 300 | } | ||
| 301 | |||
| 302 | /* clear interrupts */ | ||
| 303 | if (~val & MXR_INT_EN_VSYNC) { | ||
| 304 | /* vsync interrupt use different bit for read and clear */ | ||
| 305 | val &= ~MXR_INT_EN_VSYNC; | ||
| 306 | val |= MXR_INT_CLEAR_VSYNC; | ||
| 307 | } | ||
| 308 | mxr_write(mdev, MXR_INT_STATUS, val); | ||
| 309 | |||
| 310 | spin_unlock(&mdev->reg_slock); | ||
| 311 | /* leave on non-vsync event */ | ||
| 312 | if (~val & MXR_INT_CLEAR_VSYNC) | ||
| 313 | return IRQ_HANDLED; | ||
| 314 | for (i = 0; i < MXR_MAX_LAYERS; ++i) | ||
| 315 | mxr_irq_layer_handle(mdev->layer[i]); | ||
| 316 | return IRQ_HANDLED; | ||
| 317 | } | ||
| 318 | |||
| 319 | void mxr_reg_s_output(struct mxr_device *mdev, int cookie) | ||
| 320 | { | ||
| 321 | u32 val; | ||
| 322 | |||
| 323 | val = cookie == 0 ? MXR_CFG_DST_SDO : MXR_CFG_DST_HDMI; | ||
| 324 | mxr_write_mask(mdev, MXR_CFG, val, MXR_CFG_DST_MASK); | ||
| 325 | } | ||
| 326 | |||
| 327 | void mxr_reg_streamon(struct mxr_device *mdev) | ||
| 328 | { | ||
| 329 | unsigned long flags; | ||
| 330 | |||
| 331 | spin_lock_irqsave(&mdev->reg_slock, flags); | ||
| 332 | /* single write -> no need to block vsync update */ | ||
| 333 | |||
| 334 | /* start MIXER */ | ||
| 335 | mxr_write_mask(mdev, MXR_STATUS, ~0, MXR_STATUS_REG_RUN); | ||
| 336 | |||
| 337 | spin_unlock_irqrestore(&mdev->reg_slock, flags); | ||
| 338 | } | ||
| 339 | |||
| 340 | void mxr_reg_streamoff(struct mxr_device *mdev) | ||
| 341 | { | ||
| 342 | unsigned long flags; | ||
| 343 | |||
| 344 | spin_lock_irqsave(&mdev->reg_slock, flags); | ||
| 345 | /* single write -> no need to block vsync update */ | ||
| 346 | |||
| 347 | /* stop MIXER */ | ||
| 348 | mxr_write_mask(mdev, MXR_STATUS, 0, MXR_STATUS_REG_RUN); | ||
| 349 | |||
| 350 | spin_unlock_irqrestore(&mdev->reg_slock, flags); | ||
| 351 | } | ||
| 352 | |||
| 353 | int mxr_reg_wait4vsync(struct mxr_device *mdev) | ||
| 354 | { | ||
| 355 | int ret; | ||
| 356 | |||
| 357 | clear_bit(MXR_EVENT_VSYNC, &mdev->event_flags); | ||
| 358 | /* TODO: consider adding interruptible */ | ||
| 359 | ret = wait_event_timeout(mdev->event_queue, | ||
| 360 | test_bit(MXR_EVENT_VSYNC, &mdev->event_flags), | ||
| 361 | msecs_to_jiffies(1000)); | ||
| 362 | if (ret > 0) | ||
| 363 | return 0; | ||
| 364 | if (ret < 0) | ||
| 365 | return ret; | ||
| 366 | mxr_warn(mdev, "no vsync detected - timeout\n"); | ||
| 367 | return -ETIME; | ||
| 368 | } | ||
| 369 | |||
| 370 | void mxr_reg_set_mbus_fmt(struct mxr_device *mdev, | ||
| 371 | struct v4l2_mbus_framefmt *fmt) | ||
| 372 | { | ||
| 373 | u32 val = 0; | ||
| 374 | unsigned long flags; | ||
| 375 | |||
| 376 | spin_lock_irqsave(&mdev->reg_slock, flags); | ||
| 377 | mxr_vsync_set_update(mdev, MXR_DISABLE); | ||
| 378 | |||
| 379 | /* choosing between interlace and progressive mode */ | ||
| 380 | if (fmt->field == V4L2_FIELD_INTERLACED) | ||
| 381 | val |= MXR_CFG_SCAN_INTERLACE; | ||
| 382 | else | ||
| 383 | val |= MXR_CFG_SCAN_PROGRASSIVE; | ||
| 384 | |||
| 385 | /* choosing between porper HD and SD mode */ | ||
| 386 | if (fmt->height == 480) | ||
| 387 | val |= MXR_CFG_SCAN_NTSC | MXR_CFG_SCAN_SD; | ||
| 388 | else if (fmt->height == 576) | ||
| 389 | val |= MXR_CFG_SCAN_PAL | MXR_CFG_SCAN_SD; | ||
| 390 | else if (fmt->height == 720) | ||
| 391 | val |= MXR_CFG_SCAN_HD_720 | MXR_CFG_SCAN_HD; | ||
| 392 | else if (fmt->height == 1080) | ||
| 393 | val |= MXR_CFG_SCAN_HD_1080 | MXR_CFG_SCAN_HD; | ||
| 394 | else | ||
| 395 | WARN(1, "unrecognized mbus height %u!\n", fmt->height); | ||
| 396 | |||
| 397 | mxr_write_mask(mdev, MXR_CFG, val, MXR_CFG_SCAN_MASK); | ||
| 398 | |||
| 399 | val = (fmt->field == V4L2_FIELD_INTERLACED) ? ~0 : 0; | ||
| 400 | vp_write_mask(mdev, VP_MODE, val, | ||
| 401 | VP_MODE_LINE_SKIP | VP_MODE_FIELD_ID_AUTO_TOGGLING); | ||
| 402 | |||
| 403 | mxr_vsync_set_update(mdev, MXR_ENABLE); | ||
| 404 | spin_unlock_irqrestore(&mdev->reg_slock, flags); | ||
| 405 | } | ||
| 406 | |||
| 407 | void mxr_reg_graph_layer_stream(struct mxr_device *mdev, int idx, int en) | ||
| 408 | { | ||
| 409 | /* no extra actions need to be done */ | ||
| 410 | } | ||
| 411 | |||
| 412 | void mxr_reg_vp_layer_stream(struct mxr_device *mdev, int en) | ||
| 413 | { | ||
| 414 | /* no extra actions need to be done */ | ||
| 415 | } | ||
| 416 | |||
| 417 | static const u8 filter_y_horiz_tap8[] = { | ||
| 418 | 0, -1, -1, -1, -1, -1, -1, -1, | ||
| 419 | -1, -1, -1, -1, -1, 0, 0, 0, | ||
| 420 | 0, 2, 4, 5, 6, 6, 6, 6, | ||
| 421 | 6, 5, 5, 4, 3, 2, 1, 1, | ||
| 422 | 0, -6, -12, -16, -18, -20, -21, -20, | ||
| 423 | -20, -18, -16, -13, -10, -8, -5, -2, | ||
| 424 | 127, 126, 125, 121, 114, 107, 99, 89, | ||
| 425 | 79, 68, 57, 46, 35, 25, 16, 8, | ||
| 426 | }; | ||
| 427 | |||
| 428 | static const u8 filter_y_vert_tap4[] = { | ||
| 429 | 0, -3, -6, -8, -8, -8, -8, -7, | ||
| 430 | -6, -5, -4, -3, -2, -1, -1, 0, | ||
| 431 | 127, 126, 124, 118, 111, 102, 92, 81, | ||
| 432 | 70, 59, 48, 37, 27, 19, 11, 5, | ||
| 433 | 0, 5, 11, 19, 27, 37, 48, 59, | ||
| 434 | 70, 81, 92, 102, 111, 118, 124, 126, | ||
| 435 | 0, 0, -1, -1, -2, -3, -4, -5, | ||
| 436 | -6, -7, -8, -8, -8, -8, -6, -3, | ||
| 437 | }; | ||
| 438 | |||
| 439 | static const u8 filter_cr_horiz_tap4[] = { | ||
| 440 | 0, -3, -6, -8, -8, -8, -8, -7, | ||
| 441 | -6, -5, -4, -3, -2, -1, -1, 0, | ||
| 442 | 127, 126, 124, 118, 111, 102, 92, 81, | ||
| 443 | 70, 59, 48, 37, 27, 19, 11, 5, | ||
| 444 | }; | ||
| 445 | |||
| 446 | static inline void mxr_reg_vp_filter_set(struct mxr_device *mdev, | ||
| 447 | int reg_id, const u8 *data, unsigned int size) | ||
| 448 | { | ||
| 449 | /* assure 4-byte align */ | ||
| 450 | BUG_ON(size & 3); | ||
| 451 | for (; size; size -= 4, reg_id += 4, data += 4) { | ||
| 452 | u32 val = (data[0] << 24) | (data[1] << 16) | | ||
| 453 | (data[2] << 8) | data[3]; | ||
| 454 | vp_write(mdev, reg_id, val); | ||
| 455 | } | ||
| 456 | } | ||
| 457 | |||
| 458 | static void mxr_reg_vp_default_filter(struct mxr_device *mdev) | ||
| 459 | { | ||
| 460 | mxr_reg_vp_filter_set(mdev, VP_POLY8_Y0_LL, | ||
| 461 | filter_y_horiz_tap8, sizeof filter_y_horiz_tap8); | ||
| 462 | mxr_reg_vp_filter_set(mdev, VP_POLY4_Y0_LL, | ||
| 463 | filter_y_vert_tap4, sizeof filter_y_vert_tap4); | ||
| 464 | mxr_reg_vp_filter_set(mdev, VP_POLY4_C0_LL, | ||
| 465 | filter_cr_horiz_tap4, sizeof filter_cr_horiz_tap4); | ||
| 466 | } | ||
| 467 | |||
| 468 | static void mxr_reg_mxr_dump(struct mxr_device *mdev) | ||
| 469 | { | ||
| 470 | #define DUMPREG(reg_id) \ | ||
| 471 | do { \ | ||
| 472 | mxr_dbg(mdev, #reg_id " = %08x\n", \ | ||
| 473 | (u32)readl(mdev->res.mxr_regs + reg_id)); \ | ||
| 474 | } while (0) | ||
| 475 | |||
| 476 | DUMPREG(MXR_STATUS); | ||
| 477 | DUMPREG(MXR_CFG); | ||
| 478 | DUMPREG(MXR_INT_EN); | ||
| 479 | DUMPREG(MXR_INT_STATUS); | ||
| 480 | |||
| 481 | DUMPREG(MXR_LAYER_CFG); | ||
| 482 | DUMPREG(MXR_VIDEO_CFG); | ||
| 483 | |||
| 484 | DUMPREG(MXR_GRAPHIC0_CFG); | ||
| 485 | DUMPREG(MXR_GRAPHIC0_BASE); | ||
| 486 | DUMPREG(MXR_GRAPHIC0_SPAN); | ||
| 487 | DUMPREG(MXR_GRAPHIC0_WH); | ||
| 488 | DUMPREG(MXR_GRAPHIC0_SXY); | ||
| 489 | DUMPREG(MXR_GRAPHIC0_DXY); | ||
| 490 | |||
| 491 | DUMPREG(MXR_GRAPHIC1_CFG); | ||
| 492 | DUMPREG(MXR_GRAPHIC1_BASE); | ||
| 493 | DUMPREG(MXR_GRAPHIC1_SPAN); | ||
| 494 | DUMPREG(MXR_GRAPHIC1_WH); | ||
| 495 | DUMPREG(MXR_GRAPHIC1_SXY); | ||
| 496 | DUMPREG(MXR_GRAPHIC1_DXY); | ||
| 497 | #undef DUMPREG | ||
| 498 | } | ||
| 499 | |||
| 500 | static void mxr_reg_vp_dump(struct mxr_device *mdev) | ||
| 501 | { | ||
| 502 | #define DUMPREG(reg_id) \ | ||
| 503 | do { \ | ||
| 504 | mxr_dbg(mdev, #reg_id " = %08x\n", \ | ||
| 505 | (u32) readl(mdev->res.vp_regs + reg_id)); \ | ||
| 506 | } while (0) | ||
| 507 | |||
| 508 | |||
| 509 | DUMPREG(VP_ENABLE); | ||
| 510 | DUMPREG(VP_SRESET); | ||
| 511 | DUMPREG(VP_SHADOW_UPDATE); | ||
| 512 | DUMPREG(VP_FIELD_ID); | ||
| 513 | DUMPREG(VP_MODE); | ||
| 514 | DUMPREG(VP_IMG_SIZE_Y); | ||
| 515 | DUMPREG(VP_IMG_SIZE_C); | ||
| 516 | DUMPREG(VP_PER_RATE_CTRL); | ||
| 517 | DUMPREG(VP_TOP_Y_PTR); | ||
| 518 | DUMPREG(VP_BOT_Y_PTR); | ||
| 519 | DUMPREG(VP_TOP_C_PTR); | ||
| 520 | DUMPREG(VP_BOT_C_PTR); | ||
| 521 | DUMPREG(VP_ENDIAN_MODE); | ||
| 522 | DUMPREG(VP_SRC_H_POSITION); | ||
| 523 | DUMPREG(VP_SRC_V_POSITION); | ||
| 524 | DUMPREG(VP_SRC_WIDTH); | ||
| 525 | DUMPREG(VP_SRC_HEIGHT); | ||
| 526 | DUMPREG(VP_DST_H_POSITION); | ||
| 527 | DUMPREG(VP_DST_V_POSITION); | ||
| 528 | DUMPREG(VP_DST_WIDTH); | ||
| 529 | DUMPREG(VP_DST_HEIGHT); | ||
| 530 | DUMPREG(VP_H_RATIO); | ||
| 531 | DUMPREG(VP_V_RATIO); | ||
| 532 | |||
| 533 | #undef DUMPREG | ||
| 534 | } | ||
| 535 | |||
| 536 | void mxr_reg_dump(struct mxr_device *mdev) | ||
| 537 | { | ||
| 538 | mxr_reg_mxr_dump(mdev); | ||
| 539 | mxr_reg_vp_dump(mdev); | ||
| 540 | } | ||
| 541 | |||
diff --git a/drivers/media/video/s5p-tv/mixer_video.c b/drivers/media/video/s5p-tv/mixer_video.c new file mode 100644 index 000000000000..43ac22f35bc7 --- /dev/null +++ b/drivers/media/video/s5p-tv/mixer_video.c | |||
| @@ -0,0 +1,1006 @@ | |||
| 1 | /* | ||
| 2 | * Samsung TV Mixer driver | ||
| 3 | * | ||
| 4 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
| 5 | * | ||
| 6 | * Tomasz Stanislawski, <t.stanislaws@samsung.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License as published | ||
| 10 | * by the Free Software Foundation. either version 2 of the License, | ||
| 11 | * or (at your option) any later version | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include "mixer.h" | ||
| 15 | |||
| 16 | #include <media/v4l2-ioctl.h> | ||
| 17 | #include <linux/videodev2.h> | ||
| 18 | #include <linux/mm.h> | ||
| 19 | #include <linux/version.h> | ||
| 20 | #include <linux/timer.h> | ||
| 21 | #include <media/videobuf2-dma-contig.h> | ||
| 22 | |||
| 23 | static int find_reg_callback(struct device *dev, void *p) | ||
| 24 | { | ||
| 25 | struct v4l2_subdev **sd = p; | ||
| 26 | |||
| 27 | *sd = dev_get_drvdata(dev); | ||
| 28 | /* non-zero value stops iteration */ | ||
| 29 | return 1; | ||
| 30 | } | ||
| 31 | |||
| 32 | static struct v4l2_subdev *find_and_register_subdev( | ||
| 33 | struct mxr_device *mdev, char *module_name) | ||
| 34 | { | ||
| 35 | struct device_driver *drv; | ||
| 36 | struct v4l2_subdev *sd = NULL; | ||
| 37 | int ret; | ||
| 38 | |||
| 39 | /* TODO: add waiting until probe is finished */ | ||
| 40 | drv = driver_find(module_name, &platform_bus_type); | ||
| 41 | if (!drv) { | ||
| 42 | mxr_warn(mdev, "module %s is missing\n", module_name); | ||
| 43 | return NULL; | ||
| 44 | } | ||
| 45 | /* driver refcnt is increased, it is safe to iterate over devices */ | ||
| 46 | ret = driver_for_each_device(drv, NULL, &sd, find_reg_callback); | ||
| 47 | /* ret == 0 means that find_reg_callback was never executed */ | ||
| 48 | if (sd == NULL) { | ||
| 49 | mxr_warn(mdev, "module %s provides no subdev!\n", module_name); | ||
| 50 | goto done; | ||
| 51 | } | ||
| 52 | /* v4l2_device_register_subdev detects if sd is NULL */ | ||
| 53 | ret = v4l2_device_register_subdev(&mdev->v4l2_dev, sd); | ||
| 54 | if (ret) { | ||
| 55 | mxr_warn(mdev, "failed to register subdev %s\n", sd->name); | ||
| 56 | sd = NULL; | ||
| 57 | } | ||
| 58 | |||
| 59 | done: | ||
| 60 | put_driver(drv); | ||
| 61 | return sd; | ||
| 62 | } | ||
| 63 | |||
| 64 | int __devinit mxr_acquire_video(struct mxr_device *mdev, | ||
| 65 | struct mxr_output_conf *output_conf, int output_count) | ||
| 66 | { | ||
| 67 | struct device *dev = mdev->dev; | ||
| 68 | struct v4l2_device *v4l2_dev = &mdev->v4l2_dev; | ||
| 69 | int i; | ||
| 70 | int ret = 0; | ||
| 71 | struct v4l2_subdev *sd; | ||
| 72 | |||
| 73 | strlcpy(v4l2_dev->name, dev_name(mdev->dev), sizeof(v4l2_dev->name)); | ||
| 74 | /* prepare context for V4L2 device */ | ||
| 75 | ret = v4l2_device_register(dev, v4l2_dev); | ||
| 76 | if (ret) { | ||
| 77 | mxr_err(mdev, "could not register v4l2 device.\n"); | ||
| 78 | goto fail; | ||
| 79 | } | ||
| 80 | |||
| 81 | mdev->alloc_ctx = vb2_dma_contig_init_ctx(mdev->dev); | ||
| 82 | if (IS_ERR_OR_NULL(mdev->alloc_ctx)) { | ||
| 83 | mxr_err(mdev, "could not acquire vb2 allocator\n"); | ||
| 84 | goto fail_v4l2_dev; | ||
| 85 | } | ||
| 86 | |||
| 87 | /* registering outputs */ | ||
| 88 | mdev->output_cnt = 0; | ||
| 89 | for (i = 0; i < output_count; ++i) { | ||
| 90 | struct mxr_output_conf *conf = &output_conf[i]; | ||
| 91 | struct mxr_output *out; | ||
| 92 | |||
| 93 | sd = find_and_register_subdev(mdev, conf->module_name); | ||
| 94 | /* trying to register next output */ | ||
| 95 | if (sd == NULL) | ||
| 96 | continue; | ||
| 97 | out = kzalloc(sizeof *out, GFP_KERNEL); | ||
| 98 | if (out == NULL) { | ||
| 99 | mxr_err(mdev, "no memory for '%s'\n", | ||
| 100 | conf->output_name); | ||
| 101 | ret = -ENOMEM; | ||
| 102 | /* registered subdevs are removed in fail_v4l2_dev */ | ||
| 103 | goto fail_output; | ||
| 104 | } | ||
| 105 | strlcpy(out->name, conf->output_name, sizeof(out->name)); | ||
| 106 | out->sd = sd; | ||
| 107 | out->cookie = conf->cookie; | ||
| 108 | mdev->output[mdev->output_cnt++] = out; | ||
| 109 | mxr_info(mdev, "added output '%s' from module '%s'\n", | ||
| 110 | conf->output_name, conf->module_name); | ||
| 111 | /* checking if maximal number of outputs is reached */ | ||
| 112 | if (mdev->output_cnt >= MXR_MAX_OUTPUTS) | ||
| 113 | break; | ||
| 114 | } | ||
| 115 | |||
| 116 | if (mdev->output_cnt == 0) { | ||
| 117 | mxr_err(mdev, "failed to register any output\n"); | ||
| 118 | ret = -ENODEV; | ||
| 119 | /* skipping fail_output because there is nothing to free */ | ||
| 120 | goto fail_vb2_allocator; | ||
| 121 | } | ||
| 122 | |||
| 123 | return 0; | ||
| 124 | |||
| 125 | fail_output: | ||
| 126 | /* kfree is NULL-safe */ | ||
| 127 | for (i = 0; i < mdev->output_cnt; ++i) | ||
| 128 | kfree(mdev->output[i]); | ||
| 129 | memset(mdev->output, 0, sizeof mdev->output); | ||
| 130 | |||
| 131 | fail_vb2_allocator: | ||
| 132 | /* freeing allocator context */ | ||
| 133 | vb2_dma_contig_cleanup_ctx(mdev->alloc_ctx); | ||
| 134 | |||
| 135 | fail_v4l2_dev: | ||
| 136 | /* NOTE: automatically unregister all subdevs */ | ||
| 137 | v4l2_device_unregister(v4l2_dev); | ||
| 138 | |||
| 139 | fail: | ||
| 140 | return ret; | ||
| 141 | } | ||
| 142 | |||
| 143 | void __devexit mxr_release_video(struct mxr_device *mdev) | ||
| 144 | { | ||
| 145 | int i; | ||
| 146 | |||
| 147 | /* kfree is NULL-safe */ | ||
| 148 | for (i = 0; i < mdev->output_cnt; ++i) | ||
| 149 | kfree(mdev->output[i]); | ||
| 150 | |||
| 151 | vb2_dma_contig_cleanup_ctx(mdev->alloc_ctx); | ||
| 152 | v4l2_device_unregister(&mdev->v4l2_dev); | ||
| 153 | } | ||
| 154 | |||
| 155 | static int mxr_querycap(struct file *file, void *priv, | ||
| 156 | struct v4l2_capability *cap) | ||
| 157 | { | ||
| 158 | struct mxr_layer *layer = video_drvdata(file); | ||
| 159 | |||
| 160 | mxr_dbg(layer->mdev, "%s:%d\n", __func__, __LINE__); | ||
| 161 | |||
| 162 | strlcpy(cap->driver, MXR_DRIVER_NAME, sizeof cap->driver); | ||
| 163 | strlcpy(cap->card, layer->vfd.name, sizeof cap->card); | ||
| 164 | sprintf(cap->bus_info, "%d", layer->idx); | ||
| 165 | cap->version = KERNEL_VERSION(0, 1, 0); | ||
| 166 | cap->capabilities = V4L2_CAP_STREAMING | | ||
| 167 | V4L2_CAP_VIDEO_OUTPUT | V4L2_CAP_VIDEO_OUTPUT_MPLANE; | ||
| 168 | |||
| 169 | return 0; | ||
| 170 | } | ||
| 171 | |||
| 172 | /* Geometry handling */ | ||
| 173 | static void mxr_layer_geo_fix(struct mxr_layer *layer) | ||
| 174 | { | ||
| 175 | struct mxr_device *mdev = layer->mdev; | ||
| 176 | struct v4l2_mbus_framefmt mbus_fmt; | ||
| 177 | |||
| 178 | /* TODO: add some dirty flag to avoid unnecessary adjustments */ | ||
| 179 | mxr_get_mbus_fmt(mdev, &mbus_fmt); | ||
| 180 | layer->geo.dst.full_width = mbus_fmt.width; | ||
| 181 | layer->geo.dst.full_height = mbus_fmt.height; | ||
| 182 | layer->geo.dst.field = mbus_fmt.field; | ||
| 183 | layer->ops.fix_geometry(layer); | ||
| 184 | } | ||
| 185 | |||
| 186 | static void mxr_layer_default_geo(struct mxr_layer *layer) | ||
| 187 | { | ||
| 188 | struct mxr_device *mdev = layer->mdev; | ||
| 189 | struct v4l2_mbus_framefmt mbus_fmt; | ||
| 190 | |||
| 191 | memset(&layer->geo, 0, sizeof layer->geo); | ||
| 192 | |||
| 193 | mxr_get_mbus_fmt(mdev, &mbus_fmt); | ||
| 194 | |||
| 195 | layer->geo.dst.full_width = mbus_fmt.width; | ||
| 196 | layer->geo.dst.full_height = mbus_fmt.height; | ||
| 197 | layer->geo.dst.width = layer->geo.dst.full_width; | ||
| 198 | layer->geo.dst.height = layer->geo.dst.full_height; | ||
| 199 | layer->geo.dst.field = mbus_fmt.field; | ||
| 200 | |||
| 201 | layer->geo.src.full_width = mbus_fmt.width; | ||
| 202 | layer->geo.src.full_height = mbus_fmt.height; | ||
| 203 | layer->geo.src.width = layer->geo.src.full_width; | ||
| 204 | layer->geo.src.height = layer->geo.src.full_height; | ||
| 205 | |||
| 206 | layer->ops.fix_geometry(layer); | ||
| 207 | } | ||
| 208 | |||
| 209 | static void mxr_geometry_dump(struct mxr_device *mdev, struct mxr_geometry *geo) | ||
| 210 | { | ||
| 211 | mxr_dbg(mdev, "src.full_size = (%u, %u)\n", | ||
| 212 | geo->src.full_width, geo->src.full_height); | ||
| 213 | mxr_dbg(mdev, "src.size = (%u, %u)\n", | ||
| 214 | geo->src.width, geo->src.height); | ||
| 215 | mxr_dbg(mdev, "src.offset = (%u, %u)\n", | ||
| 216 | geo->src.x_offset, geo->src.y_offset); | ||
| 217 | mxr_dbg(mdev, "dst.full_size = (%u, %u)\n", | ||
| 218 | geo->dst.full_width, geo->dst.full_height); | ||
| 219 | mxr_dbg(mdev, "dst.size = (%u, %u)\n", | ||
| 220 | geo->dst.width, geo->dst.height); | ||
| 221 | mxr_dbg(mdev, "dst.offset = (%u, %u)\n", | ||
| 222 | geo->dst.x_offset, geo->dst.y_offset); | ||
| 223 | mxr_dbg(mdev, "ratio = (%u, %u)\n", | ||
| 224 | geo->x_ratio, geo->y_ratio); | ||
| 225 | } | ||
| 226 | |||
| 227 | |||
| 228 | static const struct mxr_format *find_format_by_fourcc( | ||
| 229 | struct mxr_layer *layer, unsigned long fourcc); | ||
| 230 | static const struct mxr_format *find_format_by_index( | ||
| 231 | struct mxr_layer *layer, unsigned long index); | ||
| 232 | |||
| 233 | static int mxr_enum_fmt(struct file *file, void *priv, | ||
| 234 | struct v4l2_fmtdesc *f) | ||
| 235 | { | ||
| 236 | struct mxr_layer *layer = video_drvdata(file); | ||
| 237 | struct mxr_device *mdev = layer->mdev; | ||
| 238 | const struct mxr_format *fmt; | ||
| 239 | |||
| 240 | mxr_dbg(mdev, "%s\n", __func__); | ||
| 241 | fmt = find_format_by_index(layer, f->index); | ||
| 242 | if (fmt == NULL) | ||
| 243 | return -EINVAL; | ||
| 244 | |||
| 245 | strlcpy(f->description, fmt->name, sizeof(f->description)); | ||
| 246 | f->pixelformat = fmt->fourcc; | ||
| 247 | |||
| 248 | return 0; | ||
| 249 | } | ||
| 250 | |||
| 251 | static int mxr_s_fmt(struct file *file, void *priv, | ||
| 252 | struct v4l2_format *f) | ||
| 253 | { | ||
| 254 | struct mxr_layer *layer = video_drvdata(file); | ||
| 255 | const struct mxr_format *fmt; | ||
| 256 | struct v4l2_pix_format_mplane *pix; | ||
| 257 | struct mxr_device *mdev = layer->mdev; | ||
| 258 | struct mxr_geometry *geo = &layer->geo; | ||
| 259 | |||
| 260 | mxr_dbg(mdev, "%s:%d\n", __func__, __LINE__); | ||
| 261 | |||
| 262 | pix = &f->fmt.pix_mp; | ||
| 263 | fmt = find_format_by_fourcc(layer, pix->pixelformat); | ||
| 264 | if (fmt == NULL) { | ||
| 265 | mxr_warn(mdev, "not recognized fourcc: %08x\n", | ||
| 266 | pix->pixelformat); | ||
| 267 | return -EINVAL; | ||
| 268 | } | ||
| 269 | layer->fmt = fmt; | ||
| 270 | geo->src.full_width = pix->width; | ||
| 271 | geo->src.width = pix->width; | ||
| 272 | geo->src.full_height = pix->height; | ||
| 273 | geo->src.height = pix->height; | ||
| 274 | /* assure consistency of geometry */ | ||
| 275 | mxr_layer_geo_fix(layer); | ||
| 276 | mxr_dbg(mdev, "width=%u height=%u span=%u\n", | ||
| 277 | geo->src.width, geo->src.height, geo->src.full_width); | ||
| 278 | |||
| 279 | return 0; | ||
| 280 | } | ||
| 281 | |||
| 282 | static unsigned int divup(unsigned int divident, unsigned int divisor) | ||
| 283 | { | ||
| 284 | return (divident + divisor - 1) / divisor; | ||
| 285 | } | ||
| 286 | |||
| 287 | unsigned long mxr_get_plane_size(const struct mxr_block *blk, | ||
| 288 | unsigned int width, unsigned int height) | ||
| 289 | { | ||
| 290 | unsigned int bl_width = divup(width, blk->width); | ||
| 291 | unsigned int bl_height = divup(height, blk->height); | ||
| 292 | |||
| 293 | return bl_width * bl_height * blk->size; | ||
| 294 | } | ||
| 295 | |||
| 296 | static void mxr_mplane_fill(struct v4l2_plane_pix_format *planes, | ||
| 297 | const struct mxr_format *fmt, u32 width, u32 height) | ||
| 298 | { | ||
| 299 | int i; | ||
| 300 | |||
| 301 | memset(planes, 0, sizeof(*planes) * fmt->num_subframes); | ||
| 302 | for (i = 0; i < fmt->num_planes; ++i) { | ||
| 303 | struct v4l2_plane_pix_format *plane = planes | ||
| 304 | + fmt->plane2subframe[i]; | ||
| 305 | const struct mxr_block *blk = &fmt->plane[i]; | ||
| 306 | u32 bl_width = divup(width, blk->width); | ||
| 307 | u32 bl_height = divup(height, blk->height); | ||
| 308 | u32 sizeimage = bl_width * bl_height * blk->size; | ||
| 309 | u16 bytesperline = bl_width * blk->size / blk->height; | ||
| 310 | |||
| 311 | plane->sizeimage += sizeimage; | ||
| 312 | plane->bytesperline = max(plane->bytesperline, bytesperline); | ||
| 313 | } | ||
| 314 | } | ||
| 315 | |||
| 316 | static int mxr_g_fmt(struct file *file, void *priv, | ||
| 317 | struct v4l2_format *f) | ||
| 318 | { | ||
| 319 | struct mxr_layer *layer = video_drvdata(file); | ||
| 320 | struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp; | ||
| 321 | |||
| 322 | mxr_dbg(layer->mdev, "%s:%d\n", __func__, __LINE__); | ||
| 323 | |||
| 324 | pix->width = layer->geo.src.full_width; | ||
| 325 | pix->height = layer->geo.src.full_height; | ||
| 326 | pix->field = V4L2_FIELD_NONE; | ||
| 327 | pix->pixelformat = layer->fmt->fourcc; | ||
| 328 | pix->colorspace = layer->fmt->colorspace; | ||
| 329 | mxr_mplane_fill(pix->plane_fmt, layer->fmt, pix->width, pix->height); | ||
| 330 | |||
| 331 | return 0; | ||
| 332 | } | ||
| 333 | |||
| 334 | static inline struct mxr_crop *choose_crop_by_type(struct mxr_geometry *geo, | ||
| 335 | enum v4l2_buf_type type) | ||
| 336 | { | ||
| 337 | switch (type) { | ||
| 338 | case V4L2_BUF_TYPE_VIDEO_OUTPUT: | ||
| 339 | case V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE: | ||
| 340 | return &geo->dst; | ||
| 341 | case V4L2_BUF_TYPE_VIDEO_OVERLAY: | ||
| 342 | return &geo->src; | ||
| 343 | default: | ||
| 344 | return NULL; | ||
| 345 | } | ||
| 346 | } | ||
| 347 | |||
| 348 | static int mxr_g_crop(struct file *file, void *fh, struct v4l2_crop *a) | ||
| 349 | { | ||
| 350 | struct mxr_layer *layer = video_drvdata(file); | ||
| 351 | struct mxr_crop *crop; | ||
| 352 | |||
| 353 | mxr_dbg(layer->mdev, "%s:%d\n", __func__, __LINE__); | ||
| 354 | crop = choose_crop_by_type(&layer->geo, a->type); | ||
| 355 | if (crop == NULL) | ||
| 356 | return -EINVAL; | ||
| 357 | mxr_layer_geo_fix(layer); | ||
| 358 | a->c.left = crop->x_offset; | ||
| 359 | a->c.top = crop->y_offset; | ||
| 360 | a->c.width = crop->width; | ||
| 361 | a->c.height = crop->height; | ||
| 362 | return 0; | ||
| 363 | } | ||
| 364 | |||
| 365 | static int mxr_s_crop(struct file *file, void *fh, struct v4l2_crop *a) | ||
| 366 | { | ||
| 367 | struct mxr_layer *layer = video_drvdata(file); | ||
| 368 | struct mxr_crop *crop; | ||
| 369 | |||
| 370 | mxr_dbg(layer->mdev, "%s:%d\n", __func__, __LINE__); | ||
| 371 | crop = choose_crop_by_type(&layer->geo, a->type); | ||
| 372 | if (crop == NULL) | ||
| 373 | return -EINVAL; | ||
| 374 | crop->x_offset = a->c.left; | ||
| 375 | crop->y_offset = a->c.top; | ||
| 376 | crop->width = a->c.width; | ||
| 377 | crop->height = a->c.height; | ||
| 378 | mxr_layer_geo_fix(layer); | ||
| 379 | return 0; | ||
| 380 | } | ||
| 381 | |||
| 382 | static int mxr_cropcap(struct file *file, void *fh, struct v4l2_cropcap *a) | ||
| 383 | { | ||
| 384 | struct mxr_layer *layer = video_drvdata(file); | ||
| 385 | struct mxr_crop *crop; | ||
| 386 | |||
| 387 | mxr_dbg(layer->mdev, "%s:%d\n", __func__, __LINE__); | ||
| 388 | crop = choose_crop_by_type(&layer->geo, a->type); | ||
| 389 | if (crop == NULL) | ||
| 390 | return -EINVAL; | ||
| 391 | mxr_layer_geo_fix(layer); | ||
| 392 | a->bounds.left = 0; | ||
| 393 | a->bounds.top = 0; | ||
| 394 | a->bounds.width = crop->full_width; | ||
| 395 | a->bounds.top = crop->full_height; | ||
| 396 | a->defrect = a->bounds; | ||
| 397 | /* setting pixel aspect to 1/1 */ | ||
| 398 | a->pixelaspect.numerator = 1; | ||
| 399 | a->pixelaspect.denominator = 1; | ||
| 400 | return 0; | ||
| 401 | } | ||
| 402 | |||
| 403 | static int mxr_enum_dv_presets(struct file *file, void *fh, | ||
| 404 | struct v4l2_dv_enum_preset *preset) | ||
| 405 | { | ||
| 406 | struct mxr_layer *layer = video_drvdata(file); | ||
| 407 | struct mxr_device *mdev = layer->mdev; | ||
| 408 | int ret; | ||
| 409 | |||
| 410 | /* lock protects from changing sd_out */ | ||
| 411 | mutex_lock(&mdev->mutex); | ||
| 412 | ret = v4l2_subdev_call(to_outsd(mdev), video, enum_dv_presets, preset); | ||
| 413 | mutex_unlock(&mdev->mutex); | ||
| 414 | |||
| 415 | return ret ? -EINVAL : 0; | ||
| 416 | } | ||
| 417 | |||
| 418 | static int mxr_s_dv_preset(struct file *file, void *fh, | ||
| 419 | struct v4l2_dv_preset *preset) | ||
| 420 | { | ||
| 421 | struct mxr_layer *layer = video_drvdata(file); | ||
| 422 | struct mxr_device *mdev = layer->mdev; | ||
| 423 | int ret; | ||
| 424 | |||
| 425 | /* lock protects from changing sd_out */ | ||
| 426 | mutex_lock(&mdev->mutex); | ||
| 427 | |||
| 428 | /* preset change cannot be done while there is an entity | ||
| 429 | * dependant on output configuration | ||
| 430 | */ | ||
| 431 | if (mdev->n_output > 0) { | ||
| 432 | mutex_unlock(&mdev->mutex); | ||
| 433 | return -EBUSY; | ||
| 434 | } | ||
| 435 | |||
| 436 | ret = v4l2_subdev_call(to_outsd(mdev), video, s_dv_preset, preset); | ||
| 437 | |||
| 438 | mutex_unlock(&mdev->mutex); | ||
| 439 | |||
| 440 | /* any failure should return EINVAL according to V4L2 doc */ | ||
| 441 | return ret ? -EINVAL : 0; | ||
| 442 | } | ||
| 443 | |||
| 444 | static int mxr_g_dv_preset(struct file *file, void *fh, | ||
| 445 | struct v4l2_dv_preset *preset) | ||
| 446 | { | ||
| 447 | struct mxr_layer *layer = video_drvdata(file); | ||
| 448 | struct mxr_device *mdev = layer->mdev; | ||
| 449 | int ret; | ||
| 450 | |||
| 451 | /* lock protects from changing sd_out */ | ||
| 452 | mutex_lock(&mdev->mutex); | ||
| 453 | ret = v4l2_subdev_call(to_outsd(mdev), video, g_dv_preset, preset); | ||
| 454 | mutex_unlock(&mdev->mutex); | ||
| 455 | |||
| 456 | return ret ? -EINVAL : 0; | ||
| 457 | } | ||
| 458 | |||
| 459 | static int mxr_s_std(struct file *file, void *fh, v4l2_std_id *norm) | ||
| 460 | { | ||
| 461 | struct mxr_layer *layer = video_drvdata(file); | ||
| 462 | struct mxr_device *mdev = layer->mdev; | ||
| 463 | int ret; | ||
| 464 | |||
| 465 | /* lock protects from changing sd_out */ | ||
| 466 | mutex_lock(&mdev->mutex); | ||
| 467 | |||
| 468 | /* standard change cannot be done while there is an entity | ||
| 469 | * dependant on output configuration | ||
| 470 | */ | ||
| 471 | if (mdev->n_output > 0) { | ||
| 472 | mutex_unlock(&mdev->mutex); | ||
| 473 | return -EBUSY; | ||
| 474 | } | ||
| 475 | |||
| 476 | ret = v4l2_subdev_call(to_outsd(mdev), video, s_std_output, *norm); | ||
| 477 | |||
| 478 | mutex_unlock(&mdev->mutex); | ||
| 479 | |||
| 480 | return ret ? -EINVAL : 0; | ||
| 481 | } | ||
| 482 | |||
| 483 | static int mxr_g_std(struct file *file, void *fh, v4l2_std_id *norm) | ||
| 484 | { | ||
| 485 | struct mxr_layer *layer = video_drvdata(file); | ||
| 486 | struct mxr_device *mdev = layer->mdev; | ||
| 487 | int ret; | ||
| 488 | |||
| 489 | /* lock protects from changing sd_out */ | ||
| 490 | mutex_lock(&mdev->mutex); | ||
| 491 | ret = v4l2_subdev_call(to_outsd(mdev), video, g_std_output, norm); | ||
| 492 | mutex_unlock(&mdev->mutex); | ||
| 493 | |||
| 494 | return ret ? -EINVAL : 0; | ||
| 495 | } | ||
| 496 | |||
| 497 | static int mxr_enum_output(struct file *file, void *fh, struct v4l2_output *a) | ||
| 498 | { | ||
| 499 | struct mxr_layer *layer = video_drvdata(file); | ||
| 500 | struct mxr_device *mdev = layer->mdev; | ||
| 501 | struct mxr_output *out; | ||
| 502 | struct v4l2_subdev *sd; | ||
| 503 | |||
| 504 | if (a->index >= mdev->output_cnt) | ||
| 505 | return -EINVAL; | ||
| 506 | out = mdev->output[a->index]; | ||
| 507 | BUG_ON(out == NULL); | ||
| 508 | sd = out->sd; | ||
| 509 | strlcpy(a->name, out->name, sizeof(a->name)); | ||
| 510 | |||
| 511 | /* try to obtain supported tv norms */ | ||
| 512 | v4l2_subdev_call(sd, video, g_tvnorms_output, &a->std); | ||
| 513 | a->capabilities = 0; | ||
| 514 | if (sd->ops->video && sd->ops->video->s_dv_preset) | ||
| 515 | a->capabilities |= V4L2_OUT_CAP_PRESETS; | ||
| 516 | if (sd->ops->video && sd->ops->video->s_std_output) | ||
| 517 | a->capabilities |= V4L2_OUT_CAP_STD; | ||
| 518 | a->type = V4L2_OUTPUT_TYPE_ANALOG; | ||
| 519 | |||
| 520 | return 0; | ||
| 521 | } | ||
| 522 | |||
| 523 | static int mxr_s_output(struct file *file, void *fh, unsigned int i) | ||
| 524 | { | ||
| 525 | struct video_device *vfd = video_devdata(file); | ||
| 526 | struct mxr_layer *layer = video_drvdata(file); | ||
| 527 | struct mxr_device *mdev = layer->mdev; | ||
| 528 | int ret = 0; | ||
| 529 | |||
| 530 | if (i >= mdev->output_cnt || mdev->output[i] == NULL) | ||
| 531 | return -EINVAL; | ||
| 532 | |||
| 533 | mutex_lock(&mdev->mutex); | ||
| 534 | if (mdev->n_output > 0) { | ||
| 535 | ret = -EBUSY; | ||
| 536 | goto done; | ||
| 537 | } | ||
| 538 | mdev->current_output = i; | ||
| 539 | vfd->tvnorms = 0; | ||
| 540 | v4l2_subdev_call(to_outsd(mdev), video, g_tvnorms_output, | ||
| 541 | &vfd->tvnorms); | ||
| 542 | mxr_dbg(mdev, "tvnorms = %08llx\n", vfd->tvnorms); | ||
| 543 | |||
| 544 | done: | ||
| 545 | mutex_unlock(&mdev->mutex); | ||
| 546 | return ret; | ||
| 547 | } | ||
| 548 | |||
| 549 | static int mxr_g_output(struct file *file, void *fh, unsigned int *p) | ||
| 550 | { | ||
| 551 | struct mxr_layer *layer = video_drvdata(file); | ||
| 552 | struct mxr_device *mdev = layer->mdev; | ||
| 553 | |||
| 554 | mutex_lock(&mdev->mutex); | ||
| 555 | *p = mdev->current_output; | ||
| 556 | mutex_unlock(&mdev->mutex); | ||
| 557 | |||
| 558 | return 0; | ||
| 559 | } | ||
| 560 | |||
| 561 | static int mxr_reqbufs(struct file *file, void *priv, | ||
| 562 | struct v4l2_requestbuffers *p) | ||
| 563 | { | ||
| 564 | struct mxr_layer *layer = video_drvdata(file); | ||
| 565 | |||
| 566 | mxr_dbg(layer->mdev, "%s:%d\n", __func__, __LINE__); | ||
| 567 | return vb2_reqbufs(&layer->vb_queue, p); | ||
| 568 | } | ||
| 569 | |||
| 570 | static int mxr_querybuf(struct file *file, void *priv, struct v4l2_buffer *p) | ||
| 571 | { | ||
| 572 | struct mxr_layer *layer = video_drvdata(file); | ||
| 573 | |||
| 574 | mxr_dbg(layer->mdev, "%s:%d\n", __func__, __LINE__); | ||
| 575 | return vb2_querybuf(&layer->vb_queue, p); | ||
| 576 | } | ||
| 577 | |||
| 578 | static int mxr_qbuf(struct file *file, void *priv, struct v4l2_buffer *p) | ||
| 579 | { | ||
| 580 | struct mxr_layer *layer = video_drvdata(file); | ||
| 581 | |||
| 582 | mxr_dbg(layer->mdev, "%s:%d(%d)\n", __func__, __LINE__, p->index); | ||
| 583 | return vb2_qbuf(&layer->vb_queue, p); | ||
| 584 | } | ||
| 585 | |||
| 586 | static int mxr_dqbuf(struct file *file, void *priv, struct v4l2_buffer *p) | ||
| 587 | { | ||
| 588 | struct mxr_layer *layer = video_drvdata(file); | ||
| 589 | |||
| 590 | mxr_dbg(layer->mdev, "%s:%d\n", __func__, __LINE__); | ||
| 591 | return vb2_dqbuf(&layer->vb_queue, p, file->f_flags & O_NONBLOCK); | ||
| 592 | } | ||
| 593 | |||
| 594 | static int mxr_streamon(struct file *file, void *priv, enum v4l2_buf_type i) | ||
| 595 | { | ||
| 596 | struct mxr_layer *layer = video_drvdata(file); | ||
| 597 | |||
| 598 | mxr_dbg(layer->mdev, "%s:%d\n", __func__, __LINE__); | ||
| 599 | return vb2_streamon(&layer->vb_queue, i); | ||
| 600 | } | ||
| 601 | |||
| 602 | static int mxr_streamoff(struct file *file, void *priv, enum v4l2_buf_type i) | ||
| 603 | { | ||
| 604 | struct mxr_layer *layer = video_drvdata(file); | ||
| 605 | |||
| 606 | mxr_dbg(layer->mdev, "%s:%d\n", __func__, __LINE__); | ||
| 607 | return vb2_streamoff(&layer->vb_queue, i); | ||
| 608 | } | ||
| 609 | |||
| 610 | static const struct v4l2_ioctl_ops mxr_ioctl_ops = { | ||
| 611 | .vidioc_querycap = mxr_querycap, | ||
| 612 | /* format handling */ | ||
| 613 | .vidioc_enum_fmt_vid_out = mxr_enum_fmt, | ||
| 614 | .vidioc_s_fmt_vid_out_mplane = mxr_s_fmt, | ||
| 615 | .vidioc_g_fmt_vid_out_mplane = mxr_g_fmt, | ||
| 616 | /* buffer control */ | ||
| 617 | .vidioc_reqbufs = mxr_reqbufs, | ||
| 618 | .vidioc_querybuf = mxr_querybuf, | ||
| 619 | .vidioc_qbuf = mxr_qbuf, | ||
| 620 | .vidioc_dqbuf = mxr_dqbuf, | ||
| 621 | /* Streaming control */ | ||
| 622 | .vidioc_streamon = mxr_streamon, | ||
| 623 | .vidioc_streamoff = mxr_streamoff, | ||
| 624 | /* Preset functions */ | ||
| 625 | .vidioc_enum_dv_presets = mxr_enum_dv_presets, | ||
| 626 | .vidioc_s_dv_preset = mxr_s_dv_preset, | ||
| 627 | .vidioc_g_dv_preset = mxr_g_dv_preset, | ||
| 628 | /* analog TV standard functions */ | ||
| 629 | .vidioc_s_std = mxr_s_std, | ||
| 630 | .vidioc_g_std = mxr_g_std, | ||
| 631 | /* Output handling */ | ||
| 632 | .vidioc_enum_output = mxr_enum_output, | ||
| 633 | .vidioc_s_output = mxr_s_output, | ||
| 634 | .vidioc_g_output = mxr_g_output, | ||
| 635 | /* Crop ioctls */ | ||
| 636 | .vidioc_g_crop = mxr_g_crop, | ||
| 637 | .vidioc_s_crop = mxr_s_crop, | ||
| 638 | .vidioc_cropcap = mxr_cropcap, | ||
| 639 | }; | ||
| 640 | |||
| 641 | static int mxr_video_open(struct file *file) | ||
| 642 | { | ||
| 643 | struct mxr_layer *layer = video_drvdata(file); | ||
| 644 | struct mxr_device *mdev = layer->mdev; | ||
| 645 | int ret = 0; | ||
| 646 | |||
| 647 | mxr_dbg(mdev, "%s:%d\n", __func__, __LINE__); | ||
| 648 | /* assure device probe is finished */ | ||
| 649 | wait_for_device_probe(); | ||
| 650 | /* creating context for file descriptor */ | ||
| 651 | ret = v4l2_fh_open(file); | ||
| 652 | if (ret) { | ||
| 653 | mxr_err(mdev, "v4l2_fh_open failed\n"); | ||
| 654 | return ret; | ||
| 655 | } | ||
| 656 | |||
| 657 | /* leaving if layer is already initialized */ | ||
| 658 | if (!v4l2_fh_is_singular_file(file)) | ||
| 659 | return 0; | ||
| 660 | |||
| 661 | /* FIXME: should power be enabled on open? */ | ||
| 662 | ret = mxr_power_get(mdev); | ||
| 663 | if (ret) { | ||
| 664 | mxr_err(mdev, "power on failed\n"); | ||
| 665 | goto fail_fh_open; | ||
| 666 | } | ||
| 667 | |||
| 668 | ret = vb2_queue_init(&layer->vb_queue); | ||
| 669 | if (ret != 0) { | ||
| 670 | mxr_err(mdev, "failed to initialize vb2 queue\n"); | ||
| 671 | goto fail_power; | ||
| 672 | } | ||
| 673 | /* set default format, first on the list */ | ||
| 674 | layer->fmt = layer->fmt_array[0]; | ||
| 675 | /* setup default geometry */ | ||
| 676 | mxr_layer_default_geo(layer); | ||
| 677 | |||
| 678 | return 0; | ||
| 679 | |||
| 680 | fail_power: | ||
| 681 | mxr_power_put(mdev); | ||
| 682 | |||
| 683 | fail_fh_open: | ||
| 684 | v4l2_fh_release(file); | ||
| 685 | |||
| 686 | return ret; | ||
| 687 | } | ||
| 688 | |||
| 689 | static unsigned int | ||
| 690 | mxr_video_poll(struct file *file, struct poll_table_struct *wait) | ||
| 691 | { | ||
| 692 | struct mxr_layer *layer = video_drvdata(file); | ||
| 693 | |||
| 694 | mxr_dbg(layer->mdev, "%s:%d\n", __func__, __LINE__); | ||
| 695 | |||
| 696 | return vb2_poll(&layer->vb_queue, file, wait); | ||
| 697 | } | ||
| 698 | |||
| 699 | static int mxr_video_mmap(struct file *file, struct vm_area_struct *vma) | ||
| 700 | { | ||
| 701 | struct mxr_layer *layer = video_drvdata(file); | ||
| 702 | |||
| 703 | mxr_dbg(layer->mdev, "%s:%d\n", __func__, __LINE__); | ||
| 704 | |||
| 705 | return vb2_mmap(&layer->vb_queue, vma); | ||
| 706 | } | ||
| 707 | |||
| 708 | static int mxr_video_release(struct file *file) | ||
| 709 | { | ||
| 710 | struct mxr_layer *layer = video_drvdata(file); | ||
| 711 | |||
| 712 | mxr_dbg(layer->mdev, "%s:%d\n", __func__, __LINE__); | ||
| 713 | if (v4l2_fh_is_singular_file(file)) { | ||
| 714 | vb2_queue_release(&layer->vb_queue); | ||
| 715 | mxr_power_put(layer->mdev); | ||
| 716 | } | ||
| 717 | v4l2_fh_release(file); | ||
| 718 | return 0; | ||
| 719 | } | ||
| 720 | |||
| 721 | static const struct v4l2_file_operations mxr_fops = { | ||
| 722 | .owner = THIS_MODULE, | ||
| 723 | .open = mxr_video_open, | ||
| 724 | .poll = mxr_video_poll, | ||
| 725 | .mmap = mxr_video_mmap, | ||
| 726 | .release = mxr_video_release, | ||
| 727 | .unlocked_ioctl = video_ioctl2, | ||
| 728 | }; | ||
| 729 | |||
| 730 | static int queue_setup(struct vb2_queue *vq, unsigned int *nbuffers, | ||
| 731 | unsigned int *nplanes, unsigned long sizes[], | ||
| 732 | void *alloc_ctxs[]) | ||
| 733 | { | ||
| 734 | struct mxr_layer *layer = vb2_get_drv_priv(vq); | ||
| 735 | const struct mxr_format *fmt = layer->fmt; | ||
| 736 | int i; | ||
| 737 | struct mxr_device *mdev = layer->mdev; | ||
| 738 | struct v4l2_plane_pix_format planes[3]; | ||
| 739 | |||
| 740 | mxr_dbg(mdev, "%s\n", __func__); | ||
| 741 | /* checking if format was configured */ | ||
| 742 | if (fmt == NULL) | ||
| 743 | return -EINVAL; | ||
| 744 | mxr_dbg(mdev, "fmt = %s\n", fmt->name); | ||
| 745 | mxr_mplane_fill(planes, fmt, layer->geo.src.full_width, | ||
| 746 | layer->geo.src.full_height); | ||
| 747 | |||
| 748 | *nplanes = fmt->num_subframes; | ||
| 749 | for (i = 0; i < fmt->num_subframes; ++i) { | ||
| 750 | alloc_ctxs[i] = layer->mdev->alloc_ctx; | ||
| 751 | sizes[i] = PAGE_ALIGN(planes[i].sizeimage); | ||
| 752 | mxr_dbg(mdev, "size[%d] = %08lx\n", i, sizes[i]); | ||
| 753 | } | ||
| 754 | |||
| 755 | if (*nbuffers == 0) | ||
| 756 | *nbuffers = 1; | ||
| 757 | |||
| 758 | return 0; | ||
| 759 | } | ||
| 760 | |||
| 761 | static void buf_queue(struct vb2_buffer *vb) | ||
| 762 | { | ||
| 763 | struct mxr_buffer *buffer = container_of(vb, struct mxr_buffer, vb); | ||
| 764 | struct mxr_layer *layer = vb2_get_drv_priv(vb->vb2_queue); | ||
| 765 | struct mxr_device *mdev = layer->mdev; | ||
| 766 | unsigned long flags; | ||
| 767 | int must_start = 0; | ||
| 768 | |||
| 769 | spin_lock_irqsave(&layer->enq_slock, flags); | ||
| 770 | if (layer->state == MXR_LAYER_STREAMING_START) { | ||
| 771 | layer->state = MXR_LAYER_STREAMING; | ||
| 772 | must_start = 1; | ||
| 773 | } | ||
| 774 | list_add_tail(&buffer->list, &layer->enq_list); | ||
| 775 | spin_unlock_irqrestore(&layer->enq_slock, flags); | ||
| 776 | if (must_start) { | ||
| 777 | layer->ops.stream_set(layer, MXR_ENABLE); | ||
| 778 | mxr_streamer_get(mdev); | ||
| 779 | } | ||
| 780 | |||
| 781 | mxr_dbg(mdev, "queuing buffer\n"); | ||
| 782 | } | ||
| 783 | |||
| 784 | static void wait_lock(struct vb2_queue *vq) | ||
| 785 | { | ||
| 786 | struct mxr_layer *layer = vb2_get_drv_priv(vq); | ||
| 787 | |||
| 788 | mxr_dbg(layer->mdev, "%s\n", __func__); | ||
| 789 | mutex_lock(&layer->mutex); | ||
| 790 | } | ||
| 791 | |||
| 792 | static void wait_unlock(struct vb2_queue *vq) | ||
| 793 | { | ||
| 794 | struct mxr_layer *layer = vb2_get_drv_priv(vq); | ||
| 795 | |||
| 796 | mxr_dbg(layer->mdev, "%s\n", __func__); | ||
| 797 | mutex_unlock(&layer->mutex); | ||
| 798 | } | ||
| 799 | |||
| 800 | static int start_streaming(struct vb2_queue *vq) | ||
| 801 | { | ||
| 802 | struct mxr_layer *layer = vb2_get_drv_priv(vq); | ||
| 803 | struct mxr_device *mdev = layer->mdev; | ||
| 804 | unsigned long flags; | ||
| 805 | |||
| 806 | mxr_dbg(mdev, "%s\n", __func__); | ||
| 807 | /* block any changes in output configuration */ | ||
| 808 | mxr_output_get(mdev); | ||
| 809 | |||
| 810 | /* update layers geometry */ | ||
| 811 | mxr_layer_geo_fix(layer); | ||
| 812 | mxr_geometry_dump(mdev, &layer->geo); | ||
| 813 | |||
| 814 | layer->ops.format_set(layer); | ||
| 815 | /* enabling layer in hardware */ | ||
| 816 | spin_lock_irqsave(&layer->enq_slock, flags); | ||
| 817 | layer->state = MXR_LAYER_STREAMING_START; | ||
| 818 | spin_unlock_irqrestore(&layer->enq_slock, flags); | ||
| 819 | |||
| 820 | return 0; | ||
| 821 | } | ||
| 822 | |||
| 823 | static void mxr_watchdog(unsigned long arg) | ||
| 824 | { | ||
| 825 | struct mxr_layer *layer = (struct mxr_layer *) arg; | ||
| 826 | struct mxr_device *mdev = layer->mdev; | ||
| 827 | unsigned long flags; | ||
| 828 | |||
| 829 | mxr_err(mdev, "watchdog fired for layer %s\n", layer->vfd.name); | ||
| 830 | |||
| 831 | spin_lock_irqsave(&layer->enq_slock, flags); | ||
| 832 | |||
| 833 | if (layer->update_buf == layer->shadow_buf) | ||
| 834 | layer->update_buf = NULL; | ||
| 835 | if (layer->update_buf) { | ||
| 836 | vb2_buffer_done(&layer->update_buf->vb, VB2_BUF_STATE_ERROR); | ||
| 837 | layer->update_buf = NULL; | ||
| 838 | } | ||
| 839 | if (layer->shadow_buf) { | ||
| 840 | vb2_buffer_done(&layer->shadow_buf->vb, VB2_BUF_STATE_ERROR); | ||
| 841 | layer->shadow_buf = NULL; | ||
| 842 | } | ||
| 843 | spin_unlock_irqrestore(&layer->enq_slock, flags); | ||
| 844 | } | ||
| 845 | |||
| 846 | static int stop_streaming(struct vb2_queue *vq) | ||
| 847 | { | ||
| 848 | struct mxr_layer *layer = vb2_get_drv_priv(vq); | ||
| 849 | struct mxr_device *mdev = layer->mdev; | ||
| 850 | unsigned long flags; | ||
| 851 | struct timer_list watchdog; | ||
| 852 | struct mxr_buffer *buf, *buf_tmp; | ||
| 853 | |||
| 854 | mxr_dbg(mdev, "%s\n", __func__); | ||
| 855 | |||
| 856 | spin_lock_irqsave(&layer->enq_slock, flags); | ||
| 857 | |||
| 858 | /* reset list */ | ||
| 859 | layer->state = MXR_LAYER_STREAMING_FINISH; | ||
| 860 | |||
| 861 | /* set all buffer to be done */ | ||
| 862 | list_for_each_entry_safe(buf, buf_tmp, &layer->enq_list, list) { | ||
| 863 | list_del(&buf->list); | ||
| 864 | vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR); | ||
| 865 | } | ||
| 866 | |||
| 867 | spin_unlock_irqrestore(&layer->enq_slock, flags); | ||
| 868 | |||
| 869 | /* give 1 seconds to complete to complete last buffers */ | ||
| 870 | setup_timer_on_stack(&watchdog, mxr_watchdog, | ||
| 871 | (unsigned long)layer); | ||
| 872 | mod_timer(&watchdog, jiffies + msecs_to_jiffies(1000)); | ||
| 873 | |||
| 874 | /* wait until all buffers are goes to done state */ | ||
| 875 | vb2_wait_for_all_buffers(vq); | ||
| 876 | |||
| 877 | /* stop timer if all synchronization is done */ | ||
| 878 | del_timer_sync(&watchdog); | ||
| 879 | destroy_timer_on_stack(&watchdog); | ||
| 880 | |||
| 881 | /* stopping hardware */ | ||
| 882 | spin_lock_irqsave(&layer->enq_slock, flags); | ||
| 883 | layer->state = MXR_LAYER_IDLE; | ||
| 884 | spin_unlock_irqrestore(&layer->enq_slock, flags); | ||
| 885 | |||
| 886 | /* disabling layer in hardware */ | ||
| 887 | layer->ops.stream_set(layer, MXR_DISABLE); | ||
| 888 | /* remove one streamer */ | ||
| 889 | mxr_streamer_put(mdev); | ||
| 890 | /* allow changes in output configuration */ | ||
| 891 | mxr_output_put(mdev); | ||
| 892 | return 0; | ||
| 893 | } | ||
| 894 | |||
| 895 | static struct vb2_ops mxr_video_qops = { | ||
| 896 | .queue_setup = queue_setup, | ||
| 897 | .buf_queue = buf_queue, | ||
| 898 | .wait_prepare = wait_unlock, | ||
| 899 | .wait_finish = wait_lock, | ||
| 900 | .start_streaming = start_streaming, | ||
| 901 | .stop_streaming = stop_streaming, | ||
| 902 | }; | ||
| 903 | |||
| 904 | /* FIXME: try to put this functions to mxr_base_layer_create */ | ||
| 905 | int mxr_base_layer_register(struct mxr_layer *layer) | ||
| 906 | { | ||
| 907 | struct mxr_device *mdev = layer->mdev; | ||
| 908 | int ret; | ||
| 909 | |||
| 910 | ret = video_register_device(&layer->vfd, VFL_TYPE_GRABBER, -1); | ||
| 911 | if (ret) | ||
| 912 | mxr_err(mdev, "failed to register video device\n"); | ||
| 913 | else | ||
| 914 | mxr_info(mdev, "registered layer %s as /dev/video%d\n", | ||
| 915 | layer->vfd.name, layer->vfd.num); | ||
| 916 | return ret; | ||
| 917 | } | ||
| 918 | |||
| 919 | void mxr_base_layer_unregister(struct mxr_layer *layer) | ||
| 920 | { | ||
| 921 | video_unregister_device(&layer->vfd); | ||
| 922 | } | ||
| 923 | |||
| 924 | void mxr_layer_release(struct mxr_layer *layer) | ||
| 925 | { | ||
| 926 | if (layer->ops.release) | ||
| 927 | layer->ops.release(layer); | ||
| 928 | } | ||
| 929 | |||
| 930 | void mxr_base_layer_release(struct mxr_layer *layer) | ||
| 931 | { | ||
| 932 | kfree(layer); | ||
| 933 | } | ||
| 934 | |||
| 935 | static void mxr_vfd_release(struct video_device *vdev) | ||
| 936 | { | ||
| 937 | printk(KERN_INFO "video device release\n"); | ||
| 938 | } | ||
| 939 | |||
| 940 | struct mxr_layer *mxr_base_layer_create(struct mxr_device *mdev, | ||
| 941 | int idx, char *name, struct mxr_layer_ops *ops) | ||
| 942 | { | ||
| 943 | struct mxr_layer *layer; | ||
| 944 | |||
| 945 | layer = kzalloc(sizeof *layer, GFP_KERNEL); | ||
| 946 | if (layer == NULL) { | ||
| 947 | mxr_err(mdev, "not enough memory for layer.\n"); | ||
| 948 | goto fail; | ||
| 949 | } | ||
| 950 | |||
| 951 | layer->mdev = mdev; | ||
| 952 | layer->idx = idx; | ||
| 953 | layer->ops = *ops; | ||
| 954 | |||
| 955 | spin_lock_init(&layer->enq_slock); | ||
| 956 | INIT_LIST_HEAD(&layer->enq_list); | ||
| 957 | mutex_init(&layer->mutex); | ||
| 958 | |||
| 959 | layer->vfd = (struct video_device) { | ||
| 960 | .minor = -1, | ||
| 961 | .release = mxr_vfd_release, | ||
| 962 | .fops = &mxr_fops, | ||
| 963 | .ioctl_ops = &mxr_ioctl_ops, | ||
| 964 | }; | ||
| 965 | strlcpy(layer->vfd.name, name, sizeof(layer->vfd.name)); | ||
| 966 | /* let framework control PRIORITY */ | ||
| 967 | set_bit(V4L2_FL_USE_FH_PRIO, &layer->vfd.flags); | ||
| 968 | |||
| 969 | video_set_drvdata(&layer->vfd, layer); | ||
| 970 | layer->vfd.lock = &layer->mutex; | ||
| 971 | layer->vfd.v4l2_dev = &mdev->v4l2_dev; | ||
| 972 | |||
| 973 | layer->vb_queue = (struct vb2_queue) { | ||
| 974 | .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, | ||
| 975 | .io_modes = VB2_MMAP | VB2_USERPTR, | ||
| 976 | .drv_priv = layer, | ||
| 977 | .buf_struct_size = sizeof(struct mxr_buffer), | ||
| 978 | .ops = &mxr_video_qops, | ||
| 979 | .mem_ops = &vb2_dma_contig_memops, | ||
| 980 | }; | ||
| 981 | |||
| 982 | return layer; | ||
| 983 | |||
| 984 | fail: | ||
| 985 | return NULL; | ||
| 986 | } | ||
| 987 | |||
| 988 | static const struct mxr_format *find_format_by_fourcc( | ||
| 989 | struct mxr_layer *layer, unsigned long fourcc) | ||
| 990 | { | ||
| 991 | int i; | ||
| 992 | |||
| 993 | for (i = 0; i < layer->fmt_array_size; ++i) | ||
| 994 | if (layer->fmt_array[i]->fourcc == fourcc) | ||
| 995 | return layer->fmt_array[i]; | ||
| 996 | return NULL; | ||
| 997 | } | ||
| 998 | |||
| 999 | static const struct mxr_format *find_format_by_index( | ||
| 1000 | struct mxr_layer *layer, unsigned long index) | ||
| 1001 | { | ||
| 1002 | if (index >= layer->fmt_array_size) | ||
| 1003 | return NULL; | ||
| 1004 | return layer->fmt_array[index]; | ||
| 1005 | } | ||
| 1006 | |||
diff --git a/drivers/media/video/s5p-tv/mixer_vp_layer.c b/drivers/media/video/s5p-tv/mixer_vp_layer.c new file mode 100644 index 000000000000..6950ed8ac1a0 --- /dev/null +++ b/drivers/media/video/s5p-tv/mixer_vp_layer.c | |||
| @@ -0,0 +1,211 @@ | |||
| 1 | /* | ||
| 2 | * Samsung TV Mixer driver | ||
| 3 | * | ||
| 4 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
| 5 | * | ||
| 6 | * Tomasz Stanislawski, <t.stanislaws@samsung.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License as published | ||
| 10 | * by the Free Software Foundiation. either version 2 of the License, | ||
| 11 | * or (at your option) any later version | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include "mixer.h" | ||
| 15 | |||
| 16 | #include "regs-vp.h" | ||
| 17 | |||
| 18 | #include <media/videobuf2-dma-contig.h> | ||
| 19 | |||
| 20 | /* FORMAT DEFINITIONS */ | ||
| 21 | static const struct mxr_format mxr_fmt_nv12 = { | ||
| 22 | .name = "NV12", | ||
| 23 | .fourcc = V4L2_PIX_FMT_NV12, | ||
| 24 | .colorspace = V4L2_COLORSPACE_JPEG, | ||
| 25 | .num_planes = 2, | ||
| 26 | .plane = { | ||
| 27 | { .width = 1, .height = 1, .size = 1 }, | ||
| 28 | { .width = 2, .height = 2, .size = 2 }, | ||
| 29 | }, | ||
| 30 | .num_subframes = 1, | ||
| 31 | .cookie = VP_MODE_NV12 | VP_MODE_MEM_LINEAR, | ||
| 32 | }; | ||
| 33 | |||
| 34 | static const struct mxr_format mxr_fmt_nv21 = { | ||
| 35 | .name = "NV21", | ||
| 36 | .fourcc = V4L2_PIX_FMT_NV21, | ||
| 37 | .colorspace = V4L2_COLORSPACE_JPEG, | ||
| 38 | .num_planes = 2, | ||
| 39 | .plane = { | ||
| 40 | { .width = 1, .height = 1, .size = 1 }, | ||
| 41 | { .width = 2, .height = 2, .size = 2 }, | ||
| 42 | }, | ||
| 43 | .num_subframes = 1, | ||
| 44 | .cookie = VP_MODE_NV21 | VP_MODE_MEM_LINEAR, | ||
| 45 | }; | ||
| 46 | |||
| 47 | static const struct mxr_format mxr_fmt_nv12m = { | ||
| 48 | .name = "NV12 (mplane)", | ||
| 49 | .fourcc = V4L2_PIX_FMT_NV12M, | ||
| 50 | .colorspace = V4L2_COLORSPACE_JPEG, | ||
| 51 | .num_planes = 2, | ||
| 52 | .plane = { | ||
| 53 | { .width = 1, .height = 1, .size = 1 }, | ||
| 54 | { .width = 2, .height = 2, .size = 2 }, | ||
| 55 | }, | ||
| 56 | .num_subframes = 2, | ||
| 57 | .plane2subframe = {0, 1}, | ||
| 58 | .cookie = VP_MODE_NV12 | VP_MODE_MEM_LINEAR, | ||
| 59 | }; | ||
| 60 | |||
| 61 | static const struct mxr_format mxr_fmt_nv12mt = { | ||
| 62 | .name = "NV12 tiled (mplane)", | ||
| 63 | .fourcc = V4L2_PIX_FMT_NV12MT, | ||
| 64 | .colorspace = V4L2_COLORSPACE_JPEG, | ||
| 65 | .num_planes = 2, | ||
| 66 | .plane = { | ||
| 67 | { .width = 128, .height = 32, .size = 4096 }, | ||
| 68 | { .width = 128, .height = 32, .size = 2048 }, | ||
| 69 | }, | ||
| 70 | .num_subframes = 2, | ||
| 71 | .plane2subframe = {0, 1}, | ||
| 72 | .cookie = VP_MODE_NV12 | VP_MODE_MEM_TILED, | ||
| 73 | }; | ||
| 74 | |||
| 75 | static const struct mxr_format *mxr_video_format[] = { | ||
| 76 | &mxr_fmt_nv12, | ||
| 77 | &mxr_fmt_nv21, | ||
| 78 | &mxr_fmt_nv12m, | ||
| 79 | &mxr_fmt_nv12mt, | ||
| 80 | }; | ||
| 81 | |||
| 82 | /* AUXILIARY CALLBACKS */ | ||
| 83 | |||
| 84 | static void mxr_vp_layer_release(struct mxr_layer *layer) | ||
| 85 | { | ||
| 86 | mxr_base_layer_unregister(layer); | ||
| 87 | mxr_base_layer_release(layer); | ||
| 88 | } | ||
| 89 | |||
| 90 | static void mxr_vp_buffer_set(struct mxr_layer *layer, | ||
| 91 | struct mxr_buffer *buf) | ||
| 92 | { | ||
| 93 | dma_addr_t luma_addr[2] = {0, 0}; | ||
| 94 | dma_addr_t chroma_addr[2] = {0, 0}; | ||
| 95 | |||
| 96 | if (buf == NULL) { | ||
| 97 | mxr_reg_vp_buffer(layer->mdev, luma_addr, chroma_addr); | ||
| 98 | return; | ||
| 99 | } | ||
| 100 | luma_addr[0] = vb2_dma_contig_plane_paddr(&buf->vb, 0); | ||
| 101 | if (layer->fmt->num_subframes == 2) { | ||
| 102 | chroma_addr[0] = vb2_dma_contig_plane_paddr(&buf->vb, 1); | ||
| 103 | } else { | ||
| 104 | /* FIXME: mxr_get_plane_size compute integer division, | ||
| 105 | * which is slow and should not be performed in interrupt */ | ||
| 106 | chroma_addr[0] = luma_addr[0] + mxr_get_plane_size( | ||
| 107 | &layer->fmt->plane[0], layer->geo.src.full_width, | ||
| 108 | layer->geo.src.full_height); | ||
| 109 | } | ||
| 110 | if (layer->fmt->cookie & VP_MODE_MEM_TILED) { | ||
| 111 | luma_addr[1] = luma_addr[0] + 0x40; | ||
| 112 | chroma_addr[1] = chroma_addr[0] + 0x40; | ||
| 113 | } else { | ||
| 114 | luma_addr[1] = luma_addr[0] + layer->geo.src.full_width; | ||
| 115 | chroma_addr[1] = chroma_addr[0]; | ||
| 116 | } | ||
| 117 | mxr_reg_vp_buffer(layer->mdev, luma_addr, chroma_addr); | ||
| 118 | } | ||
| 119 | |||
| 120 | static void mxr_vp_stream_set(struct mxr_layer *layer, int en) | ||
| 121 | { | ||
| 122 | mxr_reg_vp_layer_stream(layer->mdev, en); | ||
| 123 | } | ||
| 124 | |||
| 125 | static void mxr_vp_format_set(struct mxr_layer *layer) | ||
| 126 | { | ||
| 127 | mxr_reg_vp_format(layer->mdev, layer->fmt, &layer->geo); | ||
| 128 | } | ||
| 129 | |||
| 130 | static void mxr_vp_fix_geometry(struct mxr_layer *layer) | ||
| 131 | { | ||
| 132 | struct mxr_geometry *geo = &layer->geo; | ||
| 133 | |||
| 134 | /* align horizontal size to 8 pixels */ | ||
| 135 | geo->src.full_width = ALIGN(geo->src.full_width, 8); | ||
| 136 | /* limit to boundary size */ | ||
| 137 | geo->src.full_width = clamp_val(geo->src.full_width, 8, 8192); | ||
| 138 | geo->src.full_height = clamp_val(geo->src.full_height, 1, 8192); | ||
| 139 | geo->src.width = clamp_val(geo->src.width, 32, geo->src.full_width); | ||
| 140 | geo->src.width = min(geo->src.width, 2047U); | ||
| 141 | geo->src.height = clamp_val(geo->src.height, 4, geo->src.full_height); | ||
| 142 | geo->src.height = min(geo->src.height, 2047U); | ||
| 143 | |||
| 144 | /* setting size of output window */ | ||
| 145 | geo->dst.width = clamp_val(geo->dst.width, 8, geo->dst.full_width); | ||
| 146 | geo->dst.height = clamp_val(geo->dst.height, 1, geo->dst.full_height); | ||
| 147 | |||
| 148 | /* ensure that scaling is in range 1/4x to 16x */ | ||
| 149 | if (geo->src.width >= 4 * geo->dst.width) | ||
| 150 | geo->src.width = 4 * geo->dst.width; | ||
| 151 | if (geo->dst.width >= 16 * geo->src.width) | ||
| 152 | geo->dst.width = 16 * geo->src.width; | ||
| 153 | if (geo->src.height >= 4 * geo->dst.height) | ||
| 154 | geo->src.height = 4 * geo->dst.height; | ||
| 155 | if (geo->dst.height >= 16 * geo->src.height) | ||
| 156 | geo->dst.height = 16 * geo->src.height; | ||
| 157 | |||
| 158 | /* setting scaling ratio */ | ||
| 159 | geo->x_ratio = (geo->src.width << 16) / geo->dst.width; | ||
| 160 | geo->y_ratio = (geo->src.height << 16) / geo->dst.height; | ||
| 161 | |||
| 162 | /* adjust offsets */ | ||
| 163 | geo->src.x_offset = min(geo->src.x_offset, | ||
| 164 | geo->src.full_width - geo->src.width); | ||
| 165 | geo->src.y_offset = min(geo->src.y_offset, | ||
| 166 | geo->src.full_height - geo->src.height); | ||
| 167 | geo->dst.x_offset = min(geo->dst.x_offset, | ||
| 168 | geo->dst.full_width - geo->dst.width); | ||
| 169 | geo->dst.y_offset = min(geo->dst.y_offset, | ||
| 170 | geo->dst.full_height - geo->dst.height); | ||
| 171 | } | ||
| 172 | |||
| 173 | /* PUBLIC API */ | ||
| 174 | |||
| 175 | struct mxr_layer *mxr_vp_layer_create(struct mxr_device *mdev, int idx) | ||
| 176 | { | ||
| 177 | struct mxr_layer *layer; | ||
| 178 | int ret; | ||
| 179 | struct mxr_layer_ops ops = { | ||
| 180 | .release = mxr_vp_layer_release, | ||
| 181 | .buffer_set = mxr_vp_buffer_set, | ||
| 182 | .stream_set = mxr_vp_stream_set, | ||
| 183 | .format_set = mxr_vp_format_set, | ||
| 184 | .fix_geometry = mxr_vp_fix_geometry, | ||
| 185 | }; | ||
| 186 | char name[32]; | ||
| 187 | |||
| 188 | sprintf(name, "video%d", idx); | ||
| 189 | |||
| 190 | layer = mxr_base_layer_create(mdev, idx, name, &ops); | ||
| 191 | if (layer == NULL) { | ||
| 192 | mxr_err(mdev, "failed to initialize layer(%d) base\n", idx); | ||
| 193 | goto fail; | ||
| 194 | } | ||
| 195 | |||
| 196 | layer->fmt_array = mxr_video_format; | ||
| 197 | layer->fmt_array_size = ARRAY_SIZE(mxr_video_format); | ||
| 198 | |||
| 199 | ret = mxr_base_layer_register(layer); | ||
| 200 | if (ret) | ||
| 201 | goto fail_layer; | ||
| 202 | |||
| 203 | return layer; | ||
| 204 | |||
| 205 | fail_layer: | ||
| 206 | mxr_base_layer_release(layer); | ||
| 207 | |||
| 208 | fail: | ||
| 209 | return NULL; | ||
| 210 | } | ||
| 211 | |||
diff --git a/drivers/media/video/s5p-tv/regs-hdmi.h b/drivers/media/video/s5p-tv/regs-hdmi.h new file mode 100644 index 000000000000..ac93ad6f2bc3 --- /dev/null +++ b/drivers/media/video/s5p-tv/regs-hdmi.h | |||
| @@ -0,0 +1,141 @@ | |||
| 1 | /* linux/arch/arm/mach-exynos4/include/mach/regs-hdmi.h | ||
| 2 | * | ||
| 3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
| 4 | * http://www.samsung.com/ | ||
| 5 | * | ||
| 6 | * HDMI register header file for Samsung TVOUT driver | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #ifndef SAMSUNG_REGS_HDMI_H | ||
| 14 | #define SAMSUNG_REGS_HDMI_H | ||
| 15 | |||
| 16 | /* | ||
| 17 | * Register part | ||
| 18 | */ | ||
| 19 | |||
| 20 | #define HDMI_CTRL_BASE(x) ((x) + 0x00000000) | ||
| 21 | #define HDMI_CORE_BASE(x) ((x) + 0x00010000) | ||
| 22 | #define HDMI_TG_BASE(x) ((x) + 0x00050000) | ||
| 23 | |||
| 24 | /* Control registers */ | ||
| 25 | #define HDMI_INTC_CON HDMI_CTRL_BASE(0x0000) | ||
| 26 | #define HDMI_INTC_FLAG HDMI_CTRL_BASE(0x0004) | ||
| 27 | #define HDMI_HPD_STATUS HDMI_CTRL_BASE(0x000C) | ||
| 28 | #define HDMI_PHY_RSTOUT HDMI_CTRL_BASE(0x0014) | ||
| 29 | #define HDMI_PHY_VPLL HDMI_CTRL_BASE(0x0018) | ||
| 30 | #define HDMI_PHY_CMU HDMI_CTRL_BASE(0x001C) | ||
| 31 | #define HDMI_CORE_RSTOUT HDMI_CTRL_BASE(0x0020) | ||
| 32 | |||
| 33 | /* Core registers */ | ||
| 34 | #define HDMI_CON_0 HDMI_CORE_BASE(0x0000) | ||
| 35 | #define HDMI_CON_1 HDMI_CORE_BASE(0x0004) | ||
| 36 | #define HDMI_CON_2 HDMI_CORE_BASE(0x0008) | ||
| 37 | #define HDMI_SYS_STATUS HDMI_CORE_BASE(0x0010) | ||
| 38 | #define HDMI_PHY_STATUS HDMI_CORE_BASE(0x0014) | ||
| 39 | #define HDMI_STATUS_EN HDMI_CORE_BASE(0x0020) | ||
| 40 | #define HDMI_HPD HDMI_CORE_BASE(0x0030) | ||
| 41 | #define HDMI_MODE_SEL HDMI_CORE_BASE(0x0040) | ||
| 42 | #define HDMI_BLUE_SCREEN_0 HDMI_CORE_BASE(0x0050) | ||
| 43 | #define HDMI_BLUE_SCREEN_1 HDMI_CORE_BASE(0x0054) | ||
| 44 | #define HDMI_BLUE_SCREEN_2 HDMI_CORE_BASE(0x0058) | ||
| 45 | #define HDMI_H_BLANK_0 HDMI_CORE_BASE(0x00A0) | ||
| 46 | #define HDMI_H_BLANK_1 HDMI_CORE_BASE(0x00A4) | ||
| 47 | #define HDMI_V_BLANK_0 HDMI_CORE_BASE(0x00B0) | ||
| 48 | #define HDMI_V_BLANK_1 HDMI_CORE_BASE(0x00B4) | ||
| 49 | #define HDMI_V_BLANK_2 HDMI_CORE_BASE(0x00B8) | ||
| 50 | #define HDMI_H_V_LINE_0 HDMI_CORE_BASE(0x00C0) | ||
| 51 | #define HDMI_H_V_LINE_1 HDMI_CORE_BASE(0x00C4) | ||
| 52 | #define HDMI_H_V_LINE_2 HDMI_CORE_BASE(0x00C8) | ||
| 53 | #define HDMI_VSYNC_POL HDMI_CORE_BASE(0x00E4) | ||
| 54 | #define HDMI_INT_PRO_MODE HDMI_CORE_BASE(0x00E8) | ||
| 55 | #define HDMI_V_BLANK_F_0 HDMI_CORE_BASE(0x0110) | ||
| 56 | #define HDMI_V_BLANK_F_1 HDMI_CORE_BASE(0x0114) | ||
| 57 | #define HDMI_V_BLANK_F_2 HDMI_CORE_BASE(0x0118) | ||
| 58 | #define HDMI_H_SYNC_GEN_0 HDMI_CORE_BASE(0x0120) | ||
| 59 | #define HDMI_H_SYNC_GEN_1 HDMI_CORE_BASE(0x0124) | ||
| 60 | #define HDMI_H_SYNC_GEN_2 HDMI_CORE_BASE(0x0128) | ||
| 61 | #define HDMI_V_SYNC_GEN_1_0 HDMI_CORE_BASE(0x0130) | ||
| 62 | #define HDMI_V_SYNC_GEN_1_1 HDMI_CORE_BASE(0x0134) | ||
| 63 | #define HDMI_V_SYNC_GEN_1_2 HDMI_CORE_BASE(0x0138) | ||
| 64 | #define HDMI_V_SYNC_GEN_2_0 HDMI_CORE_BASE(0x0140) | ||
| 65 | #define HDMI_V_SYNC_GEN_2_1 HDMI_CORE_BASE(0x0144) | ||
| 66 | #define HDMI_V_SYNC_GEN_2_2 HDMI_CORE_BASE(0x0148) | ||
| 67 | #define HDMI_V_SYNC_GEN_3_0 HDMI_CORE_BASE(0x0150) | ||
| 68 | #define HDMI_V_SYNC_GEN_3_1 HDMI_CORE_BASE(0x0154) | ||
| 69 | #define HDMI_V_SYNC_GEN_3_2 HDMI_CORE_BASE(0x0158) | ||
| 70 | #define HDMI_AVI_CON HDMI_CORE_BASE(0x0300) | ||
| 71 | #define HDMI_AVI_BYTE(n) HDMI_CORE_BASE(0x0320 + 4 * (n)) | ||
| 72 | #define HDMI_DC_CONTROL HDMI_CORE_BASE(0x05C0) | ||
| 73 | #define HDMI_VIDEO_PATTERN_GEN HDMI_CORE_BASE(0x05C4) | ||
| 74 | #define HDMI_HPD_GEN HDMI_CORE_BASE(0x05C8) | ||
| 75 | |||
| 76 | /* Timing generator registers */ | ||
| 77 | #define HDMI_TG_CMD HDMI_TG_BASE(0x0000) | ||
| 78 | #define HDMI_TG_H_FSZ_L HDMI_TG_BASE(0x0018) | ||
| 79 | #define HDMI_TG_H_FSZ_H HDMI_TG_BASE(0x001C) | ||
| 80 | #define HDMI_TG_HACT_ST_L HDMI_TG_BASE(0x0020) | ||
| 81 | #define HDMI_TG_HACT_ST_H HDMI_TG_BASE(0x0024) | ||
| 82 | #define HDMI_TG_HACT_SZ_L HDMI_TG_BASE(0x0028) | ||
| 83 | #define HDMI_TG_HACT_SZ_H HDMI_TG_BASE(0x002C) | ||
| 84 | #define HDMI_TG_V_FSZ_L HDMI_TG_BASE(0x0030) | ||
| 85 | #define HDMI_TG_V_FSZ_H HDMI_TG_BASE(0x0034) | ||
| 86 | #define HDMI_TG_VSYNC_L HDMI_TG_BASE(0x0038) | ||
| 87 | #define HDMI_TG_VSYNC_H HDMI_TG_BASE(0x003C) | ||
| 88 | #define HDMI_TG_VSYNC2_L HDMI_TG_BASE(0x0040) | ||
| 89 | #define HDMI_TG_VSYNC2_H HDMI_TG_BASE(0x0044) | ||
| 90 | #define HDMI_TG_VACT_ST_L HDMI_TG_BASE(0x0048) | ||
| 91 | #define HDMI_TG_VACT_ST_H HDMI_TG_BASE(0x004C) | ||
| 92 | #define HDMI_TG_VACT_SZ_L HDMI_TG_BASE(0x0050) | ||
| 93 | #define HDMI_TG_VACT_SZ_H HDMI_TG_BASE(0x0054) | ||
| 94 | #define HDMI_TG_FIELD_CHG_L HDMI_TG_BASE(0x0058) | ||
| 95 | #define HDMI_TG_FIELD_CHG_H HDMI_TG_BASE(0x005C) | ||
| 96 | #define HDMI_TG_VACT_ST2_L HDMI_TG_BASE(0x0060) | ||
| 97 | #define HDMI_TG_VACT_ST2_H HDMI_TG_BASE(0x0064) | ||
| 98 | #define HDMI_TG_VSYNC_TOP_HDMI_L HDMI_TG_BASE(0x0078) | ||
| 99 | #define HDMI_TG_VSYNC_TOP_HDMI_H HDMI_TG_BASE(0x007C) | ||
| 100 | #define HDMI_TG_VSYNC_BOT_HDMI_L HDMI_TG_BASE(0x0080) | ||
| 101 | #define HDMI_TG_VSYNC_BOT_HDMI_H HDMI_TG_BASE(0x0084) | ||
| 102 | #define HDMI_TG_FIELD_TOP_HDMI_L HDMI_TG_BASE(0x0088) | ||
| 103 | #define HDMI_TG_FIELD_TOP_HDMI_H HDMI_TG_BASE(0x008C) | ||
| 104 | #define HDMI_TG_FIELD_BOT_HDMI_L HDMI_TG_BASE(0x0090) | ||
| 105 | #define HDMI_TG_FIELD_BOT_HDMI_H HDMI_TG_BASE(0x0094) | ||
| 106 | |||
| 107 | /* | ||
| 108 | * Bit definition part | ||
| 109 | */ | ||
| 110 | |||
| 111 | /* HDMI_INTC_CON */ | ||
| 112 | #define HDMI_INTC_EN_GLOBAL (1 << 6) | ||
| 113 | #define HDMI_INTC_EN_HPD_PLUG (1 << 3) | ||
| 114 | #define HDMI_INTC_EN_HPD_UNPLUG (1 << 2) | ||
| 115 | |||
| 116 | /* HDMI_INTC_FLAG */ | ||
| 117 | #define HDMI_INTC_FLAG_HPD_PLUG (1 << 3) | ||
| 118 | #define HDMI_INTC_FLAG_HPD_UNPLUG (1 << 2) | ||
| 119 | |||
| 120 | /* HDMI_PHY_RSTOUT */ | ||
| 121 | #define HDMI_PHY_SW_RSTOUT (1 << 0) | ||
| 122 | |||
| 123 | /* HDMI_CORE_RSTOUT */ | ||
| 124 | #define HDMI_CORE_SW_RSTOUT (1 << 0) | ||
| 125 | |||
| 126 | /* HDMI_CON_0 */ | ||
| 127 | #define HDMI_BLUE_SCR_EN (1 << 5) | ||
| 128 | #define HDMI_EN (1 << 0) | ||
| 129 | |||
| 130 | /* HDMI_PHY_STATUS */ | ||
| 131 | #define HDMI_PHY_STATUS_READY (1 << 0) | ||
| 132 | |||
| 133 | /* HDMI_MODE_SEL */ | ||
| 134 | #define HDMI_MODE_HDMI_EN (1 << 1) | ||
| 135 | #define HDMI_MODE_DVI_EN (1 << 0) | ||
| 136 | #define HDMI_MODE_MASK (3 << 0) | ||
| 137 | |||
| 138 | /* HDMI_TG_CMD */ | ||
| 139 | #define HDMI_TG_EN (1 << 0) | ||
| 140 | |||
| 141 | #endif /* SAMSUNG_REGS_HDMI_H */ | ||
diff --git a/drivers/media/video/s5p-tv/regs-mixer.h b/drivers/media/video/s5p-tv/regs-mixer.h new file mode 100644 index 000000000000..3c8442609c1a --- /dev/null +++ b/drivers/media/video/s5p-tv/regs-mixer.h | |||
| @@ -0,0 +1,121 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
| 3 | * http://www.samsung.com/ | ||
| 4 | * | ||
| 5 | * Mixer register header file for Samsung Mixer driver | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | */ | ||
| 11 | #ifndef SAMSUNG_REGS_MIXER_H | ||
| 12 | #define SAMSUNG_REGS_MIXER_H | ||
| 13 | |||
| 14 | /* | ||
| 15 | * Register part | ||
| 16 | */ | ||
| 17 | #define MXR_STATUS 0x0000 | ||
| 18 | #define MXR_CFG 0x0004 | ||
| 19 | #define MXR_INT_EN 0x0008 | ||
| 20 | #define MXR_INT_STATUS 0x000C | ||
| 21 | #define MXR_LAYER_CFG 0x0010 | ||
| 22 | #define MXR_VIDEO_CFG 0x0014 | ||
| 23 | #define MXR_GRAPHIC0_CFG 0x0020 | ||
| 24 | #define MXR_GRAPHIC0_BASE 0x0024 | ||
| 25 | #define MXR_GRAPHIC0_SPAN 0x0028 | ||
| 26 | #define MXR_GRAPHIC0_SXY 0x002C | ||
| 27 | #define MXR_GRAPHIC0_WH 0x0030 | ||
| 28 | #define MXR_GRAPHIC0_DXY 0x0034 | ||
| 29 | #define MXR_GRAPHIC0_BLANK 0x0038 | ||
| 30 | #define MXR_GRAPHIC1_CFG 0x0040 | ||
| 31 | #define MXR_GRAPHIC1_BASE 0x0044 | ||
| 32 | #define MXR_GRAPHIC1_SPAN 0x0048 | ||
| 33 | #define MXR_GRAPHIC1_SXY 0x004C | ||
| 34 | #define MXR_GRAPHIC1_WH 0x0050 | ||
| 35 | #define MXR_GRAPHIC1_DXY 0x0054 | ||
| 36 | #define MXR_GRAPHIC1_BLANK 0x0058 | ||
| 37 | #define MXR_BG_CFG 0x0060 | ||
| 38 | #define MXR_BG_COLOR0 0x0064 | ||
| 39 | #define MXR_BG_COLOR1 0x0068 | ||
| 40 | #define MXR_BG_COLOR2 0x006C | ||
| 41 | |||
| 42 | /* for parametrized access to layer registers */ | ||
| 43 | #define MXR_GRAPHIC_CFG(i) (0x0020 + (i) * 0x20) | ||
| 44 | #define MXR_GRAPHIC_BASE(i) (0x0024 + (i) * 0x20) | ||
| 45 | #define MXR_GRAPHIC_SPAN(i) (0x0028 + (i) * 0x20) | ||
| 46 | #define MXR_GRAPHIC_SXY(i) (0x002C + (i) * 0x20) | ||
| 47 | #define MXR_GRAPHIC_WH(i) (0x0030 + (i) * 0x20) | ||
| 48 | #define MXR_GRAPHIC_DXY(i) (0x0034 + (i) * 0x20) | ||
| 49 | |||
| 50 | /* | ||
| 51 | * Bit definition part | ||
| 52 | */ | ||
| 53 | |||
| 54 | /* generates mask for range of bits */ | ||
| 55 | #define MXR_MASK(high_bit, low_bit) \ | ||
| 56 | (((2 << ((high_bit) - (low_bit))) - 1) << (low_bit)) | ||
| 57 | |||
| 58 | #define MXR_MASK_VAL(val, high_bit, low_bit) \ | ||
| 59 | (((val) << (low_bit)) & MXR_MASK(high_bit, low_bit)) | ||
| 60 | |||
| 61 | /* bits for MXR_STATUS */ | ||
| 62 | #define MXR_STATUS_16_BURST (1 << 7) | ||
| 63 | #define MXR_STATUS_BURST_MASK (1 << 7) | ||
| 64 | #define MXR_STATUS_SYNC_ENABLE (1 << 2) | ||
| 65 | #define MXR_STATUS_REG_RUN (1 << 0) | ||
| 66 | |||
| 67 | /* bits for MXR_CFG */ | ||
| 68 | #define MXR_CFG_OUT_YUV444 (0 << 8) | ||
| 69 | #define MXR_CFG_OUT_RGB888 (1 << 8) | ||
| 70 | #define MXR_CFG_DST_SDO (0 << 7) | ||
| 71 | #define MXR_CFG_DST_HDMI (1 << 7) | ||
| 72 | #define MXR_CFG_DST_MASK (1 << 7) | ||
| 73 | #define MXR_CFG_SCAN_HD_720 (0 << 6) | ||
| 74 | #define MXR_CFG_SCAN_HD_1080 (1 << 6) | ||
| 75 | #define MXR_CFG_GRP1_ENABLE (1 << 5) | ||
| 76 | #define MXR_CFG_GRP0_ENABLE (1 << 4) | ||
| 77 | #define MXR_CFG_VP_ENABLE (1 << 3) | ||
| 78 | #define MXR_CFG_SCAN_INTERLACE (0 << 2) | ||
| 79 | #define MXR_CFG_SCAN_PROGRASSIVE (1 << 2) | ||
| 80 | #define MXR_CFG_SCAN_NTSC (0 << 1) | ||
| 81 | #define MXR_CFG_SCAN_PAL (1 << 1) | ||
| 82 | #define MXR_CFG_SCAN_SD (0 << 0) | ||
| 83 | #define MXR_CFG_SCAN_HD (1 << 0) | ||
| 84 | #define MXR_CFG_SCAN_MASK 0x47 | ||
| 85 | |||
| 86 | /* bits for MXR_GRAPHICn_CFG */ | ||
| 87 | #define MXR_GRP_CFG_COLOR_KEY_DISABLE (1 << 21) | ||
| 88 | #define MXR_GRP_CFG_BLEND_PRE_MUL (1 << 20) | ||
| 89 | #define MXR_GRP_CFG_FORMAT_VAL(x) MXR_MASK_VAL(x, 11, 8) | ||
| 90 | #define MXR_GRP_CFG_FORMAT_MASK MXR_GRP_CFG_FORMAT_VAL(~0) | ||
| 91 | #define MXR_GRP_CFG_ALPHA_VAL(x) MXR_MASK_VAL(x, 7, 0) | ||
| 92 | |||
| 93 | /* bits for MXR_GRAPHICn_WH */ | ||
| 94 | #define MXR_GRP_WH_H_SCALE(x) MXR_MASK_VAL(x, 28, 28) | ||
| 95 | #define MXR_GRP_WH_V_SCALE(x) MXR_MASK_VAL(x, 12, 12) | ||
| 96 | #define MXR_GRP_WH_WIDTH(x) MXR_MASK_VAL(x, 26, 16) | ||
| 97 | #define MXR_GRP_WH_HEIGHT(x) MXR_MASK_VAL(x, 10, 0) | ||
| 98 | |||
| 99 | /* bits for MXR_GRAPHICn_SXY */ | ||
| 100 | #define MXR_GRP_SXY_SX(x) MXR_MASK_VAL(x, 26, 16) | ||
| 101 | #define MXR_GRP_SXY_SY(x) MXR_MASK_VAL(x, 10, 0) | ||
| 102 | |||
| 103 | /* bits for MXR_GRAPHICn_DXY */ | ||
| 104 | #define MXR_GRP_DXY_DX(x) MXR_MASK_VAL(x, 26, 16) | ||
| 105 | #define MXR_GRP_DXY_DY(x) MXR_MASK_VAL(x, 10, 0) | ||
| 106 | |||
| 107 | /* bits for MXR_INT_EN */ | ||
| 108 | #define MXR_INT_EN_VSYNC (1 << 11) | ||
| 109 | #define MXR_INT_EN_ALL (0x0f << 8) | ||
| 110 | |||
| 111 | /* bit for MXR_INT_STATUS */ | ||
| 112 | #define MXR_INT_CLEAR_VSYNC (1 << 11) | ||
| 113 | #define MXR_INT_STATUS_VSYNC (1 << 0) | ||
| 114 | |||
| 115 | /* bit for MXR_LAYER_CFG */ | ||
| 116 | #define MXR_LAYER_CFG_GRP1_VAL(x) MXR_MASK_VAL(x, 11, 8) | ||
| 117 | #define MXR_LAYER_CFG_GRP0_VAL(x) MXR_MASK_VAL(x, 7, 4) | ||
| 118 | #define MXR_LAYER_CFG_VP_VAL(x) MXR_MASK_VAL(x, 3, 0) | ||
| 119 | |||
| 120 | #endif /* SAMSUNG_REGS_MIXER_H */ | ||
| 121 | |||
diff --git a/drivers/media/video/s5p-tv/regs-sdo.h b/drivers/media/video/s5p-tv/regs-sdo.h new file mode 100644 index 000000000000..7f7c2b8ac140 --- /dev/null +++ b/drivers/media/video/s5p-tv/regs-sdo.h | |||
| @@ -0,0 +1,63 @@ | |||
| 1 | /* drivers/media/video/s5p-tv/regs-sdo.h | ||
| 2 | * | ||
| 3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
| 4 | * http://www.samsung.com/ | ||
| 5 | * | ||
| 6 | * SDO register description file | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License version 2 as | ||
| 10 | * published by the Free Software Foundation. | ||
| 11 | */ | ||
| 12 | |||
| 13 | #ifndef SAMSUNG_REGS_SDO_H | ||
| 14 | #define SAMSUNG_REGS_SDO_H | ||
| 15 | |||
| 16 | /* | ||
| 17 | * Register part | ||
| 18 | */ | ||
| 19 | |||
| 20 | #define SDO_CLKCON 0x0000 | ||
| 21 | #define SDO_CONFIG 0x0008 | ||
| 22 | #define SDO_VBI 0x0014 | ||
| 23 | #define SDO_DAC 0x003C | ||
| 24 | #define SDO_CCCON 0x0180 | ||
| 25 | #define SDO_IRQ 0x0280 | ||
| 26 | #define SDO_IRQMASK 0x0284 | ||
| 27 | #define SDO_VERSION 0x03D8 | ||
| 28 | |||
| 29 | /* | ||
| 30 | * Bit definition part | ||
| 31 | */ | ||
| 32 | |||
| 33 | /* SDO Clock Control Register (SDO_CLKCON) */ | ||
| 34 | #define SDO_TVOUT_SW_RESET (1 << 4) | ||
| 35 | #define SDO_TVOUT_CLOCK_READY (1 << 1) | ||
| 36 | #define SDO_TVOUT_CLOCK_ON (1 << 0) | ||
| 37 | |||
| 38 | /* SDO Video Standard Configuration Register (SDO_CONFIG) */ | ||
| 39 | #define SDO_PROGRESSIVE (1 << 4) | ||
| 40 | #define SDO_NTSC_M 0 | ||
| 41 | #define SDO_PAL_M 1 | ||
| 42 | #define SDO_PAL_BGHID 2 | ||
| 43 | #define SDO_PAL_N 3 | ||
| 44 | #define SDO_PAL_NC 4 | ||
| 45 | #define SDO_NTSC_443 8 | ||
| 46 | #define SDO_PAL_60 9 | ||
| 47 | #define SDO_STANDARD_MASK 0xf | ||
| 48 | |||
| 49 | /* SDO VBI Configuration Register (SDO_VBI) */ | ||
| 50 | #define SDO_CVBS_WSS_INS (1 << 14) | ||
| 51 | #define SDO_CVBS_CLOSED_CAPTION_MASK (3 << 12) | ||
| 52 | |||
| 53 | /* SDO DAC Configuration Register (SDO_DAC) */ | ||
| 54 | #define SDO_POWER_ON_DAC (1 << 0) | ||
| 55 | |||
| 56 | /* SDO Color Compensation On/Off Control (SDO_CCCON) */ | ||
| 57 | #define SDO_COMPENSATION_BHS_ADJ_OFF (1 << 4) | ||
| 58 | #define SDO_COMPENSATION_CVBS_COMP_OFF (1 << 0) | ||
| 59 | |||
| 60 | /* SDO Interrupt Request Register (SDO_IRQ) */ | ||
| 61 | #define SDO_VSYNC_IRQ_PEND (1 << 0) | ||
| 62 | |||
| 63 | #endif /* SAMSUNG_REGS_SDO_H */ | ||
diff --git a/drivers/media/video/s5p-tv/regs-vp.h b/drivers/media/video/s5p-tv/regs-vp.h new file mode 100644 index 000000000000..6c63984e11e8 --- /dev/null +++ b/drivers/media/video/s5p-tv/regs-vp.h | |||
| @@ -0,0 +1,88 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
| 3 | * http://www.samsung.com/ | ||
| 4 | * | ||
| 5 | * Video processor register header file for Samsung Mixer driver | ||
| 6 | * | ||
| 7 | * This program is free software; you can redistribute it and/or modify | ||
| 8 | * it under the terms of the GNU General Public License version 2 as | ||
| 9 | * published by the Free Software Foundation. | ||
| 10 | */ | ||
| 11 | |||
| 12 | #ifndef SAMSUNG_REGS_VP_H | ||
| 13 | #define SAMSUNG_REGS_VP_H | ||
| 14 | |||
| 15 | /* | ||
| 16 | * Register part | ||
| 17 | */ | ||
| 18 | |||
| 19 | #define VP_ENABLE 0x0000 | ||
| 20 | #define VP_SRESET 0x0004 | ||
| 21 | #define VP_SHADOW_UPDATE 0x0008 | ||
| 22 | #define VP_FIELD_ID 0x000C | ||
| 23 | #define VP_MODE 0x0010 | ||
| 24 | #define VP_IMG_SIZE_Y 0x0014 | ||
| 25 | #define VP_IMG_SIZE_C 0x0018 | ||
| 26 | #define VP_PER_RATE_CTRL 0x001C | ||
| 27 | #define VP_TOP_Y_PTR 0x0028 | ||
| 28 | #define VP_BOT_Y_PTR 0x002C | ||
| 29 | #define VP_TOP_C_PTR 0x0030 | ||
| 30 | #define VP_BOT_C_PTR 0x0034 | ||
| 31 | #define VP_ENDIAN_MODE 0x03CC | ||
| 32 | #define VP_SRC_H_POSITION 0x0044 | ||
| 33 | #define VP_SRC_V_POSITION 0x0048 | ||
| 34 | #define VP_SRC_WIDTH 0x004C | ||
| 35 | #define VP_SRC_HEIGHT 0x0050 | ||
| 36 | #define VP_DST_H_POSITION 0x0054 | ||
| 37 | #define VP_DST_V_POSITION 0x0058 | ||
| 38 | #define VP_DST_WIDTH 0x005C | ||
| 39 | #define VP_DST_HEIGHT 0x0060 | ||
| 40 | #define VP_H_RATIO 0x0064 | ||
| 41 | #define VP_V_RATIO 0x0068 | ||
| 42 | #define VP_POLY8_Y0_LL 0x006C | ||
| 43 | #define VP_POLY4_Y0_LL 0x00EC | ||
| 44 | #define VP_POLY4_C0_LL 0x012C | ||
| 45 | |||
| 46 | /* | ||
| 47 | * Bit definition part | ||
| 48 | */ | ||
| 49 | |||
| 50 | /* generates mask for range of bits */ | ||
| 51 | |||
| 52 | #define VP_MASK(high_bit, low_bit) \ | ||
| 53 | (((2 << ((high_bit) - (low_bit))) - 1) << (low_bit)) | ||
| 54 | |||
| 55 | #define VP_MASK_VAL(val, high_bit, low_bit) \ | ||
| 56 | (((val) << (low_bit)) & VP_MASK(high_bit, low_bit)) | ||
| 57 | |||
| 58 | /* VP_ENABLE */ | ||
| 59 | #define VP_ENABLE_ON (1 << 0) | ||
| 60 | |||
| 61 | /* VP_SRESET */ | ||
| 62 | #define VP_SRESET_PROCESSING (1 << 0) | ||
| 63 | |||
| 64 | /* VP_SHADOW_UPDATE */ | ||
| 65 | #define VP_SHADOW_UPDATE_ENABLE (1 << 0) | ||
| 66 | |||
| 67 | /* VP_MODE */ | ||
| 68 | #define VP_MODE_NV12 (0 << 6) | ||
| 69 | #define VP_MODE_NV21 (1 << 6) | ||
| 70 | #define VP_MODE_LINE_SKIP (1 << 5) | ||
| 71 | #define VP_MODE_MEM_LINEAR (0 << 4) | ||
| 72 | #define VP_MODE_MEM_TILED (1 << 4) | ||
| 73 | #define VP_MODE_FMT_MASK (5 << 4) | ||
| 74 | #define VP_MODE_FIELD_ID_AUTO_TOGGLING (1 << 2) | ||
| 75 | #define VP_MODE_2D_IPC (1 << 1) | ||
| 76 | |||
| 77 | /* VP_IMG_SIZE_Y */ | ||
| 78 | /* VP_IMG_SIZE_C */ | ||
| 79 | #define VP_IMG_HSIZE(x) VP_MASK_VAL(x, 29, 16) | ||
| 80 | #define VP_IMG_VSIZE(x) VP_MASK_VAL(x, 13, 0) | ||
| 81 | |||
| 82 | /* VP_SRC_H_POSITION */ | ||
| 83 | #define VP_SRC_H_POSITION_VAL(x) VP_MASK_VAL(x, 14, 4) | ||
| 84 | |||
| 85 | /* VP_ENDIAN_MODE */ | ||
| 86 | #define VP_ENDIAN_MODE_LITTLE (1 << 0) | ||
| 87 | |||
| 88 | #endif /* SAMSUNG_REGS_VP_H */ | ||
diff --git a/drivers/media/video/s5p-tv/sdo_drv.c b/drivers/media/video/s5p-tv/sdo_drv.c new file mode 100644 index 000000000000..4dddd6bd635b --- /dev/null +++ b/drivers/media/video/s5p-tv/sdo_drv.c | |||
| @@ -0,0 +1,479 @@ | |||
| 1 | /* | ||
| 2 | * Samsung Standard Definition Output (SDO) driver | ||
| 3 | * | ||
| 4 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
| 5 | * | ||
| 6 | * Tomasz Stanislawski, <t.stanislaws@samsung.com> | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify | ||
| 9 | * it under the terms of the GNU General Public License as published | ||
| 10 | * by the Free Software Foundiation. either version 2 of the License, | ||
| 11 | * or (at your option) any later version | ||
| 12 | */ | ||
| 13 | |||
| 14 | #include <linux/clk.h> | ||
| 15 | #include <linux/delay.h> | ||
| 16 | #include <linux/kernel.h> | ||
| 17 | #include <linux/module.h> | ||
| 18 | #include <linux/interrupt.h> | ||
| 19 | #include <linux/io.h> | ||
| 20 | #include <linux/irq.h> | ||
| 21 | #include <linux/platform_device.h> | ||
| 22 | #include <linux/pm_runtime.h> | ||
| 23 | #include <linux/regulator/consumer.h> | ||
| 24 | #include <linux/slab.h> | ||
| 25 | |||
| 26 | #include <media/v4l2-subdev.h> | ||
| 27 | |||
| 28 | #include "regs-sdo.h" | ||
| 29 | |||
| 30 | MODULE_AUTHOR("Tomasz Stanislawski, <t.stanislaws@samsung.com>"); | ||
| 31 | MODULE_DESCRIPTION("Samsung Standard Definition Output (SDO)"); | ||
| 32 | MODULE_LICENSE("GPL"); | ||
| 33 | |||
| 34 | #define SDO_DEFAULT_STD V4L2_STD_PAL | ||
| 35 | |||
| 36 | struct sdo_format { | ||
| 37 | v4l2_std_id id; | ||
| 38 | /* all modes are 720 pixels wide */ | ||
| 39 | unsigned int height; | ||
| 40 | unsigned int cookie; | ||
| 41 | }; | ||
| 42 | |||
| 43 | struct sdo_device { | ||
| 44 | /** pointer to device parent */ | ||
| 45 | struct device *dev; | ||
| 46 | /** base address of SDO registers */ | ||
| 47 | void __iomem *regs; | ||
| 48 | /** SDO interrupt */ | ||
| 49 | unsigned int irq; | ||
| 50 | /** DAC source clock */ | ||
| 51 | struct clk *sclk_dac; | ||
| 52 | /** DAC clock */ | ||
| 53 | struct clk *dac; | ||
| 54 | /** DAC physical interface */ | ||
| 55 | struct clk *dacphy; | ||
| 56 | /** clock for control of VPLL */ | ||
| 57 | struct clk *fout_vpll; | ||
| 58 | /** regulator for SDO IP power */ | ||
| 59 | struct regulator *vdac; | ||
| 60 | /** regulator for SDO plug detection */ | ||
| 61 | struct regulator *vdet; | ||
| 62 | /** subdev used as device interface */ | ||
| 63 | struct v4l2_subdev sd; | ||
| 64 | /** current format */ | ||
| 65 | const struct sdo_format *fmt; | ||
| 66 | }; | ||
| 67 | |||
| 68 | static inline struct sdo_device *sd_to_sdev(struct v4l2_subdev *sd) | ||
| 69 | { | ||
| 70 | return container_of(sd, struct sdo_device, sd); | ||
| 71 | } | ||
| 72 | |||
| 73 | static inline | ||
| 74 | void sdo_write_mask(struct sdo_device *sdev, u32 reg_id, u32 value, u32 mask) | ||
| 75 | { | ||
| 76 | u32 old = readl(sdev->regs + reg_id); | ||
| 77 | value = (value & mask) | (old & ~mask); | ||
| 78 | writel(value, sdev->regs + reg_id); | ||
| 79 | } | ||
| 80 | |||
| 81 | static inline | ||
| 82 | void sdo_write(struct sdo_device *sdev, u32 reg_id, u32 value) | ||
| 83 | { | ||
| 84 | writel(value, sdev->regs + reg_id); | ||
| 85 | } | ||
| 86 | |||
| 87 | static inline | ||
| 88 | u32 sdo_read(struct sdo_device *sdev, u32 reg_id) | ||
| 89 | { | ||
| 90 | return readl(sdev->regs + reg_id); | ||
| 91 | } | ||
| 92 | |||
| 93 | static irqreturn_t sdo_irq_handler(int irq, void *dev_data) | ||
| 94 | { | ||
| 95 | struct sdo_device *sdev = dev_data; | ||
| 96 | |||
| 97 | /* clear interrupt */ | ||
| 98 | sdo_write_mask(sdev, SDO_IRQ, ~0, SDO_VSYNC_IRQ_PEND); | ||
| 99 | return IRQ_HANDLED; | ||
| 100 | } | ||
| 101 | |||
| 102 | static void sdo_reg_debug(struct sdo_device *sdev) | ||
| 103 | { | ||
| 104 | #define DBGREG(reg_id) \ | ||
| 105 | dev_info(sdev->dev, #reg_id " = %08x\n", \ | ||
| 106 | sdo_read(sdev, reg_id)) | ||
| 107 | |||
| 108 | DBGREG(SDO_CLKCON); | ||
| 109 | DBGREG(SDO_CONFIG); | ||
| 110 | DBGREG(SDO_VBI); | ||
| 111 | DBGREG(SDO_DAC); | ||
| 112 | DBGREG(SDO_IRQ); | ||
| 113 | DBGREG(SDO_IRQMASK); | ||
| 114 | DBGREG(SDO_VERSION); | ||
| 115 | } | ||
| 116 | |||
| 117 | static const struct sdo_format sdo_format[] = { | ||
| 118 | { V4L2_STD_PAL_N, .height = 576, .cookie = SDO_PAL_N }, | ||
| 119 | { V4L2_STD_PAL_Nc, .height = 576, .cookie = SDO_PAL_NC }, | ||
| 120 | { V4L2_STD_PAL_M, .height = 480, .cookie = SDO_PAL_M }, | ||
| 121 | { V4L2_STD_PAL_60, .height = 480, .cookie = SDO_PAL_60 }, | ||
| 122 | { V4L2_STD_NTSC_443, .height = 480, .cookie = SDO_NTSC_443 }, | ||
| 123 | { V4L2_STD_PAL, .height = 576, .cookie = SDO_PAL_BGHID }, | ||
| 124 | { V4L2_STD_NTSC_M, .height = 480, .cookie = SDO_NTSC_M }, | ||
| 125 | }; | ||
| 126 | |||
| 127 | static const struct sdo_format *sdo_find_format(v4l2_std_id id) | ||
| 128 | { | ||
| 129 | int i; | ||
| 130 | for (i = 0; i < ARRAY_SIZE(sdo_format); ++i) | ||
| 131 | if (sdo_format[i].id & id) | ||
| 132 | return &sdo_format[i]; | ||
| 133 | return NULL; | ||
| 134 | } | ||
| 135 | |||
| 136 | static int sdo_g_tvnorms_output(struct v4l2_subdev *sd, v4l2_std_id *std) | ||
| 137 | { | ||
| 138 | *std = V4L2_STD_NTSC_M | V4L2_STD_PAL_M | V4L2_STD_PAL | | ||
| 139 | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | | ||
| 140 | V4L2_STD_NTSC_443 | V4L2_STD_PAL_60; | ||
| 141 | return 0; | ||
| 142 | } | ||
| 143 | |||
| 144 | static int sdo_s_std_output(struct v4l2_subdev *sd, v4l2_std_id std) | ||
| 145 | { | ||
| 146 | struct sdo_device *sdev = sd_to_sdev(sd); | ||
| 147 | const struct sdo_format *fmt; | ||
| 148 | fmt = sdo_find_format(std); | ||
| 149 | if (fmt == NULL) | ||
| 150 | return -EINVAL; | ||
| 151 | sdev->fmt = fmt; | ||
| 152 | return 0; | ||
| 153 | } | ||
| 154 | |||
| 155 | static int sdo_g_std_output(struct v4l2_subdev *sd, v4l2_std_id *std) | ||
| 156 | { | ||
| 157 | *std = sd_to_sdev(sd)->fmt->id; | ||
| 158 | return 0; | ||
| 159 | } | ||
| 160 | |||
| 161 | static int sdo_g_mbus_fmt(struct v4l2_subdev *sd, | ||
| 162 | struct v4l2_mbus_framefmt *fmt) | ||
| 163 | { | ||
| 164 | struct sdo_device *sdev = sd_to_sdev(sd); | ||
| 165 | |||
| 166 | if (!sdev->fmt) | ||
| 167 | return -ENXIO; | ||
| 168 | /* all modes are 720 pixels wide */ | ||
| 169 | fmt->width = 720; | ||
| 170 | fmt->height = sdev->fmt->height; | ||
| 171 | fmt->code = V4L2_MBUS_FMT_FIXED; | ||
| 172 | fmt->field = V4L2_FIELD_INTERLACED; | ||
| 173 | return 0; | ||
| 174 | } | ||
| 175 | |||
| 176 | static int sdo_s_power(struct v4l2_subdev *sd, int on) | ||
| 177 | { | ||
| 178 | struct sdo_device *sdev = sd_to_sdev(sd); | ||
| 179 | struct device *dev = sdev->dev; | ||
| 180 | int ret; | ||
| 181 | |||
| 182 | dev_info(dev, "sdo_s_power(%d)\n", on); | ||
| 183 | |||
| 184 | if (on) | ||
| 185 | ret = pm_runtime_get_sync(dev); | ||
| 186 | else | ||
| 187 | ret = pm_runtime_put_sync(dev); | ||
| 188 | |||
| 189 | /* only values < 0 indicate errors */ | ||
| 190 | return IS_ERR_VALUE(ret) ? ret : 0; | ||
| 191 | } | ||
| 192 | |||
| 193 | static int sdo_streamon(struct sdo_device *sdev) | ||
| 194 | { | ||
| 195 | /* set proper clock for Timing Generator */ | ||
| 196 | clk_set_rate(sdev->fout_vpll, 54000000); | ||
| 197 | dev_info(sdev->dev, "fout_vpll.rate = %lu\n", | ||
| 198 | clk_get_rate(sdev->fout_vpll)); | ||
| 199 | /* enable clock in SDO */ | ||
| 200 | sdo_write_mask(sdev, SDO_CLKCON, ~0, SDO_TVOUT_CLOCK_ON); | ||
| 201 | clk_enable(sdev->dacphy); | ||
| 202 | /* enable DAC */ | ||
| 203 | sdo_write_mask(sdev, SDO_DAC, ~0, SDO_POWER_ON_DAC); | ||
| 204 | sdo_reg_debug(sdev); | ||
| 205 | return 0; | ||
| 206 | } | ||
| 207 | |||
| 208 | static int sdo_streamoff(struct sdo_device *sdev) | ||
| 209 | { | ||
| 210 | int tries; | ||
| 211 | |||
| 212 | sdo_write_mask(sdev, SDO_DAC, 0, SDO_POWER_ON_DAC); | ||
| 213 | clk_disable(sdev->dacphy); | ||
| 214 | sdo_write_mask(sdev, SDO_CLKCON, 0, SDO_TVOUT_CLOCK_ON); | ||
| 215 | for (tries = 100; tries; --tries) { | ||
| 216 | if (sdo_read(sdev, SDO_CLKCON) & SDO_TVOUT_CLOCK_READY) | ||
| 217 | break; | ||
| 218 | mdelay(1); | ||
| 219 | } | ||
| 220 | if (tries == 0) | ||
| 221 | dev_err(sdev->dev, "failed to stop streaming\n"); | ||
| 222 | return tries ? 0 : -EIO; | ||
| 223 | } | ||
| 224 | |||
| 225 | static int sdo_s_stream(struct v4l2_subdev *sd, int on) | ||
| 226 | { | ||
| 227 | struct sdo_device *sdev = sd_to_sdev(sd); | ||
| 228 | return on ? sdo_streamon(sdev) : sdo_streamoff(sdev); | ||
| 229 | } | ||
| 230 | |||
| 231 | static const struct v4l2_subdev_core_ops sdo_sd_core_ops = { | ||
| 232 | .s_power = sdo_s_power, | ||
| 233 | }; | ||
| 234 | |||
| 235 | static const struct v4l2_subdev_video_ops sdo_sd_video_ops = { | ||
| 236 | .s_std_output = sdo_s_std_output, | ||
| 237 | .g_std_output = sdo_g_std_output, | ||
| 238 | .g_tvnorms_output = sdo_g_tvnorms_output, | ||
| 239 | .g_mbus_fmt = sdo_g_mbus_fmt, | ||
| 240 | .s_stream = sdo_s_stream, | ||
| 241 | }; | ||
| 242 | |||
| 243 | static const struct v4l2_subdev_ops sdo_sd_ops = { | ||
| 244 | .core = &sdo_sd_core_ops, | ||
| 245 | .video = &sdo_sd_video_ops, | ||
| 246 | }; | ||
| 247 | |||
| 248 | static int sdo_runtime_suspend(struct device *dev) | ||
| 249 | { | ||
| 250 | struct v4l2_subdev *sd = dev_get_drvdata(dev); | ||
| 251 | struct sdo_device *sdev = sd_to_sdev(sd); | ||
| 252 | |||
| 253 | dev_info(dev, "suspend\n"); | ||
| 254 | regulator_disable(sdev->vdet); | ||
| 255 | regulator_disable(sdev->vdac); | ||
| 256 | clk_disable(sdev->sclk_dac); | ||
| 257 | return 0; | ||
| 258 | } | ||
| 259 | |||
| 260 | static int sdo_runtime_resume(struct device *dev) | ||
| 261 | { | ||
| 262 | struct v4l2_subdev *sd = dev_get_drvdata(dev); | ||
| 263 | struct sdo_device *sdev = sd_to_sdev(sd); | ||
| 264 | |||
| 265 | dev_info(dev, "resume\n"); | ||
| 266 | clk_enable(sdev->sclk_dac); | ||
| 267 | regulator_enable(sdev->vdac); | ||
| 268 | regulator_enable(sdev->vdet); | ||
| 269 | |||
| 270 | /* software reset */ | ||
| 271 | sdo_write_mask(sdev, SDO_CLKCON, ~0, SDO_TVOUT_SW_RESET); | ||
| 272 | mdelay(10); | ||
| 273 | sdo_write_mask(sdev, SDO_CLKCON, 0, SDO_TVOUT_SW_RESET); | ||
| 274 | |||
| 275 | /* setting TV mode */ | ||
| 276 | sdo_write_mask(sdev, SDO_CONFIG, sdev->fmt->cookie, SDO_STANDARD_MASK); | ||
| 277 | /* XXX: forcing interlaced mode using undocumented bit */ | ||
| 278 | sdo_write_mask(sdev, SDO_CONFIG, 0, SDO_PROGRESSIVE); | ||
| 279 | /* turn all VBI off */ | ||
| 280 | sdo_write_mask(sdev, SDO_VBI, 0, SDO_CVBS_WSS_INS | | ||
| 281 | SDO_CVBS_CLOSED_CAPTION_MASK); | ||
| 282 | /* turn all post processing off */ | ||
| 283 | sdo_write_mask(sdev, SDO_CCCON, ~0, SDO_COMPENSATION_BHS_ADJ_OFF | | ||
| 284 | SDO_COMPENSATION_CVBS_COMP_OFF); | ||
| 285 | sdo_reg_debug(sdev); | ||
| 286 | return 0; | ||
| 287 | } | ||
| 288 | |||
| 289 | static const struct dev_pm_ops sdo_pm_ops = { | ||
| 290 | .runtime_suspend = sdo_runtime_suspend, | ||
| 291 | .runtime_resume = sdo_runtime_resume, | ||
| 292 | }; | ||
| 293 | |||
| 294 | static int __devinit sdo_probe(struct platform_device *pdev) | ||
| 295 | { | ||
| 296 | struct device *dev = &pdev->dev; | ||
| 297 | struct sdo_device *sdev; | ||
| 298 | struct resource *res; | ||
| 299 | int ret = 0; | ||
| 300 | struct clk *sclk_vpll; | ||
| 301 | |||
| 302 | dev_info(dev, "probe start\n"); | ||
| 303 | sdev = kzalloc(sizeof *sdev, GFP_KERNEL); | ||
| 304 | if (!sdev) { | ||
| 305 | dev_err(dev, "not enough memory.\n"); | ||
| 306 | ret = -ENOMEM; | ||
| 307 | goto fail; | ||
| 308 | } | ||
| 309 | sdev->dev = dev; | ||
| 310 | |||
| 311 | /* mapping registers */ | ||
| 312 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
| 313 | if (res == NULL) { | ||
| 314 | dev_err(dev, "get memory resource failed.\n"); | ||
| 315 | ret = -ENXIO; | ||
| 316 | goto fail_sdev; | ||
| 317 | } | ||
| 318 | |||
| 319 | sdev->regs = ioremap(res->start, resource_size(res)); | ||
| 320 | if (sdev->regs == NULL) { | ||
| 321 | dev_err(dev, "register mapping failed.\n"); | ||
| 322 | ret = -ENXIO; | ||
| 323 | goto fail_sdev; | ||
| 324 | } | ||
| 325 | |||
| 326 | /* acquiring interrupt */ | ||
| 327 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | ||
| 328 | if (res == NULL) { | ||
| 329 | dev_err(dev, "get interrupt resource failed.\n"); | ||
| 330 | ret = -ENXIO; | ||
| 331 | goto fail_regs; | ||
| 332 | } | ||
| 333 | ret = request_irq(res->start, sdo_irq_handler, 0, "s5p-sdo", sdev); | ||
| 334 | if (ret) { | ||
| 335 | dev_err(dev, "request interrupt failed.\n"); | ||
| 336 | goto fail_regs; | ||
| 337 | } | ||
| 338 | sdev->irq = res->start; | ||
| 339 | |||
| 340 | /* acquire clocks */ | ||
| 341 | sdev->sclk_dac = clk_get(dev, "sclk_dac"); | ||
| 342 | if (IS_ERR_OR_NULL(sdev->sclk_dac)) { | ||
| 343 | dev_err(dev, "failed to get clock 'sclk_dac'\n"); | ||
| 344 | ret = -ENXIO; | ||
| 345 | goto fail_irq; | ||
| 346 | } | ||
| 347 | sdev->dac = clk_get(dev, "dac"); | ||
| 348 | if (IS_ERR_OR_NULL(sdev->dac)) { | ||
| 349 | dev_err(dev, "failed to get clock 'dac'\n"); | ||
| 350 | ret = -ENXIO; | ||
| 351 | goto fail_sclk_dac; | ||
| 352 | } | ||
| 353 | sdev->dacphy = clk_get(dev, "dacphy"); | ||
| 354 | if (IS_ERR_OR_NULL(sdev->dacphy)) { | ||
| 355 | dev_err(dev, "failed to get clock 'dacphy'\n"); | ||
| 356 | ret = -ENXIO; | ||
| 357 | goto fail_dac; | ||
| 358 | } | ||
| 359 | sclk_vpll = clk_get(dev, "sclk_vpll"); | ||
| 360 | if (IS_ERR_OR_NULL(sclk_vpll)) { | ||
| 361 | dev_err(dev, "failed to get clock 'sclk_vpll'\n"); | ||
| 362 | ret = -ENXIO; | ||
| 363 | goto fail_dacphy; | ||
| 364 | } | ||
| 365 | clk_set_parent(sdev->sclk_dac, sclk_vpll); | ||
| 366 | clk_put(sclk_vpll); | ||
| 367 | sdev->fout_vpll = clk_get(dev, "fout_vpll"); | ||
| 368 | if (IS_ERR_OR_NULL(sdev->fout_vpll)) { | ||
| 369 | dev_err(dev, "failed to get clock 'fout_vpll'\n"); | ||
| 370 | goto fail_dacphy; | ||
| 371 | } | ||
| 372 | dev_info(dev, "fout_vpll.rate = %lu\n", clk_get_rate(sclk_vpll)); | ||
| 373 | |||
| 374 | /* acquire regulator */ | ||
| 375 | sdev->vdac = regulator_get(dev, "vdd33a_dac"); | ||
| 376 | if (IS_ERR_OR_NULL(sdev->vdac)) { | ||
| 377 | dev_err(dev, "failed to get regulator 'vdac'\n"); | ||
| 378 | goto fail_fout_vpll; | ||
| 379 | } | ||
| 380 | sdev->vdet = regulator_get(dev, "vdet"); | ||
| 381 | if (IS_ERR_OR_NULL(sdev->vdet)) { | ||
| 382 | dev_err(dev, "failed to get regulator 'vdet'\n"); | ||
| 383 | goto fail_vdac; | ||
| 384 | } | ||
| 385 | |||
| 386 | /* enable gate for dac clock, because mixer uses it */ | ||
| 387 | clk_enable(sdev->dac); | ||
| 388 | |||
| 389 | /* configure power management */ | ||
| 390 | pm_runtime_enable(dev); | ||
| 391 | |||
| 392 | /* configuration of interface subdevice */ | ||
| 393 | v4l2_subdev_init(&sdev->sd, &sdo_sd_ops); | ||
| 394 | sdev->sd.owner = THIS_MODULE; | ||
| 395 | strlcpy(sdev->sd.name, "s5p-sdo", sizeof sdev->sd.name); | ||
| 396 | |||
| 397 | /* set default format */ | ||
| 398 | sdev->fmt = sdo_find_format(SDO_DEFAULT_STD); | ||
| 399 | BUG_ON(sdev->fmt == NULL); | ||
| 400 | |||
| 401 | /* keeping subdev in device's private for use by other drivers */ | ||
| 402 | dev_set_drvdata(dev, &sdev->sd); | ||
| 403 | |||
| 404 | dev_info(dev, "probe succeeded\n"); | ||
| 405 | return 0; | ||
| 406 | |||
| 407 | fail_vdac: | ||
| 408 | regulator_put(sdev->vdac); | ||
| 409 | fail_fout_vpll: | ||
| 410 | clk_put(sdev->fout_vpll); | ||
| 411 | fail_dacphy: | ||
| 412 | clk_put(sdev->dacphy); | ||
| 413 | fail_dac: | ||
| 414 | clk_put(sdev->dac); | ||
| 415 | fail_sclk_dac: | ||
| 416 | clk_put(sdev->sclk_dac); | ||
| 417 | fail_irq: | ||
| 418 | free_irq(sdev->irq, sdev); | ||
| 419 | fail_regs: | ||
| 420 | iounmap(sdev->regs); | ||
| 421 | fail_sdev: | ||
| 422 | kfree(sdev); | ||
| 423 | fail: | ||
| 424 | dev_info(dev, "probe failed\n"); | ||
| 425 | return ret; | ||
| 426 | } | ||
| 427 | |||
| 428 | static int __devexit sdo_remove(struct platform_device *pdev) | ||
| 429 | { | ||
| 430 | struct v4l2_subdev *sd = dev_get_drvdata(&pdev->dev); | ||
| 431 | struct sdo_device *sdev = sd_to_sdev(sd); | ||
| 432 | |||
| 433 | pm_runtime_disable(&pdev->dev); | ||
| 434 | clk_disable(sdev->dac); | ||
| 435 | regulator_put(sdev->vdet); | ||
| 436 | regulator_put(sdev->vdac); | ||
| 437 | clk_put(sdev->fout_vpll); | ||
| 438 | clk_put(sdev->dacphy); | ||
| 439 | clk_put(sdev->dac); | ||
| 440 | clk_put(sdev->sclk_dac); | ||
| 441 | free_irq(sdev->irq, sdev); | ||
| 442 | iounmap(sdev->regs); | ||
| 443 | kfree(sdev); | ||
| 444 | |||
| 445 | dev_info(&pdev->dev, "remove successful\n"); | ||
| 446 | return 0; | ||
| 447 | } | ||
| 448 | |||
| 449 | static struct platform_driver sdo_driver __refdata = { | ||
| 450 | .probe = sdo_probe, | ||
| 451 | .remove = __devexit_p(sdo_remove), | ||
| 452 | .driver = { | ||
| 453 | .name = "s5p-sdo", | ||
| 454 | .owner = THIS_MODULE, | ||
| 455 | .pm = &sdo_pm_ops, | ||
| 456 | } | ||
| 457 | }; | ||
| 458 | |||
| 459 | static int __init sdo_init(void) | ||
| 460 | { | ||
| 461 | int ret; | ||
| 462 | static const char banner[] __initdata = KERN_INFO \ | ||
| 463 | "Samsung Standard Definition Output (SDO) driver, " | ||
| 464 | "(c) 2010-2011 Samsung Electronics Co., Ltd.\n"; | ||
| 465 | printk(banner); | ||
| 466 | |||
| 467 | ret = platform_driver_register(&sdo_driver); | ||
| 468 | if (ret) | ||
| 469 | printk(KERN_ERR "SDO platform driver register failed\n"); | ||
| 470 | |||
| 471 | return ret; | ||
| 472 | } | ||
| 473 | module_init(sdo_init); | ||
| 474 | |||
| 475 | static void __exit sdo_exit(void) | ||
| 476 | { | ||
| 477 | platform_driver_unregister(&sdo_driver); | ||
| 478 | } | ||
| 479 | module_exit(sdo_exit); | ||
diff --git a/drivers/media/video/saa7115.c b/drivers/media/video/saa7115.c index 0db90922ee93..f2ae405c74ac 100644 --- a/drivers/media/video/saa7115.c +++ b/drivers/media/video/saa7115.c | |||
| @@ -757,8 +757,8 @@ static int saa711x_g_volatile_ctrl(struct v4l2_ctrl *ctrl) | |||
| 757 | switch (ctrl->id) { | 757 | switch (ctrl->id) { |
| 758 | case V4L2_CID_CHROMA_AGC: | 758 | case V4L2_CID_CHROMA_AGC: |
| 759 | /* chroma gain cluster */ | 759 | /* chroma gain cluster */ |
| 760 | if (state->agc->cur.val) | 760 | if (state->agc->val) |
| 761 | state->gain->cur.val = | 761 | state->gain->val = |
| 762 | saa711x_read(sd, R_0F_CHROMA_GAIN_CNTL) & 0x7f; | 762 | saa711x_read(sd, R_0F_CHROMA_GAIN_CNTL) & 0x7f; |
| 763 | break; | 763 | break; |
| 764 | } | 764 | } |
diff --git a/drivers/media/video/saa7134/saa7134-cards.c b/drivers/media/video/saa7134/saa7134-cards.c index e2062b240e32..0f9fb99adeb4 100644 --- a/drivers/media/video/saa7134/saa7134-cards.c +++ b/drivers/media/video/saa7134/saa7134-cards.c | |||
| @@ -4951,8 +4951,9 @@ struct saa7134_board saa7134_boards[] = { | |||
| 4951 | .audio_clock = 0x00187de7, | 4951 | .audio_clock = 0x00187de7, |
| 4952 | .tuner_type = TUNER_XC2028, | 4952 | .tuner_type = TUNER_XC2028, |
| 4953 | .radio_type = UNSET, | 4953 | .radio_type = UNSET, |
| 4954 | .tuner_addr = ADDR_UNSET, | 4954 | .tuner_addr = 0x61, |
| 4955 | .radio_addr = ADDR_UNSET, | 4955 | .radio_addr = ADDR_UNSET, |
| 4956 | .mpeg = SAA7134_MPEG_DVB, | ||
| 4956 | .inputs = {{ | 4957 | .inputs = {{ |
| 4957 | .name = name_tv, | 4958 | .name = name_tv, |
| 4958 | .vmux = 3, | 4959 | .vmux = 3, |
| @@ -6992,6 +6993,11 @@ static int saa7134_xc2028_callback(struct saa7134_dev *dev, | |||
| 6992 | msleep(10); | 6993 | msleep(10); |
| 6993 | saa7134_set_gpio(dev, 18, 1); | 6994 | saa7134_set_gpio(dev, 18, 1); |
| 6994 | break; | 6995 | break; |
| 6996 | case SAA7134_BOARD_VIDEOMATE_T750: | ||
| 6997 | saa7134_set_gpio(dev, 20, 0); | ||
| 6998 | msleep(10); | ||
| 6999 | saa7134_set_gpio(dev, 20, 1); | ||
| 7000 | break; | ||
| 6995 | } | 7001 | } |
| 6996 | return 0; | 7002 | return 0; |
| 6997 | } | 7003 | } |
| @@ -7451,6 +7457,11 @@ int saa7134_board_init1(struct saa7134_dev *dev) | |||
| 7451 | saa_andorl(SAA7134_GPIO_GPMODE0 >> 2, 0x0e050000, 0x0c050000); | 7457 | saa_andorl(SAA7134_GPIO_GPMODE0 >> 2, 0x0e050000, 0x0c050000); |
| 7452 | saa_andorl(SAA7134_GPIO_GPSTATUS0 >> 2, 0x0e050000, 0x0c050000); | 7458 | saa_andorl(SAA7134_GPIO_GPSTATUS0 >> 2, 0x0e050000, 0x0c050000); |
| 7453 | break; | 7459 | break; |
| 7460 | case SAA7134_BOARD_VIDEOMATE_T750: | ||
| 7461 | /* enable the analog tuner */ | ||
| 7462 | saa_andorl(SAA7134_GPIO_GPMODE0 >> 2, 0x00008000, 0x00008000); | ||
| 7463 | saa_andorl(SAA7134_GPIO_GPSTATUS0 >> 2, 0x00008000, 0x00008000); | ||
| 7464 | break; | ||
| 7454 | } | 7465 | } |
| 7455 | return 0; | 7466 | return 0; |
| 7456 | } | 7467 | } |
diff --git a/drivers/media/video/saa7134/saa7134-core.c b/drivers/media/video/saa7134/saa7134-core.c index f9be737ba6f4..ca65cda3e101 100644 --- a/drivers/media/video/saa7134/saa7134-core.c +++ b/drivers/media/video/saa7134/saa7134-core.c | |||
| @@ -39,6 +39,8 @@ | |||
| 39 | MODULE_DESCRIPTION("v4l2 driver module for saa7130/34 based TV cards"); | 39 | MODULE_DESCRIPTION("v4l2 driver module for saa7130/34 based TV cards"); |
| 40 | MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); | 40 | MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); |
| 41 | MODULE_LICENSE("GPL"); | 41 | MODULE_LICENSE("GPL"); |
| 42 | MODULE_VERSION(SAA7134_VERSION); | ||
| 43 | |||
| 42 | 44 | ||
| 43 | /* ------------------------------------------------------------------ */ | 45 | /* ------------------------------------------------------------------ */ |
| 44 | 46 | ||
| @@ -1332,14 +1334,8 @@ static struct pci_driver saa7134_pci_driver = { | |||
| 1332 | static int __init saa7134_init(void) | 1334 | static int __init saa7134_init(void) |
| 1333 | { | 1335 | { |
| 1334 | INIT_LIST_HEAD(&saa7134_devlist); | 1336 | INIT_LIST_HEAD(&saa7134_devlist); |
| 1335 | printk(KERN_INFO "saa7130/34: v4l2 driver version %d.%d.%d loaded\n", | 1337 | printk(KERN_INFO "saa7130/34: v4l2 driver version %s loaded\n", |
| 1336 | (SAA7134_VERSION_CODE >> 16) & 0xff, | 1338 | SAA7134_VERSION); |
| 1337 | (SAA7134_VERSION_CODE >> 8) & 0xff, | ||
| 1338 | SAA7134_VERSION_CODE & 0xff); | ||
| 1339 | #ifdef SNAPSHOT | ||
| 1340 | printk(KERN_INFO "saa7130/34: snapshot date %04d-%02d-%02d\n", | ||
| 1341 | SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100); | ||
| 1342 | #endif | ||
| 1343 | return pci_register_driver(&saa7134_pci_driver); | 1339 | return pci_register_driver(&saa7134_pci_driver); |
| 1344 | } | 1340 | } |
| 1345 | 1341 | ||
diff --git a/drivers/media/video/saa7134/saa7134-dvb.c b/drivers/media/video/saa7134/saa7134-dvb.c index 996a206c6d79..1e4ef1669887 100644 --- a/drivers/media/video/saa7134/saa7134-dvb.c +++ b/drivers/media/video/saa7134/saa7134-dvb.c | |||
| @@ -56,6 +56,7 @@ | |||
| 56 | #include "lgs8gxx.h" | 56 | #include "lgs8gxx.h" |
| 57 | 57 | ||
| 58 | #include "zl10353.h" | 58 | #include "zl10353.h" |
| 59 | #include "qt1010.h" | ||
| 59 | 60 | ||
| 60 | #include "zl10036.h" | 61 | #include "zl10036.h" |
| 61 | #include "zl10039.h" | 62 | #include "zl10039.h" |
| @@ -939,6 +940,18 @@ static struct zl10353_config behold_x7_config = { | |||
| 939 | .disable_i2c_gate_ctrl = 1, | 940 | .disable_i2c_gate_ctrl = 1, |
| 940 | }; | 941 | }; |
| 941 | 942 | ||
| 943 | static struct zl10353_config videomate_t750_zl10353_config = { | ||
| 944 | .demod_address = 0x0f, | ||
| 945 | .no_tuner = 1, | ||
| 946 | .parallel_ts = 1, | ||
| 947 | .disable_i2c_gate_ctrl = 1, | ||
| 948 | }; | ||
| 949 | |||
| 950 | static struct qt1010_config videomate_t750_qt1010_config = { | ||
| 951 | .i2c_address = 0x62 | ||
| 952 | }; | ||
| 953 | |||
| 954 | |||
| 942 | /* ================================================================== | 955 | /* ================================================================== |
| 943 | * tda10086 based DVB-S cards, helper functions | 956 | * tda10086 based DVB-S cards, helper functions |
| 944 | */ | 957 | */ |
| @@ -1650,6 +1663,18 @@ static int dvb_init(struct saa7134_dev *dev) | |||
| 1650 | __func__); | 1663 | __func__); |
| 1651 | 1664 | ||
| 1652 | break; | 1665 | break; |
| 1666 | case SAA7134_BOARD_VIDEOMATE_T750: | ||
| 1667 | fe0->dvb.frontend = dvb_attach(zl10353_attach, | ||
| 1668 | &videomate_t750_zl10353_config, | ||
| 1669 | &dev->i2c_adap); | ||
| 1670 | if (fe0->dvb.frontend != NULL) { | ||
| 1671 | if (dvb_attach(qt1010_attach, | ||
| 1672 | fe0->dvb.frontend, | ||
| 1673 | &dev->i2c_adap, | ||
| 1674 | &videomate_t750_qt1010_config) == NULL) | ||
| 1675 | wprintk("error attaching QT1010\n"); | ||
| 1676 | } | ||
| 1677 | break; | ||
| 1653 | case SAA7134_BOARD_ZOLID_HYBRID_PCI: | 1678 | case SAA7134_BOARD_ZOLID_HYBRID_PCI: |
| 1654 | fe0->dvb.frontend = dvb_attach(tda10048_attach, | 1679 | fe0->dvb.frontend = dvb_attach(tda10048_attach, |
| 1655 | &zolid_tda10048_config, | 1680 | &zolid_tda10048_config, |
diff --git a/drivers/media/video/saa7134/saa7134-empress.c b/drivers/media/video/saa7134/saa7134-empress.c index 18294db38a01..dde361a9194e 100644 --- a/drivers/media/video/saa7134/saa7134-empress.c +++ b/drivers/media/video/saa7134/saa7134-empress.c | |||
| @@ -172,7 +172,6 @@ static int empress_querycap(struct file *file, void *priv, | |||
| 172 | strlcpy(cap->card, saa7134_boards[dev->board].name, | 172 | strlcpy(cap->card, saa7134_boards[dev->board].name, |
| 173 | sizeof(cap->card)); | 173 | sizeof(cap->card)); |
| 174 | sprintf(cap->bus_info, "PCI:%s", pci_name(dev->pci)); | 174 | sprintf(cap->bus_info, "PCI:%s", pci_name(dev->pci)); |
| 175 | cap->version = SAA7134_VERSION_CODE; | ||
| 176 | cap->capabilities = | 175 | cap->capabilities = |
| 177 | V4L2_CAP_VIDEO_CAPTURE | | 176 | V4L2_CAP_VIDEO_CAPTURE | |
| 178 | V4L2_CAP_READWRITE | | 177 | V4L2_CAP_READWRITE | |
diff --git a/drivers/media/video/saa7134/saa7134-video.c b/drivers/media/video/saa7134/saa7134-video.c index 776ba2dd7f9f..9cf7914f6f90 100644 --- a/drivers/media/video/saa7134/saa7134-video.c +++ b/drivers/media/video/saa7134/saa7134-video.c | |||
| @@ -1810,7 +1810,6 @@ static int saa7134_querycap(struct file *file, void *priv, | |||
| 1810 | strlcpy(cap->card, saa7134_boards[dev->board].name, | 1810 | strlcpy(cap->card, saa7134_boards[dev->board].name, |
| 1811 | sizeof(cap->card)); | 1811 | sizeof(cap->card)); |
| 1812 | sprintf(cap->bus_info, "PCI:%s", pci_name(dev->pci)); | 1812 | sprintf(cap->bus_info, "PCI:%s", pci_name(dev->pci)); |
| 1813 | cap->version = SAA7134_VERSION_CODE; | ||
| 1814 | cap->capabilities = | 1813 | cap->capabilities = |
| 1815 | V4L2_CAP_VIDEO_CAPTURE | | 1814 | V4L2_CAP_VIDEO_CAPTURE | |
| 1816 | V4L2_CAP_VBI_CAPTURE | | 1815 | V4L2_CAP_VBI_CAPTURE | |
| @@ -2307,7 +2306,6 @@ static int radio_querycap(struct file *file, void *priv, | |||
| 2307 | strcpy(cap->driver, "saa7134"); | 2306 | strcpy(cap->driver, "saa7134"); |
| 2308 | strlcpy(cap->card, saa7134_boards[dev->board].name, sizeof(cap->card)); | 2307 | strlcpy(cap->card, saa7134_boards[dev->board].name, sizeof(cap->card)); |
| 2309 | sprintf(cap->bus_info, "PCI:%s", pci_name(dev->pci)); | 2308 | sprintf(cap->bus_info, "PCI:%s", pci_name(dev->pci)); |
| 2310 | cap->version = SAA7134_VERSION_CODE; | ||
| 2311 | cap->capabilities = V4L2_CAP_TUNER; | 2309 | cap->capabilities = V4L2_CAP_TUNER; |
| 2312 | return 0; | 2310 | return 0; |
| 2313 | } | 2311 | } |
diff --git a/drivers/media/video/saa7134/saa7134.h b/drivers/media/video/saa7134/saa7134.h index 28eb10398323..bc8d6bba8ee5 100644 --- a/drivers/media/video/saa7134/saa7134.h +++ b/drivers/media/video/saa7134/saa7134.h | |||
| @@ -19,8 +19,7 @@ | |||
| 19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | 19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 20 | */ | 20 | */ |
| 21 | 21 | ||
| 22 | #include <linux/version.h> | 22 | #define SAA7134_VERSION "0, 2, 17" |
| 23 | #define SAA7134_VERSION_CODE KERNEL_VERSION(0, 2, 16) | ||
| 24 | 23 | ||
| 25 | #include <linux/pci.h> | 24 | #include <linux/pci.h> |
| 26 | #include <linux/i2c.h> | 25 | #include <linux/i2c.h> |
diff --git a/drivers/media/video/saa7164/saa7164-encoder.c b/drivers/media/video/saa7164/saa7164-encoder.c index 400364569c8d..2fd38a01887f 100644 --- a/drivers/media/video/saa7164/saa7164-encoder.c +++ b/drivers/media/video/saa7164/saa7164-encoder.c | |||
| @@ -1246,7 +1246,6 @@ static unsigned int fops_poll(struct file *file, poll_table *wait) | |||
| 1246 | struct saa7164_encoder_fh *fh = | 1246 | struct saa7164_encoder_fh *fh = |
| 1247 | (struct saa7164_encoder_fh *)file->private_data; | 1247 | (struct saa7164_encoder_fh *)file->private_data; |
| 1248 | struct saa7164_port *port = fh->port; | 1248 | struct saa7164_port *port = fh->port; |
| 1249 | struct saa7164_user_buffer *ubuf; | ||
| 1250 | unsigned int mask = 0; | 1249 | unsigned int mask = 0; |
| 1251 | 1250 | ||
| 1252 | port->last_poll_msecs_diff = port->last_poll_msecs; | 1251 | port->last_poll_msecs_diff = port->last_poll_msecs; |
| @@ -1278,10 +1277,7 @@ static unsigned int fops_poll(struct file *file, poll_table *wait) | |||
| 1278 | } | 1277 | } |
| 1279 | 1278 | ||
| 1280 | /* Pull the first buffer from the used list */ | 1279 | /* Pull the first buffer from the used list */ |
| 1281 | ubuf = list_first_entry(&port->list_buf_used.list, | 1280 | if (!list_empty(&port->list_buf_used.list)) |
| 1282 | struct saa7164_user_buffer, list); | ||
| 1283 | |||
| 1284 | if (ubuf) | ||
| 1285 | mask |= POLLIN | POLLRDNORM; | 1281 | mask |= POLLIN | POLLRDNORM; |
| 1286 | 1282 | ||
| 1287 | return mask; | 1283 | return mask; |
diff --git a/drivers/media/video/saa7164/saa7164-vbi.c b/drivers/media/video/saa7164/saa7164-vbi.c index bc1fcedba874..e2e034158718 100644 --- a/drivers/media/video/saa7164/saa7164-vbi.c +++ b/drivers/media/video/saa7164/saa7164-vbi.c | |||
| @@ -1192,7 +1192,6 @@ static unsigned int fops_poll(struct file *file, poll_table *wait) | |||
| 1192 | { | 1192 | { |
| 1193 | struct saa7164_vbi_fh *fh = (struct saa7164_vbi_fh *)file->private_data; | 1193 | struct saa7164_vbi_fh *fh = (struct saa7164_vbi_fh *)file->private_data; |
| 1194 | struct saa7164_port *port = fh->port; | 1194 | struct saa7164_port *port = fh->port; |
| 1195 | struct saa7164_user_buffer *ubuf; | ||
| 1196 | unsigned int mask = 0; | 1195 | unsigned int mask = 0; |
| 1197 | 1196 | ||
| 1198 | port->last_poll_msecs_diff = port->last_poll_msecs; | 1197 | port->last_poll_msecs_diff = port->last_poll_msecs; |
| @@ -1224,10 +1223,7 @@ static unsigned int fops_poll(struct file *file, poll_table *wait) | |||
| 1224 | } | 1223 | } |
| 1225 | 1224 | ||
| 1226 | /* Pull the first buffer from the used list */ | 1225 | /* Pull the first buffer from the used list */ |
| 1227 | ubuf = list_first_entry(&port->list_buf_used.list, | 1226 | if (!list_empty(&port->list_buf_used.list)) |
| 1228 | struct saa7164_user_buffer, list); | ||
| 1229 | |||
| 1230 | if (ubuf) | ||
| 1231 | mask |= POLLIN | POLLRDNORM; | 1227 | mask |= POLLIN | POLLRDNORM; |
| 1232 | 1228 | ||
| 1233 | return mask; | 1229 | return mask; |
diff --git a/drivers/media/video/saa7164/saa7164.h b/drivers/media/video/saa7164/saa7164.h index 16745d2fb349..6678bf1e7816 100644 --- a/drivers/media/video/saa7164/saa7164.h +++ b/drivers/media/video/saa7164/saa7164.h | |||
| @@ -48,7 +48,6 @@ | |||
| 48 | #include <linux/i2c.h> | 48 | #include <linux/i2c.h> |
| 49 | #include <linux/i2c-algo-bit.h> | 49 | #include <linux/i2c-algo-bit.h> |
| 50 | #include <linux/kdev_t.h> | 50 | #include <linux/kdev_t.h> |
| 51 | #include <linux/version.h> | ||
| 52 | #include <linux/mutex.h> | 51 | #include <linux/mutex.h> |
| 53 | #include <linux/crc32.h> | 52 | #include <linux/crc32.h> |
| 54 | #include <linux/kthread.h> | 53 | #include <linux/kthread.h> |
diff --git a/drivers/media/video/sh_mobile_ceu_camera.c b/drivers/media/video/sh_mobile_ceu_camera.c index 3ae5c9c58cba..e54089802b6b 100644 --- a/drivers/media/video/sh_mobile_ceu_camera.c +++ b/drivers/media/video/sh_mobile_ceu_camera.c | |||
| @@ -27,7 +27,6 @@ | |||
| 27 | #include <linux/mm.h> | 27 | #include <linux/mm.h> |
| 28 | #include <linux/moduleparam.h> | 28 | #include <linux/moduleparam.h> |
| 29 | #include <linux/time.h> | 29 | #include <linux/time.h> |
| 30 | #include <linux/version.h> | ||
| 31 | #include <linux/slab.h> | 30 | #include <linux/slab.h> |
| 32 | #include <linux/device.h> | 31 | #include <linux/device.h> |
| 33 | #include <linux/platform_device.h> | 32 | #include <linux/platform_device.h> |
| @@ -39,6 +38,7 @@ | |||
| 39 | #include <media/v4l2-dev.h> | 38 | #include <media/v4l2-dev.h> |
| 40 | #include <media/soc_camera.h> | 39 | #include <media/soc_camera.h> |
| 41 | #include <media/sh_mobile_ceu.h> | 40 | #include <media/sh_mobile_ceu.h> |
| 41 | #include <media/sh_mobile_csi2.h> | ||
| 42 | #include <media/videobuf2-dma-contig.h> | 42 | #include <media/videobuf2-dma-contig.h> |
| 43 | #include <media/v4l2-mediabus.h> | 43 | #include <media/v4l2-mediabus.h> |
| 44 | #include <media/soc_mediabus.h> | 44 | #include <media/soc_mediabus.h> |
| @@ -96,6 +96,7 @@ struct sh_mobile_ceu_buffer { | |||
| 96 | struct sh_mobile_ceu_dev { | 96 | struct sh_mobile_ceu_dev { |
| 97 | struct soc_camera_host ici; | 97 | struct soc_camera_host ici; |
| 98 | struct soc_camera_device *icd; | 98 | struct soc_camera_device *icd; |
| 99 | struct platform_device *csi2_pdev; | ||
| 99 | 100 | ||
| 100 | unsigned int irq; | 101 | unsigned int irq; |
| 101 | void __iomem *base; | 102 | void __iomem *base; |
| @@ -205,7 +206,7 @@ static int sh_mobile_ceu_soft_reset(struct sh_mobile_ceu_dev *pcdev) | |||
| 205 | 206 | ||
| 206 | 207 | ||
| 207 | if (2 != success) { | 208 | if (2 != success) { |
| 208 | dev_warn(&icd->dev, "soft reset time out\n"); | 209 | dev_warn(icd->pdev, "soft reset time out\n"); |
| 209 | return -EIO; | 210 | return -EIO; |
| 210 | } | 211 | } |
| 211 | 212 | ||
| @@ -220,7 +221,7 @@ static int sh_mobile_ceu_videobuf_setup(struct vb2_queue *vq, | |||
| 220 | unsigned long sizes[], void *alloc_ctxs[]) | 221 | unsigned long sizes[], void *alloc_ctxs[]) |
| 221 | { | 222 | { |
| 222 | struct soc_camera_device *icd = container_of(vq, struct soc_camera_device, vb2_vidq); | 223 | struct soc_camera_device *icd = container_of(vq, struct soc_camera_device, vb2_vidq); |
| 223 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 224 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 224 | struct sh_mobile_ceu_dev *pcdev = ici->priv; | 225 | struct sh_mobile_ceu_dev *pcdev = ici->priv; |
| 225 | int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width, | 226 | int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width, |
| 226 | icd->current_fmt->host_fmt); | 227 | icd->current_fmt->host_fmt); |
| @@ -242,7 +243,7 @@ static int sh_mobile_ceu_videobuf_setup(struct vb2_queue *vq, | |||
| 242 | *count = pcdev->video_limit / PAGE_ALIGN(sizes[0]); | 243 | *count = pcdev->video_limit / PAGE_ALIGN(sizes[0]); |
| 243 | } | 244 | } |
| 244 | 245 | ||
| 245 | dev_dbg(icd->dev.parent, "count=%d, size=%lu\n", *count, sizes[0]); | 246 | dev_dbg(icd->parent, "count=%d, size=%lu\n", *count, sizes[0]); |
| 246 | 247 | ||
| 247 | return 0; | 248 | return 0; |
| 248 | } | 249 | } |
| @@ -351,7 +352,7 @@ static int sh_mobile_ceu_videobuf_prepare(struct vb2_buffer *vb) | |||
| 351 | 352 | ||
| 352 | buf = to_ceu_vb(vb); | 353 | buf = to_ceu_vb(vb); |
| 353 | 354 | ||
| 354 | dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%p %lu\n", __func__, | 355 | dev_dbg(icd->parent, "%s (vb=0x%p) 0x%p %lu\n", __func__, |
| 355 | vb, vb2_plane_vaddr(vb, 0), vb2_get_plane_payload(vb, 0)); | 356 | vb, vb2_plane_vaddr(vb, 0), vb2_get_plane_payload(vb, 0)); |
| 356 | 357 | ||
| 357 | /* Added list head initialization on alloc */ | 358 | /* Added list head initialization on alloc */ |
| @@ -371,7 +372,7 @@ static int sh_mobile_ceu_videobuf_prepare(struct vb2_buffer *vb) | |||
| 371 | size = icd->user_height * bytes_per_line; | 372 | size = icd->user_height * bytes_per_line; |
| 372 | 373 | ||
| 373 | if (vb2_plane_size(vb, 0) < size) { | 374 | if (vb2_plane_size(vb, 0) < size) { |
| 374 | dev_err(icd->dev.parent, "Buffer too small (%lu < %lu)\n", | 375 | dev_err(icd->parent, "Buffer too small (%lu < %lu)\n", |
| 375 | vb2_plane_size(vb, 0), size); | 376 | vb2_plane_size(vb, 0), size); |
| 376 | return -ENOBUFS; | 377 | return -ENOBUFS; |
| 377 | } | 378 | } |
| @@ -384,11 +385,11 @@ static int sh_mobile_ceu_videobuf_prepare(struct vb2_buffer *vb) | |||
| 384 | static void sh_mobile_ceu_videobuf_queue(struct vb2_buffer *vb) | 385 | static void sh_mobile_ceu_videobuf_queue(struct vb2_buffer *vb) |
| 385 | { | 386 | { |
| 386 | struct soc_camera_device *icd = container_of(vb->vb2_queue, struct soc_camera_device, vb2_vidq); | 387 | struct soc_camera_device *icd = container_of(vb->vb2_queue, struct soc_camera_device, vb2_vidq); |
| 387 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 388 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 388 | struct sh_mobile_ceu_dev *pcdev = ici->priv; | 389 | struct sh_mobile_ceu_dev *pcdev = ici->priv; |
| 389 | struct sh_mobile_ceu_buffer *buf = to_ceu_vb(vb); | 390 | struct sh_mobile_ceu_buffer *buf = to_ceu_vb(vb); |
| 390 | 391 | ||
| 391 | dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%p %lu\n", __func__, | 392 | dev_dbg(icd->parent, "%s (vb=0x%p) 0x%p %lu\n", __func__, |
| 392 | vb, vb2_plane_vaddr(vb, 0), vb2_get_plane_payload(vb, 0)); | 393 | vb, vb2_plane_vaddr(vb, 0), vb2_get_plane_payload(vb, 0)); |
| 393 | 394 | ||
| 394 | spin_lock_irq(&pcdev->lock); | 395 | spin_lock_irq(&pcdev->lock); |
| @@ -409,7 +410,7 @@ static void sh_mobile_ceu_videobuf_queue(struct vb2_buffer *vb) | |||
| 409 | static void sh_mobile_ceu_videobuf_release(struct vb2_buffer *vb) | 410 | static void sh_mobile_ceu_videobuf_release(struct vb2_buffer *vb) |
| 410 | { | 411 | { |
| 411 | struct soc_camera_device *icd = container_of(vb->vb2_queue, struct soc_camera_device, vb2_vidq); | 412 | struct soc_camera_device *icd = container_of(vb->vb2_queue, struct soc_camera_device, vb2_vidq); |
| 412 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 413 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 413 | struct sh_mobile_ceu_buffer *buf = to_ceu_vb(vb); | 414 | struct sh_mobile_ceu_buffer *buf = to_ceu_vb(vb); |
| 414 | struct sh_mobile_ceu_dev *pcdev = ici->priv; | 415 | struct sh_mobile_ceu_dev *pcdev = ici->priv; |
| 415 | 416 | ||
| @@ -421,8 +422,12 @@ static void sh_mobile_ceu_videobuf_release(struct vb2_buffer *vb) | |||
| 421 | pcdev->active = NULL; | 422 | pcdev->active = NULL; |
| 422 | } | 423 | } |
| 423 | 424 | ||
| 424 | /* Doesn't hurt also if the list is empty */ | 425 | /* |
| 425 | list_del_init(&buf->queue); | 426 | * Doesn't hurt also if the list is empty, but it hurts, if queuing the |
| 427 | * buffer failed, and .buf_init() hasn't been called | ||
| 428 | */ | ||
| 429 | if (buf->queue.next) | ||
| 430 | list_del_init(&buf->queue); | ||
| 426 | 431 | ||
| 427 | spin_unlock_irq(&pcdev->lock); | 432 | spin_unlock_irq(&pcdev->lock); |
| 428 | } | 433 | } |
| @@ -437,7 +442,7 @@ static int sh_mobile_ceu_videobuf_init(struct vb2_buffer *vb) | |||
| 437 | static int sh_mobile_ceu_stop_streaming(struct vb2_queue *q) | 442 | static int sh_mobile_ceu_stop_streaming(struct vb2_queue *q) |
| 438 | { | 443 | { |
| 439 | struct soc_camera_device *icd = container_of(q, struct soc_camera_device, vb2_vidq); | 444 | struct soc_camera_device *icd = container_of(q, struct soc_camera_device, vb2_vidq); |
| 440 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 445 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 441 | struct sh_mobile_ceu_dev *pcdev = ici->priv; | 446 | struct sh_mobile_ceu_dev *pcdev = ici->priv; |
| 442 | struct list_head *buf_head, *tmp; | 447 | struct list_head *buf_head, *tmp; |
| 443 | 448 | ||
| @@ -499,25 +504,48 @@ out: | |||
| 499 | return IRQ_HANDLED; | 504 | return IRQ_HANDLED; |
| 500 | } | 505 | } |
| 501 | 506 | ||
| 507 | static struct v4l2_subdev *find_csi2(struct sh_mobile_ceu_dev *pcdev) | ||
| 508 | { | ||
| 509 | struct v4l2_subdev *sd; | ||
| 510 | |||
| 511 | if (!pcdev->csi2_pdev) | ||
| 512 | return NULL; | ||
| 513 | |||
| 514 | v4l2_device_for_each_subdev(sd, &pcdev->ici.v4l2_dev) | ||
| 515 | if (&pcdev->csi2_pdev->dev == v4l2_get_subdevdata(sd)) | ||
| 516 | return sd; | ||
| 517 | |||
| 518 | return NULL; | ||
| 519 | } | ||
| 520 | |||
| 502 | /* Called with .video_lock held */ | 521 | /* Called with .video_lock held */ |
| 503 | static int sh_mobile_ceu_add_device(struct soc_camera_device *icd) | 522 | static int sh_mobile_ceu_add_device(struct soc_camera_device *icd) |
| 504 | { | 523 | { |
| 505 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 524 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 506 | struct sh_mobile_ceu_dev *pcdev = ici->priv; | 525 | struct sh_mobile_ceu_dev *pcdev = ici->priv; |
| 526 | struct v4l2_subdev *csi2_sd; | ||
| 507 | int ret; | 527 | int ret; |
| 508 | 528 | ||
| 509 | if (pcdev->icd) | 529 | if (pcdev->icd) |
| 510 | return -EBUSY; | 530 | return -EBUSY; |
| 511 | 531 | ||
| 512 | dev_info(icd->dev.parent, | 532 | dev_info(icd->parent, |
| 513 | "SuperH Mobile CEU driver attached to camera %d\n", | 533 | "SuperH Mobile CEU driver attached to camera %d\n", |
| 514 | icd->devnum); | 534 | icd->devnum); |
| 515 | 535 | ||
| 516 | pm_runtime_get_sync(ici->v4l2_dev.dev); | 536 | pm_runtime_get_sync(ici->v4l2_dev.dev); |
| 517 | 537 | ||
| 518 | ret = sh_mobile_ceu_soft_reset(pcdev); | 538 | ret = sh_mobile_ceu_soft_reset(pcdev); |
| 519 | if (!ret) | 539 | |
| 540 | csi2_sd = find_csi2(pcdev); | ||
| 541 | |||
| 542 | ret = v4l2_subdev_call(csi2_sd, core, s_power, 1); | ||
| 543 | if (ret != -ENODEV && ret != -ENOIOCTLCMD && ret < 0) { | ||
| 544 | pm_runtime_put_sync(ici->v4l2_dev.dev); | ||
| 545 | } else { | ||
| 520 | pcdev->icd = icd; | 546 | pcdev->icd = icd; |
| 547 | ret = 0; | ||
| 548 | } | ||
| 521 | 549 | ||
| 522 | return ret; | 550 | return ret; |
| 523 | } | 551 | } |
| @@ -525,11 +553,13 @@ static int sh_mobile_ceu_add_device(struct soc_camera_device *icd) | |||
| 525 | /* Called with .video_lock held */ | 553 | /* Called with .video_lock held */ |
| 526 | static void sh_mobile_ceu_remove_device(struct soc_camera_device *icd) | 554 | static void sh_mobile_ceu_remove_device(struct soc_camera_device *icd) |
| 527 | { | 555 | { |
| 528 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 556 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 529 | struct sh_mobile_ceu_dev *pcdev = ici->priv; | 557 | struct sh_mobile_ceu_dev *pcdev = ici->priv; |
| 558 | struct v4l2_subdev *csi2_sd = find_csi2(pcdev); | ||
| 530 | 559 | ||
| 531 | BUG_ON(icd != pcdev->icd); | 560 | BUG_ON(icd != pcdev->icd); |
| 532 | 561 | ||
| 562 | v4l2_subdev_call(csi2_sd, core, s_power, 0); | ||
| 533 | /* disable capture, disable interrupts */ | 563 | /* disable capture, disable interrupts */ |
| 534 | ceu_write(pcdev, CEIER, 0); | 564 | ceu_write(pcdev, CEIER, 0); |
| 535 | sh_mobile_ceu_soft_reset(pcdev); | 565 | sh_mobile_ceu_soft_reset(pcdev); |
| @@ -545,7 +575,7 @@ static void sh_mobile_ceu_remove_device(struct soc_camera_device *icd) | |||
| 545 | 575 | ||
| 546 | pm_runtime_put_sync(ici->v4l2_dev.dev); | 576 | pm_runtime_put_sync(ici->v4l2_dev.dev); |
| 547 | 577 | ||
| 548 | dev_info(icd->dev.parent, | 578 | dev_info(icd->parent, |
| 549 | "SuperH Mobile CEU driver detached from camera %d\n", | 579 | "SuperH Mobile CEU driver detached from camera %d\n", |
| 550 | icd->devnum); | 580 | icd->devnum); |
| 551 | 581 | ||
| @@ -585,14 +615,14 @@ static u16 calc_scale(unsigned int src, unsigned int *dst) | |||
| 585 | /* rect is guaranteed to not exceed the scaled camera rectangle */ | 615 | /* rect is guaranteed to not exceed the scaled camera rectangle */ |
| 586 | static void sh_mobile_ceu_set_rect(struct soc_camera_device *icd) | 616 | static void sh_mobile_ceu_set_rect(struct soc_camera_device *icd) |
| 587 | { | 617 | { |
| 588 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 618 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 589 | struct sh_mobile_ceu_cam *cam = icd->host_priv; | 619 | struct sh_mobile_ceu_cam *cam = icd->host_priv; |
| 590 | struct sh_mobile_ceu_dev *pcdev = ici->priv; | 620 | struct sh_mobile_ceu_dev *pcdev = ici->priv; |
| 591 | unsigned int height, width, cdwdr_width, in_width, in_height; | 621 | unsigned int height, width, cdwdr_width, in_width, in_height; |
| 592 | unsigned int left_offset, top_offset; | 622 | unsigned int left_offset, top_offset; |
| 593 | u32 camor; | 623 | u32 camor; |
| 594 | 624 | ||
| 595 | dev_geo(icd->dev.parent, "Crop %ux%u@%u:%u\n", | 625 | dev_geo(icd->parent, "Crop %ux%u@%u:%u\n", |
| 596 | icd->user_width, icd->user_height, cam->ceu_left, cam->ceu_top); | 626 | icd->user_width, icd->user_height, cam->ceu_left, cam->ceu_top); |
| 597 | 627 | ||
| 598 | left_offset = cam->ceu_left; | 628 | left_offset = cam->ceu_left; |
| @@ -641,7 +671,7 @@ static void sh_mobile_ceu_set_rect(struct soc_camera_device *icd) | |||
| 641 | } | 671 | } |
| 642 | 672 | ||
| 643 | /* CSI2 special configuration */ | 673 | /* CSI2 special configuration */ |
| 644 | if (pcdev->pdata->csi2_dev) { | 674 | if (pcdev->pdata->csi2) { |
| 645 | in_width = ((in_width - 2) * 2); | 675 | in_width = ((in_width - 2) * 2); |
| 646 | left_offset *= 2; | 676 | left_offset *= 2; |
| 647 | } | 677 | } |
| @@ -649,7 +679,7 @@ static void sh_mobile_ceu_set_rect(struct soc_camera_device *icd) | |||
| 649 | /* Set CAMOR, CAPWR, CFSZR, take care of CDWDR */ | 679 | /* Set CAMOR, CAPWR, CFSZR, take care of CDWDR */ |
| 650 | camor = left_offset | (top_offset << 16); | 680 | camor = left_offset | (top_offset << 16); |
| 651 | 681 | ||
| 652 | dev_geo(icd->dev.parent, | 682 | dev_geo(icd->parent, |
| 653 | "CAMOR 0x%x, CAPWR 0x%x, CFSZR 0x%x, CDWDR 0x%x\n", camor, | 683 | "CAMOR 0x%x, CAPWR 0x%x, CFSZR 0x%x, CDWDR 0x%x\n", camor, |
| 654 | (in_height << 16) | in_width, (height << 16) | width, | 684 | (in_height << 16) | in_width, (height << 16) | width, |
| 655 | cdwdr_width); | 685 | cdwdr_width); |
| @@ -697,7 +727,7 @@ static void capture_restore(struct sh_mobile_ceu_dev *pcdev, u32 capsr) | |||
| 697 | static int sh_mobile_ceu_set_bus_param(struct soc_camera_device *icd, | 727 | static int sh_mobile_ceu_set_bus_param(struct soc_camera_device *icd, |
| 698 | __u32 pixfmt) | 728 | __u32 pixfmt) |
| 699 | { | 729 | { |
| 700 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 730 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 701 | struct sh_mobile_ceu_dev *pcdev = ici->priv; | 731 | struct sh_mobile_ceu_dev *pcdev = ici->priv; |
| 702 | int ret; | 732 | int ret; |
| 703 | unsigned long camera_flags, common_flags, value; | 733 | unsigned long camera_flags, common_flags, value; |
| @@ -783,7 +813,7 @@ static int sh_mobile_ceu_set_bus_param(struct soc_camera_device *icd, | |||
| 783 | value |= pcdev->is_16bit ? 1 << 12 : 0; | 813 | value |= pcdev->is_16bit ? 1 << 12 : 0; |
| 784 | 814 | ||
| 785 | /* CSI2 mode */ | 815 | /* CSI2 mode */ |
| 786 | if (pcdev->pdata->csi2_dev) | 816 | if (pcdev->pdata->csi2) |
| 787 | value |= 3 << 12; | 817 | value |= 3 << 12; |
| 788 | 818 | ||
| 789 | ceu_write(pcdev, CAMCR, value); | 819 | ceu_write(pcdev, CAMCR, value); |
| @@ -806,7 +836,7 @@ static int sh_mobile_ceu_set_bus_param(struct soc_camera_device *icd, | |||
| 806 | sh_mobile_ceu_set_rect(icd); | 836 | sh_mobile_ceu_set_rect(icd); |
| 807 | mdelay(1); | 837 | mdelay(1); |
| 808 | 838 | ||
| 809 | dev_geo(icd->dev.parent, "CFLCR 0x%x\n", pcdev->cflcr); | 839 | dev_geo(icd->parent, "CFLCR 0x%x\n", pcdev->cflcr); |
| 810 | ceu_write(pcdev, CFLCR, pcdev->cflcr); | 840 | ceu_write(pcdev, CFLCR, pcdev->cflcr); |
| 811 | 841 | ||
| 812 | /* | 842 | /* |
| @@ -829,7 +859,7 @@ static int sh_mobile_ceu_set_bus_param(struct soc_camera_device *icd, | |||
| 829 | ceu_write(pcdev, CDOCR, value); | 859 | ceu_write(pcdev, CDOCR, value); |
| 830 | ceu_write(pcdev, CFWCR, 0); /* keep "datafetch firewall" disabled */ | 860 | ceu_write(pcdev, CFWCR, 0); /* keep "datafetch firewall" disabled */ |
| 831 | 861 | ||
| 832 | dev_dbg(icd->dev.parent, "S_FMT successful for %c%c%c%c %ux%u\n", | 862 | dev_dbg(icd->parent, "S_FMT successful for %c%c%c%c %ux%u\n", |
| 833 | pixfmt & 0xff, (pixfmt >> 8) & 0xff, | 863 | pixfmt & 0xff, (pixfmt >> 8) & 0xff, |
| 834 | (pixfmt >> 16) & 0xff, (pixfmt >> 24) & 0xff, | 864 | (pixfmt >> 16) & 0xff, (pixfmt >> 24) & 0xff, |
| 835 | icd->user_width, icd->user_height); | 865 | icd->user_width, icd->user_height); |
| @@ -843,7 +873,7 @@ static int sh_mobile_ceu_set_bus_param(struct soc_camera_device *icd, | |||
| 843 | static int sh_mobile_ceu_try_bus_param(struct soc_camera_device *icd, | 873 | static int sh_mobile_ceu_try_bus_param(struct soc_camera_device *icd, |
| 844 | unsigned char buswidth) | 874 | unsigned char buswidth) |
| 845 | { | 875 | { |
| 846 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 876 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 847 | struct sh_mobile_ceu_dev *pcdev = ici->priv; | 877 | struct sh_mobile_ceu_dev *pcdev = ici->priv; |
| 848 | unsigned long camera_flags, common_flags; | 878 | unsigned long camera_flags, common_flags; |
| 849 | 879 | ||
| @@ -901,7 +931,7 @@ static int sh_mobile_ceu_get_formats(struct soc_camera_device *icd, unsigned int | |||
| 901 | struct soc_camera_format_xlate *xlate) | 931 | struct soc_camera_format_xlate *xlate) |
| 902 | { | 932 | { |
| 903 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | 933 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); |
| 904 | struct device *dev = icd->dev.parent; | 934 | struct device *dev = icd->parent; |
| 905 | struct soc_camera_host *ici = to_soc_camera_host(dev); | 935 | struct soc_camera_host *ici = to_soc_camera_host(dev); |
| 906 | struct sh_mobile_ceu_dev *pcdev = ici->priv; | 936 | struct sh_mobile_ceu_dev *pcdev = ici->priv; |
| 907 | int ret, k, n; | 937 | int ret, k, n; |
| @@ -921,7 +951,7 @@ static int sh_mobile_ceu_get_formats(struct soc_camera_device *icd, unsigned int | |||
| 921 | return 0; | 951 | return 0; |
| 922 | } | 952 | } |
| 923 | 953 | ||
| 924 | if (!pcdev->pdata->csi2_dev) { | 954 | if (!pcdev->pdata->csi2) { |
| 925 | ret = sh_mobile_ceu_try_bus_param(icd, fmt->bits_per_sample); | 955 | ret = sh_mobile_ceu_try_bus_param(icd, fmt->bits_per_sample); |
| 926 | if (ret < 0) | 956 | if (ret < 0) |
| 927 | return 0; | 957 | return 0; |
| @@ -1244,7 +1274,7 @@ static int client_s_fmt(struct soc_camera_device *icd, | |||
| 1244 | { | 1274 | { |
| 1245 | struct sh_mobile_ceu_cam *cam = icd->host_priv; | 1275 | struct sh_mobile_ceu_cam *cam = icd->host_priv; |
| 1246 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | 1276 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); |
| 1247 | struct device *dev = icd->dev.parent; | 1277 | struct device *dev = icd->parent; |
| 1248 | unsigned int width = mf->width, height = mf->height, tmp_w, tmp_h; | 1278 | unsigned int width = mf->width, height = mf->height, tmp_w, tmp_h; |
| 1249 | unsigned int max_width, max_height; | 1279 | unsigned int max_width, max_height; |
| 1250 | struct v4l2_cropcap cap; | 1280 | struct v4l2_cropcap cap; |
| @@ -1313,7 +1343,7 @@ static int client_scale(struct soc_camera_device *icd, | |||
| 1313 | bool ceu_can_scale) | 1343 | bool ceu_can_scale) |
| 1314 | { | 1344 | { |
| 1315 | struct sh_mobile_ceu_cam *cam = icd->host_priv; | 1345 | struct sh_mobile_ceu_cam *cam = icd->host_priv; |
| 1316 | struct device *dev = icd->dev.parent; | 1346 | struct device *dev = icd->parent; |
| 1317 | struct v4l2_mbus_framefmt mf_tmp = *mf; | 1347 | struct v4l2_mbus_framefmt mf_tmp = *mf; |
| 1318 | unsigned int scale_h, scale_v; | 1348 | unsigned int scale_h, scale_v; |
| 1319 | int ret; | 1349 | int ret; |
| @@ -1363,13 +1393,13 @@ static int sh_mobile_ceu_set_crop(struct soc_camera_device *icd, | |||
| 1363 | struct v4l2_crop *a) | 1393 | struct v4l2_crop *a) |
| 1364 | { | 1394 | { |
| 1365 | struct v4l2_rect *rect = &a->c; | 1395 | struct v4l2_rect *rect = &a->c; |
| 1366 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 1396 | struct device *dev = icd->parent; |
| 1397 | struct soc_camera_host *ici = to_soc_camera_host(dev); | ||
| 1367 | struct sh_mobile_ceu_dev *pcdev = ici->priv; | 1398 | struct sh_mobile_ceu_dev *pcdev = ici->priv; |
| 1368 | struct v4l2_crop cam_crop; | 1399 | struct v4l2_crop cam_crop; |
| 1369 | struct sh_mobile_ceu_cam *cam = icd->host_priv; | 1400 | struct sh_mobile_ceu_cam *cam = icd->host_priv; |
| 1370 | struct v4l2_rect *cam_rect = &cam_crop.c; | 1401 | struct v4l2_rect *cam_rect = &cam_crop.c; |
| 1371 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | 1402 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); |
| 1372 | struct device *dev = icd->dev.parent; | ||
| 1373 | struct v4l2_mbus_framefmt mf; | 1403 | struct v4l2_mbus_framefmt mf; |
| 1374 | unsigned int scale_cam_h, scale_cam_v, scale_ceu_h, scale_ceu_v, | 1404 | unsigned int scale_cam_h, scale_cam_v, scale_ceu_h, scale_ceu_v, |
| 1375 | out_width, out_height; | 1405 | out_width, out_height; |
| @@ -1511,7 +1541,7 @@ static void calculate_client_output(struct soc_camera_device *icd, | |||
| 1511 | struct v4l2_pix_format *pix, struct v4l2_mbus_framefmt *mf) | 1541 | struct v4l2_pix_format *pix, struct v4l2_mbus_framefmt *mf) |
| 1512 | { | 1542 | { |
| 1513 | struct sh_mobile_ceu_cam *cam = icd->host_priv; | 1543 | struct sh_mobile_ceu_cam *cam = icd->host_priv; |
| 1514 | struct device *dev = icd->dev.parent; | 1544 | struct device *dev = icd->parent; |
| 1515 | struct v4l2_rect *cam_subrect = &cam->subrect; | 1545 | struct v4l2_rect *cam_subrect = &cam->subrect; |
| 1516 | unsigned int scale_v, scale_h; | 1546 | unsigned int scale_v, scale_h; |
| 1517 | 1547 | ||
| @@ -1555,12 +1585,12 @@ static void calculate_client_output(struct soc_camera_device *icd, | |||
| 1555 | static int sh_mobile_ceu_set_fmt(struct soc_camera_device *icd, | 1585 | static int sh_mobile_ceu_set_fmt(struct soc_camera_device *icd, |
| 1556 | struct v4l2_format *f) | 1586 | struct v4l2_format *f) |
| 1557 | { | 1587 | { |
| 1558 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 1588 | struct device *dev = icd->parent; |
| 1589 | struct soc_camera_host *ici = to_soc_camera_host(dev); | ||
| 1559 | struct sh_mobile_ceu_dev *pcdev = ici->priv; | 1590 | struct sh_mobile_ceu_dev *pcdev = ici->priv; |
| 1560 | struct sh_mobile_ceu_cam *cam = icd->host_priv; | 1591 | struct sh_mobile_ceu_cam *cam = icd->host_priv; |
| 1561 | struct v4l2_pix_format *pix = &f->fmt.pix; | 1592 | struct v4l2_pix_format *pix = &f->fmt.pix; |
| 1562 | struct v4l2_mbus_framefmt mf; | 1593 | struct v4l2_mbus_framefmt mf; |
| 1563 | struct device *dev = icd->dev.parent; | ||
| 1564 | __u32 pixfmt = pix->pixelformat; | 1594 | __u32 pixfmt = pix->pixelformat; |
| 1565 | const struct soc_camera_format_xlate *xlate; | 1595 | const struct soc_camera_format_xlate *xlate; |
| 1566 | /* Keep Compiler Happy */ | 1596 | /* Keep Compiler Happy */ |
| @@ -1684,12 +1714,12 @@ static int sh_mobile_ceu_try_fmt(struct soc_camera_device *icd, | |||
| 1684 | int width, height; | 1714 | int width, height; |
| 1685 | int ret; | 1715 | int ret; |
| 1686 | 1716 | ||
| 1687 | dev_geo(icd->dev.parent, "TRY_FMT(pix=0x%x, %ux%u)\n", | 1717 | dev_geo(icd->parent, "TRY_FMT(pix=0x%x, %ux%u)\n", |
| 1688 | pixfmt, pix->width, pix->height); | 1718 | pixfmt, pix->width, pix->height); |
| 1689 | 1719 | ||
| 1690 | xlate = soc_camera_xlate_by_fourcc(icd, pixfmt); | 1720 | xlate = soc_camera_xlate_by_fourcc(icd, pixfmt); |
| 1691 | if (!xlate) { | 1721 | if (!xlate) { |
| 1692 | dev_warn(icd->dev.parent, "Format %x not found\n", pixfmt); | 1722 | dev_warn(icd->parent, "Format %x not found\n", pixfmt); |
| 1693 | return -EINVAL; | 1723 | return -EINVAL; |
| 1694 | } | 1724 | } |
| 1695 | 1725 | ||
| @@ -1701,11 +1731,6 @@ static int sh_mobile_ceu_try_fmt(struct soc_camera_device *icd, | |||
| 1701 | width = pix->width; | 1731 | width = pix->width; |
| 1702 | height = pix->height; | 1732 | height = pix->height; |
| 1703 | 1733 | ||
| 1704 | pix->bytesperline = soc_mbus_bytes_per_line(width, xlate->host_fmt); | ||
| 1705 | if ((int)pix->bytesperline < 0) | ||
| 1706 | return pix->bytesperline; | ||
| 1707 | pix->sizeimage = height * pix->bytesperline; | ||
| 1708 | |||
| 1709 | /* limit to sensor capabilities */ | 1734 | /* limit to sensor capabilities */ |
| 1710 | mf.width = pix->width; | 1735 | mf.width = pix->width; |
| 1711 | mf.height = pix->height; | 1736 | mf.height = pix->height; |
| @@ -1741,7 +1766,7 @@ static int sh_mobile_ceu_try_fmt(struct soc_camera_device *icd, | |||
| 1741 | try_mbus_fmt, &mf); | 1766 | try_mbus_fmt, &mf); |
| 1742 | if (ret < 0) { | 1767 | if (ret < 0) { |
| 1743 | /* Shouldn't actually happen... */ | 1768 | /* Shouldn't actually happen... */ |
| 1744 | dev_err(icd->dev.parent, | 1769 | dev_err(icd->parent, |
| 1745 | "FIXME: client try_fmt() = %d\n", ret); | 1770 | "FIXME: client try_fmt() = %d\n", ret); |
| 1746 | return ret; | 1771 | return ret; |
| 1747 | } | 1772 | } |
| @@ -1753,7 +1778,7 @@ static int sh_mobile_ceu_try_fmt(struct soc_camera_device *icd, | |||
| 1753 | pix->height = height; | 1778 | pix->height = height; |
| 1754 | } | 1779 | } |
| 1755 | 1780 | ||
| 1756 | dev_geo(icd->dev.parent, "%s(): return %d, fmt 0x%x, %ux%u\n", | 1781 | dev_geo(icd->parent, "%s(): return %d, fmt 0x%x, %ux%u\n", |
| 1757 | __func__, ret, pix->pixelformat, pix->width, pix->height); | 1782 | __func__, ret, pix->pixelformat, pix->width, pix->height); |
| 1758 | 1783 | ||
| 1759 | return ret; | 1784 | return ret; |
| @@ -1763,7 +1788,7 @@ static int sh_mobile_ceu_set_livecrop(struct soc_camera_device *icd, | |||
| 1763 | struct v4l2_crop *a) | 1788 | struct v4l2_crop *a) |
| 1764 | { | 1789 | { |
| 1765 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | 1790 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); |
| 1766 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 1791 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 1767 | struct sh_mobile_ceu_dev *pcdev = ici->priv; | 1792 | struct sh_mobile_ceu_dev *pcdev = ici->priv; |
| 1768 | u32 out_width = icd->user_width, out_height = icd->user_height; | 1793 | u32 out_width = icd->user_width, out_height = icd->user_height; |
| 1769 | int ret; | 1794 | int ret; |
| @@ -1775,13 +1800,13 @@ static int sh_mobile_ceu_set_livecrop(struct soc_camera_device *icd, | |||
| 1775 | /* Stop the client */ | 1800 | /* Stop the client */ |
| 1776 | ret = v4l2_subdev_call(sd, video, s_stream, 0); | 1801 | ret = v4l2_subdev_call(sd, video, s_stream, 0); |
| 1777 | if (ret < 0) | 1802 | if (ret < 0) |
| 1778 | dev_warn(icd->dev.parent, | 1803 | dev_warn(icd->parent, |
| 1779 | "Client failed to stop the stream: %d\n", ret); | 1804 | "Client failed to stop the stream: %d\n", ret); |
| 1780 | else | 1805 | else |
| 1781 | /* Do the crop, if it fails, there's nothing more we can do */ | 1806 | /* Do the crop, if it fails, there's nothing more we can do */ |
| 1782 | sh_mobile_ceu_set_crop(icd, a); | 1807 | sh_mobile_ceu_set_crop(icd, a); |
| 1783 | 1808 | ||
| 1784 | dev_geo(icd->dev.parent, "Output after crop: %ux%u\n", icd->user_width, icd->user_height); | 1809 | dev_geo(icd->parent, "Output after crop: %ux%u\n", icd->user_width, icd->user_height); |
| 1785 | 1810 | ||
| 1786 | if (icd->user_width != out_width || icd->user_height != out_height) { | 1811 | if (icd->user_width != out_width || icd->user_height != out_height) { |
| 1787 | struct v4l2_format f = { | 1812 | struct v4l2_format f = { |
| @@ -1827,7 +1852,6 @@ static int sh_mobile_ceu_querycap(struct soc_camera_host *ici, | |||
| 1827 | struct v4l2_capability *cap) | 1852 | struct v4l2_capability *cap) |
| 1828 | { | 1853 | { |
| 1829 | strlcpy(cap->card, "SuperH_Mobile_CEU", sizeof(cap->card)); | 1854 | strlcpy(cap->card, "SuperH_Mobile_CEU", sizeof(cap->card)); |
| 1830 | cap->version = KERNEL_VERSION(0, 0, 5); | ||
| 1831 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING; | 1855 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING; |
| 1832 | return 0; | 1856 | return 0; |
| 1833 | } | 1857 | } |
| @@ -1848,7 +1872,7 @@ static int sh_mobile_ceu_init_videobuf(struct vb2_queue *q, | |||
| 1848 | static int sh_mobile_ceu_get_ctrl(struct soc_camera_device *icd, | 1872 | static int sh_mobile_ceu_get_ctrl(struct soc_camera_device *icd, |
| 1849 | struct v4l2_control *ctrl) | 1873 | struct v4l2_control *ctrl) |
| 1850 | { | 1874 | { |
| 1851 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 1875 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 1852 | struct sh_mobile_ceu_dev *pcdev = ici->priv; | 1876 | struct sh_mobile_ceu_dev *pcdev = ici->priv; |
| 1853 | u32 val; | 1877 | u32 val; |
| 1854 | 1878 | ||
| @@ -1864,7 +1888,7 @@ static int sh_mobile_ceu_get_ctrl(struct soc_camera_device *icd, | |||
| 1864 | static int sh_mobile_ceu_set_ctrl(struct soc_camera_device *icd, | 1888 | static int sh_mobile_ceu_set_ctrl(struct soc_camera_device *icd, |
| 1865 | struct v4l2_control *ctrl) | 1889 | struct v4l2_control *ctrl) |
| 1866 | { | 1890 | { |
| 1867 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 1891 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 1868 | struct sh_mobile_ceu_dev *pcdev = ici->priv; | 1892 | struct sh_mobile_ceu_dev *pcdev = ici->priv; |
| 1869 | 1893 | ||
| 1870 | switch (ctrl->id) { | 1894 | switch (ctrl->id) { |
| @@ -1950,7 +1974,7 @@ static int __devinit sh_mobile_ceu_probe(struct platform_device *pdev) | |||
| 1950 | .completion = COMPLETION_INITIALIZER_ONSTACK(wait.completion), | 1974 | .completion = COMPLETION_INITIALIZER_ONSTACK(wait.completion), |
| 1951 | .notifier.notifier_call = bus_notify, | 1975 | .notifier.notifier_call = bus_notify, |
| 1952 | }; | 1976 | }; |
| 1953 | struct device *csi2; | 1977 | struct sh_mobile_ceu_companion *csi2; |
| 1954 | 1978 | ||
| 1955 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 1979 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 1956 | irq = platform_get_irq(pdev, 0); | 1980 | irq = platform_get_irq(pdev, 0); |
| @@ -2023,26 +2047,61 @@ static int __devinit sh_mobile_ceu_probe(struct platform_device *pdev) | |||
| 2023 | pcdev->ici.drv_name = dev_name(&pdev->dev); | 2047 | pcdev->ici.drv_name = dev_name(&pdev->dev); |
| 2024 | pcdev->ici.ops = &sh_mobile_ceu_host_ops; | 2048 | pcdev->ici.ops = &sh_mobile_ceu_host_ops; |
| 2025 | 2049 | ||
| 2050 | pcdev->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev); | ||
| 2051 | if (IS_ERR(pcdev->alloc_ctx)) { | ||
| 2052 | err = PTR_ERR(pcdev->alloc_ctx); | ||
| 2053 | goto exit_free_clk; | ||
| 2054 | } | ||
| 2055 | |||
| 2056 | err = soc_camera_host_register(&pcdev->ici); | ||
| 2057 | if (err) | ||
| 2058 | goto exit_free_ctx; | ||
| 2059 | |||
| 2026 | /* CSI2 interfacing */ | 2060 | /* CSI2 interfacing */ |
| 2027 | csi2 = pcdev->pdata->csi2_dev; | 2061 | csi2 = pcdev->pdata->csi2; |
| 2028 | if (csi2) { | 2062 | if (csi2) { |
| 2029 | wait.dev = csi2; | 2063 | struct platform_device *csi2_pdev = |
| 2064 | platform_device_alloc("sh-mobile-csi2", csi2->id); | ||
| 2065 | struct sh_csi2_pdata *csi2_pdata = csi2->platform_data; | ||
| 2066 | |||
| 2067 | if (!csi2_pdev) { | ||
| 2068 | err = -ENOMEM; | ||
| 2069 | goto exit_host_unregister; | ||
| 2070 | } | ||
| 2071 | |||
| 2072 | pcdev->csi2_pdev = csi2_pdev; | ||
| 2073 | |||
| 2074 | err = platform_device_add_data(csi2_pdev, csi2_pdata, sizeof(*csi2_pdata)); | ||
| 2075 | if (err < 0) | ||
| 2076 | goto exit_pdev_put; | ||
| 2077 | |||
| 2078 | csi2_pdata = csi2_pdev->dev.platform_data; | ||
| 2079 | csi2_pdata->v4l2_dev = &pcdev->ici.v4l2_dev; | ||
| 2080 | |||
| 2081 | csi2_pdev->resource = csi2->resource; | ||
| 2082 | csi2_pdev->num_resources = csi2->num_resources; | ||
| 2083 | |||
| 2084 | err = platform_device_add(csi2_pdev); | ||
| 2085 | if (err < 0) | ||
| 2086 | goto exit_pdev_put; | ||
| 2087 | |||
| 2088 | wait.dev = &csi2_pdev->dev; | ||
| 2030 | 2089 | ||
| 2031 | err = bus_register_notifier(&platform_bus_type, &wait.notifier); | 2090 | err = bus_register_notifier(&platform_bus_type, &wait.notifier); |
| 2032 | if (err < 0) | 2091 | if (err < 0) |
| 2033 | goto exit_free_clk; | 2092 | goto exit_pdev_unregister; |
| 2034 | 2093 | ||
| 2035 | /* | 2094 | /* |
| 2036 | * From this point the driver module will not unload, until | 2095 | * From this point the driver module will not unload, until |
| 2037 | * we complete the completion. | 2096 | * we complete the completion. |
| 2038 | */ | 2097 | */ |
| 2039 | 2098 | ||
| 2040 | if (!csi2->driver) { | 2099 | if (!csi2_pdev->dev.driver) { |
| 2041 | complete(&wait.completion); | 2100 | complete(&wait.completion); |
| 2042 | /* Either too late, or probing failed */ | 2101 | /* Either too late, or probing failed */ |
| 2043 | bus_unregister_notifier(&platform_bus_type, &wait.notifier); | 2102 | bus_unregister_notifier(&platform_bus_type, &wait.notifier); |
| 2044 | err = -ENXIO; | 2103 | err = -ENXIO; |
| 2045 | goto exit_free_clk; | 2104 | goto exit_pdev_unregister; |
| 2046 | } | 2105 | } |
| 2047 | 2106 | ||
| 2048 | /* | 2107 | /* |
| @@ -2051,34 +2110,28 @@ static int __devinit sh_mobile_ceu_probe(struct platform_device *pdev) | |||
| 2051 | * the "owner" is safe! | 2110 | * the "owner" is safe! |
| 2052 | */ | 2111 | */ |
| 2053 | 2112 | ||
| 2054 | err = try_module_get(csi2->driver->owner); | 2113 | err = try_module_get(csi2_pdev->dev.driver->owner); |
| 2055 | 2114 | ||
| 2056 | /* Let notifier complete, if it has been locked */ | 2115 | /* Let notifier complete, if it has been locked */ |
| 2057 | complete(&wait.completion); | 2116 | complete(&wait.completion); |
| 2058 | bus_unregister_notifier(&platform_bus_type, &wait.notifier); | 2117 | bus_unregister_notifier(&platform_bus_type, &wait.notifier); |
| 2059 | if (!err) { | 2118 | if (!err) { |
| 2060 | err = -ENODEV; | 2119 | err = -ENODEV; |
| 2061 | goto exit_free_clk; | 2120 | goto exit_pdev_unregister; |
| 2062 | } | 2121 | } |
| 2063 | } | 2122 | } |
| 2064 | 2123 | ||
| 2065 | pcdev->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev); | ||
| 2066 | if (IS_ERR(pcdev->alloc_ctx)) { | ||
| 2067 | err = PTR_ERR(pcdev->alloc_ctx); | ||
| 2068 | goto exit_module_put; | ||
| 2069 | } | ||
| 2070 | |||
| 2071 | err = soc_camera_host_register(&pcdev->ici); | ||
| 2072 | if (err) | ||
| 2073 | goto exit_free_ctx; | ||
| 2074 | |||
| 2075 | return 0; | 2124 | return 0; |
| 2076 | 2125 | ||
| 2126 | exit_pdev_unregister: | ||
| 2127 | platform_device_del(pcdev->csi2_pdev); | ||
| 2128 | exit_pdev_put: | ||
| 2129 | pcdev->csi2_pdev->resource = NULL; | ||
| 2130 | platform_device_put(pcdev->csi2_pdev); | ||
| 2131 | exit_host_unregister: | ||
| 2132 | soc_camera_host_unregister(&pcdev->ici); | ||
| 2077 | exit_free_ctx: | 2133 | exit_free_ctx: |
| 2078 | vb2_dma_contig_cleanup_ctx(pcdev->alloc_ctx); | 2134 | vb2_dma_contig_cleanup_ctx(pcdev->alloc_ctx); |
| 2079 | exit_module_put: | ||
| 2080 | if (csi2 && csi2->driver) | ||
| 2081 | module_put(csi2->driver->owner); | ||
| 2082 | exit_free_clk: | 2135 | exit_free_clk: |
| 2083 | pm_runtime_disable(&pdev->dev); | 2136 | pm_runtime_disable(&pdev->dev); |
| 2084 | free_irq(pcdev->irq, pcdev); | 2137 | free_irq(pcdev->irq, pcdev); |
| @@ -2098,7 +2151,7 @@ static int __devexit sh_mobile_ceu_remove(struct platform_device *pdev) | |||
| 2098 | struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev); | 2151 | struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev); |
| 2099 | struct sh_mobile_ceu_dev *pcdev = container_of(soc_host, | 2152 | struct sh_mobile_ceu_dev *pcdev = container_of(soc_host, |
| 2100 | struct sh_mobile_ceu_dev, ici); | 2153 | struct sh_mobile_ceu_dev, ici); |
| 2101 | struct device *csi2 = pcdev->pdata->csi2_dev; | 2154 | struct platform_device *csi2_pdev = pcdev->csi2_pdev; |
| 2102 | 2155 | ||
| 2103 | soc_camera_host_unregister(soc_host); | 2156 | soc_camera_host_unregister(soc_host); |
| 2104 | pm_runtime_disable(&pdev->dev); | 2157 | pm_runtime_disable(&pdev->dev); |
| @@ -2107,8 +2160,13 @@ static int __devexit sh_mobile_ceu_remove(struct platform_device *pdev) | |||
| 2107 | dma_release_declared_memory(&pdev->dev); | 2160 | dma_release_declared_memory(&pdev->dev); |
| 2108 | iounmap(pcdev->base); | 2161 | iounmap(pcdev->base); |
| 2109 | vb2_dma_contig_cleanup_ctx(pcdev->alloc_ctx); | 2162 | vb2_dma_contig_cleanup_ctx(pcdev->alloc_ctx); |
| 2110 | if (csi2 && csi2->driver) | 2163 | if (csi2_pdev && csi2_pdev->dev.driver) { |
| 2111 | module_put(csi2->driver->owner); | 2164 | struct module *csi2_drv = csi2_pdev->dev.driver->owner; |
| 2165 | platform_device_del(csi2_pdev); | ||
| 2166 | csi2_pdev->resource = NULL; | ||
| 2167 | platform_device_put(csi2_pdev); | ||
| 2168 | module_put(csi2_drv); | ||
| 2169 | } | ||
| 2112 | kfree(pcdev); | 2170 | kfree(pcdev); |
| 2113 | 2171 | ||
| 2114 | return 0; | 2172 | return 0; |
| @@ -2158,4 +2216,5 @@ module_exit(sh_mobile_ceu_exit); | |||
| 2158 | MODULE_DESCRIPTION("SuperH Mobile CEU driver"); | 2216 | MODULE_DESCRIPTION("SuperH Mobile CEU driver"); |
| 2159 | MODULE_AUTHOR("Magnus Damm"); | 2217 | MODULE_AUTHOR("Magnus Damm"); |
| 2160 | MODULE_LICENSE("GPL"); | 2218 | MODULE_LICENSE("GPL"); |
| 2219 | MODULE_VERSION("0.0.6"); | ||
| 2161 | MODULE_ALIAS("platform:sh_mobile_ceu"); | 2220 | MODULE_ALIAS("platform:sh_mobile_ceu"); |
diff --git a/drivers/media/video/sh_mobile_csi2.c b/drivers/media/video/sh_mobile_csi2.c index 98b87481fa94..2893a0134c7e 100644 --- a/drivers/media/video/sh_mobile_csi2.c +++ b/drivers/media/video/sh_mobile_csi2.c | |||
| @@ -16,6 +16,7 @@ | |||
| 16 | #include <linux/slab.h> | 16 | #include <linux/slab.h> |
| 17 | #include <linux/videodev2.h> | 17 | #include <linux/videodev2.h> |
| 18 | 18 | ||
| 19 | #include <media/sh_mobile_ceu.h> | ||
| 19 | #include <media/sh_mobile_csi2.h> | 20 | #include <media/sh_mobile_csi2.h> |
| 20 | #include <media/soc_camera.h> | 21 | #include <media/soc_camera.h> |
| 21 | #include <media/v4l2-common.h> | 22 | #include <media/v4l2-common.h> |
| @@ -33,7 +34,6 @@ | |||
| 33 | struct sh_csi2 { | 34 | struct sh_csi2 { |
| 34 | struct v4l2_subdev subdev; | 35 | struct v4l2_subdev subdev; |
| 35 | struct list_head list; | 36 | struct list_head list; |
| 36 | struct notifier_block notifier; | ||
| 37 | unsigned int irq; | 37 | unsigned int irq; |
| 38 | void __iomem *base; | 38 | void __iomem *base; |
| 39 | struct platform_device *pdev; | 39 | struct platform_device *pdev; |
| @@ -132,13 +132,6 @@ static struct v4l2_subdev_video_ops sh_csi2_subdev_video_ops = { | |||
| 132 | .try_mbus_fmt = sh_csi2_try_fmt, | 132 | .try_mbus_fmt = sh_csi2_try_fmt, |
| 133 | }; | 133 | }; |
| 134 | 134 | ||
| 135 | static struct v4l2_subdev_core_ops sh_csi2_subdev_core_ops; | ||
| 136 | |||
| 137 | static struct v4l2_subdev_ops sh_csi2_subdev_ops = { | ||
| 138 | .core = &sh_csi2_subdev_core_ops, | ||
| 139 | .video = &sh_csi2_subdev_video_ops, | ||
| 140 | }; | ||
| 141 | |||
| 142 | static void sh_csi2_hwinit(struct sh_csi2 *priv) | 135 | static void sh_csi2_hwinit(struct sh_csi2 *priv) |
| 143 | { | 136 | { |
| 144 | struct sh_csi2_pdata *pdata = priv->pdev->dev.platform_data; | 137 | struct sh_csi2_pdata *pdata = priv->pdev->dev.platform_data; |
| @@ -186,65 +179,84 @@ static unsigned long sh_csi2_query_bus_param(struct soc_camera_device *icd) | |||
| 186 | return soc_camera_apply_sensor_flags(icl, flags); | 179 | return soc_camera_apply_sensor_flags(icl, flags); |
| 187 | } | 180 | } |
| 188 | 181 | ||
| 189 | static int sh_csi2_notify(struct notifier_block *nb, | 182 | static int sh_csi2_client_connect(struct sh_csi2 *priv) |
| 190 | unsigned long action, void *data) | ||
| 191 | { | 183 | { |
| 192 | struct device *dev = data; | ||
| 193 | struct soc_camera_device *icd = to_soc_camera_dev(dev); | ||
| 194 | struct v4l2_device *v4l2_dev = dev_get_drvdata(dev->parent); | ||
| 195 | struct sh_csi2 *priv = | ||
| 196 | container_of(nb, struct sh_csi2, notifier); | ||
| 197 | struct sh_csi2_pdata *pdata = priv->pdev->dev.platform_data; | 184 | struct sh_csi2_pdata *pdata = priv->pdev->dev.platform_data; |
| 198 | int ret, i; | 185 | struct v4l2_subdev *sd, *csi2_sd = &priv->subdev; |
| 186 | struct soc_camera_device *icd = NULL; | ||
| 187 | struct device *dev = v4l2_get_subdevdata(&priv->subdev); | ||
| 188 | int i; | ||
| 189 | |||
| 190 | v4l2_device_for_each_subdev(sd, csi2_sd->v4l2_dev) | ||
| 191 | if (sd->grp_id) { | ||
| 192 | icd = (struct soc_camera_device *)sd->grp_id; | ||
| 193 | break; | ||
| 194 | } | ||
| 195 | |||
| 196 | if (!icd) | ||
| 197 | return -EINVAL; | ||
| 199 | 198 | ||
| 200 | for (i = 0; i < pdata->num_clients; i++) | 199 | for (i = 0; i < pdata->num_clients; i++) |
| 201 | if (&pdata->clients[i].pdev->dev == icd->pdev) | 200 | if (&pdata->clients[i].pdev->dev == icd->pdev) |
| 202 | break; | 201 | break; |
| 203 | 202 | ||
| 204 | dev_dbg(dev, "%s(%p): action = %lu, found #%d\n", __func__, dev, action, i); | 203 | dev_dbg(dev, "%s(%p): found #%d\n", __func__, dev, i); |
| 205 | 204 | ||
| 206 | if (i == pdata->num_clients) | 205 | if (i == pdata->num_clients) |
| 207 | return NOTIFY_DONE; | 206 | return -ENODEV; |
| 208 | 207 | ||
| 209 | switch (action) { | 208 | priv->client = pdata->clients + i; |
| 210 | case BUS_NOTIFY_BOUND_DRIVER: | ||
| 211 | snprintf(priv->subdev.name, V4L2_SUBDEV_NAME_SIZE, "%s%s", | ||
| 212 | dev_name(v4l2_dev->dev), ".mipi-csi"); | ||
| 213 | priv->subdev.grp_id = (long)icd; | ||
| 214 | ret = v4l2_device_register_subdev(v4l2_dev, &priv->subdev); | ||
| 215 | dev_dbg(dev, "%s(%p): ret(register_subdev) = %d\n", __func__, priv, ret); | ||
| 216 | if (ret < 0) | ||
| 217 | return NOTIFY_DONE; | ||
| 218 | 209 | ||
| 219 | priv->client = pdata->clients + i; | 210 | priv->set_bus_param = icd->ops->set_bus_param; |
| 211 | priv->query_bus_param = icd->ops->query_bus_param; | ||
| 212 | icd->ops->set_bus_param = sh_csi2_set_bus_param; | ||
| 213 | icd->ops->query_bus_param = sh_csi2_query_bus_param; | ||
| 220 | 214 | ||
| 221 | priv->set_bus_param = icd->ops->set_bus_param; | 215 | csi2_sd->grp_id = (long)icd; |
| 222 | priv->query_bus_param = icd->ops->query_bus_param; | ||
| 223 | icd->ops->set_bus_param = sh_csi2_set_bus_param; | ||
| 224 | icd->ops->query_bus_param = sh_csi2_query_bus_param; | ||
| 225 | 216 | ||
| 226 | pm_runtime_get_sync(v4l2_get_subdevdata(&priv->subdev)); | 217 | pm_runtime_get_sync(dev); |
| 227 | 218 | ||
| 228 | sh_csi2_hwinit(priv); | 219 | sh_csi2_hwinit(priv); |
| 229 | break; | ||
| 230 | case BUS_NOTIFY_UNBIND_DRIVER: | ||
| 231 | priv->client = NULL; | ||
| 232 | 220 | ||
| 233 | /* Driver is about to be unbound */ | 221 | return 0; |
| 234 | icd->ops->set_bus_param = priv->set_bus_param; | 222 | } |
| 235 | icd->ops->query_bus_param = priv->query_bus_param; | ||
| 236 | priv->set_bus_param = NULL; | ||
| 237 | priv->query_bus_param = NULL; | ||
| 238 | 223 | ||
| 239 | v4l2_device_unregister_subdev(&priv->subdev); | 224 | static void sh_csi2_client_disconnect(struct sh_csi2 *priv) |
| 225 | { | ||
| 226 | struct soc_camera_device *icd = (struct soc_camera_device *)priv->subdev.grp_id; | ||
| 240 | 227 | ||
| 241 | pm_runtime_put(v4l2_get_subdevdata(&priv->subdev)); | 228 | priv->client = NULL; |
| 242 | break; | 229 | priv->subdev.grp_id = 0; |
| 243 | } | ||
| 244 | 230 | ||
| 245 | return NOTIFY_OK; | 231 | /* Driver is about to be unbound */ |
| 232 | icd->ops->set_bus_param = priv->set_bus_param; | ||
| 233 | icd->ops->query_bus_param = priv->query_bus_param; | ||
| 234 | priv->set_bus_param = NULL; | ||
| 235 | priv->query_bus_param = NULL; | ||
| 236 | |||
| 237 | pm_runtime_put(v4l2_get_subdevdata(&priv->subdev)); | ||
| 246 | } | 238 | } |
| 247 | 239 | ||
| 240 | static int sh_csi2_s_power(struct v4l2_subdev *sd, int on) | ||
| 241 | { | ||
| 242 | struct sh_csi2 *priv = container_of(sd, struct sh_csi2, subdev); | ||
| 243 | |||
| 244 | if (on) | ||
| 245 | return sh_csi2_client_connect(priv); | ||
| 246 | |||
| 247 | sh_csi2_client_disconnect(priv); | ||
| 248 | return 0; | ||
| 249 | } | ||
| 250 | |||
| 251 | static struct v4l2_subdev_core_ops sh_csi2_subdev_core_ops = { | ||
| 252 | .s_power = sh_csi2_s_power, | ||
| 253 | }; | ||
| 254 | |||
| 255 | static struct v4l2_subdev_ops sh_csi2_subdev_ops = { | ||
| 256 | .core = &sh_csi2_subdev_core_ops, | ||
| 257 | .video = &sh_csi2_subdev_video_ops, | ||
| 258 | }; | ||
| 259 | |||
| 248 | static __devinit int sh_csi2_probe(struct platform_device *pdev) | 260 | static __devinit int sh_csi2_probe(struct platform_device *pdev) |
| 249 | { | 261 | { |
| 250 | struct resource *res; | 262 | struct resource *res; |
| @@ -274,14 +286,6 @@ static __devinit int sh_csi2_probe(struct platform_device *pdev) | |||
| 274 | return -ENOMEM; | 286 | return -ENOMEM; |
| 275 | 287 | ||
| 276 | priv->irq = irq; | 288 | priv->irq = irq; |
| 277 | priv->notifier.notifier_call = sh_csi2_notify; | ||
| 278 | |||
| 279 | /* We MUST attach after the MIPI sensor */ | ||
| 280 | ret = bus_register_notifier(&soc_camera_bus_type, &priv->notifier); | ||
| 281 | if (ret < 0) { | ||
| 282 | dev_err(&pdev->dev, "CSI2 cannot register notifier\n"); | ||
| 283 | goto ernotify; | ||
| 284 | } | ||
| 285 | 289 | ||
| 286 | if (!request_mem_region(res->start, resource_size(res), pdev->name)) { | 290 | if (!request_mem_region(res->start, resource_size(res), pdev->name)) { |
| 287 | dev_err(&pdev->dev, "CSI2 register region already claimed\n"); | 291 | dev_err(&pdev->dev, "CSI2 register region already claimed\n"); |
| @@ -297,11 +301,17 @@ static __devinit int sh_csi2_probe(struct platform_device *pdev) | |||
| 297 | } | 301 | } |
| 298 | 302 | ||
| 299 | priv->pdev = pdev; | 303 | priv->pdev = pdev; |
| 304 | platform_set_drvdata(pdev, priv); | ||
| 300 | 305 | ||
| 301 | v4l2_subdev_init(&priv->subdev, &sh_csi2_subdev_ops); | 306 | v4l2_subdev_init(&priv->subdev, &sh_csi2_subdev_ops); |
| 302 | v4l2_set_subdevdata(&priv->subdev, &pdev->dev); | 307 | v4l2_set_subdevdata(&priv->subdev, &pdev->dev); |
| 303 | 308 | ||
| 304 | platform_set_drvdata(pdev, priv); | 309 | snprintf(priv->subdev.name, V4L2_SUBDEV_NAME_SIZE, "%s.mipi-csi", |
| 310 | dev_name(pdata->v4l2_dev->dev)); | ||
| 311 | ret = v4l2_device_register_subdev(pdata->v4l2_dev, &priv->subdev); | ||
| 312 | dev_dbg(&pdev->dev, "%s(%p): ret(register_subdev) = %d\n", __func__, priv, ret); | ||
| 313 | if (ret < 0) | ||
| 314 | goto esdreg; | ||
| 305 | 315 | ||
| 306 | pm_runtime_enable(&pdev->dev); | 316 | pm_runtime_enable(&pdev->dev); |
| 307 | 317 | ||
| @@ -309,11 +319,11 @@ static __devinit int sh_csi2_probe(struct platform_device *pdev) | |||
| 309 | 319 | ||
| 310 | return 0; | 320 | return 0; |
| 311 | 321 | ||
| 322 | esdreg: | ||
| 323 | iounmap(priv->base); | ||
| 312 | eremap: | 324 | eremap: |
| 313 | release_mem_region(res->start, resource_size(res)); | 325 | release_mem_region(res->start, resource_size(res)); |
| 314 | ereqreg: | 326 | ereqreg: |
| 315 | bus_unregister_notifier(&soc_camera_bus_type, &priv->notifier); | ||
| 316 | ernotify: | ||
| 317 | kfree(priv); | 327 | kfree(priv); |
| 318 | 328 | ||
| 319 | return ret; | 329 | return ret; |
| @@ -324,7 +334,7 @@ static __devexit int sh_csi2_remove(struct platform_device *pdev) | |||
| 324 | struct sh_csi2 *priv = platform_get_drvdata(pdev); | 334 | struct sh_csi2 *priv = platform_get_drvdata(pdev); |
| 325 | struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 335 | struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 326 | 336 | ||
| 327 | bus_unregister_notifier(&soc_camera_bus_type, &priv->notifier); | 337 | v4l2_device_unregister_subdev(&priv->subdev); |
| 328 | pm_runtime_disable(&pdev->dev); | 338 | pm_runtime_disable(&pdev->dev); |
| 329 | iounmap(priv->base); | 339 | iounmap(priv->base); |
| 330 | release_mem_region(res->start, resource_size(res)); | 340 | release_mem_region(res->start, resource_size(res)); |
| @@ -335,8 +345,9 @@ static __devexit int sh_csi2_remove(struct platform_device *pdev) | |||
| 335 | } | 345 | } |
| 336 | 346 | ||
| 337 | static struct platform_driver __refdata sh_csi2_pdrv = { | 347 | static struct platform_driver __refdata sh_csi2_pdrv = { |
| 338 | .remove = __devexit_p(sh_csi2_remove), | 348 | .remove = __devexit_p(sh_csi2_remove), |
| 339 | .driver = { | 349 | .probe = sh_csi2_probe, |
| 350 | .driver = { | ||
| 340 | .name = "sh-mobile-csi2", | 351 | .name = "sh-mobile-csi2", |
| 341 | .owner = THIS_MODULE, | 352 | .owner = THIS_MODULE, |
| 342 | }, | 353 | }, |
| @@ -344,7 +355,7 @@ static struct platform_driver __refdata sh_csi2_pdrv = { | |||
| 344 | 355 | ||
| 345 | static int __init sh_csi2_init(void) | 356 | static int __init sh_csi2_init(void) |
| 346 | { | 357 | { |
| 347 | return platform_driver_probe(&sh_csi2_pdrv, sh_csi2_probe); | 358 | return platform_driver_register(&sh_csi2_pdrv); |
| 348 | } | 359 | } |
| 349 | 360 | ||
| 350 | static void __exit sh_csi2_exit(void) | 361 | static void __exit sh_csi2_exit(void) |
diff --git a/drivers/media/video/sh_vou.c b/drivers/media/video/sh_vou.c index 07cf0c6c7c1f..6a729879d89e 100644 --- a/drivers/media/video/sh_vou.c +++ b/drivers/media/video/sh_vou.c | |||
| @@ -19,7 +19,6 @@ | |||
| 19 | #include <linux/platform_device.h> | 19 | #include <linux/platform_device.h> |
| 20 | #include <linux/pm_runtime.h> | 20 | #include <linux/pm_runtime.h> |
| 21 | #include <linux/slab.h> | 21 | #include <linux/slab.h> |
| 22 | #include <linux/version.h> | ||
| 23 | #include <linux/videodev2.h> | 22 | #include <linux/videodev2.h> |
| 24 | 23 | ||
| 25 | #include <media/sh_vou.h> | 24 | #include <media/sh_vou.h> |
| @@ -393,7 +392,6 @@ static int sh_vou_querycap(struct file *file, void *priv, | |||
| 393 | dev_dbg(vou_file->vbq.dev, "%s()\n", __func__); | 392 | dev_dbg(vou_file->vbq.dev, "%s()\n", __func__); |
| 394 | 393 | ||
| 395 | strlcpy(cap->card, "SuperH VOU", sizeof(cap->card)); | 394 | strlcpy(cap->card, "SuperH VOU", sizeof(cap->card)); |
| 396 | cap->version = KERNEL_VERSION(0, 1, 0); | ||
| 397 | cap->capabilities = V4L2_CAP_VIDEO_OUTPUT | V4L2_CAP_STREAMING; | 395 | cap->capabilities = V4L2_CAP_VIDEO_OUTPUT | V4L2_CAP_STREAMING; |
| 398 | return 0; | 396 | return 0; |
| 399 | } | 397 | } |
| @@ -1490,4 +1488,5 @@ module_exit(sh_vou_exit); | |||
| 1490 | MODULE_DESCRIPTION("SuperH VOU driver"); | 1488 | MODULE_DESCRIPTION("SuperH VOU driver"); |
| 1491 | MODULE_AUTHOR("Guennadi Liakhovetski <g.liakhovetski@gmx.de>"); | 1489 | MODULE_AUTHOR("Guennadi Liakhovetski <g.liakhovetski@gmx.de>"); |
| 1492 | MODULE_LICENSE("GPL v2"); | 1490 | MODULE_LICENSE("GPL v2"); |
| 1491 | MODULE_VERSION("0.1.0"); | ||
| 1493 | MODULE_ALIAS("platform:sh-vou"); | 1492 | MODULE_ALIAS("platform:sh-vou"); |
diff --git a/drivers/media/video/sn9c102/sn9c102.h b/drivers/media/video/sn9c102/sn9c102.h index cbfc44433b99..22ea211ab54f 100644 --- a/drivers/media/video/sn9c102/sn9c102.h +++ b/drivers/media/video/sn9c102/sn9c102.h | |||
| @@ -21,7 +21,6 @@ | |||
| 21 | #ifndef _SN9C102_H_ | 21 | #ifndef _SN9C102_H_ |
| 22 | #define _SN9C102_H_ | 22 | #define _SN9C102_H_ |
| 23 | 23 | ||
| 24 | #include <linux/version.h> | ||
| 25 | #include <linux/usb.h> | 24 | #include <linux/usb.h> |
| 26 | #include <linux/videodev2.h> | 25 | #include <linux/videodev2.h> |
| 27 | #include <media/v4l2-common.h> | 26 | #include <media/v4l2-common.h> |
diff --git a/drivers/media/video/sn9c102/sn9c102_core.c b/drivers/media/video/sn9c102/sn9c102_core.c index 0e07c493e6f0..16cb07c5c27b 100644 --- a/drivers/media/video/sn9c102/sn9c102_core.c +++ b/drivers/media/video/sn9c102/sn9c102_core.c | |||
| @@ -33,6 +33,7 @@ | |||
| 33 | #include <linux/stat.h> | 33 | #include <linux/stat.h> |
| 34 | #include <linux/mm.h> | 34 | #include <linux/mm.h> |
| 35 | #include <linux/vmalloc.h> | 35 | #include <linux/vmalloc.h> |
| 36 | #include <linux/version.h> | ||
| 36 | #include <linux/page-flags.h> | 37 | #include <linux/page-flags.h> |
| 37 | #include <asm/byteorder.h> | 38 | #include <asm/byteorder.h> |
| 38 | #include <asm/page.h> | 39 | #include <asm/page.h> |
| @@ -47,8 +48,7 @@ | |||
| 47 | #define SN9C102_MODULE_AUTHOR "(C) 2004-2007 Luca Risolia" | 48 | #define SN9C102_MODULE_AUTHOR "(C) 2004-2007 Luca Risolia" |
| 48 | #define SN9C102_AUTHOR_EMAIL "<luca.risolia@studio.unibo.it>" | 49 | #define SN9C102_AUTHOR_EMAIL "<luca.risolia@studio.unibo.it>" |
| 49 | #define SN9C102_MODULE_LICENSE "GPL" | 50 | #define SN9C102_MODULE_LICENSE "GPL" |
| 50 | #define SN9C102_MODULE_VERSION "1:1.47pre49" | 51 | #define SN9C102_MODULE_VERSION "1:1.48" |
| 51 | #define SN9C102_MODULE_VERSION_CODE KERNEL_VERSION(1, 1, 47) | ||
| 52 | 52 | ||
| 53 | /*****************************************************************************/ | 53 | /*****************************************************************************/ |
| 54 | 54 | ||
| @@ -2158,7 +2158,7 @@ sn9c102_vidioc_querycap(struct sn9c102_device* cam, void __user * arg) | |||
| 2158 | { | 2158 | { |
| 2159 | struct v4l2_capability cap = { | 2159 | struct v4l2_capability cap = { |
| 2160 | .driver = "sn9c102", | 2160 | .driver = "sn9c102", |
| 2161 | .version = SN9C102_MODULE_VERSION_CODE, | 2161 | .version = LINUX_VERSION_CODE, |
| 2162 | .capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE | | 2162 | .capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE | |
| 2163 | V4L2_CAP_STREAMING, | 2163 | V4L2_CAP_STREAMING, |
| 2164 | }; | 2164 | }; |
| @@ -3187,16 +3187,8 @@ static long sn9c102_ioctl_v4l2(struct file *filp, | |||
| 3187 | case VIDIOC_S_AUDIO: | 3187 | case VIDIOC_S_AUDIO: |
| 3188 | return sn9c102_vidioc_s_audio(cam, arg); | 3188 | return sn9c102_vidioc_s_audio(cam, arg); |
| 3189 | 3189 | ||
| 3190 | case VIDIOC_G_STD: | ||
| 3191 | case VIDIOC_S_STD: | ||
| 3192 | case VIDIOC_QUERYSTD: | ||
| 3193 | case VIDIOC_ENUMSTD: | ||
| 3194 | case VIDIOC_QUERYMENU: | ||
| 3195 | case VIDIOC_ENUM_FRAMEINTERVALS: | ||
| 3196 | return -EINVAL; | ||
| 3197 | |||
| 3198 | default: | 3190 | default: |
| 3199 | return -EINVAL; | 3191 | return -ENOTTY; |
| 3200 | 3192 | ||
| 3201 | } | 3193 | } |
| 3202 | } | 3194 | } |
diff --git a/drivers/media/video/soc_camera.c b/drivers/media/video/soc_camera.c index 4e4d4122d9a6..5bdfe7e16bc1 100644 --- a/drivers/media/video/soc_camera.c +++ b/drivers/media/video/soc_camera.c | |||
| @@ -60,14 +60,14 @@ static int soc_camera_power_set(struct soc_camera_device *icd, | |||
| 60 | ret = regulator_bulk_enable(icl->num_regulators, | 60 | ret = regulator_bulk_enable(icl->num_regulators, |
| 61 | icl->regulators); | 61 | icl->regulators); |
| 62 | if (ret < 0) { | 62 | if (ret < 0) { |
| 63 | dev_err(&icd->dev, "Cannot enable regulators\n"); | 63 | dev_err(icd->pdev, "Cannot enable regulators\n"); |
| 64 | return ret; | 64 | return ret; |
| 65 | } | 65 | } |
| 66 | 66 | ||
| 67 | if (icl->power) | 67 | if (icl->power) |
| 68 | ret = icl->power(icd->pdev, power_on); | 68 | ret = icl->power(icd->pdev, power_on); |
| 69 | if (ret < 0) { | 69 | if (ret < 0) { |
| 70 | dev_err(&icd->dev, | 70 | dev_err(icd->pdev, |
| 71 | "Platform failed to power-on the camera.\n"); | 71 | "Platform failed to power-on the camera.\n"); |
| 72 | 72 | ||
| 73 | regulator_bulk_disable(icl->num_regulators, | 73 | regulator_bulk_disable(icl->num_regulators, |
| @@ -79,7 +79,7 @@ static int soc_camera_power_set(struct soc_camera_device *icd, | |||
| 79 | if (icl->power) | 79 | if (icl->power) |
| 80 | ret = icl->power(icd->pdev, 0); | 80 | ret = icl->power(icd->pdev, 0); |
| 81 | if (ret < 0) { | 81 | if (ret < 0) { |
| 82 | dev_err(&icd->dev, | 82 | dev_err(icd->pdev, |
| 83 | "Platform failed to power-off the camera.\n"); | 83 | "Platform failed to power-off the camera.\n"); |
| 84 | return ret; | 84 | return ret; |
| 85 | } | 85 | } |
| @@ -87,7 +87,7 @@ static int soc_camera_power_set(struct soc_camera_device *icd, | |||
| 87 | ret = regulator_bulk_disable(icl->num_regulators, | 87 | ret = regulator_bulk_disable(icl->num_regulators, |
| 88 | icl->regulators); | 88 | icl->regulators); |
| 89 | if (ret < 0) { | 89 | if (ret < 0) { |
| 90 | dev_err(&icd->dev, "Cannot disable regulators\n"); | 90 | dev_err(icd->pdev, "Cannot disable regulators\n"); |
| 91 | return ret; | 91 | return ret; |
| 92 | } | 92 | } |
| 93 | } | 93 | } |
| @@ -147,11 +147,11 @@ EXPORT_SYMBOL(soc_camera_apply_sensor_flags); | |||
| 147 | static int soc_camera_try_fmt(struct soc_camera_device *icd, | 147 | static int soc_camera_try_fmt(struct soc_camera_device *icd, |
| 148 | struct v4l2_format *f) | 148 | struct v4l2_format *f) |
| 149 | { | 149 | { |
| 150 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 150 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 151 | struct v4l2_pix_format *pix = &f->fmt.pix; | 151 | struct v4l2_pix_format *pix = &f->fmt.pix; |
| 152 | int ret; | 152 | int ret; |
| 153 | 153 | ||
| 154 | dev_dbg(&icd->dev, "TRY_FMT(%c%c%c%c, %ux%u)\n", | 154 | dev_dbg(icd->pdev, "TRY_FMT(%c%c%c%c, %ux%u)\n", |
| 155 | pixfmtstr(pix->pixelformat), pix->width, pix->height); | 155 | pixfmtstr(pix->pixelformat), pix->width, pix->height); |
| 156 | 156 | ||
| 157 | pix->bytesperline = 0; | 157 | pix->bytesperline = 0; |
| @@ -199,22 +199,15 @@ static int soc_camera_try_fmt_vid_cap(struct file *file, void *priv, | |||
| 199 | static int soc_camera_enum_input(struct file *file, void *priv, | 199 | static int soc_camera_enum_input(struct file *file, void *priv, |
| 200 | struct v4l2_input *inp) | 200 | struct v4l2_input *inp) |
| 201 | { | 201 | { |
| 202 | struct soc_camera_device *icd = file->private_data; | ||
| 203 | int ret = 0; | ||
| 204 | |||
| 205 | if (inp->index != 0) | 202 | if (inp->index != 0) |
| 206 | return -EINVAL; | 203 | return -EINVAL; |
| 207 | 204 | ||
| 208 | if (icd->ops->enum_input) | 205 | /* default is camera */ |
| 209 | ret = icd->ops->enum_input(icd, inp); | 206 | inp->type = V4L2_INPUT_TYPE_CAMERA; |
| 210 | else { | 207 | inp->std = V4L2_STD_UNKNOWN; |
| 211 | /* default is camera */ | 208 | strcpy(inp->name, "Camera"); |
| 212 | inp->type = V4L2_INPUT_TYPE_CAMERA; | ||
| 213 | inp->std = V4L2_STD_UNKNOWN; | ||
| 214 | strcpy(inp->name, "Camera"); | ||
| 215 | } | ||
| 216 | 209 | ||
| 217 | return ret; | 210 | return 0; |
| 218 | } | 211 | } |
| 219 | 212 | ||
| 220 | static int soc_camera_g_input(struct file *file, void *priv, unsigned int *i) | 213 | static int soc_camera_g_input(struct file *file, void *priv, unsigned int *i) |
| @@ -244,7 +237,7 @@ static int soc_camera_enum_fsizes(struct file *file, void *fh, | |||
| 244 | struct v4l2_frmsizeenum *fsize) | 237 | struct v4l2_frmsizeenum *fsize) |
| 245 | { | 238 | { |
| 246 | struct soc_camera_device *icd = file->private_data; | 239 | struct soc_camera_device *icd = file->private_data; |
| 247 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 240 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 248 | 241 | ||
| 249 | return ici->ops->enum_fsizes(icd, fsize); | 242 | return ici->ops->enum_fsizes(icd, fsize); |
| 250 | } | 243 | } |
| @@ -254,7 +247,7 @@ static int soc_camera_reqbufs(struct file *file, void *priv, | |||
| 254 | { | 247 | { |
| 255 | int ret; | 248 | int ret; |
| 256 | struct soc_camera_device *icd = file->private_data; | 249 | struct soc_camera_device *icd = file->private_data; |
| 257 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 250 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 258 | 251 | ||
| 259 | WARN_ON(priv != file->private_data); | 252 | WARN_ON(priv != file->private_data); |
| 260 | 253 | ||
| @@ -281,7 +274,7 @@ static int soc_camera_querybuf(struct file *file, void *priv, | |||
| 281 | struct v4l2_buffer *p) | 274 | struct v4l2_buffer *p) |
| 282 | { | 275 | { |
| 283 | struct soc_camera_device *icd = file->private_data; | 276 | struct soc_camera_device *icd = file->private_data; |
| 284 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 277 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 285 | 278 | ||
| 286 | WARN_ON(priv != file->private_data); | 279 | WARN_ON(priv != file->private_data); |
| 287 | 280 | ||
| @@ -295,7 +288,7 @@ static int soc_camera_qbuf(struct file *file, void *priv, | |||
| 295 | struct v4l2_buffer *p) | 288 | struct v4l2_buffer *p) |
| 296 | { | 289 | { |
| 297 | struct soc_camera_device *icd = file->private_data; | 290 | struct soc_camera_device *icd = file->private_data; |
| 298 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 291 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 299 | 292 | ||
| 300 | WARN_ON(priv != file->private_data); | 293 | WARN_ON(priv != file->private_data); |
| 301 | 294 | ||
| @@ -312,7 +305,7 @@ static int soc_camera_dqbuf(struct file *file, void *priv, | |||
| 312 | struct v4l2_buffer *p) | 305 | struct v4l2_buffer *p) |
| 313 | { | 306 | { |
| 314 | struct soc_camera_device *icd = file->private_data; | 307 | struct soc_camera_device *icd = file->private_data; |
| 315 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 308 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 316 | 309 | ||
| 317 | WARN_ON(priv != file->private_data); | 310 | WARN_ON(priv != file->private_data); |
| 318 | 311 | ||
| @@ -329,7 +322,7 @@ static int soc_camera_dqbuf(struct file *file, void *priv, | |||
| 329 | static int soc_camera_init_user_formats(struct soc_camera_device *icd) | 322 | static int soc_camera_init_user_formats(struct soc_camera_device *icd) |
| 330 | { | 323 | { |
| 331 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | 324 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); |
| 332 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 325 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 333 | unsigned int i, fmts = 0, raw_fmts = 0; | 326 | unsigned int i, fmts = 0, raw_fmts = 0; |
| 334 | int ret; | 327 | int ret; |
| 335 | enum v4l2_mbus_pixelcode code; | 328 | enum v4l2_mbus_pixelcode code; |
| @@ -363,7 +356,7 @@ static int soc_camera_init_user_formats(struct soc_camera_device *icd) | |||
| 363 | if (!icd->user_formats) | 356 | if (!icd->user_formats) |
| 364 | return -ENOMEM; | 357 | return -ENOMEM; |
| 365 | 358 | ||
| 366 | dev_dbg(&icd->dev, "Found %d supported formats.\n", fmts); | 359 | dev_dbg(icd->pdev, "Found %d supported formats.\n", fmts); |
| 367 | 360 | ||
| 368 | /* Second pass - actually fill data formats */ | 361 | /* Second pass - actually fill data formats */ |
| 369 | fmts = 0; | 362 | fmts = 0; |
| @@ -395,7 +388,7 @@ egfmt: | |||
| 395 | /* Always entered with .video_lock held */ | 388 | /* Always entered with .video_lock held */ |
| 396 | static void soc_camera_free_user_formats(struct soc_camera_device *icd) | 389 | static void soc_camera_free_user_formats(struct soc_camera_device *icd) |
| 397 | { | 390 | { |
| 398 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 391 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 399 | 392 | ||
| 400 | if (ici->ops->put_formats) | 393 | if (ici->ops->put_formats) |
| 401 | ici->ops->put_formats(icd); | 394 | ici->ops->put_formats(icd); |
| @@ -409,11 +402,11 @@ static void soc_camera_free_user_formats(struct soc_camera_device *icd) | |||
| 409 | static int soc_camera_set_fmt(struct soc_camera_device *icd, | 402 | static int soc_camera_set_fmt(struct soc_camera_device *icd, |
| 410 | struct v4l2_format *f) | 403 | struct v4l2_format *f) |
| 411 | { | 404 | { |
| 412 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 405 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 413 | struct v4l2_pix_format *pix = &f->fmt.pix; | 406 | struct v4l2_pix_format *pix = &f->fmt.pix; |
| 414 | int ret; | 407 | int ret; |
| 415 | 408 | ||
| 416 | dev_dbg(&icd->dev, "S_FMT(%c%c%c%c, %ux%u)\n", | 409 | dev_dbg(icd->pdev, "S_FMT(%c%c%c%c, %ux%u)\n", |
| 417 | pixfmtstr(pix->pixelformat), pix->width, pix->height); | 410 | pixfmtstr(pix->pixelformat), pix->width, pix->height); |
| 418 | 411 | ||
| 419 | /* We always call try_fmt() before set_fmt() or set_crop() */ | 412 | /* We always call try_fmt() before set_fmt() or set_crop() */ |
| @@ -426,7 +419,7 @@ static int soc_camera_set_fmt(struct soc_camera_device *icd, | |||
| 426 | return ret; | 419 | return ret; |
| 427 | } else if (!icd->current_fmt || | 420 | } else if (!icd->current_fmt || |
| 428 | icd->current_fmt->host_fmt->fourcc != pix->pixelformat) { | 421 | icd->current_fmt->host_fmt->fourcc != pix->pixelformat) { |
| 429 | dev_err(&icd->dev, | 422 | dev_err(icd->pdev, |
| 430 | "Host driver hasn't set up current format correctly!\n"); | 423 | "Host driver hasn't set up current format correctly!\n"); |
| 431 | return -EINVAL; | 424 | return -EINVAL; |
| 432 | } | 425 | } |
| @@ -440,7 +433,7 @@ static int soc_camera_set_fmt(struct soc_camera_device *icd, | |||
| 440 | if (ici->ops->init_videobuf) | 433 | if (ici->ops->init_videobuf) |
| 441 | icd->vb_vidq.field = pix->field; | 434 | icd->vb_vidq.field = pix->field; |
| 442 | 435 | ||
| 443 | dev_dbg(&icd->dev, "set width: %d height: %d\n", | 436 | dev_dbg(icd->pdev, "set width: %d height: %d\n", |
| 444 | icd->user_width, icd->user_height); | 437 | icd->user_width, icd->user_height); |
| 445 | 438 | ||
| 446 | /* set physical bus parameters */ | 439 | /* set physical bus parameters */ |
| @@ -450,9 +443,7 @@ static int soc_camera_set_fmt(struct soc_camera_device *icd, | |||
| 450 | static int soc_camera_open(struct file *file) | 443 | static int soc_camera_open(struct file *file) |
| 451 | { | 444 | { |
| 452 | struct video_device *vdev = video_devdata(file); | 445 | struct video_device *vdev = video_devdata(file); |
| 453 | struct soc_camera_device *icd = container_of(vdev->parent, | 446 | struct soc_camera_device *icd = dev_get_drvdata(vdev->parent); |
| 454 | struct soc_camera_device, | ||
| 455 | dev); | ||
| 456 | struct soc_camera_link *icl = to_soc_camera_link(icd); | 447 | struct soc_camera_link *icl = to_soc_camera_link(icd); |
| 457 | struct soc_camera_host *ici; | 448 | struct soc_camera_host *ici; |
| 458 | int ret; | 449 | int ret; |
| @@ -461,10 +452,10 @@ static int soc_camera_open(struct file *file) | |||
| 461 | /* No device driver attached */ | 452 | /* No device driver attached */ |
| 462 | return -ENODEV; | 453 | return -ENODEV; |
| 463 | 454 | ||
| 464 | ici = to_soc_camera_host(icd->dev.parent); | 455 | ici = to_soc_camera_host(icd->parent); |
| 465 | 456 | ||
| 466 | if (!try_module_get(ici->ops->owner)) { | 457 | if (!try_module_get(ici->ops->owner)) { |
| 467 | dev_err(&icd->dev, "Couldn't lock capture bus driver.\n"); | 458 | dev_err(icd->pdev, "Couldn't lock capture bus driver.\n"); |
| 468 | return -EINVAL; | 459 | return -EINVAL; |
| 469 | } | 460 | } |
| 470 | 461 | ||
| @@ -495,7 +486,7 @@ static int soc_camera_open(struct file *file) | |||
| 495 | 486 | ||
| 496 | ret = ici->ops->add(icd); | 487 | ret = ici->ops->add(icd); |
| 497 | if (ret < 0) { | 488 | if (ret < 0) { |
| 498 | dev_err(&icd->dev, "Couldn't activate the camera: %d\n", ret); | 489 | dev_err(icd->pdev, "Couldn't activate the camera: %d\n", ret); |
| 499 | goto eiciadd; | 490 | goto eiciadd; |
| 500 | } | 491 | } |
| 501 | 492 | ||
| @@ -524,7 +515,7 @@ static int soc_camera_open(struct file *file) | |||
| 524 | } | 515 | } |
| 525 | 516 | ||
| 526 | file->private_data = icd; | 517 | file->private_data = icd; |
| 527 | dev_dbg(&icd->dev, "camera device open\n"); | 518 | dev_dbg(icd->pdev, "camera device open\n"); |
| 528 | 519 | ||
| 529 | return 0; | 520 | return 0; |
| 530 | 521 | ||
| @@ -549,7 +540,7 @@ epower: | |||
| 549 | static int soc_camera_close(struct file *file) | 540 | static int soc_camera_close(struct file *file) |
| 550 | { | 541 | { |
| 551 | struct soc_camera_device *icd = file->private_data; | 542 | struct soc_camera_device *icd = file->private_data; |
| 552 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 543 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 553 | 544 | ||
| 554 | icd->use_count--; | 545 | icd->use_count--; |
| 555 | if (!icd->use_count) { | 546 | if (!icd->use_count) { |
| @@ -570,7 +561,7 @@ static int soc_camera_close(struct file *file) | |||
| 570 | 561 | ||
| 571 | module_put(ici->ops->owner); | 562 | module_put(ici->ops->owner); |
| 572 | 563 | ||
| 573 | dev_dbg(&icd->dev, "camera device close\n"); | 564 | dev_dbg(icd->pdev, "camera device close\n"); |
| 574 | 565 | ||
| 575 | return 0; | 566 | return 0; |
| 576 | } | 567 | } |
| @@ -581,7 +572,7 @@ static ssize_t soc_camera_read(struct file *file, char __user *buf, | |||
| 581 | struct soc_camera_device *icd = file->private_data; | 572 | struct soc_camera_device *icd = file->private_data; |
| 582 | int err = -EINVAL; | 573 | int err = -EINVAL; |
| 583 | 574 | ||
| 584 | dev_err(&icd->dev, "camera device read not implemented\n"); | 575 | dev_err(icd->pdev, "camera device read not implemented\n"); |
| 585 | 576 | ||
| 586 | return err; | 577 | return err; |
| 587 | } | 578 | } |
| @@ -589,10 +580,10 @@ static ssize_t soc_camera_read(struct file *file, char __user *buf, | |||
| 589 | static int soc_camera_mmap(struct file *file, struct vm_area_struct *vma) | 580 | static int soc_camera_mmap(struct file *file, struct vm_area_struct *vma) |
| 590 | { | 581 | { |
| 591 | struct soc_camera_device *icd = file->private_data; | 582 | struct soc_camera_device *icd = file->private_data; |
| 592 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 583 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 593 | int err; | 584 | int err; |
| 594 | 585 | ||
| 595 | dev_dbg(&icd->dev, "mmap called, vma=0x%08lx\n", (unsigned long)vma); | 586 | dev_dbg(icd->pdev, "mmap called, vma=0x%08lx\n", (unsigned long)vma); |
| 596 | 587 | ||
| 597 | if (icd->streamer != file) | 588 | if (icd->streamer != file) |
| 598 | return -EBUSY; | 589 | return -EBUSY; |
| @@ -602,7 +593,7 @@ static int soc_camera_mmap(struct file *file, struct vm_area_struct *vma) | |||
| 602 | else | 593 | else |
| 603 | err = vb2_mmap(&icd->vb2_vidq, vma); | 594 | err = vb2_mmap(&icd->vb2_vidq, vma); |
| 604 | 595 | ||
| 605 | dev_dbg(&icd->dev, "vma start=0x%08lx, size=%ld, ret=%d\n", | 596 | dev_dbg(icd->pdev, "vma start=0x%08lx, size=%ld, ret=%d\n", |
| 606 | (unsigned long)vma->vm_start, | 597 | (unsigned long)vma->vm_start, |
| 607 | (unsigned long)vma->vm_end - (unsigned long)vma->vm_start, | 598 | (unsigned long)vma->vm_end - (unsigned long)vma->vm_start, |
| 608 | err); | 599 | err); |
| @@ -613,13 +604,13 @@ static int soc_camera_mmap(struct file *file, struct vm_area_struct *vma) | |||
| 613 | static unsigned int soc_camera_poll(struct file *file, poll_table *pt) | 604 | static unsigned int soc_camera_poll(struct file *file, poll_table *pt) |
| 614 | { | 605 | { |
| 615 | struct soc_camera_device *icd = file->private_data; | 606 | struct soc_camera_device *icd = file->private_data; |
| 616 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 607 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 617 | 608 | ||
| 618 | if (icd->streamer != file) | 609 | if (icd->streamer != file) |
| 619 | return -EBUSY; | 610 | return -EBUSY; |
| 620 | 611 | ||
| 621 | if (ici->ops->init_videobuf && list_empty(&icd->vb_vidq.stream)) { | 612 | if (ici->ops->init_videobuf && list_empty(&icd->vb_vidq.stream)) { |
| 622 | dev_err(&icd->dev, "Trying to poll with no queued buffers!\n"); | 613 | dev_err(icd->pdev, "Trying to poll with no queued buffers!\n"); |
| 623 | return POLLERR; | 614 | return POLLERR; |
| 624 | } | 615 | } |
| 625 | 616 | ||
| @@ -659,15 +650,15 @@ static int soc_camera_s_fmt_vid_cap(struct file *file, void *priv, | |||
| 659 | WARN_ON(priv != file->private_data); | 650 | WARN_ON(priv != file->private_data); |
| 660 | 651 | ||
| 661 | if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) { | 652 | if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) { |
| 662 | dev_warn(&icd->dev, "Wrong buf-type %d\n", f->type); | 653 | dev_warn(icd->pdev, "Wrong buf-type %d\n", f->type); |
| 663 | return -EINVAL; | 654 | return -EINVAL; |
| 664 | } | 655 | } |
| 665 | 656 | ||
| 666 | if (icd->streamer && icd->streamer != file) | 657 | if (icd->streamer && icd->streamer != file) |
| 667 | return -EBUSY; | 658 | return -EBUSY; |
| 668 | 659 | ||
| 669 | if (is_streaming(to_soc_camera_host(icd->dev.parent), icd)) { | 660 | if (is_streaming(to_soc_camera_host(icd->parent), icd)) { |
| 670 | dev_err(&icd->dev, "S_FMT denied: queue initialised\n"); | 661 | dev_err(icd->pdev, "S_FMT denied: queue initialised\n"); |
| 671 | return -EBUSY; | 662 | return -EBUSY; |
| 672 | } | 663 | } |
| 673 | 664 | ||
| @@ -716,7 +707,7 @@ static int soc_camera_g_fmt_vid_cap(struct file *file, void *priv, | |||
| 716 | pix->field = icd->field; | 707 | pix->field = icd->field; |
| 717 | pix->pixelformat = icd->current_fmt->host_fmt->fourcc; | 708 | pix->pixelformat = icd->current_fmt->host_fmt->fourcc; |
| 718 | pix->colorspace = icd->colorspace; | 709 | pix->colorspace = icd->colorspace; |
| 719 | dev_dbg(&icd->dev, "current_fmt->fourcc: 0x%08x\n", | 710 | dev_dbg(icd->pdev, "current_fmt->fourcc: 0x%08x\n", |
| 720 | icd->current_fmt->host_fmt->fourcc); | 711 | icd->current_fmt->host_fmt->fourcc); |
| 721 | return 0; | 712 | return 0; |
| 722 | } | 713 | } |
| @@ -725,7 +716,7 @@ static int soc_camera_querycap(struct file *file, void *priv, | |||
| 725 | struct v4l2_capability *cap) | 716 | struct v4l2_capability *cap) |
| 726 | { | 717 | { |
| 727 | struct soc_camera_device *icd = file->private_data; | 718 | struct soc_camera_device *icd = file->private_data; |
| 728 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 719 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 729 | 720 | ||
| 730 | WARN_ON(priv != file->private_data); | 721 | WARN_ON(priv != file->private_data); |
| 731 | 722 | ||
| @@ -737,7 +728,7 @@ static int soc_camera_streamon(struct file *file, void *priv, | |||
| 737 | enum v4l2_buf_type i) | 728 | enum v4l2_buf_type i) |
| 738 | { | 729 | { |
| 739 | struct soc_camera_device *icd = file->private_data; | 730 | struct soc_camera_device *icd = file->private_data; |
| 740 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 731 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 741 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | 732 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); |
| 742 | int ret; | 733 | int ret; |
| 743 | 734 | ||
| @@ -766,7 +757,7 @@ static int soc_camera_streamoff(struct file *file, void *priv, | |||
| 766 | { | 757 | { |
| 767 | struct soc_camera_device *icd = file->private_data; | 758 | struct soc_camera_device *icd = file->private_data; |
| 768 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | 759 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); |
| 769 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 760 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 770 | 761 | ||
| 771 | WARN_ON(priv != file->private_data); | 762 | WARN_ON(priv != file->private_data); |
| 772 | 763 | ||
| @@ -794,7 +785,7 @@ static int soc_camera_queryctrl(struct file *file, void *priv, | |||
| 794 | struct v4l2_queryctrl *qc) | 785 | struct v4l2_queryctrl *qc) |
| 795 | { | 786 | { |
| 796 | struct soc_camera_device *icd = file->private_data; | 787 | struct soc_camera_device *icd = file->private_data; |
| 797 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 788 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 798 | int i; | 789 | int i; |
| 799 | 790 | ||
| 800 | WARN_ON(priv != file->private_data); | 791 | WARN_ON(priv != file->private_data); |
| @@ -825,7 +816,7 @@ static int soc_camera_g_ctrl(struct file *file, void *priv, | |||
| 825 | struct v4l2_control *ctrl) | 816 | struct v4l2_control *ctrl) |
| 826 | { | 817 | { |
| 827 | struct soc_camera_device *icd = file->private_data; | 818 | struct soc_camera_device *icd = file->private_data; |
| 828 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 819 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 829 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | 820 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); |
| 830 | int ret; | 821 | int ret; |
| 831 | 822 | ||
| @@ -844,7 +835,7 @@ static int soc_camera_s_ctrl(struct file *file, void *priv, | |||
| 844 | struct v4l2_control *ctrl) | 835 | struct v4l2_control *ctrl) |
| 845 | { | 836 | { |
| 846 | struct soc_camera_device *icd = file->private_data; | 837 | struct soc_camera_device *icd = file->private_data; |
| 847 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 838 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 848 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | 839 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); |
| 849 | int ret; | 840 | int ret; |
| 850 | 841 | ||
| @@ -863,7 +854,7 @@ static int soc_camera_cropcap(struct file *file, void *fh, | |||
| 863 | struct v4l2_cropcap *a) | 854 | struct v4l2_cropcap *a) |
| 864 | { | 855 | { |
| 865 | struct soc_camera_device *icd = file->private_data; | 856 | struct soc_camera_device *icd = file->private_data; |
| 866 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 857 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 867 | 858 | ||
| 868 | return ici->ops->cropcap(icd, a); | 859 | return ici->ops->cropcap(icd, a); |
| 869 | } | 860 | } |
| @@ -872,7 +863,7 @@ static int soc_camera_g_crop(struct file *file, void *fh, | |||
| 872 | struct v4l2_crop *a) | 863 | struct v4l2_crop *a) |
| 873 | { | 864 | { |
| 874 | struct soc_camera_device *icd = file->private_data; | 865 | struct soc_camera_device *icd = file->private_data; |
| 875 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 866 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 876 | int ret; | 867 | int ret; |
| 877 | 868 | ||
| 878 | ret = ici->ops->get_crop(icd, a); | 869 | ret = ici->ops->get_crop(icd, a); |
| @@ -889,7 +880,7 @@ static int soc_camera_s_crop(struct file *file, void *fh, | |||
| 889 | struct v4l2_crop *a) | 880 | struct v4l2_crop *a) |
| 890 | { | 881 | { |
| 891 | struct soc_camera_device *icd = file->private_data; | 882 | struct soc_camera_device *icd = file->private_data; |
| 892 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 883 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 893 | struct v4l2_rect *rect = &a->c; | 884 | struct v4l2_rect *rect = &a->c; |
| 894 | struct v4l2_crop current_crop; | 885 | struct v4l2_crop current_crop; |
| 895 | int ret; | 886 | int ret; |
| @@ -897,7 +888,7 @@ static int soc_camera_s_crop(struct file *file, void *fh, | |||
| 897 | if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | 888 | if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) |
| 898 | return -EINVAL; | 889 | return -EINVAL; |
| 899 | 890 | ||
| 900 | dev_dbg(&icd->dev, "S_CROP(%ux%u@%u:%u)\n", | 891 | dev_dbg(icd->pdev, "S_CROP(%ux%u@%u:%u)\n", |
| 901 | rect->width, rect->height, rect->left, rect->top); | 892 | rect->width, rect->height, rect->left, rect->top); |
| 902 | 893 | ||
| 903 | /* If get_crop fails, we'll let host and / or client drivers decide */ | 894 | /* If get_crop fails, we'll let host and / or client drivers decide */ |
| @@ -905,7 +896,7 @@ static int soc_camera_s_crop(struct file *file, void *fh, | |||
| 905 | 896 | ||
| 906 | /* Prohibit window size change with initialised buffers */ | 897 | /* Prohibit window size change with initialised buffers */ |
| 907 | if (ret < 0) { | 898 | if (ret < 0) { |
| 908 | dev_err(&icd->dev, | 899 | dev_err(icd->pdev, |
| 909 | "S_CROP denied: getting current crop failed\n"); | 900 | "S_CROP denied: getting current crop failed\n"); |
| 910 | } else if ((a->c.width == current_crop.c.width && | 901 | } else if ((a->c.width == current_crop.c.width && |
| 911 | a->c.height == current_crop.c.height) || | 902 | a->c.height == current_crop.c.height) || |
| @@ -915,7 +906,7 @@ static int soc_camera_s_crop(struct file *file, void *fh, | |||
| 915 | } else if (ici->ops->set_livecrop) { | 906 | } else if (ici->ops->set_livecrop) { |
| 916 | ret = ici->ops->set_livecrop(icd, a); | 907 | ret = ici->ops->set_livecrop(icd, a); |
| 917 | } else { | 908 | } else { |
| 918 | dev_err(&icd->dev, | 909 | dev_err(icd->pdev, |
| 919 | "S_CROP denied: queue initialised and sizes differ\n"); | 910 | "S_CROP denied: queue initialised and sizes differ\n"); |
| 920 | ret = -EBUSY; | 911 | ret = -EBUSY; |
| 921 | } | 912 | } |
| @@ -927,7 +918,7 @@ static int soc_camera_g_parm(struct file *file, void *fh, | |||
| 927 | struct v4l2_streamparm *a) | 918 | struct v4l2_streamparm *a) |
| 928 | { | 919 | { |
| 929 | struct soc_camera_device *icd = file->private_data; | 920 | struct soc_camera_device *icd = file->private_data; |
| 930 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 921 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 931 | 922 | ||
| 932 | if (ici->ops->get_parm) | 923 | if (ici->ops->get_parm) |
| 933 | return ici->ops->get_parm(icd, a); | 924 | return ici->ops->get_parm(icd, a); |
| @@ -939,7 +930,7 @@ static int soc_camera_s_parm(struct file *file, void *fh, | |||
| 939 | struct v4l2_streamparm *a) | 930 | struct v4l2_streamparm *a) |
| 940 | { | 931 | { |
| 941 | struct soc_camera_device *icd = file->private_data; | 932 | struct soc_camera_device *icd = file->private_data; |
| 942 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 933 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 943 | 934 | ||
| 944 | if (ici->ops->set_parm) | 935 | if (ici->ops->set_parm) |
| 945 | return ici->ops->set_parm(icd, a); | 936 | return ici->ops->set_parm(icd, a); |
| @@ -976,6 +967,8 @@ static int soc_camera_s_register(struct file *file, void *fh, | |||
| 976 | } | 967 | } |
| 977 | #endif | 968 | #endif |
| 978 | 969 | ||
| 970 | static int soc_camera_probe(struct soc_camera_device *icd); | ||
| 971 | |||
| 979 | /* So far this function cannot fail */ | 972 | /* So far this function cannot fail */ |
| 980 | static void scan_add_host(struct soc_camera_host *ici) | 973 | static void scan_add_host(struct soc_camera_host *ici) |
| 981 | { | 974 | { |
| @@ -986,15 +979,9 @@ static void scan_add_host(struct soc_camera_host *ici) | |||
| 986 | list_for_each_entry(icd, &devices, list) { | 979 | list_for_each_entry(icd, &devices, list) { |
| 987 | if (icd->iface == ici->nr) { | 980 | if (icd->iface == ici->nr) { |
| 988 | int ret; | 981 | int ret; |
| 989 | icd->dev.parent = ici->v4l2_dev.dev; | 982 | |
| 990 | dev_set_name(&icd->dev, "%u-%u", icd->iface, | 983 | icd->parent = ici->v4l2_dev.dev; |
| 991 | icd->devnum); | 984 | ret = soc_camera_probe(icd); |
| 992 | ret = device_register(&icd->dev); | ||
| 993 | if (ret < 0) { | ||
| 994 | icd->dev.parent = NULL; | ||
| 995 | dev_err(&icd->dev, | ||
| 996 | "Cannot register device: %d\n", ret); | ||
| 997 | } | ||
| 998 | } | 985 | } |
| 999 | } | 986 | } |
| 1000 | 987 | ||
| @@ -1006,12 +993,12 @@ static int soc_camera_init_i2c(struct soc_camera_device *icd, | |||
| 1006 | struct soc_camera_link *icl) | 993 | struct soc_camera_link *icl) |
| 1007 | { | 994 | { |
| 1008 | struct i2c_client *client; | 995 | struct i2c_client *client; |
| 1009 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 996 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 1010 | struct i2c_adapter *adap = i2c_get_adapter(icl->i2c_adapter_id); | 997 | struct i2c_adapter *adap = i2c_get_adapter(icl->i2c_adapter_id); |
| 1011 | struct v4l2_subdev *subdev; | 998 | struct v4l2_subdev *subdev; |
| 1012 | 999 | ||
| 1013 | if (!adap) { | 1000 | if (!adap) { |
| 1014 | dev_err(&icd->dev, "Cannot get I2C adapter #%d. No driver?\n", | 1001 | dev_err(icd->pdev, "Cannot get I2C adapter #%d. No driver?\n", |
| 1015 | icl->i2c_adapter_id); | 1002 | icl->i2c_adapter_id); |
| 1016 | goto ei2cga; | 1003 | goto ei2cga; |
| 1017 | } | 1004 | } |
| @@ -1026,7 +1013,7 @@ static int soc_camera_init_i2c(struct soc_camera_device *icd, | |||
| 1026 | client = v4l2_get_subdevdata(subdev); | 1013 | client = v4l2_get_subdevdata(subdev); |
| 1027 | 1014 | ||
| 1028 | /* Use to_i2c_client(dev) to recover the i2c client */ | 1015 | /* Use to_i2c_client(dev) to recover the i2c client */ |
| 1029 | dev_set_drvdata(&icd->dev, &client->dev); | 1016 | icd->control = &client->dev; |
| 1030 | 1017 | ||
| 1031 | return 0; | 1018 | return 0; |
| 1032 | ei2cnd: | 1019 | ei2cnd: |
| @@ -1040,7 +1027,8 @@ static void soc_camera_free_i2c(struct soc_camera_device *icd) | |||
| 1040 | struct i2c_client *client = | 1027 | struct i2c_client *client = |
| 1041 | to_i2c_client(to_soc_camera_control(icd)); | 1028 | to_i2c_client(to_soc_camera_control(icd)); |
| 1042 | struct i2c_adapter *adap = client->adapter; | 1029 | struct i2c_adapter *adap = client->adapter; |
| 1043 | dev_set_drvdata(&icd->dev, NULL); | 1030 | |
| 1031 | icd->control = NULL; | ||
| 1044 | v4l2_device_unregister_subdev(i2c_get_clientdata(client)); | 1032 | v4l2_device_unregister_subdev(i2c_get_clientdata(client)); |
| 1045 | i2c_unregister_device(client); | 1033 | i2c_unregister_device(client); |
| 1046 | i2c_put_adapter(adap); | 1034 | i2c_put_adapter(adap); |
| @@ -1053,17 +1041,16 @@ static void soc_camera_free_i2c(struct soc_camera_device *icd) | |||
| 1053 | static int soc_camera_video_start(struct soc_camera_device *icd); | 1041 | static int soc_camera_video_start(struct soc_camera_device *icd); |
| 1054 | static int video_dev_create(struct soc_camera_device *icd); | 1042 | static int video_dev_create(struct soc_camera_device *icd); |
| 1055 | /* Called during host-driver probe */ | 1043 | /* Called during host-driver probe */ |
| 1056 | static int soc_camera_probe(struct device *dev) | 1044 | static int soc_camera_probe(struct soc_camera_device *icd) |
| 1057 | { | 1045 | { |
| 1058 | struct soc_camera_device *icd = to_soc_camera_dev(dev); | 1046 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 1059 | struct soc_camera_host *ici = to_soc_camera_host(dev->parent); | ||
| 1060 | struct soc_camera_link *icl = to_soc_camera_link(icd); | 1047 | struct soc_camera_link *icl = to_soc_camera_link(icd); |
| 1061 | struct device *control = NULL; | 1048 | struct device *control = NULL; |
| 1062 | struct v4l2_subdev *sd; | 1049 | struct v4l2_subdev *sd; |
| 1063 | struct v4l2_mbus_framefmt mf; | 1050 | struct v4l2_mbus_framefmt mf; |
| 1064 | int ret; | 1051 | int ret; |
| 1065 | 1052 | ||
| 1066 | dev_info(dev, "Probing %s\n", dev_name(dev)); | 1053 | dev_info(icd->pdev, "Probing %s\n", dev_name(icd->pdev)); |
| 1067 | 1054 | ||
| 1068 | ret = regulator_bulk_get(icd->pdev, icl->num_regulators, | 1055 | ret = regulator_bulk_get(icd->pdev, icl->num_regulators, |
| 1069 | icl->regulators); | 1056 | icl->regulators); |
| @@ -1099,7 +1086,7 @@ static int soc_camera_probe(struct device *dev) | |||
| 1099 | if (icl->module_name) | 1086 | if (icl->module_name) |
| 1100 | ret = request_module(icl->module_name); | 1087 | ret = request_module(icl->module_name); |
| 1101 | 1088 | ||
| 1102 | ret = icl->add_device(icl, &icd->dev); | 1089 | ret = icl->add_device(icd); |
| 1103 | if (ret < 0) | 1090 | if (ret < 0) |
| 1104 | goto eadddev; | 1091 | goto eadddev; |
| 1105 | 1092 | ||
| @@ -1110,7 +1097,7 @@ static int soc_camera_probe(struct device *dev) | |||
| 1110 | control = to_soc_camera_control(icd); | 1097 | control = to_soc_camera_control(icd); |
| 1111 | if (!control || !control->driver || !dev_get_drvdata(control) || | 1098 | if (!control || !control->driver || !dev_get_drvdata(control) || |
| 1112 | !try_module_get(control->driver->owner)) { | 1099 | !try_module_get(control->driver->owner)) { |
| 1113 | icl->del_device(icl); | 1100 | icl->del_device(icd); |
| 1114 | goto enodrv; | 1101 | goto enodrv; |
| 1115 | } | 1102 | } |
| 1116 | } | 1103 | } |
| @@ -1125,8 +1112,6 @@ static int soc_camera_probe(struct device *dev) | |||
| 1125 | 1112 | ||
| 1126 | icd->field = V4L2_FIELD_ANY; | 1113 | icd->field = V4L2_FIELD_ANY; |
| 1127 | 1114 | ||
| 1128 | icd->vdev->lock = &icd->video_lock; | ||
| 1129 | |||
| 1130 | /* | 1115 | /* |
| 1131 | * ..._video_start() will create a device node, video_register_device() | 1116 | * ..._video_start() will create a device node, video_register_device() |
| 1132 | * itself is protected against concurrent open() calls, but we also have | 1117 | * itself is protected against concurrent open() calls, but we also have |
| @@ -1146,11 +1131,6 @@ static int soc_camera_probe(struct device *dev) | |||
| 1146 | icd->field = mf.field; | 1131 | icd->field = mf.field; |
| 1147 | } | 1132 | } |
| 1148 | 1133 | ||
| 1149 | /* Do we have to sysfs_remove_link() before device_unregister()? */ | ||
| 1150 | if (sysfs_create_link(&icd->dev.kobj, &to_soc_camera_control(icd)->kobj, | ||
| 1151 | "control")) | ||
| 1152 | dev_warn(&icd->dev, "Failed creating the control symlink\n"); | ||
| 1153 | |||
| 1154 | ici->ops->remove(icd); | 1134 | ici->ops->remove(icd); |
| 1155 | 1135 | ||
| 1156 | soc_camera_power_set(icd, icl, 0); | 1136 | soc_camera_power_set(icd, icl, 0); |
| @@ -1166,7 +1146,7 @@ eiufmt: | |||
| 1166 | if (icl->board_info) { | 1146 | if (icl->board_info) { |
| 1167 | soc_camera_free_i2c(icd); | 1147 | soc_camera_free_i2c(icd); |
| 1168 | } else { | 1148 | } else { |
| 1169 | icl->del_device(icl); | 1149 | icl->del_device(icd); |
| 1170 | module_put(control->driver->owner); | 1150 | module_put(control->driver->owner); |
| 1171 | } | 1151 | } |
| 1172 | enodrv: | 1152 | enodrv: |
| @@ -1186,13 +1166,12 @@ ereg: | |||
| 1186 | * This is called on device_unregister, which only means we have to disconnect | 1166 | * This is called on device_unregister, which only means we have to disconnect |
| 1187 | * from the host, but not remove ourselves from the device list | 1167 | * from the host, but not remove ourselves from the device list |
| 1188 | */ | 1168 | */ |
| 1189 | static int soc_camera_remove(struct device *dev) | 1169 | static int soc_camera_remove(struct soc_camera_device *icd) |
| 1190 | { | 1170 | { |
| 1191 | struct soc_camera_device *icd = to_soc_camera_dev(dev); | ||
| 1192 | struct soc_camera_link *icl = to_soc_camera_link(icd); | 1171 | struct soc_camera_link *icl = to_soc_camera_link(icd); |
| 1193 | struct video_device *vdev = icd->vdev; | 1172 | struct video_device *vdev = icd->vdev; |
| 1194 | 1173 | ||
| 1195 | BUG_ON(!dev->parent); | 1174 | BUG_ON(!icd->parent); |
| 1196 | 1175 | ||
| 1197 | if (vdev) { | 1176 | if (vdev) { |
| 1198 | video_unregister_device(vdev); | 1177 | video_unregister_device(vdev); |
| @@ -1202,10 +1181,9 @@ static int soc_camera_remove(struct device *dev) | |||
| 1202 | if (icl->board_info) { | 1181 | if (icl->board_info) { |
| 1203 | soc_camera_free_i2c(icd); | 1182 | soc_camera_free_i2c(icd); |
| 1204 | } else { | 1183 | } else { |
| 1205 | struct device_driver *drv = to_soc_camera_control(icd) ? | 1184 | struct device_driver *drv = to_soc_camera_control(icd)->driver; |
| 1206 | to_soc_camera_control(icd)->driver : NULL; | ||
| 1207 | if (drv) { | 1185 | if (drv) { |
| 1208 | icl->del_device(icl); | 1186 | icl->del_device(icd); |
| 1209 | module_put(drv->owner); | 1187 | module_put(drv->owner); |
| 1210 | } | 1188 | } |
| 1211 | } | 1189 | } |
| @@ -1216,49 +1194,6 @@ static int soc_camera_remove(struct device *dev) | |||
| 1216 | return 0; | 1194 | return 0; |
| 1217 | } | 1195 | } |
| 1218 | 1196 | ||
| 1219 | static int soc_camera_suspend(struct device *dev, pm_message_t state) | ||
| 1220 | { | ||
| 1221 | struct soc_camera_device *icd = to_soc_camera_dev(dev); | ||
| 1222 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | ||
| 1223 | int ret = 0; | ||
| 1224 | |||
| 1225 | if (ici->ops->suspend) | ||
| 1226 | ret = ici->ops->suspend(icd, state); | ||
| 1227 | |||
| 1228 | return ret; | ||
| 1229 | } | ||
| 1230 | |||
| 1231 | static int soc_camera_resume(struct device *dev) | ||
| 1232 | { | ||
| 1233 | struct soc_camera_device *icd = to_soc_camera_dev(dev); | ||
| 1234 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | ||
| 1235 | int ret = 0; | ||
| 1236 | |||
| 1237 | if (ici->ops->resume) | ||
| 1238 | ret = ici->ops->resume(icd); | ||
| 1239 | |||
| 1240 | return ret; | ||
| 1241 | } | ||
| 1242 | |||
| 1243 | struct bus_type soc_camera_bus_type = { | ||
| 1244 | .name = "soc-camera", | ||
| 1245 | .probe = soc_camera_probe, | ||
| 1246 | .remove = soc_camera_remove, | ||
| 1247 | .suspend = soc_camera_suspend, | ||
| 1248 | .resume = soc_camera_resume, | ||
| 1249 | }; | ||
| 1250 | EXPORT_SYMBOL_GPL(soc_camera_bus_type); | ||
| 1251 | |||
| 1252 | static struct device_driver ic_drv = { | ||
| 1253 | .name = "camera", | ||
| 1254 | .bus = &soc_camera_bus_type, | ||
| 1255 | .owner = THIS_MODULE, | ||
| 1256 | }; | ||
| 1257 | |||
| 1258 | static void dummy_release(struct device *dev) | ||
| 1259 | { | ||
| 1260 | } | ||
| 1261 | |||
| 1262 | static int default_cropcap(struct soc_camera_device *icd, | 1197 | static int default_cropcap(struct soc_camera_device *icd, |
| 1263 | struct v4l2_cropcap *a) | 1198 | struct v4l2_cropcap *a) |
| 1264 | { | 1199 | { |
| @@ -1317,13 +1252,6 @@ static int default_enum_fsizes(struct soc_camera_device *icd, | |||
| 1317 | return 0; | 1252 | return 0; |
| 1318 | } | 1253 | } |
| 1319 | 1254 | ||
| 1320 | static void soc_camera_device_init(struct device *dev, void *pdata) | ||
| 1321 | { | ||
| 1322 | dev->platform_data = pdata; | ||
| 1323 | dev->bus = &soc_camera_bus_type; | ||
| 1324 | dev->release = dummy_release; | ||
| 1325 | } | ||
| 1326 | |||
| 1327 | int soc_camera_host_register(struct soc_camera_host *ici) | 1255 | int soc_camera_host_register(struct soc_camera_host *ici) |
| 1328 | { | 1256 | { |
| 1329 | struct soc_camera_host *ix; | 1257 | struct soc_camera_host *ix; |
| @@ -1389,24 +1317,9 @@ void soc_camera_host_unregister(struct soc_camera_host *ici) | |||
| 1389 | mutex_lock(&list_lock); | 1317 | mutex_lock(&list_lock); |
| 1390 | 1318 | ||
| 1391 | list_del(&ici->list); | 1319 | list_del(&ici->list); |
| 1392 | 1320 | list_for_each_entry(icd, &devices, list) | |
| 1393 | list_for_each_entry(icd, &devices, list) { | 1321 | if (icd->iface == ici->nr && to_soc_camera_control(icd)) |
| 1394 | if (icd->iface == ici->nr) { | 1322 | soc_camera_remove(icd); |
| 1395 | void *pdata = icd->dev.platform_data; | ||
| 1396 | /* The bus->remove will be called */ | ||
| 1397 | device_unregister(&icd->dev); | ||
| 1398 | /* | ||
| 1399 | * Not before device_unregister(), .remove | ||
| 1400 | * needs parent to call ici->ops->remove(). | ||
| 1401 | * If the host module is loaded again, device_register() | ||
| 1402 | * would complain "already initialised," since 2.6.32 | ||
| 1403 | * this is also needed to prevent use-after-free of the | ||
| 1404 | * device private data. | ||
| 1405 | */ | ||
| 1406 | memset(&icd->dev, 0, sizeof(icd->dev)); | ||
| 1407 | soc_camera_device_init(&icd->dev, pdata); | ||
| 1408 | } | ||
| 1409 | } | ||
| 1410 | 1323 | ||
| 1411 | mutex_unlock(&list_lock); | 1324 | mutex_unlock(&list_lock); |
| 1412 | 1325 | ||
| @@ -1448,11 +1361,6 @@ static int soc_camera_device_register(struct soc_camera_device *icd) | |||
| 1448 | return 0; | 1361 | return 0; |
| 1449 | } | 1362 | } |
| 1450 | 1363 | ||
| 1451 | static void soc_camera_device_unregister(struct soc_camera_device *icd) | ||
| 1452 | { | ||
| 1453 | list_del(&icd->list); | ||
| 1454 | } | ||
| 1455 | |||
| 1456 | static const struct v4l2_ioctl_ops soc_camera_ioctl_ops = { | 1364 | static const struct v4l2_ioctl_ops soc_camera_ioctl_ops = { |
| 1457 | .vidioc_querycap = soc_camera_querycap, | 1365 | .vidioc_querycap = soc_camera_querycap, |
| 1458 | .vidioc_g_fmt_vid_cap = soc_camera_g_fmt_vid_cap, | 1366 | .vidioc_g_fmt_vid_cap = soc_camera_g_fmt_vid_cap, |
| @@ -1487,7 +1395,7 @@ static const struct v4l2_ioctl_ops soc_camera_ioctl_ops = { | |||
| 1487 | 1395 | ||
| 1488 | static int video_dev_create(struct soc_camera_device *icd) | 1396 | static int video_dev_create(struct soc_camera_device *icd) |
| 1489 | { | 1397 | { |
| 1490 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | 1398 | struct soc_camera_host *ici = to_soc_camera_host(icd->parent); |
| 1491 | struct video_device *vdev = video_device_alloc(); | 1399 | struct video_device *vdev = video_device_alloc(); |
| 1492 | 1400 | ||
| 1493 | if (!vdev) | 1401 | if (!vdev) |
| @@ -1495,12 +1403,13 @@ static int video_dev_create(struct soc_camera_device *icd) | |||
| 1495 | 1403 | ||
| 1496 | strlcpy(vdev->name, ici->drv_name, sizeof(vdev->name)); | 1404 | strlcpy(vdev->name, ici->drv_name, sizeof(vdev->name)); |
| 1497 | 1405 | ||
| 1498 | vdev->parent = &icd->dev; | 1406 | vdev->parent = icd->pdev; |
| 1499 | vdev->current_norm = V4L2_STD_UNKNOWN; | 1407 | vdev->current_norm = V4L2_STD_UNKNOWN; |
| 1500 | vdev->fops = &soc_camera_fops; | 1408 | vdev->fops = &soc_camera_fops; |
| 1501 | vdev->ioctl_ops = &soc_camera_ioctl_ops; | 1409 | vdev->ioctl_ops = &soc_camera_ioctl_ops; |
| 1502 | vdev->release = video_device_release; | 1410 | vdev->release = video_device_release; |
| 1503 | vdev->tvnorms = V4L2_STD_UNKNOWN; | 1411 | vdev->tvnorms = V4L2_STD_UNKNOWN; |
| 1412 | vdev->lock = &icd->video_lock; | ||
| 1504 | 1413 | ||
| 1505 | icd->vdev = vdev; | 1414 | icd->vdev = vdev; |
| 1506 | 1415 | ||
| @@ -1515,7 +1424,7 @@ static int soc_camera_video_start(struct soc_camera_device *icd) | |||
| 1515 | const struct device_type *type = icd->vdev->dev.type; | 1424 | const struct device_type *type = icd->vdev->dev.type; |
| 1516 | int ret; | 1425 | int ret; |
| 1517 | 1426 | ||
| 1518 | if (!icd->dev.parent) | 1427 | if (!icd->parent) |
| 1519 | return -ENODEV; | 1428 | return -ENODEV; |
| 1520 | 1429 | ||
| 1521 | if (!icd->ops || | 1430 | if (!icd->ops || |
| @@ -1525,7 +1434,7 @@ static int soc_camera_video_start(struct soc_camera_device *icd) | |||
| 1525 | 1434 | ||
| 1526 | ret = video_register_device(icd->vdev, VFL_TYPE_GRABBER, -1); | 1435 | ret = video_register_device(icd->vdev, VFL_TYPE_GRABBER, -1); |
| 1527 | if (ret < 0) { | 1436 | if (ret < 0) { |
| 1528 | dev_err(&icd->dev, "video_register_device failed: %d\n", ret); | 1437 | dev_err(icd->pdev, "video_register_device failed: %d\n", ret); |
| 1529 | return ret; | 1438 | return ret; |
| 1530 | } | 1439 | } |
| 1531 | 1440 | ||
| @@ -1549,6 +1458,7 @@ static int __devinit soc_camera_pdrv_probe(struct platform_device *pdev) | |||
| 1549 | return -ENOMEM; | 1458 | return -ENOMEM; |
| 1550 | 1459 | ||
| 1551 | icd->iface = icl->bus_id; | 1460 | icd->iface = icl->bus_id; |
| 1461 | icd->link = icl; | ||
| 1552 | icd->pdev = &pdev->dev; | 1462 | icd->pdev = &pdev->dev; |
| 1553 | platform_set_drvdata(pdev, icd); | 1463 | platform_set_drvdata(pdev, icd); |
| 1554 | 1464 | ||
| @@ -1556,8 +1466,6 @@ static int __devinit soc_camera_pdrv_probe(struct platform_device *pdev) | |||
| 1556 | if (ret < 0) | 1466 | if (ret < 0) |
| 1557 | goto escdevreg; | 1467 | goto escdevreg; |
| 1558 | 1468 | ||
| 1559 | soc_camera_device_init(&icd->dev, icl); | ||
| 1560 | |||
| 1561 | icd->user_width = DEFAULT_WIDTH; | 1469 | icd->user_width = DEFAULT_WIDTH; |
| 1562 | icd->user_height = DEFAULT_HEIGHT; | 1470 | icd->user_height = DEFAULT_HEIGHT; |
| 1563 | 1471 | ||
| @@ -1581,7 +1489,7 @@ static int __devexit soc_camera_pdrv_remove(struct platform_device *pdev) | |||
| 1581 | if (!icd) | 1489 | if (!icd) |
| 1582 | return -EINVAL; | 1490 | return -EINVAL; |
| 1583 | 1491 | ||
| 1584 | soc_camera_device_unregister(icd); | 1492 | list_del(&icd->list); |
| 1585 | 1493 | ||
| 1586 | kfree(icd); | 1494 | kfree(icd); |
| 1587 | 1495 | ||
| @@ -1598,31 +1506,12 @@ static struct platform_driver __refdata soc_camera_pdrv = { | |||
| 1598 | 1506 | ||
| 1599 | static int __init soc_camera_init(void) | 1507 | static int __init soc_camera_init(void) |
| 1600 | { | 1508 | { |
| 1601 | int ret = bus_register(&soc_camera_bus_type); | 1509 | return platform_driver_probe(&soc_camera_pdrv, soc_camera_pdrv_probe); |
| 1602 | if (ret) | ||
| 1603 | return ret; | ||
| 1604 | ret = driver_register(&ic_drv); | ||
| 1605 | if (ret) | ||
| 1606 | goto edrvr; | ||
| 1607 | |||
| 1608 | ret = platform_driver_probe(&soc_camera_pdrv, soc_camera_pdrv_probe); | ||
| 1609 | if (ret) | ||
| 1610 | goto epdr; | ||
| 1611 | |||
| 1612 | return 0; | ||
| 1613 | |||
| 1614 | epdr: | ||
| 1615 | driver_unregister(&ic_drv); | ||
| 1616 | edrvr: | ||
| 1617 | bus_unregister(&soc_camera_bus_type); | ||
| 1618 | return ret; | ||
| 1619 | } | 1510 | } |
| 1620 | 1511 | ||
| 1621 | static void __exit soc_camera_exit(void) | 1512 | static void __exit soc_camera_exit(void) |
| 1622 | { | 1513 | { |
| 1623 | platform_driver_unregister(&soc_camera_pdrv); | 1514 | platform_driver_unregister(&soc_camera_pdrv); |
| 1624 | driver_unregister(&ic_drv); | ||
| 1625 | bus_unregister(&soc_camera_bus_type); | ||
| 1626 | } | 1515 | } |
| 1627 | 1516 | ||
| 1628 | module_init(soc_camera_init); | 1517 | module_init(soc_camera_init); |
diff --git a/drivers/media/video/soc_camera_platform.c b/drivers/media/video/soc_camera_platform.c index bf406e89c992..8069cd6bc5e8 100644 --- a/drivers/media/video/soc_camera_platform.c +++ b/drivers/media/video/soc_camera_platform.c | |||
| @@ -146,7 +146,7 @@ static int soc_camera_platform_probe(struct platform_device *pdev) | |||
| 146 | if (!p) | 146 | if (!p) |
| 147 | return -EINVAL; | 147 | return -EINVAL; |
| 148 | 148 | ||
| 149 | if (!p->dev) { | 149 | if (!p->icd) { |
| 150 | dev_err(&pdev->dev, | 150 | dev_err(&pdev->dev, |
| 151 | "Platform has not set soc_camera_device pointer!\n"); | 151 | "Platform has not set soc_camera_device pointer!\n"); |
| 152 | return -EINVAL; | 152 | return -EINVAL; |
| @@ -156,16 +156,16 @@ static int soc_camera_platform_probe(struct platform_device *pdev) | |||
| 156 | if (!priv) | 156 | if (!priv) |
| 157 | return -ENOMEM; | 157 | return -ENOMEM; |
| 158 | 158 | ||
| 159 | icd = to_soc_camera_dev(p->dev); | 159 | icd = p->icd; |
| 160 | 160 | ||
| 161 | /* soc-camera convention: control's drvdata points to the subdev */ | 161 | /* soc-camera convention: control's drvdata points to the subdev */ |
| 162 | platform_set_drvdata(pdev, &priv->subdev); | 162 | platform_set_drvdata(pdev, &priv->subdev); |
| 163 | /* Set the control device reference */ | 163 | /* Set the control device reference */ |
| 164 | dev_set_drvdata(&icd->dev, &pdev->dev); | 164 | icd->control = &pdev->dev; |
| 165 | 165 | ||
| 166 | icd->ops = &soc_camera_platform_ops; | 166 | icd->ops = &soc_camera_platform_ops; |
| 167 | 167 | ||
| 168 | ici = to_soc_camera_host(icd->dev.parent); | 168 | ici = to_soc_camera_host(icd->parent); |
| 169 | 169 | ||
| 170 | v4l2_subdev_init(&priv->subdev, &platform_subdev_ops); | 170 | v4l2_subdev_init(&priv->subdev, &platform_subdev_ops); |
| 171 | v4l2_set_subdevdata(&priv->subdev, p); | 171 | v4l2_set_subdevdata(&priv->subdev, p); |
| @@ -188,7 +188,7 @@ static int soc_camera_platform_remove(struct platform_device *pdev) | |||
| 188 | { | 188 | { |
| 189 | struct soc_camera_platform_priv *priv = get_priv(pdev); | 189 | struct soc_camera_platform_priv *priv = get_priv(pdev); |
| 190 | struct soc_camera_platform_info *p = pdev->dev.platform_data; | 190 | struct soc_camera_platform_info *p = pdev->dev.platform_data; |
| 191 | struct soc_camera_device *icd = to_soc_camera_dev(p->dev); | 191 | struct soc_camera_device *icd = p->icd; |
| 192 | 192 | ||
| 193 | v4l2_device_unregister_subdev(&priv->subdev); | 193 | v4l2_device_unregister_subdev(&priv->subdev); |
| 194 | icd->ops = NULL; | 194 | icd->ops = NULL; |
diff --git a/drivers/media/video/sr030pc30.c b/drivers/media/video/sr030pc30.c index c901721a1db3..8afb0e8a2e00 100644 --- a/drivers/media/video/sr030pc30.c +++ b/drivers/media/video/sr030pc30.c | |||
| @@ -726,8 +726,10 @@ static int sr030pc30_s_power(struct v4l2_subdev *sd, int on) | |||
| 726 | const struct sr030pc30_platform_data *pdata = info->pdata; | 726 | const struct sr030pc30_platform_data *pdata = info->pdata; |
| 727 | int ret; | 727 | int ret; |
| 728 | 728 | ||
| 729 | if (WARN(pdata == NULL, "No platform data!\n")) | 729 | if (pdata == NULL) { |
| 730 | return -ENOMEM; | 730 | WARN(1, "No platform data!\n"); |
| 731 | return -EINVAL; | ||
| 732 | } | ||
| 731 | 733 | ||
| 732 | /* | 734 | /* |
| 733 | * Put sensor into power sleep mode before switching off | 735 | * Put sensor into power sleep mode before switching off |
| @@ -746,6 +748,7 @@ static int sr030pc30_s_power(struct v4l2_subdev *sd, int on) | |||
| 746 | if (on) { | 748 | if (on) { |
| 747 | ret = sr030pc30_base_config(sd); | 749 | ret = sr030pc30_base_config(sd); |
| 748 | } else { | 750 | } else { |
| 751 | ret = 0; | ||
| 749 | info->curr_win = NULL; | 752 | info->curr_win = NULL; |
| 750 | info->curr_fmt = NULL; | 753 | info->curr_fmt = NULL; |
| 751 | } | 754 | } |
diff --git a/drivers/media/video/tda7432.c b/drivers/media/video/tda7432.c index 3941f954daf4..bd218545da9c 100644 --- a/drivers/media/video/tda7432.c +++ b/drivers/media/video/tda7432.c | |||
| @@ -49,10 +49,11 @@ static int maxvol; | |||
| 49 | static int loudness; /* disable loudness by default */ | 49 | static int loudness; /* disable loudness by default */ |
| 50 | static int debug; /* insmod parameter */ | 50 | static int debug; /* insmod parameter */ |
| 51 | module_param(debug, int, S_IRUGO | S_IWUSR); | 51 | module_param(debug, int, S_IRUGO | S_IWUSR); |
| 52 | MODULE_PARM_DESC(debug, "Set debugging level from 0 to 3. Default is off(0)."); | ||
| 52 | module_param(loudness, int, S_IRUGO); | 53 | module_param(loudness, int, S_IRUGO); |
| 53 | MODULE_PARM_DESC(maxvol,"Set maximium volume to +20db (0), default is 0db(1)"); | 54 | MODULE_PARM_DESC(loudness, "Turn loudness on(1) else off(0). Default is off(0)."); |
| 54 | module_param(maxvol, int, S_IRUGO | S_IWUSR); | 55 | module_param(maxvol, int, S_IRUGO | S_IWUSR); |
| 55 | 56 | MODULE_PARM_DESC(maxvol, "Set maximium volume to +20dB(0) else +0dB(1). Default is +20dB(0)."); | |
| 56 | 57 | ||
| 57 | 58 | ||
| 58 | /* Structure of address and subaddresses for the tda7432 */ | 59 | /* Structure of address and subaddresses for the tda7432 */ |
diff --git a/drivers/media/video/timblogiw.c b/drivers/media/video/timblogiw.c index fc611ebeb82c..84cd1b65b765 100644 --- a/drivers/media/video/timblogiw.c +++ b/drivers/media/video/timblogiw.c | |||
| @@ -20,7 +20,6 @@ | |||
| 20 | * Timberdale FPGA LogiWin Video In | 20 | * Timberdale FPGA LogiWin Video In |
| 21 | */ | 21 | */ |
| 22 | 22 | ||
| 23 | #include <linux/version.h> | ||
| 24 | #include <linux/platform_device.h> | 23 | #include <linux/platform_device.h> |
| 25 | #include <linux/slab.h> | 24 | #include <linux/slab.h> |
| 26 | #include <linux/dmaengine.h> | 25 | #include <linux/dmaengine.h> |
diff --git a/drivers/media/video/tlg2300/pd-common.h b/drivers/media/video/tlg2300/pd-common.h index 46066bdc73f9..56564e6aaac2 100644 --- a/drivers/media/video/tlg2300/pd-common.h +++ b/drivers/media/video/tlg2300/pd-common.h | |||
| @@ -1,7 +1,6 @@ | |||
| 1 | #ifndef PD_COMMON_H | 1 | #ifndef PD_COMMON_H |
| 2 | #define PD_COMMON_H | 2 | #define PD_COMMON_H |
| 3 | 3 | ||
| 4 | #include <linux/version.h> | ||
| 5 | #include <linux/fs.h> | 4 | #include <linux/fs.h> |
| 6 | #include <linux/wait.h> | 5 | #include <linux/wait.h> |
| 7 | #include <linux/list.h> | 6 | #include <linux/list.h> |
diff --git a/drivers/media/video/tlg2300/pd-main.c b/drivers/media/video/tlg2300/pd-main.c index 99c81a9a4f46..129f135d5a5f 100644 --- a/drivers/media/video/tlg2300/pd-main.c +++ b/drivers/media/video/tlg2300/pd-main.c | |||
| @@ -531,3 +531,4 @@ module_exit(poseidon_exit); | |||
| 531 | MODULE_AUTHOR("Telegent Systems"); | 531 | MODULE_AUTHOR("Telegent Systems"); |
| 532 | MODULE_DESCRIPTION("For tlg2300-based USB device "); | 532 | MODULE_DESCRIPTION("For tlg2300-based USB device "); |
| 533 | MODULE_LICENSE("GPL"); | 533 | MODULE_LICENSE("GPL"); |
| 534 | MODULE_VERSION("0.0.2"); | ||
diff --git a/drivers/media/video/tlg2300/pd-radio.c b/drivers/media/video/tlg2300/pd-radio.c index fae84c2a0c39..4fad1dfb92cf 100644 --- a/drivers/media/video/tlg2300/pd-radio.c +++ b/drivers/media/video/tlg2300/pd-radio.c | |||
| @@ -6,7 +6,6 @@ | |||
| 6 | #include <linux/usb.h> | 6 | #include <linux/usb.h> |
| 7 | #include <linux/i2c.h> | 7 | #include <linux/i2c.h> |
| 8 | #include <media/v4l2-dev.h> | 8 | #include <media/v4l2-dev.h> |
| 9 | #include <linux/version.h> | ||
| 10 | #include <linux/mm.h> | 9 | #include <linux/mm.h> |
| 11 | #include <linux/mutex.h> | 10 | #include <linux/mutex.h> |
| 12 | #include <media/v4l2-ioctl.h> | 11 | #include <media/v4l2-ioctl.h> |
| @@ -149,7 +148,6 @@ static int vidioc_querycap(struct file *file, void *priv, | |||
| 149 | strlcpy(v->driver, "tele-radio", sizeof(v->driver)); | 148 | strlcpy(v->driver, "tele-radio", sizeof(v->driver)); |
| 150 | strlcpy(v->card, "Telegent Poseidon", sizeof(v->card)); | 149 | strlcpy(v->card, "Telegent Poseidon", sizeof(v->card)); |
| 151 | usb_make_path(p->udev, v->bus_info, sizeof(v->bus_info)); | 150 | usb_make_path(p->udev, v->bus_info, sizeof(v->bus_info)); |
| 152 | v->version = KERNEL_VERSION(0, 0, 1); | ||
| 153 | v->capabilities = V4L2_CAP_TUNER | V4L2_CAP_RADIO; | 151 | v->capabilities = V4L2_CAP_TUNER | V4L2_CAP_RADIO; |
| 154 | return 0; | 152 | return 0; |
| 155 | } | 153 | } |
diff --git a/drivers/media/video/tuner-core.c b/drivers/media/video/tuner-core.c index a03945ab9f08..11cc980b0cd5 100644 --- a/drivers/media/video/tuner-core.c +++ b/drivers/media/video/tuner-core.c | |||
| @@ -39,6 +39,7 @@ | |||
| 39 | #include "tda9887.h" | 39 | #include "tda9887.h" |
| 40 | #include "xc5000.h" | 40 | #include "xc5000.h" |
| 41 | #include "tda18271.h" | 41 | #include "tda18271.h" |
| 42 | #include "xc4000.h" | ||
| 42 | 43 | ||
| 43 | #define UNSET (-1U) | 44 | #define UNSET (-1U) |
| 44 | 45 | ||
| @@ -391,6 +392,23 @@ static void set_type(struct i2c_client *c, unsigned int type, | |||
| 391 | tune_now = 0; | 392 | tune_now = 0; |
| 392 | break; | 393 | break; |
| 393 | } | 394 | } |
| 395 | case TUNER_XC4000: | ||
| 396 | { | ||
| 397 | struct xc4000_config xc4000_cfg = { | ||
| 398 | .i2c_address = t->i2c->addr, | ||
| 399 | /* FIXME: the correct parameters will be set */ | ||
| 400 | /* only when the digital dvb_attach() occurs */ | ||
| 401 | .default_pm = 0, | ||
| 402 | .dvb_amplitude = 0, | ||
| 403 | .set_smoothedcvbs = 0, | ||
| 404 | .if_khz = 0 | ||
| 405 | }; | ||
| 406 | if (!dvb_attach(xc4000_attach, | ||
| 407 | &t->fe, t->i2c->adapter, &xc4000_cfg)) | ||
| 408 | goto attach_failed; | ||
| 409 | tune_now = 0; | ||
| 410 | break; | ||
| 411 | } | ||
| 394 | default: | 412 | default: |
| 395 | if (!dvb_attach(simple_tuner_attach, &t->fe, | 413 | if (!dvb_attach(simple_tuner_attach, &t->fe, |
| 396 | t->i2c->adapter, t->i2c->addr, t->type)) | 414 | t->i2c->adapter, t->i2c->addr, t->type)) |
diff --git a/drivers/media/video/tw9910.c b/drivers/media/video/tw9910.c index 0347bbe36459..742482e30011 100644 --- a/drivers/media/video/tw9910.c +++ b/drivers/media/video/tw9910.c | |||
| @@ -552,16 +552,6 @@ static int tw9910_s_std(struct v4l2_subdev *sd, v4l2_std_id norm) | |||
| 552 | return ret; | 552 | return ret; |
| 553 | } | 553 | } |
| 554 | 554 | ||
| 555 | static int tw9910_enum_input(struct soc_camera_device *icd, | ||
| 556 | struct v4l2_input *inp) | ||
| 557 | { | ||
| 558 | inp->type = V4L2_INPUT_TYPE_TUNER; | ||
| 559 | inp->std = V4L2_STD_UNKNOWN; | ||
| 560 | strcpy(inp->name, "Video"); | ||
| 561 | |||
| 562 | return 0; | ||
| 563 | } | ||
| 564 | |||
| 565 | static int tw9910_g_chip_ident(struct v4l2_subdev *sd, | 555 | static int tw9910_g_chip_ident(struct v4l2_subdev *sd, |
| 566 | struct v4l2_dbg_chip_ident *id) | 556 | struct v4l2_dbg_chip_ident *id) |
| 567 | { | 557 | { |
| @@ -846,13 +836,9 @@ static int tw9910_video_probe(struct soc_camera_device *icd, | |||
| 846 | struct tw9910_priv *priv = to_tw9910(client); | 836 | struct tw9910_priv *priv = to_tw9910(client); |
| 847 | s32 id; | 837 | s32 id; |
| 848 | 838 | ||
| 849 | /* | 839 | /* We must have a parent by now. And it cannot be a wrong one. */ |
| 850 | * We must have a parent by now. And it cannot be a wrong one. | 840 | BUG_ON(!icd->parent || |
| 851 | * So this entire test is completely redundant. | 841 | to_soc_camera_host(icd->parent)->nr != icd->iface); |
| 852 | */ | ||
| 853 | if (!icd->dev.parent || | ||
| 854 | to_soc_camera_host(icd->dev.parent)->nr != icd->iface) | ||
| 855 | return -ENODEV; | ||
| 856 | 842 | ||
| 857 | /* | 843 | /* |
| 858 | * tw9910 only use 8 or 16 bit bus width | 844 | * tw9910 only use 8 or 16 bit bus width |
| @@ -891,7 +877,6 @@ static int tw9910_video_probe(struct soc_camera_device *icd, | |||
| 891 | static struct soc_camera_ops tw9910_ops = { | 877 | static struct soc_camera_ops tw9910_ops = { |
| 892 | .set_bus_param = tw9910_set_bus_param, | 878 | .set_bus_param = tw9910_set_bus_param, |
| 893 | .query_bus_param = tw9910_query_bus_param, | 879 | .query_bus_param = tw9910_query_bus_param, |
| 894 | .enum_input = tw9910_enum_input, | ||
| 895 | }; | 880 | }; |
| 896 | 881 | ||
| 897 | static struct v4l2_subdev_core_ops tw9910_subdev_core_ops = { | 882 | static struct v4l2_subdev_core_ops tw9910_subdev_core_ops = { |
diff --git a/drivers/media/video/usbvision/usbvision-video.c b/drivers/media/video/usbvision/usbvision-video.c index ea8ea8a48dfe..5a74f5e07d7d 100644 --- a/drivers/media/video/usbvision/usbvision-video.c +++ b/drivers/media/video/usbvision/usbvision-video.c | |||
| @@ -45,7 +45,6 @@ | |||
| 45 | * | 45 | * |
| 46 | */ | 46 | */ |
| 47 | 47 | ||
| 48 | #include <linux/version.h> | ||
| 49 | #include <linux/kernel.h> | 48 | #include <linux/kernel.h> |
| 50 | #include <linux/list.h> | 49 | #include <linux/list.h> |
| 51 | #include <linux/timer.h> | 50 | #include <linux/timer.h> |
| @@ -77,15 +76,7 @@ | |||
| 77 | #define DRIVER_ALIAS "USBVision" | 76 | #define DRIVER_ALIAS "USBVision" |
| 78 | #define DRIVER_DESC "USBVision USB Video Device Driver for Linux" | 77 | #define DRIVER_DESC "USBVision USB Video Device Driver for Linux" |
| 79 | #define DRIVER_LICENSE "GPL" | 78 | #define DRIVER_LICENSE "GPL" |
| 80 | #define USBVISION_DRIVER_VERSION_MAJOR 0 | 79 | #define USBVISION_VERSION_STRING "0.9.11" |
| 81 | #define USBVISION_DRIVER_VERSION_MINOR 9 | ||
| 82 | #define USBVISION_DRIVER_VERSION_PATCHLEVEL 10 | ||
| 83 | #define USBVISION_DRIVER_VERSION KERNEL_VERSION(USBVISION_DRIVER_VERSION_MAJOR,\ | ||
| 84 | USBVISION_DRIVER_VERSION_MINOR,\ | ||
| 85 | USBVISION_DRIVER_VERSION_PATCHLEVEL) | ||
| 86 | #define USBVISION_VERSION_STRING __stringify(USBVISION_DRIVER_VERSION_MAJOR) \ | ||
| 87 | "." __stringify(USBVISION_DRIVER_VERSION_MINOR) \ | ||
| 88 | "." __stringify(USBVISION_DRIVER_VERSION_PATCHLEVEL) | ||
| 89 | 80 | ||
| 90 | #define ENABLE_HEXDUMP 0 /* Enable if you need it */ | 81 | #define ENABLE_HEXDUMP 0 /* Enable if you need it */ |
| 91 | 82 | ||
| @@ -516,7 +507,6 @@ static int vidioc_querycap(struct file *file, void *priv, | |||
| 516 | usbvision_device_data[usbvision->dev_model].model_string, | 507 | usbvision_device_data[usbvision->dev_model].model_string, |
| 517 | sizeof(vc->card)); | 508 | sizeof(vc->card)); |
| 518 | usb_make_path(usbvision->dev, vc->bus_info, sizeof(vc->bus_info)); | 509 | usb_make_path(usbvision->dev, vc->bus_info, sizeof(vc->bus_info)); |
| 519 | vc->version = USBVISION_DRIVER_VERSION; | ||
| 520 | vc->capabilities = V4L2_CAP_VIDEO_CAPTURE | | 510 | vc->capabilities = V4L2_CAP_VIDEO_CAPTURE | |
| 521 | V4L2_CAP_AUDIO | | 511 | V4L2_CAP_AUDIO | |
| 522 | V4L2_CAP_READWRITE | | 512 | V4L2_CAP_READWRITE | |
diff --git a/drivers/media/video/uvc/uvc_ctrl.c b/drivers/media/video/uvc/uvc_ctrl.c index 2c8954ec6859..10c2364f3e8a 100644 --- a/drivers/media/video/uvc/uvc_ctrl.c +++ b/drivers/media/video/uvc/uvc_ctrl.c | |||
| @@ -1664,8 +1664,8 @@ int uvc_ctrl_add_mapping(struct uvc_video_chain *chain, | |||
| 1664 | return -EINVAL; | 1664 | return -EINVAL; |
| 1665 | } | 1665 | } |
| 1666 | 1666 | ||
| 1667 | /* Search for the matching (GUID/CS) control in the given device */ | 1667 | /* Search for the matching (GUID/CS) control on the current chain */ |
| 1668 | list_for_each_entry(entity, &dev->entities, list) { | 1668 | list_for_each_entry(entity, &chain->entities, chain) { |
| 1669 | unsigned int i; | 1669 | unsigned int i; |
| 1670 | 1670 | ||
| 1671 | if (UVC_ENTITY_TYPE(entity) != UVC_VC_EXTENSION_UNIT || | 1671 | if (UVC_ENTITY_TYPE(entity) != UVC_VC_EXTENSION_UNIT || |
diff --git a/drivers/media/video/uvc/uvc_driver.c b/drivers/media/video/uvc/uvc_driver.c index b6eae48d7fb8..d29f9c2d0854 100644 --- a/drivers/media/video/uvc/uvc_driver.c +++ b/drivers/media/video/uvc/uvc_driver.c | |||
| @@ -31,6 +31,7 @@ | |||
| 31 | #include <linux/videodev2.h> | 31 | #include <linux/videodev2.h> |
| 32 | #include <linux/vmalloc.h> | 32 | #include <linux/vmalloc.h> |
| 33 | #include <linux/wait.h> | 33 | #include <linux/wait.h> |
| 34 | #include <linux/version.h> | ||
| 34 | #include <asm/atomic.h> | 35 | #include <asm/atomic.h> |
| 35 | #include <asm/unaligned.h> | 36 | #include <asm/unaligned.h> |
| 36 | 37 | ||
| @@ -1857,7 +1858,7 @@ static int uvc_probe(struct usb_interface *intf, | |||
| 1857 | sizeof(dev->mdev.serial)); | 1858 | sizeof(dev->mdev.serial)); |
| 1858 | strcpy(dev->mdev.bus_info, udev->devpath); | 1859 | strcpy(dev->mdev.bus_info, udev->devpath); |
| 1859 | dev->mdev.hw_revision = le16_to_cpu(udev->descriptor.bcdDevice); | 1860 | dev->mdev.hw_revision = le16_to_cpu(udev->descriptor.bcdDevice); |
| 1860 | dev->mdev.driver_version = DRIVER_VERSION_NUMBER; | 1861 | dev->mdev.driver_version = LINUX_VERSION_CODE; |
| 1861 | if (media_device_register(&dev->mdev) < 0) | 1862 | if (media_device_register(&dev->mdev) < 0) |
| 1862 | goto error; | 1863 | goto error; |
| 1863 | 1864 | ||
| @@ -2130,6 +2131,15 @@ static struct usb_device_id uvc_ids[] = { | |||
| 2130 | .bInterfaceProtocol = 0, | 2131 | .bInterfaceProtocol = 0, |
| 2131 | .driver_info = UVC_QUIRK_PROBE_MINMAX | 2132 | .driver_info = UVC_QUIRK_PROBE_MINMAX |
| 2132 | | UVC_QUIRK_BUILTIN_ISIGHT }, | 2133 | | UVC_QUIRK_BUILTIN_ISIGHT }, |
| 2134 | /* Foxlink ("HP Webcam" on HP Mini 5103) */ | ||
| 2135 | { .match_flags = USB_DEVICE_ID_MATCH_DEVICE | ||
| 2136 | | USB_DEVICE_ID_MATCH_INT_INFO, | ||
| 2137 | .idVendor = 0x05c8, | ||
| 2138 | .idProduct = 0x0403, | ||
| 2139 | .bInterfaceClass = USB_CLASS_VIDEO, | ||
| 2140 | .bInterfaceSubClass = 1, | ||
| 2141 | .bInterfaceProtocol = 0, | ||
| 2142 | .driver_info = UVC_QUIRK_FIX_BANDWIDTH }, | ||
| 2133 | /* Genesys Logic USB 2.0 PC Camera */ | 2143 | /* Genesys Logic USB 2.0 PC Camera */ |
| 2134 | { .match_flags = USB_DEVICE_ID_MATCH_DEVICE | 2144 | { .match_flags = USB_DEVICE_ID_MATCH_DEVICE |
| 2135 | | USB_DEVICE_ID_MATCH_INT_INFO, | 2145 | | USB_DEVICE_ID_MATCH_INT_INFO, |
diff --git a/drivers/media/video/uvc/uvc_v4l2.c b/drivers/media/video/uvc/uvc_v4l2.c index dde6533e8e6d..ea71d5f1f6db 100644 --- a/drivers/media/video/uvc/uvc_v4l2.c +++ b/drivers/media/video/uvc/uvc_v4l2.c | |||
| @@ -83,7 +83,7 @@ static int uvc_ioctl_ctrl_map(struct uvc_video_chain *chain, | |||
| 83 | default: | 83 | default: |
| 84 | uvc_trace(UVC_TRACE_CONTROL, "Unsupported V4L2 control type " | 84 | uvc_trace(UVC_TRACE_CONTROL, "Unsupported V4L2 control type " |
| 85 | "%u.\n", xmap->v4l2_type); | 85 | "%u.\n", xmap->v4l2_type); |
| 86 | ret = -EINVAL; | 86 | ret = -ENOTTY; |
| 87 | goto done; | 87 | goto done; |
| 88 | } | 88 | } |
| 89 | 89 | ||
| @@ -571,7 +571,7 @@ static long uvc_v4l2_do_ioctl(struct file *file, unsigned int cmd, void *arg) | |||
| 571 | strlcpy(cap->card, vdev->name, sizeof cap->card); | 571 | strlcpy(cap->card, vdev->name, sizeof cap->card); |
| 572 | usb_make_path(stream->dev->udev, | 572 | usb_make_path(stream->dev->udev, |
| 573 | cap->bus_info, sizeof(cap->bus_info)); | 573 | cap->bus_info, sizeof(cap->bus_info)); |
| 574 | cap->version = DRIVER_VERSION_NUMBER; | 574 | cap->version = LINUX_VERSION_CODE; |
| 575 | if (stream->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) | 575 | if (stream->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) |
| 576 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | 576 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE |
| 577 | | V4L2_CAP_STREAMING; | 577 | | V4L2_CAP_STREAMING; |
diff --git a/drivers/media/video/uvc/uvcvideo.h b/drivers/media/video/uvc/uvcvideo.h index 20107fd3574d..df32a43ca86a 100644 --- a/drivers/media/video/uvc/uvcvideo.h +++ b/drivers/media/video/uvc/uvcvideo.h | |||
| @@ -183,8 +183,7 @@ struct uvc_xu_control { | |||
| 183 | * Driver specific constants. | 183 | * Driver specific constants. |
| 184 | */ | 184 | */ |
| 185 | 185 | ||
| 186 | #define DRIVER_VERSION_NUMBER KERNEL_VERSION(1, 1, 0) | 186 | #define DRIVER_VERSION "1.1.1" |
| 187 | #define DRIVER_VERSION "v1.1.0" | ||
| 188 | 187 | ||
| 189 | /* Number of isochronous URBs. */ | 188 | /* Number of isochronous URBs. */ |
| 190 | #define UVC_URBS 5 | 189 | #define UVC_URBS 5 |
diff --git a/drivers/media/video/v4l2-common.c b/drivers/media/video/v4l2-common.c index 06b9f9f82013..5c6100fb4072 100644 --- a/drivers/media/video/v4l2-common.c +++ b/drivers/media/video/v4l2-common.c | |||
| @@ -105,6 +105,9 @@ int v4l2_ctrl_check(struct v4l2_ext_control *ctrl, struct v4l2_queryctrl *qctrl, | |||
| 105 | menu_items[ctrl->value][0] == '\0') | 105 | menu_items[ctrl->value][0] == '\0') |
| 106 | return -EINVAL; | 106 | return -EINVAL; |
| 107 | } | 107 | } |
| 108 | if (qctrl->type == V4L2_CTRL_TYPE_BITMASK && | ||
| 109 | (ctrl->value & ~qctrl->maximum)) | ||
| 110 | return -ERANGE; | ||
| 108 | return 0; | 111 | return 0; |
| 109 | } | 112 | } |
| 110 | EXPORT_SYMBOL(v4l2_ctrl_check); | 113 | EXPORT_SYMBOL(v4l2_ctrl_check); |
diff --git a/drivers/media/video/v4l2-compat-ioctl32.c b/drivers/media/video/v4l2-compat-ioctl32.c index 7c2694738b31..61979b70f388 100644 --- a/drivers/media/video/v4l2-compat-ioctl32.c +++ b/drivers/media/video/v4l2-compat-ioctl32.c | |||
| @@ -662,6 +662,32 @@ static int put_v4l2_ext_controls32(struct v4l2_ext_controls *kp, struct v4l2_ext | |||
| 662 | return 0; | 662 | return 0; |
| 663 | } | 663 | } |
| 664 | 664 | ||
| 665 | struct v4l2_event32 { | ||
| 666 | __u32 type; | ||
| 667 | union { | ||
| 668 | __u8 data[64]; | ||
| 669 | } u; | ||
| 670 | __u32 pending; | ||
| 671 | __u32 sequence; | ||
| 672 | struct compat_timespec timestamp; | ||
| 673 | __u32 id; | ||
| 674 | __u32 reserved[8]; | ||
| 675 | }; | ||
| 676 | |||
| 677 | static int put_v4l2_event32(struct v4l2_event *kp, struct v4l2_event32 __user *up) | ||
| 678 | { | ||
| 679 | if (!access_ok(VERIFY_WRITE, up, sizeof(struct v4l2_event32)) || | ||
| 680 | put_user(kp->type, &up->type) || | ||
| 681 | copy_to_user(&up->u, &kp->u, sizeof(kp->u)) || | ||
| 682 | put_user(kp->pending, &up->pending) || | ||
| 683 | put_user(kp->sequence, &up->sequence) || | ||
| 684 | put_compat_timespec(&kp->timestamp, &up->timestamp) || | ||
| 685 | put_user(kp->id, &up->id) || | ||
| 686 | copy_to_user(up->reserved, kp->reserved, 8 * sizeof(__u32))) | ||
| 687 | return -EFAULT; | ||
| 688 | return 0; | ||
| 689 | } | ||
| 690 | |||
| 665 | #define VIDIOC_G_FMT32 _IOWR('V', 4, struct v4l2_format32) | 691 | #define VIDIOC_G_FMT32 _IOWR('V', 4, struct v4l2_format32) |
| 666 | #define VIDIOC_S_FMT32 _IOWR('V', 5, struct v4l2_format32) | 692 | #define VIDIOC_S_FMT32 _IOWR('V', 5, struct v4l2_format32) |
| 667 | #define VIDIOC_QUERYBUF32 _IOWR('V', 9, struct v4l2_buffer32) | 693 | #define VIDIOC_QUERYBUF32 _IOWR('V', 9, struct v4l2_buffer32) |
| @@ -675,6 +701,7 @@ static int put_v4l2_ext_controls32(struct v4l2_ext_controls *kp, struct v4l2_ext | |||
| 675 | #define VIDIOC_G_EXT_CTRLS32 _IOWR('V', 71, struct v4l2_ext_controls32) | 701 | #define VIDIOC_G_EXT_CTRLS32 _IOWR('V', 71, struct v4l2_ext_controls32) |
| 676 | #define VIDIOC_S_EXT_CTRLS32 _IOWR('V', 72, struct v4l2_ext_controls32) | 702 | #define VIDIOC_S_EXT_CTRLS32 _IOWR('V', 72, struct v4l2_ext_controls32) |
| 677 | #define VIDIOC_TRY_EXT_CTRLS32 _IOWR('V', 73, struct v4l2_ext_controls32) | 703 | #define VIDIOC_TRY_EXT_CTRLS32 _IOWR('V', 73, struct v4l2_ext_controls32) |
| 704 | #define VIDIOC_DQEVENT32 _IOR ('V', 89, struct v4l2_event32) | ||
| 678 | 705 | ||
| 679 | #define VIDIOC_OVERLAY32 _IOW ('V', 14, s32) | 706 | #define VIDIOC_OVERLAY32 _IOW ('V', 14, s32) |
| 680 | #define VIDIOC_STREAMON32 _IOW ('V', 18, s32) | 707 | #define VIDIOC_STREAMON32 _IOW ('V', 18, s32) |
| @@ -693,6 +720,7 @@ static long do_video_ioctl(struct file *file, unsigned int cmd, unsigned long ar | |||
| 693 | struct v4l2_input v2i; | 720 | struct v4l2_input v2i; |
| 694 | struct v4l2_standard v2s; | 721 | struct v4l2_standard v2s; |
| 695 | struct v4l2_ext_controls v2ecs; | 722 | struct v4l2_ext_controls v2ecs; |
| 723 | struct v4l2_event v2ev; | ||
| 696 | unsigned long vx; | 724 | unsigned long vx; |
| 697 | int vi; | 725 | int vi; |
| 698 | } karg; | 726 | } karg; |
| @@ -715,6 +743,7 @@ static long do_video_ioctl(struct file *file, unsigned int cmd, unsigned long ar | |||
| 715 | case VIDIOC_G_EXT_CTRLS32: cmd = VIDIOC_G_EXT_CTRLS; break; | 743 | case VIDIOC_G_EXT_CTRLS32: cmd = VIDIOC_G_EXT_CTRLS; break; |
| 716 | case VIDIOC_S_EXT_CTRLS32: cmd = VIDIOC_S_EXT_CTRLS; break; | 744 | case VIDIOC_S_EXT_CTRLS32: cmd = VIDIOC_S_EXT_CTRLS; break; |
| 717 | case VIDIOC_TRY_EXT_CTRLS32: cmd = VIDIOC_TRY_EXT_CTRLS; break; | 745 | case VIDIOC_TRY_EXT_CTRLS32: cmd = VIDIOC_TRY_EXT_CTRLS; break; |
| 746 | case VIDIOC_DQEVENT32: cmd = VIDIOC_DQEVENT; break; | ||
| 718 | case VIDIOC_OVERLAY32: cmd = VIDIOC_OVERLAY; break; | 747 | case VIDIOC_OVERLAY32: cmd = VIDIOC_OVERLAY; break; |
| 719 | case VIDIOC_STREAMON32: cmd = VIDIOC_STREAMON; break; | 748 | case VIDIOC_STREAMON32: cmd = VIDIOC_STREAMON; break; |
| 720 | case VIDIOC_STREAMOFF32: cmd = VIDIOC_STREAMOFF; break; | 749 | case VIDIOC_STREAMOFF32: cmd = VIDIOC_STREAMOFF; break; |
| @@ -778,6 +807,9 @@ static long do_video_ioctl(struct file *file, unsigned int cmd, unsigned long ar | |||
| 778 | err = get_v4l2_ext_controls32(&karg.v2ecs, up); | 807 | err = get_v4l2_ext_controls32(&karg.v2ecs, up); |
| 779 | compatible_arg = 0; | 808 | compatible_arg = 0; |
| 780 | break; | 809 | break; |
| 810 | case VIDIOC_DQEVENT: | ||
| 811 | compatible_arg = 0; | ||
| 812 | break; | ||
| 781 | } | 813 | } |
| 782 | if (err) | 814 | if (err) |
| 783 | return err; | 815 | return err; |
| @@ -818,6 +850,10 @@ static long do_video_ioctl(struct file *file, unsigned int cmd, unsigned long ar | |||
| 818 | err = put_v4l2_framebuffer32(&karg.v2fb, up); | 850 | err = put_v4l2_framebuffer32(&karg.v2fb, up); |
| 819 | break; | 851 | break; |
| 820 | 852 | ||
| 853 | case VIDIOC_DQEVENT: | ||
| 854 | err = put_v4l2_event32(&karg.v2ev, up); | ||
| 855 | break; | ||
| 856 | |||
| 821 | case VIDIOC_G_FMT: | 857 | case VIDIOC_G_FMT: |
| 822 | case VIDIOC_S_FMT: | 858 | case VIDIOC_S_FMT: |
| 823 | case VIDIOC_TRY_FMT: | 859 | case VIDIOC_TRY_FMT: |
| @@ -920,6 +956,7 @@ long v4l2_compat_ioctl32(struct file *file, unsigned int cmd, unsigned long arg) | |||
| 920 | case VIDIOC_S_DV_TIMINGS: | 956 | case VIDIOC_S_DV_TIMINGS: |
| 921 | case VIDIOC_G_DV_TIMINGS: | 957 | case VIDIOC_G_DV_TIMINGS: |
| 922 | case VIDIOC_DQEVENT: | 958 | case VIDIOC_DQEVENT: |
| 959 | case VIDIOC_DQEVENT32: | ||
| 923 | case VIDIOC_SUBSCRIBE_EVENT: | 960 | case VIDIOC_SUBSCRIBE_EVENT: |
| 924 | case VIDIOC_UNSUBSCRIBE_EVENT: | 961 | case VIDIOC_UNSUBSCRIBE_EVENT: |
| 925 | ret = do_video_ioctl(file, cmd, arg); | 962 | ret = do_video_ioctl(file, cmd, arg); |
diff --git a/drivers/media/video/v4l2-ctrls.c b/drivers/media/video/v4l2-ctrls.c index 2412f08527aa..06b6014d4fb4 100644 --- a/drivers/media/video/v4l2-ctrls.c +++ b/drivers/media/video/v4l2-ctrls.c | |||
| @@ -23,17 +23,39 @@ | |||
| 23 | #include <media/v4l2-ioctl.h> | 23 | #include <media/v4l2-ioctl.h> |
| 24 | #include <media/v4l2-device.h> | 24 | #include <media/v4l2-device.h> |
| 25 | #include <media/v4l2-ctrls.h> | 25 | #include <media/v4l2-ctrls.h> |
| 26 | #include <media/v4l2-event.h> | ||
| 26 | #include <media/v4l2-dev.h> | 27 | #include <media/v4l2-dev.h> |
| 27 | 28 | ||
| 29 | #define has_op(master, op) \ | ||
| 30 | (master->ops && master->ops->op) | ||
| 31 | #define call_op(master, op) \ | ||
| 32 | (has_op(master, op) ? master->ops->op(master) : 0) | ||
| 33 | |||
| 28 | /* Internal temporary helper struct, one for each v4l2_ext_control */ | 34 | /* Internal temporary helper struct, one for each v4l2_ext_control */ |
| 29 | struct ctrl_helper { | 35 | struct v4l2_ctrl_helper { |
| 36 | /* Pointer to the control reference of the master control */ | ||
| 37 | struct v4l2_ctrl_ref *mref; | ||
| 30 | /* The control corresponding to the v4l2_ext_control ID field. */ | 38 | /* The control corresponding to the v4l2_ext_control ID field. */ |
| 31 | struct v4l2_ctrl *ctrl; | 39 | struct v4l2_ctrl *ctrl; |
| 32 | /* Used internally to mark whether this control was already | 40 | /* v4l2_ext_control index of the next control belonging to the |
| 33 | processed. */ | 41 | same cluster, or 0 if there isn't any. */ |
| 34 | bool handled; | 42 | u32 next; |
| 35 | }; | 43 | }; |
| 36 | 44 | ||
| 45 | /* Small helper function to determine if the autocluster is set to manual | ||
| 46 | mode. In that case the is_volatile flag should be ignored. */ | ||
| 47 | static bool is_cur_manual(const struct v4l2_ctrl *master) | ||
| 48 | { | ||
| 49 | return master->is_auto && master->cur.val == master->manual_mode_value; | ||
| 50 | } | ||
| 51 | |||
| 52 | /* Same as above, but this checks the against the new value instead of the | ||
| 53 | current value. */ | ||
| 54 | static bool is_new_manual(const struct v4l2_ctrl *master) | ||
| 55 | { | ||
| 56 | return master->is_auto && master->val == master->manual_mode_value; | ||
| 57 | } | ||
| 58 | |||
| 37 | /* Returns NULL or a character pointer array containing the menu for | 59 | /* Returns NULL or a character pointer array containing the menu for |
| 38 | the given control ID. The pointer array ends with a NULL pointer. | 60 | the given control ID. The pointer array ends with a NULL pointer. |
| 39 | An empty string signifies a menu entry that is invalid. This allows | 61 | An empty string signifies a menu entry that is invalid. This allows |
| @@ -181,7 +203,7 @@ const char * const *v4l2_ctrl_get_menu(u32 id) | |||
| 181 | }; | 203 | }; |
| 182 | static const char * const mpeg_stream_vbi_fmt[] = { | 204 | static const char * const mpeg_stream_vbi_fmt[] = { |
| 183 | "No VBI", | 205 | "No VBI", |
| 184 | "Private packet, IVTV format", | 206 | "Private Packet, IVTV Format", |
| 185 | NULL | 207 | NULL |
| 186 | }; | 208 | }; |
| 187 | static const char * const camera_power_line_frequency[] = { | 209 | static const char * const camera_power_line_frequency[] = { |
| @@ -204,18 +226,130 @@ const char * const *v4l2_ctrl_get_menu(u32 id) | |||
| 204 | "Negative", | 226 | "Negative", |
| 205 | "Emboss", | 227 | "Emboss", |
| 206 | "Sketch", | 228 | "Sketch", |
| 207 | "Sky blue", | 229 | "Sky Blue", |
| 208 | "Grass green", | 230 | "Grass Green", |
| 209 | "Skin whiten", | 231 | "Skin Whiten", |
| 210 | "Vivid", | 232 | "Vivid", |
| 211 | NULL | 233 | NULL |
| 212 | }; | 234 | }; |
| 213 | static const char * const tune_preemphasis[] = { | 235 | static const char * const tune_preemphasis[] = { |
| 214 | "No preemphasis", | 236 | "No Preemphasis", |
| 215 | "50 useconds", | 237 | "50 useconds", |
| 216 | "75 useconds", | 238 | "75 useconds", |
| 217 | NULL, | 239 | NULL, |
| 218 | }; | 240 | }; |
| 241 | static const char * const header_mode[] = { | ||
| 242 | "Separate Buffer", | ||
| 243 | "Joined With 1st Frame", | ||
| 244 | NULL, | ||
| 245 | }; | ||
| 246 | static const char * const multi_slice[] = { | ||
| 247 | "Single", | ||
| 248 | "Max Macroblocks", | ||
| 249 | "Max Bytes", | ||
| 250 | NULL, | ||
| 251 | }; | ||
| 252 | static const char * const entropy_mode[] = { | ||
| 253 | "CAVLC", | ||
| 254 | "CABAC", | ||
| 255 | NULL, | ||
| 256 | }; | ||
| 257 | static const char * const mpeg_h264_level[] = { | ||
| 258 | "1", | ||
| 259 | "1b", | ||
| 260 | "1.1", | ||
| 261 | "1.2", | ||
| 262 | "1.3", | ||
| 263 | "2", | ||
| 264 | "2.1", | ||
| 265 | "2.2", | ||
| 266 | "3", | ||
| 267 | "3.1", | ||
| 268 | "3.2", | ||
| 269 | "4", | ||
| 270 | "4.1", | ||
| 271 | "4.2", | ||
| 272 | "5", | ||
| 273 | "5.1", | ||
| 274 | NULL, | ||
| 275 | }; | ||
| 276 | static const char * const h264_loop_filter[] = { | ||
| 277 | "Enabled", | ||
| 278 | "Disabled", | ||
| 279 | "Disabled at Slice Boundary", | ||
| 280 | NULL, | ||
| 281 | }; | ||
| 282 | static const char * const h264_profile[] = { | ||
| 283 | "Baseline", | ||
| 284 | "Constrained Baseline", | ||
| 285 | "Main", | ||
| 286 | "Extended", | ||
| 287 | "High", | ||
| 288 | "High 10", | ||
| 289 | "High 422", | ||
| 290 | "High 444 Predictive", | ||
| 291 | "High 10 Intra", | ||
| 292 | "High 422 Intra", | ||
| 293 | "High 444 Intra", | ||
| 294 | "CAVLC 444 Intra", | ||
| 295 | "Scalable Baseline", | ||
| 296 | "Scalable High", | ||
| 297 | "Scalable High Intra", | ||
| 298 | "Multiview High", | ||
| 299 | NULL, | ||
| 300 | }; | ||
| 301 | static const char * const vui_sar_idc[] = { | ||
| 302 | "Unspecified", | ||
| 303 | "1:1", | ||
| 304 | "12:11", | ||
| 305 | "10:11", | ||
| 306 | "16:11", | ||
| 307 | "40:33", | ||
| 308 | "24:11", | ||
| 309 | "20:11", | ||
| 310 | "32:11", | ||
| 311 | "80:33", | ||
| 312 | "18:11", | ||
| 313 | "15:11", | ||
| 314 | "64:33", | ||
| 315 | "160:99", | ||
| 316 | "4:3", | ||
| 317 | "3:2", | ||
| 318 | "2:1", | ||
| 319 | "Extended SAR", | ||
| 320 | NULL, | ||
| 321 | }; | ||
| 322 | static const char * const mpeg_mpeg4_level[] = { | ||
| 323 | "0", | ||
| 324 | "0b", | ||
| 325 | "1", | ||
| 326 | "2", | ||
| 327 | "3", | ||
| 328 | "3b", | ||
| 329 | "4", | ||
| 330 | "5", | ||
| 331 | NULL, | ||
| 332 | }; | ||
| 333 | static const char * const mpeg4_profile[] = { | ||
| 334 | "Simple", | ||
| 335 | "Adcanved Simple", | ||
| 336 | "Core", | ||
| 337 | "Simple Scalable", | ||
| 338 | "Advanced Coding Efficency", | ||
| 339 | NULL, | ||
| 340 | }; | ||
| 341 | |||
| 342 | static const char * const flash_led_mode[] = { | ||
| 343 | "Off", | ||
| 344 | "Flash", | ||
| 345 | "Torch", | ||
| 346 | NULL, | ||
| 347 | }; | ||
| 348 | static const char * const flash_strobe_source[] = { | ||
| 349 | "Software", | ||
| 350 | "External", | ||
| 351 | NULL, | ||
| 352 | }; | ||
| 219 | 353 | ||
| 220 | switch (id) { | 354 | switch (id) { |
| 221 | case V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ: | 355 | case V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ: |
| @@ -256,6 +390,28 @@ const char * const *v4l2_ctrl_get_menu(u32 id) | |||
| 256 | return colorfx; | 390 | return colorfx; |
| 257 | case V4L2_CID_TUNE_PREEMPHASIS: | 391 | case V4L2_CID_TUNE_PREEMPHASIS: |
| 258 | return tune_preemphasis; | 392 | return tune_preemphasis; |
| 393 | case V4L2_CID_FLASH_LED_MODE: | ||
| 394 | return flash_led_mode; | ||
| 395 | case V4L2_CID_FLASH_STROBE_SOURCE: | ||
| 396 | return flash_strobe_source; | ||
| 397 | case V4L2_CID_MPEG_VIDEO_HEADER_MODE: | ||
| 398 | return header_mode; | ||
| 399 | case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE: | ||
| 400 | return multi_slice; | ||
| 401 | case V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE: | ||
| 402 | return entropy_mode; | ||
| 403 | case V4L2_CID_MPEG_VIDEO_H264_LEVEL: | ||
| 404 | return mpeg_h264_level; | ||
| 405 | case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE: | ||
| 406 | return h264_loop_filter; | ||
| 407 | case V4L2_CID_MPEG_VIDEO_H264_PROFILE: | ||
| 408 | return h264_profile; | ||
| 409 | case V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_IDC: | ||
| 410 | return vui_sar_idc; | ||
| 411 | case V4L2_CID_MPEG_VIDEO_MPEG4_LEVEL: | ||
| 412 | return mpeg_mpeg4_level; | ||
| 413 | case V4L2_CID_MPEG_VIDEO_MPEG4_PROFILE: | ||
| 414 | return mpeg4_profile; | ||
| 259 | default: | 415 | default: |
| 260 | return NULL; | 416 | return NULL; |
| 261 | } | 417 | } |
| @@ -307,6 +463,8 @@ const char *v4l2_ctrl_get_name(u32 id) | |||
| 307 | case V4L2_CID_CHROMA_GAIN: return "Chroma Gain"; | 463 | case V4L2_CID_CHROMA_GAIN: return "Chroma Gain"; |
| 308 | case V4L2_CID_ILLUMINATORS_1: return "Illuminator 1"; | 464 | case V4L2_CID_ILLUMINATORS_1: return "Illuminator 1"; |
| 309 | case V4L2_CID_ILLUMINATORS_2: return "Illuminator 2"; | 465 | case V4L2_CID_ILLUMINATORS_2: return "Illuminator 2"; |
| 466 | case V4L2_CID_MIN_BUFFERS_FOR_CAPTURE: return "Minimum Number of Capture Buffers"; | ||
| 467 | case V4L2_CID_MIN_BUFFERS_FOR_OUTPUT: return "Minimum Number of Output Buffers"; | ||
| 310 | 468 | ||
| 311 | /* MPEG controls */ | 469 | /* MPEG controls */ |
| 312 | /* Keep the order of the 'case's the same as in videodev2.h! */ | 470 | /* Keep the order of the 'case's the same as in videodev2.h! */ |
| @@ -343,6 +501,48 @@ const char *v4l2_ctrl_get_name(u32 id) | |||
| 343 | case V4L2_CID_MPEG_VIDEO_TEMPORAL_DECIMATION: return "Video Temporal Decimation"; | 501 | case V4L2_CID_MPEG_VIDEO_TEMPORAL_DECIMATION: return "Video Temporal Decimation"; |
| 344 | case V4L2_CID_MPEG_VIDEO_MUTE: return "Video Mute"; | 502 | case V4L2_CID_MPEG_VIDEO_MUTE: return "Video Mute"; |
| 345 | case V4L2_CID_MPEG_VIDEO_MUTE_YUV: return "Video Mute YUV"; | 503 | case V4L2_CID_MPEG_VIDEO_MUTE_YUV: return "Video Mute YUV"; |
| 504 | case V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE: return "Decoder Slice Interface"; | ||
| 505 | case V4L2_CID_MPEG_VIDEO_DECODER_MPEG4_DEBLOCK_FILTER: return "MPEG4 Loop Filter Enable"; | ||
| 506 | case V4L2_CID_MPEG_VIDEO_CYCLIC_INTRA_REFRESH_MB: return "The Number of Intra Refresh MBs"; | ||
| 507 | case V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE: return "Frame Level Rate Control Enable"; | ||
| 508 | case V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE: return "H264 MB Level Rate Control"; | ||
| 509 | case V4L2_CID_MPEG_VIDEO_HEADER_MODE: return "Sequence Header Mode"; | ||
| 510 | case V4L2_CID_MPEG_VIDEO_MAX_REF_PIC: return "The Max Number of Reference Picture"; | ||
| 511 | case V4L2_CID_MPEG_VIDEO_H263_I_FRAME_QP: return "H263 I-Frame QP Value"; | ||
| 512 | case V4L2_CID_MPEG_VIDEO_H263_P_FRAME_QP: return "H263 P frame QP Value"; | ||
| 513 | case V4L2_CID_MPEG_VIDEO_H263_B_FRAME_QP: return "H263 B frame QP Value"; | ||
| 514 | case V4L2_CID_MPEG_VIDEO_H263_MIN_QP: return "H263 Minimum QP Value"; | ||
| 515 | case V4L2_CID_MPEG_VIDEO_H263_MAX_QP: return "H263 Maximum QP Value"; | ||
| 516 | case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP: return "H264 I-Frame QP Value"; | ||
| 517 | case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP: return "H264 P frame QP Value"; | ||
| 518 | case V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP: return "H264 B frame QP Value"; | ||
| 519 | case V4L2_CID_MPEG_VIDEO_H264_MAX_QP: return "H264 Maximum QP Value"; | ||
| 520 | case V4L2_CID_MPEG_VIDEO_H264_MIN_QP: return "H264 Minimum QP Value"; | ||
| 521 | case V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM: return "H264 8x8 Transform Enable"; | ||
| 522 | case V4L2_CID_MPEG_VIDEO_H264_CPB_SIZE: return "H264 CPB Buffer Size"; | ||
| 523 | case V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE: return "H264 Entorpy Mode"; | ||
| 524 | case V4L2_CID_MPEG_VIDEO_H264_I_PERIOD: return "H264 I Period"; | ||
| 525 | case V4L2_CID_MPEG_VIDEO_H264_LEVEL: return "H264 Level"; | ||
| 526 | case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA: return "H264 Loop Filter Alpha Offset"; | ||
| 527 | case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA: return "H264 Loop Filter Beta Offset"; | ||
| 528 | case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE: return "H264 Loop Filter Mode"; | ||
| 529 | case V4L2_CID_MPEG_VIDEO_H264_PROFILE: return "H264 Profile"; | ||
| 530 | case V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_HEIGHT: return "Vertical Size of SAR"; | ||
| 531 | case V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_WIDTH: return "Horizontal Size of SAR"; | ||
| 532 | case V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_ENABLE: return "Aspect Ratio VUI Enable"; | ||
| 533 | case V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_IDC: return "VUI Aspect Ratio IDC"; | ||
| 534 | case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP: return "MPEG4 I-Frame QP Value"; | ||
| 535 | case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP: return "MPEG4 P frame QP Value"; | ||
| 536 | case V4L2_CID_MPEG_VIDEO_MPEG4_B_FRAME_QP: return "MPEG4 B frame QP Value"; | ||
| 537 | case V4L2_CID_MPEG_VIDEO_MPEG4_MIN_QP: return "MPEG4 Minimum QP Value"; | ||
| 538 | case V4L2_CID_MPEG_VIDEO_MPEG4_MAX_QP: return "MPEG4 Maximum QP Value"; | ||
| 539 | case V4L2_CID_MPEG_VIDEO_MPEG4_LEVEL: return "MPEG4 Level"; | ||
| 540 | case V4L2_CID_MPEG_VIDEO_MPEG4_PROFILE: return "MPEG4 Profile"; | ||
| 541 | case V4L2_CID_MPEG_VIDEO_MPEG4_QPEL: return "Quarter Pixel Search Enable"; | ||
| 542 | case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES: return "The Maximum Bytes Per Slice"; | ||
| 543 | case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB: return "The Number of MB in a Slice"; | ||
| 544 | case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE: return "The Slice Partitioning Method"; | ||
| 545 | case V4L2_CID_MPEG_VIDEO_VBV_SIZE: return "VBV Buffer Size"; | ||
| 346 | 546 | ||
| 347 | /* CAMERA controls */ | 547 | /* CAMERA controls */ |
| 348 | /* Keep the order of the 'case's the same as in videodev2.h! */ | 548 | /* Keep the order of the 'case's the same as in videodev2.h! */ |
| @@ -389,6 +589,21 @@ const char *v4l2_ctrl_get_name(u32 id) | |||
| 389 | case V4L2_CID_TUNE_POWER_LEVEL: return "Tune Power Level"; | 589 | case V4L2_CID_TUNE_POWER_LEVEL: return "Tune Power Level"; |
| 390 | case V4L2_CID_TUNE_ANTENNA_CAPACITOR: return "Tune Antenna Capacitor"; | 590 | case V4L2_CID_TUNE_ANTENNA_CAPACITOR: return "Tune Antenna Capacitor"; |
| 391 | 591 | ||
| 592 | /* Flash controls */ | ||
| 593 | case V4L2_CID_FLASH_CLASS: return "Flash controls"; | ||
| 594 | case V4L2_CID_FLASH_LED_MODE: return "LED mode"; | ||
| 595 | case V4L2_CID_FLASH_STROBE_SOURCE: return "Strobe source"; | ||
| 596 | case V4L2_CID_FLASH_STROBE: return "Strobe"; | ||
| 597 | case V4L2_CID_FLASH_STROBE_STOP: return "Stop strobe"; | ||
| 598 | case V4L2_CID_FLASH_STROBE_STATUS: return "Strobe status"; | ||
| 599 | case V4L2_CID_FLASH_TIMEOUT: return "Strobe timeout"; | ||
| 600 | case V4L2_CID_FLASH_INTENSITY: return "Intensity, flash mode"; | ||
| 601 | case V4L2_CID_FLASH_TORCH_INTENSITY: return "Intensity, torch mode"; | ||
| 602 | case V4L2_CID_FLASH_INDICATOR_INTENSITY: return "Intensity, indicator"; | ||
| 603 | case V4L2_CID_FLASH_FAULT: return "Faults"; | ||
| 604 | case V4L2_CID_FLASH_CHARGE: return "Charge"; | ||
| 605 | case V4L2_CID_FLASH_READY: return "Ready to strobe"; | ||
| 606 | |||
| 392 | default: | 607 | default: |
| 393 | return NULL; | 608 | return NULL; |
| 394 | } | 609 | } |
| @@ -423,12 +638,24 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type, | |||
| 423 | case V4L2_CID_PILOT_TONE_ENABLED: | 638 | case V4L2_CID_PILOT_TONE_ENABLED: |
| 424 | case V4L2_CID_ILLUMINATORS_1: | 639 | case V4L2_CID_ILLUMINATORS_1: |
| 425 | case V4L2_CID_ILLUMINATORS_2: | 640 | case V4L2_CID_ILLUMINATORS_2: |
| 641 | case V4L2_CID_FLASH_STROBE_STATUS: | ||
| 642 | case V4L2_CID_FLASH_CHARGE: | ||
| 643 | case V4L2_CID_FLASH_READY: | ||
| 644 | case V4L2_CID_MPEG_VIDEO_DECODER_MPEG4_DEBLOCK_FILTER: | ||
| 645 | case V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE: | ||
| 646 | case V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE: | ||
| 647 | case V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE: | ||
| 648 | case V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM: | ||
| 649 | case V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_ENABLE: | ||
| 650 | case V4L2_CID_MPEG_VIDEO_MPEG4_QPEL: | ||
| 426 | *type = V4L2_CTRL_TYPE_BOOLEAN; | 651 | *type = V4L2_CTRL_TYPE_BOOLEAN; |
| 427 | *min = 0; | 652 | *min = 0; |
| 428 | *max = *step = 1; | 653 | *max = *step = 1; |
| 429 | break; | 654 | break; |
| 430 | case V4L2_CID_PAN_RESET: | 655 | case V4L2_CID_PAN_RESET: |
| 431 | case V4L2_CID_TILT_RESET: | 656 | case V4L2_CID_TILT_RESET: |
| 657 | case V4L2_CID_FLASH_STROBE: | ||
| 658 | case V4L2_CID_FLASH_STROBE_STOP: | ||
| 432 | *type = V4L2_CTRL_TYPE_BUTTON; | 659 | *type = V4L2_CTRL_TYPE_BUTTON; |
| 433 | *flags |= V4L2_CTRL_FLAG_WRITE_ONLY; | 660 | *flags |= V4L2_CTRL_FLAG_WRITE_ONLY; |
| 434 | *min = *max = *step = *def = 0; | 661 | *min = *max = *step = *def = 0; |
| @@ -452,6 +679,17 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type, | |||
| 452 | case V4L2_CID_EXPOSURE_AUTO: | 679 | case V4L2_CID_EXPOSURE_AUTO: |
| 453 | case V4L2_CID_COLORFX: | 680 | case V4L2_CID_COLORFX: |
| 454 | case V4L2_CID_TUNE_PREEMPHASIS: | 681 | case V4L2_CID_TUNE_PREEMPHASIS: |
| 682 | case V4L2_CID_FLASH_LED_MODE: | ||
| 683 | case V4L2_CID_FLASH_STROBE_SOURCE: | ||
| 684 | case V4L2_CID_MPEG_VIDEO_HEADER_MODE: | ||
| 685 | case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE: | ||
| 686 | case V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE: | ||
| 687 | case V4L2_CID_MPEG_VIDEO_H264_LEVEL: | ||
| 688 | case V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE: | ||
| 689 | case V4L2_CID_MPEG_VIDEO_H264_PROFILE: | ||
| 690 | case V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_IDC: | ||
| 691 | case V4L2_CID_MPEG_VIDEO_MPEG4_LEVEL: | ||
| 692 | case V4L2_CID_MPEG_VIDEO_MPEG4_PROFILE: | ||
| 455 | *type = V4L2_CTRL_TYPE_MENU; | 693 | *type = V4L2_CTRL_TYPE_MENU; |
| 456 | break; | 694 | break; |
| 457 | case V4L2_CID_RDS_TX_PS_NAME: | 695 | case V4L2_CID_RDS_TX_PS_NAME: |
| @@ -462,6 +700,7 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type, | |||
| 462 | case V4L2_CID_CAMERA_CLASS: | 700 | case V4L2_CID_CAMERA_CLASS: |
| 463 | case V4L2_CID_MPEG_CLASS: | 701 | case V4L2_CID_MPEG_CLASS: |
| 464 | case V4L2_CID_FM_TX_CLASS: | 702 | case V4L2_CID_FM_TX_CLASS: |
| 703 | case V4L2_CID_FLASH_CLASS: | ||
| 465 | *type = V4L2_CTRL_TYPE_CTRL_CLASS; | 704 | *type = V4L2_CTRL_TYPE_CTRL_CLASS; |
| 466 | /* You can neither read not write these */ | 705 | /* You can neither read not write these */ |
| 467 | *flags |= V4L2_CTRL_FLAG_READ_ONLY | V4L2_CTRL_FLAG_WRITE_ONLY; | 706 | *flags |= V4L2_CTRL_FLAG_READ_ONLY | V4L2_CTRL_FLAG_WRITE_ONLY; |
| @@ -474,6 +713,14 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type, | |||
| 474 | /* Max is calculated as RGB888 that is 2^24 */ | 713 | /* Max is calculated as RGB888 that is 2^24 */ |
| 475 | *max = 0xFFFFFF; | 714 | *max = 0xFFFFFF; |
| 476 | break; | 715 | break; |
| 716 | case V4L2_CID_FLASH_FAULT: | ||
| 717 | *type = V4L2_CTRL_TYPE_BITMASK; | ||
| 718 | break; | ||
| 719 | case V4L2_CID_MIN_BUFFERS_FOR_CAPTURE: | ||
| 720 | case V4L2_CID_MIN_BUFFERS_FOR_OUTPUT: | ||
| 721 | *type = V4L2_CTRL_TYPE_INTEGER; | ||
| 722 | *flags |= V4L2_CTRL_FLAG_READ_ONLY; | ||
| 723 | break; | ||
| 477 | default: | 724 | default: |
| 478 | *type = V4L2_CTRL_TYPE_INTEGER; | 725 | *type = V4L2_CTRL_TYPE_INTEGER; |
| 479 | break; | 726 | break; |
| @@ -519,6 +766,10 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type, | |||
| 519 | case V4L2_CID_ZOOM_RELATIVE: | 766 | case V4L2_CID_ZOOM_RELATIVE: |
| 520 | *flags |= V4L2_CTRL_FLAG_WRITE_ONLY; | 767 | *flags |= V4L2_CTRL_FLAG_WRITE_ONLY; |
| 521 | break; | 768 | break; |
| 769 | case V4L2_CID_FLASH_STROBE_STATUS: | ||
| 770 | case V4L2_CID_FLASH_READY: | ||
| 771 | *flags |= V4L2_CTRL_FLAG_READ_ONLY; | ||
| 772 | break; | ||
| 522 | } | 773 | } |
| 523 | } | 774 | } |
| 524 | EXPORT_SYMBOL(v4l2_ctrl_fill); | 775 | EXPORT_SYMBOL(v4l2_ctrl_fill); |
| @@ -537,6 +788,42 @@ static bool type_is_int(const struct v4l2_ctrl *ctrl) | |||
| 537 | } | 788 | } |
| 538 | } | 789 | } |
| 539 | 790 | ||
| 791 | static void fill_event(struct v4l2_event *ev, struct v4l2_ctrl *ctrl, u32 changes) | ||
| 792 | { | ||
| 793 | memset(ev->reserved, 0, sizeof(ev->reserved)); | ||
| 794 | ev->type = V4L2_EVENT_CTRL; | ||
| 795 | ev->id = ctrl->id; | ||
| 796 | ev->u.ctrl.changes = changes; | ||
| 797 | ev->u.ctrl.type = ctrl->type; | ||
| 798 | ev->u.ctrl.flags = ctrl->flags; | ||
| 799 | if (ctrl->type == V4L2_CTRL_TYPE_STRING) | ||
| 800 | ev->u.ctrl.value64 = 0; | ||
| 801 | else | ||
| 802 | ev->u.ctrl.value64 = ctrl->cur.val64; | ||
| 803 | ev->u.ctrl.minimum = ctrl->minimum; | ||
| 804 | ev->u.ctrl.maximum = ctrl->maximum; | ||
| 805 | if (ctrl->type == V4L2_CTRL_TYPE_MENU) | ||
| 806 | ev->u.ctrl.step = 1; | ||
| 807 | else | ||
| 808 | ev->u.ctrl.step = ctrl->step; | ||
| 809 | ev->u.ctrl.default_value = ctrl->default_value; | ||
| 810 | } | ||
| 811 | |||
| 812 | static void send_event(struct v4l2_fh *fh, struct v4l2_ctrl *ctrl, u32 changes) | ||
| 813 | { | ||
| 814 | struct v4l2_event ev; | ||
| 815 | struct v4l2_subscribed_event *sev; | ||
| 816 | |||
| 817 | if (list_empty(&ctrl->ev_subs)) | ||
| 818 | return; | ||
| 819 | fill_event(&ev, ctrl, changes); | ||
| 820 | |||
| 821 | list_for_each_entry(sev, &ctrl->ev_subs, node) | ||
| 822 | if (sev->fh && (sev->fh != fh || | ||
| 823 | (sev->flags & V4L2_EVENT_SUB_FL_ALLOW_FEEDBACK))) | ||
| 824 | v4l2_event_queue_fh(sev->fh, &ev); | ||
| 825 | } | ||
| 826 | |||
| 540 | /* Helper function: copy the current control value back to the caller */ | 827 | /* Helper function: copy the current control value back to the caller */ |
| 541 | static int cur_to_user(struct v4l2_ext_control *c, | 828 | static int cur_to_user(struct v4l2_ext_control *c, |
| 542 | struct v4l2_ctrl *ctrl) | 829 | struct v4l2_ctrl *ctrl) |
| @@ -624,22 +911,45 @@ static int new_to_user(struct v4l2_ext_control *c, | |||
| 624 | } | 911 | } |
| 625 | 912 | ||
| 626 | /* Copy the new value to the current value. */ | 913 | /* Copy the new value to the current value. */ |
| 627 | static void new_to_cur(struct v4l2_ctrl *ctrl) | 914 | static void new_to_cur(struct v4l2_fh *fh, struct v4l2_ctrl *ctrl, |
| 915 | bool update_inactive) | ||
| 628 | { | 916 | { |
| 917 | bool changed = false; | ||
| 918 | |||
| 629 | if (ctrl == NULL) | 919 | if (ctrl == NULL) |
| 630 | return; | 920 | return; |
| 631 | switch (ctrl->type) { | 921 | switch (ctrl->type) { |
| 922 | case V4L2_CTRL_TYPE_BUTTON: | ||
| 923 | changed = true; | ||
| 924 | break; | ||
| 632 | case V4L2_CTRL_TYPE_STRING: | 925 | case V4L2_CTRL_TYPE_STRING: |
| 633 | /* strings are always 0-terminated */ | 926 | /* strings are always 0-terminated */ |
| 927 | changed = strcmp(ctrl->string, ctrl->cur.string); | ||
| 634 | strcpy(ctrl->cur.string, ctrl->string); | 928 | strcpy(ctrl->cur.string, ctrl->string); |
| 635 | break; | 929 | break; |
| 636 | case V4L2_CTRL_TYPE_INTEGER64: | 930 | case V4L2_CTRL_TYPE_INTEGER64: |
| 931 | changed = ctrl->val64 != ctrl->cur.val64; | ||
| 637 | ctrl->cur.val64 = ctrl->val64; | 932 | ctrl->cur.val64 = ctrl->val64; |
| 638 | break; | 933 | break; |
| 639 | default: | 934 | default: |
| 935 | changed = ctrl->val != ctrl->cur.val; | ||
| 640 | ctrl->cur.val = ctrl->val; | 936 | ctrl->cur.val = ctrl->val; |
| 641 | break; | 937 | break; |
| 642 | } | 938 | } |
| 939 | if (update_inactive) { | ||
| 940 | ctrl->flags &= ~V4L2_CTRL_FLAG_INACTIVE; | ||
| 941 | if (!is_cur_manual(ctrl->cluster[0])) | ||
| 942 | ctrl->flags |= V4L2_CTRL_FLAG_INACTIVE; | ||
| 943 | } | ||
| 944 | if (changed || update_inactive) { | ||
| 945 | /* If a control was changed that was not one of the controls | ||
| 946 | modified by the application, then send the event to all. */ | ||
| 947 | if (!ctrl->is_new) | ||
| 948 | fh = NULL; | ||
| 949 | send_event(fh, ctrl, | ||
| 950 | (changed ? V4L2_EVENT_CTRL_CH_VALUE : 0) | | ||
| 951 | (update_inactive ? V4L2_EVENT_CTRL_CH_FLAGS : 0)); | ||
| 952 | } | ||
| 643 | } | 953 | } |
| 644 | 954 | ||
| 645 | /* Copy the current value to the new value */ | 955 | /* Copy the current value to the new value */ |
| @@ -692,13 +1002,11 @@ static int cluster_changed(struct v4l2_ctrl *master) | |||
| 692 | return diff; | 1002 | return diff; |
| 693 | } | 1003 | } |
| 694 | 1004 | ||
| 695 | /* Validate a new control */ | 1005 | /* Validate integer-type control */ |
| 696 | static int validate_new(struct v4l2_ctrl *ctrl) | 1006 | static int validate_new_int(const struct v4l2_ctrl *ctrl, s32 *pval) |
| 697 | { | 1007 | { |
| 698 | s32 val = ctrl->val; | 1008 | s32 val = *pval; |
| 699 | char *s = ctrl->string; | ||
| 700 | u32 offset; | 1009 | u32 offset; |
| 701 | size_t len; | ||
| 702 | 1010 | ||
| 703 | switch (ctrl->type) { | 1011 | switch (ctrl->type) { |
| 704 | case V4L2_CTRL_TYPE_INTEGER: | 1012 | case V4L2_CTRL_TYPE_INTEGER: |
| @@ -711,11 +1019,11 @@ static int validate_new(struct v4l2_ctrl *ctrl) | |||
| 711 | offset = val - ctrl->minimum; | 1019 | offset = val - ctrl->minimum; |
| 712 | offset = ctrl->step * (offset / ctrl->step); | 1020 | offset = ctrl->step * (offset / ctrl->step); |
| 713 | val = ctrl->minimum + offset; | 1021 | val = ctrl->minimum + offset; |
| 714 | ctrl->val = val; | 1022 | *pval = val; |
| 715 | return 0; | 1023 | return 0; |
| 716 | 1024 | ||
| 717 | case V4L2_CTRL_TYPE_BOOLEAN: | 1025 | case V4L2_CTRL_TYPE_BOOLEAN: |
| 718 | ctrl->val = !!ctrl->val; | 1026 | *pval = !!val; |
| 719 | return 0; | 1027 | return 0; |
| 720 | 1028 | ||
| 721 | case V4L2_CTRL_TYPE_MENU: | 1029 | case V4L2_CTRL_TYPE_MENU: |
| @@ -726,11 +1034,35 @@ static int validate_new(struct v4l2_ctrl *ctrl) | |||
| 726 | return -EINVAL; | 1034 | return -EINVAL; |
| 727 | return 0; | 1035 | return 0; |
| 728 | 1036 | ||
| 1037 | case V4L2_CTRL_TYPE_BITMASK: | ||
| 1038 | *pval &= ctrl->maximum; | ||
| 1039 | return 0; | ||
| 1040 | |||
| 729 | case V4L2_CTRL_TYPE_BUTTON: | 1041 | case V4L2_CTRL_TYPE_BUTTON: |
| 730 | case V4L2_CTRL_TYPE_CTRL_CLASS: | 1042 | case V4L2_CTRL_TYPE_CTRL_CLASS: |
| 731 | ctrl->val64 = 0; | 1043 | *pval = 0; |
| 732 | return 0; | 1044 | return 0; |
| 733 | 1045 | ||
| 1046 | default: | ||
| 1047 | return -EINVAL; | ||
| 1048 | } | ||
| 1049 | } | ||
| 1050 | |||
| 1051 | /* Validate a new control */ | ||
| 1052 | static int validate_new(const struct v4l2_ctrl *ctrl, struct v4l2_ext_control *c) | ||
| 1053 | { | ||
| 1054 | char *s = c->string; | ||
| 1055 | size_t len; | ||
| 1056 | |||
| 1057 | switch (ctrl->type) { | ||
| 1058 | case V4L2_CTRL_TYPE_INTEGER: | ||
| 1059 | case V4L2_CTRL_TYPE_BOOLEAN: | ||
| 1060 | case V4L2_CTRL_TYPE_MENU: | ||
| 1061 | case V4L2_CTRL_TYPE_BITMASK: | ||
| 1062 | case V4L2_CTRL_TYPE_BUTTON: | ||
| 1063 | case V4L2_CTRL_TYPE_CTRL_CLASS: | ||
| 1064 | return validate_new_int(ctrl, &c->value); | ||
| 1065 | |||
| 734 | case V4L2_CTRL_TYPE_INTEGER64: | 1066 | case V4L2_CTRL_TYPE_INTEGER64: |
| 735 | return 0; | 1067 | return 0; |
| 736 | 1068 | ||
| @@ -780,6 +1112,7 @@ void v4l2_ctrl_handler_free(struct v4l2_ctrl_handler *hdl) | |||
| 780 | { | 1112 | { |
| 781 | struct v4l2_ctrl_ref *ref, *next_ref; | 1113 | struct v4l2_ctrl_ref *ref, *next_ref; |
| 782 | struct v4l2_ctrl *ctrl, *next_ctrl; | 1114 | struct v4l2_ctrl *ctrl, *next_ctrl; |
| 1115 | struct v4l2_subscribed_event *sev, *next_sev; | ||
| 783 | 1116 | ||
| 784 | if (hdl == NULL || hdl->buckets == NULL) | 1117 | if (hdl == NULL || hdl->buckets == NULL) |
| 785 | return; | 1118 | return; |
| @@ -793,6 +1126,8 @@ void v4l2_ctrl_handler_free(struct v4l2_ctrl_handler *hdl) | |||
| 793 | /* Free all controls owned by the handler */ | 1126 | /* Free all controls owned by the handler */ |
| 794 | list_for_each_entry_safe(ctrl, next_ctrl, &hdl->ctrls, node) { | 1127 | list_for_each_entry_safe(ctrl, next_ctrl, &hdl->ctrls, node) { |
| 795 | list_del(&ctrl->node); | 1128 | list_del(&ctrl->node); |
| 1129 | list_for_each_entry_safe(sev, next_sev, &ctrl->ev_subs, node) | ||
| 1130 | list_del(&sev->node); | ||
| 796 | kfree(ctrl); | 1131 | kfree(ctrl); |
| 797 | } | 1132 | } |
| 798 | kfree(hdl->buckets); | 1133 | kfree(hdl->buckets); |
| @@ -962,13 +1297,17 @@ static struct v4l2_ctrl *v4l2_ctrl_new(struct v4l2_ctrl_handler *hdl, | |||
| 962 | 1297 | ||
| 963 | /* Sanity checks */ | 1298 | /* Sanity checks */ |
| 964 | if (id == 0 || name == NULL || id >= V4L2_CID_PRIVATE_BASE || | 1299 | if (id == 0 || name == NULL || id >= V4L2_CID_PRIVATE_BASE || |
| 965 | max < min || | ||
| 966 | (type == V4L2_CTRL_TYPE_INTEGER && step == 0) || | 1300 | (type == V4L2_CTRL_TYPE_INTEGER && step == 0) || |
| 1301 | (type == V4L2_CTRL_TYPE_BITMASK && max == 0) || | ||
| 967 | (type == V4L2_CTRL_TYPE_MENU && qmenu == NULL) || | 1302 | (type == V4L2_CTRL_TYPE_MENU && qmenu == NULL) || |
| 968 | (type == V4L2_CTRL_TYPE_STRING && max == 0)) { | 1303 | (type == V4L2_CTRL_TYPE_STRING && max == 0)) { |
| 969 | handler_set_err(hdl, -ERANGE); | 1304 | handler_set_err(hdl, -ERANGE); |
| 970 | return NULL; | 1305 | return NULL; |
| 971 | } | 1306 | } |
| 1307 | if (type != V4L2_CTRL_TYPE_BITMASK && max < min) { | ||
| 1308 | handler_set_err(hdl, -ERANGE); | ||
| 1309 | return NULL; | ||
| 1310 | } | ||
| 972 | if ((type == V4L2_CTRL_TYPE_INTEGER || | 1311 | if ((type == V4L2_CTRL_TYPE_INTEGER || |
| 973 | type == V4L2_CTRL_TYPE_MENU || | 1312 | type == V4L2_CTRL_TYPE_MENU || |
| 974 | type == V4L2_CTRL_TYPE_BOOLEAN) && | 1313 | type == V4L2_CTRL_TYPE_BOOLEAN) && |
| @@ -976,6 +1315,10 @@ static struct v4l2_ctrl *v4l2_ctrl_new(struct v4l2_ctrl_handler *hdl, | |||
| 976 | handler_set_err(hdl, -ERANGE); | 1315 | handler_set_err(hdl, -ERANGE); |
| 977 | return NULL; | 1316 | return NULL; |
| 978 | } | 1317 | } |
| 1318 | if (type == V4L2_CTRL_TYPE_BITMASK && ((def & ~max) || min || step)) { | ||
| 1319 | handler_set_err(hdl, -ERANGE); | ||
| 1320 | return NULL; | ||
| 1321 | } | ||
| 979 | 1322 | ||
| 980 | if (type == V4L2_CTRL_TYPE_BUTTON) | 1323 | if (type == V4L2_CTRL_TYPE_BUTTON) |
| 981 | flags |= V4L2_CTRL_FLAG_WRITE_ONLY; | 1324 | flags |= V4L2_CTRL_FLAG_WRITE_ONLY; |
| @@ -991,6 +1334,7 @@ static struct v4l2_ctrl *v4l2_ctrl_new(struct v4l2_ctrl_handler *hdl, | |||
| 991 | } | 1334 | } |
| 992 | 1335 | ||
| 993 | INIT_LIST_HEAD(&ctrl->node); | 1336 | INIT_LIST_HEAD(&ctrl->node); |
| 1337 | INIT_LIST_HEAD(&ctrl->ev_subs); | ||
| 994 | ctrl->handler = hdl; | 1338 | ctrl->handler = hdl; |
| 995 | ctrl->ops = ops; | 1339 | ctrl->ops = ops; |
| 996 | ctrl->id = id; | 1340 | ctrl->id = id; |
| @@ -1132,6 +1476,9 @@ int v4l2_ctrl_add_handler(struct v4l2_ctrl_handler *hdl, | |||
| 1132 | /* Skip handler-private controls. */ | 1476 | /* Skip handler-private controls. */ |
| 1133 | if (ctrl->is_private) | 1477 | if (ctrl->is_private) |
| 1134 | continue; | 1478 | continue; |
| 1479 | /* And control classes */ | ||
| 1480 | if (ctrl->type == V4L2_CTRL_TYPE_CTRL_CLASS) | ||
| 1481 | continue; | ||
| 1135 | ret = handler_new_ref(hdl, ctrl); | 1482 | ret = handler_new_ref(hdl, ctrl); |
| 1136 | if (ret) | 1483 | if (ret) |
| 1137 | break; | 1484 | break; |
| @@ -1147,7 +1494,7 @@ void v4l2_ctrl_cluster(unsigned ncontrols, struct v4l2_ctrl **controls) | |||
| 1147 | int i; | 1494 | int i; |
| 1148 | 1495 | ||
| 1149 | /* The first control is the master control and it must not be NULL */ | 1496 | /* The first control is the master control and it must not be NULL */ |
| 1150 | BUG_ON(controls[0] == NULL); | 1497 | BUG_ON(ncontrols == 0 || controls[0] == NULL); |
| 1151 | 1498 | ||
| 1152 | for (i = 0; i < ncontrols; i++) { | 1499 | for (i = 0; i < ncontrols; i++) { |
| 1153 | if (controls[i]) { | 1500 | if (controls[i]) { |
| @@ -1158,18 +1505,47 @@ void v4l2_ctrl_cluster(unsigned ncontrols, struct v4l2_ctrl **controls) | |||
| 1158 | } | 1505 | } |
| 1159 | EXPORT_SYMBOL(v4l2_ctrl_cluster); | 1506 | EXPORT_SYMBOL(v4l2_ctrl_cluster); |
| 1160 | 1507 | ||
| 1508 | void v4l2_ctrl_auto_cluster(unsigned ncontrols, struct v4l2_ctrl **controls, | ||
| 1509 | u8 manual_val, bool set_volatile) | ||
| 1510 | { | ||
| 1511 | struct v4l2_ctrl *master = controls[0]; | ||
| 1512 | u32 flag; | ||
| 1513 | int i; | ||
| 1514 | |||
| 1515 | v4l2_ctrl_cluster(ncontrols, controls); | ||
| 1516 | WARN_ON(ncontrols <= 1); | ||
| 1517 | WARN_ON(manual_val < master->minimum || manual_val > master->maximum); | ||
| 1518 | master->is_auto = true; | ||
| 1519 | master->manual_mode_value = manual_val; | ||
| 1520 | master->flags |= V4L2_CTRL_FLAG_UPDATE; | ||
| 1521 | flag = is_cur_manual(master) ? 0 : V4L2_CTRL_FLAG_INACTIVE; | ||
| 1522 | |||
| 1523 | for (i = 1; i < ncontrols; i++) | ||
| 1524 | if (controls[i]) { | ||
| 1525 | controls[i]->is_volatile = set_volatile; | ||
| 1526 | controls[i]->flags |= flag; | ||
| 1527 | } | ||
| 1528 | } | ||
| 1529 | EXPORT_SYMBOL(v4l2_ctrl_auto_cluster); | ||
| 1530 | |||
| 1161 | /* Activate/deactivate a control. */ | 1531 | /* Activate/deactivate a control. */ |
| 1162 | void v4l2_ctrl_activate(struct v4l2_ctrl *ctrl, bool active) | 1532 | void v4l2_ctrl_activate(struct v4l2_ctrl *ctrl, bool active) |
| 1163 | { | 1533 | { |
| 1534 | /* invert since the actual flag is called 'inactive' */ | ||
| 1535 | bool inactive = !active; | ||
| 1536 | bool old; | ||
| 1537 | |||
| 1164 | if (ctrl == NULL) | 1538 | if (ctrl == NULL) |
| 1165 | return; | 1539 | return; |
| 1166 | 1540 | ||
| 1167 | if (!active) | 1541 | if (inactive) |
| 1168 | /* set V4L2_CTRL_FLAG_INACTIVE */ | 1542 | /* set V4L2_CTRL_FLAG_INACTIVE */ |
| 1169 | set_bit(4, &ctrl->flags); | 1543 | old = test_and_set_bit(4, &ctrl->flags); |
| 1170 | else | 1544 | else |
| 1171 | /* clear V4L2_CTRL_FLAG_INACTIVE */ | 1545 | /* clear V4L2_CTRL_FLAG_INACTIVE */ |
| 1172 | clear_bit(4, &ctrl->flags); | 1546 | old = test_and_clear_bit(4, &ctrl->flags); |
| 1547 | if (old != inactive) | ||
| 1548 | send_event(NULL, ctrl, V4L2_EVENT_CTRL_CH_FLAGS); | ||
| 1173 | } | 1549 | } |
| 1174 | EXPORT_SYMBOL(v4l2_ctrl_activate); | 1550 | EXPORT_SYMBOL(v4l2_ctrl_activate); |
| 1175 | 1551 | ||
| @@ -1181,15 +1557,21 @@ EXPORT_SYMBOL(v4l2_ctrl_activate); | |||
| 1181 | these controls. */ | 1557 | these controls. */ |
| 1182 | void v4l2_ctrl_grab(struct v4l2_ctrl *ctrl, bool grabbed) | 1558 | void v4l2_ctrl_grab(struct v4l2_ctrl *ctrl, bool grabbed) |
| 1183 | { | 1559 | { |
| 1560 | bool old; | ||
| 1561 | |||
| 1184 | if (ctrl == NULL) | 1562 | if (ctrl == NULL) |
| 1185 | return; | 1563 | return; |
| 1186 | 1564 | ||
| 1565 | v4l2_ctrl_lock(ctrl); | ||
| 1187 | if (grabbed) | 1566 | if (grabbed) |
| 1188 | /* set V4L2_CTRL_FLAG_GRABBED */ | 1567 | /* set V4L2_CTRL_FLAG_GRABBED */ |
| 1189 | set_bit(1, &ctrl->flags); | 1568 | old = test_and_set_bit(1, &ctrl->flags); |
| 1190 | else | 1569 | else |
| 1191 | /* clear V4L2_CTRL_FLAG_GRABBED */ | 1570 | /* clear V4L2_CTRL_FLAG_GRABBED */ |
| 1192 | clear_bit(1, &ctrl->flags); | 1571 | old = test_and_clear_bit(1, &ctrl->flags); |
| 1572 | if (old != grabbed) | ||
| 1573 | send_event(NULL, ctrl, V4L2_EVENT_CTRL_CH_FLAGS); | ||
| 1574 | v4l2_ctrl_unlock(ctrl); | ||
| 1193 | } | 1575 | } |
| 1194 | EXPORT_SYMBOL(v4l2_ctrl_grab); | 1576 | EXPORT_SYMBOL(v4l2_ctrl_grab); |
| 1195 | 1577 | ||
| @@ -1217,6 +1599,9 @@ static void log_ctrl(const struct v4l2_ctrl *ctrl, | |||
| 1217 | case V4L2_CTRL_TYPE_MENU: | 1599 | case V4L2_CTRL_TYPE_MENU: |
| 1218 | printk(KERN_CONT "%s", ctrl->qmenu[ctrl->cur.val]); | 1600 | printk(KERN_CONT "%s", ctrl->qmenu[ctrl->cur.val]); |
| 1219 | break; | 1601 | break; |
| 1602 | case V4L2_CTRL_TYPE_BITMASK: | ||
| 1603 | printk(KERN_CONT "0x%08x", ctrl->cur.val); | ||
| 1604 | break; | ||
| 1220 | case V4L2_CTRL_TYPE_INTEGER64: | 1605 | case V4L2_CTRL_TYPE_INTEGER64: |
| 1221 | printk(KERN_CONT "%lld", ctrl->cur.val64); | 1606 | printk(KERN_CONT "%lld", ctrl->cur.val64); |
| 1222 | break; | 1607 | break; |
| @@ -1277,26 +1662,21 @@ int v4l2_ctrl_handler_setup(struct v4l2_ctrl_handler *hdl) | |||
| 1277 | int i; | 1662 | int i; |
| 1278 | 1663 | ||
| 1279 | /* Skip if this control was already handled by a cluster. */ | 1664 | /* Skip if this control was already handled by a cluster. */ |
| 1280 | if (ctrl->done) | 1665 | /* Skip button controls and read-only controls. */ |
| 1666 | if (ctrl->done || ctrl->type == V4L2_CTRL_TYPE_BUTTON || | ||
| 1667 | (ctrl->flags & V4L2_CTRL_FLAG_READ_ONLY)) | ||
| 1281 | continue; | 1668 | continue; |
| 1282 | 1669 | ||
| 1283 | for (i = 0; i < master->ncontrols; i++) { | 1670 | for (i = 0; i < master->ncontrols; i++) { |
| 1284 | if (master->cluster[i]) { | 1671 | if (master->cluster[i]) { |
| 1285 | cur_to_new(master->cluster[i]); | 1672 | cur_to_new(master->cluster[i]); |
| 1286 | master->cluster[i]->is_new = 1; | 1673 | master->cluster[i]->is_new = 1; |
| 1674 | master->cluster[i]->done = true; | ||
| 1287 | } | 1675 | } |
| 1288 | } | 1676 | } |
| 1289 | 1677 | ret = call_op(master, s_ctrl); | |
| 1290 | /* Skip button controls and read-only controls. */ | ||
| 1291 | if (ctrl->type == V4L2_CTRL_TYPE_BUTTON || | ||
| 1292 | (ctrl->flags & V4L2_CTRL_FLAG_READ_ONLY)) | ||
| 1293 | continue; | ||
| 1294 | ret = master->ops->s_ctrl(master); | ||
| 1295 | if (ret) | 1678 | if (ret) |
| 1296 | break; | 1679 | break; |
| 1297 | for (i = 0; i < master->ncontrols; i++) | ||
| 1298 | if (master->cluster[i]) | ||
| 1299 | master->cluster[i]->done = true; | ||
| 1300 | } | 1680 | } |
| 1301 | mutex_unlock(&hdl->lock); | 1681 | mutex_unlock(&hdl->lock); |
| 1302 | return ret; | 1682 | return ret; |
| @@ -1447,18 +1827,19 @@ EXPORT_SYMBOL(v4l2_subdev_querymenu); | |||
| 1447 | Find the controls in the control array and do some basic checks. */ | 1827 | Find the controls in the control array and do some basic checks. */ |
| 1448 | static int prepare_ext_ctrls(struct v4l2_ctrl_handler *hdl, | 1828 | static int prepare_ext_ctrls(struct v4l2_ctrl_handler *hdl, |
| 1449 | struct v4l2_ext_controls *cs, | 1829 | struct v4l2_ext_controls *cs, |
| 1450 | struct ctrl_helper *helpers, | 1830 | struct v4l2_ctrl_helper *helpers) |
| 1451 | bool try) | ||
| 1452 | { | 1831 | { |
| 1832 | struct v4l2_ctrl_helper *h; | ||
| 1833 | bool have_clusters = false; | ||
| 1453 | u32 i; | 1834 | u32 i; |
| 1454 | 1835 | ||
| 1455 | for (i = 0; i < cs->count; i++) { | 1836 | for (i = 0, h = helpers; i < cs->count; i++, h++) { |
| 1456 | struct v4l2_ext_control *c = &cs->controls[i]; | 1837 | struct v4l2_ext_control *c = &cs->controls[i]; |
| 1838 | struct v4l2_ctrl_ref *ref; | ||
| 1457 | struct v4l2_ctrl *ctrl; | 1839 | struct v4l2_ctrl *ctrl; |
| 1458 | u32 id = c->id & V4L2_CTRL_ID_MASK; | 1840 | u32 id = c->id & V4L2_CTRL_ID_MASK; |
| 1459 | 1841 | ||
| 1460 | if (try) | 1842 | cs->error_idx = i; |
| 1461 | cs->error_idx = i; | ||
| 1462 | 1843 | ||
| 1463 | if (cs->ctrl_class && V4L2_CTRL_ID2CLASS(id) != cs->ctrl_class) | 1844 | if (cs->ctrl_class && V4L2_CTRL_ID2CLASS(id) != cs->ctrl_class) |
| 1464 | return -EINVAL; | 1845 | return -EINVAL; |
| @@ -1467,53 +1848,59 @@ static int prepare_ext_ctrls(struct v4l2_ctrl_handler *hdl, | |||
| 1467 | extended controls */ | 1848 | extended controls */ |
| 1468 | if (id >= V4L2_CID_PRIVATE_BASE) | 1849 | if (id >= V4L2_CID_PRIVATE_BASE) |
| 1469 | return -EINVAL; | 1850 | return -EINVAL; |
| 1470 | ctrl = v4l2_ctrl_find(hdl, id); | 1851 | ref = find_ref_lock(hdl, id); |
| 1471 | if (ctrl == NULL) | 1852 | if (ref == NULL) |
| 1472 | return -EINVAL; | 1853 | return -EINVAL; |
| 1854 | ctrl = ref->ctrl; | ||
| 1473 | if (ctrl->flags & V4L2_CTRL_FLAG_DISABLED) | 1855 | if (ctrl->flags & V4L2_CTRL_FLAG_DISABLED) |
| 1474 | return -EINVAL; | 1856 | return -EINVAL; |
| 1475 | 1857 | ||
| 1476 | helpers[i].ctrl = ctrl; | 1858 | if (ctrl->cluster[0]->ncontrols > 1) |
| 1477 | helpers[i].handled = false; | 1859 | have_clusters = true; |
| 1860 | if (ctrl->cluster[0] != ctrl) | ||
| 1861 | ref = find_ref_lock(hdl, ctrl->cluster[0]->id); | ||
| 1862 | /* Store the ref to the master control of the cluster */ | ||
| 1863 | h->mref = ref; | ||
| 1864 | h->ctrl = ctrl; | ||
| 1865 | /* Initially set next to 0, meaning that there is no other | ||
| 1866 | control in this helper array belonging to the same | ||
| 1867 | cluster */ | ||
| 1868 | h->next = 0; | ||
| 1478 | } | 1869 | } |
| 1479 | return 0; | ||
| 1480 | } | ||
| 1481 | 1870 | ||
| 1482 | typedef int (*cluster_func)(struct v4l2_ext_control *c, | 1871 | /* We are done if there were no controls that belong to a multi- |
| 1483 | struct v4l2_ctrl *ctrl); | 1872 | control cluster. */ |
| 1873 | if (!have_clusters) | ||
| 1874 | return 0; | ||
| 1484 | 1875 | ||
| 1485 | /* Walk over all controls in v4l2_ext_controls belonging to the same cluster | 1876 | /* The code below figures out in O(n) time which controls in the list |
| 1486 | and call the provided function. */ | 1877 | belong to the same cluster. */ |
| 1487 | static int cluster_walk(unsigned from, | ||
| 1488 | struct v4l2_ext_controls *cs, | ||
| 1489 | struct ctrl_helper *helpers, | ||
| 1490 | cluster_func f) | ||
| 1491 | { | ||
| 1492 | struct v4l2_ctrl **cluster = helpers[from].ctrl->cluster; | ||
| 1493 | int ret = 0; | ||
| 1494 | int i; | ||
| 1495 | 1878 | ||
| 1496 | /* Find any controls from the same cluster and call the function */ | 1879 | /* This has to be done with the handler lock taken. */ |
| 1497 | for (i = from; !ret && i < cs->count; i++) { | 1880 | mutex_lock(&hdl->lock); |
| 1498 | struct v4l2_ctrl *ctrl = helpers[i].ctrl; | ||
| 1499 | 1881 | ||
| 1500 | if (!helpers[i].handled && ctrl->cluster == cluster) | 1882 | /* First zero the helper field in the master control references */ |
| 1501 | ret = f(&cs->controls[i], ctrl); | 1883 | for (i = 0; i < cs->count; i++) |
| 1884 | helpers[i].mref->helper = 0; | ||
| 1885 | for (i = 0, h = helpers; i < cs->count; i++, h++) { | ||
| 1886 | struct v4l2_ctrl_ref *mref = h->mref; | ||
| 1887 | |||
| 1888 | /* If the mref->helper is set, then it points to an earlier | ||
| 1889 | helper that belongs to the same cluster. */ | ||
| 1890 | if (mref->helper) { | ||
| 1891 | /* Set the next field of mref->helper to the current | ||
| 1892 | index: this means that that earlier helper now | ||
| 1893 | points to the next helper in the same cluster. */ | ||
| 1894 | mref->helper->next = i; | ||
| 1895 | /* mref should be set only for the first helper in the | ||
| 1896 | cluster, clear the others. */ | ||
| 1897 | h->mref = NULL; | ||
| 1898 | } | ||
| 1899 | /* Point the mref helper to the current helper struct. */ | ||
| 1900 | mref->helper = h; | ||
| 1502 | } | 1901 | } |
| 1503 | return ret; | 1902 | mutex_unlock(&hdl->lock); |
| 1504 | } | 1903 | return 0; |
| 1505 | |||
| 1506 | static void cluster_done(unsigned from, | ||
| 1507 | struct v4l2_ext_controls *cs, | ||
| 1508 | struct ctrl_helper *helpers) | ||
| 1509 | { | ||
| 1510 | struct v4l2_ctrl **cluster = helpers[from].ctrl->cluster; | ||
| 1511 | int i; | ||
| 1512 | |||
| 1513 | /* Find any controls from the same cluster and mark them as handled */ | ||
| 1514 | for (i = from; i < cs->count; i++) | ||
| 1515 | if (helpers[i].ctrl->cluster == cluster) | ||
| 1516 | helpers[i].handled = true; | ||
| 1517 | } | 1904 | } |
| 1518 | 1905 | ||
| 1519 | /* Handles the corner case where cs->count == 0. It checks whether the | 1906 | /* Handles the corner case where cs->count == 0. It checks whether the |
| @@ -1531,10 +1918,10 @@ static int class_check(struct v4l2_ctrl_handler *hdl, u32 ctrl_class) | |||
| 1531 | /* Get extended controls. Allocates the helpers array if needed. */ | 1918 | /* Get extended controls. Allocates the helpers array if needed. */ |
| 1532 | int v4l2_g_ext_ctrls(struct v4l2_ctrl_handler *hdl, struct v4l2_ext_controls *cs) | 1919 | int v4l2_g_ext_ctrls(struct v4l2_ctrl_handler *hdl, struct v4l2_ext_controls *cs) |
| 1533 | { | 1920 | { |
| 1534 | struct ctrl_helper helper[4]; | 1921 | struct v4l2_ctrl_helper helper[4]; |
| 1535 | struct ctrl_helper *helpers = helper; | 1922 | struct v4l2_ctrl_helper *helpers = helper; |
| 1536 | int ret; | 1923 | int ret; |
| 1537 | int i; | 1924 | int i, j; |
| 1538 | 1925 | ||
| 1539 | cs->error_idx = cs->count; | 1926 | cs->error_idx = cs->count; |
| 1540 | cs->ctrl_class = V4L2_CTRL_ID2CLASS(cs->ctrl_class); | 1927 | cs->ctrl_class = V4L2_CTRL_ID2CLASS(cs->ctrl_class); |
| @@ -1551,30 +1938,46 @@ int v4l2_g_ext_ctrls(struct v4l2_ctrl_handler *hdl, struct v4l2_ext_controls *cs | |||
| 1551 | return -ENOMEM; | 1938 | return -ENOMEM; |
| 1552 | } | 1939 | } |
| 1553 | 1940 | ||
| 1554 | ret = prepare_ext_ctrls(hdl, cs, helpers, false); | 1941 | ret = prepare_ext_ctrls(hdl, cs, helpers); |
| 1942 | cs->error_idx = cs->count; | ||
| 1555 | 1943 | ||
| 1556 | for (i = 0; !ret && i < cs->count; i++) | 1944 | for (i = 0; !ret && i < cs->count; i++) |
| 1557 | if (helpers[i].ctrl->flags & V4L2_CTRL_FLAG_WRITE_ONLY) | 1945 | if (helpers[i].ctrl->flags & V4L2_CTRL_FLAG_WRITE_ONLY) |
| 1558 | ret = -EACCES; | 1946 | ret = -EACCES; |
| 1559 | 1947 | ||
| 1560 | for (i = 0; !ret && i < cs->count; i++) { | 1948 | for (i = 0; !ret && i < cs->count; i++) { |
| 1561 | struct v4l2_ctrl *ctrl = helpers[i].ctrl; | 1949 | int (*ctrl_to_user)(struct v4l2_ext_control *c, |
| 1562 | struct v4l2_ctrl *master = ctrl->cluster[0]; | 1950 | struct v4l2_ctrl *ctrl) = cur_to_user; |
| 1951 | struct v4l2_ctrl *master; | ||
| 1563 | 1952 | ||
| 1564 | if (helpers[i].handled) | 1953 | if (helpers[i].mref == NULL) |
| 1565 | continue; | 1954 | continue; |
| 1566 | 1955 | ||
| 1956 | master = helpers[i].mref->ctrl; | ||
| 1567 | cs->error_idx = i; | 1957 | cs->error_idx = i; |
| 1568 | 1958 | ||
| 1569 | v4l2_ctrl_lock(master); | 1959 | v4l2_ctrl_lock(master); |
| 1570 | /* g_volatile_ctrl will update the current control values */ | 1960 | |
| 1571 | if (ctrl->is_volatile && master->ops->g_volatile_ctrl) | 1961 | /* g_volatile_ctrl will update the new control values */ |
| 1572 | ret = master->ops->g_volatile_ctrl(master); | 1962 | if (has_op(master, g_volatile_ctrl) && !is_cur_manual(master)) { |
| 1573 | /* If OK, then copy the current control values to the caller */ | 1963 | for (j = 0; j < master->ncontrols; j++) |
| 1574 | if (!ret) | 1964 | cur_to_new(master->cluster[j]); |
| 1575 | ret = cluster_walk(i, cs, helpers, cur_to_user); | 1965 | ret = call_op(master, g_volatile_ctrl); |
| 1966 | ctrl_to_user = new_to_user; | ||
| 1967 | } | ||
| 1968 | /* If OK, then copy the current (for non-volatile controls) | ||
| 1969 | or the new (for volatile controls) control values to the | ||
| 1970 | caller */ | ||
| 1971 | if (!ret) { | ||
| 1972 | u32 idx = i; | ||
| 1973 | |||
| 1974 | do { | ||
| 1975 | ret = ctrl_to_user(cs->controls + idx, | ||
| 1976 | helpers[idx].ctrl); | ||
| 1977 | idx = helpers[idx].next; | ||
| 1978 | } while (!ret && idx); | ||
| 1979 | } | ||
| 1576 | v4l2_ctrl_unlock(master); | 1980 | v4l2_ctrl_unlock(master); |
| 1577 | cluster_done(i, cs, helpers); | ||
| 1578 | } | 1981 | } |
| 1579 | 1982 | ||
| 1580 | if (cs->count > ARRAY_SIZE(helper)) | 1983 | if (cs->count > ARRAY_SIZE(helper)) |
| @@ -1594,15 +1997,21 @@ static int get_ctrl(struct v4l2_ctrl *ctrl, s32 *val) | |||
| 1594 | { | 1997 | { |
| 1595 | struct v4l2_ctrl *master = ctrl->cluster[0]; | 1998 | struct v4l2_ctrl *master = ctrl->cluster[0]; |
| 1596 | int ret = 0; | 1999 | int ret = 0; |
| 2000 | int i; | ||
| 1597 | 2001 | ||
| 1598 | if (ctrl->flags & V4L2_CTRL_FLAG_WRITE_ONLY) | 2002 | if (ctrl->flags & V4L2_CTRL_FLAG_WRITE_ONLY) |
| 1599 | return -EACCES; | 2003 | return -EACCES; |
| 1600 | 2004 | ||
| 1601 | v4l2_ctrl_lock(master); | 2005 | v4l2_ctrl_lock(master); |
| 1602 | /* g_volatile_ctrl will update the current control values */ | 2006 | /* g_volatile_ctrl will update the current control values */ |
| 1603 | if (ctrl->is_volatile && master->ops->g_volatile_ctrl) | 2007 | if (ctrl->is_volatile && !is_cur_manual(master)) { |
| 1604 | ret = master->ops->g_volatile_ctrl(master); | 2008 | for (i = 0; i < master->ncontrols; i++) |
| 1605 | *val = ctrl->cur.val; | 2009 | cur_to_new(master->cluster[i]); |
| 2010 | ret = call_op(master, g_volatile_ctrl); | ||
| 2011 | *val = ctrl->val; | ||
| 2012 | } else { | ||
| 2013 | *val = ctrl->cur.val; | ||
| 2014 | } | ||
| 1606 | v4l2_ctrl_unlock(master); | 2015 | v4l2_ctrl_unlock(master); |
| 1607 | return ret; | 2016 | return ret; |
| 1608 | } | 2017 | } |
| @@ -1638,72 +2047,61 @@ EXPORT_SYMBOL(v4l2_ctrl_g_ctrl); | |||
| 1638 | /* Core function that calls try/s_ctrl and ensures that the new value is | 2047 | /* Core function that calls try/s_ctrl and ensures that the new value is |
| 1639 | copied to the current value on a set. | 2048 | copied to the current value on a set. |
| 1640 | Must be called with ctrl->handler->lock held. */ | 2049 | Must be called with ctrl->handler->lock held. */ |
| 1641 | static int try_or_set_control_cluster(struct v4l2_ctrl *master, bool set) | 2050 | static int try_or_set_cluster(struct v4l2_fh *fh, |
| 2051 | struct v4l2_ctrl *master, bool set) | ||
| 1642 | { | 2052 | { |
| 1643 | bool try = !set; | 2053 | bool update_flag; |
| 1644 | int ret = 0; | 2054 | int ret; |
| 1645 | int i; | 2055 | int i; |
| 1646 | 2056 | ||
| 1647 | /* Go through the cluster and either validate the new value or | 2057 | /* Go through the cluster and either validate the new value or |
| 1648 | (if no new value was set), copy the current value to the new | 2058 | (if no new value was set), copy the current value to the new |
| 1649 | value, ensuring a consistent view for the control ops when | 2059 | value, ensuring a consistent view for the control ops when |
| 1650 | called. */ | 2060 | called. */ |
| 1651 | for (i = 0; !ret && i < master->ncontrols; i++) { | 2061 | for (i = 0; i < master->ncontrols; i++) { |
| 1652 | struct v4l2_ctrl *ctrl = master->cluster[i]; | 2062 | struct v4l2_ctrl *ctrl = master->cluster[i]; |
| 1653 | 2063 | ||
| 1654 | if (ctrl == NULL) | 2064 | if (ctrl == NULL) |
| 1655 | continue; | 2065 | continue; |
| 1656 | 2066 | ||
| 1657 | if (ctrl->is_new) { | 2067 | if (!ctrl->is_new) { |
| 1658 | /* Double check this: it may have changed since the | 2068 | cur_to_new(ctrl); |
| 1659 | last check in try_or_set_ext_ctrls(). */ | ||
| 1660 | if (set && (ctrl->flags & V4L2_CTRL_FLAG_GRABBED)) | ||
| 1661 | return -EBUSY; | ||
| 1662 | |||
| 1663 | /* Validate if required */ | ||
| 1664 | if (!set) | ||
| 1665 | ret = validate_new(ctrl); | ||
| 1666 | continue; | 2069 | continue; |
| 1667 | } | 2070 | } |
| 1668 | /* No new value was set, so copy the current and force | 2071 | /* Check again: it may have changed since the |
| 1669 | a call to try_ctrl later, since the values for the cluster | 2072 | previous check in try_or_set_ext_ctrls(). */ |
| 1670 | may now have changed and the end result might be invalid. */ | 2073 | if (set && (ctrl->flags & V4L2_CTRL_FLAG_GRABBED)) |
| 1671 | try = true; | 2074 | return -EBUSY; |
| 1672 | cur_to_new(ctrl); | ||
| 1673 | } | 2075 | } |
| 1674 | 2076 | ||
| 1675 | /* For larger clusters you have to call try_ctrl again to | 2077 | ret = call_op(master, try_ctrl); |
| 1676 | verify that the controls are still valid after the | ||
| 1677 | 'cur_to_new' above. */ | ||
| 1678 | if (!ret && master->ops->try_ctrl && try) | ||
| 1679 | ret = master->ops->try_ctrl(master); | ||
| 1680 | 2078 | ||
| 1681 | /* Don't set if there is no change */ | 2079 | /* Don't set if there is no change */ |
| 1682 | if (!ret && set && cluster_changed(master)) { | 2080 | if (ret || !set || !cluster_changed(master)) |
| 1683 | ret = master->ops->s_ctrl(master); | 2081 | return ret; |
| 1684 | /* If OK, then make the new values permanent. */ | 2082 | ret = call_op(master, s_ctrl); |
| 1685 | if (!ret) | 2083 | if (ret) |
| 1686 | for (i = 0; i < master->ncontrols; i++) | 2084 | return ret; |
| 1687 | new_to_cur(master->cluster[i]); | 2085 | |
| 1688 | } | 2086 | /* If OK, then make the new values permanent. */ |
| 1689 | return ret; | 2087 | update_flag = is_cur_manual(master) != is_new_manual(master); |
| 2088 | for (i = 0; i < master->ncontrols; i++) | ||
| 2089 | new_to_cur(fh, master->cluster[i], update_flag && i > 0); | ||
| 2090 | return 0; | ||
| 1690 | } | 2091 | } |
| 1691 | 2092 | ||
| 1692 | /* Try or set controls. */ | 2093 | /* Validate controls. */ |
| 1693 | static int try_or_set_ext_ctrls(struct v4l2_ctrl_handler *hdl, | 2094 | static int validate_ctrls(struct v4l2_ext_controls *cs, |
| 1694 | struct v4l2_ext_controls *cs, | 2095 | struct v4l2_ctrl_helper *helpers, bool set) |
| 1695 | struct ctrl_helper *helpers, | ||
| 1696 | bool set) | ||
| 1697 | { | 2096 | { |
| 1698 | unsigned i, j; | 2097 | unsigned i; |
| 1699 | int ret = 0; | 2098 | int ret = 0; |
| 1700 | 2099 | ||
| 1701 | cs->error_idx = cs->count; | 2100 | cs->error_idx = cs->count; |
| 1702 | for (i = 0; i < cs->count; i++) { | 2101 | for (i = 0; i < cs->count; i++) { |
| 1703 | struct v4l2_ctrl *ctrl = helpers[i].ctrl; | 2102 | struct v4l2_ctrl *ctrl = helpers[i].ctrl; |
| 1704 | 2103 | ||
| 1705 | if (!set) | 2104 | cs->error_idx = i; |
| 1706 | cs->error_idx = i; | ||
| 1707 | 2105 | ||
| 1708 | if (ctrl->flags & V4L2_CTRL_FLAG_READ_ONLY) | 2106 | if (ctrl->flags & V4L2_CTRL_FLAG_READ_ONLY) |
| 1709 | return -EACCES; | 2107 | return -EACCES; |
| @@ -1715,50 +2113,22 @@ static int try_or_set_ext_ctrls(struct v4l2_ctrl_handler *hdl, | |||
| 1715 | best-effort to avoid that. */ | 2113 | best-effort to avoid that. */ |
| 1716 | if (set && (ctrl->flags & V4L2_CTRL_FLAG_GRABBED)) | 2114 | if (set && (ctrl->flags & V4L2_CTRL_FLAG_GRABBED)) |
| 1717 | return -EBUSY; | 2115 | return -EBUSY; |
| 2116 | ret = validate_new(ctrl, &cs->controls[i]); | ||
| 2117 | if (ret) | ||
| 2118 | return ret; | ||
| 1718 | } | 2119 | } |
| 1719 | 2120 | return 0; | |
| 1720 | for (i = 0; !ret && i < cs->count; i++) { | ||
| 1721 | struct v4l2_ctrl *ctrl = helpers[i].ctrl; | ||
| 1722 | struct v4l2_ctrl *master = ctrl->cluster[0]; | ||
| 1723 | |||
| 1724 | cs->error_idx = i; | ||
| 1725 | |||
| 1726 | if (helpers[i].handled) | ||
| 1727 | continue; | ||
| 1728 | |||
| 1729 | v4l2_ctrl_lock(ctrl); | ||
| 1730 | |||
| 1731 | /* Reset the 'is_new' flags of the cluster */ | ||
| 1732 | for (j = 0; j < master->ncontrols; j++) | ||
| 1733 | if (master->cluster[j]) | ||
| 1734 | master->cluster[j]->is_new = 0; | ||
| 1735 | |||
| 1736 | /* Copy the new caller-supplied control values. | ||
| 1737 | user_to_new() sets 'is_new' to 1. */ | ||
| 1738 | ret = cluster_walk(i, cs, helpers, user_to_new); | ||
| 1739 | |||
| 1740 | if (!ret) | ||
| 1741 | ret = try_or_set_control_cluster(master, set); | ||
| 1742 | |||
| 1743 | /* Copy the new values back to userspace. */ | ||
| 1744 | if (!ret) | ||
| 1745 | ret = cluster_walk(i, cs, helpers, new_to_user); | ||
| 1746 | |||
| 1747 | v4l2_ctrl_unlock(ctrl); | ||
| 1748 | cluster_done(i, cs, helpers); | ||
| 1749 | } | ||
| 1750 | return ret; | ||
| 1751 | } | 2121 | } |
| 1752 | 2122 | ||
| 1753 | /* Try or try-and-set controls */ | 2123 | /* Try or try-and-set controls */ |
| 1754 | static int try_set_ext_ctrls(struct v4l2_ctrl_handler *hdl, | 2124 | static int try_set_ext_ctrls(struct v4l2_fh *fh, struct v4l2_ctrl_handler *hdl, |
| 1755 | struct v4l2_ext_controls *cs, | 2125 | struct v4l2_ext_controls *cs, |
| 1756 | bool set) | 2126 | bool set) |
| 1757 | { | 2127 | { |
| 1758 | struct ctrl_helper helper[4]; | 2128 | struct v4l2_ctrl_helper helper[4]; |
| 1759 | struct ctrl_helper *helpers = helper; | 2129 | struct v4l2_ctrl_helper *helpers = helper; |
| 2130 | unsigned i, j; | ||
| 1760 | int ret; | 2131 | int ret; |
| 1761 | int i; | ||
| 1762 | 2132 | ||
| 1763 | cs->error_idx = cs->count; | 2133 | cs->error_idx = cs->count; |
| 1764 | cs->ctrl_class = V4L2_CTRL_ID2CLASS(cs->ctrl_class); | 2134 | cs->ctrl_class = V4L2_CTRL_ID2CLASS(cs->ctrl_class); |
| @@ -1774,25 +2144,49 @@ static int try_set_ext_ctrls(struct v4l2_ctrl_handler *hdl, | |||
| 1774 | if (!helpers) | 2144 | if (!helpers) |
| 1775 | return -ENOMEM; | 2145 | return -ENOMEM; |
| 1776 | } | 2146 | } |
| 1777 | ret = prepare_ext_ctrls(hdl, cs, helpers, !set); | 2147 | ret = prepare_ext_ctrls(hdl, cs, helpers); |
| 1778 | if (ret) | 2148 | if (!ret) |
| 1779 | goto free; | 2149 | ret = validate_ctrls(cs, helpers, set); |
| 1780 | 2150 | if (ret && set) | |
| 1781 | /* First 'try' all controls and abort on error */ | ||
| 1782 | ret = try_or_set_ext_ctrls(hdl, cs, helpers, false); | ||
| 1783 | /* If this is a 'set' operation and the initial 'try' failed, | ||
| 1784 | then set error_idx to count to tell the application that no | ||
| 1785 | controls changed value yet. */ | ||
| 1786 | if (set) | ||
| 1787 | cs->error_idx = cs->count; | 2151 | cs->error_idx = cs->count; |
| 1788 | if (!ret && set) { | 2152 | for (i = 0; !ret && i < cs->count; i++) { |
| 1789 | /* Reset 'handled' state */ | 2153 | struct v4l2_ctrl *master; |
| 1790 | for (i = 0; i < cs->count; i++) | 2154 | u32 idx = i; |
| 1791 | helpers[i].handled = false; | 2155 | |
| 1792 | ret = try_or_set_ext_ctrls(hdl, cs, helpers, true); | 2156 | if (helpers[i].mref == NULL) |
| 2157 | continue; | ||
| 2158 | |||
| 2159 | cs->error_idx = i; | ||
| 2160 | master = helpers[i].mref->ctrl; | ||
| 2161 | v4l2_ctrl_lock(master); | ||
| 2162 | |||
| 2163 | /* Reset the 'is_new' flags of the cluster */ | ||
| 2164 | for (j = 0; j < master->ncontrols; j++) | ||
| 2165 | if (master->cluster[j]) | ||
| 2166 | master->cluster[j]->is_new = 0; | ||
| 2167 | |||
| 2168 | /* Copy the new caller-supplied control values. | ||
| 2169 | user_to_new() sets 'is_new' to 1. */ | ||
| 2170 | do { | ||
| 2171 | ret = user_to_new(cs->controls + idx, helpers[idx].ctrl); | ||
| 2172 | idx = helpers[idx].next; | ||
| 2173 | } while (!ret && idx); | ||
| 2174 | |||
| 2175 | if (!ret) | ||
| 2176 | ret = try_or_set_cluster(fh, master, set); | ||
| 2177 | |||
| 2178 | /* Copy the new values back to userspace. */ | ||
| 2179 | if (!ret) { | ||
| 2180 | idx = i; | ||
| 2181 | do { | ||
| 2182 | ret = new_to_user(cs->controls + idx, | ||
| 2183 | helpers[idx].ctrl); | ||
| 2184 | idx = helpers[idx].next; | ||
| 2185 | } while (!ret && idx); | ||
| 2186 | } | ||
| 2187 | v4l2_ctrl_unlock(master); | ||
| 1793 | } | 2188 | } |
| 1794 | 2189 | ||
| 1795 | free: | ||
| 1796 | if (cs->count > ARRAY_SIZE(helper)) | 2190 | if (cs->count > ARRAY_SIZE(helper)) |
| 1797 | kfree(helpers); | 2191 | kfree(helpers); |
| 1798 | return ret; | 2192 | return ret; |
| @@ -1800,37 +2194,39 @@ free: | |||
| 1800 | 2194 | ||
| 1801 | int v4l2_try_ext_ctrls(struct v4l2_ctrl_handler *hdl, struct v4l2_ext_controls *cs) | 2195 | int v4l2_try_ext_ctrls(struct v4l2_ctrl_handler *hdl, struct v4l2_ext_controls *cs) |
| 1802 | { | 2196 | { |
| 1803 | return try_set_ext_ctrls(hdl, cs, false); | 2197 | return try_set_ext_ctrls(NULL, hdl, cs, false); |
| 1804 | } | 2198 | } |
| 1805 | EXPORT_SYMBOL(v4l2_try_ext_ctrls); | 2199 | EXPORT_SYMBOL(v4l2_try_ext_ctrls); |
| 1806 | 2200 | ||
| 1807 | int v4l2_s_ext_ctrls(struct v4l2_ctrl_handler *hdl, struct v4l2_ext_controls *cs) | 2201 | int v4l2_s_ext_ctrls(struct v4l2_fh *fh, struct v4l2_ctrl_handler *hdl, |
| 2202 | struct v4l2_ext_controls *cs) | ||
| 1808 | { | 2203 | { |
| 1809 | return try_set_ext_ctrls(hdl, cs, true); | 2204 | return try_set_ext_ctrls(fh, hdl, cs, true); |
| 1810 | } | 2205 | } |
| 1811 | EXPORT_SYMBOL(v4l2_s_ext_ctrls); | 2206 | EXPORT_SYMBOL(v4l2_s_ext_ctrls); |
| 1812 | 2207 | ||
| 1813 | int v4l2_subdev_try_ext_ctrls(struct v4l2_subdev *sd, struct v4l2_ext_controls *cs) | 2208 | int v4l2_subdev_try_ext_ctrls(struct v4l2_subdev *sd, struct v4l2_ext_controls *cs) |
| 1814 | { | 2209 | { |
| 1815 | return try_set_ext_ctrls(sd->ctrl_handler, cs, false); | 2210 | return try_set_ext_ctrls(NULL, sd->ctrl_handler, cs, false); |
| 1816 | } | 2211 | } |
| 1817 | EXPORT_SYMBOL(v4l2_subdev_try_ext_ctrls); | 2212 | EXPORT_SYMBOL(v4l2_subdev_try_ext_ctrls); |
| 1818 | 2213 | ||
| 1819 | int v4l2_subdev_s_ext_ctrls(struct v4l2_subdev *sd, struct v4l2_ext_controls *cs) | 2214 | int v4l2_subdev_s_ext_ctrls(struct v4l2_subdev *sd, struct v4l2_ext_controls *cs) |
| 1820 | { | 2215 | { |
| 1821 | return try_set_ext_ctrls(sd->ctrl_handler, cs, true); | 2216 | return try_set_ext_ctrls(NULL, sd->ctrl_handler, cs, true); |
| 1822 | } | 2217 | } |
| 1823 | EXPORT_SYMBOL(v4l2_subdev_s_ext_ctrls); | 2218 | EXPORT_SYMBOL(v4l2_subdev_s_ext_ctrls); |
| 1824 | 2219 | ||
| 1825 | /* Helper function for VIDIOC_S_CTRL compatibility */ | 2220 | /* Helper function for VIDIOC_S_CTRL compatibility */ |
| 1826 | static int set_ctrl(struct v4l2_ctrl *ctrl, s32 *val) | 2221 | static int set_ctrl(struct v4l2_fh *fh, struct v4l2_ctrl *ctrl, s32 *val) |
| 1827 | { | 2222 | { |
| 1828 | struct v4l2_ctrl *master = ctrl->cluster[0]; | 2223 | struct v4l2_ctrl *master = ctrl->cluster[0]; |
| 1829 | int ret; | 2224 | int ret; |
| 1830 | int i; | 2225 | int i; |
| 1831 | 2226 | ||
| 1832 | if (ctrl->flags & V4L2_CTRL_FLAG_READ_ONLY) | 2227 | ret = validate_new_int(ctrl, val); |
| 1833 | return -EACCES; | 2228 | if (ret) |
| 2229 | return ret; | ||
| 1834 | 2230 | ||
| 1835 | v4l2_ctrl_lock(ctrl); | 2231 | v4l2_ctrl_lock(ctrl); |
| 1836 | 2232 | ||
| @@ -1841,28 +2237,30 @@ static int set_ctrl(struct v4l2_ctrl *ctrl, s32 *val) | |||
| 1841 | 2237 | ||
| 1842 | ctrl->val = *val; | 2238 | ctrl->val = *val; |
| 1843 | ctrl->is_new = 1; | 2239 | ctrl->is_new = 1; |
| 1844 | ret = try_or_set_control_cluster(master, false); | 2240 | ret = try_or_set_cluster(fh, master, true); |
| 1845 | if (!ret) | ||
| 1846 | ret = try_or_set_control_cluster(master, true); | ||
| 1847 | *val = ctrl->cur.val; | 2241 | *val = ctrl->cur.val; |
| 1848 | v4l2_ctrl_unlock(ctrl); | 2242 | v4l2_ctrl_unlock(ctrl); |
| 1849 | return ret; | 2243 | return ret; |
| 1850 | } | 2244 | } |
| 1851 | 2245 | ||
| 1852 | int v4l2_s_ctrl(struct v4l2_ctrl_handler *hdl, struct v4l2_control *control) | 2246 | int v4l2_s_ctrl(struct v4l2_fh *fh, struct v4l2_ctrl_handler *hdl, |
| 2247 | struct v4l2_control *control) | ||
| 1853 | { | 2248 | { |
| 1854 | struct v4l2_ctrl *ctrl = v4l2_ctrl_find(hdl, control->id); | 2249 | struct v4l2_ctrl *ctrl = v4l2_ctrl_find(hdl, control->id); |
| 1855 | 2250 | ||
| 1856 | if (ctrl == NULL || !type_is_int(ctrl)) | 2251 | if (ctrl == NULL || !type_is_int(ctrl)) |
| 1857 | return -EINVAL; | 2252 | return -EINVAL; |
| 1858 | 2253 | ||
| 1859 | return set_ctrl(ctrl, &control->value); | 2254 | if (ctrl->flags & V4L2_CTRL_FLAG_READ_ONLY) |
| 2255 | return -EACCES; | ||
| 2256 | |||
| 2257 | return set_ctrl(fh, ctrl, &control->value); | ||
| 1860 | } | 2258 | } |
| 1861 | EXPORT_SYMBOL(v4l2_s_ctrl); | 2259 | EXPORT_SYMBOL(v4l2_s_ctrl); |
| 1862 | 2260 | ||
| 1863 | int v4l2_subdev_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *control) | 2261 | int v4l2_subdev_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *control) |
| 1864 | { | 2262 | { |
| 1865 | return v4l2_s_ctrl(sd->ctrl_handler, control); | 2263 | return v4l2_s_ctrl(NULL, sd->ctrl_handler, control); |
| 1866 | } | 2264 | } |
| 1867 | EXPORT_SYMBOL(v4l2_subdev_s_ctrl); | 2265 | EXPORT_SYMBOL(v4l2_subdev_s_ctrl); |
| 1868 | 2266 | ||
| @@ -1870,6 +2268,34 @@ int v4l2_ctrl_s_ctrl(struct v4l2_ctrl *ctrl, s32 val) | |||
| 1870 | { | 2268 | { |
| 1871 | /* It's a driver bug if this happens. */ | 2269 | /* It's a driver bug if this happens. */ |
| 1872 | WARN_ON(!type_is_int(ctrl)); | 2270 | WARN_ON(!type_is_int(ctrl)); |
| 1873 | return set_ctrl(ctrl, &val); | 2271 | return set_ctrl(NULL, ctrl, &val); |
| 1874 | } | 2272 | } |
| 1875 | EXPORT_SYMBOL(v4l2_ctrl_s_ctrl); | 2273 | EXPORT_SYMBOL(v4l2_ctrl_s_ctrl); |
| 2274 | |||
| 2275 | void v4l2_ctrl_add_event(struct v4l2_ctrl *ctrl, | ||
| 2276 | struct v4l2_subscribed_event *sev) | ||
| 2277 | { | ||
| 2278 | v4l2_ctrl_lock(ctrl); | ||
| 2279 | list_add_tail(&sev->node, &ctrl->ev_subs); | ||
| 2280 | if (ctrl->type != V4L2_CTRL_TYPE_CTRL_CLASS && | ||
| 2281 | (sev->flags & V4L2_EVENT_SUB_FL_SEND_INITIAL)) { | ||
| 2282 | struct v4l2_event ev; | ||
| 2283 | u32 changes = V4L2_EVENT_CTRL_CH_FLAGS; | ||
| 2284 | |||
| 2285 | if (!(ctrl->flags & V4L2_CTRL_FLAG_WRITE_ONLY)) | ||
| 2286 | changes |= V4L2_EVENT_CTRL_CH_VALUE; | ||
| 2287 | fill_event(&ev, ctrl, changes); | ||
| 2288 | v4l2_event_queue_fh(sev->fh, &ev); | ||
| 2289 | } | ||
| 2290 | v4l2_ctrl_unlock(ctrl); | ||
| 2291 | } | ||
| 2292 | EXPORT_SYMBOL(v4l2_ctrl_add_event); | ||
| 2293 | |||
| 2294 | void v4l2_ctrl_del_event(struct v4l2_ctrl *ctrl, | ||
| 2295 | struct v4l2_subscribed_event *sev) | ||
| 2296 | { | ||
| 2297 | v4l2_ctrl_lock(ctrl); | ||
| 2298 | list_del(&sev->node); | ||
| 2299 | v4l2_ctrl_unlock(ctrl); | ||
| 2300 | } | ||
| 2301 | EXPORT_SYMBOL(v4l2_ctrl_del_event); | ||
diff --git a/drivers/media/video/v4l2-device.c b/drivers/media/video/v4l2-device.c index 4aae501f02d0..c72856c41434 100644 --- a/drivers/media/video/v4l2-device.c +++ b/drivers/media/video/v4l2-device.c | |||
| @@ -209,6 +209,7 @@ int v4l2_device_register_subdev_nodes(struct v4l2_device *v4l2_dev) | |||
| 209 | vdev->v4l2_dev = v4l2_dev; | 209 | vdev->v4l2_dev = v4l2_dev; |
| 210 | vdev->fops = &v4l2_subdev_fops; | 210 | vdev->fops = &v4l2_subdev_fops; |
| 211 | vdev->release = video_device_release_empty; | 211 | vdev->release = video_device_release_empty; |
| 212 | vdev->ctrl_handler = sd->ctrl_handler; | ||
| 212 | err = __video_register_device(vdev, VFL_TYPE_SUBDEV, -1, 1, | 213 | err = __video_register_device(vdev, VFL_TYPE_SUBDEV, -1, 1, |
| 213 | sd->owner); | 214 | sd->owner); |
| 214 | if (err < 0) | 215 | if (err < 0) |
diff --git a/drivers/media/video/v4l2-event.c b/drivers/media/video/v4l2-event.c index 69fd343d4774..53b190cf225e 100644 --- a/drivers/media/video/v4l2-event.c +++ b/drivers/media/video/v4l2-event.c | |||
| @@ -25,100 +25,39 @@ | |||
| 25 | #include <media/v4l2-dev.h> | 25 | #include <media/v4l2-dev.h> |
| 26 | #include <media/v4l2-fh.h> | 26 | #include <media/v4l2-fh.h> |
| 27 | #include <media/v4l2-event.h> | 27 | #include <media/v4l2-event.h> |
| 28 | #include <media/v4l2-ctrls.h> | ||
| 28 | 29 | ||
| 29 | #include <linux/sched.h> | 30 | #include <linux/sched.h> |
| 30 | #include <linux/slab.h> | 31 | #include <linux/slab.h> |
| 31 | 32 | ||
| 32 | int v4l2_event_init(struct v4l2_fh *fh) | 33 | static unsigned sev_pos(const struct v4l2_subscribed_event *sev, unsigned idx) |
| 33 | { | 34 | { |
| 34 | fh->events = kzalloc(sizeof(*fh->events), GFP_KERNEL); | 35 | idx += sev->first; |
| 35 | if (fh->events == NULL) | 36 | return idx >= sev->elems ? idx - sev->elems : idx; |
| 36 | return -ENOMEM; | ||
| 37 | |||
| 38 | init_waitqueue_head(&fh->events->wait); | ||
| 39 | |||
| 40 | INIT_LIST_HEAD(&fh->events->free); | ||
| 41 | INIT_LIST_HEAD(&fh->events->available); | ||
| 42 | INIT_LIST_HEAD(&fh->events->subscribed); | ||
| 43 | |||
| 44 | fh->events->sequence = -1; | ||
| 45 | |||
| 46 | return 0; | ||
| 47 | } | ||
| 48 | EXPORT_SYMBOL_GPL(v4l2_event_init); | ||
| 49 | |||
| 50 | int v4l2_event_alloc(struct v4l2_fh *fh, unsigned int n) | ||
| 51 | { | ||
| 52 | struct v4l2_events *events = fh->events; | ||
| 53 | unsigned long flags; | ||
| 54 | |||
| 55 | if (!events) { | ||
| 56 | WARN_ON(1); | ||
| 57 | return -ENOMEM; | ||
| 58 | } | ||
| 59 | |||
| 60 | while (events->nallocated < n) { | ||
| 61 | struct v4l2_kevent *kev; | ||
| 62 | |||
| 63 | kev = kzalloc(sizeof(*kev), GFP_KERNEL); | ||
| 64 | if (kev == NULL) | ||
| 65 | return -ENOMEM; | ||
| 66 | |||
| 67 | spin_lock_irqsave(&fh->vdev->fh_lock, flags); | ||
| 68 | list_add_tail(&kev->list, &events->free); | ||
| 69 | events->nallocated++; | ||
| 70 | spin_unlock_irqrestore(&fh->vdev->fh_lock, flags); | ||
| 71 | } | ||
| 72 | |||
| 73 | return 0; | ||
| 74 | } | ||
| 75 | EXPORT_SYMBOL_GPL(v4l2_event_alloc); | ||
| 76 | |||
| 77 | #define list_kfree(list, type, member) \ | ||
| 78 | while (!list_empty(list)) { \ | ||
| 79 | type *hi; \ | ||
| 80 | hi = list_first_entry(list, type, member); \ | ||
| 81 | list_del(&hi->member); \ | ||
| 82 | kfree(hi); \ | ||
| 83 | } | ||
| 84 | |||
| 85 | void v4l2_event_free(struct v4l2_fh *fh) | ||
| 86 | { | ||
| 87 | struct v4l2_events *events = fh->events; | ||
| 88 | |||
| 89 | if (!events) | ||
| 90 | return; | ||
| 91 | |||
| 92 | list_kfree(&events->free, struct v4l2_kevent, list); | ||
| 93 | list_kfree(&events->available, struct v4l2_kevent, list); | ||
| 94 | list_kfree(&events->subscribed, struct v4l2_subscribed_event, list); | ||
| 95 | |||
| 96 | kfree(events); | ||
| 97 | fh->events = NULL; | ||
| 98 | } | 37 | } |
| 99 | EXPORT_SYMBOL_GPL(v4l2_event_free); | ||
| 100 | 38 | ||
| 101 | static int __v4l2_event_dequeue(struct v4l2_fh *fh, struct v4l2_event *event) | 39 | static int __v4l2_event_dequeue(struct v4l2_fh *fh, struct v4l2_event *event) |
| 102 | { | 40 | { |
| 103 | struct v4l2_events *events = fh->events; | ||
| 104 | struct v4l2_kevent *kev; | 41 | struct v4l2_kevent *kev; |
| 105 | unsigned long flags; | 42 | unsigned long flags; |
| 106 | 43 | ||
| 107 | spin_lock_irqsave(&fh->vdev->fh_lock, flags); | 44 | spin_lock_irqsave(&fh->vdev->fh_lock, flags); |
| 108 | 45 | ||
| 109 | if (list_empty(&events->available)) { | 46 | if (list_empty(&fh->available)) { |
| 110 | spin_unlock_irqrestore(&fh->vdev->fh_lock, flags); | 47 | spin_unlock_irqrestore(&fh->vdev->fh_lock, flags); |
| 111 | return -ENOENT; | 48 | return -ENOENT; |
| 112 | } | 49 | } |
| 113 | 50 | ||
| 114 | WARN_ON(events->navailable == 0); | 51 | WARN_ON(fh->navailable == 0); |
| 115 | 52 | ||
| 116 | kev = list_first_entry(&events->available, struct v4l2_kevent, list); | 53 | kev = list_first_entry(&fh->available, struct v4l2_kevent, list); |
| 117 | list_move(&kev->list, &events->free); | 54 | list_del(&kev->list); |
| 118 | events->navailable--; | 55 | fh->navailable--; |
| 119 | 56 | ||
| 120 | kev->event.pending = events->navailable; | 57 | kev->event.pending = fh->navailable; |
| 121 | *event = kev->event; | 58 | *event = kev->event; |
| 59 | kev->sev->first = sev_pos(kev->sev, 1); | ||
| 60 | kev->sev->in_use--; | ||
| 122 | 61 | ||
| 123 | spin_unlock_irqrestore(&fh->vdev->fh_lock, flags); | 62 | spin_unlock_irqrestore(&fh->vdev->fh_lock, flags); |
| 124 | 63 | ||
| @@ -128,7 +67,6 @@ static int __v4l2_event_dequeue(struct v4l2_fh *fh, struct v4l2_event *event) | |||
| 128 | int v4l2_event_dequeue(struct v4l2_fh *fh, struct v4l2_event *event, | 67 | int v4l2_event_dequeue(struct v4l2_fh *fh, struct v4l2_event *event, |
| 129 | int nonblocking) | 68 | int nonblocking) |
| 130 | { | 69 | { |
| 131 | struct v4l2_events *events = fh->events; | ||
| 132 | int ret; | 70 | int ret; |
| 133 | 71 | ||
| 134 | if (nonblocking) | 72 | if (nonblocking) |
| @@ -139,8 +77,8 @@ int v4l2_event_dequeue(struct v4l2_fh *fh, struct v4l2_event *event, | |||
| 139 | mutex_unlock(fh->vdev->lock); | 77 | mutex_unlock(fh->vdev->lock); |
| 140 | 78 | ||
| 141 | do { | 79 | do { |
| 142 | ret = wait_event_interruptible(events->wait, | 80 | ret = wait_event_interruptible(fh->wait, |
| 143 | events->navailable != 0); | 81 | fh->navailable != 0); |
| 144 | if (ret < 0) | 82 | if (ret < 0) |
| 145 | break; | 83 | break; |
| 146 | 84 | ||
| @@ -154,23 +92,72 @@ int v4l2_event_dequeue(struct v4l2_fh *fh, struct v4l2_event *event, | |||
| 154 | } | 92 | } |
| 155 | EXPORT_SYMBOL_GPL(v4l2_event_dequeue); | 93 | EXPORT_SYMBOL_GPL(v4l2_event_dequeue); |
| 156 | 94 | ||
| 157 | /* Caller must hold fh->event->lock! */ | 95 | /* Caller must hold fh->vdev->fh_lock! */ |
| 158 | static struct v4l2_subscribed_event *v4l2_event_subscribed( | 96 | static struct v4l2_subscribed_event *v4l2_event_subscribed( |
| 159 | struct v4l2_fh *fh, u32 type) | 97 | struct v4l2_fh *fh, u32 type, u32 id) |
| 160 | { | 98 | { |
| 161 | struct v4l2_events *events = fh->events; | ||
| 162 | struct v4l2_subscribed_event *sev; | 99 | struct v4l2_subscribed_event *sev; |
| 163 | 100 | ||
| 164 | assert_spin_locked(&fh->vdev->fh_lock); | 101 | assert_spin_locked(&fh->vdev->fh_lock); |
| 165 | 102 | ||
| 166 | list_for_each_entry(sev, &events->subscribed, list) { | 103 | list_for_each_entry(sev, &fh->subscribed, list) |
| 167 | if (sev->type == type) | 104 | if (sev->type == type && sev->id == id) |
| 168 | return sev; | 105 | return sev; |
| 169 | } | ||
| 170 | 106 | ||
| 171 | return NULL; | 107 | return NULL; |
| 172 | } | 108 | } |
| 173 | 109 | ||
| 110 | static void __v4l2_event_queue_fh(struct v4l2_fh *fh, const struct v4l2_event *ev, | ||
| 111 | const struct timespec *ts) | ||
| 112 | { | ||
| 113 | struct v4l2_subscribed_event *sev; | ||
| 114 | struct v4l2_kevent *kev; | ||
| 115 | bool copy_payload = true; | ||
| 116 | |||
| 117 | /* Are we subscribed? */ | ||
| 118 | sev = v4l2_event_subscribed(fh, ev->type, ev->id); | ||
| 119 | if (sev == NULL) | ||
| 120 | return; | ||
| 121 | |||
| 122 | /* Increase event sequence number on fh. */ | ||
| 123 | fh->sequence++; | ||
| 124 | |||
| 125 | /* Do we have any free events? */ | ||
| 126 | if (sev->in_use == sev->elems) { | ||
| 127 | /* no, remove the oldest one */ | ||
| 128 | kev = sev->events + sev_pos(sev, 0); | ||
| 129 | list_del(&kev->list); | ||
| 130 | sev->in_use--; | ||
| 131 | sev->first = sev_pos(sev, 1); | ||
| 132 | fh->navailable--; | ||
| 133 | if (sev->elems == 1) { | ||
| 134 | if (sev->replace) { | ||
| 135 | sev->replace(&kev->event, ev); | ||
| 136 | copy_payload = false; | ||
| 137 | } | ||
| 138 | } else if (sev->merge) { | ||
| 139 | struct v4l2_kevent *second_oldest = | ||
| 140 | sev->events + sev_pos(sev, 0); | ||
| 141 | sev->merge(&kev->event, &second_oldest->event); | ||
| 142 | } | ||
| 143 | } | ||
| 144 | |||
| 145 | /* Take one and fill it. */ | ||
| 146 | kev = sev->events + sev_pos(sev, sev->in_use); | ||
| 147 | kev->event.type = ev->type; | ||
| 148 | if (copy_payload) | ||
| 149 | kev->event.u = ev->u; | ||
| 150 | kev->event.id = ev->id; | ||
| 151 | kev->event.timestamp = *ts; | ||
| 152 | kev->event.sequence = fh->sequence; | ||
| 153 | sev->in_use++; | ||
| 154 | list_add_tail(&kev->list, &fh->available); | ||
| 155 | |||
| 156 | fh->navailable++; | ||
| 157 | |||
| 158 | wake_up_all(&fh->wait); | ||
| 159 | } | ||
| 160 | |||
| 174 | void v4l2_event_queue(struct video_device *vdev, const struct v4l2_event *ev) | 161 | void v4l2_event_queue(struct video_device *vdev, const struct v4l2_event *ev) |
| 175 | { | 162 | { |
| 176 | struct v4l2_fh *fh; | 163 | struct v4l2_fh *fh; |
| @@ -181,81 +168,95 @@ void v4l2_event_queue(struct video_device *vdev, const struct v4l2_event *ev) | |||
| 181 | 168 | ||
| 182 | spin_lock_irqsave(&vdev->fh_lock, flags); | 169 | spin_lock_irqsave(&vdev->fh_lock, flags); |
| 183 | 170 | ||
| 184 | list_for_each_entry(fh, &vdev->fh_list, list) { | 171 | list_for_each_entry(fh, &vdev->fh_list, list) |
| 185 | struct v4l2_events *events = fh->events; | 172 | __v4l2_event_queue_fh(fh, ev, ×tamp); |
| 186 | struct v4l2_kevent *kev; | ||
| 187 | 173 | ||
| 188 | /* Are we subscribed? */ | 174 | spin_unlock_irqrestore(&vdev->fh_lock, flags); |
| 189 | if (!v4l2_event_subscribed(fh, ev->type)) | 175 | } |
| 190 | continue; | 176 | EXPORT_SYMBOL_GPL(v4l2_event_queue); |
| 191 | 177 | ||
| 192 | /* Increase event sequence number on fh. */ | 178 | void v4l2_event_queue_fh(struct v4l2_fh *fh, const struct v4l2_event *ev) |
| 193 | events->sequence++; | 179 | { |
| 180 | unsigned long flags; | ||
| 181 | struct timespec timestamp; | ||
| 194 | 182 | ||
| 195 | /* Do we have any free events? */ | 183 | ktime_get_ts(×tamp); |
| 196 | if (list_empty(&events->free)) | ||
| 197 | continue; | ||
| 198 | 184 | ||
| 199 | /* Take one and fill it. */ | 185 | spin_lock_irqsave(&fh->vdev->fh_lock, flags); |
| 200 | kev = list_first_entry(&events->free, struct v4l2_kevent, list); | 186 | __v4l2_event_queue_fh(fh, ev, ×tamp); |
| 201 | kev->event.type = ev->type; | 187 | spin_unlock_irqrestore(&fh->vdev->fh_lock, flags); |
| 202 | kev->event.u = ev->u; | 188 | } |
| 203 | kev->event.timestamp = timestamp; | 189 | EXPORT_SYMBOL_GPL(v4l2_event_queue_fh); |
| 204 | kev->event.sequence = events->sequence; | ||
| 205 | list_move_tail(&kev->list, &events->available); | ||
| 206 | 190 | ||
| 207 | events->navailable++; | 191 | int v4l2_event_pending(struct v4l2_fh *fh) |
| 192 | { | ||
| 193 | return fh->navailable; | ||
| 194 | } | ||
| 195 | EXPORT_SYMBOL_GPL(v4l2_event_pending); | ||
| 208 | 196 | ||
| 209 | wake_up_all(&events->wait); | 197 | static void ctrls_replace(struct v4l2_event *old, const struct v4l2_event *new) |
| 210 | } | 198 | { |
| 199 | u32 old_changes = old->u.ctrl.changes; | ||
| 211 | 200 | ||
| 212 | spin_unlock_irqrestore(&vdev->fh_lock, flags); | 201 | old->u.ctrl = new->u.ctrl; |
| 202 | old->u.ctrl.changes |= old_changes; | ||
| 213 | } | 203 | } |
| 214 | EXPORT_SYMBOL_GPL(v4l2_event_queue); | ||
| 215 | 204 | ||
| 216 | int v4l2_event_pending(struct v4l2_fh *fh) | 205 | static void ctrls_merge(const struct v4l2_event *old, struct v4l2_event *new) |
| 217 | { | 206 | { |
| 218 | return fh->events->navailable; | 207 | new->u.ctrl.changes |= old->u.ctrl.changes; |
| 219 | } | 208 | } |
| 220 | EXPORT_SYMBOL_GPL(v4l2_event_pending); | ||
| 221 | 209 | ||
| 222 | int v4l2_event_subscribe(struct v4l2_fh *fh, | 210 | int v4l2_event_subscribe(struct v4l2_fh *fh, |
| 223 | struct v4l2_event_subscription *sub) | 211 | struct v4l2_event_subscription *sub, unsigned elems) |
| 224 | { | 212 | { |
| 225 | struct v4l2_events *events = fh->events; | 213 | struct v4l2_subscribed_event *sev, *found_ev; |
| 226 | struct v4l2_subscribed_event *sev; | 214 | struct v4l2_ctrl *ctrl = NULL; |
| 227 | unsigned long flags; | 215 | unsigned long flags; |
| 228 | 216 | unsigned i; | |
| 229 | if (fh->events == NULL) { | 217 | |
| 230 | WARN_ON(1); | 218 | if (elems < 1) |
| 231 | return -ENOMEM; | 219 | elems = 1; |
| 220 | if (sub->type == V4L2_EVENT_CTRL) { | ||
| 221 | ctrl = v4l2_ctrl_find(fh->ctrl_handler, sub->id); | ||
| 222 | if (ctrl == NULL) | ||
| 223 | return -EINVAL; | ||
| 232 | } | 224 | } |
| 233 | 225 | ||
| 234 | sev = kmalloc(sizeof(*sev), GFP_KERNEL); | 226 | sev = kzalloc(sizeof(*sev) + sizeof(struct v4l2_kevent) * elems, GFP_KERNEL); |
| 235 | if (!sev) | 227 | if (!sev) |
| 236 | return -ENOMEM; | 228 | return -ENOMEM; |
| 237 | 229 | for (i = 0; i < elems; i++) | |
| 238 | spin_lock_irqsave(&fh->vdev->fh_lock, flags); | 230 | sev->events[i].sev = sev; |
| 239 | 231 | sev->type = sub->type; | |
| 240 | if (v4l2_event_subscribed(fh, sub->type) == NULL) { | 232 | sev->id = sub->id; |
| 241 | INIT_LIST_HEAD(&sev->list); | 233 | sev->flags = sub->flags; |
| 242 | sev->type = sub->type; | 234 | sev->fh = fh; |
| 243 | 235 | sev->elems = elems; | |
| 244 | list_add(&sev->list, &events->subscribed); | 236 | if (ctrl) { |
| 245 | sev = NULL; | 237 | sev->replace = ctrls_replace; |
| 238 | sev->merge = ctrls_merge; | ||
| 246 | } | 239 | } |
| 247 | 240 | ||
| 241 | spin_lock_irqsave(&fh->vdev->fh_lock, flags); | ||
| 242 | found_ev = v4l2_event_subscribed(fh, sub->type, sub->id); | ||
| 243 | if (!found_ev) | ||
| 244 | list_add(&sev->list, &fh->subscribed); | ||
| 248 | spin_unlock_irqrestore(&fh->vdev->fh_lock, flags); | 245 | spin_unlock_irqrestore(&fh->vdev->fh_lock, flags); |
| 249 | 246 | ||
| 250 | kfree(sev); | 247 | /* v4l2_ctrl_add_event uses a mutex, so do this outside the spin lock */ |
| 248 | if (found_ev) | ||
| 249 | kfree(sev); | ||
| 250 | else if (ctrl) | ||
| 251 | v4l2_ctrl_add_event(ctrl, sev); | ||
| 251 | 252 | ||
| 252 | return 0; | 253 | return 0; |
| 253 | } | 254 | } |
| 254 | EXPORT_SYMBOL_GPL(v4l2_event_subscribe); | 255 | EXPORT_SYMBOL_GPL(v4l2_event_subscribe); |
| 255 | 256 | ||
| 256 | static void v4l2_event_unsubscribe_all(struct v4l2_fh *fh) | 257 | void v4l2_event_unsubscribe_all(struct v4l2_fh *fh) |
| 257 | { | 258 | { |
| 258 | struct v4l2_events *events = fh->events; | 259 | struct v4l2_event_subscription sub; |
| 259 | struct v4l2_subscribed_event *sev; | 260 | struct v4l2_subscribed_event *sev; |
| 260 | unsigned long flags; | 261 | unsigned long flags; |
| 261 | 262 | ||
| @@ -263,15 +264,18 @@ static void v4l2_event_unsubscribe_all(struct v4l2_fh *fh) | |||
| 263 | sev = NULL; | 264 | sev = NULL; |
| 264 | 265 | ||
| 265 | spin_lock_irqsave(&fh->vdev->fh_lock, flags); | 266 | spin_lock_irqsave(&fh->vdev->fh_lock, flags); |
| 266 | if (!list_empty(&events->subscribed)) { | 267 | if (!list_empty(&fh->subscribed)) { |
| 267 | sev = list_first_entry(&events->subscribed, | 268 | sev = list_first_entry(&fh->subscribed, |
| 268 | struct v4l2_subscribed_event, list); | 269 | struct v4l2_subscribed_event, list); |
| 269 | list_del(&sev->list); | 270 | sub.type = sev->type; |
| 271 | sub.id = sev->id; | ||
| 270 | } | 272 | } |
| 271 | spin_unlock_irqrestore(&fh->vdev->fh_lock, flags); | 273 | spin_unlock_irqrestore(&fh->vdev->fh_lock, flags); |
| 272 | kfree(sev); | 274 | if (sev) |
| 275 | v4l2_event_unsubscribe(fh, &sub); | ||
| 273 | } while (sev); | 276 | } while (sev); |
| 274 | } | 277 | } |
| 278 | EXPORT_SYMBOL_GPL(v4l2_event_unsubscribe_all); | ||
| 275 | 279 | ||
| 276 | int v4l2_event_unsubscribe(struct v4l2_fh *fh, | 280 | int v4l2_event_unsubscribe(struct v4l2_fh *fh, |
| 277 | struct v4l2_event_subscription *sub) | 281 | struct v4l2_event_subscription *sub) |
| @@ -286,11 +290,19 @@ int v4l2_event_unsubscribe(struct v4l2_fh *fh, | |||
| 286 | 290 | ||
| 287 | spin_lock_irqsave(&fh->vdev->fh_lock, flags); | 291 | spin_lock_irqsave(&fh->vdev->fh_lock, flags); |
| 288 | 292 | ||
| 289 | sev = v4l2_event_subscribed(fh, sub->type); | 293 | sev = v4l2_event_subscribed(fh, sub->type, sub->id); |
| 290 | if (sev != NULL) | 294 | if (sev != NULL) { |
| 291 | list_del(&sev->list); | 295 | list_del(&sev->list); |
| 296 | sev->fh = NULL; | ||
| 297 | } | ||
| 292 | 298 | ||
| 293 | spin_unlock_irqrestore(&fh->vdev->fh_lock, flags); | 299 | spin_unlock_irqrestore(&fh->vdev->fh_lock, flags); |
| 300 | if (sev && sev->type == V4L2_EVENT_CTRL) { | ||
| 301 | struct v4l2_ctrl *ctrl = v4l2_ctrl_find(fh->ctrl_handler, sev->id); | ||
| 302 | |||
| 303 | if (ctrl) | ||
| 304 | v4l2_ctrl_del_event(ctrl, sev); | ||
| 305 | } | ||
| 294 | 306 | ||
| 295 | kfree(sev); | 307 | kfree(sev); |
| 296 | 308 | ||
diff --git a/drivers/media/video/v4l2-fh.c b/drivers/media/video/v4l2-fh.c index 717f71e6370e..122822d2b8b2 100644 --- a/drivers/media/video/v4l2-fh.c +++ b/drivers/media/video/v4l2-fh.c | |||
| @@ -29,23 +29,18 @@ | |||
| 29 | #include <media/v4l2-event.h> | 29 | #include <media/v4l2-event.h> |
| 30 | #include <media/v4l2-ioctl.h> | 30 | #include <media/v4l2-ioctl.h> |
| 31 | 31 | ||
| 32 | int v4l2_fh_init(struct v4l2_fh *fh, struct video_device *vdev) | 32 | void v4l2_fh_init(struct v4l2_fh *fh, struct video_device *vdev) |
| 33 | { | 33 | { |
| 34 | fh->vdev = vdev; | 34 | fh->vdev = vdev; |
| 35 | /* Inherit from video_device. May be overridden by the driver. */ | ||
| 36 | fh->ctrl_handler = vdev->ctrl_handler; | ||
| 35 | INIT_LIST_HEAD(&fh->list); | 37 | INIT_LIST_HEAD(&fh->list); |
| 36 | set_bit(V4L2_FL_USES_V4L2_FH, &fh->vdev->flags); | 38 | set_bit(V4L2_FL_USES_V4L2_FH, &fh->vdev->flags); |
| 37 | fh->prio = V4L2_PRIORITY_UNSET; | 39 | fh->prio = V4L2_PRIORITY_UNSET; |
| 38 | 40 | init_waitqueue_head(&fh->wait); | |
| 39 | /* | 41 | INIT_LIST_HEAD(&fh->available); |
| 40 | * fh->events only needs to be initialized if the driver | 42 | INIT_LIST_HEAD(&fh->subscribed); |
| 41 | * supports the VIDIOC_SUBSCRIBE_EVENT ioctl. | 43 | fh->sequence = -1; |
| 42 | */ | ||
| 43 | if (vdev->ioctl_ops && vdev->ioctl_ops->vidioc_subscribe_event) | ||
| 44 | return v4l2_event_init(fh); | ||
| 45 | |||
| 46 | fh->events = NULL; | ||
| 47 | |||
| 48 | return 0; | ||
| 49 | } | 44 | } |
| 50 | EXPORT_SYMBOL_GPL(v4l2_fh_init); | 45 | EXPORT_SYMBOL_GPL(v4l2_fh_init); |
| 51 | 46 | ||
| @@ -91,10 +86,8 @@ void v4l2_fh_exit(struct v4l2_fh *fh) | |||
| 91 | { | 86 | { |
| 92 | if (fh->vdev == NULL) | 87 | if (fh->vdev == NULL) |
| 93 | return; | 88 | return; |
| 94 | 89 | v4l2_event_unsubscribe_all(fh); | |
| 95 | fh->vdev = NULL; | 90 | fh->vdev = NULL; |
| 96 | |||
| 97 | v4l2_event_free(fh); | ||
| 98 | } | 91 | } |
| 99 | EXPORT_SYMBOL_GPL(v4l2_fh_exit); | 92 | EXPORT_SYMBOL_GPL(v4l2_fh_exit); |
| 100 | 93 | ||
diff --git a/drivers/media/video/v4l2-ioctl.c b/drivers/media/video/v4l2-ioctl.c index 69e8c6ffcc49..002ce1363443 100644 --- a/drivers/media/video/v4l2-ioctl.c +++ b/drivers/media/video/v4l2-ioctl.c | |||
| @@ -16,6 +16,7 @@ | |||
| 16 | #include <linux/slab.h> | 16 | #include <linux/slab.h> |
| 17 | #include <linux/types.h> | 17 | #include <linux/types.h> |
| 18 | #include <linux/kernel.h> | 18 | #include <linux/kernel.h> |
| 19 | #include <linux/version.h> | ||
| 19 | 20 | ||
| 20 | #include <linux/videodev2.h> | 21 | #include <linux/videodev2.h> |
| 21 | 22 | ||
| @@ -542,12 +543,12 @@ static long __video_do_ioctl(struct file *file, | |||
| 542 | struct v4l2_fh *vfh = NULL; | 543 | struct v4l2_fh *vfh = NULL; |
| 543 | struct v4l2_format f_copy; | 544 | struct v4l2_format f_copy; |
| 544 | int use_fh_prio = 0; | 545 | int use_fh_prio = 0; |
| 545 | long ret = -EINVAL; | 546 | long ret = -ENOTTY; |
| 546 | 547 | ||
| 547 | if (ops == NULL) { | 548 | if (ops == NULL) { |
| 548 | printk(KERN_WARNING "videodev: \"%s\" has no ioctl_ops.\n", | 549 | printk(KERN_WARNING "videodev: \"%s\" has no ioctl_ops.\n", |
| 549 | vfd->name); | 550 | vfd->name); |
| 550 | return -EINVAL; | 551 | return ret; |
| 551 | } | 552 | } |
| 552 | 553 | ||
| 553 | if ((vfd->debug & V4L2_DEBUG_IOCTL) && | 554 | if ((vfd->debug & V4L2_DEBUG_IOCTL) && |
| @@ -605,6 +606,7 @@ static long __video_do_ioctl(struct file *file, | |||
| 605 | if (!ops->vidioc_querycap) | 606 | if (!ops->vidioc_querycap) |
| 606 | break; | 607 | break; |
| 607 | 608 | ||
| 609 | cap->version = LINUX_VERSION_CODE; | ||
| 608 | ret = ops->vidioc_querycap(file, fh, cap); | 610 | ret = ops->vidioc_querycap(file, fh, cap); |
| 609 | if (!ret) | 611 | if (!ret) |
| 610 | dbgarg(cmd, "driver=%s, card=%s, bus=%s, " | 612 | dbgarg(cmd, "driver=%s, card=%s, bus=%s, " |
| @@ -1418,7 +1420,9 @@ static long __video_do_ioctl(struct file *file, | |||
| 1418 | { | 1420 | { |
| 1419 | struct v4l2_queryctrl *p = arg; | 1421 | struct v4l2_queryctrl *p = arg; |
| 1420 | 1422 | ||
| 1421 | if (vfd->ctrl_handler) | 1423 | if (vfh && vfh->ctrl_handler) |
| 1424 | ret = v4l2_queryctrl(vfh->ctrl_handler, p); | ||
| 1425 | else if (vfd->ctrl_handler) | ||
| 1422 | ret = v4l2_queryctrl(vfd->ctrl_handler, p); | 1426 | ret = v4l2_queryctrl(vfd->ctrl_handler, p); |
| 1423 | else if (ops->vidioc_queryctrl) | 1427 | else if (ops->vidioc_queryctrl) |
| 1424 | ret = ops->vidioc_queryctrl(file, fh, p); | 1428 | ret = ops->vidioc_queryctrl(file, fh, p); |
| @@ -1438,7 +1442,9 @@ static long __video_do_ioctl(struct file *file, | |||
| 1438 | { | 1442 | { |
| 1439 | struct v4l2_control *p = arg; | 1443 | struct v4l2_control *p = arg; |
| 1440 | 1444 | ||
| 1441 | if (vfd->ctrl_handler) | 1445 | if (vfh && vfh->ctrl_handler) |
| 1446 | ret = v4l2_g_ctrl(vfh->ctrl_handler, p); | ||
| 1447 | else if (vfd->ctrl_handler) | ||
| 1442 | ret = v4l2_g_ctrl(vfd->ctrl_handler, p); | 1448 | ret = v4l2_g_ctrl(vfd->ctrl_handler, p); |
| 1443 | else if (ops->vidioc_g_ctrl) | 1449 | else if (ops->vidioc_g_ctrl) |
| 1444 | ret = ops->vidioc_g_ctrl(file, fh, p); | 1450 | ret = ops->vidioc_g_ctrl(file, fh, p); |
| @@ -1470,14 +1476,18 @@ static long __video_do_ioctl(struct file *file, | |||
| 1470 | struct v4l2_ext_controls ctrls; | 1476 | struct v4l2_ext_controls ctrls; |
| 1471 | struct v4l2_ext_control ctrl; | 1477 | struct v4l2_ext_control ctrl; |
| 1472 | 1478 | ||
| 1473 | if (!vfd->ctrl_handler && | 1479 | if (!(vfh && vfh->ctrl_handler) && !vfd->ctrl_handler && |
| 1474 | !ops->vidioc_s_ctrl && !ops->vidioc_s_ext_ctrls) | 1480 | !ops->vidioc_s_ctrl && !ops->vidioc_s_ext_ctrls) |
| 1475 | break; | 1481 | break; |
| 1476 | 1482 | ||
| 1477 | dbgarg(cmd, "id=0x%x, value=%d\n", p->id, p->value); | 1483 | dbgarg(cmd, "id=0x%x, value=%d\n", p->id, p->value); |
| 1478 | 1484 | ||
| 1485 | if (vfh && vfh->ctrl_handler) { | ||
| 1486 | ret = v4l2_s_ctrl(vfh, vfh->ctrl_handler, p); | ||
| 1487 | break; | ||
| 1488 | } | ||
| 1479 | if (vfd->ctrl_handler) { | 1489 | if (vfd->ctrl_handler) { |
| 1480 | ret = v4l2_s_ctrl(vfd->ctrl_handler, p); | 1490 | ret = v4l2_s_ctrl(NULL, vfd->ctrl_handler, p); |
| 1481 | break; | 1491 | break; |
| 1482 | } | 1492 | } |
| 1483 | if (ops->vidioc_s_ctrl) { | 1493 | if (ops->vidioc_s_ctrl) { |
| @@ -1501,7 +1511,9 @@ static long __video_do_ioctl(struct file *file, | |||
| 1501 | struct v4l2_ext_controls *p = arg; | 1511 | struct v4l2_ext_controls *p = arg; |
| 1502 | 1512 | ||
| 1503 | p->error_idx = p->count; | 1513 | p->error_idx = p->count; |
| 1504 | if (vfd->ctrl_handler) | 1514 | if (vfh && vfh->ctrl_handler) |
| 1515 | ret = v4l2_g_ext_ctrls(vfh->ctrl_handler, p); | ||
| 1516 | else if (vfd->ctrl_handler) | ||
| 1505 | ret = v4l2_g_ext_ctrls(vfd->ctrl_handler, p); | 1517 | ret = v4l2_g_ext_ctrls(vfd->ctrl_handler, p); |
| 1506 | else if (ops->vidioc_g_ext_ctrls && check_ext_ctrls(p, 0)) | 1518 | else if (ops->vidioc_g_ext_ctrls && check_ext_ctrls(p, 0)) |
| 1507 | ret = ops->vidioc_g_ext_ctrls(file, fh, p); | 1519 | ret = ops->vidioc_g_ext_ctrls(file, fh, p); |
| @@ -1515,11 +1527,14 @@ static long __video_do_ioctl(struct file *file, | |||
| 1515 | struct v4l2_ext_controls *p = arg; | 1527 | struct v4l2_ext_controls *p = arg; |
| 1516 | 1528 | ||
| 1517 | p->error_idx = p->count; | 1529 | p->error_idx = p->count; |
| 1518 | if (!vfd->ctrl_handler && !ops->vidioc_s_ext_ctrls) | 1530 | if (!(vfh && vfh->ctrl_handler) && !vfd->ctrl_handler && |
| 1531 | !ops->vidioc_s_ext_ctrls) | ||
| 1519 | break; | 1532 | break; |
| 1520 | v4l_print_ext_ctrls(cmd, vfd, p, 1); | 1533 | v4l_print_ext_ctrls(cmd, vfd, p, 1); |
| 1521 | if (vfd->ctrl_handler) | 1534 | if (vfh && vfh->ctrl_handler) |
| 1522 | ret = v4l2_s_ext_ctrls(vfd->ctrl_handler, p); | 1535 | ret = v4l2_s_ext_ctrls(vfh, vfh->ctrl_handler, p); |
| 1536 | else if (vfd->ctrl_handler) | ||
| 1537 | ret = v4l2_s_ext_ctrls(NULL, vfd->ctrl_handler, p); | ||
| 1523 | else if (check_ext_ctrls(p, 0)) | 1538 | else if (check_ext_ctrls(p, 0)) |
| 1524 | ret = ops->vidioc_s_ext_ctrls(file, fh, p); | 1539 | ret = ops->vidioc_s_ext_ctrls(file, fh, p); |
| 1525 | break; | 1540 | break; |
| @@ -1529,10 +1544,13 @@ static long __video_do_ioctl(struct file *file, | |||
| 1529 | struct v4l2_ext_controls *p = arg; | 1544 | struct v4l2_ext_controls *p = arg; |
| 1530 | 1545 | ||
| 1531 | p->error_idx = p->count; | 1546 | p->error_idx = p->count; |
| 1532 | if (!vfd->ctrl_handler && !ops->vidioc_try_ext_ctrls) | 1547 | if (!(vfh && vfh->ctrl_handler) && !vfd->ctrl_handler && |
| 1548 | !ops->vidioc_try_ext_ctrls) | ||
| 1533 | break; | 1549 | break; |
| 1534 | v4l_print_ext_ctrls(cmd, vfd, p, 1); | 1550 | v4l_print_ext_ctrls(cmd, vfd, p, 1); |
| 1535 | if (vfd->ctrl_handler) | 1551 | if (vfh && vfh->ctrl_handler) |
| 1552 | ret = v4l2_try_ext_ctrls(vfh->ctrl_handler, p); | ||
| 1553 | else if (vfd->ctrl_handler) | ||
| 1536 | ret = v4l2_try_ext_ctrls(vfd->ctrl_handler, p); | 1554 | ret = v4l2_try_ext_ctrls(vfd->ctrl_handler, p); |
| 1537 | else if (check_ext_ctrls(p, 0)) | 1555 | else if (check_ext_ctrls(p, 0)) |
| 1538 | ret = ops->vidioc_try_ext_ctrls(file, fh, p); | 1556 | ret = ops->vidioc_try_ext_ctrls(file, fh, p); |
| @@ -1542,7 +1560,9 @@ static long __video_do_ioctl(struct file *file, | |||
| 1542 | { | 1560 | { |
| 1543 | struct v4l2_querymenu *p = arg; | 1561 | struct v4l2_querymenu *p = arg; |
| 1544 | 1562 | ||
| 1545 | if (vfd->ctrl_handler) | 1563 | if (vfh && vfh->ctrl_handler) |
| 1564 | ret = v4l2_querymenu(vfh->ctrl_handler, p); | ||
| 1565 | else if (vfd->ctrl_handler) | ||
| 1546 | ret = v4l2_querymenu(vfd->ctrl_handler, p); | 1566 | ret = v4l2_querymenu(vfd->ctrl_handler, p); |
| 1547 | else if (ops->vidioc_querymenu) | 1567 | else if (ops->vidioc_querymenu) |
| 1548 | ret = ops->vidioc_querymenu(file, fh, p); | 1568 | ret = ops->vidioc_querymenu(file, fh, p); |
| @@ -2276,7 +2296,7 @@ static int check_array_args(unsigned int cmd, void *parg, size_t *array_size, | |||
| 2276 | break; | 2296 | break; |
| 2277 | } | 2297 | } |
| 2278 | *user_ptr = (void __user *)buf->m.planes; | 2298 | *user_ptr = (void __user *)buf->m.planes; |
| 2279 | *kernel_ptr = (void **)&buf->m.planes; | 2299 | *kernel_ptr = (void *)&buf->m.planes; |
| 2280 | *array_size = sizeof(struct v4l2_plane) * buf->length; | 2300 | *array_size = sizeof(struct v4l2_plane) * buf->length; |
| 2281 | ret = 1; | 2301 | ret = 1; |
| 2282 | } | 2302 | } |
| @@ -2290,7 +2310,7 @@ static int check_array_args(unsigned int cmd, void *parg, size_t *array_size, | |||
| 2290 | 2310 | ||
| 2291 | if (ctrls->count != 0) { | 2311 | if (ctrls->count != 0) { |
| 2292 | *user_ptr = (void __user *)ctrls->controls; | 2312 | *user_ptr = (void __user *)ctrls->controls; |
| 2293 | *kernel_ptr = (void **)&ctrls->controls; | 2313 | *kernel_ptr = (void *)&ctrls->controls; |
| 2294 | *array_size = sizeof(struct v4l2_ext_control) | 2314 | *array_size = sizeof(struct v4l2_ext_control) |
| 2295 | * ctrls->count; | 2315 | * ctrls->count; |
| 2296 | ret = 1; | 2316 | ret = 1; |
diff --git a/drivers/media/video/v4l2-subdev.c b/drivers/media/video/v4l2-subdev.c index 812729ebf09e..b7967c9dc4ae 100644 --- a/drivers/media/video/v4l2-subdev.c +++ b/drivers/media/video/v4l2-subdev.c | |||
| @@ -75,20 +75,7 @@ static int subdev_open(struct file *file) | |||
| 75 | return ret; | 75 | return ret; |
| 76 | } | 76 | } |
| 77 | 77 | ||
| 78 | ret = v4l2_fh_init(&subdev_fh->vfh, vdev); | 78 | v4l2_fh_init(&subdev_fh->vfh, vdev); |
| 79 | if (ret) | ||
| 80 | goto err; | ||
| 81 | |||
| 82 | if (sd->flags & V4L2_SUBDEV_FL_HAS_EVENTS) { | ||
| 83 | ret = v4l2_event_init(&subdev_fh->vfh); | ||
| 84 | if (ret) | ||
| 85 | goto err; | ||
| 86 | |||
| 87 | ret = v4l2_event_alloc(&subdev_fh->vfh, sd->nevents); | ||
| 88 | if (ret) | ||
| 89 | goto err; | ||
| 90 | } | ||
| 91 | |||
| 92 | v4l2_fh_add(&subdev_fh->vfh); | 79 | v4l2_fh_add(&subdev_fh->vfh); |
| 93 | file->private_data = &subdev_fh->vfh; | 80 | file->private_data = &subdev_fh->vfh; |
| 94 | #if defined(CONFIG_MEDIA_CONTROLLER) | 81 | #if defined(CONFIG_MEDIA_CONTROLLER) |
| @@ -155,25 +142,25 @@ static long subdev_do_ioctl(struct file *file, unsigned int cmd, void *arg) | |||
| 155 | 142 | ||
| 156 | switch (cmd) { | 143 | switch (cmd) { |
| 157 | case VIDIOC_QUERYCTRL: | 144 | case VIDIOC_QUERYCTRL: |
| 158 | return v4l2_queryctrl(sd->ctrl_handler, arg); | 145 | return v4l2_queryctrl(vfh->ctrl_handler, arg); |
| 159 | 146 | ||
| 160 | case VIDIOC_QUERYMENU: | 147 | case VIDIOC_QUERYMENU: |
| 161 | return v4l2_querymenu(sd->ctrl_handler, arg); | 148 | return v4l2_querymenu(vfh->ctrl_handler, arg); |
| 162 | 149 | ||
| 163 | case VIDIOC_G_CTRL: | 150 | case VIDIOC_G_CTRL: |
| 164 | return v4l2_g_ctrl(sd->ctrl_handler, arg); | 151 | return v4l2_g_ctrl(vfh->ctrl_handler, arg); |
| 165 | 152 | ||
| 166 | case VIDIOC_S_CTRL: | 153 | case VIDIOC_S_CTRL: |
| 167 | return v4l2_s_ctrl(sd->ctrl_handler, arg); | 154 | return v4l2_s_ctrl(vfh, vfh->ctrl_handler, arg); |
| 168 | 155 | ||
| 169 | case VIDIOC_G_EXT_CTRLS: | 156 | case VIDIOC_G_EXT_CTRLS: |
| 170 | return v4l2_g_ext_ctrls(sd->ctrl_handler, arg); | 157 | return v4l2_g_ext_ctrls(vfh->ctrl_handler, arg); |
| 171 | 158 | ||
| 172 | case VIDIOC_S_EXT_CTRLS: | 159 | case VIDIOC_S_EXT_CTRLS: |
| 173 | return v4l2_s_ext_ctrls(sd->ctrl_handler, arg); | 160 | return v4l2_s_ext_ctrls(vfh, vfh->ctrl_handler, arg); |
| 174 | 161 | ||
| 175 | case VIDIOC_TRY_EXT_CTRLS: | 162 | case VIDIOC_TRY_EXT_CTRLS: |
| 176 | return v4l2_try_ext_ctrls(sd->ctrl_handler, arg); | 163 | return v4l2_try_ext_ctrls(vfh->ctrl_handler, arg); |
| 177 | 164 | ||
| 178 | case VIDIOC_DQEVENT: | 165 | case VIDIOC_DQEVENT: |
| 179 | if (!(sd->flags & V4L2_SUBDEV_FL_HAS_EVENTS)) | 166 | if (!(sd->flags & V4L2_SUBDEV_FL_HAS_EVENTS)) |
| @@ -297,7 +284,7 @@ static unsigned int subdev_poll(struct file *file, poll_table *wait) | |||
| 297 | if (!(sd->flags & V4L2_SUBDEV_FL_HAS_EVENTS)) | 284 | if (!(sd->flags & V4L2_SUBDEV_FL_HAS_EVENTS)) |
| 298 | return POLLERR; | 285 | return POLLERR; |
| 299 | 286 | ||
| 300 | poll_wait(file, &fh->events->wait, wait); | 287 | poll_wait(file, &fh->wait, wait); |
| 301 | 288 | ||
| 302 | if (v4l2_event_pending(fh)) | 289 | if (v4l2_event_pending(fh)) |
| 303 | return POLLPRI; | 290 | return POLLPRI; |
diff --git a/drivers/media/video/videobuf-dma-sg.c b/drivers/media/video/videobuf-dma-sg.c index ddb8f4b46c03..f300deafd268 100644 --- a/drivers/media/video/videobuf-dma-sg.c +++ b/drivers/media/video/videobuf-dma-sg.c | |||
| @@ -108,8 +108,9 @@ static struct scatterlist *videobuf_pages_to_sg(struct page **pages, | |||
| 108 | if (PageHighMem(pages[0])) | 108 | if (PageHighMem(pages[0])) |
| 109 | /* DMA to highmem pages might not work */ | 109 | /* DMA to highmem pages might not work */ |
| 110 | goto highmem; | 110 | goto highmem; |
| 111 | sg_set_page(&sglist[0], pages[0], PAGE_SIZE - offset, offset); | 111 | sg_set_page(&sglist[0], pages[0], |
| 112 | size -= PAGE_SIZE - offset; | 112 | min_t(size_t, PAGE_SIZE - offset, size), offset); |
| 113 | size -= min_t(size_t, PAGE_SIZE - offset, size); | ||
| 113 | for (i = 1; i < nr_pages; i++) { | 114 | for (i = 1; i < nr_pages; i++) { |
| 114 | if (NULL == pages[i]) | 115 | if (NULL == pages[i]) |
| 115 | goto nopage; | 116 | goto nopage; |
diff --git a/drivers/media/video/videobuf2-dma-sg.c b/drivers/media/video/videobuf2-dma-sg.c index 10a20d9509d9..065f468faf8f 100644 --- a/drivers/media/video/videobuf2-dma-sg.c +++ b/drivers/media/video/videobuf2-dma-sg.c | |||
| @@ -48,12 +48,10 @@ static void *vb2_dma_sg_alloc(void *alloc_ctx, unsigned long size) | |||
| 48 | buf->sg_desc.size = size; | 48 | buf->sg_desc.size = size; |
| 49 | buf->sg_desc.num_pages = (size + PAGE_SIZE - 1) >> PAGE_SHIFT; | 49 | buf->sg_desc.num_pages = (size + PAGE_SIZE - 1) >> PAGE_SHIFT; |
| 50 | 50 | ||
| 51 | buf->sg_desc.sglist = vmalloc(buf->sg_desc.num_pages * | 51 | buf->sg_desc.sglist = vzalloc(buf->sg_desc.num_pages * |
| 52 | sizeof(*buf->sg_desc.sglist)); | 52 | sizeof(*buf->sg_desc.sglist)); |
| 53 | if (!buf->sg_desc.sglist) | 53 | if (!buf->sg_desc.sglist) |
| 54 | goto fail_sglist_alloc; | 54 | goto fail_sglist_alloc; |
| 55 | memset(buf->sg_desc.sglist, 0, buf->sg_desc.num_pages * | ||
| 56 | sizeof(*buf->sg_desc.sglist)); | ||
| 57 | sg_init_table(buf->sg_desc.sglist, buf->sg_desc.num_pages); | 55 | sg_init_table(buf->sg_desc.sglist, buf->sg_desc.num_pages); |
| 58 | 56 | ||
| 59 | buf->pages = kzalloc(buf->sg_desc.num_pages * sizeof(struct page *), | 57 | buf->pages = kzalloc(buf->sg_desc.num_pages * sizeof(struct page *), |
| @@ -136,13 +134,11 @@ static void *vb2_dma_sg_get_userptr(void *alloc_ctx, unsigned long vaddr, | |||
| 136 | last = ((vaddr + size - 1) & PAGE_MASK) >> PAGE_SHIFT; | 134 | last = ((vaddr + size - 1) & PAGE_MASK) >> PAGE_SHIFT; |
| 137 | buf->sg_desc.num_pages = last - first + 1; | 135 | buf->sg_desc.num_pages = last - first + 1; |
| 138 | 136 | ||
| 139 | buf->sg_desc.sglist = vmalloc( | 137 | buf->sg_desc.sglist = vzalloc( |
| 140 | buf->sg_desc.num_pages * sizeof(*buf->sg_desc.sglist)); | 138 | buf->sg_desc.num_pages * sizeof(*buf->sg_desc.sglist)); |
| 141 | if (!buf->sg_desc.sglist) | 139 | if (!buf->sg_desc.sglist) |
| 142 | goto userptr_fail_sglist_alloc; | 140 | goto userptr_fail_sglist_alloc; |
| 143 | 141 | ||
| 144 | memset(buf->sg_desc.sglist, 0, | ||
| 145 | buf->sg_desc.num_pages * sizeof(*buf->sg_desc.sglist)); | ||
| 146 | sg_init_table(buf->sg_desc.sglist, buf->sg_desc.num_pages); | 142 | sg_init_table(buf->sg_desc.sglist, buf->sg_desc.num_pages); |
| 147 | 143 | ||
| 148 | buf->pages = kzalloc(buf->sg_desc.num_pages * sizeof(struct page *), | 144 | buf->pages = kzalloc(buf->sg_desc.num_pages * sizeof(struct page *), |
diff --git a/drivers/media/video/videobuf2-memops.c b/drivers/media/video/videobuf2-memops.c index b03c3aea5bea..569eeb3dfd50 100644 --- a/drivers/media/video/videobuf2-memops.c +++ b/drivers/media/video/videobuf2-memops.c | |||
| @@ -176,7 +176,7 @@ int vb2_mmap_pfn_range(struct vm_area_struct *vma, unsigned long paddr, | |||
| 176 | 176 | ||
| 177 | vma->vm_ops->open(vma); | 177 | vma->vm_ops->open(vma); |
| 178 | 178 | ||
| 179 | printk(KERN_DEBUG "%s: mapped paddr 0x%08lx at 0x%08lx, size %ld\n", | 179 | pr_debug("%s: mapped paddr 0x%08lx at 0x%08lx, size %ld\n", |
| 180 | __func__, paddr, vma->vm_start, size); | 180 | __func__, paddr, vma->vm_start, size); |
| 181 | 181 | ||
| 182 | return 0; | 182 | return 0; |
| @@ -194,7 +194,7 @@ static void vb2_common_vm_open(struct vm_area_struct *vma) | |||
| 194 | { | 194 | { |
| 195 | struct vb2_vmarea_handler *h = vma->vm_private_data; | 195 | struct vb2_vmarea_handler *h = vma->vm_private_data; |
| 196 | 196 | ||
| 197 | printk(KERN_DEBUG "%s: %p, refcount: %d, vma: %08lx-%08lx\n", | 197 | pr_debug("%s: %p, refcount: %d, vma: %08lx-%08lx\n", |
| 198 | __func__, h, atomic_read(h->refcount), vma->vm_start, | 198 | __func__, h, atomic_read(h->refcount), vma->vm_start, |
| 199 | vma->vm_end); | 199 | vma->vm_end); |
| 200 | 200 | ||
| @@ -212,7 +212,7 @@ static void vb2_common_vm_close(struct vm_area_struct *vma) | |||
| 212 | { | 212 | { |
| 213 | struct vb2_vmarea_handler *h = vma->vm_private_data; | 213 | struct vb2_vmarea_handler *h = vma->vm_private_data; |
| 214 | 214 | ||
| 215 | printk(KERN_DEBUG "%s: %p, refcount: %d, vma: %08lx-%08lx\n", | 215 | pr_debug("%s: %p, refcount: %d, vma: %08lx-%08lx\n", |
| 216 | __func__, h, atomic_read(h->refcount), vma->vm_start, | 216 | __func__, h, atomic_read(h->refcount), vma->vm_start, |
| 217 | vma->vm_end); | 217 | vma->vm_end); |
| 218 | 218 | ||
diff --git a/drivers/media/video/vino.c b/drivers/media/video/vino.c index d63e9d978493..52a0a3736c82 100644 --- a/drivers/media/video/vino.c +++ b/drivers/media/video/vino.c | |||
| @@ -36,7 +36,6 @@ | |||
| 36 | #include <linux/slab.h> | 36 | #include <linux/slab.h> |
| 37 | #include <linux/mm.h> | 37 | #include <linux/mm.h> |
| 38 | #include <linux/time.h> | 38 | #include <linux/time.h> |
| 39 | #include <linux/version.h> | ||
| 40 | #include <linux/kmod.h> | 39 | #include <linux/kmod.h> |
| 41 | 40 | ||
| 42 | #include <linux/i2c.h> | 41 | #include <linux/i2c.h> |
| @@ -61,8 +60,7 @@ | |||
| 61 | // #define VINO_DEBUG | 60 | // #define VINO_DEBUG |
| 62 | // #define VINO_DEBUG_INT | 61 | // #define VINO_DEBUG_INT |
| 63 | 62 | ||
| 64 | #define VINO_MODULE_VERSION "0.0.6" | 63 | #define VINO_MODULE_VERSION "0.0.7" |
| 65 | #define VINO_VERSION_CODE KERNEL_VERSION(0, 0, 6) | ||
| 66 | 64 | ||
| 67 | MODULE_DESCRIPTION("SGI VINO Video4Linux2 driver"); | 65 | MODULE_DESCRIPTION("SGI VINO Video4Linux2 driver"); |
| 68 | MODULE_VERSION(VINO_MODULE_VERSION); | 66 | MODULE_VERSION(VINO_MODULE_VERSION); |
| @@ -2934,7 +2932,6 @@ static int vino_querycap(struct file *file, void *__fh, | |||
| 2934 | strcpy(cap->driver, vino_driver_name); | 2932 | strcpy(cap->driver, vino_driver_name); |
| 2935 | strcpy(cap->card, vino_driver_description); | 2933 | strcpy(cap->card, vino_driver_description); |
| 2936 | strcpy(cap->bus_info, vino_bus_name); | 2934 | strcpy(cap->bus_info, vino_bus_name); |
| 2937 | cap->version = VINO_VERSION_CODE; | ||
| 2938 | cap->capabilities = | 2935 | cap->capabilities = |
| 2939 | V4L2_CAP_VIDEO_CAPTURE | | 2936 | V4L2_CAP_VIDEO_CAPTURE | |
| 2940 | V4L2_CAP_STREAMING; | 2937 | V4L2_CAP_STREAMING; |
diff --git a/drivers/media/video/vivi.c b/drivers/media/video/vivi.c index 2238a613d664..a848bd2af97f 100644 --- a/drivers/media/video/vivi.c +++ b/drivers/media/video/vivi.c | |||
| @@ -22,7 +22,6 @@ | |||
| 22 | #include <linux/sched.h> | 22 | #include <linux/sched.h> |
| 23 | #include <linux/slab.h> | 23 | #include <linux/slab.h> |
| 24 | #include <linux/font.h> | 24 | #include <linux/font.h> |
| 25 | #include <linux/version.h> | ||
| 26 | #include <linux/mutex.h> | 25 | #include <linux/mutex.h> |
| 27 | #include <linux/videodev2.h> | 26 | #include <linux/videodev2.h> |
| 28 | #include <linux/kthread.h> | 27 | #include <linux/kthread.h> |
| @@ -32,6 +31,7 @@ | |||
| 32 | #include <media/v4l2-ioctl.h> | 31 | #include <media/v4l2-ioctl.h> |
| 33 | #include <media/v4l2-ctrls.h> | 32 | #include <media/v4l2-ctrls.h> |
| 34 | #include <media/v4l2-fh.h> | 33 | #include <media/v4l2-fh.h> |
| 34 | #include <media/v4l2-event.h> | ||
| 35 | #include <media/v4l2-common.h> | 35 | #include <media/v4l2-common.h> |
| 36 | 36 | ||
| 37 | #define VIVI_MODULE_NAME "vivi" | 37 | #define VIVI_MODULE_NAME "vivi" |
| @@ -44,15 +44,12 @@ | |||
| 44 | #define MAX_WIDTH 1920 | 44 | #define MAX_WIDTH 1920 |
| 45 | #define MAX_HEIGHT 1200 | 45 | #define MAX_HEIGHT 1200 |
| 46 | 46 | ||
| 47 | #define VIVI_MAJOR_VERSION 0 | 47 | #define VIVI_VERSION "0.8.1" |
| 48 | #define VIVI_MINOR_VERSION 8 | ||
| 49 | #define VIVI_RELEASE 0 | ||
| 50 | #define VIVI_VERSION \ | ||
| 51 | KERNEL_VERSION(VIVI_MAJOR_VERSION, VIVI_MINOR_VERSION, VIVI_RELEASE) | ||
| 52 | 48 | ||
| 53 | MODULE_DESCRIPTION("Video Technology Magazine Virtual Video Capture Board"); | 49 | MODULE_DESCRIPTION("Video Technology Magazine Virtual Video Capture Board"); |
| 54 | MODULE_AUTHOR("Mauro Carvalho Chehab, Ted Walther and John Sokol"); | 50 | MODULE_AUTHOR("Mauro Carvalho Chehab, Ted Walther and John Sokol"); |
| 55 | MODULE_LICENSE("Dual BSD/GPL"); | 51 | MODULE_LICENSE("Dual BSD/GPL"); |
| 52 | MODULE_VERSION(VIVI_VERSION); | ||
| 56 | 53 | ||
| 57 | static unsigned video_nr = -1; | 54 | static unsigned video_nr = -1; |
| 58 | module_param(video_nr, uint, 0644); | 55 | module_param(video_nr, uint, 0644); |
| @@ -167,6 +164,11 @@ struct vivi_dev { | |||
| 167 | struct v4l2_ctrl *contrast; | 164 | struct v4l2_ctrl *contrast; |
| 168 | struct v4l2_ctrl *saturation; | 165 | struct v4l2_ctrl *saturation; |
| 169 | struct v4l2_ctrl *hue; | 166 | struct v4l2_ctrl *hue; |
| 167 | struct { | ||
| 168 | /* autogain/gain cluster */ | ||
| 169 | struct v4l2_ctrl *autogain; | ||
| 170 | struct v4l2_ctrl *gain; | ||
| 171 | }; | ||
| 170 | struct v4l2_ctrl *volume; | 172 | struct v4l2_ctrl *volume; |
| 171 | struct v4l2_ctrl *button; | 173 | struct v4l2_ctrl *button; |
| 172 | struct v4l2_ctrl *boolean; | 174 | struct v4l2_ctrl *boolean; |
| @@ -174,6 +176,7 @@ struct vivi_dev { | |||
| 174 | struct v4l2_ctrl *int64; | 176 | struct v4l2_ctrl *int64; |
| 175 | struct v4l2_ctrl *menu; | 177 | struct v4l2_ctrl *menu; |
| 176 | struct v4l2_ctrl *string; | 178 | struct v4l2_ctrl *string; |
| 179 | struct v4l2_ctrl *bitmask; | ||
| 177 | 180 | ||
| 178 | spinlock_t slock; | 181 | spinlock_t slock; |
| 179 | struct mutex mutex; | 182 | struct mutex mutex; |
| @@ -457,6 +460,7 @@ static void vivi_fillbuff(struct vivi_dev *dev, struct vivi_buffer *buf) | |||
| 457 | unsigned ms; | 460 | unsigned ms; |
| 458 | char str[100]; | 461 | char str[100]; |
| 459 | int h, line = 1; | 462 | int h, line = 1; |
| 463 | s32 gain; | ||
| 460 | 464 | ||
| 461 | if (!vbuf) | 465 | if (!vbuf) |
| 462 | return; | 466 | return; |
| @@ -479,6 +483,7 @@ static void vivi_fillbuff(struct vivi_dev *dev, struct vivi_buffer *buf) | |||
| 479 | dev->width, dev->height, dev->input); | 483 | dev->width, dev->height, dev->input); |
| 480 | gen_text(dev, vbuf, line++ * 16, 16, str); | 484 | gen_text(dev, vbuf, line++ * 16, 16, str); |
| 481 | 485 | ||
| 486 | gain = v4l2_ctrl_g_ctrl(dev->gain); | ||
| 482 | mutex_lock(&dev->ctrl_handler.lock); | 487 | mutex_lock(&dev->ctrl_handler.lock); |
| 483 | snprintf(str, sizeof(str), " brightness %3d, contrast %3d, saturation %3d, hue %d ", | 488 | snprintf(str, sizeof(str), " brightness %3d, contrast %3d, saturation %3d, hue %d ", |
| 484 | dev->brightness->cur.val, | 489 | dev->brightness->cur.val, |
| @@ -486,11 +491,13 @@ static void vivi_fillbuff(struct vivi_dev *dev, struct vivi_buffer *buf) | |||
| 486 | dev->saturation->cur.val, | 491 | dev->saturation->cur.val, |
| 487 | dev->hue->cur.val); | 492 | dev->hue->cur.val); |
| 488 | gen_text(dev, vbuf, line++ * 16, 16, str); | 493 | gen_text(dev, vbuf, line++ * 16, 16, str); |
| 489 | snprintf(str, sizeof(str), " volume %3d ", dev->volume->cur.val); | 494 | snprintf(str, sizeof(str), " autogain %d, gain %3d, volume %3d ", |
| 495 | dev->autogain->cur.val, gain, dev->volume->cur.val); | ||
| 490 | gen_text(dev, vbuf, line++ * 16, 16, str); | 496 | gen_text(dev, vbuf, line++ * 16, 16, str); |
| 491 | snprintf(str, sizeof(str), " int32 %d, int64 %lld ", | 497 | snprintf(str, sizeof(str), " int32 %d, int64 %lld, bitmask %08x ", |
| 492 | dev->int32->cur.val, | 498 | dev->int32->cur.val, |
| 493 | dev->int64->cur.val64); | 499 | dev->int64->cur.val64, |
| 500 | dev->bitmask->cur.val); | ||
| 494 | gen_text(dev, vbuf, line++ * 16, 16, str); | 501 | gen_text(dev, vbuf, line++ * 16, 16, str); |
| 495 | snprintf(str, sizeof(str), " boolean %d, menu %s, string \"%s\" ", | 502 | snprintf(str, sizeof(str), " boolean %d, menu %s, string \"%s\" ", |
| 496 | dev->boolean->cur.val, | 503 | dev->boolean->cur.val, |
| @@ -524,11 +531,13 @@ static void vivi_thread_tick(struct vivi_dev *dev) | |||
| 524 | spin_lock_irqsave(&dev->slock, flags); | 531 | spin_lock_irqsave(&dev->slock, flags); |
| 525 | if (list_empty(&dma_q->active)) { | 532 | if (list_empty(&dma_q->active)) { |
| 526 | dprintk(dev, 1, "No active queue to serve\n"); | 533 | dprintk(dev, 1, "No active queue to serve\n"); |
| 527 | goto unlock; | 534 | spin_unlock_irqrestore(&dev->slock, flags); |
| 535 | return; | ||
| 528 | } | 536 | } |
| 529 | 537 | ||
| 530 | buf = list_entry(dma_q->active.next, struct vivi_buffer, list); | 538 | buf = list_entry(dma_q->active.next, struct vivi_buffer, list); |
| 531 | list_del(&buf->list); | 539 | list_del(&buf->list); |
| 540 | spin_unlock_irqrestore(&dev->slock, flags); | ||
| 532 | 541 | ||
| 533 | do_gettimeofday(&buf->vb.v4l2_buf.timestamp); | 542 | do_gettimeofday(&buf->vb.v4l2_buf.timestamp); |
| 534 | 543 | ||
| @@ -538,8 +547,6 @@ static void vivi_thread_tick(struct vivi_dev *dev) | |||
| 538 | 547 | ||
| 539 | vb2_buffer_done(&buf->vb, VB2_BUF_STATE_DONE); | 548 | vb2_buffer_done(&buf->vb, VB2_BUF_STATE_DONE); |
| 540 | dprintk(dev, 2, "[%p/%d] done\n", buf, buf->vb.v4l2_buf.index); | 549 | dprintk(dev, 2, "[%p/%d] done\n", buf, buf->vb.v4l2_buf.index); |
| 541 | unlock: | ||
| 542 | spin_unlock_irqrestore(&dev->slock, flags); | ||
| 543 | } | 550 | } |
| 544 | 551 | ||
| 545 | #define frames_to_ms(frames) \ | 552 | #define frames_to_ms(frames) \ |
| @@ -812,7 +819,6 @@ static int vidioc_querycap(struct file *file, void *priv, | |||
| 812 | strcpy(cap->driver, "vivi"); | 819 | strcpy(cap->driver, "vivi"); |
| 813 | strcpy(cap->card, "vivi"); | 820 | strcpy(cap->card, "vivi"); |
| 814 | strlcpy(cap->bus_info, dev->v4l2_dev.name, sizeof(cap->bus_info)); | 821 | strlcpy(cap->bus_info, dev->v4l2_dev.name, sizeof(cap->bus_info)); |
| 815 | cap->version = VIVI_VERSION; | ||
| 816 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING | \ | 822 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING | \ |
| 817 | V4L2_CAP_READWRITE; | 823 | V4L2_CAP_READWRITE; |
| 818 | return 0; | 824 | return 0; |
| @@ -975,14 +981,37 @@ static int vidioc_s_input(struct file *file, void *priv, unsigned int i) | |||
| 975 | if (i >= NUM_INPUTS) | 981 | if (i >= NUM_INPUTS) |
| 976 | return -EINVAL; | 982 | return -EINVAL; |
| 977 | 983 | ||
| 984 | if (i == dev->input) | ||
| 985 | return 0; | ||
| 986 | |||
| 978 | dev->input = i; | 987 | dev->input = i; |
| 979 | precalculate_bars(dev); | 988 | precalculate_bars(dev); |
| 980 | precalculate_line(dev); | 989 | precalculate_line(dev); |
| 981 | return 0; | 990 | return 0; |
| 982 | } | 991 | } |
| 983 | 992 | ||
| 993 | static int vidioc_subscribe_event(struct v4l2_fh *fh, | ||
| 994 | struct v4l2_event_subscription *sub) | ||
| 995 | { | ||
| 996 | switch (sub->type) { | ||
| 997 | case V4L2_EVENT_CTRL: | ||
| 998 | return v4l2_event_subscribe(fh, sub, 0); | ||
| 999 | default: | ||
| 1000 | return -EINVAL; | ||
| 1001 | } | ||
| 1002 | } | ||
| 1003 | |||
| 984 | /* --- controls ---------------------------------------------- */ | 1004 | /* --- controls ---------------------------------------------- */ |
| 985 | 1005 | ||
| 1006 | static int vivi_g_volatile_ctrl(struct v4l2_ctrl *ctrl) | ||
| 1007 | { | ||
| 1008 | struct vivi_dev *dev = container_of(ctrl->handler, struct vivi_dev, ctrl_handler); | ||
| 1009 | |||
| 1010 | if (ctrl == dev->autogain) | ||
| 1011 | dev->gain->val = jiffies & 0xff; | ||
| 1012 | return 0; | ||
| 1013 | } | ||
| 1014 | |||
| 986 | static int vivi_s_ctrl(struct v4l2_ctrl *ctrl) | 1015 | static int vivi_s_ctrl(struct v4l2_ctrl *ctrl) |
| 987 | { | 1016 | { |
| 988 | struct vivi_dev *dev = container_of(ctrl->handler, struct vivi_dev, ctrl_handler); | 1017 | struct vivi_dev *dev = container_of(ctrl->handler, struct vivi_dev, ctrl_handler); |
| @@ -1010,10 +1039,17 @@ static unsigned int | |||
| 1010 | vivi_poll(struct file *file, struct poll_table_struct *wait) | 1039 | vivi_poll(struct file *file, struct poll_table_struct *wait) |
| 1011 | { | 1040 | { |
| 1012 | struct vivi_dev *dev = video_drvdata(file); | 1041 | struct vivi_dev *dev = video_drvdata(file); |
| 1042 | struct v4l2_fh *fh = file->private_data; | ||
| 1013 | struct vb2_queue *q = &dev->vb_vidq; | 1043 | struct vb2_queue *q = &dev->vb_vidq; |
| 1044 | unsigned int res; | ||
| 1014 | 1045 | ||
| 1015 | dprintk(dev, 1, "%s\n", __func__); | 1046 | dprintk(dev, 1, "%s\n", __func__); |
| 1016 | return vb2_poll(q, file, wait); | 1047 | res = vb2_poll(q, file, wait); |
| 1048 | if (v4l2_event_pending(fh)) | ||
| 1049 | res |= POLLPRI; | ||
| 1050 | else | ||
| 1051 | poll_wait(file, &fh->wait, wait); | ||
| 1052 | return res; | ||
| 1017 | } | 1053 | } |
| 1018 | 1054 | ||
| 1019 | static int vivi_close(struct file *file) | 1055 | static int vivi_close(struct file *file) |
| @@ -1045,6 +1081,7 @@ static int vivi_mmap(struct file *file, struct vm_area_struct *vma) | |||
| 1045 | } | 1081 | } |
| 1046 | 1082 | ||
| 1047 | static const struct v4l2_ctrl_ops vivi_ctrl_ops = { | 1083 | static const struct v4l2_ctrl_ops vivi_ctrl_ops = { |
| 1084 | .g_volatile_ctrl = vivi_g_volatile_ctrl, | ||
| 1048 | .s_ctrl = vivi_s_ctrl, | 1085 | .s_ctrl = vivi_s_ctrl, |
| 1049 | }; | 1086 | }; |
| 1050 | 1087 | ||
| @@ -1117,9 +1154,20 @@ static const struct v4l2_ctrl_config vivi_ctrl_string = { | |||
| 1117 | .step = 1, | 1154 | .step = 1, |
| 1118 | }; | 1155 | }; |
| 1119 | 1156 | ||
| 1157 | static const struct v4l2_ctrl_config vivi_ctrl_bitmask = { | ||
| 1158 | .ops = &vivi_ctrl_ops, | ||
| 1159 | .id = VIVI_CID_CUSTOM_BASE + 6, | ||
| 1160 | .name = "Bitmask", | ||
| 1161 | .type = V4L2_CTRL_TYPE_BITMASK, | ||
| 1162 | .def = 0x80002000, | ||
| 1163 | .min = 0, | ||
| 1164 | .max = 0x80402010, | ||
| 1165 | .step = 0, | ||
| 1166 | }; | ||
| 1167 | |||
| 1120 | static const struct v4l2_file_operations vivi_fops = { | 1168 | static const struct v4l2_file_operations vivi_fops = { |
| 1121 | .owner = THIS_MODULE, | 1169 | .owner = THIS_MODULE, |
| 1122 | .open = v4l2_fh_open, | 1170 | .open = v4l2_fh_open, |
| 1123 | .release = vivi_close, | 1171 | .release = vivi_close, |
| 1124 | .read = vivi_read, | 1172 | .read = vivi_read, |
| 1125 | .poll = vivi_poll, | 1173 | .poll = vivi_poll, |
| @@ -1143,6 +1191,8 @@ static const struct v4l2_ioctl_ops vivi_ioctl_ops = { | |||
| 1143 | .vidioc_s_input = vidioc_s_input, | 1191 | .vidioc_s_input = vidioc_s_input, |
| 1144 | .vidioc_streamon = vidioc_streamon, | 1192 | .vidioc_streamon = vidioc_streamon, |
| 1145 | .vidioc_streamoff = vidioc_streamoff, | 1193 | .vidioc_streamoff = vidioc_streamoff, |
| 1194 | .vidioc_subscribe_event = vidioc_subscribe_event, | ||
| 1195 | .vidioc_unsubscribe_event = v4l2_event_unsubscribe, | ||
| 1146 | }; | 1196 | }; |
| 1147 | 1197 | ||
| 1148 | static struct video_device vivi_template = { | 1198 | static struct video_device vivi_template = { |
| @@ -1213,16 +1263,22 @@ static int __init vivi_create_instance(int inst) | |||
| 1213 | V4L2_CID_SATURATION, 0, 255, 1, 127); | 1263 | V4L2_CID_SATURATION, 0, 255, 1, 127); |
| 1214 | dev->hue = v4l2_ctrl_new_std(hdl, &vivi_ctrl_ops, | 1264 | dev->hue = v4l2_ctrl_new_std(hdl, &vivi_ctrl_ops, |
| 1215 | V4L2_CID_HUE, -128, 127, 1, 0); | 1265 | V4L2_CID_HUE, -128, 127, 1, 0); |
| 1266 | dev->autogain = v4l2_ctrl_new_std(hdl, &vivi_ctrl_ops, | ||
| 1267 | V4L2_CID_AUTOGAIN, 0, 1, 1, 1); | ||
| 1268 | dev->gain = v4l2_ctrl_new_std(hdl, &vivi_ctrl_ops, | ||
| 1269 | V4L2_CID_GAIN, 0, 255, 1, 100); | ||
| 1216 | dev->button = v4l2_ctrl_new_custom(hdl, &vivi_ctrl_button, NULL); | 1270 | dev->button = v4l2_ctrl_new_custom(hdl, &vivi_ctrl_button, NULL); |
| 1217 | dev->int32 = v4l2_ctrl_new_custom(hdl, &vivi_ctrl_int32, NULL); | 1271 | dev->int32 = v4l2_ctrl_new_custom(hdl, &vivi_ctrl_int32, NULL); |
| 1218 | dev->int64 = v4l2_ctrl_new_custom(hdl, &vivi_ctrl_int64, NULL); | 1272 | dev->int64 = v4l2_ctrl_new_custom(hdl, &vivi_ctrl_int64, NULL); |
| 1219 | dev->boolean = v4l2_ctrl_new_custom(hdl, &vivi_ctrl_boolean, NULL); | 1273 | dev->boolean = v4l2_ctrl_new_custom(hdl, &vivi_ctrl_boolean, NULL); |
| 1220 | dev->menu = v4l2_ctrl_new_custom(hdl, &vivi_ctrl_menu, NULL); | 1274 | dev->menu = v4l2_ctrl_new_custom(hdl, &vivi_ctrl_menu, NULL); |
| 1221 | dev->string = v4l2_ctrl_new_custom(hdl, &vivi_ctrl_string, NULL); | 1275 | dev->string = v4l2_ctrl_new_custom(hdl, &vivi_ctrl_string, NULL); |
| 1276 | dev->bitmask = v4l2_ctrl_new_custom(hdl, &vivi_ctrl_bitmask, NULL); | ||
| 1222 | if (hdl->error) { | 1277 | if (hdl->error) { |
| 1223 | ret = hdl->error; | 1278 | ret = hdl->error; |
| 1224 | goto unreg_dev; | 1279 | goto unreg_dev; |
| 1225 | } | 1280 | } |
| 1281 | v4l2_ctrl_auto_cluster(2, &dev->autogain, 0, true); | ||
| 1226 | dev->v4l2_dev.ctrl_handler = hdl; | 1282 | dev->v4l2_dev.ctrl_handler = hdl; |
| 1227 | 1283 | ||
| 1228 | /* initialize locks */ | 1284 | /* initialize locks */ |
| @@ -1325,9 +1381,8 @@ static int __init vivi_init(void) | |||
| 1325 | } | 1381 | } |
| 1326 | 1382 | ||
| 1327 | printk(KERN_INFO "Video Technology Magazine Virtual Video " | 1383 | printk(KERN_INFO "Video Technology Magazine Virtual Video " |
| 1328 | "Capture Board ver %u.%u.%u successfully loaded.\n", | 1384 | "Capture Board ver %s successfully loaded.\n", |
| 1329 | (VIVI_VERSION >> 16) & 0xFF, (VIVI_VERSION >> 8) & 0xFF, | 1385 | VIVI_VERSION); |
| 1330 | VIVI_VERSION & 0xFF); | ||
| 1331 | 1386 | ||
| 1332 | /* n_devs will reflect the actual number of allocated devices */ | 1387 | /* n_devs will reflect the actual number of allocated devices */ |
| 1333 | n_devs = i; | 1388 | n_devs = i; |
diff --git a/drivers/media/video/w9966.c b/drivers/media/video/w9966.c index fa35639d0c15..453dbbd1e6e8 100644 --- a/drivers/media/video/w9966.c +++ b/drivers/media/video/w9966.c | |||
| @@ -57,7 +57,6 @@ | |||
| 57 | #include <linux/module.h> | 57 | #include <linux/module.h> |
| 58 | #include <linux/init.h> | 58 | #include <linux/init.h> |
| 59 | #include <linux/delay.h> | 59 | #include <linux/delay.h> |
| 60 | #include <linux/version.h> | ||
| 61 | #include <linux/videodev2.h> | 60 | #include <linux/videodev2.h> |
| 62 | #include <linux/slab.h> | 61 | #include <linux/slab.h> |
| 63 | #include <media/v4l2-common.h> | 62 | #include <media/v4l2-common.h> |
| @@ -127,7 +126,7 @@ struct w9966 { | |||
| 127 | MODULE_AUTHOR("Jakob Kemi <jakob.kemi@post.utfors.se>"); | 126 | MODULE_AUTHOR("Jakob Kemi <jakob.kemi@post.utfors.se>"); |
| 128 | MODULE_DESCRIPTION("Winbond w9966cf WebCam driver (0.32)"); | 127 | MODULE_DESCRIPTION("Winbond w9966cf WebCam driver (0.32)"); |
| 129 | MODULE_LICENSE("GPL"); | 128 | MODULE_LICENSE("GPL"); |
| 130 | 129 | MODULE_VERSION("0.33.1"); | |
| 131 | 130 | ||
| 132 | #ifdef MODULE | 131 | #ifdef MODULE |
| 133 | static const char *pardev[] = {[0 ... W9966_MAXCAMS] = ""}; | 132 | static const char *pardev[] = {[0 ... W9966_MAXCAMS] = ""}; |
| @@ -568,7 +567,6 @@ static int cam_querycap(struct file *file, void *priv, | |||
| 568 | strlcpy(vcap->driver, cam->v4l2_dev.name, sizeof(vcap->driver)); | 567 | strlcpy(vcap->driver, cam->v4l2_dev.name, sizeof(vcap->driver)); |
| 569 | strlcpy(vcap->card, W9966_DRIVERNAME, sizeof(vcap->card)); | 568 | strlcpy(vcap->card, W9966_DRIVERNAME, sizeof(vcap->card)); |
| 570 | strlcpy(vcap->bus_info, "parport", sizeof(vcap->bus_info)); | 569 | strlcpy(vcap->bus_info, "parport", sizeof(vcap->bus_info)); |
| 571 | vcap->version = KERNEL_VERSION(0, 33, 0); | ||
| 572 | vcap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE; | 570 | vcap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE; |
| 573 | return 0; | 571 | return 0; |
| 574 | } | 572 | } |
diff --git a/drivers/media/video/zoran/zoran.h b/drivers/media/video/zoran/zoran.h index f3f640014928..d7166afc255e 100644 --- a/drivers/media/video/zoran/zoran.h +++ b/drivers/media/video/zoran/zoran.h | |||
| @@ -41,10 +41,6 @@ struct zoran_sync { | |||
| 41 | }; | 41 | }; |
| 42 | 42 | ||
| 43 | 43 | ||
| 44 | #define MAJOR_VERSION 0 /* driver major version */ | ||
| 45 | #define MINOR_VERSION 10 /* driver minor version */ | ||
| 46 | #define RELEASE_VERSION 0 /* release version */ | ||
| 47 | |||
| 48 | #define ZORAN_NAME "ZORAN" /* name of the device */ | 44 | #define ZORAN_NAME "ZORAN" /* name of the device */ |
| 49 | 45 | ||
| 50 | #define ZR_DEVNAME(zr) ((zr)->name) | 46 | #define ZR_DEVNAME(zr) ((zr)->name) |
diff --git a/drivers/media/video/zoran/zoran_card.c b/drivers/media/video/zoran/zoran_card.c index 79b04ac0f1ad..c3602d6cd48e 100644 --- a/drivers/media/video/zoran/zoran_card.c +++ b/drivers/media/video/zoran/zoran_card.c | |||
| @@ -123,9 +123,12 @@ int zr36067_debug = 1; | |||
| 123 | module_param_named(debug, zr36067_debug, int, 0644); | 123 | module_param_named(debug, zr36067_debug, int, 0644); |
| 124 | MODULE_PARM_DESC(debug, "Debug level (0-5)"); | 124 | MODULE_PARM_DESC(debug, "Debug level (0-5)"); |
| 125 | 125 | ||
| 126 | #define ZORAN_VERSION "0.10.1" | ||
| 127 | |||
| 126 | MODULE_DESCRIPTION("Zoran-36057/36067 JPEG codec driver"); | 128 | MODULE_DESCRIPTION("Zoran-36057/36067 JPEG codec driver"); |
| 127 | MODULE_AUTHOR("Serguei Miridonov"); | 129 | MODULE_AUTHOR("Serguei Miridonov"); |
| 128 | MODULE_LICENSE("GPL"); | 130 | MODULE_LICENSE("GPL"); |
| 131 | MODULE_VERSION(ZORAN_VERSION); | ||
| 129 | 132 | ||
| 130 | #define ZR_DEVICE(subven, subdev, data) { \ | 133 | #define ZR_DEVICE(subven, subdev, data) { \ |
| 131 | .vendor = PCI_VENDOR_ID_ZORAN, .device = PCI_DEVICE_ID_ZORAN_36057, \ | 134 | .vendor = PCI_VENDOR_ID_ZORAN, .device = PCI_DEVICE_ID_ZORAN_36057, \ |
| @@ -1459,8 +1462,8 @@ static int __init zoran_init(void) | |||
| 1459 | { | 1462 | { |
| 1460 | int res; | 1463 | int res; |
| 1461 | 1464 | ||
| 1462 | printk(KERN_INFO "Zoran MJPEG board driver version %d.%d.%d\n", | 1465 | printk(KERN_INFO "Zoran MJPEG board driver version %s\n", |
| 1463 | MAJOR_VERSION, MINOR_VERSION, RELEASE_VERSION); | 1466 | ZORAN_VERSION); |
| 1464 | 1467 | ||
| 1465 | /* check the parameters we have been given, adjust if necessary */ | 1468 | /* check the parameters we have been given, adjust if necessary */ |
| 1466 | if (v4l_nbufs < 2) | 1469 | if (v4l_nbufs < 2) |
diff --git a/drivers/media/video/zoran/zoran_driver.c b/drivers/media/video/zoran/zoran_driver.c index 2771d818406e..d4d05d2ace65 100644 --- a/drivers/media/video/zoran/zoran_driver.c +++ b/drivers/media/video/zoran/zoran_driver.c | |||
| @@ -44,7 +44,6 @@ | |||
| 44 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | 44 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 45 | */ | 45 | */ |
| 46 | 46 | ||
| 47 | #include <linux/version.h> | ||
| 48 | #include <linux/init.h> | 47 | #include <linux/init.h> |
| 49 | #include <linux/module.h> | 48 | #include <linux/module.h> |
| 50 | #include <linux/delay.h> | 49 | #include <linux/delay.h> |
| @@ -1538,8 +1537,6 @@ static int zoran_querycap(struct file *file, void *__fh, struct v4l2_capability | |||
| 1538 | strncpy(cap->driver, "zoran", sizeof(cap->driver)-1); | 1537 | strncpy(cap->driver, "zoran", sizeof(cap->driver)-1); |
| 1539 | snprintf(cap->bus_info, sizeof(cap->bus_info), "PCI:%s", | 1538 | snprintf(cap->bus_info, sizeof(cap->bus_info), "PCI:%s", |
| 1540 | pci_name(zr->pci_dev)); | 1539 | pci_name(zr->pci_dev)); |
| 1541 | cap->version = KERNEL_VERSION(MAJOR_VERSION, MINOR_VERSION, | ||
| 1542 | RELEASE_VERSION); | ||
| 1543 | cap->capabilities = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_CAPTURE | | 1540 | cap->capabilities = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_CAPTURE | |
| 1544 | V4L2_CAP_VIDEO_OUTPUT | V4L2_CAP_VIDEO_OVERLAY; | 1541 | V4L2_CAP_VIDEO_OUTPUT | V4L2_CAP_VIDEO_OVERLAY; |
| 1545 | return 0; | 1542 | return 0; |
diff --git a/drivers/media/video/zr364xx.c b/drivers/media/video/zr364xx.c index 7dfb01e9930e..c492846c1c5a 100644 --- a/drivers/media/video/zr364xx.c +++ b/drivers/media/video/zr364xx.c | |||
| @@ -29,7 +29,6 @@ | |||
| 29 | 29 | ||
| 30 | 30 | ||
| 31 | #include <linux/module.h> | 31 | #include <linux/module.h> |
| 32 | #include <linux/version.h> | ||
| 33 | #include <linux/init.h> | 32 | #include <linux/init.h> |
| 34 | #include <linux/usb.h> | 33 | #include <linux/usb.h> |
| 35 | #include <linux/vmalloc.h> | 34 | #include <linux/vmalloc.h> |
| @@ -42,8 +41,7 @@ | |||
| 42 | 41 | ||
| 43 | 42 | ||
| 44 | /* Version Information */ | 43 | /* Version Information */ |
| 45 | #define DRIVER_VERSION "v0.73" | 44 | #define DRIVER_VERSION "0.7.4" |
| 46 | #define ZR364XX_VERSION_CODE KERNEL_VERSION(0, 7, 3) | ||
| 47 | #define DRIVER_AUTHOR "Antoine Jacquet, http://royale.zerezo.com/" | 45 | #define DRIVER_AUTHOR "Antoine Jacquet, http://royale.zerezo.com/" |
| 48 | #define DRIVER_DESC "Zoran 364xx" | 46 | #define DRIVER_DESC "Zoran 364xx" |
| 49 | 47 | ||
| @@ -744,7 +742,6 @@ static int zr364xx_vidioc_querycap(struct file *file, void *priv, | |||
| 744 | strlcpy(cap->card, cam->udev->product, sizeof(cap->card)); | 742 | strlcpy(cap->card, cam->udev->product, sizeof(cap->card)); |
| 745 | strlcpy(cap->bus_info, dev_name(&cam->udev->dev), | 743 | strlcpy(cap->bus_info, dev_name(&cam->udev->dev), |
| 746 | sizeof(cap->bus_info)); | 744 | sizeof(cap->bus_info)); |
| 747 | cap->version = ZR364XX_VERSION_CODE; | ||
| 748 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | | 745 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | |
| 749 | V4L2_CAP_READWRITE | | 746 | V4L2_CAP_READWRITE | |
| 750 | V4L2_CAP_STREAMING; | 747 | V4L2_CAP_STREAMING; |
| @@ -1721,3 +1718,4 @@ module_exit(zr364xx_exit); | |||
| 1721 | MODULE_AUTHOR(DRIVER_AUTHOR); | 1718 | MODULE_AUTHOR(DRIVER_AUTHOR); |
| 1722 | MODULE_DESCRIPTION(DRIVER_DESC); | 1719 | MODULE_DESCRIPTION(DRIVER_DESC); |
| 1723 | MODULE_LICENSE("GPL"); | 1720 | MODULE_LICENSE("GPL"); |
| 1721 | MODULE_VERSION(DRIVER_VERSION); | ||
diff --git a/drivers/mfd/timberdale.c b/drivers/mfd/timberdale.c index 69272e4e3459..696879e2eef7 100644 --- a/drivers/mfd/timberdale.c +++ b/drivers/mfd/timberdale.c | |||
| @@ -287,12 +287,8 @@ static __devinitdata struct i2c_board_info timberdale_saa7706_i2c_board_info = { | |||
| 287 | static __devinitdata struct timb_radio_platform_data | 287 | static __devinitdata struct timb_radio_platform_data |
| 288 | timberdale_radio_platform_data = { | 288 | timberdale_radio_platform_data = { |
| 289 | .i2c_adapter = 0, | 289 | .i2c_adapter = 0, |
| 290 | .tuner = { | 290 | .tuner = &timberdale_tef6868_i2c_board_info, |
| 291 | .info = &timberdale_tef6868_i2c_board_info | 291 | .dsp = &timberdale_saa7706_i2c_board_info |
| 292 | }, | ||
| 293 | .dsp = { | ||
| 294 | .info = &timberdale_saa7706_i2c_board_info | ||
| 295 | } | ||
| 296 | }; | 292 | }; |
| 297 | 293 | ||
| 298 | static const __devinitconst struct resource timberdale_video_resources[] = { | 294 | static const __devinitconst struct resource timberdale_video_resources[] = { |
diff --git a/drivers/staging/cxd2099/Kconfig b/drivers/staging/cxd2099/Kconfig index 9d638c30735d..b48aefddc84c 100644 --- a/drivers/staging/cxd2099/Kconfig +++ b/drivers/staging/cxd2099/Kconfig | |||
| @@ -1,9 +1,10 @@ | |||
| 1 | config DVB_CXD2099 | 1 | config DVB_CXD2099 |
| 2 | tristate "CXD2099AR Common Interface driver" | 2 | tristate "CXD2099AR Common Interface driver" |
| 3 | depends on DVB_CORE && PCI && I2C && DVB_NGENE | 3 | depends on DVB_CORE && PCI && I2C |
| 4 | ---help--- | 4 | ---help--- |
| 5 | Support for the CI module found on cineS2 DVB-S2, supported by | 5 | Support for the CI module found on cards based on |
| 6 | the Micronas PCIe device driver (ngene). | 6 | - Micronas ngene PCIe bridge: cineS2 etc. |
| 7 | - Digital Devices PCIe bridge: Octopus series | ||
| 7 | 8 | ||
| 8 | For now, data is passed through '/dev/dvb/adapterX/sec0': | 9 | For now, data is passed through '/dev/dvb/adapterX/sec0': |
| 9 | - Encrypted data must be written to 'sec0'. | 10 | - Encrypted data must be written to 'sec0'. |
diff --git a/drivers/staging/cxd2099/cxd2099.c b/drivers/staging/cxd2099/cxd2099.c index 55b1c4a59035..1c04185bcfd7 100644 --- a/drivers/staging/cxd2099/cxd2099.c +++ b/drivers/staging/cxd2099/cxd2099.c | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * cxd2099.c: Driver for the CXD2099AR Common Interface Controller | 2 | * cxd2099.c: Driver for the CXD2099AR Common Interface Controller |
| 3 | * | 3 | * |
| 4 | * Copyright (C) 2010 DigitalDevices UG | 4 | * Copyright (C) 2010-2011 Digital Devices GmbH |
| 5 | * | 5 | * |
| 6 | * | 6 | * |
| 7 | * This program is free software; you can redistribute it and/or | 7 | * This program is free software; you can redistribute it and/or |
| @@ -41,13 +41,13 @@ struct cxd { | |||
| 41 | struct dvb_ca_en50221 en; | 41 | struct dvb_ca_en50221 en; |
| 42 | 42 | ||
| 43 | struct i2c_adapter *i2c; | 43 | struct i2c_adapter *i2c; |
| 44 | u8 adr; | 44 | struct cxd2099_cfg cfg; |
| 45 | |||
| 45 | u8 regs[0x23]; | 46 | u8 regs[0x23]; |
| 46 | u8 lastaddress; | 47 | u8 lastaddress; |
| 47 | u8 clk_reg_f; | 48 | u8 clk_reg_f; |
| 48 | u8 clk_reg_b; | 49 | u8 clk_reg_b; |
| 49 | int mode; | 50 | int mode; |
| 50 | u32 bitrate; | ||
| 51 | int ready; | 51 | int ready; |
| 52 | int dr; | 52 | int dr; |
| 53 | int slot_stat; | 53 | int slot_stat; |
| @@ -89,9 +89,9 @@ static int i2c_read_reg(struct i2c_adapter *adapter, u8 adr, | |||
| 89 | u8 reg, u8 *val) | 89 | u8 reg, u8 *val) |
| 90 | { | 90 | { |
| 91 | struct i2c_msg msgs[2] = {{.addr = adr, .flags = 0, | 91 | struct i2c_msg msgs[2] = {{.addr = adr, .flags = 0, |
| 92 | .buf = ®, .len = 1 }, | 92 | .buf = ®, .len = 1}, |
| 93 | {.addr = adr, .flags = I2C_M_RD, | 93 | {.addr = adr, .flags = I2C_M_RD, |
| 94 | .buf = val, .len = 1 } }; | 94 | .buf = val, .len = 1} }; |
| 95 | 95 | ||
| 96 | if (i2c_transfer(adapter, msgs, 2) != 2) { | 96 | if (i2c_transfer(adapter, msgs, 2) != 2) { |
| 97 | printk(KERN_ERR "error in i2c_read_reg\n"); | 97 | printk(KERN_ERR "error in i2c_read_reg\n"); |
| @@ -104,9 +104,9 @@ static int i2c_read(struct i2c_adapter *adapter, u8 adr, | |||
| 104 | u8 reg, u8 *data, u8 n) | 104 | u8 reg, u8 *data, u8 n) |
| 105 | { | 105 | { |
| 106 | struct i2c_msg msgs[2] = {{.addr = adr, .flags = 0, | 106 | struct i2c_msg msgs[2] = {{.addr = adr, .flags = 0, |
| 107 | .buf = ®, .len = 1 }, | 107 | .buf = ®, .len = 1}, |
| 108 | {.addr = adr, .flags = I2C_M_RD, | 108 | {.addr = adr, .flags = I2C_M_RD, |
| 109 | .buf = data, .len = n } }; | 109 | .buf = data, .len = n} }; |
| 110 | 110 | ||
| 111 | if (i2c_transfer(adapter, msgs, 2) != 2) { | 111 | if (i2c_transfer(adapter, msgs, 2) != 2) { |
| 112 | printk(KERN_ERR "error in i2c_read\n"); | 112 | printk(KERN_ERR "error in i2c_read\n"); |
| @@ -119,10 +119,10 @@ static int read_block(struct cxd *ci, u8 adr, u8 *data, u8 n) | |||
| 119 | { | 119 | { |
| 120 | int status; | 120 | int status; |
| 121 | 121 | ||
| 122 | status = i2c_write_reg(ci->i2c, ci->adr, 0, adr); | 122 | status = i2c_write_reg(ci->i2c, ci->cfg.adr, 0, adr); |
| 123 | if (!status) { | 123 | if (!status) { |
| 124 | ci->lastaddress = adr; | 124 | ci->lastaddress = adr; |
| 125 | status = i2c_read(ci->i2c, ci->adr, 1, data, n); | 125 | status = i2c_read(ci->i2c, ci->cfg.adr, 1, data, n); |
| 126 | } | 126 | } |
| 127 | return status; | 127 | return status; |
| 128 | } | 128 | } |
| @@ -136,24 +136,24 @@ static int read_reg(struct cxd *ci, u8 reg, u8 *val) | |||
| 136 | static int read_pccard(struct cxd *ci, u16 address, u8 *data, u8 n) | 136 | static int read_pccard(struct cxd *ci, u16 address, u8 *data, u8 n) |
| 137 | { | 137 | { |
| 138 | int status; | 138 | int status; |
| 139 | u8 addr[3] = { 2, address&0xff, address>>8 }; | 139 | u8 addr[3] = {2, address & 0xff, address >> 8}; |
| 140 | 140 | ||
| 141 | status = i2c_write(ci->i2c, ci->adr, addr, 3); | 141 | status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3); |
| 142 | if (!status) | 142 | if (!status) |
| 143 | status = i2c_read(ci->i2c, ci->adr, 3, data, n); | 143 | status = i2c_read(ci->i2c, ci->cfg.adr, 3, data, n); |
| 144 | return status; | 144 | return status; |
| 145 | } | 145 | } |
| 146 | 146 | ||
| 147 | static int write_pccard(struct cxd *ci, u16 address, u8 *data, u8 n) | 147 | static int write_pccard(struct cxd *ci, u16 address, u8 *data, u8 n) |
| 148 | { | 148 | { |
| 149 | int status; | 149 | int status; |
| 150 | u8 addr[3] = { 2, address&0xff, address>>8 }; | 150 | u8 addr[3] = {2, address & 0xff, address >> 8}; |
| 151 | 151 | ||
| 152 | status = i2c_write(ci->i2c, ci->adr, addr, 3); | 152 | status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3); |
| 153 | if (!status) { | 153 | if (!status) { |
| 154 | u8 buf[256] = {3}; | 154 | u8 buf[256] = {3}; |
| 155 | memcpy(buf+1, data, n); | 155 | memcpy(buf+1, data, n); |
| 156 | status = i2c_write(ci->i2c, ci->adr, buf, n+1); | 156 | status = i2c_write(ci->i2c, ci->cfg.adr, buf, n+1); |
| 157 | } | 157 | } |
| 158 | return status; | 158 | return status; |
| 159 | } | 159 | } |
| @@ -161,39 +161,64 @@ static int write_pccard(struct cxd *ci, u16 address, u8 *data, u8 n) | |||
| 161 | static int read_io(struct cxd *ci, u16 address, u8 *val) | 161 | static int read_io(struct cxd *ci, u16 address, u8 *val) |
| 162 | { | 162 | { |
| 163 | int status; | 163 | int status; |
| 164 | u8 addr[3] = { 2, address&0xff, address>>8 }; | 164 | u8 addr[3] = {2, address & 0xff, address >> 8}; |
| 165 | 165 | ||
| 166 | status = i2c_write(ci->i2c, ci->adr, addr, 3); | 166 | status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3); |
| 167 | if (!status) | 167 | if (!status) |
| 168 | status = i2c_read(ci->i2c, ci->adr, 3, val, 1); | 168 | status = i2c_read(ci->i2c, ci->cfg.adr, 3, val, 1); |
| 169 | return status; | 169 | return status; |
| 170 | } | 170 | } |
| 171 | 171 | ||
| 172 | static int write_io(struct cxd *ci, u16 address, u8 val) | 172 | static int write_io(struct cxd *ci, u16 address, u8 val) |
| 173 | { | 173 | { |
| 174 | int status; | 174 | int status; |
| 175 | u8 addr[3] = { 2, address&0xff, address>>8 }; | 175 | u8 addr[3] = {2, address & 0xff, address >> 8}; |
| 176 | u8 buf[2] = { 3, val }; | 176 | u8 buf[2] = {3, val}; |
| 177 | 177 | ||
| 178 | status = i2c_write(ci->i2c, ci->adr, addr, 3); | 178 | status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3); |
| 179 | if (!status) | 179 | if (!status) |
| 180 | status = i2c_write(ci->i2c, ci->adr, buf, 2); | 180 | status = i2c_write(ci->i2c, ci->cfg.adr, buf, 2); |
| 181 | |||
| 182 | return status; | 181 | return status; |
| 183 | } | 182 | } |
| 184 | 183 | ||
| 184 | #if 0 | ||
| 185 | static int read_io_data(struct cxd *ci, u8 *data, u8 n) | ||
| 186 | { | ||
| 187 | int status; | ||
| 188 | u8 addr[3] = { 2, 0, 0 }; | ||
| 189 | |||
| 190 | status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3); | ||
| 191 | if (!status) | ||
| 192 | status = i2c_read(ci->i2c, ci->cfg.adr, 3, data, n); | ||
| 193 | return 0; | ||
| 194 | } | ||
| 195 | |||
| 196 | static int write_io_data(struct cxd *ci, u8 *data, u8 n) | ||
| 197 | { | ||
| 198 | int status; | ||
| 199 | u8 addr[3] = {2, 0, 0}; | ||
| 200 | |||
| 201 | status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3); | ||
| 202 | if (!status) { | ||
| 203 | u8 buf[256] = {3}; | ||
| 204 | memcpy(buf+1, data, n); | ||
| 205 | status = i2c_write(ci->i2c, ci->cfg.adr, buf, n + 1); | ||
| 206 | } | ||
| 207 | return 0; | ||
| 208 | } | ||
| 209 | #endif | ||
| 185 | 210 | ||
| 186 | static int write_regm(struct cxd *ci, u8 reg, u8 val, u8 mask) | 211 | static int write_regm(struct cxd *ci, u8 reg, u8 val, u8 mask) |
| 187 | { | 212 | { |
| 188 | int status; | 213 | int status; |
| 189 | 214 | ||
| 190 | status = i2c_write_reg(ci->i2c, ci->adr, 0, reg); | 215 | status = i2c_write_reg(ci->i2c, ci->cfg.adr, 0, reg); |
| 191 | if (!status && reg >= 6 && reg <= 8 && mask != 0xff) | 216 | if (!status && reg >= 6 && reg <= 8 && mask != 0xff) |
| 192 | status = i2c_read_reg(ci->i2c, ci->adr, 1, &ci->regs[reg]); | 217 | status = i2c_read_reg(ci->i2c, ci->cfg.adr, 1, &ci->regs[reg]); |
| 193 | ci->regs[reg] = (ci->regs[reg]&(~mask))|val; | 218 | ci->regs[reg] = (ci->regs[reg] & (~mask)) | val; |
| 194 | if (!status) { | 219 | if (!status) { |
| 195 | ci->lastaddress = reg; | 220 | ci->lastaddress = reg; |
| 196 | status = i2c_write_reg(ci->i2c, ci->adr, 1, ci->regs[reg]); | 221 | status = i2c_write_reg(ci->i2c, ci->cfg.adr, 1, ci->regs[reg]); |
| 197 | } | 222 | } |
| 198 | if (reg == 0x20) | 223 | if (reg == 0x20) |
| 199 | ci->regs[reg] &= 0x7f; | 224 | ci->regs[reg] &= 0x7f; |
| @@ -211,11 +236,11 @@ static int write_block(struct cxd *ci, u8 adr, u8 *data, int n) | |||
| 211 | int status; | 236 | int status; |
| 212 | u8 buf[256] = {1}; | 237 | u8 buf[256] = {1}; |
| 213 | 238 | ||
| 214 | status = i2c_write_reg(ci->i2c, ci->adr, 0, adr); | 239 | status = i2c_write_reg(ci->i2c, ci->cfg.adr, 0, adr); |
| 215 | if (!status) { | 240 | if (!status) { |
| 216 | ci->lastaddress = adr; | 241 | ci->lastaddress = adr; |
| 217 | memcpy(buf+1, data, n); | 242 | memcpy(buf + 1, data, n); |
| 218 | status = i2c_write(ci->i2c, ci->adr, buf, n+1); | 243 | status = i2c_write(ci->i2c, ci->cfg.adr, buf, n + 1); |
| 219 | } | 244 | } |
| 220 | return status; | 245 | return status; |
| 221 | } | 246 | } |
| @@ -249,12 +274,16 @@ static void cam_mode(struct cxd *ci, int mode) | |||
| 249 | write_regm(ci, 0x20, 0x80, 0x80); | 274 | write_regm(ci, 0x20, 0x80, 0x80); |
| 250 | break; | 275 | break; |
| 251 | case 0x01: | 276 | case 0x01: |
| 277 | #ifdef BUFFER_MODE | ||
| 278 | if (!ci->en.read_data) | ||
| 279 | return; | ||
| 252 | printk(KERN_INFO "enable cam buffer mode\n"); | 280 | printk(KERN_INFO "enable cam buffer mode\n"); |
| 253 | /* write_reg(ci, 0x0d, 0x00); */ | 281 | /* write_reg(ci, 0x0d, 0x00); */ |
| 254 | /* write_reg(ci, 0x0e, 0x01); */ | 282 | /* write_reg(ci, 0x0e, 0x01); */ |
| 255 | write_regm(ci, 0x08, 0x40, 0x40); | 283 | write_regm(ci, 0x08, 0x40, 0x40); |
| 256 | /* read_reg(ci, 0x12, &dummy); */ | 284 | /* read_reg(ci, 0x12, &dummy); */ |
| 257 | write_regm(ci, 0x08, 0x80, 0x80); | 285 | write_regm(ci, 0x08, 0x80, 0x80); |
| 286 | #endif | ||
| 258 | break; | 287 | break; |
| 259 | default: | 288 | default: |
| 260 | break; | 289 | break; |
| @@ -264,8 +293,6 @@ static void cam_mode(struct cxd *ci, int mode) | |||
| 264 | 293 | ||
| 265 | 294 | ||
| 266 | 295 | ||
| 267 | #define CHK_ERROR(s) if ((status = s)) break | ||
| 268 | |||
| 269 | static int init(struct cxd *ci) | 296 | static int init(struct cxd *ci) |
| 270 | { | 297 | { |
| 271 | int status; | 298 | int status; |
| @@ -273,63 +300,160 @@ static int init(struct cxd *ci) | |||
| 273 | mutex_lock(&ci->lock); | 300 | mutex_lock(&ci->lock); |
| 274 | ci->mode = -1; | 301 | ci->mode = -1; |
| 275 | do { | 302 | do { |
| 276 | CHK_ERROR(write_reg(ci, 0x00, 0x00)); | 303 | status = write_reg(ci, 0x00, 0x00); |
| 277 | CHK_ERROR(write_reg(ci, 0x01, 0x00)); | 304 | if (status < 0) |
| 278 | CHK_ERROR(write_reg(ci, 0x02, 0x10)); | 305 | break; |
| 279 | CHK_ERROR(write_reg(ci, 0x03, 0x00)); | 306 | status = write_reg(ci, 0x01, 0x00); |
| 280 | CHK_ERROR(write_reg(ci, 0x05, 0xFF)); | 307 | if (status < 0) |
| 281 | CHK_ERROR(write_reg(ci, 0x06, 0x1F)); | 308 | break; |
| 282 | CHK_ERROR(write_reg(ci, 0x07, 0x1F)); | 309 | status = write_reg(ci, 0x02, 0x10); |
| 283 | CHK_ERROR(write_reg(ci, 0x08, 0x28)); | 310 | if (status < 0) |
| 284 | CHK_ERROR(write_reg(ci, 0x14, 0x20)); | 311 | break; |
| 285 | 312 | status = write_reg(ci, 0x03, 0x00); | |
| 286 | CHK_ERROR(write_reg(ci, 0x09, 0x4D)); /* Input Mode C, BYPass Serial, TIVAL = low, MSB */ | 313 | if (status < 0) |
| 287 | CHK_ERROR(write_reg(ci, 0x0A, 0xA7)); /* TOSTRT = 8, Mode B (gated clock), falling Edge, Serial, POL=HIGH, MSB */ | 314 | break; |
| 288 | 315 | status = write_reg(ci, 0x05, 0xFF); | |
| 289 | /* Sync detector */ | 316 | if (status < 0) |
| 290 | CHK_ERROR(write_reg(ci, 0x0B, 0x33)); | 317 | break; |
| 291 | CHK_ERROR(write_reg(ci, 0x0C, 0x33)); | 318 | status = write_reg(ci, 0x06, 0x1F); |
| 292 | 319 | if (status < 0) | |
| 293 | CHK_ERROR(write_regm(ci, 0x14, 0x00, 0x0F)); | 320 | break; |
| 294 | CHK_ERROR(write_reg(ci, 0x15, ci->clk_reg_b)); | 321 | status = write_reg(ci, 0x07, 0x1F); |
| 295 | CHK_ERROR(write_regm(ci, 0x16, 0x00, 0x0F)); | 322 | if (status < 0) |
| 296 | CHK_ERROR(write_reg(ci, 0x17, ci->clk_reg_f)); | 323 | break; |
| 297 | 324 | status = write_reg(ci, 0x08, 0x28); | |
| 298 | CHK_ERROR(write_reg(ci, 0x20, 0x28)); /* Integer Divider, Falling Edge, Internal Sync, */ | 325 | if (status < 0) |
| 299 | CHK_ERROR(write_reg(ci, 0x21, 0x00)); /* MCLKI = TICLK/8 */ | 326 | break; |
| 300 | CHK_ERROR(write_reg(ci, 0x22, 0x07)); /* MCLKI = TICLK/8 */ | 327 | status = write_reg(ci, 0x14, 0x20); |
| 301 | 328 | if (status < 0) | |
| 302 | 329 | break; | |
| 303 | CHK_ERROR(write_regm(ci, 0x20, 0x80, 0x80)); /* Reset CAM state machine */ | 330 | |
| 304 | 331 | #if 0 | |
| 305 | CHK_ERROR(write_regm(ci, 0x03, 0x02, 02)); /* Enable IREQA Interrupt */ | 332 | status = write_reg(ci, 0x09, 0x4D); /* Input Mode C, BYPass Serial, TIVAL = low, MSB */ |
| 306 | CHK_ERROR(write_reg(ci, 0x01, 0x04)); /* Enable CD Interrupt */ | 333 | if (status < 0) |
| 307 | CHK_ERROR(write_reg(ci, 0x00, 0x31)); /* Enable TS1,Hot Swap,Slot A */ | 334 | break; |
| 308 | CHK_ERROR(write_regm(ci, 0x09, 0x08, 0x08)); /* Put TS in bypass */ | 335 | #endif |
| 336 | status = write_reg(ci, 0x0A, 0xA7); /* TOSTRT = 8, Mode B (gated clock), falling Edge, Serial, POL=HIGH, MSB */ | ||
| 337 | if (status < 0) | ||
| 338 | break; | ||
| 339 | |||
| 340 | status = write_reg(ci, 0x0B, 0x33); | ||
| 341 | if (status < 0) | ||
| 342 | break; | ||
| 343 | status = write_reg(ci, 0x0C, 0x33); | ||
| 344 | if (status < 0) | ||
| 345 | break; | ||
| 346 | |||
| 347 | status = write_regm(ci, 0x14, 0x00, 0x0F); | ||
| 348 | if (status < 0) | ||
| 349 | break; | ||
| 350 | status = write_reg(ci, 0x15, ci->clk_reg_b); | ||
| 351 | if (status < 0) | ||
| 352 | break; | ||
| 353 | status = write_regm(ci, 0x16, 0x00, 0x0F); | ||
| 354 | if (status < 0) | ||
| 355 | break; | ||
| 356 | status = write_reg(ci, 0x17, ci->clk_reg_f); | ||
| 357 | if (status < 0) | ||
| 358 | break; | ||
| 359 | |||
| 360 | if (ci->cfg.clock_mode) { | ||
| 361 | if (ci->cfg.polarity) { | ||
| 362 | status = write_reg(ci, 0x09, 0x6f); | ||
| 363 | if (status < 0) | ||
| 364 | break; | ||
| 365 | } else { | ||
| 366 | status = write_reg(ci, 0x09, 0x6d); | ||
| 367 | if (status < 0) | ||
| 368 | break; | ||
| 369 | } | ||
| 370 | status = write_reg(ci, 0x20, 0x68); | ||
| 371 | if (status < 0) | ||
| 372 | break; | ||
| 373 | status = write_reg(ci, 0x21, 0x00); | ||
| 374 | if (status < 0) | ||
| 375 | break; | ||
| 376 | status = write_reg(ci, 0x22, 0x02); | ||
| 377 | if (status < 0) | ||
| 378 | break; | ||
| 379 | } else { | ||
| 380 | if (ci->cfg.polarity) { | ||
| 381 | status = write_reg(ci, 0x09, 0x4f); | ||
| 382 | if (status < 0) | ||
| 383 | break; | ||
| 384 | } else { | ||
| 385 | status = write_reg(ci, 0x09, 0x4d); | ||
| 386 | if (status < 0) | ||
| 387 | break; | ||
| 388 | } | ||
| 389 | |||
| 390 | status = write_reg(ci, 0x20, 0x28); | ||
| 391 | if (status < 0) | ||
| 392 | break; | ||
| 393 | status = write_reg(ci, 0x21, 0x00); | ||
| 394 | if (status < 0) | ||
| 395 | break; | ||
| 396 | status = write_reg(ci, 0x22, 0x07); | ||
| 397 | if (status < 0) | ||
| 398 | break; | ||
| 399 | } | ||
| 400 | |||
| 401 | status = write_regm(ci, 0x20, 0x80, 0x80); | ||
| 402 | if (status < 0) | ||
| 403 | break; | ||
| 404 | status = write_regm(ci, 0x03, 0x02, 0x02); | ||
| 405 | if (status < 0) | ||
| 406 | break; | ||
| 407 | status = write_reg(ci, 0x01, 0x04); | ||
| 408 | if (status < 0) | ||
| 409 | break; | ||
| 410 | status = write_reg(ci, 0x00, 0x31); | ||
| 411 | if (status < 0) | ||
| 412 | break; | ||
| 413 | |||
| 414 | /* Put TS in bypass */ | ||
| 415 | status = write_regm(ci, 0x09, 0x08, 0x08); | ||
| 416 | if (status < 0) | ||
| 417 | break; | ||
| 309 | ci->cammode = -1; | 418 | ci->cammode = -1; |
| 310 | #ifdef BUFFER_MODE | ||
| 311 | cam_mode(ci, 0); | 419 | cam_mode(ci, 0); |
| 312 | #endif | ||
| 313 | } while (0); | 420 | } while (0); |
| 314 | mutex_unlock(&ci->lock); | 421 | mutex_unlock(&ci->lock); |
| 315 | 422 | ||
| 316 | return 0; | 423 | return 0; |
| 317 | } | 424 | } |
| 318 | 425 | ||
| 319 | |||
| 320 | static int read_attribute_mem(struct dvb_ca_en50221 *ca, | 426 | static int read_attribute_mem(struct dvb_ca_en50221 *ca, |
| 321 | int slot, int address) | 427 | int slot, int address) |
| 322 | { | 428 | { |
| 323 | struct cxd *ci = ca->data; | 429 | struct cxd *ci = ca->data; |
| 430 | #if 0 | ||
| 431 | if (ci->amem_read) { | ||
| 432 | if (address <= 0 || address > 1024) | ||
| 433 | return -EIO; | ||
| 434 | return ci->amem[address]; | ||
| 435 | } | ||
| 436 | |||
| 437 | mutex_lock(&ci->lock); | ||
| 438 | write_regm(ci, 0x06, 0x00, 0x05); | ||
| 439 | read_pccard(ci, 0, &ci->amem[0], 128); | ||
| 440 | read_pccard(ci, 128, &ci->amem[0], 128); | ||
| 441 | read_pccard(ci, 256, &ci->amem[0], 128); | ||
| 442 | read_pccard(ci, 384, &ci->amem[0], 128); | ||
| 443 | write_regm(ci, 0x06, 0x05, 0x05); | ||
| 444 | mutex_unlock(&ci->lock); | ||
| 445 | return ci->amem[address]; | ||
| 446 | #else | ||
| 324 | u8 val; | 447 | u8 val; |
| 325 | mutex_lock(&ci->lock); | 448 | mutex_lock(&ci->lock); |
| 326 | set_mode(ci, 1); | 449 | set_mode(ci, 1); |
| 327 | read_pccard(ci, address, &val, 1); | 450 | read_pccard(ci, address, &val, 1); |
| 328 | mutex_unlock(&ci->lock); | 451 | mutex_unlock(&ci->lock); |
| 452 | /* printk(KERN_INFO "%02x:%02x\n", address,val); */ | ||
| 329 | return val; | 453 | return val; |
| 454 | #endif | ||
| 330 | } | 455 | } |
| 331 | 456 | ||
| 332 | |||
| 333 | static int write_attribute_mem(struct dvb_ca_en50221 *ca, int slot, | 457 | static int write_attribute_mem(struct dvb_ca_en50221 *ca, int slot, |
| 334 | int address, u8 value) | 458 | int address, u8 value) |
| 335 | { | 459 | { |
| @@ -372,6 +496,15 @@ static int slot_reset(struct dvb_ca_en50221 *ca, int slot) | |||
| 372 | struct cxd *ci = ca->data; | 496 | struct cxd *ci = ca->data; |
| 373 | 497 | ||
| 374 | mutex_lock(&ci->lock); | 498 | mutex_lock(&ci->lock); |
| 499 | #if 0 | ||
| 500 | write_reg(ci, 0x00, 0x21); | ||
| 501 | write_reg(ci, 0x06, 0x1F); | ||
| 502 | write_reg(ci, 0x00, 0x31); | ||
| 503 | #else | ||
| 504 | #if 0 | ||
| 505 | write_reg(ci, 0x06, 0x1F); | ||
| 506 | write_reg(ci, 0x06, 0x2F); | ||
| 507 | #else | ||
| 375 | cam_mode(ci, 0); | 508 | cam_mode(ci, 0); |
| 376 | write_reg(ci, 0x00, 0x21); | 509 | write_reg(ci, 0x00, 0x21); |
| 377 | write_reg(ci, 0x06, 0x1F); | 510 | write_reg(ci, 0x06, 0x1F); |
| @@ -379,13 +512,25 @@ static int slot_reset(struct dvb_ca_en50221 *ca, int slot) | |||
| 379 | write_regm(ci, 0x20, 0x80, 0x80); | 512 | write_regm(ci, 0x20, 0x80, 0x80); |
| 380 | write_reg(ci, 0x03, 0x02); | 513 | write_reg(ci, 0x03, 0x02); |
| 381 | ci->ready = 0; | 514 | ci->ready = 0; |
| 515 | #endif | ||
| 516 | #endif | ||
| 382 | ci->mode = -1; | 517 | ci->mode = -1; |
| 383 | { | 518 | { |
| 384 | int i; | 519 | int i; |
| 520 | #if 0 | ||
| 521 | u8 val; | ||
| 522 | #endif | ||
| 385 | for (i = 0; i < 100; i++) { | 523 | for (i = 0; i < 100; i++) { |
| 386 | msleep(10); | 524 | msleep(10); |
| 525 | #if 0 | ||
| 526 | read_reg(ci, 0x06, &val); | ||
| 527 | printk(KERN_INFO "%d:%02x\n", i, val); | ||
| 528 | if (!(val&0x10)) | ||
| 529 | break; | ||
| 530 | #else | ||
| 387 | if (ci->ready) | 531 | if (ci->ready) |
| 388 | break; | 532 | break; |
| 533 | #endif | ||
| 389 | } | 534 | } |
| 390 | } | 535 | } |
| 391 | mutex_unlock(&ci->lock); | 536 | mutex_unlock(&ci->lock); |
| @@ -399,12 +544,12 @@ static int slot_shutdown(struct dvb_ca_en50221 *ca, int slot) | |||
| 399 | 544 | ||
| 400 | printk(KERN_INFO "slot_shutdown\n"); | 545 | printk(KERN_INFO "slot_shutdown\n"); |
| 401 | mutex_lock(&ci->lock); | 546 | mutex_lock(&ci->lock); |
| 402 | /* write_regm(ci, 0x09, 0x08, 0x08); */ | 547 | write_regm(ci, 0x09, 0x08, 0x08); |
| 403 | write_regm(ci, 0x20, 0x80, 0x80); | 548 | write_regm(ci, 0x20, 0x80, 0x80); /* Reset CAM Mode */ |
| 404 | write_regm(ci, 0x06, 0x07, 0x07); | 549 | write_regm(ci, 0x06, 0x07, 0x07); /* Clear IO Mode */ |
| 405 | ci->mode = -1; | 550 | ci->mode = -1; |
| 406 | mutex_unlock(&ci->lock); | 551 | mutex_unlock(&ci->lock); |
| 407 | return 0; /* shutdown(ci); */ | 552 | return 0; |
| 408 | } | 553 | } |
| 409 | 554 | ||
| 410 | static int slot_ts_enable(struct dvb_ca_en50221 *ca, int slot) | 555 | static int slot_ts_enable(struct dvb_ca_en50221 *ca, int slot) |
| @@ -459,7 +604,6 @@ static int campoll(struct cxd *ci) | |||
| 459 | if (istat&8 && ci->slot_stat == DVB_CA_EN50221_POLL_CAM_PRESENT) { | 604 | if (istat&8 && ci->slot_stat == DVB_CA_EN50221_POLL_CAM_PRESENT) { |
| 460 | ci->ready = 1; | 605 | ci->ready = 1; |
| 461 | ci->slot_stat |= DVB_CA_EN50221_POLL_CAM_READY; | 606 | ci->slot_stat |= DVB_CA_EN50221_POLL_CAM_READY; |
| 462 | printk(KERN_INFO "READY\n"); | ||
| 463 | } | 607 | } |
| 464 | } | 608 | } |
| 465 | return 0; | 609 | return 0; |
| @@ -510,7 +654,7 @@ static int write_data(struct dvb_ca_en50221 *ca, int slot, u8 *ebuf, int ecount) | |||
| 510 | struct cxd *ci = ca->data; | 654 | struct cxd *ci = ca->data; |
| 511 | 655 | ||
| 512 | mutex_lock(&ci->lock); | 656 | mutex_lock(&ci->lock); |
| 513 | printk(KERN_INFO "write_data %d\n", ecount); | 657 | printk(kern_INFO "write_data %d\n", ecount); |
| 514 | write_reg(ci, 0x0d, ecount>>8); | 658 | write_reg(ci, 0x0d, ecount>>8); |
| 515 | write_reg(ci, 0x0e, ecount&0xff); | 659 | write_reg(ci, 0x0e, ecount&0xff); |
| 516 | write_block(ci, 0x11, ebuf, ecount); | 660 | write_block(ci, 0x11, ebuf, ecount); |
| @@ -535,15 +679,15 @@ static struct dvb_ca_en50221 en_templ = { | |||
| 535 | 679 | ||
| 536 | }; | 680 | }; |
| 537 | 681 | ||
| 538 | struct dvb_ca_en50221 *cxd2099_attach(u8 adr, void *priv, | 682 | struct dvb_ca_en50221 *cxd2099_attach(struct cxd2099_cfg *cfg, |
| 683 | void *priv, | ||
| 539 | struct i2c_adapter *i2c) | 684 | struct i2c_adapter *i2c) |
| 540 | { | 685 | { |
| 541 | struct cxd *ci = 0; | 686 | struct cxd *ci = 0; |
| 542 | u32 bitrate = 62000000; | ||
| 543 | u8 val; | 687 | u8 val; |
| 544 | 688 | ||
| 545 | if (i2c_read_reg(i2c, adr, 0, &val) < 0) { | 689 | if (i2c_read_reg(i2c, cfg->adr, 0, &val) < 0) { |
| 546 | printk(KERN_ERR "No CXD2099 detected at %02x\n", adr); | 690 | printk(KERN_INFO "No CXD2099 detected at %02x\n", cfg->adr); |
| 547 | return 0; | 691 | return 0; |
| 548 | } | 692 | } |
| 549 | 693 | ||
| @@ -553,21 +697,20 @@ struct dvb_ca_en50221 *cxd2099_attach(u8 adr, void *priv, | |||
| 553 | memset(ci, 0, sizeof(*ci)); | 697 | memset(ci, 0, sizeof(*ci)); |
| 554 | 698 | ||
| 555 | mutex_init(&ci->lock); | 699 | mutex_init(&ci->lock); |
| 700 | memcpy(&ci->cfg, cfg, sizeof(struct cxd2099_cfg)); | ||
| 556 | ci->i2c = i2c; | 701 | ci->i2c = i2c; |
| 557 | ci->adr = adr; | ||
| 558 | ci->lastaddress = 0xff; | 702 | ci->lastaddress = 0xff; |
| 559 | ci->clk_reg_b = 0x4a; | 703 | ci->clk_reg_b = 0x4a; |
| 560 | ci->clk_reg_f = 0x1b; | 704 | ci->clk_reg_f = 0x1b; |
| 561 | ci->bitrate = bitrate; | ||
| 562 | 705 | ||
| 563 | memcpy(&ci->en, &en_templ, sizeof(en_templ)); | 706 | memcpy(&ci->en, &en_templ, sizeof(en_templ)); |
| 564 | ci->en.data = ci; | 707 | ci->en.data = ci; |
| 565 | init(ci); | 708 | init(ci); |
| 566 | printk(KERN_INFO "Attached CXD2099AR at %02x\n", ci->adr); | 709 | printk(KERN_INFO "Attached CXD2099AR at %02x\n", ci->cfg.adr); |
| 567 | return &ci->en; | 710 | return &ci->en; |
| 568 | } | 711 | } |
| 569 | EXPORT_SYMBOL(cxd2099_attach); | 712 | EXPORT_SYMBOL(cxd2099_attach); |
| 570 | 713 | ||
| 571 | MODULE_DESCRIPTION("cxd2099"); | 714 | MODULE_DESCRIPTION("cxd2099"); |
| 572 | MODULE_AUTHOR("Ralph Metzler <rjkm@metzlerbros.de>"); | 715 | MODULE_AUTHOR("Ralph Metzler"); |
| 573 | MODULE_LICENSE("GPL"); | 716 | MODULE_LICENSE("GPL"); |
diff --git a/drivers/staging/cxd2099/cxd2099.h b/drivers/staging/cxd2099/cxd2099.h index bed54ff3e30b..19c588a59588 100644 --- a/drivers/staging/cxd2099/cxd2099.h +++ b/drivers/staging/cxd2099/cxd2099.h | |||
| @@ -1,7 +1,7 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * cxd2099.h: Driver for the CXD2099AR Common Interface Controller | 2 | * cxd2099.h: Driver for the CXD2099AR Common Interface Controller |
| 3 | * | 3 | * |
| 4 | * Copyright (C) 2010 DigitalDevices UG | 4 | * Copyright (C) 2010-2011 Digital Devices GmbH |
| 5 | * | 5 | * |
| 6 | * | 6 | * |
| 7 | * This program is free software; you can redistribute it and/or | 7 | * This program is free software; you can redistribute it and/or |
| @@ -27,11 +27,21 @@ | |||
| 27 | 27 | ||
| 28 | #include <dvb_ca_en50221.h> | 28 | #include <dvb_ca_en50221.h> |
| 29 | 29 | ||
| 30 | struct cxd2099_cfg { | ||
| 31 | u32 bitrate; | ||
| 32 | u8 adr; | ||
| 33 | u8 polarity:1; | ||
| 34 | u8 clock_mode:1; | ||
| 35 | }; | ||
| 36 | |||
| 30 | #if defined(CONFIG_DVB_CXD2099) || \ | 37 | #if defined(CONFIG_DVB_CXD2099) || \ |
| 31 | (defined(CONFIG_DVB_CXD2099_MODULE) && defined(MODULE)) | 38 | (defined(CONFIG_DVB_CXD2099_MODULE) && defined(MODULE)) |
| 32 | struct dvb_ca_en50221 *cxd2099_attach(u8 adr, void *priv, struct i2c_adapter *i2c); | 39 | struct dvb_ca_en50221 *cxd2099_attach(struct cxd2099_cfg *cfg, |
| 40 | void *priv, struct i2c_adapter *i2c); | ||
| 33 | #else | 41 | #else |
| 34 | static inline struct dvb_ca_en50221 *cxd2099_attach(u8 adr, void *priv, struct i2c_adapter *i2c) | 42 | |
| 43 | static inline struct dvb_ca_en50221 *cxd2099_attach(struct cxd2099_cfg *cfg, | ||
| 44 | void *priv, struct i2c_adapter *i2c) | ||
| 35 | { | 45 | { |
| 36 | printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); | 46 | printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); |
| 37 | return NULL; | 47 | return NULL; |
diff --git a/drivers/staging/tm6000/tm6000-alsa.c b/drivers/staging/tm6000/tm6000-alsa.c index ddfd7c33361b..bd5fa89af07c 100644 --- a/drivers/staging/tm6000/tm6000-alsa.c +++ b/drivers/staging/tm6000/tm6000-alsa.c | |||
| @@ -84,7 +84,6 @@ static int _tm6000_start_audio_dma(struct snd_tm6000_card *chip) | |||
| 84 | 84 | ||
| 85 | tm6000_set_audio_bitrate(core, 48000); | 85 | tm6000_set_audio_bitrate(core, 48000); |
| 86 | 86 | ||
| 87 | |||
| 88 | return 0; | 87 | return 0; |
| 89 | } | 88 | } |
| 90 | 89 | ||
| @@ -123,6 +122,7 @@ static int dsp_buffer_alloc(struct snd_pcm_substream *substream, int size) | |||
| 123 | if (substream->runtime->dma_area) { | 122 | if (substream->runtime->dma_area) { |
| 124 | if (substream->runtime->dma_bytes > size) | 123 | if (substream->runtime->dma_bytes > size) |
| 125 | return 0; | 124 | return 0; |
| 125 | |||
| 126 | dsp_buffer_free(substream); | 126 | dsp_buffer_free(substream); |
| 127 | } | 127 | } |
| 128 | 128 | ||
| @@ -152,9 +152,9 @@ static struct snd_pcm_hardware snd_tm6000_digital_hw = { | |||
| 152 | SNDRV_PCM_INFO_MMAP_VALID, | 152 | SNDRV_PCM_INFO_MMAP_VALID, |
| 153 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | 153 | .formats = SNDRV_PCM_FMTBIT_S16_LE, |
| 154 | 154 | ||
| 155 | .rates = SNDRV_PCM_RATE_CONTINUOUS, | 155 | .rates = SNDRV_PCM_RATE_CONTINUOUS, |
| 156 | .rate_min = 48000, | 156 | .rate_min = 48000, |
| 157 | .rate_max = 48000, | 157 | .rate_max = 48000, |
| 158 | .channels_min = 2, | 158 | .channels_min = 2, |
| 159 | .channels_max = 2, | 159 | .channels_max = 2, |
| 160 | .period_bytes_min = 64, | 160 | .period_bytes_min = 64, |
| @@ -254,9 +254,7 @@ static int tm6000_fillbuf(struct tm6000_core *core, char *buf, int size) | |||
| 254 | memcpy(runtime->dma_area + buf_pos * stride, buf, | 254 | memcpy(runtime->dma_area + buf_pos * stride, buf, |
| 255 | length * stride); | 255 | length * stride); |
| 256 | 256 | ||
| 257 | #ifndef NO_PCM_LOCK | ||
| 258 | snd_pcm_stream_lock(substream); | 257 | snd_pcm_stream_lock(substream); |
| 259 | #endif | ||
| 260 | 258 | ||
| 261 | chip->buf_pos += length; | 259 | chip->buf_pos += length; |
| 262 | if (chip->buf_pos >= runtime->buffer_size) | 260 | if (chip->buf_pos >= runtime->buffer_size) |
| @@ -268,9 +266,7 @@ static int tm6000_fillbuf(struct tm6000_core *core, char *buf, int size) | |||
| 268 | period_elapsed = 1; | 266 | period_elapsed = 1; |
| 269 | } | 267 | } |
| 270 | 268 | ||
| 271 | #ifndef NO_PCM_LOCK | ||
| 272 | snd_pcm_stream_unlock(substream); | 269 | snd_pcm_stream_unlock(substream); |
| 273 | #endif | ||
| 274 | 270 | ||
| 275 | if (period_elapsed) | 271 | if (period_elapsed) |
| 276 | snd_pcm_period_elapsed(substream); | 272 | snd_pcm_period_elapsed(substream); |
diff --git a/drivers/usb/gadget/uvc_v4l2.c b/drivers/usb/gadget/uvc_v4l2.c index 5e807f083bc8..52f8f9e513af 100644 --- a/drivers/usb/gadget/uvc_v4l2.c +++ b/drivers/usb/gadget/uvc_v4l2.c | |||
| @@ -124,24 +124,12 @@ uvc_v4l2_open(struct file *file) | |||
| 124 | struct video_device *vdev = video_devdata(file); | 124 | struct video_device *vdev = video_devdata(file); |
| 125 | struct uvc_device *uvc = video_get_drvdata(vdev); | 125 | struct uvc_device *uvc = video_get_drvdata(vdev); |
| 126 | struct uvc_file_handle *handle; | 126 | struct uvc_file_handle *handle; |
| 127 | int ret; | ||
| 128 | 127 | ||
| 129 | handle = kzalloc(sizeof(*handle), GFP_KERNEL); | 128 | handle = kzalloc(sizeof(*handle), GFP_KERNEL); |
| 130 | if (handle == NULL) | 129 | if (handle == NULL) |
| 131 | return -ENOMEM; | 130 | return -ENOMEM; |
| 132 | 131 | ||
| 133 | ret = v4l2_fh_init(&handle->vfh, vdev); | 132 | v4l2_fh_init(&handle->vfh, vdev); |
| 134 | if (ret < 0) | ||
| 135 | goto error; | ||
| 136 | |||
| 137 | ret = v4l2_event_init(&handle->vfh); | ||
| 138 | if (ret < 0) | ||
| 139 | goto error; | ||
| 140 | |||
| 141 | ret = v4l2_event_alloc(&handle->vfh, 8); | ||
| 142 | if (ret < 0) | ||
| 143 | goto error; | ||
| 144 | |||
| 145 | v4l2_fh_add(&handle->vfh); | 133 | v4l2_fh_add(&handle->vfh); |
| 146 | 134 | ||
| 147 | handle->device = &uvc->video; | 135 | handle->device = &uvc->video; |
| @@ -149,10 +137,6 @@ uvc_v4l2_open(struct file *file) | |||
| 149 | 137 | ||
| 150 | uvc_function_connect(uvc); | 138 | uvc_function_connect(uvc); |
| 151 | return 0; | 139 | return 0; |
| 152 | |||
| 153 | error: | ||
| 154 | v4l2_fh_exit(&handle->vfh); | ||
| 155 | return ret; | ||
| 156 | } | 140 | } |
| 157 | 141 | ||
| 158 | static int | 142 | static int |
| @@ -314,7 +298,7 @@ uvc_v4l2_do_ioctl(struct file *file, unsigned int cmd, void *arg) | |||
| 314 | if (sub->type < UVC_EVENT_FIRST || sub->type > UVC_EVENT_LAST) | 298 | if (sub->type < UVC_EVENT_FIRST || sub->type > UVC_EVENT_LAST) |
| 315 | return -EINVAL; | 299 | return -EINVAL; |
| 316 | 300 | ||
| 317 | return v4l2_event_subscribe(&handle->vfh, arg); | 301 | return v4l2_event_subscribe(&handle->vfh, arg, 2); |
| 318 | } | 302 | } |
| 319 | 303 | ||
| 320 | case VIDIOC_UNSUBSCRIBE_EVENT: | 304 | case VIDIOC_UNSUBSCRIBE_EVENT: |
| @@ -354,7 +338,7 @@ uvc_v4l2_poll(struct file *file, poll_table *wait) | |||
| 354 | struct uvc_file_handle *handle = to_uvc_file_handle(file->private_data); | 338 | struct uvc_file_handle *handle = to_uvc_file_handle(file->private_data); |
| 355 | unsigned int mask = 0; | 339 | unsigned int mask = 0; |
| 356 | 340 | ||
| 357 | poll_wait(file, &handle->vfh.events->wait, wait); | 341 | poll_wait(file, &handle->vfh.wait, wait); |
| 358 | if (v4l2_event_pending(&handle->vfh)) | 342 | if (v4l2_event_pending(&handle->vfh)) |
| 359 | mask |= POLLPRI; | 343 | mask |= POLLPRI; |
| 360 | 344 | ||
diff --git a/include/linux/dvb/audio.h b/include/linux/dvb/audio.h index fec66bd24f22..d47bccd604e4 100644 --- a/include/linux/dvb/audio.h +++ b/include/linux/dvb/audio.h | |||
| @@ -67,7 +67,7 @@ typedef struct audio_status { | |||
| 67 | 67 | ||
| 68 | 68 | ||
| 69 | typedef | 69 | typedef |
| 70 | struct audio_karaoke{ /* if Vocal1 or Vocal2 are non-zero, they get mixed */ | 70 | struct audio_karaoke { /* if Vocal1 or Vocal2 are non-zero, they get mixed */ |
| 71 | int vocal1; /* into left and right t at 70% each */ | 71 | int vocal1; /* into left and right t at 70% each */ |
| 72 | int vocal2; /* if both, Vocal1 and Vocal2 are non-zero, Vocal1 gets*/ | 72 | int vocal2; /* if both, Vocal1 and Vocal2 are non-zero, Vocal1 gets*/ |
| 73 | int melody; /* mixed into the left channel and */ | 73 | int melody; /* mixed into the left channel and */ |
diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h index 8a4c309d2344..fca24cc50436 100644 --- a/include/linux/videodev2.h +++ b/include/linux/videodev2.h | |||
| @@ -376,7 +376,16 @@ struct v4l2_pix_format { | |||
| 376 | #define V4L2_PIX_FMT_MJPEG v4l2_fourcc('M', 'J', 'P', 'G') /* Motion-JPEG */ | 376 | #define V4L2_PIX_FMT_MJPEG v4l2_fourcc('M', 'J', 'P', 'G') /* Motion-JPEG */ |
| 377 | #define V4L2_PIX_FMT_JPEG v4l2_fourcc('J', 'P', 'E', 'G') /* JFIF JPEG */ | 377 | #define V4L2_PIX_FMT_JPEG v4l2_fourcc('J', 'P', 'E', 'G') /* JFIF JPEG */ |
| 378 | #define V4L2_PIX_FMT_DV v4l2_fourcc('d', 'v', 's', 'd') /* 1394 */ | 378 | #define V4L2_PIX_FMT_DV v4l2_fourcc('d', 'v', 's', 'd') /* 1394 */ |
| 379 | #define V4L2_PIX_FMT_MPEG v4l2_fourcc('M', 'P', 'E', 'G') /* MPEG-1/2/4 */ | 379 | #define V4L2_PIX_FMT_MPEG v4l2_fourcc('M', 'P', 'E', 'G') /* MPEG-1/2/4 Multiplexed */ |
| 380 | #define V4L2_PIX_FMT_H264 v4l2_fourcc('H', '2', '6', '4') /* H264 with start codes */ | ||
| 381 | #define V4L2_PIX_FMT_H264_NO_SC v4l2_fourcc('A', 'V', 'C', '1') /* H264 without start codes */ | ||
| 382 | #define V4L2_PIX_FMT_H263 v4l2_fourcc('H', '2', '6', '3') /* H263 */ | ||
| 383 | #define V4L2_PIX_FMT_MPEG1 v4l2_fourcc('M', 'P', 'G', '1') /* MPEG-1 ES */ | ||
| 384 | #define V4L2_PIX_FMT_MPEG2 v4l2_fourcc('M', 'P', 'G', '2') /* MPEG-2 ES */ | ||
| 385 | #define V4L2_PIX_FMT_MPEG4 v4l2_fourcc('M', 'P', 'G', '4') /* MPEG-4 ES */ | ||
| 386 | #define V4L2_PIX_FMT_XVID v4l2_fourcc('X', 'V', 'I', 'D') /* Xvid */ | ||
| 387 | #define V4L2_PIX_FMT_VC1_ANNEX_G v4l2_fourcc('V', 'C', '1', 'G') /* SMPTE 421M Annex G compliant stream */ | ||
| 388 | #define V4L2_PIX_FMT_VC1_ANNEX_L v4l2_fourcc('V', 'C', '1', 'L') /* SMPTE 421M Annex L compliant stream */ | ||
| 380 | 389 | ||
| 381 | /* Vendor-specific formats */ | 390 | /* Vendor-specific formats */ |
| 382 | #define V4L2_PIX_FMT_CPIA1 v4l2_fourcc('C', 'P', 'I', 'A') /* cpia1 YUV */ | 391 | #define V4L2_PIX_FMT_CPIA1 v4l2_fourcc('C', 'P', 'I', 'A') /* cpia1 YUV */ |
| @@ -402,6 +411,7 @@ struct v4l2_pix_format { | |||
| 402 | #define V4L2_PIX_FMT_CIT_YYVYUY v4l2_fourcc('C', 'I', 'T', 'V') /* one line of Y then 1 line of VYUY */ | 411 | #define V4L2_PIX_FMT_CIT_YYVYUY v4l2_fourcc('C', 'I', 'T', 'V') /* one line of Y then 1 line of VYUY */ |
| 403 | #define V4L2_PIX_FMT_KONICA420 v4l2_fourcc('K', 'O', 'N', 'I') /* YUV420 planar in blocks of 256 pixels */ | 412 | #define V4L2_PIX_FMT_KONICA420 v4l2_fourcc('K', 'O', 'N', 'I') /* YUV420 planar in blocks of 256 pixels */ |
| 404 | #define V4L2_PIX_FMT_JPGL v4l2_fourcc('J', 'P', 'G', 'L') /* JPEG-Lite */ | 413 | #define V4L2_PIX_FMT_JPGL v4l2_fourcc('J', 'P', 'G', 'L') /* JPEG-Lite */ |
| 414 | #define V4L2_PIX_FMT_SE401 v4l2_fourcc('S', '4', '0', '1') /* se401 janggu compressed rgb */ | ||
| 405 | 415 | ||
| 406 | /* | 416 | /* |
| 407 | * F O R M A T E N U M E R A T I O N | 417 | * F O R M A T E N U M E R A T I O N |
| @@ -1026,6 +1036,7 @@ struct v4l2_ext_controls { | |||
| 1026 | #define V4L2_CTRL_CLASS_MPEG 0x00990000 /* MPEG-compression controls */ | 1036 | #define V4L2_CTRL_CLASS_MPEG 0x00990000 /* MPEG-compression controls */ |
| 1027 | #define V4L2_CTRL_CLASS_CAMERA 0x009a0000 /* Camera class controls */ | 1037 | #define V4L2_CTRL_CLASS_CAMERA 0x009a0000 /* Camera class controls */ |
| 1028 | #define V4L2_CTRL_CLASS_FM_TX 0x009b0000 /* FM Modulator control class */ | 1038 | #define V4L2_CTRL_CLASS_FM_TX 0x009b0000 /* FM Modulator control class */ |
| 1039 | #define V4L2_CTRL_CLASS_FLASH 0x009c0000 /* Camera flash controls */ | ||
| 1029 | 1040 | ||
| 1030 | #define V4L2_CTRL_ID_MASK (0x0fffffff) | 1041 | #define V4L2_CTRL_ID_MASK (0x0fffffff) |
| 1031 | #define V4L2_CTRL_ID2CLASS(id) ((id) & 0x0fff0000UL) | 1042 | #define V4L2_CTRL_ID2CLASS(id) ((id) & 0x0fff0000UL) |
| @@ -1039,6 +1050,7 @@ enum v4l2_ctrl_type { | |||
| 1039 | V4L2_CTRL_TYPE_INTEGER64 = 5, | 1050 | V4L2_CTRL_TYPE_INTEGER64 = 5, |
| 1040 | V4L2_CTRL_TYPE_CTRL_CLASS = 6, | 1051 | V4L2_CTRL_TYPE_CTRL_CLASS = 6, |
| 1041 | V4L2_CTRL_TYPE_STRING = 7, | 1052 | V4L2_CTRL_TYPE_STRING = 7, |
| 1053 | V4L2_CTRL_TYPE_BITMASK = 8, | ||
| 1042 | }; | 1054 | }; |
| 1043 | 1055 | ||
| 1044 | /* Used in the VIDIOC_QUERYCTRL ioctl for querying controls */ | 1056 | /* Used in the VIDIOC_QUERYCTRL ioctl for querying controls */ |
| @@ -1144,14 +1156,19 @@ enum v4l2_colorfx { | |||
| 1144 | #define V4L2_CID_ILLUMINATORS_1 (V4L2_CID_BASE+37) | 1156 | #define V4L2_CID_ILLUMINATORS_1 (V4L2_CID_BASE+37) |
| 1145 | #define V4L2_CID_ILLUMINATORS_2 (V4L2_CID_BASE+38) | 1157 | #define V4L2_CID_ILLUMINATORS_2 (V4L2_CID_BASE+38) |
| 1146 | 1158 | ||
| 1159 | #define V4L2_CID_MIN_BUFFERS_FOR_CAPTURE (V4L2_CID_BASE+39) | ||
| 1160 | #define V4L2_CID_MIN_BUFFERS_FOR_OUTPUT (V4L2_CID_BASE+40) | ||
| 1161 | |||
| 1147 | /* last CID + 1 */ | 1162 | /* last CID + 1 */ |
| 1148 | #define V4L2_CID_LASTP1 (V4L2_CID_BASE+39) | 1163 | #define V4L2_CID_LASTP1 (V4L2_CID_BASE+41) |
| 1164 | |||
| 1165 | /* Minimum number of buffer neede by the device */ | ||
| 1149 | 1166 | ||
| 1150 | /* MPEG-class control IDs defined by V4L2 */ | 1167 | /* MPEG-class control IDs defined by V4L2 */ |
| 1151 | #define V4L2_CID_MPEG_BASE (V4L2_CTRL_CLASS_MPEG | 0x900) | 1168 | #define V4L2_CID_MPEG_BASE (V4L2_CTRL_CLASS_MPEG | 0x900) |
| 1152 | #define V4L2_CID_MPEG_CLASS (V4L2_CTRL_CLASS_MPEG | 1) | 1169 | #define V4L2_CID_MPEG_CLASS (V4L2_CTRL_CLASS_MPEG | 1) |
| 1153 | 1170 | ||
| 1154 | /* MPEG streams */ | 1171 | /* MPEG streams, specific to multiplexed streams */ |
| 1155 | #define V4L2_CID_MPEG_STREAM_TYPE (V4L2_CID_MPEG_BASE+0) | 1172 | #define V4L2_CID_MPEG_STREAM_TYPE (V4L2_CID_MPEG_BASE+0) |
| 1156 | enum v4l2_mpeg_stream_type { | 1173 | enum v4l2_mpeg_stream_type { |
| 1157 | V4L2_MPEG_STREAM_TYPE_MPEG2_PS = 0, /* MPEG-2 program stream */ | 1174 | V4L2_MPEG_STREAM_TYPE_MPEG2_PS = 0, /* MPEG-2 program stream */ |
| @@ -1173,7 +1190,7 @@ enum v4l2_mpeg_stream_vbi_fmt { | |||
| 1173 | V4L2_MPEG_STREAM_VBI_FMT_IVTV = 1, /* VBI in private packets, IVTV format */ | 1190 | V4L2_MPEG_STREAM_VBI_FMT_IVTV = 1, /* VBI in private packets, IVTV format */ |
| 1174 | }; | 1191 | }; |
| 1175 | 1192 | ||
| 1176 | /* MPEG audio */ | 1193 | /* MPEG audio controls specific to multiplexed streams */ |
| 1177 | #define V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ (V4L2_CID_MPEG_BASE+100) | 1194 | #define V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ (V4L2_CID_MPEG_BASE+100) |
| 1178 | enum v4l2_mpeg_audio_sampling_freq { | 1195 | enum v4l2_mpeg_audio_sampling_freq { |
| 1179 | V4L2_MPEG_AUDIO_SAMPLING_FREQ_44100 = 0, | 1196 | V4L2_MPEG_AUDIO_SAMPLING_FREQ_44100 = 0, |
| @@ -1289,7 +1306,7 @@ enum v4l2_mpeg_audio_ac3_bitrate { | |||
| 1289 | V4L2_MPEG_AUDIO_AC3_BITRATE_640K = 18, | 1306 | V4L2_MPEG_AUDIO_AC3_BITRATE_640K = 18, |
| 1290 | }; | 1307 | }; |
| 1291 | 1308 | ||
| 1292 | /* MPEG video */ | 1309 | /* MPEG video controls specific to multiplexed streams */ |
| 1293 | #define V4L2_CID_MPEG_VIDEO_ENCODING (V4L2_CID_MPEG_BASE+200) | 1310 | #define V4L2_CID_MPEG_VIDEO_ENCODING (V4L2_CID_MPEG_BASE+200) |
| 1294 | enum v4l2_mpeg_video_encoding { | 1311 | enum v4l2_mpeg_video_encoding { |
| 1295 | V4L2_MPEG_VIDEO_ENCODING_MPEG_1 = 0, | 1312 | V4L2_MPEG_VIDEO_ENCODING_MPEG_1 = 0, |
| @@ -1317,6 +1334,141 @@ enum v4l2_mpeg_video_bitrate_mode { | |||
| 1317 | #define V4L2_CID_MPEG_VIDEO_TEMPORAL_DECIMATION (V4L2_CID_MPEG_BASE+209) | 1334 | #define V4L2_CID_MPEG_VIDEO_TEMPORAL_DECIMATION (V4L2_CID_MPEG_BASE+209) |
| 1318 | #define V4L2_CID_MPEG_VIDEO_MUTE (V4L2_CID_MPEG_BASE+210) | 1335 | #define V4L2_CID_MPEG_VIDEO_MUTE (V4L2_CID_MPEG_BASE+210) |
| 1319 | #define V4L2_CID_MPEG_VIDEO_MUTE_YUV (V4L2_CID_MPEG_BASE+211) | 1336 | #define V4L2_CID_MPEG_VIDEO_MUTE_YUV (V4L2_CID_MPEG_BASE+211) |
| 1337 | #define V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE (V4L2_CID_MPEG_BASE+212) | ||
| 1338 | #define V4L2_CID_MPEG_VIDEO_DECODER_MPEG4_DEBLOCK_FILTER (V4L2_CID_MPEG_BASE+213) | ||
| 1339 | #define V4L2_CID_MPEG_VIDEO_CYCLIC_INTRA_REFRESH_MB (V4L2_CID_MPEG_BASE+214) | ||
| 1340 | #define V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE (V4L2_CID_MPEG_BASE+215) | ||
| 1341 | #define V4L2_CID_MPEG_VIDEO_HEADER_MODE (V4L2_CID_MPEG_BASE+216) | ||
| 1342 | enum v4l2_mpeg_video_header_mode { | ||
| 1343 | V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE = 0, | ||
| 1344 | V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME = 1, | ||
| 1345 | |||
| 1346 | }; | ||
| 1347 | #define V4L2_CID_MPEG_VIDEO_MAX_REF_PIC (V4L2_CID_MPEG_BASE+217) | ||
| 1348 | #define V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE (V4L2_CID_MPEG_BASE+218) | ||
| 1349 | #define V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES (V4L2_CID_MPEG_BASE+219) | ||
| 1350 | #define V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB (V4L2_CID_MPEG_BASE+220) | ||
| 1351 | #define V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE (V4L2_CID_MPEG_BASE+221) | ||
| 1352 | enum v4l2_mpeg_video_multi_slice_mode { | ||
| 1353 | V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE = 0, | ||
| 1354 | V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB = 1, | ||
| 1355 | V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES = 2, | ||
| 1356 | }; | ||
| 1357 | #define V4L2_CID_MPEG_VIDEO_VBV_SIZE (V4L2_CID_MPEG_BASE+222) | ||
| 1358 | #define V4L2_CID_MPEG_VIDEO_H263_I_FRAME_QP (V4L2_CID_MPEG_BASE+300) | ||
| 1359 | #define V4L2_CID_MPEG_VIDEO_H263_P_FRAME_QP (V4L2_CID_MPEG_BASE+301) | ||
| 1360 | #define V4L2_CID_MPEG_VIDEO_H263_B_FRAME_QP (V4L2_CID_MPEG_BASE+302) | ||
| 1361 | #define V4L2_CID_MPEG_VIDEO_H263_MIN_QP (V4L2_CID_MPEG_BASE+303) | ||
| 1362 | #define V4L2_CID_MPEG_VIDEO_H263_MAX_QP (V4L2_CID_MPEG_BASE+304) | ||
| 1363 | #define V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP (V4L2_CID_MPEG_BASE+350) | ||
| 1364 | #define V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP (V4L2_CID_MPEG_BASE+351) | ||
| 1365 | #define V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP (V4L2_CID_MPEG_BASE+352) | ||
| 1366 | #define V4L2_CID_MPEG_VIDEO_H264_MIN_QP (V4L2_CID_MPEG_BASE+353) | ||
| 1367 | #define V4L2_CID_MPEG_VIDEO_H264_MAX_QP (V4L2_CID_MPEG_BASE+354) | ||
| 1368 | #define V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM (V4L2_CID_MPEG_BASE+355) | ||
| 1369 | #define V4L2_CID_MPEG_VIDEO_H264_CPB_SIZE (V4L2_CID_MPEG_BASE+356) | ||
| 1370 | #define V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE (V4L2_CID_MPEG_BASE+357) | ||
| 1371 | enum v4l2_mpeg_video_h264_entropy_mode { | ||
| 1372 | V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC = 0, | ||
| 1373 | V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC = 1, | ||
| 1374 | }; | ||
| 1375 | #define V4L2_CID_MPEG_VIDEO_H264_I_PERIOD (V4L2_CID_MPEG_BASE+358) | ||
| 1376 | #define V4L2_CID_MPEG_VIDEO_H264_LEVEL (V4L2_CID_MPEG_BASE+359) | ||
| 1377 | enum v4l2_mpeg_video_h264_level { | ||
| 1378 | V4L2_MPEG_VIDEO_H264_LEVEL_1_0 = 0, | ||
| 1379 | V4L2_MPEG_VIDEO_H264_LEVEL_1B = 1, | ||
| 1380 | V4L2_MPEG_VIDEO_H264_LEVEL_1_1 = 2, | ||
| 1381 | V4L2_MPEG_VIDEO_H264_LEVEL_1_2 = 3, | ||
| 1382 | V4L2_MPEG_VIDEO_H264_LEVEL_1_3 = 4, | ||
| 1383 | V4L2_MPEG_VIDEO_H264_LEVEL_2_0 = 5, | ||
| 1384 | V4L2_MPEG_VIDEO_H264_LEVEL_2_1 = 6, | ||
| 1385 | V4L2_MPEG_VIDEO_H264_LEVEL_2_2 = 7, | ||
| 1386 | V4L2_MPEG_VIDEO_H264_LEVEL_3_0 = 8, | ||
| 1387 | V4L2_MPEG_VIDEO_H264_LEVEL_3_1 = 9, | ||
| 1388 | V4L2_MPEG_VIDEO_H264_LEVEL_3_2 = 10, | ||
| 1389 | V4L2_MPEG_VIDEO_H264_LEVEL_4_0 = 11, | ||
| 1390 | V4L2_MPEG_VIDEO_H264_LEVEL_4_1 = 12, | ||
| 1391 | V4L2_MPEG_VIDEO_H264_LEVEL_4_2 = 13, | ||
| 1392 | V4L2_MPEG_VIDEO_H264_LEVEL_5_0 = 14, | ||
| 1393 | V4L2_MPEG_VIDEO_H264_LEVEL_5_1 = 15, | ||
| 1394 | }; | ||
| 1395 | #define V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA (V4L2_CID_MPEG_BASE+360) | ||
| 1396 | #define V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA (V4L2_CID_MPEG_BASE+361) | ||
| 1397 | #define V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE (V4L2_CID_MPEG_BASE+362) | ||
| 1398 | enum v4l2_mpeg_video_h264_loop_filter_mode { | ||
| 1399 | V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED = 0, | ||
| 1400 | V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED = 1, | ||
| 1401 | V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED_AT_SLICE_BOUNDARY = 2, | ||
| 1402 | }; | ||
| 1403 | #define V4L2_CID_MPEG_VIDEO_H264_PROFILE (V4L2_CID_MPEG_BASE+363) | ||
| 1404 | enum v4l2_mpeg_video_h264_profile { | ||
| 1405 | V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE = 0, | ||
| 1406 | V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE = 1, | ||
| 1407 | V4L2_MPEG_VIDEO_H264_PROFILE_MAIN = 2, | ||
| 1408 | V4L2_MPEG_VIDEO_H264_PROFILE_EXTENDED = 3, | ||
| 1409 | V4L2_MPEG_VIDEO_H264_PROFILE_HIGH = 4, | ||
| 1410 | V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10 = 5, | ||
| 1411 | V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_422 = 6, | ||
| 1412 | V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_444_PREDICTIVE = 7, | ||
| 1413 | V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10_INTRA = 8, | ||
| 1414 | V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_422_INTRA = 9, | ||
| 1415 | V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_444_INTRA = 10, | ||
| 1416 | V4L2_MPEG_VIDEO_H264_PROFILE_CAVLC_444_INTRA = 11, | ||
| 1417 | V4L2_MPEG_VIDEO_H264_PROFILE_SCALABLE_BASELINE = 12, | ||
| 1418 | V4L2_MPEG_VIDEO_H264_PROFILE_SCALABLE_HIGH = 13, | ||
| 1419 | V4L2_MPEG_VIDEO_H264_PROFILE_SCALABLE_HIGH_INTRA = 14, | ||
| 1420 | V4L2_MPEG_VIDEO_H264_PROFILE_STEREO_HIGH = 15, | ||
| 1421 | V4L2_MPEG_VIDEO_H264_PROFILE_MULTIVIEW_HIGH = 16, | ||
| 1422 | }; | ||
| 1423 | #define V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_HEIGHT (V4L2_CID_MPEG_BASE+364) | ||
| 1424 | #define V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_WIDTH (V4L2_CID_MPEG_BASE+365) | ||
| 1425 | #define V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_ENABLE (V4L2_CID_MPEG_BASE+366) | ||
| 1426 | #define V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_IDC (V4L2_CID_MPEG_BASE+367) | ||
| 1427 | enum v4l2_mpeg_video_h264_vui_sar_idc { | ||
| 1428 | V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_UNSPECIFIED = 0, | ||
| 1429 | V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_1x1 = 1, | ||
| 1430 | V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_12x11 = 2, | ||
| 1431 | V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_10x11 = 3, | ||
| 1432 | V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_16x11 = 4, | ||
| 1433 | V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_40x33 = 5, | ||
| 1434 | V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_24x11 = 6, | ||
| 1435 | V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_20x11 = 7, | ||
| 1436 | V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_32x11 = 8, | ||
| 1437 | V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_80x33 = 9, | ||
| 1438 | V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_18x11 = 10, | ||
| 1439 | V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_15x11 = 11, | ||
| 1440 | V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_64x33 = 12, | ||
| 1441 | V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_160x99 = 13, | ||
| 1442 | V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_4x3 = 14, | ||
| 1443 | V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_3x2 = 15, | ||
| 1444 | V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_2x1 = 16, | ||
| 1445 | V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED = 17, | ||
| 1446 | }; | ||
| 1447 | #define V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP (V4L2_CID_MPEG_BASE+400) | ||
| 1448 | #define V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP (V4L2_CID_MPEG_BASE+401) | ||
| 1449 | #define V4L2_CID_MPEG_VIDEO_MPEG4_B_FRAME_QP (V4L2_CID_MPEG_BASE+402) | ||
| 1450 | #define V4L2_CID_MPEG_VIDEO_MPEG4_MIN_QP (V4L2_CID_MPEG_BASE+403) | ||
| 1451 | #define V4L2_CID_MPEG_VIDEO_MPEG4_MAX_QP (V4L2_CID_MPEG_BASE+404) | ||
| 1452 | #define V4L2_CID_MPEG_VIDEO_MPEG4_LEVEL (V4L2_CID_MPEG_BASE+405) | ||
| 1453 | enum v4l2_mpeg_video_mpeg4_level { | ||
| 1454 | V4L2_MPEG_VIDEO_MPEG4_LEVEL_0 = 0, | ||
| 1455 | V4L2_MPEG_VIDEO_MPEG4_LEVEL_0B = 1, | ||
| 1456 | V4L2_MPEG_VIDEO_MPEG4_LEVEL_1 = 2, | ||
| 1457 | V4L2_MPEG_VIDEO_MPEG4_LEVEL_2 = 3, | ||
| 1458 | V4L2_MPEG_VIDEO_MPEG4_LEVEL_3 = 4, | ||
| 1459 | V4L2_MPEG_VIDEO_MPEG4_LEVEL_3B = 5, | ||
| 1460 | V4L2_MPEG_VIDEO_MPEG4_LEVEL_4 = 6, | ||
| 1461 | V4L2_MPEG_VIDEO_MPEG4_LEVEL_5 = 7, | ||
| 1462 | }; | ||
| 1463 | #define V4L2_CID_MPEG_VIDEO_MPEG4_PROFILE (V4L2_CID_MPEG_BASE+406) | ||
| 1464 | enum v4l2_mpeg_video_mpeg4_profile { | ||
| 1465 | V4L2_MPEG_VIDEO_MPEG4_PROFILE_SIMPLE = 0, | ||
| 1466 | V4L2_MPEG_VIDEO_MPEG4_PROFILE_ADVANCED_SIMPLE = 1, | ||
| 1467 | V4L2_MPEG_VIDEO_MPEG4_PROFILE_CORE = 2, | ||
| 1468 | V4L2_MPEG_VIDEO_MPEG4_PROFILE_SIMPLE_SCALABLE = 3, | ||
| 1469 | V4L2_MPEG_VIDEO_MPEG4_PROFILE_ADVANCED_CODING_EFFICIENCY = 4, | ||
| 1470 | }; | ||
| 1471 | #define V4L2_CID_MPEG_VIDEO_MPEG4_QPEL (V4L2_CID_MPEG_BASE+407) | ||
| 1320 | 1472 | ||
| 1321 | /* MPEG-class control IDs specific to the CX2341x driver as defined by V4L2 */ | 1473 | /* MPEG-class control IDs specific to the CX2341x driver as defined by V4L2 */ |
| 1322 | #define V4L2_CID_MPEG_CX2341X_BASE (V4L2_CTRL_CLASS_MPEG | 0x1000) | 1474 | #define V4L2_CID_MPEG_CX2341X_BASE (V4L2_CTRL_CLASS_MPEG | 0x1000) |
| @@ -1359,6 +1511,33 @@ enum v4l2_mpeg_cx2341x_video_median_filter_type { | |||
| 1359 | #define V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_TOP (V4L2_CID_MPEG_CX2341X_BASE+10) | 1511 | #define V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_TOP (V4L2_CID_MPEG_CX2341X_BASE+10) |
| 1360 | #define V4L2_CID_MPEG_CX2341X_STREAM_INSERT_NAV_PACKETS (V4L2_CID_MPEG_CX2341X_BASE+11) | 1512 | #define V4L2_CID_MPEG_CX2341X_STREAM_INSERT_NAV_PACKETS (V4L2_CID_MPEG_CX2341X_BASE+11) |
| 1361 | 1513 | ||
| 1514 | /* MPEG-class control IDs specific to the Samsung MFC 5.1 driver as defined by V4L2 */ | ||
| 1515 | #define V4L2_CID_MPEG_MFC51_BASE (V4L2_CTRL_CLASS_MPEG | 0x1100) | ||
| 1516 | |||
| 1517 | #define V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY (V4L2_CID_MPEG_MFC51_BASE+0) | ||
| 1518 | #define V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY_ENABLE (V4L2_CID_MPEG_MFC51_BASE+1) | ||
| 1519 | #define V4L2_CID_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE (V4L2_CID_MPEG_MFC51_BASE+2) | ||
| 1520 | enum v4l2_mpeg_mfc51_video_frame_skip_mode { | ||
| 1521 | V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_DISABLED = 0, | ||
| 1522 | V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT = 1, | ||
| 1523 | V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT = 2, | ||
| 1524 | }; | ||
| 1525 | #define V4L2_CID_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE (V4L2_CID_MPEG_MFC51_BASE+3) | ||
| 1526 | enum v4l2_mpeg_mfc51_video_force_frame_type { | ||
| 1527 | V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_DISABLED = 0, | ||
| 1528 | V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_I_FRAME = 1, | ||
| 1529 | V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_NOT_CODED = 2, | ||
| 1530 | }; | ||
| 1531 | #define V4L2_CID_MPEG_MFC51_VIDEO_PADDING (V4L2_CID_MPEG_MFC51_BASE+4) | ||
| 1532 | #define V4L2_CID_MPEG_MFC51_VIDEO_PADDING_YUV (V4L2_CID_MPEG_MFC51_BASE+5) | ||
| 1533 | #define V4L2_CID_MPEG_MFC51_VIDEO_RC_FIXED_TARGET_BIT (V4L2_CID_MPEG_MFC51_BASE+6) | ||
| 1534 | #define V4L2_CID_MPEG_MFC51_VIDEO_RC_REACTION_COEFF (V4L2_CID_MPEG_MFC51_BASE+7) | ||
| 1535 | #define V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_ACTIVITY (V4L2_CID_MPEG_MFC51_BASE+50) | ||
| 1536 | #define V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_DARK (V4L2_CID_MPEG_MFC51_BASE+51) | ||
| 1537 | #define V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_SMOOTH (V4L2_CID_MPEG_MFC51_BASE+52) | ||
| 1538 | #define V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_STATIC (V4L2_CID_MPEG_MFC51_BASE+53) | ||
| 1539 | #define V4L2_CID_MPEG_MFC51_VIDEO_H264_NUM_REF_PIC_FOR_P (V4L2_CID_MPEG_MFC51_BASE+54) | ||
| 1540 | |||
| 1362 | /* Camera class control IDs */ | 1541 | /* Camera class control IDs */ |
| 1363 | #define V4L2_CID_CAMERA_CLASS_BASE (V4L2_CTRL_CLASS_CAMERA | 0x900) | 1542 | #define V4L2_CID_CAMERA_CLASS_BASE (V4L2_CTRL_CLASS_CAMERA | 0x900) |
| 1364 | #define V4L2_CID_CAMERA_CLASS (V4L2_CTRL_CLASS_CAMERA | 1) | 1543 | #define V4L2_CID_CAMERA_CLASS (V4L2_CTRL_CLASS_CAMERA | 1) |
| @@ -1427,6 +1606,41 @@ enum v4l2_preemphasis { | |||
| 1427 | #define V4L2_CID_TUNE_POWER_LEVEL (V4L2_CID_FM_TX_CLASS_BASE + 113) | 1606 | #define V4L2_CID_TUNE_POWER_LEVEL (V4L2_CID_FM_TX_CLASS_BASE + 113) |
| 1428 | #define V4L2_CID_TUNE_ANTENNA_CAPACITOR (V4L2_CID_FM_TX_CLASS_BASE + 114) | 1607 | #define V4L2_CID_TUNE_ANTENNA_CAPACITOR (V4L2_CID_FM_TX_CLASS_BASE + 114) |
| 1429 | 1608 | ||
| 1609 | /* Flash and privacy (indicator) light controls */ | ||
| 1610 | #define V4L2_CID_FLASH_CLASS_BASE (V4L2_CTRL_CLASS_FLASH | 0x900) | ||
| 1611 | #define V4L2_CID_FLASH_CLASS (V4L2_CTRL_CLASS_FLASH | 1) | ||
| 1612 | |||
| 1613 | #define V4L2_CID_FLASH_LED_MODE (V4L2_CID_FLASH_CLASS_BASE + 1) | ||
| 1614 | enum v4l2_flash_led_mode { | ||
| 1615 | V4L2_FLASH_LED_MODE_NONE, | ||
| 1616 | V4L2_FLASH_LED_MODE_FLASH, | ||
| 1617 | V4L2_FLASH_LED_MODE_TORCH, | ||
| 1618 | }; | ||
| 1619 | |||
| 1620 | #define V4L2_CID_FLASH_STROBE_SOURCE (V4L2_CID_FLASH_CLASS_BASE + 2) | ||
| 1621 | enum v4l2_flash_strobe_source { | ||
| 1622 | V4L2_FLASH_STROBE_SOURCE_SOFTWARE, | ||
| 1623 | V4L2_FLASH_STROBE_SOURCE_EXTERNAL, | ||
| 1624 | }; | ||
| 1625 | |||
| 1626 | #define V4L2_CID_FLASH_STROBE (V4L2_CID_FLASH_CLASS_BASE + 3) | ||
| 1627 | #define V4L2_CID_FLASH_STROBE_STOP (V4L2_CID_FLASH_CLASS_BASE + 4) | ||
| 1628 | #define V4L2_CID_FLASH_STROBE_STATUS (V4L2_CID_FLASH_CLASS_BASE + 5) | ||
| 1629 | |||
| 1630 | #define V4L2_CID_FLASH_TIMEOUT (V4L2_CID_FLASH_CLASS_BASE + 6) | ||
| 1631 | #define V4L2_CID_FLASH_INTENSITY (V4L2_CID_FLASH_CLASS_BASE + 7) | ||
| 1632 | #define V4L2_CID_FLASH_TORCH_INTENSITY (V4L2_CID_FLASH_CLASS_BASE + 8) | ||
| 1633 | #define V4L2_CID_FLASH_INDICATOR_INTENSITY (V4L2_CID_FLASH_CLASS_BASE + 9) | ||
| 1634 | |||
| 1635 | #define V4L2_CID_FLASH_FAULT (V4L2_CID_FLASH_CLASS_BASE + 10) | ||
| 1636 | #define V4L2_FLASH_FAULT_OVER_VOLTAGE (1 << 0) | ||
| 1637 | #define V4L2_FLASH_FAULT_TIMEOUT (1 << 1) | ||
| 1638 | #define V4L2_FLASH_FAULT_OVER_TEMPERATURE (1 << 2) | ||
| 1639 | #define V4L2_FLASH_FAULT_SHORT_CIRCUIT (1 << 3) | ||
| 1640 | |||
| 1641 | #define V4L2_CID_FLASH_CHARGE (V4L2_CID_FLASH_CLASS_BASE + 11) | ||
| 1642 | #define V4L2_CID_FLASH_READY (V4L2_CID_FLASH_CLASS_BASE + 12) | ||
| 1643 | |||
| 1430 | /* | 1644 | /* |
| 1431 | * T U N I N G | 1645 | * T U N I N G |
| 1432 | */ | 1646 | */ |
| @@ -1791,6 +2005,7 @@ struct v4l2_streamparm { | |||
| 1791 | #define V4L2_EVENT_ALL 0 | 2005 | #define V4L2_EVENT_ALL 0 |
| 1792 | #define V4L2_EVENT_VSYNC 1 | 2006 | #define V4L2_EVENT_VSYNC 1 |
| 1793 | #define V4L2_EVENT_EOS 2 | 2007 | #define V4L2_EVENT_EOS 2 |
| 2008 | #define V4L2_EVENT_CTRL 3 | ||
| 1794 | #define V4L2_EVENT_PRIVATE_START 0x08000000 | 2009 | #define V4L2_EVENT_PRIVATE_START 0x08000000 |
| 1795 | 2010 | ||
| 1796 | /* Payload for V4L2_EVENT_VSYNC */ | 2011 | /* Payload for V4L2_EVENT_VSYNC */ |
| @@ -1799,21 +2014,46 @@ struct v4l2_event_vsync { | |||
| 1799 | __u8 field; | 2014 | __u8 field; |
| 1800 | } __attribute__ ((packed)); | 2015 | } __attribute__ ((packed)); |
| 1801 | 2016 | ||
| 2017 | /* Payload for V4L2_EVENT_CTRL */ | ||
| 2018 | #define V4L2_EVENT_CTRL_CH_VALUE (1 << 0) | ||
| 2019 | #define V4L2_EVENT_CTRL_CH_FLAGS (1 << 1) | ||
| 2020 | |||
| 2021 | struct v4l2_event_ctrl { | ||
| 2022 | __u32 changes; | ||
| 2023 | __u32 type; | ||
| 2024 | union { | ||
| 2025 | __s32 value; | ||
| 2026 | __s64 value64; | ||
| 2027 | }; | ||
| 2028 | __u32 flags; | ||
| 2029 | __s32 minimum; | ||
| 2030 | __s32 maximum; | ||
| 2031 | __s32 step; | ||
| 2032 | __s32 default_value; | ||
| 2033 | }; | ||
| 2034 | |||
| 1802 | struct v4l2_event { | 2035 | struct v4l2_event { |
| 1803 | __u32 type; | 2036 | __u32 type; |
| 1804 | union { | 2037 | union { |
| 1805 | struct v4l2_event_vsync vsync; | 2038 | struct v4l2_event_vsync vsync; |
| 2039 | struct v4l2_event_ctrl ctrl; | ||
| 1806 | __u8 data[64]; | 2040 | __u8 data[64]; |
| 1807 | } u; | 2041 | } u; |
| 1808 | __u32 pending; | 2042 | __u32 pending; |
| 1809 | __u32 sequence; | 2043 | __u32 sequence; |
| 1810 | struct timespec timestamp; | 2044 | struct timespec timestamp; |
| 1811 | __u32 reserved[9]; | 2045 | __u32 id; |
| 2046 | __u32 reserved[8]; | ||
| 1812 | }; | 2047 | }; |
| 1813 | 2048 | ||
| 2049 | #define V4L2_EVENT_SUB_FL_SEND_INITIAL (1 << 0) | ||
| 2050 | #define V4L2_EVENT_SUB_FL_ALLOW_FEEDBACK (1 << 1) | ||
| 2051 | |||
| 1814 | struct v4l2_event_subscription { | 2052 | struct v4l2_event_subscription { |
| 1815 | __u32 type; | 2053 | __u32 type; |
| 1816 | __u32 reserved[7]; | 2054 | __u32 id; |
| 2055 | __u32 flags; | ||
| 2056 | __u32 reserved[5]; | ||
| 1817 | }; | 2057 | }; |
| 1818 | 2058 | ||
| 1819 | /* | 2059 | /* |
diff --git a/include/media/adp1653.h b/include/media/adp1653.h new file mode 100644 index 000000000000..50a1af88aed0 --- /dev/null +++ b/include/media/adp1653.h | |||
| @@ -0,0 +1,126 @@ | |||
| 1 | /* | ||
| 2 | * include/media/adp1653.h | ||
| 3 | * | ||
| 4 | * Copyright (C) 2008--2011 Nokia Corporation | ||
| 5 | * | ||
| 6 | * Contact: Sakari Ailus <sakari.ailus@maxwell.research.nokia.com> | ||
| 7 | * | ||
| 8 | * Contributors: | ||
| 9 | * Sakari Ailus <sakari.ailus@maxwell.research.nokia.com> | ||
| 10 | * Tuukka Toivonen <tuukkat76@gmail.com> | ||
| 11 | * | ||
| 12 | * This program is free software; you can redistribute it and/or | ||
| 13 | * modify it under the terms of the GNU General Public License | ||
| 14 | * version 2 as published by the Free Software Foundation. | ||
| 15 | * | ||
| 16 | * This program is distributed in the hope that it will be useful, but | ||
| 17 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
| 19 | * General Public License for more details. | ||
| 20 | * | ||
| 21 | * You should have received a copy of the GNU General Public License | ||
| 22 | * along with this program; if not, write to the Free Software | ||
| 23 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | ||
| 24 | * 02110-1301 USA | ||
| 25 | * | ||
| 26 | */ | ||
| 27 | |||
| 28 | #ifndef ADP1653_H | ||
| 29 | #define ADP1653_H | ||
| 30 | |||
| 31 | #include <linux/i2c.h> | ||
| 32 | #include <linux/mutex.h> | ||
| 33 | #include <linux/videodev2.h> | ||
| 34 | #include <media/v4l2-ctrls.h> | ||
| 35 | #include <media/v4l2-subdev.h> | ||
| 36 | |||
| 37 | #define ADP1653_NAME "adp1653" | ||
| 38 | #define ADP1653_I2C_ADDR (0x60 >> 1) | ||
| 39 | |||
| 40 | /* Register definitions */ | ||
| 41 | #define ADP1653_REG_OUT_SEL 0x00 | ||
| 42 | #define ADP1653_REG_OUT_SEL_HPLED_TORCH_MIN 0x01 | ||
| 43 | #define ADP1653_REG_OUT_SEL_HPLED_TORCH_MAX 0x0b | ||
| 44 | #define ADP1653_REG_OUT_SEL_HPLED_FLASH_MIN 0x0c | ||
| 45 | #define ADP1653_REG_OUT_SEL_HPLED_FLASH_MAX 0x1f | ||
| 46 | #define ADP1653_REG_OUT_SEL_HPLED_SHIFT 3 | ||
| 47 | #define ADP1653_REG_OUT_SEL_ILED_MAX 0x07 | ||
| 48 | #define ADP1653_REG_OUT_SEL_ILED_SHIFT 0 | ||
| 49 | |||
| 50 | #define ADP1653_REG_CONFIG 0x01 | ||
| 51 | #define ADP1653_REG_CONFIG_TMR_CFG (1 << 4) | ||
| 52 | #define ADP1653_REG_CONFIG_TMR_SET_MAX 0x0f | ||
| 53 | #define ADP1653_REG_CONFIG_TMR_SET_SHIFT 0 | ||
| 54 | |||
| 55 | #define ADP1653_REG_SW_STROBE 0x02 | ||
| 56 | #define ADP1653_REG_SW_STROBE_SW_STROBE (1 << 0) | ||
| 57 | |||
| 58 | #define ADP1653_REG_FAULT 0x03 | ||
| 59 | #define ADP1653_REG_FAULT_FLT_SCP (1 << 3) | ||
| 60 | #define ADP1653_REG_FAULT_FLT_OT (1 << 2) | ||
| 61 | #define ADP1653_REG_FAULT_FLT_TMR (1 << 1) | ||
| 62 | #define ADP1653_REG_FAULT_FLT_OV (1 << 0) | ||
| 63 | |||
| 64 | #define ADP1653_INDICATOR_INTENSITY_MIN 0 | ||
| 65 | #define ADP1653_INDICATOR_INTENSITY_STEP 2500 | ||
| 66 | #define ADP1653_INDICATOR_INTENSITY_MAX \ | ||
| 67 | (ADP1653_REG_OUT_SEL_ILED_MAX * ADP1653_INDICATOR_INTENSITY_STEP) | ||
| 68 | #define ADP1653_INDICATOR_INTENSITY_uA_TO_REG(a) \ | ||
| 69 | ((a) / ADP1653_INDICATOR_INTENSITY_STEP) | ||
| 70 | #define ADP1653_INDICATOR_INTENSITY_REG_TO_uA(a) \ | ||
| 71 | ((a) * ADP1653_INDICATOR_INTENSITY_STEP) | ||
| 72 | |||
| 73 | #define ADP1653_FLASH_INTENSITY_BASE 35 | ||
| 74 | #define ADP1653_FLASH_INTENSITY_STEP 15 | ||
| 75 | #define ADP1653_FLASH_INTENSITY_MIN \ | ||
| 76 | (ADP1653_FLASH_INTENSITY_BASE \ | ||
| 77 | + ADP1653_REG_OUT_SEL_HPLED_FLASH_MIN * ADP1653_FLASH_INTENSITY_STEP) | ||
| 78 | #define ADP1653_FLASH_INTENSITY_MAX \ | ||
| 79 | (ADP1653_FLASH_INTENSITY_MIN + \ | ||
| 80 | (ADP1653_REG_OUT_SEL_HPLED_FLASH_MAX - \ | ||
| 81 | ADP1653_REG_OUT_SEL_HPLED_FLASH_MIN + 1) * \ | ||
| 82 | ADP1653_FLASH_INTENSITY_STEP) | ||
| 83 | |||
| 84 | #define ADP1653_FLASH_INTENSITY_mA_TO_REG(a) \ | ||
| 85 | ((a) < ADP1653_FLASH_INTENSITY_BASE ? 0 : \ | ||
| 86 | (((a) - ADP1653_FLASH_INTENSITY_BASE) / ADP1653_FLASH_INTENSITY_STEP)) | ||
| 87 | #define ADP1653_FLASH_INTENSITY_REG_TO_mA(a) \ | ||
| 88 | ((a) * ADP1653_FLASH_INTENSITY_STEP + ADP1653_FLASH_INTENSITY_BASE) | ||
| 89 | |||
| 90 | #define ADP1653_TORCH_INTENSITY_MIN \ | ||
| 91 | (ADP1653_FLASH_INTENSITY_BASE \ | ||
| 92 | + ADP1653_REG_OUT_SEL_HPLED_TORCH_MIN * ADP1653_FLASH_INTENSITY_STEP) | ||
| 93 | #define ADP1653_TORCH_INTENSITY_MAX \ | ||
| 94 | (ADP1653_TORCH_INTENSITY_MIN + \ | ||
| 95 | (ADP1653_REG_OUT_SEL_HPLED_TORCH_MAX - \ | ||
| 96 | ADP1653_REG_OUT_SEL_HPLED_TORCH_MIN + 1) * \ | ||
| 97 | ADP1653_FLASH_INTENSITY_STEP) | ||
| 98 | |||
| 99 | struct adp1653_platform_data { | ||
| 100 | int (*power)(struct v4l2_subdev *sd, int on); | ||
| 101 | |||
| 102 | u32 max_flash_timeout; /* flash light timeout in us */ | ||
| 103 | u32 max_flash_intensity; /* led intensity, flash mode */ | ||
| 104 | u32 max_torch_intensity; /* led intensity, torch mode */ | ||
| 105 | u32 max_indicator_intensity; /* indicator led intensity */ | ||
| 106 | }; | ||
| 107 | |||
| 108 | #define to_adp1653_flash(sd) container_of(sd, struct adp1653_flash, subdev) | ||
| 109 | |||
| 110 | struct adp1653_flash { | ||
| 111 | struct v4l2_subdev subdev; | ||
| 112 | struct adp1653_platform_data *platform_data; | ||
| 113 | |||
| 114 | struct v4l2_ctrl_handler ctrls; | ||
| 115 | struct v4l2_ctrl *led_mode; | ||
| 116 | struct v4l2_ctrl *flash_timeout; | ||
| 117 | struct v4l2_ctrl *flash_intensity; | ||
| 118 | struct v4l2_ctrl *torch_intensity; | ||
| 119 | struct v4l2_ctrl *indicator_intensity; | ||
| 120 | |||
| 121 | struct mutex power_lock; | ||
| 122 | int power_count; | ||
| 123 | int fault; | ||
| 124 | }; | ||
| 125 | |||
| 126 | #endif /* ADP1653_H */ | ||
diff --git a/include/media/atmel-isi.h b/include/media/atmel-isi.h new file mode 100644 index 000000000000..26cece595121 --- /dev/null +++ b/include/media/atmel-isi.h | |||
| @@ -0,0 +1,119 @@ | |||
| 1 | /* | ||
| 2 | * Register definitions for the Atmel Image Sensor Interface. | ||
| 3 | * | ||
| 4 | * Copyright (C) 2011 Atmel Corporation | ||
| 5 | * Josh Wu, <josh.wu@atmel.com> | ||
| 6 | * | ||
| 7 | * Based on previous work by Lars Haring, <lars.haring@atmel.com> | ||
| 8 | * and Sedji Gaouaou | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | */ | ||
| 14 | #ifndef __ATMEL_ISI_H__ | ||
| 15 | #define __ATMEL_ISI_H__ | ||
| 16 | |||
| 17 | #include <linux/types.h> | ||
| 18 | |||
| 19 | /* ISI_V2 register offsets */ | ||
| 20 | #define ISI_CFG1 0x0000 | ||
| 21 | #define ISI_CFG2 0x0004 | ||
| 22 | #define ISI_PSIZE 0x0008 | ||
| 23 | #define ISI_PDECF 0x000c | ||
| 24 | #define ISI_Y2R_SET0 0x0010 | ||
| 25 | #define ISI_Y2R_SET1 0x0014 | ||
| 26 | #define ISI_R2Y_SET0 0x0018 | ||
| 27 | #define ISI_R2Y_SET1 0x001C | ||
| 28 | #define ISI_R2Y_SET2 0x0020 | ||
| 29 | #define ISI_CTRL 0x0024 | ||
| 30 | #define ISI_STATUS 0x0028 | ||
| 31 | #define ISI_INTEN 0x002C | ||
| 32 | #define ISI_INTDIS 0x0030 | ||
| 33 | #define ISI_INTMASK 0x0034 | ||
| 34 | #define ISI_DMA_CHER 0x0038 | ||
| 35 | #define ISI_DMA_CHDR 0x003C | ||
| 36 | #define ISI_DMA_CHSR 0x0040 | ||
| 37 | #define ISI_DMA_P_ADDR 0x0044 | ||
| 38 | #define ISI_DMA_P_CTRL 0x0048 | ||
| 39 | #define ISI_DMA_P_DSCR 0x004C | ||
| 40 | #define ISI_DMA_C_ADDR 0x0050 | ||
| 41 | #define ISI_DMA_C_CTRL 0x0054 | ||
| 42 | #define ISI_DMA_C_DSCR 0x0058 | ||
| 43 | |||
| 44 | /* Bitfields in CFG1 */ | ||
| 45 | #define ISI_CFG1_HSYNC_POL_ACTIVE_LOW (1 << 2) | ||
| 46 | #define ISI_CFG1_VSYNC_POL_ACTIVE_LOW (1 << 3) | ||
| 47 | #define ISI_CFG1_PIXCLK_POL_ACTIVE_FALLING (1 << 4) | ||
| 48 | #define ISI_CFG1_EMB_SYNC (1 << 6) | ||
| 49 | #define ISI_CFG1_CRC_SYNC (1 << 7) | ||
| 50 | /* Constants for FRATE(ISI_V2) */ | ||
| 51 | #define ISI_CFG1_FRATE_CAPTURE_ALL (0 << 8) | ||
| 52 | #define ISI_CFG1_FRATE_DIV_2 (1 << 8) | ||
| 53 | #define ISI_CFG1_FRATE_DIV_3 (2 << 8) | ||
| 54 | #define ISI_CFG1_FRATE_DIV_4 (3 << 8) | ||
| 55 | #define ISI_CFG1_FRATE_DIV_5 (4 << 8) | ||
| 56 | #define ISI_CFG1_FRATE_DIV_6 (5 << 8) | ||
| 57 | #define ISI_CFG1_FRATE_DIV_7 (6 << 8) | ||
| 58 | #define ISI_CFG1_FRATE_DIV_8 (7 << 8) | ||
| 59 | #define ISI_CFG1_DISCR (1 << 11) | ||
| 60 | #define ISI_CFG1_FULL_MODE (1 << 12) | ||
| 61 | |||
| 62 | /* Bitfields in CFG2 */ | ||
| 63 | #define ISI_CFG2_GRAYSCALE (1 << 13) | ||
| 64 | /* Constants for YCC_SWAP(ISI_V2) */ | ||
| 65 | #define ISI_CFG2_YCC_SWAP_DEFAULT (0 << 28) | ||
| 66 | #define ISI_CFG2_YCC_SWAP_MODE_1 (1 << 28) | ||
| 67 | #define ISI_CFG2_YCC_SWAP_MODE_2 (2 << 28) | ||
| 68 | #define ISI_CFG2_YCC_SWAP_MODE_3 (3 << 28) | ||
| 69 | #define ISI_CFG2_IM_VSIZE_OFFSET 0 | ||
| 70 | #define ISI_CFG2_IM_HSIZE_OFFSET 16 | ||
| 71 | #define ISI_CFG2_IM_VSIZE_MASK (0x7FF << ISI_CFG2_IM_VSIZE_OFFSET) | ||
| 72 | #define ISI_CFG2_IM_HSIZE_MASK (0x7FF << ISI_CFG2_IM_HSIZE_OFFSET) | ||
| 73 | |||
| 74 | /* Bitfields in CTRL */ | ||
| 75 | /* Also using in SR(ISI_V2) */ | ||
| 76 | #define ISI_CTRL_EN (1 << 0) | ||
| 77 | #define ISI_CTRL_CDC (1 << 8) | ||
| 78 | /* Also using in SR/IER/IDR/IMR(ISI_V2) */ | ||
| 79 | #define ISI_CTRL_DIS (1 << 1) | ||
| 80 | #define ISI_CTRL_SRST (1 << 2) | ||
| 81 | |||
| 82 | /* Bitfields in SR */ | ||
| 83 | #define ISI_SR_SIP (1 << 19) | ||
| 84 | /* Also using in SR/IER/IDR/IMR */ | ||
| 85 | #define ISI_SR_VSYNC (1 << 10) | ||
| 86 | #define ISI_SR_PXFR_DONE (1 << 16) | ||
| 87 | #define ISI_SR_CXFR_DONE (1 << 17) | ||
| 88 | #define ISI_SR_P_OVR (1 << 24) | ||
| 89 | #define ISI_SR_C_OVR (1 << 25) | ||
| 90 | #define ISI_SR_CRC_ERR (1 << 26) | ||
| 91 | #define ISI_SR_FR_OVR (1 << 27) | ||
| 92 | |||
| 93 | /* Bitfields in DMA_C_CTRL & in DMA_P_CTRL */ | ||
| 94 | #define ISI_DMA_CTRL_FETCH (1 << 0) | ||
| 95 | #define ISI_DMA_CTRL_WB (1 << 1) | ||
| 96 | #define ISI_DMA_CTRL_IEN (1 << 2) | ||
| 97 | #define ISI_DMA_CTRL_DONE (1 << 3) | ||
| 98 | |||
| 99 | /* Bitfields in DMA_CHSR/CHER/CHDR */ | ||
| 100 | #define ISI_DMA_CHSR_P_CH (1 << 0) | ||
| 101 | #define ISI_DMA_CHSR_C_CH (1 << 1) | ||
| 102 | |||
| 103 | /* Definition for isi_platform_data */ | ||
| 104 | #define ISI_DATAWIDTH_8 0x01 | ||
| 105 | #define ISI_DATAWIDTH_10 0x02 | ||
| 106 | |||
| 107 | struct isi_platform_data { | ||
| 108 | u8 has_emb_sync; | ||
| 109 | u8 emb_crc_sync; | ||
| 110 | u8 hsync_act_low; | ||
| 111 | u8 vsync_act_low; | ||
| 112 | u8 pclk_act_falling; | ||
| 113 | u8 isi_full_mode; | ||
| 114 | u32 data_width_flags; | ||
| 115 | /* Using for ISI_CFG1 */ | ||
| 116 | u32 frate; | ||
| 117 | }; | ||
| 118 | |||
| 119 | #endif /* __ATMEL_ISI_H__ */ | ||
diff --git a/include/media/davinci/vpbe.h b/include/media/davinci/vpbe.h new file mode 100644 index 000000000000..8b11fb037980 --- /dev/null +++ b/include/media/davinci/vpbe.h | |||
| @@ -0,0 +1,184 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2010 Texas Instruments Inc | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or modify | ||
| 5 | * it under the terms of the GNU General Public License as published by | ||
| 6 | * the Free Software Foundation version 2. | ||
| 7 | * | ||
| 8 | * This program is distributed in the hope that it will be useful, | ||
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 11 | * GNU General Public License for more details. | ||
| 12 | * | ||
| 13 | * You should have received a copy of the GNU General Public License | ||
| 14 | * along with this program; if not, write to the Free Software | ||
| 15 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 16 | */ | ||
| 17 | #ifndef _VPBE_H | ||
| 18 | #define _VPBE_H | ||
| 19 | |||
| 20 | #include <linux/videodev2.h> | ||
| 21 | #include <linux/i2c.h> | ||
| 22 | |||
| 23 | #include <media/v4l2-dev.h> | ||
| 24 | #include <media/v4l2-ioctl.h> | ||
| 25 | #include <media/v4l2-device.h> | ||
| 26 | #include <media/davinci/vpbe_osd.h> | ||
| 27 | #include <media/davinci/vpbe_venc.h> | ||
| 28 | #include <media/davinci/vpbe_types.h> | ||
| 29 | |||
| 30 | /* OSD configuration info */ | ||
| 31 | struct osd_config_info { | ||
| 32 | char module_name[32]; | ||
| 33 | }; | ||
| 34 | |||
| 35 | struct vpbe_output { | ||
| 36 | struct v4l2_output output; | ||
| 37 | /* | ||
| 38 | * If output capabilities include dv_preset, list supported presets | ||
| 39 | * below | ||
| 40 | */ | ||
| 41 | char *subdev_name; | ||
| 42 | /* | ||
| 43 | * defualt_mode identifies the default timings set at the venc or | ||
| 44 | * external encoder. | ||
| 45 | */ | ||
| 46 | char *default_mode; | ||
| 47 | /* | ||
| 48 | * Fields below are used for supporting multiple modes. For example, | ||
| 49 | * LCD panel might support different modes and they are listed here. | ||
| 50 | * Similarly for supporting external encoders, lcd controller port | ||
| 51 | * requires a set of non-standard timing values to be listed here for | ||
| 52 | * each supported mode since venc is used in non-standard timing mode | ||
| 53 | * for interfacing with external encoder similar to configuring lcd | ||
| 54 | * panel timings | ||
| 55 | */ | ||
| 56 | unsigned int num_modes; | ||
| 57 | struct vpbe_enc_mode_info *modes; | ||
| 58 | /* | ||
| 59 | * Bus configuration goes here for external encoders. Some encoders | ||
| 60 | * may require multiple interface types for each of the output. For | ||
| 61 | * example, SD modes would use YCC8 where as HD mode would use YCC16. | ||
| 62 | * Not sure if this is needed on a per mode basis instead of per | ||
| 63 | * output basis. If per mode is needed, we may have to move this to | ||
| 64 | * mode_info structure | ||
| 65 | */ | ||
| 66 | }; | ||
| 67 | |||
| 68 | /* encoder configuration info */ | ||
| 69 | struct encoder_config_info { | ||
| 70 | char module_name[32]; | ||
| 71 | /* Is this an i2c device ? */ | ||
| 72 | unsigned int is_i2c:1; | ||
| 73 | /* i2c subdevice board info */ | ||
| 74 | struct i2c_board_info board_info; | ||
| 75 | }; | ||
| 76 | |||
| 77 | /* structure for defining vpbe display subsystem components */ | ||
| 78 | struct vpbe_config { | ||
| 79 | char module_name[32]; | ||
| 80 | /* i2c bus adapter no */ | ||
| 81 | int i2c_adapter_id; | ||
| 82 | struct osd_config_info osd; | ||
| 83 | struct encoder_config_info venc; | ||
| 84 | /* external encoder information goes here */ | ||
| 85 | int num_ext_encoders; | ||
| 86 | struct encoder_config_info *ext_encoders; | ||
| 87 | int num_outputs; | ||
| 88 | /* Order is venc outputs followed by LCD and then external encoders */ | ||
| 89 | struct vpbe_output *outputs; | ||
| 90 | }; | ||
| 91 | |||
| 92 | struct vpbe_device; | ||
| 93 | |||
| 94 | struct vpbe_device_ops { | ||
| 95 | /* crop cap for the display */ | ||
| 96 | int (*g_cropcap)(struct vpbe_device *vpbe_dev, | ||
| 97 | struct v4l2_cropcap *cropcap); | ||
| 98 | |||
| 99 | /* Enumerate the outputs */ | ||
| 100 | int (*enum_outputs)(struct vpbe_device *vpbe_dev, | ||
| 101 | struct v4l2_output *output); | ||
| 102 | |||
| 103 | /* Set output to the given index */ | ||
| 104 | int (*set_output)(struct vpbe_device *vpbe_dev, | ||
| 105 | int index); | ||
| 106 | |||
| 107 | /* Get current output */ | ||
| 108 | unsigned int (*get_output)(struct vpbe_device *vpbe_dev); | ||
| 109 | |||
| 110 | /* Set DV preset at current output */ | ||
| 111 | int (*s_dv_preset)(struct vpbe_device *vpbe_dev, | ||
| 112 | struct v4l2_dv_preset *dv_preset); | ||
| 113 | |||
| 114 | /* Get DV presets supported at the output */ | ||
| 115 | int (*g_dv_preset)(struct vpbe_device *vpbe_dev, | ||
| 116 | struct v4l2_dv_preset *dv_preset); | ||
| 117 | |||
| 118 | /* Enumerate the DV Presets supported at the output */ | ||
| 119 | int (*enum_dv_presets)(struct vpbe_device *vpbe_dev, | ||
| 120 | struct v4l2_dv_enum_preset *preset_info); | ||
| 121 | |||
| 122 | /* Set std at the output */ | ||
| 123 | int (*s_std)(struct vpbe_device *vpbe_dev, v4l2_std_id *std_id); | ||
| 124 | |||
| 125 | /* Get the current std at the output */ | ||
| 126 | int (*g_std)(struct vpbe_device *vpbe_dev, v4l2_std_id *std_id); | ||
| 127 | |||
| 128 | /* initialize the device */ | ||
| 129 | int (*initialize)(struct device *dev, struct vpbe_device *vpbe_dev); | ||
| 130 | |||
| 131 | /* De-initialize the device */ | ||
| 132 | void (*deinitialize)(struct device *dev, struct vpbe_device *vpbe_dev); | ||
| 133 | |||
| 134 | /* Get the current mode info */ | ||
| 135 | int (*get_mode_info)(struct vpbe_device *vpbe_dev, | ||
| 136 | struct vpbe_enc_mode_info*); | ||
| 137 | |||
| 138 | /* | ||
| 139 | * Set the current mode in the encoder. Alternate way of setting | ||
| 140 | * standard or DV preset or custom timings in the encoder | ||
| 141 | */ | ||
| 142 | int (*set_mode)(struct vpbe_device *vpbe_dev, | ||
| 143 | struct vpbe_enc_mode_info*); | ||
| 144 | /* Power management operations */ | ||
| 145 | int (*suspend)(struct vpbe_device *vpbe_dev); | ||
| 146 | int (*resume)(struct vpbe_device *vpbe_dev); | ||
| 147 | }; | ||
| 148 | |||
| 149 | /* struct for vpbe device */ | ||
| 150 | struct vpbe_device { | ||
| 151 | /* V4l2 device */ | ||
| 152 | struct v4l2_device v4l2_dev; | ||
| 153 | /* vpbe dispay controller cfg */ | ||
| 154 | struct vpbe_config *cfg; | ||
| 155 | /* parent device */ | ||
| 156 | struct device *pdev; | ||
| 157 | /* external encoder v4l2 sub devices */ | ||
| 158 | struct v4l2_subdev **encoders; | ||
| 159 | /* current encoder index */ | ||
| 160 | int current_sd_index; | ||
| 161 | struct mutex lock; | ||
| 162 | /* device initialized */ | ||
| 163 | int initialized; | ||
| 164 | /* vpbe dac clock */ | ||
| 165 | struct clk *dac_clk; | ||
| 166 | /* osd_device pointer */ | ||
| 167 | struct osd_state *osd_device; | ||
| 168 | /* | ||
| 169 | * fields below are accessed by users of vpbe_device. Not the | ||
| 170 | * ones above | ||
| 171 | */ | ||
| 172 | |||
| 173 | /* current output */ | ||
| 174 | int current_out_index; | ||
| 175 | /* lock used by caller to do atomic operation on vpbe device */ | ||
| 176 | /* current timings set in the controller */ | ||
| 177 | struct vpbe_enc_mode_info current_timings; | ||
| 178 | /* venc sub device */ | ||
| 179 | struct v4l2_subdev *venc; | ||
| 180 | /* device operations below */ | ||
| 181 | struct vpbe_device_ops ops; | ||
| 182 | }; | ||
| 183 | |||
| 184 | #endif | ||
diff --git a/include/media/davinci/vpbe_display.h b/include/media/davinci/vpbe_display.h new file mode 100644 index 000000000000..dbf6b37682cd --- /dev/null +++ b/include/media/davinci/vpbe_display.h | |||
| @@ -0,0 +1,147 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or | ||
| 5 | * modify it under the terms of the GNU General Public License as | ||
| 6 | * published by the Free Software Foundation version 2. | ||
| 7 | * | ||
| 8 | * This program is distributed WITHOUT ANY WARRANTY of any | ||
| 9 | * kind, whether express or implied; without even the implied warranty | ||
| 10 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 11 | * GNU General Public License for more details. | ||
| 12 | */ | ||
| 13 | #ifndef VPBE_DISPLAY_H | ||
| 14 | #define VPBE_DISPLAY_H | ||
| 15 | |||
| 16 | /* Header files */ | ||
| 17 | #include <linux/videodev2.h> | ||
| 18 | #include <media/v4l2-common.h> | ||
| 19 | #include <media/videobuf-dma-contig.h> | ||
| 20 | #include <media/davinci/vpbe_types.h> | ||
| 21 | #include <media/davinci/vpbe_osd.h> | ||
| 22 | #include <media/davinci/vpbe.h> | ||
| 23 | |||
| 24 | #define VPBE_DISPLAY_MAX_DEVICES 2 | ||
| 25 | |||
| 26 | enum vpbe_display_device_id { | ||
| 27 | VPBE_DISPLAY_DEVICE_0, | ||
| 28 | VPBE_DISPLAY_DEVICE_1 | ||
| 29 | }; | ||
| 30 | |||
| 31 | #define VPBE_DISPLAY_DRV_NAME "vpbe-display" | ||
| 32 | |||
| 33 | #define VPBE_DISPLAY_MAJOR_RELEASE 1 | ||
| 34 | #define VPBE_DISPLAY_MINOR_RELEASE 0 | ||
| 35 | #define VPBE_DISPLAY_BUILD 1 | ||
| 36 | #define VPBE_DISPLAY_VERSION_CODE ((VPBE_DISPLAY_MAJOR_RELEASE << 16) | \ | ||
| 37 | (VPBE_DISPLAY_MINOR_RELEASE << 8) | \ | ||
| 38 | VPBE_DISPLAY_BUILD) | ||
| 39 | |||
| 40 | #define VPBE_DISPLAY_VALID_FIELD(field) ((V4L2_FIELD_NONE == field) || \ | ||
| 41 | (V4L2_FIELD_ANY == field) || (V4L2_FIELD_INTERLACED == field)) | ||
| 42 | |||
| 43 | /* Exp ratio numerator and denominator constants */ | ||
| 44 | #define VPBE_DISPLAY_H_EXP_RATIO_N 9 | ||
| 45 | #define VPBE_DISPLAY_H_EXP_RATIO_D 8 | ||
| 46 | #define VPBE_DISPLAY_V_EXP_RATIO_N 6 | ||
| 47 | #define VPBE_DISPLAY_V_EXP_RATIO_D 5 | ||
| 48 | |||
| 49 | /* Zoom multiplication factor */ | ||
| 50 | #define VPBE_DISPLAY_ZOOM_4X 4 | ||
| 51 | #define VPBE_DISPLAY_ZOOM_2X 2 | ||
| 52 | |||
| 53 | /* Structures */ | ||
| 54 | struct display_layer_info { | ||
| 55 | int enable; | ||
| 56 | /* Layer ID used by Display Manager */ | ||
| 57 | enum osd_layer id; | ||
| 58 | struct osd_layer_config config; | ||
| 59 | enum osd_zoom_factor h_zoom; | ||
| 60 | enum osd_zoom_factor v_zoom; | ||
| 61 | enum osd_h_exp_ratio h_exp; | ||
| 62 | enum osd_v_exp_ratio v_exp; | ||
| 63 | }; | ||
| 64 | |||
| 65 | /* vpbe display object structure */ | ||
| 66 | struct vpbe_layer { | ||
| 67 | /* number of buffers in fbuffers */ | ||
| 68 | unsigned int numbuffers; | ||
| 69 | /* Pointer to the vpbe_display */ | ||
| 70 | struct vpbe_display *disp_dev; | ||
| 71 | /* Pointer pointing to current v4l2_buffer */ | ||
| 72 | struct videobuf_buffer *cur_frm; | ||
| 73 | /* Pointer pointing to next v4l2_buffer */ | ||
| 74 | struct videobuf_buffer *next_frm; | ||
| 75 | /* videobuf specific parameters | ||
| 76 | * Buffer queue used in video-buf | ||
| 77 | */ | ||
| 78 | struct videobuf_queue buffer_queue; | ||
| 79 | /* Queue of filled frames */ | ||
| 80 | struct list_head dma_queue; | ||
| 81 | /* Used in video-buf */ | ||
| 82 | spinlock_t irqlock; | ||
| 83 | /* V4l2 specific parameters */ | ||
| 84 | /* Identifies video device for this layer */ | ||
| 85 | struct video_device video_dev; | ||
| 86 | /* This field keeps track of type of buffer exchange mechanism user | ||
| 87 | * has selected | ||
| 88 | */ | ||
| 89 | enum v4l2_memory memory; | ||
| 90 | /* Used to keep track of state of the priority */ | ||
| 91 | struct v4l2_prio_state prio; | ||
| 92 | /* Used to store pixel format */ | ||
| 93 | struct v4l2_pix_format pix_fmt; | ||
| 94 | enum v4l2_field buf_field; | ||
| 95 | /* Video layer configuration params */ | ||
| 96 | struct display_layer_info layer_info; | ||
| 97 | /* vpbe specific parameters | ||
| 98 | * enable window for display | ||
| 99 | */ | ||
| 100 | unsigned char window_enable; | ||
| 101 | /* number of open instances of the layer */ | ||
| 102 | unsigned int usrs; | ||
| 103 | /* number of users performing IO */ | ||
| 104 | unsigned int io_usrs; | ||
| 105 | /* Indicates id of the field which is being displayed */ | ||
| 106 | unsigned int field_id; | ||
| 107 | /* Indicates whether streaming started */ | ||
| 108 | unsigned char started; | ||
| 109 | /* Identifies device object */ | ||
| 110 | enum vpbe_display_device_id device_id; | ||
| 111 | /* facilitation of ioctl ops lock by v4l2*/ | ||
| 112 | struct mutex opslock; | ||
| 113 | u8 layer_first_int; | ||
| 114 | }; | ||
| 115 | |||
| 116 | /* vpbe device structure */ | ||
| 117 | struct vpbe_display { | ||
| 118 | /* layer specific parameters */ | ||
| 119 | /* lock for isr updates to buf layers*/ | ||
| 120 | spinlock_t dma_queue_lock; | ||
| 121 | /* C-Plane offset from start of y-plane */ | ||
| 122 | unsigned int cbcr_ofst; | ||
| 123 | struct vpbe_layer *dev[VPBE_DISPLAY_MAX_DEVICES]; | ||
| 124 | struct vpbe_device *vpbe_dev; | ||
| 125 | struct osd_state *osd_device; | ||
| 126 | }; | ||
| 127 | |||
| 128 | /* File handle structure */ | ||
| 129 | struct vpbe_fh { | ||
| 130 | /* vpbe device structure */ | ||
| 131 | struct vpbe_display *disp_dev; | ||
| 132 | /* pointer to layer object for opened device */ | ||
| 133 | struct vpbe_layer *layer; | ||
| 134 | /* Indicates whether this file handle is doing IO */ | ||
| 135 | unsigned char io_allowed; | ||
| 136 | /* Used to keep track priority of this instance */ | ||
| 137 | enum v4l2_priority prio; | ||
| 138 | }; | ||
| 139 | |||
| 140 | struct buf_config_params { | ||
| 141 | unsigned char min_numbuffers; | ||
| 142 | unsigned char numbuffers[VPBE_DISPLAY_MAX_DEVICES]; | ||
| 143 | unsigned int min_bufsize[VPBE_DISPLAY_MAX_DEVICES]; | ||
| 144 | unsigned int layer_bufsize[VPBE_DISPLAY_MAX_DEVICES]; | ||
| 145 | }; | ||
| 146 | |||
| 147 | #endif /* VPBE_DISPLAY_H */ | ||
diff --git a/include/media/davinci/vpbe_osd.h b/include/media/davinci/vpbe_osd.h new file mode 100644 index 000000000000..d7e397a444e6 --- /dev/null +++ b/include/media/davinci/vpbe_osd.h | |||
| @@ -0,0 +1,394 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2007-2009 Texas Instruments Inc | ||
| 3 | * Copyright (C) 2007 MontaVista Software, Inc. | ||
| 4 | * | ||
| 5 | * Andy Lowe (alowe@mvista.com), MontaVista Software | ||
| 6 | * - Initial version | ||
| 7 | * Murali Karicheri (mkaricheri@gmail.com), Texas Instruments Ltd. | ||
| 8 | * - ported to sub device interface | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License as published by | ||
| 12 | * the Free Software Foundation version 2.. | ||
| 13 | * | ||
| 14 | * This program is distributed in the hope that it will be useful, | ||
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 17 | * GNU General Public License for more details. | ||
| 18 | * | ||
| 19 | * You should have received a copy of the GNU General Public License | ||
| 20 | * along with this program; if not, write to the Free Software | ||
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 22 | * | ||
| 23 | */ | ||
| 24 | #ifndef _OSD_H | ||
| 25 | #define _OSD_H | ||
| 26 | |||
| 27 | #include <media/davinci/vpbe_types.h> | ||
| 28 | |||
| 29 | #define VPBE_OSD_SUBDEV_NAME "vpbe-osd" | ||
| 30 | |||
| 31 | /** | ||
| 32 | * enum osd_layer | ||
| 33 | * @WIN_OSD0: On-Screen Display Window 0 | ||
| 34 | * @WIN_VID0: Video Window 0 | ||
| 35 | * @WIN_OSD1: On-Screen Display Window 1 | ||
| 36 | * @WIN_VID1: Video Window 1 | ||
| 37 | * | ||
| 38 | * Description: | ||
| 39 | * An enumeration of the osd display layers. | ||
| 40 | */ | ||
| 41 | enum osd_layer { | ||
| 42 | WIN_OSD0, | ||
| 43 | WIN_VID0, | ||
| 44 | WIN_OSD1, | ||
| 45 | WIN_VID1, | ||
| 46 | }; | ||
| 47 | |||
| 48 | /** | ||
| 49 | * enum osd_win_layer | ||
| 50 | * @OSDWIN_OSD0: On-Screen Display Window 0 | ||
| 51 | * @OSDWIN_OSD1: On-Screen Display Window 1 | ||
| 52 | * | ||
| 53 | * Description: | ||
| 54 | * An enumeration of the OSD Window layers. | ||
| 55 | */ | ||
| 56 | enum osd_win_layer { | ||
| 57 | OSDWIN_OSD0, | ||
| 58 | OSDWIN_OSD1, | ||
| 59 | }; | ||
| 60 | |||
| 61 | /** | ||
| 62 | * enum osd_pix_format | ||
| 63 | * @PIXFMT_1BPP: 1-bit-per-pixel bitmap | ||
| 64 | * @PIXFMT_2BPP: 2-bits-per-pixel bitmap | ||
| 65 | * @PIXFMT_4BPP: 4-bits-per-pixel bitmap | ||
| 66 | * @PIXFMT_8BPP: 8-bits-per-pixel bitmap | ||
| 67 | * @PIXFMT_RGB565: 16-bits-per-pixel RGB565 | ||
| 68 | * @PIXFMT_YCbCrI: YUV 4:2:2 | ||
| 69 | * @PIXFMT_RGB888: 24-bits-per-pixel RGB888 | ||
| 70 | * @PIXFMT_YCrCbI: YUV 4:2:2 with chroma swap | ||
| 71 | * @PIXFMT_NV12: YUV 4:2:0 planar | ||
| 72 | * @PIXFMT_OSD_ATTR: OSD Attribute Window pixel format (4bpp) | ||
| 73 | * | ||
| 74 | * Description: | ||
| 75 | * An enumeration of the DaVinci pixel formats. | ||
| 76 | */ | ||
| 77 | enum osd_pix_format { | ||
| 78 | PIXFMT_1BPP = 0, | ||
| 79 | PIXFMT_2BPP, | ||
| 80 | PIXFMT_4BPP, | ||
| 81 | PIXFMT_8BPP, | ||
| 82 | PIXFMT_RGB565, | ||
| 83 | PIXFMT_YCbCrI, | ||
| 84 | PIXFMT_RGB888, | ||
| 85 | PIXFMT_YCrCbI, | ||
| 86 | PIXFMT_NV12, | ||
| 87 | PIXFMT_OSD_ATTR, | ||
| 88 | }; | ||
| 89 | |||
| 90 | /** | ||
| 91 | * enum osd_h_exp_ratio | ||
| 92 | * @H_EXP_OFF: no expansion (1/1) | ||
| 93 | * @H_EXP_9_OVER_8: 9/8 expansion ratio | ||
| 94 | * @H_EXP_3_OVER_2: 3/2 expansion ratio | ||
| 95 | * | ||
| 96 | * Description: | ||
| 97 | * An enumeration of the available horizontal expansion ratios. | ||
| 98 | */ | ||
| 99 | enum osd_h_exp_ratio { | ||
| 100 | H_EXP_OFF, | ||
| 101 | H_EXP_9_OVER_8, | ||
| 102 | H_EXP_3_OVER_2, | ||
| 103 | }; | ||
| 104 | |||
| 105 | /** | ||
| 106 | * enum osd_v_exp_ratio | ||
| 107 | * @V_EXP_OFF: no expansion (1/1) | ||
| 108 | * @V_EXP_6_OVER_5: 6/5 expansion ratio | ||
| 109 | * | ||
| 110 | * Description: | ||
| 111 | * An enumeration of the available vertical expansion ratios. | ||
| 112 | */ | ||
| 113 | enum osd_v_exp_ratio { | ||
| 114 | V_EXP_OFF, | ||
| 115 | V_EXP_6_OVER_5, | ||
| 116 | }; | ||
| 117 | |||
| 118 | /** | ||
| 119 | * enum osd_zoom_factor | ||
| 120 | * @ZOOM_X1: no zoom (x1) | ||
| 121 | * @ZOOM_X2: x2 zoom | ||
| 122 | * @ZOOM_X4: x4 zoom | ||
| 123 | * | ||
| 124 | * Description: | ||
| 125 | * An enumeration of the available zoom factors. | ||
| 126 | */ | ||
| 127 | enum osd_zoom_factor { | ||
| 128 | ZOOM_X1, | ||
| 129 | ZOOM_X2, | ||
| 130 | ZOOM_X4, | ||
| 131 | }; | ||
| 132 | |||
| 133 | /** | ||
| 134 | * enum osd_clut | ||
| 135 | * @ROM_CLUT: ROM CLUT | ||
| 136 | * @RAM_CLUT: RAM CLUT | ||
| 137 | * | ||
| 138 | * Description: | ||
| 139 | * An enumeration of the available Color Lookup Tables (CLUTs). | ||
| 140 | */ | ||
| 141 | enum osd_clut { | ||
| 142 | ROM_CLUT, | ||
| 143 | RAM_CLUT, | ||
| 144 | }; | ||
| 145 | |||
| 146 | /** | ||
| 147 | * enum osd_rom_clut | ||
| 148 | * @ROM_CLUT0: Macintosh CLUT | ||
| 149 | * @ROM_CLUT1: CLUT from DM270 and prior devices | ||
| 150 | * | ||
| 151 | * Description: | ||
| 152 | * An enumeration of the ROM Color Lookup Table (CLUT) options. | ||
| 153 | */ | ||
| 154 | enum osd_rom_clut { | ||
| 155 | ROM_CLUT0, | ||
| 156 | ROM_CLUT1, | ||
| 157 | }; | ||
| 158 | |||
| 159 | /** | ||
| 160 | * enum osd_blending_factor | ||
| 161 | * @OSD_0_VID_8: OSD pixels are fully transparent | ||
| 162 | * @OSD_1_VID_7: OSD pixels contribute 1/8, video pixels contribute 7/8 | ||
| 163 | * @OSD_2_VID_6: OSD pixels contribute 2/8, video pixels contribute 6/8 | ||
| 164 | * @OSD_3_VID_5: OSD pixels contribute 3/8, video pixels contribute 5/8 | ||
| 165 | * @OSD_4_VID_4: OSD pixels contribute 4/8, video pixels contribute 4/8 | ||
| 166 | * @OSD_5_VID_3: OSD pixels contribute 5/8, video pixels contribute 3/8 | ||
| 167 | * @OSD_6_VID_2: OSD pixels contribute 6/8, video pixels contribute 2/8 | ||
| 168 | * @OSD_8_VID_0: OSD pixels are fully opaque | ||
| 169 | * | ||
| 170 | * Description: | ||
| 171 | * An enumeration of the DaVinci pixel blending factor options. | ||
| 172 | */ | ||
| 173 | enum osd_blending_factor { | ||
| 174 | OSD_0_VID_8, | ||
| 175 | OSD_1_VID_7, | ||
| 176 | OSD_2_VID_6, | ||
| 177 | OSD_3_VID_5, | ||
| 178 | OSD_4_VID_4, | ||
| 179 | OSD_5_VID_3, | ||
| 180 | OSD_6_VID_2, | ||
| 181 | OSD_8_VID_0, | ||
| 182 | }; | ||
| 183 | |||
| 184 | /** | ||
| 185 | * enum osd_blink_interval | ||
| 186 | * @BLINK_X1: blink interval is 1 vertical refresh cycle | ||
| 187 | * @BLINK_X2: blink interval is 2 vertical refresh cycles | ||
| 188 | * @BLINK_X3: blink interval is 3 vertical refresh cycles | ||
| 189 | * @BLINK_X4: blink interval is 4 vertical refresh cycles | ||
| 190 | * | ||
| 191 | * Description: | ||
| 192 | * An enumeration of the DaVinci pixel blinking interval options. | ||
| 193 | */ | ||
| 194 | enum osd_blink_interval { | ||
| 195 | BLINK_X1, | ||
| 196 | BLINK_X2, | ||
| 197 | BLINK_X3, | ||
| 198 | BLINK_X4, | ||
| 199 | }; | ||
| 200 | |||
| 201 | /** | ||
| 202 | * enum osd_cursor_h_width | ||
| 203 | * @H_WIDTH_1: horizontal line width is 1 pixel | ||
| 204 | * @H_WIDTH_4: horizontal line width is 4 pixels | ||
| 205 | * @H_WIDTH_8: horizontal line width is 8 pixels | ||
| 206 | * @H_WIDTH_12: horizontal line width is 12 pixels | ||
| 207 | * @H_WIDTH_16: horizontal line width is 16 pixels | ||
| 208 | * @H_WIDTH_20: horizontal line width is 20 pixels | ||
| 209 | * @H_WIDTH_24: horizontal line width is 24 pixels | ||
| 210 | * @H_WIDTH_28: horizontal line width is 28 pixels | ||
| 211 | */ | ||
| 212 | enum osd_cursor_h_width { | ||
| 213 | H_WIDTH_1, | ||
| 214 | H_WIDTH_4, | ||
| 215 | H_WIDTH_8, | ||
| 216 | H_WIDTH_12, | ||
| 217 | H_WIDTH_16, | ||
| 218 | H_WIDTH_20, | ||
| 219 | H_WIDTH_24, | ||
| 220 | H_WIDTH_28, | ||
| 221 | }; | ||
| 222 | |||
| 223 | /** | ||
| 224 | * enum davinci_cursor_v_width | ||
| 225 | * @V_WIDTH_1: vertical line width is 1 line | ||
| 226 | * @V_WIDTH_2: vertical line width is 2 lines | ||
| 227 | * @V_WIDTH_4: vertical line width is 4 lines | ||
| 228 | * @V_WIDTH_6: vertical line width is 6 lines | ||
| 229 | * @V_WIDTH_8: vertical line width is 8 lines | ||
| 230 | * @V_WIDTH_10: vertical line width is 10 lines | ||
| 231 | * @V_WIDTH_12: vertical line width is 12 lines | ||
| 232 | * @V_WIDTH_14: vertical line width is 14 lines | ||
| 233 | */ | ||
| 234 | enum osd_cursor_v_width { | ||
| 235 | V_WIDTH_1, | ||
| 236 | V_WIDTH_2, | ||
| 237 | V_WIDTH_4, | ||
| 238 | V_WIDTH_6, | ||
| 239 | V_WIDTH_8, | ||
| 240 | V_WIDTH_10, | ||
| 241 | V_WIDTH_12, | ||
| 242 | V_WIDTH_14, | ||
| 243 | }; | ||
| 244 | |||
| 245 | /** | ||
| 246 | * struct osd_cursor_config | ||
| 247 | * @xsize: horizontal size in pixels | ||
| 248 | * @ysize: vertical size in lines | ||
| 249 | * @xpos: horizontal offset in pixels from the left edge of the display | ||
| 250 | * @ypos: vertical offset in lines from the top of the display | ||
| 251 | * @interlaced: Non-zero if the display is interlaced, or zero otherwise | ||
| 252 | * @h_width: horizontal line width | ||
| 253 | * @v_width: vertical line width | ||
| 254 | * @clut: the CLUT selector (ROM or RAM) for the cursor color | ||
| 255 | * @clut_index: an index into the CLUT for the cursor color | ||
| 256 | * | ||
| 257 | * Description: | ||
| 258 | * A structure describing the configuration parameters of the hardware | ||
| 259 | * rectangular cursor. | ||
| 260 | */ | ||
| 261 | struct osd_cursor_config { | ||
| 262 | unsigned xsize; | ||
| 263 | unsigned ysize; | ||
| 264 | unsigned xpos; | ||
| 265 | unsigned ypos; | ||
| 266 | int interlaced; | ||
| 267 | enum osd_cursor_h_width h_width; | ||
| 268 | enum osd_cursor_v_width v_width; | ||
| 269 | enum osd_clut clut; | ||
| 270 | unsigned char clut_index; | ||
| 271 | }; | ||
| 272 | |||
| 273 | /** | ||
| 274 | * struct osd_layer_config | ||
| 275 | * @pixfmt: pixel format | ||
| 276 | * @line_length: offset in bytes between start of each line in memory | ||
| 277 | * @xsize: number of horizontal pixels displayed per line | ||
| 278 | * @ysize: number of lines displayed | ||
| 279 | * @xpos: horizontal offset in pixels from the left edge of the display | ||
| 280 | * @ypos: vertical offset in lines from the top of the display | ||
| 281 | * @interlaced: Non-zero if the display is interlaced, or zero otherwise | ||
| 282 | * | ||
| 283 | * Description: | ||
| 284 | * A structure describing the configuration parameters of an On-Screen Display | ||
| 285 | * (OSD) or video layer related to how the image is stored in memory. | ||
| 286 | * @line_length must be a multiple of the cache line size (32 bytes). | ||
| 287 | */ | ||
| 288 | struct osd_layer_config { | ||
| 289 | enum osd_pix_format pixfmt; | ||
| 290 | unsigned line_length; | ||
| 291 | unsigned xsize; | ||
| 292 | unsigned ysize; | ||
| 293 | unsigned xpos; | ||
| 294 | unsigned ypos; | ||
| 295 | int interlaced; | ||
| 296 | }; | ||
| 297 | |||
| 298 | /* parameters that apply on a per-window (OSD or video) basis */ | ||
| 299 | struct osd_window_state { | ||
| 300 | int is_allocated; | ||
| 301 | int is_enabled; | ||
| 302 | unsigned long fb_base_phys; | ||
| 303 | enum osd_zoom_factor h_zoom; | ||
| 304 | enum osd_zoom_factor v_zoom; | ||
| 305 | struct osd_layer_config lconfig; | ||
| 306 | }; | ||
| 307 | |||
| 308 | /* parameters that apply on a per-OSD-window basis */ | ||
| 309 | struct osd_osdwin_state { | ||
| 310 | enum osd_clut clut; | ||
| 311 | enum osd_blending_factor blend; | ||
| 312 | int colorkey_blending; | ||
| 313 | unsigned colorkey; | ||
| 314 | int rec601_attenuation; | ||
| 315 | /* index is pixel value */ | ||
| 316 | unsigned char palette_map[16]; | ||
| 317 | }; | ||
| 318 | |||
| 319 | /* hardware rectangular cursor parameters */ | ||
| 320 | struct osd_cursor_state { | ||
| 321 | int is_enabled; | ||
| 322 | struct osd_cursor_config config; | ||
| 323 | }; | ||
| 324 | |||
| 325 | struct osd_state; | ||
| 326 | |||
| 327 | struct vpbe_osd_ops { | ||
| 328 | int (*initialize)(struct osd_state *sd); | ||
| 329 | int (*request_layer)(struct osd_state *sd, enum osd_layer layer); | ||
| 330 | void (*release_layer)(struct osd_state *sd, enum osd_layer layer); | ||
| 331 | int (*enable_layer)(struct osd_state *sd, enum osd_layer layer, | ||
| 332 | int otherwin); | ||
| 333 | void (*disable_layer)(struct osd_state *sd, enum osd_layer layer); | ||
| 334 | int (*set_layer_config)(struct osd_state *sd, enum osd_layer layer, | ||
| 335 | struct osd_layer_config *lconfig); | ||
| 336 | void (*get_layer_config)(struct osd_state *sd, enum osd_layer layer, | ||
| 337 | struct osd_layer_config *lconfig); | ||
| 338 | void (*start_layer)(struct osd_state *sd, enum osd_layer layer, | ||
| 339 | unsigned long fb_base_phys, | ||
| 340 | unsigned long cbcr_ofst); | ||
| 341 | void (*set_left_margin)(struct osd_state *sd, u32 val); | ||
| 342 | void (*set_top_margin)(struct osd_state *sd, u32 val); | ||
| 343 | void (*set_interpolation_filter)(struct osd_state *sd, int filter); | ||
| 344 | int (*set_vid_expansion)(struct osd_state *sd, | ||
| 345 | enum osd_h_exp_ratio h_exp, | ||
| 346 | enum osd_v_exp_ratio v_exp); | ||
| 347 | void (*get_vid_expansion)(struct osd_state *sd, | ||
| 348 | enum osd_h_exp_ratio *h_exp, | ||
| 349 | enum osd_v_exp_ratio *v_exp); | ||
| 350 | void (*set_zoom)(struct osd_state *sd, enum osd_layer layer, | ||
| 351 | enum osd_zoom_factor h_zoom, | ||
| 352 | enum osd_zoom_factor v_zoom); | ||
| 353 | }; | ||
| 354 | |||
| 355 | struct osd_state { | ||
| 356 | enum vpbe_version vpbe_type; | ||
| 357 | spinlock_t lock; | ||
| 358 | struct device *dev; | ||
| 359 | dma_addr_t osd_base_phys; | ||
| 360 | unsigned long osd_base; | ||
| 361 | unsigned long osd_size; | ||
| 362 | /* 1-->the isr will toggle the VID0 ping-pong buffer */ | ||
| 363 | int pingpong; | ||
| 364 | int interpolation_filter; | ||
| 365 | int field_inversion; | ||
| 366 | enum osd_h_exp_ratio osd_h_exp; | ||
| 367 | enum osd_v_exp_ratio osd_v_exp; | ||
| 368 | enum osd_h_exp_ratio vid_h_exp; | ||
| 369 | enum osd_v_exp_ratio vid_v_exp; | ||
| 370 | enum osd_clut backg_clut; | ||
| 371 | unsigned backg_clut_index; | ||
| 372 | enum osd_rom_clut rom_clut; | ||
| 373 | int is_blinking; | ||
| 374 | /* attribute window blinking enabled */ | ||
| 375 | enum osd_blink_interval blink; | ||
| 376 | /* YCbCrI or YCrCbI */ | ||
| 377 | enum osd_pix_format yc_pixfmt; | ||
| 378 | /* columns are Y, Cb, Cr */ | ||
| 379 | unsigned char clut_ram[256][3]; | ||
| 380 | struct osd_cursor_state cursor; | ||
| 381 | /* OSD0, VID0, OSD1, VID1 */ | ||
| 382 | struct osd_window_state win[4]; | ||
| 383 | /* OSD0, OSD1 */ | ||
| 384 | struct osd_osdwin_state osdwin[2]; | ||
| 385 | /* OSD device Operations */ | ||
| 386 | struct vpbe_osd_ops ops; | ||
| 387 | }; | ||
| 388 | |||
| 389 | struct osd_platform_data { | ||
| 390 | enum vpbe_version vpbe_type; | ||
| 391 | int field_inv_wa_enable; | ||
| 392 | }; | ||
| 393 | |||
| 394 | #endif | ||
diff --git a/include/media/davinci/vpbe_types.h b/include/media/davinci/vpbe_types.h new file mode 100644 index 000000000000..727f55170e41 --- /dev/null +++ b/include/media/davinci/vpbe_types.h | |||
| @@ -0,0 +1,91 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2010 Texas Instruments Inc | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or modify | ||
| 5 | * it under the terms of the GNU General Public License as published by | ||
| 6 | * the Free Software Foundation version 2. | ||
| 7 | * | ||
| 8 | * This program is distributed in the hope that it will be useful, | ||
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 11 | * GNU General Public License for more details. | ||
| 12 | * | ||
| 13 | * You should have received a copy of the GNU General Public License | ||
| 14 | * along with this program; if not, write to the Free Software | ||
| 15 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 16 | */ | ||
| 17 | #ifndef _VPBE_TYPES_H | ||
| 18 | #define _VPBE_TYPES_H | ||
| 19 | |||
| 20 | enum vpbe_version { | ||
| 21 | VPBE_VERSION_1 = 1, | ||
| 22 | VPBE_VERSION_2, | ||
| 23 | VPBE_VERSION_3, | ||
| 24 | }; | ||
| 25 | |||
| 26 | /* vpbe_timing_type - Timing types used in vpbe device */ | ||
| 27 | enum vpbe_enc_timings_type { | ||
| 28 | VPBE_ENC_STD = 0x1, | ||
| 29 | VPBE_ENC_DV_PRESET = 0x2, | ||
| 30 | VPBE_ENC_CUSTOM_TIMINGS = 0x4, | ||
| 31 | /* Used when set timings through FB device interface */ | ||
| 32 | VPBE_ENC_TIMINGS_INVALID = 0x8, | ||
| 33 | }; | ||
| 34 | |||
| 35 | union vpbe_timings { | ||
| 36 | v4l2_std_id std_id; | ||
| 37 | unsigned int dv_preset; | ||
| 38 | }; | ||
| 39 | |||
| 40 | /* | ||
| 41 | * struct vpbe_enc_mode_info | ||
| 42 | * @name: ptr to name string of the standard, "NTSC", "PAL" etc | ||
| 43 | * @std: standard or non-standard mode. 1 - standard, 0 - nonstandard | ||
| 44 | * @interlaced: 1 - interlaced, 0 - non interlaced/progressive | ||
| 45 | * @xres: x or horizontal resolution of the display | ||
| 46 | * @yres: y or vertical resolution of the display | ||
| 47 | * @fps: frame per second | ||
| 48 | * @left_margin: left margin of the display | ||
| 49 | * @right_margin: right margin of the display | ||
| 50 | * @upper_margin: upper margin of the display | ||
| 51 | * @lower_margin: lower margin of the display | ||
| 52 | * @hsync_len: h-sync length | ||
| 53 | * @vsync_len: v-sync length | ||
| 54 | * @flags: bit field: bit usage is documented below | ||
| 55 | * | ||
| 56 | * Description: | ||
| 57 | * Structure holding timing and resolution information of a standard. | ||
| 58 | * Used by vpbe_device to set required non-standard timing in the | ||
| 59 | * venc when lcd controller output is connected to a external encoder. | ||
| 60 | * A table of timings is maintained in vpbe device to set this in | ||
| 61 | * venc when external encoder is connected to lcd controller output. | ||
| 62 | * Encoder may provide a g_dv_timings() API to override these values | ||
| 63 | * as needed. | ||
| 64 | * | ||
| 65 | * Notes | ||
| 66 | * ------ | ||
| 67 | * if_type should be used only by encoder manager and encoder. | ||
| 68 | * flags usage | ||
| 69 | * b0 (LSB) - hsync polarity, 0 - negative, 1 - positive | ||
| 70 | * b1 - vsync polarity, 0 - negative, 1 - positive | ||
| 71 | * b2 - field id polarity, 0 - negative, 1 - positive | ||
| 72 | */ | ||
| 73 | struct vpbe_enc_mode_info { | ||
| 74 | unsigned char *name; | ||
| 75 | enum vpbe_enc_timings_type timings_type; | ||
| 76 | union vpbe_timings timings; | ||
| 77 | unsigned int interlaced; | ||
| 78 | unsigned int xres; | ||
| 79 | unsigned int yres; | ||
| 80 | struct v4l2_fract aspect; | ||
| 81 | struct v4l2_fract fps; | ||
| 82 | unsigned int left_margin; | ||
| 83 | unsigned int right_margin; | ||
| 84 | unsigned int upper_margin; | ||
| 85 | unsigned int lower_margin; | ||
| 86 | unsigned int hsync_len; | ||
| 87 | unsigned int vsync_len; | ||
| 88 | unsigned int flags; | ||
| 89 | }; | ||
| 90 | |||
| 91 | #endif | ||
diff --git a/include/media/davinci/vpbe_venc.h b/include/media/davinci/vpbe_venc.h new file mode 100644 index 000000000000..426c205831a2 --- /dev/null +++ b/include/media/davinci/vpbe_venc.h | |||
| @@ -0,0 +1,45 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2010 Texas Instruments Inc | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or modify | ||
| 5 | * it under the terms of the GNU General Public License as published by | ||
| 6 | * the Free Software Foundation version 2. | ||
| 7 | * | ||
| 8 | * This program is distributed in the hope that it will be useful, | ||
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 11 | * GNU General Public License for more details. | ||
| 12 | * | ||
| 13 | * You should have received a copy of the GNU General Public License | ||
| 14 | * along with this program; if not, write to the Free Software | ||
| 15 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
| 16 | */ | ||
| 17 | #ifndef _VPBE_VENC_H | ||
| 18 | #define _VPBE_VENC_H | ||
| 19 | |||
| 20 | #include <media/v4l2-subdev.h> | ||
| 21 | #include <media/davinci/vpbe_types.h> | ||
| 22 | |||
| 23 | #define VPBE_VENC_SUBDEV_NAME "vpbe-venc" | ||
| 24 | |||
| 25 | /* venc events */ | ||
| 26 | #define VENC_END_OF_FRAME BIT(0) | ||
| 27 | #define VENC_FIRST_FIELD BIT(1) | ||
| 28 | #define VENC_SECOND_FIELD BIT(2) | ||
| 29 | |||
| 30 | struct venc_platform_data { | ||
| 31 | enum vpbe_version venc_type; | ||
| 32 | int (*setup_clock)(enum vpbe_enc_timings_type type, | ||
| 33 | unsigned int mode); | ||
| 34 | /* Number of LCD outputs supported */ | ||
| 35 | int num_lcd_outputs; | ||
| 36 | }; | ||
| 37 | |||
| 38 | enum venc_ioctls { | ||
| 39 | VENC_GET_FLD = 1, | ||
| 40 | }; | ||
| 41 | |||
| 42 | /* exported functions */ | ||
| 43 | struct v4l2_subdev *venc_sub_dev_init(struct v4l2_device *v4l2_dev, | ||
| 44 | const char *venc_name); | ||
| 45 | #endif | ||
diff --git a/include/media/mmp-camera.h b/include/media/mmp-camera.h new file mode 100644 index 000000000000..7611963a257f --- /dev/null +++ b/include/media/mmp-camera.h | |||
| @@ -0,0 +1,9 @@ | |||
| 1 | /* | ||
| 2 | * Information for the Marvell Armada MMP camera | ||
| 3 | */ | ||
| 4 | |||
| 5 | struct mmp_camera_platform_data { | ||
| 6 | struct platform_device *i2c_device; | ||
| 7 | int sensor_power_gpio; | ||
| 8 | int sensor_reset_gpio; | ||
| 9 | }; | ||
diff --git a/drivers/media/video/ov7670.h b/include/media/ov7670.h index b133bc123031..b133bc123031 100644 --- a/drivers/media/video/ov7670.h +++ b/include/media/ov7670.h | |||
diff --git a/include/media/rc-core.h b/include/media/rc-core.h index 60536c74c1ea..b1f19b77ecd4 100644 --- a/include/media/rc-core.h +++ b/include/media/rc-core.h | |||
| @@ -117,7 +117,7 @@ struct rc_dev { | |||
| 117 | int (*s_tx_carrier)(struct rc_dev *dev, u32 carrier); | 117 | int (*s_tx_carrier)(struct rc_dev *dev, u32 carrier); |
| 118 | int (*s_tx_duty_cycle)(struct rc_dev *dev, u32 duty_cycle); | 118 | int (*s_tx_duty_cycle)(struct rc_dev *dev, u32 duty_cycle); |
| 119 | int (*s_rx_carrier_range)(struct rc_dev *dev, u32 min, u32 max); | 119 | int (*s_rx_carrier_range)(struct rc_dev *dev, u32 min, u32 max); |
| 120 | int (*tx_ir)(struct rc_dev *dev, int *txbuf, u32 n); | 120 | int (*tx_ir)(struct rc_dev *dev, unsigned *txbuf, unsigned n); |
| 121 | void (*s_idle)(struct rc_dev *dev, bool enable); | 121 | void (*s_idle)(struct rc_dev *dev, bool enable); |
| 122 | int (*s_learning_mode)(struct rc_dev *dev, int enable); | 122 | int (*s_learning_mode)(struct rc_dev *dev, int enable); |
| 123 | int (*s_carrier_report) (struct rc_dev *dev, int enable); | 123 | int (*s_carrier_report) (struct rc_dev *dev, int enable); |
diff --git a/include/media/rc-map.h b/include/media/rc-map.h index 4e1409ec2613..17c9759ae77b 100644 --- a/include/media/rc-map.h +++ b/include/media/rc-map.h | |||
| @@ -18,12 +18,13 @@ | |||
| 18 | #define RC_TYPE_JVC (1 << 3) /* JVC protocol */ | 18 | #define RC_TYPE_JVC (1 << 3) /* JVC protocol */ |
| 19 | #define RC_TYPE_SONY (1 << 4) /* Sony12/15/20 protocol */ | 19 | #define RC_TYPE_SONY (1 << 4) /* Sony12/15/20 protocol */ |
| 20 | #define RC_TYPE_RC5_SZ (1 << 5) /* RC5 variant used by Streamzap */ | 20 | #define RC_TYPE_RC5_SZ (1 << 5) /* RC5 variant used by Streamzap */ |
| 21 | #define RC_TYPE_MCE_KBD (1 << 29) /* RC6-ish MCE keyboard/mouse */ | ||
| 21 | #define RC_TYPE_LIRC (1 << 30) /* Pass raw IR to lirc userspace */ | 22 | #define RC_TYPE_LIRC (1 << 30) /* Pass raw IR to lirc userspace */ |
| 22 | #define RC_TYPE_OTHER (1u << 31) | 23 | #define RC_TYPE_OTHER (1u << 31) |
| 23 | 24 | ||
| 24 | #define RC_TYPE_ALL (RC_TYPE_RC5 | RC_TYPE_NEC | RC_TYPE_RC6 | \ | 25 | #define RC_TYPE_ALL (RC_TYPE_RC5 | RC_TYPE_NEC | RC_TYPE_RC6 | \ |
| 25 | RC_TYPE_JVC | RC_TYPE_SONY | RC_TYPE_LIRC | \ | 26 | RC_TYPE_JVC | RC_TYPE_SONY | RC_TYPE_LIRC | \ |
| 26 | RC_TYPE_RC5_SZ | RC_TYPE_OTHER) | 27 | RC_TYPE_RC5_SZ | RC_TYPE_MCE_KBD | RC_TYPE_OTHER) |
| 27 | 28 | ||
| 28 | struct rc_map_table { | 29 | struct rc_map_table { |
| 29 | u32 scancode; | 30 | u32 scancode; |
diff --git a/include/media/sh_mobile_ceu.h b/include/media/sh_mobile_ceu.h index 80346a6d28a9..48413b410f15 100644 --- a/include/media/sh_mobile_ceu.h +++ b/include/media/sh_mobile_ceu.h | |||
| @@ -7,10 +7,18 @@ | |||
| 7 | #define SH_CEU_FLAG_VSYNC_LOW (1 << 3) /* default High if possible */ | 7 | #define SH_CEU_FLAG_VSYNC_LOW (1 << 3) /* default High if possible */ |
| 8 | 8 | ||
| 9 | struct device; | 9 | struct device; |
| 10 | struct resource; | ||
| 11 | |||
| 12 | struct sh_mobile_ceu_companion { | ||
| 13 | u32 num_resources; | ||
| 14 | struct resource *resource; | ||
| 15 | int id; | ||
| 16 | void *platform_data; | ||
| 17 | }; | ||
| 10 | 18 | ||
| 11 | struct sh_mobile_ceu_info { | 19 | struct sh_mobile_ceu_info { |
| 12 | unsigned long flags; | 20 | unsigned long flags; |
| 13 | struct device *csi2_dev; | 21 | struct sh_mobile_ceu_companion *csi2; |
| 14 | }; | 22 | }; |
| 15 | 23 | ||
| 16 | #endif /* __ASM_SH_MOBILE_CEU_H__ */ | 24 | #endif /* __ASM_SH_MOBILE_CEU_H__ */ |
diff --git a/include/media/sh_mobile_csi2.h b/include/media/sh_mobile_csi2.h index 4d2615174461..c586c4f7f16b 100644 --- a/include/media/sh_mobile_csi2.h +++ b/include/media/sh_mobile_csi2.h | |||
| @@ -11,6 +11,8 @@ | |||
| 11 | #ifndef SH_MIPI_CSI | 11 | #ifndef SH_MIPI_CSI |
| 12 | #define SH_MIPI_CSI | 12 | #define SH_MIPI_CSI |
| 13 | 13 | ||
| 14 | #include <linux/list.h> | ||
| 15 | |||
| 14 | enum sh_csi2_phy { | 16 | enum sh_csi2_phy { |
| 15 | SH_CSI2_PHY_MAIN, | 17 | SH_CSI2_PHY_MAIN, |
| 16 | SH_CSI2_PHY_SUB, | 18 | SH_CSI2_PHY_SUB, |
| @@ -33,14 +35,14 @@ struct sh_csi2_client_config { | |||
| 33 | struct platform_device *pdev; /* client platform device */ | 35 | struct platform_device *pdev; /* client platform device */ |
| 34 | }; | 36 | }; |
| 35 | 37 | ||
| 38 | struct v4l2_device; | ||
| 39 | |||
| 36 | struct sh_csi2_pdata { | 40 | struct sh_csi2_pdata { |
| 37 | enum sh_csi2_type type; | 41 | enum sh_csi2_type type; |
| 38 | unsigned int flags; | 42 | unsigned int flags; |
| 39 | struct sh_csi2_client_config *clients; | 43 | struct sh_csi2_client_config *clients; |
| 40 | int num_clients; | 44 | int num_clients; |
| 45 | struct v4l2_device *v4l2_dev; | ||
| 41 | }; | 46 | }; |
| 42 | 47 | ||
| 43 | struct device; | ||
| 44 | struct v4l2_device; | ||
| 45 | |||
| 46 | #endif | 48 | #endif |
diff --git a/include/media/soc_camera.h b/include/media/soc_camera.h index 238bd334fd83..7582952dceae 100644 --- a/include/media/soc_camera.h +++ b/include/media/soc_camera.h | |||
| @@ -20,14 +20,15 @@ | |||
| 20 | #include <media/videobuf2-core.h> | 20 | #include <media/videobuf2-core.h> |
| 21 | #include <media/v4l2-device.h> | 21 | #include <media/v4l2-device.h> |
| 22 | 22 | ||
| 23 | extern struct bus_type soc_camera_bus_type; | ||
| 24 | |||
| 25 | struct file; | 23 | struct file; |
| 24 | struct soc_camera_link; | ||
| 26 | 25 | ||
| 27 | struct soc_camera_device { | 26 | struct soc_camera_device { |
| 28 | struct list_head list; | 27 | struct list_head list; /* list of all registered devices */ |
| 29 | struct device dev; | 28 | struct soc_camera_link *link; |
| 30 | struct device *pdev; /* Platform device */ | 29 | struct device *pdev; /* Platform device */ |
| 30 | struct device *parent; /* Camera host device */ | ||
| 31 | struct device *control; /* E.g., the i2c client */ | ||
| 31 | s32 user_width; | 32 | s32 user_width; |
| 32 | s32 user_height; | 33 | s32 user_height; |
| 33 | u32 bytesperline; /* for padding, zero if unused */ | 34 | u32 bytesperline; /* for padding, zero if unused */ |
| @@ -66,8 +67,6 @@ struct soc_camera_host_ops { | |||
| 66 | struct module *owner; | 67 | struct module *owner; |
| 67 | int (*add)(struct soc_camera_device *); | 68 | int (*add)(struct soc_camera_device *); |
| 68 | void (*remove)(struct soc_camera_device *); | 69 | void (*remove)(struct soc_camera_device *); |
| 69 | int (*suspend)(struct soc_camera_device *, pm_message_t); | ||
| 70 | int (*resume)(struct soc_camera_device *); | ||
| 71 | /* | 70 | /* |
| 72 | * .get_formats() is called for each client device format, but | 71 | * .get_formats() is called for each client device format, but |
| 73 | * .put_formats() is only called once. Further, if any of the calls to | 72 | * .put_formats() is only called once. Further, if any of the calls to |
| @@ -109,12 +108,6 @@ struct soc_camera_host_ops { | |||
| 109 | #define SOCAM_SENSOR_INVERT_HSYNC (1 << 2) | 108 | #define SOCAM_SENSOR_INVERT_HSYNC (1 << 2) |
| 110 | #define SOCAM_SENSOR_INVERT_VSYNC (1 << 3) | 109 | #define SOCAM_SENSOR_INVERT_VSYNC (1 << 3) |
| 111 | #define SOCAM_SENSOR_INVERT_DATA (1 << 4) | 110 | #define SOCAM_SENSOR_INVERT_DATA (1 << 4) |
| 112 | #define SOCAM_MIPI_1LANE (1 << 5) | ||
| 113 | #define SOCAM_MIPI_2LANE (1 << 6) | ||
| 114 | #define SOCAM_MIPI_3LANE (1 << 7) | ||
| 115 | #define SOCAM_MIPI_4LANE (1 << 8) | ||
| 116 | #define SOCAM_MIPI (SOCAM_MIPI_1LANE | SOCAM_MIPI_2LANE | \ | ||
| 117 | SOCAM_MIPI_3LANE | SOCAM_MIPI_4LANE) | ||
| 118 | 111 | ||
| 119 | struct i2c_board_info; | 112 | struct i2c_board_info; |
| 120 | struct regulator_bulk_data; | 113 | struct regulator_bulk_data; |
| @@ -134,11 +127,11 @@ struct soc_camera_link { | |||
| 134 | int num_regulators; | 127 | int num_regulators; |
| 135 | 128 | ||
| 136 | /* | 129 | /* |
| 137 | * For non-I2C devices platform platform has to provide methods to | 130 | * For non-I2C devices platform has to provide methods to add a device |
| 138 | * add a device to the system and to remove | 131 | * to the system and to remove it |
| 139 | */ | 132 | */ |
| 140 | int (*add_device)(struct soc_camera_link *, struct device *); | 133 | int (*add_device)(struct soc_camera_device *); |
| 141 | void (*del_device)(struct soc_camera_link *); | 134 | void (*del_device)(struct soc_camera_device *); |
| 142 | /* Optional callbacks to power on or off and reset the sensor */ | 135 | /* Optional callbacks to power on or off and reset the sensor */ |
| 143 | int (*power)(struct device *, int); | 136 | int (*power)(struct device *, int); |
| 144 | int (*reset)(struct device *); | 137 | int (*reset)(struct device *); |
| @@ -152,12 +145,6 @@ struct soc_camera_link { | |||
| 152 | void (*free_bus)(struct soc_camera_link *); | 145 | void (*free_bus)(struct soc_camera_link *); |
| 153 | }; | 146 | }; |
| 154 | 147 | ||
| 155 | static inline struct soc_camera_device *to_soc_camera_dev( | ||
| 156 | const struct device *dev) | ||
| 157 | { | ||
| 158 | return container_of(dev, struct soc_camera_device, dev); | ||
| 159 | } | ||
| 160 | |||
| 161 | static inline struct soc_camera_host *to_soc_camera_host( | 148 | static inline struct soc_camera_host *to_soc_camera_host( |
| 162 | const struct device *dev) | 149 | const struct device *dev) |
| 163 | { | 150 | { |
| @@ -169,13 +156,13 @@ static inline struct soc_camera_host *to_soc_camera_host( | |||
| 169 | static inline struct soc_camera_link *to_soc_camera_link( | 156 | static inline struct soc_camera_link *to_soc_camera_link( |
| 170 | const struct soc_camera_device *icd) | 157 | const struct soc_camera_device *icd) |
| 171 | { | 158 | { |
| 172 | return icd->dev.platform_data; | 159 | return icd->link; |
| 173 | } | 160 | } |
| 174 | 161 | ||
| 175 | static inline struct device *to_soc_camera_control( | 162 | static inline struct device *to_soc_camera_control( |
| 176 | const struct soc_camera_device *icd) | 163 | const struct soc_camera_device *icd) |
| 177 | { | 164 | { |
| 178 | return dev_get_drvdata(&icd->dev); | 165 | return icd->control; |
| 179 | } | 166 | } |
| 180 | 167 | ||
| 181 | static inline struct v4l2_subdev *soc_camera_to_subdev( | 168 | static inline struct v4l2_subdev *soc_camera_to_subdev( |
| @@ -207,11 +194,8 @@ struct soc_camera_format_xlate { | |||
| 207 | }; | 194 | }; |
| 208 | 195 | ||
| 209 | struct soc_camera_ops { | 196 | struct soc_camera_ops { |
| 210 | int (*suspend)(struct soc_camera_device *, pm_message_t state); | ||
| 211 | int (*resume)(struct soc_camera_device *); | ||
| 212 | unsigned long (*query_bus_param)(struct soc_camera_device *); | 197 | unsigned long (*query_bus_param)(struct soc_camera_device *); |
| 213 | int (*set_bus_param)(struct soc_camera_device *, unsigned long); | 198 | int (*set_bus_param)(struct soc_camera_device *, unsigned long); |
| 214 | int (*enum_input)(struct soc_camera_device *, struct v4l2_input *); | ||
| 215 | const struct v4l2_queryctrl *controls; | 199 | const struct v4l2_queryctrl *controls; |
| 216 | int num_controls; | 200 | int num_controls; |
| 217 | }; | 201 | }; |
| @@ -270,6 +254,12 @@ static inline struct v4l2_queryctrl const *soc_camera_find_qctrl( | |||
| 270 | #define SOCAM_PCLK_SAMPLE_FALLING (1 << 13) | 254 | #define SOCAM_PCLK_SAMPLE_FALLING (1 << 13) |
| 271 | #define SOCAM_DATA_ACTIVE_HIGH (1 << 14) | 255 | #define SOCAM_DATA_ACTIVE_HIGH (1 << 14) |
| 272 | #define SOCAM_DATA_ACTIVE_LOW (1 << 15) | 256 | #define SOCAM_DATA_ACTIVE_LOW (1 << 15) |
| 257 | #define SOCAM_MIPI_1LANE (1 << 16) | ||
| 258 | #define SOCAM_MIPI_2LANE (1 << 17) | ||
| 259 | #define SOCAM_MIPI_3LANE (1 << 18) | ||
| 260 | #define SOCAM_MIPI_4LANE (1 << 19) | ||
| 261 | #define SOCAM_MIPI (SOCAM_MIPI_1LANE | SOCAM_MIPI_2LANE | \ | ||
| 262 | SOCAM_MIPI_3LANE | SOCAM_MIPI_4LANE) | ||
| 273 | 263 | ||
| 274 | #define SOCAM_DATAWIDTH_MASK (SOCAM_DATAWIDTH_4 | SOCAM_DATAWIDTH_8 | \ | 264 | #define SOCAM_DATAWIDTH_MASK (SOCAM_DATAWIDTH_4 | SOCAM_DATAWIDTH_8 | \ |
| 275 | SOCAM_DATAWIDTH_9 | SOCAM_DATAWIDTH_10 | \ | 265 | SOCAM_DATAWIDTH_9 | SOCAM_DATAWIDTH_10 | \ |
diff --git a/include/media/soc_camera_platform.h b/include/media/soc_camera_platform.h index 6d7a4fd00fc0..74f0fa15ca47 100644 --- a/include/media/soc_camera_platform.h +++ b/include/media/soc_camera_platform.h | |||
| @@ -21,7 +21,7 @@ struct soc_camera_platform_info { | |||
| 21 | unsigned long format_depth; | 21 | unsigned long format_depth; |
| 22 | struct v4l2_mbus_framefmt format; | 22 | struct v4l2_mbus_framefmt format; |
| 23 | unsigned long bus_param; | 23 | unsigned long bus_param; |
| 24 | struct device *dev; | 24 | struct soc_camera_device *icd; |
| 25 | int (*set_capture)(struct soc_camera_platform_info *info, int enable); | 25 | int (*set_capture)(struct soc_camera_platform_info *info, int enable); |
| 26 | }; | 26 | }; |
| 27 | 27 | ||
| @@ -30,8 +30,7 @@ static inline void soc_camera_platform_release(struct platform_device **pdev) | |||
| 30 | *pdev = NULL; | 30 | *pdev = NULL; |
| 31 | } | 31 | } |
| 32 | 32 | ||
| 33 | static inline int soc_camera_platform_add(const struct soc_camera_link *icl, | 33 | static inline int soc_camera_platform_add(struct soc_camera_device *icd, |
| 34 | struct device *dev, | ||
| 35 | struct platform_device **pdev, | 34 | struct platform_device **pdev, |
| 36 | struct soc_camera_link *plink, | 35 | struct soc_camera_link *plink, |
| 37 | void (*release)(struct device *dev), | 36 | void (*release)(struct device *dev), |
| @@ -40,7 +39,7 @@ static inline int soc_camera_platform_add(const struct soc_camera_link *icl, | |||
| 40 | struct soc_camera_platform_info *info = plink->priv; | 39 | struct soc_camera_platform_info *info = plink->priv; |
| 41 | int ret; | 40 | int ret; |
| 42 | 41 | ||
| 43 | if (icl != plink) | 42 | if (icd->link != plink) |
| 44 | return -ENODEV; | 43 | return -ENODEV; |
| 45 | 44 | ||
| 46 | if (*pdev) | 45 | if (*pdev) |
| @@ -50,7 +49,7 @@ static inline int soc_camera_platform_add(const struct soc_camera_link *icl, | |||
| 50 | if (!*pdev) | 49 | if (!*pdev) |
| 51 | return -ENOMEM; | 50 | return -ENOMEM; |
| 52 | 51 | ||
| 53 | info->dev = dev; | 52 | info->icd = icd; |
| 54 | 53 | ||
| 55 | (*pdev)->dev.platform_data = info; | 54 | (*pdev)->dev.platform_data = info; |
| 56 | (*pdev)->dev.release = release; | 55 | (*pdev)->dev.release = release; |
| @@ -59,17 +58,17 @@ static inline int soc_camera_platform_add(const struct soc_camera_link *icl, | |||
| 59 | if (ret < 0) { | 58 | if (ret < 0) { |
| 60 | platform_device_put(*pdev); | 59 | platform_device_put(*pdev); |
| 61 | *pdev = NULL; | 60 | *pdev = NULL; |
| 62 | info->dev = NULL; | 61 | info->icd = NULL; |
| 63 | } | 62 | } |
| 64 | 63 | ||
| 65 | return ret; | 64 | return ret; |
| 66 | } | 65 | } |
| 67 | 66 | ||
| 68 | static inline void soc_camera_platform_del(const struct soc_camera_link *icl, | 67 | static inline void soc_camera_platform_del(const struct soc_camera_device *icd, |
| 69 | struct platform_device *pdev, | 68 | struct platform_device *pdev, |
| 70 | const struct soc_camera_link *plink) | 69 | const struct soc_camera_link *plink) |
| 71 | { | 70 | { |
| 72 | if (icl != plink || !pdev) | 71 | if (icd->link != plink || !pdev) |
| 73 | return; | 72 | return; |
| 74 | 73 | ||
| 75 | platform_device_unregister(pdev); | 74 | platform_device_unregister(pdev); |
diff --git a/include/media/timb_radio.h b/include/media/timb_radio.h index a59a84854dc1..a40a6a348d21 100644 --- a/include/media/timb_radio.h +++ b/include/media/timb_radio.h | |||
| @@ -23,13 +23,8 @@ | |||
| 23 | 23 | ||
| 24 | struct timb_radio_platform_data { | 24 | struct timb_radio_platform_data { |
| 25 | int i2c_adapter; /* I2C adapter where the tuner and dsp are attached */ | 25 | int i2c_adapter; /* I2C adapter where the tuner and dsp are attached */ |
| 26 | struct { | 26 | struct i2c_board_info *tuner; |
| 27 | struct i2c_board_info *info; | 27 | struct i2c_board_info *dsp; |
| 28 | } tuner; | ||
| 29 | struct { | ||
| 30 | const char *module_name; | ||
| 31 | struct i2c_board_info *info; | ||
| 32 | } dsp; | ||
| 33 | }; | 28 | }; |
| 34 | 29 | ||
| 35 | #endif | 30 | #endif |
diff --git a/include/media/tuner.h b/include/media/tuner.h index 963e33471835..89c290b69a5c 100644 --- a/include/media/tuner.h +++ b/include/media/tuner.h | |||
| @@ -127,6 +127,8 @@ | |||
| 127 | #define TUNER_PHILIPS_FMD1216MEX_MK3 78 | 127 | #define TUNER_PHILIPS_FMD1216MEX_MK3 78 |
| 128 | #define TUNER_PHILIPS_FM1216MK5 79 | 128 | #define TUNER_PHILIPS_FM1216MK5 79 |
| 129 | #define TUNER_PHILIPS_FQ1216LME_MK3 80 /* Active loopthrough, no FM */ | 129 | #define TUNER_PHILIPS_FQ1216LME_MK3 80 /* Active loopthrough, no FM */ |
| 130 | #define TUNER_XC4000 81 /* Xceive Silicon Tuner */ | ||
| 131 | |||
| 130 | #define TUNER_PARTSNIC_PTI_5NF05 81 | 132 | #define TUNER_PARTSNIC_PTI_5NF05 81 |
| 131 | #define TUNER_PHILIPS_CU1216L 82 | 133 | #define TUNER_PHILIPS_CU1216L 82 |
| 132 | #define TUNER_NXP_TDA18271 83 | 134 | #define TUNER_NXP_TDA18271 83 |
diff --git a/include/media/v4l2-chip-ident.h b/include/media/v4l2-chip-ident.h index b3edb67a8311..63fd9d3db296 100644 --- a/include/media/v4l2-chip-ident.h +++ b/include/media/v4l2-chip-ident.h | |||
| @@ -76,6 +76,7 @@ enum { | |||
| 76 | V4L2_IDENT_OV6650 = 258, | 76 | V4L2_IDENT_OV6650 = 258, |
| 77 | V4L2_IDENT_OV2640 = 259, | 77 | V4L2_IDENT_OV2640 = 259, |
| 78 | V4L2_IDENT_OV9740 = 260, | 78 | V4L2_IDENT_OV9740 = 260, |
| 79 | V4L2_IDENT_OV5642 = 261, | ||
| 79 | 80 | ||
| 80 | /* module saa7146: reserved range 300-309 */ | 81 | /* module saa7146: reserved range 300-309 */ |
| 81 | V4L2_IDENT_SAA7146 = 300, | 82 | V4L2_IDENT_SAA7146 = 300, |
| @@ -185,8 +186,9 @@ enum { | |||
| 185 | /* module wm8775: just ident 8775 */ | 186 | /* module wm8775: just ident 8775 */ |
| 186 | V4L2_IDENT_WM8775 = 8775, | 187 | V4L2_IDENT_WM8775 = 8775, |
| 187 | 188 | ||
| 188 | /* module cafe_ccic, just ident 8801 */ | 189 | /* Marvell controllers starting at 8801 */ |
| 189 | V4L2_IDENT_CAFE = 8801, | 190 | V4L2_IDENT_CAFE = 8801, |
| 191 | V4L2_IDENT_ARMADA610 = 8802, | ||
| 190 | 192 | ||
| 191 | /* AKM AK8813/AK8814 */ | 193 | /* AKM AK8813/AK8814 */ |
| 192 | V4L2_IDENT_AK8813 = 8813, | 194 | V4L2_IDENT_AK8813 = 8813, |
diff --git a/include/media/v4l2-ctrls.h b/include/media/v4l2-ctrls.h index 97d063837b61..13fe4d744aba 100644 --- a/include/media/v4l2-ctrls.h +++ b/include/media/v4l2-ctrls.h | |||
| @@ -27,9 +27,12 @@ | |||
| 27 | 27 | ||
| 28 | /* forward references */ | 28 | /* forward references */ |
| 29 | struct v4l2_ctrl_handler; | 29 | struct v4l2_ctrl_handler; |
| 30 | struct v4l2_ctrl_helper; | ||
| 30 | struct v4l2_ctrl; | 31 | struct v4l2_ctrl; |
| 31 | struct video_device; | 32 | struct video_device; |
| 32 | struct v4l2_subdev; | 33 | struct v4l2_subdev; |
| 34 | struct v4l2_subscribed_event; | ||
| 35 | struct v4l2_fh; | ||
| 33 | 36 | ||
| 34 | /** struct v4l2_ctrl_ops - The control operations that the driver has to provide. | 37 | /** struct v4l2_ctrl_ops - The control operations that the driver has to provide. |
| 35 | * @g_volatile_ctrl: Get a new value for this control. Generally only relevant | 38 | * @g_volatile_ctrl: Get a new value for this control. Generally only relevant |
| @@ -51,6 +54,7 @@ struct v4l2_ctrl_ops { | |||
| 51 | 54 | ||
| 52 | /** struct v4l2_ctrl - The control structure. | 55 | /** struct v4l2_ctrl - The control structure. |
| 53 | * @node: The list node. | 56 | * @node: The list node. |
| 57 | * @ev_subs: The list of control event subscriptions. | ||
| 54 | * @handler: The handler that owns the control. | 58 | * @handler: The handler that owns the control. |
| 55 | * @cluster: Point to start of cluster array. | 59 | * @cluster: Point to start of cluster array. |
| 56 | * @ncontrols: Number of controls in cluster array. | 60 | * @ncontrols: Number of controls in cluster array. |
| @@ -65,6 +69,15 @@ struct v4l2_ctrl_ops { | |||
| 65 | * control's current value cannot be cached and needs to be | 69 | * control's current value cannot be cached and needs to be |
| 66 | * retrieved through the g_volatile_ctrl op. Drivers can set | 70 | * retrieved through the g_volatile_ctrl op. Drivers can set |
| 67 | * this flag. | 71 | * this flag. |
| 72 | * @is_auto: If set, then this control selects whether the other cluster | ||
| 73 | * members are in 'automatic' mode or 'manual' mode. This is | ||
| 74 | * used for autogain/gain type clusters. Drivers should never | ||
| 75 | * set this flag directly. | ||
| 76 | * @manual_mode_value: If the is_auto flag is set, then this is the value | ||
| 77 | * of the auto control that determines if that control is in | ||
| 78 | * manual mode. So if the value of the auto control equals this | ||
| 79 | * value, then the whole cluster is in manual mode. Drivers should | ||
| 80 | * never set this flag directly. | ||
| 68 | * @ops: The control ops. | 81 | * @ops: The control ops. |
| 69 | * @id: The control ID. | 82 | * @id: The control ID. |
| 70 | * @name: The control name. | 83 | * @name: The control name. |
| @@ -97,6 +110,7 @@ struct v4l2_ctrl_ops { | |||
| 97 | struct v4l2_ctrl { | 110 | struct v4l2_ctrl { |
| 98 | /* Administrative fields */ | 111 | /* Administrative fields */ |
| 99 | struct list_head node; | 112 | struct list_head node; |
| 113 | struct list_head ev_subs; | ||
| 100 | struct v4l2_ctrl_handler *handler; | 114 | struct v4l2_ctrl_handler *handler; |
| 101 | struct v4l2_ctrl **cluster; | 115 | struct v4l2_ctrl **cluster; |
| 102 | unsigned ncontrols; | 116 | unsigned ncontrols; |
| @@ -105,6 +119,8 @@ struct v4l2_ctrl { | |||
| 105 | unsigned int is_new:1; | 119 | unsigned int is_new:1; |
| 106 | unsigned int is_private:1; | 120 | unsigned int is_private:1; |
| 107 | unsigned int is_volatile:1; | 121 | unsigned int is_volatile:1; |
| 122 | unsigned int is_auto:1; | ||
| 123 | unsigned int manual_mode_value:8; | ||
| 108 | 124 | ||
| 109 | const struct v4l2_ctrl_ops *ops; | 125 | const struct v4l2_ctrl_ops *ops; |
| 110 | u32 id; | 126 | u32 id; |
| @@ -134,6 +150,7 @@ struct v4l2_ctrl { | |||
| 134 | * @node: List node for the sorted list. | 150 | * @node: List node for the sorted list. |
| 135 | * @next: Single-link list node for the hash. | 151 | * @next: Single-link list node for the hash. |
| 136 | * @ctrl: The actual control information. | 152 | * @ctrl: The actual control information. |
| 153 | * @helper: Pointer to helper struct. Used internally in prepare_ext_ctrls(). | ||
| 137 | * | 154 | * |
| 138 | * Each control handler has a list of these refs. The list_head is used to | 155 | * Each control handler has a list of these refs. The list_head is used to |
| 139 | * keep a sorted-by-control-ID list of all controls, while the next pointer | 156 | * keep a sorted-by-control-ID list of all controls, while the next pointer |
| @@ -143,6 +160,7 @@ struct v4l2_ctrl_ref { | |||
| 143 | struct list_head node; | 160 | struct list_head node; |
| 144 | struct v4l2_ctrl_ref *next; | 161 | struct v4l2_ctrl_ref *next; |
| 145 | struct v4l2_ctrl *ctrl; | 162 | struct v4l2_ctrl *ctrl; |
| 163 | struct v4l2_ctrl_helper *helper; | ||
| 146 | }; | 164 | }; |
| 147 | 165 | ||
| 148 | /** struct v4l2_ctrl_handler - The control handler keeps track of all the | 166 | /** struct v4l2_ctrl_handler - The control handler keeps track of all the |
| @@ -363,6 +381,40 @@ int v4l2_ctrl_add_handler(struct v4l2_ctrl_handler *hdl, | |||
| 363 | void v4l2_ctrl_cluster(unsigned ncontrols, struct v4l2_ctrl **controls); | 381 | void v4l2_ctrl_cluster(unsigned ncontrols, struct v4l2_ctrl **controls); |
| 364 | 382 | ||
| 365 | 383 | ||
| 384 | /** v4l2_ctrl_auto_cluster() - Mark all controls in the cluster as belonging to | ||
| 385 | * that cluster and set it up for autofoo/foo-type handling. | ||
| 386 | * @ncontrols: The number of controls in this cluster. | ||
| 387 | * @controls: The cluster control array of size @ncontrols. The first control | ||
| 388 | * must be the 'auto' control (e.g. autogain, autoexposure, etc.) | ||
| 389 | * @manual_val: The value for the first control in the cluster that equals the | ||
| 390 | * manual setting. | ||
| 391 | * @set_volatile: If true, then all controls except the first auto control will | ||
| 392 | * have is_volatile set to true. If false, then is_volatile will not | ||
| 393 | * be touched. | ||
| 394 | * | ||
| 395 | * Use for control groups where one control selects some automatic feature and | ||
| 396 | * the other controls are only active whenever the automatic feature is turned | ||
| 397 | * off (manual mode). Typical examples: autogain vs gain, auto-whitebalance vs | ||
| 398 | * red and blue balance, etc. | ||
| 399 | * | ||
| 400 | * The behavior of such controls is as follows: | ||
| 401 | * | ||
| 402 | * When the autofoo control is set to automatic, then any manual controls | ||
| 403 | * are set to inactive and any reads will call g_volatile_ctrl (if the control | ||
| 404 | * was marked volatile). | ||
| 405 | * | ||
| 406 | * When the autofoo control is set to manual, then any manual controls will | ||
| 407 | * be marked active, and any reads will just return the current value without | ||
| 408 | * going through g_volatile_ctrl. | ||
| 409 | * | ||
| 410 | * In addition, this function will set the V4L2_CTRL_FLAG_UPDATE flag | ||
| 411 | * on the autofoo control and V4L2_CTRL_FLAG_INACTIVE on the foo control(s) | ||
| 412 | * if autofoo is in auto mode. | ||
| 413 | */ | ||
| 414 | void v4l2_ctrl_auto_cluster(unsigned ncontrols, struct v4l2_ctrl **controls, | ||
| 415 | u8 manual_val, bool set_volatile); | ||
| 416 | |||
| 417 | |||
| 366 | /** v4l2_ctrl_find() - Find a control with the given ID. | 418 | /** v4l2_ctrl_find() - Find a control with the given ID. |
| 367 | * @hdl: The control handler. | 419 | * @hdl: The control handler. |
| 368 | * @id: The control ID to find. | 420 | * @id: The control ID to find. |
| @@ -379,9 +431,9 @@ struct v4l2_ctrl *v4l2_ctrl_find(struct v4l2_ctrl_handler *hdl, u32 id); | |||
| 379 | * This sets or clears the V4L2_CTRL_FLAG_INACTIVE flag atomically. | 431 | * This sets or clears the V4L2_CTRL_FLAG_INACTIVE flag atomically. |
| 380 | * Does nothing if @ctrl == NULL. | 432 | * Does nothing if @ctrl == NULL. |
| 381 | * This will usually be called from within the s_ctrl op. | 433 | * This will usually be called from within the s_ctrl op. |
| 434 | * The V4L2_EVENT_CTRL event will be generated afterwards. | ||
| 382 | * | 435 | * |
| 383 | * This function can be called regardless of whether the control handler | 436 | * This function assumes that the control handler is locked. |
| 384 | * is locked or not. | ||
| 385 | */ | 437 | */ |
| 386 | void v4l2_ctrl_activate(struct v4l2_ctrl *ctrl, bool active); | 438 | void v4l2_ctrl_activate(struct v4l2_ctrl *ctrl, bool active); |
| 387 | 439 | ||
| @@ -391,11 +443,12 @@ void v4l2_ctrl_activate(struct v4l2_ctrl *ctrl, bool active); | |||
| 391 | * | 443 | * |
| 392 | * This sets or clears the V4L2_CTRL_FLAG_GRABBED flag atomically. | 444 | * This sets or clears the V4L2_CTRL_FLAG_GRABBED flag atomically. |
| 393 | * Does nothing if @ctrl == NULL. | 445 | * Does nothing if @ctrl == NULL. |
| 446 | * The V4L2_EVENT_CTRL event will be generated afterwards. | ||
| 394 | * This will usually be called when starting or stopping streaming in the | 447 | * This will usually be called when starting or stopping streaming in the |
| 395 | * driver. | 448 | * driver. |
| 396 | * | 449 | * |
| 397 | * This function can be called regardless of whether the control handler | 450 | * This function assumes that the control handler is not locked and will |
| 398 | * is locked or not. | 451 | * take the lock itself. |
| 399 | */ | 452 | */ |
| 400 | void v4l2_ctrl_grab(struct v4l2_ctrl *ctrl, bool grabbed); | 453 | void v4l2_ctrl_grab(struct v4l2_ctrl *ctrl, bool grabbed); |
| 401 | 454 | ||
| @@ -440,15 +493,22 @@ s32 v4l2_ctrl_g_ctrl(struct v4l2_ctrl *ctrl); | |||
| 440 | */ | 493 | */ |
| 441 | int v4l2_ctrl_s_ctrl(struct v4l2_ctrl *ctrl, s32 val); | 494 | int v4l2_ctrl_s_ctrl(struct v4l2_ctrl *ctrl, s32 val); |
| 442 | 495 | ||
| 496 | /* Internal helper functions that deal with control events. */ | ||
| 497 | void v4l2_ctrl_add_event(struct v4l2_ctrl *ctrl, | ||
| 498 | struct v4l2_subscribed_event *sev); | ||
| 499 | void v4l2_ctrl_del_event(struct v4l2_ctrl *ctrl, | ||
| 500 | struct v4l2_subscribed_event *sev); | ||
| 443 | 501 | ||
| 444 | /* Helpers for ioctl_ops. If hdl == NULL then they will all return -EINVAL. */ | 502 | /* Helpers for ioctl_ops. If hdl == NULL then they will all return -EINVAL. */ |
| 445 | int v4l2_queryctrl(struct v4l2_ctrl_handler *hdl, struct v4l2_queryctrl *qc); | 503 | int v4l2_queryctrl(struct v4l2_ctrl_handler *hdl, struct v4l2_queryctrl *qc); |
| 446 | int v4l2_querymenu(struct v4l2_ctrl_handler *hdl, struct v4l2_querymenu *qm); | 504 | int v4l2_querymenu(struct v4l2_ctrl_handler *hdl, struct v4l2_querymenu *qm); |
| 447 | int v4l2_g_ctrl(struct v4l2_ctrl_handler *hdl, struct v4l2_control *ctrl); | 505 | int v4l2_g_ctrl(struct v4l2_ctrl_handler *hdl, struct v4l2_control *ctrl); |
| 448 | int v4l2_s_ctrl(struct v4l2_ctrl_handler *hdl, struct v4l2_control *ctrl); | 506 | int v4l2_s_ctrl(struct v4l2_fh *fh, struct v4l2_ctrl_handler *hdl, |
| 507 | struct v4l2_control *ctrl); | ||
| 449 | int v4l2_g_ext_ctrls(struct v4l2_ctrl_handler *hdl, struct v4l2_ext_controls *c); | 508 | int v4l2_g_ext_ctrls(struct v4l2_ctrl_handler *hdl, struct v4l2_ext_controls *c); |
| 450 | int v4l2_try_ext_ctrls(struct v4l2_ctrl_handler *hdl, struct v4l2_ext_controls *c); | 509 | int v4l2_try_ext_ctrls(struct v4l2_ctrl_handler *hdl, struct v4l2_ext_controls *c); |
| 451 | int v4l2_s_ext_ctrls(struct v4l2_ctrl_handler *hdl, struct v4l2_ext_controls *c); | 510 | int v4l2_s_ext_ctrls(struct v4l2_fh *fh, struct v4l2_ctrl_handler *hdl, |
| 511 | struct v4l2_ext_controls *c); | ||
| 452 | 512 | ||
| 453 | /* Helpers for subdevices. If the associated ctrl_handler == NULL then they | 513 | /* Helpers for subdevices. If the associated ctrl_handler == NULL then they |
| 454 | will all return -EINVAL. */ | 514 | will all return -EINVAL. */ |
diff --git a/include/media/v4l2-event.h b/include/media/v4l2-event.h index 3b86177c8cd2..5f14e8895ce2 100644 --- a/include/media/v4l2-event.h +++ b/include/media/v4l2-event.h | |||
| @@ -29,39 +29,95 @@ | |||
| 29 | #include <linux/videodev2.h> | 29 | #include <linux/videodev2.h> |
| 30 | #include <linux/wait.h> | 30 | #include <linux/wait.h> |
| 31 | 31 | ||
| 32 | /* | ||
| 33 | * Overview: | ||
| 34 | * | ||
| 35 | * Events are subscribed per-filehandle. An event specification consists of a | ||
| 36 | * type and is optionally associated with an object identified through the | ||
| 37 | * 'id' field. So an event is uniquely identified by the (type, id) tuple. | ||
| 38 | * | ||
| 39 | * The v4l2-fh struct has a list of subscribed events. The v4l2_subscribed_event | ||
| 40 | * struct is added to that list, one for every subscribed event. | ||
| 41 | * | ||
| 42 | * Each v4l2_subscribed_event struct ends with an array of v4l2_kevent structs. | ||
| 43 | * This array (ringbuffer, really) is used to store any events raised by the | ||
| 44 | * driver. The v4l2_kevent struct links into the 'available' list of the | ||
| 45 | * v4l2_fh struct so VIDIOC_DQEVENT will know which event to dequeue first. | ||
| 46 | * | ||
| 47 | * Finally, if the event subscription is associated with a particular object | ||
| 48 | * such as a V4L2 control, then that object needs to know about that as well | ||
| 49 | * so that an event can be raised by that object. So the 'node' field can | ||
| 50 | * be used to link the v4l2_subscribed_event struct into a list of that | ||
| 51 | * object. | ||
| 52 | * | ||
| 53 | * So to summarize: | ||
| 54 | * | ||
| 55 | * struct v4l2_fh has two lists: one of the subscribed events, and one of the | ||
| 56 | * pending events. | ||
| 57 | * | ||
| 58 | * struct v4l2_subscribed_event has a ringbuffer of raised (pending) events of | ||
| 59 | * that particular type. | ||
| 60 | * | ||
| 61 | * If struct v4l2_subscribed_event is associated with a specific object, then | ||
| 62 | * that object will have an internal list of struct v4l2_subscribed_event so | ||
| 63 | * it knows who subscribed an event to that object. | ||
| 64 | */ | ||
| 65 | |||
| 32 | struct v4l2_fh; | 66 | struct v4l2_fh; |
| 67 | struct v4l2_subscribed_event; | ||
| 33 | struct video_device; | 68 | struct video_device; |
| 34 | 69 | ||
| 70 | /** struct v4l2_kevent - Internal kernel event struct. | ||
| 71 | * @list: List node for the v4l2_fh->available list. | ||
| 72 | * @sev: Pointer to parent v4l2_subscribed_event. | ||
| 73 | * @event: The event itself. | ||
| 74 | */ | ||
| 35 | struct v4l2_kevent { | 75 | struct v4l2_kevent { |
| 36 | struct list_head list; | 76 | struct list_head list; |
| 77 | struct v4l2_subscribed_event *sev; | ||
| 37 | struct v4l2_event event; | 78 | struct v4l2_event event; |
| 38 | }; | 79 | }; |
| 39 | 80 | ||
| 81 | /** struct v4l2_subscribed_event - Internal struct representing a subscribed event. | ||
| 82 | * @list: List node for the v4l2_fh->subscribed list. | ||
| 83 | * @type: Event type. | ||
| 84 | * @id: Associated object ID (e.g. control ID). 0 if there isn't any. | ||
| 85 | * @flags: Copy of v4l2_event_subscription->flags. | ||
| 86 | * @fh: Filehandle that subscribed to this event. | ||
| 87 | * @node: List node that hooks into the object's event list (if there is one). | ||
| 88 | * @replace: Optional callback that can replace event 'old' with event 'new'. | ||
| 89 | * @merge: Optional callback that can merge event 'old' into event 'new'. | ||
| 90 | * @elems: The number of elements in the events array. | ||
| 91 | * @first: The index of the events containing the oldest available event. | ||
| 92 | * @in_use: The number of queued events. | ||
| 93 | * @events: An array of @elems events. | ||
| 94 | */ | ||
| 40 | struct v4l2_subscribed_event { | 95 | struct v4l2_subscribed_event { |
| 41 | struct list_head list; | 96 | struct list_head list; |
| 42 | u32 type; | 97 | u32 type; |
| 98 | u32 id; | ||
| 99 | u32 flags; | ||
| 100 | struct v4l2_fh *fh; | ||
| 101 | struct list_head node; | ||
| 102 | void (*replace)(struct v4l2_event *old, | ||
| 103 | const struct v4l2_event *new); | ||
| 104 | void (*merge)(const struct v4l2_event *old, | ||
| 105 | struct v4l2_event *new); | ||
| 106 | unsigned elems; | ||
| 107 | unsigned first; | ||
| 108 | unsigned in_use; | ||
| 109 | struct v4l2_kevent events[]; | ||
| 43 | }; | 110 | }; |
| 44 | 111 | ||
| 45 | struct v4l2_events { | ||
| 46 | wait_queue_head_t wait; | ||
| 47 | struct list_head subscribed; /* Subscribed events */ | ||
| 48 | struct list_head free; /* Events ready for use */ | ||
| 49 | struct list_head available; /* Dequeueable event */ | ||
| 50 | unsigned int navailable; | ||
| 51 | unsigned int nallocated; /* Number of allocated events */ | ||
| 52 | u32 sequence; | ||
| 53 | }; | ||
| 54 | |||
| 55 | int v4l2_event_init(struct v4l2_fh *fh); | ||
| 56 | int v4l2_event_alloc(struct v4l2_fh *fh, unsigned int n); | ||
| 57 | void v4l2_event_free(struct v4l2_fh *fh); | ||
| 58 | int v4l2_event_dequeue(struct v4l2_fh *fh, struct v4l2_event *event, | 112 | int v4l2_event_dequeue(struct v4l2_fh *fh, struct v4l2_event *event, |
| 59 | int nonblocking); | 113 | int nonblocking); |
| 60 | void v4l2_event_queue(struct video_device *vdev, const struct v4l2_event *ev); | 114 | void v4l2_event_queue(struct video_device *vdev, const struct v4l2_event *ev); |
| 115 | void v4l2_event_queue_fh(struct v4l2_fh *fh, const struct v4l2_event *ev); | ||
| 61 | int v4l2_event_pending(struct v4l2_fh *fh); | 116 | int v4l2_event_pending(struct v4l2_fh *fh); |
| 62 | int v4l2_event_subscribe(struct v4l2_fh *fh, | 117 | int v4l2_event_subscribe(struct v4l2_fh *fh, |
| 63 | struct v4l2_event_subscription *sub); | 118 | struct v4l2_event_subscription *sub, unsigned elems); |
| 64 | int v4l2_event_unsubscribe(struct v4l2_fh *fh, | 119 | int v4l2_event_unsubscribe(struct v4l2_fh *fh, |
| 65 | struct v4l2_event_subscription *sub); | 120 | struct v4l2_event_subscription *sub); |
| 121 | void v4l2_event_unsubscribe_all(struct v4l2_fh *fh); | ||
| 66 | 122 | ||
| 67 | #endif /* V4L2_EVENT_H */ | 123 | #endif /* V4L2_EVENT_H */ |
diff --git a/include/media/v4l2-fh.h b/include/media/v4l2-fh.h index 0206aa55be24..52513c225c18 100644 --- a/include/media/v4l2-fh.h +++ b/include/media/v4l2-fh.h | |||
| @@ -29,13 +29,20 @@ | |||
| 29 | #include <linux/list.h> | 29 | #include <linux/list.h> |
| 30 | 30 | ||
| 31 | struct video_device; | 31 | struct video_device; |
| 32 | struct v4l2_events; | 32 | struct v4l2_ctrl_handler; |
| 33 | 33 | ||
| 34 | struct v4l2_fh { | 34 | struct v4l2_fh { |
| 35 | struct list_head list; | 35 | struct list_head list; |
| 36 | struct video_device *vdev; | 36 | struct video_device *vdev; |
| 37 | struct v4l2_events *events; /* events, pending and subscribed */ | 37 | struct v4l2_ctrl_handler *ctrl_handler; |
| 38 | enum v4l2_priority prio; | 38 | enum v4l2_priority prio; |
| 39 | |||
| 40 | /* Events */ | ||
| 41 | wait_queue_head_t wait; | ||
| 42 | struct list_head subscribed; /* Subscribed events */ | ||
| 43 | struct list_head available; /* Dequeueable event */ | ||
| 44 | unsigned int navailable; | ||
| 45 | u32 sequence; | ||
| 39 | }; | 46 | }; |
| 40 | 47 | ||
| 41 | /* | 48 | /* |
| @@ -44,7 +51,7 @@ struct v4l2_fh { | |||
| 44 | * from driver's v4l2_file_operations->open() handler if the driver | 51 | * from driver's v4l2_file_operations->open() handler if the driver |
| 45 | * uses v4l2_fh. | 52 | * uses v4l2_fh. |
| 46 | */ | 53 | */ |
| 47 | int v4l2_fh_init(struct v4l2_fh *fh, struct video_device *vdev); | 54 | void v4l2_fh_init(struct v4l2_fh *fh, struct video_device *vdev); |
| 48 | /* | 55 | /* |
| 49 | * Add the fh to the list of file handles on a video_device. The file | 56 | * Add the fh to the list of file handles on a video_device. The file |
| 50 | * handle must be initialised first. | 57 | * handle must be initialised first. |
diff --git a/include/media/v4l2-mediabus.h b/include/media/v4l2-mediabus.h index 971c7fa29614..6114007c8c74 100644 --- a/include/media/v4l2-mediabus.h +++ b/include/media/v4l2-mediabus.h | |||
| @@ -13,6 +13,69 @@ | |||
| 13 | 13 | ||
| 14 | #include <linux/v4l2-mediabus.h> | 14 | #include <linux/v4l2-mediabus.h> |
| 15 | 15 | ||
| 16 | /* Parallel flags */ | ||
| 17 | /* | ||
| 18 | * Can the client run in master or in slave mode. By "Master mode" an operation | ||
| 19 | * mode is meant, when the client (e.g., a camera sensor) is producing | ||
| 20 | * horizontal and vertical synchronisation. In "Slave mode" the host is | ||
| 21 | * providing these signals to the slave. | ||
| 22 | */ | ||
| 23 | #define V4L2_MBUS_MASTER (1 << 0) | ||
| 24 | #define V4L2_MBUS_SLAVE (1 << 1) | ||
| 25 | /* Which signal polarities it supports */ | ||
| 26 | /* Note: in BT.656 mode HSYNC and VSYNC are unused */ | ||
| 27 | #define V4L2_MBUS_HSYNC_ACTIVE_HIGH (1 << 2) | ||
| 28 | #define V4L2_MBUS_HSYNC_ACTIVE_LOW (1 << 3) | ||
| 29 | #define V4L2_MBUS_VSYNC_ACTIVE_HIGH (1 << 4) | ||
| 30 | #define V4L2_MBUS_VSYNC_ACTIVE_LOW (1 << 5) | ||
| 31 | #define V4L2_MBUS_PCLK_SAMPLE_RISING (1 << 6) | ||
| 32 | #define V4L2_MBUS_PCLK_SAMPLE_FALLING (1 << 7) | ||
| 33 | #define V4L2_MBUS_DATA_ACTIVE_HIGH (1 << 8) | ||
| 34 | #define V4L2_MBUS_DATA_ACTIVE_LOW (1 << 9) | ||
| 35 | |||
| 36 | /* Serial flags */ | ||
| 37 | /* How many lanes the client can use */ | ||
| 38 | #define V4L2_MBUS_CSI2_1_LANE (1 << 0) | ||
| 39 | #define V4L2_MBUS_CSI2_2_LANE (1 << 1) | ||
| 40 | #define V4L2_MBUS_CSI2_3_LANE (1 << 2) | ||
| 41 | #define V4L2_MBUS_CSI2_4_LANE (1 << 3) | ||
| 42 | /* On which channels it can send video data */ | ||
| 43 | #define V4L2_MBUS_CSI2_CHANNEL_0 (1 << 4) | ||
| 44 | #define V4L2_MBUS_CSI2_CHANNEL_1 (1 << 5) | ||
| 45 | #define V4L2_MBUS_CSI2_CHANNEL_2 (1 << 6) | ||
| 46 | #define V4L2_MBUS_CSI2_CHANNEL_3 (1 << 7) | ||
| 47 | /* Does it support only continuous or also non-continuous clock mode */ | ||
| 48 | #define V4L2_MBUS_CSI2_CONTINUOUS_CLOCK (1 << 8) | ||
| 49 | #define V4L2_MBUS_CSI2_NONCONTINUOUS_CLOCK (1 << 9) | ||
| 50 | |||
| 51 | #define V4L2_MBUS_CSI2_LANES (V4L2_MBUS_CSI2_1_LANE | V4L2_MBUS_CSI2_2_LANE | \ | ||
| 52 | V4L2_MBUS_CSI2_3_LANE | V4L2_MBUS_CSI2_4_LANE) | ||
| 53 | #define V4L2_MBUS_CSI2_CHANNELS (V4L2_MBUS_CSI2_CHANNEL_0 | V4L2_MBUS_CSI2_CHANNEL_1 | \ | ||
| 54 | V4L2_MBUS_CSI2_CHANNEL_2 | V4L2_MBUS_CSI2_CHANNEL_3) | ||
| 55 | |||
| 56 | /** | ||
| 57 | * v4l2_mbus_type - media bus type | ||
| 58 | * @V4L2_MBUS_PARALLEL: parallel interface with hsync and vsync | ||
| 59 | * @V4L2_MBUS_BT656: parallel interface with embedded synchronisation, can | ||
| 60 | * also be used for BT.1120 | ||
| 61 | * @V4L2_MBUS_CSI2: MIPI CSI-2 serial interface | ||
| 62 | */ | ||
| 63 | enum v4l2_mbus_type { | ||
| 64 | V4L2_MBUS_PARALLEL, | ||
| 65 | V4L2_MBUS_BT656, | ||
| 66 | V4L2_MBUS_CSI2, | ||
| 67 | }; | ||
| 68 | |||
| 69 | /** | ||
| 70 | * v4l2_mbus_config - media bus configuration | ||
| 71 | * @type: in: interface type | ||
| 72 | * @flags: in / out: configuration flags, depending on @type | ||
| 73 | */ | ||
| 74 | struct v4l2_mbus_config { | ||
| 75 | enum v4l2_mbus_type type; | ||
| 76 | unsigned int flags; | ||
| 77 | }; | ||
| 78 | |||
| 16 | static inline void v4l2_fill_pix_format(struct v4l2_pix_format *pix_fmt, | 79 | static inline void v4l2_fill_pix_format(struct v4l2_pix_format *pix_fmt, |
| 17 | const struct v4l2_mbus_framefmt *mbus_fmt) | 80 | const struct v4l2_mbus_framefmt *mbus_fmt) |
| 18 | { | 81 | { |
diff --git a/include/media/v4l2-subdev.h b/include/media/v4l2-subdev.h index 2884e3e69cb1..257da1a30f66 100644 --- a/include/media/v4l2-subdev.h +++ b/include/media/v4l2-subdev.h | |||
| @@ -229,6 +229,12 @@ struct v4l2_subdev_audio_ops { | |||
| 229 | s_std_output: set v4l2_std_id for video OUTPUT devices. This is ignored by | 229 | s_std_output: set v4l2_std_id for video OUTPUT devices. This is ignored by |
| 230 | video input devices. | 230 | video input devices. |
| 231 | 231 | ||
| 232 | g_std_output: get current standard for video OUTPUT devices. This is ignored | ||
| 233 | by video input devices. | ||
| 234 | |||
| 235 | g_tvnorms_output: get v4l2_std_id with all standards supported by video | ||
| 236 | OUTPUT device. This is ignored by video input devices. | ||
| 237 | |||
| 232 | s_crystal_freq: sets the frequency of the crystal used to generate the | 238 | s_crystal_freq: sets the frequency of the crystal used to generate the |
| 233 | clocks in Hz. An extra flags field allows device specific configuration | 239 | clocks in Hz. An extra flags field allows device specific configuration |
| 234 | regarding clock frequency dividers, etc. If not used, then set flags | 240 | regarding clock frequency dividers, etc. If not used, then set flags |
| @@ -243,6 +249,8 @@ struct v4l2_subdev_audio_ops { | |||
| 243 | s_dv_preset: set dv (Digital Video) preset in the sub device. Similar to | 249 | s_dv_preset: set dv (Digital Video) preset in the sub device. Similar to |
| 244 | s_std() | 250 | s_std() |
| 245 | 251 | ||
| 252 | g_dv_preset: get current dv (Digital Video) preset in the sub device. | ||
| 253 | |||
| 246 | query_dv_preset: query dv preset in the sub device. This is similar to | 254 | query_dv_preset: query dv preset in the sub device. This is similar to |
| 247 | querystd() | 255 | querystd() |
| 248 | 256 | ||
| @@ -259,12 +267,20 @@ struct v4l2_subdev_audio_ops { | |||
| 259 | try_mbus_fmt: try to set a pixel format on a video data source | 267 | try_mbus_fmt: try to set a pixel format on a video data source |
| 260 | 268 | ||
| 261 | s_mbus_fmt: set a pixel format on a video data source | 269 | s_mbus_fmt: set a pixel format on a video data source |
| 270 | |||
| 271 | g_mbus_config: get supported mediabus configurations | ||
| 272 | |||
| 273 | s_mbus_config: set a certain mediabus configuration. This operation is added | ||
| 274 | for compatibility with soc-camera drivers and should not be used by new | ||
| 275 | software. | ||
| 262 | */ | 276 | */ |
| 263 | struct v4l2_subdev_video_ops { | 277 | struct v4l2_subdev_video_ops { |
| 264 | int (*s_routing)(struct v4l2_subdev *sd, u32 input, u32 output, u32 config); | 278 | int (*s_routing)(struct v4l2_subdev *sd, u32 input, u32 output, u32 config); |
| 265 | int (*s_crystal_freq)(struct v4l2_subdev *sd, u32 freq, u32 flags); | 279 | int (*s_crystal_freq)(struct v4l2_subdev *sd, u32 freq, u32 flags); |
| 266 | int (*s_std_output)(struct v4l2_subdev *sd, v4l2_std_id std); | 280 | int (*s_std_output)(struct v4l2_subdev *sd, v4l2_std_id std); |
| 281 | int (*g_std_output)(struct v4l2_subdev *sd, v4l2_std_id *std); | ||
| 267 | int (*querystd)(struct v4l2_subdev *sd, v4l2_std_id *std); | 282 | int (*querystd)(struct v4l2_subdev *sd, v4l2_std_id *std); |
| 283 | int (*g_tvnorms_output)(struct v4l2_subdev *sd, v4l2_std_id *std); | ||
| 268 | int (*g_input_status)(struct v4l2_subdev *sd, u32 *status); | 284 | int (*g_input_status)(struct v4l2_subdev *sd, u32 *status); |
| 269 | int (*s_stream)(struct v4l2_subdev *sd, int enable); | 285 | int (*s_stream)(struct v4l2_subdev *sd, int enable); |
| 270 | int (*cropcap)(struct v4l2_subdev *sd, struct v4l2_cropcap *cc); | 286 | int (*cropcap)(struct v4l2_subdev *sd, struct v4l2_cropcap *cc); |
| @@ -282,6 +298,8 @@ struct v4l2_subdev_video_ops { | |||
| 282 | struct v4l2_dv_enum_preset *preset); | 298 | struct v4l2_dv_enum_preset *preset); |
| 283 | int (*s_dv_preset)(struct v4l2_subdev *sd, | 299 | int (*s_dv_preset)(struct v4l2_subdev *sd, |
| 284 | struct v4l2_dv_preset *preset); | 300 | struct v4l2_dv_preset *preset); |
| 301 | int (*g_dv_preset)(struct v4l2_subdev *sd, | ||
| 302 | struct v4l2_dv_preset *preset); | ||
| 285 | int (*query_dv_preset)(struct v4l2_subdev *sd, | 303 | int (*query_dv_preset)(struct v4l2_subdev *sd, |
| 286 | struct v4l2_dv_preset *preset); | 304 | struct v4l2_dv_preset *preset); |
| 287 | int (*s_dv_timings)(struct v4l2_subdev *sd, | 305 | int (*s_dv_timings)(struct v4l2_subdev *sd, |
| @@ -298,6 +316,10 @@ struct v4l2_subdev_video_ops { | |||
| 298 | struct v4l2_mbus_framefmt *fmt); | 316 | struct v4l2_mbus_framefmt *fmt); |
| 299 | int (*s_mbus_fmt)(struct v4l2_subdev *sd, | 317 | int (*s_mbus_fmt)(struct v4l2_subdev *sd, |
| 300 | struct v4l2_mbus_framefmt *fmt); | 318 | struct v4l2_mbus_framefmt *fmt); |
| 319 | int (*g_mbus_config)(struct v4l2_subdev *sd, | ||
| 320 | struct v4l2_mbus_config *cfg); | ||
| 321 | int (*s_mbus_config)(struct v4l2_subdev *sd, | ||
| 322 | const struct v4l2_mbus_config *cfg); | ||
| 301 | }; | 323 | }; |
| 302 | 324 | ||
| 303 | /* | 325 | /* |
| @@ -513,8 +535,6 @@ struct v4l2_subdev { | |||
| 513 | void *host_priv; | 535 | void *host_priv; |
| 514 | /* subdev device node */ | 536 | /* subdev device node */ |
| 515 | struct video_device devnode; | 537 | struct video_device devnode; |
| 516 | /* number of events to be allocated on open */ | ||
| 517 | unsigned int nevents; | ||
| 518 | }; | 538 | }; |
| 519 | 539 | ||
| 520 | #define media_entity_to_v4l2_subdev(ent) \ | 540 | #define media_entity_to_v4l2_subdev(ent) \ |
diff --git a/include/sound/tea575x-tuner.h b/include/sound/tea575x-tuner.h index d2ea112fc20f..726e94742a5c 100644 --- a/include/sound/tea575x-tuner.h +++ b/include/sound/tea575x-tuner.h | |||
| @@ -23,8 +23,8 @@ | |||
| 23 | */ | 23 | */ |
| 24 | 24 | ||
| 25 | #include <linux/videodev2.h> | 25 | #include <linux/videodev2.h> |
| 26 | #include <media/v4l2-ctrls.h> | ||
| 26 | #include <media/v4l2-dev.h> | 27 | #include <media/v4l2-dev.h> |
| 27 | #include <media/v4l2-ioctl.h> | ||
| 28 | 28 | ||
| 29 | #define TEA575X_FMIF 10700 | 29 | #define TEA575X_FMIF 10700 |
| 30 | 30 | ||
| @@ -42,18 +42,20 @@ struct snd_tea575x_ops { | |||
| 42 | }; | 42 | }; |
| 43 | 43 | ||
| 44 | struct snd_tea575x { | 44 | struct snd_tea575x { |
| 45 | struct video_device *vd; /* video device */ | 45 | struct video_device vd; /* video device */ |
| 46 | bool tea5759; /* 5759 chip is present */ | 46 | bool tea5759; /* 5759 chip is present */ |
| 47 | bool mute; /* Device is muted? */ | 47 | bool mute; /* Device is muted? */ |
| 48 | bool stereo; /* receiving stereo */ | 48 | bool stereo; /* receiving stereo */ |
| 49 | bool tuned; /* tuned to a station */ | 49 | bool tuned; /* tuned to a station */ |
| 50 | unsigned int val; /* hw value */ | 50 | unsigned int val; /* hw value */ |
| 51 | unsigned long freq; /* frequency */ | 51 | unsigned long freq; /* frequency */ |
| 52 | unsigned long in_use; /* set if the device is in use */ | 52 | struct mutex mutex; |
| 53 | struct snd_tea575x_ops *ops; | 53 | struct snd_tea575x_ops *ops; |
| 54 | void *private_data; | 54 | void *private_data; |
| 55 | u8 card[32]; | 55 | u8 card[32]; |
| 56 | u8 bus_info[32]; | 56 | u8 bus_info[32]; |
| 57 | struct v4l2_ctrl_handler ctrl_handler; | ||
| 58 | int (*ext_init)(struct snd_tea575x *tea); | ||
| 57 | }; | 59 | }; |
| 58 | 60 | ||
| 59 | int snd_tea575x_init(struct snd_tea575x *tea); | 61 | int snd_tea575x_init(struct snd_tea575x *tea); |
diff --git a/kernel/compat.c b/kernel/compat.c index 616c78197cca..e2435ee9993a 100644 --- a/kernel/compat.c +++ b/kernel/compat.c | |||
| @@ -158,6 +158,7 @@ int put_compat_timespec(const struct timespec *ts, struct compat_timespec __user | |||
| 158 | __put_user(ts->tv_sec, &cts->tv_sec) || | 158 | __put_user(ts->tv_sec, &cts->tv_sec) || |
| 159 | __put_user(ts->tv_nsec, &cts->tv_nsec)) ? -EFAULT : 0; | 159 | __put_user(ts->tv_nsec, &cts->tv_nsec)) ? -EFAULT : 0; |
| 160 | } | 160 | } |
| 161 | EXPORT_SYMBOL_GPL(put_compat_timespec); | ||
| 161 | 162 | ||
| 162 | static long compat_nanosleep_restart(struct restart_block *restart) | 163 | static long compat_nanosleep_restart(struct restart_block *restart) |
| 163 | { | 164 | { |
diff --git a/sound/i2c/other/tea575x-tuner.c b/sound/i2c/other/tea575x-tuner.c index 4831800239d3..484a35b3715f 100644 --- a/sound/i2c/other/tea575x-tuner.c +++ b/sound/i2c/other/tea575x-tuner.c | |||
| @@ -22,11 +22,11 @@ | |||
| 22 | 22 | ||
| 23 | #include <asm/io.h> | 23 | #include <asm/io.h> |
| 24 | #include <linux/delay.h> | 24 | #include <linux/delay.h> |
| 25 | #include <linux/interrupt.h> | ||
| 26 | #include <linux/init.h> | 25 | #include <linux/init.h> |
| 27 | #include <linux/slab.h> | 26 | #include <linux/slab.h> |
| 28 | #include <linux/version.h> | 27 | #include <linux/version.h> |
| 29 | #include <sound/core.h> | 28 | #include <media/v4l2-dev.h> |
| 29 | #include <media/v4l2-ioctl.h> | ||
| 30 | #include <sound/tea575x-tuner.h> | 30 | #include <sound/tea575x-tuner.h> |
| 31 | 31 | ||
| 32 | MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>"); | 32 | MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>"); |
| @@ -62,17 +62,6 @@ module_param(radio_nr, int, 0); | |||
| 62 | #define TEA575X_BIT_DUMMY (1<<15) /* buffer */ | 62 | #define TEA575X_BIT_DUMMY (1<<15) /* buffer */ |
| 63 | #define TEA575X_BIT_FREQ_MASK 0x7fff | 63 | #define TEA575X_BIT_FREQ_MASK 0x7fff |
| 64 | 64 | ||
| 65 | static struct v4l2_queryctrl radio_qctrl[] = { | ||
| 66 | { | ||
| 67 | .id = V4L2_CID_AUDIO_MUTE, | ||
| 68 | .name = "Mute", | ||
| 69 | .minimum = 0, | ||
| 70 | .maximum = 1, | ||
| 71 | .default_value = 1, | ||
| 72 | .type = V4L2_CTRL_TYPE_BOOLEAN, | ||
| 73 | } | ||
| 74 | }; | ||
| 75 | |||
| 76 | /* | 65 | /* |
| 77 | * lowlevel part | 66 | * lowlevel part |
| 78 | */ | 67 | */ |
| @@ -266,83 +255,23 @@ static int vidioc_s_audio(struct file *file, void *priv, | |||
| 266 | return 0; | 255 | return 0; |
| 267 | } | 256 | } |
| 268 | 257 | ||
| 269 | static int vidioc_queryctrl(struct file *file, void *priv, | 258 | static int tea575x_s_ctrl(struct v4l2_ctrl *ctrl) |
| 270 | struct v4l2_queryctrl *qc) | ||
| 271 | { | ||
| 272 | int i; | ||
| 273 | |||
| 274 | for (i = 0; i < ARRAY_SIZE(radio_qctrl); i++) { | ||
| 275 | if (qc->id && qc->id == radio_qctrl[i].id) { | ||
| 276 | memcpy(qc, &(radio_qctrl[i]), | ||
| 277 | sizeof(*qc)); | ||
| 278 | return 0; | ||
| 279 | } | ||
| 280 | } | ||
| 281 | return -EINVAL; | ||
| 282 | } | ||
| 283 | |||
| 284 | static int vidioc_g_ctrl(struct file *file, void *priv, | ||
| 285 | struct v4l2_control *ctrl) | ||
| 286 | { | 259 | { |
| 287 | struct snd_tea575x *tea = video_drvdata(file); | 260 | struct snd_tea575x *tea = container_of(ctrl->handler, struct snd_tea575x, ctrl_handler); |
| 288 | 261 | ||
| 289 | switch (ctrl->id) { | 262 | switch (ctrl->id) { |
| 290 | case V4L2_CID_AUDIO_MUTE: | 263 | case V4L2_CID_AUDIO_MUTE: |
| 291 | ctrl->value = tea->mute; | 264 | tea->mute = ctrl->val; |
| 265 | snd_tea575x_set_freq(tea); | ||
| 292 | return 0; | 266 | return 0; |
| 293 | } | 267 | } |
| 294 | return -EINVAL; | ||
| 295 | } | ||
| 296 | 268 | ||
| 297 | static int vidioc_s_ctrl(struct file *file, void *priv, | ||
| 298 | struct v4l2_control *ctrl) | ||
| 299 | { | ||
| 300 | struct snd_tea575x *tea = video_drvdata(file); | ||
| 301 | |||
| 302 | switch (ctrl->id) { | ||
| 303 | case V4L2_CID_AUDIO_MUTE: | ||
| 304 | if (tea->mute != ctrl->value) { | ||
| 305 | tea->mute = ctrl->value; | ||
| 306 | snd_tea575x_set_freq(tea); | ||
| 307 | } | ||
| 308 | return 0; | ||
| 309 | } | ||
| 310 | return -EINVAL; | 269 | return -EINVAL; |
| 311 | } | 270 | } |
| 312 | 271 | ||
| 313 | static int vidioc_g_input(struct file *filp, void *priv, unsigned int *i) | ||
| 314 | { | ||
| 315 | *i = 0; | ||
| 316 | return 0; | ||
| 317 | } | ||
| 318 | |||
| 319 | static int vidioc_s_input(struct file *filp, void *priv, unsigned int i) | ||
| 320 | { | ||
| 321 | if (i != 0) | ||
| 322 | return -EINVAL; | ||
| 323 | return 0; | ||
| 324 | } | ||
| 325 | |||
| 326 | static int snd_tea575x_exclusive_open(struct file *file) | ||
| 327 | { | ||
| 328 | struct snd_tea575x *tea = video_drvdata(file); | ||
| 329 | |||
| 330 | return test_and_set_bit(0, &tea->in_use) ? -EBUSY : 0; | ||
| 331 | } | ||
| 332 | |||
| 333 | static int snd_tea575x_exclusive_release(struct file *file) | ||
| 334 | { | ||
| 335 | struct snd_tea575x *tea = video_drvdata(file); | ||
| 336 | |||
| 337 | clear_bit(0, &tea->in_use); | ||
| 338 | return 0; | ||
| 339 | } | ||
| 340 | |||
| 341 | static const struct v4l2_file_operations tea575x_fops = { | 272 | static const struct v4l2_file_operations tea575x_fops = { |
| 342 | .owner = THIS_MODULE, | 273 | .owner = THIS_MODULE, |
| 343 | .open = snd_tea575x_exclusive_open, | 274 | .unlocked_ioctl = video_ioctl2, |
| 344 | .release = snd_tea575x_exclusive_release, | ||
| 345 | .ioctl = video_ioctl2, | ||
| 346 | }; | 275 | }; |
| 347 | 276 | ||
| 348 | static const struct v4l2_ioctl_ops tea575x_ioctl_ops = { | 277 | static const struct v4l2_ioctl_ops tea575x_ioctl_ops = { |
| @@ -351,20 +280,19 @@ static const struct v4l2_ioctl_ops tea575x_ioctl_ops = { | |||
| 351 | .vidioc_s_tuner = vidioc_s_tuner, | 280 | .vidioc_s_tuner = vidioc_s_tuner, |
| 352 | .vidioc_g_audio = vidioc_g_audio, | 281 | .vidioc_g_audio = vidioc_g_audio, |
| 353 | .vidioc_s_audio = vidioc_s_audio, | 282 | .vidioc_s_audio = vidioc_s_audio, |
| 354 | .vidioc_g_input = vidioc_g_input, | ||
| 355 | .vidioc_s_input = vidioc_s_input, | ||
| 356 | .vidioc_g_frequency = vidioc_g_frequency, | 283 | .vidioc_g_frequency = vidioc_g_frequency, |
| 357 | .vidioc_s_frequency = vidioc_s_frequency, | 284 | .vidioc_s_frequency = vidioc_s_frequency, |
| 358 | .vidioc_queryctrl = vidioc_queryctrl, | ||
| 359 | .vidioc_g_ctrl = vidioc_g_ctrl, | ||
| 360 | .vidioc_s_ctrl = vidioc_s_ctrl, | ||
| 361 | }; | 285 | }; |
| 362 | 286 | ||
| 363 | static struct video_device tea575x_radio = { | 287 | static struct video_device tea575x_radio = { |
| 364 | .name = "tea575x-tuner", | 288 | .name = "tea575x-tuner", |
| 365 | .fops = &tea575x_fops, | 289 | .fops = &tea575x_fops, |
| 366 | .ioctl_ops = &tea575x_ioctl_ops, | 290 | .ioctl_ops = &tea575x_ioctl_ops, |
| 367 | .release = video_device_release, | 291 | .release = video_device_release_empty, |
| 292 | }; | ||
| 293 | |||
| 294 | static const struct v4l2_ctrl_ops tea575x_ctrl_ops = { | ||
| 295 | .s_ctrl = tea575x_s_ctrl, | ||
| 368 | }; | 296 | }; |
| 369 | 297 | ||
| 370 | /* | 298 | /* |
| @@ -373,7 +301,6 @@ static struct video_device tea575x_radio = { | |||
| 373 | int snd_tea575x_init(struct snd_tea575x *tea) | 301 | int snd_tea575x_init(struct snd_tea575x *tea) |
| 374 | { | 302 | { |
| 375 | int retval; | 303 | int retval; |
| 376 | struct video_device *tea575x_radio_inst; | ||
| 377 | 304 | ||
| 378 | tea->mute = 1; | 305 | tea->mute = 1; |
| 379 | 306 | ||
| @@ -381,43 +308,49 @@ int snd_tea575x_init(struct snd_tea575x *tea) | |||
| 381 | if (snd_tea575x_read(tea) != 0x55AA) | 308 | if (snd_tea575x_read(tea) != 0x55AA) |
| 382 | return -ENODEV; | 309 | return -ENODEV; |
| 383 | 310 | ||
| 384 | tea->in_use = 0; | ||
| 385 | tea->val = TEA575X_BIT_BAND_FM | TEA575X_BIT_SEARCH_10_40; | 311 | tea->val = TEA575X_BIT_BAND_FM | TEA575X_BIT_SEARCH_10_40; |
| 386 | tea->freq = 90500 * 16; /* 90.5Mhz default */ | 312 | tea->freq = 90500 * 16; /* 90.5Mhz default */ |
| 313 | snd_tea575x_set_freq(tea); | ||
| 387 | 314 | ||
| 388 | tea575x_radio_inst = video_device_alloc(); | 315 | tea->vd = tea575x_radio; |
| 389 | if (tea575x_radio_inst == NULL) { | 316 | video_set_drvdata(&tea->vd, tea); |
| 390 | printk(KERN_ERR "tea575x-tuner: not enough memory\n"); | 317 | mutex_init(&tea->mutex); |
| 391 | return -ENOMEM; | 318 | tea->vd.lock = &tea->mutex; |
| 392 | } | ||
| 393 | 319 | ||
| 394 | memcpy(tea575x_radio_inst, &tea575x_radio, sizeof(tea575x_radio)); | 320 | v4l2_ctrl_handler_init(&tea->ctrl_handler, 1); |
| 321 | tea->vd.ctrl_handler = &tea->ctrl_handler; | ||
| 322 | v4l2_ctrl_new_std(&tea->ctrl_handler, &tea575x_ctrl_ops, V4L2_CID_AUDIO_MUTE, 0, 1, 1, 1); | ||
| 323 | retval = tea->ctrl_handler.error; | ||
| 324 | if (retval) { | ||
| 325 | printk(KERN_ERR "tea575x-tuner: can't initialize controls\n"); | ||
| 326 | v4l2_ctrl_handler_free(&tea->ctrl_handler); | ||
| 327 | return retval; | ||
| 328 | } | ||
| 395 | 329 | ||
| 396 | strcpy(tea575x_radio.name, tea->tea5759 ? | 330 | if (tea->ext_init) { |
| 397 | "TEA5759 radio" : "TEA5757 radio"); | 331 | retval = tea->ext_init(tea); |
| 332 | if (retval) { | ||
| 333 | v4l2_ctrl_handler_free(&tea->ctrl_handler); | ||
| 334 | return retval; | ||
| 335 | } | ||
| 336 | } | ||
| 398 | 337 | ||
| 399 | video_set_drvdata(tea575x_radio_inst, tea); | 338 | v4l2_ctrl_handler_setup(&tea->ctrl_handler); |
| 400 | 339 | ||
| 401 | retval = video_register_device(tea575x_radio_inst, | 340 | retval = video_register_device(&tea->vd, VFL_TYPE_RADIO, radio_nr); |
| 402 | VFL_TYPE_RADIO, radio_nr); | ||
| 403 | if (retval) { | 341 | if (retval) { |
| 404 | printk(KERN_ERR "tea575x-tuner: can't register video device!\n"); | 342 | printk(KERN_ERR "tea575x-tuner: can't register video device!\n"); |
| 405 | kfree(tea575x_radio_inst); | 343 | v4l2_ctrl_handler_free(&tea->ctrl_handler); |
| 406 | return retval; | 344 | return retval; |
| 407 | } | 345 | } |
| 408 | 346 | ||
| 409 | snd_tea575x_set_freq(tea); | ||
| 410 | tea->vd = tea575x_radio_inst; | ||
| 411 | |||
| 412 | return 0; | 347 | return 0; |
| 413 | } | 348 | } |
| 414 | 349 | ||
| 415 | void snd_tea575x_exit(struct snd_tea575x *tea) | 350 | void snd_tea575x_exit(struct snd_tea575x *tea) |
| 416 | { | 351 | { |
| 417 | if (tea->vd) { | 352 | video_unregister_device(&tea->vd); |
| 418 | video_unregister_device(tea->vd); | 353 | v4l2_ctrl_handler_free(&tea->ctrl_handler); |
| 419 | tea->vd = NULL; | ||
| 420 | } | ||
| 421 | } | 354 | } |
| 422 | 355 | ||
| 423 | static int __init alsa_tea575x_module_init(void) | 356 | static int __init alsa_tea575x_module_init(void) |
diff --git a/sound/pci/Kconfig b/sound/pci/Kconfig index e90d103e177e..50abf5bf8e09 100644 --- a/sound/pci/Kconfig +++ b/sound/pci/Kconfig | |||
| @@ -565,8 +565,8 @@ config SND_FM801_TEA575X_BOOL | |||
| 565 | 565 | ||
| 566 | config SND_TEA575X | 566 | config SND_TEA575X |
| 567 | tristate | 567 | tristate |
| 568 | depends on SND_FM801_TEA575X_BOOL || SND_ES1968_RADIO | 568 | depends on SND_FM801_TEA575X_BOOL || SND_ES1968_RADIO || RADIO_SF16FMR2 |
| 569 | default SND_FM801 || SND_ES1968 | 569 | default SND_FM801 || SND_ES1968 || RADIO_SF16FMR2 |
| 570 | 570 | ||
| 571 | source "sound/pci/hda/Kconfig" | 571 | source "sound/pci/hda/Kconfig" |
| 572 | 572 | ||
