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-rw-r--r--arch/arm/mach-s5pv210/Makefile4
-rw-r--r--arch/arm/mach-s5pv210/dev-audio.c327
-rw-r--r--arch/arm/mach-s5pv210/include/mach/map.h13
-rw-r--r--arch/arm/plat-samsung/include/plat/devs.h8
4 files changed, 352 insertions, 0 deletions
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile
index 8ebf51c52a01..e435afe7cffe 100644
--- a/arch/arm/mach-s5pv210/Makefile
+++ b/arch/arm/mach-s5pv210/Makefile
@@ -18,3 +18,7 @@ obj-$(CONFIG_CPU_S5PV210) += cpu.o init.o clock.o
18 18
19obj-$(CONFIG_MACH_SMDKV210) += mach-smdkv210.o 19obj-$(CONFIG_MACH_SMDKV210) += mach-smdkv210.o
20obj-$(CONFIG_MACH_SMDKC110) += mach-smdkc110.o 20obj-$(CONFIG_MACH_SMDKC110) += mach-smdkc110.o
21
22# device support
23
24obj-y += dev-audio.o
diff --git a/arch/arm/mach-s5pv210/dev-audio.c b/arch/arm/mach-s5pv210/dev-audio.c
new file mode 100644
index 000000000000..6e215330a1be
--- /dev/null
+++ b/arch/arm/mach-s5pv210/dev-audio.c
@@ -0,0 +1,327 @@
1/* linux/arch/arm/mach-s5pv210/dev-audio.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co. Ltd
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/platform_device.h>
12#include <linux/dma-mapping.h>
13
14#include <plat/gpio-cfg.h>
15#include <plat/audio.h>
16
17#include <mach/gpio.h>
18#include <mach/map.h>
19#include <mach/dma.h>
20#include <mach/irqs.h>
21
22static int s5pv210_cfg_i2s(struct platform_device *pdev)
23{
24 /* configure GPIO for i2s port */
25 switch (pdev->id) {
26 case 1:
27 s3c_gpio_cfgpin(S5PV210_GPC0(0), S3C_GPIO_SFN(2));
28 s3c_gpio_cfgpin(S5PV210_GPC0(1), S3C_GPIO_SFN(2));
29 s3c_gpio_cfgpin(S5PV210_GPC0(2), S3C_GPIO_SFN(2));
30 s3c_gpio_cfgpin(S5PV210_GPC0(3), S3C_GPIO_SFN(2));
31 s3c_gpio_cfgpin(S5PV210_GPC0(4), S3C_GPIO_SFN(2));
32 break;
33
34 case 2:
35 s3c_gpio_cfgpin(S5PV210_GPC1(0), S3C_GPIO_SFN(4));
36 s3c_gpio_cfgpin(S5PV210_GPC1(1), S3C_GPIO_SFN(4));
37 s3c_gpio_cfgpin(S5PV210_GPC1(2), S3C_GPIO_SFN(4));
38 s3c_gpio_cfgpin(S5PV210_GPC1(3), S3C_GPIO_SFN(4));
39 s3c_gpio_cfgpin(S5PV210_GPC1(4), S3C_GPIO_SFN(4));
40 break;
41
42 case -1:
43 s3c_gpio_cfgpin(S5PV210_GPI(0), S3C_GPIO_SFN(2));
44 s3c_gpio_cfgpin(S5PV210_GPI(1), S3C_GPIO_SFN(2));
45 s3c_gpio_cfgpin(S5PV210_GPI(2), S3C_GPIO_SFN(2));
46 s3c_gpio_cfgpin(S5PV210_GPI(3), S3C_GPIO_SFN(2));
47 s3c_gpio_cfgpin(S5PV210_GPI(4), S3C_GPIO_SFN(2));
48 s3c_gpio_cfgpin(S5PV210_GPI(5), S3C_GPIO_SFN(2));
49 s3c_gpio_cfgpin(S5PV210_GPI(6), S3C_GPIO_SFN(2));
50 break;
51
52 default:
53 printk(KERN_ERR "Invalid Device %d\n", pdev->id);
54 return -EINVAL;
55 }
56
57 return 0;
58}
59
60static struct s3c_audio_pdata s3c_i2s_pdata = {
61 .cfg_gpio = s5pv210_cfg_i2s,
62};
63
64static struct resource s5pv210_iis0_resource[] = {
65 [0] = {
66 .start = S5PV210_PA_IIS0,
67 .end = S5PV210_PA_IIS0 + 0x100 - 1,
68 .flags = IORESOURCE_MEM,
69 },
70 [1] = {
71 .start = DMACH_I2S0_TX,
72 .end = DMACH_I2S0_TX,
73 .flags = IORESOURCE_DMA,
74 },
75 [2] = {
76 .start = DMACH_I2S0_RX,
77 .end = DMACH_I2S0_RX,
78 .flags = IORESOURCE_DMA,
79 },
80};
81
82struct platform_device s5pv210_device_iis0 = {
83 .name = "s3c64xx-iis-v4",
84 .id = -1,
85 .num_resources = ARRAY_SIZE(s5pv210_iis0_resource),
86 .resource = s5pv210_iis0_resource,
87 .dev = {
88 .platform_data = &s3c_i2s_pdata,
89 },
90};
91
92static struct resource s5pv210_iis1_resource[] = {
93 [0] = {
94 .start = S5PV210_PA_IIS1,
95 .end = S5PV210_PA_IIS1 + 0x100 - 1,
96 .flags = IORESOURCE_MEM,
97 },
98 [1] = {
99 .start = DMACH_I2S1_TX,
100 .end = DMACH_I2S1_TX,
101 .flags = IORESOURCE_DMA,
102 },
103 [2] = {
104 .start = DMACH_I2S1_RX,
105 .end = DMACH_I2S1_RX,
106 .flags = IORESOURCE_DMA,
107 },
108};
109
110struct platform_device s5pv210_device_iis1 = {
111 .name = "s3c64xx-iis",
112 .id = 1,
113 .num_resources = ARRAY_SIZE(s5pv210_iis1_resource),
114 .resource = s5pv210_iis1_resource,
115 .dev = {
116 .platform_data = &s3c_i2s_pdata,
117 },
118};
119
120static struct resource s5pv210_iis2_resource[] = {
121 [0] = {
122 .start = S5PV210_PA_IIS2,
123 .end = S5PV210_PA_IIS2 + 0x100 - 1,
124 .flags = IORESOURCE_MEM,
125 },
126 [1] = {
127 .start = DMACH_I2S2_TX,
128 .end = DMACH_I2S2_TX,
129 .flags = IORESOURCE_DMA,
130 },
131 [2] = {
132 .start = DMACH_I2S2_RX,
133 .end = DMACH_I2S2_RX,
134 .flags = IORESOURCE_DMA,
135 },
136};
137
138struct platform_device s5pv210_device_iis2 = {
139 .name = "s3c64xx-iis",
140 .id = 2,
141 .num_resources = ARRAY_SIZE(s5pv210_iis2_resource),
142 .resource = s5pv210_iis2_resource,
143 .dev = {
144 .platform_data = &s3c_i2s_pdata,
145 },
146};
147
148/* PCM Controller platform_devices */
149
150static int s5pv210_pcm_cfg_gpio(struct platform_device *pdev)
151{
152 switch (pdev->id) {
153 case 0:
154 s3c_gpio_cfgpin(S5PV210_GPI(0), S3C_GPIO_SFN(3));
155 s3c_gpio_cfgpin(S5PV210_GPI(1), S3C_GPIO_SFN(3));
156 s3c_gpio_cfgpin(S5PV210_GPI(2), S3C_GPIO_SFN(3));
157 s3c_gpio_cfgpin(S5PV210_GPI(3), S3C_GPIO_SFN(3));
158 s3c_gpio_cfgpin(S5PV210_GPI(4), S3C_GPIO_SFN(3));
159 break;
160 case 1:
161 s3c_gpio_cfgpin(S5PV210_GPC0(0), S3C_GPIO_SFN(3));
162 s3c_gpio_cfgpin(S5PV210_GPC0(1), S3C_GPIO_SFN(3));
163 s3c_gpio_cfgpin(S5PV210_GPC0(2), S3C_GPIO_SFN(3));
164 s3c_gpio_cfgpin(S5PV210_GPC0(3), S3C_GPIO_SFN(3));
165 s3c_gpio_cfgpin(S5PV210_GPC0(4), S3C_GPIO_SFN(3));
166 break;
167 case 2:
168 s3c_gpio_cfgpin(S5PV210_GPC1(0), S3C_GPIO_SFN(2));
169 s3c_gpio_cfgpin(S5PV210_GPC1(1), S3C_GPIO_SFN(2));
170 s3c_gpio_cfgpin(S5PV210_GPC1(2), S3C_GPIO_SFN(2));
171 s3c_gpio_cfgpin(S5PV210_GPC1(3), S3C_GPIO_SFN(2));
172 s3c_gpio_cfgpin(S5PV210_GPC1(4), S3C_GPIO_SFN(2));
173 break;
174 default:
175 printk(KERN_DEBUG "Invalid PCM Controller number!");
176 return -EINVAL;
177 }
178
179 return 0;
180}
181
182static struct s3c_audio_pdata s3c_pcm_pdata = {
183 .cfg_gpio = s5pv210_pcm_cfg_gpio,
184};
185
186static struct resource s5pv210_pcm0_resource[] = {
187 [0] = {
188 .start = S5PV210_PA_PCM0,
189 .end = S5PV210_PA_PCM0 + 0x100 - 1,
190 .flags = IORESOURCE_MEM,
191 },
192 [1] = {
193 .start = DMACH_PCM0_TX,
194 .end = DMACH_PCM0_TX,
195 .flags = IORESOURCE_DMA,
196 },
197 [2] = {
198 .start = DMACH_PCM0_RX,
199 .end = DMACH_PCM0_RX,
200 .flags = IORESOURCE_DMA,
201 },
202};
203
204struct platform_device s5pv210_device_pcm0 = {
205 .name = "samsung-pcm",
206 .id = 0,
207 .num_resources = ARRAY_SIZE(s5pv210_pcm0_resource),
208 .resource = s5pv210_pcm0_resource,
209 .dev = {
210 .platform_data = &s3c_pcm_pdata,
211 },
212};
213
214static struct resource s5pv210_pcm1_resource[] = {
215 [0] = {
216 .start = S5PV210_PA_PCM1,
217 .end = S5PV210_PA_PCM1 + 0x100 - 1,
218 .flags = IORESOURCE_MEM,
219 },
220 [1] = {
221 .start = DMACH_PCM1_TX,
222 .end = DMACH_PCM1_TX,
223 .flags = IORESOURCE_DMA,
224 },
225 [2] = {
226 .start = DMACH_PCM1_RX,
227 .end = DMACH_PCM1_RX,
228 .flags = IORESOURCE_DMA,
229 },
230};
231
232struct platform_device s5pv210_device_pcm1 = {
233 .name = "samsung-pcm",
234 .id = 1,
235 .num_resources = ARRAY_SIZE(s5pv210_pcm1_resource),
236 .resource = s5pv210_pcm1_resource,
237 .dev = {
238 .platform_data = &s3c_pcm_pdata,
239 },
240};
241
242static struct resource s5pv210_pcm2_resource[] = {
243 [0] = {
244 .start = S5PV210_PA_PCM2,
245 .end = S5PV210_PA_PCM2 + 0x100 - 1,
246 .flags = IORESOURCE_MEM,
247 },
248 [1] = {
249 .start = DMACH_PCM2_TX,
250 .end = DMACH_PCM2_TX,
251 .flags = IORESOURCE_DMA,
252 },
253 [2] = {
254 .start = DMACH_PCM2_RX,
255 .end = DMACH_PCM2_RX,
256 .flags = IORESOURCE_DMA,
257 },
258};
259
260struct platform_device s5pv210_device_pcm2 = {
261 .name = "samsung-pcm",
262 .id = 2,
263 .num_resources = ARRAY_SIZE(s5pv210_pcm2_resource),
264 .resource = s5pv210_pcm2_resource,
265 .dev = {
266 .platform_data = &s3c_pcm_pdata,
267 },
268};
269
270/* AC97 Controller platform devices */
271
272static int s5pv210_ac97_cfg_gpio(struct platform_device *pdev)
273{
274 s3c_gpio_cfgpin(S5PV210_GPC0(0), S3C_GPIO_SFN(4));
275 s3c_gpio_cfgpin(S5PV210_GPC0(1), S3C_GPIO_SFN(4));
276 s3c_gpio_cfgpin(S5PV210_GPC0(2), S3C_GPIO_SFN(4));
277 s3c_gpio_cfgpin(S5PV210_GPC0(3), S3C_GPIO_SFN(4));
278 s3c_gpio_cfgpin(S5PV210_GPC0(4), S3C_GPIO_SFN(4));
279
280 return 0;
281}
282
283static struct resource s5pv210_ac97_resource[] = {
284 [0] = {
285 .start = S5PV210_PA_AC97,
286 .end = S5PV210_PA_AC97 + 0x100 - 1,
287 .flags = IORESOURCE_MEM,
288 },
289 [1] = {
290 .start = DMACH_AC97_PCMOUT,
291 .end = DMACH_AC97_PCMOUT,
292 .flags = IORESOURCE_DMA,
293 },
294 [2] = {
295 .start = DMACH_AC97_PCMIN,
296 .end = DMACH_AC97_PCMIN,
297 .flags = IORESOURCE_DMA,
298 },
299 [3] = {
300 .start = DMACH_AC97_MICIN,
301 .end = DMACH_AC97_MICIN,
302 .flags = IORESOURCE_DMA,
303 },
304 [4] = {
305 .start = IRQ_AC97,
306 .end = IRQ_AC97,
307 .flags = IORESOURCE_IRQ,
308 },
309};
310
311static struct s3c_audio_pdata s3c_ac97_pdata = {
312 .cfg_gpio = s5pv210_ac97_cfg_gpio,
313};
314
315static u64 s5pv210_ac97_dmamask = DMA_BIT_MASK(32);
316
317struct platform_device s5pv210_device_ac97 = {
318 .name = "s3c-ac97",
319 .id = -1,
320 .num_resources = ARRAY_SIZE(s5pv210_ac97_resource),
321 .resource = s5pv210_ac97_resource,
322 .dev = {
323 .platform_data = &s3c_ac97_pdata,
324 .dma_mask = &s5pv210_ac97_dmamask,
325 .coherent_dma_mask = DMA_BIT_MASK(32),
326 },
327};
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h
index c22694c8231f..bcd2e82c2e2b 100644
--- a/arch/arm/mach-s5pv210/include/mach/map.h
+++ b/arch/arm/mach-s5pv210/include/mach/map.h
@@ -58,6 +58,19 @@
58#define S5PV210_PA_SDRAM (0x20000000) 58#define S5PV210_PA_SDRAM (0x20000000)
59#define S5P_PA_SDRAM S5PV210_PA_SDRAM 59#define S5P_PA_SDRAM S5PV210_PA_SDRAM
60 60
61/* I2S */
62#define S5PV210_PA_IIS0 0xEEE30000
63#define S5PV210_PA_IIS1 0xE2100000
64#define S5PV210_PA_IIS2 0xE2A00000
65
66/* PCM */
67#define S5PV210_PA_PCM0 0xE2300000
68#define S5PV210_PA_PCM1 0xE1200000
69#define S5PV210_PA_PCM2 0xE2B00000
70
71/* AC97 */
72#define S5PV210_PA_AC97 0xE2200000
73
61/* compatibiltiy defines. */ 74/* compatibiltiy defines. */
62#define S3C_PA_UART S5PV210_PA_UART 75#define S3C_PA_UART S5PV210_PA_UART
63#define S3C_PA_IIC S5PV210_PA_IIC0 76#define S3C_PA_IIC S5PV210_PA_IIC0
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index 796d24258313..d8fda3a6db62 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -64,6 +64,14 @@ extern struct platform_device s3c_device_nand;
64extern struct platform_device s3c_device_usbgadget; 64extern struct platform_device s3c_device_usbgadget;
65extern struct platform_device s3c_device_usb_hsotg; 65extern struct platform_device s3c_device_usb_hsotg;
66 66
67extern struct platform_device s5pv210_device_ac97;
68extern struct platform_device s5pv210_device_pcm0;
69extern struct platform_device s5pv210_device_pcm1;
70extern struct platform_device s5pv210_device_pcm2;
71extern struct platform_device s5pv210_device_iis0;
72extern struct platform_device s5pv210_device_iis1;
73extern struct platform_device s5pv210_device_iis2;
74
67/* s3c2440 specific devices */ 75/* s3c2440 specific devices */
68 76
69#ifdef CONFIG_CPU_S3C2440 77#ifdef CONFIG_CPU_S3C2440
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-28 21:49:49 -0500