diff options
-rw-r--r-- | arch/arm/mach-davinci/dm355.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-davinci/dm365.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-davinci/include/mach/spi.h | 13 | ||||
-rw-r--r-- | drivers/spi/davinci_spi.c | 67 |
4 files changed, 45 insertions, 41 deletions
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index 6a76dfa60ef7..a6d9b72190ff 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c | |||
@@ -413,10 +413,7 @@ static struct davinci_spi_platform_data dm355_spi0_pdata = { | |||
413 | .version = SPI_VERSION_1, | 413 | .version = SPI_VERSION_1, |
414 | .num_chipselect = 2, | 414 | .num_chipselect = 2, |
415 | .clk_internal = 1, | 415 | .clk_internal = 1, |
416 | .intr_level = 0, | ||
417 | .poll_mode = 1, /* 0 -> interrupt mode 1-> polling mode */ | 416 | .poll_mode = 1, /* 0 -> interrupt mode 1-> polling mode */ |
418 | .c2tdelay = 0, | ||
419 | .t2cdelay = 0, | ||
420 | }; | 417 | }; |
421 | static struct platform_device dm355_spi0_device = { | 418 | static struct platform_device dm355_spi0_device = { |
422 | .name = "spi_davinci", | 419 | .name = "spi_davinci", |
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index cd623db8d7d7..80dd159134cb 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c | |||
@@ -626,10 +626,7 @@ static struct davinci_spi_platform_data dm365_spi0_pdata = { | |||
626 | .version = SPI_VERSION_1, | 626 | .version = SPI_VERSION_1, |
627 | .num_chipselect = 2, | 627 | .num_chipselect = 2, |
628 | .clk_internal = 1, | 628 | .clk_internal = 1, |
629 | .intr_level = 0, | ||
630 | .poll_mode = 1, /* 0 -> interrupt mode 1-> polling mode */ | 629 | .poll_mode = 1, /* 0 -> interrupt mode 1-> polling mode */ |
631 | .c2tdelay = 0, | ||
632 | .t2cdelay = 0, | ||
633 | }; | 630 | }; |
634 | 631 | ||
635 | static struct resource dm365_spi0_resources[] = { | 632 | static struct resource dm365_spi0_resources[] = { |
diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h index fe699140269c..29c19c425b02 100644 --- a/arch/arm/mach-davinci/include/mach/spi.h +++ b/arch/arm/mach-davinci/include/mach/spi.h | |||
@@ -29,17 +29,20 @@ enum { | |||
29 | struct davinci_spi_platform_data { | 29 | struct davinci_spi_platform_data { |
30 | u8 version; | 30 | u8 version; |
31 | u8 num_chipselect; | 31 | u8 num_chipselect; |
32 | u8 wdelay; | ||
33 | u8 odd_parity; | ||
34 | u8 parity_enable; | ||
35 | u8 timer_disable; | ||
36 | u8 clk_internal; | 32 | u8 clk_internal; |
37 | u8 intr_level; | 33 | u8 intr_level; |
38 | u8 poll_mode; | 34 | u8 poll_mode; |
39 | u8 use_dma; | 35 | u8 use_dma; |
36 | u8 *chip_sel; | ||
37 | }; | ||
38 | |||
39 | struct davinci_spi_config { | ||
40 | u8 wdelay; | ||
41 | u8 odd_parity; | ||
42 | u8 parity_enable; | ||
43 | u8 timer_disable; | ||
40 | u8 c2tdelay; | 44 | u8 c2tdelay; |
41 | u8 t2cdelay; | 45 | u8 t2cdelay; |
42 | u8 *chip_sel; | ||
43 | }; | 46 | }; |
44 | 47 | ||
45 | #endif /* __ARCH_ARM_DAVINCI_SPI_H */ | 48 | #endif /* __ARCH_ARM_DAVINCI_SPI_H */ |
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 54808577c121..d4320f784070 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c | |||
@@ -156,6 +156,8 @@ struct davinci_spi { | |||
156 | struct davinci_spi_slave slave[SPI_MAX_CHIPSELECT]; | 156 | struct davinci_spi_slave slave[SPI_MAX_CHIPSELECT]; |
157 | }; | 157 | }; |
158 | 158 | ||
159 | static struct davinci_spi_config davinci_spi_default_cfg; | ||
160 | |||
159 | static unsigned use_dma; | 161 | static unsigned use_dma; |
160 | 162 | ||
161 | static void davinci_spi_rx_buf_u8(u32 data, struct davinci_spi *davinci_spi) | 163 | static void davinci_spi_rx_buf_u8(u32 data, struct davinci_spi *davinci_spi) |
@@ -434,8 +436,12 @@ static int davinci_spi_setup(struct spi_device *spi) | |||
434 | int retval; | 436 | int retval; |
435 | struct davinci_spi *davinci_spi; | 437 | struct davinci_spi *davinci_spi; |
436 | struct davinci_spi_dma *davinci_spi_dma; | 438 | struct davinci_spi_dma *davinci_spi_dma; |
439 | struct davinci_spi_config *spicfg; | ||
437 | 440 | ||
438 | davinci_spi = spi_master_get_devdata(spi->master); | 441 | davinci_spi = spi_master_get_devdata(spi->master); |
442 | spicfg = (struct davinci_spi_config *)spi->controller_data; | ||
443 | if (!spicfg) | ||
444 | spicfg = &davinci_spi_default_cfg; | ||
439 | 445 | ||
440 | /* if bits per word length is zero then set it default 8 */ | 446 | /* if bits per word length is zero then set it default 8 */ |
441 | if (!spi->bits_per_word) | 447 | if (!spi->bits_per_word) |
@@ -496,31 +502,34 @@ static int davinci_spi_setup(struct spi_device *spi) | |||
496 | */ | 502 | */ |
497 | 503 | ||
498 | if (davinci_spi->version == SPI_VERSION_2) { | 504 | if (davinci_spi->version == SPI_VERSION_2) { |
505 | |||
499 | clear_fmt_bits(davinci_spi->base, SPIFMT_WDELAY_MASK, | 506 | clear_fmt_bits(davinci_spi->base, SPIFMT_WDELAY_MASK, |
500 | spi->chip_select); | 507 | spi->chip_select); |
501 | set_fmt_bits(davinci_spi->base, | 508 | set_fmt_bits(davinci_spi->base, |
502 | (davinci_spi->pdata->wdelay | 509 | (spicfg->wdelay << SPIFMT_WDELAY_SHIFT) & |
503 | << SPIFMT_WDELAY_SHIFT) | 510 | SPIFMT_WDELAY_MASK, spi->chip_select); |
504 | & SPIFMT_WDELAY_MASK, | ||
505 | spi->chip_select); | ||
506 | 511 | ||
507 | if (davinci_spi->pdata->odd_parity) | 512 | if (spicfg->odd_parity) |
508 | set_fmt_bits(davinci_spi->base, | 513 | set_fmt_bits(davinci_spi->base, SPIFMT_ODD_PARITY_MASK, |
509 | SPIFMT_ODD_PARITY_MASK, | 514 | spi->chip_select); |
510 | spi->chip_select); | ||
511 | else | 515 | else |
512 | clear_fmt_bits(davinci_spi->base, | 516 | clear_fmt_bits(davinci_spi->base, |
513 | SPIFMT_ODD_PARITY_MASK, | 517 | SPIFMT_ODD_PARITY_MASK, |
514 | spi->chip_select); | 518 | spi->chip_select); |
515 | 519 | ||
516 | if (davinci_spi->pdata->parity_enable) | 520 | if (spicfg->parity_enable) |
517 | set_fmt_bits(davinci_spi->base, | 521 | set_fmt_bits(davinci_spi->base, SPIFMT_PARITYENA_MASK, |
518 | SPIFMT_PARITYENA_MASK, | 522 | spi->chip_select); |
519 | spi->chip_select); | ||
520 | else | 523 | else |
521 | clear_fmt_bits(davinci_spi->base, | 524 | clear_fmt_bits(davinci_spi->base, SPIFMT_PARITYENA_MASK, |
522 | SPIFMT_PARITYENA_MASK, | 525 | spi->chip_select); |
523 | spi->chip_select); | 526 | |
527 | if (spicfg->timer_disable) | ||
528 | set_fmt_bits(davinci_spi->base, SPIFMT_DISTIMER_MASK, | ||
529 | spi->chip_select); | ||
530 | else | ||
531 | clear_fmt_bits(davinci_spi->base, SPIFMT_DISTIMER_MASK, | ||
532 | spi->chip_select); | ||
524 | 533 | ||
525 | if (spi->mode & SPI_READY) | 534 | if (spi->mode & SPI_READY) |
526 | set_fmt_bits(davinci_spi->base, | 535 | set_fmt_bits(davinci_spi->base, |
@@ -531,14 +540,6 @@ static int davinci_spi_setup(struct spi_device *spi) | |||
531 | SPIFMT_WAITENA_MASK, | 540 | SPIFMT_WAITENA_MASK, |
532 | spi->chip_select); | 541 | spi->chip_select); |
533 | 542 | ||
534 | if (davinci_spi->pdata->timer_disable) | ||
535 | set_fmt_bits(davinci_spi->base, | ||
536 | SPIFMT_DISTIMER_MASK, | ||
537 | spi->chip_select); | ||
538 | else | ||
539 | clear_fmt_bits(davinci_spi->base, | ||
540 | SPIFMT_DISTIMER_MASK, | ||
541 | spi->chip_select); | ||
542 | } | 543 | } |
543 | 544 | ||
544 | retval = davinci_spi_setup_transfer(spi, NULL); | 545 | retval = davinci_spi_setup_transfer(spi, NULL); |
@@ -662,9 +663,13 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) | |||
662 | u32 tx_data, data1_reg_val; | 663 | u32 tx_data, data1_reg_val; |
663 | u32 buf_val, flg_val; | 664 | u32 buf_val, flg_val; |
664 | struct davinci_spi_platform_data *pdata; | 665 | struct davinci_spi_platform_data *pdata; |
666 | struct davinci_spi_config *spicfg; | ||
665 | 667 | ||
666 | davinci_spi = spi_master_get_devdata(spi->master); | 668 | davinci_spi = spi_master_get_devdata(spi->master); |
667 | pdata = davinci_spi->pdata; | 669 | pdata = davinci_spi->pdata; |
670 | spicfg = (struct davinci_spi_config *)spi->controller_data; | ||
671 | if (!spicfg) | ||
672 | spicfg = &davinci_spi_default_cfg; | ||
668 | 673 | ||
669 | davinci_spi->tx = t->tx_buf; | 674 | davinci_spi->tx = t->tx_buf; |
670 | davinci_spi->rx = t->rx_buf; | 675 | davinci_spi->rx = t->rx_buf; |
@@ -684,8 +689,8 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) | |||
684 | /* Enable SPI */ | 689 | /* Enable SPI */ |
685 | set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK); | 690 | set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK); |
686 | 691 | ||
687 | iowrite32(0 | (pdata->c2tdelay << SPI_C2TDELAY_SHIFT) | | 692 | iowrite32((spicfg->c2tdelay << SPI_C2TDELAY_SHIFT) | |
688 | (pdata->t2cdelay << SPI_T2CDELAY_SHIFT), | 693 | (spicfg->t2cdelay << SPI_T2CDELAY_SHIFT), |
689 | davinci_spi->base + SPIDELAY); | 694 | davinci_spi->base + SPIDELAY); |
690 | 695 | ||
691 | count = davinci_spi->count; | 696 | count = davinci_spi->count; |
@@ -792,12 +797,14 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) | |||
792 | struct davinci_spi_dma *davinci_spi_dma; | 797 | struct davinci_spi_dma *davinci_spi_dma; |
793 | int word_len, data_type, ret; | 798 | int word_len, data_type, ret; |
794 | unsigned long tx_reg, rx_reg; | 799 | unsigned long tx_reg, rx_reg; |
795 | struct davinci_spi_platform_data *pdata; | 800 | struct davinci_spi_config *spicfg; |
796 | struct device *sdev; | 801 | struct device *sdev; |
797 | 802 | ||
798 | davinci_spi = spi_master_get_devdata(spi->master); | 803 | davinci_spi = spi_master_get_devdata(spi->master); |
799 | pdata = davinci_spi->pdata; | ||
800 | sdev = davinci_spi->bitbang.master->dev.parent; | 804 | sdev = davinci_spi->bitbang.master->dev.parent; |
805 | spicfg = (struct davinci_spi_config *)spi->controller_data; | ||
806 | if (!spicfg) | ||
807 | spicfg = &davinci_spi_default_cfg; | ||
801 | 808 | ||
802 | davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select]; | 809 | davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select]; |
803 | 810 | ||
@@ -834,8 +841,8 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) | |||
834 | return ret; | 841 | return ret; |
835 | 842 | ||
836 | /* Put delay val if required */ | 843 | /* Put delay val if required */ |
837 | iowrite32(0 | (pdata->c2tdelay << SPI_C2TDELAY_SHIFT) | | 844 | iowrite32((spicfg->c2tdelay << SPI_C2TDELAY_SHIFT) | |
838 | (pdata->t2cdelay << SPI_T2CDELAY_SHIFT), | 845 | (spicfg->t2cdelay << SPI_T2CDELAY_SHIFT), |
839 | davinci_spi->base + SPIDELAY); | 846 | davinci_spi->base + SPIDELAY); |
840 | 847 | ||
841 | count = davinci_spi->count; /* the number of elements */ | 848 | count = davinci_spi->count; /* the number of elements */ |