diff options
-rw-r--r-- | drivers/video/omap2/dss/dss.c | 34 |
1 files changed, 22 insertions, 12 deletions
diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c index 9d2390299df7..3f1fee63c678 100644 --- a/drivers/video/omap2/dss/dss.c +++ b/drivers/video/omap2/dss/dss.c | |||
@@ -256,7 +256,7 @@ void dss_dump_clocks(struct seq_file *s) | |||
256 | 256 | ||
257 | seq_printf(s, "dpll4_ck %lu\n", dpll4_ck_rate); | 257 | seq_printf(s, "dpll4_ck %lu\n", dpll4_ck_rate); |
258 | 258 | ||
259 | if (cpu_is_omap3630()) | 259 | if (cpu_is_omap3630() || cpu_is_omap44xx()) |
260 | seq_printf(s, "%s (%s) = %lu / %lu = %lu\n", | 260 | seq_printf(s, "%s (%s) = %lu / %lu = %lu\n", |
261 | fclk_name, fclk_real_name, | 261 | fclk_name, fclk_real_name, |
262 | dpll4_ck_rate, | 262 | dpll4_ck_rate, |
@@ -394,9 +394,12 @@ int dss_calc_clock_rates(struct dss_clock_info *cinfo) | |||
394 | { | 394 | { |
395 | if (dss.dpll4_m4_ck) { | 395 | if (dss.dpll4_m4_ck) { |
396 | unsigned long prate; | 396 | unsigned long prate; |
397 | u16 fck_div_max = 16; | ||
397 | 398 | ||
398 | if (cinfo->fck_div > (cpu_is_omap3630() ? 32 : 16) || | 399 | if (cpu_is_omap3630() || cpu_is_omap44xx()) |
399 | cinfo->fck_div == 0) | 400 | fck_div_max = 32; |
401 | |||
402 | if (cinfo->fck_div > fck_div_max || cinfo->fck_div == 0) | ||
400 | return -EINVAL; | 403 | return -EINVAL; |
401 | 404 | ||
402 | prate = clk_get_rate(clk_get_parent(dss.dpll4_m4_ck)); | 405 | prate = clk_get_rate(clk_get_parent(dss.dpll4_m4_ck)); |
@@ -442,7 +445,7 @@ int dss_get_clock_div(struct dss_clock_info *cinfo) | |||
442 | 445 | ||
443 | prate = clk_get_rate(clk_get_parent(dss.dpll4_m4_ck)); | 446 | prate = clk_get_rate(clk_get_parent(dss.dpll4_m4_ck)); |
444 | 447 | ||
445 | if (cpu_is_omap3630()) | 448 | if (cpu_is_omap3630() || cpu_is_omap44xx()) |
446 | cinfo->fck_div = prate / (cinfo->fck); | 449 | cinfo->fck_div = prate / (cinfo->fck); |
447 | else | 450 | else |
448 | cinfo->fck_div = prate / (cinfo->fck / 2); | 451 | cinfo->fck_div = prate / (cinfo->fck / 2); |
@@ -471,7 +474,7 @@ int dss_calc_clock_div(bool is_tft, unsigned long req_pck, | |||
471 | 474 | ||
472 | unsigned long fck, max_dss_fck; | 475 | unsigned long fck, max_dss_fck; |
473 | 476 | ||
474 | u16 fck_div; | 477 | u16 fck_div, fck_div_max = 16; |
475 | 478 | ||
476 | int match = 0; | 479 | int match = 0; |
477 | int min_fck_per_pck; | 480 | int min_fck_per_pck; |
@@ -504,7 +507,7 @@ retry: | |||
504 | memset(&best_dss, 0, sizeof(best_dss)); | 507 | memset(&best_dss, 0, sizeof(best_dss)); |
505 | memset(&best_dispc, 0, sizeof(best_dispc)); | 508 | memset(&best_dispc, 0, sizeof(best_dispc)); |
506 | 509 | ||
507 | if (cpu_is_omap24xx()) { | 510 | if (dss.dpll4_m4_ck == NULL) { |
508 | struct dispc_clock_info cur_dispc; | 511 | struct dispc_clock_info cur_dispc; |
509 | /* XXX can we change the clock on omap2? */ | 512 | /* XXX can we change the clock on omap2? */ |
510 | fck = dss_clk_get_rate(DSS_CLK_FCK); | 513 | fck = dss_clk_get_rate(DSS_CLK_FCK); |
@@ -519,12 +522,14 @@ retry: | |||
519 | best_dispc = cur_dispc; | 522 | best_dispc = cur_dispc; |
520 | 523 | ||
521 | goto found; | 524 | goto found; |
522 | } else if (cpu_is_omap34xx()) { | 525 | } else { |
523 | for (fck_div = (cpu_is_omap3630() ? 32 : 16); | 526 | if (cpu_is_omap3630() || cpu_is_omap44xx()) |
524 | fck_div > 0; --fck_div) { | 527 | fck_div_max = 32; |
528 | |||
529 | for (fck_div = fck_div_max; fck_div > 0; --fck_div) { | ||
525 | struct dispc_clock_info cur_dispc; | 530 | struct dispc_clock_info cur_dispc; |
526 | 531 | ||
527 | if (cpu_is_omap3630()) | 532 | if (fck_div_max == 32) |
528 | fck = prate / fck_div; | 533 | fck = prate / fck_div; |
529 | else | 534 | else |
530 | fck = prate / fck_div * 2; | 535 | fck = prate / fck_div * 2; |
@@ -552,8 +557,6 @@ retry: | |||
552 | goto found; | 557 | goto found; |
553 | } | 558 | } |
554 | } | 559 | } |
555 | } else { | ||
556 | BUG(); | ||
557 | } | 560 | } |
558 | 561 | ||
559 | found: | 562 | found: |
@@ -684,6 +687,13 @@ static int dss_init(void) | |||
684 | r = PTR_ERR(dpll4_m4_ck); | 687 | r = PTR_ERR(dpll4_m4_ck); |
685 | goto fail1; | 688 | goto fail1; |
686 | } | 689 | } |
690 | } else if (cpu_is_omap44xx()) { | ||
691 | dpll4_m4_ck = clk_get(NULL, "dpll_per_m5x2_ck"); | ||
692 | if (IS_ERR(dpll4_m4_ck)) { | ||
693 | DSSERR("Failed to get dpll4_m4_ck\n"); | ||
694 | r = PTR_ERR(dpll4_m4_ck); | ||
695 | goto fail1; | ||
696 | } | ||
687 | } else { /* omap24xx */ | 697 | } else { /* omap24xx */ |
688 | dpll4_m4_ck = NULL; | 698 | dpll4_m4_ck = NULL; |
689 | } | 699 | } |