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-rw-r--r--drivers/net/tg3.c40
-rw-r--r--drivers/net/tg3.h1
2 files changed, 17 insertions, 24 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 4f8976bd2b40..dc6b60b65c0b 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -1042,8 +1042,7 @@ static int tg3_mdio_init(struct tg3 *tp)
1042 u32 reg; 1042 u32 reg;
1043 struct phy_device *phydev; 1043 struct phy_device *phydev;
1044 1044
1045 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || 1045 if (tp->tg3_flags3 & TG3_FLG3_5717_PLUS) {
1046 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) {
1047 u32 is_serdes; 1046 u32 is_serdes;
1048 1047
1049 tp->phy_addr = PCI_FUNC(tp->pdev->devfn) + 1; 1048 tp->phy_addr = PCI_FUNC(tp->pdev->devfn) + 1;
@@ -1621,8 +1620,7 @@ static void tg3_phy_toggle_apd(struct tg3 *tp, bool enable)
1621 u32 reg; 1620 u32 reg;
1622 1621
1623 if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS) || 1622 if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS) ||
1624 ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || 1623 ((tp->tg3_flags3 & TG3_FLG3_5717_PLUS) &&
1625 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) &&
1626 (tp->phy_flags & TG3_PHYFLG_MII_SERDES))) 1624 (tp->phy_flags & TG3_PHYFLG_MII_SERDES)))
1627 return; 1625 return;
1628 1626
@@ -2045,8 +2043,7 @@ static int tg3_phy_reset(struct tg3 *tp)
2045 } 2043 }
2046 } 2044 }
2047 2045
2048 if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || 2046 if ((tp->tg3_flags3 & TG3_FLG3_5717_PLUS) &&
2049 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) &&
2050 (tp->phy_flags & TG3_PHYFLG_MII_SERDES)) 2047 (tp->phy_flags & TG3_PHYFLG_MII_SERDES))
2051 return 0; 2048 return 0;
2052 2049
@@ -7671,8 +7668,7 @@ static void tg3_rings_reset(struct tg3 *tp)
7671 /* Disable all transmit rings but the first. */ 7668 /* Disable all transmit rings but the first. */
7672 if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS)) 7669 if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS))
7673 limit = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE * 16; 7670 limit = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE * 16;
7674 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || 7671 else if (tp->tg3_flags3 & TG3_FLG3_5717_PLUS)
7675 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719)
7676 limit = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE * 4; 7672 limit = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE * 4;
7677 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) 7673 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
7678 limit = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE * 2; 7674 limit = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE * 2;
@@ -7686,8 +7682,7 @@ static void tg3_rings_reset(struct tg3 *tp)
7686 7682
7687 7683
7688 /* Disable all receive return rings but the first. */ 7684 /* Disable all receive return rings but the first. */
7689 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || 7685 if (tp->tg3_flags3 & TG3_FLG3_5717_PLUS)
7690 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719)
7691 limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 17; 7686 limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 17;
7692 else if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS)) 7687 else if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS))
7693 limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 16; 7688 limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 16;
@@ -8089,8 +8084,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
8089 ((u64) tpr->rx_std_mapping >> 32)); 8084 ((u64) tpr->rx_std_mapping >> 32));
8090 tw32(RCVDBDI_STD_BD + TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_LOW, 8085 tw32(RCVDBDI_STD_BD + TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_LOW,
8091 ((u64) tpr->rx_std_mapping & 0xffffffff)); 8086 ((u64) tpr->rx_std_mapping & 0xffffffff));
8092 if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 && 8087 if (!(tp->tg3_flags3 & TG3_FLG3_5717_PLUS))
8093 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5719)
8094 tw32(RCVDBDI_STD_BD + TG3_BDINFO_NIC_ADDR, 8088 tw32(RCVDBDI_STD_BD + TG3_BDINFO_NIC_ADDR,
8095 NIC_SRAM_RX_BUFFER_DESC); 8089 NIC_SRAM_RX_BUFFER_DESC);
8096 8090
@@ -10848,8 +10842,7 @@ static int tg3_test_memory(struct tg3 *tp)
10848 int err = 0; 10842 int err = 0;
10849 int i; 10843 int i;
10850 10844
10851 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || 10845 if (tp->tg3_flags3 & TG3_FLG3_5717_PLUS)
10852 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719)
10853 mem_tbl = mem_tbl_5717; 10846 mem_tbl = mem_tbl_5717;
10854 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) 10847 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
10855 mem_tbl = mem_tbl_57765; 10848 mem_tbl = mem_tbl_57765;
@@ -11930,8 +11923,7 @@ static void __devinit tg3_nvram_init(struct tg3 *tp)
11930 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 || 11923 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 ||
11931 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) 11924 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
11932 tg3_get_57780_nvram_info(tp); 11925 tg3_get_57780_nvram_info(tp);
11933 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || 11926 else if (tp->tg3_flags3 & TG3_FLG3_5717_PLUS)
11934 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719)
11935 tg3_get_5717_nvram_info(tp); 11927 tg3_get_5717_nvram_info(tp);
11936 else 11928 else
11937 tg3_get_nvram_info(tp); 11929 tg3_get_nvram_info(tp);
@@ -13333,8 +13325,11 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
13333 tp->pdev_peer = tg3_find_peer(tp); 13325 tp->pdev_peer = tg3_find_peer(tp);
13334 13326
13335 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || 13327 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
13336 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 || 13328 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719)
13337 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) 13329 tp->tg3_flags3 |= TG3_FLG3_5717_PLUS;
13330
13331 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765 ||
13332 (tp->tg3_flags3 & TG3_FLG3_5717_PLUS))
13338 tp->tg3_flags3 |= TG3_FLG3_57765_PLUS; 13333 tp->tg3_flags3 |= TG3_FLG3_57765_PLUS;
13339 13334
13340 /* Intentionally exclude ASIC_REV_5906 */ 13335 /* Intentionally exclude ASIC_REV_5906 */
@@ -13427,8 +13422,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
13427 tp->tg3_flags3 |= TG3_FLG3_40BIT_DMA_LIMIT_BUG; 13422 tp->tg3_flags3 |= TG3_FLG3_40BIT_DMA_LIMIT_BUG;
13428 } 13423 }
13429 13424
13430 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || 13425 if (tp->tg3_flags3 & TG3_FLG3_5717_PLUS)
13431 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719)
13432 tp->tg3_flags3 |= TG3_FLG3_LRG_PROD_RING_CAP; 13426 tp->tg3_flags3 |= TG3_FLG3_LRG_PROD_RING_CAP;
13433 13427
13434 if ((tp->tg3_flags3 & TG3_FLG3_57765_PLUS) && 13428 if ((tp->tg3_flags3 & TG3_FLG3_57765_PLUS) &&
@@ -13962,8 +13956,7 @@ static int __devinit tg3_get_device_address(struct tg3 *tp)
13962 tw32_f(NVRAM_CMD, NVRAM_CMD_RESET); 13956 tw32_f(NVRAM_CMD, NVRAM_CMD_RESET);
13963 else 13957 else
13964 tg3_nvram_unlock(tp); 13958 tg3_nvram_unlock(tp);
13965 } else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || 13959 } else if (tp->tg3_flags3 & TG3_FLG3_5717_PLUS) {
13966 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) {
13967 if (PCI_FUNC(tp->pdev->devfn) & 1) 13960 if (PCI_FUNC(tp->pdev->devfn) & 1)
13968 mac_offset = 0xcc; 13961 mac_offset = 0xcc;
13969 if (PCI_FUNC(tp->pdev->devfn) > 1) 13962 if (PCI_FUNC(tp->pdev->devfn) > 1)
@@ -14760,8 +14753,7 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
14760 } 14753 }
14761 14754
14762 if ((tp->tg3_flags3 & TG3_FLG3_5755_PLUS) && 14755 if ((tp->tg3_flags3 & TG3_FLG3_5755_PLUS) &&
14763 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 && 14756 !(tp->tg3_flags3 & TG3_FLG3_5717_PLUS))
14764 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5719)
14765 dev->netdev_ops = &tg3_netdev_ops; 14757 dev->netdev_ops = &tg3_netdev_ops;
14766 else 14758 else
14767 dev->netdev_ops = &tg3_netdev_ops_dma_bug; 14759 dev->netdev_ops = &tg3_netdev_ops_dma_bug;
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 6f34db5d7e5e..b8e6acc019b4 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -2917,6 +2917,7 @@ struct tg3 {
2917#define TG3_FLG3_L1PLLPD_EN 0x00800000 2917#define TG3_FLG3_L1PLLPD_EN 0x00800000
2918#define TG3_FLG3_57765_PLUS 0x01000000 2918#define TG3_FLG3_57765_PLUS 0x01000000
2919#define TG3_FLG3_APE_HAS_NCSI 0x02000000 2919#define TG3_FLG3_APE_HAS_NCSI 0x02000000
2920#define TG3_FLG3_5717_PLUS 0x04000000
2920 2921
2921 struct timer_list timer; 2922 struct timer_list timer;
2922 u16 timer_counter; 2923 u16 timer_counter;