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authorNicolin Chen <Guangyu.Chen@freescale.com>2014-05-12 01:47:52 -0400
committerNicolin Chen <Guangyu.Chen@freescale.com>2014-06-19 05:07:44 -0400
commit88efde0cec71d7d70948eeaf1d22ab52b8bc8f2d (patch)
treef50f2557f5dbece0c9876ae2dbe8122931f8cb6e /sound/soc/fsl
parent29a807b337b0e74460fd3ec699e54eb61183279a (diff)
ENGR00318773-6 ASoC: fsl_sai: Add driver suspend and resume to support MEGA Fast
For i.MX6 SoloX, there is a mode of the SoC to shutdown all power source of modules during system suspend and resume procedure. Thus, SAI needs to save all the values of registers before the system suspend and restore them after the system resume. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Diffstat (limited to 'sound/soc/fsl')
-rw-r--r--sound/soc/fsl/fsl_sai.c33
-rw-r--r--sound/soc/fsl/fsl_sai.h3
2 files changed, 35 insertions, 1 deletions
diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
index c32ab24debf8..896f40a91def 100644
--- a/sound/soc/fsl/fsl_sai.c
+++ b/sound/soc/fsl/fsl_sai.c
@@ -493,6 +493,8 @@ static bool fsl_sai_readable_reg(struct device *dev, unsigned int reg)
493static bool fsl_sai_volatile_reg(struct device *dev, unsigned int reg) 493static bool fsl_sai_volatile_reg(struct device *dev, unsigned int reg)
494{ 494{
495 switch (reg) { 495 switch (reg) {
496 case FSL_SAI_TCSR:
497 case FSL_SAI_RCSR:
496 case FSL_SAI_TFR: 498 case FSL_SAI_TFR:
497 case FSL_SAI_RFR: 499 case FSL_SAI_RFR:
498 case FSL_SAI_TDR: 500 case FSL_SAI_TDR:
@@ -537,6 +539,7 @@ static struct regmap_config fsl_sai_regmap_config = {
537 .readable_reg = fsl_sai_readable_reg, 539 .readable_reg = fsl_sai_readable_reg,
538 .volatile_reg = fsl_sai_volatile_reg, 540 .volatile_reg = fsl_sai_volatile_reg,
539 .writeable_reg = fsl_sai_writeable_reg, 541 .writeable_reg = fsl_sai_writeable_reg,
542 .cache_type = REGCACHE_RBTREE,
540}; 543};
541 544
542static int fsl_sai_probe(struct platform_device *pdev) 545static int fsl_sai_probe(struct platform_device *pdev)
@@ -636,11 +639,41 @@ static const struct of_device_id fsl_sai_ids[] = {
636 { /* sentinel */ } 639 { /* sentinel */ }
637}; 640};
638 641
642#if CONFIG_PM_SLEEP
643static int fsl_sai_suspend(struct device *dev)
644{
645 struct fsl_sai *sai = dev_get_drvdata(dev);
646
647 regcache_cache_only(sai->regmap, true);
648 regcache_mark_dirty(sai->regmap);
649
650 return 0;
651}
652
653static int fsl_sai_resume(struct device *dev)
654{
655 struct fsl_sai *sai = dev_get_drvdata(dev);
656
657 regcache_cache_only(sai->regmap, false);
658 regmap_write(sai->regmap, FSL_SAI_TCSR, FSL_SAI_CSR_SR);
659 regmap_write(sai->regmap, FSL_SAI_RCSR, FSL_SAI_CSR_SR);
660 msleep(1);
661 regmap_write(sai->regmap, FSL_SAI_TCSR, 0);
662 regmap_write(sai->regmap, FSL_SAI_RCSR, 0);
663 return regcache_sync(sai->regmap);
664}
665#endif /* CONFIG_PM_SLEEP */
666
667static const struct dev_pm_ops fsl_sai_pm_ops = {
668 SET_SYSTEM_SLEEP_PM_OPS(fsl_sai_suspend, fsl_sai_resume)
669};
670
639static struct platform_driver fsl_sai_driver = { 671static struct platform_driver fsl_sai_driver = {
640 .probe = fsl_sai_probe, 672 .probe = fsl_sai_probe,
641 .driver = { 673 .driver = {
642 .name = "fsl-sai", 674 .name = "fsl-sai",
643 .owner = THIS_MODULE, 675 .owner = THIS_MODULE,
676 .pm = &fsl_sai_pm_ops,
644 .of_match_table = fsl_sai_ids, 677 .of_match_table = fsl_sai_ids,
645 }, 678 },
646}; 679};
diff --git a/sound/soc/fsl/fsl_sai.h b/sound/soc/fsl/fsl_sai.h
index 0e6c9f595d75..ae8b79a21ae4 100644
--- a/sound/soc/fsl/fsl_sai.h
+++ b/sound/soc/fsl/fsl_sai.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright 2012-2013 Freescale Semiconductor, Inc. 2 * Copyright 2012-2014 Freescale Semiconductor, Inc.
3 * 3 *
4 * This program is free software; you can redistribute it and/or modify 4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as 5 * it under the terms of the GNU General Public License version 2 as
@@ -48,6 +48,7 @@
48/* SAI Transmit/Recieve Control Register */ 48/* SAI Transmit/Recieve Control Register */
49#define FSL_SAI_CSR_TERE BIT(31) 49#define FSL_SAI_CSR_TERE BIT(31)
50#define FSL_SAI_CSR_FR BIT(25) 50#define FSL_SAI_CSR_FR BIT(25)
51#define FSL_SAI_CSR_SR BIT(25)
51#define FSL_SAI_CSR_xF_SHIFT 16 52#define FSL_SAI_CSR_xF_SHIFT 16
52#define FSL_SAI_CSR_xF_W_SHIFT 18 53#define FSL_SAI_CSR_xF_W_SHIFT 18
53#define FSL_SAI_CSR_xF_MASK (0x1f << FSL_SAI_CSR_xF_SHIFT) 54#define FSL_SAI_CSR_xF_MASK (0x1f << FSL_SAI_CSR_xF_SHIFT)