ENGR00324009 Revert "ENGR00323404-1 ASoC: fsl_sai: Reset FIFOs after disabling TE/RE"

Patch "ASoC: fsl_sai: Reset FIFOs after disabling TE/RE" may accidentally
increase the underrun rate of SAI.

To keep an equal quality as previous release, we decide to revert this patch
and find a thorough way to reset the FIFO later.

This reverts commit b85f840a60de8d0a5ca8fbe7eda15f611ff5b622.

Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>

1 files changed, 0 insertions, 5 deletions

diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
index cdff65b14dbd..57a020a72a5e 100644
--- a/sound/soc/fsl/fsl_sai.c
+++ b/sound/soc/fsl/fsl_sai.c
@@ -371,15 +371,10 @@ static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd,
 
                 /* Check if the opposite FRDE is also disabled */
                 if (!(tx ? rcsr & FSL_SAI_CSR_FRDE : tcsr & FSL_SAI_CSR_FRDE)) {
-                        /* Disable both directions and reset their FIFOs */
                         regmap_update_bits(sai->regmap, FSL_SAI_TCSR,
                                            FSL_SAI_CSR_TERE, 0);
                         regmap_update_bits(sai->regmap, FSL_SAI_RCSR,
                                            FSL_SAI_CSR_TERE, 0);
-                        regmap_update_bits(sai->regmap, FSL_SAI_TCSR,
-                                           FSL_SAI_CSR_FR, FSL_SAI_CSR_FR);
-                        regmap_update_bits(sai->regmap, FSL_SAI_RCSR,
-                                           FSL_SAI_CSR_FR, FSL_SAI_CSR_FR);
                 }
                 break;
         default: