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authorYegor Yefremov <yegorslists@googlemail.com>2013-04-04 10:13:20 -0400
committerMark Brown <broonie@opensource.wolfsonmicro.com>2013-04-05 06:27:13 -0400
commitf5023af65a9bdd586b33b56e83f1eb3529292991 (patch)
treea2b0548af334e71c279567dcdca813dd104ced25 /sound/soc/davinci/davinci-mcasp.c
parent2dda75e07df04a39ecb9d61b6b5cdb6ed79df0d1 (diff)
ASoC: davinci-mcasp: don't overwrite DIT settings
Channel size settings will be made at the end of davinci_mcasp_hw_params() routine and thus overwrite frame format settings made for DIT mode. This patch fixes this issue by taking op_mode into account. Tested with official PSP 3.2 kernel and sii9022a HDMI transmitter. Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'sound/soc/davinci/davinci-mcasp.c')
-rw-r--r--sound/soc/davinci/davinci-mcasp.c25
1 files changed, 13 insertions, 12 deletions
diff --git a/sound/soc/davinci/davinci-mcasp.c b/sound/soc/davinci/davinci-mcasp.c
index 337431862f36..7252df86c55d 100644
--- a/sound/soc/davinci/davinci-mcasp.c
+++ b/sound/soc/davinci/davinci-mcasp.c
@@ -645,16 +645,20 @@ static int davinci_config_channel_size(struct davinci_audio_dev *dev,
645 /* mapping of the XSSZ bit-field as described in the datasheet */ 645 /* mapping of the XSSZ bit-field as described in the datasheet */
646 fmt = (word_length >> 1) - 1; 646 fmt = (word_length >> 1) - 1;
647 647
648 mcasp_mod_bits(dev->base + DAVINCI_MCASP_RXFMT_REG, 648 if (dev->op_mode != DAVINCI_MCASP_DIT_MODE) {
649 RXSSZ(fmt), RXSSZ(0x0F)); 649 mcasp_mod_bits(dev->base + DAVINCI_MCASP_RXFMT_REG,
650 mcasp_mod_bits(dev->base + DAVINCI_MCASP_TXFMT_REG, 650 RXSSZ(fmt), RXSSZ(0x0F));
651 TXSSZ(fmt), TXSSZ(0x0F)); 651 mcasp_mod_bits(dev->base + DAVINCI_MCASP_TXFMT_REG,
652 mcasp_mod_bits(dev->base + DAVINCI_MCASP_TXFMT_REG, TXROT(rotate), 652 TXSSZ(fmt), TXSSZ(0x0F));
653 TXROT(7)); 653 mcasp_mod_bits(dev->base + DAVINCI_MCASP_TXFMT_REG,
654 mcasp_mod_bits(dev->base + DAVINCI_MCASP_RXFMT_REG, RXROT(rotate), 654 TXROT(rotate), TXROT(7));
655 RXROT(7)); 655 mcasp_mod_bits(dev->base + DAVINCI_MCASP_RXFMT_REG,
656 RXROT(rotate), RXROT(7));
657 mcasp_set_reg(dev->base + DAVINCI_MCASP_RXMASK_REG,
658 mask);
659 }
660
656 mcasp_set_reg(dev->base + DAVINCI_MCASP_TXMASK_REG, mask); 661 mcasp_set_reg(dev->base + DAVINCI_MCASP_TXMASK_REG, mask);
657 mcasp_set_reg(dev->base + DAVINCI_MCASP_RXMASK_REG, mask);
658 662
659 return 0; 663 return 0;
660} 664}
@@ -795,9 +799,6 @@ static void davinci_hw_param(struct davinci_audio_dev *dev, int stream)
795/* S/PDIF */ 799/* S/PDIF */
796static void davinci_hw_dit_param(struct davinci_audio_dev *dev) 800static void davinci_hw_dit_param(struct davinci_audio_dev *dev)
797{ 801{
798 /* TXMASK for 24 bits */
799 mcasp_set_reg(dev->base + DAVINCI_MCASP_TXMASK_REG, 0x00FFFFFF);
800
801 /* Set the TX format : 24 bit right rotation, 32 bit slot, Pad 0 802 /* Set the TX format : 24 bit right rotation, 32 bit slot, Pad 0
802 and LSB first */ 803 and LSB first */
803 mcasp_set_bits(dev->base + DAVINCI_MCASP_TXFMT_REG, 804 mcasp_set_bits(dev->base + DAVINCI_MCASP_TXFMT_REG,