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authorLinus Torvalds <torvalds@linux-foundation.org>2013-02-21 17:58:40 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2013-02-21 17:58:40 -0500
commitb274776c54c320763bc12eb035c0e244f76ccb43 (patch)
treec75b70d0824a7ae029229b19d61884039abf2127 /include
parentb24174b0cbbe383c5bb6097aeb24480b8fd2d338 (diff)
parent3b1209e7994c4d31ff9932a7f566ae1c96b3c443 (diff)
Merge tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC cleanups from Arnd Bergmann: "A large number of cleanups, all over the platforms. This is dominated largely by the Samsung platforms (s3c, s5p, exynos) and a few of the others moving code out of arch/arm into more appropriate subsystems. The clocksource and irqchip drivers are now abstracted to the point where platforms that are already cleaned up do not need to even specify the driver they use, it can all get configured from the device tree as we do for normal device drivers. The clocksource changes basically touch every single platform in the process. We further clean up the use of platform specific header files here, with the goal of turning more of the platforms over to being "multiplatform" enabled, which implies that they cannot expose their headers to architecture independent code any more. It is expected that no functional changes are part of the cleanup. The overall reduction in total code lines is mostly the result of removing broken and obsolete code." * tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (133 commits) ARM: mvebu: correct gated clock documentation ARM: kirkwood: add missing include for nsa310 ARM: exynos: move exynos4210-combiner to drivers/irqchip mfd: db8500-prcmu: update resource passing drivers/db8500-cpufreq: delete dangling include ARM: at91: remove NEOCORE 926 board sunxi: Cleanup the reset code and add meaningful registers defines ARM: S3C24XX: header mach/regs-mem.h local ARM: S3C24XX: header mach/regs-power.h local ARM: S3C24XX: header mach/regs-s3c2412-mem.h local ARM: S3C24XX: Remove plat-s3c24xx directory in arch/arm/ ARM: S3C24XX: transform s3c2443 subirqs into new structure ARM: S3C24XX: modify s3c2443 irq init to initialize all irqs ARM: S3C24XX: move s3c2443 irq code to irq.c ARM: S3C24XX: transform s3c2416 irqs into new structure ARM: S3C24XX: modify s3c2416 irq init to initialize all irqs ARM: S3C24XX: move s3c2416 irq init to common irq code ARM: S3C24XX: Modify s3c_irq_wake to use the hwirq property ARM: S3C24XX: Move irq syscore-ops to irq-pm clocksource: always define CLOCKSOURCE_OF_DECLARE ...
Diffstat (limited to 'include')
-rw-r--r--include/asm-generic/vmlinux.lds.h22
-rw-r--r--include/linux/bcm2835_timer.h22
-rw-r--r--include/linux/clocksource.h11
-rw-r--r--include/linux/dw_apb_timer.h2
-rw-r--r--include/linux/irqchip.h16
-rw-r--r--include/linux/irqchip/arm-gic.h48
-rw-r--r--include/linux/irqchip/arm-vic.h36
-rw-r--r--include/linux/mfd/db8500-prcmu.h20
-rw-r--r--include/linux/mfd/dbx500-prcmu.h127
-rw-r--r--include/linux/sunxi_timer.h2
-rw-r--r--include/linux/time.h4
11 files changed, 181 insertions, 129 deletions
diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h
index c1fe60ad1540..afa12c7a025c 100644
--- a/include/asm-generic/vmlinux.lds.h
+++ b/include/asm-generic/vmlinux.lds.h
@@ -149,6 +149,24 @@
149#define TRACE_SYSCALLS() 149#define TRACE_SYSCALLS()
150#endif 150#endif
151 151
152#ifdef CONFIG_CLKSRC_OF
153#define CLKSRC_OF_TABLES() . = ALIGN(8); \
154 VMLINUX_SYMBOL(__clksrc_of_table) = .; \
155 *(__clksrc_of_table) \
156 *(__clksrc_of_table_end)
157#else
158#define CLKSRC_OF_TABLES()
159#endif
160
161#ifdef CONFIG_IRQCHIP
162#define IRQCHIP_OF_MATCH_TABLE() \
163 . = ALIGN(8); \
164 VMLINUX_SYMBOL(__irqchip_begin) = .; \
165 *(__irqchip_of_table) \
166 *(__irqchip_of_end)
167#else
168#define IRQCHIP_OF_MATCH_TABLE()
169#endif
152 170
153#ifdef CONFIG_COMMON_CLK 171#ifdef CONFIG_COMMON_CLK
154#define CLK_OF_TABLES() . = ALIGN(8); \ 172#define CLK_OF_TABLES() . = ALIGN(8); \
@@ -503,7 +521,9 @@
503 CPU_DISCARD(init.rodata) \ 521 CPU_DISCARD(init.rodata) \
504 MEM_DISCARD(init.rodata) \ 522 MEM_DISCARD(init.rodata) \
505 CLK_OF_TABLES() \ 523 CLK_OF_TABLES() \
506 KERNEL_DTB() 524 CLKSRC_OF_TABLES() \
525 KERNEL_DTB() \
526 IRQCHIP_OF_MATCH_TABLE()
507 527
508#define INIT_TEXT \ 528#define INIT_TEXT \
509 *(.init.text) \ 529 *(.init.text) \
diff --git a/include/linux/bcm2835_timer.h b/include/linux/bcm2835_timer.h
deleted file mode 100644
index 25680fe0903c..000000000000
--- a/include/linux/bcm2835_timer.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * Copyright 2012 Simon Arlott
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#ifndef __BCM2835_TIMER_H
16#define __BCM2835_TIMER_H
17
18#include <asm/mach/time.h>
19
20extern struct sys_timer bcm2835_timer;
21
22#endif
diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h
index 4dceaf8ae152..27cfda427dd9 100644
--- a/include/linux/clocksource.h
+++ b/include/linux/clocksource.h
@@ -332,4 +332,15 @@ extern int clocksource_mmio_init(void __iomem *, const char *,
332 332
333extern int clocksource_i8253_init(void); 333extern int clocksource_i8253_init(void);
334 334
335#ifdef CONFIG_CLKSRC_OF
336extern void clocksource_of_init(void);
337
338#define CLOCKSOURCE_OF_DECLARE(name, compat, fn) \
339 static const struct of_device_id __clksrc_of_table_##name \
340 __used __section(__clksrc_of_table) \
341 = { .compatible = compat, .data = fn };
342#else
343#define CLOCKSOURCE_OF_DECLARE(name, compat, fn)
344#endif
345
335#endif /* _LINUX_CLOCKSOURCE_H */ 346#endif /* _LINUX_CLOCKSOURCE_H */
diff --git a/include/linux/dw_apb_timer.h b/include/linux/dw_apb_timer.h
index 1148575fd134..dd755ce2a5eb 100644
--- a/include/linux/dw_apb_timer.h
+++ b/include/linux/dw_apb_timer.h
@@ -53,5 +53,5 @@ void dw_apb_clocksource_start(struct dw_apb_clocksource *dw_cs);
53cycle_t dw_apb_clocksource_read(struct dw_apb_clocksource *dw_cs); 53cycle_t dw_apb_clocksource_read(struct dw_apb_clocksource *dw_cs);
54void dw_apb_clocksource_unregister(struct dw_apb_clocksource *dw_cs); 54void dw_apb_clocksource_unregister(struct dw_apb_clocksource *dw_cs);
55 55
56extern struct sys_timer dw_apb_timer; 56extern void dw_apb_timer_init(void);
57#endif /* __DW_APB_TIMER_H__ */ 57#endif /* __DW_APB_TIMER_H__ */
diff --git a/include/linux/irqchip.h b/include/linux/irqchip.h
new file mode 100644
index 000000000000..e0006f1d35a0
--- /dev/null
+++ b/include/linux/irqchip.h
@@ -0,0 +1,16 @@
1/*
2 * Copyright (C) 2012 Thomas Petazzoni
3 *
4 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#ifndef _LINUX_IRQCHIP_H
12#define _LINUX_IRQCHIP_H
13
14void irqchip_init(void);
15
16#endif
diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h
new file mode 100644
index 000000000000..a67ca55e6f4e
--- /dev/null
+++ b/include/linux/irqchip/arm-gic.h
@@ -0,0 +1,48 @@
1/*
2 * include/linux/irqchip/arm-gic.h
3 *
4 * Copyright (C) 2002 ARM Limited, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef __LINUX_IRQCHIP_ARM_GIC_H
11#define __LINUX_IRQCHIP_ARM_GIC_H
12
13#define GIC_CPU_CTRL 0x00
14#define GIC_CPU_PRIMASK 0x04
15#define GIC_CPU_BINPOINT 0x08
16#define GIC_CPU_INTACK 0x0c
17#define GIC_CPU_EOI 0x10
18#define GIC_CPU_RUNNINGPRI 0x14
19#define GIC_CPU_HIGHPRI 0x18
20
21#define GIC_DIST_CTRL 0x000
22#define GIC_DIST_CTR 0x004
23#define GIC_DIST_ENABLE_SET 0x100
24#define GIC_DIST_ENABLE_CLEAR 0x180
25#define GIC_DIST_PENDING_SET 0x200
26#define GIC_DIST_PENDING_CLEAR 0x280
27#define GIC_DIST_ACTIVE_BIT 0x300
28#define GIC_DIST_PRI 0x400
29#define GIC_DIST_TARGET 0x800
30#define GIC_DIST_CONFIG 0xc00
31#define GIC_DIST_SOFTINT 0xf00
32
33struct device_node;
34
35extern struct irq_chip gic_arch_extn;
36
37void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *,
38 u32 offset, struct device_node *);
39void gic_secondary_init(unsigned int);
40void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
41
42static inline void gic_init(unsigned int nr, int start,
43 void __iomem *dist , void __iomem *cpu)
44{
45 gic_init_bases(nr, start, dist, cpu, 0, NULL);
46}
47
48#endif
diff --git a/include/linux/irqchip/arm-vic.h b/include/linux/irqchip/arm-vic.h
new file mode 100644
index 000000000000..e3c82dc95756
--- /dev/null
+++ b/include/linux/irqchip/arm-vic.h
@@ -0,0 +1,36 @@
1/*
2 * arch/arm/include/asm/hardware/vic.h
3 *
4 * Copyright (c) ARM Limited 2003. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __ASM_ARM_HARDWARE_VIC_H
21#define __ASM_ARM_HARDWARE_VIC_H
22
23#include <linux/types.h>
24
25#define VIC_RAW_STATUS 0x08
26#define VIC_INT_ENABLE 0x10 /* 1 = enable, 0 = disable */
27#define VIC_INT_ENABLE_CLEAR 0x14
28
29struct device_node;
30struct pt_regs;
31
32void __vic_init(void __iomem *base, int irq_start, u32 vic_sources,
33 u32 resume_sources, struct device_node *node);
34void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources);
35
36#endif
diff --git a/include/linux/mfd/db8500-prcmu.h b/include/linux/mfd/db8500-prcmu.h
index 6ee4247df11e..77a46ae2fc17 100644
--- a/include/linux/mfd/db8500-prcmu.h
+++ b/include/linux/mfd/db8500-prcmu.h
@@ -16,12 +16,6 @@
16/* 16/*
17 * Registers 17 * Registers
18 */ 18 */
19#define DB8500_PRCM_GPIOCR 0x138
20#define DB8500_PRCM_GPIOCR_DBG_UARTMOD_CMD0 BIT(0)
21#define DB8500_PRCM_GPIOCR_DBG_STM_APE_CMD BIT(9)
22#define DB8500_PRCM_GPIOCR_DBG_STM_MOD_CMD1 BIT(11)
23#define DB8500_PRCM_GPIOCR_SPI2_SELECT BIT(23)
24
25#define DB8500_PRCM_LINE_VALUE 0x170 19#define DB8500_PRCM_LINE_VALUE 0x170
26#define DB8500_PRCM_LINE_VALUE_HSI_CAWAKE0 BIT(3) 20#define DB8500_PRCM_LINE_VALUE_HSI_CAWAKE0 BIT(3)
27 21
@@ -493,20 +487,6 @@ struct prcmu_auto_pm_config {
493 u8 sva_policy; 487 u8 sva_policy;
494}; 488};
495 489
496#define PRCMU_FW_PROJECT_U8500 2
497#define PRCMU_FW_PROJECT_U9500 4
498#define PRCMU_FW_PROJECT_U8500_C2 7
499#define PRCMU_FW_PROJECT_U9500_C2 11
500#define PRCMU_FW_PROJECT_U8520 13
501#define PRCMU_FW_PROJECT_U8420 14
502
503struct prcmu_fw_version {
504 u8 project;
505 u8 api_version;
506 u8 func_version;
507 u8 errata;
508};
509
510#ifdef CONFIG_MFD_DB8500_PRCMU 490#ifdef CONFIG_MFD_DB8500_PRCMU
511 491
512void db8500_prcmu_early_init(void); 492void db8500_prcmu_early_init(void);
diff --git a/include/linux/mfd/dbx500-prcmu.h b/include/linux/mfd/dbx500-prcmu.h
index c202d6c4d879..f8bac7cfc25f 100644
--- a/include/linux/mfd/dbx500-prcmu.h
+++ b/include/linux/mfd/dbx500-prcmu.h
@@ -12,6 +12,10 @@
12#include <linux/notifier.h> 12#include <linux/notifier.h>
13#include <linux/err.h> 13#include <linux/err.h>
14 14
15/* Offset for the firmware version within the TCPM */
16#define DB8500_PRCMU_FW_VERSION_OFFSET 0xA4
17#define DBX540_PRCMU_FW_VERSION_OFFSET 0xA8
18
15/* PRCMU Wakeup defines */ 19/* PRCMU Wakeup defines */
16enum prcmu_wakeup_index { 20enum prcmu_wakeup_index {
17 PRCMU_WAKEUP_INDEX_RTC, 21 PRCMU_WAKEUP_INDEX_RTC,
@@ -214,12 +218,52 @@ enum ddr_pwrst {
214 DDR_PWR_STATE_OFFHIGHLAT = 0x03 218 DDR_PWR_STATE_OFFHIGHLAT = 0x03
215}; 219};
216 220
221#define DB8500_PRCMU_LEGACY_OFFSET 0xDD4
222
223struct prcmu_pdata
224{
225 bool enable_set_ddr_opp;
226 bool enable_ape_opp_100_voltage;
227 struct ab8500_platform_data *ab_platdata;
228 u32 version_offset;
229 u32 legacy_offset;
230 u32 adt_offset;
231};
232
233#define PRCMU_FW_PROJECT_U8500 2
234#define PRCMU_FW_PROJECT_U8400 3
235#define PRCMU_FW_PROJECT_U9500 4 /* Customer specific */
236#define PRCMU_FW_PROJECT_U8500_MBB 5
237#define PRCMU_FW_PROJECT_U8500_C1 6
238#define PRCMU_FW_PROJECT_U8500_C2 7
239#define PRCMU_FW_PROJECT_U8500_C3 8
240#define PRCMU_FW_PROJECT_U8500_C4 9
241#define PRCMU_FW_PROJECT_U9500_MBL 10
242#define PRCMU_FW_PROJECT_U8500_MBL 11 /* Customer specific */
243#define PRCMU_FW_PROJECT_U8500_MBL2 12 /* Customer specific */
244#define PRCMU_FW_PROJECT_U8520 13
245#define PRCMU_FW_PROJECT_U8420 14
246#define PRCMU_FW_PROJECT_A9420 20
247/* [32..63] 9540 and derivatives */
248#define PRCMU_FW_PROJECT_U9540 32
249/* [64..95] 8540 and derivatives */
250#define PRCMU_FW_PROJECT_L8540 64
251/* [96..126] 8580 and derivatives */
252#define PRCMU_FW_PROJECT_L8580 96
253
254#define PRCMU_FW_PROJECT_NAME_LEN 20
255struct prcmu_fw_version {
256 u32 project; /* Notice, project shifted with 8 on ux540 */
257 u8 api_version;
258 u8 func_version;
259 u8 errata;
260 char project_name[PRCMU_FW_PROJECT_NAME_LEN];
261};
262
217#include <linux/mfd/db8500-prcmu.h> 263#include <linux/mfd/db8500-prcmu.h>
218 264
219#if defined(CONFIG_UX500_SOC_DB8500) 265#if defined(CONFIG_UX500_SOC_DB8500)
220 266
221#include <mach/id.h>
222
223static inline void __init prcmu_early_init(void) 267static inline void __init prcmu_early_init(void)
224{ 268{
225 return db8500_prcmu_early_init(); 269 return db8500_prcmu_early_init();
@@ -626,85 +670,6 @@ static inline void prcmu_clear(unsigned int reg, u32 bits)
626 prcmu_write_masked(reg, bits, 0); 670 prcmu_write_masked(reg, bits, 0);
627} 671}
628 672
629#if defined(CONFIG_UX500_SOC_DB8500)
630
631/**
632 * prcmu_enable_spi2 - Enables pin muxing for SPI2 on OtherAlternateC1.
633 */
634static inline void prcmu_enable_spi2(void)
635{
636 if (cpu_is_u8500())
637 prcmu_set(DB8500_PRCM_GPIOCR, DB8500_PRCM_GPIOCR_SPI2_SELECT);
638}
639
640/**
641 * prcmu_disable_spi2 - Disables pin muxing for SPI2 on OtherAlternateC1.
642 */
643static inline void prcmu_disable_spi2(void)
644{
645 if (cpu_is_u8500())
646 prcmu_clear(DB8500_PRCM_GPIOCR, DB8500_PRCM_GPIOCR_SPI2_SELECT);
647}
648
649/**
650 * prcmu_enable_stm_mod_uart - Enables pin muxing for STMMOD
651 * and UARTMOD on OtherAlternateC3.
652 */
653static inline void prcmu_enable_stm_mod_uart(void)
654{
655 if (cpu_is_u8500()) {
656 prcmu_set(DB8500_PRCM_GPIOCR,
657 (DB8500_PRCM_GPIOCR_DBG_STM_MOD_CMD1 |
658 DB8500_PRCM_GPIOCR_DBG_UARTMOD_CMD0));
659 }
660}
661
662/**
663 * prcmu_disable_stm_mod_uart - Disables pin muxing for STMMOD
664 * and UARTMOD on OtherAlternateC3.
665 */
666static inline void prcmu_disable_stm_mod_uart(void)
667{
668 if (cpu_is_u8500()) {
669 prcmu_clear(DB8500_PRCM_GPIOCR,
670 (DB8500_PRCM_GPIOCR_DBG_STM_MOD_CMD1 |
671 DB8500_PRCM_GPIOCR_DBG_UARTMOD_CMD0));
672 }
673}
674
675/**
676 * prcmu_enable_stm_ape - Enables pin muxing for STM APE on OtherAlternateC1.
677 */
678static inline void prcmu_enable_stm_ape(void)
679{
680 if (cpu_is_u8500()) {
681 prcmu_set(DB8500_PRCM_GPIOCR,
682 DB8500_PRCM_GPIOCR_DBG_STM_APE_CMD);
683 }
684}
685
686/**
687 * prcmu_disable_stm_ape - Disables pin muxing for STM APE on OtherAlternateC1.
688 */
689static inline void prcmu_disable_stm_ape(void)
690{
691 if (cpu_is_u8500()) {
692 prcmu_clear(DB8500_PRCM_GPIOCR,
693 DB8500_PRCM_GPIOCR_DBG_STM_APE_CMD);
694 }
695}
696
697#else
698
699static inline void prcmu_enable_spi2(void) {}
700static inline void prcmu_disable_spi2(void) {}
701static inline void prcmu_enable_stm_mod_uart(void) {}
702static inline void prcmu_disable_stm_mod_uart(void) {}
703static inline void prcmu_enable_stm_ape(void) {}
704static inline void prcmu_disable_stm_ape(void) {}
705
706#endif
707
708/* PRCMU QoS APE OPP class */ 673/* PRCMU QoS APE OPP class */
709#define PRCMU_QOS_APE_OPP 1 674#define PRCMU_QOS_APE_OPP 1
710#define PRCMU_QOS_DDR_OPP 2 675#define PRCMU_QOS_DDR_OPP 2
diff --git a/include/linux/sunxi_timer.h b/include/linux/sunxi_timer.h
index b9165bba6e61..18081787e5f3 100644
--- a/include/linux/sunxi_timer.h
+++ b/include/linux/sunxi_timer.h
@@ -19,6 +19,6 @@
19 19
20#include <asm/mach/time.h> 20#include <asm/mach/time.h>
21 21
22extern struct sys_timer sunxi_timer; 22void sunxi_timer_init(void);
23 23
24#endif 24#endif
diff --git a/include/linux/time.h b/include/linux/time.h
index a3ab6a814a9c..d4835dfdf25e 100644
--- a/include/linux/time.h
+++ b/include/linux/time.h
@@ -154,9 +154,7 @@ void timekeeping_inject_sleeptime(struct timespec *delta);
154 * finer then tick granular time. 154 * finer then tick granular time.
155 */ 155 */
156#ifdef CONFIG_ARCH_USES_GETTIMEOFFSET 156#ifdef CONFIG_ARCH_USES_GETTIMEOFFSET
157extern u32 arch_gettimeoffset(void); 157extern u32 (*arch_gettimeoffset)(void);
158#else
159static inline u32 arch_gettimeoffset(void) { return 0; }
160#endif 158#endif
161 159
162extern void do_gettimeofday(struct timeval *tv); 160extern void do_gettimeofday(struct timeval *tv);