diff options
author | Florian Tobias Schandinat <FlorianSchandinat@gmx.de> | 2012-07-25 04:55:46 -0400 |
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committer | Florian Tobias Schandinat <FlorianSchandinat@gmx.de> | 2012-07-25 04:55:46 -0400 |
commit | d9053b487965042b9c849ce40c7f1fb7a0b84b39 (patch) | |
tree | 1fbb2559dd8fd400cf1dff5711cc5e408ea79ef6 /include/video | |
parent | 4c5b1fb8a1348542afb153aef72f6067989f578e (diff) | |
parent | 974a65825e0b5fbda49605f0416a2c975d66e9e6 (diff) |
Merge branch 'for-florian' of git://gitorious.org/linux-omap-dss2/linux into fbdev-next
Conflicts:
drivers/video/omap2/dss/core.c
drivers/video/omap2/dss/dispc.c
Diffstat (limited to 'include/video')
-rw-r--r-- | include/video/omapdss.h | 51 |
1 files changed, 26 insertions, 25 deletions
diff --git a/include/video/omapdss.h b/include/video/omapdss.h index c8e59b4a3364..a6267a2d292b 100644 --- a/include/video/omapdss.h +++ b/include/video/omapdss.h | |||
@@ -48,6 +48,10 @@ | |||
48 | #define DISPC_IRQ_FRAMEDONEWB (1 << 23) | 48 | #define DISPC_IRQ_FRAMEDONEWB (1 << 23) |
49 | #define DISPC_IRQ_FRAMEDONETV (1 << 24) | 49 | #define DISPC_IRQ_FRAMEDONETV (1 << 24) |
50 | #define DISPC_IRQ_WBBUFFEROVERFLOW (1 << 25) | 50 | #define DISPC_IRQ_WBBUFFEROVERFLOW (1 << 25) |
51 | #define DISPC_IRQ_FRAMEDONE3 (1 << 26) | ||
52 | #define DISPC_IRQ_VSYNC3 (1 << 27) | ||
53 | #define DISPC_IRQ_ACBIAS_COUNT_STAT3 (1 << 28) | ||
54 | #define DISPC_IRQ_SYNC_LOST3 (1 << 29) | ||
51 | 55 | ||
52 | struct omap_dss_device; | 56 | struct omap_dss_device; |
53 | struct omap_overlay_manager; | 57 | struct omap_overlay_manager; |
@@ -75,6 +79,7 @@ enum omap_channel { | |||
75 | OMAP_DSS_CHANNEL_LCD = 0, | 79 | OMAP_DSS_CHANNEL_LCD = 0, |
76 | OMAP_DSS_CHANNEL_DIGIT = 1, | 80 | OMAP_DSS_CHANNEL_DIGIT = 1, |
77 | OMAP_DSS_CHANNEL_LCD2 = 2, | 81 | OMAP_DSS_CHANNEL_LCD2 = 2, |
82 | OMAP_DSS_CHANNEL_LCD3 = 3, | ||
78 | }; | 83 | }; |
79 | 84 | ||
80 | enum omap_color_mode { | 85 | enum omap_color_mode { |
@@ -99,11 +104,6 @@ enum omap_color_mode { | |||
99 | OMAP_DSS_COLOR_XRGB16_1555 = 1 << 18, /* xRGB16 - 1555 */ | 104 | OMAP_DSS_COLOR_XRGB16_1555 = 1 << 18, /* xRGB16 - 1555 */ |
100 | }; | 105 | }; |
101 | 106 | ||
102 | enum omap_lcd_display_type { | ||
103 | OMAP_DSS_LCD_DISPLAY_STN, | ||
104 | OMAP_DSS_LCD_DISPLAY_TFT, | ||
105 | }; | ||
106 | |||
107 | enum omap_dss_load_mode { | 107 | enum omap_dss_load_mode { |
108 | OMAP_DSS_LOAD_CLUT_AND_FRAME = 0, | 108 | OMAP_DSS_LOAD_CLUT_AND_FRAME = 0, |
109 | OMAP_DSS_LOAD_CLUT_ONLY = 1, | 109 | OMAP_DSS_LOAD_CLUT_ONLY = 1, |
@@ -121,15 +121,15 @@ enum omap_rfbi_te_mode { | |||
121 | OMAP_DSS_RFBI_TE_MODE_2 = 2, | 121 | OMAP_DSS_RFBI_TE_MODE_2 = 2, |
122 | }; | 122 | }; |
123 | 123 | ||
124 | enum omap_panel_config { | 124 | enum omap_dss_signal_level { |
125 | OMAP_DSS_LCD_IVS = 1<<0, | 125 | OMAPDSS_SIG_ACTIVE_HIGH = 0, |
126 | OMAP_DSS_LCD_IHS = 1<<1, | 126 | OMAPDSS_SIG_ACTIVE_LOW = 1, |
127 | OMAP_DSS_LCD_IPC = 1<<2, | 127 | }; |
128 | OMAP_DSS_LCD_IEO = 1<<3, | ||
129 | OMAP_DSS_LCD_RF = 1<<4, | ||
130 | OMAP_DSS_LCD_ONOFF = 1<<5, | ||
131 | 128 | ||
132 | OMAP_DSS_LCD_TFT = 1<<20, | 129 | enum omap_dss_signal_edge { |
130 | OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES, | ||
131 | OMAPDSS_DRIVE_SIG_RISING_EDGE, | ||
132 | OMAPDSS_DRIVE_SIG_FALLING_EDGE, | ||
133 | }; | 133 | }; |
134 | 134 | ||
135 | enum omap_dss_venc_type { | 135 | enum omap_dss_venc_type { |
@@ -167,13 +167,6 @@ enum omap_dss_audio_state { | |||
167 | OMAP_DSS_AUDIO_PLAYING, | 167 | OMAP_DSS_AUDIO_PLAYING, |
168 | }; | 168 | }; |
169 | 169 | ||
170 | /* XXX perhaps this should be removed */ | ||
171 | enum omap_dss_overlay_managers { | ||
172 | OMAP_DSS_OVL_MGR_LCD, | ||
173 | OMAP_DSS_OVL_MGR_TV, | ||
174 | OMAP_DSS_OVL_MGR_LCD2, | ||
175 | }; | ||
176 | |||
177 | enum omap_dss_rotation_type { | 170 | enum omap_dss_rotation_type { |
178 | OMAP_DSS_ROT_DMA = 1 << 0, | 171 | OMAP_DSS_ROT_DMA = 1 << 0, |
179 | OMAP_DSS_ROT_VRFB = 1 << 1, | 172 | OMAP_DSS_ROT_VRFB = 1 << 1, |
@@ -268,9 +261,6 @@ struct omap_dss_dsi_videomode_data { | |||
268 | int hfp_blanking_mode; | 261 | int hfp_blanking_mode; |
269 | 262 | ||
270 | /* Video port sync events */ | 263 | /* Video port sync events */ |
271 | int vp_de_pol; | ||
272 | int vp_hsync_pol; | ||
273 | int vp_vsync_pol; | ||
274 | bool vp_vsync_end; | 264 | bool vp_vsync_end; |
275 | bool vp_hsync_end; | 265 | bool vp_hsync_end; |
276 | 266 | ||
@@ -346,6 +336,19 @@ struct omap_video_timings { | |||
346 | u16 vfp; /* Vertical front porch */ | 336 | u16 vfp; /* Vertical front porch */ |
347 | /* Unit: line clocks */ | 337 | /* Unit: line clocks */ |
348 | u16 vbp; /* Vertical back porch */ | 338 | u16 vbp; /* Vertical back porch */ |
339 | |||
340 | /* Vsync logic level */ | ||
341 | enum omap_dss_signal_level vsync_level; | ||
342 | /* Hsync logic level */ | ||
343 | enum omap_dss_signal_level hsync_level; | ||
344 | /* Interlaced or Progressive timings */ | ||
345 | bool interlace; | ||
346 | /* Pixel clock edge to drive LCD data */ | ||
347 | enum omap_dss_signal_edge data_pclk_edge; | ||
348 | /* Data enable logic level */ | ||
349 | enum omap_dss_signal_level de_level; | ||
350 | /* Pixel clock edges to drive HSYNC and VSYNC signals */ | ||
351 | enum omap_dss_signal_edge sync_pclk_edge; | ||
349 | }; | 352 | }; |
350 | 353 | ||
351 | #ifdef CONFIG_OMAP2_DSS_VENC | 354 | #ifdef CONFIG_OMAP2_DSS_VENC |
@@ -559,8 +562,6 @@ struct omap_dss_device { | |||
559 | /* Unit: line clocks */ | 562 | /* Unit: line clocks */ |
560 | int acb; /* ac-bias pin frequency */ | 563 | int acb; /* ac-bias pin frequency */ |
561 | 564 | ||
562 | enum omap_panel_config config; | ||
563 | |||
564 | enum omap_dss_dsi_pixel_format dsi_pix_fmt; | 565 | enum omap_dss_dsi_pixel_format dsi_pix_fmt; |
565 | enum omap_dss_dsi_mode dsi_mode; | 566 | enum omap_dss_dsi_mode dsi_mode; |
566 | struct omap_dss_dsi_videomode_data dsi_vm_data; | 567 | struct omap_dss_dsi_videomode_data dsi_vm_data; |