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authorRichard Zhu <r65037@freescale.com>2014-04-15 02:23:42 -0400
committerNitin Garg <nitin.garg@freescale.com>2014-04-16 09:58:21 -0400
commitd9bc7e358e1494e29da5acc4c33c1144cdbd31f2 (patch)
tree1d665ea6cc1f5d992c769078fff5422be2227ba8 /include/linux
parent81b4f7898ff6f212d016f0ad8877a15160c7f0e1 (diff)
ENGR00308060-2 mcc: implementation mcc on imx6sx
- inherited mcc ver 001.002 from vibryd mqx release. - use mu general int4 as the cpu2cpu int (num is 122 at a9 side). - add linux wait_event/wake_up mechanism on the buffer management of share memory - replace wait_event_interruptible### by wait_event###, so the sleep task wouldn't be waken up by reboot or CTRL+C signals. - use the offset address to do the MQX_TO_VIRT and VIRT_TO_MQX exchanges. - regmap_bits_updat can't write 1 to clear the bit-set asr, use regmap_read/write - fix mu irq clear hang issue only do the regmap once in the isr register func, and replace the multi-regmap operations in the kinds of mx6sx mcc related apis by one global imx_mu_reg. Signed-off-by: Richard Zhu <r65037@freescale.com>
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/mcc_imx6sx.h43
-rw-r--r--include/linux/mcc_linux.h53
2 files changed, 96 insertions, 0 deletions
diff --git a/include/linux/mcc_imx6sx.h b/include/linux/mcc_imx6sx.h
new file mode 100644
index 000000000000..86a6de7da31d
--- /dev/null
+++ b/include/linux/mcc_imx6sx.h
@@ -0,0 +1,43 @@
1/*
2 * Copyright (C) 2014 Freescale Semiconductor, Inc.
3 * Freescale IMX Linux-specific MCC implementation.
4 * Prototypes for iMX6sx-specific MCC library functions.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program. If not, see <http://www.gnu.org/licenses/>.
17 */
18
19/*
20 * Define the phiscal memory address on A9 and shared M4,
21 * This definition should be aligned on both A9 and M4
22 */
23#define MCC_VECTOR_NUMBER_INVALID (0)
24
25enum {
26 /* FIXME */
27 INT_CPU_TO_CPU_MU_A2M = 122,
28 INT_CPU_TO_CPU_MU_M2A = 90,
29
30 MU_ASR = 0x20,
31 MU_ACR = 0x24,
32};
33
34extern struct regmap *imx_mu_reg;
35
36/* Return core num. A9 0, M4 1 */
37unsigned int _psp_core_num(void);
38
39unsigned int mcc_get_cpu_to_cpu_vector(unsigned int);
40void mcc_clear_cpu_to_cpu_interrupt(unsigned int);
41void mcc_triger_cpu_to_cpu_interrupt(void);
42int imx_mcc_bsp_int_disable(unsigned int vector_number);
43int imx_mcc_bsp_int_enable(unsigned int vector_number);
diff --git a/include/linux/mcc_linux.h b/include/linux/mcc_linux.h
new file mode 100644
index 000000000000..f8591de63e74
--- /dev/null
+++ b/include/linux/mcc_linux.h
@@ -0,0 +1,53 @@
1/*
2 * Copyright (C) 2014 Freescale Semiconductor, Inc.
3 * Freescale IMX Linux-specific MCC implementation.
4 * Prototypes for Linunx-specific MCC library functions
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program. If not, see <http://www.gnu.org/licenses/>.
17 */
18
19#ifndef __MCC_LINUX__
20#define __MCC_LINUX__
21
22/* Define the kinds of cache macros */
23#define MCC_DCACHE_ENABLE(n)
24#define MCC_DCACHE_DISABLE()
25#define MCC_DCACHE_FLUSH()
26#define MCC_DCACHE_FLUSH_LINE(p)
27#define MCC_DCACHE_FLUSH_MLINES(p, m)
28#define MCC_DCACHE_INVALIDATE()
29#define MCC_DCACHE_INVALIDATE_LINE(p)
30#define MCC_DCACHE_INVALIDATE_MLINES(p, m)
31
32#define _mem_size unsigned int
33
34void * virt_to_mqx(void *);
35void * mqx_to_virt(void *);
36#define VIRT_TO_MQX(x) virt_to_mqx(x)
37#define MQX_TO_VIRT(x) mqx_to_virt(x)
38
39/* Semaphore-related functions */
40int mcc_init_semaphore(unsigned int);
41int mcc_deinit_semaphore(unsigned int);
42int mcc_get_semaphore(void);
43int mcc_release_semaphore(void);
44
45/* CPU-to-CPU interrupt-related functions */
46int mcc_register_cpu_to_cpu_isr(void);
47int mcc_generate_cpu_to_cpu_interrupt(void);
48
49/* Memory management-related functions */
50void mcc_memcpy(void *, void *, unsigned int);
51void _mem_zero(void *, unsigned int);
52
53#endif /* __MCC_LINUX__ */