mtd: nand: add generic READ RETRY support

Modern MLC (and even SLC?) NAND can experience a large number of
bitflips (beyond the recommended correctability capacity) due to drifts
in the voltage threshold (Vt). These bitflips can cause ECC errors to
occur well within the expected lifetime of the flash. To account for
this, some manufacturers provide a mechanism for shifting the Vt
threshold after a corrupted read.

The generic pattern seems to be that a particular flash has N read retry
modes (where N = 0, traditionally), and after an ECC failure, the host
should reconfigure the flash to use the next available mode, then retry
the read operation. This process repeats until all bitfips can be
corrected or until the host has tried all available retry modes.

This patch adds the infrastructure support for a
vendor-specific/flash-specific callback, used for setting the read-retry
mode (i.e., voltage threshold).

For now, this patch always returns the flash to mode 0 (the default
mode) after a successful read-retry, according to the flowchart found in
Micron's datasheets. This may need to change in the future if it is
determined that eventually, mode 0 is insufficient for the majority of
the flash cells (and so for performance reasons, we should leave the
flash in mode 1, 2, etc.).

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Acked-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>

1 files changed, 6 insertions, 0 deletions

diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 309009b7764b..7fd717010ee2 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -472,6 +472,8 @@ struct nand_buffers {
  *                      commands to the chip.
  * @waitfunc:           [REPLACEABLE] hardwarespecific function for wait on
  *                      ready.
+ * @setup_read_retry:   [FLASHSPECIFIC] flash (vendor) specific function for
+ *                      setting the read-retry mode. Mostly needed for MLC NAND.
  * @ecc:                [BOARDSPECIFIC] ECC control structure
  * @buffers:            buffer structure for read/write
  * @hwcontrol:          platform-specific hardware control structure
@@ -518,6 +520,7 @@ struct nand_buffers {
  *                      non 0 if ONFI supported.
  * @onfi_params:        [INTERN] holds the ONFI page parameter when ONFI is
  *                      supported, 0 otherwise.
+ * @read_retries:       [INTERN] the number of read retry modes supported
  * @onfi_set_features:  [REPLACEABLE] set the features for ONFI nand
  * @onfi_get_features:  [REPLACEABLE] get the features for ONFI nand
  * @bbt:                [INTERN] bad block table pointer
@@ -565,6 +568,7 @@ struct nand_chip {
                         int feature_addr, uint8_t *subfeature_para);
         int (*onfi_get_features)(struct mtd_info *mtd, struct nand_chip *chip,
                         int feature_addr, uint8_t *subfeature_para);
+        int (*setup_read_retry)(struct mtd_info *mtd, int retry_mode);
 
         int chip_delay;
         unsigned int options;
@@ -589,6 +593,8 @@ struct nand_chip {
         int onfi_version;
         struct nand_onfi_params onfi_params;
 
+        int read_retries;
+
         flstate_t state;
 
         uint8_t *oob_poi;