diff options
author | Richard Zhu <r65037@freescale.com> | 2013-10-12 03:25:58 -0400 |
---|---|---|
committer | Nitin Garg <nitin.garg@freescale.com> | 2014-04-16 09:05:57 -0400 |
commit | 1abc6093bc1d0ff70af0a2d2a2e6f06a0f93b674 (patch) | |
tree | 50a7a754676c597cc443ec8d740ff899e550245d /include/linux/mmc | |
parent | 1296e0073da98f7829e0553d6bc9a3cb860e9f8f (diff) |
ENGR00285671 mmc: setup emmc boot partition configure methods
- Configure boot partition
Expose the interfaces that used to enable the configurations
of the boot mode of the eMMC cards.
usage how-to and examples:
Enable the boot partition 1 boot enabled.
"echo 8 > /sys/devices/soc0/soc.1/2100000.aips-bus/
219c000.usdhc/mmc_host/mmc2/mmc2\:0001/boot_config"
In order to make sure that the re-read the ext-csd of card
can be completed successfully, add the method to wait for
the finish of the busy state.
- setup boot_info message output
Output bit means of important esd_csd register
Read esd_csd info each time when cat boot_info
becasue user may change config affect esd_csd
value.
- Boot partition access howto:
About the details, please refer to the guidance of
Documentation/mmc/mmc-dev-parts.txt
To enable write access to /dev/mmcblkXbootY, disable the forced
read-only access with:
echo 0 > /sys/block/mmcblkXbootY/force_ro
To re-enable read-only access:
echo 1 > /sys/block/mmcblkXbootY/force_ro
NOTE:
- The definitions of the EXT_CSD_PART_CONFIG and EXT_CSD_BOOT_BUS_WIDTH
+------------------------------------------------------------+
| Bit7 | Bit6 | Bit5 Bit4 Bit3 | Bit2 Bit1 Bit0 |
|------|----------|-----------------------|------------------|
| X | BOOT_ACK | BOOT_PARTITION_ENABLE | PARTITION_ACCESS |
+------------------------------------------------------------+
Bit7: Reserved
Bit6: always set to vaule '1' when boot_part is enabled
Bit[5:3]:
0x0 : Device not boot enabled (default)
0x1 : Boot partition 1 enabled for boot
0x2 : Boot partition 2 enabled for boot
0x7 : User area enabled for boot
Bit[2:0]:
0x0 : No access to boot partition (default)
0x1 : R/W boot partition 1
0x2 : R/W boot partition 2
+--------------------------------------------------------------------+
| Bit7 Bit6 Bit5 | Bit4 Bit3 | Bit2 | Bit1 Bit0 |
|----------------|----------------------------------|----------------|
| X | BOOT_MODE | RESET_BOOT_BUS_WIDTH | BOOT_BUS_WIDTH |
+--------------------------------------------------------------------+
Bit [4:3] : BOOT_MODE (non-volatile)
0x0 : Use single data rate + backward compatible timings in boot
operation (default)
0x1 : Use single data rate + high speed timings in boot operation mode
0x2 : Use dual data rate in boot operation
0x3 : Reserved
Bit [2]: RESET_BOOT_BUS_WIDTH (non-volatile)
0x0 : Reset bus width to x1, single data rate and backward compatible
timings after boot operation (default)
0x1 : Retain boot bus width and boot mode after boot operation
Bit[1:0] : BOOT_BUS_WIDTH (non-volatile)
0x0 : x1 (sdr) or x4 (ddr) bus width in boot operation mode (default)
0x1 : x4 (sdr/ddr) bus width in boot operation mode
0x2 : x8 (sdr/ddr) bus width in boot operation mode
0x3 : Reserved
- example of the boot_info:
boot_info:0x07;
ALT_BOOT_MODE:1 - Supports alternate boot method
DDR_BOOT_MODE:1 - Supports alternate dual data rate during boot
HS_BOOTMODE:1 - Supports high speed timing during boot
boot_size:2048KB
boot_partition:0x48;
BOOT_ACK:1 - Boot acknowledge sent during boot operation
BOOT_PARTITION-ENABLE: 1 - Boot partition 1 enabled
PARTITION_ACCESS:0 - No access to boot partition
boot_bus:0x00
BOOT_MODE:0 - Use single data rate + backward compatible timings
in boot operation
RESET_BOOT_BUS_WIDTH:0 - Reset bus width to x1, single data rate
and backwardcompatible timings after boot operation
BOOT_BUS_WIDTH:0 - x1 (sdr) or x4 (ddr) bus width in boot
operation mode
Signed-off-by: Richard Zhu <r65037@freescale.com>
Diffstat (limited to 'include/linux/mmc')
-rw-r--r-- | include/linux/mmc/card.h | 4 | ||||
-rw-r--r-- | include/linux/mmc/mmc.h | 25 |
2 files changed, 29 insertions, 0 deletions
diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h index f31725ba49f3..a6dc049af77b 100644 --- a/include/linux/mmc/card.h +++ b/include/linux/mmc/card.h | |||
@@ -86,10 +86,13 @@ struct mmc_ext_csd { | |||
86 | unsigned int data_sector_size; /* 512 bytes or 4KB */ | 86 | unsigned int data_sector_size; /* 512 bytes or 4KB */ |
87 | unsigned int data_tag_unit_size; /* DATA TAG UNIT size */ | 87 | unsigned int data_tag_unit_size; /* DATA TAG UNIT size */ |
88 | unsigned int boot_ro_lock; /* ro lock support */ | 88 | unsigned int boot_ro_lock; /* ro lock support */ |
89 | unsigned int boot_size; | ||
89 | bool boot_ro_lockable; | 90 | bool boot_ro_lockable; |
90 | u8 raw_exception_status; /* 54 */ | 91 | u8 raw_exception_status; /* 54 */ |
91 | u8 raw_partition_support; /* 160 */ | 92 | u8 raw_partition_support; /* 160 */ |
92 | u8 raw_rpmb_size_mult; /* 168 */ | 93 | u8 raw_rpmb_size_mult; /* 168 */ |
94 | u8 boot_bus_width; /* 177 */ | ||
95 | u8 boot_config; /* 179 */ | ||
93 | u8 raw_erased_mem_count; /* 181 */ | 96 | u8 raw_erased_mem_count; /* 181 */ |
94 | u8 raw_ext_csd_structure; /* 194 */ | 97 | u8 raw_ext_csd_structure; /* 194 */ |
95 | u8 raw_card_type; /* 196 */ | 98 | u8 raw_card_type; /* 196 */ |
@@ -98,6 +101,7 @@ struct mmc_ext_csd { | |||
98 | u8 raw_hc_erase_gap_size; /* 221 */ | 101 | u8 raw_hc_erase_gap_size; /* 221 */ |
99 | u8 raw_erase_timeout_mult; /* 223 */ | 102 | u8 raw_erase_timeout_mult; /* 223 */ |
100 | u8 raw_hc_erase_grp_size; /* 224 */ | 103 | u8 raw_hc_erase_grp_size; /* 224 */ |
104 | u8 boot_info; /* 228 */ | ||
101 | u8 raw_sec_trim_mult; /* 229 */ | 105 | u8 raw_sec_trim_mult; /* 229 */ |
102 | u8 raw_sec_erase_mult; /* 230 */ | 106 | u8 raw_sec_erase_mult; /* 230 */ |
103 | u8 raw_sec_feature_support;/* 231 */ | 107 | u8 raw_sec_feature_support;/* 231 */ |
diff --git a/include/linux/mmc/mmc.h b/include/linux/mmc/mmc.h index 50bcde3677ca..8c91ac817d8f 100644 --- a/include/linux/mmc/mmc.h +++ b/include/linux/mmc/mmc.h | |||
@@ -292,6 +292,7 @@ struct _mmc_csd { | |||
292 | #define EXT_CSD_RPMB_MULT 168 /* RO */ | 292 | #define EXT_CSD_RPMB_MULT 168 /* RO */ |
293 | #define EXT_CSD_BOOT_WP 173 /* R/W */ | 293 | #define EXT_CSD_BOOT_WP 173 /* R/W */ |
294 | #define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */ | 294 | #define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */ |
295 | #define EXT_CSD_BOOT_BUS_WIDTH 177 /* R/W */ | ||
295 | #define EXT_CSD_PART_CONFIG 179 /* R/W */ | 296 | #define EXT_CSD_PART_CONFIG 179 /* R/W */ |
296 | #define EXT_CSD_ERASED_MEM_CONT 181 /* RO */ | 297 | #define EXT_CSD_ERASED_MEM_CONT 181 /* RO */ |
297 | #define EXT_CSD_BUS_WIDTH 183 /* R/W */ | 298 | #define EXT_CSD_BUS_WIDTH 183 /* R/W */ |
@@ -313,6 +314,7 @@ struct _mmc_csd { | |||
313 | #define EXT_CSD_ERASE_TIMEOUT_MULT 223 /* RO */ | 314 | #define EXT_CSD_ERASE_TIMEOUT_MULT 223 /* RO */ |
314 | #define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */ | 315 | #define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */ |
315 | #define EXT_CSD_BOOT_MULT 226 /* RO */ | 316 | #define EXT_CSD_BOOT_MULT 226 /* RO */ |
317 | #define EXT_CSD_BOOT_INFO 228 /* RO, 1 bytes */ | ||
316 | #define EXT_CSD_SEC_TRIM_MULT 229 /* RO */ | 318 | #define EXT_CSD_SEC_TRIM_MULT 229 /* RO */ |
317 | #define EXT_CSD_SEC_ERASE_MULT 230 /* RO */ | 319 | #define EXT_CSD_SEC_ERASE_MULT 230 /* RO */ |
318 | #define EXT_CSD_SEC_FEATURE_SUPPORT 231 /* RO */ | 320 | #define EXT_CSD_SEC_FEATURE_SUPPORT 231 /* RO */ |
@@ -378,6 +380,29 @@ struct _mmc_csd { | |||
378 | #define EXT_CSD_SEC_GB_CL_EN BIT(4) | 380 | #define EXT_CSD_SEC_GB_CL_EN BIT(4) |
379 | #define EXT_CSD_SEC_SANITIZE BIT(6) /* v4.5 only */ | 381 | #define EXT_CSD_SEC_SANITIZE BIT(6) /* v4.5 only */ |
380 | 382 | ||
383 | #define EXT_CSD_BOOT_BUS_WIDTH_MASK (0x1F) | ||
384 | #define EXT_CSD_BOOT_BUS_WIDTH_MODE_MASK (0x3 << 3) | ||
385 | #define EXT_CSD_BOOT_BUS_WIDTH_MODE_SDR_NORMAL (0x0) | ||
386 | #define EXT_CSD_BOOT_BUS_WIDTH_MODE_SDR_HIGH (0x1) | ||
387 | #define EXT_CSD_BOOT_BUS_WIDTH_MODE_DDR (0x2) | ||
388 | #define EXT_CSD_BOOT_BUS_WIDTH_RST_WIDTH (1 << 2) | ||
389 | #define EXT_CSD_BOOT_BUS_WIDTH_WIDTH_MASK (0x3) | ||
390 | #define EXT_CSD_BOOT_BUS_WIDTH_1_SDR_4_DDR (0x0) | ||
391 | #define EXT_CSD_BOOT_BUS_WIDTH_4_SDR_4_DDR (0x1) | ||
392 | #define EXT_CSD_BOOT_BUS_WIDTH_8_SDR_8_DDR (0x2) | ||
393 | |||
394 | #define EXT_CSD_BOOT_ACK_ENABLE (0x1 << 6) | ||
395 | #define EXT_CSD_BOOT_PARTITION_ENABLE_MASK (0x7 << 3) | ||
396 | #define EXT_CSD_BOOT_PARTITION_DISABLE (0x0) | ||
397 | #define EXT_CSD_BOOT_PARTITION_PART1 (0x1 << 3) | ||
398 | #define EXT_CSD_BOOT_PARTITION_PART2 (0x2 << 3) | ||
399 | #define EXT_CSD_BOOT_PARTITION_USER (0x7 << 3) | ||
400 | |||
401 | #define EXT_CSD_BOOT_PARTITION_ACCESS_MASK (0x7) | ||
402 | #define EXT_CSD_BOOT_PARTITION_ACCESS_DISABLE (0x0) | ||
403 | #define EXT_CSD_BOOT_PARTITION_ACCESS_PART1 (0x1) | ||
404 | #define EXT_CSD_BOOT_PARTITION_ACCESS_PART2 (0x2) | ||
405 | |||
381 | #define EXT_CSD_RST_N_EN_MASK 0x3 | 406 | #define EXT_CSD_RST_N_EN_MASK 0x3 |
382 | #define EXT_CSD_RST_N_ENABLED 1 /* RST_n is enabled on card */ | 407 | #define EXT_CSD_RST_N_ENABLED 1 /* RST_n is enabled on card */ |
383 | 408 | ||