irqchip: Move ARM gic.h to include/linux/irqchip/arm-gic.h

Now that we have GIC moved to drivers/irqchip and all GIC DT init for
platforms using irqchip_init, move gic.h and update the remaining
includes.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Anton Vorontsov <avorontsov@mvista.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: David Brown <davidb@codeaurora.org>
Cc: Daniel Walker <dwalker@fifo99.com>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Viresh Kumar <viresh.linux@gmail.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Samuel Ortiz <sameo@linux.intel.com>

1 files changed, 48 insertions, 0 deletions

diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h
new file mode 100644
index 000000000000..a67ca55e6f4e
--- /dev/null
+++ b/include/linux/irqchip/arm-gic.h
@@ -0,0 +1,48 @@
+/*
+ *  include/linux/irqchip/arm-gic.h
+ *
+ *  Copyright (C) 2002 ARM Limited, All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __LINUX_IRQCHIP_ARM_GIC_H
+#define __LINUX_IRQCHIP_ARM_GIC_H
+
+#define GIC_CPU_CTRL                    0x00
+#define GIC_CPU_PRIMASK                 0x04
+#define GIC_CPU_BINPOINT                0x08
+#define GIC_CPU_INTACK                  0x0c
+#define GIC_CPU_EOI                     0x10
+#define GIC_CPU_RUNNINGPRI              0x14
+#define GIC_CPU_HIGHPRI                 0x18
+
+#define GIC_DIST_CTRL                   0x000
+#define GIC_DIST_CTR                    0x004
+#define GIC_DIST_ENABLE_SET             0x100
+#define GIC_DIST_ENABLE_CLEAR           0x180
+#define GIC_DIST_PENDING_SET            0x200
+#define GIC_DIST_PENDING_CLEAR          0x280
+#define GIC_DIST_ACTIVE_BIT             0x300
+#define GIC_DIST_PRI                    0x400
+#define GIC_DIST_TARGET                 0x800
+#define GIC_DIST_CONFIG                 0xc00
+#define GIC_DIST_SOFTINT                0xf00
+
+struct device_node;
+
+extern struct irq_chip gic_arch_extn;
+
+void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *,
+                    u32 offset, struct device_node *);
+void gic_secondary_init(unsigned int);
+void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
+
+static inline void gic_init(unsigned int nr, int start,
+                            void __iomem *dist , void __iomem *cpu)
+{
+        gic_init_bases(nr, start, dist, cpu, 0, NULL);
+}
+
+#endif