diff options
author | Ingo Molnar <mingo@elte.hu> | 2008-03-05 09:15:42 -0500 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-04-17 11:40:57 -0400 |
commit | ca9cda2f7b53da619fabde4c0c1bd5f61039bd5b (patch) | |
tree | 5ce98d525c27ab2df9e6082358f98a17f969cd78 /include/asm-x86/processor.h | |
parent | e104383fbf26570968cbf060955f67cd5378300a (diff) |
x86: add comments to processor.h
add comments to the FPU structures of processor.h.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/asm-x86/processor.h')
-rw-r--r-- | include/asm-x86/processor.h | 51 |
1 files changed, 28 insertions, 23 deletions
diff --git a/include/asm-x86/processor.h b/include/asm-x86/processor.h index e49e5e69ebb0..1f9501a38493 100644 --- a/include/asm-x86/processor.h +++ b/include/asm-x86/processor.h | |||
@@ -289,42 +289,47 @@ struct orig_ist { | |||
289 | #define MXCSR_DEFAULT 0x1f80 | 289 | #define MXCSR_DEFAULT 0x1f80 |
290 | 290 | ||
291 | struct i387_fsave_struct { | 291 | struct i387_fsave_struct { |
292 | u32 cwd; | 292 | u32 cwd; /* FPU Control Word */ |
293 | u32 swd; | 293 | u32 swd; /* FPU Status Word */ |
294 | u32 twd; | 294 | u32 twd; /* FPU Tag Word */ |
295 | u32 fip; | 295 | u32 fip; /* FPU IP Offset */ |
296 | u32 fcs; | 296 | u32 fcs; /* FPU IP Selector */ |
297 | u32 foo; | 297 | u32 foo; /* FPU Operand Pointer Offset */ |
298 | u32 fos; | 298 | u32 fos; /* FPU Operand Pointer Selector */ |
299 | /* 8*10 bytes for each FP-reg = 80 bytes: */ | 299 | |
300 | /* 8*10 bytes for each FP-reg = 80 bytes: */ | ||
300 | u32 st_space[20]; | 301 | u32 st_space[20]; |
301 | /* Software status information: */ | 302 | |
303 | /* Software status information [not touched by FSAVE ]: */ | ||
302 | u32 status; | 304 | u32 status; |
303 | }; | 305 | }; |
304 | 306 | ||
305 | struct i387_fxsave_struct { | 307 | struct i387_fxsave_struct { |
306 | u16 cwd; | 308 | u16 cwd; /* Control Word */ |
307 | u16 swd; | 309 | u16 swd; /* Status Word */ |
308 | u16 twd; | 310 | u16 twd; /* Tag Word */ |
309 | u16 fop; | 311 | u16 fop; /* Last Instruction Opcode */ |
310 | union { | 312 | union { |
311 | struct { | 313 | struct { |
312 | u64 rip; | 314 | u64 rip; /* Instruction Pointer */ |
313 | u64 rdp; | 315 | u64 rdp; /* Data Pointer */ |
314 | }; | 316 | }; |
315 | struct { | 317 | struct { |
316 | u32 fip; | 318 | u32 fip; /* FPU IP Offset */ |
317 | u32 fcs; | 319 | u32 fcs; /* FPU IP Selector */ |
318 | u32 foo; | 320 | u32 foo; /* FPU Operand Offset */ |
319 | u32 fos; | 321 | u32 fos; /* FPU Operand Selector */ |
320 | }; | 322 | }; |
321 | }; | 323 | }; |
322 | u32 mxcsr; | 324 | u32 mxcsr; /* MXCSR Register State */ |
323 | u32 mxcsr_mask; | 325 | u32 mxcsr_mask; /* MXCSR Mask */ |
324 | /* 8*16 bytes for each FP-reg = 128 bytes: */ | 326 | |
327 | /* 8*16 bytes for each FP-reg = 128 bytes: */ | ||
325 | u32 st_space[32]; | 328 | u32 st_space[32]; |
326 | /* 16*16 bytes for each XMM-reg = 256 bytes: */ | 329 | |
330 | /* 16*16 bytes for each XMM-reg = 256 bytes: */ | ||
327 | u32 xmm_space[64]; | 331 | u32 xmm_space[64]; |
332 | |||
328 | u32 padding[24]; | 333 | u32 padding[24]; |
329 | 334 | ||
330 | } __attribute__((aligned(16))); | 335 | } __attribute__((aligned(16))); |