diff options
author | Jeff Garzik <jgarzik@pobox.com> | 2005-11-04 21:39:31 -0500 |
---|---|---|
committer | Jeff Garzik <jgarzik@pobox.com> | 2005-11-04 21:39:31 -0500 |
commit | c2cc87ca9561ddfe744d446789cc10f507e87db9 (patch) | |
tree | d505fc0110eb1a3d8750ba2f67648c131f0d9aca /include/asm-ppc64 | |
parent | ce1eeb95fc4eb25109c00bea3e83a87eeff6b07d (diff) | |
parent | 7015faa7df829876a0f931cd18aa6d7c24a1b581 (diff) |
Merge branch 'master'
Diffstat (limited to 'include/asm-ppc64')
111 files changed, 123 insertions, 10140 deletions
diff --git a/include/asm-ppc64/a.out.h b/include/asm-ppc64/a.out.h deleted file mode 100644 index 3871e252a6f1..000000000000 --- a/include/asm-ppc64/a.out.h +++ /dev/null | |||
@@ -1,39 +0,0 @@ | |||
1 | #ifndef __PPC64_A_OUT_H__ | ||
2 | #define __PPC64_A_OUT_H__ | ||
3 | |||
4 | /* | ||
5 | * c 2001 PPC 64 Team, IBM Corp | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * as published by the Free Software Foundation; either version | ||
10 | * 2 of the License, or (at your option) any later version. | ||
11 | */ | ||
12 | |||
13 | struct exec | ||
14 | { | ||
15 | unsigned long a_info; /* Use macros N_MAGIC, etc for access */ | ||
16 | unsigned a_text; /* length of text, in bytes */ | ||
17 | unsigned a_data; /* length of data, in bytes */ | ||
18 | unsigned a_bss; /* length of uninitialized data area for file, in bytes */ | ||
19 | unsigned a_syms; /* length of symbol table data in file, in bytes */ | ||
20 | unsigned a_entry; /* start address */ | ||
21 | unsigned a_trsize; /* length of relocation info for text, in bytes */ | ||
22 | unsigned a_drsize; /* length of relocation info for data, in bytes */ | ||
23 | }; | ||
24 | |||
25 | #define N_TRSIZE(a) ((a).a_trsize) | ||
26 | #define N_DRSIZE(a) ((a).a_drsize) | ||
27 | #define N_SYMSIZE(a) ((a).a_syms) | ||
28 | |||
29 | #ifdef __KERNEL__ | ||
30 | |||
31 | #define STACK_TOP_USER64 TASK_SIZE_USER64 | ||
32 | #define STACK_TOP_USER32 TASK_SIZE_USER32 | ||
33 | |||
34 | #define STACK_TOP (test_thread_flag(TIF_32BIT) ? \ | ||
35 | STACK_TOP_USER32 : STACK_TOP_USER64) | ||
36 | |||
37 | #endif /* __KERNEL__ */ | ||
38 | |||
39 | #endif /* __PPC64_A_OUT_H__ */ | ||
diff --git a/include/asm-ppc64/abs_addr.h b/include/asm-ppc64/abs_addr.h index 84c24d4cdb71..dc3fc3fefef2 100644 --- a/include/asm-ppc64/abs_addr.h +++ b/include/asm-ppc64/abs_addr.h | |||
@@ -63,4 +63,11 @@ static inline unsigned long phys_to_abs(unsigned long pa) | |||
63 | #define virt_to_abs(va) phys_to_abs(__pa(va)) | 63 | #define virt_to_abs(va) phys_to_abs(__pa(va)) |
64 | #define abs_to_virt(aa) __va(aa) | 64 | #define abs_to_virt(aa) __va(aa) |
65 | 65 | ||
66 | /* | ||
67 | * Converts Virtual Address to Real Address for | ||
68 | * Legacy iSeries Hypervisor calls | ||
69 | */ | ||
70 | #define iseries_hv_addr(virtaddr) \ | ||
71 | (0x8000000000000000 | virt_to_abs(virtaddr)) | ||
72 | |||
66 | #endif /* _ABS_ADDR_H */ | 73 | #endif /* _ABS_ADDR_H */ |
diff --git a/include/asm-ppc64/atomic.h b/include/asm-ppc64/atomic.h deleted file mode 100644 index 0e5f25e83bc0..000000000000 --- a/include/asm-ppc64/atomic.h +++ /dev/null | |||
@@ -1,197 +0,0 @@ | |||
1 | /* | ||
2 | * PowerPC64 atomic operations | ||
3 | * | ||
4 | * Copyright (C) 2001 Paul Mackerras <paulus@au.ibm.com>, IBM | ||
5 | * Copyright (C) 2001 Anton Blanchard <anton@au.ibm.com>, IBM | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * as published by the Free Software Foundation; either version | ||
10 | * 2 of the License, or (at your option) any later version. | ||
11 | */ | ||
12 | |||
13 | #ifndef _ASM_PPC64_ATOMIC_H_ | ||
14 | #define _ASM_PPC64_ATOMIC_H_ | ||
15 | |||
16 | #include <asm/memory.h> | ||
17 | |||
18 | typedef struct { volatile int counter; } atomic_t; | ||
19 | |||
20 | #define ATOMIC_INIT(i) { (i) } | ||
21 | |||
22 | #define atomic_read(v) ((v)->counter) | ||
23 | #define atomic_set(v,i) (((v)->counter) = (i)) | ||
24 | |||
25 | static __inline__ void atomic_add(int a, atomic_t *v) | ||
26 | { | ||
27 | int t; | ||
28 | |||
29 | __asm__ __volatile__( | ||
30 | "1: lwarx %0,0,%3 # atomic_add\n\ | ||
31 | add %0,%2,%0\n\ | ||
32 | stwcx. %0,0,%3\n\ | ||
33 | bne- 1b" | ||
34 | : "=&r" (t), "=m" (v->counter) | ||
35 | : "r" (a), "r" (&v->counter), "m" (v->counter) | ||
36 | : "cc"); | ||
37 | } | ||
38 | |||
39 | static __inline__ int atomic_add_return(int a, atomic_t *v) | ||
40 | { | ||
41 | int t; | ||
42 | |||
43 | __asm__ __volatile__( | ||
44 | EIEIO_ON_SMP | ||
45 | "1: lwarx %0,0,%2 # atomic_add_return\n\ | ||
46 | add %0,%1,%0\n\ | ||
47 | stwcx. %0,0,%2\n\ | ||
48 | bne- 1b" | ||
49 | ISYNC_ON_SMP | ||
50 | : "=&r" (t) | ||
51 | : "r" (a), "r" (&v->counter) | ||
52 | : "cc", "memory"); | ||
53 | |||
54 | return t; | ||
55 | } | ||
56 | |||
57 | #define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0) | ||
58 | |||
59 | static __inline__ void atomic_sub(int a, atomic_t *v) | ||
60 | { | ||
61 | int t; | ||
62 | |||
63 | __asm__ __volatile__( | ||
64 | "1: lwarx %0,0,%3 # atomic_sub\n\ | ||
65 | subf %0,%2,%0\n\ | ||
66 | stwcx. %0,0,%3\n\ | ||
67 | bne- 1b" | ||
68 | : "=&r" (t), "=m" (v->counter) | ||
69 | : "r" (a), "r" (&v->counter), "m" (v->counter) | ||
70 | : "cc"); | ||
71 | } | ||
72 | |||
73 | static __inline__ int atomic_sub_return(int a, atomic_t *v) | ||
74 | { | ||
75 | int t; | ||
76 | |||
77 | __asm__ __volatile__( | ||
78 | EIEIO_ON_SMP | ||
79 | "1: lwarx %0,0,%2 # atomic_sub_return\n\ | ||
80 | subf %0,%1,%0\n\ | ||
81 | stwcx. %0,0,%2\n\ | ||
82 | bne- 1b" | ||
83 | ISYNC_ON_SMP | ||
84 | : "=&r" (t) | ||
85 | : "r" (a), "r" (&v->counter) | ||
86 | : "cc", "memory"); | ||
87 | |||
88 | return t; | ||
89 | } | ||
90 | |||
91 | static __inline__ void atomic_inc(atomic_t *v) | ||
92 | { | ||
93 | int t; | ||
94 | |||
95 | __asm__ __volatile__( | ||
96 | "1: lwarx %0,0,%2 # atomic_inc\n\ | ||
97 | addic %0,%0,1\n\ | ||
98 | stwcx. %0,0,%2\n\ | ||
99 | bne- 1b" | ||
100 | : "=&r" (t), "=m" (v->counter) | ||
101 | : "r" (&v->counter), "m" (v->counter) | ||
102 | : "cc"); | ||
103 | } | ||
104 | |||
105 | static __inline__ int atomic_inc_return(atomic_t *v) | ||
106 | { | ||
107 | int t; | ||
108 | |||
109 | __asm__ __volatile__( | ||
110 | EIEIO_ON_SMP | ||
111 | "1: lwarx %0,0,%1 # atomic_inc_return\n\ | ||
112 | addic %0,%0,1\n\ | ||
113 | stwcx. %0,0,%1\n\ | ||
114 | bne- 1b" | ||
115 | ISYNC_ON_SMP | ||
116 | : "=&r" (t) | ||
117 | : "r" (&v->counter) | ||
118 | : "cc", "memory"); | ||
119 | |||
120 | return t; | ||
121 | } | ||
122 | |||
123 | /* | ||
124 | * atomic_inc_and_test - increment and test | ||
125 | * @v: pointer of type atomic_t | ||
126 | * | ||
127 | * Atomically increments @v by 1 | ||
128 | * and returns true if the result is zero, or false for all | ||
129 | * other cases. | ||
130 | */ | ||
131 | #define atomic_inc_and_test(v) (atomic_inc_return(v) == 0) | ||
132 | |||
133 | static __inline__ void atomic_dec(atomic_t *v) | ||
134 | { | ||
135 | int t; | ||
136 | |||
137 | __asm__ __volatile__( | ||
138 | "1: lwarx %0,0,%2 # atomic_dec\n\ | ||
139 | addic %0,%0,-1\n\ | ||
140 | stwcx. %0,0,%2\n\ | ||
141 | bne- 1b" | ||
142 | : "=&r" (t), "=m" (v->counter) | ||
143 | : "r" (&v->counter), "m" (v->counter) | ||
144 | : "cc"); | ||
145 | } | ||
146 | |||
147 | static __inline__ int atomic_dec_return(atomic_t *v) | ||
148 | { | ||
149 | int t; | ||
150 | |||
151 | __asm__ __volatile__( | ||
152 | EIEIO_ON_SMP | ||
153 | "1: lwarx %0,0,%1 # atomic_dec_return\n\ | ||
154 | addic %0,%0,-1\n\ | ||
155 | stwcx. %0,0,%1\n\ | ||
156 | bne- 1b" | ||
157 | ISYNC_ON_SMP | ||
158 | : "=&r" (t) | ||
159 | : "r" (&v->counter) | ||
160 | : "cc", "memory"); | ||
161 | |||
162 | return t; | ||
163 | } | ||
164 | |||
165 | #define atomic_sub_and_test(a, v) (atomic_sub_return((a), (v)) == 0) | ||
166 | #define atomic_dec_and_test(v) (atomic_dec_return((v)) == 0) | ||
167 | |||
168 | /* | ||
169 | * Atomically test *v and decrement if it is greater than 0. | ||
170 | * The function returns the old value of *v minus 1. | ||
171 | */ | ||
172 | static __inline__ int atomic_dec_if_positive(atomic_t *v) | ||
173 | { | ||
174 | int t; | ||
175 | |||
176 | __asm__ __volatile__( | ||
177 | EIEIO_ON_SMP | ||
178 | "1: lwarx %0,0,%1 # atomic_dec_if_positive\n\ | ||
179 | addic. %0,%0,-1\n\ | ||
180 | blt- 2f\n\ | ||
181 | stwcx. %0,0,%1\n\ | ||
182 | bne- 1b" | ||
183 | ISYNC_ON_SMP | ||
184 | "\n\ | ||
185 | 2:" : "=&r" (t) | ||
186 | : "r" (&v->counter) | ||
187 | : "cc", "memory"); | ||
188 | |||
189 | return t; | ||
190 | } | ||
191 | |||
192 | #define smp_mb__before_atomic_dec() smp_mb() | ||
193 | #define smp_mb__after_atomic_dec() smp_mb() | ||
194 | #define smp_mb__before_atomic_inc() smp_mb() | ||
195 | #define smp_mb__after_atomic_inc() smp_mb() | ||
196 | |||
197 | #endif /* _ASM_PPC64_ATOMIC_H_ */ | ||
diff --git a/include/asm-ppc64/auxvec.h b/include/asm-ppc64/auxvec.h deleted file mode 100644 index ac6381a106e1..000000000000 --- a/include/asm-ppc64/auxvec.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | #ifndef __PPC64_AUXVEC_H | ||
2 | #define __PPC64_AUXVEC_H | ||
3 | |||
4 | /* | ||
5 | * We need to put in some extra aux table entries to tell glibc what | ||
6 | * the cache block size is, so it can use the dcbz instruction safely. | ||
7 | */ | ||
8 | #define AT_DCACHEBSIZE 19 | ||
9 | #define AT_ICACHEBSIZE 20 | ||
10 | #define AT_UCACHEBSIZE 21 | ||
11 | /* A special ignored type value for PPC, for glibc compatibility. */ | ||
12 | #define AT_IGNOREPPC 22 | ||
13 | |||
14 | /* The vDSO location. We have to use the same value as x86 for glibc's | ||
15 | * sake :-) | ||
16 | */ | ||
17 | #define AT_SYSINFO_EHDR 33 | ||
18 | |||
19 | #endif /* __PPC64_AUXVEC_H */ | ||
diff --git a/include/asm-ppc64/bitops.h b/include/asm-ppc64/bitops.h deleted file mode 100644 index a0f831224f96..000000000000 --- a/include/asm-ppc64/bitops.h +++ /dev/null | |||
@@ -1,360 +0,0 @@ | |||
1 | /* | ||
2 | * PowerPC64 atomic bit operations. | ||
3 | * Dave Engebretsen, Todd Inglett, Don Reed, Pat McCarthy, Peter Bergner, | ||
4 | * Anton Blanchard | ||
5 | * | ||
6 | * Originally taken from the 32b PPC code. Modified to use 64b values for | ||
7 | * the various counters & memory references. | ||
8 | * | ||
9 | * Bitops are odd when viewed on big-endian systems. They were designed | ||
10 | * on little endian so the size of the bitset doesn't matter (low order bytes | ||
11 | * come first) as long as the bit in question is valid. | ||
12 | * | ||
13 | * Bits are "tested" often using the C expression (val & (1<<nr)) so we do | ||
14 | * our best to stay compatible with that. The assumption is that val will | ||
15 | * be unsigned long for such tests. As such, we assume the bits are stored | ||
16 | * as an array of unsigned long (the usual case is a single unsigned long, | ||
17 | * of course). Here's an example bitset with bit numbering: | ||
18 | * | ||
19 | * |63..........0|127........64|195.......128|255.......196| | ||
20 | * | ||
21 | * This leads to a problem. If an int, short or char is passed as a bitset | ||
22 | * it will be a bad memory reference since we want to store in chunks | ||
23 | * of unsigned long (64 bits here) size. | ||
24 | * | ||
25 | * There are a few little-endian macros used mostly for filesystem bitmaps, | ||
26 | * these work on similar bit arrays layouts, but byte-oriented: | ||
27 | * | ||
28 | * |7...0|15...8|23...16|31...24|39...32|47...40|55...48|63...56| | ||
29 | * | ||
30 | * The main difference is that bit 3-5 in the bit number field needs to be | ||
31 | * reversed compared to the big-endian bit fields. This can be achieved | ||
32 | * by XOR with 0b111000 (0x38). | ||
33 | * | ||
34 | * This program is free software; you can redistribute it and/or | ||
35 | * modify it under the terms of the GNU General Public License | ||
36 | * as published by the Free Software Foundation; either version | ||
37 | * 2 of the License, or (at your option) any later version. | ||
38 | */ | ||
39 | |||
40 | #ifndef _PPC64_BITOPS_H | ||
41 | #define _PPC64_BITOPS_H | ||
42 | |||
43 | #ifdef __KERNEL__ | ||
44 | |||
45 | #include <asm/memory.h> | ||
46 | |||
47 | /* | ||
48 | * clear_bit doesn't imply a memory barrier | ||
49 | */ | ||
50 | #define smp_mb__before_clear_bit() smp_mb() | ||
51 | #define smp_mb__after_clear_bit() smp_mb() | ||
52 | |||
53 | static __inline__ int test_bit(unsigned long nr, __const__ volatile unsigned long *addr) | ||
54 | { | ||
55 | return (1UL & (addr[nr >> 6] >> (nr & 63))); | ||
56 | } | ||
57 | |||
58 | static __inline__ void set_bit(unsigned long nr, volatile unsigned long *addr) | ||
59 | { | ||
60 | unsigned long old; | ||
61 | unsigned long mask = 1UL << (nr & 0x3f); | ||
62 | unsigned long *p = ((unsigned long *)addr) + (nr >> 6); | ||
63 | |||
64 | __asm__ __volatile__( | ||
65 | "1: ldarx %0,0,%3 # set_bit\n\ | ||
66 | or %0,%0,%2\n\ | ||
67 | stdcx. %0,0,%3\n\ | ||
68 | bne- 1b" | ||
69 | : "=&r" (old), "=m" (*p) | ||
70 | : "r" (mask), "r" (p), "m" (*p) | ||
71 | : "cc"); | ||
72 | } | ||
73 | |||
74 | static __inline__ void clear_bit(unsigned long nr, volatile unsigned long *addr) | ||
75 | { | ||
76 | unsigned long old; | ||
77 | unsigned long mask = 1UL << (nr & 0x3f); | ||
78 | unsigned long *p = ((unsigned long *)addr) + (nr >> 6); | ||
79 | |||
80 | __asm__ __volatile__( | ||
81 | "1: ldarx %0,0,%3 # clear_bit\n\ | ||
82 | andc %0,%0,%2\n\ | ||
83 | stdcx. %0,0,%3\n\ | ||
84 | bne- 1b" | ||
85 | : "=&r" (old), "=m" (*p) | ||
86 | : "r" (mask), "r" (p), "m" (*p) | ||
87 | : "cc"); | ||
88 | } | ||
89 | |||
90 | static __inline__ void change_bit(unsigned long nr, volatile unsigned long *addr) | ||
91 | { | ||
92 | unsigned long old; | ||
93 | unsigned long mask = 1UL << (nr & 0x3f); | ||
94 | unsigned long *p = ((unsigned long *)addr) + (nr >> 6); | ||
95 | |||
96 | __asm__ __volatile__( | ||
97 | "1: ldarx %0,0,%3 # change_bit\n\ | ||
98 | xor %0,%0,%2\n\ | ||
99 | stdcx. %0,0,%3\n\ | ||
100 | bne- 1b" | ||
101 | : "=&r" (old), "=m" (*p) | ||
102 | : "r" (mask), "r" (p), "m" (*p) | ||
103 | : "cc"); | ||
104 | } | ||
105 | |||
106 | static __inline__ int test_and_set_bit(unsigned long nr, volatile unsigned long *addr) | ||
107 | { | ||
108 | unsigned long old, t; | ||
109 | unsigned long mask = 1UL << (nr & 0x3f); | ||
110 | unsigned long *p = ((unsigned long *)addr) + (nr >> 6); | ||
111 | |||
112 | __asm__ __volatile__( | ||
113 | EIEIO_ON_SMP | ||
114 | "1: ldarx %0,0,%3 # test_and_set_bit\n\ | ||
115 | or %1,%0,%2 \n\ | ||
116 | stdcx. %1,0,%3 \n\ | ||
117 | bne- 1b" | ||
118 | ISYNC_ON_SMP | ||
119 | : "=&r" (old), "=&r" (t) | ||
120 | : "r" (mask), "r" (p) | ||
121 | : "cc", "memory"); | ||
122 | |||
123 | return (old & mask) != 0; | ||
124 | } | ||
125 | |||
126 | static __inline__ int test_and_clear_bit(unsigned long nr, volatile unsigned long *addr) | ||
127 | { | ||
128 | unsigned long old, t; | ||
129 | unsigned long mask = 1UL << (nr & 0x3f); | ||
130 | unsigned long *p = ((unsigned long *)addr) + (nr >> 6); | ||
131 | |||
132 | __asm__ __volatile__( | ||
133 | EIEIO_ON_SMP | ||
134 | "1: ldarx %0,0,%3 # test_and_clear_bit\n\ | ||
135 | andc %1,%0,%2\n\ | ||
136 | stdcx. %1,0,%3\n\ | ||
137 | bne- 1b" | ||
138 | ISYNC_ON_SMP | ||
139 | : "=&r" (old), "=&r" (t) | ||
140 | : "r" (mask), "r" (p) | ||
141 | : "cc", "memory"); | ||
142 | |||
143 | return (old & mask) != 0; | ||
144 | } | ||
145 | |||
146 | static __inline__ int test_and_change_bit(unsigned long nr, volatile unsigned long *addr) | ||
147 | { | ||
148 | unsigned long old, t; | ||
149 | unsigned long mask = 1UL << (nr & 0x3f); | ||
150 | unsigned long *p = ((unsigned long *)addr) + (nr >> 6); | ||
151 | |||
152 | __asm__ __volatile__( | ||
153 | EIEIO_ON_SMP | ||
154 | "1: ldarx %0,0,%3 # test_and_change_bit\n\ | ||
155 | xor %1,%0,%2\n\ | ||
156 | stdcx. %1,0,%3\n\ | ||
157 | bne- 1b" | ||
158 | ISYNC_ON_SMP | ||
159 | : "=&r" (old), "=&r" (t) | ||
160 | : "r" (mask), "r" (p) | ||
161 | : "cc", "memory"); | ||
162 | |||
163 | return (old & mask) != 0; | ||
164 | } | ||
165 | |||
166 | static __inline__ void set_bits(unsigned long mask, unsigned long *addr) | ||
167 | { | ||
168 | unsigned long old; | ||
169 | |||
170 | __asm__ __volatile__( | ||
171 | "1: ldarx %0,0,%3 # set_bit\n\ | ||
172 | or %0,%0,%2\n\ | ||
173 | stdcx. %0,0,%3\n\ | ||
174 | bne- 1b" | ||
175 | : "=&r" (old), "=m" (*addr) | ||
176 | : "r" (mask), "r" (addr), "m" (*addr) | ||
177 | : "cc"); | ||
178 | } | ||
179 | |||
180 | /* | ||
181 | * non-atomic versions | ||
182 | */ | ||
183 | static __inline__ void __set_bit(unsigned long nr, volatile unsigned long *addr) | ||
184 | { | ||
185 | unsigned long mask = 1UL << (nr & 0x3f); | ||
186 | unsigned long *p = ((unsigned long *)addr) + (nr >> 6); | ||
187 | |||
188 | *p |= mask; | ||
189 | } | ||
190 | |||
191 | static __inline__ void __clear_bit(unsigned long nr, volatile unsigned long *addr) | ||
192 | { | ||
193 | unsigned long mask = 1UL << (nr & 0x3f); | ||
194 | unsigned long *p = ((unsigned long *)addr) + (nr >> 6); | ||
195 | |||
196 | *p &= ~mask; | ||
197 | } | ||
198 | |||
199 | static __inline__ void __change_bit(unsigned long nr, volatile unsigned long *addr) | ||
200 | { | ||
201 | unsigned long mask = 1UL << (nr & 0x3f); | ||
202 | unsigned long *p = ((unsigned long *)addr) + (nr >> 6); | ||
203 | |||
204 | *p ^= mask; | ||
205 | } | ||
206 | |||
207 | static __inline__ int __test_and_set_bit(unsigned long nr, volatile unsigned long *addr) | ||
208 | { | ||
209 | unsigned long mask = 1UL << (nr & 0x3f); | ||
210 | unsigned long *p = ((unsigned long *)addr) + (nr >> 6); | ||
211 | unsigned long old = *p; | ||
212 | |||
213 | *p = old | mask; | ||
214 | return (old & mask) != 0; | ||
215 | } | ||
216 | |||
217 | static __inline__ int __test_and_clear_bit(unsigned long nr, volatile unsigned long *addr) | ||
218 | { | ||
219 | unsigned long mask = 1UL << (nr & 0x3f); | ||
220 | unsigned long *p = ((unsigned long *)addr) + (nr >> 6); | ||
221 | unsigned long old = *p; | ||
222 | |||
223 | *p = old & ~mask; | ||
224 | return (old & mask) != 0; | ||
225 | } | ||
226 | |||
227 | static __inline__ int __test_and_change_bit(unsigned long nr, volatile unsigned long *addr) | ||
228 | { | ||
229 | unsigned long mask = 1UL << (nr & 0x3f); | ||
230 | unsigned long *p = ((unsigned long *)addr) + (nr >> 6); | ||
231 | unsigned long old = *p; | ||
232 | |||
233 | *p = old ^ mask; | ||
234 | return (old & mask) != 0; | ||
235 | } | ||
236 | |||
237 | /* | ||
238 | * Return the zero-based bit position (from RIGHT TO LEFT, 63 -> 0) of the | ||
239 | * most significant (left-most) 1-bit in a double word. | ||
240 | */ | ||
241 | static __inline__ int __ilog2(unsigned long x) | ||
242 | { | ||
243 | int lz; | ||
244 | |||
245 | asm ("cntlzd %0,%1" : "=r" (lz) : "r" (x)); | ||
246 | return 63 - lz; | ||
247 | } | ||
248 | |||
249 | /* | ||
250 | * Determines the bit position of the least significant (rightmost) 0 bit | ||
251 | * in the specified double word. The returned bit position will be zero-based, | ||
252 | * starting from the right side (63 - 0). | ||
253 | */ | ||
254 | static __inline__ unsigned long ffz(unsigned long x) | ||
255 | { | ||
256 | /* no zero exists anywhere in the 8 byte area. */ | ||
257 | if ((x = ~x) == 0) | ||
258 | return 64; | ||
259 | |||
260 | /* | ||
261 | * Calculate the bit position of the least signficant '1' bit in x | ||
262 | * (since x has been changed this will actually be the least signficant | ||
263 | * '0' bit in * the original x). Note: (x & -x) gives us a mask that | ||
264 | * is the least significant * (RIGHT-most) 1-bit of the value in x. | ||
265 | */ | ||
266 | return __ilog2(x & -x); | ||
267 | } | ||
268 | |||
269 | static __inline__ int __ffs(unsigned long x) | ||
270 | { | ||
271 | return __ilog2(x & -x); | ||
272 | } | ||
273 | |||
274 | /* | ||
275 | * ffs: find first bit set. This is defined the same way as | ||
276 | * the libc and compiler builtin ffs routines, therefore | ||
277 | * differs in spirit from the above ffz (man ffs). | ||
278 | */ | ||
279 | static __inline__ int ffs(int x) | ||
280 | { | ||
281 | unsigned long i = (unsigned long)x; | ||
282 | return __ilog2(i & -i) + 1; | ||
283 | } | ||
284 | |||
285 | /* | ||
286 | * fls: find last (most-significant) bit set. | ||
287 | * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32. | ||
288 | */ | ||
289 | #define fls(x) generic_fls(x) | ||
290 | |||
291 | /* | ||
292 | * hweightN: returns the hamming weight (i.e. the number | ||
293 | * of bits set) of a N-bit word | ||
294 | */ | ||
295 | #define hweight64(x) generic_hweight64(x) | ||
296 | #define hweight32(x) generic_hweight32(x) | ||
297 | #define hweight16(x) generic_hweight16(x) | ||
298 | #define hweight8(x) generic_hweight8(x) | ||
299 | |||
300 | extern unsigned long find_next_zero_bit(const unsigned long *addr, unsigned long size, unsigned long offset); | ||
301 | #define find_first_zero_bit(addr, size) \ | ||
302 | find_next_zero_bit((addr), (size), 0) | ||
303 | |||
304 | extern unsigned long find_next_bit(const unsigned long *addr, unsigned long size, unsigned long offset); | ||
305 | #define find_first_bit(addr, size) \ | ||
306 | find_next_bit((addr), (size), 0) | ||
307 | |||
308 | extern unsigned long find_next_zero_le_bit(const unsigned long *addr, unsigned long size, unsigned long offset); | ||
309 | #define find_first_zero_le_bit(addr, size) \ | ||
310 | find_next_zero_le_bit((addr), (size), 0) | ||
311 | |||
312 | static __inline__ int test_le_bit(unsigned long nr, __const__ unsigned long * addr) | ||
313 | { | ||
314 | __const__ unsigned char *ADDR = (__const__ unsigned char *) addr; | ||
315 | return (ADDR[nr >> 3] >> (nr & 7)) & 1; | ||
316 | } | ||
317 | |||
318 | #define test_and_clear_le_bit(nr, addr) \ | ||
319 | test_and_clear_bit((nr) ^ 0x38, (addr)) | ||
320 | #define test_and_set_le_bit(nr, addr) \ | ||
321 | test_and_set_bit((nr) ^ 0x38, (addr)) | ||
322 | |||
323 | /* | ||
324 | * non-atomic versions | ||
325 | */ | ||
326 | |||
327 | #define __set_le_bit(nr, addr) \ | ||
328 | __set_bit((nr) ^ 0x38, (addr)) | ||
329 | #define __clear_le_bit(nr, addr) \ | ||
330 | __clear_bit((nr) ^ 0x38, (addr)) | ||
331 | #define __test_and_clear_le_bit(nr, addr) \ | ||
332 | __test_and_clear_bit((nr) ^ 0x38, (addr)) | ||
333 | #define __test_and_set_le_bit(nr, addr) \ | ||
334 | __test_and_set_bit((nr) ^ 0x38, (addr)) | ||
335 | |||
336 | #define ext2_set_bit(nr,addr) \ | ||
337 | __test_and_set_le_bit((nr), (unsigned long*)addr) | ||
338 | #define ext2_clear_bit(nr, addr) \ | ||
339 | __test_and_clear_le_bit((nr), (unsigned long*)addr) | ||
340 | |||
341 | #define ext2_set_bit_atomic(lock, nr, addr) \ | ||
342 | test_and_set_le_bit((nr), (unsigned long*)addr) | ||
343 | #define ext2_clear_bit_atomic(lock, nr, addr) \ | ||
344 | test_and_clear_le_bit((nr), (unsigned long*)addr) | ||
345 | |||
346 | |||
347 | #define ext2_test_bit(nr, addr) test_le_bit((nr),(unsigned long*)addr) | ||
348 | #define ext2_find_first_zero_bit(addr, size) \ | ||
349 | find_first_zero_le_bit((unsigned long*)addr, size) | ||
350 | #define ext2_find_next_zero_bit(addr, size, off) \ | ||
351 | find_next_zero_le_bit((unsigned long*)addr, size, off) | ||
352 | |||
353 | #define minix_test_and_set_bit(nr,addr) test_and_set_bit(nr,addr) | ||
354 | #define minix_set_bit(nr,addr) set_bit(nr,addr) | ||
355 | #define minix_test_and_clear_bit(nr,addr) test_and_clear_bit(nr,addr) | ||
356 | #define minix_test_bit(nr,addr) test_bit(nr,addr) | ||
357 | #define minix_find_first_zero_bit(addr,size) find_first_zero_bit(addr,size) | ||
358 | |||
359 | #endif /* __KERNEL__ */ | ||
360 | #endif /* _PPC64_BITOPS_H */ | ||
diff --git a/include/asm-ppc64/bootinfo.h b/include/asm-ppc64/bootinfo.h deleted file mode 100644 index f55e7cb48f46..000000000000 --- a/include/asm-ppc64/bootinfo.h +++ /dev/null | |||
@@ -1,70 +0,0 @@ | |||
1 | /* | ||
2 | * Non-machine dependent bootinfo structure. Basic idea | ||
3 | * borrowed from the m68k. | ||
4 | * | ||
5 | * Copyright (C) 1999 Cort Dougan <cort@ppc.kernel.org> | ||
6 | * Copyright (c) 2001 PPC64 Team, IBM Corp | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License | ||
10 | * as published by the Free Software Foundation; either version | ||
11 | * 2 of the License, or (at your option) any later version. | ||
12 | */ | ||
13 | |||
14 | |||
15 | #ifndef _PPC64_BOOTINFO_H | ||
16 | #define _PPC64_BOOTINFO_H | ||
17 | |||
18 | #include <asm/types.h> | ||
19 | |||
20 | /* We use a u32 for the type of the fields since they're written by | ||
21 | * the bootloader which is a 32-bit process and read by the kernel | ||
22 | * which is a 64-bit process. This way they can both agree on the | ||
23 | * size of the type. | ||
24 | */ | ||
25 | typedef u32 bi_rec_field; | ||
26 | |||
27 | struct bi_record { | ||
28 | bi_rec_field tag; /* tag ID */ | ||
29 | bi_rec_field size; /* size of record (in bytes) */ | ||
30 | bi_rec_field data[0]; /* data */ | ||
31 | }; | ||
32 | |||
33 | #define BI_FIRST 0x1010 /* first record - marker */ | ||
34 | #define BI_LAST 0x1011 /* last record - marker */ | ||
35 | #define BI_CMD_LINE 0x1012 | ||
36 | #define BI_BOOTLOADER_ID 0x1013 | ||
37 | #define BI_INITRD 0x1014 | ||
38 | #define BI_SYSMAP 0x1015 | ||
39 | #define BI_MACHTYPE 0x1016 | ||
40 | |||
41 | static __inline__ struct bi_record * bi_rec_init(unsigned long addr) | ||
42 | { | ||
43 | struct bi_record *bi_recs; | ||
44 | bi_recs = (struct bi_record *)_ALIGN(addr, PAGE_SIZE); | ||
45 | bi_recs->size = 0; | ||
46 | return bi_recs; | ||
47 | } | ||
48 | |||
49 | static __inline__ struct bi_record * bi_rec_alloc(struct bi_record *rec, | ||
50 | unsigned long args) | ||
51 | { | ||
52 | rec = (struct bi_record *)((unsigned long)rec + rec->size); | ||
53 | rec->size = sizeof(struct bi_record) + args*sizeof(bi_rec_field); | ||
54 | return rec; | ||
55 | } | ||
56 | |||
57 | static __inline__ struct bi_record * bi_rec_alloc_bytes(struct bi_record *rec, | ||
58 | unsigned long bytes) | ||
59 | { | ||
60 | rec = (struct bi_record *)((unsigned long)rec + rec->size); | ||
61 | rec->size = sizeof(struct bi_record) + bytes; | ||
62 | return rec; | ||
63 | } | ||
64 | |||
65 | static __inline__ struct bi_record * bi_rec_next(struct bi_record *rec) | ||
66 | { | ||
67 | return (struct bi_record *)((unsigned long)rec + rec->size); | ||
68 | } | ||
69 | |||
70 | #endif /* _PPC64_BOOTINFO_H */ | ||
diff --git a/include/asm-ppc64/btext.h b/include/asm-ppc64/btext.h index 67aef0cc72c0..71cce36bc630 100644 --- a/include/asm-ppc64/btext.h +++ b/include/asm-ppc64/btext.h | |||
@@ -15,6 +15,7 @@ extern int boot_text_mapped; | |||
15 | extern int btext_initialize(struct device_node *np); | 15 | extern int btext_initialize(struct device_node *np); |
16 | 16 | ||
17 | extern void map_boot_text(void); | 17 | extern void map_boot_text(void); |
18 | extern void init_boot_display(void); | ||
18 | extern void btext_update_display(unsigned long phys, int width, int height, | 19 | extern void btext_update_display(unsigned long phys, int width, int height, |
19 | int depth, int pitch); | 20 | int depth, int pitch); |
20 | 21 | ||
diff --git a/include/asm-ppc64/bug.h b/include/asm-ppc64/bug.h deleted file mode 100644 index 160178278861..000000000000 --- a/include/asm-ppc64/bug.h +++ /dev/null | |||
@@ -1,69 +0,0 @@ | |||
1 | #ifndef _PPC64_BUG_H | ||
2 | #define _PPC64_BUG_H | ||
3 | |||
4 | /* | ||
5 | * Define an illegal instr to trap on the bug. | ||
6 | * We don't use 0 because that marks the end of a function | ||
7 | * in the ELF ABI. That's "Boo Boo" in case you wonder... | ||
8 | */ | ||
9 | #define BUG_OPCODE .long 0x00b00b00 /* For asm */ | ||
10 | #define BUG_ILLEGAL_INSTR "0x00b00b00" /* For BUG macro */ | ||
11 | |||
12 | #ifndef __ASSEMBLY__ | ||
13 | |||
14 | struct bug_entry { | ||
15 | unsigned long bug_addr; | ||
16 | long line; | ||
17 | const char *file; | ||
18 | const char *function; | ||
19 | }; | ||
20 | |||
21 | struct bug_entry *find_bug(unsigned long bugaddr); | ||
22 | |||
23 | /* | ||
24 | * If this bit is set in the line number it means that the trap | ||
25 | * is for WARN_ON rather than BUG or BUG_ON. | ||
26 | */ | ||
27 | #define BUG_WARNING_TRAP 0x1000000 | ||
28 | |||
29 | #ifdef CONFIG_BUG | ||
30 | |||
31 | #define BUG() do { \ | ||
32 | __asm__ __volatile__( \ | ||
33 | "1: twi 31,0,0\n" \ | ||
34 | ".section __bug_table,\"a\"\n\t" \ | ||
35 | " .llong 1b,%0,%1,%2\n" \ | ||
36 | ".previous" \ | ||
37 | : : "i" (__LINE__), "i" (__FILE__), "i" (__FUNCTION__)); \ | ||
38 | } while (0) | ||
39 | |||
40 | #define BUG_ON(x) do { \ | ||
41 | __asm__ __volatile__( \ | ||
42 | "1: tdnei %0,0\n" \ | ||
43 | ".section __bug_table,\"a\"\n\t" \ | ||
44 | " .llong 1b,%1,%2,%3\n" \ | ||
45 | ".previous" \ | ||
46 | : : "r" ((long long)(x)), "i" (__LINE__), \ | ||
47 | "i" (__FILE__), "i" (__FUNCTION__)); \ | ||
48 | } while (0) | ||
49 | |||
50 | #define WARN_ON(x) do { \ | ||
51 | __asm__ __volatile__( \ | ||
52 | "1: tdnei %0,0\n" \ | ||
53 | ".section __bug_table,\"a\"\n\t" \ | ||
54 | " .llong 1b,%1,%2,%3\n" \ | ||
55 | ".previous" \ | ||
56 | : : "r" ((long long)(x)), \ | ||
57 | "i" (__LINE__ + BUG_WARNING_TRAP), \ | ||
58 | "i" (__FILE__), "i" (__FUNCTION__)); \ | ||
59 | } while (0) | ||
60 | |||
61 | #define HAVE_ARCH_BUG | ||
62 | #define HAVE_ARCH_BUG_ON | ||
63 | #define HAVE_ARCH_WARN_ON | ||
64 | #endif | ||
65 | #endif | ||
66 | |||
67 | #include <asm-generic/bug.h> | ||
68 | |||
69 | #endif | ||
diff --git a/include/asm-ppc64/byteorder.h b/include/asm-ppc64/byteorder.h deleted file mode 100644 index 8b57da62b674..000000000000 --- a/include/asm-ppc64/byteorder.h +++ /dev/null | |||
@@ -1,86 +0,0 @@ | |||
1 | #ifndef _PPC64_BYTEORDER_H | ||
2 | #define _PPC64_BYTEORDER_H | ||
3 | |||
4 | /* | ||
5 | * This program is free software; you can redistribute it and/or | ||
6 | * modify it under the terms of the GNU General Public License | ||
7 | * as published by the Free Software Foundation; either version | ||
8 | * 2 of the License, or (at your option) any later version. | ||
9 | */ | ||
10 | |||
11 | #include <asm/types.h> | ||
12 | #include <linux/compiler.h> | ||
13 | |||
14 | #ifdef __GNUC__ | ||
15 | #ifdef __KERNEL__ | ||
16 | |||
17 | static __inline__ __u16 ld_le16(const volatile __u16 *addr) | ||
18 | { | ||
19 | __u16 val; | ||
20 | |||
21 | __asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (addr), "m" (*addr)); | ||
22 | return val; | ||
23 | } | ||
24 | |||
25 | static __inline__ void st_le16(volatile __u16 *addr, const __u16 val) | ||
26 | { | ||
27 | __asm__ __volatile__ ("sthbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr)); | ||
28 | } | ||
29 | |||
30 | static __inline__ __u32 ld_le32(const volatile __u32 *addr) | ||
31 | { | ||
32 | __u32 val; | ||
33 | |||
34 | __asm__ __volatile__ ("lwbrx %0,0,%1" : "=r" (val) : "r" (addr), "m" (*addr)); | ||
35 | return val; | ||
36 | } | ||
37 | |||
38 | static __inline__ void st_le32(volatile __u32 *addr, const __u32 val) | ||
39 | { | ||
40 | __asm__ __volatile__ ("stwbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr)); | ||
41 | } | ||
42 | |||
43 | static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 value) | ||
44 | { | ||
45 | __u16 result; | ||
46 | |||
47 | __asm__("rlwimi %0,%1,8,16,23" | ||
48 | : "=r" (result) | ||
49 | : "r" (value), "0" (value >> 8)); | ||
50 | return result; | ||
51 | } | ||
52 | |||
53 | static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 value) | ||
54 | { | ||
55 | __u32 result; | ||
56 | |||
57 | __asm__("rlwimi %0,%1,24,16,23\n\t" | ||
58 | "rlwimi %0,%1,8,8,15\n\t" | ||
59 | "rlwimi %0,%1,24,0,7" | ||
60 | : "=r" (result) | ||
61 | : "r" (value), "0" (value >> 24)); | ||
62 | return result; | ||
63 | } | ||
64 | |||
65 | #define __arch__swab16(x) ___arch__swab16(x) | ||
66 | #define __arch__swab32(x) ___arch__swab32(x) | ||
67 | |||
68 | /* The same, but returns converted value from the location pointer by addr. */ | ||
69 | #define __arch__swab16p(addr) ld_le16(addr) | ||
70 | #define __arch__swab32p(addr) ld_le32(addr) | ||
71 | |||
72 | /* The same, but do the conversion in situ, ie. put the value back to addr. */ | ||
73 | #define __arch__swab16s(addr) st_le16(addr,*addr) | ||
74 | #define __arch__swab32s(addr) st_le32(addr,*addr) | ||
75 | |||
76 | #endif /* __KERNEL__ */ | ||
77 | |||
78 | #ifndef __STRICT_ANSI__ | ||
79 | #define __BYTEORDER_HAS_U64__ | ||
80 | #endif | ||
81 | |||
82 | #endif /* __GNUC__ */ | ||
83 | |||
84 | #include <linux/byteorder/big_endian.h> | ||
85 | |||
86 | #endif /* _PPC64_BYTEORDER_H */ | ||
diff --git a/include/asm-ppc64/checksum.h b/include/asm-ppc64/checksum.h deleted file mode 100644 index d22d4469de43..000000000000 --- a/include/asm-ppc64/checksum.h +++ /dev/null | |||
@@ -1,107 +0,0 @@ | |||
1 | #ifndef _PPC64_CHECKSUM_H | ||
2 | #define _PPC64_CHECKSUM_H | ||
3 | |||
4 | /* | ||
5 | * This program is free software; you can redistribute it and/or | ||
6 | * modify it under the terms of the GNU General Public License | ||
7 | * as published by the Free Software Foundation; either version | ||
8 | * 2 of the License, or (at your option) any later version. | ||
9 | */ | ||
10 | |||
11 | /* | ||
12 | * This is a version of ip_compute_csum() optimized for IP headers, | ||
13 | * which always checksum on 4 octet boundaries. ihl is the number | ||
14 | * of 32-bit words and is always >= 5. | ||
15 | */ | ||
16 | extern unsigned short ip_fast_csum(unsigned char * iph, unsigned int ihl); | ||
17 | |||
18 | /* | ||
19 | * computes the checksum of the TCP/UDP pseudo-header | ||
20 | * returns a 16-bit checksum, already complemented | ||
21 | */ | ||
22 | extern unsigned short csum_tcpudp_magic(unsigned long saddr, | ||
23 | unsigned long daddr, | ||
24 | unsigned short len, | ||
25 | unsigned short proto, | ||
26 | unsigned int sum); | ||
27 | |||
28 | /* | ||
29 | * computes the checksum of a memory block at buff, length len, | ||
30 | * and adds in "sum" (32-bit) | ||
31 | * | ||
32 | * returns a 32-bit number suitable for feeding into itself | ||
33 | * or csum_tcpudp_magic | ||
34 | * | ||
35 | * this function must be called with even lengths, except | ||
36 | * for the last fragment, which may be odd | ||
37 | * | ||
38 | * it's best to have buff aligned on a 32-bit boundary | ||
39 | */ | ||
40 | extern unsigned int csum_partial(const unsigned char * buff, int len, | ||
41 | unsigned int sum); | ||
42 | |||
43 | /* | ||
44 | * the same as csum_partial, but copies from src to dst while it | ||
45 | * checksums | ||
46 | */ | ||
47 | extern unsigned int csum_partial_copy_generic(const char *src, char *dst, | ||
48 | int len, unsigned int sum, | ||
49 | int *src_err, int *dst_err); | ||
50 | /* | ||
51 | * the same as csum_partial, but copies from src to dst while it | ||
52 | * checksums. | ||
53 | */ | ||
54 | |||
55 | unsigned int csum_partial_copy_nocheck(const char *src, | ||
56 | char *dst, | ||
57 | int len, | ||
58 | unsigned int sum); | ||
59 | |||
60 | /* | ||
61 | * turns a 32-bit partial checksum (e.g. from csum_partial) into a | ||
62 | * 1's complement 16-bit checksum. | ||
63 | */ | ||
64 | static inline unsigned int csum_fold(unsigned int sum) | ||
65 | { | ||
66 | unsigned int tmp; | ||
67 | |||
68 | /* swap the two 16-bit halves of sum */ | ||
69 | __asm__("rlwinm %0,%1,16,0,31" : "=r" (tmp) : "r" (sum)); | ||
70 | /* if there is a carry from adding the two 16-bit halves, | ||
71 | it will carry from the lower half into the upper half, | ||
72 | giving us the correct sum in the upper half. */ | ||
73 | sum = ~(sum + tmp) >> 16; | ||
74 | return sum; | ||
75 | } | ||
76 | |||
77 | /* | ||
78 | * this routine is used for miscellaneous IP-like checksums, mainly | ||
79 | * in icmp.c | ||
80 | */ | ||
81 | static inline unsigned short ip_compute_csum(unsigned char * buff, int len) | ||
82 | { | ||
83 | return csum_fold(csum_partial(buff, len, 0)); | ||
84 | } | ||
85 | |||
86 | #define csum_partial_copy_from_user(src, dst, len, sum, errp) \ | ||
87 | csum_partial_copy_generic((src), (dst), (len), (sum), (errp), NULL) | ||
88 | |||
89 | #define csum_partial_copy_nocheck(src, dst, len, sum) \ | ||
90 | csum_partial_copy_generic((src), (dst), (len), (sum), NULL, NULL) | ||
91 | |||
92 | static inline u32 csum_tcpudp_nofold(u32 saddr, | ||
93 | u32 daddr, | ||
94 | unsigned short len, | ||
95 | unsigned short proto, | ||
96 | unsigned int sum) | ||
97 | { | ||
98 | unsigned long s = sum; | ||
99 | |||
100 | s += saddr; | ||
101 | s += daddr; | ||
102 | s += (proto << 16) + len; | ||
103 | s += (s >> 32); | ||
104 | return (u32) s; | ||
105 | } | ||
106 | |||
107 | #endif | ||
diff --git a/include/asm-ppc64/cputable.h b/include/asm-ppc64/cputable.h deleted file mode 100644 index acc9b4d6c168..000000000000 --- a/include/asm-ppc64/cputable.h +++ /dev/null | |||
@@ -1,167 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-ppc64/cputable.h | ||
3 | * | ||
4 | * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) | ||
5 | * | ||
6 | * Modifications for ppc64: | ||
7 | * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or | ||
10 | * modify it under the terms of the GNU General Public License | ||
11 | * as published by the Free Software Foundation; either version | ||
12 | * 2 of the License, or (at your option) any later version. | ||
13 | */ | ||
14 | |||
15 | #ifndef __ASM_PPC_CPUTABLE_H | ||
16 | #define __ASM_PPC_CPUTABLE_H | ||
17 | |||
18 | #include <linux/config.h> | ||
19 | #include <asm/page.h> /* for ASM_CONST */ | ||
20 | |||
21 | /* Exposed to userland CPU features - Must match ppc32 definitions */ | ||
22 | #define PPC_FEATURE_32 0x80000000 | ||
23 | #define PPC_FEATURE_64 0x40000000 | ||
24 | #define PPC_FEATURE_601_INSTR 0x20000000 | ||
25 | #define PPC_FEATURE_HAS_ALTIVEC 0x10000000 | ||
26 | #define PPC_FEATURE_HAS_FPU 0x08000000 | ||
27 | #define PPC_FEATURE_HAS_MMU 0x04000000 | ||
28 | #define PPC_FEATURE_HAS_4xxMAC 0x02000000 | ||
29 | #define PPC_FEATURE_UNIFIED_CACHE 0x01000000 | ||
30 | |||
31 | #ifdef __KERNEL__ | ||
32 | |||
33 | #ifndef __ASSEMBLY__ | ||
34 | |||
35 | /* This structure can grow, it's real size is used by head.S code | ||
36 | * via the mkdefs mechanism. | ||
37 | */ | ||
38 | struct cpu_spec; | ||
39 | struct op_ppc64_model; | ||
40 | |||
41 | typedef void (*cpu_setup_t)(unsigned long offset, struct cpu_spec* spec); | ||
42 | |||
43 | struct cpu_spec { | ||
44 | /* CPU is matched via (PVR & pvr_mask) == pvr_value */ | ||
45 | unsigned int pvr_mask; | ||
46 | unsigned int pvr_value; | ||
47 | |||
48 | char *cpu_name; | ||
49 | unsigned long cpu_features; /* Kernel features */ | ||
50 | unsigned int cpu_user_features; /* Userland features */ | ||
51 | |||
52 | /* cache line sizes */ | ||
53 | unsigned int icache_bsize; | ||
54 | unsigned int dcache_bsize; | ||
55 | |||
56 | /* number of performance monitor counters */ | ||
57 | unsigned int num_pmcs; | ||
58 | |||
59 | /* this is called to initialize various CPU bits like L1 cache, | ||
60 | * BHT, SPD, etc... from head.S before branching to identify_machine | ||
61 | */ | ||
62 | cpu_setup_t cpu_setup; | ||
63 | |||
64 | /* Used by oprofile userspace to select the right counters */ | ||
65 | char *oprofile_cpu_type; | ||
66 | |||
67 | /* Processor specific oprofile operations */ | ||
68 | struct op_ppc64_model *oprofile_model; | ||
69 | }; | ||
70 | |||
71 | extern struct cpu_spec cpu_specs[]; | ||
72 | extern struct cpu_spec *cur_cpu_spec; | ||
73 | |||
74 | static inline unsigned long cpu_has_feature(unsigned long feature) | ||
75 | { | ||
76 | return cur_cpu_spec->cpu_features & feature; | ||
77 | } | ||
78 | |||
79 | #endif /* __ASSEMBLY__ */ | ||
80 | |||
81 | /* CPU kernel features */ | ||
82 | |||
83 | /* Retain the 32b definitions for the time being - use bottom half of word */ | ||
84 | #define CPU_FTR_SPLIT_ID_CACHE ASM_CONST(0x0000000000000001) | ||
85 | #define CPU_FTR_L2CR ASM_CONST(0x0000000000000002) | ||
86 | #define CPU_FTR_SPEC7450 ASM_CONST(0x0000000000000004) | ||
87 | #define CPU_FTR_ALTIVEC ASM_CONST(0x0000000000000008) | ||
88 | #define CPU_FTR_TAU ASM_CONST(0x0000000000000010) | ||
89 | #define CPU_FTR_CAN_DOZE ASM_CONST(0x0000000000000020) | ||
90 | #define CPU_FTR_USE_TB ASM_CONST(0x0000000000000040) | ||
91 | #define CPU_FTR_604_PERF_MON ASM_CONST(0x0000000000000080) | ||
92 | #define CPU_FTR_601 ASM_CONST(0x0000000000000100) | ||
93 | #define CPU_FTR_HPTE_TABLE ASM_CONST(0x0000000000000200) | ||
94 | #define CPU_FTR_CAN_NAP ASM_CONST(0x0000000000000400) | ||
95 | #define CPU_FTR_L3CR ASM_CONST(0x0000000000000800) | ||
96 | #define CPU_FTR_L3_DISABLE_NAP ASM_CONST(0x0000000000001000) | ||
97 | #define CPU_FTR_NAP_DISABLE_L2_PR ASM_CONST(0x0000000000002000) | ||
98 | #define CPU_FTR_DUAL_PLL_750FX ASM_CONST(0x0000000000004000) | ||
99 | |||
100 | /* Add the 64b processor unique features in the top half of the word */ | ||
101 | #define CPU_FTR_SLB ASM_CONST(0x0000000100000000) | ||
102 | #define CPU_FTR_16M_PAGE ASM_CONST(0x0000000200000000) | ||
103 | #define CPU_FTR_TLBIEL ASM_CONST(0x0000000400000000) | ||
104 | #define CPU_FTR_NOEXECUTE ASM_CONST(0x0000000800000000) | ||
105 | #define CPU_FTR_NODSISRALIGN ASM_CONST(0x0000001000000000) | ||
106 | #define CPU_FTR_IABR ASM_CONST(0x0000002000000000) | ||
107 | #define CPU_FTR_MMCRA ASM_CONST(0x0000004000000000) | ||
108 | /* unused ASM_CONST(0x0000008000000000) */ | ||
109 | #define CPU_FTR_SMT ASM_CONST(0x0000010000000000) | ||
110 | #define CPU_FTR_COHERENT_ICACHE ASM_CONST(0x0000020000000000) | ||
111 | #define CPU_FTR_LOCKLESS_TLBIE ASM_CONST(0x0000040000000000) | ||
112 | #define CPU_FTR_MMCRA_SIHV ASM_CONST(0x0000080000000000) | ||
113 | #define CPU_FTR_CTRL ASM_CONST(0x0000100000000000) | ||
114 | |||
115 | #ifndef __ASSEMBLY__ | ||
116 | |||
117 | #define COMMON_USER_PPC64 (PPC_FEATURE_32 | PPC_FEATURE_64 | \ | ||
118 | PPC_FEATURE_HAS_FPU | PPC_FEATURE_HAS_MMU) | ||
119 | |||
120 | #define CPU_FTR_PPCAS_ARCH_V2_BASE (CPU_FTR_SLB | \ | ||
121 | CPU_FTR_TLBIEL | CPU_FTR_NOEXECUTE | \ | ||
122 | CPU_FTR_NODSISRALIGN | CPU_FTR_CTRL) | ||
123 | |||
124 | /* iSeries doesn't support large pages */ | ||
125 | #ifdef CONFIG_PPC_ISERIES | ||
126 | #define CPU_FTR_PPCAS_ARCH_V2 (CPU_FTR_PPCAS_ARCH_V2_BASE) | ||
127 | #else | ||
128 | #define CPU_FTR_PPCAS_ARCH_V2 (CPU_FTR_PPCAS_ARCH_V2_BASE | CPU_FTR_16M_PAGE) | ||
129 | #endif /* CONFIG_PPC_ISERIES */ | ||
130 | |||
131 | #endif /* __ASSEMBLY */ | ||
132 | |||
133 | #ifdef __ASSEMBLY__ | ||
134 | |||
135 | #define BEGIN_FTR_SECTION 98: | ||
136 | |||
137 | #define END_FTR_SECTION(msk, val) \ | ||
138 | 99: \ | ||
139 | .section __ftr_fixup,"a"; \ | ||
140 | .align 3; \ | ||
141 | .llong msk; \ | ||
142 | .llong val; \ | ||
143 | .llong 98b; \ | ||
144 | .llong 99b; \ | ||
145 | .previous | ||
146 | |||
147 | #else | ||
148 | |||
149 | #define BEGIN_FTR_SECTION "98:\n" | ||
150 | #define END_FTR_SECTION(msk, val) \ | ||
151 | "99:\n" \ | ||
152 | " .section __ftr_fixup,\"a\";\n" \ | ||
153 | " .align 3;\n" \ | ||
154 | " .llong "#msk";\n" \ | ||
155 | " .llong "#val";\n" \ | ||
156 | " .llong 98b;\n" \ | ||
157 | " .llong 99b;\n" \ | ||
158 | " .previous\n" | ||
159 | |||
160 | #endif /* __ASSEMBLY__ */ | ||
161 | |||
162 | #define END_FTR_SECTION_IFSET(msk) END_FTR_SECTION((msk), (msk)) | ||
163 | #define END_FTR_SECTION_IFCLR(msk) END_FTR_SECTION((msk), 0) | ||
164 | |||
165 | #endif /* __ASM_PPC_CPUTABLE_H */ | ||
166 | #endif /* __KERNEL__ */ | ||
167 | |||
diff --git a/include/asm-ppc64/dbdma.h b/include/asm-ppc64/dbdma.h deleted file mode 100644 index f2d5d5dc3377..000000000000 --- a/include/asm-ppc64/dbdma.h +++ /dev/null | |||
@@ -1,2 +0,0 @@ | |||
1 | #include <asm-ppc/dbdma.h> | ||
2 | |||
diff --git a/include/asm-ppc64/dma.h b/include/asm-ppc64/dma.h deleted file mode 100644 index dfd1f69059ba..000000000000 --- a/include/asm-ppc64/dma.h +++ /dev/null | |||
@@ -1,329 +0,0 @@ | |||
1 | /* | ||
2 | * linux/include/asm/dma.h: Defines for using and allocating dma channels. | ||
3 | * Written by Hennus Bergman, 1992. | ||
4 | * High DMA channel support & info by Hannu Savolainen | ||
5 | * and John Boyd, Nov. 1992. | ||
6 | * Changes for ppc sound by Christoph Nadig | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License | ||
10 | * as published by the Free Software Foundation; either version | ||
11 | * 2 of the License, or (at your option) any later version. | ||
12 | */ | ||
13 | |||
14 | #ifndef _ASM_DMA_H | ||
15 | #define _ASM_DMA_H | ||
16 | |||
17 | #include <linux/config.h> | ||
18 | #include <asm/io.h> | ||
19 | #include <linux/spinlock.h> | ||
20 | #include <asm/system.h> | ||
21 | |||
22 | #ifndef MAX_DMA_CHANNELS | ||
23 | #define MAX_DMA_CHANNELS 8 | ||
24 | #endif | ||
25 | |||
26 | /* The maximum address that we can perform a DMA transfer to on this platform */ | ||
27 | /* Doesn't really apply... */ | ||
28 | #define MAX_DMA_ADDRESS (~0UL) | ||
29 | |||
30 | #if !defined(CONFIG_PPC_ISERIES) || defined(CONFIG_PCI) | ||
31 | |||
32 | #define dma_outb outb | ||
33 | #define dma_inb inb | ||
34 | |||
35 | /* | ||
36 | * NOTES about DMA transfers: | ||
37 | * | ||
38 | * controller 1: channels 0-3, byte operations, ports 00-1F | ||
39 | * controller 2: channels 4-7, word operations, ports C0-DF | ||
40 | * | ||
41 | * - ALL registers are 8 bits only, regardless of transfer size | ||
42 | * - channel 4 is not used - cascades 1 into 2. | ||
43 | * - channels 0-3 are byte - addresses/counts are for physical bytes | ||
44 | * - channels 5-7 are word - addresses/counts are for physical words | ||
45 | * - transfers must not cross physical 64K (0-3) or 128K (5-7) boundaries | ||
46 | * - transfer count loaded to registers is 1 less than actual count | ||
47 | * - controller 2 offsets are all even (2x offsets for controller 1) | ||
48 | * - page registers for 5-7 don't use data bit 0, represent 128K pages | ||
49 | * - page registers for 0-3 use bit 0, represent 64K pages | ||
50 | * | ||
51 | * On PReP, DMA transfers are limited to the lower 16MB of _physical_ memory. | ||
52 | * On CHRP, the W83C553F (and VLSI Tollgate?) support full 32 bit addressing. | ||
53 | * Note that addresses loaded into registers must be _physical_ addresses, | ||
54 | * not logical addresses (which may differ if paging is active). | ||
55 | * | ||
56 | * Address mapping for channels 0-3: | ||
57 | * | ||
58 | * A23 ... A16 A15 ... A8 A7 ... A0 (Physical addresses) | ||
59 | * | ... | | ... | | ... | | ||
60 | * | ... | | ... | | ... | | ||
61 | * | ... | | ... | | ... | | ||
62 | * P7 ... P0 A7 ... A0 A7 ... A0 | ||
63 | * | Page | Addr MSB | Addr LSB | (DMA registers) | ||
64 | * | ||
65 | * Address mapping for channels 5-7: | ||
66 | * | ||
67 | * A23 ... A17 A16 A15 ... A9 A8 A7 ... A1 A0 (Physical addresses) | ||
68 | * | ... | \ \ ... \ \ \ ... \ \ | ||
69 | * | ... | \ \ ... \ \ \ ... \ (not used) | ||
70 | * | ... | \ \ ... \ \ \ ... \ | ||
71 | * P7 ... P1 (0) A7 A6 ... A0 A7 A6 ... A0 | ||
72 | * | Page | Addr MSB | Addr LSB | (DMA registers) | ||
73 | * | ||
74 | * Again, channels 5-7 transfer _physical_ words (16 bits), so addresses | ||
75 | * and counts _must_ be word-aligned (the lowest address bit is _ignored_ at | ||
76 | * the hardware level, so odd-byte transfers aren't possible). | ||
77 | * | ||
78 | * Transfer count (_not # bytes_) is limited to 64K, represented as actual | ||
79 | * count - 1 : 64K => 0xFFFF, 1 => 0x0000. Thus, count is always 1 or more, | ||
80 | * and up to 128K bytes may be transferred on channels 5-7 in one operation. | ||
81 | * | ||
82 | */ | ||
83 | |||
84 | /* 8237 DMA controllers */ | ||
85 | #define IO_DMA1_BASE 0x00 /* 8 bit slave DMA, channels 0..3 */ | ||
86 | #define IO_DMA2_BASE 0xC0 /* 16 bit master DMA, ch 4(=slave input)..7 */ | ||
87 | |||
88 | /* DMA controller registers */ | ||
89 | #define DMA1_CMD_REG 0x08 /* command register (w) */ | ||
90 | #define DMA1_STAT_REG 0x08 /* status register (r) */ | ||
91 | #define DMA1_REQ_REG 0x09 /* request register (w) */ | ||
92 | #define DMA1_MASK_REG 0x0A /* single-channel mask (w) */ | ||
93 | #define DMA1_MODE_REG 0x0B /* mode register (w) */ | ||
94 | #define DMA1_CLEAR_FF_REG 0x0C /* clear pointer flip-flop (w) */ | ||
95 | #define DMA1_TEMP_REG 0x0D /* Temporary Register (r) */ | ||
96 | #define DMA1_RESET_REG 0x0D /* Master Clear (w) */ | ||
97 | #define DMA1_CLR_MASK_REG 0x0E /* Clear Mask */ | ||
98 | #define DMA1_MASK_ALL_REG 0x0F /* all-channels mask (w) */ | ||
99 | |||
100 | #define DMA2_CMD_REG 0xD0 /* command register (w) */ | ||
101 | #define DMA2_STAT_REG 0xD0 /* status register (r) */ | ||
102 | #define DMA2_REQ_REG 0xD2 /* request register (w) */ | ||
103 | #define DMA2_MASK_REG 0xD4 /* single-channel mask (w) */ | ||
104 | #define DMA2_MODE_REG 0xD6 /* mode register (w) */ | ||
105 | #define DMA2_CLEAR_FF_REG 0xD8 /* clear pointer flip-flop (w) */ | ||
106 | #define DMA2_TEMP_REG 0xDA /* Temporary Register (r) */ | ||
107 | #define DMA2_RESET_REG 0xDA /* Master Clear (w) */ | ||
108 | #define DMA2_CLR_MASK_REG 0xDC /* Clear Mask */ | ||
109 | #define DMA2_MASK_ALL_REG 0xDE /* all-channels mask (w) */ | ||
110 | |||
111 | #define DMA_ADDR_0 0x00 /* DMA address registers */ | ||
112 | #define DMA_ADDR_1 0x02 | ||
113 | #define DMA_ADDR_2 0x04 | ||
114 | #define DMA_ADDR_3 0x06 | ||
115 | #define DMA_ADDR_4 0xC0 | ||
116 | #define DMA_ADDR_5 0xC4 | ||
117 | #define DMA_ADDR_6 0xC8 | ||
118 | #define DMA_ADDR_7 0xCC | ||
119 | |||
120 | #define DMA_CNT_0 0x01 /* DMA count registers */ | ||
121 | #define DMA_CNT_1 0x03 | ||
122 | #define DMA_CNT_2 0x05 | ||
123 | #define DMA_CNT_3 0x07 | ||
124 | #define DMA_CNT_4 0xC2 | ||
125 | #define DMA_CNT_5 0xC6 | ||
126 | #define DMA_CNT_6 0xCA | ||
127 | #define DMA_CNT_7 0xCE | ||
128 | |||
129 | #define DMA_LO_PAGE_0 0x87 /* DMA page registers */ | ||
130 | #define DMA_LO_PAGE_1 0x83 | ||
131 | #define DMA_LO_PAGE_2 0x81 | ||
132 | #define DMA_LO_PAGE_3 0x82 | ||
133 | #define DMA_LO_PAGE_5 0x8B | ||
134 | #define DMA_LO_PAGE_6 0x89 | ||
135 | #define DMA_LO_PAGE_7 0x8A | ||
136 | |||
137 | #define DMA_HI_PAGE_0 0x487 /* DMA page registers */ | ||
138 | #define DMA_HI_PAGE_1 0x483 | ||
139 | #define DMA_HI_PAGE_2 0x481 | ||
140 | #define DMA_HI_PAGE_3 0x482 | ||
141 | #define DMA_HI_PAGE_5 0x48B | ||
142 | #define DMA_HI_PAGE_6 0x489 | ||
143 | #define DMA_HI_PAGE_7 0x48A | ||
144 | |||
145 | #define DMA1_EXT_REG 0x40B | ||
146 | #define DMA2_EXT_REG 0x4D6 | ||
147 | |||
148 | #define DMA_MODE_READ 0x44 /* I/O to memory, no autoinit, increment, single mode */ | ||
149 | #define DMA_MODE_WRITE 0x48 /* memory to I/O, no autoinit, increment, single mode */ | ||
150 | #define DMA_MODE_CASCADE 0xC0 /* pass thru DREQ->HRQ, DACK<-HLDA only */ | ||
151 | |||
152 | #define DMA_AUTOINIT 0x10 | ||
153 | |||
154 | extern spinlock_t dma_spin_lock; | ||
155 | |||
156 | static __inline__ unsigned long claim_dma_lock(void) | ||
157 | { | ||
158 | unsigned long flags; | ||
159 | spin_lock_irqsave(&dma_spin_lock, flags); | ||
160 | return flags; | ||
161 | } | ||
162 | |||
163 | static __inline__ void release_dma_lock(unsigned long flags) | ||
164 | { | ||
165 | spin_unlock_irqrestore(&dma_spin_lock, flags); | ||
166 | } | ||
167 | |||
168 | /* enable/disable a specific DMA channel */ | ||
169 | static __inline__ void enable_dma(unsigned int dmanr) | ||
170 | { | ||
171 | unsigned char ucDmaCmd=0x00; | ||
172 | |||
173 | if (dmanr != 4) | ||
174 | { | ||
175 | dma_outb(0, DMA2_MASK_REG); /* This may not be enabled */ | ||
176 | dma_outb(ucDmaCmd, DMA2_CMD_REG); /* Enable group */ | ||
177 | } | ||
178 | if (dmanr<=3) | ||
179 | { | ||
180 | dma_outb(dmanr, DMA1_MASK_REG); | ||
181 | dma_outb(ucDmaCmd, DMA1_CMD_REG); /* Enable group */ | ||
182 | } else | ||
183 | { | ||
184 | dma_outb(dmanr & 3, DMA2_MASK_REG); | ||
185 | } | ||
186 | } | ||
187 | |||
188 | static __inline__ void disable_dma(unsigned int dmanr) | ||
189 | { | ||
190 | if (dmanr<=3) | ||
191 | dma_outb(dmanr | 4, DMA1_MASK_REG); | ||
192 | else | ||
193 | dma_outb((dmanr & 3) | 4, DMA2_MASK_REG); | ||
194 | } | ||
195 | |||
196 | /* Clear the 'DMA Pointer Flip Flop'. | ||
197 | * Write 0 for LSB/MSB, 1 for MSB/LSB access. | ||
198 | * Use this once to initialize the FF to a known state. | ||
199 | * After that, keep track of it. :-) | ||
200 | * --- In order to do that, the DMA routines below should --- | ||
201 | * --- only be used while interrupts are disabled! --- | ||
202 | */ | ||
203 | static __inline__ void clear_dma_ff(unsigned int dmanr) | ||
204 | { | ||
205 | if (dmanr<=3) | ||
206 | dma_outb(0, DMA1_CLEAR_FF_REG); | ||
207 | else | ||
208 | dma_outb(0, DMA2_CLEAR_FF_REG); | ||
209 | } | ||
210 | |||
211 | /* set mode (above) for a specific DMA channel */ | ||
212 | static __inline__ void set_dma_mode(unsigned int dmanr, char mode) | ||
213 | { | ||
214 | if (dmanr<=3) | ||
215 | dma_outb(mode | dmanr, DMA1_MODE_REG); | ||
216 | else | ||
217 | dma_outb(mode | (dmanr&3), DMA2_MODE_REG); | ||
218 | } | ||
219 | |||
220 | /* Set only the page register bits of the transfer address. | ||
221 | * This is used for successive transfers when we know the contents of | ||
222 | * the lower 16 bits of the DMA current address register, but a 64k boundary | ||
223 | * may have been crossed. | ||
224 | */ | ||
225 | static __inline__ void set_dma_page(unsigned int dmanr, int pagenr) | ||
226 | { | ||
227 | switch(dmanr) { | ||
228 | case 0: | ||
229 | dma_outb(pagenr, DMA_LO_PAGE_0); | ||
230 | dma_outb(pagenr>>8, DMA_HI_PAGE_0); | ||
231 | break; | ||
232 | case 1: | ||
233 | dma_outb(pagenr, DMA_LO_PAGE_1); | ||
234 | dma_outb(pagenr>>8, DMA_HI_PAGE_1); | ||
235 | break; | ||
236 | case 2: | ||
237 | dma_outb(pagenr, DMA_LO_PAGE_2); | ||
238 | dma_outb(pagenr>>8, DMA_HI_PAGE_2); | ||
239 | break; | ||
240 | case 3: | ||
241 | dma_outb(pagenr, DMA_LO_PAGE_3); | ||
242 | dma_outb(pagenr>>8, DMA_HI_PAGE_3); | ||
243 | break; | ||
244 | case 5: | ||
245 | dma_outb(pagenr & 0xfe, DMA_LO_PAGE_5); | ||
246 | dma_outb(pagenr>>8, DMA_HI_PAGE_5); | ||
247 | break; | ||
248 | case 6: | ||
249 | dma_outb(pagenr & 0xfe, DMA_LO_PAGE_6); | ||
250 | dma_outb(pagenr>>8, DMA_HI_PAGE_6); | ||
251 | break; | ||
252 | case 7: | ||
253 | dma_outb(pagenr & 0xfe, DMA_LO_PAGE_7); | ||
254 | dma_outb(pagenr>>8, DMA_HI_PAGE_7); | ||
255 | break; | ||
256 | } | ||
257 | } | ||
258 | |||
259 | |||
260 | /* Set transfer address & page bits for specific DMA channel. | ||
261 | * Assumes dma flipflop is clear. | ||
262 | */ | ||
263 | static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int phys) | ||
264 | { | ||
265 | if (dmanr <= 3) { | ||
266 | dma_outb( phys & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE ); | ||
267 | dma_outb( (phys>>8) & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE ); | ||
268 | } else { | ||
269 | dma_outb( (phys>>1) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE ); | ||
270 | dma_outb( (phys>>9) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE ); | ||
271 | } | ||
272 | set_dma_page(dmanr, phys>>16); | ||
273 | } | ||
274 | |||
275 | |||
276 | /* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for | ||
277 | * a specific DMA channel. | ||
278 | * You must ensure the parameters are valid. | ||
279 | * NOTE: from a manual: "the number of transfers is one more | ||
280 | * than the initial word count"! This is taken into account. | ||
281 | * Assumes dma flip-flop is clear. | ||
282 | * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7. | ||
283 | */ | ||
284 | static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count) | ||
285 | { | ||
286 | count--; | ||
287 | if (dmanr <= 3) { | ||
288 | dma_outb( count & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE ); | ||
289 | dma_outb( (count>>8) & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE ); | ||
290 | } else { | ||
291 | dma_outb( (count>>1) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE ); | ||
292 | dma_outb( (count>>9) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE ); | ||
293 | } | ||
294 | } | ||
295 | |||
296 | |||
297 | /* Get DMA residue count. After a DMA transfer, this | ||
298 | * should return zero. Reading this while a DMA transfer is | ||
299 | * still in progress will return unpredictable results. | ||
300 | * If called before the channel has been used, it may return 1. | ||
301 | * Otherwise, it returns the number of _bytes_ left to transfer. | ||
302 | * | ||
303 | * Assumes DMA flip-flop is clear. | ||
304 | */ | ||
305 | static __inline__ int get_dma_residue(unsigned int dmanr) | ||
306 | { | ||
307 | unsigned int io_port = (dmanr<=3)? ((dmanr&3)<<1) + 1 + IO_DMA1_BASE | ||
308 | : ((dmanr&3)<<2) + 2 + IO_DMA2_BASE; | ||
309 | |||
310 | /* using short to get 16-bit wrap around */ | ||
311 | unsigned short count; | ||
312 | |||
313 | count = 1 + dma_inb(io_port); | ||
314 | count += dma_inb(io_port) << 8; | ||
315 | |||
316 | return (dmanr <= 3)? count : (count<<1); | ||
317 | } | ||
318 | |||
319 | /* These are in kernel/dma.c: */ | ||
320 | extern int request_dma(unsigned int dmanr, const char * device_id); /* reserve a DMA channel */ | ||
321 | extern void free_dma(unsigned int dmanr); /* release it again */ | ||
322 | |||
323 | #ifdef CONFIG_PCI | ||
324 | extern int isa_dma_bridge_buggy; | ||
325 | #else | ||
326 | #define isa_dma_bridge_buggy (0) | ||
327 | #endif | ||
328 | #endif /* !defined(CONFIG_PPC_ISERIES) || defined(CONFIG_PCI) */ | ||
329 | #endif /* _ASM_DMA_H */ | ||
diff --git a/include/asm-ppc64/elf.h b/include/asm-ppc64/elf.h deleted file mode 100644 index c919a89343db..000000000000 --- a/include/asm-ppc64/elf.h +++ /dev/null | |||
@@ -1,387 +0,0 @@ | |||
1 | #ifndef __PPC64_ELF_H | ||
2 | #define __PPC64_ELF_H | ||
3 | |||
4 | #include <asm/types.h> | ||
5 | #include <asm/ptrace.h> | ||
6 | #include <asm/cputable.h> | ||
7 | #include <asm/auxvec.h> | ||
8 | |||
9 | /* PowerPC relocations defined by the ABIs */ | ||
10 | #define R_PPC_NONE 0 | ||
11 | #define R_PPC_ADDR32 1 /* 32bit absolute address */ | ||
12 | #define R_PPC_ADDR24 2 /* 26bit address, 2 bits ignored. */ | ||
13 | #define R_PPC_ADDR16 3 /* 16bit absolute address */ | ||
14 | #define R_PPC_ADDR16_LO 4 /* lower 16bit of absolute address */ | ||
15 | #define R_PPC_ADDR16_HI 5 /* high 16bit of absolute address */ | ||
16 | #define R_PPC_ADDR16_HA 6 /* adjusted high 16bit */ | ||
17 | #define R_PPC_ADDR14 7 /* 16bit address, 2 bits ignored */ | ||
18 | #define R_PPC_ADDR14_BRTAKEN 8 | ||
19 | #define R_PPC_ADDR14_BRNTAKEN 9 | ||
20 | #define R_PPC_REL24 10 /* PC relative 26 bit */ | ||
21 | #define R_PPC_REL14 11 /* PC relative 16 bit */ | ||
22 | #define R_PPC_REL14_BRTAKEN 12 | ||
23 | #define R_PPC_REL14_BRNTAKEN 13 | ||
24 | #define R_PPC_GOT16 14 | ||
25 | #define R_PPC_GOT16_LO 15 | ||
26 | #define R_PPC_GOT16_HI 16 | ||
27 | #define R_PPC_GOT16_HA 17 | ||
28 | #define R_PPC_PLTREL24 18 | ||
29 | #define R_PPC_COPY 19 | ||
30 | #define R_PPC_GLOB_DAT 20 | ||
31 | #define R_PPC_JMP_SLOT 21 | ||
32 | #define R_PPC_RELATIVE 22 | ||
33 | #define R_PPC_LOCAL24PC 23 | ||
34 | #define R_PPC_UADDR32 24 | ||
35 | #define R_PPC_UADDR16 25 | ||
36 | #define R_PPC_REL32 26 | ||
37 | #define R_PPC_PLT32 27 | ||
38 | #define R_PPC_PLTREL32 28 | ||
39 | #define R_PPC_PLT16_LO 29 | ||
40 | #define R_PPC_PLT16_HI 30 | ||
41 | #define R_PPC_PLT16_HA 31 | ||
42 | #define R_PPC_SDAREL16 32 | ||
43 | #define R_PPC_SECTOFF 33 | ||
44 | #define R_PPC_SECTOFF_LO 34 | ||
45 | #define R_PPC_SECTOFF_HI 35 | ||
46 | #define R_PPC_SECTOFF_HA 36 | ||
47 | |||
48 | /* PowerPC relocations defined for the TLS access ABI. */ | ||
49 | #define R_PPC_TLS 67 /* none (sym+add)@tls */ | ||
50 | #define R_PPC_DTPMOD32 68 /* word32 (sym+add)@dtpmod */ | ||
51 | #define R_PPC_TPREL16 69 /* half16* (sym+add)@tprel */ | ||
52 | #define R_PPC_TPREL16_LO 70 /* half16 (sym+add)@tprel@l */ | ||
53 | #define R_PPC_TPREL16_HI 71 /* half16 (sym+add)@tprel@h */ | ||
54 | #define R_PPC_TPREL16_HA 72 /* half16 (sym+add)@tprel@ha */ | ||
55 | #define R_PPC_TPREL32 73 /* word32 (sym+add)@tprel */ | ||
56 | #define R_PPC_DTPREL16 74 /* half16* (sym+add)@dtprel */ | ||
57 | #define R_PPC_DTPREL16_LO 75 /* half16 (sym+add)@dtprel@l */ | ||
58 | #define R_PPC_DTPREL16_HI 76 /* half16 (sym+add)@dtprel@h */ | ||
59 | #define R_PPC_DTPREL16_HA 77 /* half16 (sym+add)@dtprel@ha */ | ||
60 | #define R_PPC_DTPREL32 78 /* word32 (sym+add)@dtprel */ | ||
61 | #define R_PPC_GOT_TLSGD16 79 /* half16* (sym+add)@got@tlsgd */ | ||
62 | #define R_PPC_GOT_TLSGD16_LO 80 /* half16 (sym+add)@got@tlsgd@l */ | ||
63 | #define R_PPC_GOT_TLSGD16_HI 81 /* half16 (sym+add)@got@tlsgd@h */ | ||
64 | #define R_PPC_GOT_TLSGD16_HA 82 /* half16 (sym+add)@got@tlsgd@ha */ | ||
65 | #define R_PPC_GOT_TLSLD16 83 /* half16* (sym+add)@got@tlsld */ | ||
66 | #define R_PPC_GOT_TLSLD16_LO 84 /* half16 (sym+add)@got@tlsld@l */ | ||
67 | #define R_PPC_GOT_TLSLD16_HI 85 /* half16 (sym+add)@got@tlsld@h */ | ||
68 | #define R_PPC_GOT_TLSLD16_HA 86 /* half16 (sym+add)@got@tlsld@ha */ | ||
69 | #define R_PPC_GOT_TPREL16 87 /* half16* (sym+add)@got@tprel */ | ||
70 | #define R_PPC_GOT_TPREL16_LO 88 /* half16 (sym+add)@got@tprel@l */ | ||
71 | #define R_PPC_GOT_TPREL16_HI 89 /* half16 (sym+add)@got@tprel@h */ | ||
72 | #define R_PPC_GOT_TPREL16_HA 90 /* half16 (sym+add)@got@tprel@ha */ | ||
73 | #define R_PPC_GOT_DTPREL16 91 /* half16* (sym+add)@got@dtprel */ | ||
74 | #define R_PPC_GOT_DTPREL16_LO 92 /* half16* (sym+add)@got@dtprel@l */ | ||
75 | #define R_PPC_GOT_DTPREL16_HI 93 /* half16* (sym+add)@got@dtprel@h */ | ||
76 | #define R_PPC_GOT_DTPREL16_HA 94 /* half16* (sym+add)@got@dtprel@ha */ | ||
77 | |||
78 | /* Keep this the last entry. */ | ||
79 | #define R_PPC_NUM 95 | ||
80 | |||
81 | /* | ||
82 | * ELF register definitions.. | ||
83 | * | ||
84 | * This program is free software; you can redistribute it and/or | ||
85 | * modify it under the terms of the GNU General Public License | ||
86 | * as published by the Free Software Foundation; either version | ||
87 | * 2 of the License, or (at your option) any later version. | ||
88 | */ | ||
89 | #include <asm/ptrace.h> | ||
90 | |||
91 | #define ELF_NGREG 48 /* includes nip, msr, lr, etc. */ | ||
92 | #define ELF_NFPREG 33 /* includes fpscr */ | ||
93 | #define ELF_NVRREG32 33 /* includes vscr & vrsave stuffed together */ | ||
94 | #define ELF_NVRREG 34 /* includes vscr & vrsave in split vectors */ | ||
95 | |||
96 | typedef unsigned long elf_greg_t64; | ||
97 | typedef elf_greg_t64 elf_gregset_t64[ELF_NGREG]; | ||
98 | |||
99 | typedef unsigned int elf_greg_t32; | ||
100 | typedef elf_greg_t32 elf_gregset_t32[ELF_NGREG]; | ||
101 | |||
102 | /* | ||
103 | * These are used to set parameters in the core dumps. | ||
104 | */ | ||
105 | #ifndef ELF_ARCH | ||
106 | # define ELF_ARCH EM_PPC64 | ||
107 | # define ELF_CLASS ELFCLASS64 | ||
108 | # define ELF_DATA ELFDATA2MSB | ||
109 | typedef elf_greg_t64 elf_greg_t; | ||
110 | typedef elf_gregset_t64 elf_gregset_t; | ||
111 | # define elf_addr_t unsigned long | ||
112 | #else | ||
113 | /* Assumption: ELF_ARCH == EM_PPC and ELF_CLASS == ELFCLASS32 */ | ||
114 | typedef elf_greg_t32 elf_greg_t; | ||
115 | typedef elf_gregset_t32 elf_gregset_t; | ||
116 | # define elf_addr_t u32 | ||
117 | #endif | ||
118 | |||
119 | typedef double elf_fpreg_t; | ||
120 | typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG]; | ||
121 | |||
122 | /* Altivec registers */ | ||
123 | /* | ||
124 | * The entries with indexes 0-31 contain the corresponding vector registers. | ||
125 | * The entry with index 32 contains the vscr as the last word (offset 12) | ||
126 | * within the quadword. This allows the vscr to be stored as either a | ||
127 | * quadword (since it must be copied via a vector register to/from storage) | ||
128 | * or as a word. The entry with index 33 contains the vrsave as the first | ||
129 | * word (offset 0) within the quadword. | ||
130 | * | ||
131 | * This definition of the VMX state is compatible with the current PPC32 | ||
132 | * ptrace interface. This allows signal handling and ptrace to use the same | ||
133 | * structures. This also simplifies the implementation of a bi-arch | ||
134 | * (combined (32- and 64-bit) gdb. | ||
135 | * | ||
136 | * Note that it's _not_ compatible with 32 bits ucontext which stuffs the | ||
137 | * vrsave along with vscr and so only uses 33 vectors for the register set | ||
138 | */ | ||
139 | typedef __vector128 elf_vrreg_t; | ||
140 | typedef elf_vrreg_t elf_vrregset_t[ELF_NVRREG]; | ||
141 | typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32]; | ||
142 | |||
143 | /* | ||
144 | * This is used to ensure we don't load something for the wrong architecture. | ||
145 | */ | ||
146 | #define elf_check_arch(x) ((x)->e_machine == ELF_ARCH) | ||
147 | |||
148 | #define USE_ELF_CORE_DUMP | ||
149 | #define ELF_EXEC_PAGESIZE 4096 | ||
150 | |||
151 | /* This is the location that an ET_DYN program is loaded if exec'ed. Typical | ||
152 | use of this is to invoke "./ld.so someprog" to test out a new version of | ||
153 | the loader. We need to make sure that it is out of the way of the program | ||
154 | that it will "exec", and that there is sufficient room for the brk. */ | ||
155 | |||
156 | #define ELF_ET_DYN_BASE (0x08000000) | ||
157 | |||
158 | #ifdef __KERNEL__ | ||
159 | |||
160 | /* Common routine for both 32-bit and 64-bit processes */ | ||
161 | static inline void ppc64_elf_core_copy_regs(elf_gregset_t elf_regs, | ||
162 | struct pt_regs *regs) | ||
163 | { | ||
164 | int i; | ||
165 | int gprs = sizeof(struct pt_regs)/sizeof(elf_greg_t64); | ||
166 | |||
167 | if (gprs > ELF_NGREG) | ||
168 | gprs = ELF_NGREG; | ||
169 | |||
170 | for (i=0; i < gprs; i++) | ||
171 | elf_regs[i] = (elf_greg_t)((elf_greg_t64 *)regs)[i]; | ||
172 | } | ||
173 | #define ELF_CORE_COPY_REGS(gregs, regs) ppc64_elf_core_copy_regs(gregs, regs); | ||
174 | |||
175 | static inline int dump_task_regs(struct task_struct *tsk, | ||
176 | elf_gregset_t *elf_regs) | ||
177 | { | ||
178 | struct pt_regs *regs = tsk->thread.regs; | ||
179 | if (regs) | ||
180 | ppc64_elf_core_copy_regs(*elf_regs, regs); | ||
181 | |||
182 | return 1; | ||
183 | } | ||
184 | #define ELF_CORE_COPY_TASK_REGS(tsk, elf_regs) dump_task_regs(tsk, elf_regs) | ||
185 | |||
186 | extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *); | ||
187 | #define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) dump_task_fpu(tsk, elf_fpregs) | ||
188 | |||
189 | /* XXX Should we define the XFPREGS using altivec ??? */ | ||
190 | |||
191 | #endif | ||
192 | |||
193 | /* This yields a mask that user programs can use to figure out what | ||
194 | instruction set this cpu supports. This could be done in userspace, | ||
195 | but it's not easy, and we've already done it here. */ | ||
196 | |||
197 | #define ELF_HWCAP (cur_cpu_spec->cpu_user_features) | ||
198 | |||
199 | /* This yields a string that ld.so will use to load implementation | ||
200 | specific libraries for optimization. This is more specific in | ||
201 | intent than poking at uname or /proc/cpuinfo. | ||
202 | |||
203 | For the moment, we have only optimizations for the Intel generations, | ||
204 | but that could change... */ | ||
205 | |||
206 | #define ELF_PLATFORM (NULL) | ||
207 | |||
208 | #define ELF_PLAT_INIT(_r, load_addr) do { \ | ||
209 | memset(_r->gpr, 0, sizeof(_r->gpr)); \ | ||
210 | _r->ctr = _r->link = _r->xer = _r->ccr = 0; \ | ||
211 | _r->gpr[2] = load_addr; \ | ||
212 | } while (0) | ||
213 | |||
214 | #ifdef __KERNEL__ | ||
215 | #define SET_PERSONALITY(ex, ibcs2) \ | ||
216 | do { \ | ||
217 | unsigned long new_flags = 0; \ | ||
218 | if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \ | ||
219 | new_flags = _TIF_32BIT; \ | ||
220 | if ((current_thread_info()->flags & _TIF_32BIT) \ | ||
221 | != new_flags) \ | ||
222 | set_thread_flag(TIF_ABI_PENDING); \ | ||
223 | else \ | ||
224 | clear_thread_flag(TIF_ABI_PENDING); \ | ||
225 | if (personality(current->personality) != PER_LINUX32) \ | ||
226 | set_personality(PER_LINUX); \ | ||
227 | } while (0) | ||
228 | |||
229 | /* | ||
230 | * An executable for which elf_read_implies_exec() returns TRUE will | ||
231 | * have the READ_IMPLIES_EXEC personality flag set automatically. This | ||
232 | * is only required to work around bugs in old 32bit toolchains. Since | ||
233 | * the 64bit ABI has never had these issues dont enable the workaround | ||
234 | * even if we have an executable stack. | ||
235 | */ | ||
236 | #define elf_read_implies_exec(ex, exec_stk) (test_thread_flag(TIF_32BIT) ? \ | ||
237 | (exec_stk != EXSTACK_DISABLE_X) : 0) | ||
238 | |||
239 | #endif | ||
240 | |||
241 | extern int dcache_bsize; | ||
242 | extern int icache_bsize; | ||
243 | extern int ucache_bsize; | ||
244 | |||
245 | /* We do have an arch_setup_additional_pages for vDSO matters */ | ||
246 | #define ARCH_HAS_SETUP_ADDITIONAL_PAGES | ||
247 | struct linux_binprm; | ||
248 | extern int arch_setup_additional_pages(struct linux_binprm *bprm, int executable_stack); | ||
249 | |||
250 | /* | ||
251 | * The requirements here are: | ||
252 | * - keep the final alignment of sp (sp & 0xf) | ||
253 | * - make sure the 32-bit value at the first 16 byte aligned position of | ||
254 | * AUXV is greater than 16 for glibc compatibility. | ||
255 | * AT_IGNOREPPC is used for that. | ||
256 | * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC, | ||
257 | * even if DLINFO_ARCH_ITEMS goes to zero or is undefined. | ||
258 | */ | ||
259 | #define ARCH_DLINFO \ | ||
260 | do { \ | ||
261 | /* Handle glibc compatibility. */ \ | ||
262 | NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \ | ||
263 | NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \ | ||
264 | /* Cache size items */ \ | ||
265 | NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize); \ | ||
266 | NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize); \ | ||
267 | NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize); \ | ||
268 | /* vDSO base */ \ | ||
269 | NEW_AUX_ENT(AT_SYSINFO_EHDR, current->thread.vdso_base); \ | ||
270 | } while (0) | ||
271 | |||
272 | /* PowerPC64 relocations defined by the ABIs */ | ||
273 | #define R_PPC64_NONE R_PPC_NONE | ||
274 | #define R_PPC64_ADDR32 R_PPC_ADDR32 /* 32bit absolute address. */ | ||
275 | #define R_PPC64_ADDR24 R_PPC_ADDR24 /* 26bit address, word aligned. */ | ||
276 | #define R_PPC64_ADDR16 R_PPC_ADDR16 /* 16bit absolute address. */ | ||
277 | #define R_PPC64_ADDR16_LO R_PPC_ADDR16_LO /* lower 16bits of abs. address. */ | ||
278 | #define R_PPC64_ADDR16_HI R_PPC_ADDR16_HI /* high 16bits of abs. address. */ | ||
279 | #define R_PPC64_ADDR16_HA R_PPC_ADDR16_HA /* adjusted high 16bits. */ | ||
280 | #define R_PPC64_ADDR14 R_PPC_ADDR14 /* 16bit address, word aligned. */ | ||
281 | #define R_PPC64_ADDR14_BRTAKEN R_PPC_ADDR14_BRTAKEN | ||
282 | #define R_PPC64_ADDR14_BRNTAKEN R_PPC_ADDR14_BRNTAKEN | ||
283 | #define R_PPC64_REL24 R_PPC_REL24 /* PC relative 26 bit, word aligned. */ | ||
284 | #define R_PPC64_REL14 R_PPC_REL14 /* PC relative 16 bit. */ | ||
285 | #define R_PPC64_REL14_BRTAKEN R_PPC_REL14_BRTAKEN | ||
286 | #define R_PPC64_REL14_BRNTAKEN R_PPC_REL14_BRNTAKEN | ||
287 | #define R_PPC64_GOT16 R_PPC_GOT16 | ||
288 | #define R_PPC64_GOT16_LO R_PPC_GOT16_LO | ||
289 | #define R_PPC64_GOT16_HI R_PPC_GOT16_HI | ||
290 | #define R_PPC64_GOT16_HA R_PPC_GOT16_HA | ||
291 | |||
292 | #define R_PPC64_COPY R_PPC_COPY | ||
293 | #define R_PPC64_GLOB_DAT R_PPC_GLOB_DAT | ||
294 | #define R_PPC64_JMP_SLOT R_PPC_JMP_SLOT | ||
295 | #define R_PPC64_RELATIVE R_PPC_RELATIVE | ||
296 | |||
297 | #define R_PPC64_UADDR32 R_PPC_UADDR32 | ||
298 | #define R_PPC64_UADDR16 R_PPC_UADDR16 | ||
299 | #define R_PPC64_REL32 R_PPC_REL32 | ||
300 | #define R_PPC64_PLT32 R_PPC_PLT32 | ||
301 | #define R_PPC64_PLTREL32 R_PPC_PLTREL32 | ||
302 | #define R_PPC64_PLT16_LO R_PPC_PLT16_LO | ||
303 | #define R_PPC64_PLT16_HI R_PPC_PLT16_HI | ||
304 | #define R_PPC64_PLT16_HA R_PPC_PLT16_HA | ||
305 | |||
306 | #define R_PPC64_SECTOFF R_PPC_SECTOFF | ||
307 | #define R_PPC64_SECTOFF_LO R_PPC_SECTOFF_LO | ||
308 | #define R_PPC64_SECTOFF_HI R_PPC_SECTOFF_HI | ||
309 | #define R_PPC64_SECTOFF_HA R_PPC_SECTOFF_HA | ||
310 | #define R_PPC64_ADDR30 37 /* word30 (S + A - P) >> 2. */ | ||
311 | #define R_PPC64_ADDR64 38 /* doubleword64 S + A. */ | ||
312 | #define R_PPC64_ADDR16_HIGHER 39 /* half16 #higher(S + A). */ | ||
313 | #define R_PPC64_ADDR16_HIGHERA 40 /* half16 #highera(S + A). */ | ||
314 | #define R_PPC64_ADDR16_HIGHEST 41 /* half16 #highest(S + A). */ | ||
315 | #define R_PPC64_ADDR16_HIGHESTA 42 /* half16 #highesta(S + A). */ | ||
316 | #define R_PPC64_UADDR64 43 /* doubleword64 S + A. */ | ||
317 | #define R_PPC64_REL64 44 /* doubleword64 S + A - P. */ | ||
318 | #define R_PPC64_PLT64 45 /* doubleword64 L + A. */ | ||
319 | #define R_PPC64_PLTREL64 46 /* doubleword64 L + A - P. */ | ||
320 | #define R_PPC64_TOC16 47 /* half16* S + A - .TOC. */ | ||
321 | #define R_PPC64_TOC16_LO 48 /* half16 #lo(S + A - .TOC.). */ | ||
322 | #define R_PPC64_TOC16_HI 49 /* half16 #hi(S + A - .TOC.). */ | ||
323 | #define R_PPC64_TOC16_HA 50 /* half16 #ha(S + A - .TOC.). */ | ||
324 | #define R_PPC64_TOC 51 /* doubleword64 .TOC. */ | ||
325 | #define R_PPC64_PLTGOT16 52 /* half16* M + A. */ | ||
326 | #define R_PPC64_PLTGOT16_LO 53 /* half16 #lo(M + A). */ | ||
327 | #define R_PPC64_PLTGOT16_HI 54 /* half16 #hi(M + A). */ | ||
328 | #define R_PPC64_PLTGOT16_HA 55 /* half16 #ha(M + A). */ | ||
329 | |||
330 | #define R_PPC64_ADDR16_DS 56 /* half16ds* (S + A) >> 2. */ | ||
331 | #define R_PPC64_ADDR16_LO_DS 57 /* half16ds #lo(S + A) >> 2. */ | ||
332 | #define R_PPC64_GOT16_DS 58 /* half16ds* (G + A) >> 2. */ | ||
333 | #define R_PPC64_GOT16_LO_DS 59 /* half16ds #lo(G + A) >> 2. */ | ||
334 | #define R_PPC64_PLT16_LO_DS 60 /* half16ds #lo(L + A) >> 2. */ | ||
335 | #define R_PPC64_SECTOFF_DS 61 /* half16ds* (R + A) >> 2. */ | ||
336 | #define R_PPC64_SECTOFF_LO_DS 62 /* half16ds #lo(R + A) >> 2. */ | ||
337 | #define R_PPC64_TOC16_DS 63 /* half16ds* (S + A - .TOC.) >> 2. */ | ||
338 | #define R_PPC64_TOC16_LO_DS 64 /* half16ds #lo(S + A - .TOC.) >> 2. */ | ||
339 | #define R_PPC64_PLTGOT16_DS 65 /* half16ds* (M + A) >> 2. */ | ||
340 | #define R_PPC64_PLTGOT16_LO_DS 66 /* half16ds #lo(M + A) >> 2. */ | ||
341 | |||
342 | /* PowerPC64 relocations defined for the TLS access ABI. */ | ||
343 | #define R_PPC64_TLS 67 /* none (sym+add)@tls */ | ||
344 | #define R_PPC64_DTPMOD64 68 /* doubleword64 (sym+add)@dtpmod */ | ||
345 | #define R_PPC64_TPREL16 69 /* half16* (sym+add)@tprel */ | ||
346 | #define R_PPC64_TPREL16_LO 70 /* half16 (sym+add)@tprel@l */ | ||
347 | #define R_PPC64_TPREL16_HI 71 /* half16 (sym+add)@tprel@h */ | ||
348 | #define R_PPC64_TPREL16_HA 72 /* half16 (sym+add)@tprel@ha */ | ||
349 | #define R_PPC64_TPREL64 73 /* doubleword64 (sym+add)@tprel */ | ||
350 | #define R_PPC64_DTPREL16 74 /* half16* (sym+add)@dtprel */ | ||
351 | #define R_PPC64_DTPREL16_LO 75 /* half16 (sym+add)@dtprel@l */ | ||
352 | #define R_PPC64_DTPREL16_HI 76 /* half16 (sym+add)@dtprel@h */ | ||
353 | #define R_PPC64_DTPREL16_HA 77 /* half16 (sym+add)@dtprel@ha */ | ||
354 | #define R_PPC64_DTPREL64 78 /* doubleword64 (sym+add)@dtprel */ | ||
355 | #define R_PPC64_GOT_TLSGD16 79 /* half16* (sym+add)@got@tlsgd */ | ||
356 | #define R_PPC64_GOT_TLSGD16_LO 80 /* half16 (sym+add)@got@tlsgd@l */ | ||
357 | #define R_PPC64_GOT_TLSGD16_HI 81 /* half16 (sym+add)@got@tlsgd@h */ | ||
358 | #define R_PPC64_GOT_TLSGD16_HA 82 /* half16 (sym+add)@got@tlsgd@ha */ | ||
359 | #define R_PPC64_GOT_TLSLD16 83 /* half16* (sym+add)@got@tlsld */ | ||
360 | #define R_PPC64_GOT_TLSLD16_LO 84 /* half16 (sym+add)@got@tlsld@l */ | ||
361 | #define R_PPC64_GOT_TLSLD16_HI 85 /* half16 (sym+add)@got@tlsld@h */ | ||
362 | #define R_PPC64_GOT_TLSLD16_HA 86 /* half16 (sym+add)@got@tlsld@ha */ | ||
363 | #define R_PPC64_GOT_TPREL16_DS 87 /* half16ds* (sym+add)@got@tprel */ | ||
364 | #define R_PPC64_GOT_TPREL16_LO_DS 88 /* half16ds (sym+add)@got@tprel@l */ | ||
365 | #define R_PPC64_GOT_TPREL16_HI 89 /* half16 (sym+add)@got@tprel@h */ | ||
366 | #define R_PPC64_GOT_TPREL16_HA 90 /* half16 (sym+add)@got@tprel@ha */ | ||
367 | #define R_PPC64_GOT_DTPREL16_DS 91 /* half16ds* (sym+add)@got@dtprel */ | ||
368 | #define R_PPC64_GOT_DTPREL16_LO_DS 92 /* half16ds (sym+add)@got@dtprel@l */ | ||
369 | #define R_PPC64_GOT_DTPREL16_HI 93 /* half16 (sym+add)@got@dtprel@h */ | ||
370 | #define R_PPC64_GOT_DTPREL16_HA 94 /* half16 (sym+add)@got@dtprel@ha */ | ||
371 | #define R_PPC64_TPREL16_DS 95 /* half16ds* (sym+add)@tprel */ | ||
372 | #define R_PPC64_TPREL16_LO_DS 96 /* half16ds (sym+add)@tprel@l */ | ||
373 | #define R_PPC64_TPREL16_HIGHER 97 /* half16 (sym+add)@tprel@higher */ | ||
374 | #define R_PPC64_TPREL16_HIGHERA 98 /* half16 (sym+add)@tprel@highera */ | ||
375 | #define R_PPC64_TPREL16_HIGHEST 99 /* half16 (sym+add)@tprel@highest */ | ||
376 | #define R_PPC64_TPREL16_HIGHESTA 100 /* half16 (sym+add)@tprel@highesta */ | ||
377 | #define R_PPC64_DTPREL16_DS 101 /* half16ds* (sym+add)@dtprel */ | ||
378 | #define R_PPC64_DTPREL16_LO_DS 102 /* half16ds (sym+add)@dtprel@l */ | ||
379 | #define R_PPC64_DTPREL16_HIGHER 103 /* half16 (sym+add)@dtprel@higher */ | ||
380 | #define R_PPC64_DTPREL16_HIGHERA 104 /* half16 (sym+add)@dtprel@highera */ | ||
381 | #define R_PPC64_DTPREL16_HIGHEST 105 /* half16 (sym+add)@dtprel@highest */ | ||
382 | #define R_PPC64_DTPREL16_HIGHESTA 106 /* half16 (sym+add)@dtprel@highesta */ | ||
383 | |||
384 | /* Keep this the last entry. */ | ||
385 | #define R_PPC64_NUM 107 | ||
386 | |||
387 | #endif /* __PPC64_ELF_H */ | ||
diff --git a/include/asm-ppc64/firmware.h b/include/asm-ppc64/firmware.h deleted file mode 100644 index 22bb85cf60af..000000000000 --- a/include/asm-ppc64/firmware.h +++ /dev/null | |||
@@ -1,101 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-ppc64/firmware.h | ||
3 | * | ||
4 | * Extracted from include/asm-ppc64/cputable.h | ||
5 | * | ||
6 | * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) | ||
7 | * | ||
8 | * Modifications for ppc64: | ||
9 | * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or | ||
12 | * modify it under the terms of the GNU General Public License | ||
13 | * as published by the Free Software Foundation; either version | ||
14 | * 2 of the License, or (at your option) any later version. | ||
15 | */ | ||
16 | #ifndef __ASM_PPC_FIRMWARE_H | ||
17 | #define __ASM_PPC_FIRMWARE_H | ||
18 | |||
19 | #ifdef __KERNEL__ | ||
20 | |||
21 | #ifndef __ASSEMBLY__ | ||
22 | |||
23 | /* firmware feature bitmask values */ | ||
24 | #define FIRMWARE_MAX_FEATURES 63 | ||
25 | |||
26 | #define FW_FEATURE_PFT (1UL<<0) | ||
27 | #define FW_FEATURE_TCE (1UL<<1) | ||
28 | #define FW_FEATURE_SPRG0 (1UL<<2) | ||
29 | #define FW_FEATURE_DABR (1UL<<3) | ||
30 | #define FW_FEATURE_COPY (1UL<<4) | ||
31 | #define FW_FEATURE_ASR (1UL<<5) | ||
32 | #define FW_FEATURE_DEBUG (1UL<<6) | ||
33 | #define FW_FEATURE_TERM (1UL<<7) | ||
34 | #define FW_FEATURE_PERF (1UL<<8) | ||
35 | #define FW_FEATURE_DUMP (1UL<<9) | ||
36 | #define FW_FEATURE_INTERRUPT (1UL<<10) | ||
37 | #define FW_FEATURE_MIGRATE (1UL<<11) | ||
38 | #define FW_FEATURE_PERFMON (1UL<<12) | ||
39 | #define FW_FEATURE_CRQ (1UL<<13) | ||
40 | #define FW_FEATURE_VIO (1UL<<14) | ||
41 | #define FW_FEATURE_RDMA (1UL<<15) | ||
42 | #define FW_FEATURE_LLAN (1UL<<16) | ||
43 | #define FW_FEATURE_BULK (1UL<<17) | ||
44 | #define FW_FEATURE_XDABR (1UL<<18) | ||
45 | #define FW_FEATURE_MULTITCE (1UL<<19) | ||
46 | #define FW_FEATURE_SPLPAR (1UL<<20) | ||
47 | #define FW_FEATURE_ISERIES (1UL<<21) | ||
48 | |||
49 | enum { | ||
50 | FW_FEATURE_PSERIES_POSSIBLE = FW_FEATURE_PFT | FW_FEATURE_TCE | | ||
51 | FW_FEATURE_SPRG0 | FW_FEATURE_DABR | FW_FEATURE_COPY | | ||
52 | FW_FEATURE_ASR | FW_FEATURE_DEBUG | FW_FEATURE_TERM | | ||
53 | FW_FEATURE_PERF | FW_FEATURE_DUMP | FW_FEATURE_INTERRUPT | | ||
54 | FW_FEATURE_MIGRATE | FW_FEATURE_PERFMON | FW_FEATURE_CRQ | | ||
55 | FW_FEATURE_VIO | FW_FEATURE_RDMA | FW_FEATURE_LLAN | | ||
56 | FW_FEATURE_BULK | FW_FEATURE_XDABR | FW_FEATURE_MULTITCE | | ||
57 | FW_FEATURE_SPLPAR, | ||
58 | FW_FEATURE_PSERIES_ALWAYS = 0, | ||
59 | FW_FEATURE_ISERIES_POSSIBLE = FW_FEATURE_ISERIES, | ||
60 | FW_FEATURE_ISERIES_ALWAYS = FW_FEATURE_ISERIES, | ||
61 | FW_FEATURE_POSSIBLE = | ||
62 | #ifdef CONFIG_PPC_PSERIES | ||
63 | FW_FEATURE_PSERIES_POSSIBLE | | ||
64 | #endif | ||
65 | #ifdef CONFIG_PPC_ISERIES | ||
66 | FW_FEATURE_ISERIES_POSSIBLE | | ||
67 | #endif | ||
68 | 0, | ||
69 | FW_FEATURE_ALWAYS = | ||
70 | #ifdef CONFIG_PPC_PSERIES | ||
71 | FW_FEATURE_PSERIES_ALWAYS & | ||
72 | #endif | ||
73 | #ifdef CONFIG_PPC_ISERIES | ||
74 | FW_FEATURE_ISERIES_ALWAYS & | ||
75 | #endif | ||
76 | FW_FEATURE_POSSIBLE, | ||
77 | }; | ||
78 | |||
79 | /* This is used to identify firmware features which are available | ||
80 | * to the kernel. | ||
81 | */ | ||
82 | extern unsigned long ppc64_firmware_features; | ||
83 | |||
84 | static inline unsigned long firmware_has_feature(unsigned long feature) | ||
85 | { | ||
86 | return (FW_FEATURE_ALWAYS & feature) || | ||
87 | (FW_FEATURE_POSSIBLE & ppc64_firmware_features & feature); | ||
88 | } | ||
89 | |||
90 | #ifdef CONFIG_PPC_PSERIES | ||
91 | typedef struct { | ||
92 | unsigned long val; | ||
93 | char * name; | ||
94 | } firmware_feature_t; | ||
95 | |||
96 | extern firmware_feature_t firmware_features_table[]; | ||
97 | #endif | ||
98 | |||
99 | #endif /* __ASSEMBLY__ */ | ||
100 | #endif /* __KERNEL__ */ | ||
101 | #endif /* __ASM_PPC_FIRMWARE_H */ | ||
diff --git a/include/asm-ppc64/futex.h b/include/asm-ppc64/futex.h deleted file mode 100644 index cb2640b3a408..000000000000 --- a/include/asm-ppc64/futex.h +++ /dev/null | |||
@@ -1,83 +0,0 @@ | |||
1 | #ifndef _ASM_FUTEX_H | ||
2 | #define _ASM_FUTEX_H | ||
3 | |||
4 | #ifdef __KERNEL__ | ||
5 | |||
6 | #include <linux/futex.h> | ||
7 | #include <asm/errno.h> | ||
8 | #include <asm/memory.h> | ||
9 | #include <asm/uaccess.h> | ||
10 | |||
11 | #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \ | ||
12 | __asm__ __volatile (SYNC_ON_SMP \ | ||
13 | "1: lwarx %0,0,%2\n" \ | ||
14 | insn \ | ||
15 | "2: stwcx. %1,0,%2\n\ | ||
16 | bne- 1b\n\ | ||
17 | li %1,0\n\ | ||
18 | 3: .section .fixup,\"ax\"\n\ | ||
19 | 4: li %1,%3\n\ | ||
20 | b 3b\n\ | ||
21 | .previous\n\ | ||
22 | .section __ex_table,\"a\"\n\ | ||
23 | .align 3\n\ | ||
24 | .llong 1b,4b,2b,4b\n\ | ||
25 | .previous" \ | ||
26 | : "=&r" (oldval), "=&r" (ret) \ | ||
27 | : "b" (uaddr), "i" (-EFAULT), "1" (oparg) \ | ||
28 | : "cr0", "memory") | ||
29 | |||
30 | static inline int | ||
31 | futex_atomic_op_inuser (int encoded_op, int __user *uaddr) | ||
32 | { | ||
33 | int op = (encoded_op >> 28) & 7; | ||
34 | int cmp = (encoded_op >> 24) & 15; | ||
35 | int oparg = (encoded_op << 8) >> 20; | ||
36 | int cmparg = (encoded_op << 20) >> 20; | ||
37 | int oldval = 0, ret; | ||
38 | if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28)) | ||
39 | oparg = 1 << oparg; | ||
40 | |||
41 | if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int))) | ||
42 | return -EFAULT; | ||
43 | |||
44 | inc_preempt_count(); | ||
45 | |||
46 | switch (op) { | ||
47 | case FUTEX_OP_SET: | ||
48 | __futex_atomic_op("", ret, oldval, uaddr, oparg); | ||
49 | break; | ||
50 | case FUTEX_OP_ADD: | ||
51 | __futex_atomic_op("add %1,%0,%1\n", ret, oldval, uaddr, oparg); | ||
52 | break; | ||
53 | case FUTEX_OP_OR: | ||
54 | __futex_atomic_op("or %1,%0,%1\n", ret, oldval, uaddr, oparg); | ||
55 | break; | ||
56 | case FUTEX_OP_ANDN: | ||
57 | __futex_atomic_op("andc %1,%0,%1\n", ret, oldval, uaddr, oparg); | ||
58 | break; | ||
59 | case FUTEX_OP_XOR: | ||
60 | __futex_atomic_op("xor %1,%0,%1\n", ret, oldval, uaddr, oparg); | ||
61 | break; | ||
62 | default: | ||
63 | ret = -ENOSYS; | ||
64 | } | ||
65 | |||
66 | dec_preempt_count(); | ||
67 | |||
68 | if (!ret) { | ||
69 | switch (cmp) { | ||
70 | case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break; | ||
71 | case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break; | ||
72 | case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break; | ||
73 | case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break; | ||
74 | case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break; | ||
75 | case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break; | ||
76 | default: ret = -ENOSYS; | ||
77 | } | ||
78 | } | ||
79 | return ret; | ||
80 | } | ||
81 | |||
82 | #endif | ||
83 | #endif | ||
diff --git a/include/asm-ppc64/hardirq.h b/include/asm-ppc64/hardirq.h deleted file mode 100644 index 4ee72bb1fd48..000000000000 --- a/include/asm-ppc64/hardirq.h +++ /dev/null | |||
@@ -1,27 +0,0 @@ | |||
1 | #ifndef __ASM_HARDIRQ_H | ||
2 | #define __ASM_HARDIRQ_H | ||
3 | |||
4 | /* | ||
5 | * This program is free software; you can redistribute it and/or | ||
6 | * modify it under the terms of the GNU General Public License | ||
7 | * as published by the Free Software Foundation; either version | ||
8 | * 2 of the License, or (at your option) any later version. | ||
9 | */ | ||
10 | |||
11 | #include <linux/config.h> | ||
12 | #include <linux/cache.h> | ||
13 | #include <linux/preempt.h> | ||
14 | |||
15 | typedef struct { | ||
16 | unsigned int __softirq_pending; | ||
17 | } ____cacheline_aligned irq_cpustat_t; | ||
18 | |||
19 | #include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */ | ||
20 | |||
21 | static inline void ack_bad_irq(int irq) | ||
22 | { | ||
23 | printk(KERN_CRIT "illegal vector %d received!\n", irq); | ||
24 | BUG(); | ||
25 | } | ||
26 | |||
27 | #endif /* __ASM_HARDIRQ_H */ | ||
diff --git a/include/asm-ppc64/hw_irq.h b/include/asm-ppc64/hw_irq.h deleted file mode 100644 index baea40e695ec..000000000000 --- a/include/asm-ppc64/hw_irq.h +++ /dev/null | |||
@@ -1,104 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu> | ||
3 | * | ||
4 | * Use inline IRQs where possible - Anton Blanchard <anton@au.ibm.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | #ifdef __KERNEL__ | ||
12 | #ifndef _PPC64_HW_IRQ_H | ||
13 | #define _PPC64_HW_IRQ_H | ||
14 | |||
15 | #include <linux/config.h> | ||
16 | #include <linux/errno.h> | ||
17 | #include <asm/irq.h> | ||
18 | |||
19 | int timer_interrupt(struct pt_regs *); | ||
20 | extern void ppc_irq_dispatch_handler(struct pt_regs *regs, int irq); | ||
21 | |||
22 | #ifdef CONFIG_PPC_ISERIES | ||
23 | |||
24 | extern unsigned long local_get_flags(void); | ||
25 | extern unsigned long local_irq_disable(void); | ||
26 | extern void local_irq_restore(unsigned long); | ||
27 | |||
28 | #define local_irq_enable() local_irq_restore(1) | ||
29 | #define local_save_flags(flags) ((flags) = local_get_flags()) | ||
30 | #define local_irq_save(flags) ((flags) = local_irq_disable()) | ||
31 | |||
32 | #define irqs_disabled() (local_get_flags() == 0) | ||
33 | |||
34 | #else | ||
35 | |||
36 | #define local_save_flags(flags) ((flags) = mfmsr()) | ||
37 | #define local_irq_restore(flags) do { \ | ||
38 | __asm__ __volatile__("": : :"memory"); \ | ||
39 | __mtmsrd((flags), 1); \ | ||
40 | } while(0) | ||
41 | |||
42 | static inline void local_irq_disable(void) | ||
43 | { | ||
44 | unsigned long msr; | ||
45 | msr = mfmsr(); | ||
46 | __mtmsrd(msr & ~MSR_EE, 1); | ||
47 | __asm__ __volatile__("": : :"memory"); | ||
48 | } | ||
49 | |||
50 | static inline void local_irq_enable(void) | ||
51 | { | ||
52 | unsigned long msr; | ||
53 | __asm__ __volatile__("": : :"memory"); | ||
54 | msr = mfmsr(); | ||
55 | __mtmsrd(msr | MSR_EE, 1); | ||
56 | } | ||
57 | |||
58 | static inline void __do_save_and_cli(unsigned long *flags) | ||
59 | { | ||
60 | unsigned long msr; | ||
61 | msr = mfmsr(); | ||
62 | *flags = msr; | ||
63 | __mtmsrd(msr & ~MSR_EE, 1); | ||
64 | __asm__ __volatile__("": : :"memory"); | ||
65 | } | ||
66 | |||
67 | #define local_irq_save(flags) __do_save_and_cli(&flags) | ||
68 | |||
69 | #define irqs_disabled() \ | ||
70 | ({ \ | ||
71 | unsigned long flags; \ | ||
72 | local_save_flags(flags); \ | ||
73 | !(flags & MSR_EE); \ | ||
74 | }) | ||
75 | |||
76 | #endif /* CONFIG_PPC_ISERIES */ | ||
77 | |||
78 | #define mask_irq(irq) \ | ||
79 | ({ \ | ||
80 | irq_desc_t *desc = get_irq_desc(irq); \ | ||
81 | if (desc->handler && desc->handler->disable) \ | ||
82 | desc->handler->disable(irq); \ | ||
83 | }) | ||
84 | #define unmask_irq(irq) \ | ||
85 | ({ \ | ||
86 | irq_desc_t *desc = get_irq_desc(irq); \ | ||
87 | if (desc->handler && desc->handler->enable) \ | ||
88 | desc->handler->enable(irq); \ | ||
89 | }) | ||
90 | #define ack_irq(irq) \ | ||
91 | ({ \ | ||
92 | irq_desc_t *desc = get_irq_desc(irq); \ | ||
93 | if (desc->handler && desc->handler->ack) \ | ||
94 | desc->handler->ack(irq); \ | ||
95 | }) | ||
96 | |||
97 | /* Should we handle this via lost interrupts and IPIs or should we don't care like | ||
98 | * we do now ? --BenH. | ||
99 | */ | ||
100 | struct hw_interrupt_type; | ||
101 | static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) {} | ||
102 | |||
103 | #endif /* _PPC64_HW_IRQ_H */ | ||
104 | #endif /* __KERNEL__ */ | ||
diff --git a/include/asm-ppc64/iSeries/HvCall.h b/include/asm-ppc64/iSeries/HvCall.h deleted file mode 100644 index c3f19475c0d9..000000000000 --- a/include/asm-ppc64/iSeries/HvCall.h +++ /dev/null | |||
@@ -1,113 +0,0 @@ | |||
1 | /* | ||
2 | * HvCall.h | ||
3 | * Copyright (C) 2001 Mike Corrigan IBM Corporation | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | /* | ||
20 | * This file contains the "hypervisor call" interface which is used to | ||
21 | * drive the hypervisor from the OS. | ||
22 | */ | ||
23 | #ifndef _HVCALL_H | ||
24 | #define _HVCALL_H | ||
25 | |||
26 | #include <asm/iSeries/HvCallSc.h> | ||
27 | #include <asm/iSeries/HvTypes.h> | ||
28 | #include <asm/paca.h> | ||
29 | |||
30 | /* Type of yield for HvCallBaseYieldProcessor */ | ||
31 | #define HvCall_YieldTimed 0 /* Yield until specified time (tb) */ | ||
32 | #define HvCall_YieldToActive 1 /* Yield until all active procs have run */ | ||
33 | #define HvCall_YieldToProc 2 /* Yield until the specified processor has run */ | ||
34 | |||
35 | /* interrupt masks for setEnabledInterrupts */ | ||
36 | #define HvCall_MaskIPI 0x00000001 | ||
37 | #define HvCall_MaskLpEvent 0x00000002 | ||
38 | #define HvCall_MaskLpProd 0x00000004 | ||
39 | #define HvCall_MaskTimeout 0x00000008 | ||
40 | |||
41 | /* Log buffer formats */ | ||
42 | #define HvCall_LogBuffer_ASCII 0 | ||
43 | #define HvCall_LogBuffer_EBCDIC 1 | ||
44 | |||
45 | #define HvCallBaseAckDeferredInts HvCallBase + 0 | ||
46 | #define HvCallBaseCpmPowerOff HvCallBase + 1 | ||
47 | #define HvCallBaseGetHwPatch HvCallBase + 2 | ||
48 | #define HvCallBaseReIplSpAttn HvCallBase + 3 | ||
49 | #define HvCallBaseSetASR HvCallBase + 4 | ||
50 | #define HvCallBaseSetASRAndRfi HvCallBase + 5 | ||
51 | #define HvCallBaseSetIMR HvCallBase + 6 | ||
52 | #define HvCallBaseSendIPI HvCallBase + 7 | ||
53 | #define HvCallBaseTerminateMachine HvCallBase + 8 | ||
54 | #define HvCallBaseTerminateMachineSrc HvCallBase + 9 | ||
55 | #define HvCallBaseProcessPlicInterrupts HvCallBase + 10 | ||
56 | #define HvCallBaseIsPrimaryCpmOrMsdIpl HvCallBase + 11 | ||
57 | #define HvCallBaseSetVirtualSIT HvCallBase + 12 | ||
58 | #define HvCallBaseVaryOffThisProcessor HvCallBase + 13 | ||
59 | #define HvCallBaseVaryOffMemoryChunk HvCallBase + 14 | ||
60 | #define HvCallBaseVaryOffInteractivePercentage HvCallBase + 15 | ||
61 | #define HvCallBaseSendLpProd HvCallBase + 16 | ||
62 | #define HvCallBaseSetEnabledInterrupts HvCallBase + 17 | ||
63 | #define HvCallBaseYieldProcessor HvCallBase + 18 | ||
64 | #define HvCallBaseVaryOffSharedProcUnits HvCallBase + 19 | ||
65 | #define HvCallBaseSetVirtualDecr HvCallBase + 20 | ||
66 | #define HvCallBaseClearLogBuffer HvCallBase + 21 | ||
67 | #define HvCallBaseGetLogBufferCodePage HvCallBase + 22 | ||
68 | #define HvCallBaseGetLogBufferFormat HvCallBase + 23 | ||
69 | #define HvCallBaseGetLogBufferLength HvCallBase + 24 | ||
70 | #define HvCallBaseReadLogBuffer HvCallBase + 25 | ||
71 | #define HvCallBaseSetLogBufferFormatAndCodePage HvCallBase + 26 | ||
72 | #define HvCallBaseWriteLogBuffer HvCallBase + 27 | ||
73 | #define HvCallBaseRouter28 HvCallBase + 28 | ||
74 | #define HvCallBaseRouter29 HvCallBase + 29 | ||
75 | #define HvCallBaseRouter30 HvCallBase + 30 | ||
76 | #define HvCallBaseSetDebugBus HvCallBase + 31 | ||
77 | |||
78 | #define HvCallCcSetDABR HvCallCc + 7 | ||
79 | |||
80 | static inline void HvCall_setVirtualDecr(void) | ||
81 | { | ||
82 | /* | ||
83 | * Ignore any error return codes - most likely means that the | ||
84 | * target value for the LP has been increased and this vary off | ||
85 | * would bring us below the new target. | ||
86 | */ | ||
87 | HvCall0(HvCallBaseSetVirtualDecr); | ||
88 | } | ||
89 | |||
90 | static inline void HvCall_yieldProcessor(unsigned typeOfYield, u64 yieldParm) | ||
91 | { | ||
92 | HvCall2(HvCallBaseYieldProcessor, typeOfYield, yieldParm); | ||
93 | } | ||
94 | |||
95 | static inline void HvCall_setEnabledInterrupts(u64 enabledInterrupts) | ||
96 | { | ||
97 | HvCall1(HvCallBaseSetEnabledInterrupts, enabledInterrupts); | ||
98 | } | ||
99 | |||
100 | static inline void HvCall_setLogBufferFormatAndCodepage(int format, | ||
101 | u32 codePage) | ||
102 | { | ||
103 | HvCall2(HvCallBaseSetLogBufferFormatAndCodePage, format, codePage); | ||
104 | } | ||
105 | |||
106 | extern void HvCall_writeLogBuffer(const void *buffer, u64 bufLen); | ||
107 | |||
108 | static inline void HvCall_sendIPI(struct paca_struct *targetPaca) | ||
109 | { | ||
110 | HvCall1(HvCallBaseSendIPI, targetPaca->paca_index); | ||
111 | } | ||
112 | |||
113 | #endif /* _HVCALL_H */ | ||
diff --git a/include/asm-ppc64/iSeries/HvCallEvent.h b/include/asm-ppc64/iSeries/HvCallEvent.h deleted file mode 100644 index 5d9a327d0122..000000000000 --- a/include/asm-ppc64/iSeries/HvCallEvent.h +++ /dev/null | |||
@@ -1,253 +0,0 @@ | |||
1 | /* | ||
2 | * HvCallEvent.h | ||
3 | * Copyright (C) 2001 Mike Corrigan IBM Corporation | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | /* | ||
20 | * This file contains the "hypervisor call" interface which is used to | ||
21 | * drive the hypervisor from the OS. | ||
22 | */ | ||
23 | #ifndef _HVCALLEVENT_H | ||
24 | #define _HVCALLEVENT_H | ||
25 | |||
26 | #include <asm/iSeries/HvCallSc.h> | ||
27 | #include <asm/iSeries/HvTypes.h> | ||
28 | #include <asm/abs_addr.h> | ||
29 | |||
30 | struct HvLpEvent; | ||
31 | |||
32 | typedef u8 HvLpEvent_Type; | ||
33 | typedef u8 HvLpEvent_AckInd; | ||
34 | typedef u8 HvLpEvent_AckType; | ||
35 | |||
36 | struct HvCallEvent_PackedParms { | ||
37 | u8 xAckType:1; | ||
38 | u8 xAckInd:1; | ||
39 | u8 xRsvd:1; | ||
40 | u8 xTargetLp:5; | ||
41 | u8 xType; | ||
42 | u16 xSubtype; | ||
43 | HvLpInstanceId xSourceInstId; | ||
44 | HvLpInstanceId xTargetInstId; | ||
45 | }; | ||
46 | |||
47 | typedef u8 HvLpDma_Direction; | ||
48 | typedef u8 HvLpDma_AddressType; | ||
49 | |||
50 | struct HvCallEvent_PackedDmaParms { | ||
51 | u8 xDirection:1; | ||
52 | u8 xLocalAddrType:1; | ||
53 | u8 xRemoteAddrType:1; | ||
54 | u8 xRsvd1:5; | ||
55 | HvLpIndex xRemoteLp; | ||
56 | u8 xType; | ||
57 | u8 xRsvd2; | ||
58 | HvLpInstanceId xLocalInstId; | ||
59 | HvLpInstanceId xRemoteInstId; | ||
60 | }; | ||
61 | |||
62 | typedef u64 HvLpEvent_Rc; | ||
63 | typedef u64 HvLpDma_Rc; | ||
64 | |||
65 | #define HvCallEventAckLpEvent HvCallEvent + 0 | ||
66 | #define HvCallEventCancelLpEvent HvCallEvent + 1 | ||
67 | #define HvCallEventCloseLpEventPath HvCallEvent + 2 | ||
68 | #define HvCallEventDmaBufList HvCallEvent + 3 | ||
69 | #define HvCallEventDmaSingle HvCallEvent + 4 | ||
70 | #define HvCallEventDmaToSp HvCallEvent + 5 | ||
71 | #define HvCallEventGetOverflowLpEvents HvCallEvent + 6 | ||
72 | #define HvCallEventGetSourceLpInstanceId HvCallEvent + 7 | ||
73 | #define HvCallEventGetTargetLpInstanceId HvCallEvent + 8 | ||
74 | #define HvCallEventOpenLpEventPath HvCallEvent + 9 | ||
75 | #define HvCallEventSetLpEventStack HvCallEvent + 10 | ||
76 | #define HvCallEventSignalLpEvent HvCallEvent + 11 | ||
77 | #define HvCallEventSignalLpEventParms HvCallEvent + 12 | ||
78 | #define HvCallEventSetInterLpQueueIndex HvCallEvent + 13 | ||
79 | #define HvCallEventSetLpEventQueueInterruptProc HvCallEvent + 14 | ||
80 | #define HvCallEventRouter15 HvCallEvent + 15 | ||
81 | |||
82 | static inline void HvCallEvent_getOverflowLpEvents(u8 queueIndex) | ||
83 | { | ||
84 | HvCall1(HvCallEventGetOverflowLpEvents, queueIndex); | ||
85 | } | ||
86 | |||
87 | static inline void HvCallEvent_setInterLpQueueIndex(u8 queueIndex) | ||
88 | { | ||
89 | HvCall1(HvCallEventSetInterLpQueueIndex, queueIndex); | ||
90 | } | ||
91 | |||
92 | static inline void HvCallEvent_setLpEventStack(u8 queueIndex, | ||
93 | char *eventStackAddr, u32 eventStackSize) | ||
94 | { | ||
95 | u64 abs_addr; | ||
96 | |||
97 | abs_addr = virt_to_abs(eventStackAddr); | ||
98 | HvCall3(HvCallEventSetLpEventStack, queueIndex, abs_addr, | ||
99 | eventStackSize); | ||
100 | } | ||
101 | |||
102 | static inline void HvCallEvent_setLpEventQueueInterruptProc(u8 queueIndex, | ||
103 | u16 lpLogicalProcIndex) | ||
104 | { | ||
105 | HvCall2(HvCallEventSetLpEventQueueInterruptProc, queueIndex, | ||
106 | lpLogicalProcIndex); | ||
107 | } | ||
108 | |||
109 | static inline HvLpEvent_Rc HvCallEvent_signalLpEvent(struct HvLpEvent *event) | ||
110 | { | ||
111 | u64 abs_addr; | ||
112 | |||
113 | #ifdef DEBUG_SENDEVENT | ||
114 | printk("HvCallEvent_signalLpEvent: *event = %016lx\n ", | ||
115 | (unsigned long)event); | ||
116 | #endif | ||
117 | abs_addr = virt_to_abs(event); | ||
118 | return HvCall1(HvCallEventSignalLpEvent, abs_addr); | ||
119 | } | ||
120 | |||
121 | static inline HvLpEvent_Rc HvCallEvent_signalLpEventFast(HvLpIndex targetLp, | ||
122 | HvLpEvent_Type type, u16 subtype, HvLpEvent_AckInd ackInd, | ||
123 | HvLpEvent_AckType ackType, HvLpInstanceId sourceInstanceId, | ||
124 | HvLpInstanceId targetInstanceId, u64 correlationToken, | ||
125 | u64 eventData1, u64 eventData2, u64 eventData3, | ||
126 | u64 eventData4, u64 eventData5) | ||
127 | { | ||
128 | /* Pack the misc bits into a single Dword to pass to PLIC */ | ||
129 | union { | ||
130 | struct HvCallEvent_PackedParms parms; | ||
131 | u64 dword; | ||
132 | } packed; | ||
133 | packed.parms.xAckType = ackType; | ||
134 | packed.parms.xAckInd = ackInd; | ||
135 | packed.parms.xRsvd = 0; | ||
136 | packed.parms.xTargetLp = targetLp; | ||
137 | packed.parms.xType = type; | ||
138 | packed.parms.xSubtype = subtype; | ||
139 | packed.parms.xSourceInstId = sourceInstanceId; | ||
140 | packed.parms.xTargetInstId = targetInstanceId; | ||
141 | |||
142 | return HvCall7(HvCallEventSignalLpEventParms, packed.dword, | ||
143 | correlationToken, eventData1, eventData2, | ||
144 | eventData3, eventData4, eventData5); | ||
145 | } | ||
146 | |||
147 | static inline HvLpEvent_Rc HvCallEvent_ackLpEvent(struct HvLpEvent *event) | ||
148 | { | ||
149 | u64 abs_addr; | ||
150 | |||
151 | abs_addr = virt_to_abs(event); | ||
152 | return HvCall1(HvCallEventAckLpEvent, abs_addr); | ||
153 | } | ||
154 | |||
155 | static inline HvLpEvent_Rc HvCallEvent_cancelLpEvent(struct HvLpEvent *event) | ||
156 | { | ||
157 | u64 abs_addr; | ||
158 | |||
159 | abs_addr = virt_to_abs(event); | ||
160 | return HvCall1(HvCallEventCancelLpEvent, abs_addr); | ||
161 | } | ||
162 | |||
163 | static inline HvLpInstanceId HvCallEvent_getSourceLpInstanceId( | ||
164 | HvLpIndex targetLp, HvLpEvent_Type type) | ||
165 | { | ||
166 | return HvCall2(HvCallEventGetSourceLpInstanceId, targetLp, type); | ||
167 | } | ||
168 | |||
169 | static inline HvLpInstanceId HvCallEvent_getTargetLpInstanceId( | ||
170 | HvLpIndex targetLp, HvLpEvent_Type type) | ||
171 | { | ||
172 | return HvCall2(HvCallEventGetTargetLpInstanceId, targetLp, type); | ||
173 | } | ||
174 | |||
175 | static inline void HvCallEvent_openLpEventPath(HvLpIndex targetLp, | ||
176 | HvLpEvent_Type type) | ||
177 | { | ||
178 | HvCall2(HvCallEventOpenLpEventPath, targetLp, type); | ||
179 | } | ||
180 | |||
181 | static inline void HvCallEvent_closeLpEventPath(HvLpIndex targetLp, | ||
182 | HvLpEvent_Type type) | ||
183 | { | ||
184 | HvCall2(HvCallEventCloseLpEventPath, targetLp, type); | ||
185 | } | ||
186 | |||
187 | static inline HvLpDma_Rc HvCallEvent_dmaBufList(HvLpEvent_Type type, | ||
188 | HvLpIndex remoteLp, HvLpDma_Direction direction, | ||
189 | HvLpInstanceId localInstanceId, | ||
190 | HvLpInstanceId remoteInstanceId, | ||
191 | HvLpDma_AddressType localAddressType, | ||
192 | HvLpDma_AddressType remoteAddressType, | ||
193 | /* Do these need to be converted to absolute addresses? */ | ||
194 | u64 localBufList, u64 remoteBufList, u32 transferLength) | ||
195 | { | ||
196 | /* Pack the misc bits into a single Dword to pass to PLIC */ | ||
197 | union { | ||
198 | struct HvCallEvent_PackedDmaParms parms; | ||
199 | u64 dword; | ||
200 | } packed; | ||
201 | |||
202 | packed.parms.xDirection = direction; | ||
203 | packed.parms.xLocalAddrType = localAddressType; | ||
204 | packed.parms.xRemoteAddrType = remoteAddressType; | ||
205 | packed.parms.xRsvd1 = 0; | ||
206 | packed.parms.xRemoteLp = remoteLp; | ||
207 | packed.parms.xType = type; | ||
208 | packed.parms.xRsvd2 = 0; | ||
209 | packed.parms.xLocalInstId = localInstanceId; | ||
210 | packed.parms.xRemoteInstId = remoteInstanceId; | ||
211 | |||
212 | return HvCall4(HvCallEventDmaBufList, packed.dword, localBufList, | ||
213 | remoteBufList, transferLength); | ||
214 | } | ||
215 | |||
216 | static inline HvLpDma_Rc HvCallEvent_dmaSingle(HvLpEvent_Type type, | ||
217 | HvLpIndex remoteLp, HvLpDma_Direction direction, | ||
218 | HvLpInstanceId localInstanceId, | ||
219 | HvLpInstanceId remoteInstanceId, | ||
220 | HvLpDma_AddressType localAddressType, | ||
221 | HvLpDma_AddressType remoteAddressType, | ||
222 | u64 localAddrOrTce, u64 remoteAddrOrTce, u32 transferLength) | ||
223 | { | ||
224 | /* Pack the misc bits into a single Dword to pass to PLIC */ | ||
225 | union { | ||
226 | struct HvCallEvent_PackedDmaParms parms; | ||
227 | u64 dword; | ||
228 | } packed; | ||
229 | |||
230 | packed.parms.xDirection = direction; | ||
231 | packed.parms.xLocalAddrType = localAddressType; | ||
232 | packed.parms.xRemoteAddrType = remoteAddressType; | ||
233 | packed.parms.xRsvd1 = 0; | ||
234 | packed.parms.xRemoteLp = remoteLp; | ||
235 | packed.parms.xType = type; | ||
236 | packed.parms.xRsvd2 = 0; | ||
237 | packed.parms.xLocalInstId = localInstanceId; | ||
238 | packed.parms.xRemoteInstId = remoteInstanceId; | ||
239 | |||
240 | return (HvLpDma_Rc)HvCall4(HvCallEventDmaSingle, packed.dword, | ||
241 | localAddrOrTce, remoteAddrOrTce, transferLength); | ||
242 | } | ||
243 | |||
244 | static inline HvLpDma_Rc HvCallEvent_dmaToSp(void *local, u32 remote, | ||
245 | u32 length, HvLpDma_Direction dir) | ||
246 | { | ||
247 | u64 abs_addr; | ||
248 | |||
249 | abs_addr = virt_to_abs(local); | ||
250 | return HvCall4(HvCallEventDmaToSp, abs_addr, remote, length, dir); | ||
251 | } | ||
252 | |||
253 | #endif /* _HVCALLEVENT_H */ | ||
diff --git a/include/asm-ppc64/iSeries/HvCallHpt.h b/include/asm-ppc64/iSeries/HvCallHpt.h deleted file mode 100644 index 43a1969230b8..000000000000 --- a/include/asm-ppc64/iSeries/HvCallHpt.h +++ /dev/null | |||
@@ -1,102 +0,0 @@ | |||
1 | /* | ||
2 | * HvCallHpt.h | ||
3 | * Copyright (C) 2001 Mike Corrigan IBM Corporation | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | #ifndef _HVCALLHPT_H | ||
20 | #define _HVCALLHPT_H | ||
21 | |||
22 | /* | ||
23 | * This file contains the "hypervisor call" interface which is used to | ||
24 | * drive the hypervisor from the OS. | ||
25 | */ | ||
26 | |||
27 | #include <asm/iSeries/HvCallSc.h> | ||
28 | #include <asm/iSeries/HvTypes.h> | ||
29 | #include <asm/mmu.h> | ||
30 | |||
31 | #define HvCallHptGetHptAddress HvCallHpt + 0 | ||
32 | #define HvCallHptGetHptPages HvCallHpt + 1 | ||
33 | #define HvCallHptSetPp HvCallHpt + 5 | ||
34 | #define HvCallHptSetSwBits HvCallHpt + 6 | ||
35 | #define HvCallHptUpdate HvCallHpt + 7 | ||
36 | #define HvCallHptInvalidateNoSyncICache HvCallHpt + 8 | ||
37 | #define HvCallHptGet HvCallHpt + 11 | ||
38 | #define HvCallHptFindNextValid HvCallHpt + 12 | ||
39 | #define HvCallHptFindValid HvCallHpt + 13 | ||
40 | #define HvCallHptAddValidate HvCallHpt + 16 | ||
41 | #define HvCallHptInvalidateSetSwBitsGet HvCallHpt + 18 | ||
42 | |||
43 | |||
44 | static inline u64 HvCallHpt_getHptAddress(void) | ||
45 | { | ||
46 | return HvCall0(HvCallHptGetHptAddress); | ||
47 | } | ||
48 | |||
49 | static inline u64 HvCallHpt_getHptPages(void) | ||
50 | { | ||
51 | return HvCall0(HvCallHptGetHptPages); | ||
52 | } | ||
53 | |||
54 | static inline void HvCallHpt_setPp(u32 hpteIndex, u8 value) | ||
55 | { | ||
56 | HvCall2(HvCallHptSetPp, hpteIndex, value); | ||
57 | } | ||
58 | |||
59 | static inline void HvCallHpt_setSwBits(u32 hpteIndex, u8 bitson, u8 bitsoff) | ||
60 | { | ||
61 | HvCall3(HvCallHptSetSwBits, hpteIndex, bitson, bitsoff); | ||
62 | } | ||
63 | |||
64 | static inline void HvCallHpt_invalidateNoSyncICache(u32 hpteIndex) | ||
65 | { | ||
66 | HvCall1(HvCallHptInvalidateNoSyncICache, hpteIndex); | ||
67 | } | ||
68 | |||
69 | static inline u64 HvCallHpt_invalidateSetSwBitsGet(u32 hpteIndex, u8 bitson, | ||
70 | u8 bitsoff) | ||
71 | { | ||
72 | u64 compressedStatus; | ||
73 | |||
74 | compressedStatus = HvCall4(HvCallHptInvalidateSetSwBitsGet, | ||
75 | hpteIndex, bitson, bitsoff, 1); | ||
76 | HvCall1(HvCallHptInvalidateNoSyncICache, hpteIndex); | ||
77 | return compressedStatus; | ||
78 | } | ||
79 | |||
80 | static inline u64 HvCallHpt_findValid(hpte_t *hpte, u64 vpn) | ||
81 | { | ||
82 | return HvCall3Ret16(HvCallHptFindValid, hpte, vpn, 0, 0); | ||
83 | } | ||
84 | |||
85 | static inline u64 HvCallHpt_findNextValid(hpte_t *hpte, u32 hpteIndex, | ||
86 | u8 bitson, u8 bitsoff) | ||
87 | { | ||
88 | return HvCall3Ret16(HvCallHptFindNextValid, hpte, hpteIndex, | ||
89 | bitson, bitsoff); | ||
90 | } | ||
91 | |||
92 | static inline void HvCallHpt_get(hpte_t *hpte, u32 hpteIndex) | ||
93 | { | ||
94 | HvCall2Ret16(HvCallHptGet, hpte, hpteIndex, 0); | ||
95 | } | ||
96 | |||
97 | static inline void HvCallHpt_addValidate(u32 hpteIndex, u32 hBit, hpte_t *hpte) | ||
98 | { | ||
99 | HvCall4(HvCallHptAddValidate, hpteIndex, hBit, hpte->v, hpte->r); | ||
100 | } | ||
101 | |||
102 | #endif /* _HVCALLHPT_H */ | ||
diff --git a/include/asm-ppc64/iSeries/HvCallPci.h b/include/asm-ppc64/iSeries/HvCallPci.h deleted file mode 100644 index c8d675c40f5e..000000000000 --- a/include/asm-ppc64/iSeries/HvCallPci.h +++ /dev/null | |||
@@ -1,533 +0,0 @@ | |||
1 | /* | ||
2 | * Provides the Hypervisor PCI calls for iSeries Linux Parition. | ||
3 | * Copyright (C) 2001 <Wayne G Holm> <IBM Corporation> | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the: | ||
17 | * Free Software Foundation, Inc., | ||
18 | * 59 Temple Place, Suite 330, | ||
19 | * Boston, MA 02111-1307 USA | ||
20 | * | ||
21 | * Change Activity: | ||
22 | * Created, Jan 9, 2001 | ||
23 | */ | ||
24 | |||
25 | #ifndef _HVCALLPCI_H | ||
26 | #define _HVCALLPCI_H | ||
27 | |||
28 | #include <asm/iSeries/HvCallSc.h> | ||
29 | #include <asm/iSeries/HvTypes.h> | ||
30 | |||
31 | /* | ||
32 | * DSA == Direct Select Address | ||
33 | * this struct must be 64 bits in total | ||
34 | */ | ||
35 | struct HvCallPci_DsaAddr { | ||
36 | u16 busNumber; /* PHB index? */ | ||
37 | u8 subBusNumber; /* PCI bus number? */ | ||
38 | u8 deviceId; /* device and function? */ | ||
39 | u8 barNumber; | ||
40 | u8 reserved[3]; | ||
41 | }; | ||
42 | |||
43 | union HvDsaMap { | ||
44 | u64 DsaAddr; | ||
45 | struct HvCallPci_DsaAddr Dsa; | ||
46 | }; | ||
47 | |||
48 | struct HvCallPci_LoadReturn { | ||
49 | u64 rc; | ||
50 | u64 value; | ||
51 | }; | ||
52 | |||
53 | enum HvCallPci_DeviceType { | ||
54 | HvCallPci_NodeDevice = 1, | ||
55 | HvCallPci_SpDevice = 2, | ||
56 | HvCallPci_IopDevice = 3, | ||
57 | HvCallPci_BridgeDevice = 4, | ||
58 | HvCallPci_MultiFunctionDevice = 5, | ||
59 | HvCallPci_IoaDevice = 6 | ||
60 | }; | ||
61 | |||
62 | |||
63 | struct HvCallPci_DeviceInfo { | ||
64 | u32 deviceType; /* See DeviceType enum for values */ | ||
65 | }; | ||
66 | |||
67 | struct HvCallPci_BusUnitInfo { | ||
68 | u32 sizeReturned; /* length of data returned */ | ||
69 | u32 deviceType; /* see DeviceType enum for values */ | ||
70 | }; | ||
71 | |||
72 | struct HvCallPci_BridgeInfo { | ||
73 | struct HvCallPci_BusUnitInfo busUnitInfo; /* Generic bus unit info */ | ||
74 | u8 subBusNumber; /* Bus number of secondary bus */ | ||
75 | u8 maxAgents; /* Max idsels on secondary bus */ | ||
76 | u8 maxSubBusNumber; /* Max Sub Bus */ | ||
77 | u8 logicalSlotNumber; /* Logical Slot Number for IOA */ | ||
78 | }; | ||
79 | |||
80 | |||
81 | /* | ||
82 | * Maximum BusUnitInfo buffer size. Provided for clients so | ||
83 | * they can allocate a buffer big enough for any type of bus | ||
84 | * unit. Increase as needed. | ||
85 | */ | ||
86 | enum {HvCallPci_MaxBusUnitInfoSize = 128}; | ||
87 | |||
88 | struct HvCallPci_BarParms { | ||
89 | u64 vaddr; | ||
90 | u64 raddr; | ||
91 | u64 size; | ||
92 | u64 protectStart; | ||
93 | u64 protectEnd; | ||
94 | u64 relocationOffset; | ||
95 | u64 pciAddress; | ||
96 | u64 reserved[3]; | ||
97 | }; | ||
98 | |||
99 | enum HvCallPci_VpdType { | ||
100 | HvCallPci_BusVpd = 1, | ||
101 | HvCallPci_BusAdapterVpd = 2 | ||
102 | }; | ||
103 | |||
104 | #define HvCallPciConfigLoad8 HvCallPci + 0 | ||
105 | #define HvCallPciConfigLoad16 HvCallPci + 1 | ||
106 | #define HvCallPciConfigLoad32 HvCallPci + 2 | ||
107 | #define HvCallPciConfigStore8 HvCallPci + 3 | ||
108 | #define HvCallPciConfigStore16 HvCallPci + 4 | ||
109 | #define HvCallPciConfigStore32 HvCallPci + 5 | ||
110 | #define HvCallPciEoi HvCallPci + 16 | ||
111 | #define HvCallPciGetBarParms HvCallPci + 18 | ||
112 | #define HvCallPciMaskFisr HvCallPci + 20 | ||
113 | #define HvCallPciUnmaskFisr HvCallPci + 21 | ||
114 | #define HvCallPciSetSlotReset HvCallPci + 25 | ||
115 | #define HvCallPciGetDeviceInfo HvCallPci + 27 | ||
116 | #define HvCallPciGetCardVpd HvCallPci + 28 | ||
117 | #define HvCallPciBarLoad8 HvCallPci + 40 | ||
118 | #define HvCallPciBarLoad16 HvCallPci + 41 | ||
119 | #define HvCallPciBarLoad32 HvCallPci + 42 | ||
120 | #define HvCallPciBarLoad64 HvCallPci + 43 | ||
121 | #define HvCallPciBarStore8 HvCallPci + 44 | ||
122 | #define HvCallPciBarStore16 HvCallPci + 45 | ||
123 | #define HvCallPciBarStore32 HvCallPci + 46 | ||
124 | #define HvCallPciBarStore64 HvCallPci + 47 | ||
125 | #define HvCallPciMaskInterrupts HvCallPci + 48 | ||
126 | #define HvCallPciUnmaskInterrupts HvCallPci + 49 | ||
127 | #define HvCallPciGetBusUnitInfo HvCallPci + 50 | ||
128 | |||
129 | static inline u64 HvCallPci_configLoad8(u16 busNumber, u8 subBusNumber, | ||
130 | u8 deviceId, u32 offset, u8 *value) | ||
131 | { | ||
132 | struct HvCallPci_DsaAddr dsa; | ||
133 | struct HvCallPci_LoadReturn retVal; | ||
134 | |||
135 | *((u64*)&dsa) = 0; | ||
136 | |||
137 | dsa.busNumber = busNumber; | ||
138 | dsa.subBusNumber = subBusNumber; | ||
139 | dsa.deviceId = deviceId; | ||
140 | |||
141 | HvCall3Ret16(HvCallPciConfigLoad8, &retVal, *(u64 *)&dsa, offset, 0); | ||
142 | |||
143 | *value = retVal.value; | ||
144 | |||
145 | return retVal.rc; | ||
146 | } | ||
147 | |||
148 | static inline u64 HvCallPci_configLoad16(u16 busNumber, u8 subBusNumber, | ||
149 | u8 deviceId, u32 offset, u16 *value) | ||
150 | { | ||
151 | struct HvCallPci_DsaAddr dsa; | ||
152 | struct HvCallPci_LoadReturn retVal; | ||
153 | |||
154 | *((u64*)&dsa) = 0; | ||
155 | |||
156 | dsa.busNumber = busNumber; | ||
157 | dsa.subBusNumber = subBusNumber; | ||
158 | dsa.deviceId = deviceId; | ||
159 | |||
160 | HvCall3Ret16(HvCallPciConfigLoad16, &retVal, *(u64 *)&dsa, offset, 0); | ||
161 | |||
162 | *value = retVal.value; | ||
163 | |||
164 | return retVal.rc; | ||
165 | } | ||
166 | |||
167 | static inline u64 HvCallPci_configLoad32(u16 busNumber, u8 subBusNumber, | ||
168 | u8 deviceId, u32 offset, u32 *value) | ||
169 | { | ||
170 | struct HvCallPci_DsaAddr dsa; | ||
171 | struct HvCallPci_LoadReturn retVal; | ||
172 | |||
173 | *((u64*)&dsa) = 0; | ||
174 | |||
175 | dsa.busNumber = busNumber; | ||
176 | dsa.subBusNumber = subBusNumber; | ||
177 | dsa.deviceId = deviceId; | ||
178 | |||
179 | HvCall3Ret16(HvCallPciConfigLoad32, &retVal, *(u64 *)&dsa, offset, 0); | ||
180 | |||
181 | *value = retVal.value; | ||
182 | |||
183 | return retVal.rc; | ||
184 | } | ||
185 | |||
186 | static inline u64 HvCallPci_configStore8(u16 busNumber, u8 subBusNumber, | ||
187 | u8 deviceId, u32 offset, u8 value) | ||
188 | { | ||
189 | struct HvCallPci_DsaAddr dsa; | ||
190 | |||
191 | *((u64*)&dsa) = 0; | ||
192 | |||
193 | dsa.busNumber = busNumber; | ||
194 | dsa.subBusNumber = subBusNumber; | ||
195 | dsa.deviceId = deviceId; | ||
196 | |||
197 | return HvCall4(HvCallPciConfigStore8, *(u64 *)&dsa, offset, value, 0); | ||
198 | } | ||
199 | |||
200 | static inline u64 HvCallPci_configStore16(u16 busNumber, u8 subBusNumber, | ||
201 | u8 deviceId, u32 offset, u16 value) | ||
202 | { | ||
203 | struct HvCallPci_DsaAddr dsa; | ||
204 | |||
205 | *((u64*)&dsa) = 0; | ||
206 | |||
207 | dsa.busNumber = busNumber; | ||
208 | dsa.subBusNumber = subBusNumber; | ||
209 | dsa.deviceId = deviceId; | ||
210 | |||
211 | return HvCall4(HvCallPciConfigStore16, *(u64 *)&dsa, offset, value, 0); | ||
212 | } | ||
213 | |||
214 | static inline u64 HvCallPci_configStore32(u16 busNumber, u8 subBusNumber, | ||
215 | u8 deviceId, u32 offset, u32 value) | ||
216 | { | ||
217 | struct HvCallPci_DsaAddr dsa; | ||
218 | |||
219 | *((u64*)&dsa) = 0; | ||
220 | |||
221 | dsa.busNumber = busNumber; | ||
222 | dsa.subBusNumber = subBusNumber; | ||
223 | dsa.deviceId = deviceId; | ||
224 | |||
225 | return HvCall4(HvCallPciConfigStore32, *(u64 *)&dsa, offset, value, 0); | ||
226 | } | ||
227 | |||
228 | static inline u64 HvCallPci_barLoad8(u16 busNumberParm, u8 subBusParm, | ||
229 | u8 deviceIdParm, u8 barNumberParm, u64 offsetParm, | ||
230 | u8 *valueParm) | ||
231 | { | ||
232 | struct HvCallPci_DsaAddr dsa; | ||
233 | struct HvCallPci_LoadReturn retVal; | ||
234 | |||
235 | *((u64*)&dsa) = 0; | ||
236 | |||
237 | dsa.busNumber = busNumberParm; | ||
238 | dsa.subBusNumber = subBusParm; | ||
239 | dsa.deviceId = deviceIdParm; | ||
240 | dsa.barNumber = barNumberParm; | ||
241 | |||
242 | HvCall3Ret16(HvCallPciBarLoad8, &retVal, *(u64 *)&dsa, offsetParm, 0); | ||
243 | |||
244 | *valueParm = retVal.value; | ||
245 | |||
246 | return retVal.rc; | ||
247 | } | ||
248 | |||
249 | static inline u64 HvCallPci_barLoad16(u16 busNumberParm, u8 subBusParm, | ||
250 | u8 deviceIdParm, u8 barNumberParm, u64 offsetParm, | ||
251 | u16 *valueParm) | ||
252 | { | ||
253 | struct HvCallPci_DsaAddr dsa; | ||
254 | struct HvCallPci_LoadReturn retVal; | ||
255 | |||
256 | *((u64*)&dsa) = 0; | ||
257 | |||
258 | dsa.busNumber = busNumberParm; | ||
259 | dsa.subBusNumber = subBusParm; | ||
260 | dsa.deviceId = deviceIdParm; | ||
261 | dsa.barNumber = barNumberParm; | ||
262 | |||
263 | HvCall3Ret16(HvCallPciBarLoad16, &retVal, *(u64 *)&dsa, offsetParm, 0); | ||
264 | |||
265 | *valueParm = retVal.value; | ||
266 | |||
267 | return retVal.rc; | ||
268 | } | ||
269 | |||
270 | static inline u64 HvCallPci_barLoad32(u16 busNumberParm, u8 subBusParm, | ||
271 | u8 deviceIdParm, u8 barNumberParm, u64 offsetParm, | ||
272 | u32 *valueParm) | ||
273 | { | ||
274 | struct HvCallPci_DsaAddr dsa; | ||
275 | struct HvCallPci_LoadReturn retVal; | ||
276 | |||
277 | *((u64*)&dsa) = 0; | ||
278 | |||
279 | dsa.busNumber = busNumberParm; | ||
280 | dsa.subBusNumber = subBusParm; | ||
281 | dsa.deviceId = deviceIdParm; | ||
282 | dsa.barNumber = barNumberParm; | ||
283 | |||
284 | HvCall3Ret16(HvCallPciBarLoad32, &retVal, *(u64 *)&dsa, offsetParm, 0); | ||
285 | |||
286 | *valueParm = retVal.value; | ||
287 | |||
288 | return retVal.rc; | ||
289 | } | ||
290 | |||
291 | static inline u64 HvCallPci_barLoad64(u16 busNumberParm, u8 subBusParm, | ||
292 | u8 deviceIdParm, u8 barNumberParm, u64 offsetParm, | ||
293 | u64 *valueParm) | ||
294 | { | ||
295 | struct HvCallPci_DsaAddr dsa; | ||
296 | struct HvCallPci_LoadReturn retVal; | ||
297 | |||
298 | *((u64*)&dsa) = 0; | ||
299 | |||
300 | dsa.busNumber = busNumberParm; | ||
301 | dsa.subBusNumber = subBusParm; | ||
302 | dsa.deviceId = deviceIdParm; | ||
303 | dsa.barNumber = barNumberParm; | ||
304 | |||
305 | HvCall3Ret16(HvCallPciBarLoad64, &retVal, *(u64 *)&dsa, offsetParm, 0); | ||
306 | |||
307 | *valueParm = retVal.value; | ||
308 | |||
309 | return retVal.rc; | ||
310 | } | ||
311 | |||
312 | static inline u64 HvCallPci_barStore8(u16 busNumberParm, u8 subBusParm, | ||
313 | u8 deviceIdParm, u8 barNumberParm, u64 offsetParm, | ||
314 | u8 valueParm) | ||
315 | { | ||
316 | struct HvCallPci_DsaAddr dsa; | ||
317 | |||
318 | *((u64*)&dsa) = 0; | ||
319 | |||
320 | dsa.busNumber = busNumberParm; | ||
321 | dsa.subBusNumber = subBusParm; | ||
322 | dsa.deviceId = deviceIdParm; | ||
323 | dsa.barNumber = barNumberParm; | ||
324 | |||
325 | return HvCall4(HvCallPciBarStore8, *(u64 *)&dsa, offsetParm, | ||
326 | valueParm, 0); | ||
327 | } | ||
328 | |||
329 | static inline u64 HvCallPci_barStore16(u16 busNumberParm, u8 subBusParm, | ||
330 | u8 deviceIdParm, u8 barNumberParm, u64 offsetParm, | ||
331 | u16 valueParm) | ||
332 | { | ||
333 | struct HvCallPci_DsaAddr dsa; | ||
334 | |||
335 | *((u64*)&dsa) = 0; | ||
336 | |||
337 | dsa.busNumber = busNumberParm; | ||
338 | dsa.subBusNumber = subBusParm; | ||
339 | dsa.deviceId = deviceIdParm; | ||
340 | dsa.barNumber = barNumberParm; | ||
341 | |||
342 | return HvCall4(HvCallPciBarStore16, *(u64 *)&dsa, offsetParm, | ||
343 | valueParm, 0); | ||
344 | } | ||
345 | |||
346 | static inline u64 HvCallPci_barStore32(u16 busNumberParm, u8 subBusParm, | ||
347 | u8 deviceIdParm, u8 barNumberParm, u64 offsetParm, | ||
348 | u32 valueParm) | ||
349 | { | ||
350 | struct HvCallPci_DsaAddr dsa; | ||
351 | |||
352 | *((u64*)&dsa) = 0; | ||
353 | |||
354 | dsa.busNumber = busNumberParm; | ||
355 | dsa.subBusNumber = subBusParm; | ||
356 | dsa.deviceId = deviceIdParm; | ||
357 | dsa.barNumber = barNumberParm; | ||
358 | |||
359 | return HvCall4(HvCallPciBarStore32, *(u64 *)&dsa, offsetParm, | ||
360 | valueParm, 0); | ||
361 | } | ||
362 | |||
363 | static inline u64 HvCallPci_barStore64(u16 busNumberParm, u8 subBusParm, | ||
364 | u8 deviceIdParm, u8 barNumberParm, u64 offsetParm, | ||
365 | u64 valueParm) | ||
366 | { | ||
367 | struct HvCallPci_DsaAddr dsa; | ||
368 | |||
369 | *((u64*)&dsa) = 0; | ||
370 | |||
371 | dsa.busNumber = busNumberParm; | ||
372 | dsa.subBusNumber = subBusParm; | ||
373 | dsa.deviceId = deviceIdParm; | ||
374 | dsa.barNumber = barNumberParm; | ||
375 | |||
376 | return HvCall4(HvCallPciBarStore64, *(u64 *)&dsa, offsetParm, | ||
377 | valueParm, 0); | ||
378 | } | ||
379 | |||
380 | static inline u64 HvCallPci_eoi(u16 busNumberParm, u8 subBusParm, | ||
381 | u8 deviceIdParm) | ||
382 | { | ||
383 | struct HvCallPci_DsaAddr dsa; | ||
384 | struct HvCallPci_LoadReturn retVal; | ||
385 | |||
386 | *((u64*)&dsa) = 0; | ||
387 | |||
388 | dsa.busNumber = busNumberParm; | ||
389 | dsa.subBusNumber = subBusParm; | ||
390 | dsa.deviceId = deviceIdParm; | ||
391 | |||
392 | HvCall1Ret16(HvCallPciEoi, &retVal, *(u64*)&dsa); | ||
393 | |||
394 | return retVal.rc; | ||
395 | } | ||
396 | |||
397 | static inline u64 HvCallPci_getBarParms(u16 busNumberParm, u8 subBusParm, | ||
398 | u8 deviceIdParm, u8 barNumberParm, u64 parms, u32 sizeofParms) | ||
399 | { | ||
400 | struct HvCallPci_DsaAddr dsa; | ||
401 | |||
402 | *((u64*)&dsa) = 0; | ||
403 | |||
404 | dsa.busNumber = busNumberParm; | ||
405 | dsa.subBusNumber = subBusParm; | ||
406 | dsa.deviceId = deviceIdParm; | ||
407 | dsa.barNumber = barNumberParm; | ||
408 | |||
409 | return HvCall3(HvCallPciGetBarParms, *(u64*)&dsa, parms, sizeofParms); | ||
410 | } | ||
411 | |||
412 | static inline u64 HvCallPci_maskFisr(u16 busNumberParm, u8 subBusParm, | ||
413 | u8 deviceIdParm, u64 fisrMask) | ||
414 | { | ||
415 | struct HvCallPci_DsaAddr dsa; | ||
416 | |||
417 | *((u64*)&dsa) = 0; | ||
418 | |||
419 | dsa.busNumber = busNumberParm; | ||
420 | dsa.subBusNumber = subBusParm; | ||
421 | dsa.deviceId = deviceIdParm; | ||
422 | |||
423 | return HvCall2(HvCallPciMaskFisr, *(u64*)&dsa, fisrMask); | ||
424 | } | ||
425 | |||
426 | static inline u64 HvCallPci_unmaskFisr(u16 busNumberParm, u8 subBusParm, | ||
427 | u8 deviceIdParm, u64 fisrMask) | ||
428 | { | ||
429 | struct HvCallPci_DsaAddr dsa; | ||
430 | |||
431 | *((u64*)&dsa) = 0; | ||
432 | |||
433 | dsa.busNumber = busNumberParm; | ||
434 | dsa.subBusNumber = subBusParm; | ||
435 | dsa.deviceId = deviceIdParm; | ||
436 | |||
437 | return HvCall2(HvCallPciUnmaskFisr, *(u64*)&dsa, fisrMask); | ||
438 | } | ||
439 | |||
440 | static inline u64 HvCallPci_setSlotReset(u16 busNumberParm, u8 subBusParm, | ||
441 | u8 deviceIdParm, u64 onNotOff) | ||
442 | { | ||
443 | struct HvCallPci_DsaAddr dsa; | ||
444 | |||
445 | *((u64*)&dsa) = 0; | ||
446 | |||
447 | dsa.busNumber = busNumberParm; | ||
448 | dsa.subBusNumber = subBusParm; | ||
449 | dsa.deviceId = deviceIdParm; | ||
450 | |||
451 | return HvCall2(HvCallPciSetSlotReset, *(u64*)&dsa, onNotOff); | ||
452 | } | ||
453 | |||
454 | static inline u64 HvCallPci_getDeviceInfo(u16 busNumberParm, u8 subBusParm, | ||
455 | u8 deviceNumberParm, u64 parms, u32 sizeofParms) | ||
456 | { | ||
457 | struct HvCallPci_DsaAddr dsa; | ||
458 | |||
459 | *((u64*)&dsa) = 0; | ||
460 | |||
461 | dsa.busNumber = busNumberParm; | ||
462 | dsa.subBusNumber = subBusParm; | ||
463 | dsa.deviceId = deviceNumberParm << 4; | ||
464 | |||
465 | return HvCall3(HvCallPciGetDeviceInfo, *(u64*)&dsa, parms, sizeofParms); | ||
466 | } | ||
467 | |||
468 | static inline u64 HvCallPci_maskInterrupts(u16 busNumberParm, u8 subBusParm, | ||
469 | u8 deviceIdParm, u64 interruptMask) | ||
470 | { | ||
471 | struct HvCallPci_DsaAddr dsa; | ||
472 | |||
473 | *((u64*)&dsa) = 0; | ||
474 | |||
475 | dsa.busNumber = busNumberParm; | ||
476 | dsa.subBusNumber = subBusParm; | ||
477 | dsa.deviceId = deviceIdParm; | ||
478 | |||
479 | return HvCall2(HvCallPciMaskInterrupts, *(u64*)&dsa, interruptMask); | ||
480 | } | ||
481 | |||
482 | static inline u64 HvCallPci_unmaskInterrupts(u16 busNumberParm, u8 subBusParm, | ||
483 | u8 deviceIdParm, u64 interruptMask) | ||
484 | { | ||
485 | struct HvCallPci_DsaAddr dsa; | ||
486 | |||
487 | *((u64*)&dsa) = 0; | ||
488 | |||
489 | dsa.busNumber = busNumberParm; | ||
490 | dsa.subBusNumber = subBusParm; | ||
491 | dsa.deviceId = deviceIdParm; | ||
492 | |||
493 | return HvCall2(HvCallPciUnmaskInterrupts, *(u64*)&dsa, interruptMask); | ||
494 | } | ||
495 | |||
496 | static inline u64 HvCallPci_getBusUnitInfo(u16 busNumberParm, u8 subBusParm, | ||
497 | u8 deviceIdParm, u64 parms, u32 sizeofParms) | ||
498 | { | ||
499 | struct HvCallPci_DsaAddr dsa; | ||
500 | |||
501 | *((u64*)&dsa) = 0; | ||
502 | |||
503 | dsa.busNumber = busNumberParm; | ||
504 | dsa.subBusNumber = subBusParm; | ||
505 | dsa.deviceId = deviceIdParm; | ||
506 | |||
507 | return HvCall3(HvCallPciGetBusUnitInfo, *(u64*)&dsa, parms, | ||
508 | sizeofParms); | ||
509 | } | ||
510 | |||
511 | static inline int HvCallPci_getBusVpd(u16 busNumParm, u64 destParm, | ||
512 | u16 sizeParm) | ||
513 | { | ||
514 | u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm, | ||
515 | sizeParm, HvCallPci_BusVpd); | ||
516 | if (xRc == -1) | ||
517 | return -1; | ||
518 | else | ||
519 | return xRc & 0xFFFF; | ||
520 | } | ||
521 | |||
522 | static inline int HvCallPci_getBusAdapterVpd(u16 busNumParm, u64 destParm, | ||
523 | u16 sizeParm) | ||
524 | { | ||
525 | u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm, | ||
526 | sizeParm, HvCallPci_BusAdapterVpd); | ||
527 | if (xRc == -1) | ||
528 | return -1; | ||
529 | else | ||
530 | return xRc & 0xFFFF; | ||
531 | } | ||
532 | |||
533 | #endif /* _HVCALLPCI_H */ | ||
diff --git a/include/asm-ppc64/iSeries/HvCallSc.h b/include/asm-ppc64/iSeries/HvCallSc.h deleted file mode 100644 index a62cef3822f9..000000000000 --- a/include/asm-ppc64/iSeries/HvCallSc.h +++ /dev/null | |||
@@ -1,51 +0,0 @@ | |||
1 | /* | ||
2 | * HvCallSc.h | ||
3 | * Copyright (C) 2001 Mike Corrigan IBM Corporation | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | #ifndef _HVCALLSC_H | ||
20 | #define _HVCALLSC_H | ||
21 | |||
22 | #include <linux/types.h> | ||
23 | |||
24 | #define HvCallBase 0x8000000000000000ul | ||
25 | #define HvCallCc 0x8001000000000000ul | ||
26 | #define HvCallCfg 0x8002000000000000ul | ||
27 | #define HvCallEvent 0x8003000000000000ul | ||
28 | #define HvCallHpt 0x8004000000000000ul | ||
29 | #define HvCallPci 0x8005000000000000ul | ||
30 | #define HvCallSm 0x8007000000000000ul | ||
31 | #define HvCallXm 0x8009000000000000ul | ||
32 | |||
33 | extern u64 HvCall0(u64); | ||
34 | extern u64 HvCall1(u64, u64); | ||
35 | extern u64 HvCall2(u64, u64, u64); | ||
36 | extern u64 HvCall3(u64, u64, u64, u64); | ||
37 | extern u64 HvCall4(u64, u64, u64, u64, u64); | ||
38 | extern u64 HvCall5(u64, u64, u64, u64, u64, u64); | ||
39 | extern u64 HvCall6(u64, u64, u64, u64, u64, u64, u64); | ||
40 | extern u64 HvCall7(u64, u64, u64, u64, u64, u64, u64, u64); | ||
41 | |||
42 | extern u64 HvCall0Ret16(u64, void *); | ||
43 | extern u64 HvCall1Ret16(u64, void *, u64); | ||
44 | extern u64 HvCall2Ret16(u64, void *, u64, u64); | ||
45 | extern u64 HvCall3Ret16(u64, void *, u64, u64, u64); | ||
46 | extern u64 HvCall4Ret16(u64, void *, u64, u64, u64, u64); | ||
47 | extern u64 HvCall5Ret16(u64, void *, u64, u64, u64, u64, u64); | ||
48 | extern u64 HvCall6Ret16(u64, void *, u64, u64, u64, u64, u64, u64); | ||
49 | extern u64 HvCall7Ret16(u64, void *, u64, u64 ,u64 ,u64 ,u64 ,u64 ,u64); | ||
50 | |||
51 | #endif /* _HVCALLSC_H */ | ||
diff --git a/include/asm-ppc64/iSeries/HvCallSm.h b/include/asm-ppc64/iSeries/HvCallSm.h deleted file mode 100644 index 8a3dbb071a43..000000000000 --- a/include/asm-ppc64/iSeries/HvCallSm.h +++ /dev/null | |||
@@ -1,38 +0,0 @@ | |||
1 | /* | ||
2 | * HvCallSm.h | ||
3 | * Copyright (C) 2001 Mike Corrigan IBM Corporation | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | #ifndef _HVCALLSM_H | ||
20 | #define _HVCALLSM_H | ||
21 | |||
22 | /* | ||
23 | * This file contains the "hypervisor call" interface which is used to | ||
24 | * drive the hypervisor from the OS. | ||
25 | */ | ||
26 | |||
27 | #include <asm/iSeries/HvCallSc.h> | ||
28 | #include <asm/iSeries/HvTypes.h> | ||
29 | |||
30 | #define HvCallSmGet64BitsOfAccessMap HvCallSm + 11 | ||
31 | |||
32 | static inline u64 HvCallSm_get64BitsOfAccessMap(HvLpIndex lpIndex, | ||
33 | u64 indexIntoBitMap) | ||
34 | { | ||
35 | return HvCall2(HvCallSmGet64BitsOfAccessMap, lpIndex, indexIntoBitMap); | ||
36 | } | ||
37 | |||
38 | #endif /* _HVCALLSM_H */ | ||
diff --git a/include/asm-ppc64/iSeries/HvCallXm.h b/include/asm-ppc64/iSeries/HvCallXm.h deleted file mode 100644 index 8b9ba608daaf..000000000000 --- a/include/asm-ppc64/iSeries/HvCallXm.h +++ /dev/null | |||
@@ -1,78 +0,0 @@ | |||
1 | /* | ||
2 | * This file contains the "hypervisor call" interface which is used to | ||
3 | * drive the hypervisor from SLIC. | ||
4 | */ | ||
5 | #ifndef _HVCALLXM_H | ||
6 | #define _HVCALLXM_H | ||
7 | |||
8 | #include <asm/iSeries/HvCallSc.h> | ||
9 | #include <asm/iSeries/HvTypes.h> | ||
10 | |||
11 | #define HvCallXmGetTceTableParms HvCallXm + 0 | ||
12 | #define HvCallXmTestBus HvCallXm + 1 | ||
13 | #define HvCallXmConnectBusUnit HvCallXm + 2 | ||
14 | #define HvCallXmLoadTod HvCallXm + 8 | ||
15 | #define HvCallXmTestBusUnit HvCallXm + 9 | ||
16 | #define HvCallXmSetTce HvCallXm + 11 | ||
17 | #define HvCallXmSetTces HvCallXm + 13 | ||
18 | |||
19 | /* | ||
20 | * Structure passed to HvCallXm_getTceTableParms | ||
21 | */ | ||
22 | struct iommu_table_cb { | ||
23 | unsigned long itc_busno; /* Bus number for this tce table */ | ||
24 | unsigned long itc_start; /* Will be NULL for secondary */ | ||
25 | unsigned long itc_totalsize; /* Size (in pages) of whole table */ | ||
26 | unsigned long itc_offset; /* Index into real tce table of the | ||
27 | start of our section */ | ||
28 | unsigned long itc_size; /* Size (in pages) of our section */ | ||
29 | unsigned long itc_index; /* Index of this tce table */ | ||
30 | unsigned short itc_maxtables; /* Max num of tables for partition */ | ||
31 | unsigned char itc_virtbus; /* Flag to indicate virtual bus */ | ||
32 | unsigned char itc_slotno; /* IOA Tce Slot Index */ | ||
33 | unsigned char itc_rsvd[4]; | ||
34 | }; | ||
35 | |||
36 | static inline void HvCallXm_getTceTableParms(u64 cb) | ||
37 | { | ||
38 | HvCall1(HvCallXmGetTceTableParms, cb); | ||
39 | } | ||
40 | |||
41 | static inline u64 HvCallXm_setTce(u64 tceTableToken, u64 tceOffset, u64 tce) | ||
42 | { | ||
43 | return HvCall3(HvCallXmSetTce, tceTableToken, tceOffset, tce); | ||
44 | } | ||
45 | |||
46 | static inline u64 HvCallXm_setTces(u64 tceTableToken, u64 tceOffset, | ||
47 | u64 numTces, u64 tce1, u64 tce2, u64 tce3, u64 tce4) | ||
48 | { | ||
49 | return HvCall7(HvCallXmSetTces, tceTableToken, tceOffset, numTces, | ||
50 | tce1, tce2, tce3, tce4); | ||
51 | } | ||
52 | |||
53 | static inline u64 HvCallXm_testBus(u16 busNumber) | ||
54 | { | ||
55 | return HvCall1(HvCallXmTestBus, busNumber); | ||
56 | } | ||
57 | |||
58 | static inline u64 HvCallXm_testBusUnit(u16 busNumber, u8 subBusNumber, | ||
59 | u8 deviceId) | ||
60 | { | ||
61 | return HvCall2(HvCallXmTestBusUnit, busNumber, | ||
62 | (subBusNumber << 8) | deviceId); | ||
63 | } | ||
64 | |||
65 | static inline u64 HvCallXm_connectBusUnit(u16 busNumber, u8 subBusNumber, | ||
66 | u8 deviceId, u64 interruptToken) | ||
67 | { | ||
68 | return HvCall5(HvCallXmConnectBusUnit, busNumber, | ||
69 | (subBusNumber << 8) | deviceId, interruptToken, 0, | ||
70 | 0 /* HvLpConfig::mapDsaToQueueIndex(HvLpDSA(busNumber, xBoard, xCard)) */); | ||
71 | } | ||
72 | |||
73 | static inline u64 HvCallXm_loadTod(void) | ||
74 | { | ||
75 | return HvCall0(HvCallXmLoadTod); | ||
76 | } | ||
77 | |||
78 | #endif /* _HVCALLXM_H */ | ||
diff --git a/include/asm-ppc64/iSeries/HvLpConfig.h b/include/asm-ppc64/iSeries/HvLpConfig.h deleted file mode 100644 index f1cf1e70ca3c..000000000000 --- a/include/asm-ppc64/iSeries/HvLpConfig.h +++ /dev/null | |||
@@ -1,138 +0,0 @@ | |||
1 | /* | ||
2 | * HvLpConfig.h | ||
3 | * Copyright (C) 2001 Mike Corrigan IBM Corporation | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | #ifndef _HVLPCONFIG_H | ||
20 | #define _HVLPCONFIG_H | ||
21 | |||
22 | /* | ||
23 | * This file contains the interface to the LPAR configuration data | ||
24 | * to determine which resources should be allocated to each partition. | ||
25 | */ | ||
26 | |||
27 | #include <asm/iSeries/HvCallSc.h> | ||
28 | #include <asm/iSeries/HvTypes.h> | ||
29 | #include <asm/iSeries/ItLpNaca.h> | ||
30 | |||
31 | enum { | ||
32 | HvCallCfg_Cur = 0, | ||
33 | HvCallCfg_Init = 1, | ||
34 | HvCallCfg_Max = 2, | ||
35 | HvCallCfg_Min = 3 | ||
36 | }; | ||
37 | |||
38 | #define HvCallCfgGetSystemPhysicalProcessors HvCallCfg + 6 | ||
39 | #define HvCallCfgGetPhysicalProcessors HvCallCfg + 7 | ||
40 | #define HvCallCfgGetMsChunks HvCallCfg + 9 | ||
41 | #define HvCallCfgGetSharedPoolIndex HvCallCfg + 20 | ||
42 | #define HvCallCfgGetSharedProcUnits HvCallCfg + 21 | ||
43 | #define HvCallCfgGetNumProcsInSharedPool HvCallCfg + 22 | ||
44 | #define HvCallCfgGetVirtualLanIndexMap HvCallCfg + 30 | ||
45 | #define HvCallCfgGetHostingLpIndex HvCallCfg + 32 | ||
46 | |||
47 | extern HvLpIndex HvLpConfig_getLpIndex_outline(void); | ||
48 | |||
49 | static inline HvLpIndex HvLpConfig_getLpIndex(void) | ||
50 | { | ||
51 | return itLpNaca.xLpIndex; | ||
52 | } | ||
53 | |||
54 | static inline HvLpIndex HvLpConfig_getPrimaryLpIndex(void) | ||
55 | { | ||
56 | return itLpNaca.xPrimaryLpIndex; | ||
57 | } | ||
58 | |||
59 | static inline u64 HvLpConfig_getMsChunks(void) | ||
60 | { | ||
61 | return HvCall2(HvCallCfgGetMsChunks, HvLpConfig_getLpIndex(), | ||
62 | HvCallCfg_Cur); | ||
63 | } | ||
64 | |||
65 | static inline u64 HvLpConfig_getSystemPhysicalProcessors(void) | ||
66 | { | ||
67 | return HvCall0(HvCallCfgGetSystemPhysicalProcessors); | ||
68 | } | ||
69 | |||
70 | static inline u64 HvLpConfig_getNumProcsInSharedPool(HvLpSharedPoolIndex sPI) | ||
71 | { | ||
72 | return (u16)HvCall1(HvCallCfgGetNumProcsInSharedPool, sPI); | ||
73 | } | ||
74 | |||
75 | static inline u64 HvLpConfig_getPhysicalProcessors(void) | ||
76 | { | ||
77 | return HvCall2(HvCallCfgGetPhysicalProcessors, HvLpConfig_getLpIndex(), | ||
78 | HvCallCfg_Cur); | ||
79 | } | ||
80 | |||
81 | static inline HvLpSharedPoolIndex HvLpConfig_getSharedPoolIndex(void) | ||
82 | { | ||
83 | return HvCall1(HvCallCfgGetSharedPoolIndex, HvLpConfig_getLpIndex()); | ||
84 | } | ||
85 | |||
86 | static inline u64 HvLpConfig_getSharedProcUnits(void) | ||
87 | { | ||
88 | return HvCall2(HvCallCfgGetSharedProcUnits, HvLpConfig_getLpIndex(), | ||
89 | HvCallCfg_Cur); | ||
90 | } | ||
91 | |||
92 | static inline u64 HvLpConfig_getMaxSharedProcUnits(void) | ||
93 | { | ||
94 | return HvCall2(HvCallCfgGetSharedProcUnits, HvLpConfig_getLpIndex(), | ||
95 | HvCallCfg_Max); | ||
96 | } | ||
97 | |||
98 | static inline u64 HvLpConfig_getMaxPhysicalProcessors(void) | ||
99 | { | ||
100 | return HvCall2(HvCallCfgGetPhysicalProcessors, HvLpConfig_getLpIndex(), | ||
101 | HvCallCfg_Max); | ||
102 | } | ||
103 | |||
104 | static inline HvLpVirtualLanIndexMap HvLpConfig_getVirtualLanIndexMapForLp( | ||
105 | HvLpIndex lp) | ||
106 | { | ||
107 | /* | ||
108 | * This is a new function in V5R1 so calls to this on older | ||
109 | * hypervisors will return -1 | ||
110 | */ | ||
111 | u64 retVal = HvCall1(HvCallCfgGetVirtualLanIndexMap, lp); | ||
112 | if (retVal == -1) | ||
113 | retVal = 0; | ||
114 | return retVal; | ||
115 | } | ||
116 | |||
117 | static inline HvLpVirtualLanIndexMap HvLpConfig_getVirtualLanIndexMap(void) | ||
118 | { | ||
119 | return HvLpConfig_getVirtualLanIndexMapForLp( | ||
120 | HvLpConfig_getLpIndex_outline()); | ||
121 | } | ||
122 | |||
123 | static inline int HvLpConfig_doLpsCommunicateOnVirtualLan(HvLpIndex lp1, | ||
124 | HvLpIndex lp2) | ||
125 | { | ||
126 | HvLpVirtualLanIndexMap virtualLanIndexMap1 = | ||
127 | HvLpConfig_getVirtualLanIndexMapForLp(lp1); | ||
128 | HvLpVirtualLanIndexMap virtualLanIndexMap2 = | ||
129 | HvLpConfig_getVirtualLanIndexMapForLp(lp2); | ||
130 | return ((virtualLanIndexMap1 & virtualLanIndexMap2) != 0); | ||
131 | } | ||
132 | |||
133 | static inline HvLpIndex HvLpConfig_getHostingLpIndex(HvLpIndex lp) | ||
134 | { | ||
135 | return HvCall1(HvCallCfgGetHostingLpIndex, lp); | ||
136 | } | ||
137 | |||
138 | #endif /* _HVLPCONFIG_H */ | ||
diff --git a/include/asm-ppc64/iSeries/HvLpEvent.h b/include/asm-ppc64/iSeries/HvLpEvent.h deleted file mode 100644 index 865000de79b6..000000000000 --- a/include/asm-ppc64/iSeries/HvLpEvent.h +++ /dev/null | |||
@@ -1,142 +0,0 @@ | |||
1 | /* | ||
2 | * HvLpEvent.h | ||
3 | * Copyright (C) 2001 Mike Corrigan IBM Corporation | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | |||
20 | /* This file contains the class for HV events in the system. */ | ||
21 | |||
22 | #ifndef _HVLPEVENT_H | ||
23 | #define _HVLPEVENT_H | ||
24 | |||
25 | #include <asm/types.h> | ||
26 | #include <asm/ptrace.h> | ||
27 | #include <asm/iSeries/HvTypes.h> | ||
28 | #include <asm/iSeries/HvCallEvent.h> | ||
29 | |||
30 | /* | ||
31 | * HvLpEvent is the structure for Lp Event messages passed between | ||
32 | * partitions through PLIC. | ||
33 | */ | ||
34 | |||
35 | struct HvEventFlags { | ||
36 | u8 xValid:1; /* Indicates a valid request x00-x00 */ | ||
37 | u8 xRsvd1:4; /* Reserved ... */ | ||
38 | u8 xAckType:1; /* Immediate or deferred ... */ | ||
39 | u8 xAckInd:1; /* Indicates if ACK required ... */ | ||
40 | u8 xFunction:1; /* Interrupt or Acknowledge ... */ | ||
41 | }; | ||
42 | |||
43 | |||
44 | struct HvLpEvent { | ||
45 | struct HvEventFlags xFlags; /* Event flags x00-x00 */ | ||
46 | u8 xType; /* Type of message x01-x01 */ | ||
47 | u16 xSubtype; /* Subtype for event x02-x03 */ | ||
48 | u8 xSourceLp; /* Source LP x04-x04 */ | ||
49 | u8 xTargetLp; /* Target LP x05-x05 */ | ||
50 | u8 xSizeMinus1; /* Size of Derived class - 1 x06-x06 */ | ||
51 | u8 xRc; /* RC for Ack flows x07-x07 */ | ||
52 | u16 xSourceInstanceId; /* Source sides instance id x08-x09 */ | ||
53 | u16 xTargetInstanceId; /* Target sides instance id x0A-x0B */ | ||
54 | union { | ||
55 | u32 xSubtypeData; /* Data usable by the subtype x0C-x0F */ | ||
56 | u16 xSubtypeDataShort[2]; /* Data as 2 shorts */ | ||
57 | u8 xSubtypeDataChar[4]; /* Data as 4 chars */ | ||
58 | } x; | ||
59 | |||
60 | u64 xCorrelationToken; /* Unique value for source/type x10-x17 */ | ||
61 | }; | ||
62 | |||
63 | typedef void (*LpEventHandler)(struct HvLpEvent *, struct pt_regs *); | ||
64 | |||
65 | /* Register a handler for an event type - returns 0 on success */ | ||
66 | extern int HvLpEvent_registerHandler(HvLpEvent_Type eventType, | ||
67 | LpEventHandler hdlr); | ||
68 | |||
69 | /* | ||
70 | * Unregister a handler for an event type | ||
71 | * | ||
72 | * This call will sleep until the handler being removed is guaranteed to | ||
73 | * be no longer executing on any CPU. Do not call with locks held. | ||
74 | * | ||
75 | * returns 0 on success | ||
76 | * Unregister will fail if there are any paths open for the type | ||
77 | */ | ||
78 | extern int HvLpEvent_unregisterHandler(HvLpEvent_Type eventType); | ||
79 | |||
80 | /* | ||
81 | * Open an Lp Event Path for an event type | ||
82 | * returns 0 on success | ||
83 | * openPath will fail if there is no handler registered for the event type. | ||
84 | * The lpIndex specified is the partition index for the target partition | ||
85 | * (for VirtualIo, VirtualLan and SessionMgr) other types specify zero) | ||
86 | */ | ||
87 | extern int HvLpEvent_openPath(HvLpEvent_Type eventType, HvLpIndex lpIndex); | ||
88 | |||
89 | /* | ||
90 | * Close an Lp Event Path for a type and partition | ||
91 | * returns 0 on sucess | ||
92 | */ | ||
93 | extern int HvLpEvent_closePath(HvLpEvent_Type eventType, HvLpIndex lpIndex); | ||
94 | |||
95 | #define HvLpEvent_Type_Hypervisor 0 | ||
96 | #define HvLpEvent_Type_MachineFac 1 | ||
97 | #define HvLpEvent_Type_SessionMgr 2 | ||
98 | #define HvLpEvent_Type_SpdIo 3 | ||
99 | #define HvLpEvent_Type_VirtualBus 4 | ||
100 | #define HvLpEvent_Type_PciIo 5 | ||
101 | #define HvLpEvent_Type_RioIo 6 | ||
102 | #define HvLpEvent_Type_VirtualLan 7 | ||
103 | #define HvLpEvent_Type_VirtualIo 8 | ||
104 | #define HvLpEvent_Type_NumTypes 9 | ||
105 | |||
106 | #define HvLpEvent_Rc_Good 0 | ||
107 | #define HvLpEvent_Rc_BufferNotAvailable 1 | ||
108 | #define HvLpEvent_Rc_Cancelled 2 | ||
109 | #define HvLpEvent_Rc_GenericError 3 | ||
110 | #define HvLpEvent_Rc_InvalidAddress 4 | ||
111 | #define HvLpEvent_Rc_InvalidPartition 5 | ||
112 | #define HvLpEvent_Rc_InvalidSize 6 | ||
113 | #define HvLpEvent_Rc_InvalidSubtype 7 | ||
114 | #define HvLpEvent_Rc_InvalidSubtypeData 8 | ||
115 | #define HvLpEvent_Rc_InvalidType 9 | ||
116 | #define HvLpEvent_Rc_PartitionDead 10 | ||
117 | #define HvLpEvent_Rc_PathClosed 11 | ||
118 | #define HvLpEvent_Rc_SubtypeError 12 | ||
119 | |||
120 | #define HvLpEvent_Function_Ack 0 | ||
121 | #define HvLpEvent_Function_Int 1 | ||
122 | |||
123 | #define HvLpEvent_AckInd_NoAck 0 | ||
124 | #define HvLpEvent_AckInd_DoAck 1 | ||
125 | |||
126 | #define HvLpEvent_AckType_ImmediateAck 0 | ||
127 | #define HvLpEvent_AckType_DeferredAck 1 | ||
128 | |||
129 | #define HvLpDma_Direction_LocalToRemote 0 | ||
130 | #define HvLpDma_Direction_RemoteToLocal 1 | ||
131 | |||
132 | #define HvLpDma_AddressType_TceIndex 0 | ||
133 | #define HvLpDma_AddressType_RealAddress 1 | ||
134 | |||
135 | #define HvLpDma_Rc_Good 0 | ||
136 | #define HvLpDma_Rc_Error 1 | ||
137 | #define HvLpDma_Rc_PartitionDead 2 | ||
138 | #define HvLpDma_Rc_PathClosed 3 | ||
139 | #define HvLpDma_Rc_InvalidAddress 4 | ||
140 | #define HvLpDma_Rc_InvalidLength 5 | ||
141 | |||
142 | #endif /* _HVLPEVENT_H */ | ||
diff --git a/include/asm-ppc64/iSeries/HvReleaseData.h b/include/asm-ppc64/iSeries/HvReleaseData.h deleted file mode 100644 index c8162e5ccb21..000000000000 --- a/include/asm-ppc64/iSeries/HvReleaseData.h +++ /dev/null | |||
@@ -1,64 +0,0 @@ | |||
1 | /* | ||
2 | * HvReleaseData.h | ||
3 | * Copyright (C) 2001 Mike Corrigan IBM Corporation | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | #ifndef _HVRELEASEDATA_H | ||
20 | #define _HVRELEASEDATA_H | ||
21 | |||
22 | /* | ||
23 | * This control block contains the critical information about the | ||
24 | * release so that it can be changed in the future (ie, the virtual | ||
25 | * address of the OS's NACA). | ||
26 | */ | ||
27 | #include <asm/types.h> | ||
28 | #include <asm/naca.h> | ||
29 | |||
30 | /* | ||
31 | * When we IPL a secondary partition, we will check if if the | ||
32 | * secondary xMinPlicVrmIndex > the primary xVrmIndex. | ||
33 | * If it is then this tells PLIC that this secondary is not | ||
34 | * supported running on this "old" of a level of PLIC. | ||
35 | * | ||
36 | * Likewise, we will compare the primary xMinSlicVrmIndex to | ||
37 | * the secondary xVrmIndex. | ||
38 | * If the primary xMinSlicVrmDelta > secondary xVrmDelta then we | ||
39 | * know that this PLIC does not support running an OS "that old". | ||
40 | */ | ||
41 | |||
42 | #define HVREL_TAGSINACTIVE 0x8000 | ||
43 | #define HVREL_32BIT 0x4000 | ||
44 | #define HVREL_NOSHAREDPROCS 0x2000 | ||
45 | #define HVREL_NOHMT 0x1000 | ||
46 | |||
47 | struct HvReleaseData { | ||
48 | u32 xDesc; /* Descriptor "HvRD" ebcdic x00-x03 */ | ||
49 | u16 xSize; /* Size of this control block x04-x05 */ | ||
50 | u16 xVpdAreasPtrOffset; /* Offset in NACA of ItVpdAreas x06-x07 */ | ||
51 | struct naca_struct *xSlicNacaAddr; /* Virt addr of SLIC NACA x08-x0F */ | ||
52 | u32 xMsNucDataOffset; /* Offset of Linux Mapping Data x10-x13 */ | ||
53 | u32 xRsvd1; /* Reserved x14-x17 */ | ||
54 | u16 xFlags; | ||
55 | u16 xVrmIndex; /* VRM Index of OS image x1A-x1B */ | ||
56 | u16 xMinSupportedPlicVrmIndex; /* Min PLIC level (soft) x1C-x1D */ | ||
57 | u16 xMinCompatablePlicVrmIndex; /* Min PLIC levelP (hard) x1E-x1F */ | ||
58 | char xVrmName[12]; /* Displayable name x20-x2B */ | ||
59 | char xRsvd3[20]; /* Reserved x2C-x3F */ | ||
60 | }; | ||
61 | |||
62 | extern struct HvReleaseData hvReleaseData; | ||
63 | |||
64 | #endif /* _HVRELEASEDATA_H */ | ||
diff --git a/include/asm-ppc64/iSeries/HvTypes.h b/include/asm-ppc64/iSeries/HvTypes.h deleted file mode 100644 index b1ef2b4cb3e3..000000000000 --- a/include/asm-ppc64/iSeries/HvTypes.h +++ /dev/null | |||
@@ -1,113 +0,0 @@ | |||
1 | /* | ||
2 | * HvTypes.h | ||
3 | * Copyright (C) 2001 Mike Corrigan IBM Corporation | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | #ifndef _HVTYPES_H | ||
20 | #define _HVTYPES_H | ||
21 | |||
22 | /* | ||
23 | * General typedefs for the hypervisor. | ||
24 | */ | ||
25 | |||
26 | #include <asm/types.h> | ||
27 | |||
28 | typedef u8 HvLpIndex; | ||
29 | typedef u16 HvLpInstanceId; | ||
30 | typedef u64 HvLpTOD; | ||
31 | typedef u64 HvLpSystemSerialNum; | ||
32 | typedef u8 HvLpDeviceSerialNum[12]; | ||
33 | typedef u16 HvLpSanHwSet; | ||
34 | typedef u16 HvLpBus; | ||
35 | typedef u16 HvLpBoard; | ||
36 | typedef u16 HvLpCard; | ||
37 | typedef u8 HvLpDeviceType[4]; | ||
38 | typedef u8 HvLpDeviceModel[3]; | ||
39 | typedef u64 HvIoToken; | ||
40 | typedef u8 HvLpName[8]; | ||
41 | typedef u32 HvIoId; | ||
42 | typedef u64 HvRealMemoryIndex; | ||
43 | typedef u32 HvLpIndexMap; /* Must hold HVMAXARCHITECTEDLPS bits!!! */ | ||
44 | typedef u16 HvLpVrmIndex; | ||
45 | typedef u32 HvXmGenerationId; | ||
46 | typedef u8 HvLpBusPool; | ||
47 | typedef u8 HvLpSharedPoolIndex; | ||
48 | typedef u16 HvLpSharedProcUnitsX100; | ||
49 | typedef u8 HvLpVirtualLanIndex; | ||
50 | typedef u16 HvLpVirtualLanIndexMap; /* Must hold HVMAXARCHITECTEDVIRTUALLANS bits!!! */ | ||
51 | typedef u16 HvBusNumber; /* Hypervisor Bus Number */ | ||
52 | typedef u8 HvSubBusNumber; /* Hypervisor SubBus Number */ | ||
53 | typedef u8 HvAgentId; /* Hypervisor DevFn */ | ||
54 | |||
55 | |||
56 | #define HVMAXARCHITECTEDLPS 32 | ||
57 | #define HVMAXARCHITECTEDVIRTUALLANS 16 | ||
58 | #define HVMAXARCHITECTEDVIRTUALDISKS 32 | ||
59 | #define HVMAXARCHITECTEDVIRTUALCDROMS 8 | ||
60 | #define HVMAXARCHITECTEDVIRTUALTAPES 8 | ||
61 | #define HVCHUNKSIZE (256 * 1024) | ||
62 | #define HVPAGESIZE (4 * 1024) | ||
63 | #define HVLPMINMEGSPRIMARY 256 | ||
64 | #define HVLPMINMEGSSECONDARY 64 | ||
65 | #define HVCHUNKSPERMEG 4 | ||
66 | #define HVPAGESPERMEG 256 | ||
67 | #define HVPAGESPERCHUNK 64 | ||
68 | |||
69 | #define HvLpIndexInvalid ((HvLpIndex)0xff) | ||
70 | |||
71 | /* | ||
72 | * Enums for the sub-components under PLIC | ||
73 | * Used in HvCall and HvPrimaryCall | ||
74 | */ | ||
75 | enum { | ||
76 | HvCallCompId = 0, | ||
77 | HvCallCpuCtlsCompId = 1, | ||
78 | HvCallCfgCompId = 2, | ||
79 | HvCallEventCompId = 3, | ||
80 | HvCallHptCompId = 4, | ||
81 | HvCallPciCompId = 5, | ||
82 | HvCallSlmCompId = 6, | ||
83 | HvCallSmCompId = 7, | ||
84 | HvCallSpdCompId = 8, | ||
85 | HvCallXmCompId = 9, | ||
86 | HvCallRioCompId = 10, | ||
87 | HvCallRsvd3CompId = 11, | ||
88 | HvCallRsvd2CompId = 12, | ||
89 | HvCallRsvd1CompId = 13, | ||
90 | HvCallMaxCompId = 14, | ||
91 | HvPrimaryCallCompId = 0, | ||
92 | HvPrimaryCallCfgCompId = 1, | ||
93 | HvPrimaryCallPciCompId = 2, | ||
94 | HvPrimaryCallSmCompId = 3, | ||
95 | HvPrimaryCallSpdCompId = 4, | ||
96 | HvPrimaryCallXmCompId = 5, | ||
97 | HvPrimaryCallRioCompId = 6, | ||
98 | HvPrimaryCallRsvd7CompId = 7, | ||
99 | HvPrimaryCallRsvd6CompId = 8, | ||
100 | HvPrimaryCallRsvd5CompId = 9, | ||
101 | HvPrimaryCallRsvd4CompId = 10, | ||
102 | HvPrimaryCallRsvd3CompId = 11, | ||
103 | HvPrimaryCallRsvd2CompId = 12, | ||
104 | HvPrimaryCallRsvd1CompId = 13, | ||
105 | HvPrimaryCallMaxCompId = HvCallMaxCompId | ||
106 | }; | ||
107 | |||
108 | struct HvLpBufferList { | ||
109 | u64 addr; | ||
110 | u64 len; | ||
111 | }; | ||
112 | |||
113 | #endif /* _HVTYPES_H */ | ||
diff --git a/include/asm-ppc64/iSeries/IoHriMainStore.h b/include/asm-ppc64/iSeries/IoHriMainStore.h deleted file mode 100644 index 45ed3ea67d06..000000000000 --- a/include/asm-ppc64/iSeries/IoHriMainStore.h +++ /dev/null | |||
@@ -1,166 +0,0 @@ | |||
1 | /* | ||
2 | * IoHriMainStore.h | ||
3 | * Copyright (C) 2001 Mike Corrigan IBM Corporation | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | |||
20 | #ifndef _IOHRIMAINSTORE_H | ||
21 | #define _IOHRIMAINSTORE_H | ||
22 | |||
23 | /* Main Store Vpd for Condor,iStar,sStar */ | ||
24 | struct IoHriMainStoreSegment4 { | ||
25 | u8 msArea0Exists:1; | ||
26 | u8 msArea1Exists:1; | ||
27 | u8 msArea2Exists:1; | ||
28 | u8 msArea3Exists:1; | ||
29 | u8 reserved1:4; | ||
30 | u8 reserved2; | ||
31 | |||
32 | u8 msArea0Functional:1; | ||
33 | u8 msArea1Functional:1; | ||
34 | u8 msArea2Functional:1; | ||
35 | u8 msArea3Functional:1; | ||
36 | u8 reserved3:4; | ||
37 | u8 reserved4; | ||
38 | |||
39 | u32 totalMainStore; | ||
40 | |||
41 | u64 msArea0Ptr; | ||
42 | u64 msArea1Ptr; | ||
43 | u64 msArea2Ptr; | ||
44 | u64 msArea3Ptr; | ||
45 | |||
46 | u32 cardProductionLevel; | ||
47 | |||
48 | u32 msAdrHole; | ||
49 | |||
50 | u8 msArea0HasRiserVpd:1; | ||
51 | u8 msArea1HasRiserVpd:1; | ||
52 | u8 msArea2HasRiserVpd:1; | ||
53 | u8 msArea3HasRiserVpd:1; | ||
54 | u8 reserved5:4; | ||
55 | u8 reserved6; | ||
56 | u16 reserved7; | ||
57 | |||
58 | u8 reserved8[28]; | ||
59 | |||
60 | u64 nonInterleavedBlocksStartAdr; | ||
61 | u64 nonInterleavedBlocksEndAdr; | ||
62 | }; | ||
63 | |||
64 | /* Main Store VPD for Power4 */ | ||
65 | struct IoHriMainStoreChipInfo1 { | ||
66 | u32 chipMfgID __attribute((packed)); | ||
67 | char chipECLevel[4] __attribute((packed)); | ||
68 | }; | ||
69 | |||
70 | struct IoHriMainStoreVpdIdData { | ||
71 | char typeNumber[4]; | ||
72 | char modelNumber[4]; | ||
73 | char partNumber[12]; | ||
74 | char serialNumber[12]; | ||
75 | }; | ||
76 | |||
77 | struct IoHriMainStoreVpdFruData { | ||
78 | char fruLabel[8] __attribute((packed)); | ||
79 | u8 numberOfSlots __attribute((packed)); | ||
80 | u8 pluggingType __attribute((packed)); | ||
81 | u16 slotMapIndex __attribute((packed)); | ||
82 | }; | ||
83 | |||
84 | struct IoHriMainStoreAdrRangeBlock { | ||
85 | void *blockStart __attribute((packed)); | ||
86 | void *blockEnd __attribute((packed)); | ||
87 | u32 blockProcChipId __attribute((packed)); | ||
88 | }; | ||
89 | |||
90 | #define MaxAreaAdrRangeBlocks 4 | ||
91 | |||
92 | struct IoHriMainStoreArea4 { | ||
93 | u32 msVpdFormat __attribute((packed)); | ||
94 | u8 containedVpdType __attribute((packed)); | ||
95 | u8 reserved1 __attribute((packed)); | ||
96 | u16 reserved2 __attribute((packed)); | ||
97 | |||
98 | u64 msExists __attribute((packed)); | ||
99 | u64 msFunctional __attribute((packed)); | ||
100 | |||
101 | u32 memorySize __attribute((packed)); | ||
102 | u32 procNodeId __attribute((packed)); | ||
103 | |||
104 | u32 numAdrRangeBlocks __attribute((packed)); | ||
105 | struct IoHriMainStoreAdrRangeBlock xAdrRangeBlock[MaxAreaAdrRangeBlocks] __attribute((packed)); | ||
106 | |||
107 | struct IoHriMainStoreChipInfo1 chipInfo0 __attribute((packed)); | ||
108 | struct IoHriMainStoreChipInfo1 chipInfo1 __attribute((packed)); | ||
109 | struct IoHriMainStoreChipInfo1 chipInfo2 __attribute((packed)); | ||
110 | struct IoHriMainStoreChipInfo1 chipInfo3 __attribute((packed)); | ||
111 | struct IoHriMainStoreChipInfo1 chipInfo4 __attribute((packed)); | ||
112 | struct IoHriMainStoreChipInfo1 chipInfo5 __attribute((packed)); | ||
113 | struct IoHriMainStoreChipInfo1 chipInfo6 __attribute((packed)); | ||
114 | struct IoHriMainStoreChipInfo1 chipInfo7 __attribute((packed)); | ||
115 | |||
116 | void *msRamAreaArray __attribute((packed)); | ||
117 | u32 msRamAreaArrayNumEntries __attribute((packed)); | ||
118 | u32 msRamAreaArrayEntrySize __attribute((packed)); | ||
119 | |||
120 | u32 numaDimmExists __attribute((packed)); | ||
121 | u32 numaDimmFunctional __attribute((packed)); | ||
122 | void *numaDimmArray __attribute((packed)); | ||
123 | u32 numaDimmArrayNumEntries __attribute((packed)); | ||
124 | u32 numaDimmArrayEntrySize __attribute((packed)); | ||
125 | |||
126 | struct IoHriMainStoreVpdIdData idData __attribute((packed)); | ||
127 | |||
128 | u64 powerData __attribute((packed)); | ||
129 | u64 cardAssemblyPartNum __attribute((packed)); | ||
130 | u64 chipSerialNum __attribute((packed)); | ||
131 | |||
132 | u64 reserved3 __attribute((packed)); | ||
133 | char reserved4[16] __attribute((packed)); | ||
134 | |||
135 | struct IoHriMainStoreVpdFruData fruData __attribute((packed)); | ||
136 | |||
137 | u8 vpdPortNum __attribute((packed)); | ||
138 | u8 reserved5 __attribute((packed)); | ||
139 | u8 frameId __attribute((packed)); | ||
140 | u8 rackUnit __attribute((packed)); | ||
141 | char asciiKeywordVpd[256] __attribute((packed)); | ||
142 | u32 reserved6 __attribute((packed)); | ||
143 | }; | ||
144 | |||
145 | |||
146 | struct IoHriMainStoreSegment5 { | ||
147 | u16 reserved1; | ||
148 | u8 reserved2; | ||
149 | u8 msVpdFormat; | ||
150 | |||
151 | u32 totalMainStore; | ||
152 | u64 maxConfiguredMsAdr; | ||
153 | |||
154 | struct IoHriMainStoreArea4 *msAreaArray; | ||
155 | u32 msAreaArrayNumEntries; | ||
156 | u32 msAreaArrayEntrySize; | ||
157 | |||
158 | u32 msAreaExists; | ||
159 | u32 msAreaFunctional; | ||
160 | |||
161 | u64 reserved3; | ||
162 | }; | ||
163 | |||
164 | extern u64 xMsVpd[]; | ||
165 | |||
166 | #endif /* _IOHRIMAINSTORE_H */ | ||
diff --git a/include/asm-ppc64/iSeries/IoHriProcessorVpd.h b/include/asm-ppc64/iSeries/IoHriProcessorVpd.h deleted file mode 100644 index 73b73d80b8b1..000000000000 --- a/include/asm-ppc64/iSeries/IoHriProcessorVpd.h +++ /dev/null | |||
@@ -1,86 +0,0 @@ | |||
1 | /* | ||
2 | * IoHriProcessorVpd.h | ||
3 | * Copyright (C) 2001 Mike Corrigan IBM Corporation | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | #ifndef _IOHRIPROCESSORVPD_H | ||
20 | #define _IOHRIPROCESSORVPD_H | ||
21 | |||
22 | #include <asm/types.h> | ||
23 | |||
24 | /* | ||
25 | * This struct maps Processor Vpd that is DMAd to SLIC by CSP | ||
26 | */ | ||
27 | struct IoHriProcessorVpd { | ||
28 | u8 xFormat; // VPD format indicator x00-x00 | ||
29 | u8 xProcStatus:8; // Processor State x01-x01 | ||
30 | u8 xSecondaryThreadCount; // Secondary thread cnt x02-x02 | ||
31 | u8 xSrcType:1; // Src Type x03-x03 | ||
32 | u8 xSrcSoft:1; // Src stay soft ... | ||
33 | u8 xSrcParable:1; // Src parable ... | ||
34 | u8 xRsvd1:5; // Reserved ... | ||
35 | u16 xHvPhysicalProcIndex; // Hypervisor physical proc index04-x05 | ||
36 | u16 xRsvd2; // Reserved x06-x07 | ||
37 | u32 xHwNodeId; // Hardware node id x08-x0B | ||
38 | u32 xHwProcId; // Hardware processor id x0C-x0F | ||
39 | |||
40 | u32 xTypeNum; // Card Type/CCIN number x10-x13 | ||
41 | u32 xModelNum; // Model/Feature number x14-x17 | ||
42 | u64 xSerialNum; // Serial number x18-x1F | ||
43 | char xPartNum[12]; // Book Part or FPU number x20-x2B | ||
44 | char xMfgID[4]; // Manufacturing ID x2C-x2F | ||
45 | |||
46 | u32 xProcFreq; // Processor Frequency x30-x33 | ||
47 | u32 xTimeBaseFreq; // Time Base Frequency x34-x37 | ||
48 | |||
49 | u32 xChipEcLevel; // Chip EC Levels x38-x3B | ||
50 | u32 xProcIdReg; // PIR SPR value x3C-x3F | ||
51 | u32 xPVR; // PVR value x40-x43 | ||
52 | u8 xRsvd3[12]; // Reserved x44-x4F | ||
53 | |||
54 | u32 xInstCacheSize; // Instruction cache size in KB x50-x53 | ||
55 | u32 xInstBlockSize; // Instruction cache block size x54-x57 | ||
56 | u32 xDataCacheOperandSize; // Data cache operand size x58-x5B | ||
57 | u32 xInstCacheOperandSize; // Inst cache operand size x5C-x5F | ||
58 | |||
59 | u32 xDataL1CacheSizeKB; // L1 data cache size in KB x60-x63 | ||
60 | u32 xDataL1CacheLineSize; // L1 data cache block size x64-x67 | ||
61 | u64 xRsvd4; // Reserved x68-x6F | ||
62 | |||
63 | u32 xDataL2CacheSizeKB; // L2 data cache size in KB x70-x73 | ||
64 | u32 xDataL2CacheLineSize; // L2 data cache block size x74-x77 | ||
65 | u64 xRsvd5; // Reserved x78-x7F | ||
66 | |||
67 | u32 xDataL3CacheSizeKB; // L3 data cache size in KB x80-x83 | ||
68 | u32 xDataL3CacheLineSize; // L3 data cache block size x84-x87 | ||
69 | u64 xRsvd6; // Reserved x88-x8F | ||
70 | |||
71 | u64 xFruLabel; // Card Location Label x90-x97 | ||
72 | u8 xSlotsOnCard; // Slots on card (0=no slots) x98-x98 | ||
73 | u8 xPartLocFlag; // Location flag (0-pluggable 1-imbedded) x99-x99 | ||
74 | u16 xSlotMapIndex; // Index in slot map table x9A-x9B | ||
75 | u8 xSmartCardPortNo; // Smart card port number x9C-x9C | ||
76 | u8 xRsvd7; // Reserved x9D-x9D | ||
77 | u16 xFrameIdAndRackUnit; // Frame ID and rack unit adr x9E-x9F | ||
78 | |||
79 | u8 xRsvd8[24]; // Reserved xA0-xB7 | ||
80 | |||
81 | char xProcSrc[72]; // CSP format SRC xB8-xFF | ||
82 | }; | ||
83 | |||
84 | extern struct IoHriProcessorVpd xIoHriProcessorVpd[]; | ||
85 | |||
86 | #endif /* _IOHRIPROCESSORVPD_H */ | ||
diff --git a/include/asm-ppc64/iSeries/ItExtVpdPanel.h b/include/asm-ppc64/iSeries/ItExtVpdPanel.h deleted file mode 100644 index 4c546a8802b4..000000000000 --- a/include/asm-ppc64/iSeries/ItExtVpdPanel.h +++ /dev/null | |||
@@ -1,52 +0,0 @@ | |||
1 | /* | ||
2 | * ItExtVpdPanel.h | ||
3 | * Copyright (C) 2002 Dave Boutcher IBM Corporation | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | #ifndef _ITEXTVPDPANEL_H | ||
20 | #define _ITEXTVPDPANEL_H | ||
21 | |||
22 | /* | ||
23 | * This struct maps the panel information | ||
24 | * | ||
25 | * Warning: | ||
26 | * This data must match the architecture for the panel information | ||
27 | */ | ||
28 | |||
29 | #include <asm/types.h> | ||
30 | |||
31 | struct ItExtVpdPanel { | ||
32 | /* Definition of the Extended Vpd On Panel Data Area */ | ||
33 | char systemSerial[8]; | ||
34 | char mfgID[4]; | ||
35 | char reserved1[24]; | ||
36 | char machineType[4]; | ||
37 | char systemID[6]; | ||
38 | char somUniqueCnt[4]; | ||
39 | char serialNumberCount; | ||
40 | char reserved2[7]; | ||
41 | u16 bbu3; | ||
42 | u16 bbu2; | ||
43 | u16 bbu1; | ||
44 | char xLocationLabel[8]; | ||
45 | u8 xRsvd1[6]; | ||
46 | u16 xFrameId; | ||
47 | u8 xRsvd2[48]; | ||
48 | }; | ||
49 | |||
50 | extern struct ItExtVpdPanel xItExtVpdPanel; | ||
51 | |||
52 | #endif /* _ITEXTVPDPANEL_H */ | ||
diff --git a/include/asm-ppc64/iSeries/ItIplParmsReal.h b/include/asm-ppc64/iSeries/ItIplParmsReal.h deleted file mode 100644 index ae3417dc599e..000000000000 --- a/include/asm-ppc64/iSeries/ItIplParmsReal.h +++ /dev/null | |||
@@ -1,71 +0,0 @@ | |||
1 | /* | ||
2 | * ItIplParmsReal.h | ||
3 | * Copyright (C) 2001 Mike Corrigan IBM Corporation | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | #ifndef _ITIPLPARMSREAL_H | ||
20 | #define _ITIPLPARMSREAL_H | ||
21 | |||
22 | /* | ||
23 | * This struct maps the IPL Parameters DMA'd from the SP. | ||
24 | * | ||
25 | * Warning: | ||
26 | * This data must map in exactly 64 bytes and match the architecture for | ||
27 | * the IPL parms | ||
28 | */ | ||
29 | |||
30 | #include <asm/types.h> | ||
31 | |||
32 | struct ItIplParmsReal { | ||
33 | u8 xFormat; // Defines format of IplParms x00-x00 | ||
34 | u8 xRsvd01:6; // Reserved x01-x01 | ||
35 | u8 xAlternateSearch:1; // Alternate search indicator ... | ||
36 | u8 xUaSupplied:1; // UA Supplied on programmed IPL... | ||
37 | u8 xLsUaFormat; // Format byte for UA x02-x02 | ||
38 | u8 xRsvd02; // Reserved x03-x03 | ||
39 | u32 xLsUa; // LS UA x04-x07 | ||
40 | u32 xUnusedLsLid; // First OS LID to load x08-x0B | ||
41 | u16 xLsBusNumber; // LS Bus Number x0C-x0D | ||
42 | u8 xLsCardAdr; // LS Card Address x0E-x0E | ||
43 | u8 xLsBoardAdr; // LS Board Address x0F-x0F | ||
44 | u32 xRsvd03; // Reserved x10-x13 | ||
45 | u8 xSpcnPresent:1; // SPCN present x14-x14 | ||
46 | u8 xCpmPresent:1; // CPM present ... | ||
47 | u8 xRsvd04:6; // Reserved ... | ||
48 | u8 xRsvd05:4; // Reserved x15-x15 | ||
49 | u8 xKeyLock:4; // Keylock setting ... | ||
50 | u8 xRsvd06:6; // Reserved x16-x16 | ||
51 | u8 xIplMode:2; // Ipl mode (A|B|C|D) ... | ||
52 | u8 xHwIplType; // Fast v slow v slow EC HW IPL x17-x17 | ||
53 | u16 xCpmEnabledIpl:1; // CPM in effect when IPL initiatedx18-x19 | ||
54 | u16 xPowerOnResetIpl:1; // Indicate POR condition ... | ||
55 | u16 xMainStorePreserved:1; // Main Storage is preserved ... | ||
56 | u16 xRsvd07:13; // Reserved ... | ||
57 | u16 xIplSource:16; // Ipl source x1A-x1B | ||
58 | u8 xIplReason:8; // Reason for this IPL x1C-x1C | ||
59 | u8 xRsvd08; // Reserved x1D-x1D | ||
60 | u16 xRsvd09; // Reserved x1E-x1F | ||
61 | u16 xSysBoxType; // System Box Type x20-x21 | ||
62 | u16 xSysProcType; // System Processor Type x22-x23 | ||
63 | u32 xRsvd10; // Reserved x24-x27 | ||
64 | u64 xRsvd11; // Reserved x28-x2F | ||
65 | u64 xRsvd12; // Reserved x30-x37 | ||
66 | u64 xRsvd13; // Reserved x38-x3F | ||
67 | }; | ||
68 | |||
69 | extern struct ItIplParmsReal xItIplParmsReal; | ||
70 | |||
71 | #endif /* _ITIPLPARMSREAL_H */ | ||
diff --git a/include/asm-ppc64/iSeries/ItLpNaca.h b/include/asm-ppc64/iSeries/ItLpNaca.h deleted file mode 100644 index 225d0176779d..000000000000 --- a/include/asm-ppc64/iSeries/ItLpNaca.h +++ /dev/null | |||
@@ -1,80 +0,0 @@ | |||
1 | /* | ||
2 | * ItLpNaca.h | ||
3 | * Copyright (C) 2001 Mike Corrigan IBM Corporation | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | #ifndef _ITLPNACA_H | ||
20 | #define _ITLPNACA_H | ||
21 | |||
22 | #include <linux/types.h> | ||
23 | |||
24 | /* | ||
25 | * This control block contains the data that is shared between the | ||
26 | * hypervisor (PLIC) and the OS. | ||
27 | */ | ||
28 | |||
29 | struct ItLpNaca { | ||
30 | // CACHE_LINE_1 0x0000 - 0x007F Contains read-only data | ||
31 | u32 xDesc; // Eye catcher x00-x03 | ||
32 | u16 xSize; // Size of this class x04-x05 | ||
33 | u16 xIntHdlrOffset; // Offset to IntHdlr array x06-x07 | ||
34 | u8 xMaxIntHdlrEntries; // Number of entries in array x08-x08 | ||
35 | u8 xPrimaryLpIndex; // LP Index of Primary x09-x09 | ||
36 | u8 xServiceLpIndex; // LP Ind of Service Focal Pointx0A-x0A | ||
37 | u8 xLpIndex; // LP Index x0B-x0B | ||
38 | u16 xMaxLpQueues; // Number of allocated queues x0C-x0D | ||
39 | u16 xLpQueueOffset; // Offset to start of LP queues x0E-x0F | ||
40 | u8 xPirEnvironMode:8; // Piranha or hardware x10-x10 | ||
41 | u8 xPirConsoleMode:8; // Piranha console indicator x11-x11 | ||
42 | u8 xPirDasdMode:8; // Piranha dasd indicator x12-x12 | ||
43 | u8 xRsvd1_0[5]; // Reserved for Piranha related x13-x17 | ||
44 | u8 xLparInstalled:1; // Is LPAR installed on system x18-x1F | ||
45 | u8 xSysPartitioned:1; // Is the system partitioned ... | ||
46 | u8 xHwSyncedTBs:1; // Hardware synced TBs ... | ||
47 | u8 xIntProcUtilHmt:1; // Utilize HMT for interrupts ... | ||
48 | u8 xRsvd1_1:4; // Reserved ... | ||
49 | u8 xSpVpdFormat:8; // VPD areas are in CSP format ... | ||
50 | u8 xIntProcRatio:8; // Ratio of int procs to procs ... | ||
51 | u8 xRsvd1_2[5]; // Reserved ... | ||
52 | u16 xRsvd1_3; // Reserved x20-x21 | ||
53 | u16 xPlicVrmIndex; // VRM index of PLIC x22-x23 | ||
54 | u16 xMinSupportedSlicVrmInd;// Min supported OS VRM index x24-x25 | ||
55 | u16 xMinCompatableSlicVrmInd;// Min compatible OS VRM index x26-x27 | ||
56 | u64 xLoadAreaAddr; // ER address of load area x28-x2F | ||
57 | u32 xLoadAreaChunks; // Chunks for the load area x30-x33 | ||
58 | u32 xPaseSysCallCRMask; // Mask used to test CR before x34-x37 | ||
59 | // doing an ASR switch on PASE | ||
60 | // system call. | ||
61 | u64 xSlicSegmentTablePtr; // Pointer to Slic seg table. x38-x3f | ||
62 | u8 xRsvd1_4[64]; // x40-x7F | ||
63 | |||
64 | // CACHE_LINE_2 0x0080 - 0x00FF Contains local read-write data | ||
65 | u8 xRsvd2_0[128]; // Reserved x00-x7F | ||
66 | |||
67 | // CACHE_LINE_3-6 0x0100 - 0x02FF Contains LP Queue indicators | ||
68 | // NB: Padding required to keep xInterrruptHdlr at x300 which is required | ||
69 | // for v4r4 PLIC. | ||
70 | u8 xOldLpQueue[128]; // LP Queue needed for v4r4 100-17F | ||
71 | u8 xRsvd3_0[384]; // Reserved 180-2FF | ||
72 | |||
73 | // CACHE_LINE_7-8 0x0300 - 0x03FF Contains the address of the OS interrupt | ||
74 | // handlers | ||
75 | u64 xInterruptHdlr[32]; // Interrupt handlers 300-x3FF | ||
76 | }; | ||
77 | |||
78 | extern struct ItLpNaca itLpNaca; | ||
79 | |||
80 | #endif /* _ITLPNACA_H */ | ||
diff --git a/include/asm-ppc64/iSeries/ItLpQueue.h b/include/asm-ppc64/iSeries/ItLpQueue.h deleted file mode 100644 index 69b26ad74135..000000000000 --- a/include/asm-ppc64/iSeries/ItLpQueue.h +++ /dev/null | |||
@@ -1,81 +0,0 @@ | |||
1 | /* | ||
2 | * ItLpQueue.h | ||
3 | * Copyright (C) 2001 Mike Corrigan IBM Corporation | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | #ifndef _ITLPQUEUE_H | ||
20 | #define _ITLPQUEUE_H | ||
21 | |||
22 | /* | ||
23 | * This control block defines the simple LP queue structure that is | ||
24 | * shared between the hypervisor (PLIC) and the OS in order to send | ||
25 | * events to an LP. | ||
26 | */ | ||
27 | |||
28 | #include <asm/types.h> | ||
29 | #include <asm/ptrace.h> | ||
30 | |||
31 | struct HvLpEvent; | ||
32 | |||
33 | #define ITMaxLpQueues 8 | ||
34 | |||
35 | #define NotUsed 0 // Queue will not be used by PLIC | ||
36 | #define DedicatedIo 1 // Queue dedicated to IO processor specified | ||
37 | #define DedicatedLp 2 // Queue dedicated to LP specified | ||
38 | #define Shared 3 // Queue shared for both IO and LP | ||
39 | |||
40 | #define LpEventStackSize 4096 | ||
41 | #define LpEventMaxSize 256 | ||
42 | #define LpEventAlign 64 | ||
43 | |||
44 | struct hvlpevent_queue { | ||
45 | /* | ||
46 | * The xSlicCurEventPtr is the pointer to the next event stack entry | ||
47 | * that will become valid. The OS must peek at this entry to determine | ||
48 | * if it is valid. PLIC will set the valid indicator as the very last | ||
49 | * store into that entry. | ||
50 | * | ||
51 | * When the OS has completed processing of the event then it will mark | ||
52 | * the event as invalid so that PLIC knows it can store into that event | ||
53 | * location again. | ||
54 | * | ||
55 | * If the event stack fills and there are overflow events, then PLIC | ||
56 | * will set the xPlicOverflowIntPending flag in which case the OS will | ||
57 | * have to fetch the additional LP events once they have drained the | ||
58 | * event stack. | ||
59 | * | ||
60 | * The first 16-bytes are known by both the OS and PLIC. The remainder | ||
61 | * of the cache line is for use by the OS. | ||
62 | */ | ||
63 | u8 xPlicOverflowIntPending;// 0x00 Overflow events are pending | ||
64 | u8 xPlicStatus; // 0x01 DedicatedIo or DedicatedLp or NotUsed | ||
65 | u16 xSlicLogicalProcIndex; // 0x02 Logical Proc Index for correlation | ||
66 | u8 xPlicRsvd[12]; // 0x04 | ||
67 | char *xSlicCurEventPtr; // 0x10 | ||
68 | char *xSlicLastValidEventPtr; // 0x18 | ||
69 | char *xSlicEventStackPtr; // 0x20 | ||
70 | u8 xIndex; // 0x28 unique sequential index. | ||
71 | u8 xSlicRsvd[3]; // 0x29-2b | ||
72 | spinlock_t lock; | ||
73 | }; | ||
74 | |||
75 | extern struct hvlpevent_queue hvlpevent_queue; | ||
76 | |||
77 | extern int hvlpevent_is_pending(void); | ||
78 | extern void process_hvlpevents(struct pt_regs *); | ||
79 | extern void setup_hvlpevent_queue(void); | ||
80 | |||
81 | #endif /* _ITLPQUEUE_H */ | ||
diff --git a/include/asm-ppc64/iSeries/ItLpRegSave.h b/include/asm-ppc64/iSeries/ItLpRegSave.h deleted file mode 100644 index 1b3087e76205..000000000000 --- a/include/asm-ppc64/iSeries/ItLpRegSave.h +++ /dev/null | |||
@@ -1,84 +0,0 @@ | |||
1 | /* | ||
2 | * ItLpRegSave.h | ||
3 | * Copyright (C) 2001 Mike Corrigan IBM Corporation | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | #ifndef _ITLPREGSAVE_H | ||
20 | #define _ITLPREGSAVE_H | ||
21 | |||
22 | /* | ||
23 | * This control block contains the data that is shared between PLIC | ||
24 | * and the OS | ||
25 | */ | ||
26 | |||
27 | struct ItLpRegSave { | ||
28 | u32 xDesc; // Eye catcher "LpRS" ebcdic 000-003 | ||
29 | u16 xSize; // Size of this class 004-005 | ||
30 | u8 xInUse; // Area is live 006-007 | ||
31 | u8 xRsvd1[9]; // Reserved 007-00F | ||
32 | |||
33 | u8 xFixedRegSave[352]; // Fixed Register Save Area 010-16F | ||
34 | u32 xCTRL; // Control Register 170-173 | ||
35 | u32 xDEC; // Decrementer 174-177 | ||
36 | u32 xFPSCR; // FP Status and Control Reg 178-17B | ||
37 | u32 xPVR; // Processor Version Number 17C-17F | ||
38 | |||
39 | u64 xMMCR0; // Monitor Mode Control Reg 0 180-187 | ||
40 | u32 xPMC1; // Perf Monitor Counter 1 188-18B | ||
41 | u32 xPMC2; // Perf Monitor Counter 2 18C-18F | ||
42 | u32 xPMC3; // Perf Monitor Counter 3 190-193 | ||
43 | u32 xPMC4; // Perf Monitor Counter 4 194-197 | ||
44 | u32 xPIR; // Processor ID Reg 198-19B | ||
45 | |||
46 | u32 xMMCR1; // Monitor Mode Control Reg 1 19C-19F | ||
47 | u32 xMMCRA; // Monitor Mode Control Reg A 1A0-1A3 | ||
48 | u32 xPMC5; // Perf Monitor Counter 5 1A4-1A7 | ||
49 | u32 xPMC6; // Perf Monitor Counter 6 1A8-1AB | ||
50 | u32 xPMC7; // Perf Monitor Counter 7 1AC-1AF | ||
51 | u32 xPMC8; // Perf Monitor Counter 8 1B0-1B3 | ||
52 | u32 xTSC; // Thread Switch Control 1B4-1B7 | ||
53 | u32 xTST; // Thread Switch Timeout 1B8-1BB | ||
54 | u32 xRsvd; // Reserved 1BC-1BF | ||
55 | |||
56 | u64 xACCR; // Address Compare Control Reg 1C0-1C7 | ||
57 | u64 xIMR; // Instruction Match Register 1C8-1CF | ||
58 | u64 xSDR1; // Storage Description Reg 1 1D0-1D7 | ||
59 | u64 xSPRG0; // Special Purpose Reg General0 1D8-1DF | ||
60 | u64 xSPRG1; // Special Purpose Reg General1 1E0-1E7 | ||
61 | u64 xSPRG2; // Special Purpose Reg General2 1E8-1EF | ||
62 | u64 xSPRG3; // Special Purpose Reg General3 1F0-1F7 | ||
63 | u64 xTB; // Time Base Register 1F8-1FF | ||
64 | |||
65 | u64 xFPR[32]; // Floating Point Registers 200-2FF | ||
66 | |||
67 | u64 xMSR; // Machine State Register 300-307 | ||
68 | u64 xNIA; // Next Instruction Address 308-30F | ||
69 | |||
70 | u64 xDABR; // Data Address Breakpoint Reg 310-317 | ||
71 | u64 xIABR; // Inst Address Breakpoint Reg 318-31F | ||
72 | |||
73 | u64 xHID0; // HW Implementation Dependent0 320-327 | ||
74 | |||
75 | u64 xHID4; // HW Implementation Dependent4 328-32F | ||
76 | u64 xSCOMd; // SCON Data Reg (SPRG4) 330-337 | ||
77 | u64 xSCOMc; // SCON Command Reg (SPRG5) 338-33F | ||
78 | u64 xSDAR; // Sample Data Address Register 340-347 | ||
79 | u64 xSIAR; // Sample Inst Address Register 348-34F | ||
80 | |||
81 | u8 xRsvd3[176]; // Reserved 350-3FF | ||
82 | }; | ||
83 | |||
84 | #endif /* _ITLPREGSAVE_H */ | ||
diff --git a/include/asm-ppc64/iSeries/ItSpCommArea.h b/include/asm-ppc64/iSeries/ItSpCommArea.h deleted file mode 100644 index 5535f8271c9f..000000000000 --- a/include/asm-ppc64/iSeries/ItSpCommArea.h +++ /dev/null | |||
@@ -1,37 +0,0 @@ | |||
1 | /* | ||
2 | * ItSpCommArea.h | ||
3 | * Copyright (C) 2001 Mike Corrigan IBM Corporation | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | |||
20 | #ifndef _ITSPCOMMAREA_H | ||
21 | #define _ITSPCOMMAREA_H | ||
22 | |||
23 | |||
24 | struct SpCommArea { | ||
25 | u32 xDesc; // Descriptor (only in new formats) 000-003 | ||
26 | u8 xFormat; // Format (only in new formats) 004-004 | ||
27 | u8 xRsvd1[11]; // Reserved 005-00F | ||
28 | u64 xRawTbAtIplStart; // Raw HW TB value when IPL is started 010-017 | ||
29 | u64 xRawTodAtIplStart; // Raw HW TOD value when IPL is started 018-01F | ||
30 | u64 xBcdTimeAtIplStart; // BCD time when IPL is started 020-027 | ||
31 | u64 xBcdTimeAtOsStart; // BCD time when OS passed control 028-02F | ||
32 | u8 xRsvd2[80]; // Reserved 030-07F | ||
33 | }; | ||
34 | |||
35 | extern struct SpCommArea xSpCommArea; | ||
36 | |||
37 | #endif /* _ITSPCOMMAREA_H */ | ||
diff --git a/include/asm-ppc64/iSeries/ItVpdAreas.h b/include/asm-ppc64/iSeries/ItVpdAreas.h deleted file mode 100644 index 71b3ad24f95a..000000000000 --- a/include/asm-ppc64/iSeries/ItVpdAreas.h +++ /dev/null | |||
@@ -1,89 +0,0 @@ | |||
1 | /* | ||
2 | * ItVpdAreas.h | ||
3 | * Copyright (C) 2001 Mike Corrigan IBM Corporation | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | #ifndef _ITVPDAREAS_H | ||
20 | #define _ITVPDAREAS_H | ||
21 | |||
22 | /* | ||
23 | * This file defines the address and length of all of the VPD area passed to | ||
24 | * the OS from PLIC (most of which start from the SP). | ||
25 | */ | ||
26 | |||
27 | #include <asm/types.h> | ||
28 | |||
29 | /* VPD Entry index is carved in stone - cannot be changed (easily). */ | ||
30 | #define ItVpdCecVpd 0 | ||
31 | #define ItVpdDynamicSpace 1 | ||
32 | #define ItVpdExtVpd 2 | ||
33 | #define ItVpdExtVpdOnPanel 3 | ||
34 | #define ItVpdFirstPaca 4 | ||
35 | #define ItVpdIoVpd 5 | ||
36 | #define ItVpdIplParms 6 | ||
37 | #define ItVpdMsVpd 7 | ||
38 | #define ItVpdPanelVpd 8 | ||
39 | #define ItVpdLpNaca 9 | ||
40 | #define ItVpdBackplaneAndMaybeClockCardVpd 10 | ||
41 | #define ItVpdRecoveryLogBuffer 11 | ||
42 | #define ItVpdSpCommArea 12 | ||
43 | #define ItVpdSpLogBuffer 13 | ||
44 | #define ItVpdSpLogBufferSave 14 | ||
45 | #define ItVpdSpCardVpd 15 | ||
46 | #define ItVpdFirstProcVpd 16 | ||
47 | #define ItVpdApModelVpd 17 | ||
48 | #define ItVpdClockCardVpd 18 | ||
49 | #define ItVpdBusExtCardVpd 19 | ||
50 | #define ItVpdProcCapacityVpd 20 | ||
51 | #define ItVpdInteractiveCapacityVpd 21 | ||
52 | #define ItVpdFirstSlotLabel 22 | ||
53 | #define ItVpdFirstLpQueue 23 | ||
54 | #define ItVpdFirstL3CacheVpd 24 | ||
55 | #define ItVpdFirstProcFruVpd 25 | ||
56 | |||
57 | #define ItVpdMaxEntries 26 | ||
58 | |||
59 | #define ItDmaMaxEntries 10 | ||
60 | |||
61 | #define ItVpdAreasMaxSlotLabels 192 | ||
62 | |||
63 | |||
64 | struct ItVpdAreas { | ||
65 | u32 xSlicDesc; // Descriptor 000-003 | ||
66 | u16 xSlicSize; // Size of this control block 004-005 | ||
67 | u16 xPlicAdjustVpdLens:1; // Flag to indicate new interface006-007 | ||
68 | u16 xRsvd1:15; // Reserved bits ... | ||
69 | u16 xSlicVpdEntries; // Number of VPD entries 008-009 | ||
70 | u16 xSlicDmaEntries; // Number of DMA entries 00A-00B | ||
71 | u16 xSlicMaxLogicalProcs; // Maximum logical processors 00C-00D | ||
72 | u16 xSlicMaxPhysicalProcs; // Maximum physical processors 00E-00F | ||
73 | u16 xSlicDmaToksOffset; // Offset into this of array 010-011 | ||
74 | u16 xSlicVpdAdrsOffset; // Offset into this of array 012-013 | ||
75 | u16 xSlicDmaLensOffset; // Offset into this of array 014-015 | ||
76 | u16 xSlicVpdLensOffset; // Offset into this of array 016-017 | ||
77 | u16 xSlicMaxSlotLabels; // Maximum number of slot labels018-019 | ||
78 | u16 xSlicMaxLpQueues; // Maximum number of LP Queues 01A-01B | ||
79 | u8 xRsvd2[4]; // Reserved 01C-01F | ||
80 | u64 xRsvd3[12]; // Reserved 020-07F | ||
81 | u32 xPlicDmaLens[ItDmaMaxEntries];// Array of DMA lengths 080-0A7 | ||
82 | u32 xPlicDmaToks[ItDmaMaxEntries];// Array of DMA tokens 0A8-0CF | ||
83 | u32 xSlicVpdLens[ItVpdMaxEntries];// Array of VPD lengths 0D0-12F | ||
84 | void *xSlicVpdAdrs[ItVpdMaxEntries];// Array of VPD buffers 130-1EF | ||
85 | }; | ||
86 | |||
87 | extern struct ItVpdAreas itVpdAreas; | ||
88 | |||
89 | #endif /* _ITVPDAREAS_H */ | ||
diff --git a/include/asm-ppc64/iSeries/LparMap.h b/include/asm-ppc64/iSeries/LparMap.h deleted file mode 100644 index a6840b186d03..000000000000 --- a/include/asm-ppc64/iSeries/LparMap.h +++ /dev/null | |||
@@ -1,83 +0,0 @@ | |||
1 | /* | ||
2 | * LparMap.h | ||
3 | * Copyright (C) 2001 Mike Corrigan IBM Corporation | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | #ifndef _LPARMAP_H | ||
20 | #define _LPARMAP_H | ||
21 | |||
22 | #ifndef __ASSEMBLY__ | ||
23 | |||
24 | #include <asm/types.h> | ||
25 | |||
26 | /* | ||
27 | * The iSeries hypervisor will set up mapping for one or more | ||
28 | * ESID/VSID pairs (in SLB/segment registers) and will set up | ||
29 | * mappings of one or more ranges of pages to VAs. | ||
30 | * We will have the hypervisor set up the ESID->VSID mapping | ||
31 | * for the four kernel segments (C-F). With shared processors, | ||
32 | * the hypervisor will clear all segment registers and reload | ||
33 | * these four whenever the processor is switched from one | ||
34 | * partition to another. | ||
35 | */ | ||
36 | |||
37 | /* The Vsid and Esid identified below will be used by the hypervisor | ||
38 | * to set up a memory mapping for part of the load area before giving | ||
39 | * control to the Linux kernel. The load area is 64 MB, but this must | ||
40 | * not attempt to map the whole load area. The Hashed Page Table may | ||
41 | * need to be located within the load area (if the total partition size | ||
42 | * is 64 MB), but cannot be mapped. Typically, this should specify | ||
43 | * to map half (32 MB) of the load area. | ||
44 | * | ||
45 | * The hypervisor will set up page table entries for the number of | ||
46 | * pages specified. | ||
47 | * | ||
48 | * In 32-bit mode, the hypervisor will load all four of the | ||
49 | * segment registers (identified by the low-order four bits of the | ||
50 | * Esid field. In 64-bit mode, the hypervisor will load one SLB | ||
51 | * entry to map the Esid to the Vsid. | ||
52 | */ | ||
53 | |||
54 | #define HvEsidsToMap 2 | ||
55 | #define HvRangesToMap 1 | ||
56 | |||
57 | /* Hypervisor initially maps 32MB of the load area */ | ||
58 | #define HvPagesToMap 8192 | ||
59 | |||
60 | struct LparMap { | ||
61 | u64 xNumberEsids; // Number of ESID/VSID pairs | ||
62 | u64 xNumberRanges; // Number of VA ranges to map | ||
63 | u64 xSegmentTableOffs; // Page number within load area of seg table | ||
64 | u64 xRsvd[5]; | ||
65 | struct { | ||
66 | u64 xKernelEsid; // Esid used to map kernel load | ||
67 | u64 xKernelVsid; // Vsid used to map kernel load | ||
68 | } xEsids[HvEsidsToMap]; | ||
69 | struct { | ||
70 | u64 xPages; // Number of pages to be mapped | ||
71 | u64 xOffset; // Offset from start of load area | ||
72 | u64 xVPN; // Virtual Page Number | ||
73 | } xRanges[HvRangesToMap]; | ||
74 | }; | ||
75 | |||
76 | extern const struct LparMap xLparMap; | ||
77 | |||
78 | #endif /* __ASSEMBLY__ */ | ||
79 | |||
80 | /* the fixed address where the LparMap exists */ | ||
81 | #define LPARMAP_PHYS 0x7000 | ||
82 | |||
83 | #endif /* _LPARMAP_H */ | ||
diff --git a/include/asm-ppc64/iSeries/iSeries_io.h b/include/asm-ppc64/iSeries/iSeries_io.h deleted file mode 100644 index 9f79413342b3..000000000000 --- a/include/asm-ppc64/iSeries/iSeries_io.h +++ /dev/null | |||
@@ -1,49 +0,0 @@ | |||
1 | #ifndef _ISERIES_IO_H | ||
2 | #define _ISERIES_IO_H | ||
3 | |||
4 | #include <linux/config.h> | ||
5 | |||
6 | #ifdef CONFIG_PPC_ISERIES | ||
7 | #include <linux/types.h> | ||
8 | /* | ||
9 | * File iSeries_io.h created by Allan Trautman on Thu Dec 28 2000. | ||
10 | * | ||
11 | * Remaps the io.h for the iSeries Io | ||
12 | * Copyright (C) 2000 Allan H Trautman, IBM Corporation | ||
13 | * | ||
14 | * This program is free software; you can redistribute it and/or modify | ||
15 | * it under the terms of the GNU General Public License as published by | ||
16 | * the Free Software Foundation; either version 2 of the License, or | ||
17 | * (at your option) any later version. | ||
18 | * | ||
19 | * This program is distributed in the hope that it will be useful, | ||
20 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
22 | * GNU General Public License for more details. | ||
23 | * | ||
24 | * You should have received a copy of the GNU General Public License | ||
25 | * along with this program; if not, write to the: | ||
26 | * Free Software Foundation, Inc., | ||
27 | * 59 Temple Place, Suite 330, | ||
28 | * Boston, MA 02111-1307 USA | ||
29 | * | ||
30 | * Change Activity: | ||
31 | * Created December 28, 2000 | ||
32 | * End Change Activity | ||
33 | */ | ||
34 | |||
35 | extern u8 iSeries_Read_Byte(const volatile void __iomem * IoAddress); | ||
36 | extern u16 iSeries_Read_Word(const volatile void __iomem * IoAddress); | ||
37 | extern u32 iSeries_Read_Long(const volatile void __iomem * IoAddress); | ||
38 | extern void iSeries_Write_Byte(u8 IoData, volatile void __iomem * IoAddress); | ||
39 | extern void iSeries_Write_Word(u16 IoData, volatile void __iomem * IoAddress); | ||
40 | extern void iSeries_Write_Long(u32 IoData, volatile void __iomem * IoAddress); | ||
41 | |||
42 | extern void iSeries_memset_io(volatile void __iomem *dest, char x, size_t n); | ||
43 | extern void iSeries_memcpy_toio(volatile void __iomem *dest, void *source, | ||
44 | size_t n); | ||
45 | extern void iSeries_memcpy_fromio(void *dest, | ||
46 | const volatile void __iomem *source, size_t n); | ||
47 | |||
48 | #endif /* CONFIG_PPC_ISERIES */ | ||
49 | #endif /* _ISERIES_IO_H */ | ||
diff --git a/include/asm-ppc64/iSeries/iSeries_irq.h b/include/asm-ppc64/iSeries/iSeries_irq.h deleted file mode 100644 index 6c9767ac1302..000000000000 --- a/include/asm-ppc64/iSeries/iSeries_irq.h +++ /dev/null | |||
@@ -1,8 +0,0 @@ | |||
1 | #ifndef __ISERIES_IRQ_H__ | ||
2 | #define __ISERIES_IRQ_H__ | ||
3 | |||
4 | extern void iSeries_init_IRQ(void); | ||
5 | extern int iSeries_allocate_IRQ(HvBusNumber, HvSubBusNumber, HvAgentId); | ||
6 | extern void iSeries_activate_IRQs(void); | ||
7 | |||
8 | #endif /* __ISERIES_IRQ_H__ */ | ||
diff --git a/include/asm-ppc64/iSeries/iSeries_pci.h b/include/asm-ppc64/iSeries/iSeries_pci.h deleted file mode 100644 index 575f611f8b33..000000000000 --- a/include/asm-ppc64/iSeries/iSeries_pci.h +++ /dev/null | |||
@@ -1,88 +0,0 @@ | |||
1 | #ifndef _ISERIES_64_PCI_H | ||
2 | #define _ISERIES_64_PCI_H | ||
3 | |||
4 | /* | ||
5 | * File iSeries_pci.h created by Allan Trautman on Tue Feb 20, 2001. | ||
6 | * | ||
7 | * Define some useful macros for the iSeries pci routines. | ||
8 | * Copyright (C) 2001 Allan H Trautman, IBM Corporation | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License as published by | ||
12 | * the Free Software Foundation; either version 2 of the License, or | ||
13 | * (at your option) any later version. | ||
14 | * | ||
15 | * This program is distributed in the hope that it will be useful, | ||
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
18 | * GNU General Public License for more details. | ||
19 | * | ||
20 | * You should have received a copy of the GNU General Public License | ||
21 | * along with this program; if not, write to the: | ||
22 | * Free Software Foundation, Inc., | ||
23 | * 59 Temple Place, Suite 330, | ||
24 | * Boston, MA 02111-1307 USA | ||
25 | * | ||
26 | * Change Activity: | ||
27 | * Created Feb 20, 2001 | ||
28 | * Added device reset, March 22, 2001 | ||
29 | * Ported to ppc64, May 25, 2001 | ||
30 | * End Change Activity | ||
31 | */ | ||
32 | |||
33 | #include <asm/iSeries/HvCallPci.h> | ||
34 | #include <asm/abs_addr.h> | ||
35 | |||
36 | struct pci_dev; /* For Forward Reference */ | ||
37 | struct iSeries_Device_Node; | ||
38 | |||
39 | /* | ||
40 | * Gets iSeries Bus, SubBus, DevFn using iSeries_Device_Node structure | ||
41 | */ | ||
42 | |||
43 | #define ISERIES_BUS(DevPtr) DevPtr->DsaAddr.Dsa.busNumber | ||
44 | #define ISERIES_SUBBUS(DevPtr) DevPtr->DsaAddr.Dsa.subBusNumber | ||
45 | #define ISERIES_DEVICE(DevPtr) DevPtr->DsaAddr.Dsa.deviceId | ||
46 | #define ISERIES_DSA(DevPtr) DevPtr->DsaAddr.DsaAddr | ||
47 | #define ISERIES_DEVNODE(PciDev) ((struct iSeries_Device_Node *)PciDev->sysdata) | ||
48 | |||
49 | #define EADsMaxAgents 7 | ||
50 | |||
51 | /* | ||
52 | * Decodes Linux DevFn to iSeries DevFn, bridge device, or function. | ||
53 | * For Linux, see PCI_SLOT and PCI_FUNC in include/linux/pci.h | ||
54 | */ | ||
55 | |||
56 | #define ISERIES_PCI_AGENTID(idsel, func) \ | ||
57 | (((idsel & 0x0F) << 4) | (func & 0x07)) | ||
58 | #define ISERIES_ENCODE_DEVICE(agentid) \ | ||
59 | ((0x10) | ((agentid & 0x20) >> 2) | (agentid & 0x07)) | ||
60 | |||
61 | #define ISERIES_GET_DEVICE_FROM_SUBBUS(subbus) ((subbus >> 5) & 0x7) | ||
62 | #define ISERIES_GET_FUNCTION_FROM_SUBBUS(subbus) ((subbus >> 2) & 0x7) | ||
63 | |||
64 | /* | ||
65 | * Converts Virtual Address to Real Address for Hypervisor calls | ||
66 | */ | ||
67 | #define ISERIES_HV_ADDR(virtaddr) \ | ||
68 | (0x8000000000000000 | virt_to_abs(virtaddr)) | ||
69 | |||
70 | /* | ||
71 | * iSeries Device Information | ||
72 | */ | ||
73 | struct iSeries_Device_Node { | ||
74 | struct list_head Device_List; | ||
75 | struct pci_dev *PciDev; | ||
76 | union HvDsaMap DsaAddr; /* Direct Select Address */ | ||
77 | /* busNumber, subBusNumber, */ | ||
78 | /* deviceId, barNumber */ | ||
79 | int DevFn; /* Linux devfn */ | ||
80 | int Irq; /* Assigned IRQ */ | ||
81 | int Flags; /* Possible flags(disable/bist)*/ | ||
82 | u8 LogicalSlot; /* Hv Slot Index for Tces */ | ||
83 | struct iommu_table *iommu_table;/* Device TCE Table */ | ||
84 | }; | ||
85 | |||
86 | extern void iSeries_Device_Information(struct pci_dev*, int); | ||
87 | |||
88 | #endif /* _ISERIES_64_PCI_H */ | ||
diff --git a/include/asm-ppc64/iSeries/mf.h b/include/asm-ppc64/iSeries/mf.h deleted file mode 100644 index 7e6a0d936999..000000000000 --- a/include/asm-ppc64/iSeries/mf.h +++ /dev/null | |||
@@ -1,57 +0,0 @@ | |||
1 | /* | ||
2 | * mf.h | ||
3 | * Copyright (C) 2001 Troy D. Armstrong IBM Corporation | ||
4 | * Copyright (C) 2004 Stephen Rothwell IBM Corporation | ||
5 | * | ||
6 | * This modules exists as an interface between a Linux secondary partition | ||
7 | * running on an iSeries and the primary partition's Virtual Service | ||
8 | * Processor (VSP) object. The VSP has final authority over powering on/off | ||
9 | * all partitions in the iSeries. It also provides miscellaneous low-level | ||
10 | * machine facility type operations. | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or modify | ||
13 | * it under the terms of the GNU General Public License as published by | ||
14 | * the Free Software Foundation; either version 2 of the License, or | ||
15 | * (at your option) any later version. | ||
16 | * | ||
17 | * This program is distributed in the hope that it will be useful, | ||
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
20 | * GNU General Public License for more details. | ||
21 | * | ||
22 | * You should have received a copy of the GNU General Public License | ||
23 | * along with this program; if not, write to the Free Software | ||
24 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
25 | */ | ||
26 | #ifndef _ASM_PPC64_ISERIES_MF_H | ||
27 | #define _ASM_PPC64_ISERIES_MF_H | ||
28 | |||
29 | #include <linux/types.h> | ||
30 | |||
31 | #include <asm/iSeries/HvTypes.h> | ||
32 | #include <asm/iSeries/HvCallEvent.h> | ||
33 | |||
34 | struct rtc_time; | ||
35 | |||
36 | typedef void (*MFCompleteHandler)(void *clientToken, int returnCode); | ||
37 | |||
38 | extern void mf_allocate_lp_events(HvLpIndex targetLp, HvLpEvent_Type type, | ||
39 | unsigned size, unsigned amount, MFCompleteHandler hdlr, | ||
40 | void *userToken); | ||
41 | extern void mf_deallocate_lp_events(HvLpIndex targetLp, HvLpEvent_Type type, | ||
42 | unsigned count, MFCompleteHandler hdlr, void *userToken); | ||
43 | |||
44 | extern void mf_power_off(void); | ||
45 | extern void mf_reboot(void); | ||
46 | |||
47 | extern void mf_display_src(u32 word); | ||
48 | extern void mf_display_progress(u16 value); | ||
49 | extern void mf_clear_src(void); | ||
50 | |||
51 | extern void mf_init(void); | ||
52 | |||
53 | extern int mf_get_rtc(struct rtc_time *tm); | ||
54 | extern int mf_get_boot_rtc(struct rtc_time *tm); | ||
55 | extern int mf_set_rtc(struct rtc_time *tm); | ||
56 | |||
57 | #endif /* _ASM_PPC64_ISERIES_MF_H */ | ||
diff --git a/include/asm-ppc64/iSeries/vio.h b/include/asm-ppc64/iSeries/vio.h deleted file mode 100644 index 6c05e6257f53..000000000000 --- a/include/asm-ppc64/iSeries/vio.h +++ /dev/null | |||
@@ -1,130 +0,0 @@ | |||
1 | /* -*- linux-c -*- | ||
2 | * drivers/char/vio.h | ||
3 | * | ||
4 | * iSeries Virtual I/O Message Path header | ||
5 | * | ||
6 | * Authors: Dave Boutcher <boutcher@us.ibm.com> | ||
7 | * Ryan Arnold <ryanarn@us.ibm.com> | ||
8 | * Colin Devilbiss <devilbis@us.ibm.com> | ||
9 | * | ||
10 | * (C) Copyright 2000 IBM Corporation | ||
11 | * | ||
12 | * This header file is used by the iSeries virtual I/O device | ||
13 | * drivers. It defines the interfaces to the common functions | ||
14 | * (implemented in drivers/char/viopath.h) as well as defining | ||
15 | * common functions and structures. Currently (at the time I | ||
16 | * wrote this comment) the iSeries virtual I/O device drivers | ||
17 | * that use this are | ||
18 | * drivers/block/viodasd.c | ||
19 | * drivers/char/viocons.c | ||
20 | * drivers/char/viotape.c | ||
21 | * drivers/cdrom/viocd.c | ||
22 | * | ||
23 | * The iSeries virtual ethernet support (veth.c) uses a whole | ||
24 | * different set of functions. | ||
25 | * | ||
26 | * This program is free software; you can redistribute it and/or | ||
27 | * modify it under the terms of the GNU General Public License as | ||
28 | * published by the Free Software Foundation; either version 2 of the | ||
29 | * License, or (at your option) anyu later version. | ||
30 | * | ||
31 | * This program is distributed in the hope that it will be useful, but | ||
32 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
33 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
34 | * General Public License for more details. | ||
35 | * | ||
36 | * You should have received a copy of the GNU General Public License | ||
37 | * along with this program; if not, write to the Free Software Foundation, | ||
38 | * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
39 | * | ||
40 | */ | ||
41 | #ifndef _ISERIES_VIO_H | ||
42 | #define _ISERIES_VIO_H | ||
43 | |||
44 | #include <asm/iSeries/HvTypes.h> | ||
45 | #include <asm/iSeries/HvLpEvent.h> | ||
46 | |||
47 | /* | ||
48 | * iSeries virtual I/O events use the subtype field in | ||
49 | * HvLpEvent to figure out what kind of vio event is coming | ||
50 | * in. We use a table to route these, and this defines | ||
51 | * the maximum number of distinct subtypes | ||
52 | */ | ||
53 | #define VIO_MAX_SUBTYPES 8 | ||
54 | |||
55 | /* | ||
56 | * Each subtype can register a handler to process their events. | ||
57 | * The handler must have this interface. | ||
58 | */ | ||
59 | typedef void (vio_event_handler_t) (struct HvLpEvent * event); | ||
60 | |||
61 | extern int viopath_open(HvLpIndex remoteLp, int subtype, int numReq); | ||
62 | extern int viopath_close(HvLpIndex remoteLp, int subtype, int numReq); | ||
63 | extern int vio_setHandler(int subtype, vio_event_handler_t * beh); | ||
64 | extern int vio_clearHandler(int subtype); | ||
65 | extern int viopath_isactive(HvLpIndex lp); | ||
66 | extern HvLpInstanceId viopath_sourceinst(HvLpIndex lp); | ||
67 | extern HvLpInstanceId viopath_targetinst(HvLpIndex lp); | ||
68 | extern void vio_set_hostlp(void); | ||
69 | extern void *vio_get_event_buffer(int subtype); | ||
70 | extern void vio_free_event_buffer(int subtype, void *buffer); | ||
71 | |||
72 | extern HvLpIndex viopath_hostLp; | ||
73 | extern HvLpIndex viopath_ourLp; | ||
74 | |||
75 | #define VIOCHAR_MAX_DATA 200 | ||
76 | |||
77 | #define VIOMAJOR_SUBTYPE_MASK 0xff00 | ||
78 | #define VIOMINOR_SUBTYPE_MASK 0x00ff | ||
79 | #define VIOMAJOR_SUBTYPE_SHIFT 8 | ||
80 | |||
81 | #define VIOVERSION 0x0101 | ||
82 | |||
83 | /* | ||
84 | * This is the general structure for VIO errors; each module should have | ||
85 | * a table of them, and each table should be terminated by an entry of | ||
86 | * { 0, 0, NULL }. Then, to find a specific error message, a module | ||
87 | * should pass its local table and the return code. | ||
88 | */ | ||
89 | struct vio_error_entry { | ||
90 | u16 rc; | ||
91 | int errno; | ||
92 | const char *msg; | ||
93 | }; | ||
94 | extern const struct vio_error_entry *vio_lookup_rc( | ||
95 | const struct vio_error_entry *local_table, u16 rc); | ||
96 | |||
97 | enum viosubtypes { | ||
98 | viomajorsubtype_monitor = 0x0100, | ||
99 | viomajorsubtype_blockio = 0x0200, | ||
100 | viomajorsubtype_chario = 0x0300, | ||
101 | viomajorsubtype_config = 0x0400, | ||
102 | viomajorsubtype_cdio = 0x0500, | ||
103 | viomajorsubtype_tape = 0x0600, | ||
104 | viomajorsubtype_scsi = 0x0700 | ||
105 | }; | ||
106 | |||
107 | enum vioconfigsubtype { | ||
108 | vioconfigget = 0x0001, | ||
109 | }; | ||
110 | |||
111 | enum viorc { | ||
112 | viorc_good = 0x0000, | ||
113 | viorc_noConnection = 0x0001, | ||
114 | viorc_noReceiver = 0x0002, | ||
115 | viorc_noBufferAvailable = 0x0003, | ||
116 | viorc_invalidMessageType = 0x0004, | ||
117 | viorc_invalidRange = 0x0201, | ||
118 | viorc_invalidToken = 0x0202, | ||
119 | viorc_DMAError = 0x0203, | ||
120 | viorc_useError = 0x0204, | ||
121 | viorc_releaseError = 0x0205, | ||
122 | viorc_invalidDisk = 0x0206, | ||
123 | viorc_openRejected = 0x0301 | ||
124 | }; | ||
125 | |||
126 | struct device; | ||
127 | |||
128 | extern struct device *iSeries_vio_dev; | ||
129 | |||
130 | #endif /* _ISERIES_VIO_H */ | ||
diff --git a/include/asm-ppc64/io.h b/include/asm-ppc64/io.h index 59c958aea4db..77fc07c3c6bd 100644 --- a/include/asm-ppc64/io.h +++ b/include/asm-ppc64/io.h | |||
@@ -13,9 +13,9 @@ | |||
13 | #include <asm/page.h> | 13 | #include <asm/page.h> |
14 | #include <asm/byteorder.h> | 14 | #include <asm/byteorder.h> |
15 | #ifdef CONFIG_PPC_ISERIES | 15 | #ifdef CONFIG_PPC_ISERIES |
16 | #include <asm/iSeries/iSeries_io.h> | 16 | #include <asm/iseries/iseries_io.h> |
17 | #endif | 17 | #endif |
18 | #include <asm/memory.h> | 18 | #include <asm/synch.h> |
19 | #include <asm/delay.h> | 19 | #include <asm/delay.h> |
20 | 20 | ||
21 | #include <asm-generic/iomap.h> | 21 | #include <asm-generic/iomap.h> |
diff --git a/include/asm-ppc64/iommu.h b/include/asm-ppc64/iommu.h deleted file mode 100644 index c2f3b6e8a42f..000000000000 --- a/include/asm-ppc64/iommu.h +++ /dev/null | |||
@@ -1,146 +0,0 @@ | |||
1 | /* | ||
2 | * iommu.h | ||
3 | * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation | ||
4 | * Rewrite, cleanup: | ||
5 | * Copyright (C) 2004 Olof Johansson <olof@austin.ibm.com>, IBM Corporation | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | */ | ||
21 | |||
22 | #ifndef _ASM_IOMMU_H | ||
23 | #define _ASM_IOMMU_H | ||
24 | |||
25 | #include <asm/types.h> | ||
26 | #include <linux/spinlock.h> | ||
27 | #include <linux/device.h> | ||
28 | #include <linux/dma-mapping.h> | ||
29 | |||
30 | /* | ||
31 | * IOMAP_MAX_ORDER defines the largest contiguous block | ||
32 | * of dma (tce) space we can get. IOMAP_MAX_ORDER = 13 | ||
33 | * allows up to 2**12 pages (4096 * 4096) = 16 MB | ||
34 | */ | ||
35 | #define IOMAP_MAX_ORDER 13 | ||
36 | |||
37 | /* | ||
38 | * Tces come in two formats, one for the virtual bus and a different | ||
39 | * format for PCI | ||
40 | */ | ||
41 | #define TCE_VB 0 | ||
42 | #define TCE_PCI 1 | ||
43 | |||
44 | /* tce_entry | ||
45 | * Used by pSeries (SMP) and iSeries/pSeries LPAR, but there it's | ||
46 | * abstracted so layout is irrelevant. | ||
47 | */ | ||
48 | union tce_entry { | ||
49 | unsigned long te_word; | ||
50 | struct { | ||
51 | unsigned int tb_cacheBits :6; /* Cache hash bits - not used */ | ||
52 | unsigned int tb_rsvd :6; | ||
53 | unsigned long tb_rpn :40; /* Real page number */ | ||
54 | unsigned int tb_valid :1; /* Tce is valid (vb only) */ | ||
55 | unsigned int tb_allio :1; /* Tce is valid for all lps (vb only) */ | ||
56 | unsigned int tb_lpindex :8; /* LpIndex for user of TCE (vb only) */ | ||
57 | unsigned int tb_pciwr :1; /* Write allowed (pci only) */ | ||
58 | unsigned int tb_rdwr :1; /* Read allowed (pci), Write allowed (vb) */ | ||
59 | } te_bits; | ||
60 | #define te_cacheBits te_bits.tb_cacheBits | ||
61 | #define te_rpn te_bits.tb_rpn | ||
62 | #define te_valid te_bits.tb_valid | ||
63 | #define te_allio te_bits.tb_allio | ||
64 | #define te_lpindex te_bits.tb_lpindex | ||
65 | #define te_pciwr te_bits.tb_pciwr | ||
66 | #define te_rdwr te_bits.tb_rdwr | ||
67 | }; | ||
68 | |||
69 | |||
70 | struct iommu_table { | ||
71 | unsigned long it_busno; /* Bus number this table belongs to */ | ||
72 | unsigned long it_size; /* Size of iommu table in entries */ | ||
73 | unsigned long it_offset; /* Offset into global table */ | ||
74 | unsigned long it_base; /* mapped address of tce table */ | ||
75 | unsigned long it_index; /* which iommu table this is */ | ||
76 | unsigned long it_type; /* type: PCI or Virtual Bus */ | ||
77 | unsigned long it_blocksize; /* Entries in each block (cacheline) */ | ||
78 | unsigned long it_hint; /* Hint for next alloc */ | ||
79 | unsigned long it_largehint; /* Hint for large allocs */ | ||
80 | unsigned long it_halfpoint; /* Breaking point for small/large allocs */ | ||
81 | spinlock_t it_lock; /* Protects it_map */ | ||
82 | unsigned long *it_map; /* A simple allocation bitmap for now */ | ||
83 | }; | ||
84 | |||
85 | struct scatterlist; | ||
86 | |||
87 | #ifdef CONFIG_PPC_MULTIPLATFORM | ||
88 | |||
89 | /* Walks all buses and creates iommu tables */ | ||
90 | extern void iommu_setup_pSeries(void); | ||
91 | extern void iommu_setup_u3(void); | ||
92 | |||
93 | /* Frees table for an individual device node */ | ||
94 | extern void iommu_free_table(struct device_node *dn); | ||
95 | |||
96 | #endif /* CONFIG_PPC_MULTIPLATFORM */ | ||
97 | |||
98 | #ifdef CONFIG_PPC_PSERIES | ||
99 | |||
100 | /* Creates table for an individual device node */ | ||
101 | extern void iommu_devnode_init_pSeries(struct device_node *dn); | ||
102 | |||
103 | #endif /* CONFIG_PPC_PSERIES */ | ||
104 | |||
105 | #ifdef CONFIG_PPC_ISERIES | ||
106 | |||
107 | struct iSeries_Device_Node; | ||
108 | /* Creates table for an individual device node */ | ||
109 | extern void iommu_devnode_init_iSeries(struct iSeries_Device_Node *dn); | ||
110 | |||
111 | #endif /* CONFIG_PPC_ISERIES */ | ||
112 | |||
113 | /* Initializes an iommu_table based in values set in the passed-in | ||
114 | * structure | ||
115 | */ | ||
116 | extern struct iommu_table *iommu_init_table(struct iommu_table * tbl); | ||
117 | |||
118 | extern int iommu_map_sg(struct device *dev, struct iommu_table *tbl, | ||
119 | struct scatterlist *sglist, int nelems, | ||
120 | enum dma_data_direction direction); | ||
121 | extern void iommu_unmap_sg(struct iommu_table *tbl, struct scatterlist *sglist, | ||
122 | int nelems, enum dma_data_direction direction); | ||
123 | |||
124 | extern void *iommu_alloc_coherent(struct iommu_table *tbl, size_t size, | ||
125 | dma_addr_t *dma_handle, gfp_t flag); | ||
126 | extern void iommu_free_coherent(struct iommu_table *tbl, size_t size, | ||
127 | void *vaddr, dma_addr_t dma_handle); | ||
128 | extern dma_addr_t iommu_map_single(struct iommu_table *tbl, void *vaddr, | ||
129 | size_t size, enum dma_data_direction direction); | ||
130 | extern void iommu_unmap_single(struct iommu_table *tbl, dma_addr_t dma_handle, | ||
131 | size_t size, enum dma_data_direction direction); | ||
132 | |||
133 | extern void iommu_init_early_pSeries(void); | ||
134 | extern void iommu_init_early_iSeries(void); | ||
135 | extern void iommu_init_early_u3(void); | ||
136 | |||
137 | #ifdef CONFIG_PCI | ||
138 | extern void pci_iommu_init(void); | ||
139 | extern void pci_direct_iommu_init(void); | ||
140 | #else | ||
141 | static inline void pci_iommu_init(void) { } | ||
142 | #endif | ||
143 | |||
144 | extern void alloc_u3_dart_table(void); | ||
145 | |||
146 | #endif /* _ASM_IOMMU_H */ | ||
diff --git a/include/asm-ppc64/ipcbuf.h b/include/asm-ppc64/ipcbuf.h deleted file mode 100644 index fa393c8342af..000000000000 --- a/include/asm-ppc64/ipcbuf.h +++ /dev/null | |||
@@ -1,28 +0,0 @@ | |||
1 | #ifndef __PPC64_IPCBUF_H__ | ||
2 | #define __PPC64_IPCBUF_H__ | ||
3 | |||
4 | /* | ||
5 | * The ipc64_perm structure for the PPC is identical to kern_ipc_perm | ||
6 | * as we have always had 32-bit UIDs and GIDs in the kernel. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License | ||
10 | * as published by the Free Software Foundation; either version | ||
11 | * 2 of the License, or (at your option) any later version. | ||
12 | */ | ||
13 | |||
14 | struct ipc64_perm | ||
15 | { | ||
16 | __kernel_key_t key; | ||
17 | __kernel_uid_t uid; | ||
18 | __kernel_gid_t gid; | ||
19 | __kernel_uid_t cuid; | ||
20 | __kernel_gid_t cgid; | ||
21 | __kernel_mode_t mode; | ||
22 | unsigned int seq; | ||
23 | unsigned int __pad1; | ||
24 | unsigned long __unused1; | ||
25 | unsigned long __unused2; | ||
26 | }; | ||
27 | |||
28 | #endif /* __PPC64_IPCBUF_H__ */ | ||
diff --git a/include/asm-ppc64/irq.h b/include/asm-ppc64/irq.h deleted file mode 100644 index 99782afb4cde..000000000000 --- a/include/asm-ppc64/irq.h +++ /dev/null | |||
@@ -1,120 +0,0 @@ | |||
1 | #ifdef __KERNEL__ | ||
2 | #ifndef _ASM_IRQ_H | ||
3 | #define _ASM_IRQ_H | ||
4 | |||
5 | /* | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/config.h> | ||
13 | #include <linux/threads.h> | ||
14 | |||
15 | /* | ||
16 | * Maximum number of interrupt sources that we can handle. | ||
17 | */ | ||
18 | #define NR_IRQS 512 | ||
19 | |||
20 | /* this number is used when no interrupt has been assigned */ | ||
21 | #define NO_IRQ (-1) | ||
22 | |||
23 | /* | ||
24 | * These constants are used for passing information about interrupt | ||
25 | * signal polarity and level/edge sensing to the low-level PIC chip | ||
26 | * drivers. | ||
27 | */ | ||
28 | #define IRQ_SENSE_MASK 0x1 | ||
29 | #define IRQ_SENSE_LEVEL 0x1 /* interrupt on active level */ | ||
30 | #define IRQ_SENSE_EDGE 0x0 /* interrupt triggered by edge */ | ||
31 | |||
32 | #define IRQ_POLARITY_MASK 0x2 | ||
33 | #define IRQ_POLARITY_POSITIVE 0x2 /* high level or low->high edge */ | ||
34 | #define IRQ_POLARITY_NEGATIVE 0x0 /* low level or high->low edge */ | ||
35 | |||
36 | /* | ||
37 | * IRQ line status macro IRQ_PER_CPU is used | ||
38 | */ | ||
39 | #define ARCH_HAS_IRQ_PER_CPU | ||
40 | |||
41 | #define get_irq_desc(irq) (&irq_desc[(irq)]) | ||
42 | |||
43 | /* Define a way to iterate across irqs. */ | ||
44 | #define for_each_irq(i) \ | ||
45 | for ((i) = 0; (i) < NR_IRQS; ++(i)) | ||
46 | |||
47 | /* Interrupt numbers are virtual in case they are sparsely | ||
48 | * distributed by the hardware. | ||
49 | */ | ||
50 | extern unsigned int virt_irq_to_real_map[NR_IRQS]; | ||
51 | |||
52 | /* Create a mapping for a real_irq if it doesn't already exist. | ||
53 | * Return the virtual irq as a convenience. | ||
54 | */ | ||
55 | int virt_irq_create_mapping(unsigned int real_irq); | ||
56 | void virt_irq_init(void); | ||
57 | |||
58 | static inline unsigned int virt_irq_to_real(unsigned int virt_irq) | ||
59 | { | ||
60 | return virt_irq_to_real_map[virt_irq]; | ||
61 | } | ||
62 | |||
63 | extern unsigned int real_irq_to_virt_slowpath(unsigned int real_irq); | ||
64 | |||
65 | /* | ||
66 | * Because many systems have two overlapping names spaces for | ||
67 | * interrupts (ISA and XICS for example), and the ISA interrupts | ||
68 | * have historically not been easy to renumber, we allow ISA | ||
69 | * interrupts to take values 0 - 15, and shift up the remaining | ||
70 | * interrupts by 0x10. | ||
71 | */ | ||
72 | #define NUM_ISA_INTERRUPTS 0x10 | ||
73 | extern int __irq_offset_value; | ||
74 | |||
75 | static inline int irq_offset_up(int irq) | ||
76 | { | ||
77 | return(irq + __irq_offset_value); | ||
78 | } | ||
79 | |||
80 | static inline int irq_offset_down(int irq) | ||
81 | { | ||
82 | return(irq - __irq_offset_value); | ||
83 | } | ||
84 | |||
85 | static inline int irq_offset_value(void) | ||
86 | { | ||
87 | return __irq_offset_value; | ||
88 | } | ||
89 | |||
90 | static __inline__ int irq_canonicalize(int irq) | ||
91 | { | ||
92 | return irq; | ||
93 | } | ||
94 | |||
95 | extern int distribute_irqs; | ||
96 | |||
97 | struct irqaction; | ||
98 | struct pt_regs; | ||
99 | |||
100 | #ifdef CONFIG_IRQSTACKS | ||
101 | /* | ||
102 | * Per-cpu stacks for handling hard and soft interrupts. | ||
103 | */ | ||
104 | extern struct thread_info *hardirq_ctx[NR_CPUS]; | ||
105 | extern struct thread_info *softirq_ctx[NR_CPUS]; | ||
106 | |||
107 | extern void irq_ctx_init(void); | ||
108 | extern void call_do_softirq(struct thread_info *tp); | ||
109 | extern int call_handle_IRQ_event(int irq, struct pt_regs *regs, | ||
110 | struct irqaction *action, struct thread_info *tp); | ||
111 | |||
112 | #define __ARCH_HAS_DO_SOFTIRQ | ||
113 | |||
114 | #else | ||
115 | #define irq_ctx_init() | ||
116 | |||
117 | #endif /* CONFIG_IRQSTACKS */ | ||
118 | |||
119 | #endif /* _ASM_IRQ_H */ | ||
120 | #endif /* __KERNEL__ */ | ||
diff --git a/include/asm-ppc64/kdebug.h b/include/asm-ppc64/kdebug.h deleted file mode 100644 index d383d161cf8d..000000000000 --- a/include/asm-ppc64/kdebug.h +++ /dev/null | |||
@@ -1,43 +0,0 @@ | |||
1 | #ifndef _PPC64_KDEBUG_H | ||
2 | #define _PPC64_KDEBUG_H 1 | ||
3 | |||
4 | /* nearly identical to x86_64/i386 code */ | ||
5 | |||
6 | #include <linux/notifier.h> | ||
7 | |||
8 | struct pt_regs; | ||
9 | |||
10 | struct die_args { | ||
11 | struct pt_regs *regs; | ||
12 | const char *str; | ||
13 | long err; | ||
14 | int trapnr; | ||
15 | int signr; | ||
16 | }; | ||
17 | |||
18 | /* | ||
19 | Note - you should never unregister because that can race with NMIs. | ||
20 | If you really want to do it first unregister - then synchronize_sched - | ||
21 | then free. | ||
22 | */ | ||
23 | int register_die_notifier(struct notifier_block *nb); | ||
24 | extern struct notifier_block *ppc64_die_chain; | ||
25 | |||
26 | /* Grossly misnamed. */ | ||
27 | enum die_val { | ||
28 | DIE_OOPS = 1, | ||
29 | DIE_IABR_MATCH, | ||
30 | DIE_DABR_MATCH, | ||
31 | DIE_BPT, | ||
32 | DIE_SSTEP, | ||
33 | DIE_GPF, | ||
34 | DIE_PAGE_FAULT, | ||
35 | }; | ||
36 | |||
37 | static inline int notify_die(enum die_val val,char *str,struct pt_regs *regs,long err,int trap, int sig) | ||
38 | { | ||
39 | struct die_args args = { .regs=regs, .str=str, .err=err, .trapnr=trap,.signr=sig }; | ||
40 | return notifier_call_chain(&ppc64_die_chain, val, &args); | ||
41 | } | ||
42 | |||
43 | #endif | ||
diff --git a/include/asm-ppc64/kexec.h b/include/asm-ppc64/kexec.h deleted file mode 100644 index 511908afaeeb..000000000000 --- a/include/asm-ppc64/kexec.h +++ /dev/null | |||
@@ -1,41 +0,0 @@ | |||
1 | #ifndef _PPC64_KEXEC_H | ||
2 | #define _PPC64_KEXEC_H | ||
3 | |||
4 | /* | ||
5 | * KEXEC_SOURCE_MEMORY_LIMIT maximum page get_free_page can return. | ||
6 | * I.e. Maximum page that is mapped directly into kernel memory, | ||
7 | * and kmap is not required. | ||
8 | */ | ||
9 | |||
10 | /* Maximum physical address we can use pages from */ | ||
11 | /* XXX: since we copy virt we can use any page we allocate */ | ||
12 | #define KEXEC_SOURCE_MEMORY_LIMIT (-1UL) | ||
13 | |||
14 | /* Maximum address we can reach in physical address mode */ | ||
15 | /* XXX: I want to allow initrd in highmem. otherwise set to rmo on lpar */ | ||
16 | #define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL) | ||
17 | |||
18 | /* Maximum address we can use for the control code buffer */ | ||
19 | /* XXX: unused today, ppc32 uses TASK_SIZE, probably left over from use_mm */ | ||
20 | #define KEXEC_CONTROL_MEMORY_LIMIT (-1UL) | ||
21 | |||
22 | /* XXX: today we don't use this at all, althogh we have a static stack */ | ||
23 | #define KEXEC_CONTROL_CODE_SIZE 4096 | ||
24 | |||
25 | /* The native architecture */ | ||
26 | #define KEXEC_ARCH KEXEC_ARCH_PPC64 | ||
27 | |||
28 | #define MAX_NOTE_BYTES 1024 | ||
29 | |||
30 | #ifndef __ASSEMBLY__ | ||
31 | |||
32 | typedef u32 note_buf_t[MAX_NOTE_BYTES/4]; | ||
33 | |||
34 | extern note_buf_t crash_notes[]; | ||
35 | |||
36 | extern void kexec_smp_wait(void); /* get and clear naca physid, wait for | ||
37 | master to copy new code to 0 */ | ||
38 | |||
39 | #endif /* __ASSEMBLY__ */ | ||
40 | #endif /* _PPC_KEXEC_H */ | ||
41 | |||
diff --git a/include/asm-ppc64/keylargo.h b/include/asm-ppc64/keylargo.h deleted file mode 100644 index 4d78e3d0314c..000000000000 --- a/include/asm-ppc64/keylargo.h +++ /dev/null | |||
@@ -1,2 +0,0 @@ | |||
1 | #include <asm-ppc/keylargo.h> | ||
2 | |||
diff --git a/include/asm-ppc64/kmap_types.h b/include/asm-ppc64/kmap_types.h deleted file mode 100644 index fd1574648223..000000000000 --- a/include/asm-ppc64/kmap_types.h +++ /dev/null | |||
@@ -1,23 +0,0 @@ | |||
1 | #ifdef __KERNEL__ | ||
2 | #ifndef _ASM_KMAP_TYPES_H | ||
3 | #define _ASM_KMAP_TYPES_H | ||
4 | |||
5 | enum km_type { | ||
6 | KM_BOUNCE_READ, | ||
7 | KM_SKB_SUNRPC_DATA, | ||
8 | KM_SKB_DATA_SOFTIRQ, | ||
9 | KM_USER0, | ||
10 | KM_USER1, | ||
11 | KM_BIO_SRC_IRQ, | ||
12 | KM_BIO_DST_IRQ, | ||
13 | KM_PTE0, | ||
14 | KM_PTE1, | ||
15 | KM_IRQ0, | ||
16 | KM_IRQ1, | ||
17 | KM_SOFTIRQ0, | ||
18 | KM_SOFTIRQ1, | ||
19 | KM_TYPE_NR | ||
20 | }; | ||
21 | |||
22 | #endif | ||
23 | #endif /* __KERNEL__ */ | ||
diff --git a/include/asm-ppc64/kprobes.h b/include/asm-ppc64/kprobes.h deleted file mode 100644 index d9129d2b038e..000000000000 --- a/include/asm-ppc64/kprobes.h +++ /dev/null | |||
@@ -1,67 +0,0 @@ | |||
1 | #ifndef _ASM_KPROBES_H | ||
2 | #define _ASM_KPROBES_H | ||
3 | /* | ||
4 | * Kernel Probes (KProbes) | ||
5 | * include/asm-ppc64/kprobes.h | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | ||
20 | * | ||
21 | * Copyright (C) IBM Corporation, 2002, 2004 | ||
22 | * | ||
23 | * 2002-Oct Created by Vamsi Krishna S <vamsi_krishna@in.ibm.com> Kernel | ||
24 | * Probes initial implementation ( includes suggestions from | ||
25 | * Rusty Russell). | ||
26 | * 2004-Nov Modified for PPC64 by Ananth N Mavinakayanahalli | ||
27 | * <ananth@in.ibm.com> | ||
28 | */ | ||
29 | #include <linux/types.h> | ||
30 | #include <linux/ptrace.h> | ||
31 | |||
32 | struct pt_regs; | ||
33 | |||
34 | typedef unsigned int kprobe_opcode_t; | ||
35 | #define BREAKPOINT_INSTRUCTION 0x7fe00008 /* trap */ | ||
36 | #define MAX_INSN_SIZE 1 | ||
37 | |||
38 | #define IS_TW(instr) (((instr) & 0xfc0007fe) == 0x7c000008) | ||
39 | #define IS_TD(instr) (((instr) & 0xfc0007fe) == 0x7c000088) | ||
40 | #define IS_TDI(instr) (((instr) & 0xfc000000) == 0x08000000) | ||
41 | #define IS_TWI(instr) (((instr) & 0xfc000000) == 0x0c000000) | ||
42 | |||
43 | #define JPROBE_ENTRY(pentry) (kprobe_opcode_t *)((func_descr_t *)pentry) | ||
44 | |||
45 | #define is_trap(instr) (IS_TW(instr) || IS_TD(instr) || \ | ||
46 | IS_TWI(instr) || IS_TDI(instr)) | ||
47 | |||
48 | #define ARCH_SUPPORTS_KRETPROBES | ||
49 | void kretprobe_trampoline(void); | ||
50 | |||
51 | /* Architecture specific copy of original instruction */ | ||
52 | struct arch_specific_insn { | ||
53 | /* copy of original instruction */ | ||
54 | kprobe_opcode_t *insn; | ||
55 | }; | ||
56 | |||
57 | #ifdef CONFIG_KPROBES | ||
58 | extern int kprobe_exceptions_notify(struct notifier_block *self, | ||
59 | unsigned long val, void *data); | ||
60 | #else /* !CONFIG_KPROBES */ | ||
61 | static inline int kprobe_exceptions_notify(struct notifier_block *self, | ||
62 | unsigned long val, void *data) | ||
63 | { | ||
64 | return 0; | ||
65 | } | ||
66 | #endif | ||
67 | #endif /* _ASM_KPROBES_H */ | ||
diff --git a/include/asm-ppc64/lmb.h b/include/asm-ppc64/lmb.h deleted file mode 100644 index de91e034bd98..000000000000 --- a/include/asm-ppc64/lmb.h +++ /dev/null | |||
@@ -1,81 +0,0 @@ | |||
1 | #ifndef _PPC64_LMB_H | ||
2 | #define _PPC64_LMB_H | ||
3 | |||
4 | /* | ||
5 | * Definitions for talking to the Open Firmware PROM on | ||
6 | * Power Macintosh computers. | ||
7 | * | ||
8 | * Copyright (C) 2001 Peter Bergner, IBM Corp. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or | ||
11 | * modify it under the terms of the GNU General Public License | ||
12 | * as published by the Free Software Foundation; either version | ||
13 | * 2 of the License, or (at your option) any later version. | ||
14 | */ | ||
15 | |||
16 | #include <linux/init.h> | ||
17 | #include <asm/prom.h> | ||
18 | |||
19 | #define MAX_LMB_REGIONS 128 | ||
20 | |||
21 | #define LMB_ALLOC_ANYWHERE 0 | ||
22 | |||
23 | struct lmb_property { | ||
24 | unsigned long base; | ||
25 | unsigned long size; | ||
26 | }; | ||
27 | |||
28 | struct lmb_region { | ||
29 | unsigned long cnt; | ||
30 | unsigned long size; | ||
31 | struct lmb_property region[MAX_LMB_REGIONS+1]; | ||
32 | }; | ||
33 | |||
34 | struct lmb { | ||
35 | unsigned long debug; | ||
36 | unsigned long rmo_size; | ||
37 | struct lmb_region memory; | ||
38 | struct lmb_region reserved; | ||
39 | }; | ||
40 | |||
41 | extern struct lmb lmb; | ||
42 | |||
43 | extern void __init lmb_init(void); | ||
44 | extern void __init lmb_analyze(void); | ||
45 | extern long __init lmb_add(unsigned long, unsigned long); | ||
46 | extern long __init lmb_reserve(unsigned long, unsigned long); | ||
47 | extern unsigned long __init lmb_alloc(unsigned long, unsigned long); | ||
48 | extern unsigned long __init lmb_alloc_base(unsigned long, unsigned long, | ||
49 | unsigned long); | ||
50 | extern unsigned long __init lmb_phys_mem_size(void); | ||
51 | extern unsigned long __init lmb_end_of_DRAM(void); | ||
52 | extern unsigned long __init lmb_abs_to_phys(unsigned long); | ||
53 | extern void __init lmb_enforce_memory_limit(void); | ||
54 | |||
55 | extern void lmb_dump_all(void); | ||
56 | |||
57 | extern unsigned long io_hole_start; | ||
58 | |||
59 | static inline unsigned long | ||
60 | lmb_size_bytes(struct lmb_region *type, unsigned long region_nr) | ||
61 | { | ||
62 | return type->region[region_nr].size; | ||
63 | } | ||
64 | static inline unsigned long | ||
65 | lmb_size_pages(struct lmb_region *type, unsigned long region_nr) | ||
66 | { | ||
67 | return lmb_size_bytes(type, region_nr) >> PAGE_SHIFT; | ||
68 | } | ||
69 | static inline unsigned long | ||
70 | lmb_start_pfn(struct lmb_region *type, unsigned long region_nr) | ||
71 | { | ||
72 | return type->region[region_nr].base >> PAGE_SHIFT; | ||
73 | } | ||
74 | static inline unsigned long | ||
75 | lmb_end_pfn(struct lmb_region *type, unsigned long region_nr) | ||
76 | { | ||
77 | return lmb_start_pfn(type, region_nr) + | ||
78 | lmb_size_pages(type, region_nr); | ||
79 | } | ||
80 | |||
81 | #endif /* _PPC64_LMB_H */ | ||
diff --git a/include/asm-ppc64/machdep.h b/include/asm-ppc64/machdep.h deleted file mode 100644 index 8027160ec96d..000000000000 --- a/include/asm-ppc64/machdep.h +++ /dev/null | |||
@@ -1,185 +0,0 @@ | |||
1 | #ifdef __KERNEL__ | ||
2 | #ifndef _PPC64_MACHDEP_H | ||
3 | #define _PPC64_MACHDEP_H | ||
4 | |||
5 | /* | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/config.h> | ||
13 | #include <linux/seq_file.h> | ||
14 | #include <linux/init.h> | ||
15 | #include <linux/dma-mapping.h> | ||
16 | |||
17 | #include <asm/setup.h> | ||
18 | |||
19 | struct pt_regs; | ||
20 | struct pci_bus; | ||
21 | struct device_node; | ||
22 | struct iommu_table; | ||
23 | struct rtc_time; | ||
24 | struct file; | ||
25 | |||
26 | #ifdef CONFIG_SMP | ||
27 | struct smp_ops_t { | ||
28 | void (*message_pass)(int target, int msg); | ||
29 | int (*probe)(void); | ||
30 | void (*kick_cpu)(int nr); | ||
31 | void (*setup_cpu)(int nr); | ||
32 | void (*take_timebase)(void); | ||
33 | void (*give_timebase)(void); | ||
34 | int (*cpu_enable)(unsigned int nr); | ||
35 | int (*cpu_disable)(void); | ||
36 | void (*cpu_die)(unsigned int nr); | ||
37 | int (*cpu_bootable)(unsigned int nr); | ||
38 | }; | ||
39 | #endif | ||
40 | |||
41 | struct machdep_calls { | ||
42 | void (*hpte_invalidate)(unsigned long slot, | ||
43 | unsigned long va, | ||
44 | int large, | ||
45 | int local); | ||
46 | long (*hpte_updatepp)(unsigned long slot, | ||
47 | unsigned long newpp, | ||
48 | unsigned long va, | ||
49 | int large, | ||
50 | int local); | ||
51 | void (*hpte_updateboltedpp)(unsigned long newpp, | ||
52 | unsigned long ea); | ||
53 | long (*hpte_insert)(unsigned long hpte_group, | ||
54 | unsigned long va, | ||
55 | unsigned long prpn, | ||
56 | unsigned long vflags, | ||
57 | unsigned long rflags); | ||
58 | long (*hpte_remove)(unsigned long hpte_group); | ||
59 | void (*flush_hash_range)(unsigned long context, | ||
60 | unsigned long number, | ||
61 | int local); | ||
62 | /* special for kexec, to be called in real mode, linar mapping is | ||
63 | * destroyed as well */ | ||
64 | void (*hpte_clear_all)(void); | ||
65 | |||
66 | void (*tce_build)(struct iommu_table * tbl, | ||
67 | long index, | ||
68 | long npages, | ||
69 | unsigned long uaddr, | ||
70 | enum dma_data_direction direction); | ||
71 | void (*tce_free)(struct iommu_table *tbl, | ||
72 | long index, | ||
73 | long npages); | ||
74 | void (*tce_flush)(struct iommu_table *tbl); | ||
75 | void (*iommu_dev_setup)(struct pci_dev *dev); | ||
76 | void (*iommu_bus_setup)(struct pci_bus *bus); | ||
77 | void (*irq_bus_setup)(struct pci_bus *bus); | ||
78 | |||
79 | int (*probe)(int platform); | ||
80 | void (*setup_arch)(void); | ||
81 | void (*init_early)(void); | ||
82 | /* Optional, may be NULL. */ | ||
83 | void (*get_cpuinfo)(struct seq_file *m); | ||
84 | |||
85 | void (*init_IRQ)(void); | ||
86 | int (*get_irq)(struct pt_regs *); | ||
87 | void (*cpu_irq_down)(int secondary); | ||
88 | |||
89 | /* PCI stuff */ | ||
90 | void (*pcibios_fixup)(void); | ||
91 | int (*pci_probe_mode)(struct pci_bus *); | ||
92 | |||
93 | void (*restart)(char *cmd); | ||
94 | void (*power_off)(void); | ||
95 | void (*halt)(void); | ||
96 | void (*panic)(char *str); | ||
97 | void (*cpu_die)(void); | ||
98 | |||
99 | int (*set_rtc_time)(struct rtc_time *); | ||
100 | void (*get_rtc_time)(struct rtc_time *); | ||
101 | void (*get_boot_time)(struct rtc_time *); | ||
102 | |||
103 | void (*calibrate_decr)(void); | ||
104 | |||
105 | void (*progress)(char *, unsigned short); | ||
106 | |||
107 | /* Interface for platform error logging */ | ||
108 | void (*log_error)(char *buf, unsigned int err_type, int fatal); | ||
109 | |||
110 | ssize_t (*nvram_write)(char *buf, size_t count, loff_t *index); | ||
111 | ssize_t (*nvram_read)(char *buf, size_t count, loff_t *index); | ||
112 | ssize_t (*nvram_size)(void); | ||
113 | int (*nvram_sync)(void); | ||
114 | |||
115 | /* Exception handlers */ | ||
116 | void (*system_reset_exception)(struct pt_regs *regs); | ||
117 | int (*machine_check_exception)(struct pt_regs *regs); | ||
118 | |||
119 | /* Motherboard/chipset features. This is a kind of general purpose | ||
120 | * hook used to control some machine specific features (like reset | ||
121 | * lines, chip power control, etc...). | ||
122 | */ | ||
123 | long (*feature_call)(unsigned int feature, ...); | ||
124 | |||
125 | /* Check availability of legacy devices like i8042 */ | ||
126 | int (*check_legacy_ioport)(unsigned int baseport); | ||
127 | |||
128 | /* Get legacy PCI/IDE interrupt mapping */ | ||
129 | int (*pci_get_legacy_ide_irq)(struct pci_dev *dev, int channel); | ||
130 | |||
131 | /* Get access protection for /dev/mem */ | ||
132 | pgprot_t (*phys_mem_access_prot)(struct file *file, | ||
133 | unsigned long offset, | ||
134 | unsigned long size, | ||
135 | pgprot_t vma_prot); | ||
136 | |||
137 | /* Idle loop for this platform, leave empty for default idle loop */ | ||
138 | int (*idle_loop)(void); | ||
139 | |||
140 | /* Function to enable pmcs for this platform, called once per cpu. */ | ||
141 | void (*enable_pmcs)(void); | ||
142 | }; | ||
143 | |||
144 | extern int default_idle(void); | ||
145 | extern int native_idle(void); | ||
146 | |||
147 | extern struct machdep_calls ppc_md; | ||
148 | extern char cmd_line[COMMAND_LINE_SIZE]; | ||
149 | |||
150 | #ifdef CONFIG_PPC_PMAC | ||
151 | /* | ||
152 | * Power macintoshes have either a CUDA, PMU or SMU controlling | ||
153 | * system reset, power, NVRAM, RTC. | ||
154 | */ | ||
155 | typedef enum sys_ctrler_kind { | ||
156 | SYS_CTRLER_UNKNOWN = 0, | ||
157 | SYS_CTRLER_CUDA = 1, | ||
158 | SYS_CTRLER_PMU = 2, | ||
159 | SYS_CTRLER_SMU = 3, | ||
160 | } sys_ctrler_t; | ||
161 | extern sys_ctrler_t sys_ctrler; | ||
162 | |||
163 | #endif /* CONFIG_PPC_PMAC */ | ||
164 | |||
165 | |||
166 | |||
167 | /* Functions to produce codes on the leds. | ||
168 | * The SRC code should be unique for the message category and should | ||
169 | * be limited to the lower 24 bits (the upper 8 are set by these funcs), | ||
170 | * and (for boot & dump) should be sorted numerically in the order | ||
171 | * the events occur. | ||
172 | */ | ||
173 | /* Print a boot progress message. */ | ||
174 | void ppc64_boot_msg(unsigned int src, const char *msg); | ||
175 | /* Print a termination message (print only -- does not stop the kernel) */ | ||
176 | void ppc64_terminate_msg(unsigned int src, const char *msg); | ||
177 | |||
178 | static inline void log_error(char *buf, unsigned int err_type, int fatal) | ||
179 | { | ||
180 | if (ppc_md.log_error) | ||
181 | ppc_md.log_error(buf, err_type, fatal); | ||
182 | } | ||
183 | |||
184 | #endif /* _PPC64_MACHDEP_H */ | ||
185 | #endif /* __KERNEL__ */ | ||
diff --git a/include/asm-ppc64/macio.h b/include/asm-ppc64/macio.h deleted file mode 100644 index a3028b364f70..000000000000 --- a/include/asm-ppc64/macio.h +++ /dev/null | |||
@@ -1,2 +0,0 @@ | |||
1 | #include <asm-ppc/macio.h> | ||
2 | |||
diff --git a/include/asm-ppc64/memory.h b/include/asm-ppc64/memory.h deleted file mode 100644 index af53ffb55726..000000000000 --- a/include/asm-ppc64/memory.h +++ /dev/null | |||
@@ -1,61 +0,0 @@ | |||
1 | #ifndef _ASM_PPC64_MEMORY_H_ | ||
2 | #define _ASM_PPC64_MEMORY_H_ | ||
3 | |||
4 | /* | ||
5 | * This program is free software; you can redistribute it and/or | ||
6 | * modify it under the terms of the GNU General Public License | ||
7 | * as published by the Free Software Foundation; either version | ||
8 | * 2 of the License, or (at your option) any later version. | ||
9 | */ | ||
10 | |||
11 | #include <linux/config.h> | ||
12 | |||
13 | /* | ||
14 | * Arguably the bitops and *xchg operations don't imply any memory barrier | ||
15 | * or SMP ordering, but in fact a lot of drivers expect them to imply | ||
16 | * both, since they do on x86 cpus. | ||
17 | */ | ||
18 | #ifdef CONFIG_SMP | ||
19 | #define EIEIO_ON_SMP "eieio\n" | ||
20 | #define ISYNC_ON_SMP "\n\tisync" | ||
21 | #define SYNC_ON_SMP "lwsync\n\t" | ||
22 | #else | ||
23 | #define EIEIO_ON_SMP | ||
24 | #define ISYNC_ON_SMP | ||
25 | #define SYNC_ON_SMP | ||
26 | #endif | ||
27 | |||
28 | static inline void eieio(void) | ||
29 | { | ||
30 | __asm__ __volatile__ ("eieio" : : : "memory"); | ||
31 | } | ||
32 | |||
33 | static inline void isync(void) | ||
34 | { | ||
35 | __asm__ __volatile__ ("isync" : : : "memory"); | ||
36 | } | ||
37 | |||
38 | #ifdef CONFIG_SMP | ||
39 | #define eieio_on_smp() eieio() | ||
40 | #define isync_on_smp() isync() | ||
41 | #else | ||
42 | #define eieio_on_smp() __asm__ __volatile__("": : :"memory") | ||
43 | #define isync_on_smp() __asm__ __volatile__("": : :"memory") | ||
44 | #endif | ||
45 | |||
46 | /* Macros for adjusting thread priority (hardware multi-threading) */ | ||
47 | #define HMT_very_low() asm volatile("or 31,31,31 # very low priority") | ||
48 | #define HMT_low() asm volatile("or 1,1,1 # low priority") | ||
49 | #define HMT_medium_low() asm volatile("or 6,6,6 # medium low priority") | ||
50 | #define HMT_medium() asm volatile("or 2,2,2 # medium priority") | ||
51 | #define HMT_medium_high() asm volatile("or 5,5,5 # medium high priority") | ||
52 | #define HMT_high() asm volatile("or 3,3,3 # high priority") | ||
53 | |||
54 | #define HMT_VERY_LOW "\tor 31,31,31 # very low priority\n" | ||
55 | #define HMT_LOW "\tor 1,1,1 # low priority\n" | ||
56 | #define HMT_MEDIUM_LOW "\tor 6,6,6 # medium low priority\n" | ||
57 | #define HMT_MEDIUM "\tor 2,2,2 # medium priority\n" | ||
58 | #define HMT_MEDIUM_HIGH "\tor 5,5,5 # medium high priority\n" | ||
59 | #define HMT_HIGH "\tor 3,3,3 # high priority\n" | ||
60 | |||
61 | #endif | ||
diff --git a/include/asm-ppc64/mmu.h b/include/asm-ppc64/mmu.h index 7bc42eb087ad..e0505acb77d9 100644 --- a/include/asm-ppc64/mmu.h +++ b/include/asm-ppc64/mmu.h | |||
@@ -14,6 +14,7 @@ | |||
14 | #define _PPC64_MMU_H_ | 14 | #define _PPC64_MMU_H_ |
15 | 15 | ||
16 | #include <linux/config.h> | 16 | #include <linux/config.h> |
17 | #include <asm/ppc_asm.h> /* for ASM_CONST */ | ||
17 | #include <asm/page.h> | 18 | #include <asm/page.h> |
18 | 19 | ||
19 | /* | 20 | /* |
@@ -29,7 +30,7 @@ | |||
29 | 30 | ||
30 | /* Location of cpu0's segment table */ | 31 | /* Location of cpu0's segment table */ |
31 | #define STAB0_PAGE 0x6 | 32 | #define STAB0_PAGE 0x6 |
32 | #define STAB0_PHYS_ADDR (STAB0_PAGE<<PAGE_SHIFT) | 33 | #define STAB0_PHYS_ADDR (STAB0_PAGE<<12) |
33 | 34 | ||
34 | #ifndef __ASSEMBLY__ | 35 | #ifndef __ASSEMBLY__ |
35 | extern char initial_stab[]; | 36 | extern char initial_stab[]; |
@@ -205,6 +206,10 @@ extern long native_hpte_insert(unsigned long hpte_group, unsigned long va, | |||
205 | unsigned long prpn, | 206 | unsigned long prpn, |
206 | unsigned long vflags, unsigned long rflags); | 207 | unsigned long vflags, unsigned long rflags); |
207 | 208 | ||
209 | extern long iSeries_hpte_bolt_or_insert(unsigned long hpte_group, | ||
210 | unsigned long va, unsigned long prpn, | ||
211 | unsigned long vflags, unsigned long rflags); | ||
212 | |||
208 | extern void stabs_alloc(void); | 213 | extern void stabs_alloc(void); |
209 | 214 | ||
210 | #endif /* __ASSEMBLY__ */ | 215 | #endif /* __ASSEMBLY__ */ |
diff --git a/include/asm-ppc64/mmu_context.h b/include/asm-ppc64/mmu_context.h index 77a743402db4..820dd729b895 100644 --- a/include/asm-ppc64/mmu_context.h +++ b/include/asm-ppc64/mmu_context.h | |||
@@ -16,21 +16,6 @@ | |||
16 | * 2 of the License, or (at your option) any later version. | 16 | * 2 of the License, or (at your option) any later version. |
17 | */ | 17 | */ |
18 | 18 | ||
19 | /* | ||
20 | * Every architecture must define this function. It's the fastest | ||
21 | * way of searching a 140-bit bitmap where the first 100 bits are | ||
22 | * unlikely to be set. It's guaranteed that at least one of the 140 | ||
23 | * bits is cleared. | ||
24 | */ | ||
25 | static inline int sched_find_first_bit(unsigned long *b) | ||
26 | { | ||
27 | if (unlikely(b[0])) | ||
28 | return __ffs(b[0]); | ||
29 | if (unlikely(b[1])) | ||
30 | return __ffs(b[1]) + 64; | ||
31 | return __ffs(b[2]) + 128; | ||
32 | } | ||
33 | |||
34 | static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) | 19 | static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) |
35 | { | 20 | { |
36 | } | 21 | } |
diff --git a/include/asm-ppc64/naca.h b/include/asm-ppc64/naca.h deleted file mode 100644 index d2afe6447597..000000000000 --- a/include/asm-ppc64/naca.h +++ /dev/null | |||
@@ -1,24 +0,0 @@ | |||
1 | #ifndef _NACA_H | ||
2 | #define _NACA_H | ||
3 | |||
4 | /* | ||
5 | * c 2001 PPC 64 Team, IBM Corp | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * as published by the Free Software Foundation; either version | ||
10 | * 2 of the License, or (at your option) any later version. | ||
11 | */ | ||
12 | |||
13 | #include <asm/types.h> | ||
14 | |||
15 | struct naca_struct { | ||
16 | /* Kernel only data - undefined for user space */ | ||
17 | void *xItVpdAreas; /* VPD Data 0x00 */ | ||
18 | void *xRamDisk; /* iSeries ramdisk 0x08 */ | ||
19 | u64 xRamDiskSize; /* In pages 0x10 */ | ||
20 | }; | ||
21 | |||
22 | extern struct naca_struct naca; | ||
23 | |||
24 | #endif /* _NACA_H */ | ||
diff --git a/include/asm-ppc64/numnodes.h b/include/asm-ppc64/numnodes.h deleted file mode 100644 index 75ae0b906708..000000000000 --- a/include/asm-ppc64/numnodes.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | #ifndef _ASM_MAX_NUMNODES_H | ||
2 | #define _ASM_MAX_NUMNODES_H | ||
3 | |||
4 | /* Max 16 Nodes */ | ||
5 | #define NODES_SHIFT 4 | ||
6 | |||
7 | #endif /* _ASM_MAX_NUMNODES_H */ | ||
diff --git a/include/asm-ppc64/nvram.h b/include/asm-ppc64/nvram.h index dfaa21566c9a..def47d720d3d 100644 --- a/include/asm-ppc64/nvram.h +++ b/include/asm-ppc64/nvram.h | |||
@@ -70,7 +70,7 @@ extern struct nvram_partition *nvram_find_partition(int sig, const char *name); | |||
70 | 70 | ||
71 | extern int pSeries_nvram_init(void); | 71 | extern int pSeries_nvram_init(void); |
72 | extern int pmac_nvram_init(void); | 72 | extern int pmac_nvram_init(void); |
73 | extern int bpa_nvram_init(void); | 73 | extern int mmio_nvram_init(void); |
74 | 74 | ||
75 | /* PowerMac specific nvram stuffs */ | 75 | /* PowerMac specific nvram stuffs */ |
76 | 76 | ||
diff --git a/include/asm-ppc64/of_device.h b/include/asm-ppc64/of_device.h deleted file mode 100644 index 7bc136e22590..000000000000 --- a/include/asm-ppc64/of_device.h +++ /dev/null | |||
@@ -1,2 +0,0 @@ | |||
1 | #include <asm-ppc/of_device.h> | ||
2 | |||
diff --git a/include/asm-ppc64/oprofile_impl.h b/include/asm-ppc64/oprofile_impl.h deleted file mode 100644 index b04f1dfb1421..000000000000 --- a/include/asm-ppc64/oprofile_impl.h +++ /dev/null | |||
@@ -1,111 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM | ||
3 | * | ||
4 | * Based on alpha version. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef OP_IMPL_H | ||
13 | #define OP_IMPL_H 1 | ||
14 | |||
15 | #define OP_MAX_COUNTER 8 | ||
16 | |||
17 | /* Per-counter configuration as set via oprofilefs. */ | ||
18 | struct op_counter_config { | ||
19 | unsigned long valid; | ||
20 | unsigned long enabled; | ||
21 | unsigned long event; | ||
22 | unsigned long count; | ||
23 | unsigned long kernel; | ||
24 | /* We dont support per counter user/kernel selection */ | ||
25 | unsigned long user; | ||
26 | unsigned long unit_mask; | ||
27 | }; | ||
28 | |||
29 | /* System-wide configuration as set via oprofilefs. */ | ||
30 | struct op_system_config { | ||
31 | unsigned long mmcr0; | ||
32 | unsigned long mmcr1; | ||
33 | unsigned long mmcra; | ||
34 | unsigned long enable_kernel; | ||
35 | unsigned long enable_user; | ||
36 | unsigned long backtrace_spinlocks; | ||
37 | }; | ||
38 | |||
39 | /* Per-arch configuration */ | ||
40 | struct op_ppc64_model { | ||
41 | void (*reg_setup) (struct op_counter_config *, | ||
42 | struct op_system_config *, | ||
43 | int num_counters); | ||
44 | void (*cpu_setup) (void *); | ||
45 | void (*start) (struct op_counter_config *); | ||
46 | void (*stop) (void); | ||
47 | void (*handle_interrupt) (struct pt_regs *, | ||
48 | struct op_counter_config *); | ||
49 | int num_counters; | ||
50 | }; | ||
51 | |||
52 | extern struct op_ppc64_model op_model_rs64; | ||
53 | extern struct op_ppc64_model op_model_power4; | ||
54 | |||
55 | static inline unsigned int ctr_read(unsigned int i) | ||
56 | { | ||
57 | switch(i) { | ||
58 | case 0: | ||
59 | return mfspr(SPRN_PMC1); | ||
60 | case 1: | ||
61 | return mfspr(SPRN_PMC2); | ||
62 | case 2: | ||
63 | return mfspr(SPRN_PMC3); | ||
64 | case 3: | ||
65 | return mfspr(SPRN_PMC4); | ||
66 | case 4: | ||
67 | return mfspr(SPRN_PMC5); | ||
68 | case 5: | ||
69 | return mfspr(SPRN_PMC6); | ||
70 | case 6: | ||
71 | return mfspr(SPRN_PMC7); | ||
72 | case 7: | ||
73 | return mfspr(SPRN_PMC8); | ||
74 | default: | ||
75 | return 0; | ||
76 | } | ||
77 | } | ||
78 | |||
79 | static inline void ctr_write(unsigned int i, unsigned int val) | ||
80 | { | ||
81 | switch(i) { | ||
82 | case 0: | ||
83 | mtspr(SPRN_PMC1, val); | ||
84 | break; | ||
85 | case 1: | ||
86 | mtspr(SPRN_PMC2, val); | ||
87 | break; | ||
88 | case 2: | ||
89 | mtspr(SPRN_PMC3, val); | ||
90 | break; | ||
91 | case 3: | ||
92 | mtspr(SPRN_PMC4, val); | ||
93 | break; | ||
94 | case 4: | ||
95 | mtspr(SPRN_PMC5, val); | ||
96 | break; | ||
97 | case 5: | ||
98 | mtspr(SPRN_PMC6, val); | ||
99 | break; | ||
100 | case 6: | ||
101 | mtspr(SPRN_PMC7, val); | ||
102 | break; | ||
103 | case 7: | ||
104 | mtspr(SPRN_PMC8, val); | ||
105 | break; | ||
106 | default: | ||
107 | break; | ||
108 | } | ||
109 | } | ||
110 | |||
111 | #endif | ||
diff --git a/include/asm-ppc64/pSeries_reconfig.h b/include/asm-ppc64/pSeries_reconfig.h deleted file mode 100644 index c0db1ea7f7d1..000000000000 --- a/include/asm-ppc64/pSeries_reconfig.h +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | #ifndef _PPC64_PSERIES_RECONFIG_H | ||
2 | #define _PPC64_PSERIES_RECONFIG_H | ||
3 | |||
4 | #include <linux/notifier.h> | ||
5 | |||
6 | /* | ||
7 | * Use this API if your code needs to know about OF device nodes being | ||
8 | * added or removed on pSeries systems. | ||
9 | */ | ||
10 | |||
11 | #define PSERIES_RECONFIG_ADD 0x0001 | ||
12 | #define PSERIES_RECONFIG_REMOVE 0x0002 | ||
13 | |||
14 | #ifdef CONFIG_PPC_PSERIES | ||
15 | extern int pSeries_reconfig_notifier_register(struct notifier_block *); | ||
16 | extern void pSeries_reconfig_notifier_unregister(struct notifier_block *); | ||
17 | #else /* !CONFIG_PPC_PSERIES */ | ||
18 | static inline int pSeries_reconfig_notifier_register(struct notifier_block *nb) | ||
19 | { | ||
20 | return 0; | ||
21 | } | ||
22 | static inline void pSeries_reconfig_notifier_unregister(struct notifier_block *nb) { } | ||
23 | #endif /* CONFIG_PPC_PSERIES */ | ||
24 | |||
25 | #endif /* _PPC64_PSERIES_RECONFIG_H */ | ||
diff --git a/include/asm-ppc64/paca.h b/include/asm-ppc64/paca.h index 2f0f36f73d38..f68fe91debaf 100644 --- a/include/asm-ppc64/paca.h +++ b/include/asm-ppc64/paca.h | |||
@@ -19,7 +19,7 @@ | |||
19 | #include <linux/config.h> | 19 | #include <linux/config.h> |
20 | #include <asm/types.h> | 20 | #include <asm/types.h> |
21 | #include <asm/lppaca.h> | 21 | #include <asm/lppaca.h> |
22 | #include <asm/iSeries/ItLpRegSave.h> | 22 | #include <asm/iseries/it_lp_reg_save.h> |
23 | #include <asm/mmu.h> | 23 | #include <asm/mmu.h> |
24 | 24 | ||
25 | register struct paca_struct *local_paca asm("r13"); | 25 | register struct paca_struct *local_paca asm("r13"); |
diff --git a/include/asm-ppc64/page.h b/include/asm-ppc64/page.h index a15422bcf30d..d404431f0a9a 100644 --- a/include/asm-ppc64/page.h +++ b/include/asm-ppc64/page.h | |||
@@ -11,13 +11,7 @@ | |||
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include <linux/config.h> | 13 | #include <linux/config.h> |
14 | 14 | #include <asm/ppc_asm.h> /* for ASM_CONST */ | |
15 | #ifdef __ASSEMBLY__ | ||
16 | #define ASM_CONST(x) x | ||
17 | #else | ||
18 | #define __ASM_CONST(x) x##UL | ||
19 | #define ASM_CONST(x) __ASM_CONST(x) | ||
20 | #endif | ||
21 | 15 | ||
22 | /* PAGE_SHIFT determines the page size */ | 16 | /* PAGE_SHIFT determines the page size */ |
23 | #define PAGE_SHIFT 12 | 17 | #define PAGE_SHIFT 12 |
diff --git a/include/asm-ppc64/parport.h b/include/asm-ppc64/parport.h deleted file mode 100644 index 2f8874c581cc..000000000000 --- a/include/asm-ppc64/parport.h +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | /* | ||
2 | * parport.h: platform-specific PC-style parport initialisation | ||
3 | * | ||
4 | * Copyright (C) 1999, 2000 Tim Waugh <tim@cyberelk.demon.co.uk> | ||
5 | * | ||
6 | * This file should only be included by drivers/parport/parport_pc.c. | ||
7 | */ | ||
8 | |||
9 | #ifndef _ASM_PPC64_PARPORT_H | ||
10 | #define _ASM_PPC64_PARPORT_H | ||
11 | |||
12 | static int __devinit parport_pc_find_isa_ports (int autoirq, int autodma); | ||
13 | static int __devinit parport_pc_find_nonpci_ports (int autoirq, int autodma) | ||
14 | { | ||
15 | return parport_pc_find_isa_ports (autoirq, autodma); | ||
16 | } | ||
17 | |||
18 | #endif /* !(_ASM_PPC_PARPORT_H) */ | ||
diff --git a/include/asm-ppc64/pci-bridge.h b/include/asm-ppc64/pci-bridge.h index d8991389ab39..60cf8c838af0 100644 --- a/include/asm-ppc64/pci-bridge.h +++ b/include/asm-ppc64/pci-bridge.h | |||
@@ -2,7 +2,9 @@ | |||
2 | #ifndef _ASM_PCI_BRIDGE_H | 2 | #ifndef _ASM_PCI_BRIDGE_H |
3 | #define _ASM_PCI_BRIDGE_H | 3 | #define _ASM_PCI_BRIDGE_H |
4 | 4 | ||
5 | #include <linux/config.h> | ||
5 | #include <linux/pci.h> | 6 | #include <linux/pci.h> |
7 | #include <linux/list.h> | ||
6 | 8 | ||
7 | /* | 9 | /* |
8 | * This program is free software; you can redistribute it and/or | 10 | * This program is free software; you can redistribute it and/or |
@@ -34,7 +36,7 @@ struct pci_controller { | |||
34 | 36 | ||
35 | struct pci_ops *ops; | 37 | struct pci_ops *ops; |
36 | volatile unsigned int __iomem *cfg_addr; | 38 | volatile unsigned int __iomem *cfg_addr; |
37 | volatile unsigned char __iomem *cfg_data; | 39 | volatile void __iomem *cfg_data; |
38 | 40 | ||
39 | /* Currently, we limit ourselves to 1 IO range and 3 mem | 41 | /* Currently, we limit ourselves to 1 IO range and 3 mem |
40 | * ranges since the common pci_bus structure can't handle more | 42 | * ranges since the common pci_bus structure can't handle more |
@@ -71,6 +73,12 @@ struct pci_dn { | |||
71 | struct iommu_table *iommu_table; /* for phb's or bridges */ | 73 | struct iommu_table *iommu_table; /* for phb's or bridges */ |
72 | struct pci_dev *pcidev; /* back-pointer to the pci device */ | 74 | struct pci_dev *pcidev; /* back-pointer to the pci device */ |
73 | struct device_node *node; /* back-pointer to the device_node */ | 75 | struct device_node *node; /* back-pointer to the device_node */ |
76 | #ifdef CONFIG_PPC_ISERIES | ||
77 | struct list_head Device_List; | ||
78 | int Irq; /* Assigned IRQ */ | ||
79 | int Flags; /* Possible flags(disable/bist)*/ | ||
80 | u8 LogicalSlot; /* Hv Slot Index for Tces */ | ||
81 | #endif | ||
74 | u32 config_space[16]; /* saved PCI config space */ | 82 | u32 config_space[16]; /* saved PCI config space */ |
75 | }; | 83 | }; |
76 | 84 | ||
@@ -96,6 +104,16 @@ static inline struct device_node *pci_device_to_OF_node(struct pci_dev *dev) | |||
96 | return fetch_dev_dn(dev); | 104 | return fetch_dev_dn(dev); |
97 | } | 105 | } |
98 | 106 | ||
107 | static inline int pci_device_from_OF_node(struct device_node *np, | ||
108 | u8 *bus, u8 *devfn) | ||
109 | { | ||
110 | if (!PCI_DN(np)) | ||
111 | return -ENODEV; | ||
112 | *bus = PCI_DN(np)->busno; | ||
113 | *devfn = PCI_DN(np)->devfn; | ||
114 | return 0; | ||
115 | } | ||
116 | |||
99 | static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus) | 117 | static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus) |
100 | { | 118 | { |
101 | if (bus->self) | 119 | if (bus->self) |
@@ -105,7 +123,7 @@ static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus) | |||
105 | } | 123 | } |
106 | 124 | ||
107 | extern void pci_process_bridge_OF_ranges(struct pci_controller *hose, | 125 | extern void pci_process_bridge_OF_ranges(struct pci_controller *hose, |
108 | struct device_node *dev); | 126 | struct device_node *dev, int primary); |
109 | 127 | ||
110 | extern int pcibios_remove_root_bus(struct pci_controller *phb); | 128 | extern int pcibios_remove_root_bus(struct pci_controller *phb); |
111 | 129 | ||
diff --git a/include/asm-ppc64/pci.h b/include/asm-ppc64/pci.h index a88bbfc26967..342e2d755550 100644 --- a/include/asm-ppc64/pci.h +++ b/include/asm-ppc64/pci.h | |||
@@ -168,7 +168,7 @@ extern void pcibios_add_platform_entries(struct pci_dev *dev); | |||
168 | 168 | ||
169 | struct file; | 169 | struct file; |
170 | extern pgprot_t pci_phys_mem_access_prot(struct file *file, | 170 | extern pgprot_t pci_phys_mem_access_prot(struct file *file, |
171 | unsigned long offset, | 171 | unsigned long pfn, |
172 | unsigned long size, | 172 | unsigned long size, |
173 | pgprot_t prot); | 173 | pgprot_t prot); |
174 | 174 | ||
diff --git a/include/asm-ppc64/pgtable.h b/include/asm-ppc64/pgtable.h index 2eb1778a3a15..8c3f574046b6 100644 --- a/include/asm-ppc64/pgtable.h +++ b/include/asm-ppc64/pgtable.h | |||
@@ -471,7 +471,7 @@ static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty) | |||
471 | #define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_NO_CACHE | _PAGE_GUARDED)) | 471 | #define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_NO_CACHE | _PAGE_GUARDED)) |
472 | 472 | ||
473 | struct file; | 473 | struct file; |
474 | extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long addr, | 474 | extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, |
475 | unsigned long size, pgprot_t vma_prot); | 475 | unsigned long size, pgprot_t vma_prot); |
476 | #define __HAVE_PHYS_MEM_ACCESS_PROT | 476 | #define __HAVE_PHYS_MEM_ACCESS_PROT |
477 | 477 | ||
diff --git a/include/asm-ppc64/plpar_wrappers.h b/include/asm-ppc64/plpar_wrappers.h deleted file mode 100644 index 72dd2449ee76..000000000000 --- a/include/asm-ppc64/plpar_wrappers.h +++ /dev/null | |||
@@ -1,120 +0,0 @@ | |||
1 | #ifndef _PPC64_PLPAR_WRAPPERS_H | ||
2 | #define _PPC64_PLPAR_WRAPPERS_H | ||
3 | |||
4 | #include <asm/hvcall.h> | ||
5 | |||
6 | static inline long poll_pending(void) | ||
7 | { | ||
8 | unsigned long dummy; | ||
9 | return plpar_hcall(H_POLL_PENDING, 0, 0, 0, 0, | ||
10 | &dummy, &dummy, &dummy); | ||
11 | } | ||
12 | |||
13 | static inline long prod_processor(void) | ||
14 | { | ||
15 | plpar_hcall_norets(H_PROD); | ||
16 | return(0); | ||
17 | } | ||
18 | |||
19 | static inline long cede_processor(void) | ||
20 | { | ||
21 | plpar_hcall_norets(H_CEDE); | ||
22 | return(0); | ||
23 | } | ||
24 | |||
25 | static inline long register_vpa(unsigned long flags, unsigned long proc, | ||
26 | unsigned long vpa) | ||
27 | { | ||
28 | return plpar_hcall_norets(H_REGISTER_VPA, flags, proc, vpa); | ||
29 | } | ||
30 | |||
31 | void vpa_init(int cpu); | ||
32 | |||
33 | static inline long plpar_pte_remove(unsigned long flags, | ||
34 | unsigned long ptex, | ||
35 | unsigned long avpn, | ||
36 | unsigned long *old_pteh_ret, | ||
37 | unsigned long *old_ptel_ret) | ||
38 | { | ||
39 | unsigned long dummy; | ||
40 | return plpar_hcall(H_REMOVE, flags, ptex, avpn, 0, | ||
41 | old_pteh_ret, old_ptel_ret, &dummy); | ||
42 | } | ||
43 | |||
44 | static inline long plpar_pte_read(unsigned long flags, | ||
45 | unsigned long ptex, | ||
46 | unsigned long *old_pteh_ret, unsigned long *old_ptel_ret) | ||
47 | { | ||
48 | unsigned long dummy; | ||
49 | return plpar_hcall(H_READ, flags, ptex, 0, 0, | ||
50 | old_pteh_ret, old_ptel_ret, &dummy); | ||
51 | } | ||
52 | |||
53 | static inline long plpar_pte_protect(unsigned long flags, | ||
54 | unsigned long ptex, | ||
55 | unsigned long avpn) | ||
56 | { | ||
57 | return plpar_hcall_norets(H_PROTECT, flags, ptex, avpn); | ||
58 | } | ||
59 | |||
60 | static inline long plpar_tce_get(unsigned long liobn, | ||
61 | unsigned long ioba, | ||
62 | unsigned long *tce_ret) | ||
63 | { | ||
64 | unsigned long dummy; | ||
65 | return plpar_hcall(H_GET_TCE, liobn, ioba, 0, 0, | ||
66 | tce_ret, &dummy, &dummy); | ||
67 | } | ||
68 | |||
69 | static inline long plpar_tce_put(unsigned long liobn, | ||
70 | unsigned long ioba, | ||
71 | unsigned long tceval) | ||
72 | { | ||
73 | return plpar_hcall_norets(H_PUT_TCE, liobn, ioba, tceval); | ||
74 | } | ||
75 | |||
76 | static inline long plpar_tce_put_indirect(unsigned long liobn, | ||
77 | unsigned long ioba, | ||
78 | unsigned long page, | ||
79 | unsigned long count) | ||
80 | { | ||
81 | return plpar_hcall_norets(H_PUT_TCE_INDIRECT, liobn, ioba, page, count); | ||
82 | } | ||
83 | |||
84 | static inline long plpar_tce_stuff(unsigned long liobn, | ||
85 | unsigned long ioba, | ||
86 | unsigned long tceval, | ||
87 | unsigned long count) | ||
88 | { | ||
89 | return plpar_hcall_norets(H_STUFF_TCE, liobn, ioba, tceval, count); | ||
90 | } | ||
91 | |||
92 | static inline long plpar_get_term_char(unsigned long termno, | ||
93 | unsigned long *len_ret, | ||
94 | char *buf_ret) | ||
95 | { | ||
96 | unsigned long *lbuf = (unsigned long *)buf_ret; /* ToDo: alignment? */ | ||
97 | return plpar_hcall(H_GET_TERM_CHAR, termno, 0, 0, 0, | ||
98 | len_ret, lbuf+0, lbuf+1); | ||
99 | } | ||
100 | |||
101 | static inline long plpar_put_term_char(unsigned long termno, | ||
102 | unsigned long len, | ||
103 | const char *buffer) | ||
104 | { | ||
105 | unsigned long *lbuf = (unsigned long *)buffer; /* ToDo: alignment? */ | ||
106 | return plpar_hcall_norets(H_PUT_TERM_CHAR, termno, len, lbuf[0], | ||
107 | lbuf[1]); | ||
108 | } | ||
109 | |||
110 | static inline long plpar_set_xdabr(unsigned long address, unsigned long flags) | ||
111 | { | ||
112 | return plpar_hcall_norets(H_SET_XDABR, address, flags); | ||
113 | } | ||
114 | |||
115 | static inline long plpar_set_dabr(unsigned long val) | ||
116 | { | ||
117 | return plpar_hcall_norets(H_SET_DABR, val); | ||
118 | } | ||
119 | |||
120 | #endif /* _PPC64_PLPAR_WRAPPERS_H */ | ||
diff --git a/include/asm-ppc64/pmac_feature.h b/include/asm-ppc64/pmac_feature.h deleted file mode 100644 index e07e36c4cbb2..000000000000 --- a/include/asm-ppc64/pmac_feature.h +++ /dev/null | |||
@@ -1,2 +0,0 @@ | |||
1 | #include <asm-ppc/pmac_feature.h> | ||
2 | |||
diff --git a/include/asm-ppc64/pmac_low_i2c.h b/include/asm-ppc64/pmac_low_i2c.h deleted file mode 100644 index 7bcfc72c5c8a..000000000000 --- a/include/asm-ppc64/pmac_low_i2c.h +++ /dev/null | |||
@@ -1,2 +0,0 @@ | |||
1 | #include <asm-ppc/pmac_low_i2c.h> | ||
2 | |||
diff --git a/include/asm-ppc64/pmc.h b/include/asm-ppc64/pmc.h deleted file mode 100644 index d1d297dbccfe..000000000000 --- a/include/asm-ppc64/pmc.h +++ /dev/null | |||
@@ -1,31 +0,0 @@ | |||
1 | /* | ||
2 | * pmc.h | ||
3 | * Copyright (C) 2004 David Gibson, IBM Corporation | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | #ifndef _PPC64_PMC_H | ||
20 | #define _PPC64_PMC_H | ||
21 | |||
22 | #include <asm/ptrace.h> | ||
23 | |||
24 | typedef void (*perf_irq_t)(struct pt_regs *); | ||
25 | |||
26 | int reserve_pmc_hardware(perf_irq_t new_perf_irq); | ||
27 | void release_pmc_hardware(void); | ||
28 | |||
29 | void power4_enable_pmcs(void); | ||
30 | |||
31 | #endif /* _PPC64_PMC_H */ | ||
diff --git a/include/asm-ppc64/posix_types.h b/include/asm-ppc64/posix_types.h deleted file mode 100644 index 516de7201b5d..000000000000 --- a/include/asm-ppc64/posix_types.h +++ /dev/null | |||
@@ -1,119 +0,0 @@ | |||
1 | #ifndef _PPC64_POSIX_TYPES_H | ||
2 | #define _PPC64_POSIX_TYPES_H | ||
3 | |||
4 | /* | ||
5 | * This file is generally used by user-level software, so you need to | ||
6 | * be a little careful about namespace pollution etc. Also, we cannot | ||
7 | * assume GCC is being used. | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or | ||
10 | * modify it under the terms of the GNU General Public License | ||
11 | * as published by the Free Software Foundation; either version | ||
12 | * 2 of the License, or (at your option) any later version. | ||
13 | */ | ||
14 | |||
15 | typedef unsigned long __kernel_ino_t; | ||
16 | typedef unsigned long __kernel_nlink_t; | ||
17 | typedef unsigned int __kernel_mode_t; | ||
18 | typedef long __kernel_off_t; | ||
19 | typedef long long __kernel_loff_t; | ||
20 | typedef int __kernel_pid_t; | ||
21 | typedef int __kernel_ipc_pid_t; | ||
22 | typedef unsigned int __kernel_uid_t; | ||
23 | typedef unsigned int __kernel_gid_t; | ||
24 | typedef unsigned long __kernel_size_t; | ||
25 | typedef long __kernel_ssize_t; | ||
26 | typedef long __kernel_ptrdiff_t; | ||
27 | typedef long __kernel_time_t; | ||
28 | typedef int __kernel_timer_t; | ||
29 | typedef int __kernel_clockid_t; | ||
30 | typedef long __kernel_suseconds_t; | ||
31 | typedef long __kernel_clock_t; | ||
32 | typedef int __kernel_daddr_t; | ||
33 | typedef char * __kernel_caddr_t; | ||
34 | typedef unsigned short __kernel_uid16_t; | ||
35 | typedef unsigned short __kernel_gid16_t; | ||
36 | typedef unsigned int __kernel_uid32_t; | ||
37 | typedef unsigned int __kernel_gid32_t; | ||
38 | |||
39 | typedef unsigned int __kernel_old_uid_t; | ||
40 | typedef unsigned int __kernel_old_gid_t; | ||
41 | typedef unsigned long __kernel_old_dev_t; | ||
42 | |||
43 | typedef struct { | ||
44 | int val[2]; | ||
45 | } __kernel_fsid_t; | ||
46 | |||
47 | #ifndef __GNUC__ | ||
48 | |||
49 | #define __FD_SET(d, set) ((set)->fds_bits[__FDELT(d)] |= __FDMASK(d)) | ||
50 | #define __FD_CLR(d, set) ((set)->fds_bits[__FDELT(d)] &= ~__FDMASK(d)) | ||
51 | #define __FD_ISSET(d, set) (((set)->fds_bits[__FDELT(d)] & __FDMASK(d)) != 0) | ||
52 | #define __FD_ZERO(set) \ | ||
53 | ((void) memset ((__ptr_t) (set), 0, sizeof (__kernel_fd_set))) | ||
54 | |||
55 | #else /* __GNUC__ */ | ||
56 | |||
57 | #if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) \ | ||
58 | || (__GLIBC__ == 2 && __GLIBC_MINOR__ == 0) | ||
59 | /* With GNU C, use inline functions instead so args are evaluated only once: */ | ||
60 | |||
61 | #undef __FD_SET | ||
62 | static __inline__ void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp) | ||
63 | { | ||
64 | unsigned long _tmp = fd / __NFDBITS; | ||
65 | unsigned long _rem = fd % __NFDBITS; | ||
66 | fdsetp->fds_bits[_tmp] |= (1UL<<_rem); | ||
67 | } | ||
68 | |||
69 | #undef __FD_CLR | ||
70 | static __inline__ void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp) | ||
71 | { | ||
72 | unsigned long _tmp = fd / __NFDBITS; | ||
73 | unsigned long _rem = fd % __NFDBITS; | ||
74 | fdsetp->fds_bits[_tmp] &= ~(1UL<<_rem); | ||
75 | } | ||
76 | |||
77 | #undef __FD_ISSET | ||
78 | static __inline__ int __FD_ISSET(unsigned long fd, __kernel_fd_set *p) | ||
79 | { | ||
80 | unsigned long _tmp = fd / __NFDBITS; | ||
81 | unsigned long _rem = fd % __NFDBITS; | ||
82 | return (p->fds_bits[_tmp] & (1UL<<_rem)) != 0; | ||
83 | } | ||
84 | |||
85 | /* | ||
86 | * This will unroll the loop for the normal constant case (8 ints, | ||
87 | * for a 256-bit fd_set) | ||
88 | */ | ||
89 | #undef __FD_ZERO | ||
90 | static __inline__ void __FD_ZERO(__kernel_fd_set *p) | ||
91 | { | ||
92 | unsigned long *tmp = (unsigned long *)p->fds_bits; | ||
93 | int i; | ||
94 | |||
95 | if (__builtin_constant_p(__FDSET_LONGS)) { | ||
96 | switch (__FDSET_LONGS) { | ||
97 | case 16: | ||
98 | tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0; | ||
99 | tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0; | ||
100 | |||
101 | case 8: | ||
102 | tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; | ||
103 | |||
104 | case 4: | ||
105 | tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; | ||
106 | return; | ||
107 | } | ||
108 | } | ||
109 | i = __FDSET_LONGS; | ||
110 | while (i) { | ||
111 | i--; | ||
112 | *tmp = 0; | ||
113 | tmp++; | ||
114 | } | ||
115 | } | ||
116 | |||
117 | #endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */ | ||
118 | #endif /* __GNUC__ */ | ||
119 | #endif /* _PPC64_POSIX_TYPES_H */ | ||
diff --git a/include/asm-ppc64/ppc32.h b/include/asm-ppc64/ppc32.h deleted file mode 100644 index 6b44a8caf395..000000000000 --- a/include/asm-ppc64/ppc32.h +++ /dev/null | |||
@@ -1,122 +0,0 @@ | |||
1 | #ifndef _PPC64_PPC32_H | ||
2 | #define _PPC64_PPC32_H | ||
3 | |||
4 | #include <linux/compat.h> | ||
5 | #include <asm/siginfo.h> | ||
6 | #include <asm/signal.h> | ||
7 | |||
8 | /* | ||
9 | * Data types and macros for providing 32b PowerPC support. | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or | ||
12 | * modify it under the terms of the GNU General Public License | ||
13 | * as published by the Free Software Foundation; either version | ||
14 | * 2 of the License, or (at your option) any later version. | ||
15 | */ | ||
16 | |||
17 | /* These are here to support 32-bit syscalls on a 64-bit kernel. */ | ||
18 | |||
19 | typedef struct compat_siginfo { | ||
20 | int si_signo; | ||
21 | int si_errno; | ||
22 | int si_code; | ||
23 | |||
24 | union { | ||
25 | int _pad[SI_PAD_SIZE32]; | ||
26 | |||
27 | /* kill() */ | ||
28 | struct { | ||
29 | compat_pid_t _pid; /* sender's pid */ | ||
30 | compat_uid_t _uid; /* sender's uid */ | ||
31 | } _kill; | ||
32 | |||
33 | /* POSIX.1b timers */ | ||
34 | struct { | ||
35 | compat_timer_t _tid; /* timer id */ | ||
36 | int _overrun; /* overrun count */ | ||
37 | compat_sigval_t _sigval; /* same as below */ | ||
38 | int _sys_private; /* not to be passed to user */ | ||
39 | } _timer; | ||
40 | |||
41 | /* POSIX.1b signals */ | ||
42 | struct { | ||
43 | compat_pid_t _pid; /* sender's pid */ | ||
44 | compat_uid_t _uid; /* sender's uid */ | ||
45 | compat_sigval_t _sigval; | ||
46 | } _rt; | ||
47 | |||
48 | /* SIGCHLD */ | ||
49 | struct { | ||
50 | compat_pid_t _pid; /* which child */ | ||
51 | compat_uid_t _uid; /* sender's uid */ | ||
52 | int _status; /* exit code */ | ||
53 | compat_clock_t _utime; | ||
54 | compat_clock_t _stime; | ||
55 | } _sigchld; | ||
56 | |||
57 | /* SIGILL, SIGFPE, SIGSEGV, SIGBUS, SIGEMT */ | ||
58 | struct { | ||
59 | unsigned int _addr; /* faulting insn/memory ref. */ | ||
60 | } _sigfault; | ||
61 | |||
62 | /* SIGPOLL */ | ||
63 | struct { | ||
64 | int _band; /* POLL_IN, POLL_OUT, POLL_MSG */ | ||
65 | int _fd; | ||
66 | } _sigpoll; | ||
67 | } _sifields; | ||
68 | } compat_siginfo_t; | ||
69 | |||
70 | #define __old_sigaction32 old_sigaction32 | ||
71 | |||
72 | struct __old_sigaction32 { | ||
73 | unsigned sa_handler; | ||
74 | compat_old_sigset_t sa_mask; | ||
75 | unsigned int sa_flags; | ||
76 | unsigned sa_restorer; /* not used by Linux/SPARC yet */ | ||
77 | }; | ||
78 | |||
79 | |||
80 | |||
81 | struct sigaction32 { | ||
82 | unsigned int sa_handler; /* Really a pointer, but need to deal with 32 bits */ | ||
83 | unsigned int sa_flags; | ||
84 | unsigned int sa_restorer; /* Another 32 bit pointer */ | ||
85 | compat_sigset_t sa_mask; /* A 32 bit mask */ | ||
86 | }; | ||
87 | |||
88 | typedef struct sigaltstack_32 { | ||
89 | unsigned int ss_sp; | ||
90 | int ss_flags; | ||
91 | compat_size_t ss_size; | ||
92 | } stack_32_t; | ||
93 | |||
94 | struct sigcontext32 { | ||
95 | unsigned int _unused[4]; | ||
96 | int signal; | ||
97 | unsigned int handler; | ||
98 | unsigned int oldmask; | ||
99 | u32 regs; /* 4 byte pointer to the pt_regs32 structure. */ | ||
100 | }; | ||
101 | |||
102 | struct mcontext32 { | ||
103 | elf_gregset_t32 mc_gregs; | ||
104 | elf_fpregset_t mc_fregs; | ||
105 | unsigned int mc_pad[2]; | ||
106 | elf_vrregset_t32 mc_vregs __attribute__((__aligned__(16))); | ||
107 | }; | ||
108 | |||
109 | struct ucontext32 { | ||
110 | unsigned int uc_flags; | ||
111 | unsigned int uc_link; | ||
112 | stack_32_t uc_stack; | ||
113 | int uc_pad[7]; | ||
114 | u32 uc_regs; /* points to uc_mcontext field */ | ||
115 | compat_sigset_t uc_sigmask; /* mask last for extensibility */ | ||
116 | /* glibc has 1024-bit signal masks, ours are 64-bit */ | ||
117 | int uc_maskext[30]; | ||
118 | int uc_pad2[3]; | ||
119 | struct mcontext32 uc_mcontext; | ||
120 | }; | ||
121 | |||
122 | #endif /* _PPC64_PPC32_H */ | ||
diff --git a/include/asm-ppc64/ppc_asm.h b/include/asm-ppc64/ppc_asm.h deleted file mode 100644 index 9031d8a29aca..000000000000 --- a/include/asm-ppc64/ppc_asm.h +++ /dev/null | |||
@@ -1,242 +0,0 @@ | |||
1 | /* | ||
2 | * arch/ppc64/kernel/ppc_asm.h | ||
3 | * | ||
4 | * Definitions used by various bits of low-level assembly code on PowerPC. | ||
5 | * | ||
6 | * Copyright (C) 1995-1999 Gary Thomas, Paul Mackerras, Cort Dougan. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License | ||
10 | * as published by the Free Software Foundation; either version | ||
11 | * 2 of the License, or (at your option) any later version. | ||
12 | */ | ||
13 | |||
14 | #ifndef _PPC64_PPC_ASM_H | ||
15 | #define _PPC64_PPC_ASM_H | ||
16 | /* | ||
17 | * Macros for storing registers into and loading registers from | ||
18 | * exception frames. | ||
19 | */ | ||
20 | #define SAVE_GPR(n, base) std n,GPR0+8*(n)(base) | ||
21 | #define SAVE_2GPRS(n, base) SAVE_GPR(n, base); SAVE_GPR(n+1, base) | ||
22 | #define SAVE_4GPRS(n, base) SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base) | ||
23 | #define SAVE_8GPRS(n, base) SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base) | ||
24 | #define SAVE_10GPRS(n, base) SAVE_8GPRS(n, base); SAVE_2GPRS(n+8, base) | ||
25 | #define REST_GPR(n, base) ld n,GPR0+8*(n)(base) | ||
26 | #define REST_2GPRS(n, base) REST_GPR(n, base); REST_GPR(n+1, base) | ||
27 | #define REST_4GPRS(n, base) REST_2GPRS(n, base); REST_2GPRS(n+2, base) | ||
28 | #define REST_8GPRS(n, base) REST_4GPRS(n, base); REST_4GPRS(n+4, base) | ||
29 | #define REST_10GPRS(n, base) REST_8GPRS(n, base); REST_2GPRS(n+8, base) | ||
30 | |||
31 | #define SAVE_NVGPRS(base) SAVE_8GPRS(14, base); SAVE_10GPRS(22, base) | ||
32 | #define REST_NVGPRS(base) REST_8GPRS(14, base); REST_10GPRS(22, base) | ||
33 | |||
34 | #define SAVE_FPR(n, base) stfd n,THREAD_FPR0+8*(n)(base) | ||
35 | #define SAVE_2FPRS(n, base) SAVE_FPR(n, base); SAVE_FPR(n+1, base) | ||
36 | #define SAVE_4FPRS(n, base) SAVE_2FPRS(n, base); SAVE_2FPRS(n+2, base) | ||
37 | #define SAVE_8FPRS(n, base) SAVE_4FPRS(n, base); SAVE_4FPRS(n+4, base) | ||
38 | #define SAVE_16FPRS(n, base) SAVE_8FPRS(n, base); SAVE_8FPRS(n+8, base) | ||
39 | #define SAVE_32FPRS(n, base) SAVE_16FPRS(n, base); SAVE_16FPRS(n+16, base) | ||
40 | #define REST_FPR(n, base) lfd n,THREAD_FPR0+8*(n)(base) | ||
41 | #define REST_2FPRS(n, base) REST_FPR(n, base); REST_FPR(n+1, base) | ||
42 | #define REST_4FPRS(n, base) REST_2FPRS(n, base); REST_2FPRS(n+2, base) | ||
43 | #define REST_8FPRS(n, base) REST_4FPRS(n, base); REST_4FPRS(n+4, base) | ||
44 | #define REST_16FPRS(n, base) REST_8FPRS(n, base); REST_8FPRS(n+8, base) | ||
45 | #define REST_32FPRS(n, base) REST_16FPRS(n, base); REST_16FPRS(n+16, base) | ||
46 | |||
47 | #define SAVE_VR(n,b,base) li b,THREAD_VR0+(16*(n)); stvx n,b,base | ||
48 | #define SAVE_2VRS(n,b,base) SAVE_VR(n,b,base); SAVE_VR(n+1,b,base) | ||
49 | #define SAVE_4VRS(n,b,base) SAVE_2VRS(n,b,base); SAVE_2VRS(n+2,b,base) | ||
50 | #define SAVE_8VRS(n,b,base) SAVE_4VRS(n,b,base); SAVE_4VRS(n+4,b,base) | ||
51 | #define SAVE_16VRS(n,b,base) SAVE_8VRS(n,b,base); SAVE_8VRS(n+8,b,base) | ||
52 | #define SAVE_32VRS(n,b,base) SAVE_16VRS(n,b,base); SAVE_16VRS(n+16,b,base) | ||
53 | #define REST_VR(n,b,base) li b,THREAD_VR0+(16*(n)); lvx n,b,base | ||
54 | #define REST_2VRS(n,b,base) REST_VR(n,b,base); REST_VR(n+1,b,base) | ||
55 | #define REST_4VRS(n,b,base) REST_2VRS(n,b,base); REST_2VRS(n+2,b,base) | ||
56 | #define REST_8VRS(n,b,base) REST_4VRS(n,b,base); REST_4VRS(n+4,b,base) | ||
57 | #define REST_16VRS(n,b,base) REST_8VRS(n,b,base); REST_8VRS(n+8,b,base) | ||
58 | #define REST_32VRS(n,b,base) REST_16VRS(n,b,base); REST_16VRS(n+16,b,base) | ||
59 | |||
60 | /* Macros to adjust thread priority for Iseries hardware multithreading */ | ||
61 | #define HMT_LOW or 1,1,1 | ||
62 | #define HMT_MEDIUM or 2,2,2 | ||
63 | #define HMT_HIGH or 3,3,3 | ||
64 | |||
65 | /* Insert the high 32 bits of the MSR into what will be the new | ||
66 | MSR (via SRR1 and rfid) This preserves the MSR.SF and MSR.ISF | ||
67 | bits. */ | ||
68 | |||
69 | #define FIX_SRR1(ra, rb) \ | ||
70 | mr rb,ra; \ | ||
71 | mfmsr ra; \ | ||
72 | rldimi ra,rb,0,32 | ||
73 | |||
74 | #define CLR_TOP32(r) rlwinm (r),(r),0,0,31 /* clear top 32 bits */ | ||
75 | |||
76 | /* | ||
77 | * LOADADDR( rn, name ) | ||
78 | * loads the address of 'name' into 'rn' | ||
79 | * | ||
80 | * LOADBASE( rn, name ) | ||
81 | * loads the address (less the low 16 bits) of 'name' into 'rn' | ||
82 | * suitable for base+disp addressing | ||
83 | */ | ||
84 | #define LOADADDR(rn,name) \ | ||
85 | lis rn,name##@highest; \ | ||
86 | ori rn,rn,name##@higher; \ | ||
87 | rldicr rn,rn,32,31; \ | ||
88 | oris rn,rn,name##@h; \ | ||
89 | ori rn,rn,name##@l | ||
90 | |||
91 | #define LOADBASE(rn,name) \ | ||
92 | lis rn,name@highest; \ | ||
93 | ori rn,rn,name@higher; \ | ||
94 | rldicr rn,rn,32,31; \ | ||
95 | oris rn,rn,name@ha | ||
96 | |||
97 | |||
98 | #define SET_REG_TO_CONST(reg, value) \ | ||
99 | lis reg,(((value)>>48)&0xFFFF); \ | ||
100 | ori reg,reg,(((value)>>32)&0xFFFF); \ | ||
101 | rldicr reg,reg,32,31; \ | ||
102 | oris reg,reg,(((value)>>16)&0xFFFF); \ | ||
103 | ori reg,reg,((value)&0xFFFF); | ||
104 | |||
105 | #define SET_REG_TO_LABEL(reg, label) \ | ||
106 | lis reg,(label)@highest; \ | ||
107 | ori reg,reg,(label)@higher; \ | ||
108 | rldicr reg,reg,32,31; \ | ||
109 | oris reg,reg,(label)@h; \ | ||
110 | ori reg,reg,(label)@l; | ||
111 | |||
112 | |||
113 | /* PPPBBB - DRENG If KERNELBASE is always 0xC0..., | ||
114 | * Then we can easily do this with one asm insn. -Peter | ||
115 | */ | ||
116 | #define tophys(rd,rs) \ | ||
117 | lis rd,((KERNELBASE>>48)&0xFFFF); \ | ||
118 | rldicr rd,rd,32,31; \ | ||
119 | sub rd,rs,rd | ||
120 | |||
121 | #define tovirt(rd,rs) \ | ||
122 | lis rd,((KERNELBASE>>48)&0xFFFF); \ | ||
123 | rldicr rd,rd,32,31; \ | ||
124 | add rd,rs,rd | ||
125 | |||
126 | /* Condition Register Bit Fields */ | ||
127 | |||
128 | #define cr0 0 | ||
129 | #define cr1 1 | ||
130 | #define cr2 2 | ||
131 | #define cr3 3 | ||
132 | #define cr4 4 | ||
133 | #define cr5 5 | ||
134 | #define cr6 6 | ||
135 | #define cr7 7 | ||
136 | |||
137 | |||
138 | /* General Purpose Registers (GPRs) */ | ||
139 | |||
140 | #define r0 0 | ||
141 | #define r1 1 | ||
142 | #define r2 2 | ||
143 | #define r3 3 | ||
144 | #define r4 4 | ||
145 | #define r5 5 | ||
146 | #define r6 6 | ||
147 | #define r7 7 | ||
148 | #define r8 8 | ||
149 | #define r9 9 | ||
150 | #define r10 10 | ||
151 | #define r11 11 | ||
152 | #define r12 12 | ||
153 | #define r13 13 | ||
154 | #define r14 14 | ||
155 | #define r15 15 | ||
156 | #define r16 16 | ||
157 | #define r17 17 | ||
158 | #define r18 18 | ||
159 | #define r19 19 | ||
160 | #define r20 20 | ||
161 | #define r21 21 | ||
162 | #define r22 22 | ||
163 | #define r23 23 | ||
164 | #define r24 24 | ||
165 | #define r25 25 | ||
166 | #define r26 26 | ||
167 | #define r27 27 | ||
168 | #define r28 28 | ||
169 | #define r29 29 | ||
170 | #define r30 30 | ||
171 | #define r31 31 | ||
172 | |||
173 | |||
174 | /* Floating Point Registers (FPRs) */ | ||
175 | |||
176 | #define fr0 0 | ||
177 | #define fr1 1 | ||
178 | #define fr2 2 | ||
179 | #define fr3 3 | ||
180 | #define fr4 4 | ||
181 | #define fr5 5 | ||
182 | #define fr6 6 | ||
183 | #define fr7 7 | ||
184 | #define fr8 8 | ||
185 | #define fr9 9 | ||
186 | #define fr10 10 | ||
187 | #define fr11 11 | ||
188 | #define fr12 12 | ||
189 | #define fr13 13 | ||
190 | #define fr14 14 | ||
191 | #define fr15 15 | ||
192 | #define fr16 16 | ||
193 | #define fr17 17 | ||
194 | #define fr18 18 | ||
195 | #define fr19 19 | ||
196 | #define fr20 20 | ||
197 | #define fr21 21 | ||
198 | #define fr22 22 | ||
199 | #define fr23 23 | ||
200 | #define fr24 24 | ||
201 | #define fr25 25 | ||
202 | #define fr26 26 | ||
203 | #define fr27 27 | ||
204 | #define fr28 28 | ||
205 | #define fr29 29 | ||
206 | #define fr30 30 | ||
207 | #define fr31 31 | ||
208 | |||
209 | #define vr0 0 | ||
210 | #define vr1 1 | ||
211 | #define vr2 2 | ||
212 | #define vr3 3 | ||
213 | #define vr4 4 | ||
214 | #define vr5 5 | ||
215 | #define vr6 6 | ||
216 | #define vr7 7 | ||
217 | #define vr8 8 | ||
218 | #define vr9 9 | ||
219 | #define vr10 10 | ||
220 | #define vr11 11 | ||
221 | #define vr12 12 | ||
222 | #define vr13 13 | ||
223 | #define vr14 14 | ||
224 | #define vr15 15 | ||
225 | #define vr16 16 | ||
226 | #define vr17 17 | ||
227 | #define vr18 18 | ||
228 | #define vr19 19 | ||
229 | #define vr20 20 | ||
230 | #define vr21 21 | ||
231 | #define vr22 22 | ||
232 | #define vr23 23 | ||
233 | #define vr24 24 | ||
234 | #define vr25 25 | ||
235 | #define vr26 26 | ||
236 | #define vr27 27 | ||
237 | #define vr28 28 | ||
238 | #define vr29 29 | ||
239 | #define vr30 30 | ||
240 | #define vr31 31 | ||
241 | |||
242 | #endif /* _PPC64_PPC_ASM_H */ | ||
diff --git a/include/asm-ppc64/processor.h b/include/asm-ppc64/processor.h deleted file mode 100644 index 4146189006e3..000000000000 --- a/include/asm-ppc64/processor.h +++ /dev/null | |||
@@ -1,558 +0,0 @@ | |||
1 | #ifndef __ASM_PPC64_PROCESSOR_H | ||
2 | #define __ASM_PPC64_PROCESSOR_H | ||
3 | |||
4 | /* | ||
5 | * Copyright (C) 2001 PPC 64 Team, IBM Corp | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * as published by the Free Software Foundation; either version | ||
10 | * 2 of the License, or (at your option) any later version. | ||
11 | */ | ||
12 | |||
13 | #include <linux/stringify.h> | ||
14 | #ifndef __ASSEMBLY__ | ||
15 | #include <linux/config.h> | ||
16 | #include <asm/atomic.h> | ||
17 | #include <asm/ppcdebug.h> | ||
18 | #include <asm/a.out.h> | ||
19 | #endif | ||
20 | #include <asm/ptrace.h> | ||
21 | #include <asm/types.h> | ||
22 | #include <asm/systemcfg.h> | ||
23 | #include <asm/cputable.h> | ||
24 | |||
25 | /* Machine State Register (MSR) Fields */ | ||
26 | #define MSR_SF_LG 63 /* Enable 64 bit mode */ | ||
27 | #define MSR_ISF_LG 61 /* Interrupt 64b mode valid on 630 */ | ||
28 | #define MSR_HV_LG 60 /* Hypervisor state */ | ||
29 | #define MSR_VEC_LG 25 /* Enable AltiVec */ | ||
30 | #define MSR_POW_LG 18 /* Enable Power Management */ | ||
31 | #define MSR_WE_LG 18 /* Wait State Enable */ | ||
32 | #define MSR_TGPR_LG 17 /* TLB Update registers in use */ | ||
33 | #define MSR_CE_LG 17 /* Critical Interrupt Enable */ | ||
34 | #define MSR_ILE_LG 16 /* Interrupt Little Endian */ | ||
35 | #define MSR_EE_LG 15 /* External Interrupt Enable */ | ||
36 | #define MSR_PR_LG 14 /* Problem State / Privilege Level */ | ||
37 | #define MSR_FP_LG 13 /* Floating Point enable */ | ||
38 | #define MSR_ME_LG 12 /* Machine Check Enable */ | ||
39 | #define MSR_FE0_LG 11 /* Floating Exception mode 0 */ | ||
40 | #define MSR_SE_LG 10 /* Single Step */ | ||
41 | #define MSR_BE_LG 9 /* Branch Trace */ | ||
42 | #define MSR_DE_LG 9 /* Debug Exception Enable */ | ||
43 | #define MSR_FE1_LG 8 /* Floating Exception mode 1 */ | ||
44 | #define MSR_IP_LG 6 /* Exception prefix 0x000/0xFFF */ | ||
45 | #define MSR_IR_LG 5 /* Instruction Relocate */ | ||
46 | #define MSR_DR_LG 4 /* Data Relocate */ | ||
47 | #define MSR_PE_LG 3 /* Protection Enable */ | ||
48 | #define MSR_PX_LG 2 /* Protection Exclusive Mode */ | ||
49 | #define MSR_PMM_LG 2 /* Performance monitor */ | ||
50 | #define MSR_RI_LG 1 /* Recoverable Exception */ | ||
51 | #define MSR_LE_LG 0 /* Little Endian */ | ||
52 | |||
53 | #ifdef __ASSEMBLY__ | ||
54 | #define __MASK(X) (1<<(X)) | ||
55 | #else | ||
56 | #define __MASK(X) (1UL<<(X)) | ||
57 | #endif | ||
58 | |||
59 | #define MSR_SF __MASK(MSR_SF_LG) /* Enable 64 bit mode */ | ||
60 | #define MSR_ISF __MASK(MSR_ISF_LG) /* Interrupt 64b mode valid on 630 */ | ||
61 | #define MSR_HV __MASK(MSR_HV_LG) /* Hypervisor state */ | ||
62 | #define MSR_VEC __MASK(MSR_VEC_LG) /* Enable AltiVec */ | ||
63 | #define MSR_POW __MASK(MSR_POW_LG) /* Enable Power Management */ | ||
64 | #define MSR_WE __MASK(MSR_WE_LG) /* Wait State Enable */ | ||
65 | #define MSR_TGPR __MASK(MSR_TGPR_LG) /* TLB Update registers in use */ | ||
66 | #define MSR_CE __MASK(MSR_CE_LG) /* Critical Interrupt Enable */ | ||
67 | #define MSR_ILE __MASK(MSR_ILE_LG) /* Interrupt Little Endian */ | ||
68 | #define MSR_EE __MASK(MSR_EE_LG) /* External Interrupt Enable */ | ||
69 | #define MSR_PR __MASK(MSR_PR_LG) /* Problem State / Privilege Level */ | ||
70 | #define MSR_FP __MASK(MSR_FP_LG) /* Floating Point enable */ | ||
71 | #define MSR_ME __MASK(MSR_ME_LG) /* Machine Check Enable */ | ||
72 | #define MSR_FE0 __MASK(MSR_FE0_LG) /* Floating Exception mode 0 */ | ||
73 | #define MSR_SE __MASK(MSR_SE_LG) /* Single Step */ | ||
74 | #define MSR_BE __MASK(MSR_BE_LG) /* Branch Trace */ | ||
75 | #define MSR_DE __MASK(MSR_DE_LG) /* Debug Exception Enable */ | ||
76 | #define MSR_FE1 __MASK(MSR_FE1_LG) /* Floating Exception mode 1 */ | ||
77 | #define MSR_IP __MASK(MSR_IP_LG) /* Exception prefix 0x000/0xFFF */ | ||
78 | #define MSR_IR __MASK(MSR_IR_LG) /* Instruction Relocate */ | ||
79 | #define MSR_DR __MASK(MSR_DR_LG) /* Data Relocate */ | ||
80 | #define MSR_PE __MASK(MSR_PE_LG) /* Protection Enable */ | ||
81 | #define MSR_PX __MASK(MSR_PX_LG) /* Protection Exclusive Mode */ | ||
82 | #define MSR_PMM __MASK(MSR_PMM_LG) /* Performance monitor */ | ||
83 | #define MSR_RI __MASK(MSR_RI_LG) /* Recoverable Exception */ | ||
84 | #define MSR_LE __MASK(MSR_LE_LG) /* Little Endian */ | ||
85 | |||
86 | #define MSR_ MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_ISF | ||
87 | #define MSR_KERNEL MSR_ | MSR_SF | MSR_HV | ||
88 | |||
89 | #define MSR_USER32 MSR_ | MSR_PR | MSR_EE | ||
90 | #define MSR_USER64 MSR_USER32 | MSR_SF | ||
91 | |||
92 | /* Floating Point Status and Control Register (FPSCR) Fields */ | ||
93 | |||
94 | #define FPSCR_FX 0x80000000 /* FPU exception summary */ | ||
95 | #define FPSCR_FEX 0x40000000 /* FPU enabled exception summary */ | ||
96 | #define FPSCR_VX 0x20000000 /* Invalid operation summary */ | ||
97 | #define FPSCR_OX 0x10000000 /* Overflow exception summary */ | ||
98 | #define FPSCR_UX 0x08000000 /* Underflow exception summary */ | ||
99 | #define FPSCR_ZX 0x04000000 /* Zero-divide exception summary */ | ||
100 | #define FPSCR_XX 0x02000000 /* Inexact exception summary */ | ||
101 | #define FPSCR_VXSNAN 0x01000000 /* Invalid op for SNaN */ | ||
102 | #define FPSCR_VXISI 0x00800000 /* Invalid op for Inv - Inv */ | ||
103 | #define FPSCR_VXIDI 0x00400000 /* Invalid op for Inv / Inv */ | ||
104 | #define FPSCR_VXZDZ 0x00200000 /* Invalid op for Zero / Zero */ | ||
105 | #define FPSCR_VXIMZ 0x00100000 /* Invalid op for Inv * Zero */ | ||
106 | #define FPSCR_VXVC 0x00080000 /* Invalid op for Compare */ | ||
107 | #define FPSCR_FR 0x00040000 /* Fraction rounded */ | ||
108 | #define FPSCR_FI 0x00020000 /* Fraction inexact */ | ||
109 | #define FPSCR_FPRF 0x0001f000 /* FPU Result Flags */ | ||
110 | #define FPSCR_FPCC 0x0000f000 /* FPU Condition Codes */ | ||
111 | #define FPSCR_VXSOFT 0x00000400 /* Invalid op for software request */ | ||
112 | #define FPSCR_VXSQRT 0x00000200 /* Invalid op for square root */ | ||
113 | #define FPSCR_VXCVI 0x00000100 /* Invalid op for integer convert */ | ||
114 | #define FPSCR_VE 0x00000080 /* Invalid op exception enable */ | ||
115 | #define FPSCR_OE 0x00000040 /* IEEE overflow exception enable */ | ||
116 | #define FPSCR_UE 0x00000020 /* IEEE underflow exception enable */ | ||
117 | #define FPSCR_ZE 0x00000010 /* IEEE zero divide exception enable */ | ||
118 | #define FPSCR_XE 0x00000008 /* FP inexact exception enable */ | ||
119 | #define FPSCR_NI 0x00000004 /* FPU non IEEE-Mode */ | ||
120 | #define FPSCR_RN 0x00000003 /* FPU rounding control */ | ||
121 | |||
122 | /* Special Purpose Registers (SPRNs)*/ | ||
123 | |||
124 | #define SPRN_CTR 0x009 /* Count Register */ | ||
125 | #define SPRN_DABR 0x3F5 /* Data Address Breakpoint Register */ | ||
126 | #define DABR_TRANSLATION (1UL << 2) | ||
127 | #define SPRN_DAR 0x013 /* Data Address Register */ | ||
128 | #define SPRN_DEC 0x016 /* Decrement Register */ | ||
129 | #define SPRN_DSISR 0x012 /* Data Storage Interrupt Status Register */ | ||
130 | #define DSISR_NOHPTE 0x40000000 /* no translation found */ | ||
131 | #define DSISR_PROTFAULT 0x08000000 /* protection fault */ | ||
132 | #define DSISR_ISSTORE 0x02000000 /* access was a store */ | ||
133 | #define DSISR_DABRMATCH 0x00400000 /* hit data breakpoint */ | ||
134 | #define DSISR_NOSEGMENT 0x00200000 /* STAB/SLB miss */ | ||
135 | #define SPRN_HID0 0x3F0 /* Hardware Implementation Register 0 */ | ||
136 | #define SPRN_MSRDORM 0x3F1 /* Hardware Implementation Register 1 */ | ||
137 | #define SPRN_HID1 0x3F1 /* Hardware Implementation Register 1 */ | ||
138 | #define SPRN_IABR 0x3F2 /* Instruction Address Breakpoint Register */ | ||
139 | #define SPRN_NIADORM 0x3F3 /* Hardware Implementation Register 2 */ | ||
140 | #define SPRN_HID4 0x3F4 /* 970 HID4 */ | ||
141 | #define SPRN_HID5 0x3F6 /* 970 HID5 */ | ||
142 | #define SPRN_HID6 0x3F9 /* BE HID 6 */ | ||
143 | #define HID6_LB (0x0F<<12) /* Concurrent Large Page Modes */ | ||
144 | #define HID6_DLP (1<<20) /* Disable all large page modes (4K only) */ | ||
145 | #define SPRN_TSCR 0x399 /* Thread switch control on BE */ | ||
146 | #define SPRN_TTR 0x39A /* Thread switch timeout on BE */ | ||
147 | #define TSCR_DEC_ENABLE 0x200000 /* Decrementer Interrupt */ | ||
148 | #define TSCR_EE_ENABLE 0x100000 /* External Interrupt */ | ||
149 | #define TSCR_EE_BOOST 0x080000 /* External Interrupt Boost */ | ||
150 | #define SPRN_TSC 0x3FD /* Thread switch control on others */ | ||
151 | #define SPRN_TST 0x3FC /* Thread switch timeout on others */ | ||
152 | #define SPRN_L2CR 0x3F9 /* Level 2 Cache Control Regsiter */ | ||
153 | #define SPRN_LR 0x008 /* Link Register */ | ||
154 | #define SPRN_PIR 0x3FF /* Processor Identification Register */ | ||
155 | #define SPRN_PIT 0x3DB /* Programmable Interval Timer */ | ||
156 | #define SPRN_PURR 0x135 /* Processor Utilization of Resources Register */ | ||
157 | #define SPRN_PVR 0x11F /* Processor Version Register */ | ||
158 | #define SPRN_RPA 0x3D6 /* Required Physical Address Register */ | ||
159 | #define SPRN_SDA 0x3BF /* Sampled Data Address Register */ | ||
160 | #define SPRN_SDR1 0x019 /* MMU Hash Base Register */ | ||
161 | #define SPRN_SIA 0x3BB /* Sampled Instruction Address Register */ | ||
162 | #define SPRN_SPRG0 0x110 /* Special Purpose Register General 0 */ | ||
163 | #define SPRN_SPRG1 0x111 /* Special Purpose Register General 1 */ | ||
164 | #define SPRN_SPRG2 0x112 /* Special Purpose Register General 2 */ | ||
165 | #define SPRN_SPRG3 0x113 /* Special Purpose Register General 3 */ | ||
166 | #define SPRN_SRR0 0x01A /* Save/Restore Register 0 */ | ||
167 | #define SPRN_SRR1 0x01B /* Save/Restore Register 1 */ | ||
168 | #define SPRN_TBRL 0x10C /* Time Base Read Lower Register (user, R/O) */ | ||
169 | #define SPRN_TBRU 0x10D /* Time Base Read Upper Register (user, R/O) */ | ||
170 | #define SPRN_TBWL 0x11C /* Time Base Lower Register (super, W/O) */ | ||
171 | #define SPRN_TBWU 0x11D /* Time Base Write Upper Register (super, W/O) */ | ||
172 | #define SPRN_HIOR 0x137 /* 970 Hypervisor interrupt offset */ | ||
173 | #define SPRN_USIA 0x3AB /* User Sampled Instruction Address Register */ | ||
174 | #define SPRN_XER 0x001 /* Fixed Point Exception Register */ | ||
175 | #define SPRN_VRSAVE 0x100 /* Vector save */ | ||
176 | #define SPRN_CTRLF 0x088 | ||
177 | #define SPRN_CTRLT 0x098 | ||
178 | #define CTRL_RUNLATCH 0x1 | ||
179 | |||
180 | /* Performance monitor SPRs */ | ||
181 | #define SPRN_SIAR 780 | ||
182 | #define SPRN_SDAR 781 | ||
183 | #define SPRN_MMCRA 786 | ||
184 | #define MMCRA_SIHV 0x10000000UL /* state of MSR HV when SIAR set */ | ||
185 | #define MMCRA_SIPR 0x08000000UL /* state of MSR PR when SIAR set */ | ||
186 | #define MMCRA_SAMPLE_ENABLE 0x00000001UL /* enable sampling */ | ||
187 | #define SPRN_PMC1 787 | ||
188 | #define SPRN_PMC2 788 | ||
189 | #define SPRN_PMC3 789 | ||
190 | #define SPRN_PMC4 790 | ||
191 | #define SPRN_PMC5 791 | ||
192 | #define SPRN_PMC6 792 | ||
193 | #define SPRN_PMC7 793 | ||
194 | #define SPRN_PMC8 794 | ||
195 | #define SPRN_MMCR0 795 | ||
196 | #define MMCR0_FC 0x80000000UL /* freeze counters. set to 1 on a perfmon exception */ | ||
197 | #define MMCR0_FCS 0x40000000UL /* freeze in supervisor state */ | ||
198 | #define MMCR0_KERNEL_DISABLE MMCR0_FCS | ||
199 | #define MMCR0_FCP 0x20000000UL /* freeze in problem state */ | ||
200 | #define MMCR0_PROBLEM_DISABLE MMCR0_FCP | ||
201 | #define MMCR0_FCM1 0x10000000UL /* freeze counters while MSR mark = 1 */ | ||
202 | #define MMCR0_FCM0 0x08000000UL /* freeze counters while MSR mark = 0 */ | ||
203 | #define MMCR0_PMXE 0x04000000UL /* performance monitor exception enable */ | ||
204 | #define MMCR0_FCECE 0x02000000UL /* freeze counters on enabled condition or event */ | ||
205 | /* time base exception enable */ | ||
206 | #define MMCR0_TBEE 0x00400000UL /* time base exception enable */ | ||
207 | #define MMCR0_PMC1CE 0x00008000UL /* PMC1 count enable*/ | ||
208 | #define MMCR0_PMCjCE 0x00004000UL /* PMCj count enable*/ | ||
209 | #define MMCR0_TRIGGER 0x00002000UL /* TRIGGER enable */ | ||
210 | #define MMCR0_PMAO 0x00000080UL /* performance monitor alert has occurred, set to 0 after handling exception */ | ||
211 | #define MMCR0_SHRFC 0x00000040UL /* SHRre freeze conditions between threads */ | ||
212 | #define MMCR0_FCTI 0x00000008UL /* freeze counters in tags inactive mode */ | ||
213 | #define MMCR0_FCTA 0x00000004UL /* freeze counters in tags active mode */ | ||
214 | #define MMCR0_FCWAIT 0x00000002UL /* freeze counter in WAIT state */ | ||
215 | #define MMCR0_FCHV 0x00000001UL /* freeze conditions in hypervisor mode */ | ||
216 | #define SPRN_MMCR1 798 | ||
217 | |||
218 | /* Short-hand versions for a number of the above SPRNs */ | ||
219 | |||
220 | #define CTR SPRN_CTR /* Counter Register */ | ||
221 | #define DAR SPRN_DAR /* Data Address Register */ | ||
222 | #define DABR SPRN_DABR /* Data Address Breakpoint Register */ | ||
223 | #define DEC SPRN_DEC /* Decrement Register */ | ||
224 | #define DSISR SPRN_DSISR /* Data Storage Interrupt Status Register */ | ||
225 | #define HID0 SPRN_HID0 /* Hardware Implementation Register 0 */ | ||
226 | #define MSRDORM SPRN_MSRDORM /* MSR Dormant Register */ | ||
227 | #define NIADORM SPRN_NIADORM /* NIA Dormant Register */ | ||
228 | #define TSC SPRN_TSC /* Thread switch control */ | ||
229 | #define TST SPRN_TST /* Thread switch timeout */ | ||
230 | #define IABR SPRN_IABR /* Instruction Address Breakpoint Register */ | ||
231 | #define L2CR SPRN_L2CR /* PPC 750 L2 control register */ | ||
232 | #define __LR SPRN_LR | ||
233 | #define PVR SPRN_PVR /* Processor Version */ | ||
234 | #define PIR SPRN_PIR /* Processor ID */ | ||
235 | #define PURR SPRN_PURR /* Processor Utilization of Resource Register */ | ||
236 | #define SDR1 SPRN_SDR1 /* MMU hash base register */ | ||
237 | #define SPR0 SPRN_SPRG0 /* Supervisor Private Registers */ | ||
238 | #define SPR1 SPRN_SPRG1 | ||
239 | #define SPR2 SPRN_SPRG2 | ||
240 | #define SPR3 SPRN_SPRG3 | ||
241 | #define SPRG0 SPRN_SPRG0 | ||
242 | #define SPRG1 SPRN_SPRG1 | ||
243 | #define SPRG2 SPRN_SPRG2 | ||
244 | #define SPRG3 SPRN_SPRG3 | ||
245 | #define SRR0 SPRN_SRR0 /* Save and Restore Register 0 */ | ||
246 | #define SRR1 SPRN_SRR1 /* Save and Restore Register 1 */ | ||
247 | #define TBRL SPRN_TBRL /* Time Base Read Lower Register */ | ||
248 | #define TBRU SPRN_TBRU /* Time Base Read Upper Register */ | ||
249 | #define TBWL SPRN_TBWL /* Time Base Write Lower Register */ | ||
250 | #define TBWU SPRN_TBWU /* Time Base Write Upper Register */ | ||
251 | #define XER SPRN_XER | ||
252 | |||
253 | /* Processor Version Register (PVR) field extraction */ | ||
254 | |||
255 | #define PVR_VER(pvr) (((pvr) >> 16) & 0xFFFF) /* Version field */ | ||
256 | #define PVR_REV(pvr) (((pvr) >> 0) & 0xFFFF) /* Revison field */ | ||
257 | |||
258 | /* Processor Version Numbers */ | ||
259 | #define PV_NORTHSTAR 0x0033 | ||
260 | #define PV_PULSAR 0x0034 | ||
261 | #define PV_POWER4 0x0035 | ||
262 | #define PV_ICESTAR 0x0036 | ||
263 | #define PV_SSTAR 0x0037 | ||
264 | #define PV_POWER4p 0x0038 | ||
265 | #define PV_970 0x0039 | ||
266 | #define PV_POWER5 0x003A | ||
267 | #define PV_POWER5p 0x003B | ||
268 | #define PV_970FX 0x003C | ||
269 | #define PV_630 0x0040 | ||
270 | #define PV_630p 0x0041 | ||
271 | #define PV_970MP 0x0044 | ||
272 | #define PV_BE 0x0070 | ||
273 | |||
274 | /* Platforms supported by PPC64 */ | ||
275 | #define PLATFORM_PSERIES 0x0100 | ||
276 | #define PLATFORM_PSERIES_LPAR 0x0101 | ||
277 | #define PLATFORM_ISERIES_LPAR 0x0201 | ||
278 | #define PLATFORM_LPAR 0x0001 | ||
279 | #define PLATFORM_POWERMAC 0x0400 | ||
280 | #define PLATFORM_MAPLE 0x0500 | ||
281 | #define PLATFORM_BPA 0x1000 | ||
282 | |||
283 | /* Compatibility with drivers coming from PPC32 world */ | ||
284 | #define _machine (systemcfg->platform) | ||
285 | #define _MACH_Pmac PLATFORM_POWERMAC | ||
286 | |||
287 | /* | ||
288 | * List of interrupt controllers. | ||
289 | */ | ||
290 | #define IC_INVALID 0 | ||
291 | #define IC_OPEN_PIC 1 | ||
292 | #define IC_PPC_XIC 2 | ||
293 | #define IC_BPA_IIC 3 | ||
294 | |||
295 | #define XGLUE(a,b) a##b | ||
296 | #define GLUE(a,b) XGLUE(a,b) | ||
297 | |||
298 | #ifdef __ASSEMBLY__ | ||
299 | |||
300 | #define _GLOBAL(name) \ | ||
301 | .section ".text"; \ | ||
302 | .align 2 ; \ | ||
303 | .globl name; \ | ||
304 | .globl GLUE(.,name); \ | ||
305 | .section ".opd","aw"; \ | ||
306 | name: \ | ||
307 | .quad GLUE(.,name); \ | ||
308 | .quad .TOC.@tocbase; \ | ||
309 | .quad 0; \ | ||
310 | .previous; \ | ||
311 | .type GLUE(.,name),@function; \ | ||
312 | GLUE(.,name): | ||
313 | |||
314 | #define _KPROBE(name) \ | ||
315 | .section ".kprobes.text","a"; \ | ||
316 | .align 2 ; \ | ||
317 | .globl name; \ | ||
318 | .globl GLUE(.,name); \ | ||
319 | .section ".opd","aw"; \ | ||
320 | name: \ | ||
321 | .quad GLUE(.,name); \ | ||
322 | .quad .TOC.@tocbase; \ | ||
323 | .quad 0; \ | ||
324 | .previous; \ | ||
325 | .type GLUE(.,name),@function; \ | ||
326 | GLUE(.,name): | ||
327 | |||
328 | #define _STATIC(name) \ | ||
329 | .section ".text"; \ | ||
330 | .align 2 ; \ | ||
331 | .section ".opd","aw"; \ | ||
332 | name: \ | ||
333 | .quad GLUE(.,name); \ | ||
334 | .quad .TOC.@tocbase; \ | ||
335 | .quad 0; \ | ||
336 | .previous; \ | ||
337 | .type GLUE(.,name),@function; \ | ||
338 | GLUE(.,name): | ||
339 | |||
340 | #else /* __ASSEMBLY__ */ | ||
341 | |||
342 | /* | ||
343 | * Default implementation of macro that returns current | ||
344 | * instruction pointer ("program counter"). | ||
345 | */ | ||
346 | #define current_text_addr() ({ __label__ _l; _l: &&_l;}) | ||
347 | |||
348 | /* Macros for setting and retrieving special purpose registers */ | ||
349 | |||
350 | #define mfmsr() ({unsigned long rval; \ | ||
351 | asm volatile("mfmsr %0" : "=r" (rval)); rval;}) | ||
352 | |||
353 | #define __mtmsrd(v, l) asm volatile("mtmsrd %0," __stringify(l) \ | ||
354 | : : "r" (v)) | ||
355 | #define mtmsrd(v) __mtmsrd((v), 0) | ||
356 | |||
357 | #define mfspr(rn) ({unsigned long rval; \ | ||
358 | asm volatile("mfspr %0," __stringify(rn) \ | ||
359 | : "=r" (rval)); rval;}) | ||
360 | #define mtspr(rn, v) asm volatile("mtspr " __stringify(rn) ",%0" : : "r" (v)) | ||
361 | |||
362 | #define mftb() ({unsigned long rval; \ | ||
363 | asm volatile("mftb %0" : "=r" (rval)); rval;}) | ||
364 | |||
365 | #define mttbl(v) asm volatile("mttbl %0":: "r"(v)) | ||
366 | #define mttbu(v) asm volatile("mttbu %0":: "r"(v)) | ||
367 | |||
368 | #define mfasr() ({unsigned long rval; \ | ||
369 | asm volatile("mfasr %0" : "=r" (rval)); rval;}) | ||
370 | |||
371 | static inline void set_tb(unsigned int upper, unsigned int lower) | ||
372 | { | ||
373 | mttbl(0); | ||
374 | mttbu(upper); | ||
375 | mttbl(lower); | ||
376 | } | ||
377 | |||
378 | #define __get_SP() ({unsigned long sp; \ | ||
379 | asm volatile("mr %0,1": "=r" (sp)); sp;}) | ||
380 | |||
381 | #ifdef __KERNEL__ | ||
382 | |||
383 | extern int have_of; | ||
384 | extern u64 ppc64_interrupt_controller; | ||
385 | |||
386 | struct task_struct; | ||
387 | void start_thread(struct pt_regs *regs, unsigned long fdptr, unsigned long sp); | ||
388 | void release_thread(struct task_struct *); | ||
389 | |||
390 | /* Prepare to copy thread state - unlazy all lazy status */ | ||
391 | extern void prepare_to_copy(struct task_struct *tsk); | ||
392 | |||
393 | /* Create a new kernel thread. */ | ||
394 | extern long kernel_thread(int (*fn)(void *), void *arg, unsigned long flags); | ||
395 | |||
396 | /* Lazy FPU handling on uni-processor */ | ||
397 | extern struct task_struct *last_task_used_math; | ||
398 | extern struct task_struct *last_task_used_altivec; | ||
399 | |||
400 | /* 64-bit user address space is 44-bits (16TB user VM) */ | ||
401 | #define TASK_SIZE_USER64 (0x0000100000000000UL) | ||
402 | |||
403 | /* | ||
404 | * 32-bit user address space is 4GB - 1 page | ||
405 | * (this 1 page is needed so referencing of 0xFFFFFFFF generates EFAULT | ||
406 | */ | ||
407 | #define TASK_SIZE_USER32 (0x0000000100000000UL - (1*PAGE_SIZE)) | ||
408 | |||
409 | #define TASK_SIZE (test_thread_flag(TIF_32BIT) ? \ | ||
410 | TASK_SIZE_USER32 : TASK_SIZE_USER64) | ||
411 | |||
412 | /* This decides where the kernel will search for a free chunk of vm | ||
413 | * space during mmap's. | ||
414 | */ | ||
415 | #define TASK_UNMAPPED_BASE_USER32 (PAGE_ALIGN(TASK_SIZE_USER32 / 4)) | ||
416 | #define TASK_UNMAPPED_BASE_USER64 (PAGE_ALIGN(TASK_SIZE_USER64 / 4)) | ||
417 | |||
418 | #define TASK_UNMAPPED_BASE ((test_thread_flag(TIF_32BIT)||(ppcdebugset(PPCDBG_BINFMT_32ADDR))) ? \ | ||
419 | TASK_UNMAPPED_BASE_USER32 : TASK_UNMAPPED_BASE_USER64 ) | ||
420 | |||
421 | typedef struct { | ||
422 | unsigned long seg; | ||
423 | } mm_segment_t; | ||
424 | |||
425 | struct thread_struct { | ||
426 | unsigned long ksp; /* Kernel stack pointer */ | ||
427 | unsigned long ksp_vsid; | ||
428 | struct pt_regs *regs; /* Pointer to saved register state */ | ||
429 | mm_segment_t fs; /* for get_fs() validation */ | ||
430 | double fpr[32]; /* Complete floating point set */ | ||
431 | unsigned long fpscr; /* Floating point status (plus pad) */ | ||
432 | unsigned long fpexc_mode; /* Floating-point exception mode */ | ||
433 | unsigned long start_tb; /* Start purr when proc switched in */ | ||
434 | unsigned long accum_tb; /* Total accumilated purr for process */ | ||
435 | unsigned long vdso_base; /* base of the vDSO library */ | ||
436 | unsigned long dabr; /* Data address breakpoint register */ | ||
437 | #ifdef CONFIG_ALTIVEC | ||
438 | /* Complete AltiVec register set */ | ||
439 | vector128 vr[32] __attribute((aligned(16))); | ||
440 | /* AltiVec status */ | ||
441 | vector128 vscr __attribute((aligned(16))); | ||
442 | unsigned long vrsave; | ||
443 | int used_vr; /* set if process has used altivec */ | ||
444 | #endif /* CONFIG_ALTIVEC */ | ||
445 | }; | ||
446 | |||
447 | #define ARCH_MIN_TASKALIGN 16 | ||
448 | |||
449 | #define INIT_SP (sizeof(init_stack) + (unsigned long) &init_stack) | ||
450 | |||
451 | #define INIT_THREAD { \ | ||
452 | .ksp = INIT_SP, \ | ||
453 | .regs = (struct pt_regs *)INIT_SP - 1, \ | ||
454 | .fs = KERNEL_DS, \ | ||
455 | .fpr = {0}, \ | ||
456 | .fpscr = 0, \ | ||
457 | .fpexc_mode = MSR_FE0|MSR_FE1, \ | ||
458 | } | ||
459 | |||
460 | /* | ||
461 | * Return saved PC of a blocked thread. For now, this is the "user" PC | ||
462 | */ | ||
463 | #define thread_saved_pc(tsk) \ | ||
464 | ((tsk)->thread.regs? (tsk)->thread.regs->nip: 0) | ||
465 | |||
466 | unsigned long get_wchan(struct task_struct *p); | ||
467 | |||
468 | #define KSTK_EIP(tsk) ((tsk)->thread.regs? (tsk)->thread.regs->nip: 0) | ||
469 | #define KSTK_ESP(tsk) ((tsk)->thread.regs? (tsk)->thread.regs->gpr[1]: 0) | ||
470 | |||
471 | /* Get/set floating-point exception mode */ | ||
472 | #define GET_FPEXC_CTL(tsk, adr) get_fpexc_mode((tsk), (adr)) | ||
473 | #define SET_FPEXC_CTL(tsk, val) set_fpexc_mode((tsk), (val)) | ||
474 | |||
475 | extern int get_fpexc_mode(struct task_struct *tsk, unsigned long adr); | ||
476 | extern int set_fpexc_mode(struct task_struct *tsk, unsigned int val); | ||
477 | |||
478 | static inline unsigned int __unpack_fe01(unsigned long msr_bits) | ||
479 | { | ||
480 | return ((msr_bits & MSR_FE0) >> 10) | ((msr_bits & MSR_FE1) >> 8); | ||
481 | } | ||
482 | |||
483 | static inline unsigned long __pack_fe01(unsigned int fpmode) | ||
484 | { | ||
485 | return ((fpmode << 10) & MSR_FE0) | ((fpmode << 8) & MSR_FE1); | ||
486 | } | ||
487 | |||
488 | #define cpu_relax() do { HMT_low(); HMT_medium(); barrier(); } while (0) | ||
489 | |||
490 | /* | ||
491 | * Prefetch macros. | ||
492 | */ | ||
493 | #define ARCH_HAS_PREFETCH | ||
494 | #define ARCH_HAS_PREFETCHW | ||
495 | #define ARCH_HAS_SPINLOCK_PREFETCH | ||
496 | |||
497 | static inline void prefetch(const void *x) | ||
498 | { | ||
499 | if (unlikely(!x)) | ||
500 | return; | ||
501 | |||
502 | __asm__ __volatile__ ("dcbt 0,%0" : : "r" (x)); | ||
503 | } | ||
504 | |||
505 | static inline void prefetchw(const void *x) | ||
506 | { | ||
507 | if (unlikely(!x)) | ||
508 | return; | ||
509 | |||
510 | __asm__ __volatile__ ("dcbtst 0,%0" : : "r" (x)); | ||
511 | } | ||
512 | |||
513 | #define spin_lock_prefetch(x) prefetchw(x) | ||
514 | |||
515 | #define HAVE_ARCH_PICK_MMAP_LAYOUT | ||
516 | |||
517 | static inline void ppc64_runlatch_on(void) | ||
518 | { | ||
519 | unsigned long ctrl; | ||
520 | |||
521 | if (cpu_has_feature(CPU_FTR_CTRL)) { | ||
522 | ctrl = mfspr(SPRN_CTRLF); | ||
523 | ctrl |= CTRL_RUNLATCH; | ||
524 | mtspr(SPRN_CTRLT, ctrl); | ||
525 | } | ||
526 | } | ||
527 | |||
528 | static inline void ppc64_runlatch_off(void) | ||
529 | { | ||
530 | unsigned long ctrl; | ||
531 | |||
532 | if (cpu_has_feature(CPU_FTR_CTRL)) { | ||
533 | ctrl = mfspr(SPRN_CTRLF); | ||
534 | ctrl &= ~CTRL_RUNLATCH; | ||
535 | mtspr(SPRN_CTRLT, ctrl); | ||
536 | } | ||
537 | } | ||
538 | |||
539 | #endif /* __KERNEL__ */ | ||
540 | |||
541 | #endif /* __ASSEMBLY__ */ | ||
542 | |||
543 | #ifdef __KERNEL__ | ||
544 | #define RUNLATCH_ON(REG) \ | ||
545 | BEGIN_FTR_SECTION \ | ||
546 | mfspr (REG),SPRN_CTRLF; \ | ||
547 | ori (REG),(REG),CTRL_RUNLATCH; \ | ||
548 | mtspr SPRN_CTRLT,(REG); \ | ||
549 | END_FTR_SECTION_IFSET(CPU_FTR_CTRL) | ||
550 | #endif | ||
551 | |||
552 | /* | ||
553 | * Number of entries in the SLB. If this ever changes we should handle | ||
554 | * it with a use a cpu feature fixup. | ||
555 | */ | ||
556 | #define SLB_NUM_ENTRIES 64 | ||
557 | |||
558 | #endif /* __ASM_PPC64_PROCESSOR_H */ | ||
diff --git a/include/asm-ppc64/prom.h b/include/asm-ppc64/prom.h index c02ec1d6b909..e8d0d2ab4c0f 100644 --- a/include/asm-ppc64/prom.h +++ b/include/asm-ppc64/prom.h | |||
@@ -14,6 +14,7 @@ | |||
14 | * as published by the Free Software Foundation; either version | 14 | * as published by the Free Software Foundation; either version |
15 | * 2 of the License, or (at your option) any later version. | 15 | * 2 of the License, or (at your option) any later version. |
16 | */ | 16 | */ |
17 | #include <linux/config.h> | ||
17 | #include <linux/proc_fs.h> | 18 | #include <linux/proc_fs.h> |
18 | #include <asm/atomic.h> | 19 | #include <asm/atomic.h> |
19 | 20 | ||
@@ -137,6 +138,9 @@ struct device_node { | |||
137 | struct kref kref; | 138 | struct kref kref; |
138 | unsigned long _flags; | 139 | unsigned long _flags; |
139 | void *data; | 140 | void *data; |
141 | #ifdef CONFIG_PPC_ISERIES | ||
142 | struct list_head Device_List; | ||
143 | #endif | ||
140 | }; | 144 | }; |
141 | 145 | ||
142 | extern struct device_node *of_chosen; | 146 | extern struct device_node *of_chosen; |
diff --git a/include/asm-ppc64/ptrace.h b/include/asm-ppc64/ptrace.h deleted file mode 100644 index 3a55377f1fd3..000000000000 --- a/include/asm-ppc64/ptrace.h +++ /dev/null | |||
@@ -1,213 +0,0 @@ | |||
1 | #ifndef _PPC64_PTRACE_H | ||
2 | #define _PPC64_PTRACE_H | ||
3 | |||
4 | /* | ||
5 | * Copyright (C) 2001 PPC64 Team, IBM Corp | ||
6 | * | ||
7 | * This struct defines the way the registers are stored on the | ||
8 | * kernel stack during a system call or other kernel entry. | ||
9 | * | ||
10 | * this should only contain volatile regs | ||
11 | * since we can keep non-volatile in the thread_struct | ||
12 | * should set this up when only volatiles are saved | ||
13 | * by intr code. | ||
14 | * | ||
15 | * Since this is going on the stack, *CARE MUST BE TAKEN* to insure | ||
16 | * that the overall structure is a multiple of 16 bytes in length. | ||
17 | * | ||
18 | * Note that the offsets of the fields in this struct correspond with | ||
19 | * the PT_* values below. This simplifies arch/ppc64/kernel/ptrace.c. | ||
20 | * | ||
21 | * This program is free software; you can redistribute it and/or | ||
22 | * modify it under the terms of the GNU General Public License | ||
23 | * as published by the Free Software Foundation; either version | ||
24 | * 2 of the License, or (at your option) any later version. | ||
25 | */ | ||
26 | |||
27 | #ifndef __ASSEMBLY__ | ||
28 | |||
29 | struct pt_regs { | ||
30 | unsigned long gpr[32]; | ||
31 | unsigned long nip; | ||
32 | unsigned long msr; | ||
33 | unsigned long orig_gpr3; /* Used for restarting system calls */ | ||
34 | unsigned long ctr; | ||
35 | unsigned long link; | ||
36 | unsigned long xer; | ||
37 | unsigned long ccr; | ||
38 | unsigned long softe; /* Soft enabled/disabled */ | ||
39 | unsigned long trap; /* Reason for being here */ | ||
40 | unsigned long dar; /* Fault registers */ | ||
41 | unsigned long dsisr; | ||
42 | unsigned long result; /* Result of a system call */ | ||
43 | }; | ||
44 | |||
45 | struct pt_regs32 { | ||
46 | unsigned int gpr[32]; | ||
47 | unsigned int nip; | ||
48 | unsigned int msr; | ||
49 | unsigned int orig_gpr3; /* Used for restarting system calls */ | ||
50 | unsigned int ctr; | ||
51 | unsigned int link; | ||
52 | unsigned int xer; | ||
53 | unsigned int ccr; | ||
54 | unsigned int mq; /* 601 only (not used at present) */ | ||
55 | unsigned int trap; /* Reason for being here */ | ||
56 | unsigned int dar; /* Fault registers */ | ||
57 | unsigned int dsisr; | ||
58 | unsigned int result; /* Result of a system call */ | ||
59 | }; | ||
60 | |||
61 | #ifdef __KERNEL__ | ||
62 | |||
63 | #define instruction_pointer(regs) ((regs)->nip) | ||
64 | |||
65 | #ifdef CONFIG_SMP | ||
66 | extern unsigned long profile_pc(struct pt_regs *regs); | ||
67 | #else | ||
68 | #define profile_pc(regs) instruction_pointer(regs) | ||
69 | #endif | ||
70 | |||
71 | #define user_mode(regs) ((((regs)->msr) >> MSR_PR_LG) & 0x1) | ||
72 | |||
73 | #define force_successful_syscall_return() \ | ||
74 | (current_thread_info()->syscall_noerror = 1) | ||
75 | |||
76 | /* | ||
77 | * We use the least-significant bit of the trap field to indicate | ||
78 | * whether we have saved the full set of registers, or only a | ||
79 | * partial set. A 1 there means the partial set. | ||
80 | */ | ||
81 | #define FULL_REGS(regs) (((regs)->trap & 1) == 0) | ||
82 | #define TRAP(regs) ((regs)->trap & ~0xF) | ||
83 | #define CHECK_FULL_REGS(regs) BUG_ON(regs->trap & 1) | ||
84 | |||
85 | #endif /* __KERNEL__ */ | ||
86 | |||
87 | #endif /* __ASSEMBLY__ */ | ||
88 | |||
89 | #define STACK_FRAME_OVERHEAD 112 /* size of minimum stack frame */ | ||
90 | |||
91 | /* Size of dummy stack frame allocated when calling signal handler. */ | ||
92 | #define __SIGNAL_FRAMESIZE 128 | ||
93 | #define __SIGNAL_FRAMESIZE32 64 | ||
94 | |||
95 | /* | ||
96 | * Offsets used by 'ptrace' system call interface. | ||
97 | */ | ||
98 | #define PT_R0 0 | ||
99 | #define PT_R1 1 | ||
100 | #define PT_R2 2 | ||
101 | #define PT_R3 3 | ||
102 | #define PT_R4 4 | ||
103 | #define PT_R5 5 | ||
104 | #define PT_R6 6 | ||
105 | #define PT_R7 7 | ||
106 | #define PT_R8 8 | ||
107 | #define PT_R9 9 | ||
108 | #define PT_R10 10 | ||
109 | #define PT_R11 11 | ||
110 | #define PT_R12 12 | ||
111 | #define PT_R13 13 | ||
112 | #define PT_R14 14 | ||
113 | #define PT_R15 15 | ||
114 | #define PT_R16 16 | ||
115 | #define PT_R17 17 | ||
116 | #define PT_R18 18 | ||
117 | #define PT_R19 19 | ||
118 | #define PT_R20 20 | ||
119 | #define PT_R21 21 | ||
120 | #define PT_R22 22 | ||
121 | #define PT_R23 23 | ||
122 | #define PT_R24 24 | ||
123 | #define PT_R25 25 | ||
124 | #define PT_R26 26 | ||
125 | #define PT_R27 27 | ||
126 | #define PT_R28 28 | ||
127 | #define PT_R29 29 | ||
128 | #define PT_R30 30 | ||
129 | #define PT_R31 31 | ||
130 | |||
131 | #define PT_NIP 32 | ||
132 | #define PT_MSR 33 | ||
133 | #ifdef __KERNEL__ | ||
134 | #define PT_ORIG_R3 34 | ||
135 | #endif | ||
136 | #define PT_CTR 35 | ||
137 | #define PT_LNK 36 | ||
138 | #define PT_XER 37 | ||
139 | #define PT_CCR 38 | ||
140 | #define PT_SOFTE 39 | ||
141 | #define PT_TRAP 40 | ||
142 | #define PT_DAR 41 | ||
143 | #define PT_DSISR 42 | ||
144 | #define PT_RESULT 43 | ||
145 | |||
146 | #define PT_FPR0 48 | ||
147 | |||
148 | /* | ||
149 | * Kernel and userspace will both use this PT_FPSCR value. 32-bit apps will | ||
150 | * have visibility to the asm-ppc/ptrace.h header instead of this one. | ||
151 | */ | ||
152 | #define PT_FPSCR (PT_FPR0 + 32) /* each FP reg occupies 1 slot in 64-bit space */ | ||
153 | |||
154 | #ifdef __KERNEL__ | ||
155 | #define PT_FPSCR32 (PT_FPR0 + 2*32 + 1) /* each FP reg occupies 2 32-bit userspace slots */ | ||
156 | #endif | ||
157 | |||
158 | #define PT_VR0 82 /* each Vector reg occupies 2 slots in 64-bit */ | ||
159 | #define PT_VSCR (PT_VR0 + 32*2 + 1) | ||
160 | #define PT_VRSAVE (PT_VR0 + 33*2) | ||
161 | |||
162 | #ifdef __KERNEL__ | ||
163 | #define PT_VR0_32 164 /* each Vector reg occupies 4 slots in 32-bit */ | ||
164 | #define PT_VSCR_32 (PT_VR0 + 32*4 + 3) | ||
165 | #define PT_VRSAVE_32 (PT_VR0 + 33*4) | ||
166 | #endif | ||
167 | |||
168 | /* | ||
169 | * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go. | ||
170 | * The transfer totals 34 quadword. Quadwords 0-31 contain the | ||
171 | * corresponding vector registers. Quadword 32 contains the vscr as the | ||
172 | * last word (offset 12) within that quadword. Quadword 33 contains the | ||
173 | * vrsave as the first word (offset 0) within the quadword. | ||
174 | * | ||
175 | * This definition of the VMX state is compatible with the current PPC32 | ||
176 | * ptrace interface. This allows signal handling and ptrace to use the same | ||
177 | * structures. This also simplifies the implementation of a bi-arch | ||
178 | * (combined (32- and 64-bit) gdb. | ||
179 | */ | ||
180 | #define PTRACE_GETVRREGS 18 | ||
181 | #define PTRACE_SETVRREGS 19 | ||
182 | |||
183 | /* | ||
184 | * While we dont have 64bit book E processors, we need to reserve the | ||
185 | * relevant ptrace calls for 32bit compatibility. | ||
186 | */ | ||
187 | #if 0 | ||
188 | #define PTRACE_GETEVRREGS 20 | ||
189 | #define PTRACE_SETEVRREGS 21 | ||
190 | #endif | ||
191 | |||
192 | /* | ||
193 | * Get or set a debug register. The first 16 are DABR registers and the | ||
194 | * second 16 are IABR registers. | ||
195 | */ | ||
196 | #define PTRACE_GET_DEBUGREG 25 | ||
197 | #define PTRACE_SET_DEBUGREG 26 | ||
198 | |||
199 | /* Additional PTRACE requests implemented on PowerPC. */ | ||
200 | #define PPC_PTRACE_GETREGS 0x99 /* Get GPRs 0 - 31 */ | ||
201 | #define PPC_PTRACE_SETREGS 0x98 /* Set GPRs 0 - 31 */ | ||
202 | #define PPC_PTRACE_GETFPREGS 0x97 /* Get FPRs 0 - 31 */ | ||
203 | #define PPC_PTRACE_SETFPREGS 0x96 /* Set FPRs 0 - 31 */ | ||
204 | |||
205 | /* Calls to trace a 64bit program from a 32bit program */ | ||
206 | #define PPC_PTRACE_PEEKTEXT_3264 0x95 | ||
207 | #define PPC_PTRACE_PEEKDATA_3264 0x94 | ||
208 | #define PPC_PTRACE_POKETEXT_3264 0x93 | ||
209 | #define PPC_PTRACE_POKEDATA_3264 0x92 | ||
210 | #define PPC_PTRACE_PEEKUSR_3264 0x91 | ||
211 | #define PPC_PTRACE_POKEUSR_3264 0x90 | ||
212 | |||
213 | #endif /* _PPC64_PTRACE_H */ | ||
diff --git a/include/asm-ppc64/rtas.h b/include/asm-ppc64/rtas.h deleted file mode 100644 index e7d1b5222802..000000000000 --- a/include/asm-ppc64/rtas.h +++ /dev/null | |||
@@ -1,249 +0,0 @@ | |||
1 | #ifndef _PPC64_RTAS_H | ||
2 | #define _PPC64_RTAS_H | ||
3 | |||
4 | #include <linux/spinlock.h> | ||
5 | #include <asm/page.h> | ||
6 | |||
7 | /* | ||
8 | * Definitions for talking to the RTAS on CHRP machines. | ||
9 | * | ||
10 | * Copyright (C) 2001 Peter Bergner | ||
11 | * Copyright (C) 2001 PPC 64 Team, IBM Corp | ||
12 | * | ||
13 | * This program is free software; you can redistribute it and/or | ||
14 | * modify it under the terms of the GNU General Public License | ||
15 | * as published by the Free Software Foundation; either version | ||
16 | * 2 of the License, or (at your option) any later version. | ||
17 | */ | ||
18 | |||
19 | #define RTAS_UNKNOWN_SERVICE (-1) | ||
20 | #define RTAS_INSTANTIATE_MAX (1UL<<30) /* Don't instantiate rtas at/above this value */ | ||
21 | |||
22 | /* Buffer size for ppc_rtas system call. */ | ||
23 | #define RTAS_RMOBUF_MAX (64 * 1024) | ||
24 | |||
25 | /* RTAS return status codes */ | ||
26 | #define RTAS_BUSY -2 /* RTAS Busy */ | ||
27 | #define RTAS_EXTENDED_DELAY_MIN 9900 | ||
28 | #define RTAS_EXTENDED_DELAY_MAX 9905 | ||
29 | |||
30 | /* | ||
31 | * In general to call RTAS use rtas_token("string") to lookup | ||
32 | * an RTAS token for the given string (e.g. "event-scan"). | ||
33 | * To actually perform the call use | ||
34 | * ret = rtas_call(token, n_in, n_out, ...) | ||
35 | * Where n_in is the number of input parameters and | ||
36 | * n_out is the number of output parameters | ||
37 | * | ||
38 | * If the "string" is invalid on this system, RTAS_UNKNOWN_SERVICE | ||
39 | * will be returned as a token. rtas_call() does look for this | ||
40 | * token and error out gracefully so rtas_call(rtas_token("str"), ...) | ||
41 | * may be safely used for one-shot calls to RTAS. | ||
42 | * | ||
43 | */ | ||
44 | |||
45 | typedef u32 rtas_arg_t; | ||
46 | |||
47 | struct rtas_args { | ||
48 | u32 token; | ||
49 | u32 nargs; | ||
50 | u32 nret; | ||
51 | rtas_arg_t args[16]; | ||
52 | rtas_arg_t *rets; /* Pointer to return values in args[]. */ | ||
53 | }; | ||
54 | |||
55 | extern struct rtas_args rtas_stop_self_args; | ||
56 | |||
57 | struct rtas_t { | ||
58 | unsigned long entry; /* physical address pointer */ | ||
59 | unsigned long base; /* physical address pointer */ | ||
60 | unsigned long size; | ||
61 | spinlock_t lock; | ||
62 | struct rtas_args args; | ||
63 | struct device_node *dev; /* virtual address pointer */ | ||
64 | }; | ||
65 | |||
66 | /* RTAS event classes */ | ||
67 | #define RTAS_INTERNAL_ERROR 0x80000000 /* set bit 0 */ | ||
68 | #define RTAS_EPOW_WARNING 0x40000000 /* set bit 1 */ | ||
69 | #define RTAS_POWERMGM_EVENTS 0x20000000 /* set bit 2 */ | ||
70 | #define RTAS_HOTPLUG_EVENTS 0x10000000 /* set bit 3 */ | ||
71 | #define RTAS_EVENT_SCAN_ALL_EVENTS 0xf0000000 | ||
72 | |||
73 | /* RTAS event severity */ | ||
74 | #define RTAS_SEVERITY_FATAL 0x5 | ||
75 | #define RTAS_SEVERITY_ERROR 0x4 | ||
76 | #define RTAS_SEVERITY_ERROR_SYNC 0x3 | ||
77 | #define RTAS_SEVERITY_WARNING 0x2 | ||
78 | #define RTAS_SEVERITY_EVENT 0x1 | ||
79 | #define RTAS_SEVERITY_NO_ERROR 0x0 | ||
80 | |||
81 | /* RTAS event disposition */ | ||
82 | #define RTAS_DISP_FULLY_RECOVERED 0x0 | ||
83 | #define RTAS_DISP_LIMITED_RECOVERY 0x1 | ||
84 | #define RTAS_DISP_NOT_RECOVERED 0x2 | ||
85 | |||
86 | /* RTAS event initiator */ | ||
87 | #define RTAS_INITIATOR_UNKNOWN 0x0 | ||
88 | #define RTAS_INITIATOR_CPU 0x1 | ||
89 | #define RTAS_INITIATOR_PCI 0x2 | ||
90 | #define RTAS_INITIATOR_ISA 0x3 | ||
91 | #define RTAS_INITIATOR_MEMORY 0x4 | ||
92 | #define RTAS_INITIATOR_POWERMGM 0x5 | ||
93 | |||
94 | /* RTAS event target */ | ||
95 | #define RTAS_TARGET_UNKNOWN 0x0 | ||
96 | #define RTAS_TARGET_CPU 0x1 | ||
97 | #define RTAS_TARGET_PCI 0x2 | ||
98 | #define RTAS_TARGET_ISA 0x3 | ||
99 | #define RTAS_TARGET_MEMORY 0x4 | ||
100 | #define RTAS_TARGET_POWERMGM 0x5 | ||
101 | |||
102 | /* RTAS event type */ | ||
103 | #define RTAS_TYPE_RETRY 0x01 | ||
104 | #define RTAS_TYPE_TCE_ERR 0x02 | ||
105 | #define RTAS_TYPE_INTERN_DEV_FAIL 0x03 | ||
106 | #define RTAS_TYPE_TIMEOUT 0x04 | ||
107 | #define RTAS_TYPE_DATA_PARITY 0x05 | ||
108 | #define RTAS_TYPE_ADDR_PARITY 0x06 | ||
109 | #define RTAS_TYPE_CACHE_PARITY 0x07 | ||
110 | #define RTAS_TYPE_ADDR_INVALID 0x08 | ||
111 | #define RTAS_TYPE_ECC_UNCORR 0x09 | ||
112 | #define RTAS_TYPE_ECC_CORR 0x0a | ||
113 | #define RTAS_TYPE_EPOW 0x40 | ||
114 | #define RTAS_TYPE_PLATFORM 0xE0 | ||
115 | #define RTAS_TYPE_IO 0xE1 | ||
116 | #define RTAS_TYPE_INFO 0xE2 | ||
117 | #define RTAS_TYPE_DEALLOC 0xE3 | ||
118 | #define RTAS_TYPE_DUMP 0xE4 | ||
119 | /* I don't add PowerMGM events right now, this is a different topic */ | ||
120 | #define RTAS_TYPE_PMGM_POWER_SW_ON 0x60 | ||
121 | #define RTAS_TYPE_PMGM_POWER_SW_OFF 0x61 | ||
122 | #define RTAS_TYPE_PMGM_LID_OPEN 0x62 | ||
123 | #define RTAS_TYPE_PMGM_LID_CLOSE 0x63 | ||
124 | #define RTAS_TYPE_PMGM_SLEEP_BTN 0x64 | ||
125 | #define RTAS_TYPE_PMGM_WAKE_BTN 0x65 | ||
126 | #define RTAS_TYPE_PMGM_BATTERY_WARN 0x66 | ||
127 | #define RTAS_TYPE_PMGM_BATTERY_CRIT 0x67 | ||
128 | #define RTAS_TYPE_PMGM_SWITCH_TO_BAT 0x68 | ||
129 | #define RTAS_TYPE_PMGM_SWITCH_TO_AC 0x69 | ||
130 | #define RTAS_TYPE_PMGM_KBD_OR_MOUSE 0x6a | ||
131 | #define RTAS_TYPE_PMGM_ENCLOS_OPEN 0x6b | ||
132 | #define RTAS_TYPE_PMGM_ENCLOS_CLOSED 0x6c | ||
133 | #define RTAS_TYPE_PMGM_RING_INDICATE 0x6d | ||
134 | #define RTAS_TYPE_PMGM_LAN_ATTENTION 0x6e | ||
135 | #define RTAS_TYPE_PMGM_TIME_ALARM 0x6f | ||
136 | #define RTAS_TYPE_PMGM_CONFIG_CHANGE 0x70 | ||
137 | #define RTAS_TYPE_PMGM_SERVICE_PROC 0x71 | ||
138 | |||
139 | struct rtas_error_log { | ||
140 | unsigned long version:8; /* Architectural version */ | ||
141 | unsigned long severity:3; /* Severity level of error */ | ||
142 | unsigned long disposition:2; /* Degree of recovery */ | ||
143 | unsigned long extended:1; /* extended log present? */ | ||
144 | unsigned long /* reserved */ :2; /* Reserved for future use */ | ||
145 | unsigned long initiator:4; /* Initiator of event */ | ||
146 | unsigned long target:4; /* Target of failed operation */ | ||
147 | unsigned long type:8; /* General event or error*/ | ||
148 | unsigned long extended_log_length:32; /* length in bytes */ | ||
149 | unsigned char buffer[1]; | ||
150 | }; | ||
151 | |||
152 | struct flash_block { | ||
153 | char *data; | ||
154 | unsigned long length; | ||
155 | }; | ||
156 | |||
157 | /* This struct is very similar but not identical to | ||
158 | * that needed by the rtas flash update. | ||
159 | * All we need to do for rtas is rewrite num_blocks | ||
160 | * into a version/length and translate the pointers | ||
161 | * to absolute. | ||
162 | */ | ||
163 | #define FLASH_BLOCKS_PER_NODE ((PAGE_SIZE - 16) / sizeof(struct flash_block)) | ||
164 | struct flash_block_list { | ||
165 | unsigned long num_blocks; | ||
166 | struct flash_block_list *next; | ||
167 | struct flash_block blocks[FLASH_BLOCKS_PER_NODE]; | ||
168 | }; | ||
169 | struct flash_block_list_header { /* just the header of flash_block_list */ | ||
170 | unsigned long num_blocks; | ||
171 | struct flash_block_list *next; | ||
172 | }; | ||
173 | extern struct flash_block_list_header rtas_firmware_flash_list; | ||
174 | |||
175 | extern struct rtas_t rtas; | ||
176 | |||
177 | extern void enter_rtas(unsigned long); | ||
178 | extern int rtas_token(const char *service); | ||
179 | extern int rtas_call(int token, int, int, int *, ...); | ||
180 | extern void call_rtas_display_status(unsigned char); | ||
181 | extern void rtas_restart(char *cmd); | ||
182 | extern void rtas_power_off(void); | ||
183 | extern void rtas_halt(void); | ||
184 | extern void rtas_os_term(char *str); | ||
185 | extern int rtas_get_sensor(int sensor, int index, int *state); | ||
186 | extern int rtas_get_power_level(int powerdomain, int *level); | ||
187 | extern int rtas_set_power_level(int powerdomain, int level, int *setlevel); | ||
188 | extern int rtas_set_indicator(int indicator, int index, int new_value); | ||
189 | extern void rtas_progress(char *s, unsigned short hex); | ||
190 | extern void rtas_initialize(void); | ||
191 | |||
192 | struct rtc_time; | ||
193 | extern void rtas_get_boot_time(struct rtc_time *rtc_time); | ||
194 | extern void rtas_get_rtc_time(struct rtc_time *rtc_time); | ||
195 | extern int rtas_set_rtc_time(struct rtc_time *rtc_time); | ||
196 | |||
197 | /* Given an RTAS status code of 9900..9905 compute the hinted delay */ | ||
198 | unsigned int rtas_extended_busy_delay_time(int status); | ||
199 | static inline int rtas_is_extended_busy(int status) | ||
200 | { | ||
201 | return status >= 9900 && status <= 9909; | ||
202 | } | ||
203 | |||
204 | extern void pSeries_log_error(char *buf, unsigned int err_type, int fatal); | ||
205 | |||
206 | /* Error types logged. */ | ||
207 | #define ERR_FLAG_ALREADY_LOGGED 0x0 | ||
208 | #define ERR_FLAG_BOOT 0x1 /* log was pulled from NVRAM on boot */ | ||
209 | #define ERR_TYPE_RTAS_LOG 0x2 /* from rtas event-scan */ | ||
210 | #define ERR_TYPE_KERNEL_PANIC 0x4 /* from panic() */ | ||
211 | |||
212 | /* All the types and not flags */ | ||
213 | #define ERR_TYPE_MASK (ERR_TYPE_RTAS_LOG | ERR_TYPE_KERNEL_PANIC) | ||
214 | |||
215 | #define RTAS_DEBUG KERN_DEBUG "RTAS: " | ||
216 | |||
217 | #define RTAS_ERROR_LOG_MAX 2048 | ||
218 | |||
219 | /* | ||
220 | * Return the firmware-specified size of the error log buffer | ||
221 | * for all rtas calls that require an error buffer argument. | ||
222 | * This includes 'check-exception' and 'rtas-last-error'. | ||
223 | */ | ||
224 | extern int rtas_get_error_log_max(void); | ||
225 | |||
226 | /* Event Scan Parameters */ | ||
227 | #define EVENT_SCAN_ALL_EVENTS 0xf0000000 | ||
228 | #define SURVEILLANCE_TOKEN 9000 | ||
229 | #define LOG_NUMBER 64 /* must be a power of two */ | ||
230 | #define LOG_NUMBER_MASK (LOG_NUMBER-1) | ||
231 | |||
232 | /* Some RTAS ops require a data buffer and that buffer must be < 4G. | ||
233 | * Rather than having a memory allocator, just use this buffer | ||
234 | * (get the lock first), make the RTAS call. Copy the data instead | ||
235 | * of holding the buffer for long. | ||
236 | */ | ||
237 | |||
238 | #define RTAS_DATA_BUF_SIZE 4096 | ||
239 | extern spinlock_t rtas_data_buf_lock; | ||
240 | extern char rtas_data_buf[RTAS_DATA_BUF_SIZE]; | ||
241 | |||
242 | extern void rtas_stop_self(void); | ||
243 | |||
244 | /* RMO buffer reserved for user-space RTAS use */ | ||
245 | extern unsigned long rtas_rmo_buf; | ||
246 | |||
247 | #define GLOBAL_INTERRUPT_QUEUE 9005 | ||
248 | |||
249 | #endif /* _PPC64_RTAS_H */ | ||
diff --git a/include/asm-ppc64/rwsem.h b/include/asm-ppc64/rwsem.h deleted file mode 100644 index 7a647fae3765..000000000000 --- a/include/asm-ppc64/rwsem.h +++ /dev/null | |||
@@ -1,172 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-ppc64/rwsem.h: R/W semaphores for PPC using the stuff | ||
3 | * in lib/rwsem.c. Adapted largely from include/asm-i386/rwsem.h | ||
4 | * by Paul Mackerras <paulus@samba.org>. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _PPC64_RWSEM_H | ||
13 | #define _PPC64_RWSEM_H | ||
14 | |||
15 | #ifdef __KERNEL__ | ||
16 | #include <linux/list.h> | ||
17 | #include <linux/spinlock.h> | ||
18 | #include <asm/atomic.h> | ||
19 | #include <asm/system.h> | ||
20 | |||
21 | /* | ||
22 | * the semaphore definition | ||
23 | */ | ||
24 | struct rw_semaphore { | ||
25 | /* XXX this should be able to be an atomic_t -- paulus */ | ||
26 | signed int count; | ||
27 | #define RWSEM_UNLOCKED_VALUE 0x00000000 | ||
28 | #define RWSEM_ACTIVE_BIAS 0x00000001 | ||
29 | #define RWSEM_ACTIVE_MASK 0x0000ffff | ||
30 | #define RWSEM_WAITING_BIAS (-0x00010000) | ||
31 | #define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS | ||
32 | #define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS) | ||
33 | spinlock_t wait_lock; | ||
34 | struct list_head wait_list; | ||
35 | #if RWSEM_DEBUG | ||
36 | int debug; | ||
37 | #endif | ||
38 | }; | ||
39 | |||
40 | /* | ||
41 | * initialisation | ||
42 | */ | ||
43 | #if RWSEM_DEBUG | ||
44 | #define __RWSEM_DEBUG_INIT , 0 | ||
45 | #else | ||
46 | #define __RWSEM_DEBUG_INIT /* */ | ||
47 | #endif | ||
48 | |||
49 | #define __RWSEM_INITIALIZER(name) \ | ||
50 | { RWSEM_UNLOCKED_VALUE, SPIN_LOCK_UNLOCKED, \ | ||
51 | LIST_HEAD_INIT((name).wait_list) \ | ||
52 | __RWSEM_DEBUG_INIT } | ||
53 | |||
54 | #define DECLARE_RWSEM(name) \ | ||
55 | struct rw_semaphore name = __RWSEM_INITIALIZER(name) | ||
56 | |||
57 | extern struct rw_semaphore *rwsem_down_read_failed(struct rw_semaphore *sem); | ||
58 | extern struct rw_semaphore *rwsem_down_write_failed(struct rw_semaphore *sem); | ||
59 | extern struct rw_semaphore *rwsem_wake(struct rw_semaphore *sem); | ||
60 | extern struct rw_semaphore *rwsem_downgrade_wake(struct rw_semaphore *sem); | ||
61 | |||
62 | static inline void init_rwsem(struct rw_semaphore *sem) | ||
63 | { | ||
64 | sem->count = RWSEM_UNLOCKED_VALUE; | ||
65 | spin_lock_init(&sem->wait_lock); | ||
66 | INIT_LIST_HEAD(&sem->wait_list); | ||
67 | #if RWSEM_DEBUG | ||
68 | sem->debug = 0; | ||
69 | #endif | ||
70 | } | ||
71 | |||
72 | /* | ||
73 | * lock for reading | ||
74 | */ | ||
75 | static inline void __down_read(struct rw_semaphore *sem) | ||
76 | { | ||
77 | if (unlikely(atomic_inc_return((atomic_t *)(&sem->count)) <= 0)) | ||
78 | rwsem_down_read_failed(sem); | ||
79 | } | ||
80 | |||
81 | static inline int __down_read_trylock(struct rw_semaphore *sem) | ||
82 | { | ||
83 | int tmp; | ||
84 | |||
85 | while ((tmp = sem->count) >= 0) { | ||
86 | if (tmp == cmpxchg(&sem->count, tmp, | ||
87 | tmp + RWSEM_ACTIVE_READ_BIAS)) { | ||
88 | return 1; | ||
89 | } | ||
90 | } | ||
91 | return 0; | ||
92 | } | ||
93 | |||
94 | /* | ||
95 | * lock for writing | ||
96 | */ | ||
97 | static inline void __down_write(struct rw_semaphore *sem) | ||
98 | { | ||
99 | int tmp; | ||
100 | |||
101 | tmp = atomic_add_return(RWSEM_ACTIVE_WRITE_BIAS, | ||
102 | (atomic_t *)(&sem->count)); | ||
103 | if (unlikely(tmp != RWSEM_ACTIVE_WRITE_BIAS)) | ||
104 | rwsem_down_write_failed(sem); | ||
105 | } | ||
106 | |||
107 | static inline int __down_write_trylock(struct rw_semaphore *sem) | ||
108 | { | ||
109 | int tmp; | ||
110 | |||
111 | tmp = cmpxchg(&sem->count, RWSEM_UNLOCKED_VALUE, | ||
112 | RWSEM_ACTIVE_WRITE_BIAS); | ||
113 | return tmp == RWSEM_UNLOCKED_VALUE; | ||
114 | } | ||
115 | |||
116 | /* | ||
117 | * unlock after reading | ||
118 | */ | ||
119 | static inline void __up_read(struct rw_semaphore *sem) | ||
120 | { | ||
121 | int tmp; | ||
122 | |||
123 | tmp = atomic_dec_return((atomic_t *)(&sem->count)); | ||
124 | if (unlikely(tmp < -1 && (tmp & RWSEM_ACTIVE_MASK) == 0)) | ||
125 | rwsem_wake(sem); | ||
126 | } | ||
127 | |||
128 | /* | ||
129 | * unlock after writing | ||
130 | */ | ||
131 | static inline void __up_write(struct rw_semaphore *sem) | ||
132 | { | ||
133 | if (unlikely(atomic_sub_return(RWSEM_ACTIVE_WRITE_BIAS, | ||
134 | (atomic_t *)(&sem->count)) < 0)) | ||
135 | rwsem_wake(sem); | ||
136 | } | ||
137 | |||
138 | /* | ||
139 | * implement atomic add functionality | ||
140 | */ | ||
141 | static inline void rwsem_atomic_add(int delta, struct rw_semaphore *sem) | ||
142 | { | ||
143 | atomic_add(delta, (atomic_t *)(&sem->count)); | ||
144 | } | ||
145 | |||
146 | /* | ||
147 | * downgrade write lock to read lock | ||
148 | */ | ||
149 | static inline void __downgrade_write(struct rw_semaphore *sem) | ||
150 | { | ||
151 | int tmp; | ||
152 | |||
153 | tmp = atomic_add_return(-RWSEM_WAITING_BIAS, (atomic_t *)(&sem->count)); | ||
154 | if (tmp < 0) | ||
155 | rwsem_downgrade_wake(sem); | ||
156 | } | ||
157 | |||
158 | /* | ||
159 | * implement exchange and add functionality | ||
160 | */ | ||
161 | static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem) | ||
162 | { | ||
163 | return atomic_add_return(delta, (atomic_t *)(&sem->count)); | ||
164 | } | ||
165 | |||
166 | static inline int rwsem_is_locked(struct rw_semaphore *sem) | ||
167 | { | ||
168 | return (sem->count != 0); | ||
169 | } | ||
170 | |||
171 | #endif /* __KERNEL__ */ | ||
172 | #endif /* _PPC_RWSEM_XADD_H */ | ||
diff --git a/include/asm-ppc64/scatterlist.h b/include/asm-ppc64/scatterlist.h deleted file mode 100644 index cecce6c6dfbb..000000000000 --- a/include/asm-ppc64/scatterlist.h +++ /dev/null | |||
@@ -1,31 +0,0 @@ | |||
1 | #ifndef _PPC64_SCATTERLIST_H | ||
2 | #define _PPC64_SCATTERLIST_H | ||
3 | |||
4 | /* | ||
5 | * Copyright (C) 2001 PPC64 Team, IBM Corp | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * as published by the Free Software Foundation; either version | ||
10 | * 2 of the License, or (at your option) any later version. | ||
11 | */ | ||
12 | |||
13 | #include <linux/types.h> | ||
14 | #include <asm/dma.h> | ||
15 | |||
16 | struct scatterlist { | ||
17 | struct page *page; | ||
18 | unsigned int offset; | ||
19 | unsigned int length; | ||
20 | |||
21 | /* For TCE support */ | ||
22 | u32 dma_address; | ||
23 | u32 dma_length; | ||
24 | }; | ||
25 | |||
26 | #define sg_dma_address(sg) ((sg)->dma_address) | ||
27 | #define sg_dma_len(sg) ((sg)->dma_length) | ||
28 | |||
29 | #define ISA_DMA_THRESHOLD (~0UL) | ||
30 | |||
31 | #endif /* !(_PPC64_SCATTERLIST_H) */ | ||
diff --git a/include/asm-ppc64/seccomp.h b/include/asm-ppc64/seccomp.h deleted file mode 100644 index c130c334bda1..000000000000 --- a/include/asm-ppc64/seccomp.h +++ /dev/null | |||
@@ -1,21 +0,0 @@ | |||
1 | #ifndef _ASM_SECCOMP_H | ||
2 | |||
3 | #include <linux/thread_info.h> /* already defines TIF_32BIT */ | ||
4 | |||
5 | #ifndef TIF_32BIT | ||
6 | #error "unexpected TIF_32BIT on ppc64" | ||
7 | #endif | ||
8 | |||
9 | #include <linux/unistd.h> | ||
10 | |||
11 | #define __NR_seccomp_read __NR_read | ||
12 | #define __NR_seccomp_write __NR_write | ||
13 | #define __NR_seccomp_exit __NR_exit | ||
14 | #define __NR_seccomp_sigreturn __NR_rt_sigreturn | ||
15 | |||
16 | #define __NR_seccomp_read_32 __NR_read | ||
17 | #define __NR_seccomp_write_32 __NR_write | ||
18 | #define __NR_seccomp_exit_32 __NR_exit | ||
19 | #define __NR_seccomp_sigreturn_32 __NR_sigreturn | ||
20 | |||
21 | #endif /* _ASM_SECCOMP_H */ | ||
diff --git a/include/asm-ppc64/sections.h b/include/asm-ppc64/sections.h deleted file mode 100644 index 308ca6f5ced2..000000000000 --- a/include/asm-ppc64/sections.h +++ /dev/null | |||
@@ -1,29 +0,0 @@ | |||
1 | #ifndef _PPC64_SECTIONS_H | ||
2 | #define _PPC64_SECTIONS_H | ||
3 | |||
4 | extern char _end[]; | ||
5 | |||
6 | #include <asm-generic/sections.h> | ||
7 | |||
8 | #define __pmac | ||
9 | #define __pmacdata | ||
10 | |||
11 | #define __prep | ||
12 | #define __prepdata | ||
13 | |||
14 | #define __chrp | ||
15 | #define __chrpdata | ||
16 | |||
17 | #define __openfirmware | ||
18 | #define __openfirmwaredata | ||
19 | |||
20 | |||
21 | static inline int in_kernel_text(unsigned long addr) | ||
22 | { | ||
23 | if (addr >= (unsigned long)_stext && addr < (unsigned long)__init_end) | ||
24 | return 1; | ||
25 | |||
26 | return 0; | ||
27 | } | ||
28 | |||
29 | #endif | ||
diff --git a/include/asm-ppc64/semaphore.h b/include/asm-ppc64/semaphore.h deleted file mode 100644 index aefe7753ea41..000000000000 --- a/include/asm-ppc64/semaphore.h +++ /dev/null | |||
@@ -1,98 +0,0 @@ | |||
1 | #ifndef _PPC64_SEMAPHORE_H | ||
2 | #define _PPC64_SEMAPHORE_H | ||
3 | |||
4 | /* | ||
5 | * Remove spinlock-based RW semaphores; RW semaphore definitions are | ||
6 | * now in rwsem.h and we use the generic lib/rwsem.c implementation. | ||
7 | * Rework semaphores to use atomic_dec_if_positive. | ||
8 | * -- Paul Mackerras (paulus@samba.org) | ||
9 | */ | ||
10 | |||
11 | #ifdef __KERNEL__ | ||
12 | |||
13 | #include <asm/atomic.h> | ||
14 | #include <asm/system.h> | ||
15 | #include <linux/wait.h> | ||
16 | #include <linux/rwsem.h> | ||
17 | |||
18 | struct semaphore { | ||
19 | /* | ||
20 | * Note that any negative value of count is equivalent to 0, | ||
21 | * but additionally indicates that some process(es) might be | ||
22 | * sleeping on `wait'. | ||
23 | */ | ||
24 | atomic_t count; | ||
25 | wait_queue_head_t wait; | ||
26 | }; | ||
27 | |||
28 | #define __SEMAPHORE_INITIALIZER(name, n) \ | ||
29 | { \ | ||
30 | .count = ATOMIC_INIT(n), \ | ||
31 | .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ | ||
32 | } | ||
33 | |||
34 | #define __MUTEX_INITIALIZER(name) \ | ||
35 | __SEMAPHORE_INITIALIZER(name, 1) | ||
36 | |||
37 | #define __DECLARE_SEMAPHORE_GENERIC(name, count) \ | ||
38 | struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) | ||
39 | |||
40 | #define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name, 1) | ||
41 | #define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name, 0) | ||
42 | |||
43 | static inline void sema_init (struct semaphore *sem, int val) | ||
44 | { | ||
45 | atomic_set(&sem->count, val); | ||
46 | init_waitqueue_head(&sem->wait); | ||
47 | } | ||
48 | |||
49 | static inline void init_MUTEX (struct semaphore *sem) | ||
50 | { | ||
51 | sema_init(sem, 1); | ||
52 | } | ||
53 | |||
54 | static inline void init_MUTEX_LOCKED (struct semaphore *sem) | ||
55 | { | ||
56 | sema_init(sem, 0); | ||
57 | } | ||
58 | |||
59 | extern void __down(struct semaphore * sem); | ||
60 | extern int __down_interruptible(struct semaphore * sem); | ||
61 | extern void __up(struct semaphore * sem); | ||
62 | |||
63 | static inline void down(struct semaphore * sem) | ||
64 | { | ||
65 | might_sleep(); | ||
66 | |||
67 | /* | ||
68 | * Try to get the semaphore, take the slow path if we fail. | ||
69 | */ | ||
70 | if (unlikely(atomic_dec_return(&sem->count) < 0)) | ||
71 | __down(sem); | ||
72 | } | ||
73 | |||
74 | static inline int down_interruptible(struct semaphore * sem) | ||
75 | { | ||
76 | int ret = 0; | ||
77 | |||
78 | might_sleep(); | ||
79 | |||
80 | if (unlikely(atomic_dec_return(&sem->count) < 0)) | ||
81 | ret = __down_interruptible(sem); | ||
82 | return ret; | ||
83 | } | ||
84 | |||
85 | static inline int down_trylock(struct semaphore * sem) | ||
86 | { | ||
87 | return atomic_dec_if_positive(&sem->count) < 0; | ||
88 | } | ||
89 | |||
90 | static inline void up(struct semaphore * sem) | ||
91 | { | ||
92 | if (unlikely(atomic_inc_return(&sem->count) <= 0)) | ||
93 | __up(sem); | ||
94 | } | ||
95 | |||
96 | #endif /* __KERNEL__ */ | ||
97 | |||
98 | #endif /* !(_PPC64_SEMAPHORE_H) */ | ||
diff --git a/include/asm-ppc64/sigcontext.h b/include/asm-ppc64/sigcontext.h deleted file mode 100644 index 6f8aee768c5e..000000000000 --- a/include/asm-ppc64/sigcontext.h +++ /dev/null | |||
@@ -1,47 +0,0 @@ | |||
1 | #ifndef _ASM_PPC64_SIGCONTEXT_H | ||
2 | #define _ASM_PPC64_SIGCONTEXT_H | ||
3 | |||
4 | /* | ||
5 | * This program is free software; you can redistribute it and/or | ||
6 | * modify it under the terms of the GNU General Public License | ||
7 | * as published by the Free Software Foundation; either version | ||
8 | * 2 of the License, or (at your option) any later version. | ||
9 | */ | ||
10 | #include <linux/compiler.h> | ||
11 | #include <asm/ptrace.h> | ||
12 | #include <asm/elf.h> | ||
13 | |||
14 | |||
15 | struct sigcontext { | ||
16 | unsigned long _unused[4]; | ||
17 | int signal; | ||
18 | int _pad0; | ||
19 | unsigned long handler; | ||
20 | unsigned long oldmask; | ||
21 | struct pt_regs __user *regs; | ||
22 | elf_gregset_t gp_regs; | ||
23 | elf_fpregset_t fp_regs; | ||
24 | /* | ||
25 | * To maintain compatibility with current implementations the sigcontext is | ||
26 | * extended by appending a pointer (v_regs) to a quadword type (elf_vrreg_t) | ||
27 | * followed by an unstructured (vmx_reserve) field of 69 doublewords. This | ||
28 | * allows the array of vector registers to be quadword aligned independent of | ||
29 | * the alignment of the containing sigcontext or ucontext. It is the | ||
30 | * responsibility of the code setting the sigcontext to set this pointer to | ||
31 | * either NULL (if this processor does not support the VMX feature) or the | ||
32 | * address of the first quadword within the allocated (vmx_reserve) area. | ||
33 | * | ||
34 | * The pointer (v_regs) of vector type (elf_vrreg_t) is type compatible with | ||
35 | * an array of 34 quadword entries (elf_vrregset_t). The entries with | ||
36 | * indexes 0-31 contain the corresponding vector registers. The entry with | ||
37 | * index 32 contains the vscr as the last word (offset 12) within the | ||
38 | * quadword. This allows the vscr to be stored as either a quadword (since | ||
39 | * it must be copied via a vector register to/from storage) or as a word. | ||
40 | * The entry with index 33 contains the vrsave as the first word (offset 0) | ||
41 | * within the quadword. | ||
42 | */ | ||
43 | elf_vrreg_t __user *v_regs; | ||
44 | long vmx_reserve[ELF_NVRREG+ELF_NVRREG+1]; | ||
45 | }; | ||
46 | |||
47 | #endif /* _ASM_PPC64_SIGCONTEXT_H */ | ||
diff --git a/include/asm-ppc64/smp.h b/include/asm-ppc64/smp.h deleted file mode 100644 index d86f742e9a21..000000000000 --- a/include/asm-ppc64/smp.h +++ /dev/null | |||
@@ -1,99 +0,0 @@ | |||
1 | /* | ||
2 | * smp.h: PPC64 specific SMP code. | ||
3 | * | ||
4 | * Original was a copy of sparc smp.h. Now heavily modified | ||
5 | * for PPC. | ||
6 | * | ||
7 | * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) | ||
8 | * Copyright (C) 1996-2001 Cort Dougan <cort@fsmlabs.com> | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or | ||
11 | * modify it under the terms of the GNU General Public License | ||
12 | * as published by the Free Software Foundation; either version | ||
13 | * 2 of the License, or (at your option) any later version. | ||
14 | */ | ||
15 | |||
16 | #ifdef __KERNEL__ | ||
17 | #ifndef _PPC64_SMP_H | ||
18 | #define _PPC64_SMP_H | ||
19 | |||
20 | #include <linux/config.h> | ||
21 | #include <linux/threads.h> | ||
22 | #include <linux/cpumask.h> | ||
23 | #include <linux/kernel.h> | ||
24 | |||
25 | #ifndef __ASSEMBLY__ | ||
26 | |||
27 | #include <asm/paca.h> | ||
28 | |||
29 | extern int boot_cpuid; | ||
30 | extern int boot_cpuid_phys; | ||
31 | |||
32 | extern void cpu_die(void); | ||
33 | |||
34 | #ifdef CONFIG_SMP | ||
35 | |||
36 | extern void smp_send_debugger_break(int cpu); | ||
37 | struct pt_regs; | ||
38 | extern void smp_message_recv(int, struct pt_regs *); | ||
39 | |||
40 | #ifdef CONFIG_HOTPLUG_CPU | ||
41 | extern void fixup_irqs(cpumask_t map); | ||
42 | int generic_cpu_disable(void); | ||
43 | int generic_cpu_enable(unsigned int cpu); | ||
44 | void generic_cpu_die(unsigned int cpu); | ||
45 | void generic_mach_cpu_die(void); | ||
46 | #endif | ||
47 | |||
48 | #define raw_smp_processor_id() (get_paca()->paca_index) | ||
49 | #define hard_smp_processor_id() (get_paca()->hw_cpu_id) | ||
50 | |||
51 | extern cpumask_t cpu_sibling_map[NR_CPUS]; | ||
52 | |||
53 | /* Since OpenPIC has only 4 IPIs, we use slightly different message numbers. | ||
54 | * | ||
55 | * Make sure this matches openpic_request_IPIs in open_pic.c, or what shows up | ||
56 | * in /proc/interrupts will be wrong!!! --Troy */ | ||
57 | #define PPC_MSG_CALL_FUNCTION 0 | ||
58 | #define PPC_MSG_RESCHEDULE 1 | ||
59 | /* This is unused now */ | ||
60 | #if 0 | ||
61 | #define PPC_MSG_MIGRATE_TASK 2 | ||
62 | #endif | ||
63 | #define PPC_MSG_DEBUGGER_BREAK 3 | ||
64 | |||
65 | void smp_init_iSeries(void); | ||
66 | void smp_init_pSeries(void); | ||
67 | |||
68 | extern int __cpu_disable(void); | ||
69 | extern void __cpu_die(unsigned int cpu); | ||
70 | #endif /* CONFIG_SMP */ | ||
71 | |||
72 | #define get_hard_smp_processor_id(CPU) (paca[(CPU)].hw_cpu_id) | ||
73 | #define set_hard_smp_processor_id(CPU, VAL) \ | ||
74 | do { (paca[(CPU)].hw_cpu_id = (VAL)); } while (0) | ||
75 | |||
76 | extern int smt_enabled_at_boot; | ||
77 | |||
78 | extern int smp_mpic_probe(void); | ||
79 | extern void smp_mpic_setup_cpu(int cpu); | ||
80 | extern void smp_mpic_message_pass(int target, int msg); | ||
81 | extern void smp_generic_kick_cpu(int nr); | ||
82 | |||
83 | extern void smp_generic_give_timebase(void); | ||
84 | extern void smp_generic_take_timebase(void); | ||
85 | |||
86 | extern struct smp_ops_t *smp_ops; | ||
87 | |||
88 | #ifdef CONFIG_PPC_PSERIES | ||
89 | void vpa_init(int cpu); | ||
90 | #else | ||
91 | static inline void vpa_init(int cpu) | ||
92 | { | ||
93 | } | ||
94 | #endif /* CONFIG_PPC_PSERIES */ | ||
95 | |||
96 | #endif /* __ASSEMBLY__ */ | ||
97 | |||
98 | #endif /* !(_PPC64_SMP_H) */ | ||
99 | #endif /* __KERNEL__ */ | ||
diff --git a/include/asm-ppc64/smu.h b/include/asm-ppc64/smu.h deleted file mode 100644 index dee8eefe47bc..000000000000 --- a/include/asm-ppc64/smu.h +++ /dev/null | |||
@@ -1,379 +0,0 @@ | |||
1 | #ifndef _SMU_H | ||
2 | #define _SMU_H | ||
3 | |||
4 | /* | ||
5 | * Definitions for talking to the SMU chip in newer G5 PowerMacs | ||
6 | */ | ||
7 | |||
8 | #include <linux/config.h> | ||
9 | #include <linux/list.h> | ||
10 | |||
11 | /* | ||
12 | * Known SMU commands | ||
13 | * | ||
14 | * Most of what is below comes from looking at the Open Firmware driver, | ||
15 | * though this is still incomplete and could use better documentation here | ||
16 | * or there... | ||
17 | */ | ||
18 | |||
19 | |||
20 | /* | ||
21 | * Partition info commands | ||
22 | * | ||
23 | * I do not know what those are for at this point | ||
24 | */ | ||
25 | #define SMU_CMD_PARTITION_COMMAND 0x3e | ||
26 | |||
27 | |||
28 | /* | ||
29 | * Fan control | ||
30 | * | ||
31 | * This is a "mux" for fan control commands, first byte is the | ||
32 | * "sub" command. | ||
33 | */ | ||
34 | #define SMU_CMD_FAN_COMMAND 0x4a | ||
35 | |||
36 | |||
37 | /* | ||
38 | * Battery access | ||
39 | * | ||
40 | * Same command number as the PMU, could it be same syntax ? | ||
41 | */ | ||
42 | #define SMU_CMD_BATTERY_COMMAND 0x6f | ||
43 | #define SMU_CMD_GET_BATTERY_INFO 0x00 | ||
44 | |||
45 | /* | ||
46 | * Real time clock control | ||
47 | * | ||
48 | * This is a "mux", first data byte contains the "sub" command. | ||
49 | * The "RTC" part of the SMU controls the date, time, powerup | ||
50 | * timer, but also a PRAM | ||
51 | * | ||
52 | * Dates are in BCD format on 7 bytes: | ||
53 | * [sec] [min] [hour] [weekday] [month day] [month] [year] | ||
54 | * with month being 1 based and year minus 100 | ||
55 | */ | ||
56 | #define SMU_CMD_RTC_COMMAND 0x8e | ||
57 | #define SMU_CMD_RTC_SET_PWRUP_TIMER 0x00 /* i: 7 bytes date */ | ||
58 | #define SMU_CMD_RTC_GET_PWRUP_TIMER 0x01 /* o: 7 bytes date */ | ||
59 | #define SMU_CMD_RTC_STOP_PWRUP_TIMER 0x02 | ||
60 | #define SMU_CMD_RTC_SET_PRAM_BYTE_ACC 0x20 /* i: 1 byte (address?) */ | ||
61 | #define SMU_CMD_RTC_SET_PRAM_AUTOINC 0x21 /* i: 1 byte (data?) */ | ||
62 | #define SMU_CMD_RTC_SET_PRAM_LO_BYTES 0x22 /* i: 10 bytes */ | ||
63 | #define SMU_CMD_RTC_SET_PRAM_HI_BYTES 0x23 /* i: 10 bytes */ | ||
64 | #define SMU_CMD_RTC_GET_PRAM_BYTE 0x28 /* i: 1 bytes (address?) */ | ||
65 | #define SMU_CMD_RTC_GET_PRAM_LO_BYTES 0x29 /* o: 10 bytes */ | ||
66 | #define SMU_CMD_RTC_GET_PRAM_HI_BYTES 0x2a /* o: 10 bytes */ | ||
67 | #define SMU_CMD_RTC_SET_DATETIME 0x80 /* i: 7 bytes date */ | ||
68 | #define SMU_CMD_RTC_GET_DATETIME 0x81 /* o: 7 bytes date */ | ||
69 | |||
70 | /* | ||
71 | * i2c commands | ||
72 | * | ||
73 | * To issue an i2c command, first is to send a parameter block to the | ||
74 | * the SMU. This is a command of type 0x9a with 9 bytes of header | ||
75 | * eventually followed by data for a write: | ||
76 | * | ||
77 | * 0: bus number (from device-tree usually, SMU has lots of busses !) | ||
78 | * 1: transfer type/format (see below) | ||
79 | * 2: device address. For combined and combined4 type transfers, this | ||
80 | * is the "write" version of the address (bit 0x01 cleared) | ||
81 | * 3: subaddress length (0..3) | ||
82 | * 4: subaddress byte 0 (or only byte for subaddress length 1) | ||
83 | * 5: subaddress byte 1 | ||
84 | * 6: subaddress byte 2 | ||
85 | * 7: combined address (device address for combined mode data phase) | ||
86 | * 8: data length | ||
87 | * | ||
88 | * The transfer types are the same good old Apple ones it seems, | ||
89 | * that is: | ||
90 | * - 0x00: Simple transfer | ||
91 | * - 0x01: Subaddress transfer (addr write + data tx, no restart) | ||
92 | * - 0x02: Combined transfer (addr write + restart + data tx) | ||
93 | * | ||
94 | * This is then followed by actual data for a write. | ||
95 | * | ||
96 | * At this point, the OF driver seems to have a limitation on transfer | ||
97 | * sizes of 0xd bytes on reads and 0x5 bytes on writes. I do not know | ||
98 | * wether this is just an OF limit due to some temporary buffer size | ||
99 | * or if this is an SMU imposed limit. This driver has the same limitation | ||
100 | * for now as I use a 0x10 bytes temporary buffer as well | ||
101 | * | ||
102 | * Once that is completed, a response is expected from the SMU. This is | ||
103 | * obtained via a command of type 0x9a with a length of 1 byte containing | ||
104 | * 0 as the data byte. OF also fills the rest of the data buffer with 0xff's | ||
105 | * though I can't tell yet if this is actually necessary. Once this command | ||
106 | * is complete, at this point, all I can tell is what OF does. OF tests | ||
107 | * byte 0 of the reply: | ||
108 | * - on read, 0xfe or 0xfc : bus is busy, wait (see below) or nak ? | ||
109 | * - on read, 0x00 or 0x01 : reply is in buffer (after the byte 0) | ||
110 | * - on write, < 0 -> failure (immediate exit) | ||
111 | * - else, OF just exists (without error, weird) | ||
112 | * | ||
113 | * So on read, there is this wait-for-busy thing when getting a 0xfc or | ||
114 | * 0xfe result. OF does a loop of up to 64 retries, waiting 20ms and | ||
115 | * doing the above again until either the retries expire or the result | ||
116 | * is no longer 0xfe or 0xfc | ||
117 | * | ||
118 | * The Darwin I2C driver is less subtle though. On any non-success status | ||
119 | * from the response command, it waits 5ms and tries again up to 20 times, | ||
120 | * it doesn't differenciate between fatal errors or "busy" status. | ||
121 | * | ||
122 | * This driver provides an asynchronous paramblock based i2c command | ||
123 | * interface to be used either directly by low level code or by a higher | ||
124 | * level driver interfacing to the linux i2c layer. The current | ||
125 | * implementation of this relies on working timers & timer interrupts | ||
126 | * though, so be careful of calling context for now. This may be "fixed" | ||
127 | * in the future by adding a polling facility. | ||
128 | */ | ||
129 | #define SMU_CMD_I2C_COMMAND 0x9a | ||
130 | /* transfer types */ | ||
131 | #define SMU_I2C_TRANSFER_SIMPLE 0x00 | ||
132 | #define SMU_I2C_TRANSFER_STDSUB 0x01 | ||
133 | #define SMU_I2C_TRANSFER_COMBINED 0x02 | ||
134 | |||
135 | /* | ||
136 | * Power supply control | ||
137 | * | ||
138 | * The "sub" command is an ASCII string in the data, the | ||
139 | * data lenght is that of the string. | ||
140 | * | ||
141 | * The VSLEW command can be used to get or set the voltage slewing. | ||
142 | * - lenght 5 (only "VSLEW") : it returns "DONE" and 3 bytes of | ||
143 | * reply at data offset 6, 7 and 8. | ||
144 | * - lenght 8 ("VSLEWxyz") has 3 additional bytes appended, and is | ||
145 | * used to set the voltage slewing point. The SMU replies with "DONE" | ||
146 | * I yet have to figure out their exact meaning of those 3 bytes in | ||
147 | * both cases. | ||
148 | * | ||
149 | */ | ||
150 | #define SMU_CMD_POWER_COMMAND 0xaa | ||
151 | #define SMU_CMD_POWER_RESTART "RESTART" | ||
152 | #define SMU_CMD_POWER_SHUTDOWN "SHUTDOWN" | ||
153 | #define SMU_CMD_POWER_VOLTAGE_SLEW "VSLEW" | ||
154 | |||
155 | /* Misc commands | ||
156 | * | ||
157 | * This command seem to be a grab bag of various things | ||
158 | */ | ||
159 | #define SMU_CMD_MISC_df_COMMAND 0xdf | ||
160 | #define SMU_CMD_MISC_df_SET_DISPLAY_LIT 0x02 /* i: 1 byte */ | ||
161 | #define SMU_CMD_MISC_df_NMI_OPTION 0x04 | ||
162 | |||
163 | /* | ||
164 | * Version info commands | ||
165 | * | ||
166 | * I haven't quite tried to figure out how these work | ||
167 | */ | ||
168 | #define SMU_CMD_VERSION_COMMAND 0xea | ||
169 | |||
170 | |||
171 | /* | ||
172 | * Misc commands | ||
173 | * | ||
174 | * This command seem to be a grab bag of various things | ||
175 | */ | ||
176 | #define SMU_CMD_MISC_ee_COMMAND 0xee | ||
177 | #define SMU_CMD_MISC_ee_GET_DATABLOCK_REC 0x02 | ||
178 | #define SMU_CMD_MISC_ee_LEDS_CTRL 0x04 /* i: 00 (00,01) [00] */ | ||
179 | #define SMU_CMD_MISC_ee_GET_DATA 0x05 /* i: 00 , o: ?? */ | ||
180 | |||
181 | |||
182 | |||
183 | /* | ||
184 | * - Kernel side interface - | ||
185 | */ | ||
186 | |||
187 | #ifdef __KERNEL__ | ||
188 | |||
189 | /* | ||
190 | * Asynchronous SMU commands | ||
191 | * | ||
192 | * Fill up this structure and submit it via smu_queue_command(), | ||
193 | * and get notified by the optional done() callback, or because | ||
194 | * status becomes != 1 | ||
195 | */ | ||
196 | |||
197 | struct smu_cmd; | ||
198 | |||
199 | struct smu_cmd | ||
200 | { | ||
201 | /* public */ | ||
202 | u8 cmd; /* command */ | ||
203 | int data_len; /* data len */ | ||
204 | int reply_len; /* reply len */ | ||
205 | void *data_buf; /* data buffer */ | ||
206 | void *reply_buf; /* reply buffer */ | ||
207 | int status; /* command status */ | ||
208 | void (*done)(struct smu_cmd *cmd, void *misc); | ||
209 | void *misc; | ||
210 | |||
211 | /* private */ | ||
212 | struct list_head link; | ||
213 | }; | ||
214 | |||
215 | /* | ||
216 | * Queues an SMU command, all fields have to be initialized | ||
217 | */ | ||
218 | extern int smu_queue_cmd(struct smu_cmd *cmd); | ||
219 | |||
220 | /* | ||
221 | * Simple command wrapper. This structure embeds a small buffer | ||
222 | * to ease sending simple SMU commands from the stack | ||
223 | */ | ||
224 | struct smu_simple_cmd | ||
225 | { | ||
226 | struct smu_cmd cmd; | ||
227 | u8 buffer[16]; | ||
228 | }; | ||
229 | |||
230 | /* | ||
231 | * Queues a simple command. All fields will be initialized by that | ||
232 | * function | ||
233 | */ | ||
234 | extern int smu_queue_simple(struct smu_simple_cmd *scmd, u8 command, | ||
235 | unsigned int data_len, | ||
236 | void (*done)(struct smu_cmd *cmd, void *misc), | ||
237 | void *misc, | ||
238 | ...); | ||
239 | |||
240 | /* | ||
241 | * Completion helper. Pass it to smu_queue_simple or as 'done' | ||
242 | * member to smu_queue_cmd, it will call complete() on the struct | ||
243 | * completion passed in the "misc" argument | ||
244 | */ | ||
245 | extern void smu_done_complete(struct smu_cmd *cmd, void *misc); | ||
246 | |||
247 | /* | ||
248 | * Synchronous helpers. Will spin-wait for completion of a command | ||
249 | */ | ||
250 | extern void smu_spinwait_cmd(struct smu_cmd *cmd); | ||
251 | |||
252 | static inline void smu_spinwait_simple(struct smu_simple_cmd *scmd) | ||
253 | { | ||
254 | smu_spinwait_cmd(&scmd->cmd); | ||
255 | } | ||
256 | |||
257 | /* | ||
258 | * Poll routine to call if blocked with irqs off | ||
259 | */ | ||
260 | extern void smu_poll(void); | ||
261 | |||
262 | |||
263 | /* | ||
264 | * Init routine, presence check.... | ||
265 | */ | ||
266 | extern int smu_init(void); | ||
267 | extern int smu_present(void); | ||
268 | struct of_device; | ||
269 | extern struct of_device *smu_get_ofdev(void); | ||
270 | |||
271 | |||
272 | /* | ||
273 | * Common command wrappers | ||
274 | */ | ||
275 | extern void smu_shutdown(void); | ||
276 | extern void smu_restart(void); | ||
277 | struct rtc_time; | ||
278 | extern int smu_get_rtc_time(struct rtc_time *time, int spinwait); | ||
279 | extern int smu_set_rtc_time(struct rtc_time *time, int spinwait); | ||
280 | |||
281 | /* | ||
282 | * SMU command buffer absolute address, exported by pmac_setup, | ||
283 | * this is allocated very early during boot. | ||
284 | */ | ||
285 | extern unsigned long smu_cmdbuf_abs; | ||
286 | |||
287 | |||
288 | /* | ||
289 | * Kenrel asynchronous i2c interface | ||
290 | */ | ||
291 | |||
292 | /* SMU i2c header, exactly matches i2c header on wire */ | ||
293 | struct smu_i2c_param | ||
294 | { | ||
295 | u8 bus; /* SMU bus ID (from device tree) */ | ||
296 | u8 type; /* i2c transfer type */ | ||
297 | u8 devaddr; /* device address (includes direction) */ | ||
298 | u8 sublen; /* subaddress length */ | ||
299 | u8 subaddr[3]; /* subaddress */ | ||
300 | u8 caddr; /* combined address, filled by SMU driver */ | ||
301 | u8 datalen; /* length of transfer */ | ||
302 | u8 data[7]; /* data */ | ||
303 | }; | ||
304 | |||
305 | #define SMU_I2C_READ_MAX 0x0d | ||
306 | #define SMU_I2C_WRITE_MAX 0x05 | ||
307 | |||
308 | struct smu_i2c_cmd | ||
309 | { | ||
310 | /* public */ | ||
311 | struct smu_i2c_param info; | ||
312 | void (*done)(struct smu_i2c_cmd *cmd, void *misc); | ||
313 | void *misc; | ||
314 | int status; /* 1 = pending, 0 = ok, <0 = fail */ | ||
315 | |||
316 | /* private */ | ||
317 | struct smu_cmd scmd; | ||
318 | int read; | ||
319 | int stage; | ||
320 | int retries; | ||
321 | u8 pdata[0x10]; | ||
322 | struct list_head link; | ||
323 | }; | ||
324 | |||
325 | /* | ||
326 | * Call this to queue an i2c command to the SMU. You must fill info, | ||
327 | * including info.data for a write, done and misc. | ||
328 | * For now, no polling interface is provided so you have to use completion | ||
329 | * callback. | ||
330 | */ | ||
331 | extern int smu_queue_i2c(struct smu_i2c_cmd *cmd); | ||
332 | |||
333 | |||
334 | #endif /* __KERNEL__ */ | ||
335 | |||
336 | /* | ||
337 | * - Userland interface - | ||
338 | */ | ||
339 | |||
340 | /* | ||
341 | * A given instance of the device can be configured for 2 different | ||
342 | * things at the moment: | ||
343 | * | ||
344 | * - sending SMU commands (default at open() time) | ||
345 | * - receiving SMU events (not yet implemented) | ||
346 | * | ||
347 | * Commands are written with write() of a command block. They can be | ||
348 | * "driver" commands (for example to switch to event reception mode) | ||
349 | * or real SMU commands. They are made of a header followed by command | ||
350 | * data if any. | ||
351 | * | ||
352 | * For SMU commands (not for driver commands), you can then read() back | ||
353 | * a reply. The reader will be blocked or not depending on how the device | ||
354 | * file is opened. poll() isn't implemented yet. The reply will consist | ||
355 | * of a header as well, followed by the reply data if any. You should | ||
356 | * always provide a buffer large enough for the maximum reply data, I | ||
357 | * recommand one page. | ||
358 | * | ||
359 | * It is illegal to send SMU commands through a file descriptor configured | ||
360 | * for events reception | ||
361 | * | ||
362 | */ | ||
363 | struct smu_user_cmd_hdr | ||
364 | { | ||
365 | __u32 cmdtype; | ||
366 | #define SMU_CMDTYPE_SMU 0 /* SMU command */ | ||
367 | #define SMU_CMDTYPE_WANTS_EVENTS 1 /* switch fd to events mode */ | ||
368 | |||
369 | __u8 cmd; /* SMU command byte */ | ||
370 | __u32 data_len; /* Lenght of data following */ | ||
371 | }; | ||
372 | |||
373 | struct smu_user_reply_hdr | ||
374 | { | ||
375 | __u32 status; /* Command status */ | ||
376 | __u32 reply_len; /* Lenght of data follwing */ | ||
377 | }; | ||
378 | |||
379 | #endif /* _SMU_H */ | ||
diff --git a/include/asm-ppc64/sparsemem.h b/include/asm-ppc64/sparsemem.h deleted file mode 100644 index c5bd47e57f17..000000000000 --- a/include/asm-ppc64/sparsemem.h +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | #ifndef _ASM_PPC64_SPARSEMEM_H | ||
2 | #define _ASM_PPC64_SPARSEMEM_H 1 | ||
3 | |||
4 | #ifdef CONFIG_SPARSEMEM | ||
5 | /* | ||
6 | * SECTION_SIZE_BITS 2^N: how big each section will be | ||
7 | * MAX_PHYSADDR_BITS 2^N: how much physical address space we have | ||
8 | * MAX_PHYSMEM_BITS 2^N: how much memory we can have in that space | ||
9 | */ | ||
10 | #define SECTION_SIZE_BITS 24 | ||
11 | #define MAX_PHYSADDR_BITS 38 | ||
12 | #define MAX_PHYSMEM_BITS 36 | ||
13 | |||
14 | #endif /* CONFIG_SPARSEMEM */ | ||
15 | |||
16 | #endif /* _ASM_PPC64_SPARSEMEM_H */ | ||
diff --git a/include/asm-ppc64/spinlock.h b/include/asm-ppc64/spinlock.h index 14cb895bb607..7d84fb5e39f1 100644 --- a/include/asm-ppc64/spinlock.h +++ b/include/asm-ppc64/spinlock.h | |||
@@ -21,7 +21,7 @@ | |||
21 | #include <linux/config.h> | 21 | #include <linux/config.h> |
22 | #include <asm/paca.h> | 22 | #include <asm/paca.h> |
23 | #include <asm/hvcall.h> | 23 | #include <asm/hvcall.h> |
24 | #include <asm/iSeries/HvCall.h> | 24 | #include <asm/iseries/hv_call.h> |
25 | 25 | ||
26 | #define __raw_spin_is_locked(x) ((x)->slock != 0) | 26 | #define __raw_spin_is_locked(x) ((x)->slock != 0) |
27 | 27 | ||
diff --git a/include/asm-ppc64/spinlock_types.h b/include/asm-ppc64/spinlock_types.h deleted file mode 100644 index a37c8eabb9f2..000000000000 --- a/include/asm-ppc64/spinlock_types.h +++ /dev/null | |||
@@ -1,20 +0,0 @@ | |||
1 | #ifndef __ASM_SPINLOCK_TYPES_H | ||
2 | #define __ASM_SPINLOCK_TYPES_H | ||
3 | |||
4 | #ifndef __LINUX_SPINLOCK_TYPES_H | ||
5 | # error "please don't include this file directly" | ||
6 | #endif | ||
7 | |||
8 | typedef struct { | ||
9 | volatile unsigned int slock; | ||
10 | } raw_spinlock_t; | ||
11 | |||
12 | #define __RAW_SPIN_LOCK_UNLOCKED { 0 } | ||
13 | |||
14 | typedef struct { | ||
15 | volatile signed int lock; | ||
16 | } raw_rwlock_t; | ||
17 | |||
18 | #define __RAW_RW_LOCK_UNLOCKED { 0 } | ||
19 | |||
20 | #endif | ||
diff --git a/include/asm-ppc64/sstep.h b/include/asm-ppc64/sstep.h deleted file mode 100644 index 4a68db50ee6f..000000000000 --- a/include/asm-ppc64/sstep.h +++ /dev/null | |||
@@ -1,24 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004 Paul Mackerras <paulus@au.ibm.com>, IBM | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or | ||
5 | * modify it under the terms of the GNU General Public License | ||
6 | * as published by the Free Software Foundation; either version | ||
7 | * 2 of the License, or (at your option) any later version. | ||
8 | */ | ||
9 | |||
10 | struct pt_regs; | ||
11 | |||
12 | /* | ||
13 | * We don't allow single-stepping an mtmsrd that would clear | ||
14 | * MSR_RI, since that would make the exception unrecoverable. | ||
15 | * Since we need to single-step to proceed from a breakpoint, | ||
16 | * we don't allow putting a breakpoint on an mtmsrd instruction. | ||
17 | * Similarly we don't allow breakpoints on rfid instructions. | ||
18 | * These macros tell us if an instruction is a mtmsrd or rfid. | ||
19 | */ | ||
20 | #define IS_MTMSRD(instr) (((instr) & 0xfc0007fe) == 0x7c000164) | ||
21 | #define IS_RFID(instr) (((instr) & 0xfc0007fe) == 0x4c000024) | ||
22 | |||
23 | /* Emulate instructions that cause a transfer of control. */ | ||
24 | extern int emulate_step(struct pt_regs *regs, unsigned int instr); | ||
diff --git a/include/asm-ppc64/stat.h b/include/asm-ppc64/stat.h deleted file mode 100644 index 973a5f97951d..000000000000 --- a/include/asm-ppc64/stat.h +++ /dev/null | |||
@@ -1,60 +0,0 @@ | |||
1 | #ifndef _PPC64_STAT_H | ||
2 | #define _PPC64_STAT_H | ||
3 | |||
4 | /* | ||
5 | * This program is free software; you can redistribute it and/or | ||
6 | * modify it under the terms of the GNU General Public License | ||
7 | * as published by the Free Software Foundation; either version | ||
8 | * 2 of the License, or (at your option) any later version. | ||
9 | */ | ||
10 | |||
11 | #include <linux/types.h> | ||
12 | |||
13 | struct stat { | ||
14 | unsigned long st_dev; | ||
15 | ino_t st_ino; | ||
16 | nlink_t st_nlink; | ||
17 | mode_t st_mode; | ||
18 | uid_t st_uid; | ||
19 | gid_t st_gid; | ||
20 | unsigned long st_rdev; | ||
21 | off_t st_size; | ||
22 | unsigned long st_blksize; | ||
23 | unsigned long st_blocks; | ||
24 | unsigned long st_atime; | ||
25 | unsigned long st_atime_nsec; | ||
26 | unsigned long st_mtime; | ||
27 | unsigned long st_mtime_nsec; | ||
28 | unsigned long st_ctime; | ||
29 | unsigned long st_ctime_nsec; | ||
30 | unsigned long __unused4; | ||
31 | unsigned long __unused5; | ||
32 | unsigned long __unused6; | ||
33 | }; | ||
34 | |||
35 | #define STAT_HAVE_NSEC 1 | ||
36 | |||
37 | /* This matches struct stat64 in glibc2.1. Only used for 32 bit. */ | ||
38 | struct stat64 { | ||
39 | unsigned long st_dev; /* Device. */ | ||
40 | unsigned long st_ino; /* File serial number. */ | ||
41 | unsigned int st_mode; /* File mode. */ | ||
42 | unsigned int st_nlink; /* Link count. */ | ||
43 | unsigned int st_uid; /* User ID of the file's owner. */ | ||
44 | unsigned int st_gid; /* Group ID of the file's group. */ | ||
45 | unsigned long st_rdev; /* Device number, if device. */ | ||
46 | unsigned short __pad2; | ||
47 | long st_size; /* Size of file, in bytes. */ | ||
48 | int st_blksize; /* Optimal block size for I/O. */ | ||
49 | |||
50 | long st_blocks; /* Number 512-byte blocks allocated. */ | ||
51 | int st_atime; /* Time of last access. */ | ||
52 | int st_atime_nsec; | ||
53 | int st_mtime; /* Time of last modification. */ | ||
54 | int st_mtime_nsec; | ||
55 | int st_ctime; /* Time of last status change. */ | ||
56 | int st_ctime_nsec; | ||
57 | unsigned int __unused4; | ||
58 | unsigned int __unused5; | ||
59 | }; | ||
60 | #endif | ||
diff --git a/include/asm-ppc64/statfs.h b/include/asm-ppc64/statfs.h deleted file mode 100644 index 3c985e5246a7..000000000000 --- a/include/asm-ppc64/statfs.h +++ /dev/null | |||
@@ -1,61 +0,0 @@ | |||
1 | #ifndef _PPC64_STATFS_H | ||
2 | #define _PPC64_STATFS_H | ||
3 | |||
4 | /* | ||
5 | * This program is free software; you can redistribute it and/or | ||
6 | * modify it under the terms of the GNU General Public License | ||
7 | * as published by the Free Software Foundation; either version | ||
8 | * 2 of the License, or (at your option) any later version. | ||
9 | */ | ||
10 | |||
11 | #ifndef __KERNEL_STRICT_NAMES | ||
12 | #include <linux/types.h> | ||
13 | typedef __kernel_fsid_t fsid_t; | ||
14 | #endif | ||
15 | |||
16 | /* | ||
17 | * We're already 64-bit, so duplicate the definition | ||
18 | */ | ||
19 | struct statfs { | ||
20 | long f_type; | ||
21 | long f_bsize; | ||
22 | long f_blocks; | ||
23 | long f_bfree; | ||
24 | long f_bavail; | ||
25 | long f_files; | ||
26 | long f_ffree; | ||
27 | __kernel_fsid_t f_fsid; | ||
28 | long f_namelen; | ||
29 | long f_frsize; | ||
30 | long f_spare[5]; | ||
31 | }; | ||
32 | |||
33 | struct statfs64 { | ||
34 | long f_type; | ||
35 | long f_bsize; | ||
36 | long f_blocks; | ||
37 | long f_bfree; | ||
38 | long f_bavail; | ||
39 | long f_files; | ||
40 | long f_ffree; | ||
41 | __kernel_fsid_t f_fsid; | ||
42 | long f_namelen; | ||
43 | long f_frsize; | ||
44 | long f_spare[5]; | ||
45 | }; | ||
46 | |||
47 | struct compat_statfs64 { | ||
48 | __u32 f_type; | ||
49 | __u32 f_bsize; | ||
50 | __u64 f_blocks; | ||
51 | __u64 f_bfree; | ||
52 | __u64 f_bavail; | ||
53 | __u64 f_files; | ||
54 | __u64 f_ffree; | ||
55 | __kernel_fsid_t f_fsid; | ||
56 | __u32 f_namelen; | ||
57 | __u32 f_frsize; | ||
58 | __u32 f_spare[5]; | ||
59 | }; | ||
60 | |||
61 | #endif /* _PPC64_STATFS_H */ | ||
diff --git a/include/asm-ppc64/system.h b/include/asm-ppc64/system.h index 375015c62f20..99b8ca52f101 100644 --- a/include/asm-ppc64/system.h +++ b/include/asm-ppc64/system.h | |||
@@ -13,7 +13,7 @@ | |||
13 | #include <asm/page.h> | 13 | #include <asm/page.h> |
14 | #include <asm/processor.h> | 14 | #include <asm/processor.h> |
15 | #include <asm/hw_irq.h> | 15 | #include <asm/hw_irq.h> |
16 | #include <asm/memory.h> | 16 | #include <asm/synch.h> |
17 | 17 | ||
18 | /* | 18 | /* |
19 | * Memory barrier. | 19 | * Memory barrier. |
@@ -48,7 +48,7 @@ | |||
48 | #ifdef CONFIG_SMP | 48 | #ifdef CONFIG_SMP |
49 | #define smp_mb() mb() | 49 | #define smp_mb() mb() |
50 | #define smp_rmb() rmb() | 50 | #define smp_rmb() rmb() |
51 | #define smp_wmb() __asm__ __volatile__ ("eieio" : : : "memory") | 51 | #define smp_wmb() eieio() |
52 | #define smp_read_barrier_depends() read_barrier_depends() | 52 | #define smp_read_barrier_depends() read_barrier_depends() |
53 | #else | 53 | #else |
54 | #define smp_mb() __asm__ __volatile__("": : :"memory") | 54 | #define smp_mb() __asm__ __volatile__("": : :"memory") |
@@ -120,8 +120,8 @@ extern void giveup_altivec(struct task_struct *); | |||
120 | extern void disable_kernel_altivec(void); | 120 | extern void disable_kernel_altivec(void); |
121 | extern void enable_kernel_altivec(void); | 121 | extern void enable_kernel_altivec(void); |
122 | extern int emulate_altivec(struct pt_regs *); | 122 | extern int emulate_altivec(struct pt_regs *); |
123 | extern void cvt_fd(float *from, double *to, unsigned long *fpscr); | 123 | extern void cvt_fd(float *from, double *to, struct thread_struct *thread); |
124 | extern void cvt_df(double *from, float *to, unsigned long *fpscr); | 124 | extern void cvt_df(double *from, float *to, struct thread_struct *thread); |
125 | 125 | ||
126 | #ifdef CONFIG_ALTIVEC | 126 | #ifdef CONFIG_ALTIVEC |
127 | extern void flush_altivec_to_thread(struct task_struct *); | 127 | extern void flush_altivec_to_thread(struct task_struct *); |
@@ -131,7 +131,12 @@ static inline void flush_altivec_to_thread(struct task_struct *t) | |||
131 | } | 131 | } |
132 | #endif | 132 | #endif |
133 | 133 | ||
134 | static inline void flush_spe_to_thread(struct task_struct *t) | ||
135 | { | ||
136 | } | ||
137 | |||
134 | extern int mem_init_done; /* set on boot once kmalloc can be called */ | 138 | extern int mem_init_done; /* set on boot once kmalloc can be called */ |
139 | extern unsigned long memory_limit; | ||
135 | 140 | ||
136 | /* EBCDIC -> ASCII conversion for [0-9A-Z] on iSeries */ | 141 | /* EBCDIC -> ASCII conversion for [0-9A-Z] on iSeries */ |
137 | extern unsigned char e2a(unsigned char); | 142 | extern unsigned char e2a(unsigned char); |
@@ -144,12 +149,7 @@ struct thread_struct; | |||
144 | extern struct task_struct * _switch(struct thread_struct *prev, | 149 | extern struct task_struct * _switch(struct thread_struct *prev, |
145 | struct thread_struct *next); | 150 | struct thread_struct *next); |
146 | 151 | ||
147 | static inline int __is_processor(unsigned long pv) | 152 | extern int powersave_nap; /* set if nap mode can be used in idle loop */ |
148 | { | ||
149 | unsigned long pvr; | ||
150 | asm("mfspr %0, 0x11F" : "=r" (pvr)); | ||
151 | return(PVR_VER(pvr) == pv); | ||
152 | } | ||
153 | 153 | ||
154 | /* | 154 | /* |
155 | * Atomic exchange | 155 | * Atomic exchange |
diff --git a/include/asm-ppc64/tce.h b/include/asm-ppc64/tce.h new file mode 100644 index 000000000000..d40b6b42ab35 --- /dev/null +++ b/include/asm-ppc64/tce.h | |||
@@ -0,0 +1,64 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation | ||
3 | * Rewrite, cleanup: | ||
4 | * Copyright (C) 2004 Olof Johansson <olof@austin.ibm.com>, IBM Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | |||
21 | #ifndef _ASM_TCE_H | ||
22 | #define _ASM_TCE_H | ||
23 | |||
24 | /* | ||
25 | * Tces come in two formats, one for the virtual bus and a different | ||
26 | * format for PCI | ||
27 | */ | ||
28 | #define TCE_VB 0 | ||
29 | #define TCE_PCI 1 | ||
30 | |||
31 | /* TCE page size is 4096 bytes (1 << 12) */ | ||
32 | |||
33 | #define TCE_SHIFT 12 | ||
34 | #define TCE_PAGE_SIZE (1 << TCE_SHIFT) | ||
35 | #define TCE_PAGE_FACTOR (PAGE_SHIFT - TCE_SHIFT) | ||
36 | |||
37 | |||
38 | /* tce_entry | ||
39 | * Used by pSeries (SMP) and iSeries/pSeries LPAR, but there it's | ||
40 | * abstracted so layout is irrelevant. | ||
41 | */ | ||
42 | union tce_entry { | ||
43 | unsigned long te_word; | ||
44 | struct { | ||
45 | unsigned int tb_cacheBits :6; /* Cache hash bits - not used */ | ||
46 | unsigned int tb_rsvd :6; | ||
47 | unsigned long tb_rpn :40; /* Real page number */ | ||
48 | unsigned int tb_valid :1; /* Tce is valid (vb only) */ | ||
49 | unsigned int tb_allio :1; /* Tce is valid for all lps (vb only) */ | ||
50 | unsigned int tb_lpindex :8; /* LpIndex for user of TCE (vb only) */ | ||
51 | unsigned int tb_pciwr :1; /* Write allowed (pci only) */ | ||
52 | unsigned int tb_rdwr :1; /* Read allowed (pci), Write allowed (vb) */ | ||
53 | } te_bits; | ||
54 | #define te_cacheBits te_bits.tb_cacheBits | ||
55 | #define te_rpn te_bits.tb_rpn | ||
56 | #define te_valid te_bits.tb_valid | ||
57 | #define te_allio te_bits.tb_allio | ||
58 | #define te_lpindex te_bits.tb_lpindex | ||
59 | #define te_pciwr te_bits.tb_pciwr | ||
60 | #define te_rdwr te_bits.tb_rdwr | ||
61 | }; | ||
62 | |||
63 | |||
64 | #endif | ||
diff --git a/include/asm-ppc64/thread_info.h b/include/asm-ppc64/thread_info.h deleted file mode 100644 index 0494df6fca74..000000000000 --- a/include/asm-ppc64/thread_info.h +++ /dev/null | |||
@@ -1,125 +0,0 @@ | |||
1 | /* thread_info.h: PPC low-level thread information | ||
2 | * adapted from the i386 version by Paul Mackerras | ||
3 | * | ||
4 | * Copyright (C) 2002 David Howells (dhowells@redhat.com) | ||
5 | * - Incorporating suggestions made by Linus Torvalds and Dave Miller | ||
6 | */ | ||
7 | |||
8 | #ifndef _ASM_THREAD_INFO_H | ||
9 | #define _ASM_THREAD_INFO_H | ||
10 | |||
11 | #ifdef __KERNEL__ | ||
12 | |||
13 | #ifndef __ASSEMBLY__ | ||
14 | #include <linux/config.h> | ||
15 | #include <linux/cache.h> | ||
16 | #include <asm/processor.h> | ||
17 | #include <asm/page.h> | ||
18 | #include <linux/stringify.h> | ||
19 | |||
20 | /* | ||
21 | * low level task data. | ||
22 | */ | ||
23 | struct thread_info { | ||
24 | struct task_struct *task; /* main task structure */ | ||
25 | struct exec_domain *exec_domain; /* execution domain */ | ||
26 | int cpu; /* cpu we're on */ | ||
27 | int preempt_count; /* 0 => preemptable, <0 => BUG */ | ||
28 | struct restart_block restart_block; | ||
29 | /* set by force_successful_syscall_return */ | ||
30 | unsigned char syscall_noerror; | ||
31 | /* low level flags - has atomic operations done on it */ | ||
32 | unsigned long flags ____cacheline_aligned_in_smp; | ||
33 | }; | ||
34 | |||
35 | /* | ||
36 | * macros/functions for gaining access to the thread information structure | ||
37 | * | ||
38 | * preempt_count needs to be 1 initially, until the scheduler is functional. | ||
39 | */ | ||
40 | #define INIT_THREAD_INFO(tsk) \ | ||
41 | { \ | ||
42 | .task = &tsk, \ | ||
43 | .exec_domain = &default_exec_domain, \ | ||
44 | .cpu = 0, \ | ||
45 | .preempt_count = 1, \ | ||
46 | .restart_block = { \ | ||
47 | .fn = do_no_restart_syscall, \ | ||
48 | }, \ | ||
49 | .flags = 0, \ | ||
50 | } | ||
51 | |||
52 | #define init_thread_info (init_thread_union.thread_info) | ||
53 | #define init_stack (init_thread_union.stack) | ||
54 | |||
55 | /* thread information allocation */ | ||
56 | |||
57 | #define THREAD_ORDER 2 | ||
58 | #define THREAD_SIZE (PAGE_SIZE << THREAD_ORDER) | ||
59 | #define THREAD_SHIFT (PAGE_SHIFT + THREAD_ORDER) | ||
60 | #ifdef CONFIG_DEBUG_STACK_USAGE | ||
61 | #define alloc_thread_info(tsk) \ | ||
62 | ({ \ | ||
63 | struct thread_info *ret; \ | ||
64 | \ | ||
65 | ret = kmalloc(THREAD_SIZE, GFP_KERNEL); \ | ||
66 | if (ret) \ | ||
67 | memset(ret, 0, THREAD_SIZE); \ | ||
68 | ret; \ | ||
69 | }) | ||
70 | #else | ||
71 | #define alloc_thread_info(tsk) kmalloc(THREAD_SIZE, GFP_KERNEL) | ||
72 | #endif | ||
73 | #define free_thread_info(ti) kfree(ti) | ||
74 | #define get_thread_info(ti) get_task_struct((ti)->task) | ||
75 | #define put_thread_info(ti) put_task_struct((ti)->task) | ||
76 | |||
77 | /* how to get the thread information struct from C */ | ||
78 | static inline struct thread_info *current_thread_info(void) | ||
79 | { | ||
80 | struct thread_info *ti; | ||
81 | __asm__("clrrdi %0,1,%1" : "=r"(ti) : "i" (THREAD_SHIFT)); | ||
82 | return ti; | ||
83 | } | ||
84 | |||
85 | #endif /* __ASSEMBLY__ */ | ||
86 | |||
87 | #define PREEMPT_ACTIVE 0x10000000 | ||
88 | |||
89 | /* | ||
90 | * thread information flag bit numbers | ||
91 | */ | ||
92 | #define TIF_SYSCALL_TRACE 0 /* syscall trace active */ | ||
93 | #define TIF_NOTIFY_RESUME 1 /* resumption notification requested */ | ||
94 | #define TIF_SIGPENDING 2 /* signal pending */ | ||
95 | #define TIF_NEED_RESCHED 3 /* rescheduling necessary */ | ||
96 | #define TIF_POLLING_NRFLAG 4 /* true if poll_idle() is polling | ||
97 | TIF_NEED_RESCHED */ | ||
98 | #define TIF_32BIT 5 /* 32 bit binary */ | ||
99 | /* #define SPARE 6 */ | ||
100 | #define TIF_ABI_PENDING 7 /* 32/64 bit switch needed */ | ||
101 | #define TIF_SYSCALL_AUDIT 8 /* syscall auditing active */ | ||
102 | #define TIF_SINGLESTEP 9 /* singlestepping active */ | ||
103 | #define TIF_MEMDIE 10 | ||
104 | #define TIF_SECCOMP 11 /* secure computing */ | ||
105 | |||
106 | /* as above, but as bit values */ | ||
107 | #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) | ||
108 | #define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME) | ||
109 | #define _TIF_SIGPENDING (1<<TIF_SIGPENDING) | ||
110 | #define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) | ||
111 | #define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) | ||
112 | #define _TIF_32BIT (1<<TIF_32BIT) | ||
113 | /* #define _SPARE (1<<SPARE) */ | ||
114 | #define _TIF_ABI_PENDING (1<<TIF_ABI_PENDING) | ||
115 | #define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT) | ||
116 | #define _TIF_SINGLESTEP (1<<TIF_SINGLESTEP) | ||
117 | #define _TIF_SECCOMP (1<<TIF_SECCOMP) | ||
118 | #define _TIF_SYSCALL_T_OR_A (_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SECCOMP) | ||
119 | |||
120 | #define _TIF_USER_WORK_MASK (_TIF_NOTIFY_RESUME | _TIF_SIGPENDING | \ | ||
121 | _TIF_NEED_RESCHED) | ||
122 | |||
123 | #endif /* __KERNEL__ */ | ||
124 | |||
125 | #endif /* _ASM_THREAD_INFO_H */ | ||
diff --git a/include/asm-ppc64/time.h b/include/asm-ppc64/time.h deleted file mode 100644 index c6c762cad8b0..000000000000 --- a/include/asm-ppc64/time.h +++ /dev/null | |||
@@ -1,124 +0,0 @@ | |||
1 | /* | ||
2 | * Common time prototypes and such for all ppc machines. | ||
3 | * | ||
4 | * Written by Cort Dougan (cort@cs.nmt.edu) to merge | ||
5 | * Paul Mackerras' version and mine for PReP and Pmac. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * as published by the Free Software Foundation; either version | ||
10 | * 2 of the License, or (at your option) any later version. | ||
11 | */ | ||
12 | |||
13 | #ifndef __PPC64_TIME_H | ||
14 | #define __PPC64_TIME_H | ||
15 | |||
16 | #ifdef __KERNEL__ | ||
17 | #include <linux/config.h> | ||
18 | #include <linux/types.h> | ||
19 | #include <linux/mc146818rtc.h> | ||
20 | |||
21 | #include <asm/processor.h> | ||
22 | #include <asm/paca.h> | ||
23 | #include <asm/iSeries/HvCall.h> | ||
24 | |||
25 | /* time.c */ | ||
26 | extern unsigned long tb_ticks_per_jiffy; | ||
27 | extern unsigned long tb_ticks_per_usec; | ||
28 | extern unsigned long tb_ticks_per_sec; | ||
29 | extern unsigned long tb_to_xs; | ||
30 | extern unsigned tb_to_us; | ||
31 | extern unsigned long tb_last_stamp; | ||
32 | |||
33 | struct rtc_time; | ||
34 | extern void to_tm(int tim, struct rtc_time * tm); | ||
35 | extern time_t last_rtc_update; | ||
36 | |||
37 | void generic_calibrate_decr(void); | ||
38 | void setup_default_decr(void); | ||
39 | |||
40 | /* Some sane defaults: 125 MHz timebase, 1GHz processor */ | ||
41 | extern unsigned long ppc_proc_freq; | ||
42 | #define DEFAULT_PROC_FREQ (DEFAULT_TB_FREQ * 8) | ||
43 | extern unsigned long ppc_tb_freq; | ||
44 | #define DEFAULT_TB_FREQ 125000000UL | ||
45 | |||
46 | /* | ||
47 | * By putting all of this stuff into a single struct we | ||
48 | * reduce the number of cache lines touched by do_gettimeofday. | ||
49 | * Both by collecting all of the data in one cache line and | ||
50 | * by touching only one TOC entry | ||
51 | */ | ||
52 | struct gettimeofday_vars { | ||
53 | unsigned long tb_to_xs; | ||
54 | unsigned long stamp_xsec; | ||
55 | unsigned long tb_orig_stamp; | ||
56 | }; | ||
57 | |||
58 | struct gettimeofday_struct { | ||
59 | unsigned long tb_ticks_per_sec; | ||
60 | struct gettimeofday_vars vars[2]; | ||
61 | struct gettimeofday_vars * volatile varp; | ||
62 | unsigned var_idx; | ||
63 | unsigned tb_to_us; | ||
64 | }; | ||
65 | |||
66 | struct div_result { | ||
67 | unsigned long result_high; | ||
68 | unsigned long result_low; | ||
69 | }; | ||
70 | |||
71 | int via_calibrate_decr(void); | ||
72 | |||
73 | static __inline__ unsigned long get_tb(void) | ||
74 | { | ||
75 | return mftb(); | ||
76 | } | ||
77 | |||
78 | /* Accessor functions for the decrementer register. */ | ||
79 | static __inline__ unsigned int get_dec(void) | ||
80 | { | ||
81 | return (mfspr(SPRN_DEC)); | ||
82 | } | ||
83 | |||
84 | static __inline__ void set_dec(int val) | ||
85 | { | ||
86 | #ifdef CONFIG_PPC_ISERIES | ||
87 | struct paca_struct *lpaca = get_paca(); | ||
88 | int cur_dec; | ||
89 | |||
90 | if (lpaca->lppaca.shared_proc) { | ||
91 | lpaca->lppaca.virtual_decr = val; | ||
92 | cur_dec = get_dec(); | ||
93 | if (cur_dec > val) | ||
94 | HvCall_setVirtualDecr(); | ||
95 | } else | ||
96 | #endif | ||
97 | mtspr(SPRN_DEC, val); | ||
98 | } | ||
99 | |||
100 | static inline unsigned long tb_ticks_since(unsigned long tstamp) | ||
101 | { | ||
102 | return get_tb() - tstamp; | ||
103 | } | ||
104 | |||
105 | #define mulhwu(x,y) \ | ||
106 | ({unsigned z; asm ("mulhwu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;}) | ||
107 | #define mulhdu(x,y) \ | ||
108 | ({unsigned long z; asm ("mulhdu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;}) | ||
109 | |||
110 | |||
111 | unsigned mulhwu_scale_factor(unsigned, unsigned); | ||
112 | void div128_by_32( unsigned long dividend_high, unsigned long dividend_low, | ||
113 | unsigned divisor, struct div_result *dr ); | ||
114 | |||
115 | /* Used to store Processor Utilization register (purr) values */ | ||
116 | |||
117 | struct cpu_usage { | ||
118 | u64 current_tb; /* Holds the current purr register values */ | ||
119 | }; | ||
120 | |||
121 | DECLARE_PER_CPU(struct cpu_usage, cpu_usage_array); | ||
122 | |||
123 | #endif /* __KERNEL__ */ | ||
124 | #endif /* __PPC64_TIME_H */ | ||
diff --git a/include/asm-ppc64/tlb.h b/include/asm-ppc64/tlb.h deleted file mode 100644 index 97cb696ce68d..000000000000 --- a/include/asm-ppc64/tlb.h +++ /dev/null | |||
@@ -1,39 +0,0 @@ | |||
1 | /* | ||
2 | * TLB shootdown specifics for PPC64 | ||
3 | * | ||
4 | * Copyright (C) 2002 Anton Blanchard, IBM Corp. | ||
5 | * Copyright (C) 2002 Paul Mackerras, IBM Corp. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * as published by the Free Software Foundation; either version | ||
10 | * 2 of the License, or (at your option) any later version. | ||
11 | */ | ||
12 | #ifndef _PPC64_TLB_H | ||
13 | #define _PPC64_TLB_H | ||
14 | |||
15 | #include <asm/tlbflush.h> | ||
16 | |||
17 | struct mmu_gather; | ||
18 | |||
19 | extern void pte_free_finish(void); | ||
20 | |||
21 | static inline void tlb_flush(struct mmu_gather *tlb) | ||
22 | { | ||
23 | flush_tlb_pending(); | ||
24 | pte_free_finish(); | ||
25 | } | ||
26 | |||
27 | /* Avoid pulling in another include just for this */ | ||
28 | #define check_pgt_cache() do { } while (0) | ||
29 | |||
30 | /* Get the generic bits... */ | ||
31 | #include <asm-generic/tlb.h> | ||
32 | |||
33 | /* Nothing needed here in fact... */ | ||
34 | #define tlb_start_vma(tlb, vma) do { } while (0) | ||
35 | #define tlb_end_vma(tlb, vma) do { } while (0) | ||
36 | |||
37 | #define __tlb_remove_tlb_entry(tlb, pte, address) do { } while (0) | ||
38 | |||
39 | #endif /* _PPC64_TLB_H */ | ||
diff --git a/include/asm-ppc64/tlbflush.h b/include/asm-ppc64/tlbflush.h deleted file mode 100644 index 74271d7c1d16..000000000000 --- a/include/asm-ppc64/tlbflush.h +++ /dev/null | |||
@@ -1,55 +0,0 @@ | |||
1 | #ifndef _PPC64_TLBFLUSH_H | ||
2 | #define _PPC64_TLBFLUSH_H | ||
3 | |||
4 | /* | ||
5 | * TLB flushing: | ||
6 | * | ||
7 | * - flush_tlb_mm(mm) flushes the specified mm context TLB's | ||
8 | * - flush_tlb_page(vma, vmaddr) flushes one page | ||
9 | * - flush_tlb_page_nohash(vma, vmaddr) flushes one page if SW loaded TLB | ||
10 | * - flush_tlb_range(vma, start, end) flushes a range of pages | ||
11 | * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages | ||
12 | * - flush_tlb_pgtables(mm, start, end) flushes a range of page tables | ||
13 | */ | ||
14 | |||
15 | #include <linux/percpu.h> | ||
16 | #include <asm/page.h> | ||
17 | |||
18 | #define PPC64_TLB_BATCH_NR 192 | ||
19 | |||
20 | struct mm_struct; | ||
21 | struct ppc64_tlb_batch { | ||
22 | unsigned long index; | ||
23 | unsigned long context; | ||
24 | struct mm_struct *mm; | ||
25 | pte_t pte[PPC64_TLB_BATCH_NR]; | ||
26 | unsigned long addr[PPC64_TLB_BATCH_NR]; | ||
27 | unsigned long vaddr[PPC64_TLB_BATCH_NR]; | ||
28 | unsigned int large; | ||
29 | }; | ||
30 | DECLARE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch); | ||
31 | |||
32 | extern void __flush_tlb_pending(struct ppc64_tlb_batch *batch); | ||
33 | |||
34 | static inline void flush_tlb_pending(void) | ||
35 | { | ||
36 | struct ppc64_tlb_batch *batch = &get_cpu_var(ppc64_tlb_batch); | ||
37 | |||
38 | if (batch->index) | ||
39 | __flush_tlb_pending(batch); | ||
40 | put_cpu_var(ppc64_tlb_batch); | ||
41 | } | ||
42 | |||
43 | #define flush_tlb_mm(mm) flush_tlb_pending() | ||
44 | #define flush_tlb_page(vma, addr) flush_tlb_pending() | ||
45 | #define flush_tlb_page_nohash(vma, addr) do { } while (0) | ||
46 | #define flush_tlb_range(vma, start, end) \ | ||
47 | do { (void)(start); flush_tlb_pending(); } while (0) | ||
48 | #define flush_tlb_kernel_range(start, end) flush_tlb_pending() | ||
49 | #define flush_tlb_pgtables(mm, start, end) do { } while (0) | ||
50 | |||
51 | extern void flush_hash_page(unsigned long context, unsigned long ea, pte_t pte, | ||
52 | int local); | ||
53 | void flush_hash_range(unsigned long context, unsigned long number, int local); | ||
54 | |||
55 | #endif /* _PPC64_TLBFLUSH_H */ | ||
diff --git a/include/asm-ppc64/types.h b/include/asm-ppc64/types.h deleted file mode 100644 index bf294c1761b2..000000000000 --- a/include/asm-ppc64/types.h +++ /dev/null | |||
@@ -1,79 +0,0 @@ | |||
1 | #ifndef _PPC64_TYPES_H | ||
2 | #define _PPC64_TYPES_H | ||
3 | |||
4 | #ifndef __ASSEMBLY__ | ||
5 | |||
6 | /* | ||
7 | * This file is never included by application software unless | ||
8 | * explicitly requested (e.g., via linux/types.h) in which case the | ||
9 | * application is Linux specific so (user-) name space pollution is | ||
10 | * not a major issue. However, for interoperability, libraries still | ||
11 | * need to be careful to avoid a name clashes. | ||
12 | * | ||
13 | * This program is free software; you can redistribute it and/or | ||
14 | * modify it under the terms of the GNU General Public License | ||
15 | * as published by the Free Software Foundation; either version | ||
16 | * 2 of the License, or (at your option) any later version. | ||
17 | */ | ||
18 | |||
19 | typedef unsigned int umode_t; | ||
20 | |||
21 | /* | ||
22 | * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the | ||
23 | * header files exported to user space | ||
24 | */ | ||
25 | |||
26 | typedef __signed__ char __s8; | ||
27 | typedef unsigned char __u8; | ||
28 | |||
29 | typedef __signed__ short __s16; | ||
30 | typedef unsigned short __u16; | ||
31 | |||
32 | typedef __signed__ int __s32; | ||
33 | typedef unsigned int __u32; | ||
34 | |||
35 | typedef __signed__ long __s64; | ||
36 | typedef unsigned long __u64; | ||
37 | |||
38 | typedef struct { | ||
39 | __u32 u[4]; | ||
40 | } __attribute((aligned(16))) __vector128; | ||
41 | |||
42 | #endif /* __ASSEMBLY__ */ | ||
43 | |||
44 | #ifdef __KERNEL__ | ||
45 | /* | ||
46 | * These aren't exported outside the kernel to avoid name space clashes | ||
47 | */ | ||
48 | #define BITS_PER_LONG 64 | ||
49 | |||
50 | #ifndef __ASSEMBLY__ | ||
51 | |||
52 | typedef signed char s8; | ||
53 | typedef unsigned char u8; | ||
54 | |||
55 | typedef signed short s16; | ||
56 | typedef unsigned short u16; | ||
57 | |||
58 | typedef signed int s32; | ||
59 | typedef unsigned int u32; | ||
60 | |||
61 | typedef signed long s64; | ||
62 | typedef unsigned long u64; | ||
63 | |||
64 | typedef __vector128 vector128; | ||
65 | |||
66 | typedef u32 dma_addr_t; | ||
67 | typedef u64 dma64_addr_t; | ||
68 | |||
69 | typedef struct { | ||
70 | unsigned long entry; | ||
71 | unsigned long toc; | ||
72 | unsigned long env; | ||
73 | } func_descr_t; | ||
74 | |||
75 | #endif /* __ASSEMBLY__ */ | ||
76 | |||
77 | #endif /* __KERNEL__ */ | ||
78 | |||
79 | #endif /* _PPC64_TYPES_H */ | ||
diff --git a/include/asm-ppc64/uaccess.h b/include/asm-ppc64/uaccess.h deleted file mode 100644 index 132c1276547b..000000000000 --- a/include/asm-ppc64/uaccess.h +++ /dev/null | |||
@@ -1,341 +0,0 @@ | |||
1 | #ifndef _PPC64_UACCESS_H | ||
2 | #define _PPC64_UACCESS_H | ||
3 | |||
4 | /* | ||
5 | * This program is free software; you can redistribute it and/or | ||
6 | * modify it under the terms of the GNU General Public License | ||
7 | * as published by the Free Software Foundation; either version | ||
8 | * 2 of the License, or (at your option) any later version. | ||
9 | */ | ||
10 | |||
11 | #ifndef __ASSEMBLY__ | ||
12 | #include <linux/sched.h> | ||
13 | #include <linux/errno.h> | ||
14 | #include <asm/processor.h> | ||
15 | |||
16 | #define VERIFY_READ 0 | ||
17 | #define VERIFY_WRITE 1 | ||
18 | |||
19 | /* | ||
20 | * The fs value determines whether argument validity checking should be | ||
21 | * performed or not. If get_fs() == USER_DS, checking is performed, with | ||
22 | * get_fs() == KERNEL_DS, checking is bypassed. | ||
23 | * | ||
24 | * For historical reasons, these macros are grossly misnamed. | ||
25 | */ | ||
26 | |||
27 | #define MAKE_MM_SEG(s) ((mm_segment_t) { (s) }) | ||
28 | |||
29 | #define KERNEL_DS MAKE_MM_SEG(0UL) | ||
30 | #define USER_DS MAKE_MM_SEG(0xf000000000000000UL) | ||
31 | |||
32 | #define get_ds() (KERNEL_DS) | ||
33 | #define get_fs() (current->thread.fs) | ||
34 | #define set_fs(val) (current->thread.fs = (val)) | ||
35 | |||
36 | #define segment_eq(a,b) ((a).seg == (b).seg) | ||
37 | |||
38 | /* | ||
39 | * Use the alpha trick for checking ranges: | ||
40 | * | ||
41 | * Is a address valid? This does a straightforward calculation rather | ||
42 | * than tests. | ||
43 | * | ||
44 | * Address valid if: | ||
45 | * - "addr" doesn't have any high-bits set | ||
46 | * - AND "size" doesn't have any high-bits set | ||
47 | * - OR we are in kernel mode. | ||
48 | * | ||
49 | * We dont have to check for high bits in (addr+size) because the first | ||
50 | * two checks force the maximum result to be below the start of the | ||
51 | * kernel region. | ||
52 | */ | ||
53 | #define __access_ok(addr,size,segment) \ | ||
54 | (((segment).seg & (addr | size )) == 0) | ||
55 | |||
56 | #define access_ok(type,addr,size) \ | ||
57 | __access_ok(((__force unsigned long)(addr)),(size),get_fs()) | ||
58 | |||
59 | /* | ||
60 | * The exception table consists of pairs of addresses: the first is the | ||
61 | * address of an instruction that is allowed to fault, and the second is | ||
62 | * the address at which the program should continue. No registers are | ||
63 | * modified, so it is entirely up to the continuation code to figure out | ||
64 | * what to do. | ||
65 | * | ||
66 | * All the routines below use bits of fixup code that are out of line | ||
67 | * with the main instruction path. This means when everything is well, | ||
68 | * we don't even have to jump over them. Further, they do not intrude | ||
69 | * on our cache or tlb entries. | ||
70 | */ | ||
71 | |||
72 | struct exception_table_entry | ||
73 | { | ||
74 | unsigned long insn, fixup; | ||
75 | }; | ||
76 | |||
77 | /* Returns 0 if exception not found and fixup otherwise. */ | ||
78 | extern unsigned long search_exception_table(unsigned long); | ||
79 | |||
80 | /* | ||
81 | * These are the main single-value transfer routines. They automatically | ||
82 | * use the right size if we just have the right pointer type. | ||
83 | * | ||
84 | * This gets kind of ugly. We want to return _two_ values in "get_user()" | ||
85 | * and yet we don't want to do any pointers, because that is too much | ||
86 | * of a performance impact. Thus we have a few rather ugly macros here, | ||
87 | * and hide all the ugliness from the user. | ||
88 | * | ||
89 | * The "__xxx" versions of the user access functions are versions that | ||
90 | * do not verify the address space, that must have been done previously | ||
91 | * with a separate "access_ok()" call (this is used when we do multiple | ||
92 | * accesses to the same area of user memory). | ||
93 | * | ||
94 | * As we use the same address space for kernel and user data on the | ||
95 | * PowerPC, we can just do these as direct assignments. (Of course, the | ||
96 | * exception handling means that it's no longer "just"...) | ||
97 | */ | ||
98 | #define get_user(x,ptr) \ | ||
99 | __get_user_check((x),(ptr),sizeof(*(ptr))) | ||
100 | #define put_user(x,ptr) \ | ||
101 | __put_user_check((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr))) | ||
102 | |||
103 | #define __get_user(x,ptr) \ | ||
104 | __get_user_nocheck((x),(ptr),sizeof(*(ptr))) | ||
105 | #define __put_user(x,ptr) \ | ||
106 | __put_user_nocheck((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr))) | ||
107 | |||
108 | #define __get_user_unaligned __get_user | ||
109 | #define __put_user_unaligned __put_user | ||
110 | |||
111 | extern long __put_user_bad(void); | ||
112 | |||
113 | #define __put_user_nocheck(x,ptr,size) \ | ||
114 | ({ \ | ||
115 | long __pu_err; \ | ||
116 | might_sleep(); \ | ||
117 | __chk_user_ptr(ptr); \ | ||
118 | __put_user_size((x),(ptr),(size),__pu_err,-EFAULT); \ | ||
119 | __pu_err; \ | ||
120 | }) | ||
121 | |||
122 | #define __put_user_check(x,ptr,size) \ | ||
123 | ({ \ | ||
124 | long __pu_err = -EFAULT; \ | ||
125 | void __user *__pu_addr = (ptr); \ | ||
126 | might_sleep(); \ | ||
127 | if (access_ok(VERIFY_WRITE,__pu_addr,size)) \ | ||
128 | __put_user_size((x),__pu_addr,(size),__pu_err,-EFAULT); \ | ||
129 | __pu_err; \ | ||
130 | }) | ||
131 | |||
132 | #define __put_user_size(x,ptr,size,retval,errret) \ | ||
133 | do { \ | ||
134 | retval = 0; \ | ||
135 | switch (size) { \ | ||
136 | case 1: __put_user_asm(x,ptr,retval,"stb",errret); break; \ | ||
137 | case 2: __put_user_asm(x,ptr,retval,"sth",errret); break; \ | ||
138 | case 4: __put_user_asm(x,ptr,retval,"stw",errret); break; \ | ||
139 | case 8: __put_user_asm(x,ptr,retval,"std",errret); break; \ | ||
140 | default: __put_user_bad(); \ | ||
141 | } \ | ||
142 | } while (0) | ||
143 | |||
144 | /* | ||
145 | * We don't tell gcc that we are accessing memory, but this is OK | ||
146 | * because we do not write to any memory gcc knows about, so there | ||
147 | * are no aliasing issues. | ||
148 | */ | ||
149 | #define __put_user_asm(x, addr, err, op, errret) \ | ||
150 | __asm__ __volatile__( \ | ||
151 | "1: "op" %1,0(%2) # put_user\n" \ | ||
152 | "2:\n" \ | ||
153 | ".section .fixup,\"ax\"\n" \ | ||
154 | "3: li %0,%3\n" \ | ||
155 | " b 2b\n" \ | ||
156 | ".previous\n" \ | ||
157 | ".section __ex_table,\"a\"\n" \ | ||
158 | " .align 3\n" \ | ||
159 | " .llong 1b,3b\n" \ | ||
160 | ".previous" \ | ||
161 | : "=r"(err) \ | ||
162 | : "r"(x), "b"(addr), "i"(errret), "0"(err)) | ||
163 | |||
164 | |||
165 | #define __get_user_nocheck(x,ptr,size) \ | ||
166 | ({ \ | ||
167 | long __gu_err; \ | ||
168 | unsigned long __gu_val; \ | ||
169 | might_sleep(); \ | ||
170 | __get_user_size(__gu_val,(ptr),(size),__gu_err,-EFAULT);\ | ||
171 | (x) = (__typeof__(*(ptr)))__gu_val; \ | ||
172 | __gu_err; \ | ||
173 | }) | ||
174 | |||
175 | #define __get_user_check(x,ptr,size) \ | ||
176 | ({ \ | ||
177 | long __gu_err = -EFAULT; \ | ||
178 | unsigned long __gu_val = 0; \ | ||
179 | const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \ | ||
180 | might_sleep(); \ | ||
181 | if (access_ok(VERIFY_READ,__gu_addr,size)) \ | ||
182 | __get_user_size(__gu_val,__gu_addr,(size),__gu_err,-EFAULT);\ | ||
183 | (x) = (__typeof__(*(ptr)))__gu_val; \ | ||
184 | __gu_err; \ | ||
185 | }) | ||
186 | |||
187 | extern long __get_user_bad(void); | ||
188 | |||
189 | #define __get_user_size(x,ptr,size,retval,errret) \ | ||
190 | do { \ | ||
191 | retval = 0; \ | ||
192 | __chk_user_ptr(ptr); \ | ||
193 | switch (size) { \ | ||
194 | case 1: __get_user_asm(x,ptr,retval,"lbz",errret); break; \ | ||
195 | case 2: __get_user_asm(x,ptr,retval,"lhz",errret); break; \ | ||
196 | case 4: __get_user_asm(x,ptr,retval,"lwz",errret); break; \ | ||
197 | case 8: __get_user_asm(x,ptr,retval,"ld",errret); break; \ | ||
198 | default: (x) = __get_user_bad(); \ | ||
199 | } \ | ||
200 | } while (0) | ||
201 | |||
202 | #define __get_user_asm(x, addr, err, op, errret) \ | ||
203 | __asm__ __volatile__( \ | ||
204 | "1: "op" %1,0(%2) # get_user\n" \ | ||
205 | "2:\n" \ | ||
206 | ".section .fixup,\"ax\"\n" \ | ||
207 | "3: li %0,%3\n" \ | ||
208 | " li %1,0\n" \ | ||
209 | " b 2b\n" \ | ||
210 | ".previous\n" \ | ||
211 | ".section __ex_table,\"a\"\n" \ | ||
212 | " .align 3\n" \ | ||
213 | " .llong 1b,3b\n" \ | ||
214 | ".previous" \ | ||
215 | : "=r"(err), "=r"(x) \ | ||
216 | : "b"(addr), "i"(errret), "0"(err)) | ||
217 | |||
218 | /* more complex routines */ | ||
219 | |||
220 | extern unsigned long __copy_tofrom_user(void __user *to, const void __user *from, | ||
221 | unsigned long size); | ||
222 | |||
223 | static inline unsigned long | ||
224 | __copy_from_user_inatomic(void *to, const void __user *from, unsigned long n) | ||
225 | { | ||
226 | if (__builtin_constant_p(n)) { | ||
227 | unsigned long ret; | ||
228 | |||
229 | switch (n) { | ||
230 | case 1: | ||
231 | __get_user_size(*(u8 *)to, from, 1, ret, 1); | ||
232 | return ret; | ||
233 | case 2: | ||
234 | __get_user_size(*(u16 *)to, from, 2, ret, 2); | ||
235 | return ret; | ||
236 | case 4: | ||
237 | __get_user_size(*(u32 *)to, from, 4, ret, 4); | ||
238 | return ret; | ||
239 | case 8: | ||
240 | __get_user_size(*(u64 *)to, from, 8, ret, 8); | ||
241 | return ret; | ||
242 | } | ||
243 | } | ||
244 | return __copy_tofrom_user((__force void __user *) to, from, n); | ||
245 | } | ||
246 | |||
247 | static inline unsigned long | ||
248 | __copy_from_user(void *to, const void __user *from, unsigned long n) | ||
249 | { | ||
250 | might_sleep(); | ||
251 | return __copy_from_user_inatomic(to, from, n); | ||
252 | } | ||
253 | |||
254 | static inline unsigned long | ||
255 | __copy_to_user_inatomic(void __user *to, const void *from, unsigned long n) | ||
256 | { | ||
257 | if (__builtin_constant_p(n)) { | ||
258 | unsigned long ret; | ||
259 | |||
260 | switch (n) { | ||
261 | case 1: | ||
262 | __put_user_size(*(u8 *)from, (u8 __user *)to, 1, ret, 1); | ||
263 | return ret; | ||
264 | case 2: | ||
265 | __put_user_size(*(u16 *)from, (u16 __user *)to, 2, ret, 2); | ||
266 | return ret; | ||
267 | case 4: | ||
268 | __put_user_size(*(u32 *)from, (u32 __user *)to, 4, ret, 4); | ||
269 | return ret; | ||
270 | case 8: | ||
271 | __put_user_size(*(u64 *)from, (u64 __user *)to, 8, ret, 8); | ||
272 | return ret; | ||
273 | } | ||
274 | } | ||
275 | return __copy_tofrom_user(to, (__force const void __user *) from, n); | ||
276 | } | ||
277 | |||
278 | static inline unsigned long | ||
279 | __copy_to_user(void __user *to, const void *from, unsigned long n) | ||
280 | { | ||
281 | might_sleep(); | ||
282 | return __copy_to_user_inatomic(to, from, n); | ||
283 | } | ||
284 | |||
285 | #define __copy_in_user(to, from, size) \ | ||
286 | __copy_tofrom_user((to), (from), (size)) | ||
287 | |||
288 | extern unsigned long copy_from_user(void *to, const void __user *from, | ||
289 | unsigned long n); | ||
290 | extern unsigned long copy_to_user(void __user *to, const void *from, | ||
291 | unsigned long n); | ||
292 | extern unsigned long copy_in_user(void __user *to, const void __user *from, | ||
293 | unsigned long n); | ||
294 | |||
295 | extern unsigned long __clear_user(void __user *addr, unsigned long size); | ||
296 | |||
297 | static inline unsigned long | ||
298 | clear_user(void __user *addr, unsigned long size) | ||
299 | { | ||
300 | might_sleep(); | ||
301 | if (likely(access_ok(VERIFY_WRITE, addr, size))) | ||
302 | size = __clear_user(addr, size); | ||
303 | return size; | ||
304 | } | ||
305 | |||
306 | extern int __strncpy_from_user(char *dst, const char __user *src, long count); | ||
307 | |||
308 | static inline long | ||
309 | strncpy_from_user(char *dst, const char __user *src, long count) | ||
310 | { | ||
311 | might_sleep(); | ||
312 | if (likely(access_ok(VERIFY_READ, src, 1))) | ||
313 | return __strncpy_from_user(dst, src, count); | ||
314 | return -EFAULT; | ||
315 | } | ||
316 | |||
317 | /* | ||
318 | * Return the size of a string (including the ending 0) | ||
319 | * | ||
320 | * Return 0 for error | ||
321 | */ | ||
322 | extern int __strnlen_user(const char __user *str, long len); | ||
323 | |||
324 | /* | ||
325 | * Returns the length of the string at str (including the null byte), | ||
326 | * or 0 if we hit a page we can't access, | ||
327 | * or something > len if we didn't find a null byte. | ||
328 | */ | ||
329 | static inline int strnlen_user(const char __user *str, long len) | ||
330 | { | ||
331 | might_sleep(); | ||
332 | if (likely(access_ok(VERIFY_READ, str, 1))) | ||
333 | return __strnlen_user(str, len); | ||
334 | return 0; | ||
335 | } | ||
336 | |||
337 | #define strlen_user(str) strnlen_user((str), 0x7ffffffe) | ||
338 | |||
339 | #endif /* __ASSEMBLY__ */ | ||
340 | |||
341 | #endif /* _PPC64_UACCESS_H */ | ||
diff --git a/include/asm-ppc64/ucontext.h b/include/asm-ppc64/ucontext.h deleted file mode 100644 index ef8cc5b37542..000000000000 --- a/include/asm-ppc64/ucontext.h +++ /dev/null | |||
@@ -1,22 +0,0 @@ | |||
1 | #ifndef _ASMPPC64_UCONTEXT_H | ||
2 | #define _ASMPPC64_UCONTEXT_H | ||
3 | |||
4 | #include <asm/sigcontext.h> | ||
5 | |||
6 | /* | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * as published by the Free Software Foundation; either version | ||
10 | * 2 of the License, or (at your option) any later version. | ||
11 | */ | ||
12 | |||
13 | struct ucontext { | ||
14 | unsigned long uc_flags; | ||
15 | struct ucontext *uc_link; | ||
16 | stack_t uc_stack; | ||
17 | sigset_t uc_sigmask; | ||
18 | sigset_t __unsued[15]; /* Allow for uc_sigmask growth */ | ||
19 | struct sigcontext uc_mcontext; /* last for extensibility */ | ||
20 | }; | ||
21 | |||
22 | #endif /* _ASMPPC64_UCONTEXT_H */ | ||
diff --git a/include/asm-ppc64/udbg.h b/include/asm-ppc64/udbg.h index c786604aef02..8192fb8541cc 100644 --- a/include/asm-ppc64/udbg.h +++ b/include/asm-ppc64/udbg.h | |||
@@ -28,4 +28,7 @@ extern unsigned long udbg_ifdebug(unsigned long flags); | |||
28 | extern void __init ppcdbg_initialize(void); | 28 | extern void __init ppcdbg_initialize(void); |
29 | 29 | ||
30 | extern void udbg_init_uart(void __iomem *comport, unsigned int speed); | 30 | extern void udbg_init_uart(void __iomem *comport, unsigned int speed); |
31 | |||
32 | struct device_node; | ||
33 | extern void udbg_init_scc(struct device_node *np); | ||
31 | #endif | 34 | #endif |
diff --git a/include/asm-ppc64/uninorth.h b/include/asm-ppc64/uninorth.h deleted file mode 100644 index 7ad7059f2c80..000000000000 --- a/include/asm-ppc64/uninorth.h +++ /dev/null | |||
@@ -1,2 +0,0 @@ | |||
1 | #include <asm-ppc/uninorth.h> | ||
2 | |||
diff --git a/include/asm-ppc64/unistd.h b/include/asm-ppc64/unistd.h deleted file mode 100644 index 977bc980c1af..000000000000 --- a/include/asm-ppc64/unistd.h +++ /dev/null | |||
@@ -1,487 +0,0 @@ | |||
1 | #ifndef _ASM_PPC_UNISTD_H_ | ||
2 | #define _ASM_PPC_UNISTD_H_ | ||
3 | |||
4 | /* | ||
5 | * This file contains the system call numbers. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * as published by the Free Software Foundation; either version | ||
10 | * 2 of the License, or (at your option) any later version. | ||
11 | */ | ||
12 | |||
13 | #define __NR_restart_syscall 0 | ||
14 | #define __NR_exit 1 | ||
15 | #define __NR_fork 2 | ||
16 | #define __NR_read 3 | ||
17 | #define __NR_write 4 | ||
18 | #define __NR_open 5 | ||
19 | #define __NR_close 6 | ||
20 | #define __NR_waitpid 7 | ||
21 | #define __NR_creat 8 | ||
22 | #define __NR_link 9 | ||
23 | #define __NR_unlink 10 | ||
24 | #define __NR_execve 11 | ||
25 | #define __NR_chdir 12 | ||
26 | #define __NR_time 13 | ||
27 | #define __NR_mknod 14 | ||
28 | #define __NR_chmod 15 | ||
29 | #define __NR_lchown 16 | ||
30 | #define __NR_break 17 | ||
31 | #define __NR_oldstat 18 | ||
32 | #define __NR_lseek 19 | ||
33 | #define __NR_getpid 20 | ||
34 | #define __NR_mount 21 | ||
35 | #define __NR_umount 22 | ||
36 | #define __NR_setuid 23 | ||
37 | #define __NR_getuid 24 | ||
38 | #define __NR_stime 25 | ||
39 | #define __NR_ptrace 26 | ||
40 | #define __NR_alarm 27 | ||
41 | #define __NR_oldfstat 28 | ||
42 | #define __NR_pause 29 | ||
43 | #define __NR_utime 30 | ||
44 | #define __NR_stty 31 | ||
45 | #define __NR_gtty 32 | ||
46 | #define __NR_access 33 | ||
47 | #define __NR_nice 34 | ||
48 | #define __NR_ftime 35 | ||
49 | #define __NR_sync 36 | ||
50 | #define __NR_kill 37 | ||
51 | #define __NR_rename 38 | ||
52 | #define __NR_mkdir 39 | ||
53 | #define __NR_rmdir 40 | ||
54 | #define __NR_dup 41 | ||
55 | #define __NR_pipe 42 | ||
56 | #define __NR_times 43 | ||
57 | #define __NR_prof 44 | ||
58 | #define __NR_brk 45 | ||
59 | #define __NR_setgid 46 | ||
60 | #define __NR_getgid 47 | ||
61 | #define __NR_signal 48 | ||
62 | #define __NR_geteuid 49 | ||
63 | #define __NR_getegid 50 | ||
64 | #define __NR_acct 51 | ||
65 | #define __NR_umount2 52 | ||
66 | #define __NR_lock 53 | ||
67 | #define __NR_ioctl 54 | ||
68 | #define __NR_fcntl 55 | ||
69 | #define __NR_mpx 56 | ||
70 | #define __NR_setpgid 57 | ||
71 | #define __NR_ulimit 58 | ||
72 | #define __NR_oldolduname 59 | ||
73 | #define __NR_umask 60 | ||
74 | #define __NR_chroot 61 | ||
75 | #define __NR_ustat 62 | ||
76 | #define __NR_dup2 63 | ||
77 | #define __NR_getppid 64 | ||
78 | #define __NR_getpgrp 65 | ||
79 | #define __NR_setsid 66 | ||
80 | #define __NR_sigaction 67 | ||
81 | #define __NR_sgetmask 68 | ||
82 | #define __NR_ssetmask 69 | ||
83 | #define __NR_setreuid 70 | ||
84 | #define __NR_setregid 71 | ||
85 | #define __NR_sigsuspend 72 | ||
86 | #define __NR_sigpending 73 | ||
87 | #define __NR_sethostname 74 | ||
88 | #define __NR_setrlimit 75 | ||
89 | #define __NR_getrlimit 76 | ||
90 | #define __NR_getrusage 77 | ||
91 | #define __NR_gettimeofday 78 | ||
92 | #define __NR_settimeofday 79 | ||
93 | #define __NR_getgroups 80 | ||
94 | #define __NR_setgroups 81 | ||
95 | #define __NR_select 82 | ||
96 | #define __NR_symlink 83 | ||
97 | #define __NR_oldlstat 84 | ||
98 | #define __NR_readlink 85 | ||
99 | #define __NR_uselib 86 | ||
100 | #define __NR_swapon 87 | ||
101 | #define __NR_reboot 88 | ||
102 | #define __NR_readdir 89 | ||
103 | #define __NR_mmap 90 | ||
104 | #define __NR_munmap 91 | ||
105 | #define __NR_truncate 92 | ||
106 | #define __NR_ftruncate 93 | ||
107 | #define __NR_fchmod 94 | ||
108 | #define __NR_fchown 95 | ||
109 | #define __NR_getpriority 96 | ||
110 | #define __NR_setpriority 97 | ||
111 | #define __NR_profil 98 | ||
112 | #define __NR_statfs 99 | ||
113 | #define __NR_fstatfs 100 | ||
114 | #define __NR_ioperm 101 | ||
115 | #define __NR_socketcall 102 | ||
116 | #define __NR_syslog 103 | ||
117 | #define __NR_setitimer 104 | ||
118 | #define __NR_getitimer 105 | ||
119 | #define __NR_stat 106 | ||
120 | #define __NR_lstat 107 | ||
121 | #define __NR_fstat 108 | ||
122 | #define __NR_olduname 109 | ||
123 | #define __NR_iopl 110 | ||
124 | #define __NR_vhangup 111 | ||
125 | #define __NR_idle 112 | ||
126 | #define __NR_vm86 113 | ||
127 | #define __NR_wait4 114 | ||
128 | #define __NR_swapoff 115 | ||
129 | #define __NR_sysinfo 116 | ||
130 | #define __NR_ipc 117 | ||
131 | #define __NR_fsync 118 | ||
132 | #define __NR_sigreturn 119 | ||
133 | #define __NR_clone 120 | ||
134 | #define __NR_setdomainname 121 | ||
135 | #define __NR_uname 122 | ||
136 | #define __NR_modify_ldt 123 | ||
137 | #define __NR_adjtimex 124 | ||
138 | #define __NR_mprotect 125 | ||
139 | #define __NR_sigprocmask 126 | ||
140 | #define __NR_create_module 127 | ||
141 | #define __NR_init_module 128 | ||
142 | #define __NR_delete_module 129 | ||
143 | #define __NR_get_kernel_syms 130 | ||
144 | #define __NR_quotactl 131 | ||
145 | #define __NR_getpgid 132 | ||
146 | #define __NR_fchdir 133 | ||
147 | #define __NR_bdflush 134 | ||
148 | #define __NR_sysfs 135 | ||
149 | #define __NR_personality 136 | ||
150 | #define __NR_afs_syscall 137 /* Syscall for Andrew File System */ | ||
151 | #define __NR_setfsuid 138 | ||
152 | #define __NR_setfsgid 139 | ||
153 | #define __NR__llseek 140 | ||
154 | #define __NR_getdents 141 | ||
155 | #define __NR__newselect 142 | ||
156 | #define __NR_flock 143 | ||
157 | #define __NR_msync 144 | ||
158 | #define __NR_readv 145 | ||
159 | #define __NR_writev 146 | ||
160 | #define __NR_getsid 147 | ||
161 | #define __NR_fdatasync 148 | ||
162 | #define __NR__sysctl 149 | ||
163 | #define __NR_mlock 150 | ||
164 | #define __NR_munlock 151 | ||
165 | #define __NR_mlockall 152 | ||
166 | #define __NR_munlockall 153 | ||
167 | #define __NR_sched_setparam 154 | ||
168 | #define __NR_sched_getparam 155 | ||
169 | #define __NR_sched_setscheduler 156 | ||
170 | #define __NR_sched_getscheduler 157 | ||
171 | #define __NR_sched_yield 158 | ||
172 | #define __NR_sched_get_priority_max 159 | ||
173 | #define __NR_sched_get_priority_min 160 | ||
174 | #define __NR_sched_rr_get_interval 161 | ||
175 | #define __NR_nanosleep 162 | ||
176 | #define __NR_mremap 163 | ||
177 | #define __NR_setresuid 164 | ||
178 | #define __NR_getresuid 165 | ||
179 | #define __NR_query_module 166 | ||
180 | #define __NR_poll 167 | ||
181 | #define __NR_nfsservctl 168 | ||
182 | #define __NR_setresgid 169 | ||
183 | #define __NR_getresgid 170 | ||
184 | #define __NR_prctl 171 | ||
185 | #define __NR_rt_sigreturn 172 | ||
186 | #define __NR_rt_sigaction 173 | ||
187 | #define __NR_rt_sigprocmask 174 | ||
188 | #define __NR_rt_sigpending 175 | ||
189 | #define __NR_rt_sigtimedwait 176 | ||
190 | #define __NR_rt_sigqueueinfo 177 | ||
191 | #define __NR_rt_sigsuspend 178 | ||
192 | #define __NR_pread64 179 | ||
193 | #define __NR_pwrite64 180 | ||
194 | #define __NR_chown 181 | ||
195 | #define __NR_getcwd 182 | ||
196 | #define __NR_capget 183 | ||
197 | #define __NR_capset 184 | ||
198 | #define __NR_sigaltstack 185 | ||
199 | #define __NR_sendfile 186 | ||
200 | #define __NR_getpmsg 187 /* some people actually want streams */ | ||
201 | #define __NR_putpmsg 188 /* some people actually want streams */ | ||
202 | #define __NR_vfork 189 | ||
203 | #define __NR_ugetrlimit 190 /* SuS compliant getrlimit */ | ||
204 | #define __NR_readahead 191 | ||
205 | /* #define __NR_mmap2 192 32bit only */ | ||
206 | /* #define __NR_truncate64 193 32bit only */ | ||
207 | /* #define __NR_ftruncate64 194 32bit only */ | ||
208 | /* #define __NR_stat64 195 32bit only */ | ||
209 | /* #define __NR_lstat64 196 32bit only */ | ||
210 | /* #define __NR_fstat64 197 32bit only */ | ||
211 | #define __NR_pciconfig_read 198 | ||
212 | #define __NR_pciconfig_write 199 | ||
213 | #define __NR_pciconfig_iobase 200 | ||
214 | #define __NR_multiplexer 201 | ||
215 | #define __NR_getdents64 202 | ||
216 | #define __NR_pivot_root 203 | ||
217 | /* #define __NR_fcntl64 204 32bit only */ | ||
218 | #define __NR_madvise 205 | ||
219 | #define __NR_mincore 206 | ||
220 | #define __NR_gettid 207 | ||
221 | #define __NR_tkill 208 | ||
222 | #define __NR_setxattr 209 | ||
223 | #define __NR_lsetxattr 210 | ||
224 | #define __NR_fsetxattr 211 | ||
225 | #define __NR_getxattr 212 | ||
226 | #define __NR_lgetxattr 213 | ||
227 | #define __NR_fgetxattr 214 | ||
228 | #define __NR_listxattr 215 | ||
229 | #define __NR_llistxattr 216 | ||
230 | #define __NR_flistxattr 217 | ||
231 | #define __NR_removexattr 218 | ||
232 | #define __NR_lremovexattr 219 | ||
233 | #define __NR_fremovexattr 220 | ||
234 | #define __NR_futex 221 | ||
235 | #define __NR_sched_setaffinity 222 | ||
236 | #define __NR_sched_getaffinity 223 | ||
237 | /* 224 currently unused */ | ||
238 | #define __NR_tuxcall 225 | ||
239 | /* #define __NR_sendfile64 226 32bit only */ | ||
240 | #define __NR_io_setup 227 | ||
241 | #define __NR_io_destroy 228 | ||
242 | #define __NR_io_getevents 229 | ||
243 | #define __NR_io_submit 230 | ||
244 | #define __NR_io_cancel 231 | ||
245 | #define __NR_set_tid_address 232 | ||
246 | #define __NR_fadvise64 233 | ||
247 | #define __NR_exit_group 234 | ||
248 | #define __NR_lookup_dcookie 235 | ||
249 | #define __NR_epoll_create 236 | ||
250 | #define __NR_epoll_ctl 237 | ||
251 | #define __NR_epoll_wait 238 | ||
252 | #define __NR_remap_file_pages 239 | ||
253 | #define __NR_timer_create 240 | ||
254 | #define __NR_timer_settime 241 | ||
255 | #define __NR_timer_gettime 242 | ||
256 | #define __NR_timer_getoverrun 243 | ||
257 | #define __NR_timer_delete 244 | ||
258 | #define __NR_clock_settime 245 | ||
259 | #define __NR_clock_gettime 246 | ||
260 | #define __NR_clock_getres 247 | ||
261 | #define __NR_clock_nanosleep 248 | ||
262 | #define __NR_swapcontext 249 | ||
263 | #define __NR_tgkill 250 | ||
264 | #define __NR_utimes 251 | ||
265 | #define __NR_statfs64 252 | ||
266 | #define __NR_fstatfs64 253 | ||
267 | /* #define __NR_fadvise64_64 254 32bit only */ | ||
268 | #define __NR_rtas 255 | ||
269 | /* Number 256 is reserved for sys_debug_setcontext */ | ||
270 | /* Number 257 is reserved for vserver */ | ||
271 | /* 258 currently unused */ | ||
272 | #define __NR_mbind 259 | ||
273 | #define __NR_get_mempolicy 260 | ||
274 | #define __NR_set_mempolicy 261 | ||
275 | #define __NR_mq_open 262 | ||
276 | #define __NR_mq_unlink 263 | ||
277 | #define __NR_mq_timedsend 264 | ||
278 | #define __NR_mq_timedreceive 265 | ||
279 | #define __NR_mq_notify 266 | ||
280 | #define __NR_mq_getsetattr 267 | ||
281 | #define __NR_kexec_load 268 | ||
282 | #define __NR_add_key 269 | ||
283 | #define __NR_request_key 270 | ||
284 | #define __NR_keyctl 271 | ||
285 | #define __NR_waitid 272 | ||
286 | #define __NR_ioprio_set 273 | ||
287 | #define __NR_ioprio_get 274 | ||
288 | #define __NR_inotify_init 275 | ||
289 | #define __NR_inotify_add_watch 276 | ||
290 | #define __NR_inotify_rm_watch 277 | ||
291 | |||
292 | #define __NR_syscalls 278 | ||
293 | #ifdef __KERNEL__ | ||
294 | #define NR_syscalls __NR_syscalls | ||
295 | #endif | ||
296 | |||
297 | #ifndef __ASSEMBLY__ | ||
298 | |||
299 | /* On powerpc a system call basically clobbers the same registers like a | ||
300 | * function call, with the exception of LR (which is needed for the | ||
301 | * "sc; bnslr" sequence) and CR (where only CR0.SO is clobbered to signal | ||
302 | * an error return status). | ||
303 | */ | ||
304 | |||
305 | #define __syscall_nr(nr, type, name, args...) \ | ||
306 | unsigned long __sc_ret, __sc_err; \ | ||
307 | { \ | ||
308 | register unsigned long __sc_0 __asm__ ("r0"); \ | ||
309 | register unsigned long __sc_3 __asm__ ("r3"); \ | ||
310 | register unsigned long __sc_4 __asm__ ("r4"); \ | ||
311 | register unsigned long __sc_5 __asm__ ("r5"); \ | ||
312 | register unsigned long __sc_6 __asm__ ("r6"); \ | ||
313 | register unsigned long __sc_7 __asm__ ("r7"); \ | ||
314 | register unsigned long __sc_8 __asm__ ("r8"); \ | ||
315 | \ | ||
316 | __sc_loadargs_##nr(name, args); \ | ||
317 | __asm__ __volatile__ \ | ||
318 | ("sc \n\t" \ | ||
319 | "mfcr %0 " \ | ||
320 | : "=&r" (__sc_0), \ | ||
321 | "=&r" (__sc_3), "=&r" (__sc_4), \ | ||
322 | "=&r" (__sc_5), "=&r" (__sc_6), \ | ||
323 | "=&r" (__sc_7), "=&r" (__sc_8) \ | ||
324 | : __sc_asm_input_##nr \ | ||
325 | : "cr0", "ctr", "memory", \ | ||
326 | "r9", "r10","r11", "r12"); \ | ||
327 | __sc_ret = __sc_3; \ | ||
328 | __sc_err = __sc_0; \ | ||
329 | } \ | ||
330 | if (__sc_err & 0x10000000) \ | ||
331 | { \ | ||
332 | errno = __sc_ret; \ | ||
333 | __sc_ret = -1; \ | ||
334 | } \ | ||
335 | return (type) __sc_ret | ||
336 | |||
337 | #define __sc_loadargs_0(name, dummy...) \ | ||
338 | __sc_0 = __NR_##name | ||
339 | #define __sc_loadargs_1(name, arg1) \ | ||
340 | __sc_loadargs_0(name); \ | ||
341 | __sc_3 = (unsigned long) (arg1) | ||
342 | #define __sc_loadargs_2(name, arg1, arg2) \ | ||
343 | __sc_loadargs_1(name, arg1); \ | ||
344 | __sc_4 = (unsigned long) (arg2) | ||
345 | #define __sc_loadargs_3(name, arg1, arg2, arg3) \ | ||
346 | __sc_loadargs_2(name, arg1, arg2); \ | ||
347 | __sc_5 = (unsigned long) (arg3) | ||
348 | #define __sc_loadargs_4(name, arg1, arg2, arg3, arg4) \ | ||
349 | __sc_loadargs_3(name, arg1, arg2, arg3); \ | ||
350 | __sc_6 = (unsigned long) (arg4) | ||
351 | #define __sc_loadargs_5(name, arg1, arg2, arg3, arg4, arg5) \ | ||
352 | __sc_loadargs_4(name, arg1, arg2, arg3, arg4); \ | ||
353 | __sc_7 = (unsigned long) (arg5) | ||
354 | #define __sc_loadargs_6(name, arg1, arg2, arg3, arg4, arg5, arg6) \ | ||
355 | __sc_loadargs_5(name, arg1, arg2, arg3, arg4, arg5); \ | ||
356 | __sc_8 = (unsigned long) (arg6) | ||
357 | |||
358 | #define __sc_asm_input_0 "0" (__sc_0) | ||
359 | #define __sc_asm_input_1 __sc_asm_input_0, "1" (__sc_3) | ||
360 | #define __sc_asm_input_2 __sc_asm_input_1, "2" (__sc_4) | ||
361 | #define __sc_asm_input_3 __sc_asm_input_2, "3" (__sc_5) | ||
362 | #define __sc_asm_input_4 __sc_asm_input_3, "4" (__sc_6) | ||
363 | #define __sc_asm_input_5 __sc_asm_input_4, "5" (__sc_7) | ||
364 | #define __sc_asm_input_6 __sc_asm_input_5, "6" (__sc_8) | ||
365 | |||
366 | #define _syscall0(type,name) \ | ||
367 | type name(void) \ | ||
368 | { \ | ||
369 | __syscall_nr(0, type, name); \ | ||
370 | } | ||
371 | |||
372 | #define _syscall1(type,name,type1,arg1) \ | ||
373 | type name(type1 arg1) \ | ||
374 | { \ | ||
375 | __syscall_nr(1, type, name, arg1); \ | ||
376 | } | ||
377 | |||
378 | #define _syscall2(type,name,type1,arg1,type2,arg2) \ | ||
379 | type name(type1 arg1, type2 arg2) \ | ||
380 | { \ | ||
381 | __syscall_nr(2, type, name, arg1, arg2); \ | ||
382 | } | ||
383 | |||
384 | #define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \ | ||
385 | type name(type1 arg1, type2 arg2, type3 arg3) \ | ||
386 | { \ | ||
387 | __syscall_nr(3, type, name, arg1, arg2, arg3); \ | ||
388 | } | ||
389 | |||
390 | #define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \ | ||
391 | type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4) \ | ||
392 | { \ | ||
393 | __syscall_nr(4, type, name, arg1, arg2, arg3, arg4); \ | ||
394 | } | ||
395 | |||
396 | #define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \ | ||
397 | type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \ | ||
398 | { \ | ||
399 | __syscall_nr(5, type, name, arg1, arg2, arg3, arg4, arg5); \ | ||
400 | } | ||
401 | #define _syscall6(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5,type6,arg6) \ | ||
402 | type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6) \ | ||
403 | { \ | ||
404 | __syscall_nr(6, type, name, arg1, arg2, arg3, arg4, arg5, arg6); \ | ||
405 | } | ||
406 | |||
407 | #ifdef __KERNEL_SYSCALLS__ | ||
408 | |||
409 | /* | ||
410 | * Forking from kernel space will result in the child getting a new, | ||
411 | * empty kernel stack area. Thus the child cannot access automatic | ||
412 | * variables set in the parent unless they are in registers, and the | ||
413 | * procedure where the fork was done cannot return to its caller in | ||
414 | * the child. | ||
415 | */ | ||
416 | |||
417 | /* | ||
418 | * System call prototypes. | ||
419 | */ | ||
420 | static inline _syscall3(int, execve, __const__ char *, file, char **, argv, | ||
421 | char **,envp) | ||
422 | |||
423 | #endif /* __KERNEL_SYSCALLS__ */ | ||
424 | |||
425 | #ifdef __KERNEL__ | ||
426 | |||
427 | #include <linux/types.h> | ||
428 | #include <linux/compiler.h> | ||
429 | #include <linux/linkage.h> | ||
430 | |||
431 | #define __ARCH_WANT_IPC_PARSE_VERSION | ||
432 | #define __ARCH_WANT_OLD_READDIR | ||
433 | #define __ARCH_WANT_STAT64 | ||
434 | #define __ARCH_WANT_SYS_ALARM | ||
435 | #define __ARCH_WANT_SYS_GETHOSTNAME | ||
436 | #define __ARCH_WANT_SYS_PAUSE | ||
437 | #define __ARCH_WANT_SYS_SGETMASK | ||
438 | #define __ARCH_WANT_SYS_SIGNAL | ||
439 | #define __ARCH_WANT_SYS_TIME | ||
440 | #define __ARCH_WANT_COMPAT_SYS_TIME | ||
441 | #define __ARCH_WANT_SYS_UTIME | ||
442 | #define __ARCH_WANT_SYS_WAITPID | ||
443 | #define __ARCH_WANT_SYS_SOCKETCALL | ||
444 | #define __ARCH_WANT_SYS_FADVISE64 | ||
445 | #define __ARCH_WANT_SYS_GETPGRP | ||
446 | #define __ARCH_WANT_SYS_LLSEEK | ||
447 | #define __ARCH_WANT_SYS_NICE | ||
448 | #define __ARCH_WANT_SYS_OLD_GETRLIMIT | ||
449 | #define __ARCH_WANT_SYS_OLDUMOUNT | ||
450 | #define __ARCH_WANT_SYS_SIGPENDING | ||
451 | #define __ARCH_WANT_SYS_SIGPROCMASK | ||
452 | #define __ARCH_WANT_SYS_RT_SIGACTION | ||
453 | |||
454 | unsigned long sys_mmap(unsigned long addr, size_t len, unsigned long prot, | ||
455 | unsigned long flags, unsigned long fd, off_t offset); | ||
456 | struct pt_regs; | ||
457 | int sys_execve(unsigned long a0, unsigned long a1, unsigned long a2, | ||
458 | unsigned long a3, unsigned long a4, unsigned long a5, | ||
459 | struct pt_regs *regs); | ||
460 | int sys_clone(unsigned long clone_flags, unsigned long p2, unsigned long p3, | ||
461 | unsigned long p4, unsigned long p5, unsigned long p6, | ||
462 | struct pt_regs *regs); | ||
463 | int sys_fork(unsigned long p1, unsigned long p2, unsigned long p3, | ||
464 | unsigned long p4, unsigned long p5, unsigned long p6, | ||
465 | struct pt_regs *regs); | ||
466 | int sys_vfork(unsigned long p1, unsigned long p2, unsigned long p3, | ||
467 | unsigned long p4, unsigned long p5, unsigned long p6, | ||
468 | struct pt_regs *regs); | ||
469 | int sys_pipe(int __user *fildes); | ||
470 | int sys_ptrace(long request, long pid, long addr, long data); | ||
471 | struct sigaction; | ||
472 | long sys_rt_sigaction(int sig, const struct sigaction __user *act, | ||
473 | struct sigaction __user *oact, size_t sigsetsize); | ||
474 | |||
475 | /* | ||
476 | * "Conditional" syscalls | ||
477 | * | ||
478 | * What we want is __attribute__((weak,alias("sys_ni_syscall"))), | ||
479 | * but it doesn't work on all toolchains, so we just do it by hand | ||
480 | */ | ||
481 | #define cond_syscall(x) asm(".weak\t." #x "\n\t.set\t." #x ",.sys_ni_syscall") | ||
482 | |||
483 | #endif /* __KERNEL__ */ | ||
484 | |||
485 | #endif /* __ASSEMBLY__ */ | ||
486 | |||
487 | #endif /* _ASM_PPC_UNISTD_H_ */ | ||
diff --git a/include/asm-ppc64/vga.h b/include/asm-ppc64/vga.h deleted file mode 100644 index c09849743f45..000000000000 --- a/include/asm-ppc64/vga.h +++ /dev/null | |||
@@ -1,50 +0,0 @@ | |||
1 | /* | ||
2 | * Access to VGA videoram | ||
3 | * | ||
4 | * (c) 1998 Martin Mares <mj@ucw.cz> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _LINUX_ASM_VGA_H_ | ||
13 | #define _LINUX_ASM_VGA_H_ | ||
14 | |||
15 | #include <asm/io.h> | ||
16 | |||
17 | #include <linux/config.h> | ||
18 | |||
19 | #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_MDA_CONSOLE) | ||
20 | |||
21 | #define VT_BUF_HAVE_RW | ||
22 | /* | ||
23 | * These are only needed for supporting VGA or MDA text mode, which use little | ||
24 | * endian byte ordering. | ||
25 | * In other cases, we can optimize by using native byte ordering and | ||
26 | * <linux/vt_buffer.h> has already done the right job for us. | ||
27 | */ | ||
28 | |||
29 | static inline void scr_writew(u16 val, volatile u16 *addr) | ||
30 | { | ||
31 | st_le16(addr, val); | ||
32 | } | ||
33 | |||
34 | static inline u16 scr_readw(volatile const u16 *addr) | ||
35 | { | ||
36 | return ld_le16(addr); | ||
37 | } | ||
38 | |||
39 | #define VT_BUF_HAVE_MEMCPYW | ||
40 | #define scr_memcpyw memcpy | ||
41 | |||
42 | #endif /* !CONFIG_VGA_CONSOLE && !CONFIG_MDA_CONSOLE */ | ||
43 | |||
44 | extern unsigned long vgacon_remap_base; | ||
45 | #define VGA_MAP_MEM(x) ((unsigned long) ioremap((x), 0)) | ||
46 | |||
47 | #define vga_readb(x) (*(x)) | ||
48 | #define vga_writeb(x,y) (*(y) = (x)) | ||
49 | |||
50 | #endif | ||
diff --git a/include/asm-ppc64/vio.h b/include/asm-ppc64/vio.h deleted file mode 100644 index 03f1b95f433b..000000000000 --- a/include/asm-ppc64/vio.h +++ /dev/null | |||
@@ -1,106 +0,0 @@ | |||
1 | /* | ||
2 | * IBM PowerPC Virtual I/O Infrastructure Support. | ||
3 | * | ||
4 | * Copyright (c) 2003 IBM Corp. | ||
5 | * Dave Engebretsen engebret@us.ibm.com | ||
6 | * Santiago Leon santil@us.ibm.com | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License | ||
10 | * as published by the Free Software Foundation; either version | ||
11 | * 2 of the License, or (at your option) any later version. | ||
12 | */ | ||
13 | |||
14 | #ifndef _ASM_VIO_H | ||
15 | #define _ASM_VIO_H | ||
16 | |||
17 | #include <linux/config.h> | ||
18 | #include <linux/init.h> | ||
19 | #include <linux/errno.h> | ||
20 | #include <linux/device.h> | ||
21 | #include <linux/dma-mapping.h> | ||
22 | #include <linux/mod_devicetable.h> | ||
23 | |||
24 | #include <asm/hvcall.h> | ||
25 | #include <asm/scatterlist.h> | ||
26 | |||
27 | /* | ||
28 | * Architecture-specific constants for drivers to | ||
29 | * extract attributes of the device using vio_get_attribute() | ||
30 | */ | ||
31 | #define VETH_MAC_ADDR "local-mac-address" | ||
32 | #define VETH_MCAST_FILTER_SIZE "ibm,mac-address-filters" | ||
33 | |||
34 | /* End architecture-specific constants */ | ||
35 | |||
36 | #define h_vio_signal(ua, mode) \ | ||
37 | plpar_hcall_norets(H_VIO_SIGNAL, ua, mode) | ||
38 | |||
39 | #define VIO_IRQ_DISABLE 0UL | ||
40 | #define VIO_IRQ_ENABLE 1UL | ||
41 | |||
42 | struct iommu_table; | ||
43 | |||
44 | /* | ||
45 | * The vio_dev structure is used to describe virtual I/O devices. | ||
46 | */ | ||
47 | struct vio_dev { | ||
48 | struct iommu_table *iommu_table; /* vio_map_* uses this */ | ||
49 | char *name; | ||
50 | char *type; | ||
51 | uint32_t unit_address; | ||
52 | unsigned int irq; | ||
53 | struct device dev; | ||
54 | }; | ||
55 | |||
56 | struct vio_driver { | ||
57 | struct list_head node; | ||
58 | char *name; | ||
59 | const struct vio_device_id *id_table; | ||
60 | int (*probe)(struct vio_dev *dev, const struct vio_device_id *id); | ||
61 | int (*remove)(struct vio_dev *dev); | ||
62 | unsigned long driver_data; | ||
63 | struct device_driver driver; | ||
64 | }; | ||
65 | |||
66 | struct vio_bus_ops { | ||
67 | int (*match)(const struct vio_device_id *id, const struct vio_dev *dev); | ||
68 | void (*unregister_device)(struct vio_dev *); | ||
69 | void (*release_device)(struct device *); | ||
70 | }; | ||
71 | |||
72 | extern struct dma_mapping_ops vio_dma_ops; | ||
73 | extern struct bus_type vio_bus_type; | ||
74 | extern struct vio_dev vio_bus_device; | ||
75 | |||
76 | extern int vio_register_driver(struct vio_driver *drv); | ||
77 | extern void vio_unregister_driver(struct vio_driver *drv); | ||
78 | |||
79 | extern struct vio_dev * __devinit vio_register_device(struct vio_dev *viodev); | ||
80 | extern void __devinit vio_unregister_device(struct vio_dev *dev); | ||
81 | |||
82 | extern int vio_bus_init(struct vio_bus_ops *); | ||
83 | |||
84 | #ifdef CONFIG_PPC_PSERIES | ||
85 | struct device_node; | ||
86 | |||
87 | extern struct vio_dev * __devinit vio_register_device_node( | ||
88 | struct device_node *node_vdev); | ||
89 | extern struct vio_dev *vio_find_node(struct device_node *vnode); | ||
90 | extern const void *vio_get_attribute(struct vio_dev *vdev, void *which, | ||
91 | int *length); | ||
92 | extern int vio_enable_interrupts(struct vio_dev *dev); | ||
93 | extern int vio_disable_interrupts(struct vio_dev *dev); | ||
94 | #endif | ||
95 | |||
96 | static inline struct vio_driver *to_vio_driver(struct device_driver *drv) | ||
97 | { | ||
98 | return container_of(drv, struct vio_driver, driver); | ||
99 | } | ||
100 | |||
101 | static inline struct vio_dev *to_vio_dev(struct device *dev) | ||
102 | { | ||
103 | return container_of(dev, struct vio_dev, dev); | ||
104 | } | ||
105 | |||
106 | #endif /* _ASM_VIO_H */ | ||
diff --git a/include/asm-ppc64/xics.h b/include/asm-ppc64/xics.h deleted file mode 100644 index 1092af55d707..000000000000 --- a/include/asm-ppc64/xics.h +++ /dev/null | |||
@@ -1,34 +0,0 @@ | |||
1 | /* | ||
2 | * arch/ppc64/kernel/xics.h | ||
3 | * | ||
4 | * Copyright 2000 IBM Corporation. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #ifndef _PPC64_KERNEL_XICS_H | ||
13 | #define _PPC64_KERNEL_XICS_H | ||
14 | |||
15 | #include <linux/cache.h> | ||
16 | |||
17 | void xics_init_IRQ(void); | ||
18 | int xics_get_irq(struct pt_regs *); | ||
19 | void xics_setup_cpu(void); | ||
20 | void xics_teardown_cpu(int secondary); | ||
21 | void xics_cause_IPI(int cpu); | ||
22 | void xics_request_IPIs(void); | ||
23 | void xics_migrate_irqs_away(void); | ||
24 | |||
25 | /* first argument is ignored for now*/ | ||
26 | void pSeriesLP_cppr_info(int n_cpu, u8 value); | ||
27 | |||
28 | struct xics_ipi_struct { | ||
29 | volatile unsigned long value; | ||
30 | } ____cacheline_aligned; | ||
31 | |||
32 | extern struct xics_ipi_struct xics_ipi_message[NR_CPUS] __cacheline_aligned; | ||
33 | |||
34 | #endif /* _PPC64_KERNEL_XICS_H */ | ||