Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6: (74 commits)
  Blackfin serial driver: pending a unique anomaly id, tie the break flood issue to ANOMALY_05000230
  blackfin enable arbitary speed serial setting
  Blackfin arch: Remove cruft - CONFIG_DEBUG_SERIAL_EARLY_INIT and DEBUG_KERNEL_START
  Blackfin arch: fix typo in register name
  Blackfin arch: trim the Blackfin arch MAINTAINERS list
  Blackfin arch: fix bug libstdc++ calling writev with an iovec containing { NULL, 0 } fails on Blackfin
  Blackfin arch: Export strcpy - occasionally get module link failures otherwise
  Blackfin arch: the load address is not safe to point to as a workaround for ANOMALY 05000281
  Blackfin arch: show_mem can not be marked as init, since it is called during OOM condition
  Blackfin arch: flush/inv the correct range when using write back cache and fix bugs find by dmacopy
  Blackfin arch: update kgdb patch
  Blackfin arch: Comply with revised Anomaly Workarounds for BF533 05000311 and BF561 05000323
  Blackfin arch: Print out debug info, as early as possible
  Blackfin arch: Enable earlyprintk earlier - so any error after our interrupt tables are set up will print out
  Blackfin arch: fix endless loop bug when a double fault happens
  Blackfin arch: Initial patch to add earlyprintk support
  Blackfin arch: add TWIx_REGBASE and SPIx_REGBASE to specific CPU header files, use the new REGBASE for board platform resources
  Blackfin arch: modify the insX/outsX and dma_insX/dma_outsX to be compatible with other archs
  Blackfin arch: add more common defines for output sections
  Blackfin arch: cleanup IO and DMA_IO API function definitions according to other arches
  ...

1 files changed, 3 insertions, 1 deletions

diff --git a/include/asm-blackfin/mach-bf537/defBF534.h b/include/asm-blackfin/mach-bf537/defBF534.h
index 1859f2fee5a7..d0d80d3152ba 100644
--- a/include/asm-blackfin/mach-bf537/defBF534.h
+++ b/include/asm-blackfin/mach-bf537/defBF534.h
@@ -86,6 +86,7 @@
 #define UART0_GCTL                      0xFFC00424      /* Global Control Register                                      */
 
 /* SPI Controller                       (0xFFC00500 - 0xFFC005FF)                                                               */
+#define SPI0_REGBASE                    0xFFC00500
 #define SPI_CTL                         0xFFC00500      /* SPI Control Register                                         */
 #define SPI_FLG                         0xFFC00504      /* SPI Flag register                                            */
 #define SPI_STAT                        0xFFC00508      /* SPI Status register                                          */
@@ -456,6 +457,7 @@
 #define PPI_FRAME                       0xFFC01010      /* PPI Frame Length Register    */
 
 /* Two-Wire Interface           (0xFFC01400 - 0xFFC014FF)                                                               */
+#define TWI0_REGBASE                    0xFFC01400
 #define TWI_CLKDIV                      0xFFC01400      /* Serial Clock Divider Register                        */
 #define TWI_CONTROL                     0xFFC01404      /* TWI Control Register                                         */
 #define TWI_SLAVE_CTL           0xFFC01408      /* Slave Mode Control Register                          */
@@ -1165,7 +1167,7 @@
 #define GM                      0x0008  /* Get More (When RDBR Full, Overwrite/Discard*)        */
 #define PSSE            0x0010  /* Slave-Select Input Enable                                            */
 #define EMISO           0x0020  /* Enable MISO As Output                                                        */
-#define SPI_SIZE        0x0100  /* Size of Words (16/8* Bits)                                           */
+#define SIZE            0x0100  /* Size of Words (16/8* Bits)                                           */
 #define LSBF            0x0200  /* LSB First                                                                            */
 #define CPHA            0x0400  /* Clock Phase                                                                          */
 #define CPOL            0x0800  /* Clock Polarity                                                                       */