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authorChris Wilson <chris@chris-wilson.co.uk>2012-04-30 14:35:02 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-05-02 08:37:52 -0400
commite90f3b61f4432e3c5bb6b57f4b3e8d8cba747541 (patch)
tree1e53d0066d7d1c74409ceee36c3c4f727c49f9da /drivers
parent074b5e1a99fb5017122591d70098601e0484ca6a (diff)
drm/i915: Only enable IPS polling for gen5
On SandyBridge IPS was entirely implemented in hardware and not reliant on the driver monitoring power consumption and feeding back desired run states, so the hardware is able to adapt quicker and more flexibly. Which is a huge relief for us as we no longer have to carry empirically derived magic algorithms. Yet despite the advance in technology, the driver was still doing its IPS polling on all machines. Restrict it to the only supported hardware, Clarkdale/Arrandale. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Tested-by: Andrey Rahmatullin <wrar@wrar.name> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=49025 Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/i915/i915_debugfs.c3
-rw-r--r--drivers/gpu/drm/i915/i915_dma.c15
2 files changed, 13 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index b505b70dba05..e6162a1681f0 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1224,6 +1224,9 @@ static int i915_emon_status(struct seq_file *m, void *unused)
1224 unsigned long temp, chipset, gfx; 1224 unsigned long temp, chipset, gfx;
1225 int ret; 1225 int ret;
1226 1226
1227 if (!IS_GEN5(dev))
1228 return -ENODEV;
1229
1227 ret = mutex_lock_interruptible(&dev->struct_mutex); 1230 ret = mutex_lock_interruptible(&dev->struct_mutex);
1228 if (ret) 1231 if (ret)
1229 return ret; 1232 return ret;
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 785f67f963ef..ba60f3c8f911 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1701,6 +1701,9 @@ void i915_update_gfx_val(struct drm_i915_private *dev_priv)
1701 unsigned long diffms; 1701 unsigned long diffms;
1702 u32 count; 1702 u32 count;
1703 1703
1704 if (dev_priv->info->gen != 5)
1705 return;
1706
1704 getrawmonotonic(&now); 1707 getrawmonotonic(&now);
1705 diff1 = timespec_sub(now, dev_priv->last_time2); 1708 diff1 = timespec_sub(now, dev_priv->last_time2);
1706 1709
@@ -2121,12 +2124,14 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
2121 setup_timer(&dev_priv->hangcheck_timer, i915_hangcheck_elapsed, 2124 setup_timer(&dev_priv->hangcheck_timer, i915_hangcheck_elapsed,
2122 (unsigned long) dev); 2125 (unsigned long) dev);
2123 2126
2124 spin_lock(&mchdev_lock); 2127 if (IS_GEN5(dev)) {
2125 i915_mch_dev = dev_priv; 2128 spin_lock(&mchdev_lock);
2126 dev_priv->mchdev_lock = &mchdev_lock; 2129 i915_mch_dev = dev_priv;
2127 spin_unlock(&mchdev_lock); 2130 dev_priv->mchdev_lock = &mchdev_lock;
2131 spin_unlock(&mchdev_lock);
2128 2132
2129 ips_ping_for_i915_load(); 2133 ips_ping_for_i915_load();
2134 }
2130 2135
2131 return 0; 2136 return 0;
2132 2137