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authorPJ Waskiewicz <peter.p.waskiewicz.jr@intel.com>2009-03-25 18:10:42 -0400
committerDavid S. Miller <davem@davemloft.net>2009-03-26 04:13:51 -0400
commitbb3daa4a5960cd9d39bad88679fcf587b456c05d (patch)
tree31cbdf87fed0af126ff0c3e0647dfa90aab8a7c7 /drivers
parentede5ad0e29b641c3d3a644272a9127bfd98dfcc8 (diff)
ixgbe: Allow Priority Flow Control settings to survive a device reset
When changing DCB parameters, ixgbe needs to have the MAC reset. The way the flow control code is setup today, PFC will be disabled on a reset. This patch adds a new flow control type for PFC, and then has the netlink layer take care of toggling which type of flow control to enable. Signed-off-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/ixgbe/ixgbe_common.c23
-rw-r--r--drivers/net/ixgbe/ixgbe_dcb_82598.c1
-rw-r--r--drivers/net/ixgbe/ixgbe_dcb_82599.c3
-rw-r--r--drivers/net/ixgbe/ixgbe_dcb_nl.c2
-rw-r--r--drivers/net/ixgbe/ixgbe_type.h3
5 files changed, 26 insertions, 6 deletions
diff --git a/drivers/net/ixgbe/ixgbe_common.c b/drivers/net/ixgbe/ixgbe_common.c
index 245db0e712e7..8cfd3fd309a0 100644
--- a/drivers/net/ixgbe/ixgbe_common.c
+++ b/drivers/net/ixgbe/ixgbe_common.c
@@ -1654,9 +1654,10 @@ s32 ixgbe_fc_enable(struct ixgbe_hw *hw, s32 packetbuf_num)
1654 * 0: Flow control is completely disabled 1654 * 0: Flow control is completely disabled
1655 * 1: Rx flow control is enabled (we can receive pause frames, 1655 * 1: Rx flow control is enabled (we can receive pause frames,
1656 * but not send pause frames). 1656 * but not send pause frames).
1657 * 2: Tx flow control is enabled (we can send pause frames but 1657 * 2: Tx flow control is enabled (we can send pause frames but
1658 * we do not support receiving pause frames). 1658 * we do not support receiving pause frames).
1659 * 3: Both Rx and Tx flow control (symmetric) are enabled. 1659 * 3: Both Rx and Tx flow control (symmetric) are enabled.
1660 * 4: Priority Flow Control is enabled.
1660 * other: Invalid. 1661 * other: Invalid.
1661 */ 1662 */
1662 switch (hw->fc.current_mode) { 1663 switch (hw->fc.current_mode) {
@@ -1686,6 +1687,11 @@ s32 ixgbe_fc_enable(struct ixgbe_hw *hw, s32 packetbuf_num)
1686 mflcn_reg |= IXGBE_MFLCN_RFCE; 1687 mflcn_reg |= IXGBE_MFLCN_RFCE;
1687 fccfg_reg |= IXGBE_FCCFG_TFCE_802_3X; 1688 fccfg_reg |= IXGBE_FCCFG_TFCE_802_3X;
1688 break; 1689 break;
1690#ifdef CONFIG_DCB
1691 case ixgbe_fc_pfc:
1692 goto out;
1693 break;
1694#endif
1689 default: 1695 default:
1690 hw_dbg(hw, "Flow control param set incorrectly\n"); 1696 hw_dbg(hw, "Flow control param set incorrectly\n");
1691 ret_val = -IXGBE_ERR_CONFIG; 1697 ret_val = -IXGBE_ERR_CONFIG;
@@ -1746,6 +1752,7 @@ s32 ixgbe_fc_autoneg(struct ixgbe_hw *hw)
1746 * 2: Tx flow control is enabled (we can send pause frames but 1752 * 2: Tx flow control is enabled (we can send pause frames but
1747 * we do not support receiving pause frames). 1753 * we do not support receiving pause frames).
1748 * 3: Both Rx and Tx flow control (symmetric) are enabled. 1754 * 3: Both Rx and Tx flow control (symmetric) are enabled.
1755 * 4: Priority Flow Control is enabled.
1749 * other: Invalid. 1756 * other: Invalid.
1750 */ 1757 */
1751 switch (hw->fc.current_mode) { 1758 switch (hw->fc.current_mode) {
@@ -1776,6 +1783,11 @@ s32 ixgbe_fc_autoneg(struct ixgbe_hw *hw)
1776 /* Flow control (both Rx and Tx) is enabled by SW override. */ 1783 /* Flow control (both Rx and Tx) is enabled by SW override. */
1777 reg |= (IXGBE_PCS1GANA_SYM_PAUSE | IXGBE_PCS1GANA_ASM_PAUSE); 1784 reg |= (IXGBE_PCS1GANA_SYM_PAUSE | IXGBE_PCS1GANA_ASM_PAUSE);
1778 break; 1785 break;
1786#ifdef CONFIG_DCB
1787 case ixgbe_fc_pfc:
1788 goto out;
1789 break;
1790#endif
1779 default: 1791 default:
1780 hw_dbg(hw, "Flow control param set incorrectly\n"); 1792 hw_dbg(hw, "Flow control param set incorrectly\n");
1781 ret_val = -IXGBE_ERR_CONFIG; 1793 ret_val = -IXGBE_ERR_CONFIG;
@@ -1874,6 +1886,13 @@ s32 ixgbe_setup_fc_generic(struct ixgbe_hw *hw, s32 packetbuf_num)
1874 ixgbe_link_speed speed; 1886 ixgbe_link_speed speed;
1875 bool link_up; 1887 bool link_up;
1876 1888
1889#ifdef CONFIG_DCB
1890 if (hw->fc.requested_mode == ixgbe_fc_pfc) {
1891 hw->fc.current_mode = hw->fc.requested_mode;
1892 goto out;
1893 }
1894
1895#endif
1877 /* Validate the packetbuf configuration */ 1896 /* Validate the packetbuf configuration */
1878 if (packetbuf_num < 0 || packetbuf_num > 7) { 1897 if (packetbuf_num < 0 || packetbuf_num > 7) {
1879 hw_dbg(hw, "Invalid packet buffer number [%d], expected range " 1898 hw_dbg(hw, "Invalid packet buffer number [%d], expected range "
diff --git a/drivers/net/ixgbe/ixgbe_dcb_82598.c b/drivers/net/ixgbe/ixgbe_dcb_82598.c
index df359554d492..62206273d888 100644
--- a/drivers/net/ixgbe/ixgbe_dcb_82598.c
+++ b/drivers/net/ixgbe/ixgbe_dcb_82598.c
@@ -298,7 +298,6 @@ s32 ixgbe_dcb_config_pfc_82598(struct ixgbe_hw *hw,
298 reg = IXGBE_READ_REG(hw, IXGBE_RMCS); 298 reg = IXGBE_READ_REG(hw, IXGBE_RMCS);
299 reg &= ~IXGBE_RMCS_TFCE_802_3X; 299 reg &= ~IXGBE_RMCS_TFCE_802_3X;
300 /* correct the reporting of our flow control status */ 300 /* correct the reporting of our flow control status */
301 hw->fc.current_mode = ixgbe_fc_none;
302 reg |= IXGBE_RMCS_TFCE_PRIORITY; 301 reg |= IXGBE_RMCS_TFCE_PRIORITY;
303 IXGBE_WRITE_REG(hw, IXGBE_RMCS, reg); 302 IXGBE_WRITE_REG(hw, IXGBE_RMCS, reg);
304 303
diff --git a/drivers/net/ixgbe/ixgbe_dcb_82599.c b/drivers/net/ixgbe/ixgbe_dcb_82599.c
index adcbac422634..470b676c1dae 100644
--- a/drivers/net/ixgbe/ixgbe_dcb_82599.c
+++ b/drivers/net/ixgbe/ixgbe_dcb_82599.c
@@ -299,9 +299,6 @@ s32 ixgbe_dcb_config_pfc_82599(struct ixgbe_hw *hw,
299 goto out; 299 goto out;
300 } 300 }
301 301
302 /* PFC is mutually exclusive with link flow control */
303 hw->fc.current_mode = ixgbe_fc_none;
304
305 /* Configure PFC Tx thresholds per TC */ 302 /* Configure PFC Tx thresholds per TC */
306 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) { 303 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
307 /* Config and remember Tx */ 304 /* Config and remember Tx */
diff --git a/drivers/net/ixgbe/ixgbe_dcb_nl.c b/drivers/net/ixgbe/ixgbe_dcb_nl.c
index 8a9939ee2927..0a8731f1f237 100644
--- a/drivers/net/ixgbe/ixgbe_dcb_nl.c
+++ b/drivers/net/ixgbe/ixgbe_dcb_nl.c
@@ -130,6 +130,7 @@ static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state)
130 adapter->tx_ring = NULL; 130 adapter->tx_ring = NULL;
131 adapter->rx_ring = NULL; 131 adapter->rx_ring = NULL;
132 132
133 adapter->hw.fc.requested_mode = ixgbe_fc_pfc;
133 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED; 134 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
134 adapter->flags |= IXGBE_FLAG_DCB_ENABLED; 135 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
135 ixgbe_init_interrupt_scheme(adapter); 136 ixgbe_init_interrupt_scheme(adapter);
@@ -138,6 +139,7 @@ static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state)
138 } else { 139 } else {
139 /* Turn off DCB */ 140 /* Turn off DCB */
140 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { 141 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
142 adapter->hw.fc.requested_mode = ixgbe_fc_default;
141 if (netif_running(netdev)) 143 if (netif_running(netdev))
142 netdev->netdev_ops->ndo_stop(netdev); 144 netdev->netdev_ops->ndo_stop(netdev);
143 ixgbe_reset_interrupt_capability(adapter); 145 ixgbe_reset_interrupt_capability(adapter);
diff --git a/drivers/net/ixgbe/ixgbe_type.h b/drivers/net/ixgbe/ixgbe_type.h
index 95fc36cff261..2b2ecba7b609 100644
--- a/drivers/net/ixgbe/ixgbe_type.h
+++ b/drivers/net/ixgbe/ixgbe_type.h
@@ -1939,6 +1939,9 @@ enum ixgbe_fc_mode {
1939 ixgbe_fc_rx_pause, 1939 ixgbe_fc_rx_pause,
1940 ixgbe_fc_tx_pause, 1940 ixgbe_fc_tx_pause,
1941 ixgbe_fc_full, 1941 ixgbe_fc_full,
1942#ifdef CONFIG_DCB
1943 ixgbe_fc_pfc,
1944#endif
1942 ixgbe_fc_default 1945 ixgbe_fc_default
1943}; 1946};
1944 1947