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authorFelix Fietkau <nbd@openwrt.org>2012-03-14 11:40:21 -0400
committerJohn W. Linville <linville@tuxdriver.com>2012-03-15 13:43:13 -0400
commit7e03072edd6a915812c418e5662204f83bbb0c84 (patch)
treef77075168a828855e51515b5594895d3e796b74a /drivers
parentdc41e4d474bb18e60bc6678e58adc52ed227f105 (diff)
ath9k_hw: simplify tx queue interrupt mask handling
Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/wireless/ath/ath9k/mac.c26
1 files changed, 11 insertions, 15 deletions
diff --git a/drivers/net/wireless/ath/ath9k/mac.c b/drivers/net/wireless/ath/ath9k/mac.c
index 5f4ae6c9a93c..13b6afd67826 100644
--- a/drivers/net/wireless/ath/ath9k/mac.c
+++ b/drivers/net/wireless/ath/ath9k/mac.c
@@ -340,6 +340,15 @@ int ath9k_hw_setuptxqueue(struct ath_hw *ah, enum ath9k_tx_queue type,
340} 340}
341EXPORT_SYMBOL(ath9k_hw_setuptxqueue); 341EXPORT_SYMBOL(ath9k_hw_setuptxqueue);
342 342
343static void ath9k_hw_clear_queue_interrupts(struct ath_hw *ah, u32 q)
344{
345 ah->txok_interrupt_mask &= ~(1 << q);
346 ah->txerr_interrupt_mask &= ~(1 << q);
347 ah->txdesc_interrupt_mask &= ~(1 << q);
348 ah->txeol_interrupt_mask &= ~(1 << q);
349 ah->txurn_interrupt_mask &= ~(1 << q);
350}
351
343bool ath9k_hw_releasetxqueue(struct ath_hw *ah, u32 q) 352bool ath9k_hw_releasetxqueue(struct ath_hw *ah, u32 q)
344{ 353{
345 struct ath_common *common = ath9k_hw_common(ah); 354 struct ath_common *common = ath9k_hw_common(ah);
@@ -354,11 +363,7 @@ bool ath9k_hw_releasetxqueue(struct ath_hw *ah, u32 q)
354 ath_dbg(common, QUEUE, "Release TX queue: %u\n", q); 363 ath_dbg(common, QUEUE, "Release TX queue: %u\n", q);
355 364
356 qi->tqi_type = ATH9K_TX_QUEUE_INACTIVE; 365 qi->tqi_type = ATH9K_TX_QUEUE_INACTIVE;
357 ah->txok_interrupt_mask &= ~(1 << q); 366 ath9k_hw_clear_queue_interrupts(ah, q);
358 ah->txerr_interrupt_mask &= ~(1 << q);
359 ah->txdesc_interrupt_mask &= ~(1 << q);
360 ah->txeol_interrupt_mask &= ~(1 << q);
361 ah->txurn_interrupt_mask &= ~(1 << q);
362 ath9k_hw_set_txq_interrupts(ah, qi); 367 ath9k_hw_set_txq_interrupts(ah, qi);
363 368
364 return true; 369 return true;
@@ -510,26 +515,17 @@ bool ath9k_hw_resettxqueue(struct ath_hw *ah, u32 q)
510 if (AR_SREV_9300_20_OR_LATER(ah)) 515 if (AR_SREV_9300_20_OR_LATER(ah))
511 REG_WRITE(ah, AR_Q_DESC_CRCCHK, AR_Q_DESC_CRCCHK_EN); 516 REG_WRITE(ah, AR_Q_DESC_CRCCHK, AR_Q_DESC_CRCCHK_EN);
512 517
518 ath9k_hw_clear_queue_interrupts(ah, q);
513 if (qi->tqi_qflags & TXQ_FLAG_TXOKINT_ENABLE) 519 if (qi->tqi_qflags & TXQ_FLAG_TXOKINT_ENABLE)
514 ah->txok_interrupt_mask |= 1 << q; 520 ah->txok_interrupt_mask |= 1 << q;
515 else
516 ah->txok_interrupt_mask &= ~(1 << q);
517 if (qi->tqi_qflags & TXQ_FLAG_TXERRINT_ENABLE) 521 if (qi->tqi_qflags & TXQ_FLAG_TXERRINT_ENABLE)
518 ah->txerr_interrupt_mask |= 1 << q; 522 ah->txerr_interrupt_mask |= 1 << q;
519 else
520 ah->txerr_interrupt_mask &= ~(1 << q);
521 if (qi->tqi_qflags & TXQ_FLAG_TXDESCINT_ENABLE) 523 if (qi->tqi_qflags & TXQ_FLAG_TXDESCINT_ENABLE)
522 ah->txdesc_interrupt_mask |= 1 << q; 524 ah->txdesc_interrupt_mask |= 1 << q;
523 else
524 ah->txdesc_interrupt_mask &= ~(1 << q);
525 if (qi->tqi_qflags & TXQ_FLAG_TXEOLINT_ENABLE) 525 if (qi->tqi_qflags & TXQ_FLAG_TXEOLINT_ENABLE)
526 ah->txeol_interrupt_mask |= 1 << q; 526 ah->txeol_interrupt_mask |= 1 << q;
527 else
528 ah->txeol_interrupt_mask &= ~(1 << q);
529 if (qi->tqi_qflags & TXQ_FLAG_TXURNINT_ENABLE) 527 if (qi->tqi_qflags & TXQ_FLAG_TXURNINT_ENABLE)
530 ah->txurn_interrupt_mask |= 1 << q; 528 ah->txurn_interrupt_mask |= 1 << q;
531 else
532 ah->txurn_interrupt_mask &= ~(1 << q);
533 ath9k_hw_set_txq_interrupts(ah, qi); 529 ath9k_hw_set_txq_interrupts(ah, qi);
534 530
535 return true; 531 return true;