diff options
author | Dmitry Kravkov <dmitry@broadcom.com> | 2011-06-13 21:34:02 -0400 |
---|---|---|
committer | David S. Miller <davem@conan.davemloft.net> | 2011-06-15 10:56:56 -0400 |
commit | 754a2f5220ac7d597454df3104cfce9c83d68df0 (patch) | |
tree | d00abd015be81f74128fa1f96a3de29e6332b7db /drivers | |
parent | ef01854e24035a0b17ebeb98b05cfee2c8b36e02 (diff) |
bnx2x: Cosmetic changes.
Signed-off-by: Dmitry Kravkov <dmitry@broadcom.com>
Signed-off-by: Vladislav Zolotarov <vladz@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@conan.davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/net/bnx2x/bnx2x.h | 10 | ||||
-rw-r--r-- | drivers/net/bnx2x/bnx2x_ethtool.c | 12 | ||||
-rw-r--r-- | drivers/net/bnx2x/bnx2x_main.c | 37 |
3 files changed, 27 insertions, 32 deletions
diff --git a/drivers/net/bnx2x/bnx2x.h b/drivers/net/bnx2x/bnx2x.h index c108e4cf6333..838a4edbe942 100644 --- a/drivers/net/bnx2x/bnx2x.h +++ b/drivers/net/bnx2x/bnx2x.h | |||
@@ -26,10 +26,6 @@ | |||
26 | #define DRV_MODULE_RELDATE "2011/03/20" | 26 | #define DRV_MODULE_RELDATE "2011/03/20" |
27 | #define BNX2X_BC_VER 0x040200 | 27 | #define BNX2X_BC_VER 0x040200 |
28 | 28 | ||
29 | #define BNX2X_MULTI_QUEUE | ||
30 | |||
31 | #define BNX2X_NEW_NAPI | ||
32 | |||
33 | #if defined(CONFIG_DCB) | 29 | #if defined(CONFIG_DCB) |
34 | #define BCM_DCBNL | 30 | #define BCM_DCBNL |
35 | #endif | 31 | #endif |
@@ -745,9 +741,9 @@ struct bnx2x_common { | |||
745 | (CHIP_REV(bp) == CHIP_REV_Ax)) | 741 | (CHIP_REV(bp) == CHIP_REV_Ax)) |
746 | 742 | ||
747 | int flash_size; | 743 | int flash_size; |
748 | #define NVRAM_1MB_SIZE 0x20000 /* 1M bit in bytes */ | 744 | #define BNX2X_NVRAM_1MB_SIZE 0x20000 /* 1M bit in bytes */ |
749 | #define NVRAM_TIMEOUT_COUNT 30000 | 745 | #define BNX2X_NVRAM_TIMEOUT_COUNT 30000 |
750 | #define NVRAM_PAGE_SIZE 256 | 746 | #define BNX2X_NVRAM_PAGE_SIZE 256 |
751 | 747 | ||
752 | u32 shmem_base; | 748 | u32 shmem_base; |
753 | u32 shmem2_base; | 749 | u32 shmem2_base; |
diff --git a/drivers/net/bnx2x/bnx2x_ethtool.c b/drivers/net/bnx2x/bnx2x_ethtool.c index 965fb071fbe4..1a3ed418946d 100644 --- a/drivers/net/bnx2x/bnx2x_ethtool.c +++ b/drivers/net/bnx2x/bnx2x_ethtool.c | |||
@@ -762,7 +762,7 @@ static int bnx2x_acquire_nvram_lock(struct bnx2x *bp) | |||
762 | u32 val = 0; | 762 | u32 val = 0; |
763 | 763 | ||
764 | /* adjust timeout for emulation/FPGA */ | 764 | /* adjust timeout for emulation/FPGA */ |
765 | count = NVRAM_TIMEOUT_COUNT; | 765 | count = BNX2X_NVRAM_TIMEOUT_COUNT; |
766 | if (CHIP_REV_IS_SLOW(bp)) | 766 | if (CHIP_REV_IS_SLOW(bp)) |
767 | count *= 100; | 767 | count *= 100; |
768 | 768 | ||
@@ -793,7 +793,7 @@ static int bnx2x_release_nvram_lock(struct bnx2x *bp) | |||
793 | u32 val = 0; | 793 | u32 val = 0; |
794 | 794 | ||
795 | /* adjust timeout for emulation/FPGA */ | 795 | /* adjust timeout for emulation/FPGA */ |
796 | count = NVRAM_TIMEOUT_COUNT; | 796 | count = BNX2X_NVRAM_TIMEOUT_COUNT; |
797 | if (CHIP_REV_IS_SLOW(bp)) | 797 | if (CHIP_REV_IS_SLOW(bp)) |
798 | count *= 100; | 798 | count *= 100; |
799 | 799 | ||
@@ -861,7 +861,7 @@ static int bnx2x_nvram_read_dword(struct bnx2x *bp, u32 offset, __be32 *ret_val, | |||
861 | REG_WR(bp, MCP_REG_MCPR_NVM_COMMAND, cmd_flags); | 861 | REG_WR(bp, MCP_REG_MCPR_NVM_COMMAND, cmd_flags); |
862 | 862 | ||
863 | /* adjust timeout for emulation/FPGA */ | 863 | /* adjust timeout for emulation/FPGA */ |
864 | count = NVRAM_TIMEOUT_COUNT; | 864 | count = BNX2X_NVRAM_TIMEOUT_COUNT; |
865 | if (CHIP_REV_IS_SLOW(bp)) | 865 | if (CHIP_REV_IS_SLOW(bp)) |
866 | count *= 100; | 866 | count *= 100; |
867 | 867 | ||
@@ -984,7 +984,7 @@ static int bnx2x_nvram_write_dword(struct bnx2x *bp, u32 offset, u32 val, | |||
984 | REG_WR(bp, MCP_REG_MCPR_NVM_COMMAND, cmd_flags); | 984 | REG_WR(bp, MCP_REG_MCPR_NVM_COMMAND, cmd_flags); |
985 | 985 | ||
986 | /* adjust timeout for emulation/FPGA */ | 986 | /* adjust timeout for emulation/FPGA */ |
987 | count = NVRAM_TIMEOUT_COUNT; | 987 | count = BNX2X_NVRAM_TIMEOUT_COUNT; |
988 | if (CHIP_REV_IS_SLOW(bp)) | 988 | if (CHIP_REV_IS_SLOW(bp)) |
989 | count *= 100; | 989 | count *= 100; |
990 | 990 | ||
@@ -1088,9 +1088,9 @@ static int bnx2x_nvram_write(struct bnx2x *bp, u32 offset, u8 *data_buf, | |||
1088 | while ((written_so_far < buf_size) && (rc == 0)) { | 1088 | while ((written_so_far < buf_size) && (rc == 0)) { |
1089 | if (written_so_far == (buf_size - sizeof(u32))) | 1089 | if (written_so_far == (buf_size - sizeof(u32))) |
1090 | cmd_flags |= MCPR_NVM_COMMAND_LAST; | 1090 | cmd_flags |= MCPR_NVM_COMMAND_LAST; |
1091 | else if (((offset + 4) % NVRAM_PAGE_SIZE) == 0) | 1091 | else if (((offset + 4) % BNX2X_NVRAM_PAGE_SIZE) == 0) |
1092 | cmd_flags |= MCPR_NVM_COMMAND_LAST; | 1092 | cmd_flags |= MCPR_NVM_COMMAND_LAST; |
1093 | else if ((offset % NVRAM_PAGE_SIZE) == 0) | 1093 | else if ((offset % BNX2X_NVRAM_PAGE_SIZE) == 0) |
1094 | cmd_flags |= MCPR_NVM_COMMAND_FIRST; | 1094 | cmd_flags |= MCPR_NVM_COMMAND_FIRST; |
1095 | 1095 | ||
1096 | memcpy(&val, data_buf, 4); | 1096 | memcpy(&val, data_buf, 4); |
diff --git a/drivers/net/bnx2x/bnx2x_main.c b/drivers/net/bnx2x/bnx2x_main.c index 57fac3db9bde..6237e4aba82f 100644 --- a/drivers/net/bnx2x/bnx2x_main.c +++ b/drivers/net/bnx2x/bnx2x_main.c | |||
@@ -1557,7 +1557,7 @@ void bnx2x_int_disable_sync(struct bnx2x *bp, int disable_hw) | |||
1557 | offset++; | 1557 | offset++; |
1558 | #endif | 1558 | #endif |
1559 | for_each_eth_queue(bp, i) | 1559 | for_each_eth_queue(bp, i) |
1560 | synchronize_irq(bp->msix_table[i + offset].vector); | 1560 | synchronize_irq(bp->msix_table[offset++].vector); |
1561 | } else | 1561 | } else |
1562 | synchronize_irq(bp->pdev->irq); | 1562 | synchronize_irq(bp->pdev->irq); |
1563 | 1563 | ||
@@ -2514,7 +2514,8 @@ u32 bnx2x_fw_command(struct bnx2x *bp, u32 command, u32 param) | |||
2514 | SHMEM_WR(bp, func_mb[mb_idx].drv_mb_param, param); | 2514 | SHMEM_WR(bp, func_mb[mb_idx].drv_mb_param, param); |
2515 | SHMEM_WR(bp, func_mb[mb_idx].drv_mb_header, (command | seq)); | 2515 | SHMEM_WR(bp, func_mb[mb_idx].drv_mb_header, (command | seq)); |
2516 | 2516 | ||
2517 | DP(BNX2X_MSG_MCP, "wrote command (%x) to FW MB\n", (command | seq)); | 2517 | DP(BNX2X_MSG_MCP, "wrote command (%x) to FW MB param 0x%08x\n", |
2518 | (command | seq), param); | ||
2518 | 2519 | ||
2519 | do { | 2520 | do { |
2520 | /* let the FW do it's magic ... */ | 2521 | /* let the FW do it's magic ... */ |
@@ -8193,7 +8194,7 @@ static void __devinit bnx2x_get_common_hwinfo(struct bnx2x *bp) | |||
8193 | } | 8194 | } |
8194 | 8195 | ||
8195 | val = REG_RD(bp, MCP_REG_MCPR_NVM_CFG4); | 8196 | val = REG_RD(bp, MCP_REG_MCPR_NVM_CFG4); |
8196 | bp->common.flash_size = (NVRAM_1MB_SIZE << | 8197 | bp->common.flash_size = (BNX2X_NVRAM_1MB_SIZE << |
8197 | (val & MCPR_NVM_CFG4_FLASH_SIZE)); | 8198 | (val & MCPR_NVM_CFG4_FLASH_SIZE)); |
8198 | BNX2X_DEV_INFO("flash_size 0x%x (%d)\n", | 8199 | BNX2X_DEV_INFO("flash_size 0x%x (%d)\n", |
8199 | bp->common.flash_size, bp->common.flash_size); | 8200 | bp->common.flash_size, bp->common.flash_size); |
@@ -8466,7 +8467,7 @@ static void __devinit bnx2x_link_settings_requested(struct bnx2x *bp) | |||
8466 | (ADVERTISED_10baseT_Full | | 8467 | (ADVERTISED_10baseT_Full | |
8467 | ADVERTISED_TP); | 8468 | ADVERTISED_TP); |
8468 | } else { | 8469 | } else { |
8469 | BNX2X_ERROR("NVRAM config error. " | 8470 | BNX2X_ERR("NVRAM config error. " |
8470 | "Invalid link_config 0x%x" | 8471 | "Invalid link_config 0x%x" |
8471 | " speed_cap_mask 0x%x\n", | 8472 | " speed_cap_mask 0x%x\n", |
8472 | link_config, | 8473 | link_config, |
@@ -8485,7 +8486,7 @@ static void __devinit bnx2x_link_settings_requested(struct bnx2x *bp) | |||
8485 | (ADVERTISED_10baseT_Half | | 8486 | (ADVERTISED_10baseT_Half | |
8486 | ADVERTISED_TP); | 8487 | ADVERTISED_TP); |
8487 | } else { | 8488 | } else { |
8488 | BNX2X_ERROR("NVRAM config error. " | 8489 | BNX2X_ERR("NVRAM config error. " |
8489 | "Invalid link_config 0x%x" | 8490 | "Invalid link_config 0x%x" |
8490 | " speed_cap_mask 0x%x\n", | 8491 | " speed_cap_mask 0x%x\n", |
8491 | link_config, | 8492 | link_config, |
@@ -8503,7 +8504,7 @@ static void __devinit bnx2x_link_settings_requested(struct bnx2x *bp) | |||
8503 | (ADVERTISED_100baseT_Full | | 8504 | (ADVERTISED_100baseT_Full | |
8504 | ADVERTISED_TP); | 8505 | ADVERTISED_TP); |
8505 | } else { | 8506 | } else { |
8506 | BNX2X_ERROR("NVRAM config error. " | 8507 | BNX2X_ERR("NVRAM config error. " |
8507 | "Invalid link_config 0x%x" | 8508 | "Invalid link_config 0x%x" |
8508 | " speed_cap_mask 0x%x\n", | 8509 | " speed_cap_mask 0x%x\n", |
8509 | link_config, | 8510 | link_config, |
@@ -8523,7 +8524,7 @@ static void __devinit bnx2x_link_settings_requested(struct bnx2x *bp) | |||
8523 | (ADVERTISED_100baseT_Half | | 8524 | (ADVERTISED_100baseT_Half | |
8524 | ADVERTISED_TP); | 8525 | ADVERTISED_TP); |
8525 | } else { | 8526 | } else { |
8526 | BNX2X_ERROR("NVRAM config error. " | 8527 | BNX2X_ERR("NVRAM config error. " |
8527 | "Invalid link_config 0x%x" | 8528 | "Invalid link_config 0x%x" |
8528 | " speed_cap_mask 0x%x\n", | 8529 | " speed_cap_mask 0x%x\n", |
8529 | link_config, | 8530 | link_config, |
@@ -8541,7 +8542,7 @@ static void __devinit bnx2x_link_settings_requested(struct bnx2x *bp) | |||
8541 | (ADVERTISED_1000baseT_Full | | 8542 | (ADVERTISED_1000baseT_Full | |
8542 | ADVERTISED_TP); | 8543 | ADVERTISED_TP); |
8543 | } else { | 8544 | } else { |
8544 | BNX2X_ERROR("NVRAM config error. " | 8545 | BNX2X_ERR("NVRAM config error. " |
8545 | "Invalid link_config 0x%x" | 8546 | "Invalid link_config 0x%x" |
8546 | " speed_cap_mask 0x%x\n", | 8547 | " speed_cap_mask 0x%x\n", |
8547 | link_config, | 8548 | link_config, |
@@ -8559,7 +8560,7 @@ static void __devinit bnx2x_link_settings_requested(struct bnx2x *bp) | |||
8559 | (ADVERTISED_2500baseX_Full | | 8560 | (ADVERTISED_2500baseX_Full | |
8560 | ADVERTISED_TP); | 8561 | ADVERTISED_TP); |
8561 | } else { | 8562 | } else { |
8562 | BNX2X_ERROR("NVRAM config error. " | 8563 | BNX2X_ERR("NVRAM config error. " |
8563 | "Invalid link_config 0x%x" | 8564 | "Invalid link_config 0x%x" |
8564 | " speed_cap_mask 0x%x\n", | 8565 | " speed_cap_mask 0x%x\n", |
8565 | link_config, | 8566 | link_config, |
@@ -8577,7 +8578,7 @@ static void __devinit bnx2x_link_settings_requested(struct bnx2x *bp) | |||
8577 | (ADVERTISED_10000baseT_Full | | 8578 | (ADVERTISED_10000baseT_Full | |
8578 | ADVERTISED_FIBRE); | 8579 | ADVERTISED_FIBRE); |
8579 | } else { | 8580 | } else { |
8580 | BNX2X_ERROR("NVRAM config error. " | 8581 | BNX2X_ERR("NVRAM config error. " |
8581 | "Invalid link_config 0x%x" | 8582 | "Invalid link_config 0x%x" |
8582 | " speed_cap_mask 0x%x\n", | 8583 | " speed_cap_mask 0x%x\n", |
8583 | link_config, | 8584 | link_config, |
@@ -8587,9 +8588,9 @@ static void __devinit bnx2x_link_settings_requested(struct bnx2x *bp) | |||
8587 | break; | 8588 | break; |
8588 | 8589 | ||
8589 | default: | 8590 | default: |
8590 | BNX2X_ERROR("NVRAM config error. " | 8591 | BNX2X_ERR("NVRAM config error. " |
8591 | "BAD link speed link_config 0x%x\n", | 8592 | "BAD link speed link_config 0x%x\n", |
8592 | link_config); | 8593 | link_config); |
8593 | bp->link_params.req_line_speed[idx] = | 8594 | bp->link_params.req_line_speed[idx] = |
8594 | SPEED_AUTO_NEG; | 8595 | SPEED_AUTO_NEG; |
8595 | bp->port.advertising[idx] = | 8596 | bp->port.advertising[idx] = |
@@ -8962,14 +8963,12 @@ static int __devinit bnx2x_get_hwinfo(struct bnx2x *bp) | |||
8962 | bp->mf_config[vn] = MF_CFG_RD(bp, | 8963 | bp->mf_config[vn] = MF_CFG_RD(bp, |
8963 | func_mf_config[func].config); | 8964 | func_mf_config[func].config); |
8964 | } else | 8965 | } else |
8965 | DP(NETIF_MSG_PROBE, "illegal OV for " | 8966 | BNX2X_DEV_INFO("illegal OV for SD\n"); |
8966 | "SD\n"); | ||
8967 | break; | 8967 | break; |
8968 | default: | 8968 | default: |
8969 | /* Unknown configuration: reset mf_config */ | 8969 | /* Unknown configuration: reset mf_config */ |
8970 | bp->mf_config[vn] = 0; | 8970 | bp->mf_config[vn] = 0; |
8971 | DP(NETIF_MSG_PROBE, "Unknown MF mode 0x%x\n", | 8971 | BNX2X_DEV_INFO("unkown MF mode 0x%x\n", val); |
8972 | val); | ||
8973 | } | 8972 | } |
8974 | } | 8973 | } |
8975 | 8974 | ||
@@ -10406,8 +10405,8 @@ static void bnx2x_io_resume(struct pci_dev *pdev) | |||
10406 | struct bnx2x *bp = netdev_priv(dev); | 10405 | struct bnx2x *bp = netdev_priv(dev); |
10407 | 10406 | ||
10408 | if (bp->recovery_state != BNX2X_RECOVERY_DONE) { | 10407 | if (bp->recovery_state != BNX2X_RECOVERY_DONE) { |
10409 | printk(KERN_ERR "Handling parity error recovery. " | 10408 | netdev_err(bp->dev, "Handling parity error recovery. " |
10410 | "Try again later\n"); | 10409 | "Try again later\n"); |
10411 | return; | 10410 | return; |
10412 | } | 10411 | } |
10413 | 10412 | ||