diff options
author | Wayne Boyer <wayneb@linux.vnet.ibm.com> | 2010-05-10 12:13:00 -0400 |
---|---|---|
committer | James Bottomley <James.Bottomley@suse.de> | 2010-05-24 12:11:04 -0400 |
commit | 438b03311108b05a7b794bcf3941700853c62d1e (patch) | |
tree | 9c4b2f7cbf3b64837a02568de4349cbf645ba431 /drivers | |
parent | e6b50c30fa8d46c9401c2d48eee2351bdbb4c51c (diff) |
[SCSI] ipr: implement fixes for 64 bit adapter support
Implement some small fixes for 64 bit support that were preventing
the adapter from becoming operational.
Signed-off-by: Wayne Boyer <wayneb@linux.vnet.ibm.com>
Acked-by: Brian King <brking@linux.vnet.ibm.com>
Signed-off-by: James Bottomley <James.Bottomley@suse.de>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/scsi/ipr.c | 13 | ||||
-rw-r--r-- | drivers/scsi/ipr.h | 3 |
2 files changed, 11 insertions, 5 deletions
diff --git a/drivers/scsi/ipr.c b/drivers/scsi/ipr.c index 6a6661c35b2f..735402f61aba 100644 --- a/drivers/scsi/ipr.c +++ b/drivers/scsi/ipr.c | |||
@@ -1040,7 +1040,7 @@ static void ipr_init_res_entry(struct ipr_resource_entry *res, | |||
1040 | proto = cfgtew->u.cfgte64->proto; | 1040 | proto = cfgtew->u.cfgte64->proto; |
1041 | res->res_flags = cfgtew->u.cfgte64->res_flags; | 1041 | res->res_flags = cfgtew->u.cfgte64->res_flags; |
1042 | res->qmodel = IPR_QUEUEING_MODEL64(res); | 1042 | res->qmodel = IPR_QUEUEING_MODEL64(res); |
1043 | res->type = cfgtew->u.cfgte64->res_type & 0x0f; | 1043 | res->type = cfgtew->u.cfgte64->res_type; |
1044 | 1044 | ||
1045 | memcpy(res->res_path, &cfgtew->u.cfgte64->res_path, | 1045 | memcpy(res->res_path, &cfgtew->u.cfgte64->res_path, |
1046 | sizeof(res->res_path)); | 1046 | sizeof(res->res_path)); |
@@ -5014,6 +5014,8 @@ static int ipr_build_ioadl64(struct ipr_ioa_cfg *ioa_cfg, | |||
5014 | 5014 | ||
5015 | ipr_cmd->dma_use_sg = nseg; | 5015 | ipr_cmd->dma_use_sg = nseg; |
5016 | 5016 | ||
5017 | ioarcb->data_transfer_length = cpu_to_be32(length); | ||
5018 | |||
5017 | if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE) { | 5019 | if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE) { |
5018 | ioadl_flags = IPR_IOADL_FLAGS_WRITE; | 5020 | ioadl_flags = IPR_IOADL_FLAGS_WRITE; |
5019 | ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ; | 5021 | ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ; |
@@ -6706,7 +6708,7 @@ static int ipr_init_res_table(struct ipr_cmnd *ipr_cmd) | |||
6706 | list_move_tail(&res->queue, &old_res); | 6708 | list_move_tail(&res->queue, &old_res); |
6707 | 6709 | ||
6708 | if (ioa_cfg->sis64) | 6710 | if (ioa_cfg->sis64) |
6709 | entries = ioa_cfg->u.cfg_table64->hdr64.num_entries; | 6711 | entries = be16_to_cpu(ioa_cfg->u.cfg_table64->hdr64.num_entries); |
6710 | else | 6712 | else |
6711 | entries = ioa_cfg->u.cfg_table->hdr.num_entries; | 6713 | entries = ioa_cfg->u.cfg_table->hdr.num_entries; |
6712 | 6714 | ||
@@ -6792,6 +6794,7 @@ static int ipr_ioafp_query_ioa_cfg(struct ipr_cmnd *ipr_cmd) | |||
6792 | ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE); | 6794 | ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE); |
6793 | 6795 | ||
6794 | ioarcb->cmd_pkt.cdb[0] = IPR_QUERY_IOA_CONFIG; | 6796 | ioarcb->cmd_pkt.cdb[0] = IPR_QUERY_IOA_CONFIG; |
6797 | ioarcb->cmd_pkt.cdb[6] = (ioa_cfg->cfg_table_size >> 16) & 0xff; | ||
6795 | ioarcb->cmd_pkt.cdb[7] = (ioa_cfg->cfg_table_size >> 8) & 0xff; | 6798 | ioarcb->cmd_pkt.cdb[7] = (ioa_cfg->cfg_table_size >> 8) & 0xff; |
6796 | ioarcb->cmd_pkt.cdb[8] = ioa_cfg->cfg_table_size & 0xff; | 6799 | ioarcb->cmd_pkt.cdb[8] = ioa_cfg->cfg_table_size & 0xff; |
6797 | 6800 | ||
@@ -7122,7 +7125,9 @@ static int ipr_reset_next_stage(struct ipr_cmnd *ipr_cmd) | |||
7122 | ipr_dbg("IPL stage = 0x%lx, IPL stage time = %ld\n", stage, stage_time); | 7125 | ipr_dbg("IPL stage = 0x%lx, IPL stage time = %ld\n", stage, stage_time); |
7123 | 7126 | ||
7124 | /* sanity check the stage_time value */ | 7127 | /* sanity check the stage_time value */ |
7125 | if (stage_time < IPR_IPL_INIT_MIN_STAGE_TIME) | 7128 | if (stage_time == 0) |
7129 | stage_time = IPR_IPL_INIT_DEFAULT_STAGE_TIME; | ||
7130 | else if (stage_time < IPR_IPL_INIT_MIN_STAGE_TIME) | ||
7126 | stage_time = IPR_IPL_INIT_MIN_STAGE_TIME; | 7131 | stage_time = IPR_IPL_INIT_MIN_STAGE_TIME; |
7127 | else if (stage_time > IPR_LONG_OPERATIONAL_TIMEOUT) | 7132 | else if (stage_time > IPR_LONG_OPERATIONAL_TIMEOUT) |
7128 | stage_time = IPR_LONG_OPERATIONAL_TIMEOUT; | 7133 | stage_time = IPR_LONG_OPERATIONAL_TIMEOUT; |
@@ -7364,7 +7369,7 @@ static int ipr_reset_restore_cfg_space(struct ipr_cmnd *ipr_cmd) | |||
7364 | } | 7369 | } |
7365 | } | 7370 | } |
7366 | 7371 | ||
7367 | ENTER; | 7372 | LEAVE; |
7368 | return IPR_RC_JOB_CONTINUE; | 7373 | return IPR_RC_JOB_CONTINUE; |
7369 | } | 7374 | } |
7370 | 7375 | ||
diff --git a/drivers/scsi/ipr.h b/drivers/scsi/ipr.h index 4c267b5e0b96..4e7f81494ea4 100644 --- a/drivers/scsi/ipr.h +++ b/drivers/scsi/ipr.h | |||
@@ -244,6 +244,7 @@ | |||
244 | #define IPR_RUNTIME_RESET 0x40000000 | 244 | #define IPR_RUNTIME_RESET 0x40000000 |
245 | 245 | ||
246 | #define IPR_IPL_INIT_MIN_STAGE_TIME 5 | 246 | #define IPR_IPL_INIT_MIN_STAGE_TIME 5 |
247 | #define IPR_IPL_INIT_DEFAULT_STAGE_TIME 15 | ||
247 | #define IPR_IPL_INIT_STAGE_UNKNOWN 0x0 | 248 | #define IPR_IPL_INIT_STAGE_UNKNOWN 0x0 |
248 | #define IPR_IPL_INIT_STAGE_TRANSOP 0xB0000000 | 249 | #define IPR_IPL_INIT_STAGE_TRANSOP 0xB0000000 |
249 | #define IPR_IPL_INIT_STAGE_MASK 0xff000000 | 250 | #define IPR_IPL_INIT_STAGE_MASK 0xff000000 |
@@ -804,7 +805,7 @@ struct ipr_hostrcb_array_data_entry_enhanced { | |||
804 | }__attribute__((packed, aligned (4))); | 805 | }__attribute__((packed, aligned (4))); |
805 | 806 | ||
806 | struct ipr_hostrcb_type_ff_error { | 807 | struct ipr_hostrcb_type_ff_error { |
807 | __be32 ioa_data[502]; | 808 | __be32 ioa_data[758]; |
808 | }__attribute__((packed, aligned (4))); | 809 | }__attribute__((packed, aligned (4))); |
809 | 810 | ||
810 | struct ipr_hostrcb_type_01_error { | 811 | struct ipr_hostrcb_type_01_error { |