diff options
author | Archit Taneja <archit@ti.com> | 2010-12-02 06:27:13 -0500 |
---|---|---|
committer | Tomi Valkeinen <tomi.valkeinen@nokia.com> | 2011-01-10 04:36:50 -0500 |
commit | 6ced40bfc01f016de89b65d9c733c1fb5eeb06d0 (patch) | |
tree | 5e06fd1710f63a65fe5ec150ce90489444a9c173 /drivers/video | |
parent | 2a205f34b8fb2b86887b177befa7b42efd7a60b9 (diff) |
OMAP: DSS2: Use dss_features to handle DISPC bits removed on OMAP4
DISPC_CONFIG bits LCDENABLEPOL, LCDENABLESIGNAL, PCKFREEENABLE and FUNCGATED
have been removed from OMAP4, use dss_features to handle them correctly.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
Diffstat (limited to 'drivers/video')
-rw-r--r-- | drivers/video/omap2/dss/dispc.c | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c index fe41d891fd42..6171bcc589f8 100644 --- a/drivers/video/omap2/dss/dispc.c +++ b/drivers/video/omap2/dss/dispc.c | |||
@@ -1922,6 +1922,9 @@ void dispc_enable_channel(enum omap_channel channel, bool enable) | |||
1922 | 1922 | ||
1923 | void dispc_lcd_enable_signal_polarity(bool act_high) | 1923 | void dispc_lcd_enable_signal_polarity(bool act_high) |
1924 | { | 1924 | { |
1925 | if (!dss_has_feature(FEAT_LCDENABLEPOL)) | ||
1926 | return; | ||
1927 | |||
1925 | enable_clocks(1); | 1928 | enable_clocks(1); |
1926 | REG_FLD_MOD(DISPC_CONTROL, act_high ? 1 : 0, 29, 29); | 1929 | REG_FLD_MOD(DISPC_CONTROL, act_high ? 1 : 0, 29, 29); |
1927 | enable_clocks(0); | 1930 | enable_clocks(0); |
@@ -1929,6 +1932,9 @@ void dispc_lcd_enable_signal_polarity(bool act_high) | |||
1929 | 1932 | ||
1930 | void dispc_lcd_enable_signal(bool enable) | 1933 | void dispc_lcd_enable_signal(bool enable) |
1931 | { | 1934 | { |
1935 | if (!dss_has_feature(FEAT_LCDENABLESIGNAL)) | ||
1936 | return; | ||
1937 | |||
1932 | enable_clocks(1); | 1938 | enable_clocks(1); |
1933 | REG_FLD_MOD(DISPC_CONTROL, enable ? 1 : 0, 28, 28); | 1939 | REG_FLD_MOD(DISPC_CONTROL, enable ? 1 : 0, 28, 28); |
1934 | enable_clocks(0); | 1940 | enable_clocks(0); |
@@ -1936,6 +1942,9 @@ void dispc_lcd_enable_signal(bool enable) | |||
1936 | 1942 | ||
1937 | void dispc_pck_free_enable(bool enable) | 1943 | void dispc_pck_free_enable(bool enable) |
1938 | { | 1944 | { |
1945 | if (!dss_has_feature(FEAT_PCKFREEENABLE)) | ||
1946 | return; | ||
1947 | |||
1939 | enable_clocks(1); | 1948 | enable_clocks(1); |
1940 | REG_FLD_MOD(DISPC_CONTROL, enable ? 1 : 0, 27, 27); | 1949 | REG_FLD_MOD(DISPC_CONTROL, enable ? 1 : 0, 27, 27); |
1941 | enable_clocks(0); | 1950 | enable_clocks(0); |
@@ -3246,7 +3255,8 @@ static void _omap_dispc_initial_config(void) | |||
3246 | dispc_write_reg(DISPC_SYSCONFIG, l); | 3255 | dispc_write_reg(DISPC_SYSCONFIG, l); |
3247 | 3256 | ||
3248 | /* FUNCGATED */ | 3257 | /* FUNCGATED */ |
3249 | REG_FLD_MOD(DISPC_CONFIG, 1, 9, 9); | 3258 | if (dss_has_feature(FEAT_FUNCGATED)) |
3259 | REG_FLD_MOD(DISPC_CONFIG, 1, 9, 9); | ||
3250 | 3260 | ||
3251 | /* L3 firewall setting: enable access to OCM RAM */ | 3261 | /* L3 firewall setting: enable access to OCM RAM */ |
3252 | /* XXX this should be somewhere in plat-omap */ | 3262 | /* XXX this should be somewhere in plat-omap */ |